#include <stdio.h>
#include <stdlib.h>
#include <time.h>

__device__ float logsumexp(float a, float b)
{
	if(a > b)
	{
		return a + log(1.0+exp(b-a));
	}
	else
	{
		return b + log(1.0+exp(a-b));
	}
}

/*
__global__ void felsensteinfast(const int alphabet, const int numcols, const int numnodes, const int startnode, const int* left, const int* right, const float* transprobs, const float* freqs, float* data, float* collogliks)
{
	__shared__ float liks [8192];
	__shared__ int indices[512];
	__shared__ int revindices[512];
	__shared__ int index = 0;
	for(int i = 0 ; i < 512 ; i++)
	{
		indices[i] = -1;
		revindices[i] = -1;
	}
	__syncthreads();

	int col = blockIdx.x*blockDim.x + threadIdx.x; // column
	int nodeindex = 0;
	int lindex = 0;
	int rindex = 0;
	int leftindex = 0;
	int rightindex = 0;
	float m = 0.0;
	float bsum = 0.0;
	float csum = 0.0;
	float v = 0.0;
	int alphabetplus1 = alphabet+1;
	
	if(col < numcols)
	{		
		for(int node = startnode ; node < numnodes ; node += 1) // post-order tree traversal, calculate starting at tips and ending at root. 
		{	
			nodeindex = threadIdx.x*numnodes*alphabetplus1 + node*alphabetplus1;	
			lindex = left[node]; // left child
			rindex = right[node]; // right child				
			leftindex = threadIdx.x*numnodes*alphabetplus1 + lindex*alphabetplus1;
			rightindex = threadIdx.x*numnodes*alphabetplus1 + rindex*alphabetplus1;
			m = 0.0;
			int li = indices[leftindex];
			if(li == -1)
			{
				for(int a = 0 ; a < alphabet ; a++)
				{
					liks[index*al
				}
				index++;
			}
			int ri = indices[rightindex];

			for(int a = 0 ; a < alphabet ; a++)
			{
				bsum = 0.0;
				csum = 0.0;								
				for(int d = 0 ; d < alphabet ; d++)
				{
					bsum += transprobs[lindex*alphabet*alphabet + a*alphabet + d]*liks[leftindex+d];
					csum += transprobs[rindex*alphabet*alphabet + a*alphabet + d]*liks[rightindex+d];
				}
				v = bsum*csum;
				liks[nodeindex+a] = v;
				if(v > m)
				{
					m = v;	
				}				
			}

			for(int a = 0 ; a < alphabet ; a++)
			{
				liks[nodeindex+a] /= m;
			}				
			liks[nodeindex+alphabet] = log(m) + liks[leftindex+alphabet] + liks[rightindex+alphabet];
		}
	
		float logm = liks[threadIdx.x*numnodes*alphabetplus1 + (numnodes-1)*alphabetplus1 + alphabet];		
		collogliks[col] = 0.0;
		for(int a = 0 ; a < alphabet ; a++)
		{
			collogliks[col] += freqs[a]*liks[threadIdx.x*numnodes*alphabetplus1 + (numnodes-1)*alphabetplus1 + a]; 
		}
		collogliks[col] = log(collogliks[col]) + logm;
	}
}*/

__global__ void felsensteinleaves(const int alphabet, const int numcols, const int numpairs, const int* x, const int* y, float* data, float* res)
{
	int alphabetplus1 = alphabet+1;
	int a = 0;
	int e = 0;
	int f = 0;
	int thread = blockIdx.x*blockDim.x + threadIdx.x;
	if (thread < numpairs)
	{
		for(a = 0 ; a < alphabet ; a++)
		{
			e = a / 4;
			f = a % 4;
			res[thread*alphabetplus1+a] = data[x[thread]*4 + e]*data[y[thread]*4 + f];
		}
		res[thread*alphabetplus1+alphabet] = 0.0;
	}
}

__global__ void felsensteinleaves16(const int numcols, const int numpairs, const int* x, const int* y, float* data, float* res)
{
	int a = 0;
	int thread = blockIdx.x*blockDim.x + threadIdx.x;
	int startcol = 0;
	if (thread < numpairs)
	{
		int xindex = x[thread]*4;
		int yindex = y[thread]*4;
		#pragma unroll
		for(a = 0 ; a < 16 ; a++)
		{
			res[thread*17+a] = data[xindex + (a / 4)]*data[yindex + (a % 4)];
		}
		res[thread*17+16] = 0.0;
	}
}

__global__ void storearr(const int numpairs, const float logw, float* dest, float* src)
{
	int thread = blockIdx.x*blockDim.x + threadIdx.x;
	if (thread < numpairs)
	{
		dest[thread] = logw+src[thread];
	}
}

__global__ void logsumexparr(const int numpairs, const float logw1, float* dest, const float logw2, float* src)
{
	int thread = blockIdx.x*blockDim.x + threadIdx.x;
	if (thread < numpairs)
	{
		dest[thread] = logsumexp(logw1+dest[thread], logw2+src[thread]);
	}
}

__global__ void felsensteinhelper16(const int numcols, const int numpairs, const int numnodes, const int node, const int lindex, const int rindex, const int* leftindices, const int* rightindices, const float* transprobs, const float* left, const float* right, float* res)
{
	float m = 0.0;
	int thread = blockIdx.x*blockDim.x + threadIdx.x;
	float bsum = 0.0;
	float csum = 0.0;
	int lefttransstride = lindex*16*16;
	int lefttrans = 0;
	int righttransstride = rindex*16*16;
	int righttrans = 0;
	float v = 0.0;
	int a = 0;
	int d = 0;	
	int leftindex = leftindices[thread]*17;
	int rightindex = rightindices[thread]*17;
	int nodeindex = thread*17;
	if (thread < numpairs)
	{
		#pragma unroll
		for(a = 0 ; a < 16 ; a++)
		{
			bsum = 0.0;
			csum = 0.0;	
			lefttrans = lefttransstride + a*16;							
			righttrans = righttransstride + a*16;

			#pragma unroll
			for(d = 0 ; d < 16 ; d++)
			{
				bsum += transprobs[lefttrans+d]*left[leftindex+d];
				csum += transprobs[righttrans+d]*right[rightindex+d];
			}
			v = bsum*csum;
			res[nodeindex+a] = v;
			if(v > m)
			{
				m = v;	
			}						
		}
	
		#pragma unroll
		for(a = 0 ; a < 16 ; a++)
		{
			res[nodeindex+a] /= m;
		}
		res[nodeindex+16] = log(m) + left[leftindex+16] + right[rightindex+16];			
	}
}

__global__ void felsensteinleaves16paired(const int numcols, int numratecats, const int numpairs, const int* x, const int* y, float* data, float* res)
{
	int a = 0;
	int thread = blockIdx.x*blockDim.x + threadIdx.x;
	int pair = thread % numpairs;
	if (thread < numratecats*numpairs)
	{
		int xindex = x[pair]*4;
		int yindex = y[pair]*4;
		#pragma unroll
		for(a = 0 ; a < 16 ; a++)
		{
			res[thread*17+a] = data[xindex + (a / 4)]*data[yindex + (a % 4)];
		}
		res[thread*17+16] = 0.0;
	}
}

__global__ void felsensteinhelper16paired(const int numcols, int numratecats, const int numpairs, const int leftnumpairs, const int rightnumpairs, const int numnodes, const int node, const int lindex, const int rindex, const int* leftindices, const int* rightindices, const float* transprobs, const float* left, const float* right, float* res)
{
	float m = 0.0;
	int thread = blockIdx.x*blockDim.x + threadIdx.x;
	float bsum = 0.0;
	float csum = 0.0;	
	int lefttrans = 0;
	int righttrans = 0;
	float v = 0.0;
	int a = 0;
	int d = 0;	
	int ratecat = thread / numpairs;
	int pair = thread % numpairs;
	int leftindex = ratecat*leftnumpairs*17 + leftindices[pair]*17;
	int rightindex = ratecat*rightnumpairs*17 + rightindices[pair]*17;
	int nodeindex = thread*17;
	int lefttranstride = ratecat*numnodes*16*16 + lindex*16*16;
	int righttranstride = ratecat*numnodes*16*16 + rindex*16*16;

	if (thread < numratecats*numpairs)
	{
		#pragma unroll
		for(a = 0 ; a < 16 ; a++)
		{			
			lefttrans =  lefttranstride + a*16;							
			righttrans = righttranstride + a*16;

			bsum = 0.0;
			csum = 0.0;
			#pragma unroll
			for(d = 0 ; d < 16 ; d++)
			{
				bsum += transprobs[lefttrans+d]*left[leftindex+d];
				csum += transprobs[righttrans+d]*right[rightindex+d];
			}
			v = bsum*csum;
			res[nodeindex+a] = v;
			if(v > m)
			{
				m = v;	
			}						
		}
	
		#pragma unroll
		for(a = 0 ; a < 16 ; a++)
		{
			res[nodeindex+a] /= m;
		}
		res[nodeindex+16] = log(m) + left[leftindex+16] + right[rightindex+16];			
	}
}

__global__ void sumfinalpaired(const int alphabet, const int numratecats, const int numpairs, float* freqs, float* rootliks, float* finallogliks)
{
	int alphabetplus1 = alphabet+1;
	int thread = blockIdx.x*blockDim.x + threadIdx.x; // column
	int freqindex = (thread / numpairs)*alphabet;
	int a = 0;
	if(thread < numratecats*numpairs)
	{
		finallogliks[thread] = 0.0;
		for(a = 0 ; a < alphabet ; a++)
		{
			finallogliks[thread] += freqs[freqindex+a]*rootliks[thread*alphabetplus1+a];
		}
		finallogliks[thread] = log(finallogliks[thread]) + rootliks[thread*alphabetplus1+alphabet];
	}
}

__global__ void sumcats(const int numratecats, const int numpairs, float* logweights, float* logliks, float* logfinalliks)
{
	int thread = blockIdx.x*blockDim.x + threadIdx.x; // column
	if(thread < numpairs)
	{
		logfinalliks[thread] = logweights[0] + logliks[0*numpairs + thread];
		for(int r = 1 ; r < numratecats ; r++)
		{
			logfinalliks[thread] = logsumexp(logfinalliks[thread], logweights[r] + logliks[r*numpairs + thread]);
		}		
	}
}

__global__ void felsensteinhelper(const int alphabet, const int numcols, const int numpairs, const int numnodes, const int node, const int lindex, const int rindex, const int* leftindices, const int* rightindices, const float* transprobs, const float* left, const float* right, float* res)
{
	int alphabetplus1 = alphabet+1;
	float m = 0.0;
	int thread = blockIdx.x*blockDim.x + threadIdx.x;
	float bsum = 0.0;
	float csum = 0.0;
	int lefttrans = 0;
	int righttrans = 0;
	float v = 0.0;
	int a = 0;
	int d = 0;	
	int leftindex = 0;
	int rightindex = 0;
	int nodeindex = 0;
	if (thread < numpairs)
	{
		leftindex = leftindices[thread]*alphabetplus1;
		rightindex = rightindices[thread]*alphabetplus1;
		nodeindex = thread*alphabetplus1;
		for(a = 0 ; a < alphabet ; a++)
		{
			bsum = 0.0;
			csum = 0.0;	
			lefttrans = lindex*alphabet*alphabet + a*alphabet;							
			righttrans = rindex*alphabet*alphabet + a*alphabet;
			for(d = 0 ; d < alphabet ; d++)
			{
				bsum += transprobs[lefttrans+d]*left[leftindex+d];
				csum += transprobs[righttrans+d]*right[rightindex+d];
			}
			v = bsum*csum;
			res[nodeindex+a] = v;
			if(v > m)
			{
				m = v;	
			}						
		}
	
		for(a = 0 ; a < alphabet ; a++)
		{
			res[nodeindex+a] /= m;
		}
		res[nodeindex+alphabet] = log(m) + left[leftindex+alphabet] + right[rightindex+alphabet];			
	}
}

__global__ void felsensteindinucleotide(const int alphabet, const int numcols, const int numcategories, const int numpairs, const int numnodes, const int numleaves, const int* left, const int* right, const float* transprobs, const float* freqs, int* pairs, float* data, float* liks, float* collogliks)
{
	int thread = blockIdx.x*blockDim.x + threadIdx.x;	
	int nodeindex = 0;
	int lindex = 0;
	int rindex = 0;
	int leftindex = 0;
	int rightindex = 0;
	float m = 0.0;
	float bsum = 0.0;
	float csum = 0.0;
	float v = 0.0;
	int alphabetplus1 = alphabet+1;
	int node = 0;
	int a = 0;
	int e = 0;
	int f = 0;
	if(thread < numpairs*numcategories)
	{		
		int cat = thread / numpairs;
		int col = thread % numpairs;
		int pair = pairs[col];				
		int col1 = pair / numcols;
		int col2 = pair % numcols;
		int stride = cat*numpairs*numnodes*alphabetplus1 + col*numnodes*alphabetplus1;
		for(node = 0 ; node < numleaves ; node += 1)
		{
			nodeindex = stride + node*alphabetplus1;	
			for(a = 0 ; a < alphabet ; a++)
			{
				e = a / 4;
				f = a % 4;
				liks[nodeindex+a] = data[node*numcols*4 + col1*4 + e]*data[node*numcols*4 + col2*4+f];
			}
			liks[nodeindex+alphabet] = 0.0;
		}
		int stridetrans = cat*numnodes*alphabet*alphabet;
		for(node = numleaves ; node < numnodes ; node += 1)
		{	
			nodeindex = stride + node*alphabetplus1;
			lindex = left[node];
			rindex = right[node];					
			leftindex = stride + lindex*alphabetplus1;
			rightindex = stride + rindex*alphabetplus1;
			m = 0.0;				
			for(a = 0 ; a < alphabet ; a++)
			{
				bsum = 0.0;
				csum = 0.0;								
				for(int d = 0 ; d < alphabet ; d++)
				{
					bsum += transprobs[stridetrans + lindex*alphabet*alphabet + a*alphabet + d]*liks[leftindex+d];
					csum += transprobs[stridetrans + rindex*alphabet*alphabet + a*alphabet + d]*liks[rightindex+d];
				}
				v = bsum*csum;
				liks[nodeindex+a] = v;
				if(v > m)
				{
					m = v;	
				}				
			}

			for(a = 0 ; a < alphabet ; a++)
			{
				liks[nodeindex+a] /= m;
			}				
			liks[nodeindex+alphabet] = log(m) + liks[leftindex+alphabet] + liks[rightindex+alphabet];
		}

		float logm = liks[stride + (numnodes-1)*alphabetplus1 + alphabet];		
		collogliks[thread] = 0.0;
		for(a = 0 ; a < alphabet ; a++)
		{
			collogliks[thread] += freqs[cat*alphabet+a]*liks[stride + (numnodes-1)*alphabetplus1 + a]; 
		}
		collogliks[thread] = log(collogliks[thread]) + logm;
	}
}

__global__ void sumfinal(const int alphabet, const int numpairs, float* freqs, float* rootliks, float* finallogliks)
{
	int alphabetplus1 = alphabet+1;
	int thread = blockIdx.x*blockDim.x + threadIdx.x; // column
	int a = 0;
	if(thread < numpairs)
	{
		finallogliks[thread] = 0.0;
		for(a = 0 ; a < alphabet ; a++)
		{
			finallogliks[thread] += freqs[a]*rootliks[thread*alphabetplus1+a];
		}
		finallogliks[thread] = log(finallogliks[thread]) + rootliks[thread*alphabetplus1+alphabet];
	}
}

__global__ void sumcategories(const int numcategories, const int numcols, const float* catlogprobs, const float* collogliks, float* finallogliks)
{
	int col = blockIdx.x*blockDim.x + threadIdx.x; // column
	if(col < numcols)
	{
		finallogliks[col] = catlogprobs[0] + collogliks[col];
		for(int cat = 1 ; cat < numcategories ; cat++)
		{
			finallogliks[col] = logsumexp(finallogliks[col], catlogprobs[cat] + collogliks[cat*numcols + col]);
		}
	}
}


__global__ void felsensteinfast(const int alphabet, const int numcols, const int numnodes, const int startnode, const int* left, const int* right, const float* transprobs, const float* freqs, float* liks, float* collogliks)
{
	int col = blockIdx.x*blockDim.x + threadIdx.x; // column
	int nodeindex = 0;
	int lindex = 0;
	int rindex = 0;
	int leftindex = 0;
	int rightindex = 0;
	float m = 0.0;
	float bsum = 0.0;
	float csum = 0.0;
	float v = 0.0;
	int alphabetplus1 = alphabet+1;
	if(col < numcols)
	{
		for(int node = startnode ; node < numnodes ; node += 1) // post-order tree traversal, calculate starting at tips and ending at root. 
		{	
			nodeindex = col*numnodes*alphabetplus1 + node*alphabetplus1;	
			lindex = left[node]; // left child
			rindex = right[node]; // right child					
			leftindex = col*numnodes*alphabetplus1 + lindex*alphabetplus1;
			rightindex = col*numnodes*alphabetplus1 + rindex*alphabetplus1;
			m = 0.0;
			for(int a = 0 ; a < alphabet ; a++)
			{
				bsum = 0.0;
				csum = 0.0;								
				for(int d = 0 ; d < alphabet ; d++)
				{
					bsum += transprobs[lindex*alphabet*alphabet + a*alphabet + d]*liks[leftindex+d];
					csum += transprobs[rindex*alphabet*alphabet + a*alphabet + d]*liks[rightindex+d];
				}
				v = bsum*csum;
				liks[nodeindex+a] = v;
				if(v > m)
				{
					m = v;	
				}				
			}

			for(int a = 0 ; a < alphabet ; a++)
			{
				liks[nodeindex+a] /= m;
			}				
			liks[nodeindex+alphabet] = log(m) + liks[leftindex+alphabet] + liks[rightindex+alphabet];
		}
	
		float logm = liks[(col*numnodes*alphabetplus1) + (numnodes-1)*alphabetplus1 + alphabet];		
		collogliks[col] = 0.0;
		for(int a = 0 ; a < alphabet ; a++)
		{
			collogliks[col] += freqs[a]*liks[(col*numnodes*alphabetplus1) + (numnodes-1)*alphabetplus1 + a]; 
		}
		collogliks[col] = log(collogliks[col]) + logm;
	}
}

/*
__global__ void felsenstein(int numcols, int numnodes, int* left, int* right, float* logtransprobs, float* logfreqs, float* logliks, float* collogliks)
{
	int col = blockIdx.x*blockDim.x + threadIdx.x; // column
	if(col < numcols)
	{
		for(int node = 0 ; node < numnodes ; node += 1) // post-order tree traversal, calculate starting at tips and ending at root. 
		{	
			int lognodeindex = col*numnodes*alphabet + node*alphabet;	
			int lindex = left[node]; // left child
			int rindex = right[node]; // right child
			if(lindex == -1 && rindex == -1) // if 'node' is leaf node
			{

			}
			else // if 'node' is internal node
			{			
				int logleftindex = col*numnodes*alphabet + lindex*alphabet;
				int logrightindex = col*numnodes*alphabet + rindex*alphabet;
				for(int a = 0 ; a < alphabet ; a++)
				{
					float bsum = -1e10;
					float csum = -1e10;								
					for(int d = 0 ; d < alphabet ; d++)
					{
						int transindex = node*alphabet*alphabet + a*alphabet + d;
						float logtransprob = logtransprobs[transindex]; // transition probability
						bsum = logsumexp(bsum, logtransprob+logliks[logleftindex+d]);
						csum = logsumexp(csum, logtransprob+logliks[logrightindex+d]);
					}
					logliks[lognodeindex+a] = bsum+csum;
				}
			}
		}
	
		collogliks[col] = -1e10;
		for(int a = 0 ; a < alphabet ; a++)
		{
			collogliks[col] = logsumexp(collogliks[col], logfreqs[a] + logliks[col*numnodes*alphabet + (numnodes-1)*alphabet + a]); 
		}
	}
}

float randfloat()
{
	return ((float)rand()/(float)(RAND_MAX)) * 1.0;
}

int main(void)
{
	int code = 0;

	int numcols = 10000;
	int numnodes = 250;
	
	int *left, *right, *d_left, *d_right;
	left = (int*)malloc(numnodes*sizeof(int));
	right = (int*)malloc(numnodes*sizeof(int));
	for(int node = 0 ; node < numnodes ; node += 1)
	{
		//left[node] = rand() % numnodes;
		//right[node] = rand() % numnodes;
	}
	code = cudaMalloc(&d_left, numnodes*sizeof(int));
	printf("A %d\n", code);
	code = cudaMalloc(&d_right, numnodes*sizeof(int));
	printf("B %d\n", code);
 	code = cudaMemcpy(d_left, left, numnodes*sizeof(int), cudaMemcpyHostToDevice);
	printf("C %d\n", code);
	code = cudaMemcpy(d_right, right, numnodes*sizeof(int), cudaMemcpyHostToDevice);
	printf("D %d\n", code);

	float *logtransprobs, *d_logtransprobs;
	logtransprobs = (float*)malloc(numnodes*alphabet*alphabet*sizeof(float));
	for(int node = 0 ; node < numnodes ; node += 1)
	{
		for(int a = 0 ; a < alphabet ; a++)
		{
			float sum = 0.0;
			for(int b = 0 ; b < alphabet ; b++)
			{
				logtransprobs[node*alphabet*alphabet+a*alphabet+b] = randfloat();
				sum += logtransprobs[node*alphabet*alphabet+a*alphabet+b];
			}
			for(int b = 0 ; b < alphabet ; b++)
			{
				logtransprobs[node*alphabet*alphabet+a*alphabet+b] = log(logtransprobs[node*alphabet*alphabet+a*alphabet+b]/sum);
			}
			
		}
	}

	float *logfreqs, *d_logfreqs;
	logfreqs = (float*)malloc(alphabet*sizeof(float));
	for(int a = 0 ; a < alphabet ; a++)
	{
		logfreqs[a] = log(randfloat()); 
	}
	cudaMalloc(&d_logfreqs, alphabet*sizeof(float));
	cudaMemcpy(d_logfreqs, logfreqs, alphabet*sizeof(float), cudaMemcpyHostToDevice);

	code = cudaMalloc(&d_logtransprobs, numnodes*alphabet*alphabet*sizeof(float));
	printf("E %d\n", code);
	code = cudaMemcpy(d_logtransprobs, logtransprobs, numnodes*alphabet*alphabet*sizeof(float), cudaMemcpyHostToDevice);
	printf("F %d\n", code);
	
	float *logliks, *d_logliks;
	logliks = (float*)malloc(numcols*numnodes*alphabet*sizeof(float));
	for(int col = 0 ; col < numcols ; col += 1)
	{
		for(int node = 0 ; node < numnodes ; node += 1)
		{
			int lognodeindex = col*numnodes*alphabet + node*alphabet;
			for(int a = 0 ; a < alphabet ; a += 1) 
			{
				logliks[lognodeindex+a] = -1e10;
			}
			logliks[lognodeindex + (rand() % alphabet)] = 0.0;
		}
	}
	cudaMalloc(&d_logliks, numcols*numnodes*alphabet*sizeof(float));
	cudaMemcpy(d_logliks, logliks, numcols*numnodes*alphabet*sizeof(float), cudaMemcpyHostToDevice);

	float *collogliks, *d_collogliks;
	collogliks = (float*)malloc(numcols*sizeof(float));
	for(int col = 0 ; col < numcols ; col++)
	{
		collogliks[col] = 20.0;
	}
	cudaMalloc(&d_collogliks, numcols*sizeof(float));
	cudaMemcpy(d_collogliks, collogliks, numcols*sizeof(float), cudaMemcpyHostToDevice);
	felsenstein<<<(numcols+255)/256, 256>>>(numcols, numnodes, d_left, d_right, d_logtransprobs, d_logfreqs, d_logliks, d_collogliks);
	code = cudaMemcpy(collogliks,  d_collogliks, numcols*sizeof(float), cudaMemcpyDeviceToHost);
	printf("finished %d\n", code);
	
	for(int col = 0 ; col < numcols ; col++)
	{
		printf("%d\t%lf\n",col,collogliks[col]);
	}
	

	cudaFree(d_left);
	cudaFree(d_right);
	cudaFree(d_logtransprobs);
	cudaFree(d_logliks);
	cudaFree(d_collogliks);
	free(left);
	free(right);
	free(logtransprobs);
	free(logliks);
	free(collogliks);
	return 0;
}*/

	.file	"tmpxft_0031a506_00000000-6_felsenstein.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.type	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0, @function
_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0:
.LFB2197:
	.cfi_startproc
	jmp	cudaLaunchKernel@PLT
	.cfi_endproc
.LFE2197:
	.size	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0, .-_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	.globl	_Z9logsumexpff
	.type	_Z9logsumexpff, @function
_Z9logsumexpff:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2027:
	.size	_Z9logsumexpff, .-_Z9logsumexpff
	.globl	_Z49__device_stub__Z17felsensteinleavesiiiPKiS0_PfS1_iiiPKiS0_PfS1_
	.type	_Z49__device_stub__Z17felsensteinleavesiiiPKiS0_PfS1_iiiPKiS0_PfS1_, @function
_Z49__device_stub__Z17felsensteinleavesiiiPKiS0_PfS1_iiiPKiS0_PfS1_:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	176(%rsp), %rax
	movl	%edi, 44(%rsp)
	leaq	72(%rsp), %rdi
	movl	%esi, 40(%rsp)
	leaq	84(%rsp), %rsi
	movl	%edx, 36(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 24(%rsp)
	leaq	64(%rsp), %rcx
	movq	%r8, 16(%rsp)
	movq	%r9, 8(%rsp)
	movq	%rax, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	44(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 96(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	36(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 136(%rsp)
	movq	%rsp, %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L5
	pushq	64(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z17felsensteinleavesiiiPKiS0_PfS1_(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 192
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	112(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L5:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L7
	call	__stack_chk_fail@PLT
.L7:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z49__device_stub__Z17felsensteinleavesiiiPKiS0_PfS1_iiiPKiS0_PfS1_, .-_Z49__device_stub__Z17felsensteinleavesiiiPKiS0_PfS1_iiiPKiS0_PfS1_
	.globl	_Z17felsensteinleavesiiiPKiS0_PfS1_
	.type	_Z17felsensteinleavesiiiPKiS0_PfS1_, @function
_Z17felsensteinleavesiiiPKiS0_PfS1_:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z49__device_stub__Z17felsensteinleavesiiiPKiS0_PfS1_iiiPKiS0_PfS1_
	.cfi_endproc
.LFE2053:
	.size	_Z17felsensteinleavesiiiPKiS0_PfS1_, .-_Z17felsensteinleavesiiiPKiS0_PfS1_
	.globl	_Z50__device_stub__Z19felsensteinleaves16iiPKiS0_PfS1_iiPKiS0_PfS1_
	.type	_Z50__device_stub__Z19felsensteinleaves16iiPKiS0_PfS1_iiPKiS0_PfS1_, @function
_Z50__device_stub__Z19felsensteinleaves16iiPKiS0_PfS1_iiPKiS0_PfS1_:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movl	%edi, 44(%rsp)
	leaq	64(%rsp), %rdi
	movl	%esi, 40(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 32(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 24(%rsp)
	leaq	56(%rsp), %rcx
	movq	%r8, 16(%rsp)
	movq	%r9, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	44(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 88(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L11
	pushq	56(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z19felsensteinleaves16iiPKiS0_PfS1_(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 176
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	104(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L11:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L13
	call	__stack_chk_fail@PLT
.L13:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z50__device_stub__Z19felsensteinleaves16iiPKiS0_PfS1_iiPKiS0_PfS1_, .-_Z50__device_stub__Z19felsensteinleaves16iiPKiS0_PfS1_iiPKiS0_PfS1_
	.globl	_Z19felsensteinleaves16iiPKiS0_PfS1_
	.type	_Z19felsensteinleaves16iiPKiS0_PfS1_, @function
_Z19felsensteinleaves16iiPKiS0_PfS1_:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z50__device_stub__Z19felsensteinleaves16iiPKiS0_PfS1_iiPKiS0_PfS1_
	.cfi_endproc
.LFE2055:
	.size	_Z19felsensteinleaves16iiPKiS0_PfS1_, .-_Z19felsensteinleaves16iiPKiS0_PfS1_
	.globl	_Z31__device_stub__Z8storearrifPfS_ifPfS_
	.type	_Z31__device_stub__Z8storearrifPfS_ifPfS_, @function
_Z31__device_stub__Z8storearrifPfS_ifPfS_:
.LFB2056:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movl	%edi, 28(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movss	%xmm0, 24(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z8storearrifPfS_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L16:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L18
	call	__stack_chk_fail@PLT
.L18:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2056:
	.size	_Z31__device_stub__Z8storearrifPfS_ifPfS_, .-_Z31__device_stub__Z8storearrifPfS_ifPfS_
	.globl	_Z8storearrifPfS_
	.type	_Z8storearrifPfS_, @function
_Z8storearrifPfS_:
.LFB2057:
	.cfi_startproc
	endbr64
	jmp	_Z31__device_stub__Z8storearrifPfS_ifPfS_
	.cfi_endproc
.LFE2057:
	.size	_Z8storearrifPfS_, .-_Z8storearrifPfS_
	.globl	_Z37__device_stub__Z12logsumexparrifPffS_ifPffS_
	.type	_Z37__device_stub__Z12logsumexparrifPffS_ifPffS_, @function
_Z37__device_stub__Z12logsumexparrifPffS_ifPffS_:
.LFB2058:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movl	%edi, 28(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, (%rsp)
	leaq	40(%rsp), %rdx
	movss	%xmm0, 24(%rsp)
	movss	%xmm1, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 104(%rsp)
	movq	%rsp, %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L21
	pushq	48(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z12logsumexparrifPffS_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 160
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L21:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L23
	call	__stack_chk_fail@PLT
.L23:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2058:
	.size	_Z37__device_stub__Z12logsumexparrifPffS_ifPffS_, .-_Z37__device_stub__Z12logsumexparrifPffS_ifPffS_
	.globl	_Z12logsumexparrifPffS_
	.type	_Z12logsumexparrifPffS_, @function
_Z12logsumexparrifPffS_:
.LFB2059:
	.cfi_startproc
	endbr64
	jmp	_Z37__device_stub__Z12logsumexparrifPffS_ifPffS_
	.cfi_endproc
.LFE2059:
	.size	_Z12logsumexparrifPffS_, .-_Z12logsumexparrifPffS_
	.globl	_Z60__device_stub__Z19felsensteinhelper16iiiiiiPKiS0_PKfS2_S2_PfiiiiiiPKiS0_PKfS2_S2_Pf
	.type	_Z60__device_stub__Z19felsensteinhelper16iiiiiiPKiS0_PKfS2_S2_PfiiiiiiPKiS0_PKfS2_S2_Pf, @function
_Z60__device_stub__Z19felsensteinhelper16iiiiiiPKiS0_PKfS2_S2_PfiiiiiiPKiS0_PKfS2_S2_Pf:
.LFB2060:
	.cfi_startproc
	endbr64
	subq	$232, %rsp
	.cfi_def_cfa_offset 240
	movq	240(%rsp), %rax
	movl	%edi, 76(%rsp)
	leaq	96(%rsp), %rdi
	movl	%esi, 72(%rsp)
	leaq	108(%rsp), %rsi
	movq	%rax, 48(%rsp)
	movq	248(%rsp), %rax
	movl	%edx, 68(%rsp)
	leaq	80(%rsp), %rdx
	movq	%rax, 40(%rsp)
	movq	256(%rsp), %rax
	movl	%ecx, 64(%rsp)
	leaq	88(%rsp), %rcx
	movq	%rax, 32(%rsp)
	movq	264(%rsp), %rax
	movl	%r8d, 60(%rsp)
	movq	%rax, 24(%rsp)
	movq	272(%rsp), %rax
	movl	%r9d, 56(%rsp)
	movq	%rax, 16(%rsp)
	movq	280(%rsp), %rax
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 216(%rsp)
	xorl	%eax, %eax
	leaq	76(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	68(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	60(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 208(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 96(%rsp)
	movl	$1, 104(%rsp)
	movq	%rax, 108(%rsp)
	movl	$1, 116(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L26
	pushq	88(%rsp)
	.cfi_def_cfa_offset 248
	leaq	_Z19felsensteinhelper16iiiiiiPKiS0_PKfS2_S2_Pf(%rip), %rdi
	pushq	88(%rsp)
	.cfi_def_cfa_offset 256
	movq	124(%rsp), %rcx
	movl	132(%rsp), %r8d
	movq	112(%rsp), %rsi
	movl	120(%rsp), %edx
	leaq	136(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 248
	popq	%rdx
	.cfi_def_cfa_offset 240
.L26:
	movq	216(%rsp), %rax
	subq	%fs:40, %rax
	je	.L28
	call	__stack_chk_fail@PLT
.L28:
	addq	$232, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2060:
	.size	_Z60__device_stub__Z19felsensteinhelper16iiiiiiPKiS0_PKfS2_S2_PfiiiiiiPKiS0_PKfS2_S2_Pf, .-_Z60__device_stub__Z19felsensteinhelper16iiiiiiPKiS0_PKfS2_S2_PfiiiiiiPKiS0_PKfS2_S2_Pf
	.globl	_Z19felsensteinhelper16iiiiiiPKiS0_PKfS2_S2_Pf
	.type	_Z19felsensteinhelper16iiiiiiPKiS0_PKfS2_S2_Pf, @function
_Z19felsensteinhelper16iiiiiiPKiS0_PKfS2_S2_Pf:
.LFB2061:
	.cfi_startproc
	endbr64
	jmp	_Z60__device_stub__Z19felsensteinhelper16iiiiiiPKiS0_PKfS2_S2_PfiiiiiiPKiS0_PKfS2_S2_Pf
	.cfi_endproc
.LFE2061:
	.size	_Z19felsensteinhelper16iiiiiiPKiS0_PKfS2_S2_Pf, .-_Z19felsensteinhelper16iiiiiiPKiS0_PKfS2_S2_Pf
	.globl	_Z57__device_stub__Z25felsensteinleaves16pairediiiPKiS0_PfS1_iiiPKiS0_PfS1_
	.type	_Z57__device_stub__Z25felsensteinleaves16pairediiiPKiS0_PfS1_iiiPKiS0_PfS1_, @function
_Z57__device_stub__Z25felsensteinleaves16pairediiiPKiS0_PfS1_iiiPKiS0_PfS1_:
.LFB2062:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	176(%rsp), %rax
	movl	%edi, 44(%rsp)
	leaq	72(%rsp), %rdi
	movl	%esi, 40(%rsp)
	leaq	84(%rsp), %rsi
	movl	%edx, 36(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 24(%rsp)
	leaq	64(%rsp), %rcx
	movq	%r8, 16(%rsp)
	movq	%r9, 8(%rsp)
	movq	%rax, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	44(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 96(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	36(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 136(%rsp)
	movq	%rsp, %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L31
	pushq	64(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z25felsensteinleaves16pairediiiPKiS0_PfS1_(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 192
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	112(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L31:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L33
	call	__stack_chk_fail@PLT
.L33:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2062:
	.size	_Z57__device_stub__Z25felsensteinleaves16pairediiiPKiS0_PfS1_iiiPKiS0_PfS1_, .-_Z57__device_stub__Z25felsensteinleaves16pairediiiPKiS0_PfS1_iiiPKiS0_PfS1_
	.globl	_Z25felsensteinleaves16pairediiiPKiS0_PfS1_
	.type	_Z25felsensteinleaves16pairediiiPKiS0_PfS1_, @function
_Z25felsensteinleaves16pairediiiPKiS0_PfS1_:
.LFB2063:
	.cfi_startproc
	endbr64
	jmp	_Z57__device_stub__Z25felsensteinleaves16pairediiiPKiS0_PfS1_iiiPKiS0_PfS1_
	.cfi_endproc
.LFE2063:
	.size	_Z25felsensteinleaves16pairediiiPKiS0_PfS1_, .-_Z25felsensteinleaves16pairediiiPKiS0_PfS1_
	.globl	_Z69__device_stub__Z25felsensteinhelper16pairediiiiiiiiiPKiS0_PKfS2_S2_PfiiiiiiiiiPKiS0_PKfS2_S2_Pf
	.type	_Z69__device_stub__Z25felsensteinhelper16pairediiiiiiiiiPKiS0_PKfS2_S2_PfiiiiiiiiiPKiS0_PKfS2_S2_Pf, @function
_Z69__device_stub__Z25felsensteinhelper16pairediiiiiiiiiPKiS0_PKfS2_S2_PfiiiiiiiiiPKiS0_PKfS2_S2_Pf:
.LFB2064:
	.cfi_startproc
	endbr64
	subq	$264, %rsp
	.cfi_def_cfa_offset 272
	movq	296(%rsp), %rax
	movl	%edi, 76(%rsp)
	leaq	104(%rsp), %rdi
	movl	%esi, 72(%rsp)
	leaq	116(%rsp), %rsi
	movq	%rax, 48(%rsp)
	movq	304(%rsp), %rax
	movl	%edx, 68(%rsp)
	leaq	88(%rsp), %rdx
	movq	%rax, 40(%rsp)
	movq	312(%rsp), %rax
	movl	%ecx, 64(%rsp)
	leaq	96(%rsp), %rcx
	movq	%rax, 32(%rsp)
	movq	320(%rsp), %rax
	movl	%r8d, 60(%rsp)
	movq	%rax, 24(%rsp)
	movq	328(%rsp), %rax
	movl	%r9d, 56(%rsp)
	movq	%rax, 16(%rsp)
	movq	336(%rsp), %rax
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 248(%rsp)
	xorl	%eax, %eax
	leaq	76(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	68(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	60(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	272(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	280(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	288(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 208(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 216(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 224(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 232(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 240(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 104(%rsp)
	movl	$1, 112(%rsp)
	movq	%rax, 116(%rsp)
	movl	$1, 124(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L36
	pushq	96(%rsp)
	.cfi_def_cfa_offset 280
	leaq	_Z25felsensteinhelper16pairediiiiiiiiiPKiS0_PKfS2_S2_Pf(%rip), %rdi
	pushq	96(%rsp)
	.cfi_def_cfa_offset 288
	movq	132(%rsp), %rcx
	movl	140(%rsp), %r8d
	movq	120(%rsp), %rsi
	movl	128(%rsp), %edx
	leaq	144(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 280
	popq	%rdx
	.cfi_def_cfa_offset 272
.L36:
	movq	248(%rsp), %rax
	subq	%fs:40, %rax
	je	.L38
	call	__stack_chk_fail@PLT
.L38:
	addq	$264, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2064:
	.size	_Z69__device_stub__Z25felsensteinhelper16pairediiiiiiiiiPKiS0_PKfS2_S2_PfiiiiiiiiiPKiS0_PKfS2_S2_Pf, .-_Z69__device_stub__Z25felsensteinhelper16pairediiiiiiiiiPKiS0_PKfS2_S2_PfiiiiiiiiiPKiS0_PKfS2_S2_Pf
	.globl	_Z25felsensteinhelper16pairediiiiiiiiiPKiS0_PKfS2_S2_Pf
	.type	_Z25felsensteinhelper16pairediiiiiiiiiPKiS0_PKfS2_S2_Pf, @function
_Z25felsensteinhelper16pairediiiiiiiiiPKiS0_PKfS2_S2_Pf:
.LFB2065:
	.cfi_startproc
	endbr64
	jmp	_Z69__device_stub__Z25felsensteinhelper16pairediiiiiiiiiPKiS0_PKfS2_S2_PfiiiiiiiiiPKiS0_PKfS2_S2_Pf
	.cfi_endproc
.LFE2065:
	.size	_Z25felsensteinhelper16pairediiiiiiiiiPKiS0_PKfS2_S2_Pf, .-_Z25felsensteinhelper16pairediiiiiiiiiPKiS0_PKfS2_S2_Pf
	.globl	_Z41__device_stub__Z14sumfinalpairediiiPfS_S_iiiPfS_S_
	.type	_Z41__device_stub__Z14sumfinalpairediiiPfS_S_iiiPfS_S_, @function
_Z41__device_stub__Z14sumfinalpairediiiPfS_S_iiiPfS_S_:
.LFB2066:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movl	%edi, 44(%rsp)
	leaq	64(%rsp), %rdi
	movl	%esi, 40(%rsp)
	leaq	76(%rsp), %rsi
	movl	%edx, 36(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 24(%rsp)
	leaq	56(%rsp), %rcx
	movq	%r8, 16(%rsp)
	movq	%r9, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	44(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 88(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	36(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L41
	pushq	56(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z14sumfinalpairediiiPfS_S_(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 176
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	104(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L41:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L43
	call	__stack_chk_fail@PLT
.L43:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2066:
	.size	_Z41__device_stub__Z14sumfinalpairediiiPfS_S_iiiPfS_S_, .-_Z41__device_stub__Z14sumfinalpairediiiPfS_S_iiiPfS_S_
	.globl	_Z14sumfinalpairediiiPfS_S_
	.type	_Z14sumfinalpairediiiPfS_S_, @function
_Z14sumfinalpairediiiPfS_S_:
.LFB2067:
	.cfi_startproc
	endbr64
	jmp	_Z41__device_stub__Z14sumfinalpairediiiPfS_S_iiiPfS_S_
	.cfi_endproc
.LFE2067:
	.size	_Z14sumfinalpairediiiPfS_S_, .-_Z14sumfinalpairediiiPfS_S_
	.globl	_Z32__device_stub__Z7sumcatsiiPfS_S_iiPfS_S_
	.type	_Z32__device_stub__Z7sumcatsiiPfS_S_iiPfS_S_, @function
_Z32__device_stub__Z7sumcatsiiPfS_S_iiPfS_S_:
.LFB2068:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movl	%edi, 28(%rsp)
	leaq	56(%rsp), %rdi
	movl	%esi, 24(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 16(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%r8, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 104(%rsp)
	movq	%rsp, %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L46
	pushq	48(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z7sumcatsiiPfS_S_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 160
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L46:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L48
	call	__stack_chk_fail@PLT
.L48:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2068:
	.size	_Z32__device_stub__Z7sumcatsiiPfS_S_iiPfS_S_, .-_Z32__device_stub__Z7sumcatsiiPfS_S_iiPfS_S_
	.globl	_Z7sumcatsiiPfS_S_
	.type	_Z7sumcatsiiPfS_S_, @function
_Z7sumcatsiiPfS_S_:
.LFB2069:
	.cfi_startproc
	endbr64
	jmp	_Z32__device_stub__Z7sumcatsiiPfS_S_iiPfS_S_
	.cfi_endproc
.LFE2069:
	.size	_Z7sumcatsiiPfS_S_, .-_Z7sumcatsiiPfS_S_
	.globl	_Z59__device_stub__Z17felsensteinhelperiiiiiiiPKiS0_PKfS2_S2_PfiiiiiiiPKiS0_PKfS2_S2_Pf
	.type	_Z59__device_stub__Z17felsensteinhelperiiiiiiiPKiS0_PKfS2_S2_PfiiiiiiiPKiS0_PKfS2_S2_Pf, @function
_Z59__device_stub__Z17felsensteinhelperiiiiiiiPKiS0_PKfS2_S2_PfiiiiiiiPKiS0_PKfS2_S2_Pf:
.LFB2070:
	.cfi_startproc
	endbr64
	subq	$248, %rsp
	.cfi_def_cfa_offset 256
	movq	264(%rsp), %rax
	movl	%edi, 76(%rsp)
	leaq	104(%rsp), %rdi
	movl	%esi, 72(%rsp)
	leaq	116(%rsp), %rsi
	movq	%rax, 48(%rsp)
	movq	272(%rsp), %rax
	movl	%edx, 68(%rsp)
	leaq	88(%rsp), %rdx
	movq	%rax, 40(%rsp)
	movq	280(%rsp), %rax
	movl	%ecx, 64(%rsp)
	leaq	96(%rsp), %rcx
	movq	%rax, 32(%rsp)
	movq	288(%rsp), %rax
	movl	%r8d, 60(%rsp)
	movq	%rax, 24(%rsp)
	movq	296(%rsp), %rax
	movl	%r9d, 56(%rsp)
	movq	%rax, 16(%rsp)
	movq	304(%rsp), %rax
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 232(%rsp)
	xorl	%eax, %eax
	leaq	76(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	68(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	60(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	256(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 208(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 216(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 224(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 104(%rsp)
	movl	$1, 112(%rsp)
	movq	%rax, 116(%rsp)
	movl	$1, 124(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L51
	pushq	96(%rsp)
	.cfi_def_cfa_offset 264
	leaq	_Z17felsensteinhelperiiiiiiiPKiS0_PKfS2_S2_Pf(%rip), %rdi
	pushq	96(%rsp)
	.cfi_def_cfa_offset 272
	movq	132(%rsp), %rcx
	movl	140(%rsp), %r8d
	movq	120(%rsp), %rsi
	movl	128(%rsp), %edx
	leaq	144(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 264
	popq	%rdx
	.cfi_def_cfa_offset 256
.L51:
	movq	232(%rsp), %rax
	subq	%fs:40, %rax
	je	.L53
	call	__stack_chk_fail@PLT
.L53:
	addq	$248, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2070:
	.size	_Z59__device_stub__Z17felsensteinhelperiiiiiiiPKiS0_PKfS2_S2_PfiiiiiiiPKiS0_PKfS2_S2_Pf, .-_Z59__device_stub__Z17felsensteinhelperiiiiiiiPKiS0_PKfS2_S2_PfiiiiiiiPKiS0_PKfS2_S2_Pf
	.globl	_Z17felsensteinhelperiiiiiiiPKiS0_PKfS2_S2_Pf
	.type	_Z17felsensteinhelperiiiiiiiPKiS0_PKfS2_S2_Pf, @function
_Z17felsensteinhelperiiiiiiiPKiS0_PKfS2_S2_Pf:
.LFB2071:
	.cfi_startproc
	endbr64
	jmp	_Z59__device_stub__Z17felsensteinhelperiiiiiiiPKiS0_PKfS2_S2_PfiiiiiiiPKiS0_PKfS2_S2_Pf
	.cfi_endproc
.LFE2071:
	.size	_Z17felsensteinhelperiiiiiiiPKiS0_PKfS2_S2_Pf, .-_Z17felsensteinhelperiiiiiiiPKiS0_PKfS2_S2_Pf
	.globl	_Z69__device_stub__Z23felsensteindinucleotideiiiiiiPKiS0_PKfS2_PiPfS4_S4_iiiiiiPKiS0_PKfS2_PiPfS4_S4_
	.type	_Z69__device_stub__Z23felsensteindinucleotideiiiiiiPKiS0_PKfS2_PiPfS4_S4_iiiiiiPKiS0_PKfS2_PiPfS4_S4_, @function
_Z69__device_stub__Z23felsensteindinucleotideiiiiiiPKiS0_PKfS2_PiPfS4_S4_iiiiiiPKiS0_PKfS2_PiPfS4_S4_:
.LFB2072:
	.cfi_startproc
	endbr64
	subq	$264, %rsp
	.cfi_def_cfa_offset 272
	movq	272(%rsp), %rax
	movl	%edi, 92(%rsp)
	leaq	112(%rsp), %rdi
	movl	%esi, 88(%rsp)
	leaq	124(%rsp), %rsi
	movq	%rax, 64(%rsp)
	movq	280(%rsp), %rax
	movl	%edx, 84(%rsp)
	leaq	96(%rsp), %rdx
	movq	%rax, 56(%rsp)
	movq	288(%rsp), %rax
	movl	%ecx, 80(%rsp)
	leaq	104(%rsp), %rcx
	movq	%rax, 48(%rsp)
	movq	296(%rsp), %rax
	movl	%r8d, 76(%rsp)
	movq	%rax, 40(%rsp)
	movq	304(%rsp), %rax
	movl	%r9d, 72(%rsp)
	movq	%rax, 32(%rsp)
	movq	312(%rsp), %rax
	movq	%rax, 24(%rsp)
	movq	320(%rsp), %rax
	movq	%rax, 16(%rsp)
	movq	328(%rsp), %rax
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 248(%rsp)
	xorl	%eax, %eax
	leaq	92(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	88(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	84(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	80(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	76(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 208(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 216(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 224(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 232(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 240(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 112(%rsp)
	movl	$1, 120(%rsp)
	movq	%rax, 124(%rsp)
	movl	$1, 132(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L56
	pushq	104(%rsp)
	.cfi_def_cfa_offset 280
	leaq	_Z23felsensteindinucleotideiiiiiiPKiS0_PKfS2_PiPfS4_S4_(%rip), %rdi
	pushq	104(%rsp)
	.cfi_def_cfa_offset 288
	movq	140(%rsp), %rcx
	movl	148(%rsp), %r8d
	movq	128(%rsp), %rsi
	movl	136(%rsp), %edx
	leaq	152(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 280
	popq	%rdx
	.cfi_def_cfa_offset 272
.L56:
	movq	248(%rsp), %rax
	subq	%fs:40, %rax
	je	.L58
	call	__stack_chk_fail@PLT
.L58:
	addq	$264, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2072:
	.size	_Z69__device_stub__Z23felsensteindinucleotideiiiiiiPKiS0_PKfS2_PiPfS4_S4_iiiiiiPKiS0_PKfS2_PiPfS4_S4_, .-_Z69__device_stub__Z23felsensteindinucleotideiiiiiiPKiS0_PKfS2_PiPfS4_S4_iiiiiiPKiS0_PKfS2_PiPfS4_S4_
	.globl	_Z23felsensteindinucleotideiiiiiiPKiS0_PKfS2_PiPfS4_S4_
	.type	_Z23felsensteindinucleotideiiiiiiPKiS0_PKfS2_PiPfS4_S4_, @function
_Z23felsensteindinucleotideiiiiiiPKiS0_PKfS2_PiPfS4_S4_:
.LFB2073:
	.cfi_startproc
	endbr64
	jmp	_Z69__device_stub__Z23felsensteindinucleotideiiiiiiPKiS0_PKfS2_PiPfS4_S4_iiiiiiPKiS0_PKfS2_PiPfS4_S4_
	.cfi_endproc
.LFE2073:
	.size	_Z23felsensteindinucleotideiiiiiiPKiS0_PKfS2_PiPfS4_S4_, .-_Z23felsensteindinucleotideiiiiiiPKiS0_PKfS2_PiPfS4_S4_
	.globl	_Z33__device_stub__Z8sumfinaliiPfS_S_iiPfS_S_
	.type	_Z33__device_stub__Z8sumfinaliiPfS_S_iiPfS_S_, @function
_Z33__device_stub__Z8sumfinaliiPfS_S_iiPfS_S_:
.LFB2074:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movl	%edi, 28(%rsp)
	leaq	56(%rsp), %rdi
	movl	%esi, 24(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 16(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%r8, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 104(%rsp)
	movq	%rsp, %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L61
	pushq	48(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z8sumfinaliiPfS_S_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 160
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L61:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L63
	call	__stack_chk_fail@PLT
.L63:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2074:
	.size	_Z33__device_stub__Z8sumfinaliiPfS_S_iiPfS_S_, .-_Z33__device_stub__Z8sumfinaliiPfS_S_iiPfS_S_
	.globl	_Z8sumfinaliiPfS_S_
	.type	_Z8sumfinaliiPfS_S_, @function
_Z8sumfinaliiPfS_S_:
.LFB2075:
	.cfi_startproc
	endbr64
	jmp	_Z33__device_stub__Z8sumfinaliiPfS_S_iiPfS_S_
	.cfi_endproc
.LFE2075:
	.size	_Z8sumfinaliiPfS_S_, .-_Z8sumfinaliiPfS_S_
	.globl	_Z41__device_stub__Z13sumcategoriesiiPKfS0_PfiiPKfS0_Pf
	.type	_Z41__device_stub__Z13sumcategoriesiiPKfS0_PfiiPKfS0_Pf, @function
_Z41__device_stub__Z13sumcategoriesiiPKfS0_PfiiPKfS0_Pf:
.LFB2076:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movl	%edi, 28(%rsp)
	leaq	56(%rsp), %rdi
	movl	%esi, 24(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 16(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%r8, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 104(%rsp)
	movq	%rsp, %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L66
	pushq	48(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z13sumcategoriesiiPKfS0_Pf(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 160
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L66:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L68
	call	__stack_chk_fail@PLT
.L68:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2076:
	.size	_Z41__device_stub__Z13sumcategoriesiiPKfS0_PfiiPKfS0_Pf, .-_Z41__device_stub__Z13sumcategoriesiiPKfS0_PfiiPKfS0_Pf
	.globl	_Z13sumcategoriesiiPKfS0_Pf
	.type	_Z13sumcategoriesiiPKfS0_Pf, @function
_Z13sumcategoriesiiPKfS0_Pf:
.LFB2077:
	.cfi_startproc
	endbr64
	jmp	_Z41__device_stub__Z13sumcategoriesiiPKfS0_PfiiPKfS0_Pf
	.cfi_endproc
.LFE2077:
	.size	_Z13sumcategoriesiiPKfS0_Pf, .-_Z13sumcategoriesiiPKfS0_Pf
	.globl	_Z54__device_stub__Z15felsensteinfastiiiiPKiS0_PKfS2_PfS3_iiiiPKiS0_PKfS2_PfS3_
	.type	_Z54__device_stub__Z15felsensteinfastiiiiPKiS0_PKfS2_PfS3_iiiiPKiS0_PKfS2_PfS3_, @function
_Z54__device_stub__Z15felsensteinfastiiiiPKiS0_PKfS2_PfS3_iiiiPKiS0_PKfS2_PfS3_:
.LFB2078:
	.cfi_startproc
	endbr64
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movq	208(%rsp), %rax
	movl	%edi, 60(%rsp)
	leaq	80(%rsp), %rdi
	movl	%esi, 56(%rsp)
	leaq	92(%rsp), %rsi
	movq	%rax, 24(%rsp)
	movq	216(%rsp), %rax
	movl	%edx, 52(%rsp)
	leaq	64(%rsp), %rdx
	movq	%rax, 16(%rsp)
	movq	224(%rsp), %rax
	movl	%ecx, 48(%rsp)
	leaq	72(%rsp), %rcx
	movq	%rax, 8(%rsp)
	movq	232(%rsp), %rax
	movq	%r8, 40(%rsp)
	movq	%r9, 32(%rsp)
	movq	%rax, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	60(%rsp), %rax
	movl	$1, 88(%rsp)
	movq	%rax, 104(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	52(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 168(%rsp)
	movq	%rsp, %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 80(%rsp)
	movq	%rax, 92(%rsp)
	movl	$1, 100(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L71
	pushq	72(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_Z15felsensteinfastiiiiPKiS0_PKfS2_PfS3_(%rip), %rdi
	pushq	72(%rsp)
	.cfi_def_cfa_offset 224
	movq	108(%rsp), %rcx
	movl	116(%rsp), %r8d
	movq	96(%rsp), %rsi
	movl	104(%rsp), %edx
	leaq	120(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L71:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L73
	call	__stack_chk_fail@PLT
.L73:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2078:
	.size	_Z54__device_stub__Z15felsensteinfastiiiiPKiS0_PKfS2_PfS3_iiiiPKiS0_PKfS2_PfS3_, .-_Z54__device_stub__Z15felsensteinfastiiiiPKiS0_PKfS2_PfS3_iiiiPKiS0_PKfS2_PfS3_
	.globl	_Z15felsensteinfastiiiiPKiS0_PKfS2_PfS3_
	.type	_Z15felsensteinfastiiiiPKiS0_PKfS2_PfS3_, @function
_Z15felsensteinfastiiiiPKiS0_PKfS2_PfS3_:
.LFB2079:
	.cfi_startproc
	endbr64
	jmp	_Z54__device_stub__Z15felsensteinfastiiiiPKiS0_PKfS2_PfS3_iiiiPKiS0_PKfS2_PfS3_
	.cfi_endproc
.LFE2079:
	.size	_Z15felsensteinfastiiiiPKiS0_PKfS2_PfS3_, .-_Z15felsensteinfastiiiiPKiS0_PKfS2_PfS3_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z15felsensteinfastiiiiPKiS0_PKfS2_PfS3_"
.LC1:
	.string	"_Z13sumcategoriesiiPKfS0_Pf"
.LC2:
	.string	"_Z8sumfinaliiPfS_S_"
.LC3:
	.string	"_Z23felsensteindinucleotideiiiiiiPKiS0_PKfS2_PiPfS4_S4_"
.LC4:
	.string	"_Z17felsensteinhelperiiiiiiiPKiS0_PKfS2_S2_Pf"
.LC5:
	.string	"_Z7sumcatsiiPfS_S_"
.LC6:
	.string	"_Z14sumfinalpairediiiPfS_S_"
.LC7:
	.string	"_Z25felsensteinhelper16pairediiiiiiiiiPKiS0_PKfS2_S2_Pf"
.LC8:
	.string	"_Z25felsensteinleaves16pairediiiPKiS0_PfS1_"
.LC9:
	.string	"_Z19felsensteinhelper16iiiiiiPKiS0_PKfS2_S2_Pf"
.LC10:
	.string	"_Z12logsumexparrifPffS_"
.LC11:
	.string	"_Z8storearrifPfS_"
.LC12:
	.string	"_Z19felsensteinleaves16iiPKiS0_PfS1_"
.LC13:
	.string	"_Z17felsensteinleavesiiiPKiS0_PfS1_"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2081:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z15felsensteinfastiiiiPKiS0_PKfS2_PfS3_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC1(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z13sumcategoriesiiPKfS0_Pf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC2(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z8sumfinaliiPfS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC3(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z23felsensteindinucleotideiiiiiiPKiS0_PKfS2_PiPfS4_S4_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC4(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z17felsensteinhelperiiiiiiiPKiS0_PKfS2_S2_Pf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC5(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z7sumcatsiiPfS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC6(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z14sumfinalpairediiiPfS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC7(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z25felsensteinhelper16pairediiiiiiiiiPKiS0_PKfS2_S2_Pf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	leaq	.LC8(%rip), %rdx
	pushq	$0
	.cfi_def_cfa_offset 24
	movq	%rdx, %rcx
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	_Z25felsensteinleaves16pairediiiPKiS0_PfS1_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC9(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z19felsensteinhelper16iiiiiiPKiS0_PKfS2_S2_Pf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC10(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z12logsumexparrifPffS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC11(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z8storearrifPfS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC12(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z19felsensteinleaves16iiPKiS0_PfS1_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC13(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z17felsensteinleavesiiiPKiS0_PfS1_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2081:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <time.h>

__device__ float logsumexp(float a, float b)
{
	if(a > b)
	{
		return a + log(1.0+exp(b-a));
	}
	else
	{
		return b + log(1.0+exp(a-b));
	}
}

/*
__global__ void felsensteinfast(const int alphabet, const int numcols, const int numnodes, const int startnode, const int* left, const int* right, const float* transprobs, const float* freqs, float* data, float* collogliks)
{
	__shared__ float liks [8192];
	__shared__ int indices[512];
	__shared__ int revindices[512];
	__shared__ int index = 0;
	for(int i = 0 ; i < 512 ; i++)
	{
		indices[i] = -1;
		revindices[i] = -1;
	}
	__syncthreads();

	int col = blockIdx.x*blockDim.x + threadIdx.x; // column
	int nodeindex = 0;
	int lindex = 0;
	int rindex = 0;
	int leftindex = 0;
	int rightindex = 0;
	float m = 0.0;
	float bsum = 0.0;
	float csum = 0.0;
	float v = 0.0;
	int alphabetplus1 = alphabet+1;
	
	if(col < numcols)
	{		
		for(int node = startnode ; node < numnodes ; node += 1) // post-order tree traversal, calculate starting at tips and ending at root. 
		{	
			nodeindex = threadIdx.x*numnodes*alphabetplus1 + node*alphabetplus1;	
			lindex = left[node]; // left child
			rindex = right[node]; // right child				
			leftindex = threadIdx.x*numnodes*alphabetplus1 + lindex*alphabetplus1;
			rightindex = threadIdx.x*numnodes*alphabetplus1 + rindex*alphabetplus1;
			m = 0.0;
			int li = indices[leftindex];
			if(li == -1)
			{
				for(int a = 0 ; a < alphabet ; a++)
				{
					liks[index*al
				}
				index++;
			}
			int ri = indices[rightindex];

			for(int a = 0 ; a < alphabet ; a++)
			{
				bsum = 0.0;
				csum = 0.0;								
				for(int d = 0 ; d < alphabet ; d++)
				{
					bsum += transprobs[lindex*alphabet*alphabet + a*alphabet + d]*liks[leftindex+d];
					csum += transprobs[rindex*alphabet*alphabet + a*alphabet + d]*liks[rightindex+d];
				}
				v = bsum*csum;
				liks[nodeindex+a] = v;
				if(v > m)
				{
					m = v;	
				}				
			}

			for(int a = 0 ; a < alphabet ; a++)
			{
				liks[nodeindex+a] /= m;
			}				
			liks[nodeindex+alphabet] = log(m) + liks[leftindex+alphabet] + liks[rightindex+alphabet];
		}
	
		float logm = liks[threadIdx.x*numnodes*alphabetplus1 + (numnodes-1)*alphabetplus1 + alphabet];		
		collogliks[col] = 0.0;
		for(int a = 0 ; a < alphabet ; a++)
		{
			collogliks[col] += freqs[a]*liks[threadIdx.x*numnodes*alphabetplus1 + (numnodes-1)*alphabetplus1 + a]; 
		}
		collogliks[col] = log(collogliks[col]) + logm;
	}
}*/

__global__ void felsensteinleaves(const int alphabet, const int numcols, const int numpairs, const int* x, const int* y, float* data, float* res)
{
	int alphabetplus1 = alphabet+1;
	int a = 0;
	int e = 0;
	int f = 0;
	int thread = blockIdx.x*blockDim.x + threadIdx.x;
	if (thread < numpairs)
	{
		for(a = 0 ; a < alphabet ; a++)
		{
			e = a / 4;
			f = a % 4;
			res[thread*alphabetplus1+a] = data[x[thread]*4 + e]*data[y[thread]*4 + f];
		}
		res[thread*alphabetplus1+alphabet] = 0.0;
	}
}

__global__ void felsensteinleaves16(const int numcols, const int numpairs, const int* x, const int* y, float* data, float* res)
{
	int a = 0;
	int thread = blockIdx.x*blockDim.x + threadIdx.x;
	int startcol = 0;
	if (thread < numpairs)
	{
		int xindex = x[thread]*4;
		int yindex = y[thread]*4;
		#pragma unroll
		for(a = 0 ; a < 16 ; a++)
		{
			res[thread*17+a] = data[xindex + (a / 4)]*data[yindex + (a % 4)];
		}
		res[thread*17+16] = 0.0;
	}
}

__global__ void storearr(const int numpairs, const float logw, float* dest, float* src)
{
	int thread = blockIdx.x*blockDim.x + threadIdx.x;
	if (thread < numpairs)
	{
		dest[thread] = logw+src[thread];
	}
}

__global__ void logsumexparr(const int numpairs, const float logw1, float* dest, const float logw2, float* src)
{
	int thread = blockIdx.x*blockDim.x + threadIdx.x;
	if (thread < numpairs)
	{
		dest[thread] = logsumexp(logw1+dest[thread], logw2+src[thread]);
	}
}

__global__ void felsensteinhelper16(const int numcols, const int numpairs, const int numnodes, const int node, const int lindex, const int rindex, const int* leftindices, const int* rightindices, const float* transprobs, const float* left, const float* right, float* res)
{
	float m = 0.0;
	int thread = blockIdx.x*blockDim.x + threadIdx.x;
	float bsum = 0.0;
	float csum = 0.0;
	int lefttransstride = lindex*16*16;
	int lefttrans = 0;
	int righttransstride = rindex*16*16;
	int righttrans = 0;
	float v = 0.0;
	int a = 0;
	int d = 0;	
	int leftindex = leftindices[thread]*17;
	int rightindex = rightindices[thread]*17;
	int nodeindex = thread*17;
	if (thread < numpairs)
	{
		#pragma unroll
		for(a = 0 ; a < 16 ; a++)
		{
			bsum = 0.0;
			csum = 0.0;	
			lefttrans = lefttransstride + a*16;							
			righttrans = righttransstride + a*16;

			#pragma unroll
			for(d = 0 ; d < 16 ; d++)
			{
				bsum += transprobs[lefttrans+d]*left[leftindex+d];
				csum += transprobs[righttrans+d]*right[rightindex+d];
			}
			v = bsum*csum;
			res[nodeindex+a] = v;
			if(v > m)
			{
				m = v;	
			}						
		}
	
		#pragma unroll
		for(a = 0 ; a < 16 ; a++)
		{
			res[nodeindex+a] /= m;
		}
		res[nodeindex+16] = log(m) + left[leftindex+16] + right[rightindex+16];			
	}
}

__global__ void felsensteinleaves16paired(const int numcols, int numratecats, const int numpairs, const int* x, const int* y, float* data, float* res)
{
	int a = 0;
	int thread = blockIdx.x*blockDim.x + threadIdx.x;
	int pair = thread % numpairs;
	if (thread < numratecats*numpairs)
	{
		int xindex = x[pair]*4;
		int yindex = y[pair]*4;
		#pragma unroll
		for(a = 0 ; a < 16 ; a++)
		{
			res[thread*17+a] = data[xindex + (a / 4)]*data[yindex + (a % 4)];
		}
		res[thread*17+16] = 0.0;
	}
}

__global__ void felsensteinhelper16paired(const int numcols, int numratecats, const int numpairs, const int leftnumpairs, const int rightnumpairs, const int numnodes, const int node, const int lindex, const int rindex, const int* leftindices, const int* rightindices, const float* transprobs, const float* left, const float* right, float* res)
{
	float m = 0.0;
	int thread = blockIdx.x*blockDim.x + threadIdx.x;
	float bsum = 0.0;
	float csum = 0.0;	
	int lefttrans = 0;
	int righttrans = 0;
	float v = 0.0;
	int a = 0;
	int d = 0;	
	int ratecat = thread / numpairs;
	int pair = thread % numpairs;
	int leftindex = ratecat*leftnumpairs*17 + leftindices[pair]*17;
	int rightindex = ratecat*rightnumpairs*17 + rightindices[pair]*17;
	int nodeindex = thread*17;
	int lefttranstride = ratecat*numnodes*16*16 + lindex*16*16;
	int righttranstride = ratecat*numnodes*16*16 + rindex*16*16;

	if (thread < numratecats*numpairs)
	{
		#pragma unroll
		for(a = 0 ; a < 16 ; a++)
		{			
			lefttrans =  lefttranstride + a*16;							
			righttrans = righttranstride + a*16;

			bsum = 0.0;
			csum = 0.0;
			#pragma unroll
			for(d = 0 ; d < 16 ; d++)
			{
				bsum += transprobs[lefttrans+d]*left[leftindex+d];
				csum += transprobs[righttrans+d]*right[rightindex+d];
			}
			v = bsum*csum;
			res[nodeindex+a] = v;
			if(v > m)
			{
				m = v;	
			}						
		}
	
		#pragma unroll
		for(a = 0 ; a < 16 ; a++)
		{
			res[nodeindex+a] /= m;
		}
		res[nodeindex+16] = log(m) + left[leftindex+16] + right[rightindex+16];			
	}
}

__global__ void sumfinalpaired(const int alphabet, const int numratecats, const int numpairs, float* freqs, float* rootliks, float* finallogliks)
{
	int alphabetplus1 = alphabet+1;
	int thread = blockIdx.x*blockDim.x + threadIdx.x; // column
	int freqindex = (thread / numpairs)*alphabet;
	int a = 0;
	if(thread < numratecats*numpairs)
	{
		finallogliks[thread] = 0.0;
		for(a = 0 ; a < alphabet ; a++)
		{
			finallogliks[thread] += freqs[freqindex+a]*rootliks[thread*alphabetplus1+a];
		}
		finallogliks[thread] = log(finallogliks[thread]) + rootliks[thread*alphabetplus1+alphabet];
	}
}

__global__ void sumcats(const int numratecats, const int numpairs, float* logweights, float* logliks, float* logfinalliks)
{
	int thread = blockIdx.x*blockDim.x + threadIdx.x; // column
	if(thread < numpairs)
	{
		logfinalliks[thread] = logweights[0] + logliks[0*numpairs + thread];
		for(int r = 1 ; r < numratecats ; r++)
		{
			logfinalliks[thread] = logsumexp(logfinalliks[thread], logweights[r] + logliks[r*numpairs + thread]);
		}		
	}
}

__global__ void felsensteinhelper(const int alphabet, const int numcols, const int numpairs, const int numnodes, const int node, const int lindex, const int rindex, const int* leftindices, const int* rightindices, const float* transprobs, const float* left, const float* right, float* res)
{
	int alphabetplus1 = alphabet+1;
	float m = 0.0;
	int thread = blockIdx.x*blockDim.x + threadIdx.x;
	float bsum = 0.0;
	float csum = 0.0;
	int lefttrans = 0;
	int righttrans = 0;
	float v = 0.0;
	int a = 0;
	int d = 0;	
	int leftindex = 0;
	int rightindex = 0;
	int nodeindex = 0;
	if (thread < numpairs)
	{
		leftindex = leftindices[thread]*alphabetplus1;
		rightindex = rightindices[thread]*alphabetplus1;
		nodeindex = thread*alphabetplus1;
		for(a = 0 ; a < alphabet ; a++)
		{
			bsum = 0.0;
			csum = 0.0;	
			lefttrans = lindex*alphabet*alphabet + a*alphabet;							
			righttrans = rindex*alphabet*alphabet + a*alphabet;
			for(d = 0 ; d < alphabet ; d++)
			{
				bsum += transprobs[lefttrans+d]*left[leftindex+d];
				csum += transprobs[righttrans+d]*right[rightindex+d];
			}
			v = bsum*csum;
			res[nodeindex+a] = v;
			if(v > m)
			{
				m = v;	
			}						
		}
	
		for(a = 0 ; a < alphabet ; a++)
		{
			res[nodeindex+a] /= m;
		}
		res[nodeindex+alphabet] = log(m) + left[leftindex+alphabet] + right[rightindex+alphabet];			
	}
}

__global__ void felsensteindinucleotide(const int alphabet, const int numcols, const int numcategories, const int numpairs, const int numnodes, const int numleaves, const int* left, const int* right, const float* transprobs, const float* freqs, int* pairs, float* data, float* liks, float* collogliks)
{
	int thread = blockIdx.x*blockDim.x + threadIdx.x;	
	int nodeindex = 0;
	int lindex = 0;
	int rindex = 0;
	int leftindex = 0;
	int rightindex = 0;
	float m = 0.0;
	float bsum = 0.0;
	float csum = 0.0;
	float v = 0.0;
	int alphabetplus1 = alphabet+1;
	int node = 0;
	int a = 0;
	int e = 0;
	int f = 0;
	if(thread < numpairs*numcategories)
	{		
		int cat = thread / numpairs;
		int col = thread % numpairs;
		int pair = pairs[col];				
		int col1 = pair / numcols;
		int col2 = pair % numcols;
		int stride = cat*numpairs*numnodes*alphabetplus1 + col*numnodes*alphabetplus1;
		for(node = 0 ; node < numleaves ; node += 1)
		{
			nodeindex = stride + node*alphabetplus1;	
			for(a = 0 ; a < alphabet ; a++)
			{
				e = a / 4;
				f = a % 4;
				liks[nodeindex+a] = data[node*numcols*4 + col1*4 + e]*data[node*numcols*4 + col2*4+f];
			}
			liks[nodeindex+alphabet] = 0.0;
		}
		int stridetrans = cat*numnodes*alphabet*alphabet;
		for(node = numleaves ; node < numnodes ; node += 1)
		{	
			nodeindex = stride + node*alphabetplus1;
			lindex = left[node];
			rindex = right[node];					
			leftindex = stride + lindex*alphabetplus1;
			rightindex = stride + rindex*alphabetplus1;
			m = 0.0;				
			for(a = 0 ; a < alphabet ; a++)
			{
				bsum = 0.0;
				csum = 0.0;								
				for(int d = 0 ; d < alphabet ; d++)
				{
					bsum += transprobs[stridetrans + lindex*alphabet*alphabet + a*alphabet + d]*liks[leftindex+d];
					csum += transprobs[stridetrans + rindex*alphabet*alphabet + a*alphabet + d]*liks[rightindex+d];
				}
				v = bsum*csum;
				liks[nodeindex+a] = v;
				if(v > m)
				{
					m = v;	
				}				
			}

			for(a = 0 ; a < alphabet ; a++)
			{
				liks[nodeindex+a] /= m;
			}				
			liks[nodeindex+alphabet] = log(m) + liks[leftindex+alphabet] + liks[rightindex+alphabet];
		}

		float logm = liks[stride + (numnodes-1)*alphabetplus1 + alphabet];		
		collogliks[thread] = 0.0;
		for(a = 0 ; a < alphabet ; a++)
		{
			collogliks[thread] += freqs[cat*alphabet+a]*liks[stride + (numnodes-1)*alphabetplus1 + a]; 
		}
		collogliks[thread] = log(collogliks[thread]) + logm;
	}
}

__global__ void sumfinal(const int alphabet, const int numpairs, float* freqs, float* rootliks, float* finallogliks)
{
	int alphabetplus1 = alphabet+1;
	int thread = blockIdx.x*blockDim.x + threadIdx.x; // column
	int a = 0;
	if(thread < numpairs)
	{
		finallogliks[thread] = 0.0;
		for(a = 0 ; a < alphabet ; a++)
		{
			finallogliks[thread] += freqs[a]*rootliks[thread*alphabetplus1+a];
		}
		finallogliks[thread] = log(finallogliks[thread]) + rootliks[thread*alphabetplus1+alphabet];
	}
}

__global__ void sumcategories(const int numcategories, const int numcols, const float* catlogprobs, const float* collogliks, float* finallogliks)
{
	int col = blockIdx.x*blockDim.x + threadIdx.x; // column
	if(col < numcols)
	{
		finallogliks[col] = catlogprobs[0] + collogliks[col];
		for(int cat = 1 ; cat < numcategories ; cat++)
		{
			finallogliks[col] = logsumexp(finallogliks[col], catlogprobs[cat] + collogliks[cat*numcols + col]);
		}
	}
}


__global__ void felsensteinfast(const int alphabet, const int numcols, const int numnodes, const int startnode, const int* left, const int* right, const float* transprobs, const float* freqs, float* liks, float* collogliks)
{
	int col = blockIdx.x*blockDim.x + threadIdx.x; // column
	int nodeindex = 0;
	int lindex = 0;
	int rindex = 0;
	int leftindex = 0;
	int rightindex = 0;
	float m = 0.0;
	float bsum = 0.0;
	float csum = 0.0;
	float v = 0.0;
	int alphabetplus1 = alphabet+1;
	if(col < numcols)
	{
		for(int node = startnode ; node < numnodes ; node += 1) // post-order tree traversal, calculate starting at tips and ending at root. 
		{	
			nodeindex = col*numnodes*alphabetplus1 + node*alphabetplus1;	
			lindex = left[node]; // left child
			rindex = right[node]; // right child					
			leftindex = col*numnodes*alphabetplus1 + lindex*alphabetplus1;
			rightindex = col*numnodes*alphabetplus1 + rindex*alphabetplus1;
			m = 0.0;
			for(int a = 0 ; a < alphabet ; a++)
			{
				bsum = 0.0;
				csum = 0.0;								
				for(int d = 0 ; d < alphabet ; d++)
				{
					bsum += transprobs[lindex*alphabet*alphabet + a*alphabet + d]*liks[leftindex+d];
					csum += transprobs[rindex*alphabet*alphabet + a*alphabet + d]*liks[rightindex+d];
				}
				v = bsum*csum;
				liks[nodeindex+a] = v;
				if(v > m)
				{
					m = v;	
				}				
			}

			for(int a = 0 ; a < alphabet ; a++)
			{
				liks[nodeindex+a] /= m;
			}				
			liks[nodeindex+alphabet] = log(m) + liks[leftindex+alphabet] + liks[rightindex+alphabet];
		}
	
		float logm = liks[(col*numnodes*alphabetplus1) + (numnodes-1)*alphabetplus1 + alphabet];		
		collogliks[col] = 0.0;
		for(int a = 0 ; a < alphabet ; a++)
		{
			collogliks[col] += freqs[a]*liks[(col*numnodes*alphabetplus1) + (numnodes-1)*alphabetplus1 + a]; 
		}
		collogliks[col] = log(collogliks[col]) + logm;
	}
}

/*
__global__ void felsenstein(int numcols, int numnodes, int* left, int* right, float* logtransprobs, float* logfreqs, float* logliks, float* collogliks)
{
	int col = blockIdx.x*blockDim.x + threadIdx.x; // column
	if(col < numcols)
	{
		for(int node = 0 ; node < numnodes ; node += 1) // post-order tree traversal, calculate starting at tips and ending at root. 
		{	
			int lognodeindex = col*numnodes*alphabet + node*alphabet;	
			int lindex = left[node]; // left child
			int rindex = right[node]; // right child
			if(lindex == -1 && rindex == -1) // if 'node' is leaf node
			{

			}
			else // if 'node' is internal node
			{			
				int logleftindex = col*numnodes*alphabet + lindex*alphabet;
				int logrightindex = col*numnodes*alphabet + rindex*alphabet;
				for(int a = 0 ; a < alphabet ; a++)
				{
					float bsum = -1e10;
					float csum = -1e10;								
					for(int d = 0 ; d < alphabet ; d++)
					{
						int transindex = node*alphabet*alphabet + a*alphabet + d;
						float logtransprob = logtransprobs[transindex]; // transition probability
						bsum = logsumexp(bsum, logtransprob+logliks[logleftindex+d]);
						csum = logsumexp(csum, logtransprob+logliks[logrightindex+d]);
					}
					logliks[lognodeindex+a] = bsum+csum;
				}
			}
		}
	
		collogliks[col] = -1e10;
		for(int a = 0 ; a < alphabet ; a++)
		{
			collogliks[col] = logsumexp(collogliks[col], logfreqs[a] + logliks[col*numnodes*alphabet + (numnodes-1)*alphabet + a]); 
		}
	}
}

float randfloat()
{
	return ((float)rand()/(float)(RAND_MAX)) * 1.0;
}

int main(void)
{
	int code = 0;

	int numcols = 10000;
	int numnodes = 250;
	
	int *left, *right, *d_left, *d_right;
	left = (int*)malloc(numnodes*sizeof(int));
	right = (int*)malloc(numnodes*sizeof(int));
	for(int node = 0 ; node < numnodes ; node += 1)
	{
		//left[node] = rand() % numnodes;
		//right[node] = rand() % numnodes;
	}
	code = cudaMalloc(&d_left, numnodes*sizeof(int));
	printf("A %d\n", code);
	code = cudaMalloc(&d_right, numnodes*sizeof(int));
	printf("B %d\n", code);
 	code = cudaMemcpy(d_left, left, numnodes*sizeof(int), cudaMemcpyHostToDevice);
	printf("C %d\n", code);
	code = cudaMemcpy(d_right, right, numnodes*sizeof(int), cudaMemcpyHostToDevice);
	printf("D %d\n", code);

	float *logtransprobs, *d_logtransprobs;
	logtransprobs = (float*)malloc(numnodes*alphabet*alphabet*sizeof(float));
	for(int node = 0 ; node < numnodes ; node += 1)
	{
		for(int a = 0 ; a < alphabet ; a++)
		{
			float sum = 0.0;
			for(int b = 0 ; b < alphabet ; b++)
			{
				logtransprobs[node*alphabet*alphabet+a*alphabet+b] = randfloat();
				sum += logtransprobs[node*alphabet*alphabet+a*alphabet+b];
			}
			for(int b = 0 ; b < alphabet ; b++)
			{
				logtransprobs[node*alphabet*alphabet+a*alphabet+b] = log(logtransprobs[node*alphabet*alphabet+a*alphabet+b]/sum);
			}
			
		}
	}

	float *logfreqs, *d_logfreqs;
	logfreqs = (float*)malloc(alphabet*sizeof(float));
	for(int a = 0 ; a < alphabet ; a++)
	{
		logfreqs[a] = log(randfloat()); 
	}
	cudaMalloc(&d_logfreqs, alphabet*sizeof(float));
	cudaMemcpy(d_logfreqs, logfreqs, alphabet*sizeof(float), cudaMemcpyHostToDevice);

	code = cudaMalloc(&d_logtransprobs, numnodes*alphabet*alphabet*sizeof(float));
	printf("E %d\n", code);
	code = cudaMemcpy(d_logtransprobs, logtransprobs, numnodes*alphabet*alphabet*sizeof(float), cudaMemcpyHostToDevice);
	printf("F %d\n", code);
	
	float *logliks, *d_logliks;
	logliks = (float*)malloc(numcols*numnodes*alphabet*sizeof(float));
	for(int col = 0 ; col < numcols ; col += 1)
	{
		for(int node = 0 ; node < numnodes ; node += 1)
		{
			int lognodeindex = col*numnodes*alphabet + node*alphabet;
			for(int a = 0 ; a < alphabet ; a += 1) 
			{
				logliks[lognodeindex+a] = -1e10;
			}
			logliks[lognodeindex + (rand() % alphabet)] = 0.0;
		}
	}
	cudaMalloc(&d_logliks, numcols*numnodes*alphabet*sizeof(float));
	cudaMemcpy(d_logliks, logliks, numcols*numnodes*alphabet*sizeof(float), cudaMemcpyHostToDevice);

	float *collogliks, *d_collogliks;
	collogliks = (float*)malloc(numcols*sizeof(float));
	for(int col = 0 ; col < numcols ; col++)
	{
		collogliks[col] = 20.0;
	}
	cudaMalloc(&d_collogliks, numcols*sizeof(float));
	cudaMemcpy(d_collogliks, collogliks, numcols*sizeof(float), cudaMemcpyHostToDevice);
	felsenstein<<<(numcols+255)/256, 256>>>(numcols, numnodes, d_left, d_right, d_logtransprobs, d_logfreqs, d_logliks, d_collogliks);
	code = cudaMemcpy(collogliks,  d_collogliks, numcols*sizeof(float), cudaMemcpyDeviceToHost);
	printf("finished %d\n", code);
	
	for(int col = 0 ; col < numcols ; col++)
	{
		printf("%d\t%lf\n",col,collogliks[col]);
	}
	

	cudaFree(d_left);
	cudaFree(d_right);
	cudaFree(d_logtransprobs);
	cudaFree(d_logliks);
	cudaFree(d_collogliks);
	free(left);
	free(right);
	free(logtransprobs);
	free(logliks);
	free(collogliks);
	return 0;
}*/

	.text
	.file	"felsenstein.hip"
	.globl	_Z32__device_stub__felsensteinleavesiiiPKiS0_PfS1_ # -- Begin function _Z32__device_stub__felsensteinleavesiiiPKiS0_PfS1_
	.type	_Z32__device_stub__felsensteinleavesiiiPKiS0_PfS1_,@function
_Z32__device_stub__felsensteinleavesiiiPKiS0_PfS1_: # @_Z32__device_stub__felsensteinleavesiiiPKiS0_PfS1_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	20(%rsp), %rax
	movl	%edi, (%rax)
	leaq	16(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	56(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	48(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	40(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17felsensteinleavesiiiPKiS0_PfS1_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z32__device_stub__felsensteinleavesiiiPKiS0_PfS1_, .Lfunc_end0-_Z32__device_stub__felsensteinleavesiiiPKiS0_PfS1_
	.cfi_endproc
                                        # -- End function
	.globl	_Z34__device_stub__felsensteinleaves16iiPKiS0_PfS1_ # -- Begin function _Z34__device_stub__felsensteinleaves16iiPKiS0_PfS1_
	.type	_Z34__device_stub__felsensteinleaves16iiPKiS0_PfS1_,@function
_Z34__device_stub__felsensteinleaves16iiPKiS0_PfS1_: # @_Z34__device_stub__felsensteinleaves16iiPKiS0_PfS1_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	8(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	56(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	48(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	40(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	32(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z19felsensteinleaves16iiPKiS0_PfS1_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z34__device_stub__felsensteinleaves16iiPKiS0_PfS1_, .Lfunc_end1-_Z34__device_stub__felsensteinleaves16iiPKiS0_PfS1_
	.cfi_endproc
                                        # -- End function
	.globl	_Z23__device_stub__storearrifPfS_ # -- Begin function _Z23__device_stub__storearrifPfS_
	.type	_Z23__device_stub__storearrifPfS_,@function
_Z23__device_stub__storearrifPfS_:      # @_Z23__device_stub__storearrifPfS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	8(%rsp), %rcx
	movss	%xmm0, (%rcx)
	leaq	40(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	32(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rdi, 16(%rbx)
	movq	%rsi, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8storearrifPfS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z23__device_stub__storearrifPfS_, .Lfunc_end2-_Z23__device_stub__storearrifPfS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__logsumexparrifPffS_ # -- Begin function _Z27__device_stub__logsumexparrifPffS_
	.type	_Z27__device_stub__logsumexparrifPffS_,@function
_Z27__device_stub__logsumexparrifPffS_: # @_Z27__device_stub__logsumexparrifPffS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	8(%rsp), %rcx
	movss	%xmm0, (%rcx)
	leaq	40(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	4(%rsp), %rsi
	movss	%xmm1, (%rsi)
	leaq	32(%rsp), %r8
	movq	%rdx, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rdi, 16(%rbx)
	movq	%rsi, 24(%rbx)
	movq	%r8, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12logsumexparrifPffS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z27__device_stub__logsumexparrifPffS_, .Lfunc_end3-_Z27__device_stub__logsumexparrifPffS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z34__device_stub__felsensteinhelper16iiiiiiPKiS0_PKfS2_S2_Pf # -- Begin function _Z34__device_stub__felsensteinhelper16iiiiiiPKiS0_PKfS2_S2_Pf
	.type	_Z34__device_stub__felsensteinhelper16iiiiiiPKiS0_PKfS2_S2_Pf,@function
_Z34__device_stub__felsensteinhelper16iiiiiiPKiS0_PKfS2_S2_Pf: # @_Z34__device_stub__felsensteinhelper16iiiiiiPKiS0_PKfS2_S2_Pf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	28(%rsp), %rax
	movl	%edi, (%rax)
	leaq	24(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	20(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	16(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	232(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	248(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	256(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	264(%rsp), %rax
	movq	%rax, 88(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	40(%rsp), %r12
	leaq	32(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z19felsensteinhelper16iiiiiiPKiS0_PKfS2_S2_Pf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$192, %rsp
	.cfi_adjust_cfa_offset -192
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z34__device_stub__felsensteinhelper16iiiiiiPKiS0_PKfS2_S2_Pf, .Lfunc_end4-_Z34__device_stub__felsensteinhelper16iiiiiiPKiS0_PKfS2_S2_Pf
	.cfi_endproc
                                        # -- End function
	.globl	_Z40__device_stub__felsensteinleaves16pairediiiPKiS0_PfS1_ # -- Begin function _Z40__device_stub__felsensteinleaves16pairediiiPKiS0_PfS1_
	.type	_Z40__device_stub__felsensteinleaves16pairediiiPKiS0_PfS1_,@function
_Z40__device_stub__felsensteinleaves16pairediiiPKiS0_PfS1_: # @_Z40__device_stub__felsensteinleaves16pairediiiPKiS0_PfS1_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	20(%rsp), %rax
	movl	%edi, (%rax)
	leaq	16(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	56(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	48(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	40(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z25felsensteinleaves16pairediiiPKiS0_PfS1_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z40__device_stub__felsensteinleaves16pairediiiPKiS0_PfS1_, .Lfunc_end5-_Z40__device_stub__felsensteinleaves16pairediiiPKiS0_PfS1_
	.cfi_endproc
                                        # -- End function
	.globl	_Z40__device_stub__felsensteinhelper16pairediiiiiiiiiPKiS0_PKfS2_S2_Pf # -- Begin function _Z40__device_stub__felsensteinhelper16pairediiiiiiiiiPKiS0_PKfS2_S2_Pf
	.type	_Z40__device_stub__felsensteinhelper16pairediiiiiiiiiPKiS0_PKfS2_S2_Pf,@function
_Z40__device_stub__felsensteinhelper16pairediiiiiiiiiPKiS0_PKfS2_S2_Pf: # @_Z40__device_stub__felsensteinhelper16pairediiiiiiiiiPKiS0_PKfS2_S2_Pf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$208, %rsp
	.cfi_def_cfa_offset 256
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	28(%rsp), %rax
	movl	%edi, (%rax)
	leaq	24(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	20(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	16(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	256(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	264(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	272(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	280(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	288(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	296(%rsp), %rax
	movq	%rax, 88(%rbx)
	leaq	304(%rsp), %rax
	movq	%rax, 96(%rbx)
	leaq	312(%rsp), %rax
	movq	%rax, 104(%rbx)
	leaq	320(%rsp), %rax
	movq	%rax, 112(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	40(%rsp), %r12
	leaq	32(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z25felsensteinhelper16pairediiiiiiiiiPKiS0_PKfS2_S2_Pf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$224, %rsp
	.cfi_adjust_cfa_offset -224
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z40__device_stub__felsensteinhelper16pairediiiiiiiiiPKiS0_PKfS2_S2_Pf, .Lfunc_end6-_Z40__device_stub__felsensteinhelper16pairediiiiiiiiiPKiS0_PKfS2_S2_Pf
	.cfi_endproc
                                        # -- End function
	.globl	_Z29__device_stub__sumfinalpairediiiPfS_S_ # -- Begin function _Z29__device_stub__sumfinalpairediiiPfS_S_
	.type	_Z29__device_stub__sumfinalpairediiiPfS_S_,@function
_Z29__device_stub__sumfinalpairediiiPfS_S_: # @_Z29__device_stub__sumfinalpairediiiPfS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	20(%rsp), %rax
	movl	%edi, (%rax)
	leaq	16(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	56(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	48(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	40(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14sumfinalpairediiiPfS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	_Z29__device_stub__sumfinalpairediiiPfS_S_, .Lfunc_end7-_Z29__device_stub__sumfinalpairediiiPfS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z22__device_stub__sumcatsiiPfS_S_ # -- Begin function _Z22__device_stub__sumcatsiiPfS_S_
	.type	_Z22__device_stub__sumcatsiiPfS_S_,@function
_Z22__device_stub__sumcatsiiPfS_S_:     # @_Z22__device_stub__sumcatsiiPfS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	movq	%rsp, %rdi
	movl	%esi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7sumcatsiiPfS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	_Z22__device_stub__sumcatsiiPfS_S_, .Lfunc_end8-_Z22__device_stub__sumcatsiiPfS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z32__device_stub__felsensteinhelperiiiiiiiPKiS0_PKfS2_S2_Pf # -- Begin function _Z32__device_stub__felsensteinhelperiiiiiiiPKiS0_PKfS2_S2_Pf
	.type	_Z32__device_stub__felsensteinhelperiiiiiiiPKiS0_PKfS2_S2_Pf,@function
_Z32__device_stub__felsensteinhelperiiiiiiiPKiS0_PKfS2_S2_Pf: # @_Z32__device_stub__felsensteinhelperiiiiiiiPKiS0_PKfS2_S2_Pf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$192, %rsp
	.cfi_def_cfa_offset 240
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	28(%rsp), %rax
	movl	%edi, (%rax)
	leaq	24(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	20(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	16(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	248(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	256(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	264(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	272(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	280(%rsp), %rax
	movq	%rax, 88(%rbx)
	leaq	288(%rsp), %rax
	movq	%rax, 96(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	40(%rsp), %r12
	leaq	32(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17felsensteinhelperiiiiiiiPKiS0_PKfS2_S2_Pf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$208, %rsp
	.cfi_adjust_cfa_offset -208
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end9:
	.size	_Z32__device_stub__felsensteinhelperiiiiiiiPKiS0_PKfS2_S2_Pf, .Lfunc_end9-_Z32__device_stub__felsensteinhelperiiiiiiiPKiS0_PKfS2_S2_Pf
	.cfi_endproc
                                        # -- End function
	.globl	_Z38__device_stub__felsensteindinucleotideiiiiiiPKiS0_PKfS2_PiPfS4_S4_ # -- Begin function _Z38__device_stub__felsensteindinucleotideiiiiiiPKiS0_PKfS2_PiPfS4_S4_
	.type	_Z38__device_stub__felsensteindinucleotideiiiiiiPKiS0_PKfS2_PiPfS4_S4_,@function
_Z38__device_stub__felsensteindinucleotideiiiiiiPKiS0_PKfS2_PiPfS4_S4_: # @_Z38__device_stub__felsensteindinucleotideiiiiiiPKiS0_PKfS2_PiPfS4_S4_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$192, %rsp
	.cfi_def_cfa_offset 240
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	28(%rsp), %rax
	movl	%edi, (%rax)
	leaq	24(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	20(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	16(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	248(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	256(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	264(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	272(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	280(%rsp), %rax
	movq	%rax, 88(%rbx)
	leaq	288(%rsp), %rax
	movq	%rax, 96(%rbx)
	leaq	296(%rsp), %rax
	movq	%rax, 104(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	40(%rsp), %r12
	leaq	32(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z23felsensteindinucleotideiiiiiiPKiS0_PKfS2_PiPfS4_S4_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$208, %rsp
	.cfi_adjust_cfa_offset -208
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end10:
	.size	_Z38__device_stub__felsensteindinucleotideiiiiiiPKiS0_PKfS2_PiPfS4_S4_, .Lfunc_end10-_Z38__device_stub__felsensteindinucleotideiiiiiiPKiS0_PKfS2_PiPfS4_S4_
	.cfi_endproc
                                        # -- End function
	.globl	_Z23__device_stub__sumfinaliiPfS_S_ # -- Begin function _Z23__device_stub__sumfinaliiPfS_S_
	.type	_Z23__device_stub__sumfinaliiPfS_S_,@function
_Z23__device_stub__sumfinaliiPfS_S_:    # @_Z23__device_stub__sumfinaliiPfS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	movq	%rsp, %rdi
	movl	%esi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8sumfinaliiPfS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end11:
	.size	_Z23__device_stub__sumfinaliiPfS_S_, .Lfunc_end11-_Z23__device_stub__sumfinaliiPfS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z28__device_stub__sumcategoriesiiPKfS0_Pf # -- Begin function _Z28__device_stub__sumcategoriesiiPKfS0_Pf
	.type	_Z28__device_stub__sumcategoriesiiPKfS0_Pf,@function
_Z28__device_stub__sumcategoriesiiPKfS0_Pf: # @_Z28__device_stub__sumcategoriesiiPKfS0_Pf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	movq	%rsp, %rdi
	movl	%esi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13sumcategoriesiiPKfS0_Pf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end12:
	.size	_Z28__device_stub__sumcategoriesiiPKfS0_Pf, .Lfunc_end12-_Z28__device_stub__sumcategoriesiiPKfS0_Pf
	.cfi_endproc
                                        # -- End function
	.globl	_Z30__device_stub__felsensteinfastiiiiPKiS0_PKfS2_PfS3_ # -- Begin function _Z30__device_stub__felsensteinfastiiiiPKiS0_PKfS2_PfS3_
	.type	_Z30__device_stub__felsensteinfastiiiiPKiS0_PKfS2_PfS3_,@function
_Z30__device_stub__felsensteinfastiiiiPKiS0_PKfS2_PfS3_: # @_Z30__device_stub__felsensteinfastiiiiPKiS0_PKfS2_PfS3_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	8(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	4(%rsp), %rsi
	movl	%edx, (%rsi)
	movq	%rsp, %rdx
	movl	%ecx, (%rdx)
	leaq	40(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	32(%rsp), %r8
	movq	%r9, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	216(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	232(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15felsensteinfastiiiiPKiS0_PKfS2_PfS3_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end13:
	.size	_Z30__device_stub__felsensteinfastiiiiPKiS0_PKfS2_PfS3_, .Lfunc_end13-_Z30__device_stub__felsensteinfastiiiiPKiS0_PKfS2_PfS3_
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB14_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB14_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17felsensteinleavesiiiPKiS0_PfS1_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z19felsensteinleaves16iiPKiS0_PfS1_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8storearrifPfS_, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12logsumexparrifPffS_, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z19felsensteinhelper16iiiiiiPKiS0_PKfS2_S2_Pf, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z25felsensteinleaves16pairediiiPKiS0_PfS1_, %esi
	movl	$.L__unnamed_6, %edx
	movl	$.L__unnamed_6, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z25felsensteinhelper16pairediiiiiiiiiPKiS0_PKfS2_S2_Pf, %esi
	movl	$.L__unnamed_7, %edx
	movl	$.L__unnamed_7, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14sumfinalpairediiiPfS_S_, %esi
	movl	$.L__unnamed_8, %edx
	movl	$.L__unnamed_8, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7sumcatsiiPfS_S_, %esi
	movl	$.L__unnamed_9, %edx
	movl	$.L__unnamed_9, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17felsensteinhelperiiiiiiiPKiS0_PKfS2_S2_Pf, %esi
	movl	$.L__unnamed_10, %edx
	movl	$.L__unnamed_10, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z23felsensteindinucleotideiiiiiiPKiS0_PKfS2_PiPfS4_S4_, %esi
	movl	$.L__unnamed_11, %edx
	movl	$.L__unnamed_11, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8sumfinaliiPfS_S_, %esi
	movl	$.L__unnamed_12, %edx
	movl	$.L__unnamed_12, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13sumcategoriesiiPKfS0_Pf, %esi
	movl	$.L__unnamed_13, %edx
	movl	$.L__unnamed_13, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15felsensteinfastiiiiPKiS0_PKfS2_PfS3_, %esi
	movl	$.L__unnamed_14, %edx
	movl	$.L__unnamed_14, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end14:
	.size	__hip_module_ctor, .Lfunc_end14-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB15_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB15_2:
	retq
.Lfunc_end15:
	.size	__hip_module_dtor, .Lfunc_end15-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z17felsensteinleavesiiiPKiS0_PfS1_,@object # @_Z17felsensteinleavesiiiPKiS0_PfS1_
	.section	.rodata,"a",@progbits
	.globl	_Z17felsensteinleavesiiiPKiS0_PfS1_
	.p2align	3, 0x0
_Z17felsensteinleavesiiiPKiS0_PfS1_:
	.quad	_Z32__device_stub__felsensteinleavesiiiPKiS0_PfS1_
	.size	_Z17felsensteinleavesiiiPKiS0_PfS1_, 8

	.type	_Z19felsensteinleaves16iiPKiS0_PfS1_,@object # @_Z19felsensteinleaves16iiPKiS0_PfS1_
	.globl	_Z19felsensteinleaves16iiPKiS0_PfS1_
	.p2align	3, 0x0
_Z19felsensteinleaves16iiPKiS0_PfS1_:
	.quad	_Z34__device_stub__felsensteinleaves16iiPKiS0_PfS1_
	.size	_Z19felsensteinleaves16iiPKiS0_PfS1_, 8

	.type	_Z8storearrifPfS_,@object       # @_Z8storearrifPfS_
	.globl	_Z8storearrifPfS_
	.p2align	3, 0x0
_Z8storearrifPfS_:
	.quad	_Z23__device_stub__storearrifPfS_
	.size	_Z8storearrifPfS_, 8

	.type	_Z12logsumexparrifPffS_,@object # @_Z12logsumexparrifPffS_
	.globl	_Z12logsumexparrifPffS_
	.p2align	3, 0x0
_Z12logsumexparrifPffS_:
	.quad	_Z27__device_stub__logsumexparrifPffS_
	.size	_Z12logsumexparrifPffS_, 8

	.type	_Z19felsensteinhelper16iiiiiiPKiS0_PKfS2_S2_Pf,@object # @_Z19felsensteinhelper16iiiiiiPKiS0_PKfS2_S2_Pf
	.globl	_Z19felsensteinhelper16iiiiiiPKiS0_PKfS2_S2_Pf
	.p2align	3, 0x0
_Z19felsensteinhelper16iiiiiiPKiS0_PKfS2_S2_Pf:
	.quad	_Z34__device_stub__felsensteinhelper16iiiiiiPKiS0_PKfS2_S2_Pf
	.size	_Z19felsensteinhelper16iiiiiiPKiS0_PKfS2_S2_Pf, 8

	.type	_Z25felsensteinleaves16pairediiiPKiS0_PfS1_,@object # @_Z25felsensteinleaves16pairediiiPKiS0_PfS1_
	.globl	_Z25felsensteinleaves16pairediiiPKiS0_PfS1_
	.p2align	3, 0x0
_Z25felsensteinleaves16pairediiiPKiS0_PfS1_:
	.quad	_Z40__device_stub__felsensteinleaves16pairediiiPKiS0_PfS1_
	.size	_Z25felsensteinleaves16pairediiiPKiS0_PfS1_, 8

	.type	_Z25felsensteinhelper16pairediiiiiiiiiPKiS0_PKfS2_S2_Pf,@object # @_Z25felsensteinhelper16pairediiiiiiiiiPKiS0_PKfS2_S2_Pf
	.globl	_Z25felsensteinhelper16pairediiiiiiiiiPKiS0_PKfS2_S2_Pf
	.p2align	3, 0x0
_Z25felsensteinhelper16pairediiiiiiiiiPKiS0_PKfS2_S2_Pf:
	.quad	_Z40__device_stub__felsensteinhelper16pairediiiiiiiiiPKiS0_PKfS2_S2_Pf
	.size	_Z25felsensteinhelper16pairediiiiiiiiiPKiS0_PKfS2_S2_Pf, 8

	.type	_Z14sumfinalpairediiiPfS_S_,@object # @_Z14sumfinalpairediiiPfS_S_
	.globl	_Z14sumfinalpairediiiPfS_S_
	.p2align	3, 0x0
_Z14sumfinalpairediiiPfS_S_:
	.quad	_Z29__device_stub__sumfinalpairediiiPfS_S_
	.size	_Z14sumfinalpairediiiPfS_S_, 8

	.type	_Z7sumcatsiiPfS_S_,@object      # @_Z7sumcatsiiPfS_S_
	.globl	_Z7sumcatsiiPfS_S_
	.p2align	3, 0x0
_Z7sumcatsiiPfS_S_:
	.quad	_Z22__device_stub__sumcatsiiPfS_S_
	.size	_Z7sumcatsiiPfS_S_, 8

	.type	_Z17felsensteinhelperiiiiiiiPKiS0_PKfS2_S2_Pf,@object # @_Z17felsensteinhelperiiiiiiiPKiS0_PKfS2_S2_Pf
	.globl	_Z17felsensteinhelperiiiiiiiPKiS0_PKfS2_S2_Pf
	.p2align	3, 0x0
_Z17felsensteinhelperiiiiiiiPKiS0_PKfS2_S2_Pf:
	.quad	_Z32__device_stub__felsensteinhelperiiiiiiiPKiS0_PKfS2_S2_Pf
	.size	_Z17felsensteinhelperiiiiiiiPKiS0_PKfS2_S2_Pf, 8

	.type	_Z23felsensteindinucleotideiiiiiiPKiS0_PKfS2_PiPfS4_S4_,@object # @_Z23felsensteindinucleotideiiiiiiPKiS0_PKfS2_PiPfS4_S4_
	.globl	_Z23felsensteindinucleotideiiiiiiPKiS0_PKfS2_PiPfS4_S4_
	.p2align	3, 0x0
_Z23felsensteindinucleotideiiiiiiPKiS0_PKfS2_PiPfS4_S4_:
	.quad	_Z38__device_stub__felsensteindinucleotideiiiiiiPKiS0_PKfS2_PiPfS4_S4_
	.size	_Z23felsensteindinucleotideiiiiiiPKiS0_PKfS2_PiPfS4_S4_, 8

	.type	_Z8sumfinaliiPfS_S_,@object     # @_Z8sumfinaliiPfS_S_
	.globl	_Z8sumfinaliiPfS_S_
	.p2align	3, 0x0
_Z8sumfinaliiPfS_S_:
	.quad	_Z23__device_stub__sumfinaliiPfS_S_
	.size	_Z8sumfinaliiPfS_S_, 8

	.type	_Z13sumcategoriesiiPKfS0_Pf,@object # @_Z13sumcategoriesiiPKfS0_Pf
	.globl	_Z13sumcategoriesiiPKfS0_Pf
	.p2align	3, 0x0
_Z13sumcategoriesiiPKfS0_Pf:
	.quad	_Z28__device_stub__sumcategoriesiiPKfS0_Pf
	.size	_Z13sumcategoriesiiPKfS0_Pf, 8

	.type	_Z15felsensteinfastiiiiPKiS0_PKfS2_PfS3_,@object # @_Z15felsensteinfastiiiiPKiS0_PKfS2_PfS3_
	.globl	_Z15felsensteinfastiiiiPKiS0_PKfS2_PfS3_
	.p2align	3, 0x0
_Z15felsensteinfastiiiiPKiS0_PKfS2_PfS3_:
	.quad	_Z30__device_stub__felsensteinfastiiiiPKiS0_PKfS2_PfS3_
	.size	_Z15felsensteinfastiiiiPKiS0_PKfS2_PfS3_, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z17felsensteinleavesiiiPKiS0_PfS1_"
	.size	.L__unnamed_1, 36

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z19felsensteinleaves16iiPKiS0_PfS1_"
	.size	.L__unnamed_2, 37

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z8storearrifPfS_"
	.size	.L__unnamed_3, 18

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z12logsumexparrifPffS_"
	.size	.L__unnamed_4, 24

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"_Z19felsensteinhelper16iiiiiiPKiS0_PKfS2_S2_Pf"
	.size	.L__unnamed_5, 47

	.type	.L__unnamed_6,@object           # @5
.L__unnamed_6:
	.asciz	"_Z25felsensteinleaves16pairediiiPKiS0_PfS1_"
	.size	.L__unnamed_6, 44

	.type	.L__unnamed_7,@object           # @6
.L__unnamed_7:
	.asciz	"_Z25felsensteinhelper16pairediiiiiiiiiPKiS0_PKfS2_S2_Pf"
	.size	.L__unnamed_7, 56

	.type	.L__unnamed_8,@object           # @7
.L__unnamed_8:
	.asciz	"_Z14sumfinalpairediiiPfS_S_"
	.size	.L__unnamed_8, 28

	.type	.L__unnamed_9,@object           # @8
.L__unnamed_9:
	.asciz	"_Z7sumcatsiiPfS_S_"
	.size	.L__unnamed_9, 19

	.type	.L__unnamed_10,@object          # @9
.L__unnamed_10:
	.asciz	"_Z17felsensteinhelperiiiiiiiPKiS0_PKfS2_S2_Pf"
	.size	.L__unnamed_10, 46

	.type	.L__unnamed_11,@object          # @10
.L__unnamed_11:
	.asciz	"_Z23felsensteindinucleotideiiiiiiPKiS0_PKfS2_PiPfS4_S4_"
	.size	.L__unnamed_11, 56

	.type	.L__unnamed_12,@object          # @11
.L__unnamed_12:
	.asciz	"_Z8sumfinaliiPfS_S_"
	.size	.L__unnamed_12, 20

	.type	.L__unnamed_13,@object          # @12
.L__unnamed_13:
	.asciz	"_Z13sumcategoriesiiPKfS0_Pf"
	.size	.L__unnamed_13, 28

	.type	.L__unnamed_14,@object          # @13
.L__unnamed_14:
	.asciz	"_Z15felsensteinfastiiiiPKiS0_PKfS2_PfS3_"
	.size	.L__unnamed_14, 41

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z32__device_stub__felsensteinleavesiiiPKiS0_PfS1_
	.addrsig_sym _Z34__device_stub__felsensteinleaves16iiPKiS0_PfS1_
	.addrsig_sym _Z23__device_stub__storearrifPfS_
	.addrsig_sym _Z27__device_stub__logsumexparrifPffS_
	.addrsig_sym _Z34__device_stub__felsensteinhelper16iiiiiiPKiS0_PKfS2_S2_Pf
	.addrsig_sym _Z40__device_stub__felsensteinleaves16pairediiiPKiS0_PfS1_
	.addrsig_sym _Z40__device_stub__felsensteinhelper16pairediiiiiiiiiPKiS0_PKfS2_S2_Pf
	.addrsig_sym _Z29__device_stub__sumfinalpairediiiPfS_S_
	.addrsig_sym _Z22__device_stub__sumcatsiiPfS_S_
	.addrsig_sym _Z32__device_stub__felsensteinhelperiiiiiiiPKiS0_PKfS2_S2_Pf
	.addrsig_sym _Z38__device_stub__felsensteindinucleotideiiiiiiPKiS0_PKfS2_PiPfS4_S4_
	.addrsig_sym _Z23__device_stub__sumfinaliiPfS_S_
	.addrsig_sym _Z28__device_stub__sumcategoriesiiPKfS0_Pf
	.addrsig_sym _Z30__device_stub__felsensteinfastiiiiPKiS0_PKfS2_PfS3_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z17felsensteinleavesiiiPKiS0_PfS1_
	.addrsig_sym _Z19felsensteinleaves16iiPKiS0_PfS1_
	.addrsig_sym _Z8storearrifPfS_
	.addrsig_sym _Z12logsumexparrifPffS_
	.addrsig_sym _Z19felsensteinhelper16iiiiiiPKiS0_PKfS2_S2_Pf
	.addrsig_sym _Z25felsensteinleaves16pairediiiPKiS0_PfS1_
	.addrsig_sym _Z25felsensteinhelper16pairediiiiiiiiiPKiS0_PKfS2_S2_Pf
	.addrsig_sym _Z14sumfinalpairediiiPfS_S_
	.addrsig_sym _Z7sumcatsiiPfS_S_
	.addrsig_sym _Z17felsensteinhelperiiiiiiiPKiS0_PKfS2_S2_Pf
	.addrsig_sym _Z23felsensteindinucleotideiiiiiiPKiS0_PKfS2_PiPfS4_S4_
	.addrsig_sym _Z8sumfinaliiPfS_S_
	.addrsig_sym _Z13sumcategoriesiiPKfS0_Pf
	.addrsig_sym _Z15felsensteinfastiiiiPKiS0_PKfS2_PfS3_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z17felsensteinleavesiiiPKiS0_PfS1_ ; -- Begin function _Z17felsensteinleavesiiiPKiS0_PfS1_
	.globl	_Z17felsensteinleavesiiiPKiS0_PfS1_
	.p2align	8
	.type	_Z17felsensteinleavesiiiPKiS0_PfS1_,@function
_Z17felsensteinleavesiiiPKiS0_PfS1_:    ; @_Z17felsensteinleavesiiiPKiS0_PfS1_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x3c
	s_load_b32 s3, s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB0_9
; %bb.1:                                ; %.preheader
	s_clause 0x1
	s_load_b32 s8, s[0:1], 0x0
	s_load_b256 s[0:7], s[0:1], 0x10
	s_mov_b32 s9, 0
	s_waitcnt lgkmcnt(0)
	s_add_i32 s10, s8, 1
	s_cmp_gt_i32 s8, 0
	v_mul_lo_u32 v0, v1, s10
	s_cbranch_scc1 .LBB0_3
; %bb.2:                                ; %.preheader.._crit_edge_crit_edge
	v_mul_lo_u32 v2, v1, s10
	s_branch .LBB0_4
.LBB0_3:
	s_mov_b32 s9, -1
                                        ; implicit-def: $vgpr2
.LBB0_4:                                ; %Flow46
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s9
	s_cbranch_vccnz .LBB0_8
; %bb.5:                                ; %.lr.ph
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v3, vcc_lo, s0, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v2, vcc_lo
	v_add_co_u32 v1, vcc_lo, s2, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
	s_mov_b32 s0, 0
	global_load_b32 v3, v[3:4], off
	global_load_b32 v4, v[1:2], off
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[0:1]
	v_add_co_u32 v1, vcc_lo, s6, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s7, v2, vcc_lo
	s_waitcnt vmcnt(1)
	v_lshlrev_b32_e32 v3, 2, v3
	s_waitcnt vmcnt(0)
	v_lshlrev_b32_e32 v4, 2, v4
.LBB0_6:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_and_or_b32 v5, s0, 3, v4
	s_lshr_b32 s1, s0, 2
	s_add_i32 s0, s0, 1
	v_add_nc_u32_e32 v7, s1, v3
	s_cmp_lg_u32 s8, s0
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v8, 31, v7
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[7:8], 2, v[7:8]
	v_add_co_u32 v5, vcc_lo, s4, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v6, vcc_lo
	v_add_co_u32 v7, vcc_lo, s4, v7
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v8, vcc_lo
	s_clause 0x1
	global_load_b32 v7, v[7:8], off
	global_load_b32 v5, v[5:6], off
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v5, v7, v5
	global_store_b32 v[1:2], v5, off
	v_add_co_u32 v1, vcc_lo, v1, 4
	v_add_co_ci_u32_e32 v2, vcc_lo, 0, v2, vcc_lo
	s_cbranch_scc1 .LBB0_6
; %bb.7:
	v_mov_b32_e32 v2, v0
.LBB0_8:                                ; %._crit_edge
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v0, s8, v2
	v_mov_b32_e32 v2, 0
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_add_co_u32 v0, vcc_lo, s6, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB0_9:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17felsensteinleavesiiiPKiS0_PfS1_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z17felsensteinleavesiiiPKiS0_PfS1_, .Lfunc_end0-_Z17felsensteinleavesiiiPKiS0_PfS1_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 460
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z19felsensteinleaves16iiPKiS0_PfS1_ ; -- Begin function _Z19felsensteinleaves16iiPKiS0_PfS1_
	.globl	_Z19felsensteinleaves16iiPKiS0_PfS1_
	.p2align	8
	.type	_Z19felsensteinleaves16iiPKiS0_PfS1_,@function
_Z19felsensteinleaves16iiPKiS0_PfS1_:   ; @_Z19felsensteinleaves16iiPKiS0_PfS1_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x34
	s_load_b32 s3, s[0:1], 0x4
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB1_2
; %bb.1:
	s_load_b256 s[0:7], s[0:1], 0x8
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v4, vcc_lo, s0, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	global_load_b32 v0, v[4:5], off
	global_load_b32 v3, v[2:3], off
	s_waitcnt vmcnt(1)
	v_lshlrev_b32_e32 v2, 2, v0
	s_waitcnt vmcnt(0)
	v_lshlrev_b32_e32 v4, 2, v3
	v_lshl_add_u32 v0, v1, 4, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v3, 31, v2
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v2, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v4, vcc_lo, s4, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
	s_clause 0x1
	global_load_b32 v6, v[2:3], off
	global_load_b32 v7, v[4:5], off
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v6, v6, v7
	global_store_b32 v[0:1], v6, off
	s_clause 0x1
	global_load_b32 v6, v[2:3], off
	global_load_b32 v7, v[4:5], off offset:4
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v6, v6, v7
	global_store_b32 v[0:1], v6, off offset:4
	s_clause 0x1
	global_load_b32 v6, v[2:3], off
	global_load_b32 v7, v[4:5], off offset:8
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v6, v6, v7
	global_store_b32 v[0:1], v6, off offset:8
	s_clause 0x1
	global_load_b32 v6, v[2:3], off
	global_load_b32 v7, v[4:5], off offset:12
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v6, v6, v7
	global_store_b32 v[0:1], v6, off offset:12
	s_clause 0x1
	global_load_b32 v6, v[2:3], off offset:4
	global_load_b32 v7, v[4:5], off
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v6, v6, v7
	global_store_b32 v[0:1], v6, off offset:16
	s_clause 0x1
	global_load_b32 v6, v[2:3], off offset:4
	global_load_b32 v7, v[4:5], off offset:4
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v6, v6, v7
	global_store_b32 v[0:1], v6, off offset:20
	s_clause 0x1
	global_load_b32 v6, v[2:3], off offset:4
	global_load_b32 v7, v[4:5], off offset:8
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v6, v6, v7
	global_store_b32 v[0:1], v6, off offset:24
	s_clause 0x1
	global_load_b32 v6, v[2:3], off offset:4
	global_load_b32 v7, v[4:5], off offset:12
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v6, v6, v7
	global_store_b32 v[0:1], v6, off offset:28
	s_clause 0x1
	global_load_b32 v6, v[2:3], off offset:8
	global_load_b32 v7, v[4:5], off
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v6, v6, v7
	global_store_b32 v[0:1], v6, off offset:32
	s_clause 0x1
	global_load_b32 v6, v[2:3], off offset:8
	global_load_b32 v7, v[4:5], off offset:4
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v6, v6, v7
	global_store_b32 v[0:1], v6, off offset:36
	s_clause 0x1
	global_load_b32 v6, v[2:3], off offset:8
	global_load_b32 v7, v[4:5], off offset:8
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v6, v6, v7
	global_store_b32 v[0:1], v6, off offset:40
	s_clause 0x1
	global_load_b32 v6, v[2:3], off offset:8
	global_load_b32 v7, v[4:5], off offset:12
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v6, v6, v7
	global_store_b32 v[0:1], v6, off offset:44
	s_clause 0x1
	global_load_b32 v6, v[2:3], off offset:12
	global_load_b32 v7, v[4:5], off
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v6, v6, v7
	global_store_b32 v[0:1], v6, off offset:48
	s_clause 0x1
	global_load_b32 v6, v[2:3], off offset:12
	global_load_b32 v7, v[4:5], off offset:4
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v6, v6, v7
	global_store_b32 v[0:1], v6, off offset:52
	s_clause 0x1
	global_load_b32 v6, v[2:3], off offset:12
	global_load_b32 v7, v[4:5], off offset:8
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v6, v6, v7
	global_store_b32 v[0:1], v6, off offset:56
	s_clause 0x1
	global_load_b32 v2, v[2:3], off offset:12
	global_load_b32 v3, v[4:5], off offset:12
	s_waitcnt vmcnt(0)
	v_dual_mul_f32 v2, v2, v3 :: v_dual_mov_b32 v3, 0
	global_store_b64 v[0:1], v[2:3], off offset:60
.LBB1_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z19felsensteinleaves16iiPKiS0_PfS1_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z19felsensteinleaves16iiPKiS0_PfS1_, .Lfunc_end1-_Z19felsensteinleaves16iiPKiS0_PfS1_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 840
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 1
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z8storearrifPfS_       ; -- Begin function _Z8storearrifPfS_
	.globl	_Z8storearrifPfS_
	.p2align	8
	.type	_Z8storearrifPfS_,@function
_Z8storearrifPfS_:                      ; @_Z8storearrifPfS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_cmp_gt_i32_e32 vcc_lo, s2, v1
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB2_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x8
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s6, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v2, s3, v2
	global_store_b32 v[0:1], v2, off
.LBB2_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8storearrifPfS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z8storearrifPfS_, .Lfunc_end2-_Z8storearrifPfS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 148
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2align	2                               ; -- Begin function _Z9logsumexpff
	.type	_Z9logsumexpff,@function
_Z9logsumexpff:                         ; @_Z9logsumexpff
; %bb.0:
	s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $vgpr4_vgpr5
                                        ; implicit-def: $vgpr2_vgpr3
	v_cmpx_ngt_f32_e32 v0, v1
	s_xor_b32 s0, exec_lo, s0
	s_cbranch_execz .LBB3_2
; %bb.1:
	v_sub_f32_e32 v0, v0, v1
	s_mov_b32 s3, 0x3fe55555
	s_mov_b32 s2, 0x55555555
	s_mov_b32 s4, 0x6b47b09a
	s_mov_b32 s6, 0xbf559e2b
	v_mul_f32_e32 v2, 0x3fb8aa3b, v0
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v0
	s_mov_b32 s5, 0x3fc38538
	s_mov_b32 s7, 0x3fc3ab76
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f32 v3, 0x3fb8aa3b, v0, -v2
	v_rndne_f32_e32 v4, v2
	v_dual_fmamk_f32 v3, v0, 0x32a5705f, v3 :: v_dual_sub_f32 v2, v2, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f32_e32 v2, v2, v3
	v_cvt_i32_f32_e32 v3, v4
	v_exp_f32_e32 v2, v2
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v2, v2, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v2, 0, v2, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v0
	v_cndmask_b32_e32 v0, 0x7f800000, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f64_f32_e32 v[2:3], v0
	v_add_f64 v[2:3], v[2:3], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_frexp_mant_f64_e32 v[4:5], v[2:3]
	v_cmp_gt_f64_e32 vcc_lo, s[2:3], v[4:5]
	s_mov_b32 s2, 0x55555780
	v_cndmask_b32_e64 v0, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[4:5], v[4:5], v0
	v_frexp_exp_i32_f64_e32 v0, v[2:3]
	v_add_f64 v[6:7], v[4:5], 1.0
	v_add_f64 v[12:13], v[4:5], -1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_subrev_co_ci_u32_e32 v0, vcc_lo, 0, v0, vcc_lo
	v_cmp_eq_f64_e32 vcc_lo, 0x7ff00000, v[2:3]
	v_rcp_f64_e32 v[8:9], v[6:7]
	v_add_f64 v[14:15], v[6:7], -1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_f64 v[4:5], v[4:5], -v[14:15]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[10:11], -v[6:7], v[8:9], 1.0
	v_fma_f64 v[8:9], v[10:11], v[8:9], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[10:11], -v[6:7], v[8:9], 1.0
	v_fma_f64 v[8:9], v[10:11], v[8:9], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[10:11], v[12:13], v[8:9]
	v_mul_f64 v[16:17], v[6:7], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], v[10:11], v[6:7], -v[16:17]
	v_fma_f64 v[4:5], v[10:11], v[4:5], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[6:7], v[16:17], v[4:5]
	v_add_f64 v[14:15], v[12:13], -v[6:7]
	v_add_f64 v[16:17], v[6:7], -v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[12:13], v[12:13], -v[14:15]
	v_add_f64 v[4:5], v[16:17], -v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[6:7], v[12:13], -v[6:7]
	v_add_f64 v[4:5], v[4:5], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[4:5], v[14:15], v[4:5]
	v_mul_f64 v[4:5], v[8:9], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[6:7], v[10:11], v[4:5]
	v_mul_f64 v[8:9], v[6:7], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_fma_f64 v[12:13], v[8:9], s[6:7], s[4:5]
	s_mov_b32 s4, 0xd7f4df2e
	s_mov_b32 s5, 0x3fc7474d
	v_mul_f64 v[14:15], v[6:7], v[8:9]
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[4:5]
	s_mov_b32 s4, 0x16291751
	s_mov_b32 s5, 0x3fcc71c0
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[4:5]
	s_mov_b32 s4, 0x9b27acf1
	s_mov_b32 s5, 0x3fd24924
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[4:5]
	s_mov_b32 s4, 0x998ef7b6
	s_mov_b32 s5, 0x3fd99999
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_fma_f64 v[8:9], v[8:9], v[12:13], s[2:3]
	v_ldexp_f64 v[12:13], v[6:7], 1
	v_add_f64 v[6:7], v[6:7], -v[10:11]
	s_mov_b32 s2, 0xfefa39ef
	s_mov_b32 s3, 0x3fe62e42
	v_mul_f64 v[8:9], v[14:15], v[8:9]
	v_cvt_f64_i32_e32 v[14:15], v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[4:5], v[4:5], -v[6:7]
                                        ; implicit-def: $vgpr0
	v_add_f64 v[10:11], v[12:13], v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[16:17], v[14:15], s[2:3]
	v_ldexp_f64 v[4:5], v[4:5], 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[6:7], v[10:11], -v[12:13]
	v_fma_f64 v[12:13], v[14:15], s[2:3], -v[16:17]
	s_mov_b32 s2, 0x3b39803f
	s_mov_b32 s3, 0x3c7abc9e
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[8:9], -v[6:7]
	v_fma_f64 v[8:9], v[14:15], s[2:3], v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[4:5], v[4:5], v[6:7]
	v_add_f64 v[6:7], v[16:17], v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[12:13], v[10:11], v[4:5]
	v_add_f64 v[16:17], v[6:7], -v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[14:15], v[6:7], v[12:13]
	v_add_f64 v[10:11], v[12:13], -v[10:11]
	v_add_f64 v[8:9], v[8:9], -v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[18:19], v[14:15], -v[6:7]
	v_add_f64 v[4:5], v[4:5], -v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[20:21], v[14:15], -v[18:19]
	v_add_f64 v[10:11], v[12:13], -v[18:19]
	v_add_f64 v[12:13], v[8:9], v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[6:7], v[6:7], -v[20:21]
	v_add_f64 v[6:7], v[10:11], v[6:7]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[12:13], -v[8:9]
	v_add_f64 v[6:7], v[12:13], v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[12:13], -v[10:11]
	v_add_f64 v[4:5], v[4:5], -v[10:11]
	v_add_f64 v[16:17], v[14:15], v[6:7]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[8:9], v[8:9], -v[12:13]
	v_add_f64 v[10:11], v[16:17], -v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[4:5], v[4:5], v[8:9]
	v_add_f64 v[6:7], v[6:7], -v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[4:5], v[4:5], v[6:7]
	v_add_f64 v[4:5], v[16:17], v[4:5]
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v5, v5, v3 :: v_dual_cndmask_b32 v4, v4, v2
.LBB3_2:                                ; %Flow
	s_and_not1_saveexec_b32 s0, s0
	s_cbranch_execz .LBB3_4
; %bb.3:
	v_sub_f32_e32 v1, v1, v0
	s_mov_b32 s3, 0x3fe55555
	s_mov_b32 s2, 0x55555555
	s_mov_b32 s4, 0x6b47b09a
	s_mov_b32 s6, 0xbf559e2b
	v_mul_f32_e32 v2, 0x3fb8aa3b, v1
	s_mov_b32 s5, 0x3fc38538
	s_mov_b32 s7, 0x3fc3ab76
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f32 v3, 0x3fb8aa3b, v1, -v2
	v_rndne_f32_e32 v4, v2
	v_dual_fmamk_f32 v3, v1, 0x32a5705f, v3 :: v_dual_sub_f32 v2, v2, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_f32_e32 v2, v2, v3
	v_cvt_i32_f32_e32 v3, v4
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v1
	v_exp_f32_e32 v2, v2
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v2, v2, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v2, 0, v2, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v1
	v_cndmask_b32_e32 v1, 0x7f800000, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f64_f32_e32 v[1:2], v1
	v_add_f64 v[2:3], v[1:2], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_frexp_mant_f64_e32 v[4:5], v[2:3]
	v_cmp_gt_f64_e32 vcc_lo, s[2:3], v[4:5]
	s_mov_b32 s2, 0x55555780
	v_cndmask_b32_e64 v1, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[4:5], v[4:5], v1
	v_frexp_exp_i32_f64_e32 v1, v[2:3]
	v_add_f64 v[6:7], v[4:5], 1.0
	v_add_f64 v[12:13], v[4:5], -1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_subrev_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	v_cmp_eq_f64_e32 vcc_lo, 0x7ff00000, v[2:3]
	v_rcp_f64_e32 v[8:9], v[6:7]
	v_add_f64 v[14:15], v[6:7], -1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_f64 v[4:5], v[4:5], -v[14:15]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[10:11], -v[6:7], v[8:9], 1.0
	v_fma_f64 v[8:9], v[10:11], v[8:9], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[10:11], -v[6:7], v[8:9], 1.0
	v_fma_f64 v[8:9], v[10:11], v[8:9], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[10:11], v[12:13], v[8:9]
	v_mul_f64 v[16:17], v[6:7], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], v[10:11], v[6:7], -v[16:17]
	v_fma_f64 v[4:5], v[10:11], v[4:5], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[6:7], v[16:17], v[4:5]
	v_add_f64 v[14:15], v[12:13], -v[6:7]
	v_add_f64 v[16:17], v[6:7], -v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[12:13], v[12:13], -v[14:15]
	v_add_f64 v[4:5], v[16:17], -v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[6:7], v[12:13], -v[6:7]
	v_add_f64 v[4:5], v[4:5], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[4:5], v[14:15], v[4:5]
	v_mul_f64 v[4:5], v[8:9], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[6:7], v[10:11], v[4:5]
	v_mul_f64 v[8:9], v[6:7], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_fma_f64 v[12:13], v[8:9], s[6:7], s[4:5]
	s_mov_b32 s4, 0xd7f4df2e
	s_mov_b32 s5, 0x3fc7474d
	v_mul_f64 v[14:15], v[6:7], v[8:9]
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[4:5]
	s_mov_b32 s4, 0x16291751
	s_mov_b32 s5, 0x3fcc71c0
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[4:5]
	s_mov_b32 s4, 0x9b27acf1
	s_mov_b32 s5, 0x3fd24924
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[4:5]
	s_mov_b32 s4, 0x998ef7b6
	s_mov_b32 s5, 0x3fd99999
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_fma_f64 v[8:9], v[8:9], v[12:13], s[2:3]
	v_ldexp_f64 v[12:13], v[6:7], 1
	v_add_f64 v[6:7], v[6:7], -v[10:11]
	s_mov_b32 s2, 0xfefa39ef
	s_mov_b32 s3, 0x3fe62e42
	v_mul_f64 v[8:9], v[14:15], v[8:9]
	v_cvt_f64_i32_e32 v[14:15], v1
	v_mov_b32_e32 v1, v0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[4:5], v[4:5], -v[6:7]
	v_add_f64 v[10:11], v[12:13], v[8:9]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[16:17], v[14:15], s[2:3]
	v_ldexp_f64 v[4:5], v[4:5], 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[6:7], v[10:11], -v[12:13]
	v_fma_f64 v[12:13], v[14:15], s[2:3], -v[16:17]
	s_mov_b32 s2, 0x3b39803f
	s_mov_b32 s3, 0x3c7abc9e
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[8:9], -v[6:7]
	v_fma_f64 v[8:9], v[14:15], s[2:3], v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[4:5], v[4:5], v[6:7]
	v_add_f64 v[6:7], v[16:17], v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[12:13], v[10:11], v[4:5]
	v_add_f64 v[16:17], v[6:7], -v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[14:15], v[6:7], v[12:13]
	v_add_f64 v[10:11], v[12:13], -v[10:11]
	v_add_f64 v[8:9], v[8:9], -v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[18:19], v[14:15], -v[6:7]
	v_add_f64 v[4:5], v[4:5], -v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[20:21], v[14:15], -v[18:19]
	v_add_f64 v[10:11], v[12:13], -v[18:19]
	v_add_f64 v[12:13], v[8:9], v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[6:7], v[6:7], -v[20:21]
	v_add_f64 v[6:7], v[10:11], v[6:7]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[12:13], -v[8:9]
	v_add_f64 v[6:7], v[12:13], v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[12:13], -v[10:11]
	v_add_f64 v[4:5], v[4:5], -v[10:11]
	v_add_f64 v[16:17], v[14:15], v[6:7]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[8:9], v[8:9], -v[12:13]
	v_add_f64 v[10:11], v[16:17], -v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[4:5], v[4:5], v[8:9]
	v_add_f64 v[6:7], v[6:7], -v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[4:5], v[4:5], v[6:7]
	v_add_f64 v[4:5], v[16:17], v[4:5]
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_cndmask_b32 v5, v5, v3 :: v_dual_cndmask_b32 v4, v4, v2
.LBB3_4:
	s_or_b32 exec_lo, exec_lo, s0
	v_cmp_neq_f64_e32 vcc_lo, 0, v[2:3]
	v_cvt_f64_f32_e32 v[0:1], v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v3, 0xfff00000, v5, vcc_lo
	v_cndmask_b32_e32 v2, 0, v4, vcc_lo
	v_add_f64 v[0:1], v[2:3], v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_f32_f64_e32 v0, v[0:1]
	s_setpc_b64 s[30:31]
.Lfunc_end3:
	.size	_Z9logsumexpff, .Lfunc_end3-_Z9logsumexpff
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Function info:
; codeLenInByte = 2064
; NumSgprs: 34
; NumVgprs: 22
; ScratchSize: 0
; MemoryBound: 0
	.text
	.protected	_Z12logsumexparrifPffS_ ; -- Begin function _Z12logsumexparrifPffS_
	.globl	_Z12logsumexparrifPffS_
	.p2align	8
	.type	_Z12logsumexparrifPffS_,@function
_Z12logsumexparrifPffS_:                ; @_Z12logsumexparrifPffS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x2c
	s_load_b64 s[2:3], s[0:1], 0x0
	s_mov_b32 s32, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_cmp_gt_i32_e32 vcc_lo, s2, v1
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB4_2
; %bb.1:
	s_clause 0x1
	s_load_b64 s[4:5], s[0:1], 0x8
	s_load_b64 s[6:7], s[0:1], 0x18
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b32 s0, s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v22, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v23, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_load_b32 v2, v[22:23], off
	global_load_b32 v1, v[0:1], off
	s_waitcnt vmcnt(0)
	v_dual_add_f32 v0, s3, v2 :: v_dual_add_f32 v1, s0, v1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _Z9logsumexpff@rel32@lo+4
	s_addc_u32 s1, s1, _Z9logsumexpff@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_swappc_b64 s[30:31], s[0:1]
	global_store_b32 v[22:23], v0, off
.LBB4_2:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12logsumexparrifPffS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 24
		.amdhsa_next_free_sgpr 33
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end4:
	.size	_Z12logsumexparrifPffS_, .Lfunc_end4-_Z12logsumexparrifPffS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 204
; NumSgprs: 35
; NumVgprs: 24
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 4
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 35
; NumVGPRsForWavesPerEU: 24
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z19felsensteinhelper16iiiiiiPKiS0_PKfS2_S2_Pf ; -- Begin function _Z19felsensteinhelper16iiiiiiPKiS0_PKfS2_S2_Pf
	.globl	_Z19felsensteinhelper16iiiiiiPKiS0_PKfS2_S2_Pf
	.p2align	8
	.type	_Z19felsensteinhelper16iiiiiiPKiS0_PKfS2_S2_Pf,@function
_Z19felsensteinhelper16iiiiiiPKiS0_PKfS2_S2_Pf: ; @_Z19felsensteinhelper16iiiiiiPKiS0_PKfS2_S2_Pf
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x54
	s_load_b32 s3, s[0:1], 0x4
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB5_2
; %bb.1:                                ; %.preheader64.preheader
	s_load_b256 s[4:11], s[0:1], 0x18
	v_ashrrev_i32_e32 v2, 31, v1
	s_clause 0x1
	s_load_b128 s[36:39], s[0:1], 0x38
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v4, vcc_lo, s4, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
	s_lshl_b32 s2, s0, 8
	global_load_b32 v0, v[4:5], off
	global_load_b32 v3, v[2:3], off
	s_ashr_i32 s3, s2, 31
	s_lshl_b32 s0, s1, 8
	s_lshl_b64 s[2:3], s[2:3], 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_add_u32 s34, s8, s2
	s_addc_u32 s35, s9, s3
	s_ashr_i32 s1, s0, 31
	s_lshl_b64 s[0:1], s[0:1], 2
	s_waitcnt vmcnt(1)
	v_lshl_add_u32 v2, v0, 4, v0
	s_waitcnt vmcnt(0)
	v_lshl_add_u32 v4, v3, 4, v3
	v_lshl_add_u32 v0, v1, 4, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v3, 31, v2
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v8, vcc_lo, s10, v2
	v_add_co_ci_u32_e32 v9, vcc_lo, s11, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v10, vcc_lo, s36, v4
	v_add_co_ci_u32_e32 v11, vcc_lo, s37, v5, vcc_lo
	global_load_b128 v[2:5], v[8:9], off
	global_load_b128 v[12:15], v[10:11], off
	global_load_b128 v[16:19], v[8:9], off offset:16
	global_load_b128 v[20:23], v[10:11], off offset:16
	global_load_b128 v[24:27], v[8:9], off offset:32
	global_load_b128 v[28:31], v[10:11], off offset:32
	global_load_b128 v[32:35], v[8:9], off offset:48
	global_load_b128 v[36:39], v[10:11], off offset:48
	s_add_u32 s36, s8, s0
	s_addc_u32 s37, s9, s1
	s_clause 0x1
	s_load_b512 s[0:15], s[34:35], 0x0
	s_load_b512 s[16:31], s[36:37], 0x0
	s_waitcnt vmcnt(7) lgkmcnt(0)
	v_fma_f32 v2, s0, v2, 0
	s_waitcnt vmcnt(6)
	v_fma_f32 v6, s16, v12, 0
	v_add_co_u32 v12, vcc_lo, s38, v0
	v_mov_b32_e32 v0, 0
	v_fmac_f32_e32 v2, s1, v3
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v6, s17, v13
	v_add_co_ci_u32_e32 v13, vcc_lo, s39, v1, vcc_lo
	v_fmac_f32_e32 v2, s2, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v6, s18, v14
	v_fmac_f32_e32 v2, s3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v6, s19, v15
	s_waitcnt vmcnt(5)
	v_fmac_f32_e32 v2, s4, v16
	s_waitcnt vmcnt(4)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v6, s20, v20
	v_fmac_f32_e32 v2, s5, v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v6, s21, v21
	v_fmac_f32_e32 v2, s6, v18
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v6, s22, v22
	v_fmac_f32_e32 v2, s7, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v6, s23, v23
	s_waitcnt vmcnt(3)
	v_fmac_f32_e32 v2, s8, v24
	s_waitcnt vmcnt(2)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v6, s24, v28
	v_fmac_f32_e32 v2, s9, v25
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v6, s25, v29
	v_fmac_f32_e32 v2, s10, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v6, s26, v30
	v_fmac_f32_e32 v2, s11, v27
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v6, s27, v31
	s_waitcnt vmcnt(1)
	v_fmac_f32_e32 v2, s12, v32
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v6, s28, v36
	v_fmac_f32_e32 v2, s13, v33
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v6, s29, v37
	v_fmac_f32_e32 v2, s14, v34
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v6, s30, v38
	v_fmac_f32_e32 v2, s15, v35
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v6, s31, v39
	v_mul_f32_e32 v14, v6, v2
	global_store_b32 v[12:13], v14, off
	global_load_b128 v[1:4], v0, s[34:35] offset:64
	global_load_b128 v[15:18], v[8:9], off
	global_load_b128 v[19:22], v0, s[36:37] offset:64
	global_load_b128 v[23:26], v[10:11], off
	global_load_b128 v[27:30], v0, s[34:35] offset:80
	global_load_b128 v[31:34], v[8:9], off offset:16
	global_load_b128 v[35:38], v0, s[36:37] offset:80
	global_load_b128 v[39:42], v[10:11], off offset:16
	global_load_b128 v[43:46], v0, s[34:35] offset:96
	global_load_b128 v[47:50], v[8:9], off offset:32
	global_load_b128 v[51:54], v0, s[36:37] offset:96
	global_load_b128 v[55:58], v[10:11], off offset:32
	global_load_b128 v[59:62], v0, s[34:35] offset:112
	global_load_b128 v[63:66], v[8:9], off offset:48
	global_load_b128 v[67:70], v0, s[36:37] offset:112
	global_load_b128 v[71:74], v[10:11], off offset:48
	s_waitcnt vmcnt(14)
	v_fma_f32 v1, v1, v15, 0
	s_waitcnt vmcnt(12)
	v_fma_f32 v5, v19, v23, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v2, v16
	v_fmac_f32_e32 v5, v20, v24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v3, v17
	v_fmac_f32_e32 v5, v21, v25
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v4, v18
	v_fmac_f32_e32 v5, v22, v26
	s_waitcnt vmcnt(10)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v27, v31
	s_waitcnt vmcnt(8)
	v_fmac_f32_e32 v5, v35, v39
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v28, v32
	v_fmac_f32_e32 v5, v36, v40
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v29, v33
	v_fmac_f32_e32 v5, v37, v41
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v30, v34
	v_fmac_f32_e32 v5, v38, v42
	s_waitcnt vmcnt(6)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v43, v47
	s_waitcnt vmcnt(4)
	v_fmac_f32_e32 v5, v51, v55
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v44, v48
	v_fmac_f32_e32 v5, v52, v56
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v45, v49
	v_fmac_f32_e32 v5, v53, v57
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v46, v50
	v_fmac_f32_e32 v5, v54, v58
	s_waitcnt vmcnt(2)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v59, v63
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v5, v67, v71
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v60, v64
	v_fmac_f32_e32 v5, v68, v72
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v61, v65
	v_fmac_f32_e32 v5, v69, v73
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v62, v66
	v_fmac_f32_e32 v5, v70, v74
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mul_f32 v15, v5, v1 :: v_dual_max_f32 v14, 0, v14
	global_store_b32 v[12:13], v15, off offset:4
	global_load_b128 v[1:4], v0, s[34:35] offset:128
	global_load_b128 v[16:19], v[8:9], off
	global_load_b128 v[20:23], v0, s[36:37] offset:128
	global_load_b128 v[24:27], v[10:11], off
	global_load_b128 v[28:31], v0, s[34:35] offset:144
	global_load_b128 v[32:35], v[8:9], off offset:16
	global_load_b128 v[36:39], v0, s[36:37] offset:144
	global_load_b128 v[40:43], v[10:11], off offset:16
	global_load_b128 v[44:47], v0, s[34:35] offset:160
	global_load_b128 v[48:51], v[8:9], off offset:32
	global_load_b128 v[52:55], v0, s[36:37] offset:160
	global_load_b128 v[56:59], v[10:11], off offset:32
	global_load_b128 v[60:63], v0, s[34:35] offset:176
	global_load_b128 v[64:67], v[8:9], off offset:48
	global_load_b128 v[68:71], v0, s[36:37] offset:176
	global_load_b128 v[72:75], v[10:11], off offset:48
	v_cmp_gt_f32_e32 vcc_lo, v15, v14
	v_cndmask_b32_e32 v14, v14, v15, vcc_lo
	s_waitcnt vmcnt(14)
	v_fma_f32 v1, v1, v16, 0
	s_waitcnt vmcnt(12)
	v_fma_f32 v5, v20, v24, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v2, v17
	v_fmac_f32_e32 v5, v21, v25
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v3, v18
	v_fmac_f32_e32 v5, v22, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v4, v19
	v_fmac_f32_e32 v5, v23, v27
	s_waitcnt vmcnt(10)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v28, v32
	s_waitcnt vmcnt(8)
	v_fmac_f32_e32 v5, v36, v40
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v29, v33
	v_fmac_f32_e32 v5, v37, v41
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v30, v34
	v_fmac_f32_e32 v5, v38, v42
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v31, v35
	v_fmac_f32_e32 v5, v39, v43
	s_waitcnt vmcnt(6)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v44, v48
	s_waitcnt vmcnt(4)
	v_fmac_f32_e32 v5, v52, v56
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v45, v49
	v_fmac_f32_e32 v5, v53, v57
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v46, v50
	v_fmac_f32_e32 v5, v54, v58
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v47, v51
	v_fmac_f32_e32 v5, v55, v59
	s_waitcnt vmcnt(2)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v60, v64
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v5, v68, v72
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v61, v65
	v_fmac_f32_e32 v5, v69, v73
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v62, v66
	v_fmac_f32_e32 v5, v70, v74
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v63, v67
	v_fmac_f32_e32 v5, v71, v75
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v16, v5, v1
	global_store_b32 v[12:13], v16, off offset:8
	global_load_b128 v[1:4], v0, s[34:35] offset:192
	global_load_b128 v[17:20], v[8:9], off
	global_load_b128 v[21:24], v0, s[36:37] offset:192
	global_load_b128 v[25:28], v[10:11], off
	global_load_b128 v[29:32], v0, s[34:35] offset:208
	global_load_b128 v[33:36], v[8:9], off offset:16
	global_load_b128 v[37:40], v0, s[36:37] offset:208
	global_load_b128 v[41:44], v[10:11], off offset:16
	global_load_b128 v[45:48], v0, s[34:35] offset:224
	global_load_b128 v[49:52], v[8:9], off offset:32
	global_load_b128 v[53:56], v0, s[36:37] offset:224
	global_load_b128 v[57:60], v[10:11], off offset:32
	global_load_b128 v[61:64], v0, s[34:35] offset:240
	global_load_b128 v[65:68], v[8:9], off offset:48
	global_load_b128 v[69:72], v0, s[36:37] offset:240
	global_load_b128 v[73:76], v[10:11], off offset:48
	s_waitcnt vmcnt(14)
	v_fma_f32 v1, v1, v17, 0
	s_waitcnt vmcnt(12)
	v_fma_f32 v5, v21, v25, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v1, v2, v18
	v_cmp_gt_f32_e32 vcc_lo, v16, v14
	v_fmac_f32_e32 v5, v22, v26
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v1, v3, v19 :: v_dual_cndmask_b32 v14, v14, v16
	v_fmac_f32_e32 v5, v23, v27
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v4, v20
	v_fmac_f32_e32 v5, v24, v28
	s_waitcnt vmcnt(10)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v29, v33
	s_waitcnt vmcnt(8)
	v_fmac_f32_e32 v5, v37, v41
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v30, v34
	v_fmac_f32_e32 v5, v38, v42
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v31, v35
	v_fmac_f32_e32 v5, v39, v43
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v32, v36
	v_fmac_f32_e32 v5, v40, v44
	s_waitcnt vmcnt(6)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v45, v49
	s_waitcnt vmcnt(4)
	v_fmac_f32_e32 v5, v53, v57
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v46, v50
	v_fmac_f32_e32 v5, v54, v58
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v47, v51
	v_fmac_f32_e32 v5, v55, v59
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v48, v52
	v_fmac_f32_e32 v5, v56, v60
	s_waitcnt vmcnt(2)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v61, v65
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v5, v69, v73
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v62, v66
	v_fmac_f32_e32 v5, v70, v74
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v63, v67
	v_fmac_f32_e32 v5, v71, v75
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v64, v68
	v_fmac_f32_e32 v5, v72, v76
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v17, v5, v1
	global_store_b32 v[12:13], v17, off offset:12
	v_cmp_gt_f32_e32 vcc_lo, v17, v14
	global_load_b128 v[1:4], v0, s[34:35] offset:256
	global_load_b128 v[18:21], v[8:9], off
	global_load_b128 v[22:25], v0, s[36:37] offset:256
	global_load_b128 v[26:29], v[10:11], off
	global_load_b128 v[30:33], v0, s[34:35] offset:272
	global_load_b128 v[34:37], v[8:9], off offset:16
	global_load_b128 v[38:41], v0, s[36:37] offset:272
	global_load_b128 v[42:45], v[10:11], off offset:16
	global_load_b128 v[46:49], v0, s[34:35] offset:288
	global_load_b128 v[50:53], v[8:9], off offset:32
	global_load_b128 v[54:57], v0, s[36:37] offset:288
	global_load_b128 v[58:61], v[10:11], off offset:32
	global_load_b128 v[62:65], v0, s[34:35] offset:304
	global_load_b128 v[66:69], v[8:9], off offset:48
	global_load_b128 v[70:73], v0, s[36:37] offset:304
	global_load_b128 v[74:77], v[10:11], off offset:48
	v_cndmask_b32_e32 v14, v14, v17, vcc_lo
	s_waitcnt vmcnt(14)
	v_fma_f32 v1, v1, v18, 0
	s_waitcnt vmcnt(12)
	v_fma_f32 v5, v22, v26, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v2, v19
	v_fmac_f32_e32 v5, v23, v27
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v3, v20
	v_fmac_f32_e32 v5, v24, v28
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v4, v21
	v_fmac_f32_e32 v5, v25, v29
	s_waitcnt vmcnt(10)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v30, v34
	s_waitcnt vmcnt(8)
	v_fmac_f32_e32 v5, v38, v42
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v31, v35
	v_fmac_f32_e32 v5, v39, v43
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v32, v36
	v_fmac_f32_e32 v5, v40, v44
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v33, v37
	v_fmac_f32_e32 v5, v41, v45
	s_waitcnt vmcnt(6)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v46, v50
	s_waitcnt vmcnt(4)
	v_fmac_f32_e32 v5, v54, v58
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v47, v51
	v_fmac_f32_e32 v5, v55, v59
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v48, v52
	v_fmac_f32_e32 v5, v56, v60
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v49, v53
	v_fmac_f32_e32 v5, v57, v61
	s_waitcnt vmcnt(2)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v62, v66
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v5, v70, v74
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v63, v67
	v_fmac_f32_e32 v5, v71, v75
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v64, v68
	v_fmac_f32_e32 v5, v72, v76
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v65, v69
	v_fmac_f32_e32 v5, v73, v77
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v18, v5, v1
	global_store_b32 v[12:13], v18, off offset:16
	global_load_b128 v[1:4], v0, s[34:35] offset:320
	global_load_b128 v[19:22], v[8:9], off
	global_load_b128 v[23:26], v0, s[36:37] offset:320
	global_load_b128 v[27:30], v[10:11], off
	global_load_b128 v[31:34], v0, s[34:35] offset:336
	global_load_b128 v[35:38], v[8:9], off offset:16
	global_load_b128 v[39:42], v0, s[36:37] offset:336
	global_load_b128 v[43:46], v[10:11], off offset:16
	global_load_b128 v[47:50], v0, s[34:35] offset:352
	global_load_b128 v[51:54], v[8:9], off offset:32
	global_load_b128 v[55:58], v0, s[36:37] offset:352
	global_load_b128 v[59:62], v[10:11], off offset:32
	global_load_b128 v[63:66], v0, s[34:35] offset:368
	global_load_b128 v[67:70], v[8:9], off offset:48
	global_load_b128 v[71:74], v0, s[36:37] offset:368
	global_load_b128 v[75:78], v[10:11], off offset:48
	s_waitcnt vmcnt(14)
	v_fma_f32 v1, v1, v19, 0
	s_waitcnt vmcnt(12)
	v_fma_f32 v5, v23, v27, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v1, v2, v20
	v_cmp_gt_f32_e32 vcc_lo, v18, v14
	v_fmac_f32_e32 v5, v24, v28
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v1, v3, v21 :: v_dual_cndmask_b32 v14, v14, v18
	v_fmac_f32_e32 v5, v25, v29
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v4, v22
	v_fmac_f32_e32 v5, v26, v30
	s_waitcnt vmcnt(10)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v31, v35
	s_waitcnt vmcnt(8)
	v_fmac_f32_e32 v5, v39, v43
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v32, v36
	v_fmac_f32_e32 v5, v40, v44
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v33, v37
	v_fmac_f32_e32 v5, v41, v45
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v34, v38
	v_fmac_f32_e32 v5, v42, v46
	s_waitcnt vmcnt(6)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v47, v51
	s_waitcnt vmcnt(4)
	v_fmac_f32_e32 v5, v55, v59
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v48, v52
	v_fmac_f32_e32 v5, v56, v60
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v49, v53
	v_fmac_f32_e32 v5, v57, v61
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v50, v54
	v_fmac_f32_e32 v5, v58, v62
	s_waitcnt vmcnt(2)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v63, v67
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v5, v71, v75
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v64, v68
	v_fmac_f32_e32 v5, v72, v76
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v65, v69
	v_fmac_f32_e32 v5, v73, v77
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v66, v70
	v_fmac_f32_e32 v5, v74, v78
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v19, v5, v1
	global_store_b32 v[12:13], v19, off offset:20
	global_load_b128 v[1:4], v0, s[34:35] offset:384
	global_load_b128 v[20:23], v[8:9], off
	global_load_b128 v[24:27], v0, s[36:37] offset:384
	global_load_b128 v[28:31], v[10:11], off
	global_load_b128 v[32:35], v0, s[34:35] offset:400
	global_load_b128 v[36:39], v[8:9], off offset:16
	global_load_b128 v[40:43], v0, s[36:37] offset:400
	global_load_b128 v[44:47], v[10:11], off offset:16
	global_load_b128 v[48:51], v0, s[34:35] offset:416
	global_load_b128 v[52:55], v[8:9], off offset:32
	global_load_b128 v[56:59], v0, s[36:37] offset:416
	global_load_b128 v[60:63], v[10:11], off offset:32
	global_load_b128 v[64:67], v0, s[34:35] offset:432
	global_load_b128 v[68:71], v[8:9], off offset:48
	global_load_b128 v[72:75], v0, s[36:37] offset:432
	global_load_b128 v[76:79], v[10:11], off offset:48
	v_cmp_gt_f32_e32 vcc_lo, v19, v14
	v_cndmask_b32_e32 v14, v14, v19, vcc_lo
	s_waitcnt vmcnt(14)
	v_fma_f32 v1, v1, v20, 0
	s_waitcnt vmcnt(12)
	v_fma_f32 v5, v24, v28, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v2, v21
	v_fmac_f32_e32 v5, v25, v29
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v3, v22
	v_fmac_f32_e32 v5, v26, v30
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v4, v23
	v_fmac_f32_e32 v5, v27, v31
	s_waitcnt vmcnt(10)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v32, v36
	s_waitcnt vmcnt(8)
	v_fmac_f32_e32 v5, v40, v44
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v33, v37
	v_fmac_f32_e32 v5, v41, v45
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v34, v38
	v_fmac_f32_e32 v5, v42, v46
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v35, v39
	v_fmac_f32_e32 v5, v43, v47
	s_waitcnt vmcnt(6)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v48, v52
	s_waitcnt vmcnt(4)
	v_fmac_f32_e32 v5, v56, v60
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v49, v53
	v_fmac_f32_e32 v5, v57, v61
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v50, v54
	v_fmac_f32_e32 v5, v58, v62
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v51, v55
	v_fmac_f32_e32 v5, v59, v63
	s_waitcnt vmcnt(2)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v64, v68
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v5, v72, v76
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v65, v69
	v_fmac_f32_e32 v5, v73, v77
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v66, v70
	v_fmac_f32_e32 v5, v74, v78
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v67, v71
	v_fmac_f32_e32 v5, v75, v79
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v20, v5, v1
	global_store_b32 v[12:13], v20, off offset:24
	global_load_b128 v[1:4], v0, s[34:35] offset:448
	global_load_b128 v[21:24], v[8:9], off
	global_load_b128 v[25:28], v0, s[36:37] offset:448
	global_load_b128 v[29:32], v[10:11], off
	global_load_b128 v[33:36], v0, s[34:35] offset:464
	global_load_b128 v[37:40], v[8:9], off offset:16
	global_load_b128 v[41:44], v0, s[36:37] offset:464
	global_load_b128 v[45:48], v[10:11], off offset:16
	global_load_b128 v[49:52], v0, s[34:35] offset:480
	global_load_b128 v[53:56], v[8:9], off offset:32
	global_load_b128 v[57:60], v0, s[36:37] offset:480
	global_load_b128 v[61:64], v[10:11], off offset:32
	global_load_b128 v[65:68], v0, s[34:35] offset:496
	global_load_b128 v[69:72], v[8:9], off offset:48
	global_load_b128 v[73:76], v0, s[36:37] offset:496
	global_load_b128 v[77:80], v[10:11], off offset:48
	s_waitcnt vmcnt(14)
	v_fma_f32 v1, v1, v21, 0
	s_waitcnt vmcnt(12)
	v_fma_f32 v5, v25, v29, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v1, v2, v22
	v_cmp_gt_f32_e32 vcc_lo, v20, v14
	v_fmac_f32_e32 v5, v26, v30
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v1, v3, v23 :: v_dual_cndmask_b32 v14, v14, v20
	v_fmac_f32_e32 v5, v27, v31
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v4, v24
	v_fmac_f32_e32 v5, v28, v32
	s_waitcnt vmcnt(10)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v33, v37
	s_waitcnt vmcnt(8)
	v_fmac_f32_e32 v5, v41, v45
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v34, v38
	v_fmac_f32_e32 v5, v42, v46
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v35, v39
	v_fmac_f32_e32 v5, v43, v47
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v36, v40
	v_fmac_f32_e32 v5, v44, v48
	s_waitcnt vmcnt(6)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v49, v53
	s_waitcnt vmcnt(4)
	v_fmac_f32_e32 v5, v57, v61
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v50, v54
	v_fmac_f32_e32 v5, v58, v62
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v51, v55
	v_fmac_f32_e32 v5, v59, v63
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v52, v56
	v_fmac_f32_e32 v5, v60, v64
	s_waitcnt vmcnt(2)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v65, v69
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v5, v73, v77
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v66, v70
	v_fmac_f32_e32 v5, v74, v78
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v67, v71
	v_fmac_f32_e32 v5, v75, v79
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v68, v72
	v_fmac_f32_e32 v5, v76, v80
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v21, v5, v1
	global_store_b32 v[12:13], v21, off offset:28
	global_load_b128 v[1:4], v0, s[34:35] offset:512
	global_load_b128 v[22:25], v[8:9], off
	global_load_b128 v[26:29], v0, s[36:37] offset:512
	global_load_b128 v[30:33], v[10:11], off
	global_load_b128 v[34:37], v0, s[34:35] offset:528
	global_load_b128 v[38:41], v[8:9], off offset:16
	global_load_b128 v[42:45], v0, s[36:37] offset:528
	global_load_b128 v[46:49], v[10:11], off offset:16
	global_load_b128 v[50:53], v0, s[34:35] offset:544
	global_load_b128 v[54:57], v[8:9], off offset:32
	global_load_b128 v[58:61], v0, s[36:37] offset:544
	global_load_b128 v[62:65], v[10:11], off offset:32
	global_load_b128 v[66:69], v0, s[34:35] offset:560
	global_load_b128 v[70:73], v[8:9], off offset:48
	global_load_b128 v[74:77], v0, s[36:37] offset:560
	global_load_b128 v[78:81], v[10:11], off offset:48
	v_cmp_gt_f32_e32 vcc_lo, v21, v14
	v_cndmask_b32_e32 v14, v14, v21, vcc_lo
	s_waitcnt vmcnt(14)
	v_fma_f32 v1, v1, v22, 0
	s_waitcnt vmcnt(12)
	v_fma_f32 v5, v26, v30, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v2, v23
	v_fmac_f32_e32 v5, v27, v31
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v3, v24
	v_fmac_f32_e32 v5, v28, v32
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v4, v25
	v_fmac_f32_e32 v5, v29, v33
	s_waitcnt vmcnt(10)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v34, v38
	s_waitcnt vmcnt(8)
	v_fmac_f32_e32 v5, v42, v46
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v35, v39
	v_fmac_f32_e32 v5, v43, v47
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v36, v40
	v_fmac_f32_e32 v5, v44, v48
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v37, v41
	v_fmac_f32_e32 v5, v45, v49
	s_waitcnt vmcnt(6)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v50, v54
	s_waitcnt vmcnt(4)
	v_fmac_f32_e32 v5, v58, v62
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v51, v55
	v_fmac_f32_e32 v5, v59, v63
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v52, v56
	v_fmac_f32_e32 v5, v60, v64
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v53, v57
	v_fmac_f32_e32 v5, v61, v65
	s_waitcnt vmcnt(2)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v66, v70
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v5, v74, v78
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v67, v71
	v_fmac_f32_e32 v5, v75, v79
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v68, v72
	v_fmac_f32_e32 v5, v76, v80
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v69, v73
	v_fmac_f32_e32 v5, v77, v81
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v22, v5, v1
	global_store_b32 v[12:13], v22, off offset:32
	global_load_b128 v[1:4], v0, s[34:35] offset:576
	global_load_b128 v[23:26], v[8:9], off
	global_load_b128 v[27:30], v0, s[36:37] offset:576
	global_load_b128 v[31:34], v[10:11], off
	global_load_b128 v[35:38], v0, s[34:35] offset:592
	global_load_b128 v[39:42], v[8:9], off offset:16
	global_load_b128 v[43:46], v0, s[36:37] offset:592
	global_load_b128 v[47:50], v[10:11], off offset:16
	global_load_b128 v[51:54], v0, s[34:35] offset:608
	global_load_b128 v[55:58], v[8:9], off offset:32
	global_load_b128 v[59:62], v0, s[36:37] offset:608
	global_load_b128 v[63:66], v[10:11], off offset:32
	global_load_b128 v[67:70], v0, s[34:35] offset:624
	global_load_b128 v[71:74], v[8:9], off offset:48
	global_load_b128 v[75:78], v0, s[36:37] offset:624
	global_load_b128 v[79:82], v[10:11], off offset:48
	s_waitcnt vmcnt(14)
	v_fma_f32 v1, v1, v23, 0
	s_waitcnt vmcnt(12)
	v_fma_f32 v5, v27, v31, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v1, v2, v24
	v_cmp_gt_f32_e32 vcc_lo, v22, v14
	v_fmac_f32_e32 v5, v28, v32
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v1, v3, v25 :: v_dual_cndmask_b32 v14, v14, v22
	v_fmac_f32_e32 v5, v29, v33
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v4, v26
	v_fmac_f32_e32 v5, v30, v34
	s_waitcnt vmcnt(10)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v35, v39
	s_waitcnt vmcnt(8)
	v_fmac_f32_e32 v5, v43, v47
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v36, v40
	v_fmac_f32_e32 v5, v44, v48
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v37, v41
	v_fmac_f32_e32 v5, v45, v49
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v38, v42
	v_fmac_f32_e32 v5, v46, v50
	s_waitcnt vmcnt(6)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v51, v55
	s_waitcnt vmcnt(4)
	v_fmac_f32_e32 v5, v59, v63
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v52, v56
	v_fmac_f32_e32 v5, v60, v64
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v53, v57
	v_fmac_f32_e32 v5, v61, v65
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v54, v58
	v_fmac_f32_e32 v5, v62, v66
	s_waitcnt vmcnt(2)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v67, v71
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v5, v75, v79
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v68, v72
	v_fmac_f32_e32 v5, v76, v80
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v69, v73
	v_fmac_f32_e32 v5, v77, v81
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v70, v74
	v_fmac_f32_e32 v5, v78, v82
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v23, v5, v1
	global_store_b32 v[12:13], v23, off offset:36
	global_load_b128 v[1:4], v0, s[34:35] offset:640
	global_load_b128 v[24:27], v[8:9], off
	global_load_b128 v[28:31], v0, s[36:37] offset:640
	global_load_b128 v[32:35], v[10:11], off
	global_load_b128 v[36:39], v0, s[34:35] offset:656
	global_load_b128 v[40:43], v[8:9], off offset:16
	global_load_b128 v[44:47], v0, s[36:37] offset:656
	global_load_b128 v[48:51], v[10:11], off offset:16
	global_load_b128 v[52:55], v0, s[34:35] offset:672
	global_load_b128 v[56:59], v[8:9], off offset:32
	global_load_b128 v[60:63], v0, s[36:37] offset:672
	global_load_b128 v[64:67], v[10:11], off offset:32
	global_load_b128 v[68:71], v0, s[34:35] offset:688
	global_load_b128 v[72:75], v[8:9], off offset:48
	global_load_b128 v[76:79], v0, s[36:37] offset:688
	global_load_b128 v[80:83], v[10:11], off offset:48
	v_cmp_gt_f32_e32 vcc_lo, v23, v14
	v_cndmask_b32_e32 v14, v14, v23, vcc_lo
	s_waitcnt vmcnt(14)
	v_fma_f32 v1, v1, v24, 0
	s_waitcnt vmcnt(12)
	v_fma_f32 v5, v28, v32, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v2, v25
	v_fmac_f32_e32 v5, v29, v33
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v3, v26
	v_fmac_f32_e32 v5, v30, v34
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v4, v27
	v_fmac_f32_e32 v5, v31, v35
	s_waitcnt vmcnt(10)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v36, v40
	s_waitcnt vmcnt(8)
	v_fmac_f32_e32 v5, v44, v48
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v37, v41
	v_fmac_f32_e32 v5, v45, v49
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v38, v42
	v_fmac_f32_e32 v5, v46, v50
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v39, v43
	v_fmac_f32_e32 v5, v47, v51
	s_waitcnt vmcnt(6)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v52, v56
	s_waitcnt vmcnt(4)
	v_fmac_f32_e32 v5, v60, v64
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v53, v57
	v_fmac_f32_e32 v5, v61, v65
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v54, v58
	v_fmac_f32_e32 v5, v62, v66
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v55, v59
	v_fmac_f32_e32 v5, v63, v67
	s_waitcnt vmcnt(2)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v68, v72
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v5, v76, v80
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v69, v73
	v_fmac_f32_e32 v5, v77, v81
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v70, v74
	v_fmac_f32_e32 v5, v78, v82
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v71, v75
	v_fmac_f32_e32 v5, v79, v83
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v24, v5, v1
	global_store_b32 v[12:13], v24, off offset:40
	global_load_b128 v[1:4], v0, s[34:35] offset:704
	global_load_b128 v[25:28], v[8:9], off
	global_load_b128 v[29:32], v0, s[36:37] offset:704
	global_load_b128 v[33:36], v[10:11], off
	global_load_b128 v[37:40], v0, s[34:35] offset:720
	global_load_b128 v[41:44], v[8:9], off offset:16
	global_load_b128 v[45:48], v0, s[36:37] offset:720
	global_load_b128 v[49:52], v[10:11], off offset:16
	global_load_b128 v[53:56], v0, s[34:35] offset:736
	global_load_b128 v[57:60], v[8:9], off offset:32
	global_load_b128 v[61:64], v0, s[36:37] offset:736
	global_load_b128 v[65:68], v[10:11], off offset:32
	global_load_b128 v[69:72], v0, s[34:35] offset:752
	global_load_b128 v[73:76], v[8:9], off offset:48
	global_load_b128 v[77:80], v0, s[36:37] offset:752
	global_load_b128 v[81:84], v[10:11], off offset:48
	s_waitcnt vmcnt(14)
	v_fma_f32 v1, v1, v25, 0
	s_waitcnt vmcnt(12)
	v_fma_f32 v5, v29, v33, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v1, v2, v26
	v_cmp_gt_f32_e32 vcc_lo, v24, v14
	v_fmac_f32_e32 v5, v30, v34
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v1, v3, v27 :: v_dual_cndmask_b32 v14, v14, v24
	v_fmac_f32_e32 v5, v31, v35
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v4, v28
	v_fmac_f32_e32 v5, v32, v36
	s_waitcnt vmcnt(10)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v37, v41
	s_waitcnt vmcnt(8)
	v_fmac_f32_e32 v5, v45, v49
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v38, v42
	v_fmac_f32_e32 v5, v46, v50
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v39, v43
	v_fmac_f32_e32 v5, v47, v51
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v40, v44
	v_fmac_f32_e32 v5, v48, v52
	s_waitcnt vmcnt(6)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v53, v57
	s_waitcnt vmcnt(4)
	v_fmac_f32_e32 v5, v61, v65
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v54, v58
	v_fmac_f32_e32 v5, v62, v66
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v55, v59
	v_fmac_f32_e32 v5, v63, v67
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v56, v60
	v_fmac_f32_e32 v5, v64, v68
	s_waitcnt vmcnt(2)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v69, v73
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v5, v77, v81
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v70, v74
	v_fmac_f32_e32 v5, v78, v82
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v71, v75
	v_fmac_f32_e32 v5, v79, v83
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v72, v76
	v_fmac_f32_e32 v5, v80, v84
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v25, v5, v1
	global_store_b32 v[12:13], v25, off offset:44
	global_load_b128 v[1:4], v0, s[34:35] offset:768
	global_load_b128 v[26:29], v[8:9], off
	global_load_b128 v[30:33], v0, s[36:37] offset:768
	global_load_b128 v[34:37], v[10:11], off
	global_load_b128 v[38:41], v0, s[34:35] offset:784
	global_load_b128 v[42:45], v[8:9], off offset:16
	global_load_b128 v[46:49], v0, s[36:37] offset:784
	global_load_b128 v[50:53], v[10:11], off offset:16
	global_load_b128 v[54:57], v0, s[34:35] offset:800
	global_load_b128 v[58:61], v[8:9], off offset:32
	global_load_b128 v[62:65], v0, s[36:37] offset:800
	global_load_b128 v[66:69], v[10:11], off offset:32
	global_load_b128 v[70:73], v0, s[34:35] offset:816
	global_load_b128 v[74:77], v[8:9], off offset:48
	global_load_b128 v[78:81], v0, s[36:37] offset:816
	global_load_b128 v[82:85], v[10:11], off offset:48
	v_cmp_gt_f32_e32 vcc_lo, v25, v14
	v_cndmask_b32_e32 v14, v14, v25, vcc_lo
	s_waitcnt vmcnt(14)
	v_fma_f32 v1, v1, v26, 0
	s_waitcnt vmcnt(12)
	v_fma_f32 v5, v30, v34, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v2, v27
	v_fmac_f32_e32 v5, v31, v35
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v3, v28
	v_fmac_f32_e32 v5, v32, v36
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v4, v29
	v_fmac_f32_e32 v5, v33, v37
	s_waitcnt vmcnt(10)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v38, v42
	s_waitcnt vmcnt(8)
	v_fmac_f32_e32 v5, v46, v50
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v39, v43
	v_fmac_f32_e32 v5, v47, v51
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v40, v44
	v_fmac_f32_e32 v5, v48, v52
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v41, v45
	v_fmac_f32_e32 v5, v49, v53
	s_waitcnt vmcnt(6)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v54, v58
	s_waitcnt vmcnt(4)
	v_fmac_f32_e32 v5, v62, v66
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v55, v59
	v_fmac_f32_e32 v5, v63, v67
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v56, v60
	v_fmac_f32_e32 v5, v64, v68
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v57, v61
	v_fmac_f32_e32 v5, v65, v69
	s_waitcnt vmcnt(2)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v70, v74
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v5, v78, v82
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v71, v75
	v_fmac_f32_e32 v5, v79, v83
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v72, v76
	v_fmac_f32_e32 v5, v80, v84
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v73, v77
	v_fmac_f32_e32 v5, v81, v85
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v90, v5, v1
	global_store_b32 v[12:13], v90, off offset:48
	global_load_b128 v[1:4], v0, s[34:35] offset:832
	global_load_b128 v[26:29], v[8:9], off
	global_load_b128 v[30:33], v0, s[36:37] offset:832
	global_load_b128 v[34:37], v[10:11], off
	global_load_b128 v[38:41], v0, s[34:35] offset:848
	global_load_b128 v[42:45], v[8:9], off offset:16
	global_load_b128 v[46:49], v0, s[36:37] offset:848
	global_load_b128 v[50:53], v[10:11], off offset:16
	global_load_b128 v[54:57], v0, s[34:35] offset:864
	global_load_b128 v[58:61], v[8:9], off offset:32
	global_load_b128 v[62:65], v0, s[36:37] offset:864
	global_load_b128 v[66:69], v[10:11], off offset:32
	global_load_b128 v[70:73], v0, s[34:35] offset:880
	global_load_b128 v[74:77], v[8:9], off offset:48
	global_load_b128 v[78:81], v0, s[36:37] offset:880
	global_load_b128 v[82:85], v[10:11], off offset:48
	s_waitcnt vmcnt(14)
	v_fma_f32 v1, v1, v26, 0
	s_waitcnt vmcnt(12)
	v_fma_f32 v5, v30, v34, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v1, v2, v27
	v_cmp_gt_f32_e32 vcc_lo, v90, v14
	v_fmac_f32_e32 v5, v31, v35
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v1, v3, v28 :: v_dual_cndmask_b32 v14, v14, v90
	v_fmac_f32_e32 v5, v32, v36
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v4, v29
	v_fmac_f32_e32 v5, v33, v37
	s_waitcnt vmcnt(10)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v38, v42
	s_waitcnt vmcnt(8)
	v_fmac_f32_e32 v5, v46, v50
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v39, v43
	v_fmac_f32_e32 v5, v47, v51
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v40, v44
	v_fmac_f32_e32 v5, v48, v52
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v41, v45
	v_fmac_f32_e32 v5, v49, v53
	s_waitcnt vmcnt(6)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v54, v58
	s_waitcnt vmcnt(4)
	v_fmac_f32_e32 v5, v62, v66
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v55, v59
	v_fmac_f32_e32 v5, v63, v67
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v56, v60
	v_fmac_f32_e32 v5, v64, v68
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v57, v61
	v_fmac_f32_e32 v5, v65, v69
	s_waitcnt vmcnt(2)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v70, v74
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v5, v78, v82
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v71, v75
	v_fmac_f32_e32 v5, v79, v83
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v72, v76
	v_fmac_f32_e32 v5, v80, v84
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v73, v77
	v_fmac_f32_e32 v5, v81, v85
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v91, v5, v1
	global_store_b32 v[12:13], v91, off offset:52
	global_load_b128 v[1:4], v0, s[34:35] offset:896
	global_load_b128 v[26:29], v[8:9], off
	global_load_b128 v[30:33], v0, s[36:37] offset:896
	global_load_b128 v[34:37], v[10:11], off
	global_load_b128 v[38:41], v0, s[34:35] offset:912
	global_load_b128 v[42:45], v[8:9], off offset:16
	global_load_b128 v[46:49], v0, s[36:37] offset:912
	global_load_b128 v[50:53], v[10:11], off offset:16
	global_load_b128 v[54:57], v0, s[34:35] offset:928
	global_load_b128 v[58:61], v[8:9], off offset:32
	global_load_b128 v[62:65], v0, s[36:37] offset:928
	global_load_b128 v[66:69], v[10:11], off offset:32
	global_load_b128 v[70:73], v0, s[34:35] offset:944
	global_load_b128 v[74:77], v[8:9], off offset:48
	global_load_b128 v[78:81], v0, s[36:37] offset:944
	global_load_b128 v[82:85], v[10:11], off offset:48
	v_cmp_gt_f32_e32 vcc_lo, v91, v14
	v_cndmask_b32_e32 v14, v14, v91, vcc_lo
	s_waitcnt vmcnt(14)
	v_fma_f32 v1, v1, v26, 0
	s_waitcnt vmcnt(12)
	v_fma_f32 v5, v30, v34, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v2, v27
	v_fmac_f32_e32 v5, v31, v35
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v3, v28
	v_fmac_f32_e32 v5, v32, v36
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v4, v29
	v_fmac_f32_e32 v5, v33, v37
	s_waitcnt vmcnt(10)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v38, v42
	s_waitcnt vmcnt(8)
	v_fmac_f32_e32 v5, v46, v50
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v39, v43
	v_fmac_f32_e32 v5, v47, v51
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v40, v44
	v_fmac_f32_e32 v5, v48, v52
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v41, v45
	v_fmac_f32_e32 v5, v49, v53
	s_waitcnt vmcnt(6)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v54, v58
	s_waitcnt vmcnt(4)
	v_fmac_f32_e32 v5, v62, v66
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v55, v59
	v_fmac_f32_e32 v5, v63, v67
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v56, v60
	v_fmac_f32_e32 v5, v64, v68
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v57, v61
	v_fmac_f32_e32 v5, v65, v69
	s_waitcnt vmcnt(2)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v70, v74
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v5, v78, v82
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v71, v75
	v_fmac_f32_e32 v5, v79, v83
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v72, v76
	v_fmac_f32_e32 v5, v80, v84
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v73, v77
	v_fmac_f32_e32 v5, v81, v85
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v92, v5, v1
	global_store_b32 v[12:13], v92, off offset:56
	global_load_b128 v[1:4], v0, s[34:35] offset:960
	global_load_b128 v[26:29], v[8:9], off
	global_load_b128 v[30:33], v0, s[36:37] offset:960
	global_load_b128 v[34:37], v[10:11], off
	global_load_b128 v[38:41], v0, s[34:35] offset:976
	global_load_b128 v[42:45], v[8:9], off offset:16
	global_load_b128 v[46:49], v0, s[36:37] offset:976
	global_load_b128 v[50:53], v[10:11], off offset:16
	global_load_b128 v[54:57], v0, s[34:35] offset:992
	global_load_b128 v[58:61], v[8:9], off offset:32
	global_load_b128 v[62:65], v0, s[36:37] offset:992
	global_load_b128 v[66:69], v[10:11], off offset:32
	global_load_b128 v[70:73], v0, s[34:35] offset:1008
	global_load_b128 v[74:77], v[8:9], off offset:48
	global_load_b128 v[78:81], v0, s[36:37] offset:1008
	global_load_b128 v[82:85], v[10:11], off offset:48
	global_load_b128 v[86:89], v[12:13], off
	s_waitcnt vmcnt(15)
	v_fma_f32 v5, v1, v26, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v5, v2, v27
	v_cmp_gt_f32_e32 vcc_lo, v92, v14
	v_fmac_f32_e32 v5, v3, v28
	v_cndmask_b32_e32 v14, v14, v92, vcc_lo
	global_load_b128 v[0:3], v[12:13], off offset:32
	v_fmac_f32_e32 v5, v4, v29
	s_waitcnt vmcnt(14)
	v_fma_f32 v4, v30, v34, 0
	global_load_b128 v[26:29], v[12:13], off offset:16
	s_waitcnt vmcnt(13)
	v_dual_fmac_f32 v5, v38, v42 :: v_dual_fmac_f32 v4, v31, v35
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v5, v39, v43 :: v_dual_fmac_f32 v4, v32, v36
	v_dual_fmac_f32 v5, v40, v44 :: v_dual_fmac_f32 v4, v33, v37
	s_waitcnt vmcnt(11)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v5, v41, v45 :: v_dual_fmac_f32 v4, v46, v50
	s_waitcnt vmcnt(9)
	v_dual_fmac_f32 v5, v54, v58 :: v_dual_fmac_f32 v4, v47, v51
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v5, v55, v59 :: v_dual_fmac_f32 v4, v48, v52
	v_dual_fmac_f32 v5, v56, v60 :: v_dual_fmac_f32 v4, v49, v53
	s_waitcnt vmcnt(7)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v5, v57, v61 :: v_dual_fmac_f32 v4, v62, v66
	s_waitcnt vmcnt(5)
	v_dual_fmac_f32 v5, v70, v74 :: v_dual_fmac_f32 v4, v63, v67
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v5, v71, v75 :: v_dual_fmac_f32 v4, v64, v68
	v_dual_fmac_f32 v5, v72, v76 :: v_dual_fmac_f32 v4, v65, v69
	s_waitcnt vmcnt(3)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v5, v73, v77 :: v_dual_fmac_f32 v4, v78, v82
	v_fmac_f32_e32 v4, v79, v83
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v4, v80, v84
	v_fmac_f32_e32 v4, v81, v85
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v30, v4, v5
	global_store_b32 v[12:13], v30, off offset:60
	global_load_b128 v[4:7], v[12:13], off offset:48
	v_cmp_gt_f32_e32 vcc_lo, v30, v14
	v_cndmask_b32_e32 v14, v14, v30, vcc_lo
	s_waitcnt vmcnt(3)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_div_scale_f32 v15, null, v14, v14, v86
	v_div_scale_f32 v17, null, v14, v14, v87
	v_div_scale_f32 v19, null, v14, v14, v88
	v_rcp_f32_e32 v34, v15
	v_div_scale_f32 v21, null, v14, v14, v89
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v35, v17
	v_rcp_f32_e32 v36, v19
	v_div_scale_f32 v16, vcc_lo, v86, v14, v86
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(TRANS32_DEP_3)
	v_rcp_f32_e32 v37, v21
	v_div_scale_f32 v18, s0, v87, v14, v87
	v_fma_f32 v43, -v15, v34, 1.0
	v_div_scale_f32 v20, s1, v88, v14, v88
	v_fma_f32 v44, -v17, v35, 1.0
	s_delay_alu instid0(TRANS32_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f32 v45, -v19, v36, 1.0
	v_fmac_f32_e32 v34, v43, v34
	v_div_scale_f32 v22, s2, v89, v14, v89
	s_delay_alu instid0(TRANS32_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f32 v46, -v21, v37, 1.0
	v_dual_fmac_f32 v35, v44, v35 :: v_dual_fmac_f32 v36, v45, v36
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v43, v16, v34
	v_fmac_f32_e32 v37, v46, v37
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_mul_f32 v44, v18, v35 :: v_dual_mul_f32 v45, v20, v36
	v_fma_f32 v51, -v15, v43, v16
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v46, v22, v37
	v_fma_f32 v52, -v17, v44, v18
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f32 v53, -v19, v45, v20
	v_fmac_f32_e32 v43, v51, v34
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v54, -v21, v46, v22
	v_dual_fmac_f32 v44, v52, v35 :: v_dual_fmac_f32 v45, v53, v36
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v15, -v15, v43, v16
	v_fmac_f32_e32 v46, v54, v37
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f32 v16, -v17, v44, v18
	v_fma_f32 v17, -v19, v45, v20
	s_delay_alu instid0(VALU_DEP_4)
	v_div_fmas_f32 v15, v15, v34, v43
	s_mov_b32 vcc_lo, s0
	v_fma_f32 v18, -v21, v46, v22
	v_div_fmas_f32 v16, v16, v35, v44
	s_mov_b32 vcc_lo, s1
	v_div_fixup_f32 v15, v15, v14, v86
	v_div_fmas_f32 v17, v17, v36, v45
	s_mov_b32 vcc_lo, s2
	v_div_fixup_f32 v16, v16, v14, v87
	v_div_fmas_f32 v18, v18, v37, v46
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fixup_f32 v17, v17, v14, v88
	v_div_fixup_f32 v18, v18, v14, v89
	s_waitcnt vmcnt(1)
	v_div_scale_f32 v23, null, v14, v14, v26
	v_div_scale_f32 v25, null, v14, v14, v27
	v_div_scale_f32 v31, null, v14, v14, v28
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_rcp_f32_e32 v38, v23
	v_div_scale_f32 v33, null, v14, v14, v29
	v_rcp_f32_e32 v39, v25
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v40, v31
	v_div_scale_f32 v24, s3, v26, v14, v26
	v_rcp_f32_e32 v41, v33
	v_div_scale_f32 v30, s4, v27, v14, v27
	v_fma_f32 v47, -v23, v38, 1.0
	v_div_scale_f32 v32, s5, v28, v14, v28
	s_delay_alu instid0(TRANS32_DEP_3) | instskip(NEXT) | instid1(TRANS32_DEP_2)
	v_fma_f32 v48, -v25, v39, 1.0
	v_fma_f32 v49, -v31, v40, 1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(TRANS32_DEP_1)
	v_fmac_f32_e32 v38, v47, v38
	v_div_scale_f32 v42, s6, v29, v14, v29
	v_fma_f32 v50, -v33, v41, 1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_dual_fmac_f32 v39, v48, v39 :: v_dual_fmac_f32 v40, v49, v40
	v_mul_f32_e32 v47, v24, v38
	s_mov_b32 vcc_lo, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v41, v50, v41
	v_dual_mul_f32 v48, v30, v39 :: v_dual_mul_f32 v49, v32, v40
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v55, -v23, v47, v24
	v_mul_f32_e32 v50, v42, v41
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f32 v56, -v25, v48, v30
	v_fma_f32 v57, -v31, v49, v32
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fmac_f32_e32 v47, v55, v38
	v_fma_f32 v58, -v33, v50, v42
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_fmac_f32 v48, v56, v39 :: v_dual_fmac_f32 v49, v57, v40
	v_fma_f32 v19, -v23, v47, v24
	v_div_scale_f32 v23, null, v14, v14, v0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fmac_f32_e32 v50, v58, v41
	v_fma_f32 v20, -v25, v48, v30
	v_fma_f32 v21, -v31, v49, v32
	v_div_fmas_f32 v19, v19, v38, v47
	s_mov_b32 vcc_lo, s4
	v_fma_f32 v22, -v33, v50, v42
	v_div_fmas_f32 v20, v20, v39, v48
	s_mov_b32 vcc_lo, s5
	v_div_scale_f32 v25, null, v14, v14, v1
	v_div_fmas_f32 v21, v21, v40, v49
	s_mov_b32 vcc_lo, s6
	v_div_fixup_f32 v20, v20, v14, v27
	v_div_fmas_f32 v22, v22, v41, v50
	v_div_scale_f32 v27, null, v14, v14, v2
	v_rcp_f32_e32 v38, v23
	v_rcp_f32_e32 v39, v25
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_div_fixup_f32 v22, v22, v14, v29
	v_div_scale_f32 v29, null, v14, v14, v3
	v_rcp_f32_e32 v40, v27
	v_div_scale_f32 v24, vcc_lo, v0, v14, v0
	v_rcp_f32_e32 v41, v29
	v_div_fixup_f32 v19, v19, v14, v26
	v_fma_f32 v47, -v23, v38, 1.0
	s_delay_alu instid0(TRANS32_DEP_3) | instskip(SKIP_2) | instid1(TRANS32_DEP_2)
	v_fma_f32 v48, -v25, v39, 1.0
	v_div_scale_f32 v26, s0, v1, v14, v1
	v_div_fixup_f32 v21, v21, v14, v28
	v_fma_f32 v49, -v27, v40, 1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(TRANS32_DEP_1)
	v_dual_fmac_f32 v38, v47, v38 :: v_dual_fmac_f32 v39, v48, v39
	v_fma_f32 v50, -v29, v41, 1.0
	v_div_scale_f32 v28, s1, v2, v14, v2
	s_delay_alu instid0(VALU_DEP_3)
	v_dual_fmac_f32 v40, v49, v40 :: v_dual_mul_f32 v47, v24, v38
	v_div_scale_f32 v30, s2, v3, v14, v3
	s_waitcnt vmcnt(0)
	v_div_scale_f32 v31, null, v14, v14, v4
	v_div_scale_f32 v33, null, v14, v14, v5
	v_div_scale_f32 v35, null, v14, v14, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_rcp_f32_e32 v42, v31
	v_div_scale_f32 v37, null, v14, v14, v7
	v_rcp_f32_e32 v43, v33
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v44, v35
	v_fmac_f32_e32 v41, v50, v41
	v_rcp_f32_e32 v45, v37
	v_mul_f32_e32 v48, v26, v39
	v_div_scale_f32 v32, s3, v4, v14, v4
	v_fma_f32 v51, -v31, v42, 1.0
	v_mul_f32_e32 v49, v28, v40
	v_div_scale_f32 v34, s4, v5, v14, v5
	s_delay_alu instid0(TRANS32_DEP_3) | instskip(NEXT) | instid1(TRANS32_DEP_2)
	v_fma_f32 v52, -v33, v43, 1.0
	v_fma_f32 v53, -v35, v44, 1.0
	v_fmac_f32_e32 v42, v51, v42
	s_delay_alu instid0(TRANS32_DEP_1)
	v_fma_f32 v54, -v37, v45, 1.0
	v_fma_f32 v55, -v23, v47, v24
	v_dual_fmac_f32 v43, v52, v43 :: v_dual_mul_f32 v50, v30, v41
	v_div_scale_f32 v36, s5, v6, v14, v6
	v_fmac_f32_e32 v44, v53, v44
	v_fma_f32 v56, -v25, v48, v26
	v_mul_f32_e32 v51, v32, v42
	v_div_scale_f32 v46, s6, v7, v14, v7
	v_fmac_f32_e32 v45, v54, v45
	v_fma_f32 v57, -v27, v49, v28
	v_dual_mul_f32 v52, v34, v43 :: v_dual_fmac_f32 v47, v55, v38
	v_fma_f32 v58, -v29, v50, v30
	v_mul_f32_e32 v53, v36, v44
	v_fmac_f32_e32 v48, v56, v39
	v_fma_f32 v59, -v31, v51, v32
	v_dual_mul_f32 v54, v46, v45 :: v_dual_fmac_f32 v49, v57, v40
	v_fma_f32 v60, -v33, v52, v34
	v_fma_f32 v23, -v23, v47, v24
	v_fmac_f32_e32 v50, v58, v41
	v_fma_f32 v61, -v35, v53, v36
	v_fma_f32 v24, -v25, v48, v26
	v_fmac_f32_e32 v51, v59, v42
	v_fma_f32 v62, -v37, v54, v46
	v_fma_f32 v25, -v27, v49, v28
	v_fmac_f32_e32 v52, v60, v43
	v_div_fmas_f32 v23, v23, v38, v47
	s_mov_b32 vcc_lo, s0
	v_fma_f32 v26, -v29, v50, v30
	v_fmac_f32_e32 v53, v61, v44
	v_div_fmas_f32 v24, v24, v39, v48
	s_mov_b32 vcc_lo, s1
	v_fma_f32 v27, -v31, v51, v32
	v_fmac_f32_e32 v54, v62, v45
	v_div_fmas_f32 v25, v25, v40, v49
	s_mov_b32 vcc_lo, s2
	v_fma_f32 v28, -v33, v52, v34
	v_div_fixup_f32 v0, v23, v14, v0
	v_div_fmas_f32 v23, v26, v41, v50
	s_mov_b32 vcc_lo, s3
	v_fma_f32 v29, -v35, v53, v36
	v_div_fixup_f32 v1, v24, v14, v1
	v_div_fmas_f32 v24, v27, v42, v51
	s_mov_b32 vcc_lo, s4
	v_fma_f32 v30, -v37, v54, v46
	v_div_fixup_f32 v2, v25, v14, v2
	v_div_fmas_f32 v25, v28, v43, v52
	s_mov_b32 vcc_lo, s5
	v_div_fixup_f32 v3, v23, v14, v3
	v_div_fmas_f32 v26, v29, v44, v53
	s_mov_b32 vcc_lo, s6
	v_div_fixup_f32 v4, v24, v14, v4
	v_div_fmas_f32 v27, v30, v45, v54
	v_div_fixup_f32 v5, v25, v14, v5
	v_div_fixup_f32 v6, v26, v14, v6
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v14
	s_delay_alu instid0(VALU_DEP_4)
	v_div_fixup_f32 v7, v27, v14, v7
	s_clause 0x3
	global_store_b128 v[12:13], v[15:18], off
	global_store_b128 v[12:13], v[19:22], off offset:16
	global_store_b128 v[12:13], v[0:3], off offset:32
	global_store_b128 v[12:13], v[4:7], off offset:48
	global_load_b32 v0, v[8:9], off offset:64
	global_load_b32 v1, v[10:11], off offset:64
	v_cndmask_b32_e64 v2, 1.0, 0x4f800000, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v2, v14, v2
	v_log_f32_e32 v2, v2
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v3, 0x3f317217, v2
	v_cmp_gt_f32_e64 s0, 0x7f800000, |v2|
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v4, 0x3f317217, v2, -v3
	v_fmamk_f32 v4, v2, 0x3377d1cf, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v3, v3, v4
	v_cndmask_b32_e64 v2, v2, v3, s0
	v_cndmask_b32_e64 v3, 0, 0x41b17218, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v2, v2, v3
	s_waitcnt vmcnt(1)
	v_add_f32_e32 v0, v2, v0
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v0, v0, v1
	global_store_b32 v[12:13], v0, off offset:64
.LBB5_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z19felsensteinhelper16iiiiiiPKiS0_PKfS2_S2_Pf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 328
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 93
		.amdhsa_next_free_sgpr 40
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end5:
	.size	_Z19felsensteinhelper16iiiiiiPKiS0_PKfS2_S2_Pf, .Lfunc_end5-_Z19felsensteinhelper16iiiiiiPKiS0_PKfS2_S2_Pf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 7920
; NumSgprs: 42
; NumVgprs: 93
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 5
; VGPRBlocks: 11
; NumSGPRsForWavesPerEU: 42
; NumVGPRsForWavesPerEU: 93
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z25felsensteinleaves16pairediiiPKiS0_PfS1_ ; -- Begin function _Z25felsensteinleaves16pairediiiPKiS0_PfS1_
	.globl	_Z25felsensteinleaves16pairediiiPKiS0_PfS1_
	.p2align	8
	.type	_Z25felsensteinleaves16pairediiiPKiS0_PfS1_,@function
_Z25felsensteinleaves16pairediiiPKiS0_PfS1_: ; @_Z25felsensteinleaves16pairediiiPKiS0_PfS1_
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x3c
	s_load_b64 s[2:3], s[0:1], 0x4
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_mul_i32 s2, s3, s2
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_i32_e32 vcc_lo, s2, v1
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB6_2
; %bb.1:
	s_ashr_i32 s2, s3, 31
	v_ashrrev_i32_e32 v3, 31, v1
	s_add_i32 s3, s3, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_xor_b32 s2, s3, s2
	v_add_nc_u32_e32 v4, v1, v3
	v_cvt_f32_u32_e32 v0, s2
	s_sub_i32 s3, 0, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v4, v4, v3
	v_rcp_iflag_f32_e32 v0, v0
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v0, v0
	v_mul_lo_u32 v2, s3, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v2, v0, v2
	v_add_nc_u32_e32 v0, v0, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v0, v4, v0
	v_mul_lo_u32 v0, v0, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v0, v4, v0
	v_subrev_nc_u32_e32 v2, s2, v0
	v_cmp_le_u32_e32 vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v0, v0, v2, vcc_lo
	v_subrev_nc_u32_e32 v2, s2, v0
	v_cmp_le_u32_e32 vcc_lo, s2, v0
	s_load_b256 s[0:7], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v0, v0, v2, vcc_lo
	v_xor_b32_e32 v0, v0, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v2, v0, v3
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v4, vcc_lo, s0, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	global_load_b32 v0, v[4:5], off
	global_load_b32 v3, v[2:3], off
	s_waitcnt vmcnt(1)
	v_lshlrev_b32_e32 v2, 2, v0
	s_waitcnt vmcnt(0)
	v_lshlrev_b32_e32 v4, 2, v3
	v_lshl_add_u32 v0, v1, 4, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v3, 31, v2
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v2, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v4, vcc_lo, s4, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
	s_clause 0x1
	global_load_b32 v6, v[2:3], off
	global_load_b32 v7, v[4:5], off
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v6, v6, v7
	global_store_b32 v[0:1], v6, off
	s_clause 0x1
	global_load_b32 v6, v[2:3], off
	global_load_b32 v7, v[4:5], off offset:4
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v6, v6, v7
	global_store_b32 v[0:1], v6, off offset:4
	s_clause 0x1
	global_load_b32 v6, v[2:3], off
	global_load_b32 v7, v[4:5], off offset:8
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v6, v6, v7
	global_store_b32 v[0:1], v6, off offset:8
	s_clause 0x1
	global_load_b32 v6, v[2:3], off
	global_load_b32 v7, v[4:5], off offset:12
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v6, v6, v7
	global_store_b32 v[0:1], v6, off offset:12
	s_clause 0x1
	global_load_b32 v6, v[2:3], off offset:4
	global_load_b32 v7, v[4:5], off
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v6, v6, v7
	global_store_b32 v[0:1], v6, off offset:16
	s_clause 0x1
	global_load_b32 v6, v[2:3], off offset:4
	global_load_b32 v7, v[4:5], off offset:4
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v6, v6, v7
	global_store_b32 v[0:1], v6, off offset:20
	s_clause 0x1
	global_load_b32 v6, v[2:3], off offset:4
	global_load_b32 v7, v[4:5], off offset:8
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v6, v6, v7
	global_store_b32 v[0:1], v6, off offset:24
	s_clause 0x1
	global_load_b32 v6, v[2:3], off offset:4
	global_load_b32 v7, v[4:5], off offset:12
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v6, v6, v7
	global_store_b32 v[0:1], v6, off offset:28
	s_clause 0x1
	global_load_b32 v6, v[2:3], off offset:8
	global_load_b32 v7, v[4:5], off
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v6, v6, v7
	global_store_b32 v[0:1], v6, off offset:32
	s_clause 0x1
	global_load_b32 v6, v[2:3], off offset:8
	global_load_b32 v7, v[4:5], off offset:4
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v6, v6, v7
	global_store_b32 v[0:1], v6, off offset:36
	s_clause 0x1
	global_load_b32 v6, v[2:3], off offset:8
	global_load_b32 v7, v[4:5], off offset:8
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v6, v6, v7
	global_store_b32 v[0:1], v6, off offset:40
	s_clause 0x1
	global_load_b32 v6, v[2:3], off offset:8
	global_load_b32 v7, v[4:5], off offset:12
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v6, v6, v7
	global_store_b32 v[0:1], v6, off offset:44
	s_clause 0x1
	global_load_b32 v6, v[2:3], off offset:12
	global_load_b32 v7, v[4:5], off
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v6, v6, v7
	global_store_b32 v[0:1], v6, off offset:48
	s_clause 0x1
	global_load_b32 v6, v[2:3], off offset:12
	global_load_b32 v7, v[4:5], off offset:4
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v6, v6, v7
	global_store_b32 v[0:1], v6, off offset:52
	s_clause 0x1
	global_load_b32 v6, v[2:3], off offset:12
	global_load_b32 v7, v[4:5], off offset:8
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v6, v6, v7
	global_store_b32 v[0:1], v6, off offset:56
	s_clause 0x1
	global_load_b32 v2, v[2:3], off offset:12
	global_load_b32 v3, v[4:5], off offset:12
	s_waitcnt vmcnt(0)
	v_dual_mul_f32 v2, v2, v3 :: v_dual_mov_b32 v3, 0
	global_store_b64 v[0:1], v[2:3], off offset:60
.LBB6_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z25felsensteinleaves16pairediiiPKiS0_PfS1_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end6:
	.size	_Z25felsensteinleaves16pairediiiPKiS0_PfS1_, .Lfunc_end6-_Z25felsensteinleaves16pairediiiPKiS0_PfS1_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1000
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z25felsensteinhelper16pairediiiiiiiiiPKiS0_PKfS2_S2_Pf ; -- Begin function _Z25felsensteinhelper16pairediiiiiiiiiPKiS0_PKfS2_S2_Pf
	.globl	_Z25felsensteinhelper16pairediiiiiiiiiPKiS0_PKfS2_S2_Pf
	.p2align	8
	.type	_Z25felsensteinhelper16pairediiiiiiiiiPKiS0_PKfS2_S2_Pf,@function
_Z25felsensteinhelper16pairediiiiiiiiiPKiS0_PKfS2_S2_Pf: ; @_Z25felsensteinhelper16pairediiiiiiiiiPKiS0_PKfS2_S2_Pf
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x64
	s_load_b128 s[16:19], s[0:1], 0x4
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mad_u64_u32 v[4:5], null, s15, s2, v[0:1]
	s_mul_i32 s2, s17, s16
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cmp_gt_i32_e32 vcc_lo, s2, v4
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB7_2
; %bb.1:                                ; %.preheader77.preheader
	s_ashr_i32 s2, s17, 31
	v_ashrrev_i32_e32 v2, 31, v4
	s_add_i32 s3, s17, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s3, s3, s2
	v_cvt_f32_u32_e32 v0, s3
	s_sub_i32 s4, 0, s3
	v_add_nc_u32_e32 v3, v4, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v0, v0
	v_xor_b32_e32 v3, v3, v2
	v_xor_b32_e32 v2, s2, v2
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v0, v0
	v_mul_lo_u32 v1, s4, v0
	s_load_b256 s[4:11], s[0:1], 0x28
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v1, v0, v1
	v_add_nc_u32_e32 v0, v0, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v0, v3, v0
	v_mul_lo_u32 v1, v0, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v1, v3, v1
	v_add_nc_u32_e32 v3, 1, v0
	v_subrev_nc_u32_e32 v5, s3, v1
	v_cmp_le_u32_e32 vcc_lo, s3, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v0, v0, v3 :: v_dual_cndmask_b32 v1, v1, v5
	v_add_nc_u32_e32 v3, 1, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e32 vcc_lo, s3, v1
	v_cndmask_b32_e32 v0, v0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v0, v0, v2
	v_sub_nc_u32_e32 v7, v0, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v0, v7, s17
	v_sub_nc_u32_e32 v0, v4, v0
	v_lshl_add_u32 v4, v4, 4, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	global_load_b32 v0, v[0:1], off
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x14
	s_load_b64 s[2:3], s[0:1], 0x1c
	s_waitcnt lgkmcnt(0)
	v_mul_lo_u32 v3, v7, s4
	s_delay_alu instid0(VALU_DEP_1)
	v_add_lshl_u32 v1, v3, s2, 8
	s_waitcnt vmcnt(1)
	v_mad_u64_u32 v[5:6], null, v7, s18, v[2:3]
	v_add_lshl_u32 v6, v3, s3, 8
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[8:9], null, v7, s19, v[0:1]
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b128 s[0:3], s[0:1], 0x48
	v_ashrrev_i32_e32 v7, 31, v6
	v_lshl_add_u32 v5, v5, 4, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_lshlrev_b64 v[2:3], 2, v[6:7]
	v_lshl_add_u32 v7, v8, 4, v8
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ashrrev_i32_e32 v6, 31, v5
	v_add_co_u32 v0, vcc_lo, s8, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v8, 31, v7
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	v_add_co_ci_u32_e32 v1, vcc_lo, s9, v1, vcc_lo
	v_add_co_u32 v2, vcc_lo, s8, v2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[10:11], 2, v[7:8]
	v_add_co_ci_u32_e32 v3, vcc_lo, s9, v3, vcc_lo
	v_add_co_u32 v8, vcc_lo, s10, v5
	v_add_co_ci_u32_e32 v9, vcc_lo, s11, v6, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v10, vcc_lo, s0, v10
	v_add_co_ci_u32_e32 v11, vcc_lo, s1, v11, vcc_lo
	s_clause 0x1
	global_load_b128 v[12:15], v[0:1], off
	global_load_b128 v[16:19], v[2:3], off
	global_load_b128 v[20:23], v[8:9], off
	global_load_b128 v[24:27], v[10:11], off
	s_clause 0x1
	global_load_b128 v[28:31], v[0:1], off offset:16
	global_load_b128 v[32:35], v[2:3], off offset:16
	global_load_b128 v[36:39], v[8:9], off offset:16
	global_load_b128 v[40:43], v[10:11], off offset:16
	s_clause 0x1
	global_load_b128 v[44:47], v[0:1], off offset:32
	global_load_b128 v[48:51], v[2:3], off offset:32
	global_load_b128 v[52:55], v[8:9], off offset:32
	global_load_b128 v[56:59], v[10:11], off offset:32
	s_clause 0x1
	global_load_b128 v[60:63], v[0:1], off offset:48
	global_load_b128 v[64:67], v[2:3], off offset:48
	global_load_b128 v[68:71], v[8:9], off offset:48
	global_load_b128 v[72:75], v[10:11], off offset:48
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	s_waitcnt vmcnt(13)
	v_fma_f32 v6, v12, v20, 0
	s_waitcnt vmcnt(12)
	v_fma_f32 v7, v16, v24, 0
	v_add_co_u32 v12, vcc_lo, s2, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v6, v13, v21
	v_fmac_f32_e32 v7, v17, v25
	v_add_co_ci_u32_e32 v13, vcc_lo, s3, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v6, v14, v22
	v_fmac_f32_e32 v7, v18, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v7, v19, v27
	s_waitcnt vmcnt(8)
	v_dual_fmac_f32 v6, v15, v23 :: v_dual_fmac_f32 v7, v32, v40
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v6, v28, v36 :: v_dual_fmac_f32 v7, v33, v41
	v_dual_fmac_f32 v6, v29, v37 :: v_dual_fmac_f32 v7, v34, v42
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v6, v30, v38 :: v_dual_fmac_f32 v7, v35, v43
	s_waitcnt vmcnt(4)
	v_dual_fmac_f32 v6, v31, v39 :: v_dual_fmac_f32 v7, v48, v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v6, v44, v52 :: v_dual_fmac_f32 v7, v49, v57
	v_dual_fmac_f32 v6, v45, v53 :: v_dual_fmac_f32 v7, v50, v58
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v6, v46, v54 :: v_dual_fmac_f32 v7, v51, v59
	s_waitcnt vmcnt(0)
	v_dual_fmac_f32 v6, v47, v55 :: v_dual_fmac_f32 v7, v64, v72
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v6, v60, v68 :: v_dual_fmac_f32 v7, v65, v73
	v_dual_fmac_f32 v6, v61, v69 :: v_dual_fmac_f32 v7, v66, v74
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v6, v62, v70 :: v_dual_fmac_f32 v7, v67, v75
	v_fmac_f32_e32 v6, v63, v71
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v14, v7, v6
	global_store_b32 v[12:13], v14, off
	global_load_b128 v[4:7], v[0:1], off offset:64
	global_load_b128 v[15:18], v[8:9], off
	global_load_b128 v[19:22], v[2:3], off offset:64
	global_load_b128 v[23:26], v[10:11], off
	global_load_b128 v[27:30], v[0:1], off offset:80
	global_load_b128 v[31:34], v[8:9], off offset:16
	global_load_b128 v[35:38], v[2:3], off offset:80
	global_load_b128 v[39:42], v[10:11], off offset:16
	global_load_b128 v[43:46], v[0:1], off offset:96
	global_load_b128 v[47:50], v[8:9], off offset:32
	global_load_b128 v[51:54], v[2:3], off offset:96
	global_load_b128 v[55:58], v[10:11], off offset:32
	global_load_b128 v[59:62], v[0:1], off offset:112
	global_load_b128 v[63:66], v[8:9], off offset:48
	global_load_b128 v[67:70], v[2:3], off offset:112
	global_load_b128 v[71:74], v[10:11], off offset:48
	s_waitcnt vmcnt(14)
	v_fma_f32 v4, v4, v15, 0
	s_waitcnt vmcnt(12)
	v_fma_f32 v15, v19, v23, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v5, v16
	v_fmac_f32_e32 v15, v20, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v15, v21, v25 :: v_dual_max_f32 v14, 0, v14
	v_fmac_f32_e32 v15, v22, v26
	s_waitcnt vmcnt(8)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v4, v6, v17 :: v_dual_fmac_f32 v15, v35, v39
	v_dual_fmac_f32 v4, v7, v18 :: v_dual_fmac_f32 v15, v36, v40
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v4, v27, v31 :: v_dual_fmac_f32 v15, v37, v41
	v_dual_fmac_f32 v4, v28, v32 :: v_dual_fmac_f32 v15, v38, v42
	s_waitcnt vmcnt(4)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v4, v29, v33 :: v_dual_fmac_f32 v15, v51, v55
	v_dual_fmac_f32 v4, v30, v34 :: v_dual_fmac_f32 v15, v52, v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v4, v43, v47 :: v_dual_fmac_f32 v15, v53, v57
	v_dual_fmac_f32 v4, v44, v48 :: v_dual_fmac_f32 v15, v54, v58
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v4, v45, v49 :: v_dual_fmac_f32 v15, v67, v71
	v_dual_fmac_f32 v4, v46, v50 :: v_dual_fmac_f32 v15, v68, v72
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v4, v59, v63 :: v_dual_fmac_f32 v15, v69, v73
	v_dual_fmac_f32 v4, v60, v64 :: v_dual_fmac_f32 v15, v70, v74
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v4, v61, v65
	v_fmac_f32_e32 v4, v62, v66
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v15, v15, v4
	global_store_b32 v[12:13], v15, off offset:4
	global_load_b128 v[4:7], v[0:1], off offset:128
	global_load_b128 v[16:19], v[8:9], off
	global_load_b128 v[20:23], v[2:3], off offset:128
	global_load_b128 v[24:27], v[10:11], off
	global_load_b128 v[28:31], v[0:1], off offset:144
	global_load_b128 v[32:35], v[8:9], off offset:16
	global_load_b128 v[36:39], v[2:3], off offset:144
	global_load_b128 v[40:43], v[10:11], off offset:16
	global_load_b128 v[44:47], v[0:1], off offset:160
	global_load_b128 v[48:51], v[8:9], off offset:32
	global_load_b128 v[52:55], v[2:3], off offset:160
	global_load_b128 v[56:59], v[10:11], off offset:32
	global_load_b128 v[60:63], v[0:1], off offset:176
	global_load_b128 v[64:67], v[8:9], off offset:48
	global_load_b128 v[68:71], v[2:3], off offset:176
	global_load_b128 v[72:75], v[10:11], off offset:48
	s_waitcnt vmcnt(14)
	v_fma_f32 v4, v4, v16, 0
	s_waitcnt vmcnt(12)
	v_fma_f32 v16, v20, v24, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v4, v5, v17
	v_cmp_gt_f32_e32 vcc_lo, v15, v14
	v_fmac_f32_e32 v16, v21, v25
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v4, v6, v18
	v_cndmask_b32_e32 v14, v14, v15, vcc_lo
	v_fmac_f32_e32 v16, v22, v26
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v7, v19
	v_fmac_f32_e32 v16, v23, v27
	s_waitcnt vmcnt(10)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v28, v32
	s_waitcnt vmcnt(8)
	v_fmac_f32_e32 v16, v36, v40
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v29, v33
	v_fmac_f32_e32 v16, v37, v41
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v30, v34
	v_fmac_f32_e32 v16, v38, v42
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v31, v35
	v_fmac_f32_e32 v16, v39, v43
	s_waitcnt vmcnt(6)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v44, v48
	s_waitcnt vmcnt(4)
	v_fmac_f32_e32 v16, v52, v56
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v45, v49
	v_fmac_f32_e32 v16, v53, v57
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v46, v50
	v_fmac_f32_e32 v16, v54, v58
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v47, v51
	v_fmac_f32_e32 v16, v55, v59
	s_waitcnt vmcnt(2)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v60, v64
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v16, v68, v72
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v61, v65
	v_fmac_f32_e32 v16, v69, v73
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v62, v66
	v_fmac_f32_e32 v16, v70, v74
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v63, v67
	v_fmac_f32_e32 v16, v71, v75
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v16, v16, v4
	global_store_b32 v[12:13], v16, off offset:8
	global_load_b128 v[4:7], v[0:1], off offset:192
	global_load_b128 v[17:20], v[8:9], off
	global_load_b128 v[21:24], v[2:3], off offset:192
	global_load_b128 v[25:28], v[10:11], off
	global_load_b128 v[29:32], v[0:1], off offset:208
	global_load_b128 v[33:36], v[8:9], off offset:16
	global_load_b128 v[37:40], v[2:3], off offset:208
	global_load_b128 v[41:44], v[10:11], off offset:16
	global_load_b128 v[45:48], v[0:1], off offset:224
	global_load_b128 v[49:52], v[8:9], off offset:32
	global_load_b128 v[53:56], v[2:3], off offset:224
	global_load_b128 v[57:60], v[10:11], off offset:32
	global_load_b128 v[61:64], v[0:1], off offset:240
	global_load_b128 v[65:68], v[8:9], off offset:48
	global_load_b128 v[69:72], v[2:3], off offset:240
	global_load_b128 v[73:76], v[10:11], off offset:48
	s_waitcnt vmcnt(14)
	v_fma_f32 v4, v4, v17, 0
	s_waitcnt vmcnt(12)
	v_fma_f32 v17, v21, v25, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v5, v18
	v_fmac_f32_e32 v17, v22, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v6, v19
	v_fmac_f32_e32 v17, v23, v27
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v4, v7, v20
	s_waitcnt vmcnt(10)
	v_dual_fmac_f32 v17, v24, v28 :: v_dual_fmac_f32 v4, v29, v33
	s_waitcnt vmcnt(8)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v17, v37, v41 :: v_dual_fmac_f32 v4, v30, v34
	v_dual_fmac_f32 v17, v38, v42 :: v_dual_fmac_f32 v4, v31, v35
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v17, v39, v43 :: v_dual_fmac_f32 v4, v32, v36
	s_waitcnt vmcnt(6)
	v_dual_fmac_f32 v17, v40, v44 :: v_dual_fmac_f32 v4, v45, v49
	s_waitcnt vmcnt(4)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v17, v53, v57 :: v_dual_fmac_f32 v4, v46, v50
	v_dual_fmac_f32 v17, v54, v58 :: v_dual_fmac_f32 v4, v47, v51
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v17, v55, v59 :: v_dual_fmac_f32 v4, v48, v52
	s_waitcnt vmcnt(2)
	v_dual_fmac_f32 v17, v56, v60 :: v_dual_fmac_f32 v4, v61, v65
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v17, v69, v73 :: v_dual_fmac_f32 v4, v62, v66
	v_dual_fmac_f32 v17, v70, v74 :: v_dual_fmac_f32 v4, v63, v67
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v17, v71, v75 :: v_dual_fmac_f32 v4, v64, v68
	v_fmac_f32_e32 v17, v72, v76
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v17, v17, v4
	global_store_b32 v[12:13], v17, off offset:12
	global_load_b128 v[4:7], v[0:1], off offset:256
	global_load_b128 v[18:21], v[8:9], off
	global_load_b128 v[22:25], v[2:3], off offset:256
	global_load_b128 v[26:29], v[10:11], off
	global_load_b128 v[30:33], v[0:1], off offset:272
	global_load_b128 v[34:37], v[8:9], off offset:16
	global_load_b128 v[38:41], v[2:3], off offset:272
	global_load_b128 v[42:45], v[10:11], off offset:16
	global_load_b128 v[46:49], v[0:1], off offset:288
	global_load_b128 v[50:53], v[8:9], off offset:32
	global_load_b128 v[54:57], v[2:3], off offset:288
	global_load_b128 v[58:61], v[10:11], off offset:32
	global_load_b128 v[62:65], v[0:1], off offset:304
	global_load_b128 v[66:69], v[8:9], off offset:48
	global_load_b128 v[70:73], v[2:3], off offset:304
	global_load_b128 v[74:77], v[10:11], off offset:48
	s_waitcnt vmcnt(14)
	v_fma_f32 v4, v4, v18, 0
	s_waitcnt vmcnt(12)
	v_fma_f32 v18, v22, v26, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v5, v19
	v_fmac_f32_e32 v18, v23, v27
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v6, v20
	v_fmac_f32_e32 v18, v24, v28
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v7, v21
	v_fmac_f32_e32 v18, v25, v29
	s_waitcnt vmcnt(10)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v30, v34
	s_waitcnt vmcnt(8)
	v_fmac_f32_e32 v18, v38, v42
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v31, v35
	v_fmac_f32_e32 v18, v39, v43
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v32, v36
	v_fmac_f32_e32 v18, v40, v44
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v33, v37
	v_fmac_f32_e32 v18, v41, v45
	s_waitcnt vmcnt(6)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v46, v50
	s_waitcnt vmcnt(4)
	v_fmac_f32_e32 v18, v54, v58
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v47, v51
	v_fmac_f32_e32 v18, v55, v59
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v48, v52
	v_fmac_f32_e32 v18, v56, v60
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v49, v53
	v_fmac_f32_e32 v18, v57, v61
	s_waitcnt vmcnt(2)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v62, v66
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v18, v70, v74
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v63, v67
	v_fmac_f32_e32 v18, v71, v75
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v64, v68
	v_fmac_f32_e32 v18, v72, v76
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v65, v69
	v_fmac_f32_e32 v18, v73, v77
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v18, v18, v4
	global_store_b32 v[12:13], v18, off offset:16
	global_load_b128 v[4:7], v[0:1], off offset:320
	global_load_b128 v[19:22], v[8:9], off
	global_load_b128 v[23:26], v[2:3], off offset:320
	global_load_b128 v[27:30], v[10:11], off
	global_load_b128 v[31:34], v[0:1], off offset:336
	global_load_b128 v[35:38], v[8:9], off offset:16
	global_load_b128 v[39:42], v[2:3], off offset:336
	global_load_b128 v[43:46], v[10:11], off offset:16
	global_load_b128 v[47:50], v[0:1], off offset:352
	global_load_b128 v[51:54], v[8:9], off offset:32
	global_load_b128 v[55:58], v[2:3], off offset:352
	global_load_b128 v[59:62], v[10:11], off offset:32
	global_load_b128 v[63:66], v[0:1], off offset:368
	global_load_b128 v[67:70], v[8:9], off offset:48
	global_load_b128 v[71:74], v[2:3], off offset:368
	global_load_b128 v[75:78], v[10:11], off offset:48
	s_waitcnt vmcnt(14)
	v_fma_f32 v4, v4, v19, 0
	s_waitcnt vmcnt(12)
	v_fma_f32 v19, v23, v27, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v4, v5, v20
	v_dual_fmac_f32 v19, v24, v28 :: v_dual_fmac_f32 v4, v6, v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v19, v25, v29 :: v_dual_fmac_f32 v4, v7, v22
	s_waitcnt vmcnt(10)
	v_dual_fmac_f32 v19, v26, v30 :: v_dual_fmac_f32 v4, v31, v35
	s_waitcnt vmcnt(8)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v19, v39, v43 :: v_dual_fmac_f32 v4, v32, v36
	v_dual_fmac_f32 v19, v40, v44 :: v_dual_fmac_f32 v4, v33, v37
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v19, v41, v45 :: v_dual_fmac_f32 v4, v34, v38
	s_waitcnt vmcnt(6)
	v_dual_fmac_f32 v19, v42, v46 :: v_dual_fmac_f32 v4, v47, v51
	s_waitcnt vmcnt(4)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v19, v55, v59 :: v_dual_fmac_f32 v4, v48, v52
	v_dual_fmac_f32 v19, v56, v60 :: v_dual_fmac_f32 v4, v49, v53
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v19, v57, v61 :: v_dual_fmac_f32 v4, v50, v54
	s_waitcnt vmcnt(2)
	v_dual_fmac_f32 v19, v58, v62 :: v_dual_fmac_f32 v4, v63, v67
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v19, v71, v75 :: v_dual_fmac_f32 v4, v64, v68
	v_dual_fmac_f32 v19, v72, v76 :: v_dual_fmac_f32 v4, v65, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v19, v73, v77 :: v_dual_fmac_f32 v4, v66, v70
	v_fmac_f32_e32 v19, v74, v78
	v_cmp_gt_f32_e32 vcc_lo, v16, v14
	s_delay_alu instid0(VALU_DEP_2)
	v_mul_f32_e32 v19, v19, v4
	v_cndmask_b32_e32 v14, v14, v16, vcc_lo
	global_store_b32 v[12:13], v19, off offset:20
	global_load_b128 v[4:7], v[0:1], off offset:384
	global_load_b128 v[20:23], v[8:9], off
	global_load_b128 v[24:27], v[2:3], off offset:384
	global_load_b128 v[28:31], v[10:11], off
	global_load_b128 v[32:35], v[0:1], off offset:400
	global_load_b128 v[36:39], v[8:9], off offset:16
	global_load_b128 v[40:43], v[2:3], off offset:400
	global_load_b128 v[44:47], v[10:11], off offset:16
	global_load_b128 v[48:51], v[0:1], off offset:416
	global_load_b128 v[52:55], v[8:9], off offset:32
	global_load_b128 v[56:59], v[2:3], off offset:416
	global_load_b128 v[60:63], v[10:11], off offset:32
	global_load_b128 v[64:67], v[0:1], off offset:432
	global_load_b128 v[68:71], v[8:9], off offset:48
	global_load_b128 v[72:75], v[2:3], off offset:432
	global_load_b128 v[76:79], v[10:11], off offset:48
	v_cmp_gt_f32_e32 vcc_lo, v17, v14
	v_cndmask_b32_e32 v14, v14, v17, vcc_lo
	s_waitcnt vmcnt(14)
	v_fma_f32 v4, v4, v20, 0
	s_waitcnt vmcnt(12)
	v_fma_f32 v20, v24, v28, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v5, v21
	v_fmac_f32_e32 v20, v25, v29
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v6, v22
	v_fmac_f32_e32 v20, v26, v30
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v7, v23
	v_fmac_f32_e32 v20, v27, v31
	s_waitcnt vmcnt(10)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v32, v36
	s_waitcnt vmcnt(8)
	v_fmac_f32_e32 v20, v40, v44
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v33, v37
	v_fmac_f32_e32 v20, v41, v45
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v34, v38
	v_fmac_f32_e32 v20, v42, v46
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v35, v39
	v_fmac_f32_e32 v20, v43, v47
	s_waitcnt vmcnt(6)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v48, v52
	s_waitcnt vmcnt(4)
	v_fmac_f32_e32 v20, v56, v60
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v49, v53
	v_fmac_f32_e32 v20, v57, v61
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v50, v54
	v_fmac_f32_e32 v20, v58, v62
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v51, v55
	v_fmac_f32_e32 v20, v59, v63
	s_waitcnt vmcnt(2)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v64, v68
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v20, v72, v76
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v65, v69
	v_fmac_f32_e32 v20, v73, v77
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v66, v70
	v_fmac_f32_e32 v20, v74, v78
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v67, v71
	v_fmac_f32_e32 v20, v75, v79
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v20, v20, v4
	global_store_b32 v[12:13], v20, off offset:24
	global_load_b128 v[4:7], v[0:1], off offset:448
	global_load_b128 v[21:24], v[8:9], off
	global_load_b128 v[25:28], v[2:3], off offset:448
	global_load_b128 v[29:32], v[10:11], off
	global_load_b128 v[33:36], v[0:1], off offset:464
	global_load_b128 v[37:40], v[8:9], off offset:16
	global_load_b128 v[41:44], v[2:3], off offset:464
	global_load_b128 v[45:48], v[10:11], off offset:16
	global_load_b128 v[49:52], v[0:1], off offset:480
	global_load_b128 v[53:56], v[8:9], off offset:32
	global_load_b128 v[57:60], v[2:3], off offset:480
	global_load_b128 v[61:64], v[10:11], off offset:32
	global_load_b128 v[65:68], v[0:1], off offset:496
	global_load_b128 v[69:72], v[8:9], off offset:48
	global_load_b128 v[73:76], v[2:3], off offset:496
	global_load_b128 v[77:80], v[10:11], off offset:48
	s_waitcnt vmcnt(14)
	v_fma_f32 v4, v4, v21, 0
	s_waitcnt vmcnt(12)
	v_fma_f32 v21, v25, v29, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v5, v22
	v_fmac_f32_e32 v21, v26, v30
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v6, v23
	v_fmac_f32_e32 v21, v27, v31
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v4, v7, v24
	s_waitcnt vmcnt(10)
	v_dual_fmac_f32 v21, v28, v32 :: v_dual_fmac_f32 v4, v33, v37
	s_waitcnt vmcnt(8)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v21, v41, v45 :: v_dual_fmac_f32 v4, v34, v38
	v_dual_fmac_f32 v21, v42, v46 :: v_dual_fmac_f32 v4, v35, v39
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v21, v43, v47 :: v_dual_fmac_f32 v4, v36, v40
	s_waitcnt vmcnt(6)
	v_dual_fmac_f32 v21, v44, v48 :: v_dual_fmac_f32 v4, v49, v53
	s_waitcnt vmcnt(4)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v21, v57, v61 :: v_dual_fmac_f32 v4, v50, v54
	v_dual_fmac_f32 v21, v58, v62 :: v_dual_fmac_f32 v4, v51, v55
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v21, v59, v63 :: v_dual_fmac_f32 v4, v52, v56
	s_waitcnt vmcnt(2)
	v_dual_fmac_f32 v21, v60, v64 :: v_dual_fmac_f32 v4, v65, v69
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v21, v73, v77 :: v_dual_fmac_f32 v4, v66, v70
	v_dual_fmac_f32 v21, v74, v78 :: v_dual_fmac_f32 v4, v67, v71
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v21, v75, v79 :: v_dual_fmac_f32 v4, v68, v72
	v_fmac_f32_e32 v21, v76, v80
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v21, v21, v4
	global_store_b32 v[12:13], v21, off offset:28
	global_load_b128 v[4:7], v[0:1], off offset:512
	global_load_b128 v[22:25], v[8:9], off
	global_load_b128 v[26:29], v[2:3], off offset:512
	global_load_b128 v[30:33], v[10:11], off
	global_load_b128 v[34:37], v[0:1], off offset:528
	global_load_b128 v[38:41], v[8:9], off offset:16
	global_load_b128 v[42:45], v[2:3], off offset:528
	global_load_b128 v[46:49], v[10:11], off offset:16
	global_load_b128 v[50:53], v[0:1], off offset:544
	global_load_b128 v[54:57], v[8:9], off offset:32
	global_load_b128 v[58:61], v[2:3], off offset:544
	global_load_b128 v[62:65], v[10:11], off offset:32
	global_load_b128 v[66:69], v[0:1], off offset:560
	global_load_b128 v[70:73], v[8:9], off offset:48
	global_load_b128 v[74:77], v[2:3], off offset:560
	global_load_b128 v[78:81], v[10:11], off offset:48
	s_waitcnt vmcnt(14)
	v_fma_f32 v4, v4, v22, 0
	s_waitcnt vmcnt(12)
	v_fma_f32 v22, v26, v30, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v5, v23
	v_fmac_f32_e32 v22, v27, v31
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v6, v24
	v_fmac_f32_e32 v22, v28, v32
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v7, v25
	v_fmac_f32_e32 v22, v29, v33
	s_waitcnt vmcnt(10)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v34, v38
	s_waitcnt vmcnt(8)
	v_fmac_f32_e32 v22, v42, v46
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v35, v39
	v_fmac_f32_e32 v22, v43, v47
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v36, v40
	v_fmac_f32_e32 v22, v44, v48
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v37, v41
	v_fmac_f32_e32 v22, v45, v49
	s_waitcnt vmcnt(6)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v50, v54
	s_waitcnt vmcnt(4)
	v_fmac_f32_e32 v22, v58, v62
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v51, v55
	v_fmac_f32_e32 v22, v59, v63
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v52, v56
	v_fmac_f32_e32 v22, v60, v64
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v53, v57
	v_fmac_f32_e32 v22, v61, v65
	s_waitcnt vmcnt(2)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v66, v70
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v22, v74, v78
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v67, v71
	v_fmac_f32_e32 v22, v75, v79
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v68, v72
	v_fmac_f32_e32 v22, v76, v80
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v69, v73
	v_fmac_f32_e32 v22, v77, v81
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v22, v22, v4
	global_store_b32 v[12:13], v22, off offset:32
	global_load_b128 v[4:7], v[0:1], off offset:576
	global_load_b128 v[23:26], v[8:9], off
	global_load_b128 v[27:30], v[2:3], off offset:576
	global_load_b128 v[31:34], v[10:11], off
	global_load_b128 v[35:38], v[0:1], off offset:592
	global_load_b128 v[39:42], v[8:9], off offset:16
	global_load_b128 v[43:46], v[2:3], off offset:592
	global_load_b128 v[47:50], v[10:11], off offset:16
	global_load_b128 v[51:54], v[0:1], off offset:608
	global_load_b128 v[55:58], v[8:9], off offset:32
	global_load_b128 v[59:62], v[2:3], off offset:608
	global_load_b128 v[63:66], v[10:11], off offset:32
	global_load_b128 v[67:70], v[0:1], off offset:624
	global_load_b128 v[71:74], v[8:9], off offset:48
	global_load_b128 v[75:78], v[2:3], off offset:624
	global_load_b128 v[79:82], v[10:11], off offset:48
	s_waitcnt vmcnt(14)
	v_fma_f32 v4, v4, v23, 0
	s_waitcnt vmcnt(12)
	v_fma_f32 v23, v27, v31, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v4, v5, v24
	v_dual_fmac_f32 v23, v28, v32 :: v_dual_fmac_f32 v4, v6, v25
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v23, v29, v33 :: v_dual_fmac_f32 v4, v7, v26
	s_waitcnt vmcnt(10)
	v_dual_fmac_f32 v23, v30, v34 :: v_dual_fmac_f32 v4, v35, v39
	s_waitcnt vmcnt(8)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v23, v43, v47 :: v_dual_fmac_f32 v4, v36, v40
	v_dual_fmac_f32 v23, v44, v48 :: v_dual_fmac_f32 v4, v37, v41
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v23, v45, v49 :: v_dual_fmac_f32 v4, v38, v42
	s_waitcnt vmcnt(6)
	v_dual_fmac_f32 v23, v46, v50 :: v_dual_fmac_f32 v4, v51, v55
	s_waitcnt vmcnt(4)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v23, v59, v63 :: v_dual_fmac_f32 v4, v52, v56
	v_dual_fmac_f32 v23, v60, v64 :: v_dual_fmac_f32 v4, v53, v57
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v23, v61, v65 :: v_dual_fmac_f32 v4, v54, v58
	s_waitcnt vmcnt(2)
	v_dual_fmac_f32 v23, v62, v66 :: v_dual_fmac_f32 v4, v67, v71
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v23, v75, v79 :: v_dual_fmac_f32 v4, v68, v72
	v_dual_fmac_f32 v23, v76, v80 :: v_dual_fmac_f32 v4, v69, v73
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v23, v77, v81 :: v_dual_fmac_f32 v4, v70, v74
	v_fmac_f32_e32 v23, v78, v82
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v23, v23, v4
	global_store_b32 v[12:13], v23, off offset:36
	global_load_b128 v[4:7], v[0:1], off offset:640
	global_load_b128 v[24:27], v[8:9], off
	global_load_b128 v[28:31], v[2:3], off offset:640
	global_load_b128 v[32:35], v[10:11], off
	global_load_b128 v[36:39], v[0:1], off offset:656
	global_load_b128 v[40:43], v[8:9], off offset:16
	global_load_b128 v[44:47], v[2:3], off offset:656
	global_load_b128 v[48:51], v[10:11], off offset:16
	global_load_b128 v[52:55], v[0:1], off offset:672
	global_load_b128 v[56:59], v[8:9], off offset:32
	global_load_b128 v[60:63], v[2:3], off offset:672
	global_load_b128 v[64:67], v[10:11], off offset:32
	global_load_b128 v[68:71], v[0:1], off offset:688
	global_load_b128 v[72:75], v[8:9], off offset:48
	global_load_b128 v[76:79], v[2:3], off offset:688
	global_load_b128 v[80:83], v[10:11], off offset:48
	s_waitcnt vmcnt(14)
	v_fma_f32 v4, v4, v24, 0
	s_waitcnt vmcnt(12)
	v_fma_f32 v24, v28, v32, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v5, v25
	v_fmac_f32_e32 v24, v29, v33
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v6, v26
	v_fmac_f32_e32 v24, v30, v34
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v7, v27
	v_fmac_f32_e32 v24, v31, v35
	s_waitcnt vmcnt(10)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v36, v40
	s_waitcnt vmcnt(8)
	v_fmac_f32_e32 v24, v44, v48
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v37, v41
	v_fmac_f32_e32 v24, v45, v49
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v38, v42
	v_fmac_f32_e32 v24, v46, v50
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v39, v43
	v_fmac_f32_e32 v24, v47, v51
	s_waitcnt vmcnt(6)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v52, v56
	s_waitcnt vmcnt(4)
	v_fmac_f32_e32 v24, v60, v64
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v53, v57
	v_fmac_f32_e32 v24, v61, v65
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v54, v58
	v_fmac_f32_e32 v24, v62, v66
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v55, v59
	v_fmac_f32_e32 v24, v63, v67
	s_waitcnt vmcnt(2)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v68, v72
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v24, v76, v80
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v69, v73
	v_fmac_f32_e32 v24, v77, v81
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v70, v74
	v_fmac_f32_e32 v24, v78, v82
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v71, v75
	v_fmac_f32_e32 v24, v79, v83
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v24, v24, v4
	global_store_b32 v[12:13], v24, off offset:40
	global_load_b128 v[4:7], v[0:1], off offset:704
	global_load_b128 v[25:28], v[8:9], off
	global_load_b128 v[29:32], v[2:3], off offset:704
	global_load_b128 v[33:36], v[10:11], off
	global_load_b128 v[37:40], v[0:1], off offset:720
	global_load_b128 v[41:44], v[8:9], off offset:16
	global_load_b128 v[45:48], v[2:3], off offset:720
	global_load_b128 v[49:52], v[10:11], off offset:16
	global_load_b128 v[53:56], v[0:1], off offset:736
	global_load_b128 v[57:60], v[8:9], off offset:32
	global_load_b128 v[61:64], v[2:3], off offset:736
	global_load_b128 v[65:68], v[10:11], off offset:32
	global_load_b128 v[69:72], v[0:1], off offset:752
	global_load_b128 v[73:76], v[8:9], off offset:48
	global_load_b128 v[77:80], v[2:3], off offset:752
	global_load_b128 v[81:84], v[10:11], off offset:48
	s_waitcnt vmcnt(14)
	v_fma_f32 v4, v4, v25, 0
	s_waitcnt vmcnt(12)
	v_fma_f32 v25, v29, v33, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v5, v26
	v_fmac_f32_e32 v25, v30, v34
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v6, v27
	v_fmac_f32_e32 v25, v31, v35
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v4, v7, v28
	s_waitcnt vmcnt(10)
	v_dual_fmac_f32 v25, v32, v36 :: v_dual_fmac_f32 v4, v37, v41
	s_waitcnt vmcnt(8)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v25, v45, v49 :: v_dual_fmac_f32 v4, v38, v42
	v_dual_fmac_f32 v25, v46, v50 :: v_dual_fmac_f32 v4, v39, v43
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v25, v47, v51 :: v_dual_fmac_f32 v4, v40, v44
	s_waitcnt vmcnt(6)
	v_dual_fmac_f32 v25, v48, v52 :: v_dual_fmac_f32 v4, v53, v57
	s_waitcnt vmcnt(4)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v25, v61, v65 :: v_dual_fmac_f32 v4, v54, v58
	v_dual_fmac_f32 v25, v62, v66 :: v_dual_fmac_f32 v4, v55, v59
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v25, v63, v67 :: v_dual_fmac_f32 v4, v56, v60
	s_waitcnt vmcnt(2)
	v_dual_fmac_f32 v25, v64, v68 :: v_dual_fmac_f32 v4, v69, v73
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v25, v77, v81
	v_cmp_gt_f32_e32 vcc_lo, v18, v14
	v_fmac_f32_e32 v4, v70, v74
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v25, v78, v82
	v_cndmask_b32_e32 v14, v14, v18, vcc_lo
	v_fmac_f32_e32 v4, v71, v75
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v25, v79, v83
	v_cmp_gt_f32_e32 vcc_lo, v19, v14
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v4, v72, v76
	v_dual_fmac_f32 v25, v80, v84 :: v_dual_cndmask_b32 v14, v14, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v25, v25, v4
	v_cmp_gt_f32_e32 vcc_lo, v20, v14
	global_store_b32 v[12:13], v25, off offset:44
	global_load_b128 v[4:7], v[0:1], off offset:768
	global_load_b128 v[26:29], v[8:9], off
	global_load_b128 v[30:33], v[2:3], off offset:768
	global_load_b128 v[34:37], v[10:11], off
	global_load_b128 v[38:41], v[0:1], off offset:784
	global_load_b128 v[42:45], v[8:9], off offset:16
	global_load_b128 v[46:49], v[2:3], off offset:784
	global_load_b128 v[50:53], v[10:11], off offset:16
	global_load_b128 v[54:57], v[0:1], off offset:800
	global_load_b128 v[58:61], v[8:9], off offset:32
	global_load_b128 v[62:65], v[2:3], off offset:800
	global_load_b128 v[66:69], v[10:11], off offset:32
	global_load_b128 v[70:73], v[0:1], off offset:816
	global_load_b128 v[74:77], v[8:9], off offset:48
	global_load_b128 v[78:81], v[2:3], off offset:816
	global_load_b128 v[82:85], v[10:11], off offset:48
	v_cndmask_b32_e32 v14, v14, v20, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f32_e32 vcc_lo, v21, v14
	v_cndmask_b32_e32 v14, v14, v21, vcc_lo
	v_cmp_gt_f32_e32 vcc_lo, v22, v14
	v_cndmask_b32_e32 v14, v14, v22, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f32_e32 vcc_lo, v23, v14
	v_cndmask_b32_e32 v14, v14, v23, vcc_lo
	v_cmp_gt_f32_e32 vcc_lo, v24, v14
	v_cndmask_b32_e32 v14, v14, v24, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_f32_e32 vcc_lo, v25, v14
	v_cndmask_b32_e32 v14, v14, v25, vcc_lo
	s_waitcnt vmcnt(14)
	v_fma_f32 v4, v4, v26, 0
	s_waitcnt vmcnt(12)
	v_fma_f32 v26, v30, v34, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v5, v27
	v_fmac_f32_e32 v26, v31, v35
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v6, v28
	v_fmac_f32_e32 v26, v32, v36
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v7, v29
	v_fmac_f32_e32 v26, v33, v37
	s_waitcnt vmcnt(10)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v38, v42
	s_waitcnt vmcnt(8)
	v_fmac_f32_e32 v26, v46, v50
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v39, v43
	v_fmac_f32_e32 v26, v47, v51
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v40, v44
	v_fmac_f32_e32 v26, v48, v52
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v41, v45
	v_fmac_f32_e32 v26, v49, v53
	s_waitcnt vmcnt(6)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v54, v58
	s_waitcnt vmcnt(4)
	v_fmac_f32_e32 v26, v62, v66
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v55, v59
	v_fmac_f32_e32 v26, v63, v67
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v56, v60
	v_fmac_f32_e32 v26, v64, v68
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v57, v61
	v_fmac_f32_e32 v26, v65, v69
	s_waitcnt vmcnt(2)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v70, v74
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v26, v78, v82
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v71, v75
	v_fmac_f32_e32 v26, v79, v83
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v72, v76
	v_fmac_f32_e32 v26, v80, v84
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v73, v77
	v_fmac_f32_e32 v26, v81, v85
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v90, v26, v4
	global_store_b32 v[12:13], v90, off offset:48
	global_load_b128 v[4:7], v[0:1], off offset:832
	global_load_b128 v[26:29], v[8:9], off
	global_load_b128 v[30:33], v[2:3], off offset:832
	global_load_b128 v[34:37], v[10:11], off
	global_load_b128 v[38:41], v[0:1], off offset:848
	global_load_b128 v[42:45], v[8:9], off offset:16
	global_load_b128 v[46:49], v[2:3], off offset:848
	global_load_b128 v[50:53], v[10:11], off offset:16
	global_load_b128 v[54:57], v[0:1], off offset:864
	global_load_b128 v[58:61], v[8:9], off offset:32
	global_load_b128 v[62:65], v[2:3], off offset:864
	global_load_b128 v[66:69], v[10:11], off offset:32
	global_load_b128 v[70:73], v[0:1], off offset:880
	global_load_b128 v[74:77], v[8:9], off offset:48
	global_load_b128 v[78:81], v[2:3], off offset:880
	global_load_b128 v[82:85], v[10:11], off offset:48
	v_cmp_gt_f32_e32 vcc_lo, v90, v14
	v_cndmask_b32_e32 v14, v14, v90, vcc_lo
	s_waitcnt vmcnt(14)
	v_fma_f32 v4, v4, v26, 0
	s_waitcnt vmcnt(12)
	v_fma_f32 v26, v30, v34, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v5, v27
	v_fmac_f32_e32 v26, v31, v35
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v6, v28
	v_fmac_f32_e32 v26, v32, v36
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v7, v29
	v_fmac_f32_e32 v26, v33, v37
	s_waitcnt vmcnt(10)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v38, v42
	s_waitcnt vmcnt(8)
	v_fmac_f32_e32 v26, v46, v50
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v39, v43
	v_fmac_f32_e32 v26, v47, v51
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v40, v44
	v_fmac_f32_e32 v26, v48, v52
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v41, v45
	v_fmac_f32_e32 v26, v49, v53
	s_waitcnt vmcnt(6)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v54, v58
	s_waitcnt vmcnt(4)
	v_fmac_f32_e32 v26, v62, v66
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v55, v59
	v_fmac_f32_e32 v26, v63, v67
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v56, v60
	v_fmac_f32_e32 v26, v64, v68
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v57, v61
	v_fmac_f32_e32 v26, v65, v69
	s_waitcnt vmcnt(2)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v70, v74
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v26, v78, v82
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v71, v75
	v_fmac_f32_e32 v26, v79, v83
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v72, v76
	v_fmac_f32_e32 v26, v80, v84
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v73, v77
	v_fmac_f32_e32 v26, v81, v85
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v91, v26, v4
	global_store_b32 v[12:13], v91, off offset:52
	global_load_b128 v[4:7], v[0:1], off offset:896
	global_load_b128 v[26:29], v[8:9], off
	global_load_b128 v[30:33], v[2:3], off offset:896
	global_load_b128 v[34:37], v[10:11], off
	global_load_b128 v[38:41], v[0:1], off offset:912
	global_load_b128 v[42:45], v[8:9], off offset:16
	global_load_b128 v[46:49], v[2:3], off offset:912
	global_load_b128 v[50:53], v[10:11], off offset:16
	global_load_b128 v[54:57], v[0:1], off offset:928
	global_load_b128 v[58:61], v[8:9], off offset:32
	global_load_b128 v[62:65], v[2:3], off offset:928
	global_load_b128 v[66:69], v[10:11], off offset:32
	global_load_b128 v[70:73], v[0:1], off offset:944
	global_load_b128 v[74:77], v[8:9], off offset:48
	global_load_b128 v[78:81], v[2:3], off offset:944
	global_load_b128 v[82:85], v[10:11], off offset:48
	v_cmp_gt_f32_e32 vcc_lo, v91, v14
	v_cndmask_b32_e32 v14, v14, v91, vcc_lo
	s_waitcnt vmcnt(14)
	v_fma_f32 v4, v4, v26, 0
	s_waitcnt vmcnt(12)
	v_fma_f32 v26, v30, v34, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v5, v27
	v_fmac_f32_e32 v26, v31, v35
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v6, v28
	v_fmac_f32_e32 v26, v32, v36
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v7, v29
	v_fmac_f32_e32 v26, v33, v37
	s_waitcnt vmcnt(10)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v38, v42
	s_waitcnt vmcnt(8)
	v_fmac_f32_e32 v26, v46, v50
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v39, v43
	v_fmac_f32_e32 v26, v47, v51
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v40, v44
	v_fmac_f32_e32 v26, v48, v52
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v41, v45
	v_fmac_f32_e32 v26, v49, v53
	s_waitcnt vmcnt(6)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v54, v58
	s_waitcnt vmcnt(4)
	v_fmac_f32_e32 v26, v62, v66
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v55, v59
	v_fmac_f32_e32 v26, v63, v67
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v56, v60
	v_fmac_f32_e32 v26, v64, v68
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v57, v61
	v_fmac_f32_e32 v26, v65, v69
	s_waitcnt vmcnt(2)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v70, v74
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v26, v78, v82
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v71, v75
	v_fmac_f32_e32 v26, v79, v83
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v72, v76
	v_fmac_f32_e32 v26, v80, v84
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v4, v73, v77
	v_fmac_f32_e32 v26, v81, v85
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v92, v26, v4
	global_store_b32 v[12:13], v92, off offset:56
	global_load_b128 v[4:7], v[0:1], off offset:960
	global_load_b128 v[26:29], v[8:9], off
	global_load_b128 v[30:33], v[2:3], off offset:960
	global_load_b128 v[34:37], v[10:11], off
	global_load_b128 v[38:41], v[0:1], off offset:976
	global_load_b128 v[42:45], v[8:9], off offset:16
	global_load_b128 v[46:49], v[2:3], off offset:976
	global_load_b128 v[50:53], v[10:11], off offset:16
	global_load_b128 v[54:57], v[0:1], off offset:992
	global_load_b128 v[58:61], v[8:9], off offset:32
	global_load_b128 v[62:65], v[2:3], off offset:992
	global_load_b128 v[66:69], v[10:11], off offset:32
	global_load_b128 v[70:73], v[0:1], off offset:1008
	global_load_b128 v[74:77], v[8:9], off offset:48
	global_load_b128 v[78:81], v[2:3], off offset:1008
	global_load_b128 v[82:85], v[10:11], off offset:48
	global_load_b128 v[86:89], v[12:13], off
	v_cmp_gt_f32_e32 vcc_lo, v92, v14
	global_load_b128 v[0:3], v[12:13], off offset:32
	v_cndmask_b32_e32 v14, v14, v92, vcc_lo
	s_waitcnt vmcnt(16)
	v_fma_f32 v4, v4, v26, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v4, v5, v27
	s_waitcnt vmcnt(14)
	v_fma_f32 v5, v30, v34, 0
	v_dual_fmac_f32 v4, v6, v28 :: v_dual_fmac_f32 v5, v31, v35
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v4, v7, v29 :: v_dual_fmac_f32 v5, v32, v36
	global_load_b128 v[26:29], v[12:13], off offset:16
	s_waitcnt vmcnt(13)
	v_dual_fmac_f32 v4, v38, v42 :: v_dual_fmac_f32 v5, v33, v37
	s_waitcnt vmcnt(11)
	v_dual_fmac_f32 v4, v39, v43 :: v_dual_fmac_f32 v5, v46, v50
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v4, v40, v44 :: v_dual_fmac_f32 v5, v47, v51
	v_dual_fmac_f32 v4, v41, v45 :: v_dual_fmac_f32 v5, v48, v52
	s_waitcnt vmcnt(9)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v4, v54, v58 :: v_dual_fmac_f32 v5, v49, v53
	s_waitcnt vmcnt(7)
	v_dual_fmac_f32 v4, v55, v59 :: v_dual_fmac_f32 v5, v62, v66
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v4, v56, v60 :: v_dual_fmac_f32 v5, v63, v67
	v_dual_fmac_f32 v4, v57, v61 :: v_dual_fmac_f32 v5, v64, v68
	s_waitcnt vmcnt(5)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v4, v70, v74 :: v_dual_fmac_f32 v5, v65, v69
	s_waitcnt vmcnt(3)
	v_dual_fmac_f32 v4, v71, v75 :: v_dual_fmac_f32 v5, v78, v82
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v4, v72, v76 :: v_dual_fmac_f32 v5, v79, v83
	v_dual_fmac_f32 v4, v73, v77 :: v_dual_fmac_f32 v5, v80, v84
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v5, v81, v85
	v_mul_f32_e32 v30, v5, v4
	global_store_b32 v[12:13], v30, off offset:60
	global_load_b128 v[4:7], v[12:13], off offset:48
	v_cmp_gt_f32_e32 vcc_lo, v30, v14
	v_cndmask_b32_e32 v14, v14, v30, vcc_lo
	s_waitcnt vmcnt(3)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_div_scale_f32 v15, null, v14, v14, v86
	v_div_scale_f32 v17, null, v14, v14, v87
	v_div_scale_f32 v19, null, v14, v14, v88
	v_rcp_f32_e32 v34, v15
	v_div_scale_f32 v21, null, v14, v14, v89
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v35, v17
	v_rcp_f32_e32 v36, v19
	v_div_scale_f32 v16, vcc_lo, v86, v14, v86
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(TRANS32_DEP_3)
	v_rcp_f32_e32 v37, v21
	v_div_scale_f32 v18, s0, v87, v14, v87
	v_fma_f32 v43, -v15, v34, 1.0
	v_div_scale_f32 v20, s1, v88, v14, v88
	v_fma_f32 v44, -v17, v35, 1.0
	s_delay_alu instid0(TRANS32_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f32 v45, -v19, v36, 1.0
	v_fmac_f32_e32 v34, v43, v34
	v_div_scale_f32 v22, s2, v89, v14, v89
	s_delay_alu instid0(TRANS32_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f32 v46, -v21, v37, 1.0
	v_dual_fmac_f32 v35, v44, v35 :: v_dual_fmac_f32 v36, v45, v36
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v43, v16, v34
	v_fmac_f32_e32 v37, v46, v37
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_mul_f32 v44, v18, v35 :: v_dual_mul_f32 v45, v20, v36
	v_fma_f32 v51, -v15, v43, v16
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v46, v22, v37
	v_fma_f32 v52, -v17, v44, v18
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f32 v53, -v19, v45, v20
	v_fmac_f32_e32 v43, v51, v34
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v54, -v21, v46, v22
	v_dual_fmac_f32 v44, v52, v35 :: v_dual_fmac_f32 v45, v53, v36
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v15, -v15, v43, v16
	v_fmac_f32_e32 v46, v54, v37
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f32 v16, -v17, v44, v18
	v_fma_f32 v17, -v19, v45, v20
	s_delay_alu instid0(VALU_DEP_4)
	v_div_fmas_f32 v15, v15, v34, v43
	s_mov_b32 vcc_lo, s0
	v_fma_f32 v18, -v21, v46, v22
	v_div_fmas_f32 v16, v16, v35, v44
	s_mov_b32 vcc_lo, s1
	v_div_fixup_f32 v15, v15, v14, v86
	v_div_fmas_f32 v17, v17, v36, v45
	s_mov_b32 vcc_lo, s2
	v_div_fixup_f32 v16, v16, v14, v87
	v_div_fmas_f32 v18, v18, v37, v46
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fixup_f32 v17, v17, v14, v88
	v_div_fixup_f32 v18, v18, v14, v89
	s_waitcnt vmcnt(1)
	v_div_scale_f32 v23, null, v14, v14, v26
	v_div_scale_f32 v25, null, v14, v14, v27
	v_div_scale_f32 v31, null, v14, v14, v28
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_rcp_f32_e32 v38, v23
	v_div_scale_f32 v33, null, v14, v14, v29
	v_rcp_f32_e32 v39, v25
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v40, v31
	v_div_scale_f32 v24, s3, v26, v14, v26
	v_rcp_f32_e32 v41, v33
	v_div_scale_f32 v30, s4, v27, v14, v27
	v_fma_f32 v47, -v23, v38, 1.0
	v_div_scale_f32 v32, s5, v28, v14, v28
	s_delay_alu instid0(TRANS32_DEP_3) | instskip(NEXT) | instid1(TRANS32_DEP_2)
	v_fma_f32 v48, -v25, v39, 1.0
	v_fma_f32 v49, -v31, v40, 1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(TRANS32_DEP_1)
	v_fmac_f32_e32 v38, v47, v38
	v_div_scale_f32 v42, s6, v29, v14, v29
	v_fma_f32 v50, -v33, v41, 1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_dual_fmac_f32 v39, v48, v39 :: v_dual_fmac_f32 v40, v49, v40
	v_mul_f32_e32 v47, v24, v38
	s_mov_b32 vcc_lo, s3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v41, v50, v41
	v_dual_mul_f32 v48, v30, v39 :: v_dual_mul_f32 v49, v32, v40
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v55, -v23, v47, v24
	v_mul_f32_e32 v50, v42, v41
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f32 v56, -v25, v48, v30
	v_fma_f32 v57, -v31, v49, v32
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fmac_f32_e32 v47, v55, v38
	v_fma_f32 v58, -v33, v50, v42
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_fmac_f32 v48, v56, v39 :: v_dual_fmac_f32 v49, v57, v40
	v_fma_f32 v19, -v23, v47, v24
	v_div_scale_f32 v23, null, v14, v14, v0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fmac_f32_e32 v50, v58, v41
	v_fma_f32 v20, -v25, v48, v30
	v_fma_f32 v21, -v31, v49, v32
	v_div_fmas_f32 v19, v19, v38, v47
	s_mov_b32 vcc_lo, s4
	v_fma_f32 v22, -v33, v50, v42
	v_div_fmas_f32 v20, v20, v39, v48
	s_mov_b32 vcc_lo, s5
	v_div_scale_f32 v25, null, v14, v14, v1
	v_div_fmas_f32 v21, v21, v40, v49
	s_mov_b32 vcc_lo, s6
	v_div_fixup_f32 v20, v20, v14, v27
	v_div_fmas_f32 v22, v22, v41, v50
	v_div_scale_f32 v27, null, v14, v14, v2
	v_rcp_f32_e32 v38, v23
	v_rcp_f32_e32 v39, v25
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_div_fixup_f32 v22, v22, v14, v29
	v_div_scale_f32 v29, null, v14, v14, v3
	v_rcp_f32_e32 v40, v27
	v_div_scale_f32 v24, vcc_lo, v0, v14, v0
	v_rcp_f32_e32 v41, v29
	v_div_fixup_f32 v19, v19, v14, v26
	v_fma_f32 v47, -v23, v38, 1.0
	s_delay_alu instid0(TRANS32_DEP_3)
	v_fma_f32 v48, -v25, v39, 1.0
	v_div_scale_f32 v26, s0, v1, v14, v1
	s_waitcnt vmcnt(0)
	v_div_scale_f32 v31, null, v14, v14, v4
	v_div_scale_f32 v33, null, v14, v14, v5
	v_div_scale_f32 v35, null, v14, v14, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_rcp_f32_e32 v42, v31
	v_div_scale_f32 v37, null, v14, v14, v7
	v_rcp_f32_e32 v43, v33
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v44, v35
	v_fma_f32 v49, -v27, v40, 1.0
	v_rcp_f32_e32 v45, v37
	v_fmac_f32_e32 v38, v47, v38
	v_fma_f32 v50, -v29, v41, 1.0
	v_fmac_f32_e32 v39, v48, v39
	v_fma_f32 v51, -v31, v42, 1.0
	v_div_fixup_f32 v21, v21, v14, v28
	v_div_scale_f32 v28, s1, v2, v14, v2
	v_fmac_f32_e32 v40, v49, v40
	v_fma_f32 v52, -v33, v43, 1.0
	v_mul_f32_e32 v47, v24, v38
	v_div_scale_f32 v30, s2, v3, v14, v3
	v_fmac_f32_e32 v41, v50, v41
	v_fma_f32 v53, -v35, v44, 1.0
	v_mul_f32_e32 v48, v26, v39
	v_div_scale_f32 v32, s3, v4, v14, v4
	v_fmac_f32_e32 v42, v51, v42
	v_fma_f32 v54, -v37, v45, 1.0
	v_mul_f32_e32 v49, v28, v40
	v_div_scale_f32 v34, s4, v5, v14, v5
	v_fmac_f32_e32 v43, v52, v43
	v_fma_f32 v55, -v23, v47, v24
	v_mul_f32_e32 v50, v30, v41
	v_div_scale_f32 v36, s5, v6, v14, v6
	v_fmac_f32_e32 v44, v53, v44
	v_fma_f32 v56, -v25, v48, v26
	v_mul_f32_e32 v51, v32, v42
	v_div_scale_f32 v46, s6, v7, v14, v7
	v_fmac_f32_e32 v45, v54, v45
	v_fma_f32 v57, -v27, v49, v28
	v_dual_mul_f32 v52, v34, v43 :: v_dual_fmac_f32 v47, v55, v38
	v_fma_f32 v58, -v29, v50, v30
	v_mul_f32_e32 v53, v36, v44
	v_fmac_f32_e32 v48, v56, v39
	v_fma_f32 v59, -v31, v51, v32
	v_dual_mul_f32 v54, v46, v45 :: v_dual_fmac_f32 v49, v57, v40
	v_fma_f32 v60, -v33, v52, v34
	v_fma_f32 v23, -v23, v47, v24
	v_fmac_f32_e32 v50, v58, v41
	v_fma_f32 v61, -v35, v53, v36
	v_fma_f32 v24, -v25, v48, v26
	v_fmac_f32_e32 v51, v59, v42
	v_fma_f32 v62, -v37, v54, v46
	v_fma_f32 v25, -v27, v49, v28
	v_fmac_f32_e32 v52, v60, v43
	v_div_fmas_f32 v23, v23, v38, v47
	s_mov_b32 vcc_lo, s0
	v_fma_f32 v26, -v29, v50, v30
	v_fmac_f32_e32 v53, v61, v44
	v_div_fmas_f32 v24, v24, v39, v48
	s_mov_b32 vcc_lo, s1
	v_fma_f32 v27, -v31, v51, v32
	v_fmac_f32_e32 v54, v62, v45
	v_div_fmas_f32 v25, v25, v40, v49
	s_mov_b32 vcc_lo, s2
	v_fma_f32 v28, -v33, v52, v34
	v_div_fixup_f32 v0, v23, v14, v0
	v_div_fmas_f32 v23, v26, v41, v50
	s_mov_b32 vcc_lo, s3
	v_fma_f32 v29, -v35, v53, v36
	v_div_fixup_f32 v1, v24, v14, v1
	v_div_fmas_f32 v24, v27, v42, v51
	s_mov_b32 vcc_lo, s4
	v_fma_f32 v30, -v37, v54, v46
	v_div_fixup_f32 v2, v25, v14, v2
	v_div_fmas_f32 v25, v28, v43, v52
	s_mov_b32 vcc_lo, s5
	v_div_fixup_f32 v3, v23, v14, v3
	v_div_fmas_f32 v26, v29, v44, v53
	s_mov_b32 vcc_lo, s6
	v_div_fixup_f32 v4, v24, v14, v4
	v_div_fmas_f32 v27, v30, v45, v54
	v_div_fixup_f32 v5, v25, v14, v5
	v_div_fixup_f32 v6, v26, v14, v6
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v14
	s_delay_alu instid0(VALU_DEP_4)
	v_div_fixup_f32 v7, v27, v14, v7
	s_clause 0x3
	global_store_b128 v[12:13], v[15:18], off
	global_store_b128 v[12:13], v[19:22], off offset:16
	global_store_b128 v[12:13], v[0:3], off offset:32
	global_store_b128 v[12:13], v[4:7], off offset:48
	global_load_b32 v0, v[8:9], off offset:64
	global_load_b32 v1, v[10:11], off offset:64
	v_cndmask_b32_e64 v2, 1.0, 0x4f800000, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v2, v14, v2
	v_log_f32_e32 v2, v2
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v3, 0x3f317217, v2
	v_cmp_gt_f32_e64 s0, 0x7f800000, |v2|
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v4, 0x3f317217, v2, -v3
	v_fmamk_f32 v4, v2, 0x3377d1cf, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v3, v3, v4
	v_cndmask_b32_e64 v2, v2, v3, s0
	v_cndmask_b32_e64 v3, 0, 0x41b17218, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v2, v2, v3
	s_waitcnt vmcnt(1)
	v_add_f32_e32 v0, v2, v0
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v0, v0, v1
	global_store_b32 v[12:13], v0, off offset:64
.LBB7_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z25felsensteinhelper16pairediiiiiiiiiPKiS0_PKfS2_S2_Pf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 344
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 93
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end7:
	.size	_Z25felsensteinhelper16pairediiiiiiiiiPKiS0_PKfS2_S2_Pf, .Lfunc_end7-_Z25felsensteinhelper16pairediiiiiiiiiPKiS0_PKfS2_S2_Pf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 8036
; NumSgprs: 22
; NumVgprs: 93
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 11
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 93
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z14sumfinalpairediiiPfS_S_ ; -- Begin function _Z14sumfinalpairediiiPfS_S_
	.globl	_Z14sumfinalpairediiiPfS_S_
	.p2align	8
	.type	_Z14sumfinalpairediiiPfS_S_,@function
_Z14sumfinalpairediiiPfS_S_:            ; @_Z14sumfinalpairediiiPfS_S_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x34
	s_load_b128 s[4:7], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mad_u64_u32 v[4:5], null, s15, s2, v[0:1]
	s_mul_i32 s2, s6, s5
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cmp_gt_i32_e32 vcc_lo, s2, v4
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB8_5
; %bb.1:
	s_clause 0x1
	s_load_b64 s[8:9], s[0:1], 0x20
	s_load_b128 s[0:3], s[0:1], 0x10
	v_ashrrev_i32_e32 v5, 31, v4
	v_mov_b32_e32 v7, 0
	s_cmp_lt_i32 s4, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[0:1], 2, v[4:5]
	v_mad_u64_u32 v[2:3], null, v4, s4, v[4:5]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s8, v0
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v1, vcc_lo, s9, v1, vcc_lo
	global_store_b32 v[0:1], v7, off
	s_cbranch_scc1 .LBB8_4
; %bb.2:                                ; %.lr.ph.preheader
	s_ashr_i32 s5, s6, 31
	v_add_nc_u32_e32 v4, v4, v5
	s_add_i32 s6, s6, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s6, s6, s5
	v_cvt_f32_u32_e32 v3, s6
	s_sub_i32 s7, 0, s6
	v_xor_b32_e32 v4, v4, v5
	v_xor_b32_e32 v5, s5, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v3, v3
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v3, 0x4f7ffffe, v3
	v_cvt_u32_f32_e32 v3, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v6, s7, v3
	v_mul_hi_u32 v6, v3, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, v3, v6
	v_mul_hi_u32 v3, v4, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v6, v3, s6
	v_sub_nc_u32_e32 v4, v4, v6
	v_add_nc_u32_e32 v6, 1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v7, s6, v4
	v_cmp_le_u32_e32 vcc_lo, s6, v4
	v_dual_cndmask_b32 v3, v3, v6 :: v_dual_cndmask_b32 v4, v4, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v6, 1, v3
	v_cmp_le_u32_e32 vcc_lo, s6, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v3, v3, v6, vcc_lo
	v_xor_b32_e32 v3, v3, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v3, v3, v5
	v_mul_lo_u32 v4, v3, s4
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[6:7], 2, v[2:3]
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s2, v6
	v_lshlrev_b64 v[8:9], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v4, vcc_lo, s3, v7, vcc_lo
	v_mov_b32_e32 v7, 0
	v_add_co_u32 v5, vcc_lo, s0, v8
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v6, vcc_lo, s1, v9, vcc_lo
	s_mov_b32 s0, s4
.LBB8_3:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	global_load_b32 v8, v[5:6], off
	global_load_b32 v9, v[3:4], off
	v_add_co_u32 v3, vcc_lo, v3, 4
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
	v_add_co_u32 v5, vcc_lo, v5, 4
	v_add_co_ci_u32_e32 v6, vcc_lo, 0, v6, vcc_lo
	s_add_i32 s0, s0, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s0, 0
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v7, v8, v9
	global_store_b32 v[0:1], v7, off
	s_cbranch_scc1 .LBB8_3
.LBB8_4:                                ; %._crit_edge
	v_add_nc_u32_e32 v2, s4, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v7
	global_load_b32 v2, v[2:3], off
	v_cndmask_b32_e64 v3, 1.0, 0x4f800000, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v3, v7, v3
	v_log_f32_e32 v3, v3
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v4, 0x3f317217, v3
	v_cmp_gt_f32_e64 s0, 0x7f800000, |v3|
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v5, 0x3f317217, v3, -v4
	v_fmamk_f32 v5, v3, 0x3377d1cf, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v4, v4, v5
	v_cndmask_b32_e64 v3, v3, v4, s0
	v_cndmask_b32_e64 v4, 0, 0x41b17218, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v3, v3, v4
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v2, v3, v2
	global_store_b32 v[0:1], v2, off
.LBB8_5:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14sumfinalpairediiiPfS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end8:
	.size	_Z14sumfinalpairediiiPfS_S_, .Lfunc_end8-_Z14sumfinalpairediiiPfS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 656
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z7sumcatsiiPfS_S_      ; -- Begin function _Z7sumcatsiiPfS_S_
	.globl	_Z7sumcatsiiPfS_S_
	.p2align	8
	.type	_Z7sumcatsiiPfS_S_,@function
_Z7sumcatsiiPfS_S_:                     ; @_Z7sumcatsiiPfS_S_
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x2c
	s_load_b64 s[2:3], s[0:1], 0x0
	s_mov_b32 s32, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	s_mov_b32 s4, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB9_4
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x8
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x18
	s_cmp_lt_i32 s2, 2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, vcc_lo, s6, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s7, v2, vcc_lo
	s_load_b32 s8, s[4:5], 0x0
	v_add_co_u32 v22, vcc_lo, s0, v1
	global_load_b32 v0, v[3:4], off
	v_add_co_ci_u32_e32 v23, vcc_lo, s1, v2, vcc_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f32_e32 v0, s8, v0
	global_store_b32 v[22:23], v0, off
	s_cbranch_scc1 .LBB9_4
; %bb.2:                                ; %.lr.ph.preheader
	s_ashr_i32 s1, s3, 31
	s_mov_b32 s0, s3
	v_mov_b32_e32 v26, 0
	s_lshl_b64 s[8:9], s[0:1], 2
	s_add_i32 s1, s2, -1
	s_add_u32 s0, s6, s8
	s_addc_u32 s2, s7, s9
	v_add_co_u32 v24, vcc_lo, s0, v1
	v_add_co_ci_u32_e32 v25, vcc_lo, s2, v2, vcc_lo
	s_add_u32 s10, s4, 4
	s_addc_u32 s11, s5, 0
.LBB9_3:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	global_load_b32 v1, v26, s[10:11]
	global_load_b32 v2, v[24:25], off
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, _Z9logsumexpff@rel32@lo+4
	s_addc_u32 s3, s3, _Z9logsumexpff@rel32@hi+12
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v1, v1, v2
	s_swappc_b64 s[30:31], s[2:3]
	v_add_co_u32 v24, vcc_lo, v24, s8
	s_add_i32 s1, s1, -1
	v_add_co_ci_u32_e32 v25, vcc_lo, s9, v25, vcc_lo
	s_add_u32 s10, s10, 4
	s_addc_u32 s11, s11, 0
	s_cmp_lg_u32 s1, 0
	global_store_b32 v[22:23], v0, off
	s_cbranch_scc1 .LBB9_3
.LBB9_4:                                ; %.loopexit
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7sumcatsiiPfS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 27
		.amdhsa_next_free_sgpr 33
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end9:
	.size	_Z7sumcatsiiPfS_S_, .Lfunc_end9-_Z7sumcatsiiPfS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 308
; NumSgprs: 35
; NumVgprs: 27
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 4
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 35
; NumVGPRsForWavesPerEU: 27
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z17felsensteinhelperiiiiiiiPKiS0_PKfS2_S2_Pf ; -- Begin function _Z17felsensteinhelperiiiiiiiPKiS0_PKfS2_S2_Pf
	.globl	_Z17felsensteinhelperiiiiiiiPKiS0_PKfS2_S2_Pf
	.p2align	8
	.type	_Z17felsensteinhelperiiiiiiiPKiS0_PKfS2_S2_Pf,@function
_Z17felsensteinhelperiiiiiiiPKiS0_PKfS2_S2_Pf: ; @_Z17felsensteinhelperiiiiiiiPKiS0_PKfS2_S2_Pf
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x5c
	s_load_b32 s3, s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[6:7], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v6
	s_cbranch_execz .LBB10_11
; %bb.1:
	s_load_b256 s[4:11], s[0:1], 0x20
	v_ashrrev_i32_e32 v7, 31, v6
	s_mov_b32 s18, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[6:7]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	global_load_b32 v0, v[0:1], off
	s_clause 0x1
	s_load_b32 s16, s[0:1], 0x0
	s_load_b128 s[4:7], s[0:1], 0x40
	s_waitcnt lgkmcnt(0)
	s_cmp_gt_i32 s16, 0
	s_cselect_b32 s17, -1, 0
	s_cmp_lt_i32 s16, 1
	s_waitcnt vmcnt(1)
	v_mad_u64_u32 v[4:5], null, v2, s16, v[2:3]
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[2:3], null, v0, s16, v[0:1]
	v_mad_u64_u32 v[0:1], null, v6, s16, v[6:7]
	s_cbranch_scc1 .LBB10_6
; %bb.2:                                ; %.lr.ph88
	s_load_b64 s[2:3], s[0:1], 0x14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ashrrev_i32_e32 v3, 31, v2
	v_ashrrev_i32_e32 v5, 31, v4
	v_mov_b32_e32 v1, 0
	s_mul_i32 s1, s16, s16
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[6:7], 2, v[2:3]
	v_lshlrev_b64 v[8:9], 2, v[4:5]
	v_mov_b32_e32 v3, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v5, vcc_lo, s4, v6
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v7, vcc_lo, s10, v8
	v_add_co_ci_u32_e32 v8, vcc_lo, s11, v9, vcc_lo
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s0, s3, s1
	s_mul_i32 s2, s2, s1
.LBB10_3:                               ; %.lr.ph.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB10_4 Depth 2
	s_ashr_i32 s1, s0, 31
	v_dual_mov_b32 v10, v8 :: v_dual_mov_b32 v9, v7
	s_lshl_b64 s[12:13], s[0:1], 2
	v_dual_mov_b32 v12, v6 :: v_dual_mov_b32 v11, v5
	s_add_u32 s12, s8, s12
	s_addc_u32 s13, s9, s13
	s_ashr_i32 s3, s2, 31
	v_dual_mov_b32 v13, 0 :: v_dual_mov_b32 v14, 0
	s_lshl_b64 s[14:15], s[2:3], 2
	s_mov_b32 s1, s16
	s_add_u32 s14, s8, s14
	s_addc_u32 s15, s9, s15
.LBB10_4:                               ; %.lr.ph
                                        ;   Parent Loop BB10_3 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_b32 v15, v[9:10], off
	s_clause 0x1
	global_load_b32 v16, v1, s[14:15]
	global_load_b32 v17, v1, s[12:13]
	global_load_b32 v18, v[11:12], off
	v_add_co_u32 v11, vcc_lo, v11, 4
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v12, vcc_lo
	s_add_i32 s1, s1, -1
	v_add_co_u32 v9, vcc_lo, v9, 4
	s_add_u32 s12, s12, 4
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v10, vcc_lo
	s_addc_u32 s13, s13, 0
	s_add_u32 s14, s14, 4
	s_addc_u32 s15, s15, 0
	s_cmp_lg_u32 s1, 0
	s_waitcnt vmcnt(0)
	v_dual_fmac_f32 v14, v16, v15 :: v_dual_fmac_f32 v13, v17, v18
	s_cbranch_scc1 .LBB10_4
; %bb.5:                                ; %._crit_edge
                                        ;   in Loop: Header=BB10_3 Depth=1
	v_add_nc_u32_e32 v9, s18, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_mul_f32_e32 v11, v14, v13
	s_add_i32 s18, s18, 1
	s_add_i32 s0, s0, s16
	s_add_i32 s2, s2, s16
	v_ashrrev_i32_e32 v10, 31, v9
	v_cmp_gt_f32_e32 vcc_lo, v11, v3
	s_cmp_eq_u32 s18, s16
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	v_cndmask_b32_e32 v3, v3, v11, vcc_lo
	v_add_co_u32 v9, vcc_lo, s6, v9
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v10, vcc_lo, s7, v10, vcc_lo
	global_store_b32 v[9:10], v11, off
	s_cbranch_scc0 .LBB10_3
	s_branch .LBB10_7
.LBB10_6:
	v_mov_b32_e32 v3, 0
.LBB10_7:                               ; %.preheader
	s_and_not1_b32 vcc_lo, exec_lo, s17
	s_cbranch_vccnz .LBB10_10
; %bb.8:                                ; %.lr.ph91.preheader
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	s_mov_b32 s0, s16
	v_lshlrev_b64 v[5:6], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, s6, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v6, vcc_lo
.LBB10_9:                               ; %.lr.ph91
                                        ; =>This Inner Loop Header: Depth=1
	global_load_b32 v1, v[5:6], off
	s_add_i32 s0, s0, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	s_cmp_lg_u32 s0, 0
	s_waitcnt vmcnt(0)
	v_div_scale_f32 v7, null, v3, v3, v1
	v_div_scale_f32 v10, vcc_lo, v1, v3, v1
	v_rcp_f32_e32 v8, v7
	s_waitcnt_depctr 0xfff
	v_fma_f32 v9, -v7, v8, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v8, v9, v8
	v_mul_f32_e32 v9, v10, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v11, -v7, v9, v10
	v_fmac_f32_e32 v9, v11, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v7, -v7, v9, v10
	v_div_fmas_f32 v7, v7, v8, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_div_fixup_f32 v1, v7, v3, v1
	global_store_b32 v[5:6], v1, off
	v_add_co_u32 v5, vcc_lo, v5, 4
	v_add_co_ci_u32_e32 v6, vcc_lo, 0, v6, vcc_lo
	s_cbranch_scc1 .LBB10_9
.LBB10_10:                              ; %._crit_edge92
	v_add_nc_u32_e32 v1, s16, v4
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_nc_u32_e32 v4, s16, v2
	v_add_nc_u32_e32 v0, s16, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v2, 31, v1
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v1, vcc_lo, s10, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s11, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v4, vcc_lo, s4, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
	global_load_b32 v2, v[1:2], off
	global_load_b32 v4, v[4:5], off
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v3
	v_cndmask_b32_e64 v1, 1.0, 0x4f800000, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v1, v3, v1
	v_log_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v3, 0x3f317217, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v5, 0x3f317217, v1, -v3
	v_fmamk_f32 v5, v1, 0x3377d1cf, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_f32_e32 v3, v3, v5
	v_cndmask_b32_e64 v5, 0, 0x41b17218, vcc_lo
	v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v1|
	v_cndmask_b32_e32 v1, v1, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v3, v1, v5
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	s_waitcnt vmcnt(1)
	v_add_f32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v2, v2, v4
	global_store_b32 v[0:1], v2, off
.LBB10_11:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17felsensteinhelperiiiiiiiPKiS0_PKfS2_S2_Pf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 336
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 19
		.amdhsa_next_free_sgpr 19
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end10:
	.size	_Z17felsensteinhelperiiiiiiiPKiS0_PKfS2_S2_Pf, .Lfunc_end10-_Z17felsensteinhelperiiiiiiiPKiS0_PKfS2_S2_Pf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1012
; NumSgprs: 21
; NumVgprs: 19
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 21
; NumVGPRsForWavesPerEU: 19
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z23felsensteindinucleotideiiiiiiPKiS0_PKfS2_PiPfS4_S4_ ; -- Begin function _Z23felsensteindinucleotideiiiiiiPKiS0_PKfS2_PiPfS4_S4_
	.globl	_Z23felsensteindinucleotideiiiiiiPKiS0_PKfS2_PiPfS4_S4_
	.p2align	8
	.type	_Z23felsensteindinucleotideiiiiiiPKiS0_PKfS2_PiPfS4_S4_,@function
_Z23felsensteindinucleotideiiiiiiPKiS0_PKfS2_PiPfS4_S4_: ; @_Z23felsensteindinucleotideiiiiiiPKiS0_PKfS2_PiPfS4_S4_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x64
	s_load_b128 s[16:19], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mul_i32 s2, s19, s18
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cmp_gt_i32_e32 vcc_lo, s2, v1
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB11_23
; %bb.1:
	s_ashr_i32 s18, s19, 31
	v_ashrrev_i32_e32 v2, 31, v1
	s_add_i32 s2, s19, s18
	s_load_b64 s[20:21], s[0:1], 0x10
	s_xor_b32 s22, s2, s18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v1, v2
	v_cvt_f32_u32_e32 v0, s22
	s_sub_i32 s2, 0, s22
	v_xor_b32_e32 v4, v4, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v0, v0
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	v_cvt_u32_f32_e32 v0, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v3, s2, v0
	s_load_b512 s[0:15], s[0:1], 0x18
	v_mul_hi_u32 v3, v0, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v0, v3
	v_mul_hi_u32 v0, v4, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v3, v0, s22
	v_sub_nc_u32_e32 v3, v4, v3
	v_add_nc_u32_e32 v4, 1, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v5, s22, v3
	v_cmp_le_u32_e32 vcc_lo, s22, v3
	v_dual_cndmask_b32 v3, v3, v5 :: v_dual_cndmask_b32 v0, v0, v4
	v_xor_b32_e32 v5, s18, v2
	s_add_i32 s18, s16, 1
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s21, 1
	v_cmp_le_u32_e32 vcc_lo, s22, v3
	v_add_nc_u32_e32 v4, 1, v0
	s_mov_b32 s22, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v0, v0, v4, vcc_lo
	v_xor_b32_e32 v3, v0, v5
	v_mul_lo_u32 v0, v1, s20
	s_delay_alu instid0(VALU_DEP_2)
	v_sub_nc_u32_e32 v25, v3, v5
	s_cbranch_scc1 .LBB11_7
; %bb.2:                                ; %.lr.ph176
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v3, v25, s19
	v_sub_nc_u32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s8, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s9, v4, vcc_lo
	s_ashr_i32 s8, s17, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_add_i32 s9, s17, s8
	global_load_b32 v4, v[3:4], off
	s_xor_b32 s9, s9, s8
	v_cvt_f32_u32_e32 v3, s9
	s_sub_i32 s19, 0, s9
	s_cmp_gt_i32 s16, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v3, v3
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v3, 0x4f7ffffe, v3
	v_cvt_u32_f32_e32 v3, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v5, s19, v3
	v_mul_hi_u32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, v3, v5
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v6, 31, v4
	v_add_nc_u32_e32 v7, v4, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v5, v7, v6
	v_xor_b32_e32 v6, s8, v6
	s_cselect_b32 s8, -1, 0
	v_mul_hi_u32 v3, v5, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v7, v3, s9
	v_sub_nc_u32_e32 v5, v5, v7
	v_add_nc_u32_e32 v7, 1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_subrev_nc_u32_e32 v8, s9, v5
	v_cmp_le_u32_e32 vcc_lo, s9, v5
	v_cndmask_b32_e32 v3, v3, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v5, v5, v8 :: v_dual_mov_b32 v8, 0
	v_add_nc_u32_e32 v7, 1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e32 vcc_lo, s9, v5
	v_cndmask_b32_e32 v3, v3, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v3, v3, v6
	v_sub_nc_u32_e32 v6, v3, v6
	v_mul_lo_u32 v3, v0, s18
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v5, v6, s17
	v_sub_nc_u32_e32 v7, v4, v5
.LBB11_3:                               ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB11_5 Depth 2
	s_and_not1_b32 vcc_lo, exec_lo, s8
	s_cbranch_vccnz .LBB11_6
; %bb.4:                                ; %.lr.ph
                                        ;   in Loop: Header=BB11_3 Depth=1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_ashrrev_i32_e32 v4, 31, v3
	s_mul_i32 s9, s22, s17
	v_add_lshl_u32 v9, s9, v6, 2
	v_add_lshl_u32 v10, s9, v7, 2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[3:4]
	s_mov_b32 s9, 0
	v_add_co_u32 v4, vcc_lo, s12, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s13, v5, vcc_lo
.LBB11_5:                               ;   Parent Loop BB11_3 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_and_or_b32 v11, s9, 3, v10
	s_lshr_b32 s19, s9, 2
	s_add_i32 s9, s9, 1
	v_add_nc_u32_e32 v13, s19, v9
	s_cmp_lg_u32 s16, s9
	v_ashrrev_i32_e32 v12, 31, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v14, 31, v13
	v_lshlrev_b64 v[11:12], 2, v[11:12]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[13:14], 2, v[13:14]
	v_add_co_u32 v11, vcc_lo, s10, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v12, vcc_lo, s11, v12, vcc_lo
	v_add_co_u32 v13, vcc_lo, s10, v13
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v14, vcc_lo, s11, v14, vcc_lo
	s_clause 0x1
	global_load_b32 v13, v[13:14], off
	global_load_b32 v11, v[11:12], off
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v11, v13, v11
	global_store_b32 v[4:5], v11, off
	v_add_co_u32 v4, vcc_lo, v4, 4
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
	s_cbranch_scc1 .LBB11_5
.LBB11_6:                               ; %._crit_edge
                                        ;   in Loop: Header=BB11_3 Depth=1
	v_add_nc_u32_e32 v9, s22, v0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v3, s18, v3
	s_add_i32 s22, s22, 1
	s_cmp_lg_u32 s22, s21
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, v9, s18, s[16:17]
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_add_co_u32 v4, vcc_lo, s12, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s13, v5, vcc_lo
	global_store_b32 v[4:5], v8, off
	s_cbranch_scc1 .LBB11_3
.LBB11_7:                               ; %._crit_edge177
	s_cmp_ge_i32 s21, s20
	s_cbranch_scc1 .LBB11_19
; %bb.8:                                ; %.lr.ph192
	s_delay_alu instid0(VALU_DEP_2)
	v_add_nc_u32_e32 v3, s21, v0
	v_mul_lo_u32 v26, v25, s20
	s_cmp_gt_i32 s16, 0
	s_mul_i32 s11, s16, s16
	s_cselect_b32 s10, -1, 0
	v_mul_lo_u32 v3, v3, s18
	s_mov_b32 s8, s21
.LBB11_9:                               ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB11_11 Depth 2
                                        ;       Child Loop BB11_12 Depth 3
                                        ;     Child Loop BB11_17 Depth 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s9, s8, 31
	v_add_nc_u32_e32 v4, s8, v0
	s_lshl_b64 s[22:23], s[8:9], 2
	s_add_u32 s24, s0, s22
	s_addc_u32 s25, s1, s23
	s_add_u32 s22, s2, s22
	s_addc_u32 s23, s3, s23
	s_load_b32 s9, s[24:25], 0x0
	s_load_b32 s17, s[22:23], 0x0
	v_mul_lo_u32 v27, v4, s18
	s_and_not1_b32 vcc_lo, exec_lo, s10
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v5, s9, v0
	v_add_nc_u32_e32 v6, s17, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v7, v5, s18
	v_mul_lo_u32 v5, v6, s18
	s_cbranch_vccnz .LBB11_14
; %bb.10:                               ; %.preheader.lr.ph
                                        ;   in Loop: Header=BB11_9 Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v6, 31, v5
	v_ashrrev_i32_e32 v8, 31, v7
	v_add_nc_u32_e32 v4, s17, v26
	v_add_nc_u32_e32 v10, s9, v26
	s_mov_b32 s9, 0
	v_lshlrev_b64 v[13:14], 2, v[5:6]
	v_lshlrev_b64 v[15:16], 2, v[7:8]
	v_mul_lo_u32 v9, s11, v4
	v_mul_lo_u32 v11, s11, v10
	v_mov_b32_e32 v6, 0
	v_add_co_u32 v13, vcc_lo, s12, v13
	v_add_co_ci_u32_e32 v14, vcc_lo, s13, v14, vcc_lo
	v_add_co_u32 v15, vcc_lo, s12, v15
	v_add_co_ci_u32_e32 v16, vcc_lo, s13, v16, vcc_lo
.LBB11_11:                              ; %.preheader
                                        ;   Parent Loop BB11_9 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB11_12 Depth 3
	v_ashrrev_i32_e32 v10, 31, v9
	v_ashrrev_i32_e32 v12, 31, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_dual_mov_b32 v22, v16 :: v_dual_mov_b32 v21, v15
	v_dual_mov_b32 v24, v14 :: v_dual_mov_b32 v23, v13
	v_lshlrev_b64 v[17:18], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[19:20], 2, v[11:12]
	v_mov_b32_e32 v4, 0
	v_mov_b32_e32 v8, 0
	s_mov_b32 s17, s16
	v_add_co_u32 v17, vcc_lo, s4, v17
	v_add_co_ci_u32_e32 v18, vcc_lo, s5, v18, vcc_lo
	v_add_co_u32 v19, vcc_lo, s4, v19
	v_add_co_ci_u32_e32 v20, vcc_lo, s5, v20, vcc_lo
.LBB11_12:                              ;   Parent Loop BB11_9 Depth=1
                                        ;     Parent Loop BB11_11 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	global_load_b32 v10, v[19:20], off
	global_load_b32 v12, v[21:22], off
	global_load_b32 v28, v[17:18], off
	global_load_b32 v29, v[23:24], off
	v_add_co_u32 v23, vcc_lo, v23, 4
	v_add_co_ci_u32_e32 v24, vcc_lo, 0, v24, vcc_lo
	v_add_co_u32 v17, vcc_lo, v17, 4
	v_add_co_ci_u32_e32 v18, vcc_lo, 0, v18, vcc_lo
	v_add_co_u32 v21, vcc_lo, v21, 4
	v_add_co_ci_u32_e32 v22, vcc_lo, 0, v22, vcc_lo
	v_add_co_u32 v19, vcc_lo, v19, 4
	v_add_co_ci_u32_e32 v20, vcc_lo, 0, v20, vcc_lo
	s_add_i32 s17, s17, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s17, 0
	s_waitcnt vmcnt(2)
	v_fmac_f32_e32 v4, v10, v12
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v8, v28, v29
	s_cbranch_scc0 .LBB11_12
; %bb.13:                               ; %._crit_edge182
                                        ;   in Loop: Header=BB11_11 Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_dual_mul_f32 v4, v8, v4 :: v_dual_add_nc_u32 v17, s9, v27
	v_add_nc_u32_e32 v11, s16, v11
	s_add_i32 s9, s9, 1
	v_add_nc_u32_e32 v9, s16, v9
	v_ashrrev_i32_e32 v18, 31, v17
	v_cmp_gt_f32_e32 vcc_lo, v4, v6
	s_cmp_eq_u32 s9, s16
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[17:18], 2, v[17:18]
	v_cndmask_b32_e32 v6, v6, v4, vcc_lo
	v_add_co_u32 v17, vcc_lo, s12, v17
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v18, vcc_lo, s13, v18, vcc_lo
	global_store_b32 v[17:18], v4, off
	s_cbranch_scc0 .LBB11_11
	s_branch .LBB11_15
.LBB11_14:                              ;   in Loop: Header=BB11_9 Depth=1
	v_mov_b32_e32 v6, 0
.LBB11_15:                              ; %.preheader172
                                        ;   in Loop: Header=BB11_9 Depth=1
	s_and_not1_b32 vcc_lo, exec_lo, s10
	s_cbranch_vccnz .LBB11_18
; %bb.16:                               ; %.lr.ph188.preheader
                                        ;   in Loop: Header=BB11_9 Depth=1
	v_ashrrev_i32_e32 v4, 31, v3
	s_mov_b32 s9, s16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[8:9], 2, v[3:4]
	v_add_co_u32 v8, vcc_lo, s12, v8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, s13, v9, vcc_lo
.LBB11_17:                              ; %.lr.ph188
                                        ;   Parent Loop BB11_9 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_b32 v4, v[8:9], off
	s_add_i32 s9, s9, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	s_cmp_lg_u32 s9, 0
	s_waitcnt vmcnt(0)
	v_div_scale_f32 v10, null, v6, v6, v4
	v_div_scale_f32 v13, vcc_lo, v4, v6, v4
	v_rcp_f32_e32 v11, v10
	s_waitcnt_depctr 0xfff
	v_fma_f32 v12, -v10, v11, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, v12, v11
	v_mul_f32_e32 v12, v13, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v14, -v10, v12, v13
	v_fmac_f32_e32 v12, v14, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v10, -v10, v12, v13
	v_div_fmas_f32 v10, v10, v11, v12
	s_delay_alu instid0(VALU_DEP_1)
	v_div_fixup_f32 v4, v10, v6, v4
	global_store_b32 v[8:9], v4, off
	v_add_co_u32 v8, vcc_lo, v8, 4
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo
	s_cbranch_scc1 .LBB11_17
.LBB11_18:                              ; %._crit_edge189
                                        ;   in Loop: Header=BB11_9 Depth=1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v4, s16, v7
	v_add_nc_u32_e32 v7, s16, v5
	s_add_i32 s8, s8, 1
	v_add_nc_u32_e32 v3, s18, v3
	s_cmp_lt_i32 s8, s20
	v_ashrrev_i32_e32 v5, 31, v4
	v_ashrrev_i32_e32 v8, 31, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_lshlrev_b64 v[7:8], 2, v[7:8]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, s12, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s13, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v7, vcc_lo, s12, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s13, v8, vcc_lo
	s_clause 0x1
	global_load_b32 v9, v[4:5], off
	global_load_b32 v7, v[7:8], off
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v6
	v_cndmask_b32_e64 v4, 1.0, 0x4f800000, vcc_lo
	v_cndmask_b32_e64 v8, 0, 0x41b17218, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v4, v6, v4
	v_log_f32_e32 v5, v4
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v4, 0x3f317217, v5
	v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v5|
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v6, 0x3f317217, v5, -v4
	v_fmac_f32_e32 v6, 0x3377d1cf, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f32_e32 v6, v4, v6
	v_add_nc_u32_e32 v4, s16, v27
	v_cndmask_b32_e32 v6, v5, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v5, 31, v4
	v_sub_f32_e32 v6, v6, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_add_co_u32 v4, vcc_lo, s12, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v5, vcc_lo, s13, v5, vcc_lo
	s_waitcnt vmcnt(1)
	v_add_f32_e32 v6, v6, v9
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v6, v6, v7
	global_store_b32 v[4:5], v6, off
	s_cbranch_scc1 .LBB11_9
.LBB11_19:                              ; %._crit_edge193
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add3_u32 v0, s20, -1, v0
	s_cmp_lt_i32 s16, 1
	v_mov_b32_e32 v7, 0
	v_mul_lo_u32 v3, v0, s18
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v4, s16, v3
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_add_co_u32 v4, vcc_lo, s12, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s13, v5, vcc_lo
	v_add_co_u32 v0, vcc_lo, s14, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s15, v1, vcc_lo
	global_load_b32 v6, v[4:5], off
	global_store_b32 v[0:1], v7, off
	s_cbranch_scc1 .LBB11_22
; %bb.20:                               ; %.lr.ph196
	v_mul_lo_u32 v7, v25, s16
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[2:3], 2, v[3:4]
	v_ashrrev_i32_e32 v8, 31, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s12, v2
	v_lshlrev_b64 v[4:5], 2, v[7:8]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v3, vcc_lo, s13, v3, vcc_lo
	v_mov_b32_e32 v7, 0
	v_add_co_u32 v4, vcc_lo, s6, v4
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v5, vcc_lo
.LBB11_21:                              ; =>This Inner Loop Header: Depth=1
	global_load_b32 v8, v[4:5], off
	global_load_b32 v9, v[2:3], off
	v_add_co_u32 v2, vcc_lo, v2, 4
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v4, vcc_lo, v4, 4
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
	s_add_i32 s16, s16, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s16, 0
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v7, v8, v9
	global_store_b32 v[0:1], v7, off
	s_cbranch_scc1 .LBB11_21
.LBB11_22:                              ; %._crit_edge197
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v7
	v_cndmask_b32_e64 v2, 1.0, 0x4f800000, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v2, v7, v2
	v_log_f32_e32 v2, v2
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v3, 0x3f317217, v2
	v_cmp_gt_f32_e64 s0, 0x7f800000, |v2|
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v4, 0x3f317217, v2, -v3
	v_fmamk_f32 v4, v2, 0x3377d1cf, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v3, v3, v4
	v_cndmask_b32_e64 v2, v2, v3, s0
	v_cndmask_b32_e64 v3, 0, 0x41b17218, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v2, v2, v3
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v2, v6, v2
	global_store_b32 v[0:1], v2, off
.LBB11_23:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z23felsensteindinucleotideiiiiiiPKiS0_PKfS2_PiPfS4_S4_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 344
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 30
		.amdhsa_next_free_sgpr 26
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end11:
	.size	_Z23felsensteindinucleotideiiiiiiPKiS0_PKfS2_PiPfS4_S4_, .Lfunc_end11-_Z23felsensteindinucleotideiiiiiiPKiS0_PKfS2_PiPfS4_S4_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2208
; NumSgprs: 28
; NumVgprs: 30
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 28
; NumVGPRsForWavesPerEU: 30
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z8sumfinaliiPfS_S_     ; -- Begin function _Z8sumfinaliiPfS_S_
	.globl	_Z8sumfinaliiPfS_S_
	.p2align	8
	.type	_Z8sumfinaliiPfS_S_,@function
_Z8sumfinaliiPfS_S_:                    ; @_Z8sumfinaliiPfS_S_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b64 s[4:5], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s5, v1
	s_cbranch_execz .LBB12_5
; %bb.1:
	s_clause 0x1
	s_load_b64 s[6:7], s[0:1], 0x18
	s_load_b128 s[0:3], s[0:1], 0x8
	v_ashrrev_i32_e32 v2, 31, v1
	s_cmp_lt_i32 s4, 1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[4:5], 2, v[1:2]
	v_mad_u64_u32 v[2:3], null, v1, s4, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s6, v4
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v5, vcc_lo
	v_mov_b32_e32 v5, 0
	global_store_b32 v[0:1], v5, off
	s_cbranch_scc1 .LBB12_4
; %bb.2:                                ; %.lr.ph.preheader
	v_ashrrev_i32_e32 v3, 31, v2
	v_dual_mov_b32 v6, 0 :: v_dual_mov_b32 v5, 0
	s_mov_b32 s5, s4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[2:3]
	v_add_co_u32 v3, vcc_lo, s2, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s3, v4, vcc_lo
.LBB12_3:                               ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	global_load_b32 v7, v6, s[0:1]
	global_load_b32 v8, v[3:4], off
	v_add_co_u32 v3, vcc_lo, v3, 4
	s_add_i32 s5, s5, -1
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmp_lg_u32 s5, 0
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v5, v7, v8
	global_store_b32 v[0:1], v5, off
	s_cbranch_scc1 .LBB12_3
.LBB12_4:                               ; %._crit_edge
	v_add_nc_u32_e32 v2, s4, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v5
	global_load_b32 v2, v[2:3], off
	v_cndmask_b32_e64 v3, 1.0, 0x4f800000, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v3, v5, v3
	v_log_f32_e32 v3, v3
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v4, 0x3f317217, v3
	v_cmp_gt_f32_e64 s0, 0x7f800000, |v3|
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v5, 0x3f317217, v3, -v4
	v_fmamk_f32 v5, v3, 0x3377d1cf, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v4, v4, v5
	v_cndmask_b32_e64 v3, v3, v4, s0
	v_cndmask_b32_e64 v4, 0, 0x41b17218, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v3, v3, v4
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v2, v3, v2
	global_store_b32 v[0:1], v2, off
.LBB12_5:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8sumfinaliiPfS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end12:
	.size	_Z8sumfinaliiPfS_S_, .Lfunc_end12-_Z8sumfinaliiPfS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 440
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z13sumcategoriesiiPKfS0_Pf ; -- Begin function _Z13sumcategoriesiiPKfS0_Pf
	.globl	_Z13sumcategoriesiiPKfS0_Pf
	.p2align	8
	.type	_Z13sumcategoriesiiPKfS0_Pf,@function
_Z13sumcategoriesiiPKfS0_Pf:            ; @_Z13sumcategoriesiiPKfS0_Pf
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x2c
	s_load_b64 s[2:3], s[0:1], 0x0
	s_mov_b32 s32, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	s_mov_b32 s4, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB13_4
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x8
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x18
	s_cmp_lt_i32 s2, 2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, vcc_lo, s6, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s7, v2, vcc_lo
	s_load_b32 s8, s[4:5], 0x0
	v_add_co_u32 v22, vcc_lo, s0, v1
	global_load_b32 v0, v[3:4], off
	v_add_co_ci_u32_e32 v23, vcc_lo, s1, v2, vcc_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f32_e32 v0, s8, v0
	global_store_b32 v[22:23], v0, off
	s_cbranch_scc1 .LBB13_4
; %bb.2:                                ; %.lr.ph.preheader
	s_ashr_i32 s1, s3, 31
	s_mov_b32 s0, s3
	v_mov_b32_e32 v26, 0
	s_lshl_b64 s[8:9], s[0:1], 2
	s_add_i32 s1, s2, -1
	s_add_u32 s0, s6, s8
	s_addc_u32 s2, s7, s9
	v_add_co_u32 v24, vcc_lo, s0, v1
	v_add_co_ci_u32_e32 v25, vcc_lo, s2, v2, vcc_lo
	s_add_u32 s10, s4, 4
	s_addc_u32 s11, s5, 0
.LBB13_3:                               ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	global_load_b32 v1, v26, s[10:11]
	global_load_b32 v2, v[24:25], off
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, _Z9logsumexpff@rel32@lo+4
	s_addc_u32 s3, s3, _Z9logsumexpff@rel32@hi+12
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v1, v1, v2
	s_swappc_b64 s[30:31], s[2:3]
	v_add_co_u32 v24, vcc_lo, v24, s8
	s_add_i32 s1, s1, -1
	v_add_co_ci_u32_e32 v25, vcc_lo, s9, v25, vcc_lo
	s_add_u32 s10, s10, 4
	s_addc_u32 s11, s11, 0
	s_cmp_lg_u32 s1, 0
	global_store_b32 v[22:23], v0, off
	s_cbranch_scc1 .LBB13_3
.LBB13_4:                               ; %.loopexit
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13sumcategoriesiiPKfS0_Pf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 27
		.amdhsa_next_free_sgpr 33
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end13:
	.size	_Z13sumcategoriesiiPKfS0_Pf, .Lfunc_end13-_Z13sumcategoriesiiPKfS0_Pf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 308
; NumSgprs: 35
; NumVgprs: 27
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 4
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 35
; NumVGPRsForWavesPerEU: 27
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z15felsensteinfastiiiiPKiS0_PKfS2_PfS3_ ; -- Begin function _Z15felsensteinfastiiiiPKiS0_PKfS2_PfS3_
	.globl	_Z15felsensteinfastiiiiPKiS0_PKfS2_PfS3_
	.p2align	8
	.type	_Z15felsensteinfastiiiiPKiS0_PKfS2_PfS3_,@function
_Z15felsensteinfastiiiiPKiS0_PKfS2_PfS3_: ; @_Z15felsensteinfastiiiiPKiS0_PKfS2_PfS3_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x4c
	s_load_b128 s[16:19], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s17, v1
	s_cbranch_execz .LBB14_16
; %bb.1:                                ; %.preheader126
	s_clause 0x1
	s_load_b256 s[4:11], s[0:1], 0x10
	s_load_b128 s[0:3], s[0:1], 0x30
	v_mul_lo_u32 v0, v1, s18
	s_add_i32 s17, s16, 1
	s_cmp_ge_i32 s19, s18
	s_cbranch_scc1 .LBB14_12
; %bb.2:                                ; %.lr.ph138
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v15, 0 :: v_dual_add_nc_u32 v2, s19, v0
	s_cmp_gt_i32 s16, 0
	s_mul_i32 s27, s16, s16
	s_cselect_b32 s26, -1, 0
	v_mul_lo_u32 v2, v2, s17
	s_mov_b32 s12, s19
.LBB14_3:                               ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB14_5 Depth 2
                                        ;       Child Loop BB14_6 Depth 3
                                        ;     Child Loop BB14_10 Depth 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_ashr_i32 s13, s12, 31
	v_add_nc_u32_e32 v3, s12, v0
	s_lshl_b64 s[14:15], s[12:13], 2
	s_waitcnt lgkmcnt(0)
	s_add_u32 s20, s4, s14
	s_addc_u32 s21, s5, s15
	s_add_u32 s14, s6, s14
	s_addc_u32 s15, s7, s15
	s_load_b32 s13, s[20:21], 0x0
	s_load_b32 s14, s[14:15], 0x0
	v_mul_lo_u32 v16, v3, s17
	s_and_not1_b32 vcc_lo, exec_lo, s26
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v4, s13, v0
	v_add_nc_u32_e32 v5, s14, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v6, v4, s17
	v_mul_lo_u32 v4, v5, s17
	v_mov_b32_e32 v5, 0
	s_cbranch_vccnz .LBB14_8
; %bb.4:                                ; %.preheader.lr.ph
                                        ;   in Loop: Header=BB14_3 Depth=1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ashrrev_i32_e32 v5, 31, v4
	v_ashrrev_i32_e32 v7, 31, v6
	s_mul_i32 s14, s27, s14
	s_mul_i32 s20, s27, s13
	s_mov_b32 s13, 0
	v_lshlrev_b64 v[8:9], 2, v[4:5]
	v_lshlrev_b64 v[10:11], 2, v[6:7]
	v_mov_b32_e32 v5, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v7, vcc_lo, s0, v8
	v_add_co_ci_u32_e32 v8, vcc_lo, s1, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v9, vcc_lo, s0, v10
	v_add_co_ci_u32_e32 v10, vcc_lo, s1, v11, vcc_lo
.LBB14_5:                               ; %.preheader
                                        ;   Parent Loop BB14_3 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB14_6 Depth 3
	s_ashr_i32 s15, s14, 31
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v12, v10 :: v_dual_mov_b32 v11, v9
	s_lshl_b64 s[22:23], s[14:15], 2
	v_dual_mov_b32 v14, v8 :: v_dual_mov_b32 v13, v7
	s_add_u32 s22, s8, s22
	s_addc_u32 s23, s9, s23
	s_ashr_i32 s21, s20, 31
	v_mov_b32_e32 v3, 0
	s_lshl_b64 s[24:25], s[20:21], 2
	v_mov_b32_e32 v17, 0
	s_add_u32 s24, s8, s24
	s_addc_u32 s25, s9, s25
	s_mov_b32 s15, s16
.LBB14_6:                               ;   Parent Loop BB14_3 Depth=1
                                        ;     Parent Loop BB14_5 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	global_load_b32 v18, v[11:12], off
	s_clause 0x1
	global_load_b32 v19, v15, s[24:25]
	global_load_b32 v20, v15, s[22:23]
	global_load_b32 v21, v[13:14], off
	v_add_co_u32 v13, vcc_lo, v13, 4
	v_add_co_ci_u32_e32 v14, vcc_lo, 0, v14, vcc_lo
	s_add_i32 s15, s15, -1
	v_add_co_u32 v11, vcc_lo, v11, 4
	s_add_u32 s22, s22, 4
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v12, vcc_lo
	s_addc_u32 s23, s23, 0
	s_add_u32 s24, s24, 4
	s_addc_u32 s25, s25, 0
	s_cmp_eq_u32 s15, 0
	s_waitcnt vmcnt(2)
	v_fmac_f32_e32 v17, v19, v18
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v3, v20, v21
	s_cbranch_scc0 .LBB14_6
; %bb.7:                                ; %._crit_edge
                                        ;   in Loop: Header=BB14_5 Depth=2
	v_add_nc_u32_e32 v11, s13, v16
	s_delay_alu instid0(VALU_DEP_2)
	v_mul_f32_e32 v3, v17, v3
	s_add_i32 s13, s13, 1
	s_add_i32 s14, s14, s16
	s_add_i32 s20, s20, s16
	v_ashrrev_i32_e32 v12, 31, v11
	v_cmp_gt_f32_e32 vcc_lo, v3, v5
	s_cmp_eq_u32 s13, s16
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[11:12], 2, v[11:12]
	v_cndmask_b32_e32 v5, v5, v3, vcc_lo
	v_add_co_u32 v11, vcc_lo, s0, v11
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v12, vcc_lo, s1, v12, vcc_lo
	global_store_b32 v[11:12], v3, off
	s_cbranch_scc0 .LBB14_5
.LBB14_8:                               ; %.preheader125
                                        ;   in Loop: Header=BB14_3 Depth=1
	s_and_not1_b32 vcc_lo, exec_lo, s26
	s_cbranch_vccnz .LBB14_11
; %bb.9:                                ; %.lr.ph135.preheader
                                        ;   in Loop: Header=BB14_3 Depth=1
	v_ashrrev_i32_e32 v3, 31, v2
	s_mov_b32 s13, s16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 2, v[2:3]
	v_add_co_u32 v7, vcc_lo, s0, v7
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v8, vcc_lo, s1, v8, vcc_lo
.LBB14_10:                              ; %.lr.ph135
                                        ;   Parent Loop BB14_3 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_b32 v3, v[7:8], off
	s_add_i32 s13, s13, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	s_cmp_eq_u32 s13, 0
	s_waitcnt vmcnt(0)
	v_div_scale_f32 v9, null, v5, v5, v3
	v_div_scale_f32 v12, vcc_lo, v3, v5, v3
	v_rcp_f32_e32 v10, v9
	s_waitcnt_depctr 0xfff
	v_fma_f32 v11, -v9, v10, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v10, v11, v10
	v_mul_f32_e32 v11, v12, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v13, -v9, v11, v12
	v_fmac_f32_e32 v11, v13, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v9, -v9, v11, v12
	v_div_fmas_f32 v9, v9, v10, v11
	s_delay_alu instid0(VALU_DEP_1)
	v_div_fixup_f32 v3, v9, v5, v3
	global_store_b32 v[7:8], v3, off
	v_add_co_u32 v7, vcc_lo, v7, 4
	v_add_co_ci_u32_e32 v8, vcc_lo, 0, v8, vcc_lo
	s_cbranch_scc0 .LBB14_10
.LBB14_11:                              ; %._crit_edge136
                                        ;   in Loop: Header=BB14_3 Depth=1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v3, s16, v6
	v_add_nc_u32_e32 v6, s16, v4
	s_add_i32 s12, s12, 1
	v_add_nc_u32_e32 v2, s17, v2
	s_cmp_ge_i32 s12, s18
	v_ashrrev_i32_e32 v4, 31, v3
	v_ashrrev_i32_e32 v7, 31, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v3, vcc_lo, s0, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v6, vcc_lo, s0, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v7, vcc_lo
	s_clause 0x1
	global_load_b32 v8, v[3:4], off
	global_load_b32 v6, v[6:7], off
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v5
	v_cndmask_b32_e64 v3, 1.0, 0x4f800000, vcc_lo
	v_cndmask_b32_e64 v7, 0, 0x41b17218, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v3, v5, v3
	v_log_f32_e32 v4, v3
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v3, 0x3f317217, v4
	v_cmp_gt_f32_e64 vcc_lo, 0x7f800000, |v4|
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v5, 0x3f317217, v4, -v3
	v_fmac_f32_e32 v5, 0x3377d1cf, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f32_e32 v5, v3, v5
	v_add_nc_u32_e32 v3, s16, v16
	v_cndmask_b32_e32 v5, v4, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v4, 31, v3
	v_sub_f32_e32 v5, v5, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, vcc_lo, s0, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	s_waitcnt vmcnt(1)
	v_add_f32_e32 v5, v5, v8
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v5, v5, v6
	global_store_b32 v[3:4], v5, off
	s_cbranch_scc0 .LBB14_3
.LBB14_12:                              ; %._crit_edge139
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add3_u32 v0, s18, -1, v0
	v_ashrrev_i32_e32 v2, 31, v1
	s_cmp_lt_i32 s16, 1
	v_mul_lo_u32 v3, v0, s17
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_add_nc_u32_e32 v4, s16, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v5, 31, v4
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_load_b32 v5, v[4:5], off
	v_mov_b32_e32 v4, 0
	global_store_b32 v[0:1], v4, off
	s_cbranch_scc1 .LBB14_15
; %bb.13:                               ; %.lr.ph142.preheader
	v_ashrrev_i32_e32 v4, 31, v3
	v_mov_b32_e32 v6, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[2:3], 2, v[3:4]
	v_mov_b32_e32 v4, 0
	v_add_co_u32 v2, vcc_lo, s0, v2
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
.LBB14_14:                              ; %.lr.ph142
                                        ; =>This Inner Loop Header: Depth=1
	global_load_b32 v7, v6, s[10:11]
	global_load_b32 v8, v[2:3], off
	v_add_co_u32 v2, vcc_lo, v2, 4
	s_add_i32 s16, s16, -1
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_add_u32 s10, s10, 4
	s_addc_u32 s11, s11, 0
	s_cmp_eq_u32 s16, 0
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v4, v7, v8
	global_store_b32 v[0:1], v4, off
	s_cbranch_scc0 .LBB14_14
.LBB14_15:                              ; %Flow216
	v_cmp_gt_f32_e32 vcc_lo, 0x800000, v4
	v_cndmask_b32_e64 v2, 1.0, 0x4f800000, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v2, v4, v2
	v_log_f32_e32 v2, v2
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v3, 0x3f317217, v2
	v_cmp_gt_f32_e64 s0, 0x7f800000, |v2|
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v4, 0x3f317217, v2, -v3
	v_fmamk_f32 v4, v2, 0x3377d1cf, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v3, v3, v4
	v_cndmask_b32_e64 v2, v2, v3, s0
	v_cndmask_b32_e64 v3, 0, 0x41b17218, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v2, v2, v3
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v2, v5, v2
	global_store_b32 v[0:1], v2, off
.LBB14_16:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15felsensteinfastiiiiPKiS0_PKfS2_PfS3_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 320
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 22
		.amdhsa_next_free_sgpr 28
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end14:
	.size	_Z15felsensteinfastiiiiPKiS0_PKfS2_PfS3_, .Lfunc_end14-_Z15felsensteinfastiiiiPKiS0_PKfS2_PfS3_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1392
; NumSgprs: 30
; NumVgprs: 22
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 30
; NumVGPRsForWavesPerEU: 22
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .offset:         4
        .size:           4
        .value_kind:     by_value
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z17felsensteinleavesiiiPKiS0_PfS1_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z17felsensteinleavesiiiPKiS0_PfS1_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .offset:         4
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z19felsensteinleaves16iiPKiS0_PfS1_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z19felsensteinleaves16iiPKiS0_PfS1_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .offset:         4
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
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        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z8storearrifPfS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z8storearrifPfS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     4
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .offset:         4
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
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        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12logsumexparrifPffS_
    .private_segment_fixed_size: 0
    .sgpr_count:     35
    .sgpr_spill_count: 0
    .symbol:         _Z12logsumexparrifPffS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     24
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
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        .size:           4
        .value_kind:     by_value
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        .size:           4
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        .size:           4
        .value_kind:     by_value
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        .size:           4
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    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 328
    .language:       OpenCL C
    .language_version:
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      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z19felsensteinhelper16iiiiiiPKiS0_PKfS2_S2_Pf
    .private_segment_fixed_size: 0
    .sgpr_count:     42
    .sgpr_spill_count: 0
    .symbol:         _Z19felsensteinhelper16iiiiiiPKiS0_PKfS2_S2_Pf.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     93
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
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        .size:           4
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    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z25felsensteinleaves16pairediiiPKiS0_PfS1_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z25felsensteinleaves16pairediiiPKiS0_PfS1_.kd
    .uniform_work_group_size: 1
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    .vgpr_count:     8
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    .wavefront_size: 32
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  - .args:
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