// Author: Ayush Kumar
// Roll No: 170195
// Compile: nvcc -g -G -arch=sm_61 -std=c++11 assignment5-p1.cu -o assignment5-p1

#include <cmath>
#include <cstdint>
#include <cuda.h>
#include <iostream>
#include <new>
#include <sys/time.h>

#define THRESHOLD (0.000001)

#define SIZE1 8192
#define SIZE2 8200
#define ITER 100

using std::cerr;
using std::cout;
using std::endl;

__global__ void kernel1(double* d_k1) {
  // TODO: Fill in
  // int i = blockIdx.y * blockDim.y + threadIdx.y;
  int j = blockIdx.x * blockDim.x + threadIdx.x;
  if(j < SIZE1-1){
    for (int k = 0; k < ITER; k++) {
      for (int i = 1; i < (SIZE1 - 1); i++) {
        d_k1[i*SIZE1 + j+1] = d_k1[(i-1)*SIZE1 + j+1] + d_k1[i*SIZE1 + j+1] + d_k1[(i+1)*SIZE1 + j+1];
      }
    }
  }
}

__global__ void kernel2(double* d_k2) {
  // TODO: Fill in
  // int i = blockIdx.y * blockDim.y + threadIdx.y;
  int j = blockIdx.x * blockDim.x + threadIdx.x;
  int unroll = 8;
  if (j < SIZE2-1) {
    for (int k = 0; k < ITER; k++) {
      int i;
      for (i = 1; i+(unroll-1) < (SIZE2 - 1); i += unroll) {
        d_k2[i*SIZE2 + j+1] = d_k2[(i-1)*SIZE2 + j+1] + d_k2[i*SIZE2 + j+1] + d_k2[(i+1)*SIZE2 + j+1];
        d_k2[(i+1)*SIZE2 + j+1] = d_k2[(i)*SIZE2 + j+1] + d_k2[(i+1)*SIZE2 + j+1] + d_k2[(i+2)*SIZE2 + j+1];
        d_k2[(i+2)*SIZE2 + j+1] = d_k2[(i+1)*SIZE2 + j+1] + d_k2[(i+2)*SIZE2 + j+1] + d_k2[(i+3)*SIZE2 + j+1];
        d_k2[(i+3)*SIZE2 + j+1] = d_k2[(i+2)*SIZE2 + j+1] + d_k2[(i+3)*SIZE2 + j+1] + d_k2[(i+4)*SIZE2 + j+1];
        d_k2[(i+4)*SIZE2 + j+1] = d_k2[(i+3)*SIZE2 + j+1] + d_k2[(i+4)*SIZE2 + j+1] + d_k2[(i+5)*SIZE2 + j+1];
        d_k2[(i+5)*SIZE2 + j+1] = d_k2[(i+4)*SIZE2 + j+1] + d_k2[(i+5)*SIZE2 + j+1] + d_k2[(i+6)*SIZE2 + j+1];
        d_k2[(i+6)*SIZE2 + j+1] = d_k2[(i+5)*SIZE2 + j+1] + d_k2[(i+6)*SIZE2 + j+1] + d_k2[(i+7)*SIZE2 + j+1];
        d_k2[(i+7)*SIZE2 + j+1] = d_k2[(i+6)*SIZE2 + j+1] + d_k2[(i+7)*SIZE2 + j+1] + d_k2[(i+8)*SIZE2 + j+1];
      }
      for(int i1=i; i1<(SIZE2-1); i1++) {
        d_k2[i1*SIZE2 + j+1] = d_k2[(i1-1)*SIZE2 + j+1] + d_k2[i1*SIZE2 + j+1] + d_k2[(i1+1)*SIZE2 + j+1];
      }
    }
  }
}

__host__ void serial(double* h_ser) {
  for (int k = 0; k < ITER; k++) {
    for (int i = 1; i < (SIZE1 - 1); i++) {
      for (int j = 0; j < (SIZE1 - 1); j++) {
        h_ser[i*SIZE1 + j+1] =
            (h_ser[(i-1)*SIZE1 + j+1] + h_ser[i*SIZE1 + j+1] + h_ser[(i+1)*SIZE1 + j+1]);
      }
    }
  }
}

__host__ void check_result(double* w_ref, double* w_opt, uint64_t size) {
  double maxdiff = 0.0, this_diff = 0.0;
  int numdiffs = 0;

  for (uint64_t i = 0; i < size; i++) {
    for (uint64_t j = 0; j < size; j++) {
      this_diff = w_ref[i*size + j] - w_opt[i*size + j];
      if (fabs(this_diff) > THRESHOLD) {
        numdiffs++;
        if (this_diff > maxdiff)
          maxdiff = this_diff;
      }
    }
  }

  if (numdiffs > 0) {
    cout << numdiffs << " Diffs found over THRESHOLD " << THRESHOLD << "; Max Diff = " << maxdiff
         << endl;
  } else {
    cout << "No differences found between base and test versions\n";
  }
}

__host__ double rtclock() { // Seconds
  struct timezone Tzp;
  struct timeval Tp;
  int stat;
  stat = gettimeofday(&Tp, &Tzp);
  if (stat != 0) {
    cout << "Error return from gettimeofday: " << stat << "\n";
  }
  return (Tp.tv_sec + Tp.tv_usec * 1.0e-6);
}

int main() {
  double* h_ser = new double[SIZE1*SIZE1];
  double* h_k1 = new double[SIZE1*SIZE1];   //needs to be contiguous for cudaMemcpy to work

  for (int i = 0; i < SIZE1; i++) {
    for (int j = 0; j < SIZE1; j++) {
      h_ser[i*SIZE1 + j] = 1;
      h_k1[i*SIZE1 + j] = 1;
    }
  }

  double* h_k2 = new double[SIZE2*SIZE2];

  for (int i = 0; i < SIZE2; i++) {
    for (int j = 0; j < SIZE2; j++) {
      h_k2[i*SIZE2 + j] = 1;
    }
  }

  double clkbegin = rtclock();
  serial(h_ser);
  double clkend = rtclock();
  double time = clkend - clkbegin; // seconds
  cout << "Serial code on CPU: " << ((2.0 * SIZE1 * SIZE1 * ITER) / time)
       << " GFLOPS; Time = " << time * 1000 << " msec" << endl;

  cudaError_t status;
  cudaEvent_t start, end;
  float k1_time, k2_time; // milliseconds

  double* d_k1;
  // TODO: Fill in
  cudaMalloc(&d_k1, sizeof(double)*SIZE1*SIZE1);
  // full parallelization
  dim3 threads_in_block1(32);
  dim3 blocks_in_grid1(SIZE1/threads_in_block1.x);
  cudaEventCreate(&start);
  cudaEventCreate(&end);
  cudaEventRecord(start, 0);
  /************** CUDA **************/
  cudaMemcpy(d_k1, h_k1, sizeof(double)*SIZE1*SIZE1, cudaMemcpyHostToDevice);
  kernel1<<<blocks_in_grid1, threads_in_block1>>>(d_k1);
  cudaMemcpy(h_k1, d_k1, sizeof(double)*SIZE1*SIZE1, cudaMemcpyDeviceToHost);
  /************** CUDA **************/
  cudaEventRecord(end, 0);
  cudaEventSynchronize(end);
  cudaEventElapsedTime(&k1_time, start, end);
  cudaEventDestroy(start);
  cudaEventDestroy(end);
  check_result(h_ser, h_k1, SIZE1);
  cout << "Kernel 1 on GPU: " << ((2.0 * SIZE1 * SIZE1 * ITER) / (k1_time * 1.0e-3))
       << " GFLOPS; Time = " << k1_time << " msec" << endl;
  status = cudaGetLastError();
  if (status != cudaSuccess) {
    cerr << cudaGetErrorString(status) << endl;
  }

  double* d_k2;
  // TODO: Fill in
  cudaMalloc(&d_k2, sizeof(double)*SIZE2*SIZE2);
  dim3 threads_in_block2(32);
  dim3 blocks_in_grid2((SIZE2+threads_in_block2.x-1)/threads_in_block2.x);
  cudaEventCreate(&start);
  cudaEventCreate(&end);
  cudaEventRecord(start, 0);
  /************** CUDA **************/
  cudaMemcpy(d_k2, h_k2, sizeof(double)*SIZE2*SIZE2, cudaMemcpyHostToDevice);
  kernel2<<<blocks_in_grid2, threads_in_block2>>>(d_k2);
  cudaMemcpy(h_k2, d_k2, sizeof(double)*SIZE2*SIZE2, cudaMemcpyDeviceToHost);
  /************** CUDA **************/
  cudaEventRecord(end, 0);
  cudaEventSynchronize(end);
  cudaEventElapsedTime(&k2_time, start, end);
  cudaEventDestroy(start);
  cudaEventDestroy(end);
  cout << "Kernel 2 on GPU: " << ((2.0 * SIZE2 * SIZE2 * ITER) / (k2_time * 1.0e-3))
       << " GFLOPS; Time = " << k2_time << " msec" << endl;
  status = cudaGetLastError();
  if (status != cudaSuccess) {
    cerr << "CUDA Error: " << cudaGetErrorString(status) << endl;
  }

  cudaFree(d_k1);
  cudaFree(d_k2);

  delete[] h_ser;
  delete[] h_k1;
  delete[] h_k2;

  return EXIT_SUCCESS;
}

	.file	"tmpxft_0022093f_00000000-6_assignment5-p1.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3641:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3641:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.align 2
	.type	_ZNSolsEPFRSoS_E.isra.0, @function
_ZNSolsEPFRSoS_E.isra.0:
.LFB4300:
	.cfi_startproc
	jmp	*%rsi
	.cfi_endproc
.LFE4300:
	.size	_ZNSolsEPFRSoS_E.isra.0, .-_ZNSolsEPFRSoS_E.isra.0
	.globl	_Z6serialPd
	.type	_Z6serialPd, @function
_Z6serialPd:
.LFB3635:
	.cfi_startproc
	endbr64
	movl	$100, %esi
.L4:
	leaq	65536(%rdi), %rcx
	movl	$8192, %edx
.L8:
	addl	$8192, %edx
	movq	%rcx, %rax
	xorl	%r8d, %r8d
.L5:
	movsd	-65528(%rax), %xmm0
	addsd	8(%rax), %xmm0
	incl	%r8d
	addq	$8, %rax
	addsd	65536(%rax), %xmm0
	movsd	%xmm0, (%rax)
	cmpl	$8191, %r8d
	jne	.L5
	addq	$65536, %rcx
	cmpl	$67100672, %edx
	jne	.L8
	decl	%esi
	jne	.L4
	ret
	.cfi_endproc
.LFE3635:
	.size	_Z6serialPd, .-_Z6serialPd
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC3:
	.string	" Diffs found over THRESHOLD "
.LC4:
	.string	"; Max Diff = "
.LC5:
	.string	"No differences found between base and test versions\n"
	.text
	.globl	_Z12check_resultPdS_m
	.type	_Z12check_resultPdS_m, @function
_Z12check_resultPdS_m:
.LFB3636:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdi, %r8
	xorl	%r9d, %r9d
	movq	%rsi, %rdi
	movq	.LC1(%rip), %xmm2
	xorl	%r10d, %r10d
	xorl	%esi, %esi
	xorps	%xmm1, %xmm1
	movsd	.LC2(%rip), %xmm3
.L12:
	cmpq	%rdx, %r10
	je	.L16
	leaq	0(,%r9,8), %rax
	leaq	(%r8,%rax), %r11
	leaq	(%rdi,%rax), %rcx
	xorl	%eax, %eax
.L15:
	movsd	(%r11,%rax,8), %xmm0
	subsd	(%rcx,%rax,8), %xmm0
	movaps	%xmm0, %xmm4
	andps	%xmm2, %xmm4
	comisd	%xmm3, %xmm4
	jbe	.L13
	maxsd	%xmm1, %xmm0
	incl	%esi
	movaps	%xmm0, %xmm1
.L13:
	incq	%rax
	cmpq	%rax, %rdx
	jne	.L15
	incq	%r10
	addq	%rdx, %r9
	jmp	.L12
.L16:
	testl	%esi, %esi
	movsd	%xmm1, 8(%rsp)
	leaq	_ZSt4cout(%rip), %rdi
	jle	.L17
	call	_ZNSolsEi@PLT
	leaq	.LC3(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	.LC2(%rip), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC4(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	8(%rsp), %xmm1
	movq	%rax, %rdi
	movaps	%xmm1, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	movq	%rax, %rdi
	jmp	_ZNSolsEPFRSoS_E.isra.0
.L17:
	.cfi_restore_state
	leaq	.LC5(%rip), %rsi
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	jmp	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	.cfi_endproc
.LFE3636:
	.size	_Z12check_resultPdS_m, .-_Z12check_resultPdS_m
	.section	.rodata.str1.1
.LC6:
	.string	"Error return from gettimeofday: "
.LC7:
	.string	"\n"
	.text
	.globl	_Z7rtclockv
	.type	_Z7rtclockv, @function
_Z7rtclockv:
.LFB3637:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	movq	%fs:40, %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %rsi
	leaq	8(%rsp), %rdi
	call	gettimeofday@PLT
	testl	%eax, %eax
	je	.L23
	leaq	.LC6(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	movl	%eax, %ebx
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebx, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC7(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
.L23:
	cvtsi2sdq	16(%rsp), %xmm0
	mulsd	.LC2(%rip), %xmm0
	cvtsi2sdq	8(%rsp), %xmm1
	addsd	%xmm1, %xmm0
	movq	24(%rsp), %rax
	subq	%fs:40, %rax
	je	.L24
	call	__stack_chk_fail@PLT
.L24:
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3637:
	.size	_Z7rtclockv, .-_Z7rtclockv
	.globl	_Z26__device_stub__Z7kernel1PdPd
	.type	_Z26__device_stub__Z7kernel1PdPd, @function
_Z26__device_stub__Z7kernel1PdPd:
.LFB3663:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	leaq	44(%rsp), %rsi
	leaq	32(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L29
	pushq	24(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z7kernel1Pd(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 128
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L29:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L31
	call	__stack_chk_fail@PLT
.L31:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3663:
	.size	_Z26__device_stub__Z7kernel1PdPd, .-_Z26__device_stub__Z7kernel1PdPd
	.globl	_Z7kernel1Pd
	.type	_Z7kernel1Pd, @function
_Z7kernel1Pd:
.LFB3664:
	.cfi_startproc
	endbr64
	jmp	_Z26__device_stub__Z7kernel1PdPd
	.cfi_endproc
.LFE3664:
	.size	_Z7kernel1Pd, .-_Z7kernel1Pd
	.globl	_Z26__device_stub__Z7kernel2PdPd
	.type	_Z26__device_stub__Z7kernel2PdPd, @function
_Z26__device_stub__Z7kernel2PdPd:
.LFB3665:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	leaq	44(%rsp), %rsi
	leaq	32(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L34
	pushq	24(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z7kernel2Pd(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 128
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L34:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L36
	call	__stack_chk_fail@PLT
.L36:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3665:
	.size	_Z26__device_stub__Z7kernel2PdPd, .-_Z26__device_stub__Z7kernel2PdPd
	.globl	_Z7kernel2Pd
	.type	_Z7kernel2Pd, @function
_Z7kernel2Pd:
.LFB3666:
	.cfi_startproc
	endbr64
	jmp	_Z26__device_stub__Z7kernel2PdPd
	.cfi_endproc
.LFE3666:
	.size	_Z7kernel2Pd, .-_Z7kernel2Pd
	.section	.rodata.str1.1
.LC9:
	.string	"Serial code on CPU: "
.LC11:
	.string	" GFLOPS; Time = "
.LC13:
	.string	" msec"
.LC14:
	.string	"Kernel 1 on GPU: "
.LC16:
	.string	"Kernel 2 on GPU: "
.LC18:
	.string	"CUDA Error: "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3638:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$536870912, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	call	_Znam@PLT
	movl	$536870912, %edi
	movq	%rax, %r12
	call	_Znam@PLT
	movsd	.LC8(%rip), %xmm0
	xorl	%edx, %edx
	movq	%rax, %rbx
.L40:
	movq	%rdx, %rax
	movl	$8192, %r13d
.L41:
	movsd	%xmm0, (%r12,%rax)
	movsd	%xmm0, (%rbx,%rax)
	addq	$8, %rax
	decl	%r13d
	jne	.L41
	addq	$65536, %rdx
	cmpq	$536870912, %rdx
	jne	.L40
	movl	$537920000, %edi
	call	_Znam@PLT
	movsd	.LC8(%rip), %xmm0
	movq	%rax, %rbp
	movq	%rax, %rdx
.L43:
	xorl	%eax, %eax
.L44:
	movsd	%xmm0, (%rdx,%rax,8)
	incq	%rax
	cmpq	$8200, %rax
	jne	.L44
	addl	$8200, %r13d
	addq	$65600, %rdx
	cmpl	$67240000, %r13d
	jne	.L43
	call	_Z7rtclockv
	movq	%r12, %rdi
	leaq	24(%rsp), %r15
	leaq	_ZSt4cout(%rip), %r13
	movsd	%xmm0, 8(%rsp)
	leaq	32(%rsp), %r14
	call	_Z6serialPd
	call	_Z7rtclockv
	subsd	8(%rsp), %xmm0
	leaq	.LC9(%rip), %rsi
	movq	%r13, %rdi
	movsd	%xmm0, 8(%rsp)
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	.LC10(%rip), %xmm0
	divsd	8(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC11(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	8(%rsp), %xmm0
	mulsd	.LC12(%rip), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC13(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movl	$536870912, %esi
	leaq	40(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$16777217, %eax
	movq	%r15, %rdi
	movl	$1, 76(%rsp)
	salq	$8, %rax
	movq	%rax, 68(%rsp)
	call	cudaEventCreate@PLT
	movq	%r14, %rdi
	call	cudaEventCreate@PLT
	movq	24(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	40(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$536870912, %edx
	call	cudaMemcpy@PLT
	movl	$134217729, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	68(%rsp), %rdi
	movl	76(%rsp), %esi
	salq	$5, %rdx
	movl	$1, %ecx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L46
	movq	40(%rsp), %rdi
	call	_Z26__device_stub__Z7kernel1PdPd
.L46:
	movq	40(%rsp), %rsi
	movl	$2, %ecx
	movl	$536870912, %edx
	movq	%rbx, %rdi
	call	cudaMemcpy@PLT
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	32(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	32(%rsp), %rdx
	movq	24(%rsp), %rsi
	leaq	16(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movq	24(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	32(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movl	$8192, %edx
	movq	%rbx, %rsi
	movq	%r12, %rdi
	call	_Z12check_resultPdS_m
	leaq	.LC14(%rip), %rsi
	movq	%r13, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtss2sd	16(%rsp), %xmm1
	mulsd	.LC15(%rip), %xmm1
	movsd	.LC10(%rip), %xmm0
	movq	%rax, %rdi
	divsd	%xmm1, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC11(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtss2sd	16(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC13(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L47
	call	cudaGetErrorString@PLT
	leaq	_ZSt4cerr(%rip), %rdi
	movq	%rax, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
.L47:
	movl	$537920000, %esi
	leaq	48(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	%r15, %rdi
	movl	$1, 100(%rsp)
	movabsq	$4294967553, %rax
	movq	%rax, 92(%rsp)
	call	cudaEventCreate@PLT
	movq	%r14, %rdi
	call	cudaEventCreate@PLT
	movq	24(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	48(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$537920000, %edx
	call	cudaMemcpy@PLT
	movl	$134217729, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	92(%rsp), %rdi
	movl	100(%rsp), %esi
	salq	$5, %rdx
	movl	$1, %ecx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L48
	movq	48(%rsp), %rdi
	call	_Z26__device_stub__Z7kernel2PdPd
.L48:
	movq	48(%rsp), %rsi
	movl	$2, %ecx
	movl	$537920000, %edx
	movq	%rbp, %rdi
	call	cudaMemcpy@PLT
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	32(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	32(%rsp), %rdx
	movq	24(%rsp), %rsi
	leaq	20(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movq	24(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	32(%rsp), %rdi
	call	cudaEventDestroy@PLT
	leaq	.LC16(%rip), %rsi
	movq	%r13, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtss2sd	20(%rsp), %xmm1
	mulsd	.LC15(%rip), %xmm1
	movsd	.LC17(%rip), %xmm0
	movq	%rax, %rdi
	divsd	%xmm1, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC11(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtss2sd	20(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC13(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	call	cudaGetLastError@PLT
	movl	%eax, %r13d
	testl	%eax, %eax
	je	.L49
	leaq	.LC18(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%r13d, %edi
	movq	%rax, %r14
	call	cudaGetErrorString@PLT
	movq	%r14, %rdi
	movq	%rax, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
.L49:
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	%r12, %rdi
	call	_ZdaPv@PLT
	movq	%rbx, %rdi
	call	_ZdaPv@PLT
	movq	%rbp, %rdi
	call	_ZdaPv@PLT
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L50
	call	__stack_chk_fail@PLT
.L50:
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3638:
	.size	main, .-main
	.section	.rodata.str1.1
.LC19:
	.string	"_Z7kernel2Pd"
.LC20:
	.string	"_Z7kernel1Pd"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3668:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC19(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z7kernel2Pd(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC20(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z7kernel1Pd(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3668:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst16,"aM",@progbits,16
	.align 16
.LC1:
	.long	-1
	.long	2147483647
	.long	0
	.long	0
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC2:
	.long	-1598689907
	.long	1051772663
	.align 8
.LC8:
	.long	0
	.long	1072693248
	.align 8
.LC10:
	.long	0
	.long	1107886080
	.align 8
.LC12:
	.long	0
	.long	1083129856
	.align 8
.LC15:
	.long	-755914244
	.long	1062232653
	.align 8
.LC17:
	.long	-1879048192
	.long	1107889281
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

// Author: Ayush Kumar
// Roll No: 170195
// Compile: nvcc -g -G -arch=sm_61 -std=c++11 assignment5-p1.cu -o assignment5-p1

#include <cmath>
#include <cstdint>
#include <hip/hip_runtime.h>
#include <iostream>
#include <new>
#include <sys/time.h>

#define THRESHOLD (0.000001)

#define SIZE1 8192
#define SIZE2 8200
#define ITER 100

using std::cerr;
using std::cout;
using std::endl;

__global__ void kernel1(double* d_k1) {
  // TODO: Fill in
  // int i = blockIdx.y * blockDim.y + threadIdx.y;
  int j = blockIdx.x * blockDim.x + threadIdx.x;
  if(j < SIZE1-1){
    for (int k = 0; k < ITER; k++) {
      for (int i = 1; i < (SIZE1 - 1); i++) {
        d_k1[i*SIZE1 + j+1] = d_k1[(i-1)*SIZE1 + j+1] + d_k1[i*SIZE1 + j+1] + d_k1[(i+1)*SIZE1 + j+1];
      }
    }
  }
}

__global__ void kernel2(double* d_k2) {
  // TODO: Fill in
  // int i = blockIdx.y * blockDim.y + threadIdx.y;
  int j = blockIdx.x * blockDim.x + threadIdx.x;
  int unroll = 8;
  if (j < SIZE2-1) {
    for (int k = 0; k < ITER; k++) {
      int i;
      for (i = 1; i+(unroll-1) < (SIZE2 - 1); i += unroll) {
        d_k2[i*SIZE2 + j+1] = d_k2[(i-1)*SIZE2 + j+1] + d_k2[i*SIZE2 + j+1] + d_k2[(i+1)*SIZE2 + j+1];
        d_k2[(i+1)*SIZE2 + j+1] = d_k2[(i)*SIZE2 + j+1] + d_k2[(i+1)*SIZE2 + j+1] + d_k2[(i+2)*SIZE2 + j+1];
        d_k2[(i+2)*SIZE2 + j+1] = d_k2[(i+1)*SIZE2 + j+1] + d_k2[(i+2)*SIZE2 + j+1] + d_k2[(i+3)*SIZE2 + j+1];
        d_k2[(i+3)*SIZE2 + j+1] = d_k2[(i+2)*SIZE2 + j+1] + d_k2[(i+3)*SIZE2 + j+1] + d_k2[(i+4)*SIZE2 + j+1];
        d_k2[(i+4)*SIZE2 + j+1] = d_k2[(i+3)*SIZE2 + j+1] + d_k2[(i+4)*SIZE2 + j+1] + d_k2[(i+5)*SIZE2 + j+1];
        d_k2[(i+5)*SIZE2 + j+1] = d_k2[(i+4)*SIZE2 + j+1] + d_k2[(i+5)*SIZE2 + j+1] + d_k2[(i+6)*SIZE2 + j+1];
        d_k2[(i+6)*SIZE2 + j+1] = d_k2[(i+5)*SIZE2 + j+1] + d_k2[(i+6)*SIZE2 + j+1] + d_k2[(i+7)*SIZE2 + j+1];
        d_k2[(i+7)*SIZE2 + j+1] = d_k2[(i+6)*SIZE2 + j+1] + d_k2[(i+7)*SIZE2 + j+1] + d_k2[(i+8)*SIZE2 + j+1];
      }
      for(int i1=i; i1<(SIZE2-1); i1++) {
        d_k2[i1*SIZE2 + j+1] = d_k2[(i1-1)*SIZE2 + j+1] + d_k2[i1*SIZE2 + j+1] + d_k2[(i1+1)*SIZE2 + j+1];
      }
    }
  }
}

__host__ void serial(double* h_ser) {
  for (int k = 0; k < ITER; k++) {
    for (int i = 1; i < (SIZE1 - 1); i++) {
      for (int j = 0; j < (SIZE1 - 1); j++) {
        h_ser[i*SIZE1 + j+1] =
            (h_ser[(i-1)*SIZE1 + j+1] + h_ser[i*SIZE1 + j+1] + h_ser[(i+1)*SIZE1 + j+1]);
      }
    }
  }
}

__host__ void check_result(double* w_ref, double* w_opt, uint64_t size) {
  double maxdiff = 0.0, this_diff = 0.0;
  int numdiffs = 0;

  for (uint64_t i = 0; i < size; i++) {
    for (uint64_t j = 0; j < size; j++) {
      this_diff = w_ref[i*size + j] - w_opt[i*size + j];
      if (fabs(this_diff) > THRESHOLD) {
        numdiffs++;
        if (this_diff > maxdiff)
          maxdiff = this_diff;
      }
    }
  }

  if (numdiffs > 0) {
    cout << numdiffs << " Diffs found over THRESHOLD " << THRESHOLD << "; Max Diff = " << maxdiff
         << endl;
  } else {
    cout << "No differences found between base and test versions\n";
  }
}

__host__ double rtclock() { // Seconds
  struct timezone Tzp;
  struct timeval Tp;
  int stat;
  stat = gettimeofday(&Tp, &Tzp);
  if (stat != 0) {
    cout << "Error return from gettimeofday: " << stat << "\n";
  }
  return (Tp.tv_sec + Tp.tv_usec * 1.0e-6);
}

int main() {
  double* h_ser = new double[SIZE1*SIZE1];
  double* h_k1 = new double[SIZE1*SIZE1];   //needs to be contiguous for cudaMemcpy to work

  for (int i = 0; i < SIZE1; i++) {
    for (int j = 0; j < SIZE1; j++) {
      h_ser[i*SIZE1 + j] = 1;
      h_k1[i*SIZE1 + j] = 1;
    }
  }

  double* h_k2 = new double[SIZE2*SIZE2];

  for (int i = 0; i < SIZE2; i++) {
    for (int j = 0; j < SIZE2; j++) {
      h_k2[i*SIZE2 + j] = 1;
    }
  }

  double clkbegin = rtclock();
  serial(h_ser);
  double clkend = rtclock();
  double time = clkend - clkbegin; // seconds
  cout << "Serial code on CPU: " << ((2.0 * SIZE1 * SIZE1 * ITER) / time)
       << " GFLOPS; Time = " << time * 1000 << " msec" << endl;

  hipError_t status;
  hipEvent_t start, end;
  float k1_time, k2_time; // milliseconds

  double* d_k1;
  // TODO: Fill in
  hipMalloc(&d_k1, sizeof(double)*SIZE1*SIZE1);
  // full parallelization
  dim3 threads_in_block1(32);
  dim3 blocks_in_grid1(SIZE1/threads_in_block1.x);
  hipEventCreate(&start);
  hipEventCreate(&end);
  hipEventRecord(start, 0);
  /************** CUDA **************/
  hipMemcpy(d_k1, h_k1, sizeof(double)*SIZE1*SIZE1, hipMemcpyHostToDevice);
  kernel1<<<blocks_in_grid1, threads_in_block1>>>(d_k1);
  hipMemcpy(h_k1, d_k1, sizeof(double)*SIZE1*SIZE1, hipMemcpyDeviceToHost);
  /************** CUDA **************/
  hipEventRecord(end, 0);
  hipEventSynchronize(end);
  hipEventElapsedTime(&k1_time, start, end);
  hipEventDestroy(start);
  hipEventDestroy(end);
  check_result(h_ser, h_k1, SIZE1);
  cout << "Kernel 1 on GPU: " << ((2.0 * SIZE1 * SIZE1 * ITER) / (k1_time * 1.0e-3))
       << " GFLOPS; Time = " << k1_time << " msec" << endl;
  status = hipGetLastError();
  if (status != hipSuccess) {
    cerr << hipGetErrorString(status) << endl;
  }

  double* d_k2;
  // TODO: Fill in
  hipMalloc(&d_k2, sizeof(double)*SIZE2*SIZE2);
  dim3 threads_in_block2(32);
  dim3 blocks_in_grid2((SIZE2+threads_in_block2.x-1)/threads_in_block2.x);
  hipEventCreate(&start);
  hipEventCreate(&end);
  hipEventRecord(start, 0);
  /************** CUDA **************/
  hipMemcpy(d_k2, h_k2, sizeof(double)*SIZE2*SIZE2, hipMemcpyHostToDevice);
  kernel2<<<blocks_in_grid2, threads_in_block2>>>(d_k2);
  hipMemcpy(h_k2, d_k2, sizeof(double)*SIZE2*SIZE2, hipMemcpyDeviceToHost);
  /************** CUDA **************/
  hipEventRecord(end, 0);
  hipEventSynchronize(end);
  hipEventElapsedTime(&k2_time, start, end);
  hipEventDestroy(start);
  hipEventDestroy(end);
  cout << "Kernel 2 on GPU: " << ((2.0 * SIZE2 * SIZE2 * ITER) / (k2_time * 1.0e-3))
       << " GFLOPS; Time = " << k2_time << " msec" << endl;
  status = hipGetLastError();
  if (status != hipSuccess) {
    cerr << "CUDA Error: " << hipGetErrorString(status) << endl;
  }

  hipFree(d_k1);
  hipFree(d_k2);

  delete[] h_ser;
  delete[] h_k1;
  delete[] h_k2;

  return EXIT_SUCCESS;
}

	.text
	.file	"assignment5-p1.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z22__device_stub__kernel1Pd    # -- Begin function _Z22__device_stub__kernel1Pd
	.type	_Z22__device_stub__kernel1Pd,@function
_Z22__device_stub__kernel1Pd:           # @_Z22__device_stub__kernel1Pd
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsp, %rbx
	movq	%rax, (%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7kernel1Pd, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$80, %rsp
	.cfi_adjust_cfa_offset -80
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z22__device_stub__kernel1Pd, .Lfunc_end0-_Z22__device_stub__kernel1Pd
	.cfi_endproc
                                        # -- End function
	.globl	_Z22__device_stub__kernel2Pd    # -- Begin function _Z22__device_stub__kernel2Pd
	.type	_Z22__device_stub__kernel2Pd,@function
_Z22__device_stub__kernel2Pd:           # @_Z22__device_stub__kernel2Pd
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsp, %rbx
	movq	%rax, (%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7kernel2Pd, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$80, %rsp
	.cfi_adjust_cfa_offset -80
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z22__device_stub__kernel2Pd, .Lfunc_end1-_Z22__device_stub__kernel2Pd
	.cfi_endproc
                                        # -- End function
	.globl	_Z6serialPd                     # -- Begin function _Z6serialPd
	.type	_Z6serialPd,@function
_Z6serialPd:                            # @_Z6serialPd
	.cfi_startproc
# %bb.0:
	addq	$131080, %rdi                   # imm = 0x20008
	xorl	%eax, %eax
.LBB2_1:                                # %.preheader19
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_2 Depth 2
                                        #       Child Loop BB2_3 Depth 3
	movl	$1, %ecx
	movq	%rdi, %rdx
.LBB2_2:                                # %.preheader
                                        #   Parent Loop BB2_1 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB2_3 Depth 3
	movq	$-8191, %rsi                    # imm = 0xE001
.LBB2_3:                                #   Parent Loop BB2_1 Depth=1
                                        #     Parent Loop BB2_2 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movsd	-65544(%rdx,%rsi,8), %xmm0      # xmm0 = mem[0],zero
	addsd	-8(%rdx,%rsi,8), %xmm0
	addsd	65528(%rdx,%rsi,8), %xmm0
	movsd	%xmm0, -8(%rdx,%rsi,8)
	incq	%rsi
	jne	.LBB2_3
# %bb.4:                                #   in Loop: Header=BB2_2 Depth=2
	incq	%rcx
	addq	$65536, %rdx                    # imm = 0x10000
	cmpq	$8191, %rcx                     # imm = 0x1FFF
	jne	.LBB2_2
# %bb.5:                                #   in Loop: Header=BB2_1 Depth=1
	incl	%eax
	cmpl	$100, %eax
	jne	.LBB2_1
# %bb.6:
	retq
.Lfunc_end2:
	.size	_Z6serialPd, .Lfunc_end2-_Z6serialPd
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function _Z12check_resultPdS_m
.LCPI3_0:
	.quad	0x7fffffffffffffff              # double NaN
	.quad	0x7fffffffffffffff              # double NaN
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI3_1:
	.quad	0x3eb0c6f7a0b5ed8d              # double 9.9999999999999995E-7
	.text
	.globl	_Z12check_resultPdS_m
	.type	_Z12check_resultPdS_m,@function
_Z12check_resultPdS_m:                  # @_Z12check_resultPdS_m
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$16, %rsp
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -16
	testq	%rdx, %rdx
	je	.LBB3_10
# %bb.1:                                # %.preheader.preheader
	leaq	(,%rdx,8), %rcx
	xorpd	%xmm4, %xmm4
	xorl	%r8d, %r8d
	movapd	.LCPI3_0(%rip), %xmm0           # xmm0 = [NaN,NaN]
	movsd	.LCPI3_1(%rip), %xmm1           # xmm1 = mem[0],zero
	xorl	%eax, %eax
.LBB3_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_3 Depth 2
	xorl	%r9d, %r9d
.LBB3_3:                                #   Parent Loop BB3_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movsd	(%rdi,%r9,8), %xmm2             # xmm2 = mem[0],zero
	subsd	(%rsi,%r9,8), %xmm2
	movapd	%xmm2, %xmm3
	andpd	%xmm0, %xmm3
	ucomisd	%xmm1, %xmm3
	jbe	.LBB3_6
# %bb.4:                                #   in Loop: Header=BB3_3 Depth=2
	incl	%eax
	ucomisd	%xmm4, %xmm2
	jbe	.LBB3_6
# %bb.5:                                #   in Loop: Header=BB3_3 Depth=2
	movapd	%xmm2, %xmm4
.LBB3_6:                                #   in Loop: Header=BB3_3 Depth=2
	incq	%r9
	cmpq	%r9, %rdx
	jne	.LBB3_3
# %bb.7:                                #   in Loop: Header=BB3_2 Depth=1
	incq	%r8
	addq	%rcx, %rsi
	addq	%rcx, %rdi
	cmpq	%rdx, %r8
	jne	.LBB3_2
# %bb.8:                                # %._crit_edge
	testl	%eax, %eax
	jle	.LBB3_10
# %bb.9:
	movl	$_ZSt4cout, %edi
	movl	%eax, %esi
	movsd	%xmm4, 8(%rsp)                  # 8-byte Spill
	callq	_ZNSolsEi
	movq	%rax, %rbx
	movl	$.L.str, %esi
	movl	$28, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	.LCPI3_1(%rip), %xmm0           # xmm0 = mem[0],zero
	movq	%rbx, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.1, %esi
	movl	$13, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rbx, %rdi
	movsd	8(%rsp), %xmm0                  # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	addq	$16, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	_ZNSo5flushEv                   # TAILCALL
.LBB3_10:                               # %._crit_edge.thread
	.cfi_def_cfa_offset 32
	movl	$_ZSt4cout, %edi
	movl	$.L.str.2, %esi
	movl	$52, %edx
	addq	$16, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l # TAILCALL
.Lfunc_end3:
	.size	_Z12check_resultPdS_m, .Lfunc_end3-_Z12check_resultPdS_m
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z7rtclockv
.LCPI4_0:
	.quad	0x3eb0c6f7a0b5ed8d              # double 9.9999999999999995E-7
	.text
	.globl	_Z7rtclockv
	.type	_Z7rtclockv,@function
_Z7rtclockv:                            # @_Z7rtclockv
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	leaq	8(%rsp), %rdi
	leaq	24(%rsp), %rsi
	callq	gettimeofday
	testl	%eax, %eax
	je	.LBB4_2
# %bb.1:
	movl	%eax, %ebx
	movl	$_ZSt4cout, %edi
	movl	$.L.str.3, %esi
	movl	$32, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	%ebx, %esi
	callq	_ZNSolsEi
	movl	$.L.str.4, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.LBB4_2:
	cvtsi2sdq	8(%rsp), %xmm1
	cvtsi2sdq	16(%rsp), %xmm0
	mulsd	.LCPI4_0(%rip), %xmm0
	addsd	%xmm1, %xmm0
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z7rtclockv, .Lfunc_end4-_Z7rtclockv
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI5_0:
	.quad	0x4209000000000000              # double 13421772800
.LCPI5_1:
	.quad	0x408f400000000000              # double 1000
.LCPI5_2:
	.quad	0x3f50624dd2f1a9fc              # double 0.001
.LCPI5_3:
	.quad	0x42090c8190000000              # double 1.3448E+10
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$536870912, %edi                # imm = 0x20000000
	callq	_Znam
	movq	%rax, %rbx
	movl	$536870912, %edi                # imm = 0x20000000
	callq	_Znam
	movq	%rax, %r14
	xorl	%eax, %eax
	movabsq	$4607182418800017408, %r12      # imm = 0x3FF0000000000000
	movl	$65536, %ecx                    # imm = 0x10000
	movq	%rbx, %rdx
	movq	%r14, %rsi
.LBB5_1:                                # %.preheader66
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB5_2 Depth 2
	xorl	%edi, %edi
.LBB5_2:                                #   Parent Loop BB5_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	%r12, (%rdx,%rdi,8)
	movq	%r12, (%rsi,%rdi,8)
	incq	%rdi
	cmpq	$8192, %rdi                     # imm = 0x2000
	jne	.LBB5_2
# %bb.3:                                #   in Loop: Header=BB5_1 Depth=1
	incq	%rax
	addq	%rcx, %rsi
	addq	%rcx, %rdx
	cmpq	$8192, %rax                     # imm = 0x2000
	jne	.LBB5_1
# %bb.4:
	movl	$537920000, %edi                # imm = 0x20100200
	callq	_Znam
	movq	%rax, %r15
	xorl	%eax, %eax
	movq	%r15, %rcx
.LBB5_5:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB5_6 Depth 2
	xorl	%edx, %edx
.LBB5_6:                                #   Parent Loop BB5_5 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	%r12, (%rcx,%rdx,8)
	incq	%rdx
	cmpq	$8200, %rdx                     # imm = 0x2008
	jne	.LBB5_6
# %bb.7:                                #   in Loop: Header=BB5_5 Depth=1
	incq	%rax
	addq	$65600, %rcx                    # imm = 0x10040
	cmpq	$8200, %rax                     # imm = 0x2008
	jne	.LBB5_5
# %bb.8:
	movabsq	$4294967328, %r12               # imm = 0x100000020
	callq	_Z7rtclockv
	movsd	%xmm0, 24(%rsp)                 # 8-byte Spill
	movq	%rbx, %rdi
	callq	_Z6serialPd
	callq	_Z7rtclockv
	subsd	24(%rsp), %xmm0                 # 8-byte Folded Reload
	movsd	%xmm0, 24(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.5, %esi
	movl	$20, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	.LCPI5_0(%rip), %xmm0           # xmm0 = mem[0],zero
	divsd	24(%rsp), %xmm0                 # 8-byte Folded Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r13
	movl	$.L.str.6, %esi
	movl	$16, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	24(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI5_1(%rip), %xmm0
	movq	%r13, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r13
	movl	$.L.str.7, %esi
	movl	$5, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%r13), %rax
	movq	-24(%rax), %rdi
	addq	%r13, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r13, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	leaq	40(%rsp), %r13
	movl	$536870912, %esi                # imm = 0x20000000
	movq	%r13, %rdi
	callq	hipMalloc
	leaq	16(%rsp), %rbp
	movq	%rbp, %rdi
	callq	hipEventCreate
	leaq	8(%rsp), %rdi
	callq	hipEventCreate
	movq	(%rbp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%r13), %rdi
	movl	$536870912, %edx                # imm = 0x20000000
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	224(%r12), %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_10
# %bb.9:
	movq	40(%rsp), %rdi
	callq	_Z22__device_stub__kernel1Pd
.LBB5_10:
	movq	40(%rsp), %rsi
	movl	$536870912, %edx                # imm = 0x20000000
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	8(%rsp), %rdi
	callq	hipEventSynchronize
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	leaq	52(%rsp), %r13
	movq	%r13, %rdi
	callq	hipEventElapsedTime
	movq	16(%rsp), %rdi
	callq	hipEventDestroy
	movq	8(%rsp), %rdi
	callq	hipEventDestroy
	movl	$8192, %edx                     # imm = 0x2000
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	_Z12check_resultPdS_m
	movl	$_ZSt4cout, %edi
	movl	$.L.str.8, %esi
	movl	$17, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	cvtss2sd	(%r13), %xmm1
	mulsd	.LCPI5_2(%rip), %xmm1
	movsd	.LCPI5_0(%rip), %xmm0           # xmm0 = mem[0],zero
	divsd	%xmm1, %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbp
	movl	$.L.str.6, %esi
	movl	$16, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r13), %xmm0
	movq	%rbp, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r13
	movl	$.L.str.7, %esi
	movl	$5, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%r13), %rax
	movq	-24(%rax), %rdi
	addq	%r13, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r13, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB5_15
# %bb.11:
	movl	%eax, %edi
	callq	hipGetErrorString
	testq	%rax, %rax
	je	.LBB5_12
# %bb.13:
	movq	%rax, %r13
	movq	%rax, %rdi
	callq	strlen
	movl	$_ZSt4cerr, %edi
	movq	%r13, %rsi
	movq	%rax, %rdx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB5_14
.LBB5_12:
	movq	_ZSt4cerr(%rip), %rax
	movq	-24(%rax), %rax
	leaq	_ZSt4cerr(%rax), %rdi
	movl	32(%rdi), %esi
	orl	$1, %esi
	callq	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.LBB5_14:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
	movq	_ZSt4cerr(%rip), %rax
	movl	$_ZSt4cerr, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cerr, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.LBB5_15:
	leaq	32(%rsp), %r13
	movl	$537920000, %esi                # imm = 0x20100200
	movq	%r13, %rdi
	callq	hipMalloc
	leaq	16(%rsp), %rbp
	movq	%rbp, %rdi
	callq	hipEventCreate
	leaq	8(%rsp), %rdi
	callq	hipEventCreate
	movq	(%rbp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%r13), %rdi
	movl	$537920000, %edx                # imm = 0x20100200
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	225(%r12), %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_17
# %bb.16:
	movq	32(%rsp), %rdi
	callq	_Z22__device_stub__kernel2Pd
.LBB5_17:
	movq	32(%rsp), %rsi
	movl	$537920000, %edx                # imm = 0x20100200
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	8(%rsp), %rdi
	callq	hipEventSynchronize
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	leaq	48(%rsp), %r12
	movq	%r12, %rdi
	callq	hipEventElapsedTime
	movq	16(%rsp), %rdi
	callq	hipEventDestroy
	movq	8(%rsp), %rdi
	callq	hipEventDestroy
	movl	$_ZSt4cout, %edi
	movl	$.L.str.9, %esi
	movl	$17, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	cvtss2sd	(%r12), %xmm1
	mulsd	.LCPI5_2(%rip), %xmm1
	movsd	.LCPI5_3(%rip), %xmm0           # xmm0 = mem[0],zero
	divsd	%xmm1, %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r13
	movl	$.L.str.6, %esi
	movl	$16, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r12), %xmm0
	movq	%r13, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r12
	movl	$.L.str.7, %esi
	movl	$5, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%r12), %rax
	movq	-24(%rax), %rdi
	addq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r12, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB5_22
# %bb.18:
	movl	%eax, %ebp
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.10, %esi
	movl	$12, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebp, %edi
	callq	hipGetErrorString
	testq	%rax, %rax
	je	.LBB5_19
# %bb.20:
	movq	%rax, %r12
	movq	%rax, %rdi
	callq	strlen
	movl	$_ZSt4cerr, %edi
	movq	%r12, %rsi
	movq	%rax, %rdx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB5_21
.LBB5_19:
	movq	_ZSt4cerr(%rip), %rax
	movq	-24(%rax), %rax
	leaq	_ZSt4cerr(%rax), %rdi
	movl	32(%rdi), %esi
	orl	$1, %esi
	callq	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.LBB5_21:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit58
	movq	_ZSt4cerr(%rip), %rax
	movl	$_ZSt4cerr, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cerr, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.LBB5_22:
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	_ZdaPv
	movq	%r14, %rdi
	callq	_ZdaPv
	movq	%r15, %rdi
	callq	_ZdaPv
	xorl	%eax, %eax
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	main, .Lfunc_end5-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB6_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB6_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7kernel1Pd, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7kernel2Pd, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end6:
	.size	__hip_module_ctor, .Lfunc_end6-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB7_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB7_2:
	retq
.Lfunc_end7:
	.size	__hip_module_dtor, .Lfunc_end7-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z7kernel1Pd,@object            # @_Z7kernel1Pd
	.section	.rodata,"a",@progbits
	.globl	_Z7kernel1Pd
	.p2align	3, 0x0
_Z7kernel1Pd:
	.quad	_Z22__device_stub__kernel1Pd
	.size	_Z7kernel1Pd, 8

	.type	_Z7kernel2Pd,@object            # @_Z7kernel2Pd
	.globl	_Z7kernel2Pd
	.p2align	3, 0x0
_Z7kernel2Pd:
	.quad	_Z22__device_stub__kernel2Pd
	.size	_Z7kernel2Pd, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	" Diffs found over THRESHOLD "
	.size	.L.str, 29

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"; Max Diff = "
	.size	.L.str.1, 14

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"No differences found between base and test versions\n"
	.size	.L.str.2, 53

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Error return from gettimeofday: "
	.size	.L.str.3, 33

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"\n"
	.size	.L.str.4, 2

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Serial code on CPU: "
	.size	.L.str.5, 21

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	" GFLOPS; Time = "
	.size	.L.str.6, 17

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	" msec"
	.size	.L.str.7, 6

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"Kernel 1 on GPU: "
	.size	.L.str.8, 18

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"Kernel 2 on GPU: "
	.size	.L.str.9, 18

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"CUDA Error: "
	.size	.L.str.10, 13

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z7kernel1Pd"
	.size	.L__unnamed_1, 13

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z7kernel2Pd"
	.size	.L__unnamed_2, 13

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z22__device_stub__kernel1Pd
	.addrsig_sym _Z22__device_stub__kernel2Pd
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z7kernel1Pd
	.addrsig_sym _Z7kernel2Pd
	.addrsig_sym _ZSt4cout
	.addrsig_sym _ZSt4cerr
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z7kernel1Pd            ; -- Begin function _Z7kernel1Pd
	.globl	_Z7kernel1Pd
	.p2align	8
	.type	_Z7kernel1Pd,@function
_Z7kernel1Pd:                           ; @_Z7kernel1Pd
; %bb.0:
	s_load_b32 s2, s[0:1], 0x14
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e32 0x1fff, v1
	s_cbranch_execz .LBB0_5
; %bb.1:                                ; %.preheader19
	s_load_b64 s[0:1], s[0:1], 0x0
	s_mov_b32 s2, 0
	s_waitcnt lgkmcnt(0)
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
.LBB0_2:                                ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_3 Depth 2
	s_mov_b32 s3, 0
.LBB0_3:                                ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v2, s3, v1
	s_addk_i32 s3, 0x2000
	s_cmp_eq_u32 s3, 0x3ffc000
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v4, 0x2000, v2
	v_ashrrev_i32_e32 v3, 31, v2
	v_add_nc_u32_e32 v9, 0x4000, v2
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[6:7], 3, v[2:3]
	v_ashrrev_i32_e32 v10, 31, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[3:4], 3, v[4:5]
	v_add_co_u32 v5, vcc_lo, s0, v6
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v6, vcc_lo, s1, v7, vcc_lo
	v_add_co_u32 v3, vcc_lo, s0, v3
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	v_lshlrev_b64 v[9:10], 3, v[9:10]
	s_clause 0x1
	global_load_b64 v[5:6], v[5:6], off
	global_load_b64 v[7:8], v[3:4], off
	v_add_co_u32 v9, vcc_lo, s0, v9
	v_add_co_ci_u32_e32 v10, vcc_lo, s1, v10, vcc_lo
	global_load_b64 v[9:10], v[9:10], off
	s_waitcnt vmcnt(1)
	v_add_f64 v[5:6], v[5:6], v[7:8]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[5:6], v[5:6], v[9:10]
	global_store_b64 v[3:4], v[5:6], off
	s_cbranch_scc0 .LBB0_3
; %bb.4:                                ;   in Loop: Header=BB0_2 Depth=1
	s_add_i32 s2, s2, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmpk_eq_i32 s2, 0x64
	s_cbranch_scc0 .LBB0_2
.LBB0_5:                                ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7kernel1Pd
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 264
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z7kernel1Pd, .Lfunc_end0-_Z7kernel1Pd
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 300
; NumSgprs: 18
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z7kernel2Pd            ; -- Begin function _Z7kernel2Pd
	.globl	_Z7kernel2Pd
	.p2align	8
	.type	_Z7kernel2Pd,@function
_Z7kernel2Pd:                           ; @_Z7kernel2Pd
; %bb.0:
	s_load_b32 s2, s[0:1], 0x14
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e32 0x2007, v1
	s_cbranch_execz .LBB1_7
; %bb.1:                                ; %.preheader123
	s_load_b64 s[0:1], s[0:1], 0x0
	s_mov_b32 s2, 0
	s_waitcnt lgkmcnt(0)
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
.LBB1_2:                                ; %.preheader122
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_3 Depth 2
                                        ;     Child Loop BB1_5 Depth 2
	v_mov_b32_e32 v2, v1
	s_mov_b32 s3, -7
.LBB1_3:                                ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v4, 0x2008, v2
	v_ashrrev_i32_e32 v3, 31, v2
	v_add_nc_u32_e32 v31, 0x10040, v2
	v_add_nc_u32_e32 v9, 0x4010, v2
	v_add_nc_u32_e32 v13, 0x6018, v2
	v_ashrrev_i32_e32 v5, 31, v4
	v_lshlrev_b64 v[6:7], 3, v[2:3]
	v_add_nc_u32_e32 v17, 0x8020, v2
	v_add_nc_u32_e32 v21, 0xa028, v2
	v_add_nc_u32_e32 v25, 0xc030, v2
	v_lshlrev_b64 v[3:4], 3, v[4:5]
	v_add_nc_u32_e32 v27, 0xe038, v2
	v_add_co_u32 v5, vcc_lo, s0, v6
	v_add_co_ci_u32_e32 v6, vcc_lo, s1, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v3, vcc_lo, s0, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	v_add_nc_u32_e32 v36, 0x12048, v2
	v_mov_b32_e32 v2, v31
	s_clause 0x1
	global_load_b64 v[5:6], v[5:6], off
	global_load_b64 v[7:8], v[3:4], off
	v_ashrrev_i32_e32 v10, 31, v9
	v_ashrrev_i32_e32 v14, 31, v13
	v_ashrrev_i32_e32 v18, 31, v17
	v_ashrrev_i32_e32 v22, 31, v21
	v_ashrrev_i32_e32 v26, 31, v25
	v_lshlrev_b64 v[9:10], 3, v[9:10]
	v_lshlrev_b64 v[13:14], 3, v[13:14]
	v_lshlrev_b64 v[17:18], 3, v[17:18]
	v_lshlrev_b64 v[21:22], 3, v[21:22]
	v_ashrrev_i32_e32 v28, 31, v27
	v_ashrrev_i32_e32 v32, 31, v31
	v_add_co_u32 v9, vcc_lo, s0, v9
	v_add_co_ci_u32_e32 v10, vcc_lo, s1, v10, vcc_lo
	v_add_co_u32 v13, vcc_lo, s0, v13
	v_add_co_ci_u32_e32 v14, vcc_lo, s1, v14, vcc_lo
	global_load_b64 v[11:12], v[9:10], off
	v_add_co_u32 v17, vcc_lo, s0, v17
	global_load_b64 v[15:16], v[13:14], off
	v_add_co_ci_u32_e32 v18, vcc_lo, s1, v18, vcc_lo
	v_add_co_u32 v21, vcc_lo, s0, v21
	v_add_co_ci_u32_e32 v22, vcc_lo, s1, v22, vcc_lo
	global_load_b64 v[19:20], v[17:18], off
	v_lshlrev_b64 v[27:28], 3, v[27:28]
	v_lshlrev_b64 v[32:33], 3, v[31:32]
	global_load_b64 v[23:24], v[21:22], off
	v_ashrrev_i32_e32 v37, 31, v36
	s_add_i32 s3, s3, 8
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmpk_lt_u32 s3, 0x1ff8
	v_lshlrev_b64 v[36:37], 3, v[36:37]
	s_waitcnt vmcnt(4)
	v_add_f64 v[5:6], v[5:6], v[7:8]
	v_lshlrev_b64 v[7:8], 3, v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v7, vcc_lo, s0, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s1, v8, vcc_lo
	v_add_co_u32 v27, vcc_lo, s0, v27
	v_add_co_ci_u32_e32 v28, vcc_lo, s1, v28, vcc_lo
	global_load_b64 v[25:26], v[7:8], off
	v_add_co_u32 v32, vcc_lo, s0, v32
	global_load_b64 v[29:30], v[27:28], off
	v_add_co_ci_u32_e32 v33, vcc_lo, s1, v33, vcc_lo
	v_add_co_u32 v36, vcc_lo, s0, v36
	v_add_co_ci_u32_e32 v37, vcc_lo, s1, v37, vcc_lo
	s_clause 0x1
	global_load_b64 v[34:35], v[32:33], off
	global_load_b64 v[36:37], v[36:37], off
	s_waitcnt vmcnt(7)
	v_add_f64 v[5:6], v[5:6], v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[11:12], v[11:12], v[5:6]
	s_waitcnt vmcnt(6)
	v_add_f64 v[11:12], v[11:12], v[15:16]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[15:16], v[15:16], v[11:12]
	s_waitcnt vmcnt(5)
	v_add_f64 v[15:16], v[15:16], v[19:20]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[19:20], v[19:20], v[15:16]
	s_waitcnt vmcnt(4)
	v_add_f64 v[19:20], v[19:20], v[23:24]
	s_clause 0x3
	global_store_b64 v[3:4], v[5:6], off
	global_store_b64 v[9:10], v[11:12], off
	global_store_b64 v[13:14], v[15:16], off
	global_store_b64 v[17:18], v[19:20], off
	v_add_f64 v[23:24], v[23:24], v[19:20]
	s_waitcnt vmcnt(3)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[23:24], v[23:24], v[25:26]
	v_add_f64 v[25:26], v[25:26], v[23:24]
	s_waitcnt vmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[25:26], v[25:26], v[29:30]
	v_add_f64 v[29:30], v[29:30], v[25:26]
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[29:30], v[29:30], v[34:35]
	v_add_f64 v[34:35], v[34:35], v[29:30]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[34:35], v[34:35], v[36:37]
	s_clause 0x3
	global_store_b64 v[21:22], v[23:24], off
	global_store_b64 v[7:8], v[25:26], off
	global_store_b64 v[27:28], v[29:30], off
	global_store_b64 v[32:33], v[34:35], off
	s_cbranch_scc1 .LBB1_3
; %bb.4:                                ; %.lr.ph.preheader
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_mov_b32 s3, 0xffff3fd0
.LBB1_5:                                ; %.lr.ph
                                        ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v0, s3, v1
	s_addk_i32 s3, 0x2008
	s_cmp_eq_u32 s3, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v2, 0x401c030, v0
	v_add_nc_u32_e32 v4, 0x401e038, v0
	v_add_nc_u32_e32 v8, 0x4020040, v0
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v5, 31, v4
	v_ashrrev_i32_e32 v9, 31, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	v_lshlrev_b64 v[4:5], 3, v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[8:9], 3, v[8:9]
	v_add_co_u32 v2, vcc_lo, s0, v2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	v_add_co_u32 v4, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
	v_add_co_u32 v8, vcc_lo, s0, v8
	s_clause 0x1
	global_load_b64 v[2:3], v[2:3], off
	global_load_b64 v[6:7], v[4:5], off
	v_add_co_ci_u32_e32 v9, vcc_lo, s1, v9, vcc_lo
	global_load_b64 v[8:9], v[8:9], off
	s_waitcnt vmcnt(1)
	v_add_f64 v[2:3], v[2:3], v[6:7]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[2:3], v[2:3], v[8:9]
	global_store_b64 v[4:5], v[2:3], off
	s_cbranch_scc0 .LBB1_5
; %bb.6:                                ; %._crit_edge
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_add_i32 s2, s2, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmpk_eq_i32 s2, 0x64
	s_cbranch_scc0 .LBB1_2
.LBB1_7:                                ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7kernel2Pd
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 264
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 38
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z7kernel2Pd, .Lfunc_end1-_Z7kernel2Pd
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1012
; NumSgprs: 18
; NumVgprs: 38
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 4
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 38
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         12
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         20
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         22
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         24
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         26
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         28
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         30
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         48
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         72
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 264
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z7kernel1Pd
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z7kernel1Pd.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     11
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         12
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         20
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         22
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         24
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         26
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         28
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         30
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         48
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         72
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 264
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z7kernel2Pd
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z7kernel2Pd.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     38
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
