#include <iostream>
#include <cstdlib>
#include <cuda.h>
#include <ctime>
#include <sys/time.h>

using namespace std;

     /*the kernel code to run on the GPU device */
    __global__ 
          void matrix_mult_kernel(float* A, float* B, float* C, int M, int block_size){
           /* using specified conventions*/
               int Bx = blockIdx.x;
               int By = blockIdx.y;
               int Tx = threadIdx.x;
               int Ty = threadIdx.y;
               int Grid_size = M / block_size;
             
             
      /* defining row and column index tp parse through matrix A & B */
   int rowd = (By * block_size) + Ty;
   int columd = (Bx * block_size) + Tx;
   int rowds;
   int columds;
   extern  __shared__ float smem[];
                       float* ads = (float*)(smem);
                       float*  bds =(float*)(smem + block_size * block_size) ;
                       
  float tempsum = 0;

        ads[Ty * block_size + Tx] = 0;
        bds[Ty * block_size + Tx] = 0;
        

  

        /* copy data into the allocated shared memory */
        for(int k = 0; k < Grid_size; k++){
         rowds = rowd * M + (k * block_size + Tx);
         columds = (k * block_size + Ty) * M + columd;
        ads[Ty * block_size + Tx] =  A[rowds];
        bds[Ty * block_size + Tx] = B[columds];   
    
     __syncthreads();   // synchronize 

     for(int i = 0; i < block_size; i++)
     tempsum += ads[Ty * block_size + i] * bds[i * block_size + Tx];    
     
   __syncthreads();         
     }
   C[rowd * M + columd] = tempsum;
   
  } 
  


 int main(int argc, char* argv[]){ 
  int M = 4096;
  int B = atoi(argv[1]);   //block size
      
 
 /*allocate matrixes A, B, C in host memory*/ 
  float* ahptr = (float*)malloc(sizeof(float)* M * M);
  float* bhptr = (float*)malloc(sizeof(float)* M * M);
  float* chptr = (float*)malloc(sizeof(float)* M * M);
  float* dhptr = (float*)malloc(sizeof(float)* M * M);
 /* initialize matrices a, b in host memory*/
  
  for(int i = 0; i < M; i++){
   for(int j = 0; j < M; j++){
     *(ahptr + i * M + j) = ((i+1)*(j+1))/(float)M;
     *(bhptr + i * M + j) = (float)(j+1)/(i+1); 
     *(chptr +i * M + j) = 0;
     *(dhptr +i * M + j) = (i+1)*(j+1);
   }
 }
   
     //verify result   
   cout<<"result verifier"<<endl;
    for(int w = 2044; w < 2052; w++){
     for(int s = 0; s < 8; s++){
     cout<< *(dhptr + w * M + s)<<" ";
     }
   cout<<endl;
   }
  cout<<" "<<endl;

    /*allocate memoryon the device*/
 
   float* ad;
   float* bd;
   float* cd;

  cudaMalloc((void**)&ad,sizeof(float)* M * M);
  cudaMalloc((void**)&bd,sizeof(float)* M * M); 
  cudaMalloc((void**)&cd,sizeof(float)* M* M);
   /*set shared memory to 48kB and Li cache to 16kB*/
  cudaDeviceSetCacheConfig(cudaFuncCachePreferShared);  
   /* measuring the execution time*/
 cudaEvent_t start, stop;
 cudaEventCreate(&start);
 cudaEventCreate(&stop);
    /*copy matrices from host to device */
   cudaMemcpy(ad, ahptr, sizeof(float) * M * M, cudaMemcpyHostToDevice);
   cudaMemcpy(bd, bhptr, sizeof(float) * M * M, cudaMemcpyHostToDevice);

     /*invoking the kernel */
     int block_size = B;
    dim3 threadsPerBlock(block_size, block_size);
    int numblocks = M / block_size;
    dim3 blocksPerGrid(numblocks, numblocks);

 cudaEventRecord(start);
 matrix_mult_kernel<<< blocksPerGrid, threadsPerBlock, sizeof(float) * block_size * block_size * 2 >>>(ad, bd, cd, M, B);

   /* copy result from device to host */
 cudaMemcpy(chptr, cd, sizeof(float) * M * M, cudaMemcpyDeviceToHost);

 cudaEventRecord(stop);
 cudaEventSynchronize(stop);

float milliseconds = 0.0;
 
 cudaEventElapsedTime(&milliseconds, start, stop);

 cout<<"the parallel execution time for block size "<< B << " is "<< milliseconds <<" msecs" <<endl; 

    /*print a section of the result to verify result*/ 
   cout<<" a section of the GPU result;"<<endl;
    for(int h = 2044; h < 2052; h++){
   for(int t = 0; t < 8; t++){
   cout<< *(chptr + h * M + t) <<" ";
  }
  cout<<endl;
 }
 cout<<" "<<endl;

 /* free device memory*/
cudaFree(ad);
cudaFree(bd);
cudaFree(cd);

 /*free host memory*/
delete [] ahptr;
delete [] bhptr;
delete [] chptr;

 return 0;
 
 };

	.file	"tmpxft_002add4d_00000000-6_cuda_matrix.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3638:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3638:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.align 2
	.type	_ZNSolsEPFRSoS_E.isra.0, @function
_ZNSolsEPFRSoS_E.isra.0:
.LFB4293:
	.cfi_startproc
	jmp	*%rsi
	.cfi_endproc
.LFE4293:
	.size	_ZNSolsEPFRSoS_E.isra.0, .-_ZNSolsEPFRSoS_E.isra.0
	.globl	_Z44__device_stub__Z18matrix_mult_kernelPfS_S_iiPfS_S_ii
	.type	_Z44__device_stub__Z18matrix_mult_kernelPfS_S_iiPfS_S_ii, @function
_Z44__device_stub__Z18matrix_mult_kernelPfS_S_iiPfS_S_ii:
.LFB3660:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L3
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z18matrix_mult_kernelPfS_S_ii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L3:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L5
	call	__stack_chk_fail@PLT
.L5:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3660:
	.size	_Z44__device_stub__Z18matrix_mult_kernelPfS_S_iiPfS_S_ii, .-_Z44__device_stub__Z18matrix_mult_kernelPfS_S_iiPfS_S_ii
	.globl	_Z18matrix_mult_kernelPfS_S_ii
	.type	_Z18matrix_mult_kernelPfS_S_ii, @function
_Z18matrix_mult_kernelPfS_S_ii:
.LFB3661:
	.cfi_startproc
	endbr64
	jmp	_Z44__device_stub__Z18matrix_mult_kernelPfS_S_iiPfS_S_ii
	.cfi_endproc
.LFE3661:
	.size	_Z18matrix_mult_kernelPfS_S_ii, .-_Z18matrix_mult_kernelPfS_S_ii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"result verifier"
.LC2:
	.string	" "
.LC4:
	.string	"the parallel execution time for block size "
.LC5:
	.string	" is "
.LC6:
	.string	" msecs"
.LC7:
	.string	" a section of the GPU result;"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	movq	8(%rsi), %rdi
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	call	atoi@PLT
	movl	$67108864, %edi
	movl	%eax, %ebx
	call	malloc@PLT
	movl	$67108864, %edi
	movq	%rax, %r13
	call	malloc@PLT
	movl	$67108864, %edi
	movq	%rax, %r12
	call	malloc@PLT
	movl	$67108864, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	movss	.LC0(%rip), %xmm2
	xorl	%ecx, %ecx
	movq	%rax, %r14
	movl	$1, %eax
.L11:
	cvtsi2ssl	%eax, %xmm3
	leaq	0(,%rcx,4), %rdx
	movl	%eax, %edi
	xorl	%esi, %esi
.L10:
	cvtsi2ssl	%edi, %xmm1
	incl	%esi
	addl	%eax, %edi
	movaps	%xmm1, %xmm0
	movss	%xmm1, (%r14,%rdx)
	mulss	%xmm2, %xmm0
	movss	%xmm0, 0(%r13,%rdx)
	cvtsi2ssl	%esi, %xmm0
	divss	%xmm3, %xmm0
	movss	%xmm0, (%r12,%rdx)
	addq	$4, %rdx
	cmpl	$4096, %esi
	jne	.L10
	addq	$4096, %rcx
	incl	%eax
	cmpq	$16777216, %rcx
	jne	.L11
	xorl	%eax, %eax
	movq	%rbp, %rdi
	leaq	.LC1(%rip), %rsi
	movl	$8372224, %r15d
	rep stosl
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
.L14:
	leaq	(%r14,%r15,4), %rcx
	xorl	%edx, %edx
.L15:
	leaq	_ZSt4cout(%rip), %rdi
	cvtss2sd	(%rcx,%rdx,4), %xmm0
	movq	%rcx, 8(%rsp)
	movq	%rdx, (%rsp)
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC2(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	(%rsp), %rdx
	movq	8(%rsp), %rcx
	incq	%rdx
	cmpq	$8, %rdx
	jne	.L15
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	addq	$4096, %r15
	call	_ZNSolsEPFRSoS_E.isra.0
	cmpq	$8404992, %r15
	jne	.L14
	leaq	.LC2(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	24(%rsp), %rdi
	movl	$67108864, %esi
	call	cudaMalloc@PLT
	leaq	32(%rsp), %rdi
	movl	$67108864, %esi
	call	cudaMalloc@PLT
	movl	$67108864, %esi
	leaq	40(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$1, %edi
	call	cudaDeviceSetCacheConfig@PLT
	leaq	48(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	56(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movq	%r13, %rsi
	movl	$67108864, %edx
	call	cudaMemcpy@PLT
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$67108864, %edx
	call	cudaMemcpy@PLT
	movl	$4096, %eax
	xorl	%esi, %esi
	movl	%ebx, 64(%rsp)
	cltd
	movq	48(%rsp), %rdi
	movl	%ebx, 68(%rsp)
	idivl	%ebx
	movl	$1, 72(%rsp)
	movl	$1, 84(%rsp)
	movl	%eax, 76(%rsp)
	movl	%eax, 80(%rsp)
	call	cudaEventRecord@PLT
	movslq	%ebx, %rax
	movl	72(%rsp), %ecx
	movl	84(%rsp), %esi
	imulq	%rax, %rax
	movq	64(%rsp), %rdx
	movq	76(%rsp), %rdi
	xorl	%r9d, %r9d
	leaq	0(,%rax,8), %r8
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L17
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	movl	%ebx, %r8d
	movl	$4096, %ecx
	movq	24(%rsp), %rdi
	call	_Z44__device_stub__Z18matrix_mult_kernelPfS_S_iiPfS_S_ii
.L17:
	movq	40(%rsp), %rsi
	movl	$2, %ecx
	movl	$67108864, %edx
	movq	%rbp, %rdi
	call	cudaMemcpy@PLT
	movq	56(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	56(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rsi
	leaq	20(%rsp), %rdi
	movl	$0x00000000, 20(%rsp)
	call	cudaEventElapsedTime@PLT
	leaq	.LC4(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebx, %esi
	movl	$8372224, %ebx
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC5(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtss2sd	20(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC6(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC7(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
.L18:
	leaq	0(%rbp,%rbx,4), %r15
	xorl	%r14d, %r14d
.L19:
	leaq	_ZSt4cout(%rip), %rdi
	cvtss2sd	(%r15,%r14,4), %xmm0
	incq	%r14
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC2(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cmpq	$8, %r14
	jne	.L19
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	addq	$4096, %rbx
	call	_ZNSolsEPFRSoS_E.isra.0
	cmpq	$8404992, %rbx
	jne	.L18
	leaq	.LC2(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	%r13, %rdi
	call	_ZdaPv@PLT
	movq	%r12, %rdi
	call	_ZdaPv@PLT
	movq	%rbp, %rdi
	call	_ZdaPv@PLT
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L21
	call	__stack_chk_fail@PLT
.L21:
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	main, .-main
	.section	.rodata.str1.1
.LC8:
	.string	"_Z18matrix_mult_kernelPfS_S_ii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3663:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC8(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z18matrix_mult_kernelPfS_S_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3663:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	964689920
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <cstdlib>
#include <hip/hip_runtime.h>
#include <ctime>
#include <sys/time.h>

using namespace std;

     /*the kernel code to run on the GPU device */
    __global__ 
          void matrix_mult_kernel(float* A, float* B, float* C, int M, int block_size){
           /* using specified conventions*/
               int Bx = blockIdx.x;
               int By = blockIdx.y;
               int Tx = threadIdx.x;
               int Ty = threadIdx.y;
               int Grid_size = M / block_size;
             
             
      /* defining row and column index tp parse through matrix A & B */
   int rowd = (By * block_size) + Ty;
   int columd = (Bx * block_size) + Tx;
   int rowds;
   int columds;
   extern  __shared__ float smem[];
                       float* ads = (float*)(smem);
                       float*  bds =(float*)(smem + block_size * block_size) ;
                       
  float tempsum = 0;

        ads[Ty * block_size + Tx] = 0;
        bds[Ty * block_size + Tx] = 0;
        

  

        /* copy data into the allocated shared memory */
        for(int k = 0; k < Grid_size; k++){
         rowds = rowd * M + (k * block_size + Tx);
         columds = (k * block_size + Ty) * M + columd;
        ads[Ty * block_size + Tx] =  A[rowds];
        bds[Ty * block_size + Tx] = B[columds];   
    
     __syncthreads();   // synchronize 

     for(int i = 0; i < block_size; i++)
     tempsum += ads[Ty * block_size + i] * bds[i * block_size + Tx];    
     
   __syncthreads();         
     }
   C[rowd * M + columd] = tempsum;
   
  } 
  


 int main(int argc, char* argv[]){ 
  int M = 4096;
  int B = atoi(argv[1]);   //block size
      
 
 /*allocate matrixes A, B, C in host memory*/ 
  float* ahptr = (float*)malloc(sizeof(float)* M * M);
  float* bhptr = (float*)malloc(sizeof(float)* M * M);
  float* chptr = (float*)malloc(sizeof(float)* M * M);
  float* dhptr = (float*)malloc(sizeof(float)* M * M);
 /* initialize matrices a, b in host memory*/
  
  for(int i = 0; i < M; i++){
   for(int j = 0; j < M; j++){
     *(ahptr + i * M + j) = ((i+1)*(j+1))/(float)M;
     *(bhptr + i * M + j) = (float)(j+1)/(i+1); 
     *(chptr +i * M + j) = 0;
     *(dhptr +i * M + j) = (i+1)*(j+1);
   }
 }
   
     //verify result   
   cout<<"result verifier"<<endl;
    for(int w = 2044; w < 2052; w++){
     for(int s = 0; s < 8; s++){
     cout<< *(dhptr + w * M + s)<<" ";
     }
   cout<<endl;
   }
  cout<<" "<<endl;

    /*allocate memoryon the device*/
 
   float* ad;
   float* bd;
   float* cd;

  hipMalloc((void**)&ad,sizeof(float)* M * M);
  hipMalloc((void**)&bd,sizeof(float)* M * M); 
  hipMalloc((void**)&cd,sizeof(float)* M* M);
   /*set shared memory to 48kB and Li cache to 16kB*/
  hipDeviceSetCacheConfig(hipFuncCachePreferShared);  
   /* measuring the execution time*/
 hipEvent_t start, stop;
 hipEventCreate(&start);
 hipEventCreate(&stop);
    /*copy matrices from host to device */
   hipMemcpy(ad, ahptr, sizeof(float) * M * M, hipMemcpyHostToDevice);
   hipMemcpy(bd, bhptr, sizeof(float) * M * M, hipMemcpyHostToDevice);

     /*invoking the kernel */
     int block_size = B;
    dim3 threadsPerBlock(block_size, block_size);
    int numblocks = M / block_size;
    dim3 blocksPerGrid(numblocks, numblocks);

 hipEventRecord(start);
 matrix_mult_kernel<<< blocksPerGrid, threadsPerBlock, sizeof(float) * block_size * block_size * 2 >>>(ad, bd, cd, M, B);

   /* copy result from device to host */
 hipMemcpy(chptr, cd, sizeof(float) * M * M, hipMemcpyDeviceToHost);

 hipEventRecord(stop);
 hipEventSynchronize(stop);

float milliseconds = 0.0;
 
 hipEventElapsedTime(&milliseconds, start, stop);

 cout<<"the parallel execution time for block size "<< B << " is "<< milliseconds <<" msecs" <<endl; 

    /*print a section of the result to verify result*/ 
   cout<<" a section of the GPU result;"<<endl;
    for(int h = 2044; h < 2052; h++){
   for(int t = 0; t < 8; t++){
   cout<< *(chptr + h * M + t) <<" ";
  }
  cout<<endl;
 }
 cout<<" "<<endl;

 /* free device memory*/
hipFree(ad);
hipFree(bd);
hipFree(cd);

 /*free host memory*/
delete [] ahptr;
delete [] bhptr;
delete [] chptr;

 return 0;
 
 };

	.text
	.file	"cuda_matrix.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z33__device_stub__matrix_mult_kernelPfS_S_ii # -- Begin function _Z33__device_stub__matrix_mult_kernelPfS_S_ii
	.type	_Z33__device_stub__matrix_mult_kernelPfS_S_ii,@function
_Z33__device_stub__matrix_mult_kernelPfS_S_ii: # @_Z33__device_stub__matrix_mult_kernelPfS_S_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	movq	%rsp, %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z18matrix_mult_kernelPfS_S_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z33__device_stub__matrix_mult_kernelPfS_S_ii, .Lfunc_end0-_Z33__device_stub__matrix_mult_kernelPfS_S_ii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI1_0:
	.long	0x39800000                      # float 2.44140625E-4
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	8(%rsi), %rdi
	callq	atoi
	movl	%eax, %ebp
	movl	$67108864, %edi                 # imm = 0x4000000
	callq	malloc
	movq	%rax, %r15
	movl	$67108864, %edi                 # imm = 0x4000000
	callq	malloc
	movq	%rax, %rbx
	movl	$1, %edi
	movl	$67108864, %esi                 # imm = 0x4000000
	callq	calloc@PLT
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	movl	$67108864, %edi                 # imm = 0x4000000
	callq	malloc
	movq	%rax, %r12
	movl	$1, %eax
	xorl	%ecx, %ecx
	movss	.LCPI1_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	movl	$16384, %edx                    # imm = 0x4000
	movq	%r15, %rsi
	movq	%rbx, 32(%rsp)                  # 8-byte Spill
	movq	%r12, %r8
.LBB1_1:                                # %.preheader101
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_2 Depth 2
	incq	%rcx
	xorps	%xmm1, %xmm1
	cvtsi2ss	%ecx, %xmm1
	movl	%eax, %r9d
	xorl	%r10d, %r10d
.LBB1_2:                                #   Parent Loop BB1_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	leaq	1(%r10), %r11
	xorps	%xmm2, %xmm2
	cvtsi2ss	%r9d, %xmm2
	movss	%xmm2, (%r8,%r10,4)
	mulss	%xmm0, %xmm2
	movss	%xmm2, (%rsi,%r10,4)
	xorps	%xmm2, %xmm2
	cvtsi2ss	%r11d, %xmm2
	divss	%xmm1, %xmm2
	movss	%xmm2, (%rbx,%r10,4)
	addl	%eax, %r9d
	movq	%r11, %r10
	cmpq	$4096, %r11                     # imm = 0x1000
	jne	.LBB1_2
# %bb.3:                                #   in Loop: Header=BB1_1 Depth=1
	addq	%rdx, %r8
	addq	%rdx, %rbx
	addq	%rdx, %rsi
	incl	%eax
	cmpq	$4096, %rcx                     # imm = 0x1000
	jne	.LBB1_1
# %bb.4:
	movl	$_ZSt4cout, %ebx
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$15, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	addq	$33488896, %r12                 # imm = 0x1FF0000
	movl	$2044, %r14d                    # imm = 0x7FC
.LBB1_5:                                # %.preheader100
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_6 Depth 2
	xorl	%r13d, %r13d
.LBB1_6:                                #   Parent Loop BB1_5 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r12,%r13,4), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.1, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	incq	%r13
	cmpq	$8, %r13
	jne	.LBB1_6
# %bb.7:                                #   in Loop: Header=BB1_5 Depth=1
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	incq	%r14
	addq	$16384, %r12                    # imm = 0x4000
	cmpq	$2052, %r14                     # imm = 0x804
	jne	.LBB1_5
# %bb.8:
	movl	$_ZSt4cout, %ebx
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	leaq	48(%rsp), %r14
	movl	$67108864, %esi                 # imm = 0x4000000
	movq	%r14, %rdi
	callq	hipMalloc
	leaq	40(%rsp), %r13
	movl	$67108864, %esi                 # imm = 0x4000000
	movq	%r13, %rdi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movl	$67108864, %esi                 # imm = 0x4000000
	callq	hipMalloc
	movl	$1, %edi
	callq	hipDeviceSetCacheConfig
	leaq	56(%rsp), %r12
	movq	%r12, %rdi
	callq	hipEventCreate
	leaq	8(%rsp), %rdi
	callq	hipEventCreate
	movq	(%r14), %rdi
	movl	$67108864, %edx                 # imm = 0x4000000
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r13), %rdi
	movl	$67108864, %edx                 # imm = 0x4000000
	movq	32(%rsp), %rsi                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	movl	%ebp, %eax
	movq	%rax, %r14
	shlq	$32, %r14
	orq	%rax, %r14
	movl	$4096, %eax                     # imm = 0x1000
	xorl	%edx, %edx
	idivl	%ebp
                                        # kill: def $eax killed $eax def $rax
	movq	%rax, %r13
	shlq	$32, %r13
	orq	%rax, %r13
	movq	(%r12), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movslq	%ebp, %r8
	imulq	%r8, %r8
	shlq	$3, %r8
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_10
# %bb.9:
	movq	48(%rsp), %rdi
	movq	40(%rsp), %rsi
	movq	16(%rsp), %rdx
	movl	$4096, %ecx                     # imm = 0x1000
	movl	%ebp, %r8d
	callq	_Z33__device_stub__matrix_mult_kernelPfS_S_ii
.LBB1_10:
	movq	16(%rsp), %rsi
	movl	$67108864, %edx                 # imm = 0x4000000
	movq	24(%rsp), %r13                  # 8-byte Reload
	movq	%r13, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	8(%rsp), %rdi
	callq	hipEventSynchronize
	leaq	68(%rsp), %r14
	movl	$0, (%r14)
	movq	56(%rsp), %rsi
	movq	8(%rsp), %rdx
	movq	%r14, %rdi
	callq	hipEventElapsedTime
	movl	$_ZSt4cout, %edi
	movl	$.L.str.2, %esi
	movl	$43, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	%ebp, %esi
	callq	_ZNSolsEi
	movq	%rax, %r12
	movl	$.L.str.3, %esi
	movl	$4, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	cvtss2sd	(%r14), %xmm0
	movq	%r12, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r14
	movl	$.L.str.4, %esi
	movl	$6, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%r14), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r14, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$_ZSt4cout, %edi
	movl	$.L.str.5, %esi
	movl	$29, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	%r13, %r14
	addq	$33488896, %r14                 # imm = 0x1FF0000
	movl	$2044, %r12d                    # imm = 0x7FC
.LBB1_11:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_12 Depth 2
	xorl	%r13d, %r13d
.LBB1_12:                               #   Parent Loop BB1_11 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r14,%r13,4), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.1, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	incq	%r13
	cmpq	$8, %r13
	jne	.LBB1_12
# %bb.13:                               #   in Loop: Header=BB1_11 Depth=1
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	incq	%r12
	addq	$16384, %r14                    # imm = 0x4000
	cmpq	$2052, %r12                     # imm = 0x804
	jne	.LBB1_11
# %bb.14:
	movl	$_ZSt4cout, %ebx
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	48(%rsp), %rdi
	callq	hipFree
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	testq	%r15, %r15
	je	.LBB1_16
# %bb.15:
	movq	%r15, %rdi
	callq	_ZdaPv
.LBB1_16:
	movq	32(%rsp), %rdi                  # 8-byte Reload
	testq	%rdi, %rdi
	je	.LBB1_18
# %bb.17:
	callq	_ZdaPv
.LBB1_18:
	movq	24(%rsp), %rdi                  # 8-byte Reload
	callq	_ZdaPv
	xorl	%eax, %eax
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z18matrix_mult_kernelPfS_S_ii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z18matrix_mult_kernelPfS_S_ii,@object # @_Z18matrix_mult_kernelPfS_S_ii
	.section	.rodata,"a",@progbits
	.globl	_Z18matrix_mult_kernelPfS_S_ii
	.p2align	3, 0x0
_Z18matrix_mult_kernelPfS_S_ii:
	.quad	_Z33__device_stub__matrix_mult_kernelPfS_S_ii
	.size	_Z18matrix_mult_kernelPfS_S_ii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"result verifier"
	.size	.L.str, 16

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	" "
	.size	.L.str.1, 2

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"the parallel execution time for block size "
	.size	.L.str.2, 44

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	" is "
	.size	.L.str.3, 5

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	" msecs"
	.size	.L.str.4, 7

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	" a section of the GPU result;"
	.size	.L.str.5, 30

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z18matrix_mult_kernelPfS_S_ii"
	.size	.L__unnamed_1, 31

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z33__device_stub__matrix_mult_kernelPfS_S_ii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z18matrix_mult_kernelPfS_S_ii
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z18matrix_mult_kernelPfS_S_ii ; -- Begin function _Z18matrix_mult_kernelPfS_S_ii
	.globl	_Z18matrix_mult_kernelPfS_S_ii
	.p2align	8
	.type	_Z18matrix_mult_kernelPfS_S_ii,@function
_Z18matrix_mult_kernelPfS_S_ii:         ; @_Z18matrix_mult_kernelPfS_S_ii
; %bb.0:
	s_load_b256 s[4:11], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s0, s11, 31
	s_ashr_i32 s2, s10, 31
	s_add_i32 s1, s11, s0
	s_add_i32 s13, s10, s2
	s_xor_b32 s1, s1, s0
	s_xor_b32 s13, s13, s2
	v_cvt_f32_u32_e32 v1, s1
	s_sub_i32 s12, 0, s1
	s_xor_b32 s2, s2, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	v_cvt_u32_f32_e32 v2, v1
	v_bfe_u32 v1, v0, 10, 10
	v_and_b32_e32 v0, 0x3ff, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_readfirstlane_b32 s3, v2
	v_mad_u64_u32 v[5:6], null, s15, s11, v[1:2]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mad_u64_u32 v[2:3], null, s14, s11, v[0:1]
	s_mul_i32 s12, s12, s3
	v_mul_lo_u32 v8, v1, s11
	s_mul_hi_u32 s12, s3, s12
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v3, v5, s10
	v_mov_b32_e32 v5, 0
	s_add_i32 s3, s3, s12
	s_mul_i32 s12, s11, s11
	s_mul_hi_u32 s3, s13, s3
	v_add_lshl_u32 v6, v8, v0, 2
	s_mul_i32 s14, s3, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_sub_i32 s0, s13, s14
	s_add_i32 s13, s3, 1
	s_sub_i32 s14, s0, s1
	s_cmp_ge_u32 s0, s1
	v_add_nc_u32_e32 v4, 0, v6
	s_cselect_b32 s3, s13, s3
	s_cselect_b32 s0, s14, s0
	s_add_i32 s13, s3, 1
	s_cmp_ge_u32 s0, s1
	s_cselect_b32 s0, s13, s3
	s_lshl_b32 s1, s12, 2
	s_xor_b32 s3, s0, s2
	s_add_i32 s0, s1, 0
	s_sub_i32 s1, s3, s2
	v_add_nc_u32_e32 v6, s0, v6
	s_mov_b32 s2, 0
	s_cmp_lt_i32 s1, 1
	ds_store_b32 v4, v5
	ds_store_b32 v6, v5
	s_cbranch_scc1 .LBB0_5
; %bb.1:                                ; %.lr.ph70
	s_cmp_gt_i32 s11, 0
	v_add_nc_u32_e32 v7, v3, v0
	s_cselect_b32 s3, -1, 0
	v_lshl_add_u32 v0, v0, 2, s0
	v_cndmask_b32_e64 v9, 0, 1, s3
	v_lshl_add_u32 v8, v8, 2, 0
	v_mov_b32_e32 v5, 0
	s_lshl_b32 s3, s11, 2
	s_delay_alu instid0(VALU_DEP_3)
	v_cmp_ne_u32_e64 s0, 1, v9
.LBB0_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_3 Depth 2
	s_mul_i32 s12, s2, s11
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v10, s12, v1
	v_add_nc_u32_e32 v9, s12, v7
	s_mov_b32 s12, s11
	v_mad_u64_u32 v[11:12], null, v10, s10, v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v10, 31, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v12, 31, v11
	v_add_co_u32 v9, vcc_lo, s4, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[11:12], 2, v[11:12]
	v_add_co_ci_u32_e32 v10, vcc_lo, s5, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v11, vcc_lo, s6, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s7, v12, vcc_lo
	global_load_b32 v13, v[9:10], off
	global_load_b32 v11, v[11:12], off
	v_mov_b32_e32 v10, v0
	v_mov_b32_e32 v9, v8
	s_and_b32 vcc_lo, exec_lo, s0
	s_waitcnt vmcnt(1)
	ds_store_b32 v4, v13
	s_waitcnt vmcnt(0)
	ds_store_b32 v6, v11
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_vccnz .LBB0_4
.LBB0_3:                                ; %.lr.ph
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	ds_load_b32 v11, v9
	ds_load_b32 v12, v10
	v_add_nc_u32_e32 v10, s3, v10
	v_add_nc_u32_e32 v9, 4, v9
	s_add_i32 s12, s12, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s12, 0
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v5, v11, v12
	s_cbranch_scc0 .LBB0_3
.LBB0_4:                                ; %._crit_edge
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_add_i32 s2, s2, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s2, s1
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB0_2
.LBB0_5:                                ; %Flow93
	v_add_nc_u32_e32 v0, v3, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s8, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s9, v1, vcc_lo
	global_store_b32 v[0:1], v5, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z18matrix_mult_kernelPfS_S_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 32
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z18matrix_mult_kernelPfS_S_ii, .Lfunc_end0-_Z18matrix_mult_kernelPfS_S_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 616
; NumSgprs: 18
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 32
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z18matrix_mult_kernelPfS_S_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z18matrix_mult_kernelPfS_S_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     14
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
