#include <iostream>

/**
 * @brief Perform general 1-D grid, 2-D block reduce, along X-direction.
 *
 * @details This device function implements the reduce algorithms. The grid is
 * in 1-D X-direction, i.e. `gridDim.x >= 1`,`gridDim.y == 1` and
 * `gridDim.z == 1`. The block is in 2-D X- and Y-direction, i.e.
 * `blockDim.x >= 1` and `blockDim.y >= 1`, `blockDim.z == 1`. To achieve higher
 * parallelization, the shared memory will have size
 * `blockDim.x * blockDim.y * 2`. The input array will be *divided* into smaller
 * parts and assigned to each thread block. That is, each block will be assigned
 * an *sub-array* with length at most `blockDim.x * blockDim.y * 2`.
 *
 * @tparam      DataType        The type of data, which is processed.
 * @tparam      Operation       The operation type, it is related to the lambda
 * function parameter.
 *
 * @param[in]   d_inputArr      The input array, type is determined by the
 * template.
 *
 * @param[in]   inputArrLength  The length of the input array.
 * @param[out]  d_outputArr     The output array, in device memory, type is
 * determined by the template. The length of it must be `gridDim.x * blockDim.y`
 *
 * @param[in]   oper            The operation performed on two elements in the
 * array. It should be a function or lambda expression defined in a
 * `__global__` function, which has two reference parameters. The result on
 * these two parameters will be stored in the first parameter, the second
 * parameter should be set to identity.
 *
 * @param[in]   identity        The identity of the operation. (The same concept
 * in group theory.)
 *
 */
template < class DataType, class Operation >
__device__
void
g1b2_reduce_x(
        const DataType *const   d_inputArr,
        const size_t            inputArrLength,
        DataType *const         d_outputArr,
        const Operation         &oper,
        const DataType          identity
        ) {
    // Make shared memory visible in kernel
    extern __shared__ DataType sdata[];

    // Calculate indices
    int sdataAbsIdx = threadIdx.x * blockDim.y + threadIdx.y;
    int initStride = blockDim.x * blockDim.y;
    int inputArrAbsIdx = 2 * blockIdx.x * initStride + sdataAbsIdx;

    // Initialize shared memory according to the absolute location of
    // thread-releated element in the input array. If a thread-related element
    // does not exist, the corresponding shared memory will be filled with
    // identity value of the operation.
    if (inputArrAbsIdx >= inputArrLength) {
        // The thread-related left element does not exist in the input array.
        sdata[sdataAbsIdx] = identity;
        sdata[sdataAbsIdx + initStride] = identity;
    }
    else if (inputArrAbsIdx + initStride >= inputArrLength) {
        // The thread-related right element does not exist in the input array.
        sdata[sdataAbsIdx] = d_inputArr[inputArrAbsIdx];
        sdata[sdataAbsIdx + initStride] = identity;
    }
    else {
        // The thread-related elements exist in the input array.
        sdata[sdataAbsIdx] = d_inputArr[inputArrAbsIdx];
        sdata[sdataAbsIdx + initStride]
            = d_inputArr[inputArrAbsIdx + initStride];
    }
    // Thread synchronization, wait for shared memory initialization's finish.
    __syncthreads();

    // Perform reduce, the initial stride is blockDim.x
    for (unsigned int stride = static_cast<unsigned int>(blockDim.x);
        stride > 0;
        stride = (stride & 0x1) ? stride >> 1 + 1 : stride >> 1) {
        // The thread with X-ID smaller than the stride will be omitted.
        if (threadIdx.x < stride)
            // Compute absolute stride and perform operation
            oper(sdata[sdataAbsIdx], sdata[sdataAbsIdx + stride * blockDim.y]);
        // Thread synchronization after every stride.
        __syncthreads();
    }

    // Because reduce is executed in X-direction, only the elements in shared
    // memory related to the `threadIdx.x == 0` stored the results. Here only
    // the corresponding elements will be written into the output array.
    if (0 == threadIdx.x)
        d_outputArr[blockIdx.x * blockDim.y + threadIdx.y] = sdata[sdataAbsIdx];
}

#define HIST_WIDTH      128
#define HIST_NUM        8
#define BLOCK_NUM       512
#define DATA_LENGTH     (2 * HIST_WIDTH * HIST_NUM * BLOCK_NUM + HIST_WIDTH * 3)
#define RESULT_LENGTH   HIST_WIDTH * (BLOCK_NUM + 1)

__global__
void
add_oper(
        const int *const        d_inputArr,
        const size_t            inputArrLength,
        int *const              d_outputArr
        ) {
    // Identity and lambda of the operation.
    const int identity = 0;
    auto oper = [](int &l, int &r) -> void { l += r; r = 0; };

    // Launch the device function.
    g1b2_reduce_x(d_inputArr, DATA_LENGTH, d_outputArr, oper, identity);
}

int main() {
    // All kinds of sizes.
    // Shared memory's size (in bytes).
    int sharedBytes = 2 * sizeof(int) * HIST_WIDTH * HIST_NUM;

    // Input array's size (in bytes).
    int dataBytes   = sizeof(int) * DATA_LENGTH;

    // Result array's size (in bytes).
    int resultBytes = sizeof(int) * RESULT_LENGTH;

    // Data arrays
    // Input array, host.
    int h_inputArr[DATA_LENGTH];
    // Output array, host.
    int h_outputArr[RESULT_LENGTH];

    // Initialization of input array.
    for (int idx = 0; idx < DATA_LENGTH; ++idx)
        h_inputArr[idx] = idx % HIST_WIDTH;


    // CUDA kernel sizes
    // Grid size
    const dim3 gridSize(BLOCK_NUM);
    // Thread block size
    const dim3 blockSize(HIST_NUM, HIST_WIDTH);

    // Allocating device memory
    int *d_inputArr, *d_outputArr;
    int ret = cudaMalloc(&d_inputArr, dataBytes);
    if (cudaSuccess != ret)
        std::cout << "Cannot allocate d_inputArr, ret: " << ret << std::endl;
    ret = cudaMalloc(&d_outputArr, resultBytes);
    if (cudaSuccess != ret)
        std::cout << "Cannot allocate d_outputArr, ret: " << ret << std::endl;

    // Copy host array to device
    ret = cudaMemcpy(d_inputArr, h_inputArr, dataBytes, cudaMemcpyHostToDevice);
    if (cudaSuccess != ret)
        std::cout << "Cannot memcpy to device, ret: " << ret << std::endl;

    add_oper<<< BLOCK_NUM + 1, blockSize, sharedBytes >>>(
            d_inputArr, DATA_LENGTH, d_outputArr);

    ret = cudaMemcpy(h_outputArr, d_outputArr, resultBytes,
            cudaMemcpyDeviceToHost);
    if (cudaSuccess != ret)
        std::cout << "Cannot memcpy to host, ret: " << ret << std::endl;

    for (int idx = RESULT_LENGTH - 512; idx < RESULT_LENGTH; ++idx)
        std::cout << h_outputArr[idx] << " ";
    std::cout << std::endl;

    cudaFree(d_inputArr);
    cudaFree(d_outputArr);

    return 0;
}

	.file	"tmpxft_002beeff_00000000-6_reduce.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3639:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3639:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.align 2
	.type	_ZNSolsEPFRSoS_E.isra.0, @function
_ZNSolsEPFRSoS_E.isra.0:
.LFB4294:
	.cfi_startproc
	jmp	*%rsi
	.cfi_endproc
.LFE4294:
	.size	_ZNSolsEPFRSoS_E.isra.0, .-_ZNSolsEPFRSoS_E.isra.0
	.globl	_Z31__device_stub__Z8add_operPKimPiPKimPi
	.type	_Z31__device_stub__Z8add_operPKimPiPKimPi, @function
_Z31__device_stub__Z8add_operPKimPiPKimPi:
.LFB3661:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L3
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z8add_operPKimPi(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L3:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L5
	call	__stack_chk_fail@PLT
.L5:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3661:
	.size	_Z31__device_stub__Z8add_operPKimPiPKimPi, .-_Z31__device_stub__Z8add_operPKimPiPKimPi
	.globl	_Z8add_operPKimPi
	.type	_Z8add_operPKimPi, @function
_Z8add_operPKimPi:
.LFB3662:
	.cfi_startproc
	endbr64
	jmp	_Z31__device_stub__Z8add_operPKimPiPKimPi
	.cfi_endproc
.LFE3662:
	.size	_Z8add_operPKimPi, .-_Z8add_operPKimPi
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Cannot allocate d_inputArr, ret: "
.LC1:
	.string	"Cannot allocate d_outputArr, ret: "
.LC2:
	.string	"Cannot memcpy to device, ret: "
.LC3:
	.string	"Cannot memcpy to host, ret: "
.LC4:
	.string	" "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3636:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	leaq	-4456448(%rsp), %r11
	.cfi_def_cfa 11, 4456488
.LPSRL0:
	subq	$4096, %rsp
	orq	$0, (%rsp)
	cmpq	%r11, %rsp
	jne	.LPSRL0
	.cfi_def_cfa_register 7
	subq	$2104, %rsp
	.cfi_def_cfa_offset 4458592
	movq	%fs:40, %rax
	movq	%rax, 4458536(%rsp)
	xorl	%eax, %eax
	leaq	262696(%rsp), %r12
.L10:
	movl	%eax, %edx
	andl	$127, %edx
	movl	%edx, (%r12,%rax,4)
	incq	%rax
	cmpq	$1048960, %rax
	jne	.L10
	movq	%rsp, %rdi
	movl	$4195840, %esi
	movabsq	$549755813896, %rax
	movl	$1, 24(%rsp)
	movq	%rax, 16(%rsp)
	leaq	_ZSt4cout(%rip), %rbx
	call	cudaMalloc@PLT
	testl	%eax, %eax
	movl	%eax, %ebp
	je	.L11
	leaq	.LC0(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebp, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
.L11:
	leaq	8(%rsp), %rdi
	movl	$262656, %esi
	call	cudaMalloc@PLT
	movl	%eax, %ebp
	testl	%eax, %eax
	je	.L12
	leaq	.LC1(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebp, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
.L12:
	movq	(%rsp), %rdi
	movl	$1, %ecx
	movl	$4195840, %edx
	movq	%r12, %rsi
	call	cudaMemcpy@PLT
	movl	%eax, %ebp
	testl	%eax, %eax
	je	.L13
	leaq	.LC2(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebp, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
.L13:
	movl	24(%rsp), %ecx
	movq	16(%rsp), %rdx
	xorl	%r9d, %r9d
	movl	$1, %esi
	movabsq	$4294967809, %rdi
	movl	$8192, %r8d
	movl	$1, 36(%rsp)
	movq	%rdi, 28(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L14
	movq	8(%rsp), %rdx
	movq	(%rsp), %rdi
	movl	$1048960, %esi
	call	_Z31__device_stub__Z8add_operPKimPiPKimPi
.L14:
	movq	8(%rsp), %rsi
	leaq	40(%rsp), %r12
	movl	$2, %ecx
	movl	$262656, %edx
	movq	%r12, %rdi
	call	cudaMemcpy@PLT
	movl	%eax, %ebp
	testl	%eax, %eax
	je	.L15
	leaq	.LC3(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebp, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
.L15:
	movl	$65152, %ebp
	leaq	.LC4(%rip), %r13
.L16:
	movl	(%r12,%rbp,4), %esi
	movq	%rbx, %rdi
	incq	%rbp
	call	_ZNSolsEi@PLT
	movq	%r13, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cmpq	$65664, %rbp
	jne	.L16
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	4458536(%rsp), %rax
	subq	%fs:40, %rax
	je	.L17
	call	__stack_chk_fail@PLT
.L17:
	addq	$4458552, %rsp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3636:
	.size	main, .-main
	.section	.rodata.str1.1
.LC5:
	.string	"_Z8add_operPKimPi"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3664:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z8add_operPKimPi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3664:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <iostream>

/**
 * @brief Perform general 1-D grid, 2-D block reduce, along X-direction.
 *
 * @details This device function implements the reduce algorithms. The grid is
 * in 1-D X-direction, i.e. `gridDim.x >= 1`,`gridDim.y == 1` and
 * `gridDim.z == 1`. The block is in 2-D X- and Y-direction, i.e.
 * `blockDim.x >= 1` and `blockDim.y >= 1`, `blockDim.z == 1`. To achieve higher
 * parallelization, the shared memory will have size
 * `blockDim.x * blockDim.y * 2`. The input array will be *divided* into smaller
 * parts and assigned to each thread block. That is, each block will be assigned
 * an *sub-array* with length at most `blockDim.x * blockDim.y * 2`.
 *
 * @tparam      DataType        The type of data, which is processed.
 * @tparam      Operation       The operation type, it is related to the lambda
 * function parameter.
 *
 * @param[in]   d_inputArr      The input array, type is determined by the
 * template.
 *
 * @param[in]   inputArrLength  The length of the input array.
 * @param[out]  d_outputArr     The output array, in device memory, type is
 * determined by the template. The length of it must be `gridDim.x * blockDim.y`
 *
 * @param[in]   oper            The operation performed on two elements in the
 * array. It should be a function or lambda expression defined in a
 * `__global__` function, which has two reference parameters. The result on
 * these two parameters will be stored in the first parameter, the second
 * parameter should be set to identity.
 *
 * @param[in]   identity        The identity of the operation. (The same concept
 * in group theory.)
 *
 */
template < class DataType, class Operation >
__device__
void
g1b2_reduce_x(
        const DataType *const   d_inputArr,
        const size_t            inputArrLength,
        DataType *const         d_outputArr,
        const Operation         &oper,
        const DataType          identity
        ) {
    // Make shared memory visible in kernel
    extern __shared__ DataType sdata[];

    // Calculate indices
    int sdataAbsIdx = threadIdx.x * blockDim.y + threadIdx.y;
    int initStride = blockDim.x * blockDim.y;
    int inputArrAbsIdx = 2 * blockIdx.x * initStride + sdataAbsIdx;

    // Initialize shared memory according to the absolute location of
    // thread-releated element in the input array. If a thread-related element
    // does not exist, the corresponding shared memory will be filled with
    // identity value of the operation.
    if (inputArrAbsIdx >= inputArrLength) {
        // The thread-related left element does not exist in the input array.
        sdata[sdataAbsIdx] = identity;
        sdata[sdataAbsIdx + initStride] = identity;
    }
    else if (inputArrAbsIdx + initStride >= inputArrLength) {
        // The thread-related right element does not exist in the input array.
        sdata[sdataAbsIdx] = d_inputArr[inputArrAbsIdx];
        sdata[sdataAbsIdx + initStride] = identity;
    }
    else {
        // The thread-related elements exist in the input array.
        sdata[sdataAbsIdx] = d_inputArr[inputArrAbsIdx];
        sdata[sdataAbsIdx + initStride]
            = d_inputArr[inputArrAbsIdx + initStride];
    }
    // Thread synchronization, wait for shared memory initialization's finish.
    __syncthreads();

    // Perform reduce, the initial stride is blockDim.x
    for (unsigned int stride = static_cast<unsigned int>(blockDim.x);
        stride > 0;
        stride = (stride & 0x1) ? stride >> 1 + 1 : stride >> 1) {
        // The thread with X-ID smaller than the stride will be omitted.
        if (threadIdx.x < stride)
            // Compute absolute stride and perform operation
            oper(sdata[sdataAbsIdx], sdata[sdataAbsIdx + stride * blockDim.y]);
        // Thread synchronization after every stride.
        __syncthreads();
    }

    // Because reduce is executed in X-direction, only the elements in shared
    // memory related to the `threadIdx.x == 0` stored the results. Here only
    // the corresponding elements will be written into the output array.
    if (0 == threadIdx.x)
        d_outputArr[blockIdx.x * blockDim.y + threadIdx.y] = sdata[sdataAbsIdx];
}

#define HIST_WIDTH      128
#define HIST_NUM        8
#define BLOCK_NUM       512
#define DATA_LENGTH     (2 * HIST_WIDTH * HIST_NUM * BLOCK_NUM + HIST_WIDTH * 3)
#define RESULT_LENGTH   HIST_WIDTH * (BLOCK_NUM + 1)

__global__
void
add_oper(
        const int *const        d_inputArr,
        const size_t            inputArrLength,
        int *const              d_outputArr
        ) {
    // Identity and lambda of the operation.
    const int identity = 0;
    auto oper = [](int &l, int &r) -> void { l += r; r = 0; };

    // Launch the device function.
    g1b2_reduce_x(d_inputArr, DATA_LENGTH, d_outputArr, oper, identity);
}

int main() {
    // All kinds of sizes.
    // Shared memory's size (in bytes).
    int sharedBytes = 2 * sizeof(int) * HIST_WIDTH * HIST_NUM;

    // Input array's size (in bytes).
    int dataBytes   = sizeof(int) * DATA_LENGTH;

    // Result array's size (in bytes).
    int resultBytes = sizeof(int) * RESULT_LENGTH;

    // Data arrays
    // Input array, host.
    int h_inputArr[DATA_LENGTH];
    // Output array, host.
    int h_outputArr[RESULT_LENGTH];

    // Initialization of input array.
    for (int idx = 0; idx < DATA_LENGTH; ++idx)
        h_inputArr[idx] = idx % HIST_WIDTH;


    // CUDA kernel sizes
    // Grid size
    const dim3 gridSize(BLOCK_NUM);
    // Thread block size
    const dim3 blockSize(HIST_NUM, HIST_WIDTH);

    // Allocating device memory
    int *d_inputArr, *d_outputArr;
    int ret = hipMalloc(&d_inputArr, dataBytes);
    if (hipSuccess != ret)
        std::cout << "Cannot allocate d_inputArr, ret: " << ret << std::endl;
    ret = hipMalloc(&d_outputArr, resultBytes);
    if (hipSuccess != ret)
        std::cout << "Cannot allocate d_outputArr, ret: " << ret << std::endl;

    // Copy host array to device
    ret = hipMemcpy(d_inputArr, h_inputArr, dataBytes, hipMemcpyHostToDevice);
    if (hipSuccess != ret)
        std::cout << "Cannot memcpy to device, ret: " << ret << std::endl;

    add_oper<<< BLOCK_NUM + 1, blockSize, sharedBytes >>>(
            d_inputArr, DATA_LENGTH, d_outputArr);

    ret = hipMemcpy(h_outputArr, d_outputArr, resultBytes,
            hipMemcpyDeviceToHost);
    if (hipSuccess != ret)
        std::cout << "Cannot memcpy to host, ret: " << ret << std::endl;

    for (int idx = RESULT_LENGTH - 512; idx < RESULT_LENGTH; ++idx)
        std::cout << h_outputArr[idx] << " ";
    std::cout << std::endl;

    hipFree(d_inputArr);
    hipFree(d_outputArr);

    return 0;
}

	.text
	.file	"reduce.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z23__device_stub__add_operPKimPi # -- Begin function _Z23__device_stub__add_operPKimPi
	.type	_Z23__device_stub__add_operPKimPi,@function
_Z23__device_stub__add_operPKimPi:      # @_Z23__device_stub__add_operPKimPi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8add_operPKimPi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z23__device_stub__add_operPKimPi, .Lfunc_end0-_Z23__device_stub__add_operPKimPi
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$4458512, %rsp                  # imm = 0x440810
	.cfi_def_cfa_offset 4458528
	.cfi_offset %rbx, -16
	xorl	%eax, %eax
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	movl	%eax, %ecx
	andl	$127, %ecx
	movl	%ecx, 262672(%rsp,%rax,4)
	incq	%rax
	cmpq	$1048960, %rax                  # imm = 0x100180
	jne	.LBB1_1
# %bb.2:
	leaq	8(%rsp), %rdi
	movl	$4195840, %esi                  # imm = 0x400600
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB1_4
# %bb.3:
	movl	%eax, %ebx
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$33, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	%ebx, %esi
	callq	_ZNSolsEi
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.LBB1_4:
	movq	%rsp, %rdi
	movl	$262656, %esi                   # imm = 0x40200
	callq	hipMalloc
	testl	%eax, %eax
	je	.LBB1_6
# %bb.5:
	movl	%eax, %ebx
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$34, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	%ebx, %esi
	callq	_ZNSolsEi
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.LBB1_6:
	movq	8(%rsp), %rdi
	leaq	262672(%rsp), %rsi
	movl	$4195840, %edx                  # imm = 0x400600
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	je	.LBB1_8
# %bb.7:
	movl	%eax, %ebx
	movl	$_ZSt4cout, %edi
	movl	$.L.str.2, %esi
	movl	$30, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	%ebx, %esi
	callq	_ZNSolsEi
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.LBB1_8:
	movabsq	$4294967809, %rdi               # imm = 0x100000201
	movabsq	$549755813896, %rdx             # imm = 0x8000000008
	movl	$8192, %r8d                     # imm = 0x2000
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_10
# %bb.9:
	movq	8(%rsp), %rdi
	movq	(%rsp), %rdx
	movl	$1048960, %esi                  # imm = 0x100180
	callq	_Z23__device_stub__add_operPKimPi
.LBB1_10:
	movq	(%rsp), %rsi
	leaq	16(%rsp), %rdi
	movl	$262656, %edx                   # imm = 0x40200
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	je	.LBB1_11
# %bb.14:
	movl	%eax, %ebx
	movl	$_ZSt4cout, %edi
	movl	$.L.str.3, %esi
	movl	$28, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	%ebx, %esi
	callq	_ZNSolsEi
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.LBB1_11:                               # %.preheader
	movl	$65152, %ebx                    # imm = 0xFE80
.LBB1_12:                               # =>This Inner Loop Header: Depth=1
	movl	16(%rsp,%rbx,4), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSolsEi
	movl	$.L.str.4, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	incq	%rbx
	cmpq	$65664, %rbx                    # imm = 0x10080
	jne	.LBB1_12
# %bb.13:
	movq	_ZSt4cout(%rip), %rax
	movl	$_ZSt4cout, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$4458512, %rsp                  # imm = 0x440810
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8add_operPKimPi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z8add_operPKimPi,@object       # @_Z8add_operPKimPi
	.section	.rodata,"a",@progbits
	.globl	_Z8add_operPKimPi
	.p2align	3, 0x0
_Z8add_operPKimPi:
	.quad	_Z23__device_stub__add_operPKimPi
	.size	_Z8add_operPKimPi, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Cannot allocate d_inputArr, ret: "
	.size	.L.str, 34

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Cannot allocate d_outputArr, ret: "
	.size	.L.str.1, 35

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Cannot memcpy to device, ret: "
	.size	.L.str.2, 31

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Cannot memcpy to host, ret: "
	.size	.L.str.3, 29

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	" "
	.size	.L.str.4, 2

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z8add_operPKimPi"
	.size	.L__unnamed_1, 18

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z23__device_stub__add_operPKimPi
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z8add_operPKimPi
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z8add_operPKimPi       ; -- Begin function _Z8add_operPKimPi
	.globl	_Z8add_operPKimPi
	.p2align	8
	.type	_Z8add_operPKimPi,@function
_Z8add_operPKimPi:                      ; @_Z8add_operPKimPi
; %bb.0:
	s_load_b32 s2, s[0:1], 0x24
	v_and_b32_e32 v5, 0x3ff, v0
	v_bfe_u32 v0, v0, 10, 10
                                        ; implicit-def: $vgpr4
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s4, s2, 16
	s_and_b32 s5, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_mad_u32_u24 v6, v5, s4, v0
	s_mul_i32 s6, s5, s4
	s_mul_i32 s2, s15, s6
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_lshl_add_u32 v1, s2, 1, v6
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e32 0x100180, v1
	s_xor_b32 s7, exec_lo, s2
	s_cbranch_execz .LBB0_6
; %bb.1:
	s_load_b64 s[2:3], s[0:1], 0x0
	v_add_nc_u32_e32 v3, s6, v1
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s8, exec_lo
                                        ; implicit-def: $vgpr4
	s_delay_alu instid0(VALU_DEP_2)
	v_cmpx_gt_u32_e32 0x100180, v3
	s_xor_b32 s8, exec_lo, s8
	s_cbranch_execz .LBB0_3
; %bb.2:
	v_mov_b32_e32 v4, 0
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v1, vcc_lo, s2, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
	v_add_co_u32 v3, vcc_lo, s2, v3
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v4, vcc_lo, s3, v4, vcc_lo
	s_clause 0x1
	global_load_b32 v1, v[1:2], off
	global_load_b32 v4, v[3:4], off
	v_lshl_add_u32 v2, v6, 2, 0
	s_waitcnt vmcnt(1)
	ds_store_b32 v2, v1
                                        ; implicit-def: $vgpr1_vgpr2
.LBB0_3:                                ; %Flow10
	s_and_not1_saveexec_b32 s8, s8
	s_cbranch_execz .LBB0_5
; %bb.4:
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_waitcnt vmcnt(0)
	v_mov_b32_e32 v4, 0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v1, vcc_lo, s2, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
	global_load_b32 v1, v[1:2], off
	v_lshl_add_u32 v2, v6, 2, 0
	s_waitcnt vmcnt(0)
	ds_store_b32 v2, v1
.LBB0_5:                                ; %Flow11
	s_or_b32 exec_lo, exec_lo, s8
.LBB0_6:                                ; %Flow12
	s_waitcnt lgkmcnt(0)
	s_or_saveexec_b32 s2, s7
	v_lshl_add_u32 v1, v6, 2, 0
	s_xor_b32 exec_lo, exec_lo, s2
	s_cbranch_execz .LBB0_8
; %bb.7:
	s_waitcnt vmcnt(0)
	v_mov_b32_e32 v4, 0
	ds_store_b32 v1, v4
.LBB0_8:
	s_or_b32 exec_lo, exec_lo, s2
	v_add_nc_u32_e32 v2, s6, v6
	s_cmp_eq_u32 s5, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_lshl_add_u32 v2, v2, 2, 0
	s_waitcnt vmcnt(0)
	ds_store_b32 v2, v4
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB0_13
; %bb.9:                                ; %.lr.ph.i
	v_mov_b32_e32 v2, 0
.LBB0_10:                               ; =>This Inner Loop Header: Depth=1
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_u32_e64 s5, v5
	s_cbranch_execz .LBB0_12
; %bb.11:                               ;   in Loop: Header=BB0_10 Depth=1
	s_mul_i32 s3, s5, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	v_lshl_add_u32 v3, s3, 2, v1
	ds_load_b32 v4, v3
	ds_load_b32 v6, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v4, v6, v4
	ds_store_b32 v1, v4
	ds_store_b32 v3, v2
.LBB0_12:                               ;   in Loop: Header=BB0_10 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	s_bitcmp0_b32 s5, 0
	s_waitcnt lgkmcnt(0)
	s_cselect_b32 s2, 1, 2
	s_barrier
	s_lshr_b32 s5, s5, s2
	buffer_gl0_inv
	s_cmp_eq_u32 s5, 0
	s_cbranch_scc0 .LBB0_10
.LBB0_13:                               ; %._crit_edge.i
	s_mov_b32 s2, exec_lo
	v_cmpx_eq_u32_e32 0, v5
	s_cbranch_execz .LBB0_15
; %bb.14:
	s_load_b64 s[0:1], s[0:1], 0x10
	v_mad_u64_u32 v[2:3], null, s15, s4, v[0:1]
	ds_load_b32 v4, v1
	v_mov_b32_e32 v3, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v4, off
.LBB0_15:                               ; %_Z13g1b2_reduce_xIiZ8add_operPKimPiEUlRiS3_E_EvPKT_mPS5_RKT0_S5_.exit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8add_operPKimPi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z8add_operPKimPi, .Lfunc_end0-_Z8add_operPKimPi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 616
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           8
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         144
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z8add_operPKimPi
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z8add_operPKimPi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
