//These includes are for running on a personal computer
/*#include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include <cuda_runtime_api.h>
#include <stdio.h>
#include <device_functions.h>
#include <cuda.h>
#include <crt/host_defines.h>
*/
#include <iostream>
#include <cstdlib>
#include <stdio.h>
#include <string>
#include <chrono>


//global variables definitions for the boids on both device and host
float2* pos_dev;
float2* vel_dev;
float2* acc_dev;

float2* sep_dev;
float2* align_dev;
float2* cohesion_dev;

float2* pos_host;
float2* vel_host;

float2 averagePos;
float2 averageForward;

//all of our hard coded values we can change
#define BlockSize 256
#define FLOCKING_RAD 50.0f
#define COHESION_STRENGTH 3.0f
#define ALIGNMENT_STRENGTH 5.0f
#define SEPARATION_STRENGTH 2.0f
#define SAFE_RADIUS 3.0f
#define MAX_SPEED 5.0f

//vector math functions for the 2d vectors -- naive

__device__ bool vector2dEquals(float2 a, float2 b) {
	if (a.x == b.x && a.y == b.y) {
		return true;
	} else {
		return false;
	}
}

__device__ float calcLength(float2 vec) {
	return sqrt(vec.x * vec.x + vec.y * vec.y);
}

__device__ float distance(float2 vec1, float2 vec2) {
	float finalDistance = sqrt(((vec1.x - vec2.x)*(vec1.x - vec2.x)) + ((vec1.y - vec2.y)*(vec1.y - vec2.y)));	
	return finalDistance;
}

__device__ float2 subVecs(float2 vec1, float2 vec2) {
	float2 finalVec = make_float2(vec1.x - vec2.x, vec1.y - vec2.y);
	return finalVec;
}

__device__ float2 addVecs(float2 vec1, float2 vec2) {
	float2 finalVec = make_float2(vec1.x + vec2.x, vec1.y + vec2.y);
	return finalVec;
}

__device__ float2 divideVec(float scalar, float2 vector) {
	float2 finalVec = make_float2(vector.x / scalar, vector.y / scalar);
	return finalVec;
}

__device__ float2 multiplyVec(float scalar, float2 vector) {
	float2 finalVec = make_float2(vector.x * scalar, vector.y * scalar);
	return finalVec;
}

__device__ float2 normalize(float2 vector) {
	float length = calcLength(vector);
	if (length > 0) {
		float2 finalVec = make_float2(vector.x / length, vector.y / length);
		return finalVec;
	} else {
		return vector;
	}
}

//-----------------end vec funcs------------------------


// calculates the average forward velocity vector of all the boids
__host__ void calc_average_forward(int NBOIDS) {
	int counter = 0;
	float2 sum = make_float2(0.0, 0.0);
	for (int i = 0; i < NBOIDS; i++) {
		sum.x += vel_host[i].x;
		sum.y += vel_host[i].y;
		counter++;
	}
	averageForward.x = sum.x / counter;
	averageForward.y = sum.y / counter;
}

// calculate the average position of all the boids
__host__ void calc_average_pos(int NBOIDS) {
	int counter = 0;
	float2 sum = make_float2(0.0, 0.0);
	for (int i = 0; i < NBOIDS; i++) {
		sum.x += pos_host[i].x;
		sum.y += pos_host[i].y;
		counter++;
	}
	averagePos.x = sum.x / counter;
	averagePos.y = sum.y / counter;
}

//updates the position of all the boids
__global__ void updatePos(int numBoids, float2* vel_dev, float2* pos_dev) {
	int i = (blockIdx.x * blockDim.x) + threadIdx.x;

	//if boids get too far away set their position to 0;
	if (i < numBoids) {
		if (pos_dev[i].x > 10000.0f || pos_dev[i].y > 10000.0f) {
			pos_dev[i].x = 0;
			pos_dev[i].y = 0;
		}

		pos_dev[i] = addVecs(pos_dev[i], vel_dev[i]);
	}
}

//calculates the separation vector for each boid
__device__ float2 calc_separation_accel(int numBoids, float2* pos_dev, float2* vel_dev) {
	int i = (blockIdx.x * blockDim.x) + threadIdx.x;
	float safeDist = SAFE_RADIUS;
	safeDist = safeDist + safeDist;
	float separationStrength = SEPARATION_STRENGTH;
	float2 totalVel = make_float2(0.0f, 0.0f);

	if (i < numBoids) { 
		float2 boidPos = make_float2(pos_dev[i].x, pos_dev[i].y);
		float2 boidVel = make_float2(vel_dev[i].x, vel_dev[i].y);

		for (int i = 0; i < numBoids; i++) {
			float2 siblingPos = pos_dev[i];
			float2 siblingVel = vel_dev[i];
			//skip if current boid is self
			if (vector2dEquals(boidPos, siblingPos) && vector2dEquals(boidVel, siblingVel)) {
				continue;
			}

			float2 accel = subVecs(boidPos, siblingPos);
			float dist = calcLength(accel);
			if (dist < safeDist) {
				accel = normalize(accel);
				accel = divideVec(safeDist, multiplyVec((safeDist - dist), accel));
				totalVel = addVecs(totalVel, accel);
			}
		}

		if (calcLength(totalVel) > 1) {
			totalVel = normalize(totalVel);
		}

		return multiplyVec(separationStrength, totalVel);
	}

	return make_float2(0.0f, 0.0f);
}

//calculates the alignment vector for each boid
__device__ float2 calc_alignment_accel(int numBoids, float2 averageForward) {
	float maxSpeed = MAX_SPEED;
	float alignStr = ALIGNMENT_STRENGTH;

	int i = (blockIdx.x * blockDim.x) + threadIdx.x;

	if (i < numBoids) {
		float2 accel = divideVec(maxSpeed, averageForward);
		if (calcLength(accel) > 1) {
			accel = normalize(accel);
		}
		return multiplyVec(alignStr, accel);
	}
	return make_float2(0.0f, 0.0f);
}

//calculates the cohesion vector for each boid
__device__ float2 calc_cohesion_accel(int numBoids, float2 averagePos, float2* pos_dev) {
	float flockRad = FLOCKING_RAD;
	float cohesionStr = COHESION_STRENGTH;

	int i = (blockIdx.x * blockDim.x) + threadIdx.x;
	if (i < numBoids) {
		float2 accel = subVecs(averagePos, pos_dev[i]);
		float dist = calcLength(pos_dev[i]);

		accel = normalize(accel);

		if(dist < flockRad) {
			accel = multiplyVec(dist, accel);
			accel = divideVec(flockRad, accel);
		}

		return multiplyVec(cohesionStr, accel);
	}
	return make_float2(0.0f, 0.0f);
}

//generates the initial position of the boids
__global__ void generateInitialPosition(int numBoids, float2* pos_dev, float2* vel_dev, float2* acc_dev, float2* sep_dev, float2* align_dev, float2* cohesion_dev) {
	int i = (blockIdx.x * blockDim.x) + threadIdx.x;
	if (i < numBoids) {
		pos_dev[i].x = 0.0f;
		pos_dev[i].y = 0.0f;
		vel_dev[i].x = 0.0f;
		vel_dev[i].y = 0.0f;
		acc_dev[i].x = 0.0f;
		acc_dev[i].y = 0.0f;
		sep_dev[i].x = 0.0f;
		sep_dev[i].y = 0.0f;
		align_dev[i].x = 0.0f;
		align_dev[i].y = 0.0f;
		cohesion_dev[i].x = 0.0f;
		cohesion_dev[i].y = 0.0f;
		
	}
	
}

//define inital cuda mallocs and vars
__host__ void startCuda(int numBoids) {
	//printf("\nDefining cuda variables\n");
	dim3 fullBlocksPerGrid((int)ceil(float(numBoids) / float(BlockSize)));

	// Malloc for device
	cudaMalloc((void**)&pos_dev, numBoids * sizeof(float2));
	cudaMalloc((void**)&vel_dev, numBoids * sizeof(float2));
	cudaMalloc((void**)&acc_dev, numBoids * sizeof(float2));

	cudaMalloc((void**)&sep_dev, numBoids * sizeof(float2));
	cudaMalloc((void**)&align_dev, numBoids * sizeof(float2));
	cudaMalloc((void**)&cohesion_dev, numBoids * sizeof(float2));

	//malloc for host
	pos_host = (float2*)malloc(numBoids * sizeof(float2));
	vel_host = (float2*)malloc(numBoids * sizeof(float2));

	//set random velocity
	for (int i = 0; i < numBoids; i++) {
		vel_host[i].x = ((float) rand() / (RAND_MAX));
		vel_host[i].y = ((float) rand() / (RAND_MAX));
	}
	
	// Setup Kernels
	//printf("\nGenerating initial position\n");
	generateInitialPosition<<<fullBlocksPerGrid, BlockSize>>>(numBoids, pos_dev, vel_dev, acc_dev, sep_dev, align_dev, cohesion_dev);

	cudaMemcpy(vel_dev, vel_host, numBoids * sizeof(float2), cudaMemcpyHostToDevice);
	cudaMemcpy(pos_host, pos_dev, numBoids * sizeof(float2), cudaMemcpyDeviceToHost);
	cudaMemcpy(vel_host, vel_dev, numBoids * sizeof(float2), cudaMemcpyDeviceToHost);


	//for debugging
	/*printf("after\n");
	for (int i = 0; i < numBoids; i++) {
		printf("x = %f, y = %f\n", vel_host[i].x, vel_host[i].y);
	}*/
}

//update kernel that calls cohesion, separation and alignment
__global__ void update(int numBoids, float2 averagePos, float2 averageForward, float2* pos_dev, float2* vel_dev, float2* acc_dev, float2* sep_dev, float2* align_dev, float2* cohesion_dev) {
	dim3 fullBlocksPerGrid((int)ceil(float(numBoids) / float(BlockSize)));
	int i = (blockIdx.x * blockDim.x) + threadIdx.x;

	if (i < numBoids) {
		//cohesion
		float2 cohesion = calc_cohesion_accel(numBoids, averagePos, pos_dev);
		//separation
		float2 separation = calc_separation_accel(numBoids, pos_dev, vel_dev);
		//alignment
		float2 alignment = calc_alignment_accel(numBoids, averageForward);
		
		//printf("cohesion: %f\nseparation: %f\nalignment: %f\n", cohesion, separation, alignment);

		vel_dev[i] = addVecs(vel_dev[i], cohesion);
		vel_dev[i] = addVecs(vel_dev[i], separation);
		vel_dev[i] = addVecs(vel_dev[i], alignment);

		if (calcLength(vel_dev[i]) > 50.0f) {
			vel_dev[i] = normalize(vel_dev[i]);
			vel_dev[i] = multiplyVec(50.0f, vel_dev[i]);
			//printf("%d ", calcLength(vel_dev[i]));	
		}
		if (calcLength(vel_dev[i]) < 0.0f) {
			vel_dev[i] = normalize(vel_dev[i]);
			vel_dev[i] = multiplyVec(50.0f, vel_dev[i]);
			//printf("%d ", calcLength(vel_dev[i]));	
		}
		//printf("%d ", calcLength(vel_dev[i]));	
	}
		
}

//main cuda function
__host__ int main(int argc, char* argv[]) 
{	
	//for timing
	using std::chrono::high_resolution_clock;
    using std::chrono::duration_cast;
    using std::chrono::duration;
    using std::chrono::milliseconds;

    auto t1 = high_resolution_clock::now();

	//takes 2 arguments, number of boids and iterations
	int numB = std::stoi(argv[1]);
	int iterations = std::stoi(argv[2]);

	

	dim3 fullBlocksPerGrid((int)ceil(float(numB) / float(BlockSize)));
	

  	startCuda(numB);

	//printf("\nRunning Simulation with %d boids and %d iterations\n", numB, iterations);
	for (int i = 0; i < iterations; i++) {
		
		cudaMemcpy(vel_host, vel_dev, numB * sizeof(float2), cudaMemcpyDeviceToHost);
		cudaMemcpy(pos_host, pos_dev, numB * sizeof(float2), cudaMemcpyDeviceToHost);
		calc_average_pos(numB);
		calc_average_forward(numB);
		
		
		update<<<fullBlocksPerGrid, BlockSize>>>(numB, averagePos, averageForward, pos_dev, vel_dev, acc_dev, sep_dev, align_dev, cohesion_dev);
		updatePos<<<fullBlocksPerGrid, BlockSize>>>(numB, vel_dev, pos_dev);
		//for debugging will remove
		//cudaMemcpy(vel_host, vel_dev, numB * sizeof(float2), cudaMemcpyDeviceToHost);
		//cudaMemcpy(pos_host, pos_dev, numB * sizeof(float2), cudaMemcpyDeviceToHost);
		//printf("guy1-x: %f, guy1-y: %f | ", pos_host[0].x, pos_host[0].y);
		//printf("guy2-x: %f, guy2-y: %f\n", pos_host[1].x, pos_host[1].y);
	}

    
   cudaFree(pos_dev);
   cudaFree(vel_dev);
   cudaFree(acc_dev);
   cudaFree(sep_dev);
   cudaFree(align_dev);
   cudaFree(cohesion_dev);
	
   free(pos_host);

   auto t2 = high_resolution_clock::now();
   duration<double, std::milli> ms_double = t2 - t1;
   printf("%f", ms_double);

   return 0;
}

	.file	"tmpxft_003971e8_00000000-6_flock.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3754:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3754:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z14vector2dEquals6float2S_
	.type	_Z14vector2dEquals6float2S_, @function
_Z14vector2dEquals6float2S_:
.LFB3734:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3734:
	.size	_Z14vector2dEquals6float2S_, .-_Z14vector2dEquals6float2S_
	.globl	_Z10calcLength6float2
	.type	_Z10calcLength6float2, @function
_Z10calcLength6float2:
.LFB3735:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3735:
	.size	_Z10calcLength6float2, .-_Z10calcLength6float2
	.globl	_Z8distance6float2S_
	.type	_Z8distance6float2S_, @function
_Z8distance6float2S_:
.LFB3736:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3736:
	.size	_Z8distance6float2S_, .-_Z8distance6float2S_
	.globl	_Z7subVecs6float2S_
	.type	_Z7subVecs6float2S_, @function
_Z7subVecs6float2S_:
.LFB3737:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3737:
	.size	_Z7subVecs6float2S_, .-_Z7subVecs6float2S_
	.globl	_Z7addVecs6float2S_
	.type	_Z7addVecs6float2S_, @function
_Z7addVecs6float2S_:
.LFB4463:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	_Z7subVecs6float2S_
	.cfi_endproc
.LFE4463:
	.size	_Z7addVecs6float2S_, .-_Z7addVecs6float2S_
	.globl	_Z9divideVecf6float2
	.type	_Z9divideVecf6float2, @function
_Z9divideVecf6float2:
.LFB3739:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3739:
	.size	_Z9divideVecf6float2, .-_Z9divideVecf6float2
	.globl	_Z11multiplyVecf6float2
	.type	_Z11multiplyVecf6float2, @function
_Z11multiplyVecf6float2:
.LFB4465:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	_Z9divideVecf6float2
	.cfi_endproc
.LFE4465:
	.size	_Z11multiplyVecf6float2, .-_Z11multiplyVecf6float2
	.globl	_Z9normalize6float2
	.type	_Z9normalize6float2, @function
_Z9normalize6float2:
.LFB3741:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3741:
	.size	_Z9normalize6float2, .-_Z9normalize6float2
	.globl	_Z20calc_average_forwardi
	.type	_Z20calc_average_forwardi, @function
_Z20calc_average_forwardi:
.LFB3742:
	.cfi_startproc
	endbr64
	xorps	%xmm0, %xmm0
	movq	vel_host(%rip), %rdx
	xorl	%eax, %eax
	movaps	%xmm0, %xmm1
.L19:
	cmpl	%eax, %edi
	jle	.L22
	addss	(%rdx,%rax,8), %xmm1
	addss	4(%rdx,%rax,8), %xmm0
	incq	%rax
	jmp	.L19
.L22:
	xorl	%eax, %eax
	testl	%edi, %edi
	cmovs	%eax, %edi
	cvtsi2ssl	%edi, %xmm2
	divss	%xmm2, %xmm1
	divss	%xmm2, %xmm0
	movss	%xmm1, averageForward(%rip)
	movss	%xmm0, 4+averageForward(%rip)
	ret
	.cfi_endproc
.LFE3742:
	.size	_Z20calc_average_forwardi, .-_Z20calc_average_forwardi
	.globl	_Z16calc_average_posi
	.type	_Z16calc_average_posi, @function
_Z16calc_average_posi:
.LFB3743:
	.cfi_startproc
	endbr64
	xorps	%xmm0, %xmm0
	movq	pos_host(%rip), %rdx
	xorl	%eax, %eax
	movaps	%xmm0, %xmm1
.L24:
	cmpl	%eax, %edi
	jle	.L26
	addss	(%rdx,%rax,8), %xmm1
	addss	4(%rdx,%rax,8), %xmm0
	incq	%rax
	jmp	.L24
.L26:
	xorl	%eax, %eax
	testl	%edi, %edi
	cmovs	%eax, %edi
	cvtsi2ssl	%edi, %xmm2
	divss	%xmm2, %xmm1
	divss	%xmm2, %xmm0
	movss	%xmm1, averagePos(%rip)
	movss	%xmm0, 4+averagePos(%rip)
	ret
	.cfi_endproc
.LFE3743:
	.size	_Z16calc_average_posi, .-_Z16calc_average_posi
	.globl	_Z21calc_separation_acceliP6float2S0_
	.type	_Z21calc_separation_acceliP6float2S0_, @function
_Z21calc_separation_acceliP6float2S0_:
.LFB3744:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3744:
	.size	_Z21calc_separation_acceliP6float2S0_, .-_Z21calc_separation_acceliP6float2S0_
	.globl	_Z20calc_alignment_acceli6float2
	.type	_Z20calc_alignment_acceli6float2, @function
_Z20calc_alignment_acceli6float2:
.LFB3745:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3745:
	.size	_Z20calc_alignment_acceli6float2, .-_Z20calc_alignment_acceli6float2
	.globl	_Z19calc_cohesion_acceli6float2PS_
	.type	_Z19calc_cohesion_acceli6float2PS_, @function
_Z19calc_cohesion_acceli6float2PS_:
.LFB3746:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3746:
	.size	_Z19calc_cohesion_acceli6float2PS_, .-_Z19calc_cohesion_acceli6float2PS_
	.globl	_Z38__device_stub__Z9updatePosiP6float2S0_iP6float2S0_
	.type	_Z38__device_stub__Z9updatePosiP6float2S0_iP6float2S0_, @function
_Z38__device_stub__Z9updatePosiP6float2S0_iP6float2S0_:
.LFB3776:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movl	%edi, 28(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L33
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z9updatePosiP6float2S0_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L33:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L35
	call	__stack_chk_fail@PLT
.L35:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3776:
	.size	_Z38__device_stub__Z9updatePosiP6float2S0_iP6float2S0_, .-_Z38__device_stub__Z9updatePosiP6float2S0_iP6float2S0_
	.globl	_Z9updatePosiP6float2S0_
	.type	_Z9updatePosiP6float2S0_, @function
_Z9updatePosiP6float2S0_:
.LFB3777:
	.cfi_startproc
	endbr64
	jmp	_Z38__device_stub__Z9updatePosiP6float2S0_iP6float2S0_
	.cfi_endproc
.LFE3777:
	.size	_Z9updatePosiP6float2S0_, .-_Z9updatePosiP6float2S0_
	.globl	_Z65__device_stub__Z23generateInitialPositioniP6float2S0_S0_S0_S0_S0_iP6float2S0_S0_S0_S0_S0_
	.type	_Z65__device_stub__Z23generateInitialPositioniP6float2S0_S0_S0_S0_S0_iP6float2S0_S0_S0_S0_S0_, @function
_Z65__device_stub__Z23generateInitialPositioniP6float2S0_S0_S0_S0_S0_iP6float2S0_S0_S0_S0_S0_:
.LFB3778:
	.cfi_startproc
	endbr64
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movq	208(%rsp), %rax
	movl	%edi, 60(%rsp)
	leaq	80(%rsp), %rdi
	movq	%rsi, 48(%rsp)
	leaq	92(%rsp), %rsi
	movq	%rdx, 40(%rsp)
	leaq	64(%rsp), %rdx
	movq	%rcx, 32(%rsp)
	leaq	72(%rsp), %rcx
	movq	%r8, 24(%rsp)
	movq	%r9, 16(%rsp)
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	60(%rsp), %rax
	movl	$1, 88(%rsp)
	movq	%rax, 128(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 80(%rsp)
	movq	%rax, 92(%rsp)
	movl	$1, 100(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L38
	pushq	72(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_Z23generateInitialPositioniP6float2S0_S0_S0_S0_S0_(%rip), %rdi
	pushq	72(%rsp)
	.cfi_def_cfa_offset 224
	movq	108(%rsp), %rcx
	movl	116(%rsp), %r8d
	movq	96(%rsp), %rsi
	movl	104(%rsp), %edx
	leaq	144(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L38:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L40
	call	__stack_chk_fail@PLT
.L40:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3778:
	.size	_Z65__device_stub__Z23generateInitialPositioniP6float2S0_S0_S0_S0_S0_iP6float2S0_S0_S0_S0_S0_, .-_Z65__device_stub__Z23generateInitialPositioniP6float2S0_S0_S0_S0_S0_iP6float2S0_S0_S0_S0_S0_
	.globl	_Z23generateInitialPositioniP6float2S0_S0_S0_S0_S0_
	.type	_Z23generateInitialPositioniP6float2S0_S0_S0_S0_S0_, @function
_Z23generateInitialPositioniP6float2S0_S0_S0_S0_S0_:
.LFB3779:
	.cfi_startproc
	endbr64
	jmp	_Z65__device_stub__Z23generateInitialPositioniP6float2S0_S0_S0_S0_S0_iP6float2S0_S0_S0_S0_S0_
	.cfi_endproc
.LFE3779:
	.size	_Z23generateInitialPositioniP6float2S0_S0_S0_S0_S0_, .-_Z23generateInitialPositioniP6float2S0_S0_S0_S0_S0_
	.globl	_Z9startCudai
	.type	_Z9startCudai, @function
_Z9startCudai:
.LFB3747:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movslq	%edi, %rbx
	cvtsi2ssl	%ebx, %xmm0
	movq	%rbx, %rbp
	salq	$3, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	mulss	.LC1(%rip), %xmm0
	call	ceilf@PLT
	movq	%rbx, %rsi
	leaq	pos_dev(%rip), %rdi
	cvttss2sil	%xmm0, %eax
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	call	cudaMalloc@PLT
	movq	%rbx, %rsi
	leaq	vel_dev(%rip), %rdi
	call	cudaMalloc@PLT
	movq	%rbx, %rsi
	leaq	acc_dev(%rip), %rdi
	call	cudaMalloc@PLT
	movq	%rbx, %rsi
	leaq	sep_dev(%rip), %rdi
	call	cudaMalloc@PLT
	movq	%rbx, %rsi
	leaq	align_dev(%rip), %rdi
	call	cudaMalloc@PLT
	movq	%rbx, %rsi
	leaq	cohesion_dev(%rip), %rdi
	call	cudaMalloc@PLT
	movq	%rbx, %rdi
	call	malloc@PLT
	movq	%rbx, %rdi
	movq	%rax, pos_host(%rip)
	call	malloc@PLT
	movq	%rax, vel_host(%rip)
.L44:
	cmpl	%r12d, %ebp
	jle	.L48
	call	rand@PLT
	leaq	0(,%r12,8), %r13
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC2(%rip), %xmm0
	movq	vel_host(%rip), %rax
	movss	%xmm0, (%rax,%r12,8)
	incq	%r12
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC2(%rip), %xmm0
	movq	vel_host(%rip), %rax
	movss	%xmm0, 4(%rax,%r13)
	jmp	.L44
.L48:
	movl	$16777217, %edx
	movq	8(%rsp), %rdi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	16(%rsp), %esi
	salq	$8, %rdx
	movl	$1, %ecx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L46
	pushq	%rax
	.cfi_def_cfa_offset 88
	movq	acc_dev(%rip), %rcx
	movl	%ebp, %edi
	pushq	cohesion_dev(%rip)
	.cfi_def_cfa_offset 96
	movq	vel_dev(%rip), %rdx
	movq	align_dev(%rip), %r9
	movq	sep_dev(%rip), %r8
	movq	pos_dev(%rip), %rsi
	call	_Z65__device_stub__Z23generateInitialPositioniP6float2S0_S0_S0_S0_S0_iP6float2S0_S0_S0_S0_S0_
	popq	%rdx
	.cfi_def_cfa_offset 88
	popq	%rcx
	.cfi_def_cfa_offset 80
.L46:
	movq	vel_host(%rip), %rsi
	movq	vel_dev(%rip), %rdi
	movq	%rbx, %rdx
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	pos_dev(%rip), %rsi
	movq	%rbx, %rdx
	movq	pos_host(%rip), %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movq	vel_dev(%rip), %rsi
	movq	%rbx, %rdx
	movq	vel_host(%rip), %rdi
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	movl	$2, %ecx
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	cudaMemcpy@PLT
	.cfi_endproc
.LFE3747:
	.size	_Z9startCudai, .-_Z9startCudai
	.globl	_Z51__device_stub__Z6updatei6float2S_PS_S0_S0_S0_S0_S0_iR6float2S0_PS_S1_S1_S1_S1_S1_
	.type	_Z51__device_stub__Z6updatei6float2S_PS_S0_S0_S0_S0_S0_iR6float2S0_PS_S1_S1_S1_S1_S1_, @function
_Z51__device_stub__Z6updatei6float2S_PS_S0_S0_S0_S0_S0_iR6float2S0_PS_S1_S1_S1_S1_S1_:
.LFB3780:
	.cfi_startproc
	endbr64
	subq	$216, %rsp
	.cfi_def_cfa_offset 224
	movq	224(%rsp), %rax
	movl	%edi, 60(%rsp)
	leaq	80(%rsp), %rdi
	movq	%rcx, 48(%rsp)
	leaq	72(%rsp), %rcx
	movq	%rax, 24(%rsp)
	movq	232(%rsp), %rax
	movq	%r8, 40(%rsp)
	movq	%rax, 16(%rsp)
	movq	240(%rsp), %rax
	movq	%r9, 32(%rsp)
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 200(%rsp)
	xorl	%eax, %eax
	leaq	60(%rsp), %rax
	movq	%rsi, 136(%rsp)
	leaq	92(%rsp), %rsi
	movq	%rax, 128(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	8(%rsp), %rax
	movq	%rdx, 144(%rsp)
	leaq	64(%rsp), %rdx
	movq	%rax, 192(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 80(%rsp)
	movl	$1, 88(%rsp)
	movq	%rax, 92(%rsp)
	movl	$1, 100(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L49
	pushq	72(%rsp)
	.cfi_def_cfa_offset 232
	leaq	_Z6updatei6float2S_PS_S0_S0_S0_S0_S0_(%rip), %rdi
	pushq	72(%rsp)
	.cfi_def_cfa_offset 240
	movq	108(%rsp), %rcx
	movl	116(%rsp), %r8d
	movq	96(%rsp), %rsi
	movl	104(%rsp), %edx
	leaq	144(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 232
	popq	%rdx
	.cfi_def_cfa_offset 224
.L49:
	movq	200(%rsp), %rax
	subq	%fs:40, %rax
	je	.L51
	call	__stack_chk_fail@PLT
.L51:
	addq	$216, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3780:
	.size	_Z51__device_stub__Z6updatei6float2S_PS_S0_S0_S0_S0_S0_iR6float2S0_PS_S1_S1_S1_S1_S1_, .-_Z51__device_stub__Z6updatei6float2S_PS_S0_S0_S0_S0_S0_iR6float2S0_PS_S1_S1_S1_S1_S1_
	.globl	_Z6updatei6float2S_PS_S0_S0_S0_S0_S0_
	.type	_Z6updatei6float2S_PS_S0_S0_S0_S0_S0_, @function
_Z6updatei6float2S_PS_S0_S0_S0_S0_S0_:
.LFB3781:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rdx, %r10
	leaq	8(%rsp), %rax
	movq	%xmm0, 8(%rsp)
	movq	%rsp, %rdx
	movq	%xmm1, (%rsp)
	pushq	%r11
	.cfi_def_cfa_offset 40
	pushq	40(%rsp)
	.cfi_def_cfa_offset 48
	pushq	%r9
	.cfi_def_cfa_offset 56
	movq	%rcx, %r9
	movq	%rsi, %rcx
	movq	%rax, %rsi
	pushq	%r8
	.cfi_def_cfa_offset 64
	movq	%r10, %r8
	call	_Z51__device_stub__Z6updatei6float2S_PS_S0_S0_S0_S0_S0_iR6float2S0_PS_S1_S1_S1_S1_S1_
	addq	$56, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3781:
	.size	_Z6updatei6float2S_PS_S0_S0_S0_S0_S0_, .-_Z6updatei6float2S_PS_S0_S0_S0_S0_S0_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC3:
	.string	"_Z6updatei6float2S_PS_S0_S0_S0_S0_S0_"
.LC4:
	.string	"_Z23generateInitialPositioniP6float2S0_S0_S0_S0_S0_"
.LC5:
	.string	"_Z9updatePosiP6float2S0_"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3783:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z6updatei6float2S_PS_S0_S0_S0_S0_S0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC4(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z23generateInitialPositioniP6float2S0_S0_S0_S0_S0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC5(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z9updatePosiP6float2S0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3783:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.text._ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev,"axG",@progbits,_ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD5Ev,comdat
	.align 2
	.weak	_ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev
	.type	_ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev, @function
_ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev:
.LFB3862:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	call	__errno_location@PLT
	cmpl	$0, (%rax)
	jne	.L57
	movl	(%rbx), %edx
	movl	%edx, (%rax)
.L57:
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3862:
	.size	_ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev, .-_ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev
	.weak	_ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD1Ev
	.set	_ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD1Ev,_ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev
	.section	.text._ZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_,"axG",@progbits,_ZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_,comdat
	.weak	_ZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_
	.type	_ZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_, @function
_ZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_:
.LFB3857:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA3857
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rdi, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rsi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rcx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdx, %rbx
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movl	%r8d, 12(%rsp)
	leaq	28(%rsp), %r13
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	call	__errno_location@PLT
	movl	12(%rsp), %edx
	leaq	32(%rsp), %rsi
	movq	%rbx, %rdi
	movq	%rax, %rbp
	movl	(%rax), %eax
	movl	%eax, 28(%rsp)
	xorl	%eax, %eax
	movl	%eax, 0(%rbp)
.LEHB0:
	call	*%r15
	movq	32(%rsp), %rdx
	cmpq	%rbx, %rdx
	jne	.L61
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L74
	movq	%r14, %rdi
	call	_ZSt24__throw_invalid_argumentPKc@PLT
.L61:
	cmpl	$34, 0(%rbp)
	je	.L63
	movl	$2147483648, %ecx
	movl	$4294967295, %esi
	addq	%rax, %rcx
	cmpq	%rcx, %rsi
	jnb	.L64
.L63:
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L74
	movq	%r14, %rdi
	call	_ZSt20__throw_out_of_rangePKc@PLT
.LEHE0:
.L64:
	testq	%r12, %r12
	je	.L66
	subq	%rbx, %rdx
	movq	%rdx, (%r12)
.L66:
	movq	%r13, %rdi
	movl	%eax, 12(%rsp)
	call	_ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD1Ev
	movl	12(%rsp), %eax
	movq	40(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L69
	jmp	.L74
.L70:
	endbr64
	movq	%rax, %rbx
.L67:
	movq	%r13, %rdi
	call	_ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD1Ev
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L74
	movq	%rbx, %rdi
.LEHB1:
	call	_Unwind_Resume@PLT
.LEHE1:
.L74:
	call	__stack_chk_fail@PLT
.L69:
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3857:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table._ZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_,"aG",@progbits,_ZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_,comdat
.LLSDA3857:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE3857-.LLSDACSB3857
.LLSDACSB3857:
	.uleb128 .LEHB0-.LFB3857
	.uleb128 .LEHE0-.LEHB0
	.uleb128 .L70-.LFB3857
	.uleb128 0
	.uleb128 .LEHB1-.LFB3857
	.uleb128 .LEHE1-.LEHB1
	.uleb128 0
	.uleb128 0
.LLSDACSE3857:
	.section	.text._ZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_,"axG",@progbits,_ZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_,comdat
	.size	_ZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_, .-_ZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_
	.section	.rodata._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_.str1.1,"aMS",@progbits,1
.LC6:
	.string	"basic_string: construction from null is not valid"
	.section	.text._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_,"axG",@progbits,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC5IS3_EEPKcRKS3_,comdat
	.align 2
	.weak	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
	.type	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_, @function
_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_:
.LFB4111:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	movq	%fs:40, %rax
	movq	%rax, 8(%rsp)
	xorl	%eax, %eax
	leaq	16(%rdi), %rax
	movq	%rax, (%rdi)
	testq	%rsi, %rsi
	jne	.L78
	movq	8(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L83
	leaq	.LC6(%rip), %rdi
	call	_ZSt19__throw_logic_errorPKc@PLT
.L78:
	movq	%rdi, %rbx
	movq	%rsi, %rdi
	movq	%rsi, %rbp
	call	strlen@PLT
	movq	%rax, (%rsp)
	leaq	0(%rbp,%rax), %r12
	cmpq	$15, %rax
	jbe	.L80
	movq	%rsp, %rsi
	xorl	%edx, %edx
	movq	%rbx, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_createERmm@PLT
	movq	%rax, (%rbx)
	movq	(%rsp), %rax
	movq	%rax, 16(%rbx)
.L80:
	movq	(%rbx), %rdi
	movq	%r12, %rdx
	movq	%rbp, %rsi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE13_S_copy_charsEPcPKcS7_@PLT
	movq	(%rsp), %rax
	movq	(%rbx), %rdx
	movq	%rax, 8(%rbx)
	movb	$0, (%rdx,%rax)
	movq	8(%rsp), %rax
	subq	%fs:40, %rax
	je	.L81
.L83:
	call	__stack_chk_fail@PLT
.L81:
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4111:
	.size	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_, .-_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
	.weak	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_
	.set	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
	.section	.rodata.str1.1
.LC7:
	.string	"stoi"
.LC9:
	.string	"%f"
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB3748:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA3748
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	leaq	.LC7(%rip), %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rsi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %r15
	leaq	40(%rsp), %rbp
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	movq	8(%r12), %rsi
	movq	%r15, %rdx
	movq	%rbp, %rdi
	movq	%rax, %r13
.LEHB2:
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_
.LEHE2:
	movq	40(%rsp), %rdx
	xorl	%ecx, %ecx
	movq	%r14, %rsi
	movq	__isoc23_strtol@GOTPCREL(%rip), %rdi
	movl	$10, %r8d
.LEHB3:
	call	_ZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_
.LEHE3:
	movq	%rbp, %rdi
	movl	%eax, %ebx
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	16(%r12), %rsi
	movq	%r15, %rdx
	movq	%rbp, %rdi
.LEHB4:
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_
.LEHE4:
	movq	40(%rsp), %rdx
	xorl	%ecx, %ecx
	movq	%r14, %rsi
	movq	__isoc23_strtol@GOTPCREL(%rip), %rdi
	movl	$10, %r8d
.LEHB5:
	call	_ZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_
.LEHE5:
	movq	%rbp, %rdi
	movl	%eax, %r14d
	movslq	%ebx, %rbp
	xorl	%r15d, %r15d
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	cvtsi2ssl	%ebx, %xmm0
	mulss	.LC1(%rip), %xmm0
	salq	$3, %rbp
	movabsq	$4294967552, %r12
	call	ceilf@PLT
	movl	%ebx, %edi
	cvttss2sil	%xmm0, %eax
	movl	%eax, 16(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 20(%rsp)
.LEHB6:
	call	_Z9startCudai
.L85:
	cmpl	%r14d, %r15d
	jge	.L100
	movq	vel_dev(%rip), %rsi
	movq	vel_host(%rip), %rdi
	movl	$2, %ecx
	movq	%rbp, %rdx
	call	cudaMemcpy@PLT
	movq	pos_dev(%rip), %rsi
	movq	%rbp, %rdx
	movq	pos_host(%rip), %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movl	%ebx, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	call	_Z16calc_average_posi
	movl	%ebx, %edi
	movl	$1, %ecx
	call	_Z20calc_average_forwardi
	movq	16(%rsp), %rdi
	movl	24(%rsp), %esi
	movq	%r12, %rdx
	movq	%r12, 28(%rsp)
	movl	$1, 36(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L86
	movq	averagePos(%rip), %rax
	leaq	8(%rsp), %rdx
	movl	%ebx, %edi
	movq	%rsp, %rsi
	movq	acc_dev(%rip), %r9
	movq	vel_dev(%rip), %r8
	movq	%rax, (%rsp)
	movq	averageForward(%rip), %rax
	movq	pos_dev(%rip), %rcx
	movq	%rax, 8(%rsp)
	pushq	%rax
	.cfi_def_cfa_offset 152
	pushq	cohesion_dev(%rip)
	.cfi_def_cfa_offset 160
	pushq	align_dev(%rip)
	.cfi_def_cfa_offset 168
	pushq	sep_dev(%rip)
	.cfi_def_cfa_offset 176
	call	_Z51__device_stub__Z6updatei6float2S_PS_S0_S0_S0_S0_S0_iR6float2S0_PS_S1_S1_S1_S1_S1_
	addq	$32, %rsp
	.cfi_def_cfa_offset 144
.L86:
	movq	16(%rsp), %rdi
	movl	24(%rsp), %esi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r12, %rdx
	movl	$1, %ecx
	movq	%r12, 28(%rsp)
	movl	$1, 36(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L87
	movq	pos_dev(%rip), %rdx
	movq	vel_dev(%rip), %rsi
	movl	%ebx, %edi
	call	_Z38__device_stub__Z9updatePosiP6float2S0_iP6float2S0_
.L87:
	incl	%r15d
	jmp	.L85
.L100:
	movq	pos_dev(%rip), %rdi
	call	cudaFree@PLT
	movq	vel_dev(%rip), %rdi
	call	cudaFree@PLT
	movq	acc_dev(%rip), %rdi
	call	cudaFree@PLT
	movq	sep_dev(%rip), %rdi
	call	cudaFree@PLT
	movq	align_dev(%rip), %rdi
	call	cudaFree@PLT
	movq	cohesion_dev(%rip), %rdi
	call	cudaFree@PLT
	movq	pos_host(%rip), %rdi
	call	free@PLT
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	leaq	.LC9(%rip), %rsi
	movl	$2, %edi
	subq	%r13, %rax
	cvtsi2sdq	%rax, %xmm0
	movb	$1, %al
	divsd	.LC8(%rip), %xmm0
	call	__printf_chk@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L93
	jmp	.L96
.L94:
	endbr64
	jmp	.L99
.L95:
	endbr64
.L99:
	movq	%rax, %rbx
.L91:
	movq	%rbp, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L96
	movq	%rbx, %rdi
	call	_Unwind_Resume@PLT
.LEHE6:
.L96:
	call	__stack_chk_fail@PLT
.L93:
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3748:
	.section	.gcc_except_table,"a",@progbits
.LLSDA3748:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE3748-.LLSDACSB3748
.LLSDACSB3748:
	.uleb128 .LEHB2-.LFB3748
	.uleb128 .LEHE2-.LEHB2
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB3-.LFB3748
	.uleb128 .LEHE3-.LEHB3
	.uleb128 .L94-.LFB3748
	.uleb128 0
	.uleb128 .LEHB4-.LFB3748
	.uleb128 .LEHE4-.LEHB4
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB5-.LFB3748
	.uleb128 .LEHE5-.LEHB5
	.uleb128 .L95-.LFB3748
	.uleb128 0
	.uleb128 .LEHB6-.LFB3748
	.uleb128 .LEHE6-.LEHB6
	.uleb128 0
	.uleb128 0
.LLSDACSE3748:
	.section	.text.startup
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	averageForward
	.bss
	.align 8
	.type	averageForward, @object
	.size	averageForward, 8
averageForward:
	.zero	8
	.globl	averagePos
	.align 8
	.type	averagePos, @object
	.size	averagePos, 8
averagePos:
	.zero	8
	.globl	vel_host
	.align 8
	.type	vel_host, @object
	.size	vel_host, 8
vel_host:
	.zero	8
	.globl	pos_host
	.align 8
	.type	pos_host, @object
	.size	pos_host, 8
pos_host:
	.zero	8
	.globl	cohesion_dev
	.align 8
	.type	cohesion_dev, @object
	.size	cohesion_dev, 8
cohesion_dev:
	.zero	8
	.globl	align_dev
	.align 8
	.type	align_dev, @object
	.size	align_dev, 8
align_dev:
	.zero	8
	.globl	sep_dev
	.align 8
	.type	sep_dev, @object
	.size	sep_dev, 8
sep_dev:
	.zero	8
	.globl	acc_dev
	.align 8
	.type	acc_dev, @object
	.size	acc_dev, 8
acc_dev:
	.zero	8
	.globl	vel_dev
	.align 8
	.type	vel_dev, @object
	.size	vel_dev, 8
vel_dev:
	.zero	8
	.globl	pos_dev
	.align 8
	.type	pos_dev, @object
	.size	pos_dev, 8
pos_dev:
	.zero	8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC1:
	.long	998244352
	.align 4
.LC2:
	.long	805306368
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC8:
	.long	0
	.long	1093567616
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

//These includes are for running on a personal computer
/*#include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include <cuda_runtime_api.h>
#include <stdio.h>
#include <device_functions.h>
#include <cuda.h>
#include <crt/host_defines.h>
*/

#include <hip/hip_runtime.h>
#include <iostream>
#include <cstdlib>
#include <stdio.h>
#include <string>
#include <chrono>


//global variables definitions for the boids on both device and host
float2* pos_dev;
float2* vel_dev;
float2* acc_dev;

float2* sep_dev;
float2* align_dev;
float2* cohesion_dev;

float2* pos_host;
float2* vel_host;

float2 averagePos;
float2 averageForward;

//all of our hard coded values we can change
#define BlockSize 256
#define FLOCKING_RAD 50.0f
#define COHESION_STRENGTH 3.0f
#define ALIGNMENT_STRENGTH 5.0f
#define SEPARATION_STRENGTH 2.0f
#define SAFE_RADIUS 3.0f
#define MAX_SPEED 5.0f

//vector math functions for the 2d vectors -- naive

__device__ bool vector2dEquals(float2 a, float2 b) {
	if (a.x == b.x && a.y == b.y) {
		return true;
	} else {
		return false;
	}
}

__device__ float calcLength(float2 vec) {
	return sqrt(vec.x * vec.x + vec.y * vec.y);
}

__device__ float distance(float2 vec1, float2 vec2) {
	float finalDistance = sqrt(((vec1.x - vec2.x)*(vec1.x - vec2.x)) + ((vec1.y - vec2.y)*(vec1.y - vec2.y)));	
	return finalDistance;
}

__device__ float2 subVecs(float2 vec1, float2 vec2) {
	float2 finalVec = make_float2(vec1.x - vec2.x, vec1.y - vec2.y);
	return finalVec;
}

__device__ float2 addVecs(float2 vec1, float2 vec2) {
	float2 finalVec = make_float2(vec1.x + vec2.x, vec1.y + vec2.y);
	return finalVec;
}

__device__ float2 divideVec(float scalar, float2 vector) {
	float2 finalVec = make_float2(vector.x / scalar, vector.y / scalar);
	return finalVec;
}

__device__ float2 multiplyVec(float scalar, float2 vector) {
	float2 finalVec = make_float2(vector.x * scalar, vector.y * scalar);
	return finalVec;
}

__device__ float2 normalize(float2 vector) {
	float length = calcLength(vector);
	if (length > 0) {
		float2 finalVec = make_float2(vector.x / length, vector.y / length);
		return finalVec;
	} else {
		return vector;
	}
}

//-----------------end vec funcs------------------------


// calculates the average forward velocity vector of all the boids
__host__ void calc_average_forward(int NBOIDS) {
	int counter = 0;
	float2 sum = make_float2(0.0, 0.0);
	for (int i = 0; i < NBOIDS; i++) {
		sum.x += vel_host[i].x;
		sum.y += vel_host[i].y;
		counter++;
	}
	averageForward.x = sum.x / counter;
	averageForward.y = sum.y / counter;
}

// calculate the average position of all the boids
__host__ void calc_average_pos(int NBOIDS) {
	int counter = 0;
	float2 sum = make_float2(0.0, 0.0);
	for (int i = 0; i < NBOIDS; i++) {
		sum.x += pos_host[i].x;
		sum.y += pos_host[i].y;
		counter++;
	}
	averagePos.x = sum.x / counter;
	averagePos.y = sum.y / counter;
}

//updates the position of all the boids
__global__ void updatePos(int numBoids, float2* vel_dev, float2* pos_dev) {
	int i = (blockIdx.x * blockDim.x) + threadIdx.x;

	//if boids get too far away set their position to 0;
	if (i < numBoids) {
		if (pos_dev[i].x > 10000.0f || pos_dev[i].y > 10000.0f) {
			pos_dev[i].x = 0;
			pos_dev[i].y = 0;
		}

		pos_dev[i] = addVecs(pos_dev[i], vel_dev[i]);
	}
}

//calculates the separation vector for each boid
__device__ float2 calc_separation_accel(int numBoids, float2* pos_dev, float2* vel_dev) {
	int i = (blockIdx.x * blockDim.x) + threadIdx.x;
	float safeDist = SAFE_RADIUS;
	safeDist = safeDist + safeDist;
	float separationStrength = SEPARATION_STRENGTH;
	float2 totalVel = make_float2(0.0f, 0.0f);

	if (i < numBoids) { 
		float2 boidPos = make_float2(pos_dev[i].x, pos_dev[i].y);
		float2 boidVel = make_float2(vel_dev[i].x, vel_dev[i].y);

		for (int i = 0; i < numBoids; i++) {
			float2 siblingPos = pos_dev[i];
			float2 siblingVel = vel_dev[i];
			//skip if current boid is self
			if (vector2dEquals(boidPos, siblingPos) && vector2dEquals(boidVel, siblingVel)) {
				continue;
			}

			float2 accel = subVecs(boidPos, siblingPos);
			float dist = calcLength(accel);
			if (dist < safeDist) {
				accel = normalize(accel);
				accel = divideVec(safeDist, multiplyVec((safeDist - dist), accel));
				totalVel = addVecs(totalVel, accel);
			}
		}

		if (calcLength(totalVel) > 1) {
			totalVel = normalize(totalVel);
		}

		return multiplyVec(separationStrength, totalVel);
	}

	return make_float2(0.0f, 0.0f);
}

//calculates the alignment vector for each boid
__device__ float2 calc_alignment_accel(int numBoids, float2 averageForward) {
	float maxSpeed = MAX_SPEED;
	float alignStr = ALIGNMENT_STRENGTH;

	int i = (blockIdx.x * blockDim.x) + threadIdx.x;

	if (i < numBoids) {
		float2 accel = divideVec(maxSpeed, averageForward);
		if (calcLength(accel) > 1) {
			accel = normalize(accel);
		}
		return multiplyVec(alignStr, accel);
	}
	return make_float2(0.0f, 0.0f);
}

//calculates the cohesion vector for each boid
__device__ float2 calc_cohesion_accel(int numBoids, float2 averagePos, float2* pos_dev) {
	float flockRad = FLOCKING_RAD;
	float cohesionStr = COHESION_STRENGTH;

	int i = (blockIdx.x * blockDim.x) + threadIdx.x;
	if (i < numBoids) {
		float2 accel = subVecs(averagePos, pos_dev[i]);
		float dist = calcLength(pos_dev[i]);

		accel = normalize(accel);

		if(dist < flockRad) {
			accel = multiplyVec(dist, accel);
			accel = divideVec(flockRad, accel);
		}

		return multiplyVec(cohesionStr, accel);
	}
	return make_float2(0.0f, 0.0f);
}

//generates the initial position of the boids
__global__ void generateInitialPosition(int numBoids, float2* pos_dev, float2* vel_dev, float2* acc_dev, float2* sep_dev, float2* align_dev, float2* cohesion_dev) {
	int i = (blockIdx.x * blockDim.x) + threadIdx.x;
	if (i < numBoids) {
		pos_dev[i].x = 0.0f;
		pos_dev[i].y = 0.0f;
		vel_dev[i].x = 0.0f;
		vel_dev[i].y = 0.0f;
		acc_dev[i].x = 0.0f;
		acc_dev[i].y = 0.0f;
		sep_dev[i].x = 0.0f;
		sep_dev[i].y = 0.0f;
		align_dev[i].x = 0.0f;
		align_dev[i].y = 0.0f;
		cohesion_dev[i].x = 0.0f;
		cohesion_dev[i].y = 0.0f;
		
	}
	
}

//define inital cuda mallocs and vars
__host__ void startCuda(int numBoids) {
	//printf("\nDefining cuda variables\n");
	dim3 fullBlocksPerGrid((int)ceil(float(numBoids) / float(BlockSize)));

	// Malloc for device
	hipMalloc((void**)&pos_dev, numBoids * sizeof(float2));
	hipMalloc((void**)&vel_dev, numBoids * sizeof(float2));
	hipMalloc((void**)&acc_dev, numBoids * sizeof(float2));

	hipMalloc((void**)&sep_dev, numBoids * sizeof(float2));
	hipMalloc((void**)&align_dev, numBoids * sizeof(float2));
	hipMalloc((void**)&cohesion_dev, numBoids * sizeof(float2));

	//malloc for host
	pos_host = (float2*)malloc(numBoids * sizeof(float2));
	vel_host = (float2*)malloc(numBoids * sizeof(float2));

	//set random velocity
	for (int i = 0; i < numBoids; i++) {
		vel_host[i].x = ((float) rand() / (RAND_MAX));
		vel_host[i].y = ((float) rand() / (RAND_MAX));
	}
	
	// Setup Kernels
	//printf("\nGenerating initial position\n");
	generateInitialPosition<<<fullBlocksPerGrid, BlockSize>>>(numBoids, pos_dev, vel_dev, acc_dev, sep_dev, align_dev, cohesion_dev);

	hipMemcpy(vel_dev, vel_host, numBoids * sizeof(float2), hipMemcpyHostToDevice);
	hipMemcpy(pos_host, pos_dev, numBoids * sizeof(float2), hipMemcpyDeviceToHost);
	hipMemcpy(vel_host, vel_dev, numBoids * sizeof(float2), hipMemcpyDeviceToHost);


	//for debugging
	/*printf("after\n");
	for (int i = 0; i < numBoids; i++) {
		printf("x = %f, y = %f\n", vel_host[i].x, vel_host[i].y);
	}*/
}

//update kernel that calls cohesion, separation and alignment
__global__ void update(int numBoids, float2 averagePos, float2 averageForward, float2* pos_dev, float2* vel_dev, float2* acc_dev, float2* sep_dev, float2* align_dev, float2* cohesion_dev) {
	dim3 fullBlocksPerGrid((int)ceil(float(numBoids) / float(BlockSize)));
	int i = (blockIdx.x * blockDim.x) + threadIdx.x;

	if (i < numBoids) {
		//cohesion
		float2 cohesion = calc_cohesion_accel(numBoids, averagePos, pos_dev);
		//separation
		float2 separation = calc_separation_accel(numBoids, pos_dev, vel_dev);
		//alignment
		float2 alignment = calc_alignment_accel(numBoids, averageForward);
		
		//printf("cohesion: %f\nseparation: %f\nalignment: %f\n", cohesion, separation, alignment);

		vel_dev[i] = addVecs(vel_dev[i], cohesion);
		vel_dev[i] = addVecs(vel_dev[i], separation);
		vel_dev[i] = addVecs(vel_dev[i], alignment);

		if (calcLength(vel_dev[i]) > 50.0f) {
			vel_dev[i] = normalize(vel_dev[i]);
			vel_dev[i] = multiplyVec(50.0f, vel_dev[i]);
			//printf("%d ", calcLength(vel_dev[i]));	
		}
		if (calcLength(vel_dev[i]) < 0.0f) {
			vel_dev[i] = normalize(vel_dev[i]);
			vel_dev[i] = multiplyVec(50.0f, vel_dev[i]);
			//printf("%d ", calcLength(vel_dev[i]));	
		}
		//printf("%d ", calcLength(vel_dev[i]));	
	}
		
}

//main cuda function
__host__ int main(int argc, char* argv[]) 
{	
	//for timing
	using std::chrono::high_resolution_clock;
    using std::chrono::duration_cast;
    using std::chrono::duration;
    using std::chrono::milliseconds;

    auto t1 = high_resolution_clock::now();

	//takes 2 arguments, number of boids and iterations
	int numB = std::stoi(argv[1]);
	int iterations = std::stoi(argv[2]);

	

	dim3 fullBlocksPerGrid((int)ceil(float(numB) / float(BlockSize)));
	

  	startCuda(numB);

	//printf("\nRunning Simulation with %d boids and %d iterations\n", numB, iterations);
	for (int i = 0; i < iterations; i++) {
		
		hipMemcpy(vel_host, vel_dev, numB * sizeof(float2), hipMemcpyDeviceToHost);
		hipMemcpy(pos_host, pos_dev, numB * sizeof(float2), hipMemcpyDeviceToHost);
		calc_average_pos(numB);
		calc_average_forward(numB);
		
		
		update<<<fullBlocksPerGrid, BlockSize>>>(numB, averagePos, averageForward, pos_dev, vel_dev, acc_dev, sep_dev, align_dev, cohesion_dev);
		updatePos<<<fullBlocksPerGrid, BlockSize>>>(numB, vel_dev, pos_dev);
		//for debugging will remove
		//cudaMemcpy(vel_host, vel_dev, numB * sizeof(float2), cudaMemcpyDeviceToHost);
		//cudaMemcpy(pos_host, pos_dev, numB * sizeof(float2), cudaMemcpyDeviceToHost);
		//printf("guy1-x: %f, guy1-y: %f | ", pos_host[0].x, pos_host[0].y);
		//printf("guy2-x: %f, guy2-y: %f\n", pos_host[1].x, pos_host[1].y);
	}

    
   hipFree(pos_dev);
   hipFree(vel_dev);
   hipFree(acc_dev);
   hipFree(sep_dev);
   hipFree(align_dev);
   hipFree(cohesion_dev);
	
   free(pos_host);

   auto t2 = high_resolution_clock::now();
   duration<double, std::milli> ms_double = t2 - t1;
   printf("%f", ms_double);

   return 0;
}

	.text
	.file	"flock.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z20calc_average_forwardi       # -- Begin function _Z20calc_average_forwardi
	.type	_Z20calc_average_forwardi,@function
_Z20calc_average_forwardi:              # @_Z20calc_average_forwardi
	.cfi_startproc
# %bb.0:
	testl	%edi, %edi
	jle	.LBB0_1
# %bb.4:                                # %.lr.ph
	movq	vel_host(%rip), %rax
	movl	%edi, %ecx
	xorps	%xmm0, %xmm0
	xorl	%edx, %edx
	xorps	%xmm1, %xmm1
.LBB0_5:                                # =>This Inner Loop Header: Depth=1
	addss	(%rax,%rdx,8), %xmm1
	addss	4(%rax,%rdx,8), %xmm0
	incq	%rdx
	cmpq	%rdx, %rcx
	jne	.LBB0_5
# %bb.2:                                # %._crit_edge
	cvtsi2ss	%edi, %xmm2
	jmp	.LBB0_3
.LBB0_1:
	xorps	%xmm0, %xmm0
	xorps	%xmm1, %xmm1
	xorps	%xmm2, %xmm2
.LBB0_3:
	divss	%xmm2, %xmm1
	movss	%xmm1, averageForward(%rip)
	divss	%xmm2, %xmm0
	movss	%xmm0, averageForward+4(%rip)
	retq
.Lfunc_end0:
	.size	_Z20calc_average_forwardi, .Lfunc_end0-_Z20calc_average_forwardi
	.cfi_endproc
                                        # -- End function
	.globl	_Z16calc_average_posi           # -- Begin function _Z16calc_average_posi
	.type	_Z16calc_average_posi,@function
_Z16calc_average_posi:                  # @_Z16calc_average_posi
	.cfi_startproc
# %bb.0:
	testl	%edi, %edi
	jle	.LBB1_1
# %bb.4:                                # %.lr.ph
	movq	pos_host(%rip), %rax
	movl	%edi, %ecx
	xorps	%xmm0, %xmm0
	xorl	%edx, %edx
	xorps	%xmm1, %xmm1
.LBB1_5:                                # =>This Inner Loop Header: Depth=1
	addss	(%rax,%rdx,8), %xmm1
	addss	4(%rax,%rdx,8), %xmm0
	incq	%rdx
	cmpq	%rdx, %rcx
	jne	.LBB1_5
# %bb.2:                                # %._crit_edge
	cvtsi2ss	%edi, %xmm2
	jmp	.LBB1_3
.LBB1_1:
	xorps	%xmm0, %xmm0
	xorps	%xmm1, %xmm1
	xorps	%xmm2, %xmm2
.LBB1_3:
	divss	%xmm2, %xmm1
	movss	%xmm1, averagePos(%rip)
	divss	%xmm2, %xmm0
	movss	%xmm0, averagePos+4(%rip)
	retq
.Lfunc_end1:
	.size	_Z16calc_average_posi, .Lfunc_end1-_Z16calc_average_posi
	.cfi_endproc
                                        # -- End function
	.globl	_Z24__device_stub__updatePosiP15HIP_vector_typeIfLj2EES1_ # -- Begin function _Z24__device_stub__updatePosiP15HIP_vector_typeIfLj2EES1_
	.type	_Z24__device_stub__updatePosiP15HIP_vector_typeIfLj2EES1_,@function
_Z24__device_stub__updatePosiP15HIP_vector_typeIfLj2EES1_: # @_Z24__device_stub__updatePosiP15HIP_vector_typeIfLj2EES1_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	40(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	32(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9updatePosiP15HIP_vector_typeIfLj2EES1_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z24__device_stub__updatePosiP15HIP_vector_typeIfLj2EES1_, .Lfunc_end2-_Z24__device_stub__updatePosiP15HIP_vector_typeIfLj2EES1_
	.cfi_endproc
                                        # -- End function
	.globl	_Z38__device_stub__generateInitialPositioniP15HIP_vector_typeIfLj2EES1_S1_S1_S1_S1_ # -- Begin function _Z38__device_stub__generateInitialPositioniP15HIP_vector_typeIfLj2EES1_S1_S1_S1_S1_
	.type	_Z38__device_stub__generateInitialPositioniP15HIP_vector_typeIfLj2EES1_S1_S1_S1_S1_,@function
_Z38__device_stub__generateInitialPositioniP15HIP_vector_typeIfLj2EES1_S1_S1_S1_S1_: # @_Z38__device_stub__generateInitialPositioniP15HIP_vector_typeIfLj2EES1_S1_S1_S1_S1_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	leaq	56(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	48(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	32(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	24(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z23generateInitialPositioniP15HIP_vector_typeIfLj2EES1_S1_S1_S1_S1_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z38__device_stub__generateInitialPositioniP15HIP_vector_typeIfLj2EES1_S1_S1_S1_S1_, .Lfunc_end3-_Z38__device_stub__generateInitialPositioniP15HIP_vector_typeIfLj2EES1_S1_S1_S1_S1_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z9startCudai
.LCPI4_0:
	.long	0x3b800000                      # float 0.00390625
.LCPI4_1:
	.long	0x30000000                      # float 4.65661287E-10
	.text
	.globl	_Z9startCudai
	.type	_Z9startCudai,@function
_Z9startCudai:                          # @_Z9startCudai
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%edi, %ebp
	cvtsi2ss	%edi, %xmm0
	movabsq	$4294967296, %r14               # imm = 0x100000000
	mulss	.LCPI4_0(%rip), %xmm0
	callq	ceilf@PLT
	cvttss2si	%xmm0, %r15d
	btsq	$32, %r15
	movslq	%ebp, %r12
	leaq	(,%r12,8), %rbx
	movl	$pos_dev, %edi
	movq	%rbx, %rsi
	callq	hipMalloc
	movl	$vel_dev, %edi
	movq	%rbx, %rsi
	callq	hipMalloc
	movl	$acc_dev, %edi
	movq	%rbx, %rsi
	callq	hipMalloc
	movl	$sep_dev, %edi
	movq	%rbx, %rsi
	callq	hipMalloc
	movl	$align_dev, %edi
	movq	%rbx, %rsi
	callq	hipMalloc
	movl	$cohesion_dev, %edi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, pos_host(%rip)
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, vel_host(%rip)
	testl	%r12d, %r12d
	jle	.LBB4_3
# %bb.1:                                # %.lr.ph.preheader
	movl	%ebp, %r12d
	xorl	%r13d, %r13d
.LBB4_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	.LCPI4_1(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	mulss	%xmm1, %xmm0
	movq	vel_host(%rip), %rax
	movss	%xmm0, (%rax,%r13,8)
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI4_1(%rip), %xmm0
	movq	vel_host(%rip), %rax
	movss	%xmm0, 4(%rax,%r13,8)
	incq	%r13
	cmpq	%r13, %r12
	jne	.LBB4_2
.LBB4_3:                                # %._crit_edge
	addq	$256, %r14                      # imm = 0x100
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_5
# %bb.4:
	movq	pos_dev(%rip), %rsi
	movq	vel_dev(%rip), %rdx
	movq	acc_dev(%rip), %rcx
	movq	sep_dev(%rip), %r8
	movq	align_dev(%rip), %r9
	movq	cohesion_dev(%rip), %rax
	movq	%rax, (%rsp)
	movl	%ebp, %edi
	callq	_Z38__device_stub__generateInitialPositioniP15HIP_vector_typeIfLj2EES1_S1_S1_S1_S1_
.LBB4_5:
	movq	vel_dev(%rip), %rdi
	movq	vel_host(%rip), %rsi
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	pos_host(%rip), %rdi
	movq	pos_dev(%rip), %rsi
	movq	%rbx, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	vel_host(%rip), %rdi
	movq	vel_dev(%rip), %rsi
	movq	%rbx, %rdx
	movl	$2, %ecx
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	hipMemcpy                       # TAILCALL
.Lfunc_end4:
	.size	_Z9startCudai, .Lfunc_end4-_Z9startCudai
	.cfi_endproc
                                        # -- End function
	.globl	_Z21__device_stub__updatei15HIP_vector_typeIfLj2EES0_PS0_S1_S1_S1_S1_S1_ # -- Begin function _Z21__device_stub__updatei15HIP_vector_typeIfLj2EES0_PS0_S1_S1_S1_S1_S1_
	.type	_Z21__device_stub__updatei15HIP_vector_typeIfLj2EES0_PS0_S1_S1_S1_S1_S1_,@function
_Z21__device_stub__updatei15HIP_vector_typeIfLj2EES0_PS0_S1_S1_S1_S1_S1_: # @_Z21__device_stub__updatei15HIP_vector_typeIfLj2EES0_PS0_S1_S1_S1_S1_S1_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$192, %rsp
	.cfi_def_cfa_offset 240
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	72(%rsp), %rax
	movsd	%xmm0, (%rax)
	leaq	64(%rsp), %r10
	movsd	%xmm1, (%r10)
	leaq	4(%rsp), %r11
	movl	%edi, (%r11)
	leaq	56(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	48(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	32(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	24(%rsp), %r8
	movq	%r9, (%r8)
	leaq	112(%rsp), %rbx
	movq	%r11, (%rbx)
	movq	%rax, 8(%rbx)
	movq	%r10, 16(%rbx)
	movq	%rdi, 24(%rbx)
	movq	%rsi, 32(%rbx)
	movq	%rdx, 40(%rbx)
	movq	%rcx, 48(%rbx)
	movq	%r8, 56(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	96(%rsp), %r14
	leaq	80(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6updatei15HIP_vector_typeIfLj2EES0_PS0_S1_S1_S1_S1_S1_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$208, %rsp
	.cfi_adjust_cfa_offset -208
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z21__device_stub__updatei15HIP_vector_typeIfLj2EES0_PS0_S1_S1_S1_S1_S1_, .Lfunc_end5-_Z21__device_stub__updatei15HIP_vector_typeIfLj2EES0_PS0_S1_S1_S1_S1_S1_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI6_0:
	.long	0x3b800000                      # float 0.00390625
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI6_1:
	.quad	0x412e848000000000              # double 1.0E+6
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %r15
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, 40(%rsp)                  # 8-byte Spill
	movq	8(%r15), %rsi
.Ltmp0:
	leaq	48(%rsp), %rdi
	leaq	23(%rsp), %rdx
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
.Ltmp1:
# %bb.1:
	movq	48(%rsp), %r13
	callq	__errno_location
	movq	%rax, %r12
	movl	(%rax), %ebx
	movl	$0, (%rax)
	leaq	80(%rsp), %rbp
	movq	%r13, %rdi
	movq	%rbp, %rsi
	movl	$10, %edx
	callq	__isoc23_strtol
	cmpq	%r13, (%rbp)
	je	.LBB6_2
# %bb.8:
	movq	%rax, %r14
	movslq	%r14d, %rax
	cmpq	%r14, %rax
	jne	.LBB6_10
# %bb.9:
	movl	(%r12), %eax
	cmpl	$34, %eax
	je	.LBB6_10
# %bb.12:
	testl	%eax, %eax
	jne	.LBB6_14
# %bb.13:
	movl	%ebx, (%r12)
.LBB6_14:
	leaq	64(%rsp), %rbx
	movq	-16(%rbx), %rdi
	cmpq	%rbx, %rdi
	je	.LBB6_16
# %bb.15:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i
	callq	_ZdlPv
.LBB6_16:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit
	movq	16(%r15), %rsi
.Ltmp3:
	leaq	48(%rsp), %rdi
	leaq	23(%rsp), %rdx
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
.Ltmp4:
# %bb.17:
	movq	48(%rsp), %r13
	movl	(%r12), %r15d
	movl	$0, (%r12)
	leaq	80(%rsp), %rbp
	movq	%r13, %rdi
	movq	%rbp, %rsi
	movl	$10, %edx
	callq	__isoc23_strtol
	cmpq	%r13, (%rbp)
	je	.LBB6_18
# %bb.23:
	movabsq	$-4294967296, %rdx              # imm = 0xFFFFFFFF00000000
	leaq	-2147483648(%rax), %rcx
	cmpq	%rdx, %rcx
	jb	.LBB6_25
# %bb.24:
	movl	(%r12), %ecx
	cmpl	$34, %ecx
	je	.LBB6_25
# %bb.27:
	testl	%ecx, %ecx
	jne	.LBB6_29
# %bb.28:
	movl	%r15d, (%r12)
.LBB6_29:
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	movq	48(%rsp), %rdi
	cmpq	%rbx, %rdi
	je	.LBB6_31
# %bb.30:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i42
	callq	_ZdlPv
.LBB6_31:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit44
	cvtsi2ss	%r14d, %xmm1
	movss	.LCPI6_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	movss	%xmm1, 24(%rsp)                 # 4-byte Spill
	mulss	%xmm1, %xmm0
	callq	ceilf@PLT
	movss	%xmm0, 28(%rsp)                 # 4-byte Spill
	movl	%r14d, %edi
	callq	_Z9startCudai
	cmpl	$0, 32(%rsp)                    # 4-byte Folded Reload
	jle	.LBB6_49
# %bb.32:                               # %.lr.ph
	movabsq	$4294967552, %r12               # imm = 0x100000100
	cvttss2si	28(%rsp), %eax          # 4-byte Folded Reload
	leaq	(%rax,%r12), %r13
	addq	$-256, %r13
	movq	%r14, %rbp
	shlq	$3, %rbp
	movl	%r14d, %ebx
	xorl	%r15d, %r15d
.LBB6_33:                               # =>This Loop Header: Depth=1
                                        #     Child Loop BB6_40 Depth 2
                                        #     Child Loop BB6_42 Depth 2
	movq	vel_host(%rip), %rdi
	movq	vel_dev(%rip), %rsi
	movq	%rbp, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	pos_host(%rip), %rdi
	movq	pos_dev(%rip), %rsi
	movq	%rbp, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%r14d, %r14d
	jle	.LBB6_34
# %bb.39:                               # %.lr.ph.i
                                        #   in Loop: Header=BB6_33 Depth=1
	xorps	%xmm0, %xmm0
	movq	pos_host(%rip), %rax
	xorl	%ecx, %ecx
	xorps	%xmm1, %xmm1
.LBB6_40:                               #   Parent Loop BB6_33 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	addss	(%rax,%rcx,8), %xmm1
	addss	4(%rax,%rcx,8), %xmm0
	incq	%rcx
	cmpq	%rcx, %rbx
	jne	.LBB6_40
# %bb.41:                               # %_Z16calc_average_posi.exit
                                        #   in Loop: Header=BB6_33 Depth=1
	movss	24(%rsp), %xmm2                 # 4-byte Reload
                                        # xmm2 = mem[0],zero,zero,zero
	divss	%xmm2, %xmm1
	movss	%xmm1, averagePos(%rip)
	divss	%xmm2, %xmm0
	movss	%xmm0, averagePos+4(%rip)
	xorps	%xmm0, %xmm0
	movq	vel_host(%rip), %rax
	xorl	%ecx, %ecx
	xorps	%xmm1, %xmm1
.LBB6_42:                               #   Parent Loop BB6_33 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	addss	(%rax,%rcx,8), %xmm1
	addss	4(%rax,%rcx,8), %xmm0
	incq	%rcx
	cmpq	%rcx, %rbx
	jne	.LBB6_42
# %bb.43:                               #   in Loop: Header=BB6_33 Depth=1
	movss	24(%rsp), %xmm2                 # 4-byte Reload
                                        # xmm2 = mem[0],zero,zero,zero
	jmp	.LBB6_44
.LBB6_34:                               # %_Z16calc_average_posi.exit.thread
                                        #   in Loop: Header=BB6_33 Depth=1
	movabsq	$9205357640488583168, %rax      # imm = 0x7FC000007FC00000
	movq	%rax, averagePos(%rip)
	xorps	%xmm0, %xmm0
	xorps	%xmm1, %xmm1
	xorps	%xmm2, %xmm2
.LBB6_44:                               # %_Z20calc_average_forwardi.exit
                                        #   in Loop: Header=BB6_33 Depth=1
	divss	%xmm2, %xmm1
	movss	%xmm1, averageForward(%rip)
	divss	%xmm2, %xmm0
	movss	%xmm0, averageForward+4(%rip)
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_46
# %bb.45:                               #   in Loop: Header=BB6_33 Depth=1
	movsd	averagePos(%rip), %xmm0         # xmm0 = mem[0],zero
	movsd	averageForward(%rip), %xmm1     # xmm1 = mem[0],zero
	movq	pos_dev(%rip), %rsi
	movq	vel_dev(%rip), %rdx
	movq	acc_dev(%rip), %rcx
	movq	sep_dev(%rip), %r8
	movq	align_dev(%rip), %r9
	movq	cohesion_dev(%rip), %rax
	movq	%rax, (%rsp)
	movl	%r14d, %edi
	callq	_Z21__device_stub__updatei15HIP_vector_typeIfLj2EES0_PS0_S1_S1_S1_S1_S1_
.LBB6_46:                               #   in Loop: Header=BB6_33 Depth=1
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB6_48
# %bb.47:                               #   in Loop: Header=BB6_33 Depth=1
	movq	vel_dev(%rip), %rsi
	movq	pos_dev(%rip), %rdx
	movl	%r14d, %edi
	callq	_Z24__device_stub__updatePosiP15HIP_vector_typeIfLj2EES1_
.LBB6_48:                               #   in Loop: Header=BB6_33 Depth=1
	incl	%r15d
	cmpl	32(%rsp), %r15d                 # 4-byte Folded Reload
	jne	.LBB6_33
.LBB6_49:                               # %._crit_edge
	movq	pos_dev(%rip), %rdi
	callq	hipFree
	movq	vel_dev(%rip), %rdi
	callq	hipFree
	movq	acc_dev(%rip), %rdi
	callq	hipFree
	movq	sep_dev(%rip), %rdi
	callq	hipFree
	movq	align_dev(%rip), %rdi
	callq	hipFree
	movq	cohesion_dev(%rip), %rdi
	callq	hipFree
	movq	pos_host(%rip), %rdi
	callq	free
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	subq	40(%rsp), %rax                  # 8-byte Folded Reload
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI6_1(%rip), %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	xorl	%eax, %eax
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB6_2:
	.cfi_def_cfa_offset 144
.Ltmp13:
	movl	$.L.str.1, %edi
	callq	_ZSt24__throw_invalid_argumentPKc
.Ltmp14:
# %bb.3:
.LBB6_10:                               # %.critedge.i.i
.Ltmp11:
	movl	$.L.str.1, %edi
	callq	_ZSt20__throw_out_of_rangePKc
.Ltmp12:
# %bb.11:
.LBB6_18:
.Ltmp8:
	movl	$.L.str.1, %edi
	callq	_ZSt24__throw_invalid_argumentPKc
.Ltmp9:
# %bb.19:
.LBB6_25:                               # %.critedge.i.i37
.Ltmp6:
	movl	$.L.str.1, %edi
	callq	_ZSt20__throw_out_of_rangePKc
.Ltmp7:
# %bb.26:
.LBB6_38:
.Ltmp5:
	jmp	.LBB6_36
.LBB6_35:
.Ltmp2:
.LBB6_36:
	movq	%rax, %r14
	jmp	.LBB6_37
.LBB6_20:
.Ltmp10:
	movq	%rax, %r14
	cmpl	$0, (%r12)
	jne	.LBB6_22
# %bb.21:
	movl	%r15d, (%r12)
.LBB6_22:                               # %_ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev.exit.i.i38
	movq	48(%rsp), %rdi
	cmpq	%rbx, %rdi
	jne	.LBB6_7
	jmp	.LBB6_37
.LBB6_4:
.Ltmp15:
	movq	%rax, %r14
	cmpl	$0, (%r12)
	jne	.LBB6_6
# %bb.5:
	movl	%ebx, (%r12)
.LBB6_6:                                # %_ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev.exit.i.i
	leaq	64(%rsp), %rax
	movq	-16(%rax), %rdi
	cmpq	%rax, %rdi
	je	.LBB6_37
.LBB6_7:                                # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i45
	callq	_ZdlPv
.LBB6_37:
	movq	%r14, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end6:
	.size	main, .Lfunc_end6-main
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table6:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 1 <<
	.uleb128 .Ltmp1-.Ltmp0                  #   Call between .Ltmp0 and .Ltmp1
	.uleb128 .Ltmp2-.Lfunc_begin0           #     jumps to .Ltmp2
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp3-.Lfunc_begin0           # >> Call Site 2 <<
	.uleb128 .Ltmp4-.Ltmp3                  #   Call between .Ltmp3 and .Ltmp4
	.uleb128 .Ltmp5-.Lfunc_begin0           #     jumps to .Ltmp5
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp4-.Lfunc_begin0           # >> Call Site 3 <<
	.uleb128 .Ltmp13-.Ltmp4                 #   Call between .Ltmp4 and .Ltmp13
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp13-.Lfunc_begin0          # >> Call Site 4 <<
	.uleb128 .Ltmp12-.Ltmp13                #   Call between .Ltmp13 and .Ltmp12
	.uleb128 .Ltmp15-.Lfunc_begin0          #     jumps to .Ltmp15
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp8-.Lfunc_begin0           # >> Call Site 5 <<
	.uleb128 .Ltmp7-.Ltmp8                  #   Call between .Ltmp8 and .Ltmp7
	.uleb128 .Ltmp10-.Lfunc_begin0          #     jumps to .Ltmp10
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp7-.Lfunc_begin0           # >> Call Site 6 <<
	.uleb128 .Lfunc_end6-.Ltmp7             #   Call between .Ltmp7 and .Lfunc_end6
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_,"axG",@progbits,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_,comdat
	.weak	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_ # -- Begin function _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
	.p2align	1, 0x90
	.type	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_,@function
_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_: # @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	leaq	16(%rdi), %rax
	movq	%rax, (%rdi)
	testq	%rsi, %rsi
	je	.LBB7_1
# %bb.2:
	movq	%rsi, %rbx
	movq	%rdi, %r14
	movq	%rsi, %rdi
	callq	strlen
	leaq	(%rax,%rbx), %rdx
	movq	%r14, %rdi
	movq	%rbx, %rsi
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag # TAILCALL
.LBB7_1:
	.cfi_def_cfa_offset 32
	movl	$.L.str.2, %edi
	callq	_ZSt19__throw_logic_errorPKc
.Lfunc_end7:
	.size	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_, .Lfunc_end7-_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag,"axG",@progbits,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag,comdat
	.weak	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag # -- Begin function _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
	.p2align	1, 0x90
	.type	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag,@function
_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag: # @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdx, %r14
	movq	%rsi, %r15
	movq	%rdi, %rbx
	subq	%rsi, %r14
	movq	%r14, (%rsp)
	cmpq	$15, %r14
	jbe	.LBB8_1
# %bb.2:
	movq	%rsp, %r12
	movq	%rbx, %rdi
	movq	%r12, %rsi
	xorl	%edx, %edx
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_createERmm
	movq	%rax, (%rbx)
	movq	(%r12), %rcx
	movq	%rcx, 16(%rbx)
	jmp	.LBB8_3
.LBB8_1:                                # %._crit_edge
	movq	(%rbx), %rax
.LBB8_3:
	testq	%r14, %r14
	je	.LBB8_7
# %bb.4:
	cmpq	$1, %r14
	jne	.LBB8_6
# %bb.5:
	movb	(%r15), %cl
	movb	%cl, (%rax)
	jmp	.LBB8_7
.LBB8_6:
	movq	%rax, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	callq	memcpy@PLT
.LBB8_7:                                # %_ZZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tagEN6_GuardD2Ev.exit
	movq	(%rsp), %rax
	movq	%rax, 8(%rbx)
	movq	(%rbx), %rcx
	movb	$0, (%rcx,%rax)
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag, .Lfunc_end8-_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB9_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB9_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9updatePosiP15HIP_vector_typeIfLj2EES1_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z23generateInitialPositioniP15HIP_vector_typeIfLj2EES1_S1_S1_S1_S1_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6updatei15HIP_vector_typeIfLj2EES0_PS0_S1_S1_S1_S1_S1_, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end9:
	.size	__hip_module_ctor, .Lfunc_end9-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB10_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB10_2:
	retq
.Lfunc_end10:
	.size	__hip_module_dtor, .Lfunc_end10-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	pos_dev,@object                 # @pos_dev
	.bss
	.globl	pos_dev
	.p2align	3, 0x0
pos_dev:
	.quad	0
	.size	pos_dev, 8

	.type	vel_dev,@object                 # @vel_dev
	.globl	vel_dev
	.p2align	3, 0x0
vel_dev:
	.quad	0
	.size	vel_dev, 8

	.type	acc_dev,@object                 # @acc_dev
	.globl	acc_dev
	.p2align	3, 0x0
acc_dev:
	.quad	0
	.size	acc_dev, 8

	.type	sep_dev,@object                 # @sep_dev
	.globl	sep_dev
	.p2align	3, 0x0
sep_dev:
	.quad	0
	.size	sep_dev, 8

	.type	align_dev,@object               # @align_dev
	.globl	align_dev
	.p2align	3, 0x0
align_dev:
	.quad	0
	.size	align_dev, 8

	.type	cohesion_dev,@object            # @cohesion_dev
	.globl	cohesion_dev
	.p2align	3, 0x0
cohesion_dev:
	.quad	0
	.size	cohesion_dev, 8

	.type	pos_host,@object                # @pos_host
	.globl	pos_host
	.p2align	3, 0x0
pos_host:
	.quad	0
	.size	pos_host, 8

	.type	vel_host,@object                # @vel_host
	.globl	vel_host
	.p2align	3, 0x0
vel_host:
	.quad	0
	.size	vel_host, 8

	.type	averagePos,@object              # @averagePos
	.globl	averagePos
	.p2align	3, 0x0
averagePos:
	.zero	8
	.size	averagePos, 8

	.type	averageForward,@object          # @averageForward
	.globl	averageForward
	.p2align	3, 0x0
averageForward:
	.zero	8
	.size	averageForward, 8

	.type	_Z9updatePosiP15HIP_vector_typeIfLj2EES1_,@object # @_Z9updatePosiP15HIP_vector_typeIfLj2EES1_
	.section	.rodata,"a",@progbits
	.globl	_Z9updatePosiP15HIP_vector_typeIfLj2EES1_
	.p2align	3, 0x0
_Z9updatePosiP15HIP_vector_typeIfLj2EES1_:
	.quad	_Z24__device_stub__updatePosiP15HIP_vector_typeIfLj2EES1_
	.size	_Z9updatePosiP15HIP_vector_typeIfLj2EES1_, 8

	.type	_Z23generateInitialPositioniP15HIP_vector_typeIfLj2EES1_S1_S1_S1_S1_,@object # @_Z23generateInitialPositioniP15HIP_vector_typeIfLj2EES1_S1_S1_S1_S1_
	.globl	_Z23generateInitialPositioniP15HIP_vector_typeIfLj2EES1_S1_S1_S1_S1_
	.p2align	3, 0x0
_Z23generateInitialPositioniP15HIP_vector_typeIfLj2EES1_S1_S1_S1_S1_:
	.quad	_Z38__device_stub__generateInitialPositioniP15HIP_vector_typeIfLj2EES1_S1_S1_S1_S1_
	.size	_Z23generateInitialPositioniP15HIP_vector_typeIfLj2EES1_S1_S1_S1_S1_, 8

	.type	_Z6updatei15HIP_vector_typeIfLj2EES0_PS0_S1_S1_S1_S1_S1_,@object # @_Z6updatei15HIP_vector_typeIfLj2EES0_PS0_S1_S1_S1_S1_S1_
	.globl	_Z6updatei15HIP_vector_typeIfLj2EES0_PS0_S1_S1_S1_S1_S1_
	.p2align	3, 0x0
_Z6updatei15HIP_vector_typeIfLj2EES0_PS0_S1_S1_S1_S1_S1_:
	.quad	_Z21__device_stub__updatei15HIP_vector_typeIfLj2EES0_PS0_S1_S1_S1_S1_S1_
	.size	_Z6updatei15HIP_vector_typeIfLj2EES0_PS0_S1_S1_S1_S1_S1_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"%f"
	.size	.L.str, 3

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"stoi"
	.size	.L.str.1, 5

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"basic_string: construction from null is not valid"
	.size	.L.str.2, 50

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z9updatePosiP15HIP_vector_typeIfLj2EES1_"
	.size	.L__unnamed_1, 42

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z23generateInitialPositioniP15HIP_vector_typeIfLj2EES1_S1_S1_S1_S1_"
	.size	.L__unnamed_2, 69

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z6updatei15HIP_vector_typeIfLj2EES0_PS0_S1_S1_S1_S1_S1_"
	.size	.L__unnamed_3, 57

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z24__device_stub__updatePosiP15HIP_vector_typeIfLj2EES1_
	.addrsig_sym _Z38__device_stub__generateInitialPositioniP15HIP_vector_typeIfLj2EES1_S1_S1_S1_S1_
	.addrsig_sym _Z21__device_stub__updatei15HIP_vector_typeIfLj2EES0_PS0_S1_S1_S1_S1_S1_
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym pos_dev
	.addrsig_sym vel_dev
	.addrsig_sym acc_dev
	.addrsig_sym sep_dev
	.addrsig_sym align_dev
	.addrsig_sym cohesion_dev
	.addrsig_sym _Z9updatePosiP15HIP_vector_typeIfLj2EES1_
	.addrsig_sym _Z23generateInitialPositioniP15HIP_vector_typeIfLj2EES1_S1_S1_S1_S1_
	.addrsig_sym _Z6updatei15HIP_vector_typeIfLj2EES0_PS0_S1_S1_S1_S1_S1_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z9updatePosiP15HIP_vector_typeIfLj2EES1_ ; -- Begin function _Z9updatePosiP15HIP_vector_typeIfLj2EES1_
	.globl	_Z9updatePosiP15HIP_vector_typeIfLj2EES1_
	.p2align	8
	.type	_Z9updatePosiP15HIP_vector_typeIfLj2EES1_,@function
_Z9updatePosiP15HIP_vector_typeIfLj2EES1_: ; @_Z9updatePosiP15HIP_vector_typeIfLj2EES1_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s3, s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB0_6
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x8
	v_ashrrev_i32_e32 v2, 31, v1
                                        ; implicit-def: $vgpr4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s2, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v3, vcc_lo
	s_mov_b32 s3, exec_lo
	global_load_b32 v6, v[0:1], off
	s_waitcnt vmcnt(0)
	v_cmp_lt_f32_e64 s2, 0x461c4000, v6
	v_cmpx_nlt_f32_e32 0x461c4000, v6
	s_cbranch_execz .LBB0_3
; %bb.2:
	global_load_b32 v4, v[0:1], off offset:4
	s_and_not1_b32 s2, s2, exec_lo
	s_waitcnt vmcnt(0)
	v_cmp_lt_f32_e32 vcc_lo, 0x461c4000, v4
	s_and_b32 s4, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s2, s2, s4
.LBB0_3:                                ; %Flow
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_5
; %bb.4:
	v_mov_b32_e32 v4, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v5, v4
	v_mov_b32_e32 v6, v4
	global_store_b64 v[0:1], v[4:5], off
.LBB0_5:
	s_or_b32 exec_lo, exec_lo, s3
	v_add_co_u32 v2, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_dual_add_f32 v2, v6, v2 :: v_dual_add_f32 v3, v4, v3
	global_store_b64 v[0:1], v[2:3], off
.LBB0_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9updatePosiP15HIP_vector_typeIfLj2EES1_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z9updatePosiP15HIP_vector_typeIfLj2EES1_, .Lfunc_end0-_Z9updatePosiP15HIP_vector_typeIfLj2EES1_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 276
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z23generateInitialPositioniP15HIP_vector_typeIfLj2EES1_S1_S1_S1_S1_ ; -- Begin function _Z23generateInitialPositioniP15HIP_vector_typeIfLj2EES1_S1_S1_S1_S1_
	.globl	_Z23generateInitialPositioniP15HIP_vector_typeIfLj2EES1_S1_S1_S1_S1_
	.p2align	8
	.type	_Z23generateInitialPositioniP15HIP_vector_typeIfLj2EES1_S1_S1_S1_S1_,@function
_Z23generateInitialPositioniP15HIP_vector_typeIfLj2EES1_S1_S1_S1_S1_: ; @_Z23generateInitialPositioniP15HIP_vector_typeIfLj2EES1_S1_S1_S1_S1_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x44
	s_load_b32 s3, s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB1_2
; %bb.1:
	s_load_b256 s[4:11], s[0:1], 0x8
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b128 s[0:3], s[0:1], 0x28
	s_mov_b32 s12, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_mov_b32 s13, s12
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	v_dual_mov_b32 v2, s12 :: v_dual_mov_b32 v3, s13
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v6, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v8, vcc_lo, s8, v0
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v1, vcc_lo
	v_add_co_u32 v10, vcc_lo, s10, v0
	v_add_co_ci_u32_e32 v11, vcc_lo, s11, v1, vcc_lo
	global_store_b64 v[4:5], v[2:3], off
	v_add_co_u32 v4, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_store_b64 v[6:7], v[2:3], off
	global_store_b64 v[8:9], v[2:3], off
	global_store_b64 v[10:11], v[2:3], off
	global_store_b64 v[4:5], v[2:3], off
	global_store_b64 v[0:1], v[2:3], off
.LBB1_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z23generateInitialPositioniP15HIP_vector_typeIfLj2EES1_S1_S1_S1_S1_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 12
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z23generateInitialPositioniP15HIP_vector_typeIfLj2EES1_S1_S1_S1_S1_, .Lfunc_end1-_Z23generateInitialPositioniP15HIP_vector_typeIfLj2EES1_S1_S1_S1_S1_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 248
; NumSgprs: 18
; NumVgprs: 12
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 12
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z6updatei15HIP_vector_typeIfLj2EES0_PS0_S1_S1_S1_S1_S1_ ; -- Begin function _Z6updatei15HIP_vector_typeIfLj2EES0_PS0_S1_S1_S1_S1_S1_
	.globl	_Z6updatei15HIP_vector_typeIfLj2EES0_PS0_S1_S1_S1_S1_S1_
	.p2align	8
	.type	_Z6updatei15HIP_vector_typeIfLj2EES0_PS0_S1_S1_S1_S1_S1_,@function
_Z6updatei15HIP_vector_typeIfLj2EES0_PS0_S1_S1_S1_S1_S1_: ; @_Z6updatei15HIP_vector_typeIfLj2EES0_PS0_S1_S1_S1_S1_S1_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x54
	s_load_b32 s8, s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s8, v1
	s_cbranch_execz .LBB2_24
; %bb.1:
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x18
	s_load_b64 s[2:3], s[0:1], 0x8
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	global_load_b64 v[4:5], v[2:3], off
	s_waitcnt vmcnt(0)
	v_dual_sub_f32 v7, s3, v5 :: v_dual_sub_f32 v6, s2, v4
	s_mov_b32 s3, exec_lo
	v_mul_f32_e32 v2, v7, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v2, v6, v6
	v_mul_f32_e32 v3, 0x4f800000, v2
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v2, v2, v3, vcc_lo
	v_sqrt_f32_e32 v3, v2
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v8, -1, v3
	v_add_nc_u32_e32 v9, 1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v10, -v8, v3, v2
	v_fma_f32 v11, -v9, v3, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_f32_e64 s2, 0, v10
	v_cndmask_b32_e64 v3, v3, v8, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_f32_e64 s2, 0, v11
	v_cndmask_b32_e64 v3, v3, v9, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v8, 0x37800000, v3
	v_cndmask_b32_e32 v3, v3, v8, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v2, 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v2, v3, v2, vcc_lo
	v_cmpx_lt_f32_e32 0, v2
	s_cbranch_execz .LBB2_3
; %bb.2:
	v_div_scale_f32 v3, null, v2, v2, v6
	v_div_scale_f32 v8, null, v2, v2, v7
	v_div_scale_f32 v13, vcc_lo, v6, v2, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v9, v3
	v_rcp_f32_e32 v10, v8
	s_waitcnt_depctr 0xfff
	v_fma_f32 v11, -v3, v9, 1.0
	v_fma_f32 v12, -v8, v10, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v9, v11, v9 :: v_dual_fmac_f32 v10, v12, v10
	v_div_scale_f32 v11, s2, v7, v2, v7
	v_mul_f32_e32 v12, v13, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v14, v11, v10
	v_fma_f32 v15, -v3, v12, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v16, -v8, v14, v11
	v_fmac_f32_e32 v12, v15, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v14, v16, v10
	v_fma_f32 v3, -v3, v12, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v8, -v8, v14, v11
	v_div_fmas_f32 v3, v3, v9, v12
	s_mov_b32 vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v8, v8, v10, v14
	v_div_fixup_f32 v6, v3, v2, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_div_fixup_f32 v7, v8, v2, v7
.LBB2_3:                                ; %_Z9normalize15HIP_vector_typeIfLj2EE.exit.i
	s_or_b32 exec_lo, exec_lo, s3
	v_mul_f32_e32 v2, v5, v5
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v2, v4, v4
	v_mul_f32_e32 v3, 0x4f800000, v2
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v2, v2, v3, vcc_lo
	v_sqrt_f32_e32 v3, v2
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v8, -1, v3
	v_add_nc_u32_e32 v9, 1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v10, -v8, v3, v2
	v_fma_f32 v11, -v9, v3, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_f32_e64 s2, 0, v10
	v_cndmask_b32_e64 v3, v3, v8, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_f32_e64 s2, 0, v11
	v_cndmask_b32_e64 v3, v3, v9, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v8, 0x37800000, v3
	v_cndmask_b32_e32 v3, v3, v8, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v2, 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v2, v3, v2, vcc_lo
	v_cmpx_gt_f32_e32 0x42480000, v2
	s_cbranch_execz .LBB2_5
; %bb.4:
	v_mul_f32_e32 v3, v2, v6
	v_mul_f32_e32 v2, v2, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_scale_f32 v6, null, 0x42480000, 0x42480000, v3
	v_div_scale_f32 v7, null, 0x42480000, 0x42480000, v2
	v_div_scale_f32 v12, vcc_lo, v3, 0x42480000, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v8, v6
	v_rcp_f32_e32 v9, v7
	s_waitcnt_depctr 0xfff
	v_fma_f32 v10, -v6, v8, 1.0
	v_fma_f32 v11, -v7, v9, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v9, v11, v9 :: v_dual_fmac_f32 v8, v10, v8
	v_div_scale_f32 v10, s2, v2, 0x42480000, v2
	v_mul_f32_e32 v13, v10, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v15, -v7, v13, v10
	v_fmac_f32_e32 v13, v15, v9
	v_mul_f32_e32 v11, v12, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v7, -v7, v13, v10
	v_fma_f32 v14, -v6, v11, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, v14, v8
	v_fma_f32 v6, -v6, v11, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v6, v6, v8, v11
	s_mov_b32 vcc_lo, s2
	v_div_fmas_f32 v7, v7, v9, v13
	v_div_fixup_f32 v6, v6, 0x42480000, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_div_fixup_f32 v7, v7, 0x42480000, v2
.LBB2_5:                                ; %_Z19calc_cohesion_acceli15HIP_vector_typeIfLj2EEPS0_.exit
	s_or_b32 exec_lo, exec_lo, s3
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	s_load_b64 s[2:3], s[0:1], 0x10
	v_dual_mov_b32 v8, 0 :: v_dual_mov_b32 v9, 0
	global_load_b64 v[2:3], v[0:1], off
	s_cmp_lt_i32 s8, 1
	s_cbranch_scc1 .LBB2_16
; %bb.6:                                ; %.lr.ph.i.preheader
	s_add_u32 s1, s4, 4
	v_dual_mov_b32 v8, 0 :: v_dual_mov_b32 v9, 0
	s_addc_u32 s9, s5, 0
	s_add_u32 s6, s6, 4
	s_addc_u32 s7, s7, 0
.LBB2_7:                                ; %.lr.ph.i
                                        ; =>This Inner Loop Header: Depth=1
	s_add_u32 s4, s1, -4
	s_addc_u32 s5, s9, -1
	s_load_b64 s[4:5], s[4:5], 0x0
	s_waitcnt lgkmcnt(0)
	v_cmp_eq_f32_e32 vcc_lo, s4, v4
	v_cmp_eq_f32_e64 s0, s5, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s0
	s_xor_b32 s11, s0, -1
	s_and_saveexec_b32 s10, s0
	s_cbranch_execz .LBB2_9
; %bb.8:                                ; %_Z14vector2dEquals15HIP_vector_typeIfLj2EES0_.exit.i
                                        ;   in Loop: Header=BB2_7 Depth=1
	s_add_u32 s12, s6, -4
	s_addc_u32 s13, s7, -1
	s_and_not1_b32 s11, s11, exec_lo
	s_load_b64 s[12:13], s[12:13], 0x0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmp_neq_f32_e32 vcc_lo, s12, v2
	v_cmp_neq_f32_e64 s0, s13, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s0, vcc_lo, s0
	s_and_b32 s0, s0, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s11, s11, s0
.LBB2_9:                                ; %Flow213
                                        ;   in Loop: Header=BB2_7 Depth=1
	s_or_b32 exec_lo, exec_lo, s10
	s_and_saveexec_b32 s10, s11
	s_cbranch_execz .LBB2_15
; %bb.10:                               ; %.critedge.i
                                        ;   in Loop: Header=BB2_7 Depth=1
	v_dual_subrev_f32 v10, s5, v5 :: v_dual_subrev_f32 v11, s4, v4
	s_mov_b32 s4, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v12, v10, v10
	v_fmac_f32_e32 v12, v11, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v13, 0x4f800000, v12
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v12
	v_cndmask_b32_e32 v12, v12, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_sqrt_f32_e32 v13, v12
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v14, -1, v13
	v_add_nc_u32_e32 v15, 1, v13
	v_fma_f32 v16, -v14, v13, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v17, -v15, v13, v12
	v_cmp_ge_f32_e64 s0, 0, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v13, v13, v14, s0
	v_cmp_lt_f32_e64 s0, 0, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v13, v13, v15, s0
	v_mul_f32_e32 v14, 0x37800000, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v13, v13, v14, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v12, 0x260
	v_cndmask_b32_e32 v12, v13, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_f32_e32 0x40c00000, v12
	s_cbranch_execz .LBB2_14
; %bb.11:                               ;   in Loop: Header=BB2_7 Depth=1
	s_mov_b32 s5, exec_lo
	v_cmpx_lt_f32_e32 0, v12
	s_cbranch_execz .LBB2_13
; %bb.12:                               ;   in Loop: Header=BB2_7 Depth=1
	v_div_scale_f32 v13, null, v12, v12, v11
	v_div_scale_f32 v14, null, v12, v12, v10
	v_div_scale_f32 v19, vcc_lo, v11, v12, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v15, v13
	v_rcp_f32_e32 v16, v14
	s_waitcnt_depctr 0xfff
	v_fma_f32 v17, -v13, v15, 1.0
	v_fma_f32 v18, -v14, v16, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v15, v17, v15 :: v_dual_fmac_f32 v16, v18, v16
	v_div_scale_f32 v17, s0, v10, v12, v10
	v_mul_f32_e32 v18, v19, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v20, v17, v16
	v_fma_f32 v21, -v13, v18, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v22, -v14, v20, v17
	v_fmac_f32_e32 v18, v21, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v20, v22, v16
	v_fma_f32 v13, -v13, v18, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v14, -v14, v20, v17
	v_div_fmas_f32 v13, v13, v15, v18
	s_mov_b32 vcc_lo, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v14, v14, v16, v20
	v_div_fixup_f32 v11, v13, v12, v11
	s_delay_alu instid0(VALU_DEP_2)
	v_div_fixup_f32 v10, v14, v12, v10
.LBB2_13:                               ; %_Z9normalize15HIP_vector_typeIfLj2EE.exit.i140
                                        ;   in Loop: Header=BB2_7 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	v_sub_f32_e32 v12, 0x40c00000, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v10, v12, v10
	v_div_scale_f32 v13, null, 0x40c00000, 0x40c00000, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v15, v13
	s_waitcnt_depctr 0xfff
	v_fma_f32 v17, -v13, v15, 1.0
	v_fmac_f32_e32 v15, v17, v15
	v_mul_f32_e32 v11, v12, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f32 v12, null, 0x40c00000, 0x40c00000, v11
	v_div_scale_f32 v18, vcc_lo, v11, 0x40c00000, v11
	v_rcp_f32_e32 v14, v12
	s_waitcnt_depctr 0xfff
	v_fma_f32 v16, -v12, v14, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v14, v16, v14
	v_div_scale_f32 v16, s0, v10, 0x40c00000, v10
	v_mul_f32_e32 v17, v18, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v19, v16, v15
	v_fma_f32 v20, -v12, v17, v18
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v21, -v13, v19, v16
	v_fmac_f32_e32 v17, v20, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v19, v21, v15
	v_fma_f32 v12, -v12, v17, v18
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v13, -v13, v19, v16
	v_div_fmas_f32 v12, v12, v14, v17
	s_mov_b32 vcc_lo, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v13, v13, v15, v19
	v_div_fixup_f32 v11, v12, 0x40c00000, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v10, v13, 0x40c00000, v10
	v_dual_add_f32 v9, v9, v11 :: v_dual_add_f32 v8, v8, v10
.LBB2_14:                               ; %Flow212
                                        ;   in Loop: Header=BB2_7 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
.LBB2_15:                               ; %_Z14vector2dEquals15HIP_vector_typeIfLj2EES0_.exit148.i
                                        ;   in Loop: Header=BB2_7 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s10
	s_add_i32 s8, s8, -1
	s_add_u32 s1, s1, 8
	s_addc_u32 s9, s9, 0
	s_add_u32 s6, s6, 8
	s_addc_u32 s7, s7, 0
	s_cmp_eq_u32 s8, 0
	s_cbranch_scc0 .LBB2_7
.LBB2_16:                               ; %Flow215
	v_mul_f32_e32 v4, v8, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v4, v9, v9
	v_mul_f32_e32 v5, 0x4f800000, v4
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v4, v4, v5, vcc_lo
	v_sqrt_f32_e32 v5, v4
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v10, -1, v5
	v_add_nc_u32_e32 v11, 1, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v12, -v10, v5, v4
	v_fma_f32 v13, -v11, v5, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_f32_e64 s0, 0, v12
	v_cndmask_b32_e64 v5, v5, v10, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_f32_e64 s0, 0, v13
	v_cndmask_b32_e64 v5, v5, v11, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v10, 0x37800000, v5
	v_cndmask_b32_e32 v5, v5, v10, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v4, 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v4, v5, v4, vcc_lo
	v_cmp_lt_f32_e32 vcc_lo, 1.0, v4
	v_cmp_lt_f32_e64 s0, 0, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s0
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_18
; %bb.17:
	v_div_scale_f32 v5, null, v4, v4, v9
	v_div_scale_f32 v10, null, v4, v4, v8
	v_div_scale_f32 v15, vcc_lo, v9, v4, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v11, v5
	v_rcp_f32_e32 v12, v10
	s_waitcnt_depctr 0xfff
	v_fma_f32 v13, -v5, v11, 1.0
	v_fma_f32 v14, -v10, v12, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v11, v13, v11 :: v_dual_fmac_f32 v12, v14, v12
	v_div_scale_f32 v13, s0, v8, v4, v8
	v_mul_f32_e32 v14, v15, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v16, v13, v12
	v_fma_f32 v17, -v5, v14, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v18, -v10, v16, v13
	v_fmac_f32_e32 v14, v17, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v16, v18, v12
	v_fma_f32 v5, -v5, v14, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v10, -v10, v16, v13
	v_div_fmas_f32 v5, v5, v11, v14
	s_mov_b32 vcc_lo, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v10, v10, v12, v16
	v_div_fixup_f32 v9, v5, v4, v9
	s_delay_alu instid0(VALU_DEP_2)
	v_div_fixup_f32 v8, v10, v4, v8
.LBB2_18:                               ; %_Z9normalize15HIP_vector_typeIfLj2EE.exit164.i
	s_or_b32 exec_lo, exec_lo, s1
	s_mov_b32 s0, 0x40a00000
	s_waitcnt lgkmcnt(0)
	v_div_scale_f32 v14, vcc_lo, s2, 0x40a00000, s2
	v_div_scale_f32 v4, null, s0, s0, s2
	v_div_scale_f32 v5, null, s0, s0, s3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v10, v4
	v_rcp_f32_e32 v11, v5
	s_waitcnt_depctr 0xfff
	v_fma_f32 v12, -v4, v10, 1.0
	v_fma_f32 v13, -v5, v11, 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v10, v12, v10
	v_div_scale_f32 v12, s0, s3, 0x40a00000, s3
	v_fmac_f32_e32 v11, v13, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v13, v14, v10
	v_mul_f32_e32 v15, v12, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v16, -v4, v13, v14
	v_fma_f32 v17, -v5, v15, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v13, v16, v10
	v_fma_f32 v4, -v4, v13, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v4, v4, v10, v13
	s_mov_b32 vcc_lo, s0
	v_div_fixup_f32 v4, v4, 0x40a00000, s2
	v_fmac_f32_e32 v15, v17, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v5, -v5, v15, v12
	v_div_fmas_f32 v5, v5, v11, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v5, v5, 0x40a00000, s3
	v_mul_f32_e32 v10, v5, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v10, v4, v4
	v_mul_f32_e32 v11, 0x4f800000, v10
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v10, v10, v11, vcc_lo
	v_sqrt_f32_e32 v11, v10
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v12, -1, v11
	v_add_nc_u32_e32 v13, 1, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v14, -v12, v11, v10
	v_fma_f32 v15, -v13, v11, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_f32_e64 s0, 0, v14
	v_cndmask_b32_e64 v11, v11, v12, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_f32_e64 s0, 0, v15
	v_cndmask_b32_e64 v11, v11, v13, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v12, 0x37800000, v11
	v_cndmask_b32_e32 v11, v11, v12, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v10, 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v10, v11, v10, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 1.0, v10
	v_cmp_nlt_f32_e64 s0, 0, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s0, vcc_lo, s0
	s_and_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB2_20
; %bb.19:
	v_div_scale_f32 v11, null, v10, v10, v4
	v_div_scale_f32 v12, null, v10, v10, v5
	v_div_scale_f32 v17, vcc_lo, v4, v10, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v13, v11
	v_rcp_f32_e32 v14, v12
	s_waitcnt_depctr 0xfff
	v_fma_f32 v15, -v11, v13, 1.0
	v_fma_f32 v16, -v12, v14, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v13, v15, v13 :: v_dual_fmac_f32 v14, v16, v14
	v_div_scale_f32 v15, s0, v5, v10, v5
	v_mul_f32_e32 v16, v17, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v18, v15, v14
	v_fma_f32 v19, -v11, v16, v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v20, -v12, v18, v15
	v_fmac_f32_e32 v16, v19, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v18, v20, v14
	v_fma_f32 v11, -v11, v16, v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v12, -v12, v18, v15
	v_div_fmas_f32 v11, v11, v13, v16
	s_mov_b32 vcc_lo, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v12, v12, v14, v18
	v_div_fixup_f32 v4, v11, v10, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_div_fixup_f32 v5, v12, v10, v5
.LBB2_20:                               ; %_Z9normalize15HIP_vector_typeIfLj2EE.exit.i142
	s_waitcnt vmcnt(0)
	v_dual_fmac_f32 v3, 0x40400000, v7 :: v_dual_fmamk_f32 v2, v6, 0x40400000, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v3, 2.0, v8 :: v_dual_fmac_f32 v2, 2.0, v9
	v_dual_fmac_f32 v3, 0x40a00000, v5 :: v_dual_fmac_f32 v2, 0x40a00000, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v4, v3, v3
	global_store_b64 v[0:1], v[2:3], off
	v_fmac_f32_e32 v4, v2, v2
	v_mul_f32_e32 v5, 0x4f800000, v4
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v4, v4, v5, vcc_lo
	v_sqrt_f32_e32 v5, v4
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v6, -1, v5
	v_add_nc_u32_e32 v7, 1, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v8, -v6, v5, v4
	v_fma_f32 v9, -v7, v5, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_f32_e64 s0, 0, v8
	v_cndmask_b32_e64 v5, v5, v6, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_f32_e64 s0, 0, v9
	v_cndmask_b32_e64 v5, v5, v7, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v6, 0x37800000, v5
	v_cndmask_b32_e32 v5, v5, v6, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v4, 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v4, v5, v4, vcc_lo
	v_cmp_lt_f32_e32 vcc_lo, 0x42480000, v4
	s_delay_alu instid0(VALU_DEP_3)
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_24
; %bb.21:
	s_mov_b32 s1, exec_lo
	v_cmpx_lt_f32_e32 0, v4
	s_cbranch_execz .LBB2_23
; %bb.22:
	v_div_scale_f32 v5, null, v4, v4, v2
	v_div_scale_f32 v6, null, v4, v4, v3
	v_div_scale_f32 v11, vcc_lo, v2, v4, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v7, v5
	v_rcp_f32_e32 v8, v6
	s_waitcnt_depctr 0xfff
	v_fma_f32 v9, -v5, v7, 1.0
	v_fma_f32 v10, -v6, v8, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v7, v9, v7 :: v_dual_fmac_f32 v8, v10, v8
	v_div_scale_f32 v9, s0, v3, v4, v3
	v_mul_f32_e32 v10, v11, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v12, v9, v8
	v_fma_f32 v13, -v5, v10, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v14, -v6, v12, v9
	v_fmac_f32_e32 v10, v13, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v12, v14, v8
	v_fma_f32 v5, -v5, v10, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v6, -v6, v12, v9
	v_div_fmas_f32 v5, v5, v7, v10
	s_mov_b32 vcc_lo, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v6, v6, v8, v12
	v_div_fixup_f32 v2, v5, v4, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_div_fixup_f32 v3, v6, v4, v3
.LBB2_23:                               ; %_Z9normalize15HIP_vector_typeIfLj2EE.exit
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mul_f32 v2, 0x42480000, v2 :: v_dual_mul_f32 v3, 0x42480000, v3
	global_store_b64 v[0:1], v[2:3], off
.LBB2_24:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6updatei15HIP_vector_typeIfLj2EES0_PS0_S1_S1_S1_S1_S1_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 328
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 23
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z6updatei15HIP_vector_typeIfLj2EES0_PS0_S1_S1_S1_S1_S1_, .Lfunc_end2-_Z6updatei15HIP_vector_typeIfLj2EES0_PS0_S1_S1_S1_S1_S1_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 3104
; NumSgprs: 18
; NumVgprs: 23
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 23
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9updatePosiP15HIP_vector_typeIfLj2EES1_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z9updatePosiP15HIP_vector_typeIfLj2EES1_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         60
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         64
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         68
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         70
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         72
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         74
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         76
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         78
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         112
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         120
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 312
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z23generateInitialPositioniP15HIP_vector_typeIfLj2EES1_S1_S1_S1_S1_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z23generateInitialPositioniP15HIP_vector_typeIfLj2EES1_S1_S1_S1_S1_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     12
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .offset:         8
        .size:           8
        .value_kind:     by_value
      - .offset:         16
        .size:           8
        .value_kind:     by_value
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         56
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         64
        .size:           8
        .value_kind:     global_buffer
      - .offset:         72
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         76
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         80
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         84
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         86
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         88
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         90
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         92
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         94
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         112
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         120
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         128
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         136
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 328
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6updatei15HIP_vector_typeIfLj2EES0_PS0_S1_S1_S1_S1_S1_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z6updatei15HIP_vector_typeIfLj2EES0_PS0_S1_S1_S1_S1_S1_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     23
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
