#include <assert.h>
#include "shareconvtrial.cuh"
#include "real.h"
#include <iostream>

void trial(){
	constexpr int asize=1000;
	constexpr int bsize=11;
	real A[asize];
	for(int i=0; i< asize; i++){
		A[i]=1;
	}
	real M[bsize];
	for (int i=0; i<bsize; ++i){
		M[i]=i;	
	}
	real P[asize];
	share_conv(A,M,P,bsize,asize);
	//for (int i=0; i<asize; ++i)
	//	std::cout << "P[" << i << "]=" << P[i] <<std::endl;
	//assert(P[20]==55);
}

int main(){
	trial();
	//std::cout << "success!!!!" <<std::endl;
}


	.file	"tmpxft_0029be8f_00000000-6_test.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3639:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3639:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z5trialv
	.type	_Z5trialv, @function
_Z5trialv:
.LFB3635:
	.cfi_startproc
	endbr64
	subq	$4096, %rsp
	.cfi_def_cfa_offset 4104
	orq	$0, (%rsp)
	subq	$3976, %rsp
	.cfi_def_cfa_offset 8080
	movss	.LC0(%rip), %xmm0
	movq	%fs:40, %rax
	movq	%rax, 8056(%rsp)
	xorl	%eax, %eax
.L3:
	leaq	56(%rsp), %rdi
	movss	%xmm0, (%rdi,%rax,4)
	incq	%rax
	cmpq	$1000, %rax
	jne	.L3
	movl	$127, %eax
	leaq	12(%rsp), %rsi
	movl	$11, %ecx
	movl	$1000, %r8d
	salq	$55, %rax
	leaq	4056(%rsp), %rdx
	movl	$0x41200000, 52(%rsp)
	movq	%rax, 12(%rsp)
	movabsq	$4629700418010611712, %rax
	movq	%rax, 20(%rsp)
	movabsq	$4656722015783223296, %rax
	movq	%rax, 28(%rsp)
	movabsq	$4674736414296899584, %rax
	movq	%rax, 36(%rsp)
	movabsq	$4688247213183205376, %rax
	movq	%rax, 44(%rsp)
	call	_Z10share_convPfS_S_ii@PLT
	movq	8056(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$8072, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	_Z5trialv, .-_Z5trialv
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3636:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	_Z5trialv
	xorl	%eax, %eax
	popq	%rdx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3636:
	.size	main, .-main
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3662:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	movq	%rax, %rdi
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3662:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	1065353216
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <assert.h>
#include "shareconvtrial.cuh"
#include "real.h"
#include <iostream>

void trial(){
	constexpr int asize=1000;
	constexpr int bsize=11;
	real A[asize];
	for(int i=0; i< asize; i++){
		A[i]=1;
	}
	real M[bsize];
	for (int i=0; i<bsize; ++i){
		M[i]=i;	
	}
	real P[asize];
	share_conv(A,M,P,bsize,asize);
	//for (int i=0; i<asize; ++i)
	//	std::cout << "P[" << i << "]=" << P[i] <<std::endl;
	//assert(P[20]==55);
}

int main(){
	trial();
	//std::cout << "success!!!!" <<std::endl;
}


	.text
	.file	"test.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z5trialv                       # -- Begin function _Z5trialv
	.type	_Z5trialv,@function
_Z5trialv:                              # @_Z5trialv
	.cfi_startproc
# %bb.0:
	subq	$8056, %rsp                     # imm = 0x1F78
	.cfi_def_cfa_offset 8064
	xorl	%eax, %eax
.LBB0_1:                                # =>This Inner Loop Header: Depth=1
	movl	$1065353216, 48(%rsp,%rax,4)    # imm = 0x3F800000
	incq	%rax
	cmpq	$1000, %rax                     # imm = 0x3E8
	jne	.LBB0_1
# %bb.2:
	xorl	%eax, %eax
.LBB0_3:                                # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	%xmm0, (%rsp,%rax,4)
	incq	%rax
	cmpq	$11, %rax
	jne	.LBB0_3
# %bb.4:
	leaq	48(%rsp), %rdi
	movq	%rsp, %rsi
	leaq	4048(%rsp), %rdx
	movl	$11, %ecx
	movl	$1000, %r8d                     # imm = 0x3E8
	callq	_Z10share_convPfS_S_ii
	addq	$8056, %rsp                     # imm = 0x1F78
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z5trialv, .Lfunc_end0-_Z5trialv
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	_Z5trialv
	xorl	%eax, %eax
	popq	%rcx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_

	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.amdgpu_metadata
---
amdhsa.kernels:  []
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
