#include <iostream>
#include <stdio.h>
#include <math.h>

#define ni 4096
#define nn 1024

#define gpuErrchk(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(cudaError_t code, const char *file, int line, bool abort=true)
{
   if (code != cudaSuccess) 
   {
      fprintf(stderr,"GPUassert: %s %s %d\n", cudaGetErrorString(code), file, line);
      if (abort) exit(code);
   }
}

void random_ints(int* a, int N)
{
   int i;
   for (i = 0; i < N; i++) 
   {
      a[i] = rand(); 
   }
}

void zeros(int* a, int N)
{
   int i;
   for (i = 0; i < N; i++) 
   {
      a[i] = 0; 
   }
}

// CURRENT MEMORY PERFORMANCE = 14.23 GB/s

// perform 1 column of the matrix-vector multiply (1 input, 1 weights vector)
// this means that the batch size is 1(?)
// the dimensions of the weights matrix are (ni, nn) => 2D array
// the full input is a vector of dimension ni (represented as an array)
// the full output is a vector of dimension nn (represented as an array)
// this is what is done in a fully-connected classifier layer
// this method utilizes a scratchpad memory for better thread block performance
__global__
void matrix_vector_mult(int *inp, int *outp, int *kern)
{
    // scratchpad memory used for shared variables
    __shared__ int temp_kern[nn]; // weights vector
    __shared__ int temp_inp; // single input vector value

    // populate shared data structures
    // only 1 thread needs to handle everything
    if (threadIdx.x == 0) {
      for (int i=0; i<nn; i++) {
         int k_index = blockIdx.x + i*ni; // weights matrix is row-major
         temp_kern[i] = kern[k_index]; 
      }
      temp_inp = inp[blockIdx.x];
    }
    
    __syncthreads(); // sync all threads to this point 

    // populate output
    outp[threadIdx.x] += (temp_inp * temp_kern[threadIdx.x]);
}

int main(void)
{
    // declare host + device pointers
    int *inp, *outp, *kern;
    int *d_inp, *d_outp, *d_kern;
    
    // compute array sizes
    int i_size = ni;
    int o_size = nn;
    int k_size = nn*ni;
    
    // allocate space for each array on the device
    gpuErrchk( cudaMalloc(&d_inp, i_size*sizeof(int)) );
    gpuErrchk( cudaMalloc(&d_outp, o_size*sizeof(int)) );
    gpuErrchk( cudaMalloc(&d_kern, k_size*sizeof(int)) );
    
    // allocate space and populate each array on the host
    inp = (int*)malloc(i_size*sizeof(int)); 
    outp = (int*)malloc(o_size*sizeof(int));
    kern = (int*)malloc(k_size*sizeof(int)); 
    random_ints(inp, i_size);
    zeros(outp, o_size);
    random_ints(kern, k_size);
    
    // copy populated host arrays to corresponding device arrays
    gpuErrchk( cudaMemcpy(d_inp, inp, i_size*sizeof(int), cudaMemcpyHostToDevice) );
    gpuErrchk( cudaMemcpy(d_outp, outp, o_size*sizeof(int), cudaMemcpyHostToDevice) );
    gpuErrchk( cudaMemcpy(d_kern, kern, k_size*sizeof(int), cudaMemcpyHostToDevice) );

    // launch all threads on device
    // # blocks = # of columns (ni)
    // # threads / block = # of rows (nn)
    matrix_vector_mult<<<ni, nn>>>(d_inp, d_outp, d_kern);
    
    // determine if run succeeded
    gpuErrchk( cudaPeekAtLastError() );
    gpuErrchk( cudaDeviceSynchronize() );
    
    // copy output array back to host
    gpuErrchk( cudaMemcpy(outp, d_outp, o_size, cudaMemcpyDeviceToHost) );

    // free all memory
    free(inp); free(outp); free(kern);
    gpuErrchk( cudaFree(d_inp) ); gpuErrchk( cudaFree(d_outp) ); gpuErrchk( cudaFree(d_kern) );

    return 0;
}
	.file	"tmpxft_002412f7_00000000-6_class2.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3641:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3641:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata._Z9gpuAssert9cudaErrorPKcib.str1.1,"aMS",@progbits,1
.LC0:
	.string	"GPUassert: %s %s %d\n"
	.section	.text._Z9gpuAssert9cudaErrorPKcib,"axG",@progbits,_Z9gpuAssert9cudaErrorPKcib,comdat
	.weak	_Z9gpuAssert9cudaErrorPKcib
	.type	_Z9gpuAssert9cudaErrorPKcib, @function
_Z9gpuAssert9cudaErrorPKcib:
.LFB3635:
	.cfi_startproc
	endbr64
	testl	%edi, %edi
	je	.L8
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	%ecx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movl	%edi, %ebx
	subq	$24, %rsp
	.cfi_def_cfa_offset 48
	movl	%edx, 12(%rsp)
	movq	%rsi, (%rsp)
	call	cudaGetErrorString@PLT
	movl	12(%rsp), %r9d
	movq	(%rsp), %r8
	leaq	.LC0(%rip), %rdx
	movq	stderr(%rip), %rdi
	movq	%rax, %rcx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	testb	%bpl, %bpl
	je	.L2
	movl	%ebx, %edi
	call	exit@PLT
.L2:
	addq	$24, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
.L8:
	.cfi_restore 3
	.cfi_restore 6
	ret
	.cfi_endproc
.LFE3635:
	.size	_Z9gpuAssert9cudaErrorPKcib, .-_Z9gpuAssert9cudaErrorPKcib
	.text
	.globl	_Z11random_intsPii
	.type	_Z11random_intsPii, @function
_Z11random_intsPii:
.LFB3636:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movl	%esi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	xorl	%ebx, %ebx
.L13:
	cmpl	%ebx, %ebp
	jle	.L16
	call	rand@PLT
	movl	%eax, (%r12,%rbx,4)
	incq	%rbx
	jmp	.L13
.L16:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3636:
	.size	_Z11random_intsPii, .-_Z11random_intsPii
	.globl	_Z5zerosPii
	.type	_Z5zerosPii, @function
_Z5zerosPii:
.LFB3637:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
.L18:
	cmpl	%eax, %esi
	jle	.L20
	xorl	%edx, %edx
	movl	%edx, (%rdi,%rax,4)
	incq	%rax
	jmp	.L18
.L20:
	ret
	.cfi_endproc
.LFE3637:
	.size	_Z5zerosPii, .-_Z5zerosPii
	.globl	_Z42__device_stub__Z18matrix_vector_multPiS_S_PiS_S_
	.type	_Z42__device_stub__Z18matrix_vector_multPiS_S_PiS_S_, @function
_Z42__device_stub__Z18matrix_vector_multPiS_S_PiS_S_:
.LFB3663:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L21
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z18matrix_vector_multPiS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L21:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L23
	call	__stack_chk_fail@PLT
.L23:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3663:
	.size	_Z42__device_stub__Z18matrix_vector_multPiS_S_PiS_S_, .-_Z42__device_stub__Z18matrix_vector_multPiS_S_PiS_S_
	.globl	_Z18matrix_vector_multPiS_S_
	.type	_Z18matrix_vector_multPiS_S_, @function
_Z18matrix_vector_multPiS_S_:
.LFB3664:
	.cfi_startproc
	endbr64
	jmp	_Z42__device_stub__Z18matrix_vector_multPiS_S_PiS_S_
	.cfi_endproc
.LFE3664:
	.size	_Z18matrix_vector_multPiS_S_, .-_Z18matrix_vector_multPiS_S_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/joshkimmel16/cuda-kernels/master/class2.cu"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3638:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	$16384, %esi
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	leaq	.LC1(%rip), %rbx
	subq	$72, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$80, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	leaq	16(%rsp), %rdi
	movl	$4096, %esi
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$81, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	leaq	24(%rsp), %rdi
	movl	$16777216, %esi
	call	cudaMalloc@PLT
	movl	$82, %edx
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movl	$16384, %edi
	call	malloc@PLT
	movl	$4096, %edi
	movq	%rax, %r13
	call	malloc@PLT
	movl	$16777216, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	movl	$4096, %esi
	movq	%r13, %rdi
	movq	%rax, %r12
	call	_Z11random_intsPii
	movl	$1024, %esi
	movq	%rbp, %rdi
	call	_Z5zerosPii
	movl	$4194304, %esi
	movq	%r12, %rdi
	call	_Z11random_intsPii
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%r13, %rsi
	movl	$16384, %edx
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movl	$93, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$4096, %edx
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movl	$94, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$16777216, %edx
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movl	$95, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movl	$4194305, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1048577, %edi
	salq	$10, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	salq	$12, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L27
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	call	_Z42__device_stub__Z18matrix_vector_multPiS_S_PiS_S_
.L27:
	call	cudaPeekAtLastError@PLT
	movl	$1, %ecx
	movl	$103, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	call	cudaDeviceSynchronize@PLT
	movl	$1, %ecx
	movl	$104, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	16(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbp, %rdi
	movl	$1024, %edx
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movl	$107, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	%r13, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movl	$1, %ecx
	movl	$111, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movl	$1, %ecx
	movl	$111, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movl	$1, %ecx
	movl	$111, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L28
	call	__stack_chk_fail@PLT
.L28:
	addq	$72, %rsp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3638:
	.size	main, .-main
	.section	.rodata.str1.1
.LC2:
	.string	"_Z18matrix_vector_multPiS_S_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3666:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC2(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z18matrix_vector_multPiS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3666:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <iostream>
#include <stdio.h>
#include <math.h>

#define ni 4096
#define nn 1024

#define gpuErrchk(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(hipError_t code, const char *file, int line, bool abort=true)
{
   if (code != hipSuccess) 
   {
      fprintf(stderr,"GPUassert: %s %s %d\n", hipGetErrorString(code), file, line);
      if (abort) exit(code);
   }
}

void random_ints(int* a, int N)
{
   int i;
   for (i = 0; i < N; i++) 
   {
      a[i] = rand(); 
   }
}

void zeros(int* a, int N)
{
   int i;
   for (i = 0; i < N; i++) 
   {
      a[i] = 0; 
   }
}

// CURRENT MEMORY PERFORMANCE = 14.23 GB/s

// perform 1 column of the matrix-vector multiply (1 input, 1 weights vector)
// this means that the batch size is 1(?)
// the dimensions of the weights matrix are (ni, nn) => 2D array
// the full input is a vector of dimension ni (represented as an array)
// the full output is a vector of dimension nn (represented as an array)
// this is what is done in a fully-connected classifier layer
// this method utilizes a scratchpad memory for better thread block performance
__global__
void matrix_vector_mult(int *inp, int *outp, int *kern)
{
    // scratchpad memory used for shared variables
    __shared__ int temp_kern[nn]; // weights vector
    __shared__ int temp_inp; // single input vector value

    // populate shared data structures
    // only 1 thread needs to handle everything
    if (threadIdx.x == 0) {
      for (int i=0; i<nn; i++) {
         int k_index = blockIdx.x + i*ni; // weights matrix is row-major
         temp_kern[i] = kern[k_index]; 
      }
      temp_inp = inp[blockIdx.x];
    }
    
    __syncthreads(); // sync all threads to this point 

    // populate output
    outp[threadIdx.x] += (temp_inp * temp_kern[threadIdx.x]);
}

int main(void)
{
    // declare host + device pointers
    int *inp, *outp, *kern;
    int *d_inp, *d_outp, *d_kern;
    
    // compute array sizes
    int i_size = ni;
    int o_size = nn;
    int k_size = nn*ni;
    
    // allocate space for each array on the device
    gpuErrchk( hipMalloc(&d_inp, i_size*sizeof(int)) );
    gpuErrchk( hipMalloc(&d_outp, o_size*sizeof(int)) );
    gpuErrchk( hipMalloc(&d_kern, k_size*sizeof(int)) );
    
    // allocate space and populate each array on the host
    inp = (int*)malloc(i_size*sizeof(int)); 
    outp = (int*)malloc(o_size*sizeof(int));
    kern = (int*)malloc(k_size*sizeof(int)); 
    random_ints(inp, i_size);
    zeros(outp, o_size);
    random_ints(kern, k_size);
    
    // copy populated host arrays to corresponding device arrays
    gpuErrchk( hipMemcpy(d_inp, inp, i_size*sizeof(int), hipMemcpyHostToDevice) );
    gpuErrchk( hipMemcpy(d_outp, outp, o_size*sizeof(int), hipMemcpyHostToDevice) );
    gpuErrchk( hipMemcpy(d_kern, kern, k_size*sizeof(int), hipMemcpyHostToDevice) );

    // launch all threads on device
    // # blocks = # of columns (ni)
    // # threads / block = # of rows (nn)
    matrix_vector_mult<<<ni, nn>>>(d_inp, d_outp, d_kern);
    
    // determine if run succeeded
    gpuErrchk( hipPeekAtLastError() );
    gpuErrchk( hipDeviceSynchronize() );
    
    // copy output array back to host
    gpuErrchk( hipMemcpy(outp, d_outp, o_size, hipMemcpyDeviceToHost) );

    // free all memory
    free(inp); free(outp); free(kern);
    gpuErrchk( hipFree(d_inp) ); gpuErrchk( hipFree(d_outp) ); gpuErrchk( hipFree(d_kern) );

    return 0;
}
	.text
	.file	"class2.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z11random_intsPii              # -- Begin function _Z11random_intsPii
	.type	_Z11random_intsPii,@function
_Z11random_intsPii:                     # @_Z11random_intsPii
	.cfi_startproc
# %bb.0:
	testl	%esi, %esi
	jle	.LBB0_4
# %bb.1:                                # %.lr.ph.preheader
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %rbx
	movl	%esi, %r14d
	xorl	%r15d, %r15d
.LBB0_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	movl	%eax, (%rbx,%r15,4)
	incq	%r15
	cmpq	%r15, %r14
	jne	.LBB0_2
# %bb.3:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
	.cfi_restore %r15
.LBB0_4:                                # %._crit_edge
	retq
.Lfunc_end0:
	.size	_Z11random_intsPii, .Lfunc_end0-_Z11random_intsPii
	.cfi_endproc
                                        # -- End function
	.globl	_Z5zerosPii                     # -- Begin function _Z5zerosPii
	.type	_Z5zerosPii,@function
_Z5zerosPii:                            # @_Z5zerosPii
	.cfi_startproc
# %bb.0:
	testl	%esi, %esi
	jle	.LBB1_1
# %bb.2:                                # %.lr.ph.preheader
	movl	%esi, %edx
	shlq	$2, %rdx
	xorl	%esi, %esi
	jmp	memset@PLT                      # TAILCALL
.LBB1_1:                                # %._crit_edge
	retq
.Lfunc_end1:
	.size	_Z5zerosPii, .Lfunc_end1-_Z5zerosPii
	.cfi_endproc
                                        # -- End function
	.globl	_Z33__device_stub__matrix_vector_multPiS_S_ # -- Begin function _Z33__device_stub__matrix_vector_multPiS_S_
	.type	_Z33__device_stub__matrix_vector_multPiS_S_,@function
_Z33__device_stub__matrix_vector_multPiS_S_: # @_Z33__device_stub__matrix_vector_multPiS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z18matrix_vector_multPiS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z33__device_stub__matrix_vector_multPiS_S_, .Lfunc_end2-_Z33__device_stub__matrix_vector_multPiS_S_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	leaq	24(%rsp), %rdi
	movl	$16384, %esi                    # imm = 0x4000
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB3_1
# %bb.3:                                # %_Z9gpuAssert10hipError_tPKcib.exit
	leaq	8(%rsp), %rdi
	movl	$4096, %esi                     # imm = 0x1000
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB3_4
# %bb.5:                                # %_Z9gpuAssert10hipError_tPKcib.exit25
	leaq	16(%rsp), %rdi
	movl	$16777216, %esi                 # imm = 0x1000000
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB3_6
# %bb.7:                                # %_Z9gpuAssert10hipError_tPKcib.exit27
	movl	$16384, %edi                    # imm = 0x4000
	callq	malloc
	movq	%rax, %rbx
	movl	$4096, %edi                     # imm = 0x1000
	callq	malloc
	movq	%rax, %r14
	movl	$16777216, %edi                 # imm = 0x1000000
	callq	malloc
	movq	%rax, %r15
	xorl	%r12d, %r12d
.LBB3_8:                                # %.lr.ph.i
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	movl	%eax, (%rbx,%r12,4)
	incq	%r12
	cmpq	$4096, %r12                     # imm = 0x1000
	jne	.LBB3_8
# %bb.9:                                # %_Z11random_intsPii.exit
	xorl	%r12d, %r12d
	movl	$4096, %edx                     # imm = 0x1000
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
.LBB3_10:                               # %.lr.ph.i28
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	movl	%eax, (%r15,%r12,4)
	incq	%r12
	cmpq	$4194304, %r12                  # imm = 0x400000
	jne	.LBB3_10
# %bb.11:                               # %_Z11random_intsPii.exit32
	movq	24(%rsp), %rdi
	movl	$16384, %edx                    # imm = 0x4000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB3_12
# %bb.14:                               # %_Z9gpuAssert10hipError_tPKcib.exit34
	movq	8(%rsp), %rdi
	movl	$4096, %edx                     # imm = 0x1000
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB3_15
# %bb.16:                               # %_Z9gpuAssert10hipError_tPKcib.exit36
	movq	16(%rsp), %rdi
	movl	$16777216, %edx                 # imm = 0x1000000
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB3_17
# %bb.18:                               # %_Z9gpuAssert10hipError_tPKcib.exit38
	movabsq	$4294968320, %rdx               # imm = 0x100000400
	leaq	3072(%rdx), %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_20
# %bb.19:
	movq	24(%rsp), %rdi
	movq	8(%rsp), %rsi
	movq	16(%rsp), %rdx
	callq	_Z33__device_stub__matrix_vector_multPiS_S_
.LBB3_20:
	callq	hipPeekAtLastError
	testl	%eax, %eax
	jne	.LBB3_21
# %bb.22:                               # %_Z9gpuAssert10hipError_tPKcib.exit40
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB3_23
# %bb.24:                               # %_Z9gpuAssert10hipError_tPKcib.exit42
	movq	8(%rsp), %rsi
	movl	$1024, %edx                     # imm = 0x400
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB3_25
# %bb.26:                               # %_Z9gpuAssert10hipError_tPKcib.exit44
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	movq	24(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB3_27
# %bb.28:                               # %_Z9gpuAssert10hipError_tPKcib.exit46
	movq	8(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB3_27
# %bb.29:                               # %_Z9gpuAssert10hipError_tPKcib.exit48
	movq	16(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB3_27
# %bb.30:                               # %_Z9gpuAssert10hipError_tPKcib.exit50
	xorl	%eax, %eax
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB3_27:
	.cfi_def_cfa_offset 80
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.1, %esi
	movl	$.L.str, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$113, %r8d
	jmp	.LBB3_2
.LBB3_1:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.1, %esi
	movl	$.L.str, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$82, %r8d
	jmp	.LBB3_2
.LBB3_4:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.1, %esi
	movl	$.L.str, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$83, %r8d
	jmp	.LBB3_2
.LBB3_6:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.1, %esi
	movl	$.L.str, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$84, %r8d
.LBB3_2:
	xorl	%eax, %eax
	callq	fprintf
	movl	%ebx, %edi
	callq	exit
.LBB3_12:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.1, %esi
	movl	$.L.str, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$95, %r8d
	jmp	.LBB3_13
.LBB3_15:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.1, %esi
	movl	$.L.str, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$96, %r8d
	jmp	.LBB3_13
.LBB3_17:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.1, %esi
	movl	$.L.str, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$97, %r8d
	jmp	.LBB3_13
.LBB3_21:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.1, %esi
	movl	$.L.str, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$105, %r8d
	jmp	.LBB3_13
.LBB3_23:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.1, %esi
	movl	$.L.str, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$106, %r8d
	jmp	.LBB3_13
.LBB3_25:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.1, %esi
	movl	$.L.str, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$109, %r8d
.LBB3_13:
	xorl	%eax, %eax
	callq	fprintf
	movl	%ebp, %edi
	callq	exit
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z18matrix_vector_multPiS_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z18matrix_vector_multPiS_S_,@object # @_Z18matrix_vector_multPiS_S_
	.section	.rodata,"a",@progbits
	.globl	_Z18matrix_vector_multPiS_S_
	.p2align	3, 0x0
_Z18matrix_vector_multPiS_S_:
	.quad	_Z33__device_stub__matrix_vector_multPiS_S_
	.size	_Z18matrix_vector_multPiS_S_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/joshkimmel16/cuda-kernels/master/class2.hip"
	.size	.L.str, 106

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"GPUassert: %s %s %d\n"
	.size	.L.str.1, 21

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z18matrix_vector_multPiS_S_"
	.size	.L__unnamed_1, 29

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z33__device_stub__matrix_vector_multPiS_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z18matrix_vector_multPiS_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z18matrix_vector_multPiS_S_ ; -- Begin function _Z18matrix_vector_multPiS_S_
	.globl	_Z18matrix_vector_multPiS_S_
	.p2align	8
	.type	_Z18matrix_vector_multPiS_S_,@function
_Z18matrix_vector_multPiS_S_:           ; @_Z18matrix_vector_multPiS_S_
; %bb.0:
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_mov_b32 s3, 0
	s_mov_b32 s10, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB0_4
; %bb.1:                                ; %.preheader
	s_mov_b32 s2, s15
	s_mov_b32 s8, s15
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s9, s8, 31
	s_lshl_b64 s[12:13], s[8:9], 2
	s_waitcnt lgkmcnt(0)
	s_add_u32 s12, s0, s12
	s_addc_u32 s13, s1, s13
	s_addk_i32 s8, 0x1000
	s_load_b32 s9, s[12:13], 0x0
	v_mov_b32_e32 v1, s3
	s_add_i32 s3, s3, 4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmpk_eq_i32 s3, 0x1000
	s_waitcnt lgkmcnt(0)
	v_mov_b32_e32 v2, s9
	ds_store_b32 v1, v2
	s_cbranch_scc0 .LBB0_2
; %bb.3:
	s_mov_b32 s3, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[2:3], 2
	s_add_u32 s0, s4, s0
	s_addc_u32 s1, s5, s1
	s_load_b32 s0, s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v2, s0
	ds_store_b32 v1, v2 offset:4096
.LBB0_4:                                ; %Flow
	s_or_b32 exec_lo, exec_lo, s10
	v_lshlrev_b32_e32 v3, 2, v0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_mov_b32_e32 v1, 0
	global_load_b32 v0, v3, s[6:7]
	ds_load_b32 v4, v1 offset:4096
	ds_load_b32 v5, v3
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_mad_u64_u32 v[1:2], null, v5, v4, v[0:1]
	global_store_b32 v3, v1, s[6:7]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z18matrix_vector_multPiS_S_
		.amdhsa_group_segment_fixed_size 4100
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 24
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z18matrix_vector_multPiS_S_, .Lfunc_end0-_Z18matrix_vector_multPiS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 248
; NumSgprs: 16
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 4100 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 16
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 4100
    .kernarg_segment_align: 8
    .kernarg_segment_size: 24
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z18matrix_vector_multPiS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     16
    .sgpr_spill_count: 0
    .symbol:         _Z18matrix_vector_multPiS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
