#include <stdio.h>
#include <stdlib.h>
#include <math.h>
#include <stdint.h>
#include <time.h>

__global__ void conv(float *tab, int N, int M, int ndim,
  float *filter, int s, float *output);
__global__ void conv_bil(float *tab, int N, int M, int ndim,
  float *filter, int s, float *output, float r);

void box_filter(float *filter, int size, int ndim);
void gaussian_filter(float *filter, int size, int ndim);

void conv_GPU(float *tab, int ndim, int *dim, float *filter,
  int s, float *tab_filtered, int N_threads);

typedef struct {
  float *img;
  int ndim;
  int *dim;
  int max_pix;
} Image;

void open_img(Image * image);
void write_img(Image * image, int file_idx);

void box_filtering(Image *image, int s);
void gaussian_filtering(Image *image, int s);
void bilateral_filtering(Image *image, int s, float r);


int main(int argc, char const *argv[]) {
  Image image;
  Image * image_addr = &image;
  int s = 5;

  open_img(image_addr);
  box_filtering(image_addr, s);
  write_img(image_addr, 0);

  open_img(image_addr);
  gaussian_filtering(image_addr, s);
  write_img(image_addr, 1);

  open_img(image_addr);
  bilateral_filtering(image_addr, s, 10);
  write_img(image_addr, 2);

  return 0;
}

void box_filtering(Image *image, int s){
  int dim_dot = 1;
  float *filter;
  for (int d=0; d<image->ndim; d++){
    dim_dot*=image->dim[d];
  }
  if (image->ndim==2)
    filter = (float*) malloc((2*s+1)*(2*s+1)*sizeof(float));
  if (image->ndim==3)
    filter = (float*) malloc((2*s+1)*(2*s+1)*3*sizeof(float));
  float * img_filtered = (float*) malloc(dim_dot*sizeof(float));
  box_filter(filter, s, image->ndim);
  conv_GPU(image->img, image->ndim, image->dim,
    filter, s, img_filtered, 16);
  printf("\n");
  image->img = img_filtered;
}

void gaussian_filtering(Image *image, int s){
  int dim_dot = 1;
  float *filter;
  for (int d=0; d<image->ndim; d++){
    dim_dot*=image->dim[d];
  }
  if (image->ndim==2)
    filter = (float*) malloc((2*s+1)*(2*s+1)*sizeof(float));
  if (image->ndim==3)
    filter = (float*) malloc((2*s+1)*(2*s+1)*3*sizeof(float));
  float * img_filtered = (float*) malloc(dim_dot*sizeof(float));
  gaussian_filter(filter, s, image->ndim);
  conv_GPU(image->img, image->ndim, image->dim,
    filter, s, img_filtered, 16);
  printf("\n");
  image->img = img_filtered;
}

void bilateral_filtering(Image *image, int s, float r){
  clock_t start, finish;
  double duration;
  start = clock();

  float * filter;
  float * img_filtered;
  int N;
  int M;
  int N_threads;
  float size;

  if (image->ndim==2){
    filter = (float*) malloc((2*s+1)*(2*s+1)*sizeof(float));
    img_filtered = (float*) malloc(image->dim[0]*image->dim[1]
      *sizeof(float));
    N = image->dim[0];
    M = image->dim[1];
    N_threads = 16;
    size = (float) (2*s+1);

    for (int i=0; i<2*s+1; i++){
      for (int j=0; j<2*s+1; j++){
        filter[i*(2*s+1)+j] =  exp(-((i-s)*(i-s)+(j-s)*(j-s))/ (2*size*size));
      }
    }

    float *tab_GPU;
    float *output_GPU;
    float *filter_GPU;
    // Allocate vector in device memory
    cudaMalloc(&tab_GPU, N * M * sizeof(float));
    cudaMalloc(&output_GPU, N * M * sizeof(float));
    cudaMalloc(&filter_GPU, (2*s+1) * (2*s+1) * sizeof(float));
    // Copy vectors from host memory to device memory
    cudaMemcpy(tab_GPU, image->img, N * M * sizeof(float), cudaMemcpyHostToDevice);
    cudaMemcpy(output_GPU, img_filtered, N * M * sizeof(float), cudaMemcpyHostToDevice);
    cudaMemcpy(filter_GPU, filter,  (2*s+1) * (2*s+1) *
      sizeof(float), cudaMemcpyHostToDevice);

    dim3 threadsPerBlock(N_threads, N_threads, 1);
    dim3 blocksPerGrid((int) ceil(N / (float)threadsPerBlock.x),
              (int) ceil(M / (float)threadsPerBlock.y), 1);

    conv_bil<<<blocksPerGrid,threadsPerBlock>>>(tab_GPU, N, M, image->ndim, filter_GPU, s, output_GPU, r);
    if ( cudaSuccess != cudaGetLastError() )
      printf( "Error!\n" );

    cudaMemcpy(img_filtered, output_GPU, N * M * sizeof(float),
      cudaMemcpyDeviceToHost);
    cudaFree(tab_GPU);
    cudaFree(filter_GPU);
    cudaFree(output_GPU);
  }

  if (image->ndim==3){
    filter = (float*) malloc((2*s+1)*(2*s+1)*3*sizeof(float));
    img_filtered = (float*) malloc(image->dim[0]*image->dim[1]
      *3*sizeof(float));
    N = image->dim[0];
    M = image->dim[1];
    N_threads = 16;
    size = (float) (2*s+1);

    for (int k=0; k<3; k++){
      for (int i=0; i<2*s+1; i++){
        for (int j=0; j<2*s+1; j++){
          filter[(i*(2*s+1)+j)*3+k] =  exp(-((i-s)*(i-s)+
          (j-s)*(j-s)+(k-1)*(k-1))/ (2*size*size*3));
        }
      }
    }

    float *tab_GPU;
    float *output_GPU;
    float *filter_GPU;
    // Allocate vector in device memory
    cudaMalloc(&tab_GPU, N * M * 3 *sizeof(float));
    cudaMalloc(&output_GPU, N * M * 3 *sizeof(float));
    cudaMalloc(&filter_GPU, (2*s+1) * (2*s+1) * 3 *sizeof(float));
    // Copy vectors from host memory to device memory
    cudaMemcpy(tab_GPU, image->img, N * M * 3 *sizeof(float), cudaMemcpyHostToDevice);
    cudaMemcpy(output_GPU, img_filtered, N * M * 3 *sizeof(float), cudaMemcpyHostToDevice);
    cudaMemcpy(filter_GPU, filter,  (2*s+1) * (2*s+1) * 3 *
      sizeof(float), cudaMemcpyHostToDevice);

    dim3 threadsPerBlock(N_threads, N_threads, 3);
    dim3 blocksPerGrid((int) ceil(N / (float)threadsPerBlock.x),
              (int) ceil(M / (float)threadsPerBlock.y), 1);

    conv_bil<<<blocksPerGrid,threadsPerBlock>>>(tab_GPU, N, M, image->ndim, filter_GPU, s, output_GPU, r);
    if ( cudaSuccess != cudaGetLastError() )
      printf( "Error!\n" );

    cudaMemcpy(img_filtered, output_GPU, N * M * 3 * sizeof(float),
      cudaMemcpyDeviceToHost);
    cudaFree(tab_GPU);
    cudaFree(filter_GPU);
    cudaFree(output_GPU);
  }

  finish = clock();
  duration = (double)(finish - start) / CLOCKS_PER_SEC;
  printf("%f\n",duration);
  image->img = img_filtered;
}

// TODO: case "P6"
void open_img(Image *image){
  FILE *fp;
  int height, width, max_pix;
  int c;

  fp = fopen("image_256x256.pgm", "r");
  fscanf(fp, "P%d\n", &c);
  switch (c) {
    case 2:
      fscanf(fp, "%d %d\n", &height, &width);
      fscanf(fp, "%d\n", &max_pix);

      image->ndim = 2;
      image->img = (float *) malloc(height*width*sizeof(float));
      image->dim = (int *) malloc(image->ndim*sizeof(int));
      image->dim[0] = height;
      image->dim[1] = width;
      image->max_pix = max_pix;

      for(int i=0; i<height; i++){
        for(int j=0; j<width; j++){
          fscanf(fp, "%d\n", &c);
          *(image->img+i*width+j) = (float) c;
        }
      }
      fclose(fp);
      break;
    case 6:
      fscanf(fp, "%d %d\n", &height, &width);
      fscanf(fp, "%d\n", &max_pix);

      image->ndim = 3;
      image->img = (float *) malloc(height*width*3*sizeof(float));
      image->dim = (int *) malloc(image->ndim*sizeof(int));
      image->dim[0] = height;
      image->dim[1] = width;
      image->dim[2] = 3;
      image->max_pix = max_pix;

      for(int i=0; i<height; i++){
        for(int j=0; j<width; j++){
          fscanf(fp, "%d\n", &c);
          *(image->img+i*width+j) = (float) c;
        }
      }
      fclose(fp);
  }
}

// TODO: case "P6"
void write_img(Image *image, int file_idx){
  FILE *fp;
  int height = image->dim[0];
  int width = image->dim[1];
  int max_pix = image->max_pix;

  switch (file_idx) {
    case 0:
      fp = fopen ("test_box.pgm", "w+");
      break;
    case 1:
      fp = fopen ("test_gauss.pgm", "w+");
      break;
    case 2:
      fp = fopen ("test_bil.pgm", "w+");
      break;
    default :
      fp = fopen ("test.pgm", "w+");
  }

  fprintf(fp, "P2\n%d %d\n%d\n", height, width, max_pix);

  for (int i=0; i<height; i++){
    for (int j=0; j<width; j++)
      fprintf(fp, "%d\n", (int) *(image->img+i*width+j));
  }
  fclose(fp);
}

__global__ void conv(float *tab, int N, int M, int ndim,
  float *filter, int s, float *output){
  int idx = blockIdx.x * blockDim.x + threadIdx.x;
  int idy = blockIdx.y * blockDim.y + threadIdx.y;

  if (ndim==2){
    if (idx<=N){
      if (idy<=M){
        output[idx*M+idy] = filter[s]*tab[idx*M+idy];
        float sum = filter[s];
        for (int i=1; i<s+1; i++){
          int x_big = -N*(idx+i>=N);
          int x_small = N*(idx-i<0);
          float t = (filter[(s+i)*(2*s+1)+s]);
          float b = (filter[(s-i)*(2*s+1)+s]);

          output[idx*M+idy] += (t*tab[(idx+i+x_big)*M]);
          output[idx*M+idy] += (b*tab[(idx-i+x_small)*M]);

          for (int j=1; j<s+1; j++){
            int y_big = -M*(idy+j>=M);
            int y_small = M*(idy-j<0);
            float tl = (filter[(s+i)*(2*s+1)+(s+j)]);
            float tr = (filter[(s+i)*(2*s+1)+(s-j)]);
            float bl = (filter[(s-i)*(2*s+1)+(s+j)]);
            float br = (filter[(s-i)*(2*s+1)+(s-j)]);

            output[idx*M+idy] += (tl*tab[(idx-i+x_small)*M+idy-j+y_small]);
            output[idx*M+idy] += (tr*tab[(idx-i+x_small)*M+idy+j+y_big]);
            output[idx*M+idy] += (bl*tab[(idx+i+x_big)*M+idy-j+y_small]);
            output[idx*M+idy] += (br*tab[(idx+i+x_big)*M+idy+j+y_big]);

            if (i==1) {
              float l = (filter[(s)*(2*s+1)+(s+j)]);
              float r = (filter[(s)*(2*s+1)+(s-j)]);

              output[idx*M+idy] += (l*tab[(idx)*M+idy-j+y_small]);
              output[idx*M+idy] += (r*tab[(idx)*M+idy+j+y_big]);

              sum += l+r;
            }

            sum += tl+tr+bl+br;
          }
          sum += t+b;
        }
        output[idx*M+idy] /= sum;
      }
    }
  }
  if (ndim==3){
    int idz = blockIdx.z * blockDim.z + threadIdx.z;
    if (idx<N){
      if (idy<M){
        if (idz<3){
          float sum = 0;
          output[(idx*M+idy)*3+idz] = 0;
          for (int k=0; k<3; k++){
            output[(idx*M+idy)*3+idz] += filter[s*3+k+idz+1]*tab[(idx*M+idy)*3+(k+idz)%3];
            sum += filter[s*3+k+idz+1];
            for (int i=1; i<s+1; i++){
              int x_big = -N*(idx+i>=N);
              int x_small = N*(idx-i<0);
              float t = (filter[((s+i)*(2*s+1)+s)*3+(k+idz+1)%3]);
              float b = (filter[((s-i)*(2*s+1)+s)*3+(k+idz+1)%3]);

              output[(idx*M+idy)*3+idz] += (t*tab[((idx+i+x_big)*M)*3+(k+idz)%3]);
              output[(idx*M+idy)*3+idz] += (b*tab[((idx-i+x_small)*M)*3+(k+idz)%3]);

              for (int j=1; j<s+1; j++){
                int y_big = -M*(idy+j>=M);
                int y_small = M*(idy-j<0);
                float tl = (filter[((s+i)*(2*s+1)+(s+j))*3+(k+idz+1)%3]);
                float tr = (filter[((s+i)*(2*s+1)+(s-j))*3+(k+idz+1)%3]);
                float bl = (filter[((s-i)*(2*s+1)+(s+j))*3+(k+idz+1)%3]);
                float br = (filter[((s-i)*(2*s+1)+(s-j))*3+(k+idz+1)%3]);

                output[(idx*M+idy)*3+idz] += (tl*tab[((idx-i+x_small)*M+idy-j+y_small)*3+(k+idz)%3]);
                output[(idx*M+idy)*3+idz] += (tr*tab[((idx-i+x_small)*M+idy+j+y_big)*3+(k+idz)%3]);
                output[(idx*M+idy)*3+idz] += (bl*tab[((idx+i+x_big)*M+idy-j+y_small)*3+(k+idz)%3]);
                output[(idx*M+idy)*3+idz] += (br*tab[((idx+i+x_big)*M+idy+j+y_big)*3+(k+idz)%3]);

                if (i==1) {
                  float l = (filter[((s)*(2*s+1)+(s+j))*3+(k+idz+1)%3]);
                  float r = (filter[((s)*(2*s+1)+(s-j))*3+(k+idz+1)%3]);

                  output[(idx*M+idy)*3+idz] += (l*tab[((idx)*M+idy-j+y_small)*3+(k+idz)%3]);
                  output[(idx*M+idy)*3+idz] += (r*tab[((idx)*M+idy+j+y_big)*3+(k+idz)%3]);

                  sum += l+r;
                }

                sum += tl+tr+bl+br;
              }
              sum += t+b;
            }
          }
          output[(idx*M+idy)*3+idz] /= sum;
        }
      }
    }
  }
}

__global__ void conv_bil(float *tab, int N, int M, int ndim,
  float *filter, int s, float *output, float r){
  int idx = blockIdx.x * blockDim.x + threadIdx.x;
  int idy = blockIdx.y * blockDim.y + threadIdx.y;

  if (ndim==2){
    float var = 2*r*r;

    if (idx<=N){
      if (idy<=M){
        output[idx*M+idy] = filter[s]*tab[idx*M+idy];
        float sum = filter[s];
        for (int i=1; i<s+1; i++){
          int x_big = -N*(idx+i>=N);
          int x_small = N*(idx-i<0);
          float t = (filter[(s+i)*(2*s+1)+s]
            *exp(-(tab[(idx+i+x_big)*M]-tab[idx*M+idy])
            *(tab[(idx+i+x_big)*M]-tab[idx*M+idy])/var)
          );
          float b = (filter[(s-i)*(2*s+1)+s]
            *exp(-(tab[(idx-i+x_small)*M]-tab[idx*M+idy])
            *(tab[(idx-i+x_small)*M]-tab[idx*M+idy])/var)
          );

          output[idx*M+idy] += (t*tab[(idx+i+x_big)*M]);
          output[idx*M+idy] += (b*tab[(idx-i+x_small)*M]);

          for (int j=1; j<s+1; j++){
            int y_big = -M*(idy+j>=M);
            int y_small = M*(idy-j<0);
            float tl = (filter[(s+i)*(2*s+1)+(s+j)]
              *exp(-(tab[(idx-i+x_small)*M+idy-j+y_small]-tab[idx*M+idy])
              *(tab[(idx-i+x_small)*M+idy-j+y_small]-tab[idx*M+idy])/var)
            );
            float tr = (filter[(s+i)*(2*s+1)+(s-j)]
              *exp(-(tab[(idx-i+x_small)*M+idy+j+y_big]-tab[idx*M+idy])
              *(tab[(idx-i+x_small)*M+idy+j+y_big]-tab[idx*M+idy])/var)
            );
            float bl = (filter[(s-i)*(2*s+1)+(s+j)]
              *exp(-(tab[(idx+i+x_big)*M+idy-j+y_small]-tab[idx*M+idy])
              *(tab[(idx+i+x_big)*M+idy-j+y_small]-tab[idx*M+idy])/var)
            );
            float br = (filter[(s-i)*(2*s+1)+(s-j)]
              *exp(-(tab[(idx+i+x_big)*M+idy+j+y_big]-tab[idx*M+idy])
              *(tab[(idx+i+x_big)*M+idy+j+y_big]-tab[idx*M+idy])/var)
            );

            output[idx*M+idy] += (tl*tab[(idx-i+x_small)*M+idy-j+y_small]);
            output[idx*M+idy] += (tr*tab[(idx-i+x_small)*M+idy+j+y_big]);
            output[idx*M+idy] += (bl*tab[(idx+i+x_big)*M+idy-j+y_small]);
            output[idx*M+idy] += (br*tab[(idx+i+x_big)*M+idy+j+y_big]);

            if (i==1) {
              float l = (filter[(s)*(2*s+1)+(s+j)]
                *exp(-(tab[(idx)*M+idy-j+y_small]-tab[idx*M+idy])
                *(tab[(idx)*M+idy-j+y_small]-tab[idx*M+idy])/var)
              );
              float r = (filter[(s)*(2*s+1)+(s-j)]
                *exp(-(tab[(idx)*M+idy+j+y_big]-tab[idx*M+idy])
                *(tab[(idx)*M+idy+j+y_big]-tab[idx*M+idy])/var)
              );

              output[idx*M+idy] += (l*tab[(idx)*M+idy-j+y_small]);
              output[idx*M+idy] += (r*tab[(idx)*M+idy+j+y_big]);

              sum += l+r;
            }

            sum += tl+tr+bl+br;
          }
          sum += t+b;
        }
        output[idx*M+idy] /= sum;
      }
    }
  }

  if (ndim==3){
    int idz = blockIdx.z * blockDim.z + threadIdx.z;
    float var = 2*r*r*3;

    if (idx<=N){
      if (idy<=M){
        if (idz<3){
          output[(idx*M+idy)*3+idz] = 0;
          float sum = 0;
          for (int k=0; k<3; k++){
            output[(idx*M+idy)*3+idz] += filter[s*3+k+idz+1]*tab[(idx*M+idy)*3+(k+idz)%3];
            sum += filter[s];
            for (int i=1; i<s+1; i++){
              int x_big = -N*(idx+i>=N);
              int x_small = N*(idx-i<0);
              float t = (filter[((s+i)*(2*s+1)+s)*3+k+idz+1]
                *exp(-(tab[((idx+i+x_big)*M)*3+(k+idz)%3]-tab[(idx*M+idy)*3+(k+idz)%3])
                *(tab[((idx+i+x_big)*M)*3+(k+idz)%3]-tab[(idx*M+idy)*3+(k+idz)%3])/var)
              );
              float b = (filter[((s-i)*(2*s+1)+s)*3+k+idz+1]
                *exp(-(tab[((idx-i+x_small)*M)*3+(k+idz)%3]-tab[(idx*M+idy)*3+(k+idz)%3])
                *(tab[((idx-i+x_small)*M)*3+(k+idz)%3]-tab[(idx*M+idy)*3+(k+idz)%3])/var)
              );

              output[(idx*M+idy)*3+idz] += (t*tab[((idx+i+x_big)*M)*3+(k+idz)%3]);
              output[(idx*M+idy)*3+idz] += (b*tab[((idx-i+x_small)*M)*3+(k+idz)%3]);

              for (int j=1; j<s+1; j++){
                int y_big = -M*(idy+j>=M);
                int y_small = M*(idy-j<0);
                float tl = (filter[((s+i)*(2*s+1)+(s+j))*3+k+idz+1]
                  *exp(-(tab[((idx-i+x_small)*M+idy-j+y_small)*3+(k+idz)%3]-tab[(idx*M+idy)*3+(k+idz)%3])
                  *(tab[((idx-i+x_small)*M+idy-j+y_small)*3+(k+idz)%3]-tab[(idx*M+idy)*3+(k+idz)%3])/var)
                );
                float tr = (filter[((s+i)*(2*s+1)+(s-j))*3+k+idz+1]
                  *exp(-(tab[((idx-i+x_small)*M+idy+j+y_big)*3+(k+idz)%3]-tab[(idx*M+idy)*3+(k+idz)%3])
                  *(tab[((idx-i+x_small)*M+idy+j+y_big)*3+(k+idz)%3]-tab[(idx*M+idy)*3+(k+idz)%3])/var)
                );
                float bl = (filter[((s-i)*(2*s+1)+(s+j))*3+k+idz+1]
                  *exp(-(tab[((idx+i+x_big)*M+idy-j+y_small)*3+(k+idz)%3]-tab[(idx*M+idy)*3+(k+idz)%3])
                  *(tab[((idx+i+x_big)*M+idy-j+y_small)*3+(k+idz)%3]-tab[(idx*M+idy)*3+(k+idz)%3])/var)
                );
                float br = (filter[((s-i)*(2*s+1)+(s-j))*3+k+idz+1]
                  *exp(-(tab[((idx+i+x_big)*M+idy+j+y_big)*3+(k+idz)%3]-tab[(idx*M+idy)*3+(k+idz)%3])
                  *(tab[((idx+i+x_big)*M+idy+j+y_big)*3+(k+idz)%3]-tab[(idx*M+idy)]*3+(k+idz)%3)/var)
                );

                output[(idx*M+idy)*3+idz] += (tl*tab[((idx-i+x_small)*M+idy-j+y_small)*3+(k+idz)%3]);
                output[(idx*M+idy)*3+idz] += (tr*tab[((idx-i+x_small)*M+idy+j+y_big)*3+(k+idz)%3]);
                output[(idx*M+idy)*3+idz] += (bl*tab[((idx+i+x_big)*M+idy-j+y_small)*3+(k+idz)%3]);
                output[(idx*M+idy)*3+idz] += (br*tab[((idx+i+x_big)*M+idy+j+y_big)*3+(k+idz)%3]);

                if (i==1) {
                  float l = (filter[((s)*(2*s+1)+(s+j))*3+k+idz+1]
                    *exp(-(tab[((idx)*M+idy-j+y_small)*3+(k+idz)%3]-tab[(idx*M+idy)*3+(k+idz)%3])
                    *(tab[((idx)*M+idy-j+y_small)*3+(k+idz)%3]-tab[(idx*M+idy)*3+(k+idz)%3])/var)
                  );
                  float r = (filter[((s)*(2*s+1)+(s-j))*3+k+idz+1]
                    *exp(-(tab[((idx)*M+idy+j+y_big)*3+(k+idz)%3]-tab[(idx*M+idy)*3+(k+idz)%3])
                    *(tab[((idx)*M+idy+j+y_big)*3+(k+idz)%3]-tab[(idx*M+idy)*3+(k+idz)%3])/var)
                  );

                  output[(idx*M+idy)*3+idz] += (l*tab[((idx)*M+idy-j+y_small)*3+(k+idz)%3]);
                  output[(idx*M+idy)*3+idz] += (r*tab[((idx)*M+idy+j+y_big)*3+(k+idz)%3]);

                  sum += l+r;
                }
                sum += tl+tr+bl+br;
              }
              sum += t+b;
            }
          }
          output[(idx*M+idy)*3+idz] /= sum;
        }
      }
    }
  }
}

void box_filter(float *filter, int size, int ndim) {
  if (ndim==2){
    for (int i=0; i<2*size+1; i++){
      for (int j=0; j<2*size+1; j++){
        filter[i*(2*size+1)+j] = 1;
      }
    }
  }
  if (ndim==3){
    for (int i=0; i<2*size+1; i++){
      for (int j=0; j<2*size+1; j++){
        for (int k=0; k<3; k++){
          filter[(i*(2*size+1)+j)*3+k] = 1;
        }
      }
    }
  }
}

void gaussian_filter(float *filter, int size, int ndim) {
  float s = (float) (2*size+1);
  if (ndim==2){
    for (int i=0; i<2*size+1; i++){
      for (int j=0; j<2*size+1; j++){
        filter[i*(2*size+1)+j] =  exp(-((i-size)*(i-size)+(j-size)*(j-size))/ (2*s*s));
      }
    }
  }
  if (ndim==3){
    for (int i=0; i<2*size+1; i++){
      for (int j=0; j<2*size+1; j++){
        for (int k=0; k<3; k++){
          float norm = (i-size)*(i-size)+(j-size)*(j-size)+(k-1)*(k-1);
          filter[(i*(2*size+1)+j)*3+k] =  exp(-norm/(2*s*s*3));
        }
      }
    }
  }
}

void conv_GPU(float *tab, int ndim, int *dim, float *filter,
  int s, float *tab_filtered, int N_threads) {
  clock_t start, finish;
  double duration;
  start = clock();

  int dim_dot = 1;
  for (int i=0; i<ndim; i++){
    dim_dot*=dim[i];
  }

  if (ndim==2){
    float *tab_GPU;
    float *output_GPU;
    float *filter_GPU;
    // Allocate vector in device memory
    cudaMalloc(&tab_GPU, dim_dot*sizeof(float));
    cudaMalloc(&output_GPU, dim_dot*sizeof(float));
    cudaMalloc(&filter_GPU, (2*s+1) * (2*s+1) * sizeof(float));
    // Copy vectors from host memory to device memory
    cudaMemcpy(tab_GPU, tab, dim_dot*sizeof(float), cudaMemcpyHostToDevice);
    cudaMemcpy(output_GPU, tab, dim_dot*sizeof(float), cudaMemcpyHostToDevice);
    cudaMemcpy(filter_GPU, filter,  (2*s+1) * (2*s+1) *
      sizeof(float), cudaMemcpyHostToDevice);

    dim3 threadsPerBlock(N_threads, N_threads, 1);
    dim3 blocksPerGrid((int) ceil(dim[0] / (float)threadsPerBlock.x),
              (int) ceil(dim[1] / (float)threadsPerBlock.y), 1);

    conv<<<blocksPerGrid,threadsPerBlock>>>(tab_GPU, dim[0], dim[1], ndim, filter_GPU, s, output_GPU);

    cudaMemcpy(tab_filtered, output_GPU, dim_dot*sizeof(float),
      cudaMemcpyDeviceToHost);
    cudaFree(tab_GPU);
    cudaFree(filter_GPU);
    cudaFree(output_GPU);
  }
  if (ndim==3){
    float *tab_GPU;
    float *output_GPU;
    float *filter_GPU;
    // Allocate vector in device memory
    cudaMalloc(&tab_GPU, dim_dot*sizeof(float));
    cudaMalloc(&output_GPU, dim_dot*sizeof(float));
    cudaMalloc(&filter_GPU, (2*s+1) * (2*s+1) * 3 * sizeof(float));
    // Copy vectors from host memory to device memory
    cudaMemcpy(tab_GPU, tab, dim_dot*sizeof(float), cudaMemcpyHostToDevice);
    cudaMemcpy(output_GPU, tab, dim_dot*sizeof(float), cudaMemcpyHostToDevice);
    cudaMemcpy(filter_GPU, filter,  (2*s+1) * (2*s+1) * 3 *
      sizeof(float), cudaMemcpyHostToDevice);

    dim3 threadsPerBlock(N_threads, N_threads, 3);
    dim3 blocksPerGrid((int) ceil(dim[0] / (float)threadsPerBlock.x),
              (int) ceil(dim[1] / (float)threadsPerBlock.y), 1);

    conv<<<blocksPerGrid,threadsPerBlock>>>(tab_GPU, dim[0], dim[1], ndim, filter_GPU, s, output_GPU);

    cudaMemcpy(tab_filtered, output_GPU, dim_dot*sizeof(float),
      cudaMemcpyDeviceToHost);
    cudaFree(tab_GPU);
    cudaFree(filter_GPU);
    cudaFree(output_GPU);
  }

  finish = clock();
  duration = (double)(finish - start) / CLOCKS_PER_SEC;
  printf("%f",duration);
}

	.file	"tmpxft_002dbed6_00000000-6_image.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2038:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2038:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.type	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0, @function
_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0:
.LFB2183:
	.cfi_startproc
	jmp	cudaMalloc@PLT
	.cfi_endproc
.LFE2183:
	.size	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0, .-_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"r"
.LC1:
	.string	"image_256x256.pgm"
.LC2:
	.string	"P%d\n"
.LC3:
	.string	"%d %d\n"
.LC4:
	.string	"%d\n"
	.text
	.globl	_Z8open_imgP5Image
	.type	_Z8open_imgP5Image, @function
_Z8open_imgP5Image:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leaq	.LC0(%rip), %rsi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdi, %rbx
	leaq	.LC1(%rip), %rdi
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	leaq	20(%rsp), %r12
	call	fopen@PLT
	movq	%r12, %rdx
	leaq	.LC2(%rip), %rsi
	movq	%rax, %rdi
	movq	%rax, %rbp
	xorl	%eax, %eax
	call	__isoc23_fscanf@PLT
	movl	20(%rsp), %eax
	cmpl	$2, %eax
	je	.L4
	cmpl	$6, %eax
	jne	.L3
	leaq	12(%rsp), %rcx
	leaq	8(%rsp), %rdx
	movq	%rbp, %rdi
	xorl	%eax, %eax
	leaq	.LC3(%rip), %rsi
	leaq	.LC4(%rip), %r13
	call	__isoc23_fscanf@PLT
	leaq	16(%rsp), %rdx
	movq	%r13, %rsi
	movq	%rbp, %rdi
	xorl	%eax, %eax
	call	__isoc23_fscanf@PLT
	movl	8(%rsp), %r15d
	movl	12(%rsp), %r14d
	movl	$3, 8(%rbx)
	movl	%r15d, %edi
	imull	%r14d, %edi
	leal	(%rdi,%rdi,2), %edi
	movslq	%edi, %rdi
	salq	$2, %rdi
	call	malloc@PLT
	movl	$12, %edi
	movq	%rax, (%rbx)
	call	malloc@PLT
	movl	%r14d, 4(%rax)
	xorl	%r14d, %r14d
	movq	%rax, 16(%rbx)
	movl	%r15d, (%rax)
	movl	$3, 8(%rax)
	movl	16(%rsp), %eax
	movl	%eax, 24(%rbx)
	jmp	.L10
.L4:
	leaq	12(%rsp), %rcx
	leaq	8(%rsp), %rdx
	movq	%rbp, %rdi
	xorl	%eax, %eax
	leaq	.LC3(%rip), %rsi
	leaq	.LC4(%rip), %r13
	call	__isoc23_fscanf@PLT
	leaq	16(%rsp), %rdx
	movq	%r13, %rsi
	movq	%rbp, %rdi
	xorl	%eax, %eax
	call	__isoc23_fscanf@PLT
	movl	8(%rsp), %r15d
	movl	12(%rsp), %r14d
	movl	$2, 8(%rbx)
	movl	%r15d, %edi
	imull	%r14d, %edi
	movslq	%edi, %rdi
	salq	$2, %rdi
	call	malloc@PLT
	movl	$8, %edi
	movq	%rax, (%rbx)
	call	malloc@PLT
	movl	%r14d, 4(%rax)
	xorl	%r14d, %r14d
	movq	%rax, 16(%rbx)
	movl	%r15d, (%rax)
	movl	16(%rsp), %eax
	movl	%eax, 24(%rbx)
.L7:
	cmpl	%r14d, 8(%rsp)
	jle	.L17
	xorl	%r15d, %r15d
.L9:
	cmpl	%r15d, 12(%rsp)
	jle	.L19
	movq	%r12, %rdx
	movq	%r13, %rsi
	movq	%rbp, %rdi
	xorl	%eax, %eax
	call	__isoc23_fscanf@PLT
	movl	12(%rsp), %eax
	cvtsi2ssl	20(%rsp), %xmm0
	movq	(%rbx), %rdx
	imull	%r14d, %eax
	cltq
	addq	%r15, %rax
	incq	%r15
	movss	%xmm0, (%rdx,%rax,4)
	jmp	.L9
.L19:
	incl	%r14d
	jmp	.L7
.L20:
	incl	%r14d
.L10:
	cmpl	%r14d, 8(%rsp)
	jle	.L17
	xorl	%r15d, %r15d
.L12:
	cmpl	%r15d, 12(%rsp)
	jle	.L20
	movq	%r12, %rdx
	movq	%r13, %rsi
	movq	%rbp, %rdi
	xorl	%eax, %eax
	call	__isoc23_fscanf@PLT
	movl	12(%rsp), %eax
	cvtsi2ssl	20(%rsp), %xmm0
	movq	(%rbx), %rdx
	imull	%r14d, %eax
	cltq
	addq	%r15, %rax
	incq	%r15
	movss	%xmm0, (%rdx,%rax,4)
	jmp	.L12
.L17:
	movq	%rbp, %rdi
	call	fclose@PLT
.L3:
	movq	24(%rsp), %rax
	subq	%fs:40, %rax
	je	.L13
	call	__stack_chk_fail@PLT
.L13:
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2031:
	.size	_Z8open_imgP5Image, .-_Z8open_imgP5Image
	.section	.rodata.str1.1
.LC5:
	.string	"w+"
.LC6:
	.string	"test_box.pgm"
.LC7:
	.string	"test_gauss.pgm"
.LC8:
	.string	"test_bil.pgm"
.LC9:
	.string	"test.pgm"
.LC10:
	.string	"P2\n%d %d\n%d\n"
	.text
	.globl	_Z9write_imgP5Imagei
	.type	_Z9write_imgP5Imagei, @function
_Z9write_imgP5Imagei:
.LFB2032:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	%esi, %edx
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	movq	16(%rdi), %rax
	decl	%esi
	movl	24(%rdi), %ebp
	leaq	.LC5(%rip), %rsi
	leaq	.LC7(%rip), %rdi
	movl	(%rax), %r14d
	movl	4(%rax), %r13d
	je	.L31
	leaq	.LC8(%rip), %rdi
	cmpl	$2, %edx
	je	.L31
	leaq	.LC6(%rip), %rdi
	testl	%edx, %edx
	je	.L31
	leaq	.LC9(%rip), %rdi
.L31:
	call	fopen@PLT
	movl	%ebp, %r9d
	movl	%r13d, %r8d
	movl	%r14d, %ecx
	movq	%rax, %rdi
	movq	%rax, %rbx
	movl	$2, %esi
	xorl	%eax, %eax
	leaq	.LC10(%rip), %rdx
	call	__fprintf_chk@PLT
	xorl	%r9d, %r9d
	xorl	%r10d, %r10d
.L26:
	cmpl	%r14d, %r10d
	jge	.L28
	movslq	%r9d, %rbp
	xorl	%r15d, %r15d
	salq	$2, %rbp
.L29:
	cmpl	%r13d, %r15d
	jge	.L32
	movq	(%r12), %rax
	movl	$2, %esi
	movq	%rbx, %rdi
	incl	%r15d
	leaq	.LC4(%rip), %rdx
	movl	%r9d, 12(%rsp)
	cvttss2sil	(%rax,%rbp), %ecx
	xorl	%eax, %eax
	movl	%r10d, 8(%rsp)
	addq	$4, %rbp
	call	__fprintf_chk@PLT
	movl	12(%rsp), %r9d
	movl	8(%rsp), %r10d
	jmp	.L29
.L32:
	incl	%r10d
	addl	%r13d, %r9d
	jmp	.L26
.L28:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	movq	%rbx, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	fclose@PLT
	.cfi_endproc
.LFE2032:
	.size	_Z9write_imgP5Imagei, .-_Z9write_imgP5Imagei
	.globl	_Z10box_filterPfii
	.type	_Z10box_filterPfii, @function
_Z10box_filterPfii:
.LFB2033:
	.cfi_startproc
	endbr64
	cmpl	$2, %edx
	je	.L34
	cmpl	$3, %edx
	je	.L35
	ret
.L34:
	addl	%esi, %esi
	movss	.LC11(%rip), %xmm0
	xorl	%edx, %edx
	movslq	%esi, %rax
	leaq	4(,%rax,4), %rcx
.L37:
	cmpl	%edx, %esi
	jl	.L45
	xorl	%eax, %eax
.L38:
	movss	%xmm0, (%rdi,%rax,4)
	incq	%rax
	cmpl	%eax, %esi
	jge	.L38
	incl	%edx
	addq	%rcx, %rdi
	jmp	.L37
.L45:
	ret
.L35:
	addl	%esi, %esi
	movss	.LC11(%rip), %xmm0
	xorl	%ecx, %ecx
	leal	1(%rsi), %eax
	leal	(%rax,%rax,2), %eax
	cltq
	salq	$2, %rax
.L39:
	cmpl	%ecx, %esi
	jl	.L46
	movq	%rdi, %rdx
	xorl	%r8d, %r8d
.L40:
	incl	%r8d
	movss	%xmm0, (%rdx)
	addq	$12, %rdx
	movss	%xmm0, -8(%rdx)
	movss	%xmm0, -4(%rdx)
	cmpl	%r8d, %esi
	jge	.L40
	incl	%ecx
	addq	%rax, %rdi
	jmp	.L39
.L46:
	ret
	.cfi_endproc
.LFE2033:
	.size	_Z10box_filterPfii, .-_Z10box_filterPfii
	.globl	_Z15gaussian_filterPfii
	.type	_Z15gaussian_filterPfii, @function
_Z15gaussian_filterPfii:
.LFB2034:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	leal	(%rsi,%rsi), %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	leal	1(%r13), %eax
	movl	%esi, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	cvtsi2ssl	%eax, %xmm1
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdi, %rbx
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	cmpl	$2, %edx
	jne	.L48
	cltq
	movl	%esi, %r14d
	salq	$2, %rax
	negl	%r14d
	movq	%rax, 16(%rsp)
	jmp	.L49
.L48:
	cmpl	$3, %edx
	jne	.L47
	cltq
	imulq	$12, %rax, %rbp
	movl	%esi, %eax
	negl	%eax
	movl	%eax, 12(%rsp)
	movl	%eax, %ecx
	jmp	.L51
.L52:
	movl	%r15d, %eax
	movss	%xmm1, 24(%rsp)
	subl	%r12d, %eax
	imull	%eax, %eax
	addl	%ebp, %eax
	negl	%eax
	cvtsi2ssl	%eax, %xmm0
	divss	12(%rsp), %xmm0
	call	expf@PLT
	movss	24(%rsp), %xmm1
	movss	%xmm0, (%rbx,%r15,4)
	incq	%r15
	cmpl	%r15d, %r13d
	jge	.L52
	movq	16(%rsp), %rax
	incl	%r14d
	addq	%rax, %rbx
.L49:
	leal	(%r14,%r12), %eax
	cmpl	%eax, %r13d
	jl	.L47
	movaps	%xmm1, %xmm0
	movl	%r14d, %ebp
	xorl	%r15d, %r15d
	imull	%r14d, %ebp
	addss	%xmm1, %xmm0
	mulss	%xmm1, %xmm0
	movss	%xmm0, 12(%rsp)
	jmp	.L52
.L56:
	movl	%r15d, %r14d
	imull	%r15d, %r14d
	leal	(%r14,%r8), %eax
	xorl	%r14d, %r14d
	movl	%eax, 16(%rsp)
.L54:
	leal	-1(%r14), %eax
	movl	16(%rsp), %esi
	movq	%rdi, 40(%rsp)
	imull	%eax, %eax
	movl	%ecx, 36(%rsp)
	movl	%r8d, 28(%rsp)
	movss	%xmm1, 32(%rsp)
	addl	%esi, %eax
	cvtsi2ssl	%eax, %xmm0
	xorps	.LC12(%rip), %xmm0
	divss	24(%rsp), %xmm0
	call	expf@PLT
	movq	40(%rsp), %rdi
	movl	28(%rsp), %r8d
	movss	32(%rsp), %xmm1
	movl	36(%rsp), %ecx
	movss	%xmm0, (%rdi,%r14,4)
	incq	%r14
	cmpq	$3, %r14
	jne	.L54
	incl	%r15d
	addq	$12, %rdi
	leal	(%r12,%r15), %eax
	cmpl	%eax, %r13d
	jge	.L56
	addq	%rbp, %rbx
	incl	%ecx
.L51:
	leal	(%r12,%rcx), %eax
	cmpl	%eax, %r13d
	jl	.L47
	movaps	%xmm1, %xmm0
	movl	%ecx, %r8d
	movl	12(%rsp), %r15d
	movq	%rbx, %rdi
	imull	%ecx, %r8d
	addss	%xmm1, %xmm0
	mulss	%xmm1, %xmm0
	mulss	.LC13(%rip), %xmm0
	movss	%xmm0, 24(%rsp)
	jmp	.L56
.L47:
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2034:
	.size	_Z15gaussian_filterPfii, .-_Z15gaussian_filterPfii
	.globl	_Z31__device_stub__Z4convPfiiiS_iS_PfiiiS_iS_
	.type	_Z31__device_stub__Z4convPfiiiS_iS_PfiiiS_iS_, @function
_Z31__device_stub__Z4convPfiiiS_iS_PfiiiS_iS_:
.LFB2060:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	192(%rsp), %rax
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movl	%esi, 36(%rsp)
	leaq	76(%rsp), %rsi
	movl	%edx, 32(%rsp)
	leaq	48(%rsp), %rdx
	movl	%ecx, 28(%rsp)
	leaq	56(%rsp), %rcx
	movq	%r8, 16(%rsp)
	movl	%r9d, 24(%rsp)
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	36(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	28(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L60
	pushq	56(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z4convPfiiiS_iS_(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 208
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L60:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L62
	call	__stack_chk_fail@PLT
.L62:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2060:
	.size	_Z31__device_stub__Z4convPfiiiS_iS_PfiiiS_iS_, .-_Z31__device_stub__Z4convPfiiiS_iS_PfiiiS_iS_
	.globl	_Z4convPfiiiS_iS_
	.type	_Z4convPfiiiS_iS_, @function
_Z4convPfiiiS_iS_:
.LFB2061:
	.cfi_startproc
	endbr64
	jmp	_Z31__device_stub__Z4convPfiiiS_iS_PfiiiS_iS_
	.cfi_endproc
.LFE2061:
	.size	_Z4convPfiiiS_iS_, .-_Z4convPfiiiS_iS_
	.section	.rodata.str1.1
.LC15:
	.string	"%f"
	.text
	.globl	_Z8conv_GPUPfiPiS_iS_i
	.type	_Z8conv_GPUPfiPiS_iS_i, @function
_Z8conv_GPUPfiPiS_iS_i:
.LFB2035:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rcx, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rdi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%r8d, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdx, %rbx
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	movl	%esi, 8(%rsp)
	movl	160(%rsp), %r12d
	movq	%r9, 24(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	call	clock@PLT
	movl	8(%rsp), %esi
	xorl	%edx, %edx
	movq	%rax, %r15
	movl	$1, %eax
.L66:
	cmpl	%edx, %esi
	jle	.L80
	imull	(%rbx,%rdx,4), %eax
	incq	%rdx
	jmp	.L66
.L80:
	cmpl	$2, %esi
	jne	.L68
	cltq
	leaq	40(%rsp), %rdi
	salq	$2, %rax
	movq	%rax, %rsi
	movq	%rax, 8(%rsp)
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	movq	8(%rsp), %rsi
	leaq	48(%rsp), %rdi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	leal	1(%rbp,%rbp), %eax
	leaq	56(%rsp), %rdi
	imull	%eax, %eax
	cltq
	salq	$2, %rax
	movq	%rax, %rsi
	movq	%rax, 16(%rsp)
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	movq	8(%rsp), %rdx
	movq	40(%rsp), %rdi
	movq	%r13, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdx
	movq	48(%rsp), %rdi
	movq	%r13, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdx
	movq	56(%rsp), %rdi
	movq	%r14, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	%r12d, %eax
	cvtsi2ssl	4(%rbx), %xmm0
	movl	$1, 72(%rsp)
	cvtsi2ssq	%rax, %xmm1
	divss	%xmm1, %xmm0
	movss	%xmm1, 16(%rsp)
	call	ceilf@PLT
	movss	16(%rsp), %xmm1
	movd	%xmm0, %r13d
	cvtsi2ssl	(%rbx), %xmm0
	divss	%xmm1, %xmm0
	call	ceilf@PLT
	movd	%r13d, %xmm2
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	cvttss2sil	%xmm0, %eax
	movl	%r12d, 64(%rsp)
	movl	$1, %ecx
	movl	$1, %esi
	movl	%r12d, 68(%rsp)
	movq	64(%rsp), %rdx
	movl	$1, 84(%rsp)
	movl	%eax, 76(%rsp)
	cvttss2sil	%xmm2, %eax
	movl	%eax, 80(%rsp)
	movq	76(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L75
	movl	4(%rbx), %edx
	movl	%ebp, %r9d
	pushq	%rsi
	.cfi_remember_state
	.cfi_def_cfa_offset 168
	movl	$2, %ecx
	pushq	56(%rsp)
	.cfi_def_cfa_offset 176
	movq	72(%rsp), %r8
	jmp	.L79
.L68:
	.cfi_restore_state
	cmpl	$3, %esi
	jne	.L72
	cltq
	leaq	40(%rsp), %rdi
	salq	$2, %rax
	movq	%rax, %rsi
	movq	%rax, 8(%rsp)
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	movq	8(%rsp), %rsi
	leaq	48(%rsp), %rdi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	leal	1(%rbp,%rbp), %eax
	leaq	56(%rsp), %rdi
	imull	%eax, %eax
	leal	(%rax,%rax,2), %eax
	cltq
	salq	$2, %rax
	movq	%rax, %rsi
	movq	%rax, 16(%rsp)
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	movq	8(%rsp), %rdx
	movq	40(%rsp), %rdi
	movq	%r13, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdx
	movq	48(%rsp), %rdi
	movq	%r13, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdx
	movq	56(%rsp), %rdi
	movq	%r14, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	%r12d, %eax
	cvtsi2ssl	4(%rbx), %xmm0
	movl	$3, 72(%rsp)
	cvtsi2ssq	%rax, %xmm1
	divss	%xmm1, %xmm0
	movss	%xmm1, 16(%rsp)
	call	ceilf@PLT
	movss	16(%rsp), %xmm1
	movd	%xmm0, %r13d
	cvtsi2ssl	(%rbx), %xmm0
	divss	%xmm1, %xmm0
	call	ceilf@PLT
	movd	%r13d, %xmm3
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	cvttss2sil	%xmm0, %eax
	movl	%r12d, 64(%rsp)
	movl	$3, %ecx
	movl	$1, %esi
	movl	%r12d, 68(%rsp)
	movq	64(%rsp), %rdx
	movl	$1, 84(%rsp)
	movl	%eax, 76(%rsp)
	cvttss2sil	%xmm3, %eax
	movl	%eax, 80(%rsp)
	movq	76(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L75
	movl	4(%rbx), %edx
	pushq	%rcx
	.cfi_def_cfa_offset 168
	movl	%ebp, %r9d
	movl	$3, %ecx
	pushq	56(%rsp)
	.cfi_def_cfa_offset 176
	movq	72(%rsp), %r8
.L79:
	movq	56(%rsp), %rdi
	movl	(%rbx), %esi
	call	_Z31__device_stub__Z4convPfiiiS_iS_PfiiiS_iS_
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L75:
	movq	8(%rsp), %rdx
	movq	48(%rsp), %rsi
	movl	$2, %ecx
	movq	24(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
.L72:
	call	clock@PLT
	movq	88(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L76
	call	__stack_chk_fail@PLT
.L76:
	subq	%r15, %rax
	leaq	.LC15(%rip), %rsi
	movl	$2, %edi
	cvtsi2sdq	%rax, %xmm0
	divsd	.LC14(%rip), %xmm0
	movb	$1, %al
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	__printf_chk@PLT
	.cfi_endproc
.LFE2035:
	.size	_Z8conv_GPUPfiPiS_iS_i, .-_Z8conv_GPUPfiPiS_iS_i
	.section	.rodata.str1.1
.LC16:
	.string	"\n"
	.text
	.globl	_Z13box_filteringP5Imagei
	.type	_Z13box_filteringP5Imagei, @function
_Z13box_filteringP5Imagei:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	xorl	%eax, %eax
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movq	%rdi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movl	%esi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movl	8(%rdi), %r12d
	movl	$1, %ebx
.L82:
	cmpl	%eax, %r12d
	jle	.L88
	movq	16(%r13), %rdx
	imull	(%rdx,%rax,4), %ebx
	incq	%rax
	jmp	.L82
.L88:
	cmpl	$2, %r12d
	jne	.L84
	leal	1(%rbp,%rbp), %edi
	imull	%edi, %edi
	jmp	.L87
.L84:
	cmpl	$3, %r12d
	jne	.L85
	leal	1(%rbp,%rbp), %edi
	imull	%edi, %edi
	leal	(%rdi,%rdi,2), %edi
.L87:
	movslq	%edi, %rdi
	salq	$2, %rdi
	call	malloc@PLT
	movq	%rax, %r14
.L85:
	movslq	%ebx, %rdi
	salq	$2, %rdi
	call	malloc@PLT
	movl	%r12d, %edx
	movl	%ebp, %esi
	movq	%r14, %rdi
	movq	%rax, %rbx
	call	_Z10box_filterPfii
	movq	16(%r13), %rdx
	movq	%rbx, %r9
	movl	%ebp, %r8d
	pushq	%rax
	.cfi_def_cfa_offset 56
	movq	0(%r13), %rdi
	movq	%r14, %rcx
	movl	%r12d, %esi
	pushq	$16
	.cfi_def_cfa_offset 64
	call	_Z8conv_GPUPfiPiS_iS_i
	popq	%rdx
	.cfi_def_cfa_offset 56
	leaq	.LC16(%rip), %rsi
	popq	%rcx
	.cfi_def_cfa_offset 48
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%rbx, 0(%r13)
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z13box_filteringP5Imagei, .-_Z13box_filteringP5Imagei
	.globl	_Z18gaussian_filteringP5Imagei
	.type	_Z18gaussian_filteringP5Imagei, @function
_Z18gaussian_filteringP5Imagei:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	xorl	%eax, %eax
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movq	%rdi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movl	%esi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movl	8(%rdi), %r12d
	movl	$1, %ebx
.L90:
	cmpl	%eax, %r12d
	jle	.L96
	movq	16(%r13), %rdx
	imull	(%rdx,%rax,4), %ebx
	incq	%rax
	jmp	.L90
.L96:
	cmpl	$2, %r12d
	jne	.L92
	leal	1(%rbp,%rbp), %edi
	imull	%edi, %edi
	jmp	.L95
.L92:
	cmpl	$3, %r12d
	jne	.L93
	leal	1(%rbp,%rbp), %edi
	imull	%edi, %edi
	leal	(%rdi,%rdi,2), %edi
.L95:
	movslq	%edi, %rdi
	salq	$2, %rdi
	call	malloc@PLT
	movq	%rax, %r14
.L93:
	movslq	%ebx, %rdi
	salq	$2, %rdi
	call	malloc@PLT
	movl	%r12d, %edx
	movl	%ebp, %esi
	movq	%r14, %rdi
	movq	%rax, %rbx
	call	_Z15gaussian_filterPfii
	movq	16(%r13), %rdx
	movq	%rbx, %r9
	movl	%ebp, %r8d
	pushq	%rax
	.cfi_def_cfa_offset 56
	movq	0(%r13), %rdi
	movq	%r14, %rcx
	movl	%r12d, %esi
	pushq	$16
	.cfi_def_cfa_offset 64
	call	_Z8conv_GPUPfiPiS_iS_i
	popq	%rdx
	.cfi_def_cfa_offset 56
	leaq	.LC16(%rip), %rsi
	popq	%rcx
	.cfi_def_cfa_offset 48
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%rbx, 0(%r13)
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z18gaussian_filteringP5Imagei, .-_Z18gaussian_filteringP5Imagei
	.globl	_Z36__device_stub__Z8conv_bilPfiiiS_iS_fPfiiiS_iS_f
	.type	_Z36__device_stub__Z8conv_bilPfiiiS_iS_fPfiiiS_iS_f, @function
_Z36__device_stub__Z8conv_bilPfiiiS_iS_fPfiiiS_iS_f:
.LFB2062:
	.cfi_startproc
	endbr64
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movq	208(%rsp), %rax
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movl	%esi, 36(%rsp)
	leaq	84(%rsp), %rsi
	movl	%edx, 32(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 28(%rsp)
	leaq	64(%rsp), %rcx
	movq	%r8, 16(%rsp)
	movl	%r9d, 24(%rsp)
	movq	%rax, 8(%rsp)
	movss	%xmm0, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	36(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	28(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L97
	pushq	64(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_Z8conv_bilPfiiiS_iS_f(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 224
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L97:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L99
	call	__stack_chk_fail@PLT
.L99:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2062:
	.size	_Z36__device_stub__Z8conv_bilPfiiiS_iS_fPfiiiS_iS_f, .-_Z36__device_stub__Z8conv_bilPfiiiS_iS_fPfiiiS_iS_f
	.globl	_Z8conv_bilPfiiiS_iS_f
	.type	_Z8conv_bilPfiiiS_iS_f, @function
_Z8conv_bilPfiiiS_iS_f:
.LFB2063:
	.cfi_startproc
	endbr64
	jmp	_Z36__device_stub__Z8conv_bilPfiiiS_iS_fPfiiiS_iS_f
	.cfi_endproc
.LFE2063:
	.size	_Z8conv_bilPfiiiS_iS_f, .-_Z8conv_bilPfiiiS_iS_f
	.section	.rodata.str1.1
.LC18:
	.string	"Error!\n"
.LC19:
	.string	"%f\n"
	.text
	.globl	_Z19bilateral_filteringP5Imageif
	.type	_Z19bilateral_filteringP5Imageif, @function
_Z19bilateral_filteringP5Imageif:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%esi, %ebx
	subq	$184, %rsp
	.cfi_def_cfa_offset 240
	movss	%xmm0, 36(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	call	clock@PLT
	cmpl	$2, 8(%rbp)
	movq	%rax, 40(%rsp)
	jne	.L103
	leal	(%rbx,%rbx), %r15d
	leal	1(%r15), %r12d
	movl	%r12d, %eax
	imull	%r12d, %eax
	cltq
	salq	$2, %rax
	movq	%rax, %rdi
	movq	%rax, 16(%rsp)
	call	malloc@PLT
	movq	16(%rbp), %r14
	movq	%rax, 24(%rsp)
	movl	(%r14), %edi
	imull	4(%r14), %edi
	movslq	%edi, %rdi
	salq	$2, %rdi
	call	malloc@PLT
	cvtsi2ssl	%r12d, %xmm1
	movslq	%r12d, %r12
	movl	(%r14), %r13d
	movq	24(%rsp), %rsi
	movl	4(%r14), %r14d
	movq	%rax, 8(%rsp)
	leaq	0(,%r12,4), %rax
	movq	%rax, 48(%rsp)
	movl	%ebx, %r12d
	negl	%r12d
.L104:
	leal	(%r12,%rbx), %eax
	cmpl	%eax, %r15d
	jl	.L127
	movaps	%xmm1, %xmm0
	movl	%r12d, %edi
	xorl	%ecx, %ecx
	imull	%r12d, %edi
	addss	%xmm1, %xmm0
	mulss	%xmm1, %xmm0
	movss	%xmm0, 56(%rsp)
.L105:
	movl	%ecx, %eax
	movq	%rsi, 72(%rsp)
	subl	%ebx, %eax
	movq	%rcx, 64(%rsp)
	imull	%eax, %eax
	movl	%edi, 60(%rsp)
	movss	%xmm1, 80(%rsp)
	addl	%edi, %eax
	negl	%eax
	cvtsi2ssl	%eax, %xmm0
	divss	56(%rsp), %xmm0
	call	expf@PLT
	movq	64(%rsp), %rcx
	movq	72(%rsp), %rsi
	movl	60(%rsp), %edi
	movss	80(%rsp), %xmm1
	movss	%xmm0, (%rsi,%rcx,4)
	incq	%rcx
	cmpl	%ecx, %r15d
	jge	.L105
	movq	48(%rsp), %rax
	incl	%r12d
	addq	%rax, %rsi
	jmp	.L104
.L127:
	movl	%r13d, %r12d
	leaq	120(%rsp), %rdi
	imull	%r14d, %r12d
	movslq	%r12d, %r12
	salq	$2, %r12
	movq	%r12, %rsi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	leaq	128(%rsp), %rdi
	movq	%r12, %rsi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	movq	16(%rsp), %rsi
	leaq	136(%rsp), %rdi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	movq	0(%rbp), %rsi
	movq	120(%rsp), %rdi
	movq	%r12, %rdx
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rsi
	movl	$1, %ecx
	movq	%r12, %rdx
	movq	128(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdx
	movq	24(%rsp), %rsi
	movl	$1, %ecx
	movq	136(%rsp), %rdi
	call	cudaMemcpy@PLT
	cvtsi2ssl	%r14d, %xmm0
	mulss	.LC17(%rip), %xmm0
	call	ceilf@PLT
	movd	%xmm0, %r15d
	cvtsi2ssl	%r13d, %xmm0
	mulss	.LC17(%rip), %xmm0
	call	ceilf@PLT
	movd	%r15d, %xmm3
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	cvttss2sil	%xmm0, %eax
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$68719476752, %rdx
	movl	$1, 164(%rsp)
	movq	%rdx, 144(%rsp)
	movl	$1, 152(%rsp)
	movl	%eax, 156(%rsp)
	cvttss2sil	%xmm3, %eax
	movl	%eax, 160(%rsp)
	movq	156(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L107
	movl	8(%rbp), %ecx
	pushq	%rsi
	.cfi_def_cfa_offset 248
	movl	%ebx, %r9d
	movl	%r14d, %edx
	pushq	136(%rsp)
	.cfi_def_cfa_offset 256
	movss	52(%rsp), %xmm0
	movl	%r13d, %esi
	movq	152(%rsp), %r8
	movq	136(%rsp), %rdi
	call	_Z36__device_stub__Z8conv_bilPfiiiS_iS_fPfiiiS_iS_f
	popq	%rdi
	.cfi_def_cfa_offset 248
	popq	%r8
	.cfi_def_cfa_offset 240
.L107:
	call	cudaGetLastError@PLT
	testl	%eax, %eax
	je	.L108
	leaq	.LC18(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L108:
	movq	128(%rsp), %rsi
	movq	8(%rsp), %rdi
	movl	$2, %ecx
	movq	%r12, %rdx
	call	cudaMemcpy@PLT
	movq	120(%rsp), %rdi
	call	cudaFree@PLT
	movq	136(%rsp), %rdi
	call	cudaFree@PLT
	movq	128(%rsp), %rdi
	call	cudaFree@PLT
.L103:
	cmpl	$3, 8(%rbp)
	jne	.L109
	leal	(%rbx,%rbx), %r12d
	leal	1(%r12), %edx
	movl	%edx, %eax
	movl	%edx, 24(%rsp)
	imull	%edx, %eax
	leal	(%rax,%rax,2), %eax
	cltq
	salq	$2, %rax
	movq	%rax, %rdi
	movq	%rax, 16(%rsp)
	call	malloc@PLT
	movq	16(%rbp), %r14
	movq	%rax, %r15
	movl	(%r14), %edi
	imull	4(%r14), %edi
	leal	(%rdi,%rdi,2), %edi
	movslq	%edi, %rdi
	salq	$2, %rdi
	call	malloc@PLT
	movl	24(%rsp), %edx
	movl	(%r14), %r13d
	xorl	%ecx, %ecx
	movq	%rax, 8(%rsp)
	movl	4(%r14), %r14d
	cvtsi2ssl	%edx, %xmm1
	leal	(%rdx,%rdx,2), %edx
	movslq	%edx, %rdx
	leaq	0(,%rdx,4), %rax
	movq	%rax, 48(%rsp)
.L110:
	movl	%ebx, %eax
	leal	-1(%rcx), %edi
	leaq	(%r15,%rcx,4), %r8
	negl	%eax
	imull	%edi, %edi
	movl	%eax, 24(%rsp)
	movl	%eax, %edx
.L114:
	leal	(%rdx,%rbx), %eax
	cmpl	%eax, %r12d
	jl	.L128
	movaps	%xmm1, %xmm0
	movl	%edx, %r10d
	movl	24(%rsp), %esi
	movq	%r8, %r9
	imull	%edx, %r10d
	addss	%xmm1, %xmm0
	mulss	%xmm1, %xmm0
	mulss	.LC13(%rip), %xmm0
	movss	%xmm0, 56(%rsp)
.L111:
	movl	%esi, %eax
	movq	%rcx, 104(%rsp)
	imull	%esi, %eax
	movq	%r9, 96(%rsp)
	movq	%r8, 88(%rsp)
	movl	%edx, 72(%rsp)
	addl	%r10d, %eax
	movl	%esi, 80(%rsp)
	addl	%edi, %eax
	movl	%r10d, 64(%rsp)
	negl	%eax
	movl	%edi, 60(%rsp)
	cvtsi2ssl	%eax, %xmm0
	movss	%xmm1, 84(%rsp)
	divss	56(%rsp), %xmm0
	call	expf@PLT
	movl	80(%rsp), %esi
	movq	96(%rsp), %r9
	movl	60(%rsp), %edi
	movl	64(%rsp), %r10d
	incl	%esi
	movss	%xmm0, (%r9)
	addq	$12, %r9
	movl	72(%rsp), %edx
	leal	(%rsi,%rbx), %eax
	movss	84(%rsp), %xmm1
	movq	88(%rsp), %r8
	cmpl	%eax, %r12d
	movq	104(%rsp), %rcx
	jge	.L111
	movq	48(%rsp), %rax
	incl	%edx
	addq	%rax, %r8
	jmp	.L114
.L128:
	incq	%rcx
	cmpq	$3, %rcx
	jne	.L110
	movl	%r13d, %r12d
	leaq	120(%rsp), %rdi
	imull	%r14d, %r12d
	leal	(%r12,%r12,2), %r12d
	movslq	%r12d, %r12
	salq	$2, %r12
	movq	%r12, %rsi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	leaq	128(%rsp), %rdi
	movq	%r12, %rsi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	movq	16(%rsp), %rsi
	leaq	136(%rsp), %rdi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	movq	0(%rbp), %rsi
	movq	120(%rsp), %rdi
	movq	%r12, %rdx
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rsi
	movl	$1, %ecx
	movq	%r12, %rdx
	movq	128(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdx
	movq	%r15, %rsi
	movq	136(%rsp), %rdi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	cvtsi2ssl	%r14d, %xmm0
	mulss	.LC17(%rip), %xmm0
	call	ceilf@PLT
	movd	%xmm0, %r15d
	cvtsi2ssl	%r13d, %xmm0
	mulss	.LC17(%rip), %xmm0
	call	ceilf@PLT
	movd	%r15d, %xmm5
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	cvttss2sil	%xmm0, %eax
	movl	$3, %ecx
	movl	$1, %esi
	movabsq	$68719476752, %rdx
	movl	$1, 164(%rsp)
	movq	%rdx, 144(%rsp)
	movl	$3, 152(%rsp)
	movl	%eax, 156(%rsp)
	cvttss2sil	%xmm5, %eax
	movl	%eax, 160(%rsp)
	movq	156(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L115
	movl	8(%rbp), %ecx
	pushq	%rax
	.cfi_def_cfa_offset 248
	movl	%r14d, %edx
	movl	%ebx, %r9d
	pushq	136(%rsp)
	.cfi_def_cfa_offset 256
	movss	52(%rsp), %xmm0
	movl	%r13d, %esi
	movq	152(%rsp), %r8
	movq	136(%rsp), %rdi
	call	_Z36__device_stub__Z8conv_bilPfiiiS_iS_fPfiiiS_iS_f
	popq	%rdx
	.cfi_def_cfa_offset 248
	popq	%rcx
	.cfi_def_cfa_offset 240
.L115:
	call	cudaGetLastError@PLT
	testl	%eax, %eax
	je	.L116
	leaq	.LC18(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L116:
	movq	128(%rsp), %rsi
	movq	8(%rsp), %rdi
	movl	$2, %ecx
	movq	%r12, %rdx
	call	cudaMemcpy@PLT
	movq	120(%rsp), %rdi
	call	cudaFree@PLT
	movq	136(%rsp), %rdi
	call	cudaFree@PLT
	movq	128(%rsp), %rdi
	call	cudaFree@PLT
.L109:
	call	clock@PLT
	movq	40(%rsp), %rbx
	movl	$2, %edi
	leaq	.LC19(%rip), %rsi
	subq	%rbx, %rax
	cvtsi2sdq	%rax, %xmm0
	movb	$1, %al
	divsd	.LC14(%rip), %xmm0
	call	__printf_chk@PLT
	movq	8(%rsp), %rax
	movq	%rax, 0(%rbp)
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L117
	call	__stack_chk_fail@PLT
.L117:
	addq	$184, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2030:
	.size	_Z19bilateral_filteringP5Imageif, .-_Z19bilateral_filteringP5Imageif
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	subq	$48, %rsp
	.cfi_def_cfa_offset 64
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rbx
	movq	%rbx, %rdi
	call	_Z8open_imgP5Image
	movl	$5, %esi
	movq	%rbx, %rdi
	call	_Z13box_filteringP5Imagei
	xorl	%esi, %esi
	movq	%rbx, %rdi
	call	_Z9write_imgP5Imagei
	movq	%rbx, %rdi
	call	_Z8open_imgP5Image
	movl	$5, %esi
	movq	%rbx, %rdi
	call	_Z18gaussian_filteringP5Imagei
	movl	$1, %esi
	movq	%rbx, %rdi
	call	_Z9write_imgP5Imagei
	movq	%rbx, %rdi
	call	_Z8open_imgP5Image
	movss	.LC20(%rip), %xmm0
	movl	$5, %esi
	movq	%rbx, %rdi
	call	_Z19bilateral_filteringP5Imageif
	movl	$2, %esi
	movq	%rbx, %rdi
	call	_Z9write_imgP5Imagei
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L130
	call	__stack_chk_fail@PLT
.L130:
	addq	$48, %rsp
	.cfi_def_cfa_offset 16
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC21:
	.string	"_Z8conv_bilPfiiiS_iS_f"
.LC22:
	.string	"_Z4convPfiiiS_iS_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2065:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC21(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z8conv_bilPfiiiS_iS_f(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC22(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z4convPfiiiS_iS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2065:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC11:
	.long	1065353216
	.section	.rodata.cst16,"aM",@progbits,16
	.align 16
.LC12:
	.long	-2147483648
	.long	0
	.long	0
	.long	0
	.section	.rodata.cst4
	.align 4
.LC13:
	.long	1077936128
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC14:
	.long	0
	.long	1093567616
	.section	.rodata.cst4
	.align 4
.LC17:
	.long	1031798784
	.align 4
.LC20:
	.long	1092616192
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <math.h>
#include <stdint.h>
#include <time.h>

__global__ void conv(float *tab, int N, int M, int ndim,
  float *filter, int s, float *output);
__global__ void conv_bil(float *tab, int N, int M, int ndim,
  float *filter, int s, float *output, float r);

void box_filter(float *filter, int size, int ndim);
void gaussian_filter(float *filter, int size, int ndim);

void conv_GPU(float *tab, int ndim, int *dim, float *filter,
  int s, float *tab_filtered, int N_threads);

typedef struct {
  float *img;
  int ndim;
  int *dim;
  int max_pix;
} Image;

void open_img(Image * image);
void write_img(Image * image, int file_idx);

void box_filtering(Image *image, int s);
void gaussian_filtering(Image *image, int s);
void bilateral_filtering(Image *image, int s, float r);


int main(int argc, char const *argv[]) {
  Image image;
  Image * image_addr = &image;
  int s = 5;

  open_img(image_addr);
  box_filtering(image_addr, s);
  write_img(image_addr, 0);

  open_img(image_addr);
  gaussian_filtering(image_addr, s);
  write_img(image_addr, 1);

  open_img(image_addr);
  bilateral_filtering(image_addr, s, 10);
  write_img(image_addr, 2);

  return 0;
}

void box_filtering(Image *image, int s){
  int dim_dot = 1;
  float *filter;
  for (int d=0; d<image->ndim; d++){
    dim_dot*=image->dim[d];
  }
  if (image->ndim==2)
    filter = (float*) malloc((2*s+1)*(2*s+1)*sizeof(float));
  if (image->ndim==3)
    filter = (float*) malloc((2*s+1)*(2*s+1)*3*sizeof(float));
  float * img_filtered = (float*) malloc(dim_dot*sizeof(float));
  box_filter(filter, s, image->ndim);
  conv_GPU(image->img, image->ndim, image->dim,
    filter, s, img_filtered, 16);
  printf("\n");
  image->img = img_filtered;
}

void gaussian_filtering(Image *image, int s){
  int dim_dot = 1;
  float *filter;
  for (int d=0; d<image->ndim; d++){
    dim_dot*=image->dim[d];
  }
  if (image->ndim==2)
    filter = (float*) malloc((2*s+1)*(2*s+1)*sizeof(float));
  if (image->ndim==3)
    filter = (float*) malloc((2*s+1)*(2*s+1)*3*sizeof(float));
  float * img_filtered = (float*) malloc(dim_dot*sizeof(float));
  gaussian_filter(filter, s, image->ndim);
  conv_GPU(image->img, image->ndim, image->dim,
    filter, s, img_filtered, 16);
  printf("\n");
  image->img = img_filtered;
}

void bilateral_filtering(Image *image, int s, float r){
  clock_t start, finish;
  double duration;
  start = clock();

  float * filter;
  float * img_filtered;
  int N;
  int M;
  int N_threads;
  float size;

  if (image->ndim==2){
    filter = (float*) malloc((2*s+1)*(2*s+1)*sizeof(float));
    img_filtered = (float*) malloc(image->dim[0]*image->dim[1]
      *sizeof(float));
    N = image->dim[0];
    M = image->dim[1];
    N_threads = 16;
    size = (float) (2*s+1);

    for (int i=0; i<2*s+1; i++){
      for (int j=0; j<2*s+1; j++){
        filter[i*(2*s+1)+j] =  exp(-((i-s)*(i-s)+(j-s)*(j-s))/ (2*size*size));
      }
    }

    float *tab_GPU;
    float *output_GPU;
    float *filter_GPU;
    // Allocate vector in device memory
    hipMalloc(&tab_GPU, N * M * sizeof(float));
    hipMalloc(&output_GPU, N * M * sizeof(float));
    hipMalloc(&filter_GPU, (2*s+1) * (2*s+1) * sizeof(float));
    // Copy vectors from host memory to device memory
    hipMemcpy(tab_GPU, image->img, N * M * sizeof(float), hipMemcpyHostToDevice);
    hipMemcpy(output_GPU, img_filtered, N * M * sizeof(float), hipMemcpyHostToDevice);
    hipMemcpy(filter_GPU, filter,  (2*s+1) * (2*s+1) *
      sizeof(float), hipMemcpyHostToDevice);

    dim3 threadsPerBlock(N_threads, N_threads, 1);
    dim3 blocksPerGrid((int) ceil(N / (float)threadsPerBlock.x),
              (int) ceil(M / (float)threadsPerBlock.y), 1);

    conv_bil<<<blocksPerGrid,threadsPerBlock>>>(tab_GPU, N, M, image->ndim, filter_GPU, s, output_GPU, r);
    if ( hipSuccess != hipGetLastError() )
      printf( "Error!\n" );

    hipMemcpy(img_filtered, output_GPU, N * M * sizeof(float),
      hipMemcpyDeviceToHost);
    hipFree(tab_GPU);
    hipFree(filter_GPU);
    hipFree(output_GPU);
  }

  if (image->ndim==3){
    filter = (float*) malloc((2*s+1)*(2*s+1)*3*sizeof(float));
    img_filtered = (float*) malloc(image->dim[0]*image->dim[1]
      *3*sizeof(float));
    N = image->dim[0];
    M = image->dim[1];
    N_threads = 16;
    size = (float) (2*s+1);

    for (int k=0; k<3; k++){
      for (int i=0; i<2*s+1; i++){
        for (int j=0; j<2*s+1; j++){
          filter[(i*(2*s+1)+j)*3+k] =  exp(-((i-s)*(i-s)+
          (j-s)*(j-s)+(k-1)*(k-1))/ (2*size*size*3));
        }
      }
    }

    float *tab_GPU;
    float *output_GPU;
    float *filter_GPU;
    // Allocate vector in device memory
    hipMalloc(&tab_GPU, N * M * 3 *sizeof(float));
    hipMalloc(&output_GPU, N * M * 3 *sizeof(float));
    hipMalloc(&filter_GPU, (2*s+1) * (2*s+1) * 3 *sizeof(float));
    // Copy vectors from host memory to device memory
    hipMemcpy(tab_GPU, image->img, N * M * 3 *sizeof(float), hipMemcpyHostToDevice);
    hipMemcpy(output_GPU, img_filtered, N * M * 3 *sizeof(float), hipMemcpyHostToDevice);
    hipMemcpy(filter_GPU, filter,  (2*s+1) * (2*s+1) * 3 *
      sizeof(float), hipMemcpyHostToDevice);

    dim3 threadsPerBlock(N_threads, N_threads, 3);
    dim3 blocksPerGrid((int) ceil(N / (float)threadsPerBlock.x),
              (int) ceil(M / (float)threadsPerBlock.y), 1);

    conv_bil<<<blocksPerGrid,threadsPerBlock>>>(tab_GPU, N, M, image->ndim, filter_GPU, s, output_GPU, r);
    if ( hipSuccess != hipGetLastError() )
      printf( "Error!\n" );

    hipMemcpy(img_filtered, output_GPU, N * M * 3 * sizeof(float),
      hipMemcpyDeviceToHost);
    hipFree(tab_GPU);
    hipFree(filter_GPU);
    hipFree(output_GPU);
  }

  finish = clock();
  duration = (double)(finish - start) / CLOCKS_PER_SEC;
  printf("%f\n",duration);
  image->img = img_filtered;
}

// TODO: case "P6"
void open_img(Image *image){
  FILE *fp;
  int height, width, max_pix;
  int c;

  fp = fopen("image_256x256.pgm", "r");
  fscanf(fp, "P%d\n", &c);
  switch (c) {
    case 2:
      fscanf(fp, "%d %d\n", &height, &width);
      fscanf(fp, "%d\n", &max_pix);

      image->ndim = 2;
      image->img = (float *) malloc(height*width*sizeof(float));
      image->dim = (int *) malloc(image->ndim*sizeof(int));
      image->dim[0] = height;
      image->dim[1] = width;
      image->max_pix = max_pix;

      for(int i=0; i<height; i++){
        for(int j=0; j<width; j++){
          fscanf(fp, "%d\n", &c);
          *(image->img+i*width+j) = (float) c;
        }
      }
      fclose(fp);
      break;
    case 6:
      fscanf(fp, "%d %d\n", &height, &width);
      fscanf(fp, "%d\n", &max_pix);

      image->ndim = 3;
      image->img = (float *) malloc(height*width*3*sizeof(float));
      image->dim = (int *) malloc(image->ndim*sizeof(int));
      image->dim[0] = height;
      image->dim[1] = width;
      image->dim[2] = 3;
      image->max_pix = max_pix;

      for(int i=0; i<height; i++){
        for(int j=0; j<width; j++){
          fscanf(fp, "%d\n", &c);
          *(image->img+i*width+j) = (float) c;
        }
      }
      fclose(fp);
  }
}

// TODO: case "P6"
void write_img(Image *image, int file_idx){
  FILE *fp;
  int height = image->dim[0];
  int width = image->dim[1];
  int max_pix = image->max_pix;

  switch (file_idx) {
    case 0:
      fp = fopen ("test_box.pgm", "w+");
      break;
    case 1:
      fp = fopen ("test_gauss.pgm", "w+");
      break;
    case 2:
      fp = fopen ("test_bil.pgm", "w+");
      break;
    default :
      fp = fopen ("test.pgm", "w+");
  }

  fprintf(fp, "P2\n%d %d\n%d\n", height, width, max_pix);

  for (int i=0; i<height; i++){
    for (int j=0; j<width; j++)
      fprintf(fp, "%d\n", (int) *(image->img+i*width+j));
  }
  fclose(fp);
}

__global__ void conv(float *tab, int N, int M, int ndim,
  float *filter, int s, float *output){
  int idx = blockIdx.x * blockDim.x + threadIdx.x;
  int idy = blockIdx.y * blockDim.y + threadIdx.y;

  if (ndim==2){
    if (idx<=N){
      if (idy<=M){
        output[idx*M+idy] = filter[s]*tab[idx*M+idy];
        float sum = filter[s];
        for (int i=1; i<s+1; i++){
          int x_big = -N*(idx+i>=N);
          int x_small = N*(idx-i<0);
          float t = (filter[(s+i)*(2*s+1)+s]);
          float b = (filter[(s-i)*(2*s+1)+s]);

          output[idx*M+idy] += (t*tab[(idx+i+x_big)*M]);
          output[idx*M+idy] += (b*tab[(idx-i+x_small)*M]);

          for (int j=1; j<s+1; j++){
            int y_big = -M*(idy+j>=M);
            int y_small = M*(idy-j<0);
            float tl = (filter[(s+i)*(2*s+1)+(s+j)]);
            float tr = (filter[(s+i)*(2*s+1)+(s-j)]);
            float bl = (filter[(s-i)*(2*s+1)+(s+j)]);
            float br = (filter[(s-i)*(2*s+1)+(s-j)]);

            output[idx*M+idy] += (tl*tab[(idx-i+x_small)*M+idy-j+y_small]);
            output[idx*M+idy] += (tr*tab[(idx-i+x_small)*M+idy+j+y_big]);
            output[idx*M+idy] += (bl*tab[(idx+i+x_big)*M+idy-j+y_small]);
            output[idx*M+idy] += (br*tab[(idx+i+x_big)*M+idy+j+y_big]);

            if (i==1) {
              float l = (filter[(s)*(2*s+1)+(s+j)]);
              float r = (filter[(s)*(2*s+1)+(s-j)]);

              output[idx*M+idy] += (l*tab[(idx)*M+idy-j+y_small]);
              output[idx*M+idy] += (r*tab[(idx)*M+idy+j+y_big]);

              sum += l+r;
            }

            sum += tl+tr+bl+br;
          }
          sum += t+b;
        }
        output[idx*M+idy] /= sum;
      }
    }
  }
  if (ndim==3){
    int idz = blockIdx.z * blockDim.z + threadIdx.z;
    if (idx<N){
      if (idy<M){
        if (idz<3){
          float sum = 0;
          output[(idx*M+idy)*3+idz] = 0;
          for (int k=0; k<3; k++){
            output[(idx*M+idy)*3+idz] += filter[s*3+k+idz+1]*tab[(idx*M+idy)*3+(k+idz)%3];
            sum += filter[s*3+k+idz+1];
            for (int i=1; i<s+1; i++){
              int x_big = -N*(idx+i>=N);
              int x_small = N*(idx-i<0);
              float t = (filter[((s+i)*(2*s+1)+s)*3+(k+idz+1)%3]);
              float b = (filter[((s-i)*(2*s+1)+s)*3+(k+idz+1)%3]);

              output[(idx*M+idy)*3+idz] += (t*tab[((idx+i+x_big)*M)*3+(k+idz)%3]);
              output[(idx*M+idy)*3+idz] += (b*tab[((idx-i+x_small)*M)*3+(k+idz)%3]);

              for (int j=1; j<s+1; j++){
                int y_big = -M*(idy+j>=M);
                int y_small = M*(idy-j<0);
                float tl = (filter[((s+i)*(2*s+1)+(s+j))*3+(k+idz+1)%3]);
                float tr = (filter[((s+i)*(2*s+1)+(s-j))*3+(k+idz+1)%3]);
                float bl = (filter[((s-i)*(2*s+1)+(s+j))*3+(k+idz+1)%3]);
                float br = (filter[((s-i)*(2*s+1)+(s-j))*3+(k+idz+1)%3]);

                output[(idx*M+idy)*3+idz] += (tl*tab[((idx-i+x_small)*M+idy-j+y_small)*3+(k+idz)%3]);
                output[(idx*M+idy)*3+idz] += (tr*tab[((idx-i+x_small)*M+idy+j+y_big)*3+(k+idz)%3]);
                output[(idx*M+idy)*3+idz] += (bl*tab[((idx+i+x_big)*M+idy-j+y_small)*3+(k+idz)%3]);
                output[(idx*M+idy)*3+idz] += (br*tab[((idx+i+x_big)*M+idy+j+y_big)*3+(k+idz)%3]);

                if (i==1) {
                  float l = (filter[((s)*(2*s+1)+(s+j))*3+(k+idz+1)%3]);
                  float r = (filter[((s)*(2*s+1)+(s-j))*3+(k+idz+1)%3]);

                  output[(idx*M+idy)*3+idz] += (l*tab[((idx)*M+idy-j+y_small)*3+(k+idz)%3]);
                  output[(idx*M+idy)*3+idz] += (r*tab[((idx)*M+idy+j+y_big)*3+(k+idz)%3]);

                  sum += l+r;
                }

                sum += tl+tr+bl+br;
              }
              sum += t+b;
            }
          }
          output[(idx*M+idy)*3+idz] /= sum;
        }
      }
    }
  }
}

__global__ void conv_bil(float *tab, int N, int M, int ndim,
  float *filter, int s, float *output, float r){
  int idx = blockIdx.x * blockDim.x + threadIdx.x;
  int idy = blockIdx.y * blockDim.y + threadIdx.y;

  if (ndim==2){
    float var = 2*r*r;

    if (idx<=N){
      if (idy<=M){
        output[idx*M+idy] = filter[s]*tab[idx*M+idy];
        float sum = filter[s];
        for (int i=1; i<s+1; i++){
          int x_big = -N*(idx+i>=N);
          int x_small = N*(idx-i<0);
          float t = (filter[(s+i)*(2*s+1)+s]
            *exp(-(tab[(idx+i+x_big)*M]-tab[idx*M+idy])
            *(tab[(idx+i+x_big)*M]-tab[idx*M+idy])/var)
          );
          float b = (filter[(s-i)*(2*s+1)+s]
            *exp(-(tab[(idx-i+x_small)*M]-tab[idx*M+idy])
            *(tab[(idx-i+x_small)*M]-tab[idx*M+idy])/var)
          );

          output[idx*M+idy] += (t*tab[(idx+i+x_big)*M]);
          output[idx*M+idy] += (b*tab[(idx-i+x_small)*M]);

          for (int j=1; j<s+1; j++){
            int y_big = -M*(idy+j>=M);
            int y_small = M*(idy-j<0);
            float tl = (filter[(s+i)*(2*s+1)+(s+j)]
              *exp(-(tab[(idx-i+x_small)*M+idy-j+y_small]-tab[idx*M+idy])
              *(tab[(idx-i+x_small)*M+idy-j+y_small]-tab[idx*M+idy])/var)
            );
            float tr = (filter[(s+i)*(2*s+1)+(s-j)]
              *exp(-(tab[(idx-i+x_small)*M+idy+j+y_big]-tab[idx*M+idy])
              *(tab[(idx-i+x_small)*M+idy+j+y_big]-tab[idx*M+idy])/var)
            );
            float bl = (filter[(s-i)*(2*s+1)+(s+j)]
              *exp(-(tab[(idx+i+x_big)*M+idy-j+y_small]-tab[idx*M+idy])
              *(tab[(idx+i+x_big)*M+idy-j+y_small]-tab[idx*M+idy])/var)
            );
            float br = (filter[(s-i)*(2*s+1)+(s-j)]
              *exp(-(tab[(idx+i+x_big)*M+idy+j+y_big]-tab[idx*M+idy])
              *(tab[(idx+i+x_big)*M+idy+j+y_big]-tab[idx*M+idy])/var)
            );

            output[idx*M+idy] += (tl*tab[(idx-i+x_small)*M+idy-j+y_small]);
            output[idx*M+idy] += (tr*tab[(idx-i+x_small)*M+idy+j+y_big]);
            output[idx*M+idy] += (bl*tab[(idx+i+x_big)*M+idy-j+y_small]);
            output[idx*M+idy] += (br*tab[(idx+i+x_big)*M+idy+j+y_big]);

            if (i==1) {
              float l = (filter[(s)*(2*s+1)+(s+j)]
                *exp(-(tab[(idx)*M+idy-j+y_small]-tab[idx*M+idy])
                *(tab[(idx)*M+idy-j+y_small]-tab[idx*M+idy])/var)
              );
              float r = (filter[(s)*(2*s+1)+(s-j)]
                *exp(-(tab[(idx)*M+idy+j+y_big]-tab[idx*M+idy])
                *(tab[(idx)*M+idy+j+y_big]-tab[idx*M+idy])/var)
              );

              output[idx*M+idy] += (l*tab[(idx)*M+idy-j+y_small]);
              output[idx*M+idy] += (r*tab[(idx)*M+idy+j+y_big]);

              sum += l+r;
            }

            sum += tl+tr+bl+br;
          }
          sum += t+b;
        }
        output[idx*M+idy] /= sum;
      }
    }
  }

  if (ndim==3){
    int idz = blockIdx.z * blockDim.z + threadIdx.z;
    float var = 2*r*r*3;

    if (idx<=N){
      if (idy<=M){
        if (idz<3){
          output[(idx*M+idy)*3+idz] = 0;
          float sum = 0;
          for (int k=0; k<3; k++){
            output[(idx*M+idy)*3+idz] += filter[s*3+k+idz+1]*tab[(idx*M+idy)*3+(k+idz)%3];
            sum += filter[s];
            for (int i=1; i<s+1; i++){
              int x_big = -N*(idx+i>=N);
              int x_small = N*(idx-i<0);
              float t = (filter[((s+i)*(2*s+1)+s)*3+k+idz+1]
                *exp(-(tab[((idx+i+x_big)*M)*3+(k+idz)%3]-tab[(idx*M+idy)*3+(k+idz)%3])
                *(tab[((idx+i+x_big)*M)*3+(k+idz)%3]-tab[(idx*M+idy)*3+(k+idz)%3])/var)
              );
              float b = (filter[((s-i)*(2*s+1)+s)*3+k+idz+1]
                *exp(-(tab[((idx-i+x_small)*M)*3+(k+idz)%3]-tab[(idx*M+idy)*3+(k+idz)%3])
                *(tab[((idx-i+x_small)*M)*3+(k+idz)%3]-tab[(idx*M+idy)*3+(k+idz)%3])/var)
              );

              output[(idx*M+idy)*3+idz] += (t*tab[((idx+i+x_big)*M)*3+(k+idz)%3]);
              output[(idx*M+idy)*3+idz] += (b*tab[((idx-i+x_small)*M)*3+(k+idz)%3]);

              for (int j=1; j<s+1; j++){
                int y_big = -M*(idy+j>=M);
                int y_small = M*(idy-j<0);
                float tl = (filter[((s+i)*(2*s+1)+(s+j))*3+k+idz+1]
                  *exp(-(tab[((idx-i+x_small)*M+idy-j+y_small)*3+(k+idz)%3]-tab[(idx*M+idy)*3+(k+idz)%3])
                  *(tab[((idx-i+x_small)*M+idy-j+y_small)*3+(k+idz)%3]-tab[(idx*M+idy)*3+(k+idz)%3])/var)
                );
                float tr = (filter[((s+i)*(2*s+1)+(s-j))*3+k+idz+1]
                  *exp(-(tab[((idx-i+x_small)*M+idy+j+y_big)*3+(k+idz)%3]-tab[(idx*M+idy)*3+(k+idz)%3])
                  *(tab[((idx-i+x_small)*M+idy+j+y_big)*3+(k+idz)%3]-tab[(idx*M+idy)*3+(k+idz)%3])/var)
                );
                float bl = (filter[((s-i)*(2*s+1)+(s+j))*3+k+idz+1]
                  *exp(-(tab[((idx+i+x_big)*M+idy-j+y_small)*3+(k+idz)%3]-tab[(idx*M+idy)*3+(k+idz)%3])
                  *(tab[((idx+i+x_big)*M+idy-j+y_small)*3+(k+idz)%3]-tab[(idx*M+idy)*3+(k+idz)%3])/var)
                );
                float br = (filter[((s-i)*(2*s+1)+(s-j))*3+k+idz+1]
                  *exp(-(tab[((idx+i+x_big)*M+idy+j+y_big)*3+(k+idz)%3]-tab[(idx*M+idy)*3+(k+idz)%3])
                  *(tab[((idx+i+x_big)*M+idy+j+y_big)*3+(k+idz)%3]-tab[(idx*M+idy)]*3+(k+idz)%3)/var)
                );

                output[(idx*M+idy)*3+idz] += (tl*tab[((idx-i+x_small)*M+idy-j+y_small)*3+(k+idz)%3]);
                output[(idx*M+idy)*3+idz] += (tr*tab[((idx-i+x_small)*M+idy+j+y_big)*3+(k+idz)%3]);
                output[(idx*M+idy)*3+idz] += (bl*tab[((idx+i+x_big)*M+idy-j+y_small)*3+(k+idz)%3]);
                output[(idx*M+idy)*3+idz] += (br*tab[((idx+i+x_big)*M+idy+j+y_big)*3+(k+idz)%3]);

                if (i==1) {
                  float l = (filter[((s)*(2*s+1)+(s+j))*3+k+idz+1]
                    *exp(-(tab[((idx)*M+idy-j+y_small)*3+(k+idz)%3]-tab[(idx*M+idy)*3+(k+idz)%3])
                    *(tab[((idx)*M+idy-j+y_small)*3+(k+idz)%3]-tab[(idx*M+idy)*3+(k+idz)%3])/var)
                  );
                  float r = (filter[((s)*(2*s+1)+(s-j))*3+k+idz+1]
                    *exp(-(tab[((idx)*M+idy+j+y_big)*3+(k+idz)%3]-tab[(idx*M+idy)*3+(k+idz)%3])
                    *(tab[((idx)*M+idy+j+y_big)*3+(k+idz)%3]-tab[(idx*M+idy)*3+(k+idz)%3])/var)
                  );

                  output[(idx*M+idy)*3+idz] += (l*tab[((idx)*M+idy-j+y_small)*3+(k+idz)%3]);
                  output[(idx*M+idy)*3+idz] += (r*tab[((idx)*M+idy+j+y_big)*3+(k+idz)%3]);

                  sum += l+r;
                }
                sum += tl+tr+bl+br;
              }
              sum += t+b;
            }
          }
          output[(idx*M+idy)*3+idz] /= sum;
        }
      }
    }
  }
}

void box_filter(float *filter, int size, int ndim) {
  if (ndim==2){
    for (int i=0; i<2*size+1; i++){
      for (int j=0; j<2*size+1; j++){
        filter[i*(2*size+1)+j] = 1;
      }
    }
  }
  if (ndim==3){
    for (int i=0; i<2*size+1; i++){
      for (int j=0; j<2*size+1; j++){
        for (int k=0; k<3; k++){
          filter[(i*(2*size+1)+j)*3+k] = 1;
        }
      }
    }
  }
}

void gaussian_filter(float *filter, int size, int ndim) {
  float s = (float) (2*size+1);
  if (ndim==2){
    for (int i=0; i<2*size+1; i++){
      for (int j=0; j<2*size+1; j++){
        filter[i*(2*size+1)+j] =  exp(-((i-size)*(i-size)+(j-size)*(j-size))/ (2*s*s));
      }
    }
  }
  if (ndim==3){
    for (int i=0; i<2*size+1; i++){
      for (int j=0; j<2*size+1; j++){
        for (int k=0; k<3; k++){
          float norm = (i-size)*(i-size)+(j-size)*(j-size)+(k-1)*(k-1);
          filter[(i*(2*size+1)+j)*3+k] =  exp(-norm/(2*s*s*3));
        }
      }
    }
  }
}

void conv_GPU(float *tab, int ndim, int *dim, float *filter,
  int s, float *tab_filtered, int N_threads) {
  clock_t start, finish;
  double duration;
  start = clock();

  int dim_dot = 1;
  for (int i=0; i<ndim; i++){
    dim_dot*=dim[i];
  }

  if (ndim==2){
    float *tab_GPU;
    float *output_GPU;
    float *filter_GPU;
    // Allocate vector in device memory
    hipMalloc(&tab_GPU, dim_dot*sizeof(float));
    hipMalloc(&output_GPU, dim_dot*sizeof(float));
    hipMalloc(&filter_GPU, (2*s+1) * (2*s+1) * sizeof(float));
    // Copy vectors from host memory to device memory
    hipMemcpy(tab_GPU, tab, dim_dot*sizeof(float), hipMemcpyHostToDevice);
    hipMemcpy(output_GPU, tab, dim_dot*sizeof(float), hipMemcpyHostToDevice);
    hipMemcpy(filter_GPU, filter,  (2*s+1) * (2*s+1) *
      sizeof(float), hipMemcpyHostToDevice);

    dim3 threadsPerBlock(N_threads, N_threads, 1);
    dim3 blocksPerGrid((int) ceil(dim[0] / (float)threadsPerBlock.x),
              (int) ceil(dim[1] / (float)threadsPerBlock.y), 1);

    conv<<<blocksPerGrid,threadsPerBlock>>>(tab_GPU, dim[0], dim[1], ndim, filter_GPU, s, output_GPU);

    hipMemcpy(tab_filtered, output_GPU, dim_dot*sizeof(float),
      hipMemcpyDeviceToHost);
    hipFree(tab_GPU);
    hipFree(filter_GPU);
    hipFree(output_GPU);
  }
  if (ndim==3){
    float *tab_GPU;
    float *output_GPU;
    float *filter_GPU;
    // Allocate vector in device memory
    hipMalloc(&tab_GPU, dim_dot*sizeof(float));
    hipMalloc(&output_GPU, dim_dot*sizeof(float));
    hipMalloc(&filter_GPU, (2*s+1) * (2*s+1) * 3 * sizeof(float));
    // Copy vectors from host memory to device memory
    hipMemcpy(tab_GPU, tab, dim_dot*sizeof(float), hipMemcpyHostToDevice);
    hipMemcpy(output_GPU, tab, dim_dot*sizeof(float), hipMemcpyHostToDevice);
    hipMemcpy(filter_GPU, filter,  (2*s+1) * (2*s+1) * 3 *
      sizeof(float), hipMemcpyHostToDevice);

    dim3 threadsPerBlock(N_threads, N_threads, 3);
    dim3 blocksPerGrid((int) ceil(dim[0] / (float)threadsPerBlock.x),
              (int) ceil(dim[1] / (float)threadsPerBlock.y), 1);

    conv<<<blocksPerGrid,threadsPerBlock>>>(tab_GPU, dim[0], dim[1], ndim, filter_GPU, s, output_GPU);

    hipMemcpy(tab_filtered, output_GPU, dim_dot*sizeof(float),
      hipMemcpyDeviceToHost);
    hipFree(tab_GPU);
    hipFree(filter_GPU);
    hipFree(output_GPU);
  }

  finish = clock();
  duration = (double)(finish - start) / CLOCKS_PER_SEC;
  printf("%f",duration);
}

	.text
	.file	"image.hip"
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI0_0:
	.long	0x41200000                      # float 10
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	%rsp, %rbx
	movq	%rbx, %rdi
	callq	_Z8open_imgP5Image
	movq	%rbx, %rdi
	movl	$5, %esi
	callq	_Z13box_filteringP5Imagei
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	_Z9write_imgP5Imagei
	movq	%rbx, %rdi
	callq	_Z8open_imgP5Image
	movq	%rbx, %rdi
	movl	$5, %esi
	callq	_Z18gaussian_filteringP5Imagei
	movq	%rbx, %rdi
	movl	$1, %esi
	callq	_Z9write_imgP5Imagei
	movq	%rbx, %rdi
	callq	_Z8open_imgP5Image
	movss	.LCPI0_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	movq	%rbx, %rdi
	movl	$5, %esi
	callq	_Z19bilateral_filteringP5Imageif
	movq	%rbx, %rdi
	movl	$2, %esi
	callq	_Z9write_imgP5Imagei
	xorl	%eax, %eax
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	main, .Lfunc_end0-main
	.cfi_endproc
                                        # -- End function
	.globl	_Z8open_imgP5Image              # -- Begin function _Z8open_imgP5Image
	.type	_Z8open_imgP5Image,@function
_Z8open_imgP5Image:                     # @_Z8open_imgP5Image
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdi, %rbx
	movl	$.L.str.3, %edi
	movl	$.L.str.4, %esi
	callq	fopen
	movq	%rax, %r14
	leaq	8(%rsp), %r15
	movl	$.L.str.5, %esi
	movq	%rax, %rdi
	movq	%r15, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movl	(%r15), %eax
	cmpl	$6, %eax
	je	.LBB1_9
# %bb.1:
	cmpl	$2, %eax
	jne	.LBB1_17
# %bb.2:
	leaq	16(%rsp), %r15
	leaq	12(%rsp), %r12
	movl	$.L.str.6, %esi
	movq	%r14, %rdi
	movq	%r15, %rdx
	movq	%r12, %rcx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	leaq	20(%rsp), %rbp
	movl	$.L.str.7, %esi
	movq	%r14, %rdi
	movq	%rbp, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movl	$2, 8(%rbx)
	movl	(%r15), %r13d
	movl	(%r12), %r12d
	movl	%r12d, %eax
	imull	%r13d, %eax
	movslq	%eax, %rdi
	shlq	$2, %rdi
	callq	malloc
	movq	%rax, (%rbx)
	movl	$8, %edi
	callq	malloc
	movq	%rax, 16(%rbx)
	movl	%r13d, (%rax)
	movl	%r12d, 4(%rax)
	movl	(%rbp), %eax
	movl	%eax, 24(%rbx)
	testl	%r13d, %r13d
	jle	.LBB1_16
# %bb.3:                                # %.preheader.preheader
	leaq	8(%rsp), %r15
	xorl	%ebp, %ebp
.LBB1_4:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_6 Depth 2
	testl	%r12d, %r12d
	jle	.LBB1_8
# %bb.5:                                # %.lr.ph45.preheader
                                        #   in Loop: Header=BB1_4 Depth=1
	xorl	%r13d, %r13d
.LBB1_6:                                # %.lr.ph45
                                        #   Parent Loop BB1_4 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	$.L.str.7, %esi
	movq	%r14, %rdi
	movq	%r15, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	xorps	%xmm0, %xmm0
	cvtsi2ssl	8(%rsp), %xmm0
	movslq	12(%rsp), %r12
	movl	%ebp, %eax
	imull	%r12d, %eax
	cltq
	shlq	$2, %rax
	addq	(%rbx), %rax
	movss	%xmm0, (%rax,%r13,4)
	incq	%r13
	cmpq	%r12, %r13
	jl	.LBB1_6
# %bb.7:                                # %._crit_edge46.loopexit
                                        #   in Loop: Header=BB1_4 Depth=1
	movl	16(%rsp), %r13d
.LBB1_8:                                # %._crit_edge46
                                        #   in Loop: Header=BB1_4 Depth=1
	incl	%ebp
	cmpl	%r13d, %ebp
	jl	.LBB1_4
	jmp	.LBB1_16
.LBB1_9:
	leaq	16(%rsp), %r12
	leaq	12(%rsp), %r13
	movl	$.L.str.6, %esi
	movq	%r14, %rdi
	movq	%r12, %rdx
	movq	%r13, %rcx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	leaq	20(%rsp), %rdx
	movl	$.L.str.7, %esi
	movq	%r14, %rdi
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movl	$3, %r15d
	movl	%r15d, 8(%rbx)
	movl	(%r12), %ebp
	movl	(%r13), %r12d
	movl	%ebp, %eax
	imull	%r12d, %eax
	leal	(%rax,%rax,2), %eax
	movslq	%eax, %rdi
	shlq	$2, %rdi
	callq	malloc
	movq	%rax, (%rbx)
	movl	$12, %edi
	callq	malloc
	movq	%rax, 16(%rbx)
	movl	%ebp, (%rax)
	movl	%r12d, 4(%rax)
	movl	%r15d, 8(%rax)
	leaq	20(%rsp), %rax
	movl	(%rax), %eax
	movl	%eax, 24(%rbx)
	testl	%ebp, %ebp
	jle	.LBB1_16
# %bb.10:                               # %.preheader40.preheader
	leaq	8(%rsp), %r15
	xorl	%r13d, %r13d
.LBB1_11:                               # %.preheader40
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_13 Depth 2
	testl	%r12d, %r12d
	jle	.LBB1_15
# %bb.12:                               # %.lr.ph.preheader
                                        #   in Loop: Header=BB1_11 Depth=1
	xorl	%ebp, %ebp
.LBB1_13:                               # %.lr.ph
                                        #   Parent Loop BB1_11 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	$.L.str.7, %esi
	movq	%r14, %rdi
	movq	%r15, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	xorps	%xmm0, %xmm0
	cvtsi2ssl	8(%rsp), %xmm0
	movslq	12(%rsp), %r12
	movl	%r13d, %eax
	imull	%r12d, %eax
	cltq
	shlq	$2, %rax
	addq	(%rbx), %rax
	movss	%xmm0, (%rax,%rbp,4)
	incq	%rbp
	cmpq	%r12, %rbp
	jl	.LBB1_13
# %bb.14:                               # %._crit_edge.loopexit
                                        #   in Loop: Header=BB1_11 Depth=1
	movl	16(%rsp), %ebp
.LBB1_15:                               # %._crit_edge
                                        #   in Loop: Header=BB1_11 Depth=1
	incl	%r13d
	cmpl	%ebp, %r13d
	jl	.LBB1_11
.LBB1_16:                               # %.sink.split
	movq	%r14, %rdi
	callq	fclose
.LBB1_17:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z8open_imgP5Image, .Lfunc_end1-_Z8open_imgP5Image
	.cfi_endproc
                                        # -- End function
	.globl	_Z13box_filteringP5Imagei       # -- Begin function _Z13box_filteringP5Imagei
	.type	_Z13box_filteringP5Imagei,@function
_Z13box_filteringP5Imagei:              # @_Z13box_filteringP5Imagei
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$16, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%esi, %r14d
	movq	%rdi, %rbx
	movl	8(%rdi), %r15d
	testl	%r15d, %r15d
	jle	.LBB2_1
# %bb.6:                                # %.lr.ph
	movq	16(%rbx), %rax
	movl	$1, %r12d
	xorl	%ecx, %ecx
.LBB2_7:                                # =>This Inner Loop Header: Depth=1
	movslq	(%rax,%rcx,4), %rdx
	movslq	%r12d, %r12
	imulq	%rdx, %r12
	incq	%rcx
	cmpq	%rcx, %r15
	jne	.LBB2_7
# %bb.2:                                # %._crit_edge.loopexit
	shlq	$2, %r12
	jmp	.LBB2_3
.LBB2_1:
	movl	$4, %r12d
.LBB2_3:                                # %._crit_edge
	cmpq	$2, %r15
	je	.LBB2_8
# %bb.4:                                # %._crit_edge
                                        # implicit-def: $r13
	cmpl	$3, %r15d
	jne	.LBB2_10
# %bb.5:
	leal	1(,%r14,2), %eax
	imull	%eax, %eax
	leal	(%rax,%rax,2), %eax
	jmp	.LBB2_9
.LBB2_8:                                # %.thread
	leal	1(,%r14,2), %eax
	imull	%eax, %eax
.LBB2_9:                                # %.sink.split
	movl	%eax, %edi
	shlq	$2, %rdi
	callq	malloc
	movq	%rax, %r13
.LBB2_10:
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, %r12
	movq	%r13, %rdi
	movl	%r14d, %esi
	movl	%r15d, %edx
	callq	_Z10box_filterPfii
	movq	(%rbx), %rdi
	movq	16(%rbx), %rdx
	movl	$16, (%rsp)
	movl	%r15d, %esi
	movq	%r13, %rcx
	movl	%r14d, %r8d
	movq	%r12, %r9
	callq	_Z8conv_GPUPfiPiS_iS_i
	movl	$10, %edi
	callq	putchar@PLT
	movq	%r12, (%rbx)
	addq	$16, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z13box_filteringP5Imagei, .Lfunc_end2-_Z13box_filteringP5Imagei
	.cfi_endproc
                                        # -- End function
	.globl	_Z9write_imgP5Imagei            # -- Begin function _Z9write_imgP5Imagei
	.type	_Z9write_imgP5Imagei,@function
_Z9write_imgP5Imagei:                   # @_Z9write_imgP5Imagei
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdi, %rbx
	movq	16(%rdi), %rax
	movl	(%rax), %ecx
	movq	%rcx, 24(%rsp)                  # 8-byte Spill
	movslq	4(%rax), %rcx
	movq	%rcx, %rax
	movq	%rcx, 8(%rsp)                   # 8-byte Spill
	movl	%ecx, %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	24(%rdi), %ebp
	movl	$.L.str.12, %edi
	cmpl	$2, %esi
	ja	.LBB3_2
# %bb.1:                                # %switch.lookup
	movl	%esi, %eax
	movq	.Lswitch.table._Z9write_imgP5Imagei(,%rax,8), %rdi
.LBB3_2:
	movl	$.L.str.9, %esi
	callq	fopen
	movq	%rax, %r12
	movl	$.L.str.13, %esi
	movq	%rax, %rdi
	movq	24(%rsp), %r14                  # 8-byte Reload
	movl	%r14d, %edx
	movq	16(%rsp), %rcx                  # 8-byte Reload
                                        # kill: def $ecx killed $ecx killed $rcx
	movl	%ebp, %r8d
	xorl	%eax, %eax
	callq	fprintf
	testl	%r14d, %r14d
	jle	.LBB3_6
# %bb.3:                                # %.preheader.lr.ph
	movq	8(%rsp), %rax                   # 8-byte Reload
	leaq	(,%rax,4), %rax
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	xorl	%ebp, %ebp
	xorl	%r13d, %r13d
.LBB3_4:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_7 Depth 2
	movq	16(%rsp), %r14                  # 8-byte Reload
	movq	%rbp, %r15
	cmpl	$0, 8(%rsp)                     # 4-byte Folded Reload
	jle	.LBB3_5
.LBB3_7:                                #   Parent Loop BB3_4 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	(%rbx), %rax
	cvttss2si	(%rax,%r15), %edx
	movl	$.L.str.7, %esi
	movq	%r12, %rdi
	xorl	%eax, %eax
	callq	fprintf
	addq	$4, %r15
	decq	%r14
	jne	.LBB3_7
.LBB3_5:                                # %._crit_edge
                                        #   in Loop: Header=BB3_4 Depth=1
	incq	%r13
	addq	32(%rsp), %rbp                  # 8-byte Folded Reload
	cmpq	24(%rsp), %r13                  # 8-byte Folded Reload
	jne	.LBB3_4
.LBB3_6:                                # %._crit_edge24
	movq	%r12, %rdi
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	fclose                          # TAILCALL
.Lfunc_end3:
	.size	_Z9write_imgP5Imagei, .Lfunc_end3-_Z9write_imgP5Imagei
	.cfi_endproc
                                        # -- End function
	.globl	_Z18gaussian_filteringP5Imagei  # -- Begin function _Z18gaussian_filteringP5Imagei
	.type	_Z18gaussian_filteringP5Imagei,@function
_Z18gaussian_filteringP5Imagei:         # @_Z18gaussian_filteringP5Imagei
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$16, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%esi, %r14d
	movq	%rdi, %rbx
	movl	8(%rdi), %r15d
	testl	%r15d, %r15d
	jle	.LBB4_1
# %bb.6:                                # %.lr.ph
	movq	16(%rbx), %rax
	movl	$1, %r12d
	xorl	%ecx, %ecx
.LBB4_7:                                # =>This Inner Loop Header: Depth=1
	movslq	(%rax,%rcx,4), %rdx
	movslq	%r12d, %r12
	imulq	%rdx, %r12
	incq	%rcx
	cmpq	%rcx, %r15
	jne	.LBB4_7
# %bb.2:                                # %._crit_edge.loopexit
	shlq	$2, %r12
	jmp	.LBB4_3
.LBB4_1:
	movl	$4, %r12d
.LBB4_3:                                # %._crit_edge
	cmpq	$2, %r15
	je	.LBB4_8
# %bb.4:                                # %._crit_edge
                                        # implicit-def: $r13
	cmpl	$3, %r15d
	jne	.LBB4_10
# %bb.5:
	leal	1(,%r14,2), %eax
	imull	%eax, %eax
	leal	(%rax,%rax,2), %eax
	jmp	.LBB4_9
.LBB4_8:                                # %.thread
	leal	1(,%r14,2), %eax
	imull	%eax, %eax
.LBB4_9:                                # %.sink.split
	movl	%eax, %edi
	shlq	$2, %rdi
	callq	malloc
	movq	%rax, %r13
.LBB4_10:
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, %r12
	movq	%r13, %rdi
	movl	%r14d, %esi
	movl	%r15d, %edx
	callq	_Z15gaussian_filterPfii
	movq	(%rbx), %rdi
	movl	8(%rbx), %esi
	movq	16(%rbx), %rdx
	movl	$16, (%rsp)
	movq	%r13, %rcx
	movl	%r14d, %r8d
	movq	%r12, %r9
	callq	_Z8conv_GPUPfiPiS_iS_i
	movl	$10, %edi
	callq	putchar@PLT
	movq	%r12, (%rbx)
	addq	$16, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z18gaussian_filteringP5Imagei, .Lfunc_end4-_Z18gaussian_filteringP5Imagei
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z19bilateral_filteringP5Imageif
.LCPI5_0:
	.long	0x3d800000                      # float 0.0625
.LCPI5_1:
	.long	0x40400000                      # float 3
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI5_2:
	.quad	0x412e848000000000              # double 1.0E+6
	.text
	.globl	_Z19bilateral_filteringP5Imageif
	.type	_Z19bilateral_filteringP5Imageif,@function
_Z19bilateral_filteringP5Imageif:       # @_Z19bilateral_filteringP5Imageif
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$168, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movss	%xmm0, 76(%rsp)                 # 4-byte Spill
                                        # kill: def $esi killed $esi def $rsi
	movq	%rsi, 24(%rsp)                  # 8-byte Spill
	movq	%rdi, %r14
	callq	clock
	movq	%rax, %rbx
	movl	8(%r14), %eax
                                        # implicit-def: $r15
	cmpl	$2, %eax
	movq	%r14, 144(%rsp)                 # 8-byte Spill
	movq	%rbx, 136(%rsp)                 # 8-byte Spill
	jne	.LBB5_11
# %bb.1:
	movq	24(%rsp), %rbx                  # 8-byte Reload
	leal	1(,%rbx,2), %eax
	movl	%eax, 20(%rsp)                  # 4-byte Spill
	movl	%eax, %edi
	imull	%edi, %edi
	shlq	$2, %rdi
	movq	%rdi, 104(%rsp)                 # 8-byte Spill
	callq	malloc
	movq	%rax, 96(%rsp)                  # 8-byte Spill
	movq	16(%r14), %rax
	movl	(%rax), %ecx
	movl	4(%rax), %eax
	movl	%eax, 88(%rsp)                  # 4-byte Spill
	movl	%ecx, 56(%rsp)                  # 4-byte Spill
	imull	%ecx, %eax
	movslq	%eax, %rdi
	shlq	$2, %rdi
	movq	%rdi, 112(%rsp)                 # 8-byte Spill
	callq	malloc
	movq	%rax, 80(%rsp)                  # 8-byte Spill
	testl	%ebx, %ebx
	js	.LBB5_6
# %bb.2:                                # %.preheader156.lr.ph
	movq	24(%rsp), %rbp                  # 8-byte Reload
	leal	(,%rbp,2), %r15d
	xorps	%xmm0, %xmm0
	cvtsi2ssl	20(%rsp), %xmm0         # 4-byte Folded Reload
	movaps	%xmm0, %xmm1
	addss	%xmm0, %xmm1
	mulss	%xmm0, %xmm1
	orl	$1, %r15d
                                        # kill: def $ebp killed $ebp killed $rbp def $rbp
	negl	%ebp
	xorl	%eax, %eax
	xorl	%r12d, %r12d
	movss	%xmm1, 44(%rsp)                 # 4-byte Spill
.LBB5_3:                                # %.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB5_4 Depth 2
	movq	%rax, 120(%rsp)                 # 8-byte Spill
	movl	%eax, %eax
	movq	96(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%rax,4), %r13
	movl	%r12d, %ebx
	subl	24(%rsp), %ebx                  # 4-byte Folded Reload
	imull	%ebx, %ebx
	xorl	%r14d, %r14d
.LBB5_4:                                #   Parent Loop BB5_3 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	leal	(%r14,%rbp), %eax
	imull	%eax, %eax
	addl	%ebx, %eax
	negl	%eax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	divss	%xmm1, %xmm0
	callq	expf
	movss	44(%rsp), %xmm1                 # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	movss	%xmm0, (%r13,%r14,4)
	incq	%r14
	cmpq	%r14, %r15
	jne	.LBB5_4
# %bb.5:                                # %._crit_edge
                                        #   in Loop: Header=BB5_3 Depth=1
	incq	%r12
	movq	120(%rsp), %rax                 # 8-byte Reload
	addl	20(%rsp), %eax                  # 4-byte Folded Reload
	cmpq	%r15, %r12
	jne	.LBB5_3
.LBB5_6:                                # %._crit_edge161
	leaq	64(%rsp), %rbp
	movq	%rbp, %rdi
	movq	112(%rsp), %r12                 # 8-byte Reload
	movq	%r12, %rsi
	callq	hipMalloc
	leaq	32(%rsp), %rbx
	movq	%rbx, %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	leaq	48(%rsp), %rdi
	movq	104(%rsp), %r13                 # 8-byte Reload
	movq	%r13, %rsi
	callq	hipMalloc
	movq	(%rbp), %rdi
	movq	144(%rsp), %r14                 # 8-byte Reload
	movq	(%r14), %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbx), %rdi
	movq	80(%rsp), %r15                  # 8-byte Reload
	movq	%r15, %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	48(%rsp), %rax
	movq	(%rax), %rdi
	movq	96(%rsp), %rsi                  # 8-byte Reload
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	56(%rsp), %ebp                  # 4-byte Reload
	xorps	%xmm0, %xmm0
	cvtsi2ss	%ebp, %xmm0
	mulss	.LCPI5_0(%rip), %xmm0
	callq	ceilf@PLT
	cvttss2si	%xmm0, %ebx
	movl	88(%rsp), %r13d                 # 4-byte Reload
	xorps	%xmm0, %xmm0
	cvtsi2ss	%r13d, %xmm0
	mulss	.LCPI5_0(%rip), %xmm0
	callq	ceilf@PLT
	cvttss2si	%xmm0, %edi
	shlq	$32, %rdi
	orq	%rbx, %rdi
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_8
# %bb.7:
	movq	64(%rsp), %rdi
	movl	8(%r14), %ecx
	movq	48(%rsp), %r8
	movq	32(%rsp), %rax
	movq	%rax, (%rsp)
	movl	%ebp, %esi
	movl	%r13d, %edx
	movq	24(%rsp), %r9                   # 8-byte Reload
                                        # kill: def $r9d killed $r9d killed $r9
	movss	76(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	callq	_Z23__device_stub__conv_bilPfiiiS_iS_f
.LBB5_8:
	callq	hipGetLastError
	testl	%eax, %eax
	movq	136(%rsp), %rbx                 # 8-byte Reload
	je	.LBB5_10
# %bb.9:
	movl	$.Lstr.1, %edi
	callq	puts@PLT
.LBB5_10:
	movq	32(%rsp), %rsi
	movq	%r15, %rdi
	movq	%r12, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	64(%rsp), %rdi
	callq	hipFree
	movq	48(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movl	8(%r14), %eax
.LBB5_11:
	cmpl	$3, %eax
	jne	.LBB5_24
# %bb.12:
	movq	24(%rsp), %r15                  # 8-byte Reload
	leal	(%r15,%r15), %ebx
	leal	1(,%r15,2), %ebp
	movl	%ebp, %eax
	imull	%eax, %eax
	leal	(%rax,%rax,2), %edi
	shlq	$2, %rdi
	movq	%rdi, 160(%rsp)                 # 8-byte Spill
	callq	malloc
	movq	%rax, %r12
	movq	16(%r14), %rax
	movl	(%rax), %ecx
	movl	4(%rax), %edx
	movl	%ecx, 132(%rsp)                 # 4-byte Spill
	movl	%ecx, %eax
	movl	%edx, 128(%rsp)                 # 4-byte Spill
	imull	%edx, %eax
	leal	(%rax,%rax,2), %eax
	movslq	%eax, %rdi
	shlq	$2, %rdi
	movq	%rdi, 104(%rsp)                 # 8-byte Spill
	callq	malloc
	xorps	%xmm0, %xmm0
	cvtsi2ss	%ebp, %xmm0
	movq	%rax, 80(%rsp)                  # 8-byte Spill
	movaps	%xmm0, %xmm1
	addss	%xmm0, %xmm1
	mulss	%xmm0, %xmm1
	mulss	.LCPI5_1(%rip), %xmm1
	xorl	%eax, %eax
	movq	%rax, 56(%rsp)                  # 8-byte Spill
	testl	%ebx, %ebx
	movl	$0, %eax
	cmovgl	%ebx, %eax
	leal	1(%rax), %ecx
	movq	%rcx, 96(%rsp)                  # 8-byte Spill
	movl	%r15d, %ecx
	negl	%ecx
	movl	%ecx, 20(%rsp)                  # 4-byte Spill
	movslq	%ebx, %rcx
	leaq	(%rcx,%rcx,2), %rcx
	leaq	12(,%rcx,4), %rcx
	movq	%rcx, 112(%rsp)                 # 8-byte Spill
	leaq	(%rax,%rax,2), %rax
	leaq	12(,%rax,4), %r13
	movq	%r12, 152(%rsp)                 # 8-byte Spill
	movq	%r12, 88(%rsp)                  # 8-byte Spill
	movss	%xmm1, 44(%rsp)                 # 4-byte Spill
.LBB5_13:                               # %.preheader155
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB5_15 Depth 2
                                        #       Child Loop BB5_16 Depth 3
	cmpl	$0, 24(%rsp)                    # 4-byte Folded Reload
	js	.LBB5_18
# %bb.14:                               # %.preheader.lr.ph
                                        #   in Loop: Header=BB5_13 Depth=1
	movq	56(%rsp), %rax                  # 8-byte Reload
	leal	-1(%rax), %ebx
	imull	%ebx, %ebx
	movq	88(%rsp), %r15                  # 8-byte Reload
	xorl	%eax, %eax
.LBB5_15:                               # %.preheader
                                        #   Parent Loop BB5_13 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB5_16 Depth 3
	movq	%rax, 120(%rsp)                 # 8-byte Spill
	movl	%eax, %ebp
	subl	24(%rsp), %ebp                  # 4-byte Folded Reload
	imull	%ebp, %ebp
	xorl	%r14d, %r14d
	movl	20(%rsp), %r12d                 # 4-byte Reload
.LBB5_16:                               #   Parent Loop BB5_13 Depth=1
                                        #     Parent Loop BB5_15 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movl	%r12d, %eax
	imull	%r12d, %eax
	addl	%ebp, %eax
	addl	%ebx, %eax
	negl	%eax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	divss	%xmm1, %xmm0
	callq	expf
	movss	44(%rsp), %xmm1                 # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	movss	%xmm0, (%r15,%r14)
	incl	%r12d
	addq	$12, %r14
	cmpq	%r14, %r13
	jne	.LBB5_16
# %bb.17:                               # %._crit_edge165
                                        #   in Loop: Header=BB5_15 Depth=2
	movq	120(%rsp), %rax                 # 8-byte Reload
	incq	%rax
	addq	112(%rsp), %r15                 # 8-byte Folded Reload
	cmpq	96(%rsp), %rax                  # 8-byte Folded Reload
	jne	.LBB5_15
.LBB5_18:                               # %._crit_edge168
                                        #   in Loop: Header=BB5_13 Depth=1
	movq	56(%rsp), %rcx                  # 8-byte Reload
	incq	%rcx
	addq	$4, 88(%rsp)                    # 8-byte Folded Spill
	movq	%rcx, %rax
	movq	%rcx, 56(%rsp)                  # 8-byte Spill
	cmpq	$3, %rcx
	jne	.LBB5_13
# %bb.19:
	leaq	64(%rsp), %rbx
	movq	%rbx, %rdi
	movq	104(%rsp), %r13                 # 8-byte Reload
	movq	%r13, %rsi
	callq	hipMalloc
	leaq	32(%rsp), %r12
	movq	%r12, %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	leaq	48(%rsp), %rbp
	movq	%rbp, %rdi
	movq	160(%rsp), %r15                 # 8-byte Reload
	movq	%r15, %rsi
	callq	hipMalloc
	movq	(%rbx), %rdi
	movq	144(%rsp), %r14                 # 8-byte Reload
	movq	(%r14), %rsi
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r12), %rdi
	movq	80(%rsp), %rsi                  # 8-byte Reload
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbp), %rdi
	movq	152(%rsp), %rsi                 # 8-byte Reload
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	132(%rsp), %ebp                 # 4-byte Reload
	xorps	%xmm0, %xmm0
	cvtsi2ss	%ebp, %xmm0
	mulss	.LCPI5_0(%rip), %xmm0
	callq	ceilf@PLT
	cvttss2si	%xmm0, %ebx
	movl	128(%rsp), %r12d                # 4-byte Reload
	xorps	%xmm0, %xmm0
	cvtsi2ss	%r12d, %xmm0
	mulss	.LCPI5_0(%rip), %xmm0
	callq	ceilf@PLT
	cvttss2si	%xmm0, %edi
	shlq	$32, %rdi
	orq	%rbx, %rdi
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movl	$1, %esi
	movl	$3, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_21
# %bb.20:
	movq	64(%rsp), %rdi
	movl	8(%r14), %ecx
	movq	48(%rsp), %r8
	movq	32(%rsp), %rax
	movq	%rax, (%rsp)
	movl	%ebp, %esi
	movl	%r12d, %edx
	movq	24(%rsp), %r9                   # 8-byte Reload
                                        # kill: def $r9d killed $r9d killed $r9
	movss	76(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	callq	_Z23__device_stub__conv_bilPfiiiS_iS_f
.LBB5_21:
	callq	hipGetLastError
	testl	%eax, %eax
	movq	136(%rsp), %rbx                 # 8-byte Reload
	je	.LBB5_23
# %bb.22:
	movl	$.Lstr.1, %edi
	callq	puts@PLT
.LBB5_23:
	movq	32(%rsp), %rsi
	movq	80(%rsp), %r15                  # 8-byte Reload
	movq	%r15, %rdi
	movq	%r13, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	64(%rsp), %rdi
	callq	hipFree
	movq	48(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
.LBB5_24:
	callq	clock
	subq	%rbx, %rax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI5_2(%rip), %xmm0
	movl	$.L.str.2, %edi
	movb	$1, %al
	callq	printf
	movq	%r15, (%r14)
	addq	$168, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z19bilateral_filteringP5Imageif, .Lfunc_end5-_Z19bilateral_filteringP5Imageif
	.cfi_endproc
                                        # -- End function
	.globl	_Z10box_filterPfii              # -- Begin function _Z10box_filterPfii
	.type	_Z10box_filterPfii,@function
_Z10box_filterPfii:                     # @_Z10box_filterPfii
	.cfi_startproc
# %bb.0:
                                        # kill: def $esi killed $esi def $rsi
	cmpl	$3, %edx
	je	.LBB6_8
# %bb.1:
	cmpl	$2, %edx
	jne	.LBB6_7
# %bb.2:                                # %.preheader35
	testl	%esi, %esi
	js	.LBB6_7
# %bb.3:                                # %.preheader34.lr.ph
	movl	%esi, %eax
	addl	%eax, %eax
	leal	1(,%rsi,2), %ecx
	xorl	%edx, %edx
	testl	%eax, %eax
	cmovlel	%edx, %eax
	orl	$1, %eax
	xorl	%esi, %esi
.LBB6_4:                                # %.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB6_5 Depth 2
	movl	%edx, %r8d
	leaq	(%rdi,%r8,4), %r8
	xorl	%r9d, %r9d
.LBB6_5:                                #   Parent Loop BB6_4 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	$1065353216, (%r8,%r9,4)        # imm = 0x3F800000
	incq	%r9
	cmpq	%r9, %rax
	jne	.LBB6_5
# %bb.6:                                # %._crit_edge
                                        #   in Loop: Header=BB6_4 Depth=1
	incq	%rsi
	addl	%ecx, %edx
	cmpq	%rax, %rsi
	jne	.LBB6_4
	jmp	.LBB6_7
.LBB6_8:
	testl	%esi, %esi
	js	.LBB6_7
# %bb.9:                                # %.preheader33.lr.ph
	addl	%esi, %esi
	xorl	%eax, %eax
	testl	%esi, %esi
	movl	$0, %ecx
	cmovgl	%esi, %ecx
	orl	$1, %ecx
	movslq	%esi, %rdx
	leaq	(%rdx,%rdx,2), %rdx
	leaq	12(,%rdx,4), %rdx
.LBB6_10:                               # %.preheader.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB6_11 Depth 2
                                        #       Child Loop BB6_12 Depth 3
	movq	%rdi, %rsi
	xorl	%r8d, %r8d
.LBB6_11:                               # %.preheader
                                        #   Parent Loop BB6_10 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB6_12 Depth 3
	xorl	%r9d, %r9d
.LBB6_12:                               #   Parent Loop BB6_10 Depth=1
                                        #     Parent Loop BB6_11 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movl	$1065353216, (%rsi,%r9,4)       # imm = 0x3F800000
	incq	%r9
	cmpq	$3, %r9
	jne	.LBB6_12
# %bb.13:                               #   in Loop: Header=BB6_11 Depth=2
	incq	%r8
	addq	$12, %rsi
	cmpq	%rcx, %r8
	jne	.LBB6_11
# %bb.14:                               # %._crit_edge44
                                        #   in Loop: Header=BB6_10 Depth=1
	incq	%rax
	addq	%rdx, %rdi
	cmpq	%rcx, %rax
	jne	.LBB6_10
.LBB6_7:                                # %._crit_edge40
	retq
.Lfunc_end6:
	.size	_Z10box_filterPfii, .Lfunc_end6-_Z10box_filterPfii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z8conv_GPUPfiPiS_iS_i
.LCPI7_0:
	.quad	0x412e848000000000              # double 1.0E+6
	.text
	.globl	_Z8conv_GPUPfiPiS_iS_i
	.type	_Z8conv_GPUPfiPiS_iS_i,@function
_Z8conv_GPUPfiPiS_iS_i:                 # @_Z8conv_GPUPfiPiS_iS_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %rbp
	movl	%r8d, %r14d
	movq	%rcx, 16(%rsp)                  # 8-byte Spill
	movq	%rdx, %r13
	movl	%esi, %ebx
	movq	%rdi, 64(%rsp)                  # 8-byte Spill
	callq	clock
	movq	%rax, %r12
	testl	%ebx, %ebx
	jle	.LBB7_1
# %bb.7:                                # %.lr.ph.preheader
	movl	%ebx, %eax
	movl	$1, %r15d
	xorl	%ecx, %ecx
.LBB7_8:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movslq	(%r13,%rcx,4), %rdx
	movslq	%r15d, %r15
	imulq	%rdx, %r15
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB7_8
# %bb.2:                                # %._crit_edge.loopexit
	shlq	$2, %r15
	jmp	.LBB7_3
.LBB7_1:
	movl	$4, %r15d
.LBB7_3:                                # %._crit_edge
	cmpl	$2, %ebx
	je	.LBB7_9
# %bb.4:                                # %._crit_edge
	cmpl	$3, %ebx
	jne	.LBB7_13
# %bb.5:
	movq	%rbp, 48(%rsp)                  # 8-byte Spill
	movq	%r12, 56(%rsp)                  # 8-byte Spill
	leaq	32(%rsp), %r12
	movq	%r12, %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	movq	%r14, 40(%rsp)                  # 8-byte Spill
	leal	1(,%r14,2), %eax
	imull	%eax, %eax
	leal	(%rax,%rax,2), %ebx
	shlq	$2, %rbx
	leaq	24(%rsp), %rbp
	movq	%rbp, %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	(%r12), %rdi
	movq	64(%rsp), %r14                  # 8-byte Reload
	movq	%r14, %rsi
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	8(%rsp), %rax
	movq	(%rax), %rdi
	movq	%r14, %rsi
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbp), %rdi
	movq	16(%rsp), %rsi                  # 8-byte Reload
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	128(%rsp), %eax
	movq	%rax, %rbx
	shlq	$32, %rbx
	orq	%rax, %rbx
	cvtsi2ssl	(%r13), %xmm0
	cvtsi2ss	%rax, %xmm1
	movss	%xmm1, 16(%rsp)                 # 4-byte Spill
	divss	%xmm1, %xmm0
	callq	ceilf@PLT
	cvttss2si	%xmm0, %r14d
	xorps	%xmm0, %xmm0
	cvtsi2ssl	4(%r13), %xmm0
	divss	16(%rsp), %xmm0                 # 4-byte Folded Reload
	callq	ceilf@PLT
	cvttss2si	%xmm0, %edi
	shlq	$32, %rdi
	orq	%r14, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$3, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_12
# %bb.6:
	movq	32(%rsp), %rdi
	movl	(%r13), %esi
	movl	4(%r13), %edx
	movq	24(%rsp), %r8
	movq	8(%rsp), %rax
	movq	%rax, (%rsp)
	movl	$3, %ecx
	jmp	.LBB7_11
.LBB7_9:
	movq	%rbp, 48(%rsp)                  # 8-byte Spill
	movq	%r12, 56(%rsp)                  # 8-byte Spill
	leaq	32(%rsp), %r12
	movq	%r12, %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	movq	%r14, 40(%rsp)                  # 8-byte Spill
	leal	1(,%r14,2), %ebx
	imull	%ebx, %ebx
	shlq	$2, %rbx
	leaq	24(%rsp), %rbp
	movq	%rbp, %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	(%r12), %rdi
	movq	64(%rsp), %r14                  # 8-byte Reload
	movq	%r14, %rsi
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	8(%rsp), %rax
	movq	(%rax), %rdi
	movq	%r14, %rsi
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbp), %rdi
	movq	16(%rsp), %rsi                  # 8-byte Reload
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	128(%rsp), %eax
	movq	%rax, %rbx
	shlq	$32, %rbx
	orq	%rax, %rbx
	cvtsi2ssl	(%r13), %xmm0
	cvtsi2ss	%rax, %xmm1
	movss	%xmm1, 16(%rsp)                 # 4-byte Spill
	divss	%xmm1, %xmm0
	callq	ceilf@PLT
	cvttss2si	%xmm0, %r14d
	xorps	%xmm0, %xmm0
	cvtsi2ssl	4(%r13), %xmm0
	divss	16(%rsp), %xmm0                 # 4-byte Folded Reload
	callq	ceilf@PLT
	cvttss2si	%xmm0, %edi
	shlq	$32, %rdi
	orq	%r14, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_12
# %bb.10:
	movq	32(%rsp), %rdi
	movl	(%r13), %esi
	movl	4(%r13), %edx
	movq	24(%rsp), %r8
	movq	8(%rsp), %rax
	movq	%rax, (%rsp)
	movl	$2, %ecx
.LBB7_11:
	movq	40(%rsp), %r9                   # 8-byte Reload
                                        # kill: def $r9d killed $r9d killed $r9
	callq	_Z19__device_stub__convPfiiiS_iS_
.LBB7_12:
	movq	8(%rsp), %rsi
	movq	48(%rsp), %rdi                  # 8-byte Reload
	movq	%r15, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	56(%rsp), %r12                  # 8-byte Reload
.LBB7_13:
	callq	clock
	subq	%r12, %rax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI7_0(%rip), %xmm0
	movl	$.L.str.14, %edi
	movb	$1, %al
	callq	printf
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	_Z8conv_GPUPfiPiS_iS_i, .Lfunc_end7-_Z8conv_GPUPfiPiS_iS_i
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z15gaussian_filterPfii
.LCPI8_0:
	.long	0x40400000                      # float 3
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0
.LCPI8_1:
	.long	0x80000000                      # float -0
	.long	0x80000000                      # float -0
	.long	0x80000000                      # float -0
	.long	0x80000000                      # float -0
	.text
	.globl	_Z15gaussian_filterPfii
	.type	_Z15gaussian_filterPfii,@function
_Z15gaussian_filterPfii:                # @_Z15gaussian_filterPfii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
                                        # kill: def $esi killed $esi def $rsi
	movq	%rdi, %rbx
	leal	(%rsi,%rsi), %r15d
	movq	%rsi, 8(%rsp)                   # 8-byte Spill
	leal	1(,%rsi,2), %eax
	movl	%eax, 16(%rsp)                  # 4-byte Spill
	cvtsi2ss	%eax, %xmm0
	cmpl	$3, %edx
	je	.LBB8_7
# %bb.1:
	cmpl	$2, %edx
	jne	.LBB8_14
# %bb.2:                                # %.preheader58
	cmpl	$0, 8(%rsp)                     # 4-byte Folded Reload
	js	.LBB8_14
# %bb.3:                                # %.preheader57.lr.ph
	movaps	%xmm0, %xmm1
	addss	%xmm0, %xmm1
	mulss	%xmm0, %xmm1
	xorl	%eax, %eax
	testl	%r15d, %r15d
	cmovlel	%eax, %r15d
	orl	$1, %r15d
	movq	8(%rsp), %r13                   # 8-byte Reload
                                        # kill: def $r13d killed $r13d killed $r13 def $r13
	negl	%r13d
	xorl	%ecx, %ecx
	movss	%xmm1, 4(%rsp)                  # 4-byte Spill
.LBB8_4:                                # %.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB8_5 Depth 2
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	movl	%eax, %eax
	leaq	(%rbx,%rax,4), %r14
	movq	%rcx, 24(%rsp)                  # 8-byte Spill
	movl	%ecx, %r12d
	subl	8(%rsp), %r12d                  # 4-byte Folded Reload
	imull	%r12d, %r12d
	xorl	%ebp, %ebp
.LBB8_5:                                #   Parent Loop BB8_4 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	leal	(%r13,%rbp), %eax
	imull	%eax, %eax
	addl	%r12d, %eax
	negl	%eax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	divss	%xmm1, %xmm0
	callq	expf
	movss	4(%rsp), %xmm1                  # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	movss	%xmm0, (%r14,%rbp,4)
	incq	%rbp
	cmpq	%rbp, %r15
	jne	.LBB8_5
# %bb.6:                                # %._crit_edge
                                        #   in Loop: Header=BB8_4 Depth=1
	movq	24(%rsp), %rcx                  # 8-byte Reload
	incq	%rcx
	movq	32(%rsp), %rax                  # 8-byte Reload
	addl	16(%rsp), %eax                  # 4-byte Folded Reload
	cmpq	%r15, %rcx
	jne	.LBB8_4
	jmp	.LBB8_14
.LBB8_7:
	cmpl	$0, 8(%rsp)                     # 4-byte Folded Reload
	js	.LBB8_14
# %bb.8:                                # %.preheader56.lr.ph
	movaps	%xmm0, %xmm1
	addss	%xmm0, %xmm1
	mulss	%xmm0, %xmm1
	mulss	.LCPI8_0(%rip), %xmm1
	xorl	%ecx, %ecx
	testl	%r15d, %r15d
	movl	$0, %r13d
	cmovgl	%r15d, %r13d
	orl	$1, %r13d
	movslq	%r15d, %rax
	leaq	(%rax,%rax,2), %rax
	leaq	12(,%rax,4), %rax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movaps	.LCPI8_1(%rip), %xmm2           # xmm2 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0]
	movss	%xmm1, 4(%rsp)                  # 4-byte Spill
.LBB8_9:                                # %.preheader.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB8_10 Depth 2
                                        #       Child Loop BB8_11 Depth 3
	movq	%rcx, 24(%rsp)                  # 8-byte Spill
	movl	%ecx, %ebp
	subl	8(%rsp), %ebp                   # 4-byte Folded Reload
	imull	%ebp, %ebp
	movq	%rbx, 32(%rsp)                  # 8-byte Spill
	movq	%rbx, %r14
	xorl	%r15d, %r15d
.LBB8_10:                               # %.preheader
                                        #   Parent Loop BB8_9 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB8_11 Depth 3
	movl	%r15d, %r12d
	subl	8(%rsp), %r12d                  # 4-byte Folded Reload
	imull	%r12d, %r12d
	addl	%ebp, %r12d
	movq	$-1, %rbx
.LBB8_11:                               #   Parent Loop BB8_9 Depth=1
                                        #     Parent Loop BB8_10 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movl	%ebx, %eax
	imull	%ebx, %eax
	addl	%r12d, %eax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	xorps	%xmm2, %xmm0
	divss	%xmm1, %xmm0
	callq	expf
	movaps	.LCPI8_1(%rip), %xmm2           # xmm2 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0]
	movss	4(%rsp), %xmm1                  # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	movss	%xmm0, 4(%r14,%rbx,4)
	incq	%rbx
	cmpq	$2, %rbx
	jne	.LBB8_11
# %bb.12:                               #   in Loop: Header=BB8_10 Depth=2
	incq	%r15
	addq	$12, %r14
	cmpq	%r13, %r15
	jne	.LBB8_10
# %bb.13:                               # %._crit_edge67
                                        #   in Loop: Header=BB8_9 Depth=1
	movq	24(%rsp), %rcx                  # 8-byte Reload
	incq	%rcx
	movq	32(%rsp), %rbx                  # 8-byte Reload
	addq	16(%rsp), %rbx                  # 8-byte Folded Reload
	cmpq	%r13, %rcx
	jne	.LBB8_9
.LBB8_14:                               # %._crit_edge63
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	_Z15gaussian_filterPfii, .Lfunc_end8-_Z15gaussian_filterPfii
	.cfi_endproc
                                        # -- End function
	.globl	_Z23__device_stub__conv_bilPfiiiS_iS_f # -- Begin function _Z23__device_stub__conv_bilPfiiiS_iS_f
	.type	_Z23__device_stub__conv_bilPfiiiS_iS_f,@function
_Z23__device_stub__conv_bilPfiiiS_iS_f: # @_Z23__device_stub__conv_bilPfiiiS_iS_f
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	28(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	24(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	48(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	16(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	12(%rsp), %r9
	movss	%xmm0, (%r9)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	movq	%r9, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	40(%rsp), %r12
	leaq	32(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8conv_bilPfiiiS_iS_f, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end9:
	.size	_Z23__device_stub__conv_bilPfiiiS_iS_f, .Lfunc_end9-_Z23__device_stub__conv_bilPfiiiS_iS_f
	.cfi_endproc
                                        # -- End function
	.globl	_Z19__device_stub__convPfiiiS_iS_ # -- Begin function _Z19__device_stub__convPfiiiS_iS_
	.type	_Z19__device_stub__convPfiiiS_iS_,@function
_Z19__device_stub__convPfiiiS_iS_:      # @_Z19__device_stub__convPfiiiS_iS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	12(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	8(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	32(%rsp), %rcx
	movq	%r8, (%rcx)
	movq	%rsp, %r8
	movl	%r9d, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	192(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z4convPfiiiS_iS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end10:
	.size	_Z19__device_stub__convPfiiiS_iS_, .Lfunc_end10-_Z19__device_stub__convPfiiiS_iS_
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB11_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB11_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z4convPfiiiS_iS_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8conv_bilPfiiiS_iS_f, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end11:
	.size	__hip_module_ctor, .Lfunc_end11-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB12_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB12_2:
	retq
.Lfunc_end12:
	.size	__hip_module_dtor, .Lfunc_end12-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z8conv_bilPfiiiS_iS_f,@object  # @_Z8conv_bilPfiiiS_iS_f
	.section	.rodata,"a",@progbits
	.globl	_Z8conv_bilPfiiiS_iS_f
	.p2align	3, 0x0
_Z8conv_bilPfiiiS_iS_f:
	.quad	_Z23__device_stub__conv_bilPfiiiS_iS_f
	.size	_Z8conv_bilPfiiiS_iS_f, 8

	.type	.L.str.2,@object                # @.str.2
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.2:
	.asciz	"%f\n"
	.size	.L.str.2, 4

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"image_256x256.pgm"
	.size	.L.str.3, 18

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"r"
	.size	.L.str.4, 2

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"P%d\n"
	.size	.L.str.5, 5

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"%d %d\n"
	.size	.L.str.6, 7

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"%d\n"
	.size	.L.str.7, 4

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"test_box.pgm"
	.size	.L.str.8, 13

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"w+"
	.size	.L.str.9, 3

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"test_gauss.pgm"
	.size	.L.str.10, 15

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"test_bil.pgm"
	.size	.L.str.11, 13

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"test.pgm"
	.size	.L.str.12, 9

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	"P2\n%d %d\n%d\n"
	.size	.L.str.13, 13

	.type	_Z4convPfiiiS_iS_,@object       # @_Z4convPfiiiS_iS_
	.section	.rodata,"a",@progbits
	.globl	_Z4convPfiiiS_iS_
	.p2align	3, 0x0
_Z4convPfiiiS_iS_:
	.quad	_Z19__device_stub__convPfiiiS_iS_
	.size	_Z4convPfiiiS_iS_, 8

	.type	.L.str.14,@object               # @.str.14
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.14:
	.asciz	"%f"
	.size	.L.str.14, 3

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z4convPfiiiS_iS_"
	.size	.L__unnamed_1, 18

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z8conv_bilPfiiiS_iS_f"
	.size	.L__unnamed_2, 23

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr.1,@object                 # @str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr.1:
	.asciz	"Error!"
	.size	.Lstr.1, 7

	.type	.Lswitch.table._Z9write_imgP5Imagei,@object # @switch.table._Z9write_imgP5Imagei
	.section	.rodata,"a",@progbits
	.p2align	3, 0x0
.Lswitch.table._Z9write_imgP5Imagei:
	.quad	.L.str.8
	.quad	.L.str.10
	.quad	.L.str.11
	.size	.Lswitch.table._Z9write_imgP5Imagei, 24

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z23__device_stub__conv_bilPfiiiS_iS_f
	.addrsig_sym _Z19__device_stub__convPfiiiS_iS_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z8conv_bilPfiiiS_iS_f
	.addrsig_sym _Z4convPfiiiS_iS_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z4convPfiiiS_iS_       ; -- Begin function _Z4convPfiiiS_iS_
	.globl	_Z4convPfiiiS_iS_
	.p2align	8
	.type	_Z4convPfiiiS_iS_,@function
_Z4convPfiiiS_iS_:                      ; @_Z4convPfiiiS_iS_
; %bb.0:
	s_clause 0x5
	s_load_b32 s9, s[0:1], 0x3c
	s_load_b128 s[4:7], s[0:1], 0x8
	s_load_b64 s[2:3], s[0:1], 0x18
	s_load_b32 s8, s[0:1], 0x20
	s_load_b64 s[16:17], s[0:1], 0x28
	s_load_b64 s[10:11], s[0:1], 0x0
	v_and_b32_e32 v3, 0x3ff, v0
	s_add_u32 s18, s0, 48
	s_addc_u32 s19, s1, 0
	v_bfe_u32 v9, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s1, s9, 0xffff
	s_lshr_b32 s0, s9, 16
	v_mad_u64_u32 v[1:2], null, s13, s1, v[3:4]
	s_mul_i32 s14, s14, s0
	s_cmp_eq_u32 s6, 2
	v_add_nc_u32_e32 v2, s14, v9
	s_cselect_b32 s1, -1, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_ge_i32_e32 vcc_lo, s4, v1
	v_cmp_ge_i32_e64 s0, s5, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s0
	s_and_b32 s0, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s7, s0
	s_cbranch_execz .LBB0_10
; %bb.1:
	v_mad_u64_u32 v[5:6], null, v1, s5, v[2:3]
	s_ashr_i32 s9, s8, 31
	v_mov_b32_e32 v12, 0
	s_lshl_b64 s[0:1], s[8:9], 2
	s_mov_b32 s24, 1
	s_add_u32 s0, s2, s0
	s_addc_u32 s1, s3, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v6, 31, v5
	s_load_b32 s9, s[0:1], 0x0
	s_cmp_lt_i32 s8, 1
	v_lshlrev_b64 v[3:4], 2, v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, s10, v3
	v_add_co_ci_u32_e32 v7, vcc_lo, s11, v4, vcc_lo
	v_add_co_u32 v3, vcc_lo, s16, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s17, v4, vcc_lo
	global_load_b32 v6, v[6:7], off
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_mul_f32_e32 v10, s9, v6
	global_store_b32 v[3:4], v10, off
	global_load_b32 v11, v12, s[0:1]
	s_cbranch_scc1 .LBB0_9
; %bb.2:                                ; %.lr.ph486
	s_lshl_b32 s12, s8, 1
	s_add_i32 s21, s8, 1
	s_add_i32 s20, s12, 2
	s_or_b32 s9, s12, 1
	s_mul_i32 s25, s8, s20
	s_add_i32 s20, s8, -1
	s_mul_i32 s21, s21, s9
	s_mul_i32 s20, s20, s9
	v_add_nc_u32_e32 v13, -1, v1
	v_add_nc_u32_e32 v14, 1, v1
	s_add_i32 s28, s8, s20
	s_add_i32 s20, s8, s21
	s_mov_b32 s13, 0
	s_sub_i32 s26, 0, s8
	s_add_i32 s27, s25, -1
	s_not_b32 s29, s12
	s_add_i32 s30, s20, -1
	s_add_i32 s20, s20, 1
.LBB0_3:                                ; %.lr.ph
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_4 Depth 2
	v_add_nc_u32_e32 v6, s24, v1
	s_mov_b32 s21, s13
	s_mov_b32 s31, 1
	s_lshl_b64 s[22:23], s[20:21], 2
	s_mov_b32 s33, s13
	v_cmp_le_i32_e32 vcc_lo, s4, v6
	s_add_u32 s22, s2, s22
	s_addc_u32 s23, s3, s23
	s_add_i32 s12, s24, s8
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_mul_i32 s12, s12, s9
	v_cndmask_b32_e64 v8, 0, s4, vcc_lo
	s_add_i32 s12, s12, s8
	s_lshl_b64 s[34:35], s[12:13], 2
	s_delay_alu instid0(VALU_DEP_1)
	v_sub_nc_u32_e32 v6, v6, v8
	s_add_u32 s34, s2, s34
	s_addc_u32 s35, s3, s35
	s_sub_i32 s12, s8, s24
	v_sub_nc_u32_e32 v8, v14, v8
	v_mul_lo_u32 v6, v6, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v7, 31, v6
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, s10, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s11, v7, vcc_lo
	global_load_b32 v17, v[6:7], off
	global_load_b32 v15, v12, s[34:35]
	v_subrev_nc_u32_e32 v6, s24, v1
	s_mul_i32 s34, s12, s9
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_ashr_i32 s35, s34, 31
	v_ashrrev_i32_e32 v7, 31, v6
	s_lshl_b64 s[34:35], s[34:35], 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_add_u32 s34, s0, s34
	s_addc_u32 s35, s1, s35
	v_and_b32_e32 v18, s4, v7
	global_load_b32 v16, v12, s[34:35]
	s_cmp_eq_u32 s24, 1
	s_cselect_b32 s21, -1, 0
	v_add_nc_u32_e32 v6, v18, v6
	v_add_nc_u32_e32 v18, v18, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v6, v6, s5
	v_ashrrev_i32_e32 v7, 31, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	v_add_co_u32 v6, vcc_lo, s10, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, s11, v7, vcc_lo
	s_waitcnt vmcnt(1)
	v_fmac_f32_e32 v10, v15, v17
	global_store_b32 v[3:4], v10, off
	global_load_b32 v17, v[6:7], off
	v_mad_u64_u32 v[6:7], null, s5, v8, v[2:3]
	v_mad_u64_u32 v[7:8], null, s5, v18, v[2:3]
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v10, v16, v17
	global_store_b32 v[3:4], v10, off
.LBB0_4:                                ;   Parent Loop BB0_3 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_cmp_gt_i32_e32 vcc_lo, s31, v2
	s_add_i32 s34, s30, s33
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s35, s34, 31
	s_lshl_b64 s[34:35], s[34:35], 2
	v_cndmask_b32_e64 v17, 0, s5, vcc_lo
	s_add_u32 s34, s2, s34
	s_addc_u32 s35, s3, s35
	s_add_i32 s36, s28, s31
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v8, v7, v17
	s_ashr_i32 s37, s36, 31
	s_lshl_b64 s[36:37], s[36:37], 2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add3_u32 v18, v8, s33, -1
	s_add_u32 s36, s2, s36
	s_addc_u32 s37, s3, s37
	s_add_i32 s12, s28, s33
	v_ashrrev_i32_e32 v19, 31, v18
	s_add_i32 s38, s12, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_ashr_i32 s39, s38, 31
	v_lshlrev_b64 v[18:19], 2, v[18:19]
	s_lshl_b64 s[38:39], s[38:39], 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_add_u32 s38, s2, s38
	s_addc_u32 s39, s3, s39
	v_add_co_u32 v18, vcc_lo, s10, v18
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v19, vcc_lo, s11, v19, vcc_lo
	global_load_b32 v8, v12, s[22:23]
	global_load_b32 v22, v[18:19], off
	v_add_nc_u32_e32 v18, s31, v2
	v_add_nc_u32_e32 v19, s31, v7
	v_cmp_le_i32_e32 vcc_lo, s5, v18
	v_cndmask_b32_e64 v21, 0, s5, vcc_lo
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v10, v8, v22
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v18, v19, v21
	v_ashrrev_i32_e32 v19, 31, v18
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b64 v[19:20], 2, v[18:19]
	global_load_b32 v18, v12, s[38:39]
	v_add_co_u32 v22, vcc_lo, s10, v19
	v_add_co_ci_u32_e32 v23, vcc_lo, s11, v20, vcc_lo
	s_clause 0x1
	global_load_b32 v19, v12, s[34:35]
	global_load_b32 v20, v12, s[36:37]
	global_store_b32 v[3:4], v10, off
	global_load_b32 v24, v[22:23], off
	v_add_nc_u32_e32 v22, v6, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v22, v22, s33, -1
	v_ashrrev_i32_e32 v23, 31, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[22:23], 2, v[22:23]
	v_add_co_u32 v22, vcc_lo, s10, v22
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v23, vcc_lo, s11, v23, vcc_lo
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v10, v19, v24
	global_store_b32 v[3:4], v10, off
	global_load_b32 v24, v[22:23], off
	v_add_nc_u32_e32 v22, s31, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v22, v22, v21
	v_ashrrev_i32_e32 v23, 31, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[22:23], 2, v[22:23]
	v_add_co_u32 v22, vcc_lo, s10, v22
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v23, vcc_lo, s11, v23, vcc_lo
	s_and_not1_b32 vcc_lo, exec_lo, s21
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v10, v20, v24
	global_store_b32 v[3:4], v10, off
	global_load_b32 v22, v[22:23], off
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v10, v18, v22
	global_store_b32 v[3:4], v10, off
	s_cbranch_vccnz .LBB0_6
; %bb.5:                                ;   in Loop: Header=BB0_4 Depth=2
	v_add_nc_u32_e32 v17, v5, v17
	s_add_i32 s12, s25, s31
	v_sub_nc_u32_e32 v21, 0, v21
	s_lshl_b64 s[34:35], s[12:13], 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	s_add_u32 s34, s2, s34
	v_add3_u32 v22, v17, s33, -1
	s_addc_u32 s35, s3, s35
	v_add3_u32 v21, v5, s31, v21
	v_ashrrev_i32_e32 v23, 31, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[22:23], 2, v[22:23]
	v_add_co_u32 v22, vcc_lo, s10, v22
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e32 v23, vcc_lo, s11, v23, vcc_lo
	global_load_b32 v17, v[22:23], off
	global_load_b32 v23, v12, s[34:35]
	v_ashrrev_i32_e32 v22, 31, v21
	s_add_i32 s34, s27, s33
	s_ashr_i32 s35, s34, 31
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_lshlrev_b64 v[21:22], 2, v[21:22]
	s_lshl_b64 s[34:35], s[34:35], 2
	s_add_u32 s34, s2, s34
	s_addc_u32 s35, s3, s35
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_u32 v21, vcc_lo, s10, v21
	global_load_b32 v24, v12, s[34:35]
	v_add_co_ci_u32_e32 v22, vcc_lo, s11, v22, vcc_lo
	s_waitcnt vmcnt(1)
	v_fmac_f32_e32 v10, v23, v17
	global_store_b32 v[3:4], v10, off
	global_load_b32 v17, v[21:22], off
	s_waitcnt vmcnt(0)
	v_dual_add_f32 v21, v23, v24 :: v_dual_fmac_f32 v10, v24, v17
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v11, v11, v21
	global_store_b32 v[3:4], v10, off
.LBB0_6:                                ;   in Loop: Header=BB0_4 Depth=2
	v_add_f32_e32 v8, v8, v19
	s_add_i32 s31, s31, 1
	s_add_i32 s33, s33, -1
	s_add_i32 s12, s26, s31
	s_add_u32 s22, s22, 4
	v_add_f32_e32 v8, v8, v20
	s_addc_u32 s23, s23, 0
	s_cmp_eq_u32 s12, 1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v8, v8, v18
	v_add_f32_e32 v11, v8, v11
	s_cbranch_scc0 .LBB0_4
; %bb.7:                                ; %._crit_edge
                                        ;   in Loop: Header=BB0_3 Depth=1
	v_dual_add_f32 v6, v15, v16 :: v_dual_add_nc_u32 v13, -1, v13
	v_add_nc_u32_e32 v14, 1, v14
	s_add_i32 s12, s24, 1
	s_add_i32 s28, s28, s29
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f32_e32 v11, v6, v11
	s_add_i32 s30, s30, s9
	s_add_i32 s20, s20, s9
	s_cmp_eq_u32 s8, s24
	s_cbranch_scc1 .LBB0_9
; %bb.8:                                ;   in Loop: Header=BB0_3 Depth=1
	s_mov_b32 s24, s12
	s_branch .LBB0_3
.LBB0_9:                                ; %._crit_edge487
	s_waitcnt vmcnt(0)
	v_div_scale_f32 v5, null, v11, v11, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v6, v5
	s_waitcnt_depctr 0xfff
	v_fma_f32 v7, -v5, v6, 1.0
	v_fmac_f32_e32 v6, v7, v6
	v_div_scale_f32 v7, vcc_lo, v10, v11, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v8, v7, v6
	v_fma_f32 v12, -v5, v8, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v8, v12, v6
	v_fma_f32 v5, -v5, v8, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v5, v5, v6, v8
	v_div_fixup_f32 v5, v5, v11, v10
	global_store_b32 v[3:4], v5, off
.LBB0_10:                               ; %Flow614
	s_or_b32 exec_lo, exec_lo, s7
	s_cmp_lg_u32 s6, 3
	s_cbranch_scc1 .LBB0_24
; %bb.11:
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_i32_e64 s4, v1
	s_cbranch_execz .LBB0_24
; %bb.12:
	s_load_b32 s0, s[18:19], 0x10
	v_bfe_u32 v0, v0, 20, 10
	v_cmp_gt_i32_e32 vcc_lo, s5, v2
	s_waitcnt lgkmcnt(0)
	s_and_b32 s0, s0, 0xffff
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[3:4], null, s15, s0, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s0, 3, v3
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB0_24
; %bb.13:
	v_mul_lo_u32 v0, v1, s5
	s_cmp_gt_i32 s8, 0
	v_dual_mov_b32 v11, 0 :: v_dual_add_nc_u32 v12, -1, v9
	s_cselect_b32 s1, -1, 0
	s_lshl_b32 s12, s8, 1
	s_mul_i32 s18, s8, 3
	s_or_b32 s6, s12, 1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v0, v2
	s_add_u32 s7, s2, 4
	s_addc_u32 s9, s3, 0
	s_add_i32 s13, s8, -1
	s_add_i32 s15, s8, 1
	v_lshl_add_u32 v15, v4, 1, v4
	s_mul_i32 s13, s13, s6
	s_mul_i32 s15, s15, s6
	v_dual_mov_b32 v18, 0 :: v_dual_add_nc_u32 v13, -1, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v3, v15
	v_add_nc_u32_e32 v14, 1, v1
	v_add_nc_u32_e32 v16, s18, v3
	v_add_nc_u32_e32 v17, v12, v0
	v_add_nc_u32_e32 v19, 3, v15
	v_ashrrev_i32_e32 v5, 31, v4
	v_add_nc_u32_e32 v20, 1, v9
	s_mul_i32 s19, s8, 6
	s_add_i32 s12, s12, 2
	s_mul_i32 s13, s13, 3
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	s_mul_i32 s20, s15, 3
	s_mov_b32 s0, 0
	s_mul_i32 s12, s18, s12
	s_add_i32 s13, s13, s18
	s_sub_i32 s15, -3, s19
	v_add_co_u32 v4, vcc_lo, s16, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s17, v5, vcc_lo
	s_add_i32 s16, s20, s18
	s_add_i32 s17, s19, 3
	global_store_b32 v[4:5], v11, off
.LBB0_14:                               ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_16 Depth 2
                                        ;       Child Loop BB0_17 Depth 3
	v_add_nc_u32_e32 v6, s0, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_i32 v0, 0x55555556, v6
	v_lshrrev_b32_e32 v7, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v0, v0, v7
	v_add_nc_u32_e32 v7, s0, v16
	v_lshl_add_u32 v0, v0, 1, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v8, 31, v7
	v_sub_nc_u32_e32 v0, v6, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[7:8], 2, v[7:8]
	v_add_nc_u32_e32 v9, v0, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v7, vcc_lo, s7, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s9, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v10, 31, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v9, vcc_lo, s10, v9
	v_add_co_ci_u32_e32 v10, vcc_lo, s11, v10, vcc_lo
	s_and_not1_b32 vcc_lo, exec_lo, s1
	global_load_b32 v21, v[7:8], off
	global_load_b32 v9, v[9:10], off
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v18, v21, v9
	global_store_b32 v[4:5], v18, off
	global_load_b32 v7, v[7:8], off
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v11, v11, v7
	s_cbranch_vccnz .LBB0_22
; %bb.15:                               ; %.lr.ph504
                                        ;   in Loop: Header=BB0_14 Depth=1
	v_add_nc_u32_e32 v6, 1, v6
	v_dual_mov_b32 v26, v13 :: v_dual_add_nc_u32 v21, v19, v0
	s_mov_b32 s18, 1
	v_mov_b32_e32 v22, v14
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_i32 v7, 0x55555556, v6
	v_lshrrev_b32_e32 v8, 31, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v7, v7, v8
	v_lshl_add_u32 v7, v7, 1, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v6, v6, v7
	v_add_nc_u32_e32 v7, 3, v0
	v_add_nc_u32_e32 v23, s12, v6
	v_add_nc_u32_e32 v24, s13, v6
	v_add_nc_u32_e32 v25, s16, v6
.LBB0_16:                               ; %.lr.ph497
                                        ;   Parent Loop BB0_14 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_17 Depth 3
	v_add_nc_u32_e32 v8, s18, v1
	s_add_i32 s19, s18, s8
	s_mov_b32 s21, -3
	s_mul_i32 s19, s19, s6
	s_mov_b32 s22, 0
	v_cmp_le_i32_e32 vcc_lo, s4, v8
	s_add_i32 s19, s19, s8
	v_cndmask_b32_e64 v10, 0, s4, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v8, v8, v10
	v_mul_lo_u32 v29, v8, s5
	v_mad_u64_u32 v[8:9], null, s19, 3, v[6:7]
	s_sub_i32 s19, s8, s18
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s19, s19, s6
	s_add_i32 s19, s19, s8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[27:28], null, v29, 3, v[0:1]
	v_ashrrev_i32_e32 v9, 31, v8
	s_cmp_eq_u32 s18, 1
	s_cselect_b32 s20, -1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[8:9], 2, v[8:9]
	v_ashrrev_i32_e32 v28, 31, v27
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, s2, v8
	v_lshlrev_b64 v[27:28], 2, v[27:28]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, s3, v9, vcc_lo
	v_add_co_u32 v29, vcc_lo, s10, v27
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v30, vcc_lo, s11, v28, vcc_lo
	global_load_b32 v27, v[8:9], off
	global_load_b32 v31, v[29:30], off
	v_subrev_nc_u32_e32 v8, s18, v1
	v_ashrrev_i32_e32 v9, 31, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v32, s4, v9
	v_add_nc_u32_e32 v28, v32, v8
	v_mad_u64_u32 v[8:9], null, s19, 3, v[6:7]
	s_mov_b32 s19, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v30, v28, s5
	v_ashrrev_i32_e32 v9, 31, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[28:29], null, v30, 3, v[0:1]
	v_lshlrev_b64 v[8:9], 2, v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v8, vcc_lo, s2, v8
	v_ashrrev_i32_e32 v29, 31, v28
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, s3, v9, vcc_lo
	v_lshlrev_b64 v[29:30], 2, v[28:29]
	global_load_b32 v28, v[8:9], off
	v_add_co_u32 v8, vcc_lo, s10, v29
	v_add_co_ci_u32_e32 v9, vcc_lo, s11, v30, vcc_lo
	s_waitcnt vmcnt(1)
	v_fmac_f32_e32 v18, v27, v31
	global_store_b32 v[4:5], v18, off
	global_load_b32 v31, v[8:9], off
	v_add_nc_u32_e32 v9, v32, v26
	v_sub_nc_u32_e32 v8, v22, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v9, s5, v9
	v_mul_lo_u32 v8, s5, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v32, v2, v9
	v_add_nc_u32_e32 v10, v2, v8
	v_add_nc_u32_e32 v29, v12, v8
	v_add_nc_u32_e32 v30, v12, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[8:9], null, v10, 3, v[7:8]
	v_mad_u64_u32 v[9:10], null, v32, 3, v[7:8]
	v_mov_b32_e32 v10, v20
	s_waitcnt vmcnt(0)
	v_dual_fmac_f32 v18, v28, v31 :: v_dual_mov_b32 v31, v17
	global_store_b32 v[4:5], v18, off
.LBB0_17:                               ;   Parent Loop BB0_14 Depth=1
                                        ;     Parent Loop BB0_16 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_add_i32 s22, s22, 1
	v_add3_u32 v38, v24, s19, 3
	v_cmp_gt_i32_e32 vcc_lo, s22, v2
	v_add_nc_u32_e32 v40, s21, v24
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v39, 31, v38
	v_cndmask_b32_e64 v32, 0, s5, vcc_lo
	v_ashrrev_i32_e32 v41, 31, v40
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[38:39], 2, v[38:39]
	v_add_nc_u32_e32 v36, s14, v32
	v_add3_u32 v32, v25, s19, 3
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[40:41], 2, v[40:41]
	v_add_nc_u32_e32 v33, v36, v30
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mad_u64_u32 v[34:35], null, v33, 3, v[0:1]
	v_ashrrev_i32_e32 v33, 31, v32
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[32:33], 2, v[32:33]
	v_ashrrev_i32_e32 v35, 31, v34
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v32, vcc_lo, s2, v32
	v_lshlrev_b64 v[34:35], 2, v[34:35]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v33, vcc_lo, s3, v33, vcc_lo
	v_add_co_u32 v34, vcc_lo, s10, v34
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v35, vcc_lo, s11, v35, vcc_lo
	global_load_b32 v32, v[32:33], off
	global_load_b32 v44, v[34:35], off
	s_waitcnt vmcnt(0)
	v_dual_fmac_f32 v18, v32, v44 :: v_dual_add_nc_u32 v33, s21, v25
	v_add_nc_u32_e32 v35, s14, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v34, 31, v33
	v_cmp_le_i32_e32 vcc_lo, s5, v35
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[33:34], 2, v[33:34]
	v_cndmask_b32_e64 v35, 0, s5, vcc_lo
	v_add_co_u32 v33, vcc_lo, s2, v33
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v34, vcc_lo, s3, v34, vcc_lo
	v_mul_lo_u32 v37, v35, -3
	v_add_co_u32 v38, vcc_lo, s2, v38
	v_add_co_ci_u32_e32 v39, vcc_lo, s3, v39, vcc_lo
	v_add_co_u32 v40, vcc_lo, s2, v40
	v_add_co_ci_u32_e32 v41, vcc_lo, s3, v41, vcc_lo
	v_add3_u32 v42, v9, s19, v37
	s_clause 0x2
	global_load_b32 v33, v[33:34], off
	global_load_b32 v34, v[38:39], off
	global_load_b32 v35, v[40:41], off
	global_store_b32 v[4:5], v18, off
	v_add_nc_u32_e32 v41, v36, v29
	v_ashrrev_i32_e32 v43, 31, v42
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[42:43], 2, v[42:43]
	v_add_co_u32 v38, vcc_lo, s10, v42
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v39, vcc_lo, s11, v43, vcc_lo
	global_load_b32 v40, v[38:39], off
	v_mad_u64_u32 v[38:39], null, v41, 3, v[0:1]
	v_ashrrev_i32_e32 v39, 31, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[38:39], 2, v[38:39]
	v_add_co_u32 v38, vcc_lo, s10, v38
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v39, vcc_lo, s11, v39, vcc_lo
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v18, v33, v40
	global_store_b32 v[4:5], v18, off
	global_load_b32 v40, v[38:39], off
	v_add3_u32 v38, v8, s19, v37
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v39, 31, v38
	v_lshlrev_b64 v[38:39], 2, v[38:39]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v38, vcc_lo, s10, v38
	v_add_co_ci_u32_e32 v39, vcc_lo, s11, v39, vcc_lo
	s_and_not1_b32 vcc_lo, exec_lo, s20
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v18, v34, v40
	global_store_b32 v[4:5], v18, off
	global_load_b32 v38, v[38:39], off
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v18, v35, v38
	global_store_b32 v[4:5], v18, off
	s_cbranch_vccnz .LBB0_19
; %bb.18:                               ;   in Loop: Header=BB0_17 Depth=3
	v_add_nc_u32_e32 v36, v36, v31
	v_add3_u32 v38, v23, s19, 3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[40:41], null, v36, 3, v[0:1]
	v_ashrrev_i32_e32 v39, 31, v38
	v_add3_u32 v36, v21, s19, v37
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[38:39], 2, v[38:39]
	v_ashrrev_i32_e32 v41, 31, v40
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v37, 31, v36
	v_add_co_u32 v38, vcc_lo, s2, v38
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[40:41], 2, v[40:41]
	v_add_co_ci_u32_e32 v39, vcc_lo, s3, v39, vcc_lo
	v_lshlrev_b64 v[36:37], 2, v[36:37]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v40, vcc_lo, s10, v40
	v_add_co_ci_u32_e32 v41, vcc_lo, s11, v41, vcc_lo
	global_load_b32 v42, v[38:39], off
	global_load_b32 v40, v[40:41], off
	v_add_nc_u32_e32 v38, s21, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v39, 31, v38
	v_lshlrev_b64 v[38:39], 2, v[38:39]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v38, vcc_lo, s2, v38
	v_add_co_ci_u32_e32 v39, vcc_lo, s3, v39, vcc_lo
	v_add_co_u32 v36, vcc_lo, s10, v36
	v_add_co_ci_u32_e32 v37, vcc_lo, s11, v37, vcc_lo
	global_load_b32 v38, v[38:39], off
	s_waitcnt vmcnt(1)
	v_fmac_f32_e32 v18, v42, v40
	global_store_b32 v[4:5], v18, off
	global_load_b32 v36, v[36:37], off
	s_waitcnt vmcnt(1)
	v_add_f32_e32 v37, v42, v38
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_add_f32 v11, v11, v37 :: v_dual_fmac_f32 v18, v38, v36
	global_store_b32 v[4:5], v18, off
.LBB0_19:                               ;   in Loop: Header=BB0_17 Depth=3
	v_dual_add_f32 v32, v32, v33 :: v_dual_add_nc_u32 v31, -1, v31
	v_add_nc_u32_e32 v10, 1, v10
	s_add_i32 s19, s19, 3
	s_add_i32 s21, s21, -3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_add_f32 v32, v32, v34 :: v_dual_add_nc_u32 v29, -1, v29
	s_cmp_eq_u32 s8, s22
	v_add_f32_e32 v32, v32, v35
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_add_f32 v11, v32, v11 :: v_dual_add_nc_u32 v30, -1, v30
	s_cbranch_scc0 .LBB0_17
; %bb.20:                               ; %._crit_edge498
                                        ;   in Loop: Header=BB0_16 Depth=2
	v_dual_add_f32 v8, v27, v28 :: v_dual_add_nc_u32 v25, s17, v25
	v_add_nc_u32_e32 v26, -1, v26
	v_add_nc_u32_e32 v22, 1, v22
	s_delay_alu instid0(VALU_DEP_3)
	v_dual_add_f32 v11, v8, v11 :: v_dual_add_nc_u32 v24, s15, v24
	s_add_i32 s19, s18, 1
	s_cmp_eq_u32 s8, s18
	s_cbranch_scc1 .LBB0_22
; %bb.21:                               ;   in Loop: Header=BB0_16 Depth=2
	s_mov_b32 s18, s19
	s_branch .LBB0_16
.LBB0_22:                               ; %._crit_edge505
                                        ;   in Loop: Header=BB0_14 Depth=1
	s_add_i32 s0, s0, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s0, 3
	s_cbranch_scc0 .LBB0_14
; %bb.23:
	v_div_scale_f32 v0, null, v11, v11, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v1, v0
	s_waitcnt_depctr 0xfff
	v_fma_f32 v2, -v0, v1, 1.0
	v_fmac_f32_e32 v1, v2, v1
	v_div_scale_f32 v2, vcc_lo, v18, v11, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v3, v2, v1
	v_fma_f32 v6, -v0, v3, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v3, v6, v1
	v_fma_f32 v0, -v0, v3, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v0, v0, v1, v3
	v_div_fixup_f32 v0, v0, v11, v18
	global_store_b32 v[4:5], v0, off
.LBB0_24:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z4convPfiiiS_iS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 45
		.amdhsa_next_free_sgpr 40
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z4convPfiiiS_iS_, .Lfunc_end0-_Z4convPfiiiS_iS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 3416
; NumSgprs: 42
; NumVgprs: 45
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 5
; VGPRBlocks: 5
; NumSGPRsForWavesPerEU: 42
; NumVGPRsForWavesPerEU: 45
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.protected	_Z8conv_bilPfiiiS_iS_f  ; -- Begin function _Z8conv_bilPfiiiS_iS_f
	.globl	_Z8conv_bilPfiiiS_iS_f
	.p2align	8
	.type	_Z8conv_bilPfiiiS_iS_f,@function
_Z8conv_bilPfiiiS_iS_f:                 ; @_Z8conv_bilPfiiiS_iS_f
; %bb.0:
	s_clause 0x5
	s_load_b32 s11, s[0:1], 0x44
	s_load_b64 s[2:3], s[0:1], 0x0
	s_load_b128 s[4:7], s[0:1], 0x8
	s_load_b64 s[8:9], s[0:1], 0x18
	s_load_b32 s10, s[0:1], 0x20
	s_load_b64 s[16:17], s[0:1], 0x28
	s_waitcnt lgkmcnt(0)
	s_load_b32 s7, s[0:1], 0x30
	v_and_b32_e32 v3, 0x3ff, v0
	s_add_u32 s0, s0, 56
	s_addc_u32 s1, s1, 0
	v_bfe_u32 v7, v0, 10, 10
	s_lshr_b32 s12, s11, 16
	s_and_b32 s11, s11, 0xffff
	s_mul_i32 s14, s14, s12
	v_mad_u64_u32 v[1:2], null, s13, s11, v[3:4]
	v_add_nc_u32_e32 v2, s14, v7
	s_cmp_lt_i32 s6, 3
	s_mov_b32 s11, -1
	s_cbranch_scc1 .LBB1_17
; %bb.1:                                ; %LeafBlock1061
	s_cmp_eq_u32 s6, 3
	s_cbranch_scc0 .LBB1_16
; %bb.2:
	s_mov_b32 s12, exec_lo
	v_cmpx_ge_i32_e64 s4, v1
	s_cbranch_execz .LBB1_15
; %bb.3:
	s_load_b32 s0, s[0:1], 0x10
	v_bfe_u32 v0, v0, 20, 10
	v_cmp_ge_i32_e32 vcc_lo, s5, v2
	s_waitcnt lgkmcnt(0)
	s_and_b32 s0, s0, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s19, s15, s0
	v_add_nc_u32_e32 v14, s19, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s0, 3, v14
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB1_15
; %bb.4:
	v_mul_lo_u32 v10, v1, s5
	v_add_f32_e64 v4, s7, s7
	s_ashr_i32 s11, s10, 31
	s_mul_i32 s20, s10, 3
	s_lshl_b64 s[0:1], s[10:11], 2
	v_dual_mov_b32 v15, 0 :: v_dual_add_nc_u32 v16, -1, v7
	s_add_u32 s0, s8, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_dual_mul_f32 v6, s7, v4 :: v_dual_add_nc_u32 v3, v10, v2
	s_addc_u32 s1, s9, s1
	s_cmp_gt_i32 s10, 0
	v_add_nc_u32_e32 v18, 1, v1
	v_lshl_add_u32 v20, v3, 1, v3
	v_mul_f32_e32 v21, 0x40400000, v6
	v_ashrrev_i32_e32 v4, 31, v3
	s_cselect_b32 s11, -1, 0
	s_lshl_b32 s21, s10, 1
	v_add_nc_u32_e32 v5, v14, v20
	s_or_b32 s13, s21, 1
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_add_u32 s15, s8, 4
	s_addc_u32 s18, s9, 0
	v_ashrrev_i32_e32 v6, 31, v5
	s_add_i32 s21, s21, 2
	s_add_i32 s22, s10, -1
	s_mul_i32 s21, s20, s21
	v_add_nc_u32_e32 v19, s20, v14
	v_lshlrev_b64 v[8:9], 2, v[5:6]
	v_add3_u32 v24, s19, s21, v0
	s_add_i32 s21, s10, 1
	v_add_co_u32 v5, vcc_lo, s2, v3
	s_mul_i32 s22, s22, s13
	s_add_i32 s20, s20, s19
	s_mul_i32 s19, s21, s13
	v_add_co_ci_u32_e32 v6, vcc_lo, s3, v4, vcc_lo
	v_add_co_u32 v3, vcc_lo, s16, v8
	s_mul_i32 s22, s22, 3
	s_mul_i32 s19, s19, 3
	v_dual_mov_b32 v26, 0 :: v_dual_add_nc_u32 v17, -1, v1
	v_add_co_ci_u32_e32 v4, vcc_lo, s17, v9, vcc_lo
	v_dual_mov_b32 v25, 0 :: v_dual_add_nc_u32 v22, v16, v10
	v_add_nc_u32_e32 v23, 3, v20
	v_add3_u32 v27, s20, s22, v0
	v_add3_u32 v28, s20, s19, v0
	v_add_nc_u32_e32 v29, 1, v7
	s_mul_i32 s21, s10, 6
	s_mov_b32 s19, 0
	s_sub_i32 s20, -3, s21
	s_add_i32 s21, s21, 3
	global_store_b32 v[3:4], v15, off
.LBB1_5:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_7 Depth 2
                                        ;       Child Loop BB1_8 Depth 3
	v_add_nc_u32_e32 v0, s19, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_i32 v7, 0x55555556, v0
	v_lshrrev_b32_e32 v8, 31, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v7, v7, v8
	v_add_nc_u32_e32 v8, s19, v19
	v_lshl_add_u32 v7, v7, 1, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v9, 31, v8
	v_sub_nc_u32_e32 v7, v0, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[8:9], 2, v[8:9]
	v_add_nc_u32_e32 v10, v7, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v12, vcc_lo, s15, v8
	v_add_co_ci_u32_e32 v13, vcc_lo, s18, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v11, 31, v10
	v_lshlrev_b64 v[10:11], 2, v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, s2, v10
	v_add_co_ci_u32_e32 v9, vcc_lo, s3, v11, vcc_lo
	s_and_not1_b32 vcc_lo, exec_lo, s11
	global_load_b32 v10, v[12:13], off
	global_load_b32 v11, v[8:9], off
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v25, v10, v11
	global_store_b32 v[3:4], v25, off
	global_load_b32 v10, v15, s[0:1]
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v26, v26, v10
	s_cbranch_vccnz .LBB1_13
; %bb.6:                                ; %.lr.ph941
                                        ;   in Loop: Header=BB1_5 Depth=1
	v_cvt_f32_i32_e32 v30, v7
	v_dual_mov_b32 v32, v28 :: v_dual_add_nc_u32 v31, v23, v7
	v_dual_mov_b32 v33, v27 :: v_dual_add_nc_u32 v10, 3, v7
	v_dual_mov_b32 v34, v18 :: v_dual_mov_b32 v35, v17
	s_mov_b32 s22, 1
.LBB1_7:                                ; %.lr.ph930
                                        ;   Parent Loop BB1_5 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB1_8 Depth 3
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_nc_u32_e32 v11, s22, v1
	s_add_i32 s23, s22, s10
	s_mov_b32 s25, 0
	s_mul_i32 s23, s23, s13
	s_mov_b32 s26, 0
	v_cmp_le_i32_e32 vcc_lo, s4, v11
	s_add_i32 s23, s23, s10
	v_cndmask_b32_e64 v13, 0, s4, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v11, v11, v13
	v_sub_nc_u32_e32 v13, v34, v13
	v_mul_lo_u32 v36, v11, s5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v13, s5, v13
	v_mad_u64_u32 v[11:12], null, v36, 3, v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v12, 31, v11
	v_lshlrev_b64 v[11:12], 2, v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v11, vcc_lo, s2, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s3, v12, vcc_lo
	s_clause 0x1
	global_load_b32 v39, v[8:9], off
	global_load_b32 v40, v[11:12], off
	v_mad_u64_u32 v[11:12], null, s23, 3, v[0:1]
	s_sub_i32 s23, s10, s22
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s23, s23, s13
	s_add_i32 s23, s23, s10
	s_cmp_eq_u32 s22, 1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v12, 31, v11
	s_cselect_b32 s24, -1, 0
	v_lshlrev_b64 v[11:12], 2, v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v11, vcc_lo, s15, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s18, v12, vcc_lo
	global_load_b32 v41, v[11:12], off
	v_subrev_nc_u32_e32 v11, s22, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v12, 31, v11
	v_and_b32_e32 v42, s4, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v11, v42, v11
	v_mul_lo_u32 v36, v11, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[11:12], null, v36, 3, v[7:8]
	v_ashrrev_i32_e32 v12, 31, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[11:12]
	v_add_co_u32 v11, vcc_lo, s2, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v12, vcc_lo, s3, v12, vcc_lo
	global_load_b32 v43, v[11:12], off
	s_waitcnt vmcnt(2)
	v_sub_f32_e32 v36, v40, v39
	v_mul_f32_e64 v36, v36, -v36
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f32 v37, null, v21, v21, v36
	v_div_scale_f32 v45, vcc_lo, v36, v21, v36
	v_rcp_f32_e32 v38, v37
	s_waitcnt_depctr 0xfff
	v_fma_f32 v44, -v37, v38, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v38, v44, v38
	v_mul_f32_e32 v44, v45, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v46, -v37, v44, v45
	v_fmac_f32_e32 v44, v46, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v37, -v37, v44, v45
	v_div_fmas_f32 v37, v37, v38, v44
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v38, v37, v21, v36
	v_mul_f32_e32 v36, 0x3fb8aa3b, v38
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v38
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f32 v37, 0x3fb8aa3b, v38, -v36
	v_rndne_f32_e32 v44, v36
	v_dual_fmac_f32 v37, 0x32a5705f, v38 :: v_dual_sub_f32 v36, v36, v44
	v_cvt_i32_f32_e32 v44, v44
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v36, v36, v37
	v_exp_f32_e32 v45, v36
	v_mad_u64_u32 v[36:37], null, s23, 3, v[0:1]
	s_mov_b32 s23, 0
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v37, v45, v44
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v44, 0, v37, vcc_lo
	v_ashrrev_i32_e32 v37, 31, v36
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v38
	v_lshlrev_b64 v[37:38], 2, v[36:37]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v44, 0x7f800000, v44, vcc_lo
	s_waitcnt vmcnt(1)
	v_mul_f32_e32 v36, v41, v44
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v37, vcc_lo, s15, v37
	v_add_co_ci_u32_e32 v38, vcc_lo, s18, v38, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_fmac_f32_e32 v25, v40, v36
	global_load_b32 v40, v[37:38], off
	global_store_b32 v[3:4], v25, off
	global_load_b32 v41, v[11:12], off
	s_waitcnt vmcnt(2)
	v_sub_f32_e32 v11, v43, v39
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e64 v11, v11, -v11
	v_div_scale_f32 v12, null, v21, v21, v11
	v_div_scale_f32 v39, vcc_lo, v11, v21, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v37, v12
	s_waitcnt_depctr 0xfff
	v_fma_f32 v38, -v12, v37, 1.0
	v_fmac_f32_e32 v37, v38, v37
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v38, v39, v37
	v_fma_f32 v43, -v12, v38, v39
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v38, v43, v37
	v_fma_f32 v12, -v12, v38, v39
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v12, v12, v37, v38
	v_div_fixup_f32 v11, v12, v21, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v12, 0x3fb8aa3b, v11
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v11
	v_fma_f32 v37, 0x3fb8aa3b, v11, -v12
	v_rndne_f32_e32 v38, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v37, 0x32a5705f, v11 :: v_dual_sub_f32 v12, v12, v38
	v_add_f32_e32 v12, v12, v37
	v_cvt_i32_f32_e32 v37, v38
	v_add_nc_u32_e32 v38, v42, v35
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_exp_f32_e32 v12, v12
	v_mul_lo_u32 v39, s5, v38
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v38, v16, v39
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v12, v12, v37
	v_add_nc_u32_e32 v37, v16, v13
	v_add_nc_u32_e32 v13, v2, v13
	v_add_nc_u32_e32 v42, v2, v39
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v12, 0, v12, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v11
	v_cndmask_b32_e32 v11, 0x7f800000, v12, vcc_lo
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v39, v40, v11
	v_mad_u64_u32 v[11:12], null, v13, 3, v[10:11]
	s_waitcnt vmcnt(0)
	v_dual_mov_b32 v40, v22 :: v_dual_fmac_f32 v25, v41, v39
	s_delay_alu instid0(VALU_DEP_2)
	v_mad_u64_u32 v[12:13], null, v42, 3, v[10:11]
	v_mov_b32_e32 v13, v29
	global_store_b32 v[3:4], v25, off
.LBB1_8:                                ;   Parent Loop BB1_5 Depth=1
                                        ;     Parent Loop BB1_7 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_add_i32 s26, s26, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e32 vcc_lo, s26, v2
	v_cndmask_b32_e64 v41, 0, s5, vcc_lo
	v_add_nc_u32_e32 v41, s14, v41
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v44, v41, v38
	v_mad_u64_u32 v[42:43], null, v44, 3, v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v43, 31, v42
	v_lshlrev_b64 v[42:43], 2, v[42:43]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v42, vcc_lo, s2, v42
	v_add_co_ci_u32_e32 v43, vcc_lo, s3, v43, vcc_lo
	s_clause 0x1
	global_load_b32 v55, v[8:9], off
	global_load_b32 v56, v[42:43], off
	v_add3_u32 v42, v32, s25, 3
	global_load_b32 v58, v[5:6], off
	v_ashrrev_i32_e32 v43, 31, v42
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[42:43], 2, v[42:43]
	v_add_co_u32 v42, vcc_lo, s15, v42
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v43, vcc_lo, s18, v43, vcc_lo
	global_load_b32 v57, v[42:43], off
	v_add_nc_u32_e32 v42, s14, v13
	v_cmp_le_i32_e32 vcc_lo, s5, v42
	v_cndmask_b32_e64 v42, 0, s5, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v42, v42, -3
	v_add3_u32 v43, v12, s25, v42
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v44, 31, v43
	v_lshlrev_b64 v[43:44], 2, v[43:44]
	s_waitcnt vmcnt(2)
	v_sub_f32_e32 v45, v56, v55
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f32_e64 v47, v45, -v45
	v_add_co_u32 v45, vcc_lo, s2, v43
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v46, vcc_lo, s3, v44, vcc_lo
	v_div_scale_f32 v43, null, v21, v21, v47
	v_div_scale_f32 v49, vcc_lo, v47, v21, v47
	global_load_b32 v59, v[45:46], off
	v_rcp_f32_e32 v44, v43
	s_waitcnt_depctr 0xfff
	v_fma_f32 v48, -v43, v44, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v44, v48, v44
	v_add_nc_u32_e32 v54, v41, v37
	v_mul_f32_e32 v48, v49, v44
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v50, -v43, v48, v49
	v_fmac_f32_e32 v48, v50, v44
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f32 v43, -v43, v48, v49
	v_add3_u32 v49, v33, s23, -3
	v_div_fmas_f32 v43, v43, v44, v48
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_div_fixup_f32 v60, v43, v21, v47
	v_add3_u32 v43, v32, s23, -3
	v_add3_u32 v47, v33, s25, 3
	v_mul_f32_e32 v44, 0x3fb8aa3b, v60
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v48, 31, v47
	v_fma_f32 v50, 0x3fb8aa3b, v60, -v44
	v_rndne_f32_e32 v53, v44
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[47:48], 2, v[47:48]
	v_dual_fmac_f32 v50, 0x32a5705f, v60 :: v_dual_sub_f32 v51, v44, v53
	v_ashrrev_i32_e32 v44, 31, v43
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v51, v51, v50
	v_lshlrev_b64 v[43:44], 2, v[43:44]
	v_ashrrev_i32_e32 v50, 31, v49
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_exp_f32_e32 v61, v51
	v_mad_u64_u32 v[51:52], null, v54, 3, v[7:8]
	v_add_co_u32 v43, vcc_lo, s15, v43
	v_cvt_i32_f32_e32 v54, v53
	v_add_co_ci_u32_e32 v44, vcc_lo, s18, v44, vcc_lo
	v_add_co_u32 v47, vcc_lo, s15, v47
	v_add_co_ci_u32_e32 v48, vcc_lo, s18, v48, vcc_lo
	s_delay_alu instid0(TRANS32_DEP_1) | instid1(VALU_DEP_4)
	v_ldexp_f32 v61, v61, v54
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v60
	v_ashrrev_i32_e32 v52, 31, v51
	v_add3_u32 v53, v11, s25, v42
	global_load_b32 v44, v[43:44], off
	v_lshlrev_b64 v[49:50], 2, v[49:50]
	v_cndmask_b32_e32 v61, 0, v61, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v60
	v_lshlrev_b64 v[51:52], 2, v[51:52]
	v_ashrrev_i32_e32 v54, 31, v53
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v43, 0x7f800000, v61, vcc_lo
	v_lshlrev_b64 v[53:54], 2, v[53:54]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v51, vcc_lo, s2, v51
	s_waitcnt vmcnt(2)
	v_mul_f32_e32 v43, v57, v43
	v_add_co_ci_u32_e32 v52, vcc_lo, s3, v52, vcc_lo
	v_add_co_u32 v49, vcc_lo, s15, v49
	v_add_co_ci_u32_e32 v50, vcc_lo, s18, v50, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_fmac_f32_e32 v25, v56, v43
	v_add_co_u32 v53, vcc_lo, s2, v53
	v_add_co_ci_u32_e32 v54, vcc_lo, s3, v54, vcc_lo
	global_load_b32 v47, v[47:48], off
	global_load_b32 v48, v[51:52], off
	global_load_b32 v49, v[49:50], off
	global_load_b32 v50, v[53:54], off
	global_store_b32 v[3:4], v25, off
	global_load_b32 v45, v[45:46], off
	s_waitcnt vmcnt(6)
	v_sub_f32_e32 v46, v59, v55
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e64 v46, v46, -v46
	v_div_scale_f32 v56, null, v21, v21, v46
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v57, v56
	s_waitcnt_depctr 0xfff
	v_fma_f32 v59, -v56, v57, 1.0
	v_fmac_f32_e32 v57, v59, v57
	v_div_scale_f32 v59, vcc_lo, v46, v21, v46
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v60, v59, v57
	v_fma_f32 v61, -v56, v60, v59
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v60, v61, v57
	v_fma_f32 v56, -v56, v60, v59
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v56, v56, v57, v60
	v_div_fixup_f32 v46, v56, v21, v46
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v56, 0x3fb8aa3b, v46
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v46
	v_fma_f32 v57, 0x3fb8aa3b, v46, -v56
	v_rndne_f32_e32 v59, v56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v57, 0x32a5705f, v46 :: v_dual_sub_f32 v56, v56, v59
	v_add_f32_e32 v56, v56, v57
	v_cvt_i32_f32_e32 v57, v59
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_exp_f32_e32 v56, v56
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v56, v56, v57
	v_cndmask_b32_e32 v56, 0, v56, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v46
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v46, 0x7f800000, v56, vcc_lo
	s_waitcnt vmcnt(5)
	v_mul_f32_e32 v44, v44, v46
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v25, v44, v45
	v_sub_f32_e32 v45, v48, v55
	global_store_b32 v[3:4], v25, off
	global_load_b32 v46, v[51:52], off
	v_mul_f32_e64 v45, v45, -v45
	v_div_scale_f32 v48, null, v21, v21, v45
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v51, v48
	s_waitcnt_depctr 0xfff
	v_fma_f32 v52, -v48, v51, 1.0
	v_fmac_f32_e32 v51, v52, v51
	v_div_scale_f32 v52, vcc_lo, v45, v21, v45
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v56, v52, v51
	v_fma_f32 v57, -v48, v56, v52
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v56, v57, v51
	v_fma_f32 v48, -v48, v56, v52
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v48, v48, v51, v56
	v_div_fixup_f32 v45, v48, v21, v45
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v48, 0x3fb8aa3b, v45
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v45
	v_fma_f32 v51, 0x3fb8aa3b, v45, -v48
	v_rndne_f32_e32 v52, v48
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v51, 0x32a5705f, v45 :: v_dual_sub_f32 v48, v48, v52
	v_add_f32_e32 v48, v48, v51
	v_cvt_i32_f32_e32 v51, v52
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_exp_f32_e32 v48, v48
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v48, v48, v51
	v_cndmask_b32_e32 v48, 0, v48, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v45
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v45, 0x7f800000, v48, vcc_lo
	v_mul_f32_e32 v45, v47, v45
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v25, v45, v46 :: v_dual_sub_f32 v46, v50, v55
	v_fmac_f32_e32 v50, 0xc0400000, v58
	global_store_b32 v[3:4], v25, off
	global_load_b32 v47, v[53:54], off
	v_add_f32_e32 v48, v50, v30
	v_mul_f32_e64 v46, v48, -v46
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f32 v48, null, v21, v21, v46
	v_rcp_f32_e32 v50, v48
	s_waitcnt_depctr 0xfff
	v_fma_f32 v51, -v48, v50, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v50, v51, v50
	v_div_scale_f32 v51, vcc_lo, v46, v21, v46
	v_mul_f32_e32 v52, v51, v50
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v53, -v48, v52, v51
	v_fmac_f32_e32 v52, v53, v50
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v48, -v48, v52, v51
	v_div_fmas_f32 v48, v48, v50, v52
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v46, v48, v21, v46
	v_mul_f32_e32 v48, 0x3fb8aa3b, v46
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v46
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f32 v50, 0x3fb8aa3b, v46, -v48
	v_rndne_f32_e32 v51, v48
	v_fmac_f32_e32 v50, 0x32a5705f, v46
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v48, v48, v51
	v_add_f32_e32 v48, v48, v50
	v_cvt_i32_f32_e32 v50, v51
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_exp_f32_e32 v48, v48
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v48, v48, v50
	v_cndmask_b32_e32 v48, 0, v48, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v46
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v46, 0x7f800000, v48, vcc_lo
	s_and_not1_b32 vcc_lo, exec_lo, s24
	v_mul_f32_e32 v46, v49, v46
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v25, v46, v47
	global_store_b32 v[3:4], v25, off
	s_cbranch_vccnz .LBB1_10
; %bb.9:                                ;   in Loop: Header=BB1_8 Depth=3
	v_add_nc_u32_e32 v41, v41, v40
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[47:48], null, v41, 3, v[7:8]
	v_add3_u32 v41, v31, s25, v42
	v_ashrrev_i32_e32 v42, 31, v41
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v48, 31, v47
	v_lshlrev_b64 v[41:42], 2, v[41:42]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[47:48], 2, v[47:48]
	v_add_co_u32 v47, vcc_lo, s2, v47
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v48, vcc_lo, s3, v48, vcc_lo
	s_clause 0x1
	global_load_b32 v49, v[8:9], off
	global_load_b32 v50, v[47:48], off
	v_add3_u32 v47, v24, s25, 3
	v_ashrrev_i32_e32 v48, 31, v47
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[47:48], 2, v[47:48]
	v_add_co_u32 v47, vcc_lo, s15, v47
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v48, vcc_lo, s18, v48, vcc_lo
	v_add_co_u32 v41, vcc_lo, s2, v41
	v_add_co_ci_u32_e32 v42, vcc_lo, s3, v42, vcc_lo
	global_load_b32 v51, v[47:48], off
	global_load_b32 v52, v[41:42], off
	s_waitcnt vmcnt(2)
	v_sub_f32_e32 v47, v50, v49
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e64 v47, v47, -v47
	v_div_scale_f32 v48, null, v21, v21, v47
	v_div_scale_f32 v55, vcc_lo, v47, v21, v47
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v53, v48
	s_waitcnt_depctr 0xfff
	v_fma_f32 v54, -v48, v53, 1.0
	v_fmac_f32_e32 v53, v54, v53
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v54, v55, v53
	v_fma_f32 v56, -v48, v54, v55
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v54, v56, v53
	v_fma_f32 v48, -v48, v54, v55
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v48, v48, v53, v54
	v_div_fixup_f32 v53, v48, v21, v47
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v47, 0x3fb8aa3b, v53
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v53
	v_fma_f32 v48, 0x3fb8aa3b, v53, -v47
	v_rndne_f32_e32 v54, v47
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v48, 0x32a5705f, v53 :: v_dual_sub_f32 v47, v47, v54
	v_add_f32_e32 v47, v47, v48
	v_cvt_i32_f32_e32 v48, v54
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_exp_f32_e32 v47, v47
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v48, v47, v48
	v_add3_u32 v47, v24, s23, -3
	v_cndmask_b32_e32 v54, 0, v48, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v48, 31, v47
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v53
	v_lshlrev_b64 v[47:48], 2, v[47:48]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v53, 0x7f800000, v54, vcc_lo
	s_waitcnt vmcnt(1)
	v_mul_f32_e32 v54, v51, v53
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v47, vcc_lo, s15, v47
	v_add_co_ci_u32_e32 v48, vcc_lo, s18, v48, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_fmac_f32_e32 v25, v50, v54
	global_load_b32 v47, v[47:48], off
	global_store_b32 v[3:4], v25, off
	global_load_b32 v41, v[41:42], off
	s_waitcnt vmcnt(2)
	v_sub_f32_e32 v42, v52, v49
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e64 v42, v42, -v42
	v_div_scale_f32 v48, null, v21, v21, v42
	v_div_scale_f32 v52, vcc_lo, v42, v21, v42
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v49, v48
	s_waitcnt_depctr 0xfff
	v_fma_f32 v50, -v48, v49, 1.0
	v_fmac_f32_e32 v49, v50, v49
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v50, v52, v49
	v_fma_f32 v54, -v48, v50, v52
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v50, v54, v49
	v_fma_f32 v48, -v48, v50, v52
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v48, v48, v49, v50
	v_div_fixup_f32 v42, v48, v21, v42
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v48, 0x3fb8aa3b, v42
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v42
	v_fma_f32 v49, 0x3fb8aa3b, v42, -v48
	v_rndne_f32_e32 v50, v48
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v49, 0x32a5705f, v42
	v_sub_f32_e32 v48, v48, v50
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f32_e32 v48, v48, v49
	v_cvt_i32_f32_e32 v49, v50
	v_exp_f32_e32 v48, v48
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v48, v48, v49
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v48, 0, v48, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v42
	v_cndmask_b32_e32 v42, 0x7f800000, v48, vcc_lo
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v42, v47, v42
	s_waitcnt vmcnt(0)
	v_dual_fmac_f32 v25, v41, v42 :: v_dual_fmac_f32 v42, v51, v53
	global_store_b32 v[3:4], v25, off
	v_add_f32_e32 v26, v26, v42
.LBB1_10:                               ;   in Loop: Header=BB1_8 Depth=3
	v_dual_add_f32 v41, v43, v44 :: v_dual_add_nc_u32 v38, -1, v38
	v_add_nc_u32_e32 v13, 1, v13
	s_add_i32 s25, s25, 3
	s_add_i32 s23, s23, -3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_add_f32 v41, v41, v45 :: v_dual_add_nc_u32 v40, -1, v40
	s_cmp_eq_u32 s10, s26
	v_add_f32_e32 v41, v41, v46
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_add_f32 v26, v41, v26 :: v_dual_add_nc_u32 v37, -1, v37
	s_cbranch_scc0 .LBB1_8
; %bb.11:                               ; %._crit_edge931
                                        ;   in Loop: Header=BB1_7 Depth=2
	v_dual_add_f32 v11, v36, v39 :: v_dual_add_nc_u32 v34, 1, v34
	v_add_nc_u32_e32 v35, -1, v35
	v_add_nc_u32_e32 v33, s20, v33
	v_add_nc_u32_e32 v32, s21, v32
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f32_e32 v26, v11, v26
	s_add_i32 s23, s22, 1
	s_cmp_eq_u32 s10, s22
	s_cbranch_scc1 .LBB1_13
; %bb.12:                               ;   in Loop: Header=BB1_7 Depth=2
	s_mov_b32 s22, s23
	s_branch .LBB1_7
.LBB1_13:                               ; %._crit_edge942
                                        ;   in Loop: Header=BB1_5 Depth=1
	v_add_nc_u32_e32 v24, 1, v24
	v_add_nc_u32_e32 v27, 1, v27
	v_add_nc_u32_e32 v28, 1, v28
	s_add_i32 s19, s19, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s19, 3
	s_cbranch_scc0 .LBB1_5
; %bb.14:
	v_div_scale_f32 v0, null, v26, v26, v25
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v5, v0
	s_waitcnt_depctr 0xfff
	v_fma_f32 v6, -v0, v5, 1.0
	v_fmac_f32_e32 v5, v6, v5
	v_div_scale_f32 v6, vcc_lo, v25, v26, v25
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v7, v6, v5
	v_fma_f32 v8, -v0, v7, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v7, v8, v5
	v_fma_f32 v0, -v0, v7, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v0, v0, v5, v7
	v_div_fixup_f32 v0, v0, v26, v25
	global_store_b32 v[3:4], v0, off
.LBB1_15:                               ; %Flow1065
	s_or_b32 exec_lo, exec_lo, s12
.LBB1_16:                               ; %Flow1066
	s_mov_b32 s11, 0
.LBB1_17:                               ; %Flow1071
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s11
	s_cbranch_vccnz .LBB1_29
; %bb.18:                               ; %LeafBlock
	s_cmp_lg_u32 s6, 2
	s_cbranch_scc1 .LBB1_29
; %bb.19:
	v_cmp_ge_i32_e32 vcc_lo, s4, v1
	v_cmp_ge_i32_e64 s0, s5, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s0
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_29
; %bb.20:
	v_mad_u64_u32 v[5:6], null, v1, s5, v[2:3]
	s_ashr_i32 s11, s10, 31
	v_mov_b32_e32 v12, 0
	s_lshl_b64 s[0:1], s[10:11], 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	s_add_u32 s0, s8, s0
	s_addc_u32 s1, s9, s1
	v_ashrrev_i32_e32 v6, 31, v5
	s_load_b32 s6, s[0:1], 0x0
	s_cmp_lt_i32 s10, 1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[5:6]
	v_add_co_u32 v6, vcc_lo, s2, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, s3, v4, vcc_lo
	v_add_co_u32 v3, vcc_lo, s16, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s17, v4, vcc_lo
	global_load_b32 v0, v[6:7], off
	s_mov_b32 s16, 1
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_mul_f32_e32 v0, s6, v0
	global_store_b32 v[3:4], v0, off
	global_load_b32 v11, v12, s[0:1]
	s_cbranch_scc1 .LBB1_28
; %bb.21:                               ; %.lr.ph912
	s_lshl_b32 s6, s10, 1
	v_add_f32_e64 v8, s7, s7
	s_add_i32 s12, s6, 2
	s_or_b32 s11, s6, 1
	s_mul_i32 s17, s10, s12
	s_add_i32 s12, s10, -1
	s_add_i32 s13, s10, 1
	s_mul_i32 s12, s12, s11
	s_mul_i32 s13, s13, s11
	v_add_nc_u32_e32 v13, -1, v1
	v_dual_mul_f32 v15, s7, v8 :: v_dual_add_nc_u32 v14, 1, v1
	s_add_i32 s20, s10, s12
	s_add_i32 s12, s10, s13
	s_mov_b32 s7, 0
	s_sub_i32 s18, 0, s10
	s_add_i32 s19, s17, -1
	s_not_b32 s21, s6
	s_add_i32 s22, s12, -1
	s_add_i32 s12, s12, 1
.LBB1_22:                               ; %.lr.ph
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_23 Depth 2
	v_add_nc_u32_e32 v8, s16, v1
	s_mov_b32 s13, s7
	s_mov_b32 s23, 1
	s_lshl_b64 s[14:15], s[12:13], 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	s_add_u32 s14, s8, s14
	v_cmp_le_i32_e32 vcc_lo, s4, v8
	s_addc_u32 s15, s9, s15
	s_add_i32 s6, s16, s10
	s_mul_i32 s6, s6, s11
	v_cndmask_b32_e64 v10, 0, s4, vcc_lo
	s_add_i32 s6, s6, s10
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_lshl_b64 s[24:25], s[6:7], 2
	v_sub_nc_u32_e32 v8, v8, v10
	s_add_u32 s24, s8, s24
	s_addc_u32 s25, s9, s25
	s_sub_i32 s6, s10, s16
	v_sub_nc_u32_e32 v10, v14, v10
	v_mul_lo_u32 v8, v8, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v9, 31, v8
	v_lshlrev_b64 v[8:9], 2, v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, s2, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, s3, v9, vcc_lo
	s_clause 0x1
	global_load_b32 v17, v[6:7], off
	global_load_b32 v18, v[8:9], off
	global_load_b32 v16, v12, s[24:25]
	v_subrev_nc_u32_e32 v8, s16, v1
	s_mul_i32 s24, s6, s11
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_ashr_i32 s25, s24, 31
	v_ashrrev_i32_e32 v9, 31, v8
	s_lshl_b64 s[24:25], s[24:25], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s24, s0, s24
	s_addc_u32 s25, s1, s25
	s_cmp_eq_u32 s16, 1
	s_cselect_b32 s13, -1, 0
	s_waitcnt vmcnt(1)
	v_sub_f32_e32 v21, v18, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e64 v21, v21, -v21
	v_div_scale_f32 v22, null, v15, v15, v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v23, v22
	s_waitcnt_depctr 0xfff
	v_fma_f32 v24, -v22, v23, 1.0
	v_fmac_f32_e32 v23, v24, v23
	v_and_b32_e32 v19, s4, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v8, v19, v8
	v_mul_lo_u32 v8, v8, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v9, 31, v8
	v_lshlrev_b64 v[8:9], 2, v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, s2, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, s3, v9, vcc_lo
	v_div_scale_f32 v25, vcc_lo, v21, v15, v21
	global_load_b32 v20, v[8:9], off
	v_dual_mul_f32 v24, v25, v23 :: v_dual_add_nc_u32 v19, v19, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v26, -v22, v24, v25
	v_fmac_f32_e32 v24, v26, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v22, -v22, v24, v25
	v_div_fmas_f32 v22, v22, v23, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v21, v22, v15, v21
	v_mul_f32_e32 v22, 0x3fb8aa3b, v21
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f32 v23, 0x3fb8aa3b, v21, -v22
	v_rndne_f32_e32 v24, v22
	v_dual_fmac_f32 v23, 0x32a5705f, v21 :: v_dual_sub_f32 v22, v22, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f32_e32 v22, v22, v23
	v_cvt_i32_f32_e32 v23, v24
	v_exp_f32_e32 v22, v22
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v22, v22, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v22, 0, v22, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v21
	v_cndmask_b32_e32 v21, 0x7f800000, v22, vcc_lo
	global_load_b32 v22, v12, s[24:25]
	s_mov_b32 s24, s7
	s_waitcnt vmcnt(2)
	v_mul_f32_e32 v16, v16, v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v0, v18, v16
	global_store_b32 v[3:4], v0, off
	global_load_b32 v18, v[8:9], off
	s_waitcnt vmcnt(2)
	v_sub_f32_e32 v8, v20, v17
	v_mul_f32_e64 v8, v8, -v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f32 v9, null, v15, v15, v8
	v_div_scale_f32 v21, vcc_lo, v8, v15, v8
	v_rcp_f32_e32 v17, v9
	s_waitcnt_depctr 0xfff
	v_fma_f32 v20, -v9, v17, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v17, v20, v17
	v_mul_f32_e32 v20, v21, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v23, -v9, v20, v21
	v_fmac_f32_e32 v20, v23, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v9, -v9, v20, v21
	v_div_fmas_f32 v9, v9, v17, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v8, v9, v15, v8
	v_mul_f32_e32 v9, 0x3fb8aa3b, v8
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f32 v17, 0x3fb8aa3b, v8, -v9
	v_rndne_f32_e32 v20, v9
	v_fmac_f32_e32 v17, 0x32a5705f, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v9, v9, v20
	v_add_f32_e32 v9, v9, v17
	v_cvt_i32_f32_e32 v17, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_exp_f32_e32 v9, v9
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v9, v9, v17
	v_cndmask_b32_e32 v9, 0, v9, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v8, 0x7f800000, v9, vcc_lo
	s_waitcnt vmcnt(1)
	v_mul_f32_e32 v17, v22, v8
	v_mad_u64_u32 v[8:9], null, s5, v10, v[2:3]
	v_mad_u64_u32 v[9:10], null, s5, v19, v[2:3]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_3)
	v_fmac_f32_e32 v0, v18, v17
	global_store_b32 v[3:4], v0, off
.LBB1_23:                               ;   Parent Loop BB1_22 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_cmp_gt_i32_e32 vcc_lo, s23, v2
	s_add_i32 s26, s22, s24
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s27, s26, 31
	s_lshl_b64 s[26:27], s[26:27], 2
	v_cndmask_b32_e64 v10, 0, s5, vcc_lo
	s_add_u32 s26, s8, s26
	s_addc_u32 s27, s9, s27
	s_add_i32 s28, s20, s23
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v18, v9, v10
	v_add_nc_u32_e32 v20, v8, v10
	s_ashr_i32 s29, s28, 31
	s_lshl_b64 s[28:29], s[28:29], 2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v18, v18, s24, -1
	v_add3_u32 v21, v20, s24, -1
	s_add_u32 s28, s8, s28
	s_addc_u32 s29, s9, s29
	s_add_i32 s6, s20, s24
	v_ashrrev_i32_e32 v19, 31, v18
	s_add_i32 s30, s6, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_ashr_i32 s31, s30, 31
	v_lshlrev_b64 v[18:19], 2, v[18:19]
	s_lshl_b64 s[30:31], s[30:31], 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_add_u32 s30, s8, s30
	s_addc_u32 s31, s9, s31
	v_add_co_u32 v18, vcc_lo, s2, v18
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v19, vcc_lo, s3, v19, vcc_lo
	s_clause 0x1
	global_load_b32 v27, v[6:7], off
	global_load_b32 v28, v[18:19], off
	global_load_b32 v29, v12, s[14:15]
	v_add_nc_u32_e32 v18, s23, v2
	v_add_nc_u32_e32 v19, s23, v9
	v_add_nc_u32_e32 v22, s23, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_le_i32_e32 vcc_lo, s5, v18
	v_cndmask_b32_e64 v18, 0, s5, vcc_lo
	v_sub_nc_u32_e32 v19, v19, v18
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_sub_nc_u32_e32 v23, v22, v18
	v_ashrrev_i32_e32 v22, 31, v21
	v_ashrrev_i32_e32 v20, 31, v19
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v24, 31, v23
	v_lshlrev_b64 v[21:22], 2, v[21:22]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[19:20], 2, v[19:20]
	v_lshlrev_b64 v[23:24], 2, v[23:24]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v25, vcc_lo, s2, v19
	v_add_co_ci_u32_e32 v26, vcc_lo, s3, v20, vcc_lo
	v_add_co_u32 v21, vcc_lo, s2, v21
	v_add_co_ci_u32_e32 v22, vcc_lo, s3, v22, vcc_lo
	v_add_co_u32 v23, vcc_lo, s2, v23
	v_add_co_ci_u32_e32 v24, vcc_lo, s3, v24, vcc_lo
	s_clause 0x2
	global_load_b32 v20, v[25:26], off
	global_load_b32 v30, v[21:22], off
	global_load_b32 v31, v[23:24], off
	s_waitcnt vmcnt(4)
	v_sub_f32_e32 v19, v28, v27
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e64 v19, v19, -v19
	v_div_scale_f32 v32, null, v15, v15, v19
	v_div_scale_f32 v35, vcc_lo, v19, v15, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v33, v32
	s_waitcnt_depctr 0xfff
	v_fma_f32 v34, -v32, v33, 1.0
	v_fmac_f32_e32 v33, v34, v33
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v34, v35, v33
	v_fma_f32 v36, -v32, v34, v35
	s_waitcnt vmcnt(2)
	v_sub_f32_e32 v20, v20, v27
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v34, v36, v33
	v_mul_f32_e64 v20, v20, -v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v32, -v32, v34, v35
	v_div_fmas_f32 v32, v32, v33, v34
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v19, v32, v15, v19
	v_mul_f32_e32 v32, 0x3fb8aa3b, v19
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f32 v33, 0x3fb8aa3b, v19, -v32
	v_rndne_f32_e32 v34, v32
	v_dual_fmac_f32 v33, 0x32a5705f, v19 :: v_dual_sub_f32 v32, v32, v34
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f32_e32 v32, v32, v33
	v_cvt_i32_f32_e32 v33, v34
	v_exp_f32_e32 v32, v32
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v32, v32, v33
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v32, 0, v32, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v19
	v_cndmask_b32_e32 v19, 0x7f800000, v32, vcc_lo
	global_load_b32 v32, v12, s[30:31]
	v_mul_f32_e32 v19, v29, v19
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v0, v28, v19
	s_clause 0x1
	global_load_b32 v28, v12, s[26:27]
	global_load_b32 v29, v12, s[28:29]
	global_store_b32 v[3:4], v0, off
	global_load_b32 v25, v[25:26], off
	v_div_scale_f32 v26, null, v15, v15, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v33, v26
	s_waitcnt_depctr 0xfff
	v_fma_f32 v34, -v26, v33, 1.0
	v_fmac_f32_e32 v33, v34, v33
	v_div_scale_f32 v34, vcc_lo, v20, v15, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v35, v34, v33
	v_fma_f32 v36, -v26, v35, v34
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v35, v36, v33
	v_fma_f32 v26, -v26, v35, v34
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v26, v26, v33, v35
	v_div_fixup_f32 v20, v26, v15, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v26, 0x3fb8aa3b, v20
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v20
	v_fma_f32 v33, 0x3fb8aa3b, v20, -v26
	v_rndne_f32_e32 v34, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v33, 0x32a5705f, v20 :: v_dual_sub_f32 v26, v26, v34
	v_add_f32_e32 v26, v26, v33
	v_cvt_i32_f32_e32 v33, v34
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_exp_f32_e32 v26, v26
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v26, v26, v33
	v_cndmask_b32_e32 v26, 0, v26, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v20, 0x7f800000, v26, vcc_lo
	s_waitcnt vmcnt(2)
	v_mul_f32_e32 v20, v28, v20
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v0, v20, v25
	global_store_b32 v[3:4], v0, off
	global_load_b32 v22, v[21:22], off
	v_sub_f32_e32 v21, v30, v27
	v_mul_f32_e64 v21, v21, -v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f32 v25, null, v15, v15, v21
	v_rcp_f32_e32 v26, v25
	s_waitcnt_depctr 0xfff
	v_fma_f32 v28, -v25, v26, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v26, v28, v26
	v_div_scale_f32 v28, vcc_lo, v21, v15, v21
	v_mul_f32_e32 v30, v28, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v33, -v25, v30, v28
	v_fmac_f32_e32 v30, v33, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v25, -v25, v30, v28
	v_div_fmas_f32 v25, v25, v26, v30
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v21, v25, v15, v21
	v_mul_f32_e32 v25, 0x3fb8aa3b, v21
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f32 v26, 0x3fb8aa3b, v21, -v25
	v_rndne_f32_e32 v28, v25
	v_dual_fmac_f32 v26, 0x32a5705f, v21 :: v_dual_sub_f32 v25, v25, v28
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f32_e32 v25, v25, v26
	v_cvt_i32_f32_e32 v26, v28
	v_exp_f32_e32 v25, v25
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v25, v25, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v25, 0, v25, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v21
	v_cndmask_b32_e32 v21, 0x7f800000, v25, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v21, v29, v21
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v0, v21, v22
	v_sub_f32_e32 v22, v31, v27
	global_store_b32 v[3:4], v0, off
	global_load_b32 v23, v[23:24], off
	v_mul_f32_e64 v22, v22, -v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f32 v24, null, v15, v15, v22
	v_rcp_f32_e32 v25, v24
	s_waitcnt_depctr 0xfff
	v_fma_f32 v26, -v24, v25, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v25, v26, v25
	v_div_scale_f32 v26, vcc_lo, v22, v15, v22
	v_mul_f32_e32 v27, v26, v25
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v28, -v24, v27, v26
	v_fmac_f32_e32 v27, v28, v25
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v24, -v24, v27, v26
	v_div_fmas_f32 v24, v24, v25, v27
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v22, v24, v15, v22
	v_mul_f32_e32 v24, 0x3fb8aa3b, v22
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v22
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f32 v25, 0x3fb8aa3b, v22, -v24
	v_rndne_f32_e32 v26, v24
	v_fmac_f32_e32 v25, 0x32a5705f, v22
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v24, v24, v26
	v_add_f32_e32 v24, v24, v25
	v_cvt_i32_f32_e32 v25, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_exp_f32_e32 v24, v24
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v24, v24, v25
	v_cndmask_b32_e32 v24, 0, v24, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v22
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v22, 0x7f800000, v24, vcc_lo
	s_and_not1_b32 vcc_lo, exec_lo, s13
	v_mul_f32_e32 v22, v32, v22
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v0, v22, v23
	global_store_b32 v[3:4], v0, off
	s_cbranch_vccnz .LBB1_25
; %bb.24:                               ;   in Loop: Header=BB1_23 Depth=2
	v_add_nc_u32_e32 v10, v5, v10
	s_add_i32 s6, s17, s23
	v_sub_nc_u32_e32 v18, 0, v18
	s_lshl_b64 s[26:27], s[6:7], 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_add_u32 s26, s8, s26
	v_add3_u32 v23, v10, s24, -1
	s_addc_u32 s27, s9, s27
	v_ashrrev_i32_e32 v24, 31, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[23:24], 2, v[23:24]
	v_add_co_u32 v23, vcc_lo, s2, v23
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v24, vcc_lo, s3, v24, vcc_lo
	s_clause 0x1
	global_load_b32 v10, v[6:7], off
	global_load_b32 v25, v[23:24], off
	global_load_b32 v26, v12, s[26:27]
	v_add3_u32 v23, v5, s23, v18
	s_add_i32 s26, s19, s24
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_ashr_i32 s27, s26, 31
	v_ashrrev_i32_e32 v24, 31, v23
	s_lshl_b64 s[26:27], s[26:27], 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_add_u32 s26, s8, s26
	s_addc_u32 s27, s9, s27
	v_lshlrev_b64 v[23:24], 2, v[23:24]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v23, vcc_lo, s2, v23
	v_add_co_ci_u32_e32 v24, vcc_lo, s3, v24, vcc_lo
	global_load_b32 v18, v[23:24], off
	s_waitcnt vmcnt(2)
	v_sub_f32_e32 v27, v25, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e64 v27, v27, -v27
	v_div_scale_f32 v28, null, v15, v15, v27
	v_div_scale_f32 v31, vcc_lo, v27, v15, v27
	s_delay_alu instid0(VALU_DEP_2)
	v_rcp_f32_e32 v29, v28
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v10, v18, v10
	s_waitcnt_depctr 0xfff
	v_fma_f32 v30, -v28, v29, 1.0
	v_mul_f32_e64 v10, v10, -v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v29, v30, v29
	v_div_scale_f32 v18, null, v15, v15, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v30, v31, v29
	v_fma_f32 v32, -v28, v30, v31
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v30, v32, v29
	v_fma_f32 v28, -v28, v30, v31
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v28, v28, v29, v30
	v_div_fixup_f32 v27, v28, v15, v27
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v28, 0x3fb8aa3b, v27
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v27
	v_fma_f32 v29, 0x3fb8aa3b, v27, -v28
	v_rndne_f32_e32 v30, v28
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v29, 0x32a5705f, v27 :: v_dual_sub_f32 v28, v28, v30
	v_add_f32_e32 v28, v28, v29
	v_cvt_i32_f32_e32 v29, v30
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_exp_f32_e32 v28, v28
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v28, v28, v29
	v_cndmask_b32_e32 v28, 0, v28, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v27
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v27, 0x7f800000, v28, vcc_lo
	global_load_b32 v28, v12, s[26:27]
	v_mul_f32_e32 v29, v26, v27
	v_fmac_f32_e32 v0, v25, v29
	v_div_scale_f32 v29, vcc_lo, v10, v15, v10
	global_store_b32 v[3:4], v0, off
	global_load_b32 v23, v[23:24], off
	v_rcp_f32_e32 v24, v18
	s_waitcnt_depctr 0xfff
	v_fma_f32 v25, -v18, v24, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v24, v25, v24
	v_mul_f32_e32 v25, v29, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v30, -v18, v25, v29
	v_fmac_f32_e32 v25, v30, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v18, -v18, v25, v29
	v_div_fmas_f32 v18, v18, v24, v25
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v10, v18, v15, v10
	v_mul_f32_e32 v18, 0x3fb8aa3b, v10
	v_cmp_ngt_f32_e32 vcc_lo, 0xc2ce8ed0, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f32 v24, 0x3fb8aa3b, v10, -v18
	v_rndne_f32_e32 v25, v18
	v_fmac_f32_e32 v24, 0x32a5705f, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v18, v18, v25
	v_add_f32_e32 v18, v18, v24
	v_cvt_i32_f32_e32 v24, v25
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_exp_f32_e32 v18, v18
	s_waitcnt_depctr 0xfff
	v_ldexp_f32 v18, v18, v24
	v_cndmask_b32_e32 v18, 0, v18, vcc_lo
	v_cmp_nlt_f32_e32 vcc_lo, 0x42b17218, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v10, 0x7f800000, v18, vcc_lo
	s_waitcnt vmcnt(1)
	v_mul_f32_e32 v10, v28, v10
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v0, v23, v10
	v_fmac_f32_e32 v10, v26, v27
	global_store_b32 v[3:4], v0, off
	v_add_f32_e32 v11, v11, v10
.LBB1_25:                               ;   in Loop: Header=BB1_23 Depth=2
	v_add_f32_e32 v10, v19, v20
	s_add_i32 s23, s23, 1
	s_add_i32 s24, s24, -1
	s_add_i32 s6, s18, s23
	s_add_u32 s14, s14, 4
	v_add_f32_e32 v10, v10, v21
	s_addc_u32 s15, s15, 0
	s_cmp_eq_u32 s6, 1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v10, v10, v22
	v_add_f32_e32 v11, v10, v11
	s_cbranch_scc0 .LBB1_23
; %bb.26:                               ; %._crit_edge
                                        ;   in Loop: Header=BB1_22 Depth=1
	v_add_f32_e32 v8, v16, v17
	v_add_nc_u32_e32 v13, -1, v13
	v_add_nc_u32_e32 v14, 1, v14
	s_add_i32 s6, s16, 1
	s_add_i32 s20, s20, s21
	v_add_f32_e32 v11, v8, v11
	s_add_i32 s22, s22, s11
	s_add_i32 s12, s12, s11
	s_cmp_eq_u32 s10, s16
	s_cbranch_scc1 .LBB1_28
; %bb.27:                               ;   in Loop: Header=BB1_22 Depth=1
	s_mov_b32 s16, s6
	s_branch .LBB1_22
.LBB1_28:                               ; %Flow1068
	s_waitcnt vmcnt(0)
	v_div_scale_f32 v1, null, v11, v11, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v2, v1
	s_waitcnt_depctr 0xfff
	v_fma_f32 v5, -v1, v2, 1.0
	v_fmac_f32_e32 v2, v5, v2
	v_div_scale_f32 v5, vcc_lo, v0, v11, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v6, v5, v2
	v_fma_f32 v7, -v1, v6, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v6, v7, v2
	v_fma_f32 v1, -v1, v6, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v1, v1, v2, v6
	v_div_fixup_f32 v0, v1, v11, v0
	global_store_b32 v[3:4], v0, off
.LBB1_29:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8conv_bilPfiiiS_iS_f
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 62
		.amdhsa_next_free_sgpr 32
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z8conv_bilPfiiiS_iS_f, .Lfunc_end1-_Z8conv_bilPfiiiS_iS_f
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 7208
; NumSgprs: 34
; NumVgprs: 62
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 4
; VGPRBlocks: 7
; NumSGPRsForWavesPerEU: 34
; NumVGPRsForWavesPerEU: 62
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z4convPfiiiS_iS_
    .private_segment_fixed_size: 0
    .sgpr_count:     42
    .sgpr_spill_count: 0
    .symbol:         _Z4convPfiiiS_iS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     45
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .offset:         48
        .size:           4
        .value_kind:     by_value
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         60
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         64
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         68
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         70
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         72
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         74
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         76
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         78
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         112
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         120
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 312
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z8conv_bilPfiiiS_iS_f
    .private_segment_fixed_size: 0
    .sgpr_count:     34
    .sgpr_spill_count: 0
    .symbol:         _Z8conv_bilPfiiiS_iS_f.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     62
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
