#include <stdio.h>
#include <stdlib.h>

void initialize(int* input, int size) {
  for (int index = 0; index < size; index++) {
    input[index] = index;
  }
}

int cpu_reduction(int* input, int size) {
  int result = 0;
  for (int index = 0; index < size; index++) {
    result += index;
  }
  return result;
}

void showResult(int cpu_result, int gpu_result) {
  printf("cpu_result: %d, gpu_result: %d\n", cpu_result, gpu_result);
}

//// 1. reduction neighbored pairs kernel
__global__ void redunction_v1(int* input, int* output, int size) {
  int tid = threadIdx.x;
  int gid = blockDim.x * blockIdx.x + threadIdx.x;

  if (gid >= size) return;

  for (int offset = 1; offset <= blockDim.x / 2; offset *= 2) {
    if (tid % (2 * offset) == 0) {
      input[gid] += input[gid + offset];
    }
    __syncthreads();
  }

  if (tid == 0) {
    output[blockIdx.x] = input[gid];
  }
}

//// 2. warp_divergence_improved of #1 reduction_v1
__global__ void reduction_v1_improved(int* input, int* output, int size) {
  int tid = threadIdx.x;
  int gid = blockDim.x * blockIdx.x + threadIdx.x;

  // local data block pointer
  int* i_data = input + blockDim.x * blockIdx.x;

  if (gid >= size) return;

  for (int offset = 1; offset <= blockDim.x / 2; offset *= 2) {
    int index = 2 * offset * tid;

    if (index < blockDim.x) {
      i_data[index] += i_data[index + offset];
    }

    __syncthreads();
  }

  if (tid == 0) {
    output[blockIdx.x] = input[gid];
  }
}

int main(int argc, char** argv) {
  // int size = 1 << 27;  // 128 Mb of data
  int size = 512;
  dim3 block(128);
  dim3 grid(size / block.x);

  int* h_ref = (int*)malloc(grid.x * sizeof(int));
  int gpu_result;

  //// input
  int* h_input;
  h_input = (int*)malloc(size * sizeof(int));
  initialize(h_input, size);

  //// cpu redunction
  int cpu_result = cpu_reduction(h_input, size);

  //// gpu redunction
  int *d_input, *d_output;
  cudaMalloc((void**)&d_input, size * sizeof(int));
  cudaMalloc((void**)&d_output, grid.x * sizeof(int));

  //// #1
  cudaMemcpy(d_input, h_input, size * sizeof(int), cudaMemcpyHostToDevice);
  cudaMemset(d_output, 0, grid.x * sizeof(int));
  redunction_v1<<<grid, block>>>(d_input, d_output, size);
  cudaDeviceSynchronize();

  memset(h_ref, 0, grid.x * sizeof(int));
  cudaMemcpy(h_ref, d_output, grid.x * sizeof(int), cudaMemcpyDeviceToHost);
  gpu_result = 0;
  for (int i = 0; i < grid.x; i++) {
    gpu_result += h_ref[i];
  }
  showResult(cpu_result, gpu_result);

  //// #2
  cudaMemcpy(d_input, h_input, size * sizeof(int), cudaMemcpyHostToDevice);
  cudaMemset(d_output, 0, grid.x * sizeof(int));
  reduction_v1_improved<<<grid, block>>>(d_input, d_output, size);
  cudaDeviceSynchronize();

  memset(h_ref, 0, grid.x * sizeof(int));
  cudaMemcpy(h_ref, d_output, grid.x * sizeof(int), cudaMemcpyDeviceToHost);
  gpu_result = 0;
  for (int i = 0; i < grid.x; i++) {
    gpu_result += h_ref[i];
  }
  showResult(cpu_result, gpu_result);

  cudaFree(d_output);
  cudaFree(d_input);
  free(h_ref);
  free(h_input);
  cudaDeviceReset();

  return 0;
}

	.file	"tmpxft_0030d944_00000000-6_reduction.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2033:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2033:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z10initializePii
	.type	_Z10initializePii, @function
_Z10initializePii:
.LFB2027:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
.L3:
	cmpl	%eax, %esi
	jle	.L6
	movl	%eax, (%rdi,%rax,4)
	incq	%rax
	jmp	.L3
.L6:
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z10initializePii, .-_Z10initializePii
	.globl	_Z13cpu_reductionPii
	.type	_Z13cpu_reductionPii, @function
_Z13cpu_reductionPii:
.LFB2028:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
	xorl	%edx, %edx
.L8:
	cmpl	%esi, %eax
	jge	.L10
	addl	%eax, %edx
	incl	%eax
	jmp	.L8
.L10:
	movl	%edx, %eax
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z13cpu_reductionPii, .-_Z13cpu_reductionPii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"cpu_result: %d, gpu_result: %d\n"
	.text
	.globl	_Z10showResultii
	.type	_Z10showResultii, @function
_Z10showResultii:
.LFB2029:
	.cfi_startproc
	endbr64
	movl	%edi, %edx
	movl	%esi, %ecx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC0(%rip), %rsi
	jmp	__printf_chk@PLT
	.cfi_endproc
.LFE2029:
	.size	_Z10showResultii, .-_Z10showResultii
	.globl	_Z36__device_stub__Z13redunction_v1PiS_iPiS_i
	.type	_Z36__device_stub__Z13redunction_v1PiS_iPiS_i, @function
_Z36__device_stub__Z13redunction_v1PiS_iPiS_i:
.LFB2055:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L12
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z13redunction_v1PiS_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L12:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L14
	call	__stack_chk_fail@PLT
.L14:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2055:
	.size	_Z36__device_stub__Z13redunction_v1PiS_iPiS_i, .-_Z36__device_stub__Z13redunction_v1PiS_iPiS_i
	.globl	_Z13redunction_v1PiS_i
	.type	_Z13redunction_v1PiS_i, @function
_Z13redunction_v1PiS_i:
.LFB2056:
	.cfi_startproc
	endbr64
	jmp	_Z36__device_stub__Z13redunction_v1PiS_iPiS_i
	.cfi_endproc
.LFE2056:
	.size	_Z13redunction_v1PiS_i, .-_Z13redunction_v1PiS_i
	.globl	_Z44__device_stub__Z21reduction_v1_improvedPiS_iPiS_i
	.type	_Z44__device_stub__Z21reduction_v1_improvedPiS_iPiS_i, @function
_Z44__device_stub__Z21reduction_v1_improvedPiS_iPiS_i:
.LFB2057:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L17
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z21reduction_v1_improvedPiS_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L17:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L19
	call	__stack_chk_fail@PLT
.L19:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2057:
	.size	_Z44__device_stub__Z21reduction_v1_improvedPiS_iPiS_i, .-_Z44__device_stub__Z21reduction_v1_improvedPiS_iPiS_i
	.globl	_Z21reduction_v1_improvedPiS_i
	.type	_Z21reduction_v1_improvedPiS_i, @function
_Z21reduction_v1_improvedPiS_i:
.LFB2058:
	.cfi_startproc
	endbr64
	jmp	_Z44__device_stub__Z21reduction_v1_improvedPiS_iPiS_i
	.cfi_endproc
.LFE2058:
	.size	_Z21reduction_v1_improvedPiS_i, .-_Z21reduction_v1_improvedPiS_i
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	$16, %edi
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	subq	$56, %rsp
	.cfi_def_cfa_offset 80
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movl	$2048, %edi
	movq	%rax, %rbx
	call	malloc@PLT
	movl	$512, %esi
	movq	%rax, %rdi
	movq	%rax, %rbp
	call	_Z10initializePii
	movq	%rsp, %rdi
	movl	$2048, %esi
	call	cudaMalloc@PLT
	leaq	8(%rsp), %rdi
	movl	$16, %esi
	call	cudaMalloc@PLT
	movq	(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$2048, %edx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	movl	$16, %edx
	call	cudaMemset@PLT
	movl	$1073741825, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$33554433, %edx
	salq	$2, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	salq	$7, %rdx
	movq	%rdi, 28(%rsp)
	movl	$1, 36(%rsp)
	movq	%rdx, 16(%rsp)
	movl	$1, 24(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L23
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	movl	$512, %edx
	call	_Z36__device_stub__Z13redunction_v1PiS_iPiS_i
.L23:
	call	cudaDeviceSynchronize@PLT
	xorps	%xmm0, %xmm0
	movq	8(%rsp), %rsi
	movq	%rbx, %rdi
	movups	%xmm0, (%rbx)
	movl	$2, %ecx
	movl	$16, %edx
	call	cudaMemcpy@PLT
	movl	4(%rbx), %esi
	movl	$130816, %edi
	addl	(%rbx), %esi
	addl	8(%rbx), %esi
	addl	12(%rbx), %esi
	call	_Z10showResultii
	movq	(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$2048, %edx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	movl	$16, %edx
	call	cudaMemset@PLT
	movl	24(%rsp), %ecx
	movl	36(%rsp), %esi
	xorl	%r9d, %r9d
	movq	16(%rsp), %rdx
	movq	28(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L24
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	movl	$512, %edx
	call	_Z44__device_stub__Z21reduction_v1_improvedPiS_iPiS_i
.L24:
	call	cudaDeviceSynchronize@PLT
	xorps	%xmm0, %xmm0
	movq	8(%rsp), %rsi
	movq	%rbx, %rdi
	movups	%xmm0, (%rbx)
	movl	$2, %ecx
	movl	$16, %edx
	call	cudaMemcpy@PLT
	movl	4(%rbx), %esi
	movl	$130816, %edi
	addl	(%rbx), %esi
	addl	8(%rbx), %esi
	addl	12(%rbx), %esi
	call	_Z10showResultii
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	call	cudaDeviceReset@PLT
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L25
	call	__stack_chk_fail@PLT
.L25:
	addq	$56, %rsp
	.cfi_def_cfa_offset 24
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2030:
	.size	main, .-main
	.section	.rodata.str1.1
.LC1:
	.string	"_Z21reduction_v1_improvedPiS_i"
.LC2:
	.string	"_Z13redunction_v1PiS_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2060:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC1(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z21reduction_v1_improvedPiS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC2(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z13redunction_v1PiS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2060:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>

void initialize(int* input, int size) {
  for (int index = 0; index < size; index++) {
    input[index] = index;
  }
}

int cpu_reduction(int* input, int size) {
  int result = 0;
  for (int index = 0; index < size; index++) {
    result += index;
  }
  return result;
}

void showResult(int cpu_result, int gpu_result) {
  printf("cpu_result: %d, gpu_result: %d\n", cpu_result, gpu_result);
}

//// 1. reduction neighbored pairs kernel
__global__ void redunction_v1(int* input, int* output, int size) {
  int tid = threadIdx.x;
  int gid = blockDim.x * blockIdx.x + threadIdx.x;

  if (gid >= size) return;

  for (int offset = 1; offset <= blockDim.x / 2; offset *= 2) {
    if (tid % (2 * offset) == 0) {
      input[gid] += input[gid + offset];
    }
    __syncthreads();
  }

  if (tid == 0) {
    output[blockIdx.x] = input[gid];
  }
}

//// 2. warp_divergence_improved of #1 reduction_v1
__global__ void reduction_v1_improved(int* input, int* output, int size) {
  int tid = threadIdx.x;
  int gid = blockDim.x * blockIdx.x + threadIdx.x;

  // local data block pointer
  int* i_data = input + blockDim.x * blockIdx.x;

  if (gid >= size) return;

  for (int offset = 1; offset <= blockDim.x / 2; offset *= 2) {
    int index = 2 * offset * tid;

    if (index < blockDim.x) {
      i_data[index] += i_data[index + offset];
    }

    __syncthreads();
  }

  if (tid == 0) {
    output[blockIdx.x] = input[gid];
  }
}

int main(int argc, char** argv) {
  // int size = 1 << 27;  // 128 Mb of data
  int size = 512;
  dim3 block(128);
  dim3 grid(size / block.x);

  int* h_ref = (int*)malloc(grid.x * sizeof(int));
  int gpu_result;

  //// input
  int* h_input;
  h_input = (int*)malloc(size * sizeof(int));
  initialize(h_input, size);

  //// cpu redunction
  int cpu_result = cpu_reduction(h_input, size);

  //// gpu redunction
  int *d_input, *d_output;
  hipMalloc((void**)&d_input, size * sizeof(int));
  hipMalloc((void**)&d_output, grid.x * sizeof(int));

  //// #1
  hipMemcpy(d_input, h_input, size * sizeof(int), hipMemcpyHostToDevice);
  hipMemset(d_output, 0, grid.x * sizeof(int));
  redunction_v1<<<grid, block>>>(d_input, d_output, size);
  hipDeviceSynchronize();

  memset(h_ref, 0, grid.x * sizeof(int));
  hipMemcpy(h_ref, d_output, grid.x * sizeof(int), hipMemcpyDeviceToHost);
  gpu_result = 0;
  for (int i = 0; i < grid.x; i++) {
    gpu_result += h_ref[i];
  }
  showResult(cpu_result, gpu_result);

  //// #2
  hipMemcpy(d_input, h_input, size * sizeof(int), hipMemcpyHostToDevice);
  hipMemset(d_output, 0, grid.x * sizeof(int));
  reduction_v1_improved<<<grid, block>>>(d_input, d_output, size);
  hipDeviceSynchronize();

  memset(h_ref, 0, grid.x * sizeof(int));
  hipMemcpy(h_ref, d_output, grid.x * sizeof(int), hipMemcpyDeviceToHost);
  gpu_result = 0;
  for (int i = 0; i < grid.x; i++) {
    gpu_result += h_ref[i];
  }
  showResult(cpu_result, gpu_result);

  hipFree(d_output);
  hipFree(d_input);
  free(h_ref);
  free(h_input);
  hipDeviceReset();

  return 0;
}

	.text
	.file	"reduction.hip"
	.globl	_Z10initializePii               # -- Begin function _Z10initializePii
	.type	_Z10initializePii,@function
_Z10initializePii:                      # @_Z10initializePii
	.cfi_startproc
# %bb.0:
	testl	%esi, %esi
	jle	.LBB0_3
# %bb.1:                                # %.lr.ph.preheader
	movl	%esi, %eax
	xorl	%ecx, %ecx
.LBB0_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	%ecx, (%rdi,%rcx,4)
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB0_2
.LBB0_3:                                # %._crit_edge
	retq
.Lfunc_end0:
	.size	_Z10initializePii, .Lfunc_end0-_Z10initializePii
	.cfi_endproc
                                        # -- End function
	.globl	_Z13cpu_reductionPii            # -- Begin function _Z13cpu_reductionPii
	.type	_Z13cpu_reductionPii,@function
_Z13cpu_reductionPii:                   # @_Z13cpu_reductionPii
	.cfi_startproc
# %bb.0:
                                        # kill: def $esi killed $esi def $rsi
	testl	%esi, %esi
	jle	.LBB1_1
# %bb.2:                                # %.lr.ph.preheader
	leal	-1(%rsi), %eax
	leal	-2(%rsi), %ecx
	imulq	%rax, %rcx
	shrq	%rcx
	leal	(%rsi,%rcx), %eax
	decl	%eax
	retq
.LBB1_1:
	xorl	%eax, %eax
	retq
.Lfunc_end1:
	.size	_Z13cpu_reductionPii, .Lfunc_end1-_Z13cpu_reductionPii
	.cfi_endproc
                                        # -- End function
	.globl	_Z10showResultii                # -- Begin function _Z10showResultii
	.type	_Z10showResultii,@function
_Z10showResultii:                       # @_Z10showResultii
	.cfi_startproc
# %bb.0:
	movl	%esi, %edx
	movl	%edi, %esi
	movl	$.L.str, %edi
	xorl	%eax, %eax
	jmp	printf                          # TAILCALL
.Lfunc_end2:
	.size	_Z10showResultii, .Lfunc_end2-_Z10showResultii
	.cfi_endproc
                                        # -- End function
	.globl	_Z28__device_stub__redunction_v1PiS_i # -- Begin function _Z28__device_stub__redunction_v1PiS_i
	.type	_Z28__device_stub__redunction_v1PiS_i,@function
_Z28__device_stub__redunction_v1PiS_i:  # @_Z28__device_stub__redunction_v1PiS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13redunction_v1PiS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z28__device_stub__redunction_v1PiS_i, .Lfunc_end3-_Z28__device_stub__redunction_v1PiS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z36__device_stub__reduction_v1_improvedPiS_i # -- Begin function _Z36__device_stub__reduction_v1_improvedPiS_i
	.type	_Z36__device_stub__reduction_v1_improvedPiS_i,@function
_Z36__device_stub__reduction_v1_improvedPiS_i: # @_Z36__device_stub__reduction_v1_improvedPiS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z21reduction_v1_improvedPiS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z36__device_stub__reduction_v1_improvedPiS_i, .Lfunc_end4-_Z36__device_stub__reduction_v1_improvedPiS_i
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$16, %edi
	callq	malloc
	movq	%rax, %rbx
	movl	$2048, %edi                     # imm = 0x800
	callq	malloc
	movq	%rax, %r14
	xorl	%eax, %eax
.LBB5_1:                                # %.lr.ph.i
                                        # =>This Inner Loop Header: Depth=1
	movl	%eax, (%r14,%rax,4)
	incq	%rax
	cmpq	$512, %rax                      # imm = 0x200
	jne	.LBB5_1
# %bb.2:                                # %_Z10initializePii.exit
	movabsq	$4294967300, %r15               # imm = 0x100000004
	leaq	16(%rsp), %r12
	movl	$2048, %esi                     # imm = 0x800
	movq	%r12, %rdi
	callq	hipMalloc
	leaq	8(%rsp), %r13
	movl	$16, %esi
	movq	%r13, %rdi
	callq	hipMalloc
	movq	(%r12), %rdi
	movl	$2048, %edx                     # imm = 0x800
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r13), %rdi
	xorl	%ebp, %ebp
	movl	$16, %edx
	xorl	%esi, %esi
	callq	hipMemset
	leaq	124(%r15), %r12
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_4
# %bb.3:
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	movl	$512, %edx                      # imm = 0x200
	callq	_Z28__device_stub__redunction_v1PiS_i
.LBB5_4:
	callq	hipDeviceSynchronize
	xorps	%xmm0, %xmm0
	movups	%xmm0, (%rbx)
	movq	8(%rsp), %rsi
	movl	$16, %edx
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	xorl	%eax, %eax
.LBB5_5:                                # =>This Inner Loop Header: Depth=1
	addl	(%rbx,%rax,4), %ebp
	incq	%rax
	cmpq	$4, %rax
	jne	.LBB5_5
# %bb.6:
	xorl	%r13d, %r13d
	movl	$.L.str, %edi
	movl	$130816, %esi                   # imm = 0x1FF00
	movl	%ebp, %edx
	xorl	%eax, %eax
	callq	printf
	movq	16(%rsp), %rdi
	movl	$2048, %edx                     # imm = 0x800
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	movl	$16, %edx
	xorl	%esi, %esi
	callq	hipMemset
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_8
# %bb.7:
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	movl	$512, %edx                      # imm = 0x200
	callq	_Z36__device_stub__reduction_v1_improvedPiS_i
.LBB5_8:
	callq	hipDeviceSynchronize
	xorps	%xmm0, %xmm0
	movups	%xmm0, (%rbx)
	movq	8(%rsp), %rsi
	movl	$16, %edx
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	xorl	%eax, %eax
.LBB5_9:                                # =>This Inner Loop Header: Depth=1
	addl	(%rbx,%rax,4), %r13d
	incq	%rax
	cmpq	$4, %rax
	jne	.LBB5_9
# %bb.10:
	movl	$.L.str, %edi
	movl	$130816, %esi                   # imm = 0x1FF00
	movl	%r13d, %edx
	xorl	%eax, %eax
	callq	printf
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	callq	hipDeviceReset
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	main, .Lfunc_end5-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB6_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB6_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13redunction_v1PiS_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z21reduction_v1_improvedPiS_i, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end6:
	.size	__hip_module_ctor, .Lfunc_end6-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB7_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB7_2:
	retq
.Lfunc_end7:
	.size	__hip_module_dtor, .Lfunc_end7-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"cpu_result: %d, gpu_result: %d\n"
	.size	.L.str, 32

	.type	_Z13redunction_v1PiS_i,@object  # @_Z13redunction_v1PiS_i
	.section	.rodata,"a",@progbits
	.globl	_Z13redunction_v1PiS_i
	.p2align	3, 0x0
_Z13redunction_v1PiS_i:
	.quad	_Z28__device_stub__redunction_v1PiS_i
	.size	_Z13redunction_v1PiS_i, 8

	.type	_Z21reduction_v1_improvedPiS_i,@object # @_Z21reduction_v1_improvedPiS_i
	.globl	_Z21reduction_v1_improvedPiS_i
	.p2align	3, 0x0
_Z21reduction_v1_improvedPiS_i:
	.quad	_Z36__device_stub__reduction_v1_improvedPiS_i
	.size	_Z21reduction_v1_improvedPiS_i, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z13redunction_v1PiS_i"
	.size	.L__unnamed_1, 23

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z21reduction_v1_improvedPiS_i"
	.size	.L__unnamed_2, 31

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z28__device_stub__redunction_v1PiS_i
	.addrsig_sym _Z36__device_stub__reduction_v1_improvedPiS_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z13redunction_v1PiS_i
	.addrsig_sym _Z21reduction_v1_improvedPiS_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z13redunction_v1PiS_i  ; -- Begin function _Z13redunction_v1PiS_i
	.globl	_Z13redunction_v1PiS_i
	.p2align	8
	.type	_Z13redunction_v1PiS_i,@function
_Z13redunction_v1PiS_i:                 ; @_Z13redunction_v1PiS_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s3, s[0:1], 0x10
	s_mov_b32 s4, s15
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s2, 0xffff
	s_mov_b32 s2, exec_lo
	v_mad_u64_u32 v[1:2], null, s4, s5, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB0_8
; %bb.1:                                ; %.preheader
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_cmp_lt_u32 s5, 2
	s_cbranch_scc1 .LBB0_6
; %bb.2:                                ; %.lr.ph
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	s_mov_b32 s6, 1
	s_lshr_b32 s5, s5, 1
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, vcc_lo, s0, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
.LBB0_3:                                ; =>This Inner Loop Header: Depth=1
	s_lshl_b32 s8, s6, 1
	s_mov_b32 s9, exec_lo
	s_add_i32 s7, s8, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v5, s7, v0
	v_cmpx_eq_u32_e32 0, v5
	s_cbranch_execz .LBB0_5
; %bb.4:                                ;   in Loop: Header=BB0_3 Depth=1
	s_ashr_i32 s7, s6, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[6:7], s[6:7], 2
	v_add_co_u32 v5, vcc_lo, v3, s6
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v4, vcc_lo
	s_clause 0x1
	global_load_b32 v5, v[5:6], off
	global_load_b32 v6, v[3:4], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v5, v6, v5
	global_store_b32 v[3:4], v5, off
.LBB0_5:                                ;   in Loop: Header=BB0_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
	s_cmp_gt_u32 s8, s5
	s_mov_b32 s6, s8
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB0_3
.LBB0_6:                                ; %._crit_edge
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	s_mov_b32 s5, 0
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_8
; %bb.7:
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_lshl_b64 s[0:1], s[4:5], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s2, s0
	global_load_b32 v0, v[0:1], off
	v_mov_b32_e32 v1, 0
	s_addc_u32 s1, s3, s1
	s_waitcnt vmcnt(0)
	global_store_b32 v1, v0, s[0:1]
.LBB0_8:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13redunction_v1PiS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z13redunction_v1PiS_i, .Lfunc_end0-_Z13redunction_v1PiS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 340
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z21reduction_v1_improvedPiS_i ; -- Begin function _Z21reduction_v1_improvedPiS_i
	.globl	_Z21reduction_v1_improvedPiS_i
	.p2align	8
	.type	_Z21reduction_v1_improvedPiS_i,@function
_Z21reduction_v1_improvedPiS_i:         ; @_Z21reduction_v1_improvedPiS_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s3, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s2, 0xffff
	s_mov_b32 s2, exec_lo
	s_mul_i32 s8, s15, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v1, s8, v0
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB1_8
; %bb.1:                                ; %.preheader
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mov_b32 s4, s15
	s_cmp_lt_u32 s5, 2
	s_cbranch_scc1 .LBB1_6
; %bb.2:                                ; %.lr.ph.preheader
	s_mov_b32 s9, 0
	v_mov_b32_e32 v3, 0
	s_lshl_b64 s[10:11], s[8:9], 2
	s_lshr_b32 s8, s5, 1
	s_waitcnt lgkmcnt(0)
	s_add_u32 s9, s0, s10
	s_mov_b32 s6, 1
	s_addc_u32 s10, s1, s11
.LBB1_3:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_lshl_b32 s11, s6, 1
	s_mov_b32 s12, exec_lo
	v_mul_lo_u32 v2, s11, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s5, v2
	s_cbranch_execz .LBB1_5
; %bb.4:                                ;   in Loop: Header=BB1_3 Depth=1
	v_lshlrev_b64 v[4:5], 2, v[2:3]
	s_ashr_i32 s7, s6, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_lshl_b64 s[6:7], s[6:7], 2
	v_add_co_u32 v4, vcc_lo, s9, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s10, v5, vcc_lo
	v_add_co_u32 v6, vcc_lo, v4, s6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v5, vcc_lo
	s_clause 0x1
	global_load_b32 v2, v[6:7], off
	global_load_b32 v6, v[4:5], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v2, v6, v2
	global_store_b32 v[4:5], v2, off
.LBB1_5:                                ;   in Loop: Header=BB1_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s12
	s_cmp_gt_u32 s11, s8
	s_mov_b32 s6, s11
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB1_3
.LBB1_6:                                ; %._crit_edge
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	s_mov_b32 s5, 0
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_8
; %bb.7:
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_lshl_b64 s[0:1], s[4:5], 2
	s_add_u32 s0, s2, s0
	global_load_b32 v0, v[0:1], off
	v_mov_b32_e32 v1, 0
	s_addc_u32 s1, s3, s1
	s_waitcnt vmcnt(0)
	global_store_b32 v1, v0, s[0:1]
.LBB1_8:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z21reduction_v1_improvedPiS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z21reduction_v1_improvedPiS_i, .Lfunc_end1-_Z21reduction_v1_improvedPiS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 364
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z13redunction_v1PiS_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z13redunction_v1PiS_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z21reduction_v1_improvedPiS_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z21reduction_v1_improvedPiS_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
