/**
 * covariance.cu: This file is part of the PolyBench/GPU 1.0 test suite.
 *
 *
 * Contact: Scott Grauer-Gray <sgrauerg@gmail.com>
 * Louis-Noel Pouchet <pouchet@cse.ohio-state.edu>
 * Web address: http://www.cse.ohio-state.edu/~pouchet/software/polybench/GPU
 */

#include <stdio.h>
#include <stdlib.h>
#include <math.h>
#include <assert.h>
#include <unistd.h>
#include <sys/time.h>
#include <cuda.h>

#include "../../common/polybenchUtilFuncts.h"

//define the error threshold for the results "not matching"
#define PERCENT_DIFF_ERROR_THRESHOLD 1.05

#define GPU_DEVICE 0

/* Problem size */
#define M 2048
#define N 2048

/* Thread block dimensions for kernel 1*/
#define DIM_THREAD_BLOCK_KERNEL_1_X 256
#define DIM_THREAD_BLOCK_KERNEL_1_Y 1

/* Thread block dimensions for kernel 2*/
#define DIM_THREAD_BLOCK_KERNEL_2_X 32
#define DIM_THREAD_BLOCK_KERNEL_2_Y 8

/* Thread block dimensions for kernel 3*/
#define DIM_THREAD_BLOCK_KERNEL_3_X 256
#define DIM_THREAD_BLOCK_KERNEL_3_Y 1

#define sqrt_of_array_cell(x,j) sqrt(x[j])

#define FLOAT_N 3214212.01
#define EPS 0.005

/* Can switch DATA_TYPE between float and double */
typedef float DATA_TYPE;



void init_arrays(DATA_TYPE* data)
{
	int i, j;

	for (i = 1; i < (M+1); i++)
	{
		for (j = 1; j < (N+1); j++)
		{
			data[i*(N+1) + j] = ((DATA_TYPE) i*j) / M;
		}
	}
}


void covariance(DATA_TYPE* data, DATA_TYPE* symmat, DATA_TYPE* mean)
{
	int i, j, j1,j2;

  	/* Determine mean of column vectors of input data matrix */
	for (j = 1; j < (M+1); j++)
	{
		mean[j] = 0.0;
		for (i = 1; i < (N+1); i++)
		{
        		mean[j] += data[i*(M+1) + j];
		}
		mean[j] /= FLOAT_N;
	}

  	/* Center the column vectors. */
	for (i = 1; i < (N+1); i++)
	{
		for (j = 1; j < (M+1); j++)
		{
			data[i*(M+1) + j] -= mean[j];
		}
	}

  	/* Calculate the m * m covariance matrix. */
	for (j1 = 1; j1 < (M+1); j1++)
	{
		for (j2 = j1; j2 < (M+1); j2++)
     		{
       		symmat[j1*(M+1) + j2] = 0.0;
			for (i = 1; i < N+1; i++)
			{
				symmat[j1*(M+1) + j2] += data[i*(M+1) + j1] * data[i*(M+1) + j2];
			}
        		symmat[j2*(M+1) + j1] = symmat[j1*(M+1) + j2];
      		}
	}
}


void compareResults(DATA_TYPE* symmat, DATA_TYPE* symmat_outputFromGpu)
{
	int i,j,fail;
	fail = 0;

	for (i=1; i < (M+1); i++)
	{
		for (j=1; j < (N+1); j++)
		{
			if (percentDiff(symmat[i*(N+1) + j], symmat_outputFromGpu[i*(N+1) + j]) > PERCENT_DIFF_ERROR_THRESHOLD)
			{
				fail++;
			}			
		}
	}
	printf("Non-Matching CPU-GPU Outputs Beyond Error Threshold of %4.2f Percent: %d\n", PERCENT_DIFF_ERROR_THRESHOLD, fail);
}


void GPU_argv_init()
{
	cudaDeviceProp deviceProp;
	cudaGetDeviceProperties(&deviceProp, GPU_DEVICE);
	printf("setting device %d with name %s\n",GPU_DEVICE,deviceProp.name);
	cudaSetDevice( GPU_DEVICE );
	
	return;
}


__global__ void mean_kernel(DATA_TYPE *mean, DATA_TYPE *data)
{
	int j = blockIdx.x * blockDim.x + threadIdx.x + 1;

	if ((j >= 1) && (j < (M+1)))
	{
		mean[j] = 0.0;

		int i;
		for(i = 1; i < (N+1); i++)
		{
			mean[j] += data[i * (M+1) + j];
		}
		mean[j] /= (DATA_TYPE)FLOAT_N;
	}
}


__global__ void reduce_kernel(DATA_TYPE *mean, DATA_TYPE *data)
{
	int j = blockIdx.x * blockDim.x + threadIdx.x + 1;
	int i = blockIdx.y * blockDim.y + threadIdx.y + 1;
		
	if ((i >= 1) && (i < (N+1)) && (j >= 1) && (j < (M+1)))
	{
		data[i * (M+1) + j] -= mean[j];	
	}
}


__global__ void covar_kernel(DATA_TYPE *symmat, DATA_TYPE *data)
{
	int j1 = blockIdx.x * blockDim.x + threadIdx.x + 1;
	int i, j2;

	if ((j1 >= 1) && (j1 < (M+1)))
	{
		for (j2 = j1; j2 < (M+1); j2++)
		{		
			symmat[j1*(M+1) + j2] = 0.0;
			for(i = 1; i < (N+1); i++)
			{
				symmat[j1 * (M+1) + j2] += data[i *(M+1) + j1] * data[i *(M+1) + j2];
			}
			symmat[j2 * (M+1) + j1] = symmat[j1 * (M+1) + j2];
		}
	}
}


void covarianceCuda(DATA_TYPE* data, DATA_TYPE* symmat, DATA_TYPE* mean, DATA_TYPE* symmat_outputFromGpu)
{
	double t_start, t_end;

	DATA_TYPE *data_gpu;
	DATA_TYPE *mean_gpu;
	DATA_TYPE *symmat_gpu;

	cudaMalloc((void **)&data_gpu, sizeof(DATA_TYPE) * (M+1) * (N+1));
	cudaMalloc((void **)&symmat_gpu, sizeof(DATA_TYPE) * (M+1) * (M+1));
	cudaMalloc((void **)&mean_gpu, sizeof(DATA_TYPE) * (M+1));
	cudaMemcpy(data_gpu, data, sizeof(DATA_TYPE) * (M+1) * (N+1), cudaMemcpyHostToDevice);
	cudaMemcpy(symmat_gpu, symmat, sizeof(DATA_TYPE) * (M+1) * (M+1), cudaMemcpyHostToDevice);
	cudaMemcpy(mean_gpu, mean, sizeof(DATA_TYPE) * (M+1), cudaMemcpyHostToDevice);
	
	dim3 block1(DIM_THREAD_BLOCK_KERNEL_1_X, DIM_THREAD_BLOCK_KERNEL_1_Y);
	dim3 grid1((size_t)(ceil((float)M) / ((float)DIM_THREAD_BLOCK_KERNEL_1_X)), 1);
	
	dim3 block2(DIM_THREAD_BLOCK_KERNEL_2_X, DIM_THREAD_BLOCK_KERNEL_2_Y);
	dim3 grid2((size_t)(ceil((float)M) / ((float)DIM_THREAD_BLOCK_KERNEL_2_X)), (size_t)(ceil((float)N) / ((float)DIM_THREAD_BLOCK_KERNEL_2_X)));
	
	dim3 block3(DIM_THREAD_BLOCK_KERNEL_3_X, DIM_THREAD_BLOCK_KERNEL_3_Y);
	dim3 grid3((size_t)(ceil((float)M) / ((float)DIM_THREAD_BLOCK_KERNEL_3_X)), 1);
	
	t_start = rtclock();

	mean_kernel<<<grid1, block1>>>(mean_gpu,data_gpu);
	cudaThreadSynchronize();
	reduce_kernel<<<grid2, block2>>>(mean_gpu,data_gpu);
	cudaThreadSynchronize();
	covar_kernel<<<grid3, block3>>>(symmat_gpu,data_gpu);
	cudaThreadSynchronize();
	t_end = rtclock();
	fprintf(stdout, "GPU Runtime: %0.6lfs\n", t_end - t_start);

	cudaMemcpy(symmat_outputFromGpu, symmat_gpu, sizeof(DATA_TYPE) * (M+1) * (N+1), cudaMemcpyDeviceToHost);
	
	cudaFree(data_gpu);
	cudaFree(symmat_gpu);
	cudaFree(mean_gpu);
}


int main()
{
	double t_start, t_end;

	DATA_TYPE* data;
	DATA_TYPE* symmat;
	DATA_TYPE* mean;
	DATA_TYPE* symmat_outputFromGpu;	

	data = (DATA_TYPE*)malloc((M+1)*(N+1)*sizeof(DATA_TYPE));
	symmat = (DATA_TYPE*)malloc((M+1)*(M+1)*sizeof(DATA_TYPE));
	mean = (DATA_TYPE*)malloc((M+1)*sizeof(DATA_TYPE));
	symmat_outputFromGpu = (DATA_TYPE*)malloc((M+1)*(M+1)*sizeof(DATA_TYPE));	

	init_arrays(data);
    
	GPU_argv_init();

	covarianceCuda(data, symmat, mean, symmat_outputFromGpu);
	
	t_start = rtclock();
	covariance(data, symmat, mean);
	t_end = rtclock();
	fprintf(stdout, "CPU Runtime: %0.6lfs\n", t_end - t_start);

	compareResults(symmat, symmat_outputFromGpu);

	free(data);
	free(symmat);
	free(mean);
	free(symmat_outputFromGpu);	

  	return 0;
}


	.file	"tmpxft_002f871a_00000000-6_covariance.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2051:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2051:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Error return from gettimeofday: %d"
	.text
	.globl	_Z7rtclockv
	.type	_Z7rtclockv, @function
_Z7rtclockv:
.LFB2040:
	.cfi_startproc
	endbr64
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	%fs:40, %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %rsi
	leaq	8(%rsp), %rdi
	call	gettimeofday@PLT
	testl	%eax, %eax
	je	.L3
	movl	%eax, %edx
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L3:
	cvtsi2sdq	16(%rsp), %xmm0
	mulsd	.LC1(%rip), %xmm0
	cvtsi2sdq	8(%rsp), %xmm1
	addsd	%xmm1, %xmm0
	movq	24(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2040:
	.size	_Z7rtclockv, .-_Z7rtclockv
	.globl	_Z6absValf
	.type	_Z6absValf, @function
_Z6absValf:
.LFB2041:
	.cfi_startproc
	endbr64
	xorps	%xmm1, %xmm1
	comiss	%xmm0, %xmm1
	jbe	.L11
	xorps	.LC3(%rip), %xmm0
.L11:
	ret
	.cfi_endproc
.LFE2041:
	.size	_Z6absValf, .-_Z6absValf
	.globl	_Z11percentDiffdd
	.type	_Z11percentDiffdd, @function
_Z11percentDiffdd:
.LFB2042:
	.cfi_startproc
	endbr64
	xorps	%xmm3, %xmm3
	movaps	%xmm0, %xmm2
	cvtsd2ss	%xmm0, %xmm0
	comiss	%xmm0, %xmm3
	jbe	.L15
	xorps	.LC3(%rip), %xmm0
.L15:
	movsd	.LC4(%rip), %xmm4
	cvtss2sd	%xmm0, %xmm0
	comisd	%xmm0, %xmm4
	jbe	.L17
	xorps	%xmm3, %xmm3
	cvtsd2ss	%xmm1, %xmm0
	comiss	%xmm0, %xmm3
	jbe	.L19
	xorps	.LC3(%rip), %xmm0
.L19:
	cvtss2sd	%xmm0, %xmm3
	comisd	%xmm3, %xmm4
	xorps	%xmm0, %xmm0
	ja	.L14
.L17:
	movaps	%xmm2, %xmm0
	subsd	%xmm1, %xmm0
	xorps	%xmm1, %xmm1
	cvtsd2ss	%xmm0, %xmm0
	comiss	%xmm0, %xmm1
	jbe	.L22
	xorps	.LC3(%rip), %xmm0
.L22:
	addsd	.LC5(%rip), %xmm2
	cvtsd2ss	%xmm2, %xmm1
	xorps	%xmm2, %xmm2
	comiss	%xmm1, %xmm2
	jbe	.L24
	xorps	.LC3(%rip), %xmm1
.L24:
	divss	%xmm1, %xmm0
	xorps	%xmm1, %xmm1
	comiss	%xmm0, %xmm1
	jbe	.L26
	xorps	.LC3(%rip), %xmm0
.L26:
	mulss	.LC6(%rip), %xmm0
.L14:
	ret
	.cfi_endproc
.LFE2042:
	.size	_Z11percentDiffdd, .-_Z11percentDiffdd
	.globl	_Z11init_arraysPf
	.type	_Z11init_arraysPf, @function
_Z11init_arraysPf:
.LFB2043:
	.cfi_startproc
	endbr64
	movss	.LC7(%rip), %xmm2
	addq	$8196, %rdi
	movl	$1, %edx
.L36:
	cvtsi2ssl	%edx, %xmm1
	movl	$1, %eax
.L37:
	cvtsi2ssl	%eax, %xmm0
	mulss	%xmm1, %xmm0
	mulss	%xmm2, %xmm0
	movss	%xmm0, (%rdi,%rax,4)
	incq	%rax
	cmpq	$2049, %rax
	jne	.L37
	incl	%edx
	addq	$8196, %rdi
	cmpl	$2049, %edx
	jne	.L36
	ret
	.cfi_endproc
.LFE2043:
	.size	_Z11init_arraysPf, .-_Z11init_arraysPf
	.globl	_Z10covariancePfS_S_
	.type	_Z10covariancePfS_S_, @function
_Z10covariancePfS_S_:
.LFB2044:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movsd	.LC8(%rip), %xmm1
	movq	%rdi, %rcx
	movl	$1, %eax
.L42:
	movl	$0x00000000, (%rdx,%rax,4)
	leaq	(%rcx,%rax,4), %r8
	movl	$1, %edi
.L41:
	movss	(%rdx,%rax,4), %xmm0
	incl	%edi
	addq	$8196, %r8
	addss	(%r8), %xmm0
	movss	%xmm0, (%rdx,%rax,4)
	cmpl	$2049, %edi
	jne	.L41
	cvtss2sd	%xmm0, %xmm0
	divsd	%xmm1, %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%rdx,%rax,4)
	incq	%rax
	cmpq	$2049, %rax
	jne	.L42
	leaq	8196(%rcx), %r8
	movl	$2049, %r9d
.L45:
	movq	%r8, %rdi
	movl	$1, %eax
.L44:
	movss	4(%rdi), %xmm0
	subss	(%rdx,%rax,4), %xmm0
	incq	%rax
	addq	$4, %rdi
	movss	%xmm0, (%rdi)
	cmpq	$2049, %rax
	jne	.L44
	addl	$2049, %r9d
	addq	$8196, %r8
	cmpl	$4198401, %r9d
	jne	.L45
	movl	$4, %r9d
	movl	$1, %edi
.L46:
	imulq	$8200, %rdi, %rax
	movq	%rdi, %rdx
	leaq	(%rcx,%r9), %r11
	leaq	(%rsi,%r9), %r10
	addq	%rsi, %rax
.L48:
	movl	$0x00000000, (%rax)
	leaq	(%rcx,%rdx,4), %rbx
	xorl	%r8d, %r8d
.L47:
	movss	8196(%r11,%r8), %xmm0
	mulss	8196(%rbx,%r8), %xmm0
	addq	$8196, %r8
	addss	(%rax), %xmm0
	movss	%xmm0, (%rax)
	cmpq	$16785408, %r8
	jne	.L47
	imulq	$8196, %rdx, %r8
	incq	%rdx
	addq	$4, %rax
	movss	%xmm0, (%r10,%r8)
	cmpl	$2049, %edx
	jne	.L48
	incq	%rdi
	addq	$4, %r9
	cmpq	$2049, %rdi
	jne	.L46
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2044:
	.size	_Z10covariancePfS_S_, .-_Z10covariancePfS_S_
	.section	.rodata.str1.1
.LC10:
	.string	"Non-Matching CPU-GPU Outputs Beyond Error Threshold of %4.2f Percent: %d\n"
	.text
	.globl	_Z14compareResultsPfS_
	.type	_Z14compareResultsPfS_, @function
_Z14compareResultsPfS_:
.LFB2045:
	.cfi_startproc
	endbr64
	pushq	%r8
	.cfi_def_cfa_offset 16
	movsd	.LC9(%rip), %xmm5
	movl	$8196, %eax
	xorl	%ecx, %ecx
.L59:
	movl	$1, %edx
	leaq	(%rsi,%rax), %r9
	leaq	(%rdi,%rax), %r8
.L62:
	cvtss2sd	(%r8,%rdx,4), %xmm0
	cvtss2sd	(%r9,%rdx,4), %xmm1
	call	_Z11percentDiffdd
	cvtss2sd	%xmm0, %xmm0
	comisd	%xmm5, %xmm0
	jbe	.L60
	incl	%ecx
.L60:
	incq	%rdx
	cmpq	$2049, %rdx
	jne	.L62
	addq	$8196, %rax
	cmpq	$16793604, %rax
	jne	.L59
	movl	%ecx, %edx
	movaps	%xmm5, %xmm0
	leaq	.LC10(%rip), %rsi
	movb	$1, %al
	movl	$2, %edi
	popq	%rcx
	.cfi_def_cfa_offset 8
	jmp	__printf_chk@PLT
	.cfi_endproc
.LFE2045:
	.size	_Z14compareResultsPfS_, .-_Z14compareResultsPfS_
	.section	.rodata.str1.1
.LC11:
	.string	"setting device %d with name %s\n"
	.text
	.globl	_Z13GPU_argv_initv
	.type	_Z13GPU_argv_initv, @function
_Z13GPU_argv_initv:
.LFB2046:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	xorl	%esi, %esi
	subq	$1040, %rsp
	.cfi_def_cfa_offset 1056
	movq	%fs:40, %rax
	movq	%rax, 1032(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %rbx
	movq	%rbx, %rdi
	call	cudaGetDeviceProperties_v2@PLT
	xorl	%edx, %edx
	movl	$2, %edi
	xorl	%eax, %eax
	movq	%rbx, %rcx
	leaq	.LC11(%rip), %rsi
	call	__printf_chk@PLT
	xorl	%edi, %edi
	call	cudaSetDevice@PLT
	movq	1032(%rsp), %rax
	subq	%fs:40, %rax
	je	.L68
	call	__stack_chk_fail@PLT
.L68:
	addq	$1040, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2046:
	.size	_Z13GPU_argv_initv, .-_Z13GPU_argv_initv
	.globl	_Z33__device_stub__Z11mean_kernelPfS_PfS_
	.type	_Z33__device_stub__Z11mean_kernelPfS_PfS_, @function
_Z33__device_stub__Z11mean_kernelPfS_PfS_:
.LFB2073:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L70
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z11mean_kernelPfS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L70:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L72
	call	__stack_chk_fail@PLT
.L72:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2073:
	.size	_Z33__device_stub__Z11mean_kernelPfS_PfS_, .-_Z33__device_stub__Z11mean_kernelPfS_PfS_
	.globl	_Z11mean_kernelPfS_
	.type	_Z11mean_kernelPfS_, @function
_Z11mean_kernelPfS_:
.LFB2074:
	.cfi_startproc
	endbr64
	jmp	_Z33__device_stub__Z11mean_kernelPfS_PfS_
	.cfi_endproc
.LFE2074:
	.size	_Z11mean_kernelPfS_, .-_Z11mean_kernelPfS_
	.globl	_Z35__device_stub__Z13reduce_kernelPfS_PfS_
	.type	_Z35__device_stub__Z13reduce_kernelPfS_PfS_, @function
_Z35__device_stub__Z13reduce_kernelPfS_PfS_:
.LFB2075:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L75
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z13reduce_kernelPfS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L75:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L77
	call	__stack_chk_fail@PLT
.L77:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2075:
	.size	_Z35__device_stub__Z13reduce_kernelPfS_PfS_, .-_Z35__device_stub__Z13reduce_kernelPfS_PfS_
	.globl	_Z13reduce_kernelPfS_
	.type	_Z13reduce_kernelPfS_, @function
_Z13reduce_kernelPfS_:
.LFB2076:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z13reduce_kernelPfS_PfS_
	.cfi_endproc
.LFE2076:
	.size	_Z13reduce_kernelPfS_, .-_Z13reduce_kernelPfS_
	.globl	_Z34__device_stub__Z12covar_kernelPfS_PfS_
	.type	_Z34__device_stub__Z12covar_kernelPfS_PfS_, @function
_Z34__device_stub__Z12covar_kernelPfS_PfS_:
.LFB2077:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L80
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z12covar_kernelPfS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L80:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L82
	call	__stack_chk_fail@PLT
.L82:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2077:
	.size	_Z34__device_stub__Z12covar_kernelPfS_PfS_, .-_Z34__device_stub__Z12covar_kernelPfS_PfS_
	.globl	_Z12covar_kernelPfS_
	.type	_Z12covar_kernelPfS_, @function
_Z12covar_kernelPfS_:
.LFB2078:
	.cfi_startproc
	endbr64
	jmp	_Z34__device_stub__Z12covar_kernelPfS_PfS_
	.cfi_endproc
.LFE2078:
	.size	_Z12covar_kernelPfS_, .-_Z12covar_kernelPfS_
	.section	.rodata.str1.1
.LC12:
	.string	"GPU Runtime: %0.6lfs\n"
	.text
	.globl	_Z14covarianceCudaPfS_S_S_
	.type	_Z14covarianceCudaPfS_S_S_, @function
_Z14covarianceCudaPfS_S_S_:
.LFB2047:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movq	%rdi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rsi, %r12
	movl	$16793604, %esi
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rdx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rcx, %rbx
	subq	$136, %rsp
	.cfi_def_cfa_offset 176
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rdi
	call	cudaMalloc@PLT
	leaq	40(%rsp), %rdi
	movl	$16793604, %esi
	call	cudaMalloc@PLT
	leaq	32(%rsp), %rdi
	movl	$8196, %esi
	call	cudaMalloc@PLT
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movq	%r13, %rsi
	movl	$16793604, %edx
	call	cudaMemcpy@PLT
	movq	40(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$16793604, %edx
	call	cudaMemcpy@PLT
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$8196, %edx
	call	cudaMemcpy@PLT
	movl	$16777217, %edx
	movl	$536870913, %eax
	movl	$1073741825, %ecx
	salq	$8, %rdx
	salq	$3, %rax
	movabsq	$274877907008, %rsi
	movl	$1, 56(%rsp)
	salq	$5, %rcx
	movq	%rdx, 48(%rsp)
	movq	%rcx, 72(%rsp)
	movq	%rsi, 84(%rsp)
	movq	%rdx, 96(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	movl	$1, 80(%rsp)
	movl	$1, 92(%rsp)
	movl	$1, 104(%rsp)
	movq	%rax, 108(%rsp)
	movl	$1, 116(%rsp)
	call	_Z7rtclockv
	movl	56(%rsp), %ecx
	movl	68(%rsp), %esi
	xorl	%r9d, %r9d
	movq	48(%rsp), %rdx
	movq	60(%rsp), %rdi
	xorl	%r8d, %r8d
	movsd	%xmm0, 8(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L86
	movq	24(%rsp), %rsi
	movq	32(%rsp), %rdi
	call	_Z33__device_stub__Z11mean_kernelPfS_PfS_
.L86:
	call	cudaThreadSynchronize@PLT
	movl	80(%rsp), %ecx
	movl	92(%rsp), %esi
	xorl	%r9d, %r9d
	movq	72(%rsp), %rdx
	movq	84(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L87
	movq	24(%rsp), %rsi
	movq	32(%rsp), %rdi
	call	_Z35__device_stub__Z13reduce_kernelPfS_PfS_
.L87:
	call	cudaThreadSynchronize@PLT
	movl	104(%rsp), %ecx
	movl	116(%rsp), %esi
	xorl	%r9d, %r9d
	movq	96(%rsp), %rdx
	movq	108(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L88
	movq	24(%rsp), %rsi
	movq	40(%rsp), %rdi
	call	_Z34__device_stub__Z12covar_kernelPfS_PfS_
.L88:
	call	cudaThreadSynchronize@PLT
	call	_Z7rtclockv
	subsd	8(%rsp), %xmm0
	movl	$2, %esi
	movb	$1, %al
	movq	stdout(%rip), %rdi
	leaq	.LC12(%rip), %rdx
	call	__fprintf_chk@PLT
	movq	40(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	movl	$16793604, %edx
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L89
	call	__stack_chk_fail@PLT
.L89:
	addq	$136, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2047:
	.size	_Z14covarianceCudaPfS_S_S_, .-_Z14covarianceCudaPfS_S_S_
	.section	.rodata.str1.1
.LC13:
	.string	"CPU Runtime: %0.6lfs\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2048:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	$16793604, %edi
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$24, %rsp
	.cfi_def_cfa_offset 64
	call	malloc@PLT
	movl	$16793604, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	movl	$8196, %edi
	movq	%rax, %rbx
	call	malloc@PLT
	movl	$16793604, %edi
	movq	%rax, %r13
	call	malloc@PLT
	movq	%rbp, %rdi
	movq	%rax, %r12
	call	_Z11init_arraysPf
	call	_Z13GPU_argv_initv
	movq	%r12, %rcx
	movq	%r13, %rdx
	movq	%rbx, %rsi
	movq	%rbp, %rdi
	call	_Z14covarianceCudaPfS_S_S_
	call	_Z7rtclockv
	movq	%r13, %rdx
	movq	%rbx, %rsi
	movq	%rbp, %rdi
	movsd	%xmm0, 8(%rsp)
	call	_Z10covariancePfS_S_
	call	_Z7rtclockv
	subsd	8(%rsp), %xmm0
	movl	$2, %esi
	movb	$1, %al
	movq	stdout(%rip), %rdi
	leaq	.LC13(%rip), %rdx
	call	__fprintf_chk@PLT
	movq	%r12, %rsi
	movq	%rbx, %rdi
	call	_Z14compareResultsPfS_
	movq	%rbp, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	%r13, %rdi
	call	free@PLT
	movq	%r12, %rdi
	call	free@PLT
	addq	$24, %rsp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2048:
	.size	main, .-main
	.section	.rodata.str1.1
.LC14:
	.string	"_Z12covar_kernelPfS_"
.LC15:
	.string	"_Z13reduce_kernelPfS_"
.LC16:
	.string	"_Z11mean_kernelPfS_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2080:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC14(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z12covar_kernelPfS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC15(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z13reduce_kernelPfS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC16(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z11mean_kernelPfS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2080:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC1:
	.long	-1598689907
	.long	1051772663
	.section	.rodata.cst16,"aM",@progbits,16
	.align 16
.LC3:
	.long	-2147483648
	.long	0
	.long	0
	.long	0
	.section	.rodata.cst8
	.align 8
.LC4:
	.long	1202590843
	.long	1065646817
	.align 8
.LC5:
	.long	-536870912
	.long	1044740494
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC6:
	.long	1120403456
	.align 4
.LC7:
	.long	973078528
	.section	.rodata.cst8
	.align 8
.LC8:
	.long	21474836
	.long	1095271874
	.align 8
.LC9:
	.long	-858993459
	.long	1072745676
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/**
 * covariance.cu: This file is part of the PolyBench/GPU 1.0 test suite.
 *
 *
 * Contact: Scott Grauer-Gray <sgrauerg@gmail.com>
 * Louis-Noel Pouchet <pouchet@cse.ohio-state.edu>
 * Web address: http://www.cse.ohio-state.edu/~pouchet/software/polybench/GPU
 */

#include <stdio.h>
#include <stdlib.h>
#include <math.h>
#include <assert.h>
#include <unistd.h>
#include <sys/time.h>
#include <hip/hip_runtime.h>

#include "../../common/polybenchUtilFuncts.h"

//define the error threshold for the results "not matching"
#define PERCENT_DIFF_ERROR_THRESHOLD 1.05

#define GPU_DEVICE 0

/* Problem size */
#define M 2048
#define N 2048

/* Thread block dimensions for kernel 1*/
#define DIM_THREAD_BLOCK_KERNEL_1_X 256
#define DIM_THREAD_BLOCK_KERNEL_1_Y 1

/* Thread block dimensions for kernel 2*/
#define DIM_THREAD_BLOCK_KERNEL_2_X 32
#define DIM_THREAD_BLOCK_KERNEL_2_Y 8

/* Thread block dimensions for kernel 3*/
#define DIM_THREAD_BLOCK_KERNEL_3_X 256
#define DIM_THREAD_BLOCK_KERNEL_3_Y 1

#define sqrt_of_array_cell(x,j) sqrt(x[j])

#define FLOAT_N 3214212.01
#define EPS 0.005

/* Can switch DATA_TYPE between float and double */
typedef float DATA_TYPE;



void init_arrays(DATA_TYPE* data)
{
	int i, j;

	for (i = 1; i < (M+1); i++)
	{
		for (j = 1; j < (N+1); j++)
		{
			data[i*(N+1) + j] = ((DATA_TYPE) i*j) / M;
		}
	}
}


void covariance(DATA_TYPE* data, DATA_TYPE* symmat, DATA_TYPE* mean)
{
	int i, j, j1,j2;

  	/* Determine mean of column vectors of input data matrix */
	for (j = 1; j < (M+1); j++)
	{
		mean[j] = 0.0;
		for (i = 1; i < (N+1); i++)
		{
        		mean[j] += data[i*(M+1) + j];
		}
		mean[j] /= FLOAT_N;
	}

  	/* Center the column vectors. */
	for (i = 1; i < (N+1); i++)
	{
		for (j = 1; j < (M+1); j++)
		{
			data[i*(M+1) + j] -= mean[j];
		}
	}

  	/* Calculate the m * m covariance matrix. */
	for (j1 = 1; j1 < (M+1); j1++)
	{
		for (j2 = j1; j2 < (M+1); j2++)
     		{
       		symmat[j1*(M+1) + j2] = 0.0;
			for (i = 1; i < N+1; i++)
			{
				symmat[j1*(M+1) + j2] += data[i*(M+1) + j1] * data[i*(M+1) + j2];
			}
        		symmat[j2*(M+1) + j1] = symmat[j1*(M+1) + j2];
      		}
	}
}


void compareResults(DATA_TYPE* symmat, DATA_TYPE* symmat_outputFromGpu)
{
	int i,j,fail;
	fail = 0;

	for (i=1; i < (M+1); i++)
	{
		for (j=1; j < (N+1); j++)
		{
			if (percentDiff(symmat[i*(N+1) + j], symmat_outputFromGpu[i*(N+1) + j]) > PERCENT_DIFF_ERROR_THRESHOLD)
			{
				fail++;
			}			
		}
	}
	printf("Non-Matching CPU-GPU Outputs Beyond Error Threshold of %4.2f Percent: %d\n", PERCENT_DIFF_ERROR_THRESHOLD, fail);
}


void GPU_argv_init()
{
	hipDeviceProp_t deviceProp;
	hipGetDeviceProperties(&deviceProp, GPU_DEVICE);
	printf("setting device %d with name %s\n",GPU_DEVICE,deviceProp.name);
	hipSetDevice( GPU_DEVICE );
	
	return;
}


__global__ void mean_kernel(DATA_TYPE *mean, DATA_TYPE *data)
{
	int j = blockIdx.x * blockDim.x + threadIdx.x + 1;

	if ((j >= 1) && (j < (M+1)))
	{
		mean[j] = 0.0;

		int i;
		for(i = 1; i < (N+1); i++)
		{
			mean[j] += data[i * (M+1) + j];
		}
		mean[j] /= (DATA_TYPE)FLOAT_N;
	}
}


__global__ void reduce_kernel(DATA_TYPE *mean, DATA_TYPE *data)
{
	int j = blockIdx.x * blockDim.x + threadIdx.x + 1;
	int i = blockIdx.y * blockDim.y + threadIdx.y + 1;
		
	if ((i >= 1) && (i < (N+1)) && (j >= 1) && (j < (M+1)))
	{
		data[i * (M+1) + j] -= mean[j];	
	}
}


__global__ void covar_kernel(DATA_TYPE *symmat, DATA_TYPE *data)
{
	int j1 = blockIdx.x * blockDim.x + threadIdx.x + 1;
	int i, j2;

	if ((j1 >= 1) && (j1 < (M+1)))
	{
		for (j2 = j1; j2 < (M+1); j2++)
		{		
			symmat[j1*(M+1) + j2] = 0.0;
			for(i = 1; i < (N+1); i++)
			{
				symmat[j1 * (M+1) + j2] += data[i *(M+1) + j1] * data[i *(M+1) + j2];
			}
			symmat[j2 * (M+1) + j1] = symmat[j1 * (M+1) + j2];
		}
	}
}


void covarianceCuda(DATA_TYPE* data, DATA_TYPE* symmat, DATA_TYPE* mean, DATA_TYPE* symmat_outputFromGpu)
{
	double t_start, t_end;

	DATA_TYPE *data_gpu;
	DATA_TYPE *mean_gpu;
	DATA_TYPE *symmat_gpu;

	hipMalloc((void **)&data_gpu, sizeof(DATA_TYPE) * (M+1) * (N+1));
	hipMalloc((void **)&symmat_gpu, sizeof(DATA_TYPE) * (M+1) * (M+1));
	hipMalloc((void **)&mean_gpu, sizeof(DATA_TYPE) * (M+1));
	hipMemcpy(data_gpu, data, sizeof(DATA_TYPE) * (M+1) * (N+1), hipMemcpyHostToDevice);
	hipMemcpy(symmat_gpu, symmat, sizeof(DATA_TYPE) * (M+1) * (M+1), hipMemcpyHostToDevice);
	hipMemcpy(mean_gpu, mean, sizeof(DATA_TYPE) * (M+1), hipMemcpyHostToDevice);
	
	dim3 block1(DIM_THREAD_BLOCK_KERNEL_1_X, DIM_THREAD_BLOCK_KERNEL_1_Y);
	dim3 grid1((size_t)(ceil((float)M) / ((float)DIM_THREAD_BLOCK_KERNEL_1_X)), 1);
	
	dim3 block2(DIM_THREAD_BLOCK_KERNEL_2_X, DIM_THREAD_BLOCK_KERNEL_2_Y);
	dim3 grid2((size_t)(ceil((float)M) / ((float)DIM_THREAD_BLOCK_KERNEL_2_X)), (size_t)(ceil((float)N) / ((float)DIM_THREAD_BLOCK_KERNEL_2_X)));
	
	dim3 block3(DIM_THREAD_BLOCK_KERNEL_3_X, DIM_THREAD_BLOCK_KERNEL_3_Y);
	dim3 grid3((size_t)(ceil((float)M) / ((float)DIM_THREAD_BLOCK_KERNEL_3_X)), 1);
	
	t_start = rtclock();

	mean_kernel<<<grid1, block1>>>(mean_gpu,data_gpu);
	hipDeviceSynchronize();
	reduce_kernel<<<grid2, block2>>>(mean_gpu,data_gpu);
	hipDeviceSynchronize();
	covar_kernel<<<grid3, block3>>>(symmat_gpu,data_gpu);
	hipDeviceSynchronize();
	t_end = rtclock();
	fprintf(stdout, "GPU Runtime: %0.6lfs\n", t_end - t_start);

	hipMemcpy(symmat_outputFromGpu, symmat_gpu, sizeof(DATA_TYPE) * (M+1) * (N+1), hipMemcpyDeviceToHost);
	
	hipFree(data_gpu);
	hipFree(symmat_gpu);
	hipFree(mean_gpu);
}


int main()
{
	double t_start, t_end;

	DATA_TYPE* data;
	DATA_TYPE* symmat;
	DATA_TYPE* mean;
	DATA_TYPE* symmat_outputFromGpu;	

	data = (DATA_TYPE*)malloc((M+1)*(N+1)*sizeof(DATA_TYPE));
	symmat = (DATA_TYPE*)malloc((M+1)*(M+1)*sizeof(DATA_TYPE));
	mean = (DATA_TYPE*)malloc((M+1)*sizeof(DATA_TYPE));
	symmat_outputFromGpu = (DATA_TYPE*)malloc((M+1)*(M+1)*sizeof(DATA_TYPE));	

	init_arrays(data);
    
	GPU_argv_init();

	covarianceCuda(data, symmat, mean, symmat_outputFromGpu);
	
	t_start = rtclock();
	covariance(data, symmat, mean);
	t_end = rtclock();
	fprintf(stdout, "CPU Runtime: %0.6lfs\n", t_end - t_start);

	compareResults(symmat, symmat_outputFromGpu);

	free(data);
	free(symmat);
	free(mean);
	free(symmat_outputFromGpu);	

  	return 0;
}


	.text
	.file	"covariance.hip"
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z7rtclockv
.LCPI0_0:
	.quad	0x3eb0c6f7a0b5ed8d              # double 9.9999999999999995E-7
	.text
	.globl	_Z7rtclockv
	.type	_Z7rtclockv,@function
_Z7rtclockv:                            # @_Z7rtclockv
	.cfi_startproc
# %bb.0:
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rsp, %rdi
	leaq	16(%rsp), %rsi
	callq	gettimeofday
	testl	%eax, %eax
	je	.LBB0_2
# %bb.1:
	movl	$.L.str, %edi
	movl	%eax, %esi
	xorl	%eax, %eax
	callq	printf
.LBB0_2:
	cvtsi2sdq	(%rsp), %xmm1
	cvtsi2sdq	8(%rsp), %xmm0
	mulsd	.LCPI0_0(%rip), %xmm0
	addsd	%xmm1, %xmm0
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z7rtclockv, .Lfunc_end0-_Z7rtclockv
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function _Z6absValf
.LCPI1_0:
	.long	0x80000000                      # float -0
	.long	0x80000000                      # float -0
	.long	0x80000000                      # float -0
	.long	0x80000000                      # float -0
	.text
	.globl	_Z6absValf
	.type	_Z6absValf,@function
_Z6absValf:                             # @_Z6absValf
	.cfi_startproc
# %bb.0:
	movaps	.LCPI1_0(%rip), %xmm1           # xmm1 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0]
	xorps	%xmm0, %xmm1
	maxss	%xmm0, %xmm1
	movaps	%xmm1, %xmm0
	retq
.Lfunc_end1:
	.size	_Z6absValf, .Lfunc_end1-_Z6absValf
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function _Z11percentDiffdd
.LCPI2_0:
	.long	0x80000000                      # float -0
	.long	0x80000000                      # float -0
	.long	0x80000000                      # float -0
	.long	0x80000000                      # float -0
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI2_1:
	.quad	0x3f847ae147ae147b              # double 0.01
.LCPI2_2:
	.quad	0x3e45798ee0000000              # double 9.9999999392252903E-9
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0
.LCPI2_3:
	.long	0x42c80000                      # float 100
	.text
	.globl	_Z11percentDiffdd
	.type	_Z11percentDiffdd,@function
_Z11percentDiffdd:                      # @_Z11percentDiffdd
	.cfi_startproc
# %bb.0:
	cvtsd2ss	%xmm0, %xmm2
	movaps	.LCPI2_0(%rip), %xmm3           # xmm3 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0]
	xorps	%xmm2, %xmm3
	maxss	%xmm2, %xmm3
	xorps	%xmm2, %xmm2
	cvtss2sd	%xmm3, %xmm2
	movsd	.LCPI2_1(%rip), %xmm3           # xmm3 = mem[0],zero
	ucomisd	%xmm2, %xmm3
	jbe	.LBB2_2
# %bb.1:
	xorps	%xmm2, %xmm2
	cvtsd2ss	%xmm1, %xmm2
	movaps	.LCPI2_0(%rip), %xmm4           # xmm4 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0]
	xorps	%xmm2, %xmm4
	maxss	%xmm2, %xmm4
	cvtss2sd	%xmm4, %xmm4
	xorps	%xmm2, %xmm2
	ucomisd	%xmm4, %xmm3
	ja	.LBB2_3
.LBB2_2:
	movaps	%xmm0, %xmm2
	subsd	%xmm1, %xmm2
	xorps	%xmm1, %xmm1
	cvtsd2ss	%xmm2, %xmm1
	movaps	.LCPI2_0(%rip), %xmm2           # xmm2 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0]
	movaps	%xmm1, %xmm3
	xorps	%xmm2, %xmm3
	maxss	%xmm1, %xmm3
	addsd	.LCPI2_2(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movaps	%xmm0, %xmm1
	xorps	%xmm2, %xmm1
	maxss	%xmm0, %xmm1
	divss	%xmm1, %xmm3
	xorps	%xmm3, %xmm2
	maxss	%xmm3, %xmm2
	mulss	.LCPI2_3(%rip), %xmm2
.LBB2_3:
	movaps	%xmm2, %xmm0
	retq
.Lfunc_end2:
	.size	_Z11percentDiffdd, .Lfunc_end2-_Z11percentDiffdd
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z11init_arraysPf
.LCPI3_0:
	.long	0x3a000000                      # float 4.8828125E-4
	.text
	.globl	_Z11init_arraysPf
	.type	_Z11init_arraysPf,@function
_Z11init_arraysPf:                      # @_Z11init_arraysPf
	.cfi_startproc
# %bb.0:
	addq	$8200, %rdi                     # imm = 0x2008
	movl	$1, %eax
	movss	.LCPI3_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
.LBB3_1:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_2 Depth 2
	xorps	%xmm1, %xmm1
	cvtsi2ss	%eax, %xmm1
	xorl	%ecx, %ecx
.LBB3_2:                                #   Parent Loop BB3_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	leaq	1(%rcx), %rdx
	xorps	%xmm2, %xmm2
	cvtsi2ss	%edx, %xmm2
	mulss	%xmm1, %xmm2
	mulss	%xmm0, %xmm2
	movss	%xmm2, (%rdi,%rcx,4)
	movq	%rdx, %rcx
	cmpq	$2048, %rdx                     # imm = 0x800
	jne	.LBB3_2
# %bb.3:                                #   in Loop: Header=BB3_1 Depth=1
	incq	%rax
	addq	$8196, %rdi                     # imm = 0x2004
	cmpq	$2049, %rax                     # imm = 0x801
	jne	.LBB3_1
# %bb.4:
	retq
.Lfunc_end3:
	.size	_Z11init_arraysPf, .Lfunc_end3-_Z11init_arraysPf
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z10covariancePfS_S_
.LCPI4_0:
	.quad	0x414885c20147ae14              # double 3214212.0099999998
	.text
	.globl	_Z10covariancePfS_S_
	.type	_Z10covariancePfS_S_,@function
_Z10covariancePfS_S_:                   # @_Z10covariancePfS_S_
	.cfi_startproc
# %bb.0:
	movl	$1, %eax
	movsd	.LCPI4_0(%rip), %xmm0           # xmm0 = mem[0],zero
	movq	%rdi, %rcx
.LBB4_1:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_2 Depth 2
	movl	$0, (%rdx,%rax,4)
	xorps	%xmm1, %xmm1
	movl	$8200, %r8d                     # imm = 0x2008
.LBB4_2:                                #   Parent Loop BB4_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	addss	(%rcx,%r8), %xmm1
	movss	%xmm1, (%rdx,%rax,4)
	addq	$8196, %r8                      # imm = 0x2004
	cmpq	$16793608, %r8                  # imm = 0x1004008
	jne	.LBB4_2
# %bb.3:                                #   in Loop: Header=BB4_1 Depth=1
	cvtss2sd	%xmm1, %xmm1
	divsd	%xmm0, %xmm1
	cvtsd2ss	%xmm1, %xmm1
	movss	%xmm1, (%rdx,%rax,4)
	incq	%rax
	addq	$4, %rcx
	cmpq	$2049, %rax                     # imm = 0x801
	jne	.LBB4_1
# %bb.4:                                # %.preheader51.preheader
	leaq	8200(%rdi), %rax
	movl	$1, %ecx
.LBB4_5:                                # %.preheader51
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_6 Depth 2
	xorl	%r8d, %r8d
.LBB4_6:                                #   Parent Loop BB4_5 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	(%rax,%r8,4), %xmm0             # xmm0 = mem[0],zero,zero,zero
	subss	4(%rdx,%r8,4), %xmm0
	movss	%xmm0, (%rax,%r8,4)
	incq	%r8
	cmpq	$2048, %r8                      # imm = 0x800
	jne	.LBB4_6
# %bb.7:                                #   in Loop: Header=BB4_5 Depth=1
	incq	%rcx
	addq	$8196, %rax                     # imm = 0x2004
	cmpq	$2049, %rcx                     # imm = 0x801
	jne	.LBB4_5
# %bb.8:                                # %.preheader.preheader
	addq	$8200, %rdi                     # imm = 0x2008
	movl	$1, %eax
.LBB4_9:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_10 Depth 2
                                        #       Child Loop BB4_11 Depth 3
	movq	%rax, %rcx
	shlq	$13, %rcx
	leaq	(%rcx,%rax,4), %rcx
	addq	%rsi, %rcx
	leaq	(%rsi,%rax,4), %rdx
	movq	%rdi, %r8
	movq	%rax, %r9
.LBB4_10:                               #   Parent Loop BB4_9 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB4_11 Depth 3
	movl	$0, (%rcx,%r9,4)
	xorpd	%xmm0, %xmm0
	xorl	%r10d, %r10d
.LBB4_11:                               #   Parent Loop BB4_9 Depth=1
                                        #     Parent Loop BB4_10 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movss	(%rdi,%r10), %xmm1              # xmm1 = mem[0],zero,zero,zero
	mulss	(%r8,%r10), %xmm1
	addss	%xmm1, %xmm0
	movss	%xmm0, (%rcx,%r9,4)
	addq	$8196, %r10                     # imm = 0x2004
	cmpq	$16785408, %r10                 # imm = 0x1002000
	jne	.LBB4_11
# %bb.12:                               #   in Loop: Header=BB4_10 Depth=2
	movq	%r9, %r10
	shlq	$13, %r10
	leaq	(%r10,%r9,4), %r10
	movss	%xmm0, (%rdx,%r10)
	incq	%r9
	addq	$4, %r8
	cmpq	$2049, %r9                      # imm = 0x801
	jne	.LBB4_10
# %bb.13:                               #   in Loop: Header=BB4_9 Depth=1
	incq	%rax
	addq	$4, %rdi
	cmpq	$2049, %rax                     # imm = 0x801
	jne	.LBB4_9
# %bb.14:
	retq
.Lfunc_end4:
	.size	_Z10covariancePfS_S_, .Lfunc_end4-_Z10covariancePfS_S_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z14compareResultsPfS_
.LCPI5_0:
	.quad	0x3ff0cccccccccccd              # double 1.05
	.text
	.globl	_Z14compareResultsPfS_
	.type	_Z14compareResultsPfS_,@function
_Z14compareResultsPfS_:                 # @_Z14compareResultsPfS_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %rbx
	movq	%rdi, %r14
	movl	$8200, %eax                     # imm = 0x2008
	addq	%rax, %rbx
	addq	%rax, %r14
	xorl	%r15d, %r15d
	movl	$1, %r12d
	movl	$8196, %r13d                    # imm = 0x2004
.LBB5_1:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB5_2 Depth 2
	xorl	%ebp, %ebp
.LBB5_2:                                #   Parent Loop BB5_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r14,%rbp,4), %xmm0
	xorps	%xmm1, %xmm1
	cvtss2sd	(%rbx,%rbp,4), %xmm1
	callq	_Z11percentDiffdd
	cvtss2sd	%xmm0, %xmm0
	xorl	%eax, %eax
	ucomisd	.LCPI5_0(%rip), %xmm0
	seta	%al
	addl	%eax, %r15d
	incq	%rbp
	cmpq	$2048, %rbp                     # imm = 0x800
	jne	.LBB5_2
# %bb.3:                                #   in Loop: Header=BB5_1 Depth=1
	incq	%r12
	addq	%r13, %rbx
	addq	%r13, %r14
	cmpq	$2049, %r12                     # imm = 0x801
	jne	.LBB5_1
# %bb.4:
	movsd	.LCPI5_0(%rip), %xmm0           # xmm0 = mem[0],zero
	movl	$.L.str.1, %edi
	movl	%r15d, %esi
	movb	$1, %al
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	printf                          # TAILCALL
.Lfunc_end5:
	.size	_Z14compareResultsPfS_, .Lfunc_end5-_Z14compareResultsPfS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z13GPU_argv_initv              # -- Begin function _Z13GPU_argv_initv
	.type	_Z13GPU_argv_initv,@function
_Z13GPU_argv_initv:                     # @_Z13GPU_argv_initv
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$1472, %rsp                     # imm = 0x5C0
	.cfi_def_cfa_offset 1488
	.cfi_offset %rbx, -16
	movq	%rsp, %rbx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	hipGetDevicePropertiesR0600
	movl	$.L.str.2, %edi
	xorl	%esi, %esi
	movq	%rbx, %rdx
	xorl	%eax, %eax
	callq	printf
	xorl	%edi, %edi
	callq	hipSetDevice
	addq	$1472, %rsp                     # imm = 0x5C0
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z13GPU_argv_initv, .Lfunc_end6-_Z13GPU_argv_initv
	.cfi_endproc
                                        # -- End function
	.globl	_Z26__device_stub__mean_kernelPfS_ # -- Begin function _Z26__device_stub__mean_kernelPfS_
	.type	_Z26__device_stub__mean_kernelPfS_,@function
_Z26__device_stub__mean_kernelPfS_:     # @_Z26__device_stub__mean_kernelPfS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11mean_kernelPfS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	_Z26__device_stub__mean_kernelPfS_, .Lfunc_end7-_Z26__device_stub__mean_kernelPfS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z28__device_stub__reduce_kernelPfS_ # -- Begin function _Z28__device_stub__reduce_kernelPfS_
	.type	_Z28__device_stub__reduce_kernelPfS_,@function
_Z28__device_stub__reduce_kernelPfS_:   # @_Z28__device_stub__reduce_kernelPfS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13reduce_kernelPfS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	_Z28__device_stub__reduce_kernelPfS_, .Lfunc_end8-_Z28__device_stub__reduce_kernelPfS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__covar_kernelPfS_ # -- Begin function _Z27__device_stub__covar_kernelPfS_
	.type	_Z27__device_stub__covar_kernelPfS_,@function
_Z27__device_stub__covar_kernelPfS_:    # @_Z27__device_stub__covar_kernelPfS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12covar_kernelPfS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end9:
	.size	_Z27__device_stub__covar_kernelPfS_, .Lfunc_end9-_Z27__device_stub__covar_kernelPfS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z14covarianceCudaPfS_S_S_      # -- Begin function _Z14covarianceCudaPfS_S_S_
	.type	_Z14covarianceCudaPfS_S_S_,@function
_Z14covarianceCudaPfS_S_S_:             # @_Z14covarianceCudaPfS_S_S_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rcx, 32(%rsp)                  # 8-byte Spill
	movq	%rdx, %r15
	movq	%rsi, %r12
	movq	%rdi, %r13
	movq	%rsp, %rbp
	movl	$16793604, %esi                 # imm = 0x1004004
	movq	%rbp, %rdi
	callq	hipMalloc
	leaq	8(%rsp), %rbx
	movl	$16793604, %esi                 # imm = 0x1004004
	movq	%rbx, %rdi
	callq	hipMalloc
	leaq	16(%rsp), %r14
	movl	$8196, %esi                     # imm = 0x2004
	movq	%r14, %rdi
	callq	hipMalloc
	movq	(%rbp), %rdi
	movl	$16793604, %edx                 # imm = 0x1004004
	movq	%r13, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbx), %rdi
	movabsq	$4294967304, %rbx               # imm = 0x100000008
	movl	$16793604, %edx                 # imm = 0x1004004
	movq	%r12, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r14), %rdi
	movl	$8196, %edx                     # imm = 0x2004
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	callq	_Z7rtclockv
	movsd	%xmm0, 24(%rsp)                 # 8-byte Spill
	leaq	248(%rbx), %r15
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB10_2
# %bb.1:
	movq	16(%rsp), %rdi
	movq	(%rsp), %rsi
	callq	_Z26__device_stub__mean_kernelPfS_
.LBB10_2:
	callq	hipDeviceSynchronize
	movabsq	$274877907008, %rdi             # imm = 0x4000000040
	movabsq	$34359738400, %rdx              # imm = 0x800000020
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB10_4
# %bb.3:
	movq	16(%rsp), %rdi
	movq	(%rsp), %rsi
	callq	_Z28__device_stub__reduce_kernelPfS_
.LBB10_4:
	callq	hipDeviceSynchronize
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB10_6
# %bb.5:
	movq	8(%rsp), %rdi
	movq	(%rsp), %rsi
	callq	_Z27__device_stub__covar_kernelPfS_
.LBB10_6:
	callq	hipDeviceSynchronize
	callq	_Z7rtclockv
	movq	stdout(%rip), %rdi
	subsd	24(%rsp), %xmm0                 # 8-byte Folded Reload
	movl	$.L.str.3, %esi
	movb	$1, %al
	callq	fprintf
	movq	8(%rsp), %rsi
	movl	$16793604, %edx                 # imm = 0x1004004
	movq	32(%rsp), %rdi                  # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	movq	(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end10:
	.size	_Z14covarianceCudaPfS_S_S_, .Lfunc_end10-_Z14covarianceCudaPfS_S_S_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI11_0:
	.long	0x3a000000                      # float 4.8828125E-4
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$16793604, %edi                 # imm = 0x1004004
	callq	malloc
	movq	%rax, %rbx
	movl	$16793604, %edi                 # imm = 0x1004004
	callq	malloc
	movq	%rax, %r14
	movl	$8196, %edi                     # imm = 0x2004
	callq	malloc
	movq	%rax, %r15
	movl	$16793604, %edi                 # imm = 0x1004004
	callq	malloc
	movq	%rax, %r12
	movq	%rbx, %rax
	addq	$8200, %rax                     # imm = 0x2008
	movl	$1, %ecx
	movss	.LCPI11_0(%rip), %xmm0          # xmm0 = mem[0],zero,zero,zero
.LBB11_1:                               # %.preheader.i
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB11_2 Depth 2
	xorps	%xmm1, %xmm1
	cvtsi2ss	%ecx, %xmm1
	xorl	%edx, %edx
.LBB11_2:                               #   Parent Loop BB11_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	leaq	1(%rdx), %rsi
	xorps	%xmm2, %xmm2
	cvtsi2ss	%esi, %xmm2
	mulss	%xmm1, %xmm2
	mulss	%xmm0, %xmm2
	movss	%xmm2, (%rax,%rdx,4)
	movq	%rsi, %rdx
	cmpq	$2048, %rsi                     # imm = 0x800
	jne	.LBB11_2
# %bb.3:                                #   in Loop: Header=BB11_1 Depth=1
	incq	%rcx
	addq	$8196, %rax                     # imm = 0x2004
	cmpq	$2049, %rcx                     # imm = 0x801
	jne	.LBB11_1
# %bb.4:                                # %_Z11init_arraysPf.exit
	callq	_Z13GPU_argv_initv
	movq	%rbx, %rdi
	movq	%r14, %rsi
	movq	%r15, %rdx
	movq	%r12, %rcx
	callq	_Z14covarianceCudaPfS_S_S_
	callq	_Z7rtclockv
	movsd	%xmm0, (%rsp)                   # 8-byte Spill
	movq	%rbx, %rdi
	movq	%r14, %rsi
	movq	%r15, %rdx
	callq	_Z10covariancePfS_S_
	callq	_Z7rtclockv
	movq	stdout(%rip), %rdi
	subsd	(%rsp), %xmm0                   # 8-byte Folded Reload
	movl	$.L.str.4, %esi
	movb	$1, %al
	callq	fprintf
	movq	%r14, %rdi
	movq	%r12, %rsi
	callq	_Z14compareResultsPfS_
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	movq	%r12, %rdi
	callq	free
	xorl	%eax, %eax
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end11:
	.size	main, .Lfunc_end11-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB12_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB12_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11mean_kernelPfS_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13reduce_kernelPfS_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12covar_kernelPfS_, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end12:
	.size	__hip_module_ctor, .Lfunc_end12-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB13_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB13_2:
	retq
.Lfunc_end13:
	.size	__hip_module_dtor, .Lfunc_end13-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Error return from gettimeofday: %d"
	.size	.L.str, 35

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Non-Matching CPU-GPU Outputs Beyond Error Threshold of %4.2f Percent: %d\n"
	.size	.L.str.1, 74

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"setting device %d with name %s\n"
	.size	.L.str.2, 32

	.type	_Z11mean_kernelPfS_,@object     # @_Z11mean_kernelPfS_
	.section	.rodata,"a",@progbits
	.globl	_Z11mean_kernelPfS_
	.p2align	3, 0x0
_Z11mean_kernelPfS_:
	.quad	_Z26__device_stub__mean_kernelPfS_
	.size	_Z11mean_kernelPfS_, 8

	.type	_Z13reduce_kernelPfS_,@object   # @_Z13reduce_kernelPfS_
	.globl	_Z13reduce_kernelPfS_
	.p2align	3, 0x0
_Z13reduce_kernelPfS_:
	.quad	_Z28__device_stub__reduce_kernelPfS_
	.size	_Z13reduce_kernelPfS_, 8

	.type	_Z12covar_kernelPfS_,@object    # @_Z12covar_kernelPfS_
	.globl	_Z12covar_kernelPfS_
	.p2align	3, 0x0
_Z12covar_kernelPfS_:
	.quad	_Z27__device_stub__covar_kernelPfS_
	.size	_Z12covar_kernelPfS_, 8

	.type	.L.str.3,@object                # @.str.3
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.3:
	.asciz	"GPU Runtime: %0.6lfs\n"
	.size	.L.str.3, 22

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"CPU Runtime: %0.6lfs\n"
	.size	.L.str.4, 22

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z11mean_kernelPfS_"
	.size	.L__unnamed_1, 20

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z13reduce_kernelPfS_"
	.size	.L__unnamed_2, 22

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z12covar_kernelPfS_"
	.size	.L__unnamed_3, 21

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z26__device_stub__mean_kernelPfS_
	.addrsig_sym _Z28__device_stub__reduce_kernelPfS_
	.addrsig_sym _Z27__device_stub__covar_kernelPfS_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z11mean_kernelPfS_
	.addrsig_sym _Z13reduce_kernelPfS_
	.addrsig_sym _Z12covar_kernelPfS_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z11mean_kernelPfS_     ; -- Begin function _Z11mean_kernelPfS_
	.globl	_Z11mean_kernelPfS_
	.p2align	8
	.type	_Z11mean_kernelPfS_,@function
_Z11mean_kernelPfS_:                    ; @_Z11mean_kernelPfS_
; %bb.0:
	s_load_b32 s2, s[0:1], 0x1c
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_u32_e32 0x800, v1
	s_cbranch_execz .LBB0_4
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_dual_mov_b32 v5, 0 :: v_dual_add_nc_u32 v4, 1, v1
	v_mov_b32_e32 v0, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[4:5]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s0, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	s_movk_i32 s0, 0x802
	global_store_b32 v[2:3], v5, off
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v4, s0, v1
	s_addk_i32 s0, 0x801
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s0, 0x401002
	v_lshlrev_b64 v[6:7], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, s2, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s3, v7, vcc_lo
	global_load_b32 v4, v[6:7], off
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v0, v4, v0
	global_store_b32 v[2:3], v0, off
	s_cbranch_scc1 .LBB0_2
; %bb.3:
	v_div_scale_f32 v1, null, 0x4a442e10, 0x4a442e10, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v4, v1
	s_waitcnt_depctr 0xfff
	v_fma_f32 v5, -v1, v4, 1.0
	v_fmac_f32_e32 v4, v5, v4
	v_div_scale_f32 v5, vcc_lo, v0, 0x4a442e10, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v6, v5, v4
	v_fma_f32 v7, -v1, v6, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v6, v7, v4
	v_fma_f32 v1, -v1, v6, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v1, v1, v4, v6
	v_div_fixup_f32 v0, v1, 0x4a442e10, v0
	global_store_b32 v[2:3], v0, off
.LBB0_4:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11mean_kernelPfS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z11mean_kernelPfS_, .Lfunc_end0-_Z11mean_kernelPfS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 308
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z13reduce_kernelPfS_   ; -- Begin function _Z13reduce_kernelPfS_
	.globl	_Z13reduce_kernelPfS_
	.p2align	8
	.type	_Z13reduce_kernelPfS_,@function
_Z13reduce_kernelPfS_:                  ; @_Z13reduce_kernelPfS_
; %bb.0:
	s_load_b32 s2, s[0:1], 0x1c
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v4, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[2:3], null, s15, s3, v[4:5]
	s_mov_b32 s2, exec_lo
	v_or_b32_e32 v1, v2, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e32 0x800, v1
	s_cbranch_execz .LBB1_2
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_mov_b32_e32 v1, 0
	v_lshl_add_u32 v4, v2, 11, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[2:3], 2, v[0:1]
	v_add3_u32 v0, v0, v4, 0x802
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s0, v2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	v_add_co_u32 v0, vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_load_b32 v2, v[2:3], off offset:4
	global_load_b32 v3, v[0:1], off
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v2, v3, v2
	global_store_b32 v[0:1], v2, off
.LBB1_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13reduce_kernelPfS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z13reduce_kernelPfS_, .Lfunc_end1-_Z13reduce_kernelPfS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 220
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z12covar_kernelPfS_    ; -- Begin function _Z12covar_kernelPfS_
	.globl	_Z12covar_kernelPfS_
	.p2align	8
	.type	_Z12covar_kernelPfS_,@function
_Z12covar_kernelPfS_:                   ; @_Z12covar_kernelPfS_
; %bb.0:
	s_load_b32 s2, s[0:1], 0x1c
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_u32_e32 0x800, v1
	s_cbranch_execz .LBB2_5
; %bb.1:                                ; %.lr.ph
	s_load_b128 s[4:7], s[0:1], 0x0
	v_dual_mov_b32 v3, 0 :: v_dual_add_nc_u32 v2, 0x802, v1
	v_add_nc_u32_e32 v0, 1, v1
	s_mov_b32 s1, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[4:5], 2, v[2:3]
	v_lshl_add_u32 v10, v0, 11, v0
	v_mov_b32_e32 v11, v0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v4, vcc_lo, s6, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v5, vcc_lo
.LBB2_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB2_3 Depth 2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_mov_b32 v9, v5 :: v_dual_add_nc_u32 v2, v11, v10
	v_mov_b32_e32 v8, v4
	v_mov_b32_e32 v12, v3
	s_movk_i32 s0, 0x802
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 2, v[2:3]
	v_add_co_u32 v6, vcc_lo, s4, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	global_store_b32 v[6:7], v3, off
.LBB2_3:                                ;   Parent Loop BB2_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_nc_u32_e32 v2, s0, v1
	s_addk_i32 s0, 0x801
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s0, 0x401002
	v_lshlrev_b64 v[13:14], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v13, vcc_lo, s6, v13
	v_add_co_ci_u32_e32 v14, vcc_lo, s7, v14, vcc_lo
	global_load_b32 v2, v[8:9], off
	global_load_b32 v13, v[13:14], off
	v_add_co_u32 v8, vcc_lo, 0x2004, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v12, v13, v2
	global_store_b32 v[6:7], v12, off
	s_cbranch_scc1 .LBB2_3
; %bb.4:                                ;   in Loop: Header=BB2_2 Depth=1
	v_mad_u64_u32 v[6:7], null, 0x801, v11, v[0:1]
	v_dual_mov_b32 v7, v3 :: v_dual_add_nc_u32 v2, 1, v11
	v_cmp_lt_i32_e32 vcc_lo, 0x7ff, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mov_b32_e32 v11, v2
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	s_or_b32 s1, vcc_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v6, s0, s4, v6
	v_add_co_ci_u32_e64 v7, s0, s5, v7, s0
	v_add_co_u32 v4, s0, v4, 4
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v5, s0, 0, v5, s0
	global_store_b32 v[6:7], v12, off
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB2_2
.LBB2_5:                                ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12covar_kernelPfS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 15
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z12covar_kernelPfS_, .Lfunc_end2-_Z12covar_kernelPfS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 392
; NumSgprs: 18
; NumVgprs: 15
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 15
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11mean_kernelPfS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z11mean_kernelPfS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z13reduce_kernelPfS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z13reduce_kernelPfS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12covar_kernelPfS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z12covar_kernelPfS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     15
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
