/*
by Qin Yu, Apr 2019
*/

#include <fstream>
using namespace std;

#include <cooperative_groups.h>
#include <cuda.h>
namespace cg = cooperative_groups;

#define CUPRINTF(fmt, ...)                                                     \
  printf("[%d, %d]:\t" fmt, blockIdx.y *gridDim.x + blockIdx.x,                \
         threadIdx.z * blockDim.x * blockDim.y + threadIdx.y * blockDim.x +    \
             threadIdx.x,                                                      \
         __VA_ARGS__) // Idiom, not used, put here for convenient debugging.

__global__ void kernel_minibatch(int *iters, float *alpha, float *sigma,
                                 float *K, int *y, int l, int C) {
  int j = blockIdx.x * blockDim.x + threadIdx.x;

  int can_stop = 0;
  float delta_ = 0;
  __shared__ float delta;
  float last_alpha_j, last_alpha;

  int counter = 0;
  while (true) {
    counter++;
    last_alpha_j = alpha[j];
    for (int i = 0; i < l; i++) {
      if (j == i) {
        last_alpha = alpha[i];
        delta = 1 / K[i * l + i] * (1 - y[i] * sigma[i]);
        alpha[i] += delta;
        if (alpha[i] < 0) {
          alpha[i] = 0;
          delta = 0 - last_alpha;
        }
        if (alpha[i] > C) {
          alpha[i] = C;
          delta = C - last_alpha;
        }
      }
      __syncthreads();
      sigma[j] += delta * y[i] * K[i * l + j];
    }
    can_stop = 0;
    delta_ = alpha[j] - last_alpha_j;
    if (-0.0001f < delta_ && delta_ < 0.0001f)
      can_stop = 1;
    // CUPRINTF("%d, %9.6f, %9.6f, %9.6f, %d\n", counter, alpha[j],
    // last_alpha_j, delta_, can_stop);
    if (__syncthreads_and(can_stop) > 0) {
      if (j == 1) {
        // CUPRINTF("iters = %d\n", counter);
        iters[0] = counter;
      }
      break;
    }
  }
}

extern "C" __global__ void kernel_minibatch_g(int *iters, float *alpha,
                                              float *sigma, float *K, int *y,
                                              int *d, int ddim, float *delta,
                                              int l, int C) {
  int j = blockIdx.x * blockDim.x + threadIdx.x;
  if (j < l) {
    cg::grid_group grid = cg::this_grid();
    // if (j == l-1) CUPRINTF("l = %d, C = %d\n", l, C);

    int can_break = 0;
    int can_stop = 0;
    float delta_ = 0;
    float last_alpha_j, last_alpha;

    int counter = 0;
    while (true) {
      // for (int counter = 0; counter < 2000; counter++) {
      counter++;
      if (threadIdx.x == 1)
        d[blockIdx.x] = 0;
      last_alpha_j = alpha[j];
      for (uint32_t i = 0; i < l; i++) {
        if (j == i) {
          // if (threadIdx.x == i) {  // This was a big big bug
          last_alpha = alpha[i];
          delta[0] = 1 / K[i * l + i] * (1 - y[i] * sigma[i]);
          alpha[i] += delta[0];
          // alpha[i] += delta;
          if (alpha[i] < 0) {
            alpha[i] = 0;
            delta[0] = 0 - last_alpha;
          }
          if (alpha[i] > C) {
            alpha[i] = C;
            delta[0] = C - last_alpha;
          }
        }
        cg::sync(grid);
        sigma[j] += delta[0] * y[i] * K[i * l + j];
      }
      can_stop = 0;
      delta_ = alpha[j] - last_alpha_j;
      if (-0.0001f < delta_ && delta_ < 0.0001f)
        can_stop = 1;
      if (__syncthreads_and(can_stop) > 0)
        if (threadIdx.x == 1)
          d[blockIdx.x] = 1;
      cg::sync(grid);
      can_break = 0;
      for (int i = 0; i < ddim; i++) {
        can_break += d[i];
      }
      // if (j == 1) CUPRINTF("iters = %d\n", counter);
      if (can_break == ddim) {
        if (j == 1) {
          // CUPRINTF("iters = %d\n", counter);
          iters[0] = counter;
        }
        // cg::sync(grid);
        break;
      }
    }
  }
}

// Helper function for using CUDA to update sigma in parallel:
cudaError_t kernel_minibatch_wrapper(int *iters, float *alpha, float *sigma,
                                     float *K, int *y, int l, int C) {
  // int *dev_iters = 0;
  // float *dev_alpha = 0;
  // float *dev_sigma = 0;
  // float *dev_K = 0;
  // int *dev_y = 0;
  int *dev_block_done = 0;
  float *dev_delta = 0;

  const int block_dim_max = 1024;
  int block_dimension = block_dim_max;
  int grid_dimension = (l - 1) / block_dim_max + 1;
  dim3 block(block_dimension);
  dim3 grid(grid_dimension);

  // void *args[10] = {
  //     &dev_iters,      &dev_alpha,      &dev_sigma, &dev_K, &dev_y,
  //     &dev_block_done, &grid_dimension, &dev_delta, &l,     &C};

  void *args[10] = {&iters,          &alpha,          &sigma,     &K, &y,
                    &dev_block_done, &grid_dimension, &dev_delta, &l, &C};

  cudaError_t cudaStatus;

  // Allocate GPU buffers for all vectors:
  // cudaStatus = cudaMalloc(&dev_iters, sizeof(int));
  // if (cudaStatus != cudaSuccess) {
  //   fprintf(stderr, "cudaMalloc failed!");
  //   goto Error1;
  // }
  // cudaStatus = cudaMalloc(&dev_alpha, l * sizeof(float));
  // if (cudaStatus != cudaSuccess) {
  //   fprintf(stderr, "cudaMalloc failed!");
  //   goto Error2;
  // }
  // cudaStatus = cudaMalloc(&dev_sigma, l * sizeof(float));
  // if (cudaStatus != cudaSuccess) {
  //   fprintf(stderr, "cudaMalloc failed!");
  //   goto Error3;
  // }
  // cudaStatus = cudaMalloc(&dev_K, l * l * sizeof(float));
  // if (cudaStatus != cudaSuccess) {
  //   fprintf(stderr, "cudaMalloc failed!");
  //   goto Error4;
  // }
  // cudaStatus = cudaMalloc(&dev_y, l * sizeof(int));
  // if (cudaStatus != cudaSuccess) {
  //   fprintf(stderr, "cudaMalloc failed!");
  //   goto Error5;
  // }
  cudaStatus = cudaMallocManaged(&dev_block_done, grid_dimension * sizeof(int));
  if (cudaStatus != cudaSuccess) {
    fprintf(stderr, "cudaMallocManaged failed!");
    goto Error5;
  }
  cudaStatus = cudaMallocManaged(&dev_delta, 1 * sizeof(float));
  if (cudaStatus != cudaSuccess) {
    fprintf(stderr, "cudaMallocManaged failed!");
    goto Error5;
  }

  // // Copy input vectors from host memory to GPU buffers.
  // cudaStatus =
  //     cudaMemcpy(dev_K, K, l * l * sizeof(float), cudaMemcpyHostToDevice);
  // if (cudaStatus != cudaSuccess) {
  //   fprintf(stderr, "cudaMemcpy failed!");
  //   goto Error5;
  // }
  // cudaStatus = cudaMemcpy(dev_y, y, l * sizeof(int), cudaMemcpyHostToDevice);
  // if (cudaStatus != cudaSuccess) {
  //   fprintf(stderr, "cudaMemcpy failed!");
  //   goto Error5;
  // }

  // printf("READY TO CALL KERNEL\n");
  cudaStatus =
      cudaLaunchCooperativeKernel((void *)kernel_minibatch_g, grid, block, args,
                                  sizeof(float), cudaStream_t(0));
  if (cudaStatus != cudaSuccess) {
    fprintf(stderr, "kernel_minibatch_g launch failed: %s\n",
            cudaGetErrorString(cudaStatus));
    goto Error5;
  }

  // Check for any errors launching the kernel
  cudaStatus = cudaGetLastError();
  if (cudaStatus != cudaSuccess) {
    fprintf(stderr, "kernel_minibatch_g launch failed: %s\n",
            cudaGetErrorString(cudaStatus));
    goto Error5;
  }

  // cudaDeviceSynchronize waits for the kernel to finish, and returns
  // any errors encountered during the launch.
  cudaStatus = cudaDeviceSynchronize();
  if (cudaStatus != cudaSuccess) {
    fprintf(stderr,
            "cudaDeviceSynchronize returned error code %d after launching "
            "addKernel!\n",
            cudaStatus);
    goto Error5;
  }

  // Copy output vector from GPU buffer to host memory.
  // cudaStatus =
  //     cudaMemcpy(iters, dev_iters, sizeof(int), cudaMemcpyDeviceToHost);
  // if (cudaStatus != cudaSuccess) {
  //   fprintf(stderr, "cudaMemcpy failed!");
  //   goto Error5;
  // }

  // cudaStatus =
  //     cudaMemcpy(alpha, dev_alpha, l * sizeof(float),
  //     cudaMemcpyDeviceToHost);
  // if (cudaStatus != cudaSuccess) {
  //   fprintf(stderr, "cudaMemcpy failed!");
  //   goto Error5;
  // }

  // cudaStatus =
  //     cudaMemcpy(sigma, dev_sigma, l * sizeof(float),
  //     cudaMemcpyDeviceToHost);
  // if (cudaStatus != cudaSuccess) {
  //   fprintf(stderr, "cudaMemcpy failed!");
  //   goto Error5;
  // }
  // Error6:
  cudaFree(dev_block_done);
  cudaFree(dev_delta);
Error5:
  //   cudaFree(dev_y);
  // Error4:
  //   cudaFree(dev_K);
  // Error3:
  //   cudaFree(dev_sigma);
  // Error2:
  //   cudaFree(dev_alpha);
  // Error1:
  //   cudaFree(dev_iters);
  // Error0:
  return cudaStatus;
}

cudaError_t kernel_minibatch_block_wrapper(int *iters, float *alpha,
                                           float *sigma, float *K, int *y,
                                           int l, int C) {
  // int *dev_iters = 0;
  // float *dev_alpha = 0;
  // float *dev_sigma = 0;
  // float *dev_K = 0;
  // int *dev_y = 0;

  dim3 grid(1);
  dim3 block(l);
  void *args[7] = {&iters, &alpha, &sigma, &K, &y, &l, &C};

  cudaError_t cudaStatus;

  // Allocate GPU buffers for all vectors:
  // cudaStatus = cudaMalloc(&dev_iters, sizeof(int));
  // if (cudaStatus != cudaSuccess) {
  //   fprintf(stderr, "cudaMalloc failed!");
  //   goto Error1;
  // }
  // cudaStatus = cudaMalloc(&dev_alpha, l * sizeof(float));
  // if (cudaStatus != cudaSuccess) {
  //   fprintf(stderr, "cudaMalloc failed!");
  //   goto Error2;
  // }
  // cudaStatus = cudaMalloc(&dev_sigma, l * sizeof(float));
  // if (cudaStatus != cudaSuccess) {
  //   fprintf(stderr, "cudaMalloc failed!");
  //   goto Error3;
  // }
  // cudaStatus = cudaMalloc(&dev_K, l * l * sizeof(float));
  // if (cudaStatus != cudaSuccess) {
  //   fprintf(stderr, "cudaMalloc failed!");
  //   goto Error4;
  // }
  // cudaStatus = cudaMalloc(&dev_y, l * sizeof(int));
  // if (cudaStatus != cudaSuccess) {
  //   fprintf(stderr, "cudaMalloc failed!");
  //   goto Error5;
  // }

  // Copy input vectors from host memory to GPU buffers.
  // cudaStatus =
  //     cudaMemcpy(dev_K, K, l * l * sizeof(float), cudaMemcpyHostToDevice);
  // if (cudaStatus != cudaSuccess) {
  //   fprintf(stderr, "cudaMemcpy failed!");
  //   goto Error5;
  // }
  // cudaStatus = cudaMemcpy(dev_y, y, l * sizeof(int), cudaMemcpyHostToDevice);
  // if (cudaStatus != cudaSuccess) {
  //   fprintf(stderr, "cudaMemcpy failed!");
  //   goto Error5;
  // }

  // printf("READY TO CALL KERNEL\n");
  cudaStatus = cudaLaunchKernel((void *)kernel_minibatch, grid, block, args,
                                sizeof(float), cudaStream_t(0));
  if (cudaStatus != cudaSuccess) {
    fprintf(stderr, "kernel_minibatch launch failed: %s\n",
            cudaGetErrorString(cudaStatus));
    goto Error5;
  }

  // Check for any errors launching the kernel
  cudaStatus = cudaGetLastError();
  if (cudaStatus != cudaSuccess) {
    fprintf(stderr, "kernel_minibatch_g launch failed: %s\n",
            cudaGetErrorString(cudaStatus));
    goto Error5;
  }

  // cudaDeviceSynchronize waits for the kernel to finish, and returns
  // any errors encountered during the launch.
  cudaStatus = cudaDeviceSynchronize();
  if (cudaStatus != cudaSuccess) {
    fprintf(stderr,
            "cudaDeviceSynchronize returned error code %d after launching "
            "addKernel!\n",
            cudaStatus);
    goto Error5;
  }

// Copy output vector from GPU buffer to host memory.
// cudaStatus =
//     cudaMemcpy(iters, dev_iters, sizeof(int), cudaMemcpyDeviceToHost);
// if (cudaStatus != cudaSuccess) {
//   fprintf(stderr, "cudaMemcpy failed!");
//   goto Error5;
// }

// cudaStatus =
//     cudaMemcpy(alpha, dev_alpha, l * sizeof(float),
//     cudaMemcpyDeviceToHost);
// if (cudaStatus != cudaSuccess) {
//   fprintf(stderr, "cudaMemcpy failed!");
//   goto Error5;
// }

// cudaStatus =
//     cudaMemcpy(sigma, dev_sigma, l * sizeof(float),
//     cudaMemcpyDeviceToHost);
// if (cudaStatus != cudaSuccess) {
//   fprintf(stderr, "cudaMemcpy failed!");
//   goto Error5;
// }
Error5:
  //   cudaFree(dev_y);
  // Error4:
  //   cudaFree(dev_K);
  // Error3:
  //   cudaFree(dev_sigma);
  // Error2:
  //   cudaFree(dev_alpha);
  // Error1:
  //   cudaFree(dev_iters);
  // Error0:
  return cudaStatus;
}

	.file	"tmpxft_0032de5c_00000000-6_suboptimisation.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB6967:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE6967:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"cudaMallocManaged failed!"
.LC1:
	.string	"kernel_minibatch_g launch failed: %s\n"
.LC2:
	.string	"cudaDeviceSynchronize returned error code %d after launching addKernel!\n"
	.text
	.globl	_Z24kernel_minibatch_wrapperPiPfS0_S0_S_ii
	.type	_Z24kernel_minibatch_wrapperPiPfS0_S0_S_ii, @function
_Z24kernel_minibatch_wrapperPiPfS0_S0_S_ii:
.LFB6963:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$192, %rsp
	.cfi_def_cfa_offset 224
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %r12
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	movq	%rdx, 24(%rsp)
	movq	%rcx, 16(%rsp)
	xorl	%ecx, %ecx
	movq	%r8, 8(%rsp)
	movl	%r9d, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leal	-1(%r9), %eax
	movq	%rcx, 64(%rsp)
	movq	%rcx, 72(%rsp)
	cltd
	movl	$1024, %ecx
	idivl	%ecx
	movq	%rdi, 144(%rsp)
	movq	%r12, 160(%rsp)
	movl	$1, %edx
	leal	1(%rax), %ebp
	leaq	40(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	32(%rsp), %rax
	movslq	%ebp, %rsi
	movq	%rax, 112(%rsp)
	leaq	24(%rsp), %rax
	salq	$2, %rsi
	movq	%rax, 120(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	60(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	224(%rsp), %rax
	movl	%ebp, 60(%rsp)
	movq	%rax, 176(%rsp)
	call	cudaMallocManaged@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L11
	movl	$1, %edx
	movl	$4, %esi
	movq	%r12, %rdi
	call	cudaMallocManaged@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L5
.L11:
	movq	stderr(%rip), %rdi
	leaq	.LC0(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	jmp	.L2
.L5:
	movl	%ebp, 80(%rsp)
	movl	$4194305, %ecx
	movabsq	$4294967297, %rax
	movl	$1, %r8d
	movq	%rax, 84(%rsp)
	salq	$10, %rcx
	leaq	kernel_minibatch_g(%rip), %rdi
	pushq	$0
	.cfi_def_cfa_offset 232
	pushq	$4
	.cfi_def_cfa_offset 240
	movq	96(%rsp), %rsi
	movl	104(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchCooperativeKernel@PLT
	movl	%eax, %ebx
	popq	%rax
	.cfi_def_cfa_offset 232
	popq	%rdx
	.cfi_def_cfa_offset 224
	testl	%ebx, %ebx
	jne	.L12
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L7
.L12:
	movl	%ebx, %edi
	call	cudaGetErrorString@PLT
	movq	stderr(%rip), %rdi
	movl	$2, %esi
	leaq	.LC1(%rip), %rdx
	movq	%rax, %rcx
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	jmp	.L2
.L7:
	call	cudaDeviceSynchronize@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L8
	movq	stderr(%rip), %rdi
	movl	%eax, %ecx
	movl	$2, %esi
	xorl	%eax, %eax
	leaq	.LC2(%rip), %rdx
	call	__fprintf_chk@PLT
	jmp	.L2
.L8:
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rdi
	call	cudaFree@PLT
.L4:
.L2:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L9
	call	__stack_chk_fail@PLT
.L9:
	addq	$192, %rsp
	.cfi_def_cfa_offset 32
	movl	%ebx, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6963:
	.size	_Z24kernel_minibatch_wrapperPiPfS0_S0_S_ii, .-_Z24kernel_minibatch_wrapperPiPfS0_S0_S_ii
	.section	.rodata.str1.1
.LC3:
	.string	"kernel_minibatch launch failed: %s\n"
	.text
	.globl	_Z30kernel_minibatch_block_wrapperPiPfS0_S0_S_ii
	.type	_Z30kernel_minibatch_block_wrapperPiPfS0_S0_S_ii, @function
_Z30kernel_minibatch_block_wrapperPiPfS0_S0_S_ii:
.LFB6964:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	subq	$144, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 40(%rsp)
	leaq	_Z16kernel_minibatchPiPfS0_S0_S_ii(%rip), %rdi
	movq	%rsi, 32(%rsp)
	movabsq	$4294967297, %rsi
	movq	%rdx, 24(%rsp)
	movl	$1, %edx
	movq	%rcx, 16(%rsp)
	movq	%r8, 8(%rsp)
	movl	%r9d, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	%r9d, 68(%rsp)
	movq	%rax, 80(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	160(%rsp), %rax
	movq	%rax, 128(%rsp)
	movq	%rsi, 72(%rsp)
	pushq	$0
	.cfi_def_cfa_offset 168
	pushq	$4
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rdx
	.cfi_def_cfa_offset 168
	popq	%rcx
	.cfi_def_cfa_offset 160
	testl	%eax, %eax
	je	.L15
	movl	%eax, %edi
	movl	%eax, %ebx
	call	cudaGetErrorString@PLT
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rcx
	jmp	.L22
.L15:
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L17
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	leaq	.LC1(%rip), %rdx
	movq	%rax, %rcx
.L22:
	movq	stderr(%rip), %rdi
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	jmp	.L14
.L17:
	call	cudaDeviceSynchronize@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L14
	movq	stderr(%rip), %rdi
	movl	%eax, %ecx
	movl	$2, %esi
	xorl	%eax, %eax
	leaq	.LC2(%rip), %rdx
	call	__fprintf_chk@PLT
.L16:
.L14:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L20
	call	__stack_chk_fail@PLT
.L20:
	addq	$144, %rsp
	.cfi_def_cfa_offset 16
	movl	%ebx, %eax
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6964:
	.size	_Z30kernel_minibatch_block_wrapperPiPfS0_S0_S_ii, .-_Z30kernel_minibatch_block_wrapperPiPfS0_S0_S_ii
	.globl	_Z48__device_stub__Z16kernel_minibatchPiPfS0_S0_S_iiPiPfS0_S0_S_ii
	.type	_Z48__device_stub__Z16kernel_minibatchPiPfS0_S0_S_iiPiPfS0_S0_S_ii, @function
_Z48__device_stub__Z16kernel_minibatchPiPfS0_S0_S_iiPiPfS0_S0_S_ii:
.LFB6989:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movl	%r9d, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	192(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L23
	pushq	56(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z16kernel_minibatchPiPfS0_S0_S_ii(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 208
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L23:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L25
	call	__stack_chk_fail@PLT
.L25:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6989:
	.size	_Z48__device_stub__Z16kernel_minibatchPiPfS0_S0_S_iiPiPfS0_S0_S_ii, .-_Z48__device_stub__Z16kernel_minibatchPiPfS0_S0_S_iiPiPfS0_S0_S_ii
	.globl	_Z16kernel_minibatchPiPfS0_S0_S_ii
	.type	_Z16kernel_minibatchPiPfS0_S0_S_ii, @function
_Z16kernel_minibatchPiPfS0_S0_S_ii:
.LFB6990:
	.cfi_startproc
	endbr64
	jmp	_Z48__device_stub__Z16kernel_minibatchPiPfS0_S0_S_iiPiPfS0_S0_S_ii
	.cfi_endproc
.LFE6990:
	.size	_Z16kernel_minibatchPiPfS0_S0_S_ii, .-_Z16kernel_minibatchPiPfS0_S0_S_ii
	.globl	_Z56__device_stub__Z18kernel_minibatch_gPiPfS0_S0_S_S_iS0_iiPiPfS0_S0_S_S_iS0_ii
	.type	_Z56__device_stub__Z18kernel_minibatch_gPiPfS0_S0_S_S_iS0_iiPiPfS0_S0_S_S_iS0_ii, @function
_Z56__device_stub__Z18kernel_minibatch_gPiPfS0_S0_S_S_iS0_iiPiPfS0_S0_S_S_iS0_ii:
.LFB6991:
	.cfi_startproc
	endbr64
	subq	$232, %rsp
	.cfi_def_cfa_offset 240
	movq	248(%rsp), %rax
	movq	%rdi, 56(%rsp)
	leaq	88(%rsp), %rdi
	movq	%rsi, 48(%rsp)
	leaq	100(%rsp), %rsi
	movq	%rdx, 40(%rsp)
	leaq	72(%rsp), %rdx
	movq	%rcx, 32(%rsp)
	leaq	80(%rsp), %rcx
	movq	%r8, 24(%rsp)
	movq	%r9, 16(%rsp)
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 216(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rax
	movl	$1, 96(%rsp)
	movq	%rax, 136(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	240(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	256(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	264(%rsp), %rax
	movq	%rax, 208(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 88(%rsp)
	movq	%rax, 100(%rsp)
	movl	$1, 108(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L28
	pushq	80(%rsp)
	.cfi_def_cfa_offset 248
	leaq	kernel_minibatch_g(%rip), %rdi
	pushq	80(%rsp)
	.cfi_def_cfa_offset 256
	movq	116(%rsp), %rcx
	movl	124(%rsp), %r8d
	movq	104(%rsp), %rsi
	movl	112(%rsp), %edx
	leaq	152(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 248
	popq	%rdx
	.cfi_def_cfa_offset 240
.L28:
	movq	216(%rsp), %rax
	subq	%fs:40, %rax
	je	.L30
	call	__stack_chk_fail@PLT
.L30:
	addq	$232, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6991:
	.size	_Z56__device_stub__Z18kernel_minibatch_gPiPfS0_S0_S_S_iS0_iiPiPfS0_S0_S_S_iS0_ii, .-_Z56__device_stub__Z18kernel_minibatch_gPiPfS0_S0_S_S_iS0_iiPiPfS0_S0_S_S_iS0_ii
	.globl	kernel_minibatch_g
	.type	kernel_minibatch_g, @function
kernel_minibatch_g:
.LFB6992:
	.cfi_startproc
	endbr64
	jmp	_Z56__device_stub__Z18kernel_minibatch_gPiPfS0_S0_S_S_iS0_iiPiPfS0_S0_S_S_iS0_ii
	.cfi_endproc
.LFE6992:
	.size	kernel_minibatch_g, .-kernel_minibatch_g
	.section	.rodata.str1.1
.LC4:
	.string	"kernel_minibatch_g"
.LC5:
	.string	"_Z16kernel_minibatchPiPfS0_S0_S_ii"
.LC6:
	.string	"_ZN49_INTERNAL_72531603_18_suboptimisation_cu_f2776ecc4cuda3std3__419piecewise_constructE"
.LC7:
	.string	"_ZN49_INTERNAL_72531603_18_suboptimisation_cu_f2776ecc4cuda3std6ranges3__45__cpo4swapE"
.LC8:
	.string	"_ZN49_INTERNAL_72531603_18_suboptimisation_cu_f2776ecc4cuda3std6ranges3__45__cpo9iter_moveE"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB6994:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC4(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	kernel_minibatch_g(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC5(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z16kernel_minibatchPiPfS0_S0_S_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC6(%rip), %rdx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__419piecewise_constructE(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC7(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo4swapE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC8(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movl	$1, %r9d
	movq	%rdx, %rcx
	leaq	_ZN4cuda3std6ranges3__45__cpo9iter_moveE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%r8
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE6994:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.weak	_ZN4cuda3std3__419piecewise_constructE
	.section	.rodata._ZN4cuda3std3__419piecewise_constructE,"aG",@progbits,_ZN4cuda3std3__419piecewise_constructE,comdat
	.type	_ZN4cuda3std3__419piecewise_constructE, @gnu_unique_object
	.size	_ZN4cuda3std3__419piecewise_constructE, 1
_ZN4cuda3std3__419piecewise_constructE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo9iter_moveE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo9iter_moveE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo9iter_moveE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo9iter_moveE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo9iter_moveE, 1
_ZN4cuda3std6ranges3__45__cpo9iter_moveE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo4swapE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo4swapE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4swapE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo4swapE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo4swapE, 1
_ZN4cuda3std6ranges3__45__cpo4swapE:
	.zero	1
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/*
by Qin Yu, Apr 2019
*/

#include <fstream>
using namespace std;

#include <hip/hip_cooperative_groups.h>
#include <hip/hip_runtime.h>
namespace cg = cooperative_groups;

#define CUPRINTF(fmt, ...)                                                     \
  printf("[%d, %d]:\t" fmt, blockIdx.y *gridDim.x + blockIdx.x,                \
         threadIdx.z * blockDim.x * blockDim.y + threadIdx.y * blockDim.x +    \
             threadIdx.x,                                                      \
         __VA_ARGS__) // Idiom, not used, put here for convenient debugging.

__global__ void kernel_minibatch(int *iters, float *alpha, float *sigma,
                                 float *K, int *y, int l, int C) {
  int j = blockIdx.x * blockDim.x + threadIdx.x;

  int can_stop = 0;
  float delta_ = 0;
  __shared__ float delta;
  float last_alpha_j, last_alpha;

  int counter = 0;
  while (true) {
    counter++;
    last_alpha_j = alpha[j];
    for (int i = 0; i < l; i++) {
      if (j == i) {
        last_alpha = alpha[i];
        delta = 1 / K[i * l + i] * (1 - y[i] * sigma[i]);
        alpha[i] += delta;
        if (alpha[i] < 0) {
          alpha[i] = 0;
          delta = 0 - last_alpha;
        }
        if (alpha[i] > C) {
          alpha[i] = C;
          delta = C - last_alpha;
        }
      }
      __syncthreads();
      sigma[j] += delta * y[i] * K[i * l + j];
    }
    can_stop = 0;
    delta_ = alpha[j] - last_alpha_j;
    if (-0.0001f < delta_ && delta_ < 0.0001f)
      can_stop = 1;
    // CUPRINTF("%d, %9.6f, %9.6f, %9.6f, %d\n", counter, alpha[j],
    // last_alpha_j, delta_, can_stop);
    if (__syncthreads_and(can_stop) > 0) {
      if (j == 1) {
        // CUPRINTF("iters = %d\n", counter);
        iters[0] = counter;
      }
      break;
    }
  }
}

extern "C" __global__ void kernel_minibatch_g(int *iters, float *alpha,
                                              float *sigma, float *K, int *y,
                                              int *d, int ddim, float *delta,
                                              int l, int C) {
  int j = blockIdx.x * blockDim.x + threadIdx.x;
  if (j < l) {
    cg::grid_group grid = cg::this_grid();
    // if (j == l-1) CUPRINTF("l = %d, C = %d\n", l, C);

    int can_break = 0;
    int can_stop = 0;
    float delta_ = 0;
    float last_alpha_j, last_alpha;

    int counter = 0;
    while (true) {
      // for (int counter = 0; counter < 2000; counter++) {
      counter++;
      if (threadIdx.x == 1)
        d[blockIdx.x] = 0;
      last_alpha_j = alpha[j];
      for (uint32_t i = 0; i < l; i++) {
        if (j == i) {
          // if (threadIdx.x == i) {  // This was a big big bug
          last_alpha = alpha[i];
          delta[0] = 1 / K[i * l + i] * (1 - y[i] * sigma[i]);
          alpha[i] += delta[0];
          // alpha[i] += delta;
          if (alpha[i] < 0) {
            alpha[i] = 0;
            delta[0] = 0 - last_alpha;
          }
          if (alpha[i] > C) {
            alpha[i] = C;
            delta[0] = C - last_alpha;
          }
        }
        cg::sync(grid);
        sigma[j] += delta[0] * y[i] * K[i * l + j];
      }
      can_stop = 0;
      delta_ = alpha[j] - last_alpha_j;
      if (-0.0001f < delta_ && delta_ < 0.0001f)
        can_stop = 1;
      if (__syncthreads_and(can_stop) > 0)
        if (threadIdx.x == 1)
          d[blockIdx.x] = 1;
      cg::sync(grid);
      can_break = 0;
      for (int i = 0; i < ddim; i++) {
        can_break += d[i];
      }
      // if (j == 1) CUPRINTF("iters = %d\n", counter);
      if (can_break == ddim) {
        if (j == 1) {
          // CUPRINTF("iters = %d\n", counter);
          iters[0] = counter;
        }
        // cg::sync(grid);
        break;
      }
    }
  }
}

// Helper function for using CUDA to update sigma in parallel:
hipError_t kernel_minibatch_wrapper(int *iters, float *alpha, float *sigma,
                                     float *K, int *y, int l, int C) {
  // int *dev_iters = 0;
  // float *dev_alpha = 0;
  // float *dev_sigma = 0;
  // float *dev_K = 0;
  // int *dev_y = 0;
  int *dev_block_done = 0;
  float *dev_delta = 0;

  const int block_dim_max = 1024;
  int block_dimension = block_dim_max;
  int grid_dimension = (l - 1) / block_dim_max + 1;
  dim3 block(block_dimension);
  dim3 grid(grid_dimension);

  // void *args[10] = {
  //     &dev_iters,      &dev_alpha,      &dev_sigma, &dev_K, &dev_y,
  //     &dev_block_done, &grid_dimension, &dev_delta, &l,     &C};

  void *args[10] = {&iters,          &alpha,          &sigma,     &K, &y,
                    &dev_block_done, &grid_dimension, &dev_delta, &l, &C};

  hipError_t cudaStatus;

  // Allocate GPU buffers for all vectors:
  // cudaStatus = cudaMalloc(&dev_iters, sizeof(int));
  // if (cudaStatus != cudaSuccess) {
  //   fprintf(stderr, "cudaMalloc failed!");
  //   goto Error1;
  // }
  // cudaStatus = cudaMalloc(&dev_alpha, l * sizeof(float));
  // if (cudaStatus != cudaSuccess) {
  //   fprintf(stderr, "cudaMalloc failed!");
  //   goto Error2;
  // }
  // cudaStatus = cudaMalloc(&dev_sigma, l * sizeof(float));
  // if (cudaStatus != cudaSuccess) {
  //   fprintf(stderr, "cudaMalloc failed!");
  //   goto Error3;
  // }
  // cudaStatus = cudaMalloc(&dev_K, l * l * sizeof(float));
  // if (cudaStatus != cudaSuccess) {
  //   fprintf(stderr, "cudaMalloc failed!");
  //   goto Error4;
  // }
  // cudaStatus = cudaMalloc(&dev_y, l * sizeof(int));
  // if (cudaStatus != cudaSuccess) {
  //   fprintf(stderr, "cudaMalloc failed!");
  //   goto Error5;
  // }
  cudaStatus = hipMallocManaged(&dev_block_done, grid_dimension * sizeof(int));
  if (cudaStatus != hipSuccess) {
    fprintf(stderr, "hipMallocManaged failed!");
    goto Error5;
  }
  cudaStatus = hipMallocManaged(&dev_delta, 1 * sizeof(float));
  if (cudaStatus != hipSuccess) {
    fprintf(stderr, "hipMallocManaged failed!");
    goto Error5;
  }

  // // Copy input vectors from host memory to GPU buffers.
  // cudaStatus =
  //     cudaMemcpy(dev_K, K, l * l * sizeof(float), cudaMemcpyHostToDevice);
  // if (cudaStatus != cudaSuccess) {
  //   fprintf(stderr, "cudaMemcpy failed!");
  //   goto Error5;
  // }
  // cudaStatus = cudaMemcpy(dev_y, y, l * sizeof(int), cudaMemcpyHostToDevice);
  // if (cudaStatus != cudaSuccess) {
  //   fprintf(stderr, "cudaMemcpy failed!");
  //   goto Error5;
  // }

  // printf("READY TO CALL KERNEL\n");
  cudaStatus =
      hipLaunchCooperativeKernel(reinterpret_cast<const void*>((void *)kernel_minibatch_g), grid, block, args,
                                  sizeof(float), hipStream_t(0));
  if (cudaStatus != hipSuccess) {
    fprintf(stderr, "kernel_minibatch_g launch failed: %s\n",
            hipGetErrorString(cudaStatus));
    goto Error5;
  }

  // Check for any errors launching the kernel
  cudaStatus = hipGetLastError();
  if (cudaStatus != hipSuccess) {
    fprintf(stderr, "kernel_minibatch_g launch failed: %s\n",
            hipGetErrorString(cudaStatus));
    goto Error5;
  }

  // cudaDeviceSynchronize waits for the kernel to finish, and returns
  // any errors encountered during the launch.
  cudaStatus = hipDeviceSynchronize();
  if (cudaStatus != hipSuccess) {
    fprintf(stderr,
            "hipDeviceSynchronize returned error code %d after launching "
            "addKernel!\n",
            cudaStatus);
    goto Error5;
  }

  // Copy output vector from GPU buffer to host memory.
  // cudaStatus =
  //     cudaMemcpy(iters, dev_iters, sizeof(int), cudaMemcpyDeviceToHost);
  // if (cudaStatus != cudaSuccess) {
  //   fprintf(stderr, "cudaMemcpy failed!");
  //   goto Error5;
  // }

  // cudaStatus =
  //     cudaMemcpy(alpha, dev_alpha, l * sizeof(float),
  //     cudaMemcpyDeviceToHost);
  // if (cudaStatus != cudaSuccess) {
  //   fprintf(stderr, "cudaMemcpy failed!");
  //   goto Error5;
  // }

  // cudaStatus =
  //     cudaMemcpy(sigma, dev_sigma, l * sizeof(float),
  //     cudaMemcpyDeviceToHost);
  // if (cudaStatus != cudaSuccess) {
  //   fprintf(stderr, "cudaMemcpy failed!");
  //   goto Error5;
  // }
  // Error6:
  hipFree(dev_block_done);
  hipFree(dev_delta);
Error5:
  //   cudaFree(dev_y);
  // Error4:
  //   cudaFree(dev_K);
  // Error3:
  //   cudaFree(dev_sigma);
  // Error2:
  //   cudaFree(dev_alpha);
  // Error1:
  //   cudaFree(dev_iters);
  // Error0:
  return cudaStatus;
}

hipError_t kernel_minibatch_block_wrapper(int *iters, float *alpha,
                                           float *sigma, float *K, int *y,
                                           int l, int C) {
  // int *dev_iters = 0;
  // float *dev_alpha = 0;
  // float *dev_sigma = 0;
  // float *dev_K = 0;
  // int *dev_y = 0;

  dim3 grid(1);
  dim3 block(l);
  void *args[7] = {&iters, &alpha, &sigma, &K, &y, &l, &C};

  hipError_t cudaStatus;

  // Allocate GPU buffers for all vectors:
  // cudaStatus = cudaMalloc(&dev_iters, sizeof(int));
  // if (cudaStatus != cudaSuccess) {
  //   fprintf(stderr, "cudaMalloc failed!");
  //   goto Error1;
  // }
  // cudaStatus = cudaMalloc(&dev_alpha, l * sizeof(float));
  // if (cudaStatus != cudaSuccess) {
  //   fprintf(stderr, "cudaMalloc failed!");
  //   goto Error2;
  // }
  // cudaStatus = cudaMalloc(&dev_sigma, l * sizeof(float));
  // if (cudaStatus != cudaSuccess) {
  //   fprintf(stderr, "cudaMalloc failed!");
  //   goto Error3;
  // }
  // cudaStatus = cudaMalloc(&dev_K, l * l * sizeof(float));
  // if (cudaStatus != cudaSuccess) {
  //   fprintf(stderr, "cudaMalloc failed!");
  //   goto Error4;
  // }
  // cudaStatus = cudaMalloc(&dev_y, l * sizeof(int));
  // if (cudaStatus != cudaSuccess) {
  //   fprintf(stderr, "cudaMalloc failed!");
  //   goto Error5;
  // }

  // Copy input vectors from host memory to GPU buffers.
  // cudaStatus =
  //     cudaMemcpy(dev_K, K, l * l * sizeof(float), cudaMemcpyHostToDevice);
  // if (cudaStatus != cudaSuccess) {
  //   fprintf(stderr, "cudaMemcpy failed!");
  //   goto Error5;
  // }
  // cudaStatus = cudaMemcpy(dev_y, y, l * sizeof(int), cudaMemcpyHostToDevice);
  // if (cudaStatus != cudaSuccess) {
  //   fprintf(stderr, "cudaMemcpy failed!");
  //   goto Error5;
  // }

  // printf("READY TO CALL KERNEL\n");
  cudaStatus = hipLaunchKernel(reinterpret_cast<const void*>((void *)kernel_minibatch), grid, block, args,
                                sizeof(float), hipStream_t(0));
  if (cudaStatus != hipSuccess) {
    fprintf(stderr, "kernel_minibatch launch failed: %s\n",
            hipGetErrorString(cudaStatus));
    goto Error5;
  }

  // Check for any errors launching the kernel
  cudaStatus = hipGetLastError();
  if (cudaStatus != hipSuccess) {
    fprintf(stderr, "kernel_minibatch_g launch failed: %s\n",
            hipGetErrorString(cudaStatus));
    goto Error5;
  }

  // cudaDeviceSynchronize waits for the kernel to finish, and returns
  // any errors encountered during the launch.
  cudaStatus = hipDeviceSynchronize();
  if (cudaStatus != hipSuccess) {
    fprintf(stderr,
            "hipDeviceSynchronize returned error code %d after launching "
            "addKernel!\n",
            cudaStatus);
    goto Error5;
  }

// Copy output vector from GPU buffer to host memory.
// cudaStatus =
//     cudaMemcpy(iters, dev_iters, sizeof(int), cudaMemcpyDeviceToHost);
// if (cudaStatus != cudaSuccess) {
//   fprintf(stderr, "cudaMemcpy failed!");
//   goto Error5;
// }

// cudaStatus =
//     cudaMemcpy(alpha, dev_alpha, l * sizeof(float),
//     cudaMemcpyDeviceToHost);
// if (cudaStatus != cudaSuccess) {
//   fprintf(stderr, "cudaMemcpy failed!");
//   goto Error5;
// }

// cudaStatus =
//     cudaMemcpy(sigma, dev_sigma, l * sizeof(float),
//     cudaMemcpyDeviceToHost);
// if (cudaStatus != cudaSuccess) {
//   fprintf(stderr, "cudaMemcpy failed!");
//   goto Error5;
// }
Error5:
  //   cudaFree(dev_y);
  // Error4:
  //   cudaFree(dev_K);
  // Error3:
  //   cudaFree(dev_sigma);
  // Error2:
  //   cudaFree(dev_alpha);
  // Error1:
  //   cudaFree(dev_iters);
  // Error0:
  return cudaStatus;
}

	.text
	.file	"suboptimisation.hip"
	.globl	_Z31__device_stub__kernel_minibatchPiPfS0_S0_S_ii # -- Begin function _Z31__device_stub__kernel_minibatchPiPfS0_S0_S_ii
	.type	_Z31__device_stub__kernel_minibatchPiPfS0_S0_S_ii,@function
_Z31__device_stub__kernel_minibatchPiPfS0_S0_S_ii: # @_Z31__device_stub__kernel_minibatchPiPfS0_S0_S_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	4(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16kernel_minibatchPiPfS0_S0_S_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z31__device_stub__kernel_minibatchPiPfS0_S0_S_ii, .Lfunc_end0-_Z31__device_stub__kernel_minibatchPiPfS0_S0_S_ii
	.cfi_endproc
                                        # -- End function
	.globl	__device_stub__kernel_minibatch_g # -- Begin function __device_stub__kernel_minibatch_g
	.type	__device_stub__kernel_minibatch_g,@function
__device_stub__kernel_minibatch_g:      # @__device_stub__kernel_minibatch_g
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	16(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	232(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	248(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$kernel_minibatch_g, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$192, %rsp
	.cfi_adjust_cfa_offset -192
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	__device_stub__kernel_minibatch_g, .Lfunc_end1-__device_stub__kernel_minibatch_g
	.cfi_endproc
                                        # -- End function
	.globl	_Z24kernel_minibatch_wrapperPiPfS0_S0_S_ii # -- Begin function _Z24kernel_minibatch_wrapperPiPfS0_S0_S_ii
	.type	_Z24kernel_minibatch_wrapperPiPfS0_S0_S_ii,@function
_Z24kernel_minibatch_wrapperPiPfS0_S0_S_ii: # @_Z24kernel_minibatch_wrapperPiPfS0_S0_S_ii
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	subq	$152, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
                                        # kill: def $r9d killed $r9d def $r9
	leaq	144(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	136(%rsp), %r10
	movq	%rsi, (%r10)
	leaq	128(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	120(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	112(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	28(%rsp), %r8
	movl	%r9d, (%r8)
	xorl	%r11d, %r11d
	leaq	16(%rsp), %rdi
	movq	%r11, (%rdi)
	leaq	8(%rsp), %rbx
	movq	%r11, (%rbx)
	leal	-1(%r9), %r11d
	addl	$1022, %r9d                     # imm = 0x3FE
	testl	%r11d, %r11d
	cmovnsl	%r11d, %r9d
	sarl	$10, %r9d
	leal	1(%r9), %r14d
	leaq	24(%rsp), %r11
	movl	%r14d, (%r11)
	movq	%rax, 32(%rsp)
	movq	%r10, 40(%rsp)
	movq	%rsi, 48(%rsp)
	movq	%rdx, 56(%rsp)
	movq	%rcx, 64(%rsp)
	movq	%rdi, 72(%rsp)
	movq	%r11, 80(%rsp)
	movq	%rbx, 88(%rsp)
	movq	%r8, 96(%rsp)
	leaq	176(%rsp), %rax
	movq	%rax, 104(%rsp)
	movslq	%r9d, %rax
	leaq	4(,%rax,4), %rsi
	movl	$1, %edx
	callq	hipMallocManaged
	testl	%eax, %eax
	jne	.LBB2_1
# %bb.2:
	leaq	8(%rsp), %rdi
	movl	$4, %esi
	movl	$1, %edx
	callq	hipMallocManaged
	testl	%eax, %eax
	jne	.LBB2_1
# %bb.3:
	movabsq	$4294967296, %rcx               # imm = 0x100000000
	btsq	$32, %r14
	addq	$1024, %rcx                     # imm = 0x400
	leaq	32(%rsp), %r9
	movl	$kernel_minibatch_g, %edi
	movq	%r14, %rsi
	movl	$1, %edx
	movl	$1, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$4
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchCooperativeKernel
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	testl	%eax, %eax
	jne	.LBB2_4
# %bb.5:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB2_4
# %bb.6:
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB2_7
# %bb.8:
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	xorl	%ebx, %ebx
.LBB2_9:
	movl	%ebx, %eax
	addq	$152, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.LBB2_1:
	.cfi_def_cfa_offset 176
	movl	%eax, %ebx
	movq	stderr(%rip), %rcx
	movl	$.L.str, %edi
	movl	$24, %esi
	movl	$1, %edx
	callq	fwrite@PLT
	jmp	.LBB2_9
.LBB2_4:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.1, %esi
	movq	%r14, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB2_9
.LBB2_7:
	movl	%eax, %ebx
	movq	stderr(%rip), %rdi
	movl	$.L.str.2, %esi
	movl	%eax, %edx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB2_9
.Lfunc_end2:
	.size	_Z24kernel_minibatch_wrapperPiPfS0_S0_S_ii, .Lfunc_end2-_Z24kernel_minibatch_wrapperPiPfS0_S0_S_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z30kernel_minibatch_block_wrapperPiPfS0_S0_S_ii # -- Begin function _Z30kernel_minibatch_block_wrapperPiPfS0_S0_S_ii
	.type	_Z30kernel_minibatch_block_wrapperPiPfS0_S0_S_ii,@function
_Z30kernel_minibatch_block_wrapperPiPfS0_S0_S_ii: # @_Z30kernel_minibatch_block_wrapperPiPfS0_S0_S_ii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$112, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	16(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	8(%rsp), %r10
	movq	%r8, (%r10)
	leaq	4(%rsp), %r8
	movl	%r9d, (%r8)
	movl	%r9d, %ecx
	btsq	$32, %rcx
	leaq	48(%rsp), %r9
	movq	%rax, (%r9)
	movq	%rdi, 8(%r9)
	movq	%rsi, 16(%r9)
	movq	%rdx, 24(%r9)
	movq	%r10, 32(%r9)
	movq	%r8, 40(%r9)
	leaq	144(%rsp), %rax
	movq	%rax, 48(%r9)
	movabsq	$4294967296, %rsi               # imm = 0x100000000
	orq	$1, %rsi
	movl	$_Z16kernel_minibatchPiPfS0_S0_S_ii, %edi
	movl	$1, %edx
	movl	$1, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$4
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	testl	%eax, %eax
	jne	.LBB3_1
# %bb.3:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB3_4
# %bb.5:
	callq	hipDeviceSynchronize
	xorl	%ebx, %ebx
	testl	%eax, %eax
	jne	.LBB3_6
.LBB3_7:
	movl	%ebx, %eax
	addq	$112, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB3_1:
	.cfi_def_cfa_offset 144
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.3, %esi
	jmp	.LBB3_2
.LBB3_4:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.1, %esi
.LBB3_2:
	movq	%r14, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB3_7
.LBB3_6:
	movl	%eax, %ebp
	movq	stderr(%rip), %rdi
	movl	$.L.str.2, %esi
	movl	%eax, %edx
	xorl	%eax, %eax
	callq	fprintf
	movl	%ebp, %ebx
	jmp	.LBB3_7
.Lfunc_end3:
	.size	_Z30kernel_minibatch_block_wrapperPiPfS0_S0_S_ii, .Lfunc_end3-_Z30kernel_minibatch_block_wrapperPiPfS0_S0_S_ii
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16kernel_minibatchPiPfS0_S0_S_ii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$kernel_minibatch_g, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z16kernel_minibatchPiPfS0_S0_S_ii,@object # @_Z16kernel_minibatchPiPfS0_S0_S_ii
	.section	.rodata,"a",@progbits
	.globl	_Z16kernel_minibatchPiPfS0_S0_S_ii
	.p2align	3, 0x0
_Z16kernel_minibatchPiPfS0_S0_S_ii:
	.quad	_Z31__device_stub__kernel_minibatchPiPfS0_S0_S_ii
	.size	_Z16kernel_minibatchPiPfS0_S0_S_ii, 8

	.type	kernel_minibatch_g,@object      # @kernel_minibatch_g
	.globl	kernel_minibatch_g
	.p2align	3, 0x0
kernel_minibatch_g:
	.quad	__device_stub__kernel_minibatch_g
	.size	kernel_minibatch_g, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"hipMallocManaged failed!"
	.size	.L.str, 25

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"kernel_minibatch_g launch failed: %s\n"
	.size	.L.str.1, 38

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"hipDeviceSynchronize returned error code %d after launching addKernel!\n"
	.size	.L.str.2, 72

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"kernel_minibatch launch failed: %s\n"
	.size	.L.str.3, 36

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z16kernel_minibatchPiPfS0_S0_S_ii"
	.size	.L__unnamed_1, 35

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"kernel_minibatch_g"
	.size	.L__unnamed_2, 19

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z31__device_stub__kernel_minibatchPiPfS0_S0_S_ii
	.addrsig_sym __device_stub__kernel_minibatch_g
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z16kernel_minibatchPiPfS0_S0_S_ii
	.addrsig_sym kernel_minibatch_g
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z16kernel_minibatchPiPfS0_S0_S_ii ; -- Begin function _Z16kernel_minibatchPiPfS0_S0_S_ii
	.globl	_Z16kernel_minibatchPiPfS0_S0_S_ii
	.p2align	8
	.type	_Z16kernel_minibatchPiPfS0_S0_S_ii,@function
_Z16kernel_minibatchPiPfS0_S0_S_ii:     ; @_Z16kernel_minibatchPiPfS0_S0_S_ii
; %bb.0:
	s_clause 0x2
	s_load_b64 s[2:3], s[0:1], 0x3c
	s_load_b128 s[16:19], s[0:1], 0x20
	s_load_b256 s[4:11], s[0:1], 0x0
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	v_bfe_u32 v4, v0, 20, 10
	v_mbcnt_lo_u32_b32 v16, -1, 0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s1, s2, 16
	s_and_b32 s2, s2, 0xffff
	v_mad_u32_u24 v5, v4, s1, v3
	v_mad_u64_u32 v[0:1], null, s15, s2, v[2:3]
	s_and_b32 s0, s3, 0xffff
	s_cmp_gt_i32 s18, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[3:4], null, v5, s2, v[2:3]
	s_mul_i32 s3, s2, s1
	s_cselect_b32 s12, -1, 0
	v_ashrrev_i32_e32 v1, 31, v0
	s_bfe_i32 s1, s3, 0x180000
	v_cvt_f32_i32_e32 v17, s19
	s_mul_i32 s0, s1, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_lshrrev_b32_e32 v14, 5, v3
	v_lshlrev_b64 v[4:5], 2, v[0:1]
	v_mov_b32_e32 v1, 0
	s_add_i32 s0, s0, 31
	s_and_not1_b32 s0, s0, 31
	v_or_b32_e32 v18, v16, v14
	s_delay_alu instid0(VALU_DEP_2)
	v_mad_u64_u32 v[12:13], null, v0, s18, v[0:1]
	v_lshlrev_b64 v[10:11], 2, v[0:1]
	v_add_co_u32 v2, vcc_lo, s6, v4
	s_cmp_lg_u32 s0, 32
	v_cmp_lt_u32_e64 s0, 31, v3
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v5, vcc_lo
	v_add_co_u32 v4, vcc_lo, s8, v4
	v_ashrrev_i32_e32 v13, 31, v12
	v_add_co_ci_u32_e32 v5, vcc_lo, s9, v5, vcc_lo
	v_add_co_u32 v6, vcc_lo, s6, v10
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v11, vcc_lo
	v_add_co_u32 v8, vcc_lo, s16, v10
	v_lshlrev_b64 v[12:13], 2, v[12:13]
	v_add_co_ci_u32_e32 v9, vcc_lo, s17, v11, vcc_lo
	v_add_co_u32 v10, vcc_lo, s8, v10
	v_add_co_ci_u32_e32 v11, vcc_lo, s9, v11, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v12, vcc_lo, s10, v12
	v_add_co_ci_u32_e32 v13, vcc_lo, s11, v13, vcc_lo
	s_cselect_b32 s6, -1, 0
	s_mov_b32 s7, 0
	s_mov_b32 s8, 0
.LBB0_1:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_3 Depth 2
                                        ;     Child Loop BB0_15 Depth 2
	global_load_b32 v19, v[2:3], off
	s_and_not1_b32 vcc_lo, exec_lo, s12
	s_waitcnt vmcnt(0)
	v_mov_b32_e32 v14, v19
	s_cbranch_vccnz .LBB0_10
; %bb.2:                                ; %.lr.ph.preheader
                                        ;   in Loop: Header=BB0_1 Depth=1
	v_mov_b32_e32 v14, v0
	s_mov_b32 s1, 0
	s_mov_b64 s[2:3], s[16:17]
.LBB0_3:                                ; %.lr.ph
                                        ;   Parent Loop BB0_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_mov_b32 s9, exec_lo
	v_cmpx_eq_u32_e64 s1, v0
	s_cbranch_execz .LBB0_8
; %bb.4:                                ;   in Loop: Header=BB0_3 Depth=2
	global_load_b32 v20, v[12:13], off
	global_load_b32 v21, v[8:9], off
	global_load_b32 v22, v[10:11], off
	global_load_b32 v15, v[6:7], off
	s_mov_b32 s13, exec_lo
	s_waitcnt vmcnt(3)
	v_div_scale_f32 v23, null, v20, v20, 1.0
	s_waitcnt vmcnt(2)
	v_cvt_f32_i32_e32 v21, v21
	v_div_scale_f32 v26, vcc_lo, 1.0, v20, 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v24, v23
	s_waitcnt vmcnt(1)
	v_fma_f32 v21, -v22, v21, 1.0
	s_waitcnt_depctr 0xfff
	v_fma_f32 v25, -v23, v24, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v24, v25, v24
	v_mul_f32_e32 v25, v26, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v27, -v23, v25, v26
	v_fmac_f32_e32 v25, v27, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v23, -v23, v25, v26
	v_div_fmas_f32 v23, v23, v24, v25
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v23, v23, v20, 1.0
	s_waitcnt vmcnt(0)
	v_fma_f32 v20, v23, v21, v15
	v_mul_f32_e32 v21, v23, v21
	global_store_b32 v[6:7], v20, off
	ds_store_b32 v1, v21 offset:256
	v_cmpx_gt_f32_e32 0, v20
	s_cbranch_execz .LBB0_6
; %bb.5:                                ;   in Loop: Header=BB0_3 Depth=2
	v_dual_sub_f32 v21, 0, v15 :: v_dual_mov_b32 v20, 0
	global_store_b32 v[6:7], v1, off
	ds_store_b32 v1, v21 offset:256
.LBB0_6:                                ;   in Loop: Header=BB0_3 Depth=2
	s_or_b32 exec_lo, exec_lo, s13
	v_cmp_gt_f32_e32 vcc_lo, v20, v17
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_8
; %bb.7:                                ;   in Loop: Header=BB0_3 Depth=2
	v_sub_f32_e32 v15, v17, v15
	global_store_b32 v[6:7], v17, off
	ds_store_b32 v1, v15 offset:256
.LBB0_8:                                ; %Flow90
                                        ;   in Loop: Header=BB0_3 Depth=2
	s_or_b32 exec_lo, exec_lo, s9
	v_ashrrev_i32_e32 v15, 31, v14
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_add_i32 s1, s1, 1
	v_lshlrev_b64 v[20:21], 2, v[14:15]
	global_load_b32 v15, v1, s[2:3]
	s_add_u32 s2, s2, 4
	s_addc_u32 s3, s3, 0
	s_cmp_eq_u32 s18, s1
	v_add_nc_u32_e32 v14, s18, v14
	v_add_co_u32 v20, vcc_lo, s10, v20
	v_add_co_ci_u32_e32 v21, vcc_lo, s11, v21, vcc_lo
	global_load_b32 v22, v[4:5], off
	global_load_b32 v20, v[20:21], off
	ds_load_b32 v21, v1 offset:256
	s_waitcnt vmcnt(2)
	v_cvt_f32_i32_e32 v15, v15
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v15, v21, v15
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v22, v20, v15
	global_store_b32 v[4:5], v22, off
	s_cbranch_scc0 .LBB0_3
; %bb.9:                                ; %._crit_edge.loopexit
                                        ;   in Loop: Header=BB0_1 Depth=1
	global_load_b32 v14, v[2:3], off
.LBB0_10:                               ; %._crit_edge
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v14, v14, v19 :: v_dual_mov_b32 v15, -1
	v_cmp_lt_f32_e32 vcc_lo, 0xb8d1b717, v14
	v_cmp_gt_f32_e64 s1, 0x38d1b717, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_and_b32 s1, vcc_lo, s1
	s_and_not1_b32 vcc_lo, exec_lo, s6
	v_cndmask_b32_e64 v14, 0, 1, s1
	v_and_b32_dpp v14, v14, v14 row_shl:1 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_dpp v14, v14, v14 row_shl:2 row_mask:0xf bank_mask:0xf
	v_and_b32_dpp v14, v14, v14 row_shl:4 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_dpp v14, v14, v14 row_shl:8 row_mask:0xf bank_mask:0xf
	v_mov_b32_dpp v15, v14 row_share:0 row_mask:0xf bank_mask:0xf
	v_mov_b32_e32 v14, -1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_permlanex16_b32 v14, v15, 0, 0
	v_and_b32_e32 v14, v14, v15
	s_cbranch_vccnz .LBB0_19
; %bb.11:                               ;   in Loop: Header=BB0_1 Depth=1
	s_mov_b32 s1, exec_lo
	v_cmpx_eq_u32_e32 0, v18
	s_cbranch_execz .LBB0_13
; %bb.12:                               ;   in Loop: Header=BB0_1 Depth=1
	ds_store_b32 v1, v14
.LBB0_13:                               ;   in Loop: Header=BB0_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	v_cmp_eq_u32_e32 vcc_lo, 0, v16
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_and_b32 s2, s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s1, s2
	s_cbranch_execz .LBB0_18
; %bb.14:                               ;   in Loop: Header=BB0_1 Depth=1
	s_mov_b32 s3, exec_lo
	s_mov_b32 s2, -1
.LBB0_15:                               ; %ComputeLoop
                                        ;   Parent Loop BB0_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_ctz_i32_b32 s9, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_readlane_b32 s13, v14, s9
	s_lshl_b32 s9, 1, s9
	s_and_not1_b32 s3, s3, s9
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s2, s2, s13
	s_cmp_lg_u32 s3, 0
	s_cbranch_scc1 .LBB0_15
; %bb.16:                               ; %ComputeEnd
                                        ;   in Loop: Header=BB0_1 Depth=1
	v_mbcnt_lo_u32_b32 v14, exec_lo, 0
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v14
	s_xor_b32 s3, exec_lo, s3
	s_cbranch_execz .LBB0_18
; %bb.17:                               ;   in Loop: Header=BB0_1 Depth=1
	v_mov_b32_e32 v14, s2
	ds_and_b32 v1, v14
.LBB0_18:                               ; %Flow87
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v14, v1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB0_19:                               ; %_Z17__syncthreads_andi.exit
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_lt_i32_e32 vcc_lo, 0, v14
	s_add_i32 s8, s8, 1
	v_mov_b32_e32 v14, s8
	s_or_b32 s7, vcc_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB0_1
; %bb.20:
	s_or_b32 exec_lo, exec_lo, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_eq_u32_e32 1, v0
	s_cbranch_execz .LBB0_22
; %bb.21:
	v_mov_b32_e32 v0, 0
	global_store_b32 v0, v14, s[4:5]
.LBB0_22:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16kernel_minibatchPiPfS0_S0_S_ii
		.amdhsa_group_segment_fixed_size 264
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 28
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z16kernel_minibatchPiPfS0_S0_S_ii, .Lfunc_end0-_Z16kernel_minibatchPiPfS0_S0_S_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1164
; NumSgprs: 22
; NumVgprs: 28
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 264 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 28
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.protected	kernel_minibatch_g      ; -- Begin function kernel_minibatch_g
	.globl	kernel_minibatch_g
	.p2align	8
	.type	kernel_minibatch_g,@function
kernel_minibatch_g:                     ; @kernel_minibatch_g
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x54
	s_load_b64 s[18:19], s[0:1], 0x40
	v_and_b32_e32 v12, 0x3ff, v0
	s_add_u32 s20, s0, 0x48
	s_mov_b32 s16, s15
	s_addc_u32 s21, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s2, 0xffff
	s_mov_b32 s2, exec_lo
	v_mad_u64_u32 v[1:2], null, s16, s3, v[12:13]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s18, v1
	s_cbranch_execz .LBB1_50
; %bb.1:
	v_mov_b32_e32 v14, 0
	s_load_b256 s[4:11], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	v_bfe_u32 v13, v0, 20, 10
	v_bfe_u32 v19, v0, 10, 10
	global_load_b32 v8, v14, s[20:21] offset:14
	s_clause 0x2
	s_load_b128 s[12:15], s[0:1], 0x20
	s_load_b32 s24, s[0:1], 0x30
	s_load_b64 s[22:23], s[0:1], 0x38
	v_lshlrev_b64 v[4:5], 2, v[1:2]
	v_mov_b32_e32 v2, v14
	v_or3_b32 v3, v12, v19, v13
	v_cvt_f32_i32_e32 v0, s19
	v_mov_b32_e32 v16, 1
	v_cmp_ne_u32_e32 vcc_lo, 1, v12
	v_mad_u64_u32 v[6:7], null, v1, s18, v[1:2]
	v_lshlrev_b64 v[10:11], 2, v[1:2]
	v_mov_b32_e32 v7, v14
	v_cmp_eq_u32_e64 s1, 0, v3
	v_cmp_eq_u32_e64 s0, 1, v12
	v_mbcnt_lo_u32_b32 v15, -1, 0
	s_mov_b32 s17, 0
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, s2, s6, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v3, s2, s7, v5, s2
	v_add_co_u32 v4, s2, s8, v4
	v_add_co_ci_u32_e64 v5, s2, s9, v5, s2
	v_lshlrev_b64 v[17:18], 2, v[6:7]
	v_add_co_u32 v6, s2, s6, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, s2, s7, v11, s2
	s_mov_b32 s25, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s6, v8
	v_add_co_u32 v8, s2, s12, v10
	v_add_co_ci_u32_e64 v9, s2, s13, v11, s2
	s_delay_alu instid0(VALU_DEP_3)
	s_lshr_b32 s2, s6, 16
	s_and_b32 s6, s6, 0xffff
	s_cmp_lg_u32 s18, 0
	v_mad_u32_u24 v13, v13, s6, v19
	s_mul_i32 s7, s3, s6
	s_cselect_b32 s19, -1, 0
	s_bfe_i32 s7, s7, 0x180000
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[19:20], null, v13, s3, v[12:13]
	s_mul_i32 s6, s7, s2
	v_add_co_u32 v10, s2, s8, v10
	v_add_co_ci_u32_e64 v11, s2, s9, v11, s2
	s_add_i32 s2, s6, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	s_and_b32 s3, s2, 0xffffffe0
	v_add_co_u32 v12, s2, s10, v17
	v_lshrrev_b32_e32 v17, 5, v19
	s_cmp_lg_u32 s3, 32
	v_add_co_ci_u32_e64 v13, s2, s11, v18, s2
	s_cselect_b32 s26, -1, 0
	s_cmp_gt_i32 s24, 0
	v_cmp_lt_u32_e64 s2, 31, v19
	s_cselect_b32 s27, -1, 0
	s_lshl_b64 s[6:7], s[16:17], 2
	v_or_b32_e32 v17, v15, v17
	s_add_u32 s6, s14, s6
	s_addc_u32 s7, s15, s7
	s_xor_b32 s28, vcc_lo, -1
.LBB1_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_6 Depth 2
                                        ;       Child Loop BB1_16 Depth 3
                                        ;     Child Loop BB1_28 Depth 2
                                        ;     Child Loop BB1_39 Depth 2
                                        ;     Child Loop BB1_46 Depth 2
	s_and_saveexec_b32 s3, s0
	s_cbranch_execz .LBB1_4
; %bb.3:                                ;   in Loop: Header=BB1_2 Depth=1
	global_store_b32 v14, v14, s[6:7]
.LBB1_4:                                ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	global_load_b32 v18, v[2:3], off
	s_and_not1_b32 vcc_lo, exec_lo, s19
	s_waitcnt vmcnt(0)
	v_mov_b32_e32 v19, v18
	s_cbranch_vccnz .LBB1_23
; %bb.5:                                ; %.lr.ph.preheader
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_mov_b32 s16, 0
.LBB1_6:                                ; %.lr.ph
                                        ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB1_16 Depth 3
	s_mov_b32 s3, exec_lo
	v_cmpx_eq_u32_e64 s16, v1
	s_cbranch_execz .LBB1_11
; %bb.7:                                ;   in Loop: Header=BB1_6 Depth=2
	global_load_b32 v19, v[12:13], off
	global_load_b32 v20, v[8:9], off
	global_load_b32 v21, v[10:11], off
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(2)
	v_div_scale_f32 v22, null, v19, v19, 1.0
	s_waitcnt vmcnt(1)
	v_cvt_f32_i32_e32 v20, v20
	v_div_scale_f32 v25, vcc_lo, 1.0, v19, 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v23, v22
	s_waitcnt vmcnt(0)
	v_fma_f32 v21, -v21, v20, 1.0
	s_waitcnt_depctr 0xfff
	v_fma_f32 v24, -v22, v23, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v23, v24, v23
	v_mul_f32_e32 v24, v25, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v26, -v22, v24, v25
	v_fmac_f32_e32 v24, v26, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v22, -v22, v24, v25
	v_div_fmas_f32 v22, v22, v23, v24
	s_delay_alu instid0(VALU_DEP_1)
	v_div_fixup_f32 v22, v22, v19, 1.0
	global_load_b32 v19, v[6:7], off
	v_mul_f32_e32 v20, v22, v21
	global_store_b32 v14, v20, s[22:23]
	global_load_b32 v20, v[6:7], off
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v20, v22, v21
	global_store_b32 v[6:7], v20, off
	v_cmpx_gt_f32_e32 0, v20
	s_cbranch_execz .LBB1_9
; %bb.8:                                ;   in Loop: Header=BB1_6 Depth=2
	v_sub_f32_e32 v20, 0, v19
	global_store_b32 v[6:7], v14, off
	global_store_b32 v14, v20, s[22:23]
	global_load_b32 v20, v[6:7], off
.LBB1_9:                                ;   in Loop: Header=BB1_6 Depth=2
	s_or_b32 exec_lo, exec_lo, s8
	s_waitcnt vmcnt(0)
	v_cmp_gt_f32_e32 vcc_lo, v20, v0
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_11
; %bb.10:                               ;   in Loop: Header=BB1_6 Depth=2
	v_sub_f32_e32 v19, v0, v19
	global_store_b32 v[6:7], v0, off
	global_store_b32 v14, v19, s[22:23]
.LBB1_11:                               ; %Flow162
                                        ;   in Loop: Header=BB1_6 Depth=2
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt_vscnt null, 0x0
	buffer_gl1_inv
	buffer_gl0_inv
	s_barrier
	s_and_saveexec_b32 s3, s1
	s_cbranch_execz .LBB1_21
; %bb.12:                               ;   in Loop: Header=BB1_6 Depth=2
	s_load_b64 s[8:9], s[20:21], 0x58
	s_mov_b32 s29, exec_lo
	s_mov_b32 s30, exec_lo
	v_mbcnt_lo_u32_b32 v20, s29, 0
                                        ; implicit-def: $vgpr21
	s_waitcnt lgkmcnt(0)
	global_load_b32 v19, v14, s[8:9] offset:40
	v_cmpx_eq_u32_e32 0, v20
	s_cbranch_execz .LBB1_14
; %bb.13:                               ;   in Loop: Header=BB1_6 Depth=2
	s_bcnt1_i32_b32 s29, s29
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v21, s29
	global_atomic_add_u32 v21, v14, v21, s[8:9] offset:32 glc
.LBB1_14:                               ;   in Loop: Header=BB1_6 Depth=2
	s_or_b32 exec_lo, exec_lo, s30
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s29, v21
	v_add_nc_u32_e32 v22, -1, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v20, s29, v20
	s_mov_b32 s29, exec_lo
	v_and_b32_e32 v21, 0xffff, v20
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ne_u32_e64 v21, v22
	s_xor_b32 s29, exec_lo, s29
	s_cbranch_execz .LBB1_18
; %bb.15:                               ; %.preheader.i.i.i.i.preheader
                                        ;   in Loop: Header=BB1_6 Depth=2
	s_mov_b32 s30, 0
.LBB1_16:                               ; %.preheader.i.i.i.i
                                        ;   Parent Loop BB1_2 Depth=1
                                        ;     Parent Loop BB1_6 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_sleep 1
	global_load_b32 v19, v14, s[8:9] offset:32 glc
	s_waitcnt vmcnt(0)
	v_xor_b32_e32 v19, v19, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_lt_u32_e32 vcc_lo, 0xffff, v19
	s_or_b32 s30, vcc_lo, s30
	s_and_not1_b32 exec_lo, exec_lo, s30
	s_cbranch_execnz .LBB1_16
; %bb.17:                               ; %Flow156
                                        ;   in Loop: Header=BB1_6 Depth=2
	s_or_b32 exec_lo, exec_lo, s30
                                        ; implicit-def: $vgpr19
.LBB1_18:                               ; %Flow158
                                        ;   in Loop: Header=BB1_6 Depth=2
	s_and_not1_saveexec_b32 s29, s29
	s_cbranch_execz .LBB1_21
; %bb.19:                               ;   in Loop: Header=BB1_6 Depth=2
	s_mov_b32 s29, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mbcnt_lo_u32_b32 v20, s29, 0
	v_cmp_eq_u32_e32 vcc_lo, 0, v20
	s_and_b32 s30, exec_lo, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 exec_lo, s30
	s_cbranch_execz .LBB1_21
; %bb.20:                               ;   in Loop: Header=BB1_6 Depth=2
	v_sub_nc_u32_e32 v19, 0x10000, v19
	s_bcnt1_i32_b32 s29, s29
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mul_lo_u32 v19, v19, s29
	global_atomic_add_u32 v14, v19, s[8:9] offset:32
.LBB1_21:                               ; %Flow160
                                        ;   in Loop: Header=BB1_6 Depth=2
	s_or_b32 exec_lo, exec_lo, s3
	v_mad_u64_u32 v[19:20], null, s16, s18, v[1:2]
	v_mov_b32_e32 v20, v14
	s_lshl_b64 s[8:9], s[16:17], 2
	s_waitcnt_vscnt null, 0x0
	s_barrier
	s_add_u32 s8, s12, s8
	s_addc_u32 s9, s13, s9
	s_add_i32 s16, s16, 1
	v_lshlrev_b64 v[19:20], 2, v[19:20]
	global_load_b32 v21, v14, s[8:9]
	s_cmp_eq_u32 s16, s18
	v_add_co_u32 v19, vcc_lo, s10, v19
	v_add_co_ci_u32_e32 v20, vcc_lo, s11, v20, vcc_lo
	global_load_b32 v22, v14, s[22:23]
	global_load_b32 v19, v[19:20], off
	global_load_b32 v20, v[4:5], off
	s_waitcnt vmcnt(3)
	v_cvt_f32_i32_e32 v21, v21
	s_waitcnt vmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v21, v22, v21
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v20, v19, v21
	global_store_b32 v[4:5], v20, off
	s_cbranch_scc0 .LBB1_6
; %bb.22:                               ; %._crit_edge.loopexit
                                        ;   in Loop: Header=BB1_2 Depth=1
	global_load_b32 v19, v[2:3], off
.LBB1_23:                               ; %._crit_edge
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_sub_f32 v18, v19, v18 :: v_dual_mov_b32 v19, -1
	v_cmp_lt_f32_e32 vcc_lo, 0xb8d1b717, v18
	v_cmp_gt_f32_e64 s3, 0x38d1b717, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_and_b32 s3, vcc_lo, s3
	s_and_not1_b32 vcc_lo, exec_lo, s26
	v_cndmask_b32_e64 v18, 0, 1, s3
	v_and_b32_dpp v18, v18, v18 row_shl:1 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_dpp v18, v18, v18 row_shl:2 row_mask:0xf bank_mask:0xf
	v_and_b32_dpp v18, v18, v18 row_shl:4 row_mask:0xf bank_mask:0xf
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_dpp v18, v18, v18 row_shl:8 row_mask:0xf bank_mask:0xf
	v_mov_b32_dpp v19, v18 row_share:0 row_mask:0xf bank_mask:0xf
	v_mov_b32_e32 v18, -1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_permlanex16_b32 v18, v19, 0, 0
	v_and_b32_e32 v18, v18, v19
	s_cbranch_vccnz .LBB1_32
; %bb.24:                               ;   in Loop: Header=BB1_2 Depth=1
	s_mov_b32 s3, exec_lo
	v_cmpx_eq_u32_e32 0, v17
	s_cbranch_execz .LBB1_26
; %bb.25:                               ;   in Loop: Header=BB1_2 Depth=1
	ds_store_b32 v14, v18
.LBB1_26:                               ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	v_cmp_eq_u32_e32 vcc_lo, 0, v15
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_and_b32 s8, s2, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s8
	s_cbranch_execz .LBB1_31
; %bb.27:                               ;   in Loop: Header=BB1_2 Depth=1
	s_mov_b32 s9, exec_lo
	s_mov_b32 s8, -1
.LBB1_28:                               ; %ComputeLoop
                                        ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_ctz_i32_b32 s16, s9
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_readlane_b32 s29, v18, s16
	s_lshl_b32 s16, 1, s16
	s_and_not1_b32 s9, s9, s16
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s8, s8, s29
	s_cmp_lg_u32 s9, 0
	s_cbranch_scc1 .LBB1_28
; %bb.29:                               ; %ComputeEnd
                                        ;   in Loop: Header=BB1_2 Depth=1
	v_mbcnt_lo_u32_b32 v18, exec_lo, 0
	s_mov_b32 s9, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v18
	s_xor_b32 s9, exec_lo, s9
	s_cbranch_execz .LBB1_31
; %bb.30:                               ;   in Loop: Header=BB1_2 Depth=1
	v_mov_b32_e32 v18, s8
	ds_and_b32 v14, v18
.LBB1_31:                               ; %Flow154
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v18, v14
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB1_32:                               ; %_Z17__syncthreads_andi.exit
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_lt_i32_e32 vcc_lo, 0, v18
	s_and_b32 s8, s28, vcc_lo
	s_and_saveexec_b32 s3, s8
	s_cbranch_execz .LBB1_34
; %bb.33:                               ;   in Loop: Header=BB1_2 Depth=1
	global_store_b32 v14, v16, s[6:7]
.LBB1_34:                               ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt_vscnt null, 0x0
	buffer_gl1_inv
	buffer_gl0_inv
	s_barrier
	s_and_saveexec_b32 s3, s1
	s_cbranch_execz .LBB1_44
; %bb.35:                               ;   in Loop: Header=BB1_2 Depth=1
	s_load_b64 s[8:9], s[20:21], 0x58
	s_mov_b32 s16, exec_lo
	s_mov_b32 s29, exec_lo
	v_mbcnt_lo_u32_b32 v19, s16, 0
                                        ; implicit-def: $vgpr20
	s_waitcnt lgkmcnt(0)
	global_load_b32 v18, v14, s[8:9] offset:40
	v_cmpx_eq_u32_e32 0, v19
	s_cbranch_execz .LBB1_37
; %bb.36:                               ;   in Loop: Header=BB1_2 Depth=1
	s_bcnt1_i32_b32 s16, s16
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v20, s16
	global_atomic_add_u32 v20, v14, v20, s[8:9] offset:32 glc
.LBB1_37:                               ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s29
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s16, v20
	v_add_nc_u32_e32 v21, -1, v18
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v19, s16, v19
	s_mov_b32 s16, exec_lo
	v_and_b32_e32 v20, 0xffff, v19
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ne_u32_e64 v20, v21
	s_xor_b32 s16, exec_lo, s16
	s_cbranch_execz .LBB1_41
; %bb.38:                               ; %.preheader.i.i.i.i83.preheader
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_mov_b32 s29, 0
.LBB1_39:                               ; %.preheader.i.i.i.i83
                                        ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	global_load_b32 v18, v14, s[8:9] offset:32 glc
	s_waitcnt vmcnt(0)
	v_xor_b32_e32 v18, v18, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_lt_u32_e32 vcc_lo, 0xffff, v18
	s_or_b32 s29, vcc_lo, s29
	s_and_not1_b32 exec_lo, exec_lo, s29
	s_cbranch_execnz .LBB1_39
; %bb.40:                               ; %Flow148
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s29
                                        ; implicit-def: $vgpr18
.LBB1_41:                               ; %Flow150
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_and_not1_saveexec_b32 s16, s16
	s_cbranch_execz .LBB1_44
; %bb.42:                               ;   in Loop: Header=BB1_2 Depth=1
	s_mov_b32 s16, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mbcnt_lo_u32_b32 v19, s16, 0
	v_cmp_eq_u32_e32 vcc_lo, 0, v19
	s_and_b32 s29, exec_lo, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 exec_lo, s29
	s_cbranch_execz .LBB1_44
; %bb.43:                               ;   in Loop: Header=BB1_2 Depth=1
	v_sub_nc_u32_e32 v18, 0x10000, v18
	s_bcnt1_i32_b32 s16, s16
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mul_lo_u32 v18, v18, s16
	global_atomic_add_u32 v14, v18, s[8:9] offset:32
.LBB1_44:                               ; %Flow152
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	v_mov_b32_e32 v18, 0
	s_and_not1_b32 vcc_lo, exec_lo, s27
	s_waitcnt_vscnt null, 0x0
	s_barrier
	s_cbranch_vccnz .LBB1_47
; %bb.45:                               ; %.lr.ph91.preheader
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_mov_b64 s[8:9], s[14:15]
	s_mov_b32 s3, s24
.LBB1_46:                               ; %.lr.ph91
                                        ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_b32 v19, v14, s[8:9]
	s_add_i32 s3, s3, -1
	s_add_u32 s8, s8, 4
	s_addc_u32 s9, s9, 0
	s_cmp_eq_u32 s3, 0
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v18, v19, v18
	s_cbranch_scc0 .LBB1_46
.LBB1_47:                               ; %._crit_edge92
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_eq_u32_e32 vcc_lo, s24, v18
	s_add_i32 s25, s25, 1
	s_cbranch_vccz .LBB1_2
; %bb.48:
	v_cmp_eq_u32_e32 vcc_lo, 1, v1
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_50
; %bb.49:
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s25
	global_store_b32 v0, v1, s[4:5]
.LBB1_50:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel kernel_minibatch_g
		.amdhsa_group_segment_fixed_size 256
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 328
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 27
		.amdhsa_next_free_sgpr 31
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	kernel_minibatch_g, .Lfunc_end1-kernel_minibatch_g
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2004
; NumSgprs: 33
; NumVgprs: 27
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 256 bytes/workgroup (compile time only)
; SGPRBlocks: 4
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 33
; NumVGPRsForWavesPerEU: 27
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .offset:         40
        .size:           4
        .value_kind:     by_value
      - .offset:         44
        .size:           4
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 264
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z16kernel_minibatchPiPfS0_S0_S_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     22
    .sgpr_spill_count: 0
    .symbol:         _Z16kernel_minibatchPiPfS0_S0_S_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     28
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .offset:         48
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         56
        .size:           8
        .value_kind:     global_buffer
      - .offset:         64
        .size:           4
        .value_kind:     by_value
      - .offset:         68
        .size:           4
        .value_kind:     by_value
      - .offset:         72
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         76
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         80
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         84
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         86
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         88
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         90
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         92
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         94
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         112
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         120
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         128
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         136
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         160
        .size:           8
        .value_kind:     hidden_multigrid_sync_arg
    .group_segment_fixed_size: 256
    .kernarg_segment_align: 8
    .kernarg_segment_size: 328
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           kernel_minibatch_g
    .private_segment_fixed_size: 0
    .sgpr_count:     33
    .sgpr_spill_count: 0
    .symbol:         kernel_minibatch_g.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     27
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
