#include <stdio.h>

__global__ void vectorAdd(const float *a, const float *b, float *c, int numElements)
{
	int i = blockDim.x * blockIdx.x + threadIdx.x;
	if (i < numElements)
	{
		c[i] = a[i] + b[i];
	}
	for (const clock_t threshold = clock() + 1e+4; clock() < threshold;);
}

int main(int argc, char *argv[])
{
	int numElements = 3 << 22;

	// Allocate vectors a, b and c in host memory.
	size_t numBytes = sizeof(float) * numElements;
	float *h_a;
	float *h_b;
	float *h_c;
	cudaMallocHost((void **)&h_a, numBytes);
	cudaMallocHost((void **)&h_b, numBytes);
	cudaMallocHost((void **)&h_c, numBytes);

	// Initialize vectors a and b.
	for (int i = 0; i < numElements; ++i)
	{
		h_a[i] = rand() / (float)RAND_MAX;
		h_b[i] = rand() / (float)RAND_MAX;
	}

	// Get the number of CUDA devices.
	int numDevices;
	cudaGetDeviceCount(&numDevices);

	// Compute the average number of elements per device and the number of spare elements.
	int avgElementsPerDevice = numElements / numDevices;
	int sprElements = numElements - avgElementsPerDevice * numDevices;

	float **d_a = (float **)malloc(sizeof(float *) * numDevices);
	float **d_b = (float **)malloc(sizeof(float *) * numDevices);
	float **d_c = (float **)malloc(sizeof(float *) * numDevices);

	for (int i = 0, offset = 0; i < numDevices; ++i)
	{
		// Determine the number of elements to be processed by the current device.
		int numElementsCurrentDevice = avgElementsPerDevice + (i < sprElements);

		// Set device to be used for GPU executions.
		// highlight:
		cudaSetDevice(i);

		// Allocate vectors a, b and c in device memory.
		size_t numBytesCurrentDevice = sizeof(int) * numElementsCurrentDevice;
		cudaMalloc((void **)&d_a[i], numBytesCurrentDevice);
		cudaMalloc((void **)&d_b[i], numBytesCurrentDevice);
		cudaMalloc((void **)&d_c[i], numBytesCurrentDevice);

		// Copy vectors a and b from host memory to device memory asynchronously.
		cudaMemcpyAsync(d_a[i], h_a + offset, numBytesCurrentDevice, cudaMemcpyHostToDevice);
		cudaMemcpyAsync(d_b[i], h_b + offset, numBytesCurrentDevice, cudaMemcpyHostToDevice);

		// Determine the number of threads per block and the number of blocks per grid.
		unsigned int numThreadsPerBlock = 256;
		unsigned int numBlocksPerGrid = (numElementsCurrentDevice + numThreadsPerBlock - 1) / numThreadsPerBlock;

		// Invoke the kernel on device asynchronously.
		vectorAdd<<<numBlocksPerGrid, numThreadsPerBlock>>>(d_a[i], d_b[i], d_c[i], numElementsCurrentDevice);

		// Copy vector c from device memory to host memory asynchronously.
		cudaMemcpyAsync(h_c + offset, d_c[i], numBytesCurrentDevice, cudaMemcpyDeviceToHost);

		// Increase offset to point to the next portion of data.
		offset += numElementsCurrentDevice;
	}

	// Wait for the devices to finish.
	for (int i = 0; i < numDevices; ++i)
	{
		cudaSetDevice(i);
		cudaDeviceSynchronize();
	}

	// Validate the result.
	for (int i = 0; i < numElements; ++i)
	{
		float actual = h_c[i];
		float expected = h_a[i] + h_b[i];
		if (fabs(actual - expected) > 1e-7)
		{
			printf("h_c[%d] = %f, expected = %f\n", i, actual, expected);
			break;
		}
	}

	// Cleanup.
	for (int i = 0; i < numDevices; ++i)
	{
		cudaSetDevice(i);
		cudaFree(d_c[i]);
		cudaFree(d_b[i]);
		cudaFree(d_a[i]);
	}
	free(d_c);
	free(d_b);
	free(d_a);
	cudaFreeHost(h_c);
	cudaFreeHost(h_b);
	cudaFreeHost(h_a);
	for (int i = 0; i < numDevices; ++i)
	{
		cudaSetDevice(i);
		cudaDeviceReset();
	}
}

	.file	"tmpxft_003743a4_00000000-6_multiDevice.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z35__device_stub__Z9vectorAddPKfS0_PfiPKfS0_Pfi
	.type	_Z35__device_stub__Z9vectorAddPKfS0_PfiPKfS0_Pfi, @function
_Z35__device_stub__Z9vectorAddPKfS0_PfiPKfS0_Pfi:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z9vectorAddPKfS0_Pfi(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z35__device_stub__Z9vectorAddPKfS0_PfiPKfS0_Pfi, .-_Z35__device_stub__Z9vectorAddPKfS0_PfiPKfS0_Pfi
	.globl	_Z9vectorAddPKfS0_Pfi
	.type	_Z9vectorAddPKfS0_Pfi, @function
_Z9vectorAddPKfS0_Pfi:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z9vectorAddPKfS0_PfiPKfS0_Pfi
	.cfi_endproc
.LFE2053:
	.size	_Z9vectorAddPKfS0_Pfi, .-_Z9vectorAddPKfS0_Pfi
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC3:
	.string	"h_c[%d] = %f, expected = %f\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$50331648, %esi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	xorl	%ebx, %ebx
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rdi
	call	cudaMallocHost@PLT
	leaq	64(%rsp), %rdi
	movl	$50331648, %esi
	call	cudaMallocHost@PLT
	leaq	72(%rsp), %rdi
	movl	$50331648, %esi
	call	cudaMallocHost@PLT
.L9:
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC0(%rip), %xmm0
	movq	56(%rsp), %rax
	movss	%xmm0, (%rax,%rbx)
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC0(%rip), %xmm0
	movq	64(%rsp), %rax
	movss	%xmm0, (%rax,%rbx)
	addq	$4, %rbx
	cmpq	$50331648, %rbx
	jne	.L9
	leaq	52(%rsp), %rdi
	xorl	%r12d, %r12d
	call	cudaGetDeviceCount@PLT
	movslq	52(%rsp), %rbx
	movl	$12582912, %eax
	cltd
	idivl	%ebx
	salq	$3, %rbx
	movq	%rbx, %rdi
	movl	%edx, 44(%rsp)
	movl	%eax, 40(%rsp)
	call	malloc@PLT
	movq	%rbx, %rdi
	movq	%rax, 16(%rsp)
	call	malloc@PLT
	movq	%rbx, %rdi
	movq	%rax, 24(%rsp)
	call	malloc@PLT
	movq	24(%rsp), %r14
	movq	16(%rsp), %r13
	movq	%rax, %rbp
	movq	%rax, %r15
	xorl	%eax, %eax
	movl	%eax, 36(%rsp)
.L10:
	cmpl	%r12d, 52(%rsp)
	jle	.L29
	movl	40(%rsp), %ecx
	xorl	%eax, %eax
	cmpl	%r12d, 44(%rsp)
	movl	%r12d, %edi
	setg	%al
	addl	%ecx, %eax
	movl	%eax, 32(%rsp)
	call	cudaSetDevice@PLT
	movslq	32(%rsp), %rax
	movq	%r13, %rdi
	salq	$2, %rax
	movq	%rax, %rsi
	movq	%rax, 8(%rsp)
	call	cudaMalloc@PLT
	movq	8(%rsp), %rsi
	movq	%r14, %rdi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rsi
	movq	%r15, %rdi
	call	cudaMalloc@PLT
	movslq	36(%rsp), %rbx
	movq	0(%r13), %rdi
	xorl	%r8d, %r8d
	movq	56(%rsp), %rsi
	movq	8(%rsp), %rdx
	movl	$1, %ecx
	salq	$2, %rbx
	addq	%rbx, %rsi
	call	cudaMemcpyAsync@PLT
	movq	64(%rsp), %rsi
	movq	(%r14), %rdi
	xorl	%r8d, %r8d
	movq	8(%rsp), %rdx
	movl	$1, %ecx
	addq	%rbx, %rsi
	call	cudaMemcpyAsync@PLT
	movl	$16777217, %eax
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$8, %rax
	movl	$16777217, %edx
	movl	$1, %ecx
	movl	$1, 100(%rsp)
	movq	%rax, 92(%rsp)
	movl	32(%rsp), %eax
	salq	$8, %rdx
	addl	$255, %eax
	shrl	$8, %eax
	movl	%eax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 84(%rsp)
	movq	80(%rsp), %rdi
	movl	88(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L11
	movl	32(%rsp), %ecx
	movq	(%r15), %rdx
	movq	(%r14), %rsi
	movq	0(%r13), %rdi
	call	_Z35__device_stub__Z9vectorAddPKfS0_PfiPKfS0_Pfi
.L11:
	movq	(%r15), %rsi
	addq	72(%rsp), %rbx
	movl	$2, %ecx
	xorl	%r8d, %r8d
	movq	8(%rsp), %rdx
	movq	%rbx, %rdi
	incl	%r12d
	addq	$8, %r15
	addq	$8, %r14
	addq	$8, %r13
	call	cudaMemcpyAsync@PLT
	movl	32(%rsp), %ecx
	addl	%ecx, 36(%rsp)
	jmp	.L10
.L29:
	xorl	%ebx, %ebx
.L13:
	cmpl	%ebx, 52(%rsp)
	jle	.L30
	movl	%ebx, %edi
	incl	%ebx
	call	cudaSetDevice@PLT
	call	cudaDeviceSynchronize@PLT
	jmp	.L13
.L30:
	movq	72(%rsp), %rax
	movq	56(%rsp), %rcx
	xorl	%edx, %edx
	movss	.LC1(%rip), %xmm3
	movq	64(%rsp), %rsi
	movsd	.LC2(%rip), %xmm4
.L18:
	movss	(%rax,%rdx,4), %xmm0
	movss	(%rcx,%rdx,4), %xmm1
	addss	(%rsi,%rdx,4), %xmm1
	movaps	%xmm0, %xmm2
	subss	%xmm1, %xmm2
	andps	%xmm3, %xmm2
	cvtss2sd	%xmm2, %xmm2
	comisd	%xmm4, %xmm2
	jbe	.L27
	movl	$2, %edi
	movb	$2, %al
	cvtss2sd	%xmm0, %xmm0
	cvtss2sd	%xmm1, %xmm1
	leaq	.LC3(%rip), %rsi
	call	__printf_chk@PLT
.L19:
	xorl	%ebx, %ebx
	jmp	.L17
.L27:
	incq	%rdx
	cmpq	$12582912, %rdx
	jne	.L18
	jmp	.L19
.L17:
	movl	%ebx, %edi
	cmpl	%ebx, 52(%rsp)
	jle	.L31
	call	cudaSetDevice@PLT
	movq	0(%rbp,%rbx,8), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rax
	movq	(%rax,%rbx,8), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rax
	movq	(%rax,%rbx,8), %rdi
	incq	%rbx
	call	cudaFree@PLT
	jmp	.L17
.L31:
	movq	%rbp, %rdi
	xorl	%ebx, %ebx
	call	free@PLT
	movq	24(%rsp), %rdi
	call	free@PLT
	movq	16(%rsp), %rdi
	call	free@PLT
	movq	72(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	64(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	56(%rsp), %rdi
	call	cudaFreeHost@PLT
.L21:
	cmpl	%ebx, 52(%rsp)
	jle	.L32
	movl	%ebx, %edi
	incl	%ebx
	call	cudaSetDevice@PLT
	call	cudaDeviceReset@PLT
	jmp	.L21
.L32:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L23
	call	__stack_chk_fail@PLT
.L23:
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC4:
	.string	"_Z9vectorAddPKfS0_Pfi"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC4(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z9vectorAddPKfS0_Pfi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	805306368
	.section	.rodata.cst16,"aM",@progbits,16
	.align 16
.LC1:
	.long	2147483647
	.long	0
	.long	0
	.long	0
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC2:
	.long	-1698910392
	.long	1048238066
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>

__global__ void vectorAdd(const float *a, const float *b, float *c, int numElements)
{
	int i = blockDim.x * blockIdx.x + threadIdx.x;
	if (i < numElements)
	{
		c[i] = a[i] + b[i];
	}
	for (const clock_t threshold = clock() + 1e+4; clock() < threshold;);
}

int main(int argc, char *argv[])
{
	int numElements = 3 << 22;

	// Allocate vectors a, b and c in host memory.
	size_t numBytes = sizeof(float) * numElements;
	float *h_a;
	float *h_b;
	float *h_c;
	hipHostMalloc((void **)&h_a, numBytes, hipHostMallocDefault);
	hipHostMalloc((void **)&h_b, numBytes, hipHostMallocDefault);
	hipHostMalloc((void **)&h_c, numBytes, hipHostMallocDefault);

	// Initialize vectors a and b.
	for (int i = 0; i < numElements; ++i)
	{
		h_a[i] = rand() / (float)RAND_MAX;
		h_b[i] = rand() / (float)RAND_MAX;
	}

	// Get the number of CUDA devices.
	int numDevices;
	hipGetDeviceCount(&numDevices);

	// Compute the average number of elements per device and the number of spare elements.
	int avgElementsPerDevice = numElements / numDevices;
	int sprElements = numElements - avgElementsPerDevice * numDevices;

	float **d_a = (float **)malloc(sizeof(float *) * numDevices);
	float **d_b = (float **)malloc(sizeof(float *) * numDevices);
	float **d_c = (float **)malloc(sizeof(float *) * numDevices);

	for (int i = 0, offset = 0; i < numDevices; ++i)
	{
		// Determine the number of elements to be processed by the current device.
		int numElementsCurrentDevice = avgElementsPerDevice + (i < sprElements);

		// Set device to be used for GPU executions.
		// highlight:
		hipSetDevice(i);

		// Allocate vectors a, b and c in device memory.
		size_t numBytesCurrentDevice = sizeof(int) * numElementsCurrentDevice;
		hipMalloc((void **)&d_a[i], numBytesCurrentDevice);
		hipMalloc((void **)&d_b[i], numBytesCurrentDevice);
		hipMalloc((void **)&d_c[i], numBytesCurrentDevice);

		// Copy vectors a and b from host memory to device memory asynchronously.
		hipMemcpyAsync(d_a[i], h_a + offset, numBytesCurrentDevice, hipMemcpyHostToDevice);
		hipMemcpyAsync(d_b[i], h_b + offset, numBytesCurrentDevice, hipMemcpyHostToDevice);

		// Determine the number of threads per block and the number of blocks per grid.
		unsigned int numThreadsPerBlock = 256;
		unsigned int numBlocksPerGrid = (numElementsCurrentDevice + numThreadsPerBlock - 1) / numThreadsPerBlock;

		// Invoke the kernel on device asynchronously.
		vectorAdd<<<numBlocksPerGrid, numThreadsPerBlock>>>(d_a[i], d_b[i], d_c[i], numElementsCurrentDevice);

		// Copy vector c from device memory to host memory asynchronously.
		hipMemcpyAsync(h_c + offset, d_c[i], numBytesCurrentDevice, hipMemcpyDeviceToHost);

		// Increase offset to point to the next portion of data.
		offset += numElementsCurrentDevice;
	}

	// Wait for the devices to finish.
	for (int i = 0; i < numDevices; ++i)
	{
		hipSetDevice(i);
		hipDeviceSynchronize();
	}

	// Validate the result.
	for (int i = 0; i < numElements; ++i)
	{
		float actual = h_c[i];
		float expected = h_a[i] + h_b[i];
		if (fabs(actual - expected) > 1e-7)
		{
			printf("h_c[%d] = %f, expected = %f\n", i, actual, expected);
			break;
		}
	}

	// Cleanup.
	for (int i = 0; i < numDevices; ++i)
	{
		hipSetDevice(i);
		hipFree(d_c[i]);
		hipFree(d_b[i]);
		hipFree(d_a[i]);
	}
	free(d_c);
	free(d_b);
	free(d_a);
	hipHostFree(h_c);
	hipHostFree(h_b);
	hipHostFree(h_a);
	for (int i = 0; i < numDevices; ++i)
	{
		hipSetDevice(i);
		hipDeviceReset();
	}
}

	.text
	.file	"multiDevice.hip"
	.globl	_Z24__device_stub__vectorAddPKfS0_Pfi # -- Begin function _Z24__device_stub__vectorAddPKfS0_Pfi
	.type	_Z24__device_stub__vectorAddPKfS0_Pfi,@function
_Z24__device_stub__vectorAddPKfS0_Pfi:  # @_Z24__device_stub__vectorAddPKfS0_Pfi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9vectorAddPKfS0_Pfi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z24__device_stub__vectorAddPKfS0_Pfi, .Lfunc_end0-_Z24__device_stub__vectorAddPKfS0_Pfi
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI1_0:
	.long	0x30000000                      # float 4.65661287E-10
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0
.LCPI1_1:
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI1_2:
	.quad	0x3e7ad7f29abcaf48              # double 9.9999999999999995E-8
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	leaq	24(%rsp), %rdi
	xorl	%ebx, %ebx
	movl	$50331648, %esi                 # imm = 0x3000000
	xorl	%edx, %edx
	callq	hipHostMalloc
	leaq	16(%rsp), %rdi
	movl	$50331648, %esi                 # imm = 0x3000000
	xorl	%edx, %edx
	callq	hipHostMalloc
	leaq	40(%rsp), %rdi
	movl	$50331648, %esi                 # imm = 0x3000000
	xorl	%edx, %edx
	callq	hipHostMalloc
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	.LCPI1_0(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	mulss	%xmm1, %xmm0
	movq	24(%rsp), %rax
	movss	%xmm0, (%rax,%rbx,4)
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI1_0(%rip), %xmm0
	movq	16(%rsp), %rax
	movss	%xmm0, (%rax,%rbx,4)
	incq	%rbx
	cmpq	$12582912, %rbx                 # imm = 0xC00000
	jne	.LBB1_1
# %bb.2:
	leaq	12(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipGetDeviceCount
	movslq	(%rbx), %r15
	movl	$12582912, %eax                 # imm = 0xC00000
	xorl	%edx, %edx
	idivl	%r15d
                                        # kill: def $eax killed $eax def $rax
	movq	%rax, 72(%rsp)                  # 8-byte Spill
	movl	%edx, %ebx
	xorl	%r12d, %r12d
	leaq	(,%r15,8), %r14
	movq	%r14, %rdi
	callq	malloc
	movq	%rax, %r13
	movq	%r14, %rdi
	callq	malloc
	movq	%rax, %rbp
	movq	%r14, %rdi
	callq	malloc
	movq	%rax, %r14
	testq	%r15, %r15
	jle	.LBB1_10
# %bb.3:                                # %.lr.ph.preheader
	movq	%r14, 48(%rsp)                  # 8-byte Spill
	movq	%rbp, 56(%rsp)                  # 8-byte Spill
	movq	%r13, 64(%rsp)                  # 8-byte Spill
	movabsq	$4294967296, %rax               # imm = 0x100000000
	movslq	%ebx, %rcx
	movq	%rcx, 88(%rsp)                  # 8-byte Spill
	addq	$256, %rax                      # imm = 0x100
	movq	%rax, 80(%rsp)                  # 8-byte Spill
	xorl	%ebp, %ebp
	movq	56(%rsp), %r13                  # 8-byte Reload
.LBB1_4:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movq	%r12, 32(%rsp)                  # 8-byte Spill
	xorl	%r14d, %r14d
	cmpq	88(%rsp), %rbp                  # 8-byte Folded Reload
	setl	%r14b
	movq	72(%rsp), %rax                  # 8-byte Reload
	leal	(%rax,%r14), %r12d
	movl	%ebp, %edi
	callq	hipSetDevice
	leal	(,%r12,4), %r15d
	movq	64(%rsp), %rbx                  # 8-byte Reload
	leaq	(%rbx,%rbp,8), %rdi
	movq	%rdi, 104(%rsp)                 # 8-byte Spill
	movq	%r15, %rsi
	callq	hipMalloc
	leaq	(,%rbp,8), %rdi
	addq	%r13, %rdi
	movq	%rdi, 96(%rsp)                  # 8-byte Spill
	movq	%r15, %rsi
	callq	hipMalloc
	movq	48(%rsp), %rax                  # 8-byte Reload
	leaq	(%rax,%rbp,8), %rdi
	movq	%rdi, 112(%rsp)                 # 8-byte Spill
	movq	%r15, %rsi
	callq	hipMalloc
	movq	(%rbx,%rbp,8), %rdi
	movq	%r12, %rbx
	movl	32(%rsp), %eax                  # 4-byte Reload
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	leaq	(,%rax,4), %r12
	movq	24(%rsp), %rsi
	addq	%r12, %rsi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	hipMemcpyAsync
	movq	(%r13,%rbp,8), %rdi
	movq	16(%rsp), %rsi
	addq	%r12, %rsi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	callq	hipMemcpyAsync
	movq	72(%rsp), %rax                  # 8-byte Reload
	leal	(%rax,%r14), %edi
	addl	$255, %edi
	movq	112(%rsp), %r14                 # 8-byte Reload
	shrl	$8, %edi
	movabsq	$4294967296, %rax               # imm = 0x100000000
	orq	%rax, %rdi
	movl	$1, %esi
	movq	80(%rsp), %rdx                  # 8-byte Reload
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_6
# %bb.5:                                #   in Loop: Header=BB1_4 Depth=1
	movq	104(%rsp), %rax                 # 8-byte Reload
	movq	(%rax), %rdi
	movq	96(%rsp), %rax                  # 8-byte Reload
	movq	(%rax), %rsi
	movq	(%r14), %rdx
	movl	%ebx, %ecx
	callq	_Z24__device_stub__vectorAddPKfS0_Pfi
.LBB1_6:                                #   in Loop: Header=BB1_4 Depth=1
	addq	40(%rsp), %r12
	movq	(%r14), %rsi
	movq	%r12, %rdi
	movq	%r15, %rdx
	movl	$2, %ecx
	xorl	%r8d, %r8d
	callq	hipMemcpyAsync
	addl	32(%rsp), %ebx                  # 4-byte Folded Reload
	incq	%rbp
	movslq	12(%rsp), %r15
	movl	%ebx, %r12d
	cmpq	%r15, %rbp
	jl	.LBB1_4
# %bb.7:                                # %.preheader96
	testl	%r15d, %r15d
	movq	64(%rsp), %r13                  # 8-byte Reload
	movq	56(%rsp), %rbp                  # 8-byte Reload
	movq	48(%rsp), %r14                  # 8-byte Reload
	jle	.LBB1_10
# %bb.8:                                # %.lr.ph103.preheader
	xorl	%ebx, %ebx
.LBB1_9:                                # %.lr.ph103
                                        # =>This Inner Loop Header: Depth=1
	movl	%ebx, %edi
	callq	hipSetDevice
	callq	hipDeviceSynchronize
	incl	%ebx
	movl	12(%rsp), %r15d
	cmpl	%r15d, %ebx
	jl	.LBB1_9
.LBB1_10:                               # %.preheader
	movq	40(%rsp), %rax
	movq	24(%rsp), %rcx
	movq	16(%rsp), %rdx
	xorl	%esi, %esi
	movaps	.LCPI1_1(%rip), %xmm0           # xmm0 = [NaN,NaN,NaN,NaN]
	movsd	.LCPI1_2(%rip), %xmm1           # xmm1 = mem[0],zero
.LBB1_11:                               # =>This Inner Loop Header: Depth=1
	movss	(%rax,%rsi,4), %xmm2            # xmm2 = mem[0],zero,zero,zero
	movss	(%rcx,%rsi,4), %xmm3            # xmm3 = mem[0],zero,zero,zero
	addss	(%rdx,%rsi,4), %xmm3
	movaps	%xmm2, %xmm4
	subss	%xmm3, %xmm4
	andps	%xmm0, %xmm4
	cvtss2sd	%xmm4, %xmm4
	ucomisd	%xmm1, %xmm4
	ja	.LBB1_12
# %bb.13:                               # %.critedge
                                        #   in Loop: Header=BB1_11 Depth=1
	incq	%rsi
	cmpq	$12582912, %rsi                 # imm = 0xC00000
	jne	.LBB1_11
	jmp	.LBB1_14
.LBB1_12:
	xorps	%xmm0, %xmm0
	cvtss2sd	%xmm2, %xmm0
	xorps	%xmm1, %xmm1
	cvtss2sd	%xmm3, %xmm1
	movl	$.L.str, %edi
                                        # kill: def $esi killed $esi killed $rsi
	movb	$2, %al
	callq	printf
	movl	12(%rsp), %r15d
.LBB1_14:                               # %.loopexit
	testl	%r15d, %r15d
	jle	.LBB1_17
# %bb.15:                               # %.lr.ph106.preheader
	xorl	%ebx, %ebx
.LBB1_16:                               # %.lr.ph106
                                        # =>This Inner Loop Header: Depth=1
	movl	%ebx, %edi
	callq	hipSetDevice
	movq	(%r14,%rbx,8), %rdi
	callq	hipFree
	movq	(%rbp,%rbx,8), %rdi
	callq	hipFree
	movq	(%r13,%rbx,8), %rdi
	callq	hipFree
	incq	%rbx
	movslq	12(%rsp), %rax
	cmpq	%rax, %rbx
	jl	.LBB1_16
.LBB1_17:                               # %._crit_edge
	movq	%r14, %rdi
	callq	free
	movq	%rbp, %rdi
	callq	free
	movq	%r13, %rdi
	callq	free
	movq	40(%rsp), %rdi
	callq	hipHostFree
	movq	16(%rsp), %rdi
	callq	hipHostFree
	movq	24(%rsp), %rdi
	callq	hipHostFree
	cmpl	$0, 12(%rsp)
	jle	.LBB1_20
# %bb.18:                               # %.lr.ph109.preheader
	xorl	%ebx, %ebx
.LBB1_19:                               # %.lr.ph109
                                        # =>This Inner Loop Header: Depth=1
	movl	%ebx, %edi
	callq	hipSetDevice
	callq	hipDeviceReset
	incl	%ebx
	cmpl	12(%rsp), %ebx
	jl	.LBB1_19
.LBB1_20:                               # %._crit_edge110
	xorl	%eax, %eax
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9vectorAddPKfS0_Pfi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z9vectorAddPKfS0_Pfi,@object   # @_Z9vectorAddPKfS0_Pfi
	.section	.rodata,"a",@progbits
	.globl	_Z9vectorAddPKfS0_Pfi
	.p2align	3, 0x0
_Z9vectorAddPKfS0_Pfi:
	.quad	_Z24__device_stub__vectorAddPKfS0_Pfi
	.size	_Z9vectorAddPKfS0_Pfi, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"h_c[%d] = %f, expected = %f\n"
	.size	.L.str, 29

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z9vectorAddPKfS0_Pfi"
	.size	.L__unnamed_1, 22

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z24__device_stub__vectorAddPKfS0_Pfi
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z9vectorAddPKfS0_Pfi
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z9vectorAddPKfS0_Pfi   ; -- Begin function _Z9vectorAddPKfS0_Pfi
	.globl	_Z9vectorAddPKfS0_Pfi
	.p2align	8
	.type	_Z9vectorAddPKfS0_Pfi,@function
_Z9vectorAddPKfS0_Pfi:                  ; @_Z9vectorAddPKfS0_Pfi
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v2, v2, v3
	global_store_b32 v[0:1], v2, off
.LBB0_2:
	s_or_b32 exec_lo, exec_lo, s2
	v_cvt_f64_i32_e32 v[0:1], 0
	s_getreg_b32 s0, hwreg(HW_REG_SHADER_CYCLES, 0, 20)
	s_mov_b32 s1, 0
	v_cvt_f64_u32_e32 v[2:3], s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[0:1], v[0:1], 32
	v_add_f64 v[0:1], v[0:1], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[0:1], 0x40c38800, v[0:1]
	v_trunc_f64_e32 v[0:1], v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[2:3], v[0:1], 0xffffffe0
	v_floor_f64_e32 v[2:3], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[0:1], 0xc1f00000, v[2:3], v[0:1]
	v_cvt_u32_f64_e32 v0, v[0:1]
	v_cvt_i32_f64_e32 v1, v[2:3]
.LBB0_3:                                ; =>This Inner Loop Header: Depth=1
	s_getreg_b32 s0, hwreg(HW_REG_SHADER_CYCLES, 0, 20)
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cmp_lt_i64_e32 vcc_lo, s[0:1], v[0:1]
	s_cbranch_vccnz .LBB0_3
; %bb.4:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9vectorAddPKfS0_Pfi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z9vectorAddPKfS0_Pfi, .Lfunc_end0-_Z9vectorAddPKfS0_Pfi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 300
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9vectorAddPKfS0_Pfi
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z9vectorAddPKfS0_Pfi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
