#include <stdio.h>
#include <stdlib.h>
#include <math.h>

__global__ 
void mult(int *d_a,int *d_b, int *d_c, int m)
{ 
    int row = blockIdx.y * blockDim.y + threadIdx.y; 
    int col = blockIdx.x * blockDim.x + threadIdx.x;
    int sum = 0;

    if( col < m && row < m) 
    {
        for(int i = 0; i < m; i++) 
        {
            sum += d_a[row * m + i] * d_b[i * m + col];
        }
        d_c[row * m + col] = sum;
    }
} 



int main(int argc, char* argv[]) {
	
	int m;
    printf("Ingresa el tamaño de la matrix cuadrada \n");
    scanf("%d", &m);
	 //int blockSize = 256;
	//int numBlocks = (N + blockSize - 1) / blockSize;
	
	// Allocate memory space on the device 
	  int *d_a, *d_b, *d_c;
	  // Allocate Unified Memory – accessible from CPU or GPU
	  cudaMallocManaged(&d_a, sizeof(int)*m*m);
	  cudaMallocManaged(&d_b, sizeof(int)*m*m); 
	  cudaMallocManaged(&d_c, sizeof(int)*m*m); 
		
	
	int i, j;
    //initialize matrix A
    for (i = 0; i < m; ++i) {
        for (j = 0; j < m; ++j) {
            d_a[i * m + j] = 1; 
        }
    }

    //initialize matrix B
    for (i = 0; i < m; ++i) {
        for (j = 0; j < m; ++j) {
            d_b[i * m + j] = 2; 
        }
    }

	
	int N = m;
	dim3 threadsPerBlock(N, N);
    dim3 blocksPerGrid(1, 1);
        if (N*N > 512){
            threadsPerBlock.x = 512;
            threadsPerBlock.y = 512;
            blocksPerGrid.x = ceil(double(N)/double(threadsPerBlock.x));
            blocksPerGrid.y = ceil(double(N)/double(threadsPerBlock.y));
        }

    mult<<<blocksPerGrid,threadsPerBlock>>>(d_a, d_b, d_c, m);

    
     // Wait for GPU to finish before accessing on host
	cudaDeviceSynchronize();	


	printf("\n Resultado \n");
	/* Check for errors (all values should be 3.0f) */ 
	int res = m*2;
	int maxError = 0;
    for (i = 0; i < m; ++i) {
        for (j = 0; j < m; ++j) {
			maxError = fmax(maxError, fabs( d_c[i * m + j]-res));
            printf("%d ", d_c[i * m + j] ); 
        }
		printf("\n");
    }
	
	  printf("Max error: %d \n", maxError);
	
	
	// free memory
    cudaFree(d_a);
    cudaFree(d_b);
    cudaFree(d_c);

	return 0;
}
	.file	"tmpxft_0027ade3_00000000-6_cuda1.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z28__device_stub__Z4multPiS_S_iPiS_S_i
	.type	_Z28__device_stub__Z4multPiS_S_iPiS_S_i, @function
_Z28__device_stub__Z4multPiS_S_iPiS_S_i:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z4multPiS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z28__device_stub__Z4multPiS_S_iPiS_S_i, .-_Z28__device_stub__Z4multPiS_S_iPiS_S_i
	.globl	_Z4multPiS_S_i
	.type	_Z4multPiS_S_i, @function
_Z4multPiS_S_i:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z28__device_stub__Z4multPiS_S_iPiS_S_i
	.cfi_endproc
.LFE2053:
	.size	_Z4multPiS_S_i, .-_Z4multPiS_S_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Ingresa el tama\303\261o de la matrix cuadrada \n"
.LC1:
	.string	"%d"
.LC3:
	.string	"\n Resultado \n"
.LC5:
	.string	"%d "
.LC6:
	.string	"\n"
.LC7:
	.string	"Max error: %d \n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	4(%rsp), %rsi
	leaq	.LC1(%rip), %rdi
	xorl	%eax, %eax
	call	__isoc23_scanf@PLT
	movslq	4(%rsp), %rsi
	leaq	8(%rsp), %rdi
	movl	$1, %edx
	imulq	%rsi, %rsi
	salq	$2, %rsi
	call	cudaMallocManaged@PLT
	movslq	4(%rsp), %rsi
	leaq	16(%rsp), %rdi
	movl	$1, %edx
	imulq	%rsi, %rsi
	salq	$2, %rsi
	call	cudaMallocManaged@PLT
	movslq	4(%rsp), %rsi
	movl	$1, %edx
	leaq	24(%rsp), %rdi
	imulq	%rsi, %rsi
	salq	$2, %rsi
	call	cudaMallocManaged@PLT
	movq	8(%rsp), %rsi
	xorl	%edx, %edx
.L9:
	cmpl	%edx, 4(%rsp)
	jle	.L26
	xorl	%ecx, %ecx
.L11:
	movl	4(%rsp), %eax
	cmpl	%ecx, %eax
	jle	.L27
	imull	%edx, %eax
	addl	%ecx, %eax
	incl	%ecx
	cltq
	movl	$1, (%rsi,%rax,4)
	jmp	.L11
.L27:
	incl	%edx
	jmp	.L9
.L26:
	movq	16(%rsp), %rsi
	xorl	%edx, %edx
.L12:
	movl	4(%rsp), %eax
	cmpl	%edx, %eax
	jle	.L28
	xorl	%ecx, %ecx
.L14:
	movl	4(%rsp), %eax
	cmpl	%ecx, %eax
	jle	.L29
	imull	%edx, %eax
	addl	%ecx, %eax
	incl	%ecx
	cltq
	movl	$2, (%rsi,%rax,4)
	jmp	.L14
.L29:
	incl	%edx
	jmp	.L12
.L28:
	movl	%eax, %edx
	movl	$1, 40(%rsp)
	movabsq	$4294967297, %rbx
	imull	%eax, %edx
	movq	%rbx, 44(%rsp)
	movl	$1, 52(%rsp)
	cmpl	$512, %edx
	jle	.L16
	cvtsi2sdl	%eax, %xmm0
	mulsd	.LC2(%rip), %xmm0
	call	ceil@PLT
	cvttsd2siq	%xmm0, %rax
	movl	%eax, 44(%rsp)
	movl	%eax, 48(%rsp)
	movl	$512, %eax
.L16:
	movl	%eax, 32(%rsp)
	movl	40(%rsp), %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	44(%rsp), %rdi
	movl	52(%rsp), %esi
	movl	%eax, 36(%rsp)
	movq	32(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L17
	movl	4(%rsp), %ecx
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	call	_Z28__device_stub__Z4multPiS_S_iPiS_S_i
.L17:
	call	cudaDeviceSynchronize@PLT
	leaq	.LC3(%rip), %rsi
	xorl	%eax, %eax
	xorl	%ebx, %ebx
	movl	$2, %edi
	xorl	%r12d, %r12d
	call	__printf_chk@PLT
	movl	4(%rsp), %eax
	leal	(%rax,%rax), %ebp
.L18:
	cmpl	%r12d, 4(%rsp)
	jle	.L30
	xorl	%r13d, %r13d
.L20:
	movl	4(%rsp), %eax
	cmpl	%r13d, %eax
	jle	.L31
	imull	%r12d, %eax
	movq	24(%rsp), %rdx
	cvtsi2sdl	%ebx, %xmm1
	addl	%r13d, %eax
	incl	%r13d
	cltq
	movl	(%rdx,%rax,4), %r14d
	movl	%r14d, %eax
	subl	%ebp, %eax
	cvtsi2sdl	%eax, %xmm0
	andps	.LC4(%rip), %xmm0
	call	fmax@PLT
	movl	%r14d, %edx
	movl	$2, %edi
	xorl	%eax, %eax
	cvttsd2sil	%xmm0, %ebx
	leaq	.LC5(%rip), %rsi
	call	__printf_chk@PLT
	jmp	.L20
.L31:
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incl	%r12d
	call	__printf_chk@PLT
	jmp	.L18
.L30:
	movl	%ebx, %edx
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L21
	call	__stack_chk_fail@PLT
.L21:
	addq	$64, %rsp
	.cfi_def_cfa_offset 48
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC8:
	.string	"_Z4multPiS_S_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC8(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z4multPiS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC2:
	.long	0
	.long	1063256064
	.section	.rodata.cst16,"aM",@progbits,16
	.align 16
.LC4:
	.long	-1
	.long	2147483647
	.long	0
	.long	0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <math.h>

__global__ 
void mult(int *d_a,int *d_b, int *d_c, int m)
{ 
    int row = blockIdx.y * blockDim.y + threadIdx.y; 
    int col = blockIdx.x * blockDim.x + threadIdx.x;
    int sum = 0;

    if( col < m && row < m) 
    {
        for(int i = 0; i < m; i++) 
        {
            sum += d_a[row * m + i] * d_b[i * m + col];
        }
        d_c[row * m + col] = sum;
    }
} 



int main(int argc, char* argv[]) {
	
	int m;
    printf("Ingresa el tamaño de la matrix cuadrada \n");
    scanf("%d", &m);
	 //int blockSize = 256;
	//int numBlocks = (N + blockSize - 1) / blockSize;
	
	// Allocate memory space on the device 
	  int *d_a, *d_b, *d_c;
	  // Allocate Unified Memory – accessible from CPU or GPU
	  hipMallocManaged(&d_a, sizeof(int)*m*m);
	  hipMallocManaged(&d_b, sizeof(int)*m*m); 
	  hipMallocManaged(&d_c, sizeof(int)*m*m); 
		
	
	int i, j;
    //initialize matrix A
    for (i = 0; i < m; ++i) {
        for (j = 0; j < m; ++j) {
            d_a[i * m + j] = 1; 
        }
    }

    //initialize matrix B
    for (i = 0; i < m; ++i) {
        for (j = 0; j < m; ++j) {
            d_b[i * m + j] = 2; 
        }
    }

	
	int N = m;
	dim3 threadsPerBlock(N, N);
    dim3 blocksPerGrid(1, 1);
        if (N*N > 512){
            threadsPerBlock.x = 512;
            threadsPerBlock.y = 512;
            blocksPerGrid.x = ceil(double(N)/double(threadsPerBlock.x));
            blocksPerGrid.y = ceil(double(N)/double(threadsPerBlock.y));
        }

    mult<<<blocksPerGrid,threadsPerBlock>>>(d_a, d_b, d_c, m);

    
     // Wait for GPU to finish before accessing on host
	hipDeviceSynchronize();	


	printf("\n Resultado \n");
	/* Check for errors (all values should be 3.0f) */ 
	int res = m*2;
	int maxError = 0;
    for (i = 0; i < m; ++i) {
        for (j = 0; j < m; ++j) {
			maxError = fmax(maxError, fabs( d_c[i * m + j]-res));
            printf("%d ", d_c[i * m + j] ); 
        }
		printf("\n");
    }
	
	  printf("Max error: %d \n", maxError);
	
	
	// free memory
    hipFree(d_a);
    hipFree(d_b);
    hipFree(d_c);

	return 0;
}
	.text
	.file	"cuda1.hip"
	.globl	_Z19__device_stub__multPiS_S_i  # -- Begin function _Z19__device_stub__multPiS_S_i
	.type	_Z19__device_stub__multPiS_S_i,@function
_Z19__device_stub__multPiS_S_i:         # @_Z19__device_stub__multPiS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z4multPiS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z19__device_stub__multPiS_S_i, .Lfunc_end0-_Z19__device_stub__multPiS_S_i
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI1_0:
	.quad	0x3f60000000000000              # double 0.001953125
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0
.LCPI1_1:
	.quad	0x7fffffffffffffff              # double NaN
	.quad	0x7fffffffffffffff              # double NaN
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$.Lstr, %edi
	callq	puts@PLT
	xorl	%r14d, %r14d
	leaq	12(%rsp), %rbx
	movl	$.L.str.1, %edi
	movq	%rbx, %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	movslq	(%rbx), %rsi
	imulq	%rsi, %rsi
	shlq	$2, %rsi
	leaq	32(%rsp), %rdi
	movl	$1, %edx
	callq	hipMallocManaged
	movslq	(%rbx), %rsi
	imulq	%rsi, %rsi
	shlq	$2, %rsi
	leaq	24(%rsp), %rdi
	movl	$1, %edx
	callq	hipMallocManaged
	movslq	(%rbx), %rsi
	imulq	%rsi, %rsi
	shlq	$2, %rsi
	leaq	16(%rsp), %rdi
	movl	$1, %edx
	callq	hipMallocManaged
	movl	(%rbx), %eax
	testl	%eax, %eax
	jle	.LBB1_12
# %bb.1:                                # %.preheader61.lr.ph
	movq	32(%rsp), %rcx
.LBB1_2:                                # %.preheader61
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_4 Depth 2
	testl	%eax, %eax
	jle	.LBB1_5
# %bb.3:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB1_2 Depth=1
	xorl	%edx, %edx
.LBB1_4:                                # %.lr.ph
                                        #   Parent Loop BB1_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	imull	%r14d, %eax
	cltq
	addq	%rdx, %rax
	movl	$1, (%rcx,%rax,4)
	movl	12(%rsp), %eax
	incq	%rdx
	cmpl	%eax, %edx
	jl	.LBB1_4
.LBB1_5:                                # %._crit_edge
                                        #   in Loop: Header=BB1_2 Depth=1
	incl	%r14d
	cmpl	%eax, %r14d
	jl	.LBB1_2
# %bb.6:                                # %.preheader60
	testl	%eax, %eax
	jle	.LBB1_12
# %bb.7:                                # %.preheader59.lr.ph
	xorl	%ecx, %ecx
	movq	24(%rsp), %rdx
.LBB1_8:                                # %.preheader59
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_10 Depth 2
	testl	%eax, %eax
	jle	.LBB1_11
# %bb.9:                                # %.lr.ph65.preheader
                                        #   in Loop: Header=BB1_8 Depth=1
	xorl	%esi, %esi
.LBB1_10:                               # %.lr.ph65
                                        #   Parent Loop BB1_8 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	imull	%ecx, %eax
	cltq
	addq	%rsi, %rax
	movl	$2, (%rdx,%rax,4)
	movl	12(%rsp), %eax
	incq	%rsi
	cmpl	%eax, %esi
	jl	.LBB1_10
.LBB1_11:                               # %._crit_edge66
                                        #   in Loop: Header=BB1_8 Depth=1
	incl	%ecx
	cmpl	%eax, %ecx
	jl	.LBB1_8
.LBB1_12:                               # %._crit_edge68
	movabsq	$4294967297, %r14               # imm = 0x100000001
	movl	%eax, %ecx
	imull	%eax, %ecx
	cmpl	$513, %ecx                      # imm = 0x201
	jb	.LBB1_13
# %bb.14:
	cvtsi2sd	%eax, %xmm0
	mulsd	.LCPI1_0(%rip), %xmm0
	callq	ceil@PLT
	cvttsd2si	%xmm0, %rax
	movl	%eax, %eax
	imulq	%rax, %r14
	movabsq	$2199023256064, %rdx            # imm = 0x20000000200
	jmp	.LBB1_15
.LBB1_13:
	movl	%eax, %eax
	movq	%rax, %rdx
	shlq	$32, %rdx
	orq	%rax, %rdx
.LBB1_15:
	xorl	%ebx, %ebx
	movq	%r14, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_17
# %bb.16:
	movq	32(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdx
	movl	12(%rsp), %ecx
	callq	_Z19__device_stub__multPiS_S_i
.LBB1_17:
	callq	hipDeviceSynchronize
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	movl	12(%rsp), %eax
	testl	%eax, %eax
	jle	.LBB1_23
# %bb.18:                               # %.preheader.preheader
	leal	(%rax,%rax), %ebp
	xorl	%ebx, %ebx
	xorl	%r14d, %r14d
.LBB1_19:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_21 Depth 2
	testl	%eax, %eax
	jle	.LBB1_22
# %bb.20:                               # %.lr.ph71.preheader
                                        #   in Loop: Header=BB1_19 Depth=1
	xorl	%r15d, %r15d
.LBB1_21:                               # %.lr.ph71
                                        #   Parent Loop BB1_19 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	16(%rsp), %rcx
	imull	%r14d, %eax
	cltq
	addq	%r15, %rax
	movl	(%rcx,%rax,4), %esi
	movl	%esi, %eax
	subl	%ebp, %eax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%eax, %xmm0
	xorps	%xmm1, %xmm1
	cvtsi2sd	%ebx, %xmm1
	andpd	.LCPI1_1(%rip), %xmm0
	maxsd	%xmm0, %xmm1
	cvttsd2si	%xmm1, %ebx
	movl	$.L.str.3, %edi
	xorl	%eax, %eax
	callq	printf
	movl	12(%rsp), %eax
	incq	%r15
	cmpl	%eax, %r15d
	jl	.LBB1_21
.LBB1_22:                               # %._crit_edge72
                                        #   in Loop: Header=BB1_19 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incl	%r14d
	movl	12(%rsp), %eax
	cmpl	%eax, %r14d
	jl	.LBB1_19
.LBB1_23:                               # %._crit_edge76
	movl	$.L.str.5, %edi
	movl	%ebx, %esi
	xorl	%eax, %eax
	callq	printf
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z4multPiS_S_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z4multPiS_S_i,@object          # @_Z4multPiS_S_i
	.section	.rodata,"a",@progbits
	.globl	_Z4multPiS_S_i
	.p2align	3, 0x0
_Z4multPiS_S_i:
	.quad	_Z19__device_stub__multPiS_S_i
	.size	_Z4multPiS_S_i, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"%d"
	.size	.L.str.1, 3

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"%d "
	.size	.L.str.3, 4

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Max error: %d \n"
	.size	.L.str.5, 16

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z4multPiS_S_i"
	.size	.L__unnamed_1, 15

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Ingresa el tama\303\261o de la matrix cuadrada "
	.size	.Lstr, 42

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"\n Resultado "
	.size	.Lstr.1, 13

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z19__device_stub__multPiS_S_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z4multPiS_S_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z4multPiS_S_i          ; -- Begin function _Z4multPiS_S_i
	.globl	_Z4multPiS_S_i
	.p2align	8
	.type	_Z4multPiS_S_i,@function
_Z4multPiS_S_i:                         ; @_Z4multPiS_S_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s3, s[0:1], 0x2c
	s_load_b32 s2, s[0:1], 0x18
	v_bfe_u32 v1, v0, 10, 10
	v_and_b32_e32 v4, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s4, s3, 16
	s_and_b32 s3, s3, 0xffff
	v_mad_u64_u32 v[2:3], null, s15, s4, v[1:2]
	v_mad_u64_u32 v[0:1], null, s14, s3, v[4:5]
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_i32_e32 v1, v2, v0
	v_cmpx_gt_i32_e64 s2, v1
	s_cbranch_execz .LBB0_6
; %bb.1:                                ; %.preheader
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	v_mul_lo_u32 v1, v2, s2
	s_cmp_lt_i32 s2, 1
	s_cbranch_scc1 .LBB0_4
; %bb.2:                                ; %.lr.ph.preheader
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s3, s2
	v_mov_b32_e32 v5, v0
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	v_mov_b32_e32 v2, 0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v3, vcc_lo, s4, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
.LBB0_3:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_ashrrev_i32_e32 v6, 31, v5
	s_add_i32 s3, s3, -1
	s_cmp_eq_u32 s3, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 2, v[5:6]
	v_add_co_u32 v6, vcc_lo, s6, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v7, vcc_lo
	global_load_b32 v8, v[3:4], off
	global_load_b32 v9, v[6:7], off
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[6:7], null, v9, v8, v[2:3]
	v_add_co_u32 v3, vcc_lo, v3, 4
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_dual_mov_b32 v2, v6 :: v_dual_add_nc_u32 v5, s2, v5
	s_cbranch_scc0 .LBB0_3
	s_branch .LBB0_5
.LBB0_4:
	v_mov_b32_e32 v2, 0
.LBB0_5:                                ; %Flow46
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v1, v0
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB0_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z4multPiS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z4multPiS_S_i, .Lfunc_end0-_Z4multPiS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 348
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z4multPiS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z4multPiS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
