#include <cuda.h>
#include <cuda_runtime.h>
#include <fstream>
#include <iostream>
#include "cuda_kernel.cuh"

__global__ void raw2gray_kernal(int width, int height, unsigned char *gpu_bayer,
                                unsigned char *gpu_gray) {
  int index_x = blockIdx.x * blockDim.x + threadIdx.x;
  int index_y = blockIdx.y * blockDim.y + threadIdx.y;

  // G B
  // R G
  float pixel =
      0.7152f * 0.5 *
          (gpu_bayer[2 * index_x + 2 * index_y * (2 * width)] +
           gpu_bayer[2 * index_x + 1 + (2 * index_y + 1) * (2 * width)]) +
      0.2126f * gpu_bayer[2 * index_x + 1 + 2 * index_y * (2 * width)] +
      0.0722f * gpu_bayer[2 * index_x + (2 * index_y + 1) * (2 * width)];

  gpu_gray[index_x + index_y * width] = (unsigned char)pixel;
}

bool cuda_raw2gray(int width, int height, unsigned char *img,
                   unsigned char *res) {
  int BLOCK_SIZE = 24;
  dim3 grid(1);
  dim3 block(BLOCK_SIZE, BLOCK_SIZE);

  grid = dim3(((width + (BLOCK_SIZE - 1)) / BLOCK_SIZE),
              ((height + (BLOCK_SIZE - 1)) / BLOCK_SIZE));

  unsigned char *d_img, *d_res;

  cudaMalloc(&d_img, 4 * width * height * sizeof(unsigned char));

  cudaMalloc(&d_res, width * height * sizeof(unsigned char));

  cudaMemcpy(d_img, img, 4 * width * height * sizeof(unsigned char),
             cudaMemcpyHostToDevice);

  raw2gray_kernal<<<grid, block>>>(width, height, d_img, d_res);

  cudaMemcpy(res, d_res, width * height * sizeof(unsigned char),
             cudaMemcpyDeviceToHost);

  cudaFree(d_img);
  cudaFree(d_res);

  cudaError_t cudaStatus = cudaGetLastError();
  if (cudaStatus != cudaSuccess) {
    fprintf(stderr, "raw2gray_kernal failed: %s\n",
            cudaGetErrorString(cudaStatus));
    return false;
  }

  return true;
}

// init cuda enviroment.
int32_t cuda_init(void) {
  int32_t count;
  cudaGetDeviceCount(&count);
  if (count == 0) {
    fprintf(stderr, "There is no device.\n");
    return 0;
  }

  std::cout
      << "-------------------------- GPU dev info --------------------------"
      << std::endl;

  int32_t i;
  for (i = 0; i < count; i++) {
    cudaDeviceProp prop;
    if (cudaGetDeviceProperties(&prop, i) == cudaSuccess) {
      if (prop.major >= 1) {
        printf("Identify: %s\n", prop.name);
        printf("Host Memory: %d\n", (int32_t)prop.canMapHostMemory);
        printf("Clock Rate: %d khz\n", (int32_t)prop.clockRate);
        printf("Compute Mode: %d\n", (int32_t)prop.computeMode);
        printf("Device Overlap: %d\n", (int32_t)prop.deviceOverlap);
        printf("Integrated: %d\n", (int32_t)prop.integrated);
        printf("Kernel Exec Timeout Enabled: %d\n",
               (int32_t)prop.kernelExecTimeoutEnabled);
        printf("Max Grid Size: %d * %d * %d\n", (int32_t)prop.maxGridSize[0],
               (int32_t)prop.maxGridSize[1], (int32_t)prop.maxGridSize[2]);
        printf("Max Threads Dim: %d * %d * %d\n",
               (int32_t)prop.maxThreadsDim[0], (int32_t)prop.maxThreadsDim[1],
               (int32_t)prop.maxThreadsDim[2]);
        printf("Max Threads per Block: %d\n", (int32_t)prop.maxThreadsPerBlock);
        printf("Maximum Pitch: %d bytes\n", (int32_t)prop.memPitch);
        printf("Minor Compute Capability: %d\n", (int32_t)prop.minor);
        printf("Number of Multiprocessors: %d\n",
               (int32_t)prop.multiProcessorCount);
        printf("32bit Registers Availble per Block: %d\n",
               (int32_t)prop.regsPerBlock);
        printf("Shared Memory Available per Block: %d bytes\n",
               (int32_t)prop.sharedMemPerBlock);
        printf("Alignment Requirement for Textures: %d\n",
               (int32_t)prop.textureAlignment);
        printf("Constant Memory Available: %d bytes\n",
               (int32_t)prop.totalConstMem);
        printf("Global Memory Available: %d bytes\n",
               (int32_t)prop.totalGlobalMem);
        printf("Warp Size: %d threads\n", (int32_t)prop.warpSize);
        break;
      }
    }
  }

  if (i == count) {
    fprintf(stderr, "There is no device supporting CUDA.\n");
    return 0;
  }

  cudaSetDevice(i);

  return 1;
}

	.file	"tmpxft_0030f2e4_00000000-6_cuda_kernel.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3770:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3770:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"There is no device.\n"
.LC1:
	.string	"-------------------------- GPU dev info --------------------------"
.LC2:
	.string	"Identify: %s\n"
.LC3:
	.string	"Host Memory: %d\n"
.LC4:
	.string	"Clock Rate: %d khz\n"
.LC5:
	.string	"Compute Mode: %d\n"
.LC6:
	.string	"Device Overlap: %d\n"
.LC7:
	.string	"Integrated: %d\n"
.LC8:
	.string	"Kernel Exec Timeout Enabled: %d\n"
.LC9:
	.string	"Max Grid Size: %d * %d * %d\n"
.LC10:
	.string	"Max Threads Dim: %d * %d * %d\n"
.LC11:
	.string	"Max Threads per Block: %d\n"
.LC12:
	.string	"Maximum Pitch: %d bytes\n"
.LC13:
	.string	"Minor Compute Capability: %d\n"
.LC14:
	.string	"Number of Multiprocessors: %d\n"
.LC15:
	.string	"32bit Registers Availble per Block: %d\n"
.LC16:
	.string	"Shared Memory Available per Block: %d bytes\n"
.LC17:
	.string	"Alignment Requirement for Textures: %d\n"
.LC18:
	.string	"Constant Memory Available: %d bytes\n"
.LC19:
	.string	"Global Memory Available: %d bytes\n"
.LC20:
	.string	"Warp Size: %d threads\n"
.LC21:
	.string	"There is no device supporting CUDA.\n"
	.text
	.globl	_Z9cuda_initv
	.type	_Z9cuda_initv, @function
_Z9cuda_initv:
.LFB3767:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	subq	$1064, %rsp
	.cfi_def_cfa_offset 1088
	movq	%fs:40, %rax
	movq	%rax, 1048(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rdi
	call	cudaGetDeviceCount@PLT
	cmpl	$0, 12(%rsp)
	leaq	.LC0(%rip), %rdx
	je	.L13
	leaq	.LC1(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	xorl	%ebx, %ebx
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	16(%rsp), %rbp
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
.L5:
	cmpl	%ebx, 12(%rsp)
	jle	.L7
	movl	%ebx, %esi
	movq	%rbp, %rdi
	call	cudaGetDeviceProperties_v2@PLT
	testl	%eax, %eax
	jne	.L6
	cmpl	$0, 376(%rsp)
	jle	.L6
	movq	%rbp, %rdx
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	416(%rsp), %edx
	leaq	.LC3(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	364(%rsp), %edx
	leaq	.LC4(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	420(%rsp), %edx
	leaq	.LC5(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	400(%rsp), %edx
	leaq	.LC6(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	412(%rsp), %edx
	leaq	.LC7(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	408(%rsp), %edx
	leaq	.LC8(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	360(%rsp), %r8d
	xorl	%eax, %eax
	movl	356(%rsp), %ecx
	movl	352(%rsp), %edx
	leaq	.LC9(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	348(%rsp), %r8d
	xorl	%eax, %eax
	movl	344(%rsp), %ecx
	movl	340(%rsp), %edx
	leaq	.LC10(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	336(%rsp), %edx
	leaq	.LC11(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	328(%rsp), %edx
	leaq	.LC12(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	380(%rsp), %edx
	leaq	.LC13(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	404(%rsp), %edx
	leaq	.LC14(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	320(%rsp), %edx
	leaq	.LC15(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	312(%rsp), %edx
	leaq	.LC16(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	384(%rsp), %edx
	leaq	.LC17(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	368(%rsp), %edx
	leaq	.LC18(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	304(%rsp), %edx
	leaq	.LC19(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	324(%rsp), %edx
	leaq	.LC20(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	jmp	.L7
.L6:
	incl	%ebx
	jmp	.L5
.L7:
	cmpl	%ebx, 12(%rsp)
	jne	.L9
	leaq	.LC21(%rip), %rdx
.L13:
	movq	stderr(%rip), %rdi
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	xorl	%eax, %eax
	jmp	.L2
.L9:
	movl	%ebx, %edi
	call	cudaSetDevice@PLT
	movl	$1, %eax
.L2:
	movq	1048(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L11
	call	__stack_chk_fail@PLT
.L11:
	addq	$1064, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3767:
	.size	_Z9cuda_initv, .-_Z9cuda_initv
	.globl	_Z39__device_stub__Z15raw2gray_kernaliiPhS_iiPhS_
	.type	_Z39__device_stub__Z15raw2gray_kernaliiPhS_iiPhS_, @function
_Z39__device_stub__Z15raw2gray_kernaliiPhS_iiPhS_:
.LFB3792:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movl	%edi, 28(%rsp)
	leaq	56(%rsp), %rdi
	movl	%esi, 24(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 16(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z15raw2gray_kernaliiPhS_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L15:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L17
	call	__stack_chk_fail@PLT
.L17:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3792:
	.size	_Z39__device_stub__Z15raw2gray_kernaliiPhS_iiPhS_, .-_Z39__device_stub__Z15raw2gray_kernaliiPhS_iiPhS_
	.globl	_Z15raw2gray_kernaliiPhS_
	.type	_Z15raw2gray_kernaliiPhS_, @function
_Z15raw2gray_kernaliiPhS_:
.LFB3793:
	.cfi_startproc
	endbr64
	jmp	_Z39__device_stub__Z15raw2gray_kernaliiPhS_iiPhS_
	.cfi_endproc
.LFE3793:
	.size	_Z15raw2gray_kernaliiPhS_, .-_Z15raw2gray_kernaliiPhS_
	.section	.rodata.str1.1
.LC22:
	.string	"raw2gray_kernal failed: %s\n"
	.text
	.globl	_Z13cuda_raw2grayiiPhS_
	.type	_Z13cuda_raw2grayiiPhS_, @function
_Z13cuda_raw2grayiiPhS_:
.LFB3766:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rdx, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rcx, %r14
	movl	$24, %ecx
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%esi, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%edi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%esi, %ebx
	imull	%edi, %ebx
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	leal	0(,%rbx,4), %r13d
	movslq	%ebx, %rbx
	movabsq	$103079215128, %rax
	movq	%rax, 28(%rsp)
	leal	23(%rdi), %eax
	movslq	%r13d, %r13
	movq	%rsp, %rdi
	cltd
	movl	$1, 24(%rsp)
	idivl	%ecx
	movl	$1, 36(%rsp)
	movl	%eax, 16(%rsp)
	leal	23(%rsi), %eax
	movq	%r13, %rsi
	cltd
	idivl	%ecx
	movl	%eax, 20(%rsp)
	call	cudaMalloc@PLT
	leaq	8(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	movq	(%rsp), %rdi
	movq	%r13, %rdx
	movq	%r15, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	36(%rsp), %ecx
	movl	24(%rsp), %esi
	xorl	%r9d, %r9d
	movq	28(%rsp), %rdx
	movq	16(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L21
	movq	8(%rsp), %rcx
	movq	(%rsp), %rdx
	movl	%r12d, %esi
	movl	%ebp, %edi
	call	_Z39__device_stub__Z15raw2gray_kernaliiPhS_iiPhS_
.L21:
	movq	8(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdx
	movq	%r14, %rdi
	call	cudaMemcpy@PLT
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	movb	$1, %al
	testl	%edi, %edi
	je	.L20
	call	cudaGetErrorString@PLT
	movq	stderr(%rip), %rdi
	movl	$2, %esi
	leaq	.LC22(%rip), %rdx
	movq	%rax, %rcx
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	xorl	%eax, %eax
.L20:
	movq	40(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L23
	call	__stack_chk_fail@PLT
.L23:
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3766:
	.size	_Z13cuda_raw2grayiiPhS_, .-_Z13cuda_raw2grayiiPhS_
	.section	.rodata.str1.1
.LC23:
	.string	"_Z15raw2gray_kernaliiPhS_"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3795:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC23(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z15raw2gray_kernaliiPhS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3795:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <hip/hip_runtime.h>

#include <fstream>
#include <iostream>
#include "cuda_kernel.cuh"

__global__ void raw2gray_kernal(int width, int height, unsigned char *gpu_bayer,
                                unsigned char *gpu_gray) {
  int index_x = blockIdx.x * blockDim.x + threadIdx.x;
  int index_y = blockIdx.y * blockDim.y + threadIdx.y;

  // G B
  // R G
  float pixel =
      0.7152f * 0.5 *
          (gpu_bayer[2 * index_x + 2 * index_y * (2 * width)] +
           gpu_bayer[2 * index_x + 1 + (2 * index_y + 1) * (2 * width)]) +
      0.2126f * gpu_bayer[2 * index_x + 1 + 2 * index_y * (2 * width)] +
      0.0722f * gpu_bayer[2 * index_x + (2 * index_y + 1) * (2 * width)];

  gpu_gray[index_x + index_y * width] = (unsigned char)pixel;
}

bool cuda_raw2gray(int width, int height, unsigned char *img,
                   unsigned char *res) {
  int BLOCK_SIZE = 24;
  dim3 grid(1);
  dim3 block(BLOCK_SIZE, BLOCK_SIZE);

  grid = dim3(((width + (BLOCK_SIZE - 1)) / BLOCK_SIZE),
              ((height + (BLOCK_SIZE - 1)) / BLOCK_SIZE));

  unsigned char *d_img, *d_res;

  hipMalloc(&d_img, 4 * width * height * sizeof(unsigned char));

  hipMalloc(&d_res, width * height * sizeof(unsigned char));

  hipMemcpy(d_img, img, 4 * width * height * sizeof(unsigned char),
             hipMemcpyHostToDevice);

  raw2gray_kernal<<<grid, block>>>(width, height, d_img, d_res);

  hipMemcpy(res, d_res, width * height * sizeof(unsigned char),
             hipMemcpyDeviceToHost);

  hipFree(d_img);
  hipFree(d_res);

  hipError_t cudaStatus = hipGetLastError();
  if (cudaStatus != hipSuccess) {
    fprintf(stderr, "raw2gray_kernal failed: %s\n",
            hipGetErrorString(cudaStatus));
    return false;
  }

  return true;
}

// init cuda enviroment.
int32_t cuda_init(void) {
  int32_t count;
  hipGetDeviceCount(&count);
  if (count == 0) {
    fprintf(stderr, "There is no device.\n");
    return 0;
  }

  std::cout
      << "-------------------------- GPU dev info --------------------------"
      << std::endl;

  int32_t i;
  for (i = 0; i < count; i++) {
    hipDeviceProp_t prop;
    if (hipGetDeviceProperties(&prop, i) == hipSuccess) {
      if (prop.major >= 1) {
        printf("Identify: %s\n", prop.name);
        printf("Host Memory: %d\n", (int32_t)prop.canMapHostMemory);
        printf("Clock Rate: %d khz\n", (int32_t)prop.clockRate);
        printf("Compute Mode: %d\n", (int32_t)prop.computeMode);
        printf("Device Overlap: %d\n", (int32_t)prop.deviceOverlap);
        printf("Integrated: %d\n", (int32_t)prop.integrated);
        printf("Kernel Exec Timeout Enabled: %d\n",
               (int32_t)prop.kernelExecTimeoutEnabled);
        printf("Max Grid Size: %d * %d * %d\n", (int32_t)prop.maxGridSize[0],
               (int32_t)prop.maxGridSize[1], (int32_t)prop.maxGridSize[2]);
        printf("Max Threads Dim: %d * %d * %d\n",
               (int32_t)prop.maxThreadsDim[0], (int32_t)prop.maxThreadsDim[1],
               (int32_t)prop.maxThreadsDim[2]);
        printf("Max Threads per Block: %d\n", (int32_t)prop.maxThreadsPerBlock);
        printf("Maximum Pitch: %d bytes\n", (int32_t)prop.memPitch);
        printf("Minor Compute Capability: %d\n", (int32_t)prop.minor);
        printf("Number of Multiprocessors: %d\n",
               (int32_t)prop.multiProcessorCount);
        printf("32bit Registers Availble per Block: %d\n",
               (int32_t)prop.regsPerBlock);
        printf("Shared Memory Available per Block: %d bytes\n",
               (int32_t)prop.sharedMemPerBlock);
        printf("Alignment Requirement for Textures: %d\n",
               (int32_t)prop.textureAlignment);
        printf("Constant Memory Available: %d bytes\n",
               (int32_t)prop.totalConstMem);
        printf("Global Memory Available: %d bytes\n",
               (int32_t)prop.totalGlobalMem);
        printf("Warp Size: %d threads\n", (int32_t)prop.warpSize);
        break;
      }
    }
  }

  if (i == count) {
    fprintf(stderr, "There is no device supporting CUDA.\n");
    return 0;
  }

  hipSetDevice(i);

  return 1;
}

	.text
	.file	"cuda_kernel.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z30__device_stub__raw2gray_kernaliiPhS_ # -- Begin function _Z30__device_stub__raw2gray_kernaliiPhS_
	.type	_Z30__device_stub__raw2gray_kernaliiPhS_,@function
_Z30__device_stub__raw2gray_kernaliiPhS_: # @_Z30__device_stub__raw2gray_kernaliiPhS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	8(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15raw2gray_kernaliiPhS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z30__device_stub__raw2gray_kernaliiPhS_, .Lfunc_end0-_Z30__device_stub__raw2gray_kernaliiPhS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z13cuda_raw2grayiiPhS_         # -- Begin function _Z13cuda_raw2grayiiPhS_
	.type	_Z13cuda_raw2grayiiPhS_,@function
_Z13cuda_raw2grayiiPhS_:                # @_Z13cuda_raw2grayiiPhS_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rcx, 32(%rsp)                  # 8-byte Spill
	movq	%rdx, 24(%rsp)                  # 8-byte Spill
	movl	%esi, %r14d
	movl	%edi, %r15d
	leal	23(%r15), %eax
	cltq
	imulq	$715827883, %rax, %rax          # imm = 0x2AAAAAAB
	movq	%rax, %rcx
	shrq	$63, %rcx
	sarq	$34, %rax
	addl	%ecx, %eax
	leal	23(%r14), %ecx
	movslq	%ecx, %rcx
	imulq	$715827883, %rcx, %rbp          # imm = 0x2AAAAAAB
	movq	%rbp, %rcx
	shrq	$63, %rcx
	sarq	$34, %rbp
	addl	%ecx, %ebp
	shlq	$32, %rbp
	orq	%rax, %rbp
	movl	%esi, %r13d
	imull	%edi, %r13d
	leal	(,%r13,4), %eax
	movslq	%eax, %rbx
	leaq	16(%rsp), %r12
	movq	%r12, %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movslq	%r13d, %r13
	leaq	8(%rsp), %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	movq	(%r12), %rdi
	movq	24(%rsp), %rsi                  # 8-byte Reload
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$103079215128, %rdx             # imm = 0x1800000018
	movq	%rbp, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_2
# %bb.1:
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rcx
	movl	%r15d, %edi
	movl	%r14d, %esi
	callq	_Z30__device_stub__raw2gray_kernaliiPhS_
.LBB1_2:
	movq	8(%rsp), %rsi
	movq	32(%rsp), %rdi                  # 8-byte Reload
	movq	%r13, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	callq	hipGetLastError
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.LBB1_3
.LBB1_4:
	testl	%ebx, %ebx
	sete	%al
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB1_3:
	.cfi_def_cfa_offset 96
	movq	stderr(%rip), %r14
	movl	%ebx, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movq	%r14, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB1_4
.Lfunc_end1:
	.size	_Z13cuda_raw2grayiiPhS_, .Lfunc_end1-_Z13cuda_raw2grayiiPhS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z9cuda_initv                   # -- Begin function _Z9cuda_initv
	.type	_Z9cuda_initv,@function
_Z9cuda_initv:                          # @_Z9cuda_initv
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	subq	$1480, %rsp                     # imm = 0x5C8
	.cfi_def_cfa_offset 1504
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	leaq	4(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipGetDeviceCount
	cmpl	$0, (%rbx)
	je	.LBB2_1
# %bb.3:
	movl	$_ZSt4cout, %ebx
	movl	$_ZSt4cout, %edi
	movl	$.L.str.2, %esi
	movl	$66, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	4(%rsp), %eax
	xorl	%ebx, %ebx
	testl	%eax, %eax
	jle	.LBB2_9
# %bb.4:                                # %.lr.ph
	leaq	8(%rsp), %r14
.LBB2_5:                                # =>This Inner Loop Header: Depth=1
	movq	%r14, %rdi
	movl	%ebx, %esi
	callq	hipGetDevicePropertiesR0600
	testl	%eax, %eax
	jne	.LBB2_8
# %bb.6:                                #   in Loop: Header=BB2_5 Depth=1
	cmpl	$0, 368(%rsp)
	jg	.LBB2_7
.LBB2_8:                                #   in Loop: Header=BB2_5 Depth=1
	incl	%ebx
	movl	4(%rsp), %eax
	cmpl	%eax, %ebx
	jl	.LBB2_5
	jmp	.LBB2_9
.LBB2_7:
	leaq	8(%rsp), %r14
	movl	$.L.str.3, %edi
	movq	%r14, %rsi
	xorl	%eax, %eax
	callq	printf
	movl	400(%r14), %esi
	movl	$.L.str.4, %edi
	xorl	%eax, %eax
	callq	printf
	movl	348(%r14), %esi
	movl	$.L.str.5, %edi
	xorl	%eax, %eax
	callq	printf
	movl	404(%r14), %esi
	movl	$.L.str.6, %edi
	xorl	%eax, %eax
	callq	printf
	movl	384(%r14), %esi
	movl	$.L.str.7, %edi
	xorl	%eax, %eax
	callq	printf
	movl	396(%r14), %esi
	movl	$.L.str.8, %edi
	xorl	%eax, %eax
	callq	printf
	movl	392(%r14), %esi
	movl	$.L.str.9, %edi
	xorl	%eax, %eax
	callq	printf
	movl	336(%r14), %esi
	movl	340(%r14), %edx
	movl	344(%r14), %ecx
	movl	$.L.str.10, %edi
	xorl	%eax, %eax
	callq	printf
	movl	324(%r14), %esi
	movl	328(%r14), %edx
	movl	332(%r14), %ecx
	movl	$.L.str.11, %edi
	xorl	%eax, %eax
	callq	printf
	movl	320(%r14), %esi
	movl	$.L.str.12, %edi
	xorl	%eax, %eax
	callq	printf
	movl	312(%r14), %esi
	movl	$.L.str.13, %edi
	xorl	%eax, %eax
	callq	printf
	movl	364(%r14), %esi
	movl	$.L.str.14, %edi
	xorl	%eax, %eax
	callq	printf
	movl	388(%r14), %esi
	movl	$.L.str.15, %edi
	xorl	%eax, %eax
	callq	printf
	movl	304(%r14), %esi
	movl	$.L.str.16, %edi
	xorl	%eax, %eax
	callq	printf
	movl	296(%r14), %esi
	movl	$.L.str.17, %edi
	xorl	%eax, %eax
	callq	printf
	movl	368(%r14), %esi
	movl	$.L.str.18, %edi
	xorl	%eax, %eax
	callq	printf
	movl	352(%r14), %esi
	movl	$.L.str.19, %edi
	xorl	%eax, %eax
	callq	printf
	movl	288(%r14), %esi
	movl	$.L.str.20, %edi
	xorl	%eax, %eax
	callq	printf
	movl	308(%r14), %esi
	movl	$.L.str.21, %edi
	xorl	%eax, %eax
	callq	printf
	movl	4(%rsp), %eax
.LBB2_9:                                # %.loopexit
	cmpl	%eax, %ebx
	je	.LBB2_10
# %bb.11:
	movl	%ebx, %edi
	callq	hipSetDevice
	movl	$1, %eax
.LBB2_12:
	addq	$1480, %rsp                     # imm = 0x5C8
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.LBB2_1:
	.cfi_def_cfa_offset 1504
	movq	stderr(%rip), %rcx
	movl	$.L.str.1, %edi
	movl	$20, %esi
	jmp	.LBB2_2
.LBB2_10:
	movq	stderr(%rip), %rcx
	movl	$.L.str.22, %edi
	movl	$36, %esi
.LBB2_2:
	movl	$1, %edx
	callq	fwrite@PLT
	xorl	%eax, %eax
	jmp	.LBB2_12
.Lfunc_end2:
	.size	_Z9cuda_initv, .Lfunc_end2-_Z9cuda_initv
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15raw2gray_kernaliiPhS_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z15raw2gray_kernaliiPhS_,@object # @_Z15raw2gray_kernaliiPhS_
	.section	.rodata,"a",@progbits
	.globl	_Z15raw2gray_kernaliiPhS_
	.p2align	3, 0x0
_Z15raw2gray_kernaliiPhS_:
	.quad	_Z30__device_stub__raw2gray_kernaliiPhS_
	.size	_Z15raw2gray_kernaliiPhS_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"raw2gray_kernal failed: %s\n"
	.size	.L.str, 28

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"There is no device.\n"
	.size	.L.str.1, 21

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"-------------------------- GPU dev info --------------------------"
	.size	.L.str.2, 67

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Identify: %s\n"
	.size	.L.str.3, 14

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Host Memory: %d\n"
	.size	.L.str.4, 17

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Clock Rate: %d khz\n"
	.size	.L.str.5, 20

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Compute Mode: %d\n"
	.size	.L.str.6, 18

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"Device Overlap: %d\n"
	.size	.L.str.7, 20

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"Integrated: %d\n"
	.size	.L.str.8, 16

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"Kernel Exec Timeout Enabled: %d\n"
	.size	.L.str.9, 33

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"Max Grid Size: %d * %d * %d\n"
	.size	.L.str.10, 29

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"Max Threads Dim: %d * %d * %d\n"
	.size	.L.str.11, 31

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"Max Threads per Block: %d\n"
	.size	.L.str.12, 27

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	"Maximum Pitch: %d bytes\n"
	.size	.L.str.13, 25

	.type	.L.str.14,@object               # @.str.14
.L.str.14:
	.asciz	"Minor Compute Capability: %d\n"
	.size	.L.str.14, 30

	.type	.L.str.15,@object               # @.str.15
.L.str.15:
	.asciz	"Number of Multiprocessors: %d\n"
	.size	.L.str.15, 31

	.type	.L.str.16,@object               # @.str.16
.L.str.16:
	.asciz	"32bit Registers Availble per Block: %d\n"
	.size	.L.str.16, 40

	.type	.L.str.17,@object               # @.str.17
.L.str.17:
	.asciz	"Shared Memory Available per Block: %d bytes\n"
	.size	.L.str.17, 45

	.type	.L.str.18,@object               # @.str.18
.L.str.18:
	.asciz	"Alignment Requirement for Textures: %d\n"
	.size	.L.str.18, 40

	.type	.L.str.19,@object               # @.str.19
.L.str.19:
	.asciz	"Constant Memory Available: %d bytes\n"
	.size	.L.str.19, 37

	.type	.L.str.20,@object               # @.str.20
.L.str.20:
	.asciz	"Global Memory Available: %d bytes\n"
	.size	.L.str.20, 35

	.type	.L.str.21,@object               # @.str.21
.L.str.21:
	.asciz	"Warp Size: %d threads\n"
	.size	.L.str.21, 23

	.type	.L.str.22,@object               # @.str.22
.L.str.22:
	.asciz	"There is no device supporting CUDA.\n"
	.size	.L.str.22, 37

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z15raw2gray_kernaliiPhS_"
	.size	.L__unnamed_1, 26

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z30__device_stub__raw2gray_kernaliiPhS_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z15raw2gray_kernaliiPhS_
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z15raw2gray_kernaliiPhS_ ; -- Begin function _Z15raw2gray_kernaliiPhS_
	.globl	_Z15raw2gray_kernaliiPhS_
	.p2align	8
	.type	_Z15raw2gray_kernaliiPhS_,@function
_Z15raw2gray_kernaliiPhS_:              ; @_Z15raw2gray_kernaliiPhS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s4, s[0:1], 0x0
	v_bfe_u32 v1, v0, 10, 10
	v_and_b32_e32 v0, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	v_mad_u64_u32 v[2:3], null, s15, s3, v[1:2]
	v_mad_u64_u32 v[3:4], null, s14, s2, v[0:1]
	s_lshl_b32 s5, s4, 1
	s_load_b128 s[0:3], s[0:1], 0x8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v0, v2, s5
	v_lshlrev_b32_e32 v1, 1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v4, v0, 1, v1
	v_add_nc_u32_e32 v0, s5, v4
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v1, 31, v0
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
	s_brev_b32 s0, 4
	s_clause 0x1
	global_load_u16 v6, v[0:1], off
	global_load_u16 v0, v[4:5], off
	s_mov_b32 s1, 0x3fd6e2eb
	s_waitcnt vmcnt(1)
	v_lshrrev_b16 v1, 8, v6
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v4, 0xff, v0
	v_cvt_f32_ubyte1_e32 v0, v0
	v_cvt_f32_ubyte0_e32 v6, v6
	v_and_b32_e32 v1, 0xffff, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v0, 0x3e59b3d0, v0
	v_mul_f32_e32 v6, 0x3d93dd98, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v4, v1, v4
	v_cvt_f64_f32_e32 v[0:1], v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cvt_f64_f32_e32 v[6:7], v6
	v_cvt_f64_i32_e32 v[4:5], v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[0:1], v[4:5], s[0:1], v[0:1]
	v_add_f64 v[0:1], v[0:1], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f32_f64_e32 v4, v[0:1]
	v_mad_u64_u32 v[0:1], null, v2, s4, v[3:4]
	v_cvt_i32_f32_e32 v2, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v1, 31, v0
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_store_b8 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15raw2gray_kernaliiPhS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z15raw2gray_kernaliiPhS_, .Lfunc_end0-_Z15raw2gray_kernaliiPhS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 348
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .offset:         4
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15raw2gray_kernaliiPhS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z15raw2gray_kernaliiPhS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
