#include <stdio.h>
#include <stdlib.h>
#include <sys/time.h>
#include <cuda.h>

void printBoard(unsigned char *board, int rows, int cols)
{
  int counter = 0;
  for(int i = 0; i < rows; i++)
  {
    for(int j = 0; j < cols; j++)
    {
      if(board[counter] == 0)
        printf("-");
      else
        printf("0");
      counter++;
    }
    printf("\n");
  }
  return;
}

__global__ void life (unsigned char *d_board,int iterations) {
    int i,row,col,rows,cols;
    unsigned char state,neighbors;
    row = blockIdx.y * blockDim.y + threadIdx.y;
    col = blockIdx.x * blockDim.x + threadIdx.x;
    rows = gridDim.y * blockDim.y;
    cols = gridDim.x * blockDim.x;
    state = d_board[(row)*cols+(col)];
    for (i=0;i<iterations;i++) {
        neighbors=0;
        if (row!=0) {
            if (col!=0) if (d_board[(row-1)*cols+(col-1)]==1) neighbors++;
            if (d_board[(row-1)*cols+(col)]==1) neighbors++;
            if (col!=(cols-1)) if (d_board[(row-1)*cols+(col+1)]==1) neighbors++;
        }
        if (col!=0) if (d_board[(row)*cols+(col-1)]==1) neighbors++;
        if (col!=(cols-1)) if (d_board[(row)*cols+(col+1)]==1) neighbors++;
        if (row!=(rows-1)) {
            if (col!=0) if (d_board[(row+1)*cols+(col-1)]==1) neighbors++;
            if (d_board[(row+1)*cols+(col)]==1) neighbors++;
            if (col!=(cols-1)) if (d_board[(row+1)*cols+(col+1)]==1) neighbors++;
        }
        if (neighbors<2) state = 0;
        else if (neighbors==3) state = 1;
        else if (neighbors>3) state = 0;
        __syncthreads();
        d_board[(row)*cols+(col)]=state;
    }
}
int main () {
    dim3 gDim,bDim;
    unsigned char *h_board,*d_board;
    int i,iterations=100;
    bDim.y=16;
    bDim.x=32;
    bDim.z=1;
    
    gDim.y=16;
    gDim.x=8;
    gDim.z=1;
    h_board=(unsigned char *)malloc(sizeof(unsigned char)*256*256);
    cudaMalloc((void **)&d_board,sizeof(unsigned char)*256*256);
    srand(0);
    for (i=0;i<256*256;i++) h_board[i]=rand()%2;
    printf("Starting state\n");
    printBoard(h_board, 256, 256);
    cudaMemcpy(d_board,h_board,sizeof(unsigned char)*256*256,cudaMemcpyHostToDevice);
    life <<<gDim,bDim>>> (d_board,iterations);
    cudaMemcpy(h_board,d_board,sizeof(unsigned char)*256*256,cudaMemcpyDeviceToHost);
    printf("Ending state\n");
    printBoard(h_board, 256, 256);
    free(h_board);
    cudaFree(d_board);
}

	.file	"tmpxft_002e0e4e_00000000-6_book.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"-"
.LC1:
	.string	"0"
.LC2:
	.string	"\n"
	.text
	.globl	_Z10printBoardPhii
	.type	_Z10printBoardPhii, @function
_Z10printBoardPhii:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rdi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%edx, %ebx
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	movl	%esi, 12(%rsp)
.L3:
	movl	12(%rsp), %eax
	cmpl	%eax, %r12d
	jge	.L12
	xorl	%ebp, %ebp
	movslq	%r13d, %r15
.L7:
	cmpl	%ebp, %ebx
	jle	.L13
	leaq	(%r14,%r15), %rax
	leaq	.LC0(%rip), %rsi
	cmpb	$0, (%rax,%rbp)
	je	.L10
	leaq	.LC1(%rip), %rsi
.L10:
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%rbp
	call	__printf_chk@PLT
	jmp	.L7
.L13:
	xorl	%eax, %eax
	testl	%ebx, %ebx
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	cmovns	%ebx, %eax
	incl	%r12d
	addl	%eax, %r13d
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L3
.L12:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z10printBoardPhii, .-_Z10printBoardPhii
	.globl	_Z24__device_stub__Z4lifePhiPhi
	.type	_Z24__device_stub__Z4lifePhiPhi, @function
_Z24__device_stub__Z4lifePhiPhi:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movl	%esi, 4(%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L14
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z4lifePhi(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L14:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L16
	call	__stack_chk_fail@PLT
.L16:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z24__device_stub__Z4lifePhiPhi, .-_Z24__device_stub__Z4lifePhiPhi
	.globl	_Z4lifePhi
	.type	_Z4lifePhi, @function
_Z4lifePhi:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z24__device_stub__Z4lifePhiPhi
	.cfi_endproc
.LFE2054:
	.size	_Z4lifePhi, .-_Z4lifePhi
	.section	.rodata.str1.1
.LC3:
	.string	"Starting state\n"
.LC4:
	.string	"Ending state\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	$65536, %edi
	movl	$2, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$48, %rsp
	.cfi_def_cfa_offset 80
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	movabsq	$68719476768, %rax
	movl	$1, 36(%rsp)
	movl	$1, 24(%rsp)
	movq	%rax, 28(%rsp)
	subq	$24, %rax
	movq	%rax, 16(%rsp)
	call	malloc@PLT
	leaq	8(%rsp), %rdi
	movl	$65536, %esi
	movq	%rax, %rbx
	call	cudaMalloc@PLT
	xorl	%edi, %edi
	call	srand@PLT
.L20:
	call	rand@PLT
	cltd
	idivl	%r12d
	movb	%dl, (%rbx,%rbp)
	incq	%rbp
	cmpq	$65536, %rbp
	jne	.L20
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$256, %edx
	movl	$256, %esi
	movq	%rbx, %rdi
	call	_Z10printBoardPhii
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$65536, %edx
	call	cudaMemcpy@PLT
	movl	36(%rsp), %ecx
	movl	24(%rsp), %esi
	xorl	%r9d, %r9d
	movq	28(%rsp), %rdx
	movq	16(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L21
	movq	8(%rsp), %rdi
	movl	$100, %esi
	call	_Z24__device_stub__Z4lifePhiPhi
.L21:
	movq	8(%rsp), %rsi
	movl	$2, %ecx
	movl	$65536, %edx
	movq	%rbx, %rdi
	call	cudaMemcpy@PLT
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$256, %edx
	movl	$256, %esi
	movq	%rbx, %rdi
	call	_Z10printBoardPhii
	movq	%rbx, %rdi
	call	free@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L22
	call	__stack_chk_fail@PLT
.L22:
	addq	$48, %rsp
	.cfi_def_cfa_offset 32
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	main, .-main
	.section	.rodata.str1.1
.LC5:
	.string	"_Z4lifePhi"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2056:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z4lifePhi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2056:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include <stdlib.h>
#include <sys/time.h>
#include <hip/hip_runtime.h>

void printBoard(unsigned char *board, int rows, int cols)
{
  int counter = 0;
  for(int i = 0; i < rows; i++)
  {
    for(int j = 0; j < cols; j++)
    {
      if(board[counter] == 0)
        printf("-");
      else
        printf("0");
      counter++;
    }
    printf("\n");
  }
  return;
}

__global__ void life (unsigned char *d_board,int iterations) {
    int i,row,col,rows,cols;
    unsigned char state,neighbors;
    row = blockIdx.y * blockDim.y + threadIdx.y;
    col = blockIdx.x * blockDim.x + threadIdx.x;
    rows = gridDim.y * blockDim.y;
    cols = gridDim.x * blockDim.x;
    state = d_board[(row)*cols+(col)];
    for (i=0;i<iterations;i++) {
        neighbors=0;
        if (row!=0) {
            if (col!=0) if (d_board[(row-1)*cols+(col-1)]==1) neighbors++;
            if (d_board[(row-1)*cols+(col)]==1) neighbors++;
            if (col!=(cols-1)) if (d_board[(row-1)*cols+(col+1)]==1) neighbors++;
        }
        if (col!=0) if (d_board[(row)*cols+(col-1)]==1) neighbors++;
        if (col!=(cols-1)) if (d_board[(row)*cols+(col+1)]==1) neighbors++;
        if (row!=(rows-1)) {
            if (col!=0) if (d_board[(row+1)*cols+(col-1)]==1) neighbors++;
            if (d_board[(row+1)*cols+(col)]==1) neighbors++;
            if (col!=(cols-1)) if (d_board[(row+1)*cols+(col+1)]==1) neighbors++;
        }
        if (neighbors<2) state = 0;
        else if (neighbors==3) state = 1;
        else if (neighbors>3) state = 0;
        __syncthreads();
        d_board[(row)*cols+(col)]=state;
    }
}
int main () {
    dim3 gDim,bDim;
    unsigned char *h_board,*d_board;
    int i,iterations=100;
    bDim.y=16;
    bDim.x=32;
    bDim.z=1;
    
    gDim.y=16;
    gDim.x=8;
    gDim.z=1;
    h_board=(unsigned char *)malloc(sizeof(unsigned char)*256*256);
    hipMalloc((void **)&d_board,sizeof(unsigned char)*256*256);
    srand(0);
    for (i=0;i<256*256;i++) h_board[i]=rand()%2;
    printf("Starting state\n");
    printBoard(h_board, 256, 256);
    hipMemcpy(d_board,h_board,sizeof(unsigned char)*256*256,hipMemcpyHostToDevice);
    life <<<gDim,bDim>>> (d_board,iterations);
    hipMemcpy(h_board,d_board,sizeof(unsigned char)*256*256,hipMemcpyDeviceToHost);
    printf("Ending state\n");
    printBoard(h_board, 256, 256);
    free(h_board);
    hipFree(d_board);
}

	.text
	.file	"book.hip"
	.globl	_Z10printBoardPhii              # -- Begin function _Z10printBoardPhii
	.type	_Z10printBoardPhii,@function
_Z10printBoardPhii:                     # @_Z10printBoardPhii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%edx, 8(%rsp)                   # 4-byte Spill
	movq	%rdi, 16(%rsp)                  # 8-byte Spill
	movl	%esi, 12(%rsp)                  # 4-byte Spill
	testl	%esi, %esi
	jle	.LBB0_6
# %bb.1:                                # %.preheader.lr.ph
	xorl	%r15d, %r15d
	movl	8(%rsp), %eax                   # 4-byte Reload
	testl	%eax, %eax
	movl	$0, %r12d
	cmovgl	%eax, %r12d
	movl	%eax, %r13d
	xorl	%r14d, %r14d
.LBB0_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_4 Depth 2
	cmpl	$0, 8(%rsp)                     # 4-byte Folded Reload
	jle	.LBB0_5
# %bb.3:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB0_2 Depth=1
	movslq	%r15d, %rbp
	addq	16(%rsp), %rbp                  # 8-byte Folded Reload
	xorl	%ebx, %ebx
.LBB0_4:                                # %.lr.ph
                                        #   Parent Loop BB0_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorl	%eax, %eax
	cmpb	$0, (%rbp,%rbx)
	setne	%al
	leal	(%rax,%rax,2), %edi
	addl	$45, %edi
	callq	putchar@PLT
	incq	%rbx
	cmpl	%ebx, %r13d
	jne	.LBB0_4
.LBB0_5:                                # %._crit_edge
                                        #   in Loop: Header=BB0_2 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incl	%r14d
	addl	%r12d, %r15d
	cmpl	12(%rsp), %r14d                 # 4-byte Folded Reload
	jne	.LBB0_2
.LBB0_6:                                # %._crit_edge16
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z10printBoardPhii, .Lfunc_end0-_Z10printBoardPhii
	.cfi_endproc
                                        # -- End function
	.globl	_Z19__device_stub__lifePhi      # -- Begin function _Z19__device_stub__lifePhi
	.type	_Z19__device_stub__lifePhi,@function
_Z19__device_stub__lifePhi:             # @_Z19__device_stub__lifePhi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z4lifePhi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z19__device_stub__lifePhi, .Lfunc_end1-_Z19__device_stub__lifePhi
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movl	$65536, %edi                    # imm = 0x10000
	callq	malloc
	movq	%rax, %rbx
	movq	%rsp, %rdi
	movl	$65536, %esi                    # imm = 0x10000
	callq	hipMalloc
	xorl	%r14d, %r14d
	xorl	%edi, %edi
	callq	srand
.LBB2_1:                                # =>This Inner Loop Header: Depth=1
	callq	rand
	movl	%eax, %ecx
	shrl	$31, %ecx
	addl	%eax, %ecx
	andl	$254, %ecx
	subl	%ecx, %eax
	movb	%al, (%rbx,%r14)
	incq	%r14
	cmpq	$65536, %r14                    # imm = 0x10000
	jne	.LBB2_1
# %bb.2:
	movl	$.Lstr, %edi
	callq	puts@PLT
	movq	%rbx, %rdi
	movl	$256, %esi                      # imm = 0x100
	movl	$256, %edx                      # imm = 0x100
	callq	_Z10printBoardPhii
	movq	(%rsp), %rdi
	movl	$65536, %edx                    # imm = 0x10000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$68719476744, %rdi              # imm = 0x1000000008
	leaq	24(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_4
# %bb.3:
	movq	(%rsp), %rdi
	movl	$100, %esi
	callq	_Z19__device_stub__lifePhi
.LBB2_4:
	movq	(%rsp), %rsi
	movl	$65536, %edx                    # imm = 0x10000
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	movq	%rbx, %rdi
	movl	$256, %esi                      # imm = 0x100
	movl	$256, %edx                      # imm = 0x100
	callq	_Z10printBoardPhii
	movq	%rbx, %rdi
	callq	free
	movq	(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z4lifePhi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z4lifePhi,@object              # @_Z4lifePhi
	.section	.rodata,"a",@progbits
	.globl	_Z4lifePhi
	.p2align	3, 0x0
_Z4lifePhi:
	.quad	_Z19__device_stub__lifePhi
	.size	_Z4lifePhi, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z4lifePhi"
	.size	.L__unnamed_1, 11

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Starting state"
	.size	.Lstr, 15

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"Ending state"
	.size	.Lstr.1, 13

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z19__device_stub__lifePhi
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z4lifePhi
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z4lifePhi              ; -- Begin function _Z4lifePhi
	.globl	_Z4lifePhi
	.p2align	8
	.type	_Z4lifePhi,@function
_Z4lifePhi:                             ; @_Z4lifePhi
; %bb.0:
	s_load_b32 s4, s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s4, 1
	s_cbranch_scc1 .LBB0_19
; %bb.1:                                ; %.lr.ph
	s_clause 0x1
	s_load_b32 s5, s[0:1], 0x1c
	s_load_b64 s[2:3], s[0:1], 0x10
	v_bfe_u32 v1, v0, 10, 10
	v_and_b32_e32 v0, 0x3ff, v0
	s_load_b64 s[6:7], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s8, s5, 16
	s_and_b32 s5, s5, 0xffff
	v_mad_u64_u32 v[8:9], null, s15, s8, v[1:2]
	s_mul_i32 s9, s2, s5
	v_mad_u64_u32 v[9:10], null, s14, s5, v[0:1]
	s_mul_i32 s3, s3, s8
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_add_i32 s3, s3, -1
	v_mul_lo_u32 v6, s9, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v10, 31, v9
	v_cmp_ne_u32_e64 s0, 0, v9
	v_add_nc_u32_e32 v0, v6, v9
	v_subrev_nc_u32_e32 v7, s9, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v1, 31, v0
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_ashrrev_i32_e32 v2, 31, v7
	v_add_nc_u32_e32 v4, v7, v9
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v3, s1, v9, v7
	v_add_co_ci_u32_e64 v5, s1, v10, v2, s1
	global_load_u8 v12, v[0:1], off
	v_ashrrev_i32_e32 v11, 31, v4
	v_add_co_u32 v2, s1, s6, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v3, s1, s7, v5, s1
	v_add_co_u32 v4, s1, s6, v4
	v_add_co_ci_u32_e64 v5, s1, s7, v11, s1
	v_ashrrev_i32_e32 v11, 31, v6
	v_add_co_u32 v6, s2, v9, v6
	v_lshl_add_u32 v13, s9, 1, v7
	v_cmp_ne_u32_e32 vcc_lo, 0, v8
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e64 v11, s2, v10, v11, s2
	v_add_co_u32 v6, s2, s6, v6
	s_add_i32 s1, s9, -1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e64 v7, s2, s7, v11, s2
	v_cmp_ne_u32_e64 s2, s3, v8
	v_ashrrev_i32_e32 v8, 31, v13
	v_cmp_ne_u32_e64 s1, s1, v9
	v_add_nc_u32_e32 v11, v13, v9
	v_add_co_u32 v9, s3, v9, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v10, s3, v10, v8, s3
	v_ashrrev_i32_e32 v13, 31, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v8, s3, s6, v9
	v_add_co_ci_u32_e64 v9, s3, s7, v10, s3
	v_add_co_u32 v10, s3, s6, v11
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v11, s3, s7, v13, s3
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v13, 0
	s_and_saveexec_b32 s5, vcc_lo
	s_cbranch_execz .LBB0_8
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v13, 0
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB0_5
; %bb.4:                                ;   in Loop: Header=BB0_2 Depth=1
	global_load_u8 v13, v[2:3], off offset:-1
	s_waitcnt vmcnt(0)
	v_cmp_eq_u16_e64 s3, 1, v13
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v13, 0, 1, s3
.LBB0_5:                                ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	global_load_u8 v14, v[4:5], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u16_e64 s3, 1, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v14, 0, 1, s3
	v_add_nc_u16 v13, v13, v14
	s_and_saveexec_b32 s6, s1
	s_cbranch_execz .LBB0_7
; %bb.6:                                ;   in Loop: Header=BB0_2 Depth=1
	global_load_u8 v14, v[2:3], off offset:1
	s_waitcnt vmcnt(0)
	v_cmp_eq_u16_e64 s3, 1, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v14, 0, 1, s3
	v_add_nc_u16 v13, v13, v14
.LBB0_7:                                ; %Flow167
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
.LBB0_8:                                ; %Flow168
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
	s_and_saveexec_b32 s5, s0
	s_cbranch_execz .LBB0_10
; %bb.9:                                ;   in Loop: Header=BB0_2 Depth=1
	global_load_u8 v14, v[6:7], off offset:-1
	s_waitcnt vmcnt(0)
	v_cmp_eq_u16_e64 s3, 1, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v14, 0, 1, s3
	v_add_nc_u16 v13, v13, v14
.LBB0_10:                               ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_and_saveexec_b32 s5, s1
	s_cbranch_execz .LBB0_12
; %bb.11:                               ;   in Loop: Header=BB0_2 Depth=1
	global_load_u8 v14, v[6:7], off offset:1
	s_waitcnt vmcnt(0)
	v_cmp_eq_u16_e64 s3, 1, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v14, 0, 1, s3
	v_add_nc_u16 v13, v13, v14
.LBB0_12:                               ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_and_saveexec_b32 s5, s2
	s_cbranch_execz .LBB0_18
; %bb.13:                               ;   in Loop: Header=BB0_2 Depth=1
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB0_15
; %bb.14:                               ;   in Loop: Header=BB0_2 Depth=1
	global_load_u8 v14, v[8:9], off offset:-1
	s_waitcnt vmcnt(0)
	v_cmp_eq_u16_e64 s3, 1, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v14, 0, 1, s3
	v_add_nc_u16 v13, v13, v14
.LBB0_15:                               ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	global_load_u8 v14, v[10:11], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u16_e64 s3, 1, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v14, 0, 1, s3
	v_add_nc_u16 v13, v13, v14
	s_and_saveexec_b32 s6, s1
	s_cbranch_execz .LBB0_17
; %bb.16:                               ;   in Loop: Header=BB0_2 Depth=1
	global_load_u8 v14, v[8:9], off offset:1
	s_waitcnt vmcnt(0)
	v_cmp_eq_u16_e64 s3, 1, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v14, 0, 1, s3
	v_add_nc_u16 v13, v13, v14
.LBB0_17:                               ; %Flow
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
.LBB0_18:                               ; %Flow166
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s5
	v_cmp_gt_u16_e64 s3, 4, v13
	s_add_i32 s4, s4, -1
	s_waitcnt vmcnt(0)
	s_cmp_lg_u32 s4, 0
	s_waitcnt_vscnt null, 0x0
	s_barrier
	v_cndmask_b32_e64 v12, 0, v12, s3
	v_cmp_ne_u16_e64 s3, 3, v13
	buffer_gl0_inv
	v_cndmask_b32_e64 v12, 1, v12, s3
	v_cmp_lt_u16_e64 s3, 1, v13
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v12, 0, v12, s3
	global_store_b8 v[0:1], v12, off
	s_cbranch_scc1 .LBB0_2
.LBB0_19:                               ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z4lifePhi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 15
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z4lifePhi, .Lfunc_end0-_Z4lifePhi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 916
; NumSgprs: 18
; NumVgprs: 15
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 15
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z4lifePhi
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z4lifePhi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     15
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
