#include <stdio.h>
#include <stdlib.h>
#include <unistd.h>
#include <sys/time.h>

/* Problem size */
#define NI 8192 // height
#define NJ 8192 // width

__global__ void convolutionKernel(double *A_d, double *B_d, int width, int height)
{
	int x = blockIdx.x * blockDim.x + threadIdx.x;
	int y = blockIdx.y * blockDim.y + threadIdx.y;

	int i = y, j = x;
	double c11, c12, c13, c21, c22, c23, c31, c32, c33;

	c11 = +0.2;  c21 = +0.5;  c31 = -0.8;
	c12 = -0.3;  c22 = +0.6;  c32 = -0.9;
	c13 = +0.4;  c23 = +0.7;  c33 = +0.10;

	if ( (x < width) && (y < height) )
	{
		if ( i >= 1 && i < (height-1))
		{
			if ( j >= 1 && j < (width-1))
			{
				B_d[y*width+x] = c11 * A_d[(i - 1)*NJ + (j - 1)]  +  c12 * A_d[(i + 0)*NJ + (j - 1)]  +  c13 * A_d[(i + 1)*NJ + (j - 1)]
						+ c21 * A_d[(i - 1)*NJ + (j + 0)]  +  c22 * A_d[(i + 0)*NJ + (j + 0)]  +  c23 * A_d[(i + 1)*NJ + (j + 0)]
						+ c31 * A_d[(i - 1)*NJ + (j + 1)]  +  c32 * A_d[(i + 0)*NJ + (j + 1)]  +  c33 * A_d[(i + 1)*NJ + (j + 1)];
			}
		}
	}
}

int my_ceil(float num)
{
    int inum = (int)num;
    if (num == (float)inum) {
        return inum;
    }
    return inum + 1;
}

void print_matrix(double* C, int width, int height)
{
	printf("%s\n", " ");
	for (int i = 0; i < height; i++)
	{
		for (int j = 0; j < width; j++)
		{
			//printf("(%d, %d) -> %d\t", i, j, C[i*width+j]);
			printf("%- 3.2f   ", C[i*width+j]);
		}
		printf("%s\n", " ");
	}
}

void Convolution(double* A, double* B)
{
	int i, j;
	double c11, c12, c13, c21, c22, c23, c31, c32, c33;

	c11 = +0.2;  c21 = +0.5;  c31 = -0.8;
	c12 = -0.3;  c22 = +0.6;  c32 = -0.9;
	c13 = +0.4;  c23 = +0.7;  c33 = +0.10;


	for (i = 1; i < NI - 1; ++i) {
		for (j = 1; j < NJ - 1; ++j) {
			B[i*NJ + j] = c11 * A[(i - 1)*NJ + (j - 1)]  +  c12 * A[(i + 0)*NJ + (j - 1)]  +  c13 * A[(i + 1)*NJ + (j - 1)]
				    + c21 * A[(i - 1)*NJ + (j + 0)]  +  c22 * A[(i + 0)*NJ + (j + 0)]  +  c23 * A[(i + 1)*NJ + (j + 0)]
				    + c31 * A[(i - 1)*NJ + (j + 1)]  +  c32 * A[(i + 0)*NJ + (j + 1)]  +  c33 * A[(i + 1)*NJ + (j + 1)];
		}
	}
}

void init(double* A)
{
	int i, j;

	for (i = 0; i < NI; ++i) {
		for (j = 0; j < NJ; ++j) {
			A[i*NJ + j] = (double)rand()/RAND_MAX;
        	}
    	}
}

int main(int argc, char *argv[])
{
	// open file
	FILE *output;
	output = fopen("gpu.out", "w");
	if (output == NULL) {
		printf("Could not open file");
		exit(1);
	}

	cudaEvent_t start, stop;
	cudaEventCreate(&start);
	cudaEventCreate(&stop);

	double		*A_h;
	double		*B_h;

	A_h = (double*)calloc(NI*NJ, sizeof(double)); // better use calloc than malloc, initializes elements to 0
	B_h = (double*)calloc(NI*NJ, sizeof(double));


	// create matrices in device
	double *A_d;
	double *B_d;
	// allocate memory in device
	long size = NI*NJ*sizeof(double);
	cudaMalloc((void**) &A_d, size);
	cudaMalloc((void**) &B_d, size);

	/* zero-out B  ---- Is it really necessary? */
	// for (int i = 0; i < NI; ++i) {
	// 	for (int j = 0; j < NJ; ++j) {
	// 		B_h[i*NJ + j] = 0;
    //     	}
    // 	}

	//initialize the arrays
	init(A_h);
	// printf("\ninitialized A:");
	// print_matrix(A_h, NJ, NI); //print initialized A

	/* Print B initial state on HOST */
	// printf("\nB before kernel call:");
	// print_matrix(B_h, NJ, NI);

	// transfer matrix A to device
	cudaMemcpy(A_d, A_h, size, cudaMemcpyHostToDevice);
	cudaMemcpy(B_d, B_h, size, cudaMemcpyHostToDevice);

	// !!! set grid and block dimensions

	// calculate grid dimensions given block size = 16x16

	// given block size
	int block_dim_x = 16;
	int block_dim_y = 16;

	//calculate grid dimensions
	int grid_dim_x = my_ceil( (float) NJ / block_dim_x);
	int grid_dim_y = my_ceil( (float) NI / block_dim_y);

	printf("Block Size = %dx%d\n", block_dim_x, block_dim_y);
	printf("Calculated Grid Size = %dx%d\n", grid_dim_x, grid_dim_y);

	//         width, height
	dim3 dimGrid(grid_dim_x, grid_dim_x);
	dim3 dimBlock(block_dim_x, block_dim_y);

	// call GPU kernel
	cudaEventRecord(start);
	convolutionKernel<<<dimGrid, dimBlock>>>(A_d, B_d, NJ, NI);
	cudaEventRecord(stop);

	// transer matrix B from DEVICE to HOST
	cudaMemcpy(B_h, B_d, size, cudaMemcpyDeviceToHost);
	cudaEventSynchronize(stop);
	float milliseconds = 0;
	cudaEventElapsedTime(&milliseconds, start, stop);
	cudaEventDestroy(start);
	cudaEventDestroy(stop);
	printf("GPU Runtime: %0.6lf sec\n", milliseconds/1000.0);

	/* print kernel result */
	// printf("\nB kernel result:");
	// print_matrix(B_h, NJ, NI);

	// write results to file
	// for (int i = 0; i < NI*NJ; i++)
	// {
	// 	if(i%NJ==0)
	// 	fprintf(output, "%19.15f\n", B_h[i]);
	// }
	for (int i = 1; i < NI - 1; ++i) {
		for (int j = 1; j < NJ - 1; ++j) {
			//B[i*NJ + j]
			if(i%NJ/2==0)
			fprintf(output, "%19.15f\n", B_h[i*NJ + j]);
		}
	}

	/* 	for validation purposes
	 	lets calculate b using CPU convolution function and print it */
	// Convolution(A_h, B_h);
	// printf("\nB CPU result:");
	// print_matrix(B_h, NJ, NI);

	free(A_h);
	free(B_h);
	fclose(output);

	// free memory from device
	cudaFree(A_d);
	cudaFree(B_d);

	return 0;
}

	.file	"tmpxft_003acd72_00000000-6_2D-Convolution.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2047:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2047:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z7my_ceilf
	.type	_Z7my_ceilf, @function
_Z7my_ceilf:
.LFB2040:
	.cfi_startproc
	endbr64
	cvttss2sil	%xmm0, %eax
	cvtsi2ssl	%eax, %xmm1
	ucomiss	%xmm0, %xmm1
	jp	.L5
	je	.L2
.L5:
	incl	%eax
.L2:
	ret
	.cfi_endproc
.LFE2040:
	.size	_Z7my_ceilf, .-_Z7my_ceilf
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	" "
.LC1:
	.string	"%s\n"
.LC2:
	.string	"%- 3.2f   "
	.text
	.globl	_Z12print_matrixPdii
	.type	_Z12print_matrixPdii, @function
_Z12print_matrixPdii:
.LFB2041:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	xorl	%eax, %eax
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%edx, %r14d
	leaq	.LC0(%rip), %rdx
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdi, %rbp
	movl	$2, %edi
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%esi, %ebx
	leaq	.LC1(%rip), %rsi
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	call	__printf_chk@PLT
.L8:
	cmpl	%r14d, %r13d
	jge	.L7
	movslq	%r12d, %rax
	xorl	%r15d, %r15d
	leaq	0(%rbp,%rax,8), %rcx
.L11:
	cmpl	%r15d, %ebx
	jle	.L13
	movsd	(%rcx,%r15,8), %xmm0
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	movq	%rcx, 8(%rsp)
	incq	%r15
	call	__printf_chk@PLT
	movq	8(%rsp), %rcx
	jmp	.L11
.L13:
	leaq	.LC0(%rip), %rdx
	xorl	%eax, %eax
	incl	%r13d
	addl	%ebx, %r12d
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	jmp	.L8
.L7:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2041:
	.size	_Z12print_matrixPdii, .-_Z12print_matrixPdii
	.globl	_Z11ConvolutionPdS_
	.type	_Z11ConvolutionPdS_, @function
_Z11ConvolutionPdS_:
.LFB2042:
	.cfi_startproc
	endbr64
	movsd	.LC3(%rip), %xmm1
	movsd	.LC4(%rip), %xmm2
	xorl	%r8d, %r8d
	movl	$65536, %ecx
	movsd	.LC5(%rip), %xmm3
	movsd	.LC6(%rip), %xmm4
	movsd	.LC7(%rip), %xmm5
	movsd	.LC8(%rip), %xmm6
	movsd	.LC9(%rip), %xmm7
	movsd	.LC10(%rip), %xmm8
	movsd	.LC11(%rip), %xmm9
.L15:
	addl	$8192, %r8d
	movq	%rcx, %rax
	movl	$1, %edx
.L16:
	movsd	-65536(%rdi,%rax), %xmm0
	movsd	(%rdi,%rax), %xmm10
	incl	%edx
	mulsd	%xmm2, %xmm10
	mulsd	%xmm1, %xmm0
	addsd	%xmm10, %xmm0
	movsd	65536(%rdi,%rax), %xmm10
	mulsd	%xmm3, %xmm10
	addsd	%xmm10, %xmm0
	movsd	-65528(%rdi,%rax), %xmm10
	mulsd	%xmm4, %xmm10
	addsd	%xmm10, %xmm0
	movsd	8(%rdi,%rax), %xmm10
	mulsd	%xmm5, %xmm10
	addsd	%xmm10, %xmm0
	movsd	65544(%rdi,%rax), %xmm10
	mulsd	%xmm6, %xmm10
	addsd	%xmm10, %xmm0
	movsd	-65520(%rdi,%rax), %xmm10
	mulsd	%xmm7, %xmm10
	addsd	%xmm10, %xmm0
	movsd	16(%rdi,%rax), %xmm10
	mulsd	%xmm8, %xmm10
	addsd	%xmm10, %xmm0
	movsd	65552(%rdi,%rax), %xmm10
	mulsd	%xmm9, %xmm10
	addsd	%xmm10, %xmm0
	movsd	%xmm0, 8(%rsi,%rax)
	addq	$8, %rax
	cmpl	$8191, %edx
	jne	.L16
	addq	$65536, %rcx
	cmpl	$67092480, %r8d
	jne	.L15
	ret
	.cfi_endproc
.LFE2042:
	.size	_Z11ConvolutionPdS_, .-_Z11ConvolutionPdS_
	.globl	_Z4initPd
	.type	_Z4initPd, @function
_Z4initPd:
.LFB2043:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movq	%rdi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	pushq	%rdx
	.cfi_def_cfa_offset 48
.L20:
	movq	%rbp, %r12
	xorl	%ebx, %ebx
	salq	$16, %r12
	addq	%r13, %r12
.L21:
	call	rand@PLT
	cvtsi2sdl	%eax, %xmm0
	divsd	.LC12(%rip), %xmm0
	movsd	%xmm0, (%r12,%rbx,8)
	incq	%rbx
	cmpq	$8192, %rbx
	jne	.L21
	incq	%rbp
	cmpq	$8192, %rbp
	jne	.L20
	popq	%rax
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2043:
	.size	_Z4initPd, .-_Z4initPd
	.globl	_Z41__device_stub__Z17convolutionKernelPdS_iiPdS_ii
	.type	_Z41__device_stub__Z17convolutionKernelPdS_iiPdS_ii, @function
_Z41__device_stub__Z17convolutionKernelPdS_iiPdS_ii:
.LFB2069:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L25
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z17convolutionKernelPdS_ii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L25:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L27
	call	__stack_chk_fail@PLT
.L27:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2069:
	.size	_Z41__device_stub__Z17convolutionKernelPdS_iiPdS_ii, .-_Z41__device_stub__Z17convolutionKernelPdS_iiPdS_ii
	.globl	_Z17convolutionKernelPdS_ii
	.type	_Z17convolutionKernelPdS_ii, @function
_Z17convolutionKernelPdS_ii:
.LFB2070:
	.cfi_startproc
	endbr64
	jmp	_Z41__device_stub__Z17convolutionKernelPdS_iiPdS_ii
	.cfi_endproc
.LFE2070:
	.size	_Z17convolutionKernelPdS_ii, .-_Z17convolutionKernelPdS_ii
	.section	.rodata.str1.1
.LC13:
	.string	"w"
.LC14:
	.string	"gpu.out"
.LC15:
	.string	"Could not open file"
.LC16:
	.string	"Block Size = %dx%d\n"
.LC17:
	.string	"Calculated Grid Size = %dx%d\n"
.LC20:
	.string	"GPU Runtime: %0.6lf sec\n"
.LC21:
	.string	"%19.15f\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2044:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leaq	.LC13(%rip), %rsi
	leaq	.LC14(%rip), %rdi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	call	fopen@PLT
	testq	%rax, %rax
	jne	.L31
	movl	$2, %edi
	leaq	.LC15(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L31:
	leaq	16(%rsp), %rdi
	movq	%rax, %rbp
	call	cudaEventCreate@PLT
	leaq	24(%rsp), %rdi
	call	cudaEventCreate@PLT
	movl	$8, %esi
	movl	$67108864, %edi
	call	calloc@PLT
	movl	$8, %esi
	movl	$67108864, %edi
	movq	%rax, %r12
	call	calloc@PLT
	leaq	32(%rsp), %rdi
	movl	$536870912, %esi
	movq	%rax, %rbx
	call	cudaMalloc@PLT
	movl	$536870912, %esi
	leaq	40(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	%r12, %rdi
	call	_Z4initPd
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$536870912, %edx
	call	cudaMemcpy@PLT
	movq	40(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$536870912, %edx
	call	cudaMemcpy@PLT
	movl	$16, %ecx
	movl	$16, %edx
	xorl	%eax, %eax
	leaq	.LC16(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	$512, %ecx
	movl	$512, %edx
	xorl	%eax, %eax
	leaq	.LC17(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	movabsq	$2199023256064, %rax
	movq	%rax, 48(%rsp)
	movabsq	$68719476752, %rax
	movl	$1, 56(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	cudaEventRecord@PLT
	movl	68(%rsp), %ecx
	movl	56(%rsp), %esi
	xorl	%r9d, %r9d
	movq	60(%rsp), %rdx
	movq	48(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L32
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdi
	movl	$8192, %ecx
	movl	$8192, %edx
	call	_Z41__device_stub__Z17convolutionKernelPdS_iiPdS_ii
.L32:
	movq	24(%rsp), %rdi
	xorl	%esi, %esi
	movl	$1, %r14d
	leaq	.LC21(%rip), %r15
	call	cudaEventRecord@PLT
	movq	40(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	movl	$536870912, %edx
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	leaq	12(%rsp), %rdi
	movl	$0x00000000, 12(%rsp)
	call	cudaEventElapsedTime@PLT
	movq	16(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	24(%rsp), %rdi
	call	cudaEventDestroy@PLT
	leaq	.LC20(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	12(%rsp), %xmm0
	divsd	.LC19(%rip), %xmm0
	call	__printf_chk@PLT
.L33:
	xorl	%r13d, %r13d
.L35:
	cmpl	$1, %r14d
	jne	.L34
	movq	%r15, %rdx
	movl	$2, %esi
	movq	%rbp, %rdi
	movb	$1, %al
	movsd	65544(%rbx,%r13), %xmm0
	call	__fprintf_chk@PLT
.L34:
	addq	$8, %r13
	cmpq	$65520, %r13
	jne	.L35
	incl	%r14d
	cmpl	$8191, %r14d
	jne	.L33
	movq	%r12, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	fclose@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L37
	call	__stack_chk_fail@PLT
.L37:
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2044:
	.size	main, .-main
	.section	.rodata.str1.1
.LC22:
	.string	"_Z17convolutionKernelPdS_ii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2072:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC22(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z17convolutionKernelPdS_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2072:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC3:
	.long	-1717986918
	.long	1070176665
	.align 8
.LC4:
	.long	858993459
	.long	-1076677837
	.align 8
.LC5:
	.long	-1717986918
	.long	1071225241
	.align 8
.LC6:
	.long	0
	.long	1071644672
	.align 8
.LC7:
	.long	858993459
	.long	1071854387
	.align 8
.LC8:
	.long	1717986918
	.long	1072064102
	.align 8
.LC9:
	.long	-1717986918
	.long	-1075209831
	.align 8
.LC10:
	.long	-858993459
	.long	-1075000116
	.align 8
.LC11:
	.long	-1717986918
	.long	1069128089
	.align 8
.LC12:
	.long	-4194304
	.long	1105199103
	.align 8
.LC19:
	.long	0
	.long	1083129856
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <unistd.h>
#include <sys/time.h>

/* Problem size */
#define NI 8192 // height
#define NJ 8192 // width

__global__ void convolutionKernel(double *A_d, double *B_d, int width, int height)
{
	int x = blockIdx.x * blockDim.x + threadIdx.x;
	int y = blockIdx.y * blockDim.y + threadIdx.y;

	int i = y, j = x;
	double c11, c12, c13, c21, c22, c23, c31, c32, c33;

	c11 = +0.2;  c21 = +0.5;  c31 = -0.8;
	c12 = -0.3;  c22 = +0.6;  c32 = -0.9;
	c13 = +0.4;  c23 = +0.7;  c33 = +0.10;

	if ( (x < width) && (y < height) )
	{
		if ( i >= 1 && i < (height-1))
		{
			if ( j >= 1 && j < (width-1))
			{
				B_d[y*width+x] = c11 * A_d[(i - 1)*NJ + (j - 1)]  +  c12 * A_d[(i + 0)*NJ + (j - 1)]  +  c13 * A_d[(i + 1)*NJ + (j - 1)]
						+ c21 * A_d[(i - 1)*NJ + (j + 0)]  +  c22 * A_d[(i + 0)*NJ + (j + 0)]  +  c23 * A_d[(i + 1)*NJ + (j + 0)]
						+ c31 * A_d[(i - 1)*NJ + (j + 1)]  +  c32 * A_d[(i + 0)*NJ + (j + 1)]  +  c33 * A_d[(i + 1)*NJ + (j + 1)];
			}
		}
	}
}

int my_ceil(float num)
{
    int inum = (int)num;
    if (num == (float)inum) {
        return inum;
    }
    return inum + 1;
}

void print_matrix(double* C, int width, int height)
{
	printf("%s\n", " ");
	for (int i = 0; i < height; i++)
	{
		for (int j = 0; j < width; j++)
		{
			//printf("(%d, %d) -> %d\t", i, j, C[i*width+j]);
			printf("%- 3.2f   ", C[i*width+j]);
		}
		printf("%s\n", " ");
	}
}

void Convolution(double* A, double* B)
{
	int i, j;
	double c11, c12, c13, c21, c22, c23, c31, c32, c33;

	c11 = +0.2;  c21 = +0.5;  c31 = -0.8;
	c12 = -0.3;  c22 = +0.6;  c32 = -0.9;
	c13 = +0.4;  c23 = +0.7;  c33 = +0.10;


	for (i = 1; i < NI - 1; ++i) {
		for (j = 1; j < NJ - 1; ++j) {
			B[i*NJ + j] = c11 * A[(i - 1)*NJ + (j - 1)]  +  c12 * A[(i + 0)*NJ + (j - 1)]  +  c13 * A[(i + 1)*NJ + (j - 1)]
				    + c21 * A[(i - 1)*NJ + (j + 0)]  +  c22 * A[(i + 0)*NJ + (j + 0)]  +  c23 * A[(i + 1)*NJ + (j + 0)]
				    + c31 * A[(i - 1)*NJ + (j + 1)]  +  c32 * A[(i + 0)*NJ + (j + 1)]  +  c33 * A[(i + 1)*NJ + (j + 1)];
		}
	}
}

void init(double* A)
{
	int i, j;

	for (i = 0; i < NI; ++i) {
		for (j = 0; j < NJ; ++j) {
			A[i*NJ + j] = (double)rand()/RAND_MAX;
        	}
    	}
}

int main(int argc, char *argv[])
{
	// open file
	FILE *output;
	output = fopen("gpu.out", "w");
	if (output == NULL) {
		printf("Could not open file");
		exit(1);
	}

	hipEvent_t start, stop;
	hipEventCreate(&start);
	hipEventCreate(&stop);

	double		*A_h;
	double		*B_h;

	A_h = (double*)calloc(NI*NJ, sizeof(double)); // better use calloc than malloc, initializes elements to 0
	B_h = (double*)calloc(NI*NJ, sizeof(double));


	// create matrices in device
	double *A_d;
	double *B_d;
	// allocate memory in device
	long size = NI*NJ*sizeof(double);
	hipMalloc((void**) &A_d, size);
	hipMalloc((void**) &B_d, size);

	/* zero-out B  ---- Is it really necessary? */
	// for (int i = 0; i < NI; ++i) {
	// 	for (int j = 0; j < NJ; ++j) {
	// 		B_h[i*NJ + j] = 0;
    //     	}
    // 	}

	//initialize the arrays
	init(A_h);
	// printf("\ninitialized A:");
	// print_matrix(A_h, NJ, NI); //print initialized A

	/* Print B initial state on HOST */
	// printf("\nB before kernel call:");
	// print_matrix(B_h, NJ, NI);

	// transfer matrix A to device
	hipMemcpy(A_d, A_h, size, hipMemcpyHostToDevice);
	hipMemcpy(B_d, B_h, size, hipMemcpyHostToDevice);

	// !!! set grid and block dimensions

	// calculate grid dimensions given block size = 16x16

	// given block size
	int block_dim_x = 16;
	int block_dim_y = 16;

	//calculate grid dimensions
	int grid_dim_x = my_ceil( (float) NJ / block_dim_x);
	int grid_dim_y = my_ceil( (float) NI / block_dim_y);

	printf("Block Size = %dx%d\n", block_dim_x, block_dim_y);
	printf("Calculated Grid Size = %dx%d\n", grid_dim_x, grid_dim_y);

	//         width, height
	dim3 dimGrid(grid_dim_x, grid_dim_x);
	dim3 dimBlock(block_dim_x, block_dim_y);

	// call GPU kernel
	hipEventRecord(start);
	convolutionKernel<<<dimGrid, dimBlock>>>(A_d, B_d, NJ, NI);
	hipEventRecord(stop);

	// transer matrix B from DEVICE to HOST
	hipMemcpy(B_h, B_d, size, hipMemcpyDeviceToHost);
	hipEventSynchronize(stop);
	float milliseconds = 0;
	hipEventElapsedTime(&milliseconds, start, stop);
	hipEventDestroy(start);
	hipEventDestroy(stop);
	printf("GPU Runtime: %0.6lf sec\n", milliseconds/1000.0);

	/* print kernel result */
	// printf("\nB kernel result:");
	// print_matrix(B_h, NJ, NI);

	// write results to file
	// for (int i = 0; i < NI*NJ; i++)
	// {
	// 	if(i%NJ==0)
	// 	fprintf(output, "%19.15f\n", B_h[i]);
	// }
	for (int i = 1; i < NI - 1; ++i) {
		for (int j = 1; j < NJ - 1; ++j) {
			//B[i*NJ + j]
			if(i%NJ/2==0)
			fprintf(output, "%19.15f\n", B_h[i*NJ + j]);
		}
	}

	/* 	for validation purposes
	 	lets calculate b using CPU convolution function and print it */
	// Convolution(A_h, B_h);
	// printf("\nB CPU result:");
	// print_matrix(B_h, NJ, NI);

	free(A_h);
	free(B_h);
	fclose(output);

	// free memory from device
	hipFree(A_d);
	hipFree(B_d);

	return 0;
}

	.text
	.file	"2D-Convolution.hip"
	.globl	_Z32__device_stub__convolutionKernelPdS_ii # -- Begin function _Z32__device_stub__convolutionKernelPdS_ii
	.type	_Z32__device_stub__convolutionKernelPdS_ii,@function
_Z32__device_stub__convolutionKernelPdS_ii: # @_Z32__device_stub__convolutionKernelPdS_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17convolutionKernelPdS_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z32__device_stub__convolutionKernelPdS_ii, .Lfunc_end0-_Z32__device_stub__convolutionKernelPdS_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z7my_ceilf                     # -- Begin function _Z7my_ceilf
	.type	_Z7my_ceilf,@function
_Z7my_ceilf:                            # @_Z7my_ceilf
	.cfi_startproc
# %bb.0:
	cvttss2si	%xmm0, %eax
	cvttps2dq	%xmm0, %xmm1
	cvtdq2ps	%xmm1, %xmm1
	cmpneqss	%xmm0, %xmm1
	movd	%xmm1, %ecx
	subl	%ecx, %eax
	retq
.Lfunc_end1:
	.size	_Z7my_ceilf, .Lfunc_end1-_Z7my_ceilf
	.cfi_endproc
                                        # -- End function
	.globl	_Z12print_matrixPdii            # -- Begin function _Z12print_matrixPdii
	.type	_Z12print_matrixPdii,@function
_Z12print_matrixPdii:                   # @_Z12print_matrixPdii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%edx, %ebp
	movl	%esi, %ebx
	movq	%rdi, 8(%rsp)                   # 8-byte Spill
	movl	$.L.str.1, %edi
	callq	puts@PLT
	testl	%ebp, %ebp
	jle	.LBB2_6
# %bb.1:                                # %.preheader.lr.ph
	movl	%ebp, %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	%ebx, %r12d
	xorl	%r13d, %r13d
	xorl	%ebp, %ebp
.LBB2_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_4 Depth 2
	testl	%ebx, %ebx
	jle	.LBB2_5
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB2_2 Depth=1
	movl	%r13d, %eax
	movq	8(%rsp), %rcx                   # 8-byte Reload
	leaq	(%rcx,%rax,8), %r14
	xorl	%r15d, %r15d
.LBB2_4:                                #   Parent Loop BB2_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movsd	(%r14,%r15,8), %xmm0            # xmm0 = mem[0],zero
	movl	$.L.str.2, %edi
	movb	$1, %al
	callq	printf
	incq	%r15
	cmpq	%r15, %r12
	jne	.LBB2_4
.LBB2_5:                                # %._crit_edge
                                        #   in Loop: Header=BB2_2 Depth=1
	movl	$.L.str.1, %edi
	callq	puts@PLT
	incq	%rbp
	addl	%ebx, %r13d
	cmpq	16(%rsp), %rbp                  # 8-byte Folded Reload
	jne	.LBB2_2
.LBB2_6:                                # %._crit_edge14
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z12print_matrixPdii, .Lfunc_end2-_Z12print_matrixPdii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z11ConvolutionPdS_
.LCPI3_0:
	.quad	0x3fc999999999999a              # double 0.20000000000000001
.LCPI3_1:
	.quad	0xbfd3333333333333              # double -0.29999999999999999
.LCPI3_2:
	.quad	0x3fd999999999999a              # double 0.40000000000000002
.LCPI3_3:
	.quad	0x3fe0000000000000              # double 0.5
.LCPI3_4:
	.quad	0x3fe3333333333333              # double 0.59999999999999998
.LCPI3_5:
	.quad	0x3fe6666666666666              # double 0.69999999999999996
.LCPI3_6:
	.quad	0xbfe999999999999a              # double -0.80000000000000004
.LCPI3_7:
	.quad	0xbfeccccccccccccd              # double -0.90000000000000002
.LCPI3_8:
	.quad	0x3fb999999999999a              # double 0.10000000000000001
	.text
	.globl	_Z11ConvolutionPdS_
	.type	_Z11ConvolutionPdS_,@function
_Z11ConvolutionPdS_:                    # @_Z11ConvolutionPdS_
	.cfi_startproc
# %bb.0:
	addq	$131088, %rdi                   # imm = 0x20010
	addq	$65544, %rsi                    # imm = 0x10008
	movl	$1, %eax
	movsd	.LCPI3_0(%rip), %xmm0           # xmm0 = mem[0],zero
	movsd	.LCPI3_1(%rip), %xmm1           # xmm1 = mem[0],zero
	movsd	.LCPI3_2(%rip), %xmm2           # xmm2 = mem[0],zero
	movsd	.LCPI3_3(%rip), %xmm3           # xmm3 = mem[0],zero
	movsd	.LCPI3_4(%rip), %xmm4           # xmm4 = mem[0],zero
	movsd	.LCPI3_5(%rip), %xmm5           # xmm5 = mem[0],zero
	movsd	.LCPI3_6(%rip), %xmm6           # xmm6 = mem[0],zero
	movsd	.LCPI3_7(%rip), %xmm7           # xmm7 = mem[0],zero
	movsd	.LCPI3_8(%rip), %xmm8           # xmm8 = mem[0],zero
	movl	$65536, %ecx                    # imm = 0x10000
.LBB3_1:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_2 Depth 2
	xorl	%edx, %edx
.LBB3_2:                                #   Parent Loop BB3_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movsd	-131088(%rdi,%rdx,8), %xmm9     # xmm9 = mem[0],zero
	mulsd	%xmm0, %xmm9
	movsd	-65552(%rdi,%rdx,8), %xmm10     # xmm10 = mem[0],zero
	mulsd	%xmm1, %xmm10
	addsd	%xmm9, %xmm10
	movsd	-16(%rdi,%rdx,8), %xmm9         # xmm9 = mem[0],zero
	mulsd	%xmm2, %xmm9
	addsd	%xmm10, %xmm9
	movsd	-131080(%rdi,%rdx,8), %xmm10    # xmm10 = mem[0],zero
	mulsd	%xmm3, %xmm10
	addsd	%xmm9, %xmm10
	movsd	-65544(%rdi,%rdx,8), %xmm9      # xmm9 = mem[0],zero
	mulsd	%xmm4, %xmm9
	addsd	%xmm10, %xmm9
	movsd	-8(%rdi,%rdx,8), %xmm10         # xmm10 = mem[0],zero
	mulsd	%xmm5, %xmm10
	addsd	%xmm9, %xmm10
	movsd	-131072(%rdi,%rdx,8), %xmm9     # xmm9 = mem[0],zero
	mulsd	%xmm6, %xmm9
	addsd	%xmm10, %xmm9
	movsd	-65536(%rdi,%rdx,8), %xmm10     # xmm10 = mem[0],zero
	mulsd	%xmm7, %xmm10
	addsd	%xmm9, %xmm10
	movsd	(%rdi,%rdx,8), %xmm9            # xmm9 = mem[0],zero
	mulsd	%xmm8, %xmm9
	addsd	%xmm10, %xmm9
	movsd	%xmm9, (%rsi,%rdx,8)
	incq	%rdx
	cmpq	$8190, %rdx                     # imm = 0x1FFE
	jne	.LBB3_2
# %bb.3:                                #   in Loop: Header=BB3_1 Depth=1
	incq	%rax
	addq	%rcx, %rdi
	addq	%rcx, %rsi
	cmpq	$8191, %rax                     # imm = 0x1FFF
	jne	.LBB3_1
# %bb.4:
	retq
.Lfunc_end3:
	.size	_Z11ConvolutionPdS_, .Lfunc_end3-_Z11ConvolutionPdS_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z4initPd
.LCPI4_0:
	.quad	0x41dfffffffc00000              # double 2147483647
	.text
	.globl	_Z4initPd
	.type	_Z4initPd,@function
_Z4initPd:                              # @_Z4initPd
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %rbx
	xorl	%r14d, %r14d
.LBB4_1:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_2 Depth 2
	xorl	%r15d, %r15d
.LBB4_2:                                #   Parent Loop BB4_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	movsd	.LCPI4_0(%rip), %xmm1           # xmm1 = mem[0],zero
	xorps	%xmm0, %xmm0
	cvtsi2sd	%eax, %xmm0
	divsd	%xmm1, %xmm0
	movsd	%xmm0, (%rbx,%r15,8)
	incq	%r15
	cmpq	$8192, %r15                     # imm = 0x2000
	jne	.LBB4_2
# %bb.3:                                #   in Loop: Header=BB4_1 Depth=1
	incq	%r14
	addq	$65536, %rbx                    # imm = 0x10000
	cmpq	$8192, %r14                     # imm = 0x2000
	jne	.LBB4_1
# %bb.4:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z4initPd, .Lfunc_end4-_Z4initPd
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI5_0:
	.quad	0x41dfffffffc00000              # double 2147483647
.LCPI5_1:
	.quad	0x408f400000000000              # double 1000
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$.L.str.3, %edi
	movl	$.L.str.4, %esi
	callq	fopen
	testq	%rax, %rax
	je	.LBB5_14
# %bb.1:
	movq	%rax, %rbx
	leaq	24(%rsp), %rdi
	callq	hipEventCreate
	leaq	8(%rsp), %rdi
	callq	hipEventCreate
	movl	$67108864, %edi                 # imm = 0x4000000
	movl	$8, %esi
	callq	calloc
	movq	%rax, %r14
	movl	$67108864, %edi                 # imm = 0x4000000
	movl	$8, %esi
	callq	calloc
	movq	%rax, %r15
	leaq	16(%rsp), %rdi
	movl	$536870912, %esi                # imm = 0x20000000
	callq	hipMalloc
	movq	%rsp, %rdi
	movl	$536870912, %esi                # imm = 0x20000000
	callq	hipMalloc
	xorl	%r12d, %r12d
	movq	%r14, %r13
.LBB5_2:                                # %.preheader.i
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB5_3 Depth 2
	xorl	%ebp, %ebp
.LBB5_3:                                #   Parent Loop BB5_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	movsd	.LCPI5_0(%rip), %xmm1           # xmm1 = mem[0],zero
	xorps	%xmm0, %xmm0
	cvtsi2sd	%eax, %xmm0
	divsd	%xmm1, %xmm0
	movsd	%xmm0, (%r13,%rbp,8)
	incq	%rbp
	cmpq	$8192, %rbp                     # imm = 0x2000
	jne	.LBB5_3
# %bb.4:                                #   in Loop: Header=BB5_2 Depth=1
	incq	%r12
	addq	$65536, %r13                    # imm = 0x10000
	cmpq	$8192, %r12                     # imm = 0x2000
	jne	.LBB5_2
# %bb.5:                                # %_Z4initPd.exit
	movq	16(%rsp), %rdi
	movl	$536870912, %edx                # imm = 0x20000000
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rsp), %rdi
	movl	$536870912, %edx                # imm = 0x20000000
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$.L.str.6, %edi
	movl	$16, %esi
	movl	$16, %edx
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.7, %edi
	movl	$512, %esi                      # imm = 0x200
	movl	$512, %edx                      # imm = 0x200
	xorl	%eax, %eax
	callq	printf
	movq	24(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movabsq	$2199023256064, %rdi            # imm = 0x20000000200
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_7
# %bb.6:
	movq	16(%rsp), %rdi
	movq	(%rsp), %rsi
	movl	$8192, %edx                     # imm = 0x2000
	movl	$8192, %ecx                     # imm = 0x2000
	callq	_Z32__device_stub__convolutionKernelPdS_ii
.LBB5_7:
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%rsp), %rsi
	movl	$536870912, %edx                # imm = 0x20000000
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	callq	hipEventSynchronize
	leaq	36(%rsp), %r12
	movl	$0, (%r12)
	movq	24(%rsp), %rsi
	movq	8(%rsp), %rdx
	movq	%r12, %rdi
	callq	hipEventElapsedTime
	movq	24(%rsp), %rdi
	callq	hipEventDestroy
	movq	8(%rsp), %rdi
	callq	hipEventDestroy
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r12), %xmm0
	divsd	.LCPI5_1(%rip), %xmm0
	movl	$.L.str.8, %edi
	movb	$1, %al
	callq	printf
	movq	%r15, %r12
	addq	$65544, %r12                    # imm = 0x10008
	movl	$1, %r13d
.LBB5_8:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB5_9 Depth 2
	xorl	%ebp, %ebp
.LBB5_9:                                #   Parent Loop BB5_8 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	cmpq	$1, %r13
	ja	.LBB5_11
# %bb.10:                               #   in Loop: Header=BB5_9 Depth=2
	movsd	(%r12,%rbp,8), %xmm0            # xmm0 = mem[0],zero
	movl	$.L.str.9, %esi
	movq	%rbx, %rdi
	movb	$1, %al
	callq	fprintf
.LBB5_11:                               #   in Loop: Header=BB5_9 Depth=2
	incq	%rbp
	cmpq	$8190, %rbp                     # imm = 0x1FFE
	jne	.LBB5_9
# %bb.12:                               #   in Loop: Header=BB5_8 Depth=1
	incq	%r13
	addq	$65536, %r12                    # imm = 0x10000
	cmpq	$8191, %r13                     # imm = 0x1FFF
	jne	.LBB5_8
# %bb.13:
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	movq	%rbx, %rdi
	callq	fclose
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB5_14:
	.cfi_def_cfa_offset 96
	movl	$.L.str.5, %edi
	xorl	%eax, %eax
	callq	printf
	movl	$1, %edi
	callq	exit
.Lfunc_end5:
	.size	main, .Lfunc_end5-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB6_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB6_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17convolutionKernelPdS_ii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end6:
	.size	__hip_module_ctor, .Lfunc_end6-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB7_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB7_2:
	retq
.Lfunc_end7:
	.size	__hip_module_dtor, .Lfunc_end7-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z17convolutionKernelPdS_ii,@object # @_Z17convolutionKernelPdS_ii
	.section	.rodata,"a",@progbits
	.globl	_Z17convolutionKernelPdS_ii
	.p2align	3, 0x0
_Z17convolutionKernelPdS_ii:
	.quad	_Z32__device_stub__convolutionKernelPdS_ii
	.size	_Z17convolutionKernelPdS_ii, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	" "
	.size	.L.str.1, 2

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"%- 3.2f   "
	.size	.L.str.2, 11

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"gpu.out"
	.size	.L.str.3, 8

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"w"
	.size	.L.str.4, 2

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Could not open file"
	.size	.L.str.5, 20

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Block Size = %dx%d\n"
	.size	.L.str.6, 20

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"Calculated Grid Size = %dx%d\n"
	.size	.L.str.7, 30

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"GPU Runtime: %0.6lf sec\n"
	.size	.L.str.8, 25

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"%19.15f\n"
	.size	.L.str.9, 9

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z17convolutionKernelPdS_ii"
	.size	.L__unnamed_1, 28

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z32__device_stub__convolutionKernelPdS_ii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z17convolutionKernelPdS_ii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z17convolutionKernelPdS_ii ; -- Begin function _Z17convolutionKernelPdS_ii
	.globl	_Z17convolutionKernelPdS_ii
	.p2align	8
	.type	_Z17convolutionKernelPdS_ii,@function
_Z17convolutionKernelPdS_ii:            ; @_Z17convolutionKernelPdS_ii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b64 s[8:9], s[0:1], 0x10
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_add_i32 s4, s8, -1
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_add_i32 s3, s9, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cmp_gt_i32_e32 vcc_lo, s8, v0
	v_cmp_gt_i32_e64 s4, s4, v0
	v_cmp_gt_i32_e64 s2, s9, v1
	v_cmp_gt_i32_e64 s3, s3, v1
	v_cmp_lt_i32_e64 s5, 0, v1
	v_cmp_lt_i32_e64 s6, 0, v0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	s_and_b32 s2, s2, vcc_lo
	s_and_b32 s3, s3, s4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_and_b32 s2, s2, s5
	s_and_b32 s3, s3, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_2
; %bb.1:
	v_lshlrev_b32_e32 v6, 13, v1
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v4, 31, v0
	s_mov_b32 s5, 0x3fc99999
	s_mov_b32 s4, 0x9999999a
	v_ashrrev_i32_e32 v3, 31, v6
	v_add_co_u32 v2, vcc_lo, v6, v0
	v_add_nc_u32_e32 v5, 0xffffe000, v6
	v_add_nc_u32_e32 v10, 0x2000, v6
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, v3, v4, vcc_lo
	v_add_nc_u32_e32 v6, v6, v0
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v7, 31, v6
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s0, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	v_lshlrev_b64 v[6:7], 3, v[6:7]
	global_load_b64 v[14:15], v[2:3], off offset:-8
	v_ashrrev_i32_e32 v3, 31, v5
	v_add_co_u32 v2, vcc_lo, v5, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v3, vcc_lo, v3, v4, vcc_lo
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	global_load_b64 v[16:17], v[2:3], off offset:-8
	v_ashrrev_i32_e32 v3, 31, v10
	v_add_co_u32 v2, vcc_lo, v10, v0
	v_add_nc_u32_e32 v10, v10, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, v3, v4, vcc_lo
	v_ashrrev_i32_e32 v11, 31, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	v_lshlrev_b64 v[10:11], 3, v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v2, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	global_load_b64 v[18:19], v[2:3], off offset:-8
	v_add_nc_u32_e32 v2, v5, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	v_add_co_u32 v6, vcc_lo, s0, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v7, vcc_lo
	global_load_b128 v[2:5], v[2:3], off
	v_add_co_u32 v10, vcc_lo, s0, v10
	global_load_b128 v[6:9], v[6:7], off
	v_add_co_ci_u32_e32 v11, vcc_lo, s1, v11, vcc_lo
	s_mov_b32 s1, 0xbfd33333
	s_mov_b32 s0, 0x33333333
	global_load_b128 v[10:13], v[10:11], off
	s_waitcnt vmcnt(5)
	v_mul_f64 v[14:15], v[14:15], s[0:1]
	s_mov_b32 s1, 0x3fe33333
	s_waitcnt vmcnt(4)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_fma_f64 v[14:15], v[16:17], s[4:5], v[14:15]
	s_mov_b32 s5, 0x3fd99999
	s_waitcnt vmcnt(3)
	v_fma_f64 v[14:15], v[18:19], s[4:5], v[14:15]
	s_mov_b32 s5, 0xbfe99999
	s_waitcnt vmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[2:3], v[2:3], 0.5, v[14:15]
	s_waitcnt vmcnt(1)
	v_fma_f64 v[2:3], v[6:7], s[0:1], v[2:3]
	s_mov_b32 s0, 0x66666666
	s_mov_b32 s1, 0x3fe66666
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_fma_f64 v[2:3], v[10:11], s[0:1], v[2:3]
	s_mov_b32 s0, 0xcccccccd
	s_mov_b32 s1, 0xbfeccccc
	v_fma_f64 v[2:3], v[4:5], s[4:5], v[2:3]
	s_mov_b32 s5, 0x3fb99999
	v_mad_u64_u32 v[4:5], null, v1, s8, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v5, 31, v4
	v_lshlrev_b64 v[0:1], 3, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	v_fma_f64 v[2:3], v[8:9], s[0:1], v[2:3]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[2:3], v[12:13], s[4:5], v[2:3]
	global_store_b64 v[0:1], v[2:3], off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17convolutionKernelPdS_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 20
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z17convolutionKernelPdS_ii, .Lfunc_end0-_Z17convolutionKernelPdS_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 748
; NumSgprs: 18
; NumVgprs: 20
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 20
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z17convolutionKernelPdS_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z17convolutionKernelPdS_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     20
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
