
#include "cuda_runtime.h"
#include "device_launch_parameters.h"

#include <stdio.h>
#include <stdlib.h>

cudaError_t addWithCuda(int *c, const int *a, const int *b, unsigned int size);

__global__ void addKernel(int *c, const int *a, const int *b)
{
    int i = threadIdx.x;
    c[i] = a[i] + b[i];
}

__device__ void idxToCoords(const int idx, int *row, int *col, int rows, int cols)
{
  *row = idx / rows;
  *col = idx % cols;
  return;
}

__device__ void coordsToIdx(const int row, const int col, int *idx, int rows, int cols)
{
  *idx = row * cols + col;
}

__global__ void conwayThread(char *oldState, char *newState, int rows, int cols)
{
  int idx = threadIdx.x + blockIdx.x * blockDim.x;
  //printf("This is thread %d\n", idx);
  if( idx >= rows * cols )
    return;

  int colIdx;
  int rowIdx;
  int newIdx;

  idxToCoords(idx, &rowIdx, &colIdx, rows, cols);
  coordsToIdx(rowIdx, colIdx, &newIdx, rows, cols);

  //printf("Block: %d, Blockdim: %d, Thread: %d, Overall %d: row %d, col %d, newIdx %d\n", blockIdx.x, blockDim.x, threadIdx.x, idx, rowIdx, colIdx, newIdx);

  int numLiveNeighbors = 0;
  int tempRow;
  int tempCol;
  int tempIdx;

  //__syncthreads();

  //printf("Thread: %d continuing\n", idx);

  if (colIdx != 0)
  {
    tempRow = rowIdx;
    tempCol = colIdx - 1;
    coordsToIdx(tempRow, tempCol, &tempIdx, rows, cols);
//    if(idx == 0)
//      printf("Checking %d - %d, %d\n", tempIdx, tempRow, tempCol);
    if (oldState[tempIdx] == 1)
      numLiveNeighbors++;
  }
  if (colIdx != 0 && rowIdx != 0)
  {
    tempRow = rowIdx - 1;
    tempCol = colIdx - 1;
    coordsToIdx(tempRow, tempCol, &tempIdx, rows, cols);
//    if(idx == 0)
//      printf("Checking %d - %d, %d\n", tempIdx, tempRow, tempCol);
    if (oldState[tempIdx] == 1)
      numLiveNeighbors++;
  }
  if (rowIdx != 0)
  {
    tempRow = rowIdx - 1;
    tempCol = colIdx;
    coordsToIdx(tempRow, tempCol, &tempIdx, rows, cols);
//    if(idx == 0)
//      printf("Checking %d - %d, %d\n", tempIdx, tempRow, tempCol);
    if (oldState[tempIdx] == 1)
      numLiveNeighbors++;
  }
  if (rowIdx != 0 && colIdx != cols - 1)
  {
    tempRow = rowIdx - 1;
    tempCol = colIdx + 1;
    coordsToIdx(tempRow, tempCol, &tempIdx, rows, cols);
//    if(idx == 0)
//      printf("Checking %d - %d, %d\n", tempIdx, tempRow, tempCol);
    if (oldState[tempIdx] == 1)
      numLiveNeighbors++;
  }
  if (colIdx != cols - 1)
  {
    tempRow = rowIdx;
    tempCol = colIdx + 1;
    coordsToIdx(tempRow, tempCol, &tempIdx, rows, cols);
//    if(idx == 0)
//      printf("Checking %d - %d, %d\n", tempIdx, tempRow, tempCol);
    if(oldState[tempIdx] == 1)
      numLiveNeighbors++;
  }
  if (colIdx != cols - 1 && rowIdx != rows - 1)
  {
    tempRow = rowIdx + 1;
    tempCol = colIdx + 1;
    coordsToIdx(tempRow, tempCol, &tempIdx, rows, cols);
//    if(idx == 0)
//      printf("Checking %d - %d, %d\n", tempIdx, tempRow, tempCol);
    if (oldState[tempIdx] == 1)
      numLiveNeighbors++;
  }
  if (rowIdx != rows - 1)
  {
    tempRow = rowIdx + 1;
    tempCol = colIdx;
    coordsToIdx(tempRow, tempCol, &tempIdx, rows, cols);
//    if(idx == 0)
//      printf("Checking %d - %d, %d\n", tempIdx, tempRow, tempCol);
    if (oldState[tempIdx] == 1)
      numLiveNeighbors++;
  }
  if (rowIdx != rows - 1 && colIdx != 0)
  {
    tempRow = rowIdx + 1;
    tempCol = colIdx - 1;
    coordsToIdx(tempRow, tempCol, &tempIdx, rows, cols);
//    if(idx == 0)
//      printf("Checking %d - %d, %d\n", tempIdx, tempRow, tempCol);
    if (oldState[tempIdx] == 1)
      numLiveNeighbors++;
  }

  if (oldState[idx] == 1)
  {
    if (numLiveNeighbors < 2 || numLiveNeighbors > 3)
    {
      newState[idx] = 0;
    }
    else
    {
      newState[idx] = 1;
    }
  }
  else
  {
    if (numLiveNeighbors == 3)
    {
      newState[idx] = 1;
    }
    else
    {
      newState[idx] = 0;
    }
  }
  //printf("Cell %d has %d live neighbors\n", idx, numLiveNeighbors);
}

void printBoard(char *board, int rows, int cols)
{
  int counter = 0;
  for(int i = 0; i < rows; i++)
  {
    for(int j = 0; j < cols; j++)
    {
      if(board[counter] == 0)
        printf("-");
      else
        printf("0");
      counter++;
    }
    printf("\n");
  }
  return;
}

int main()
{
    //const int arraySize = 5;
    //const int a[arraySize] = { 1, 2, 3, 4, 5 };
    //const int b[arraySize] = { 10, 20, 30, 40, 50 };
    //int c[arraySize] = { 0 };
    const int iterations = 100;
    const int rows = 256;
    const int cols = 256;
    const int boardSize = rows * cols;
    char prevState[boardSize];
    char nextState[boardSize];

    char *gpu_prevState = 0;
    char *gpu_nextState = 0;

    for(int i = 0; i < boardSize; i++)
      prevState[i] = rand() % 2;

    printf("Beginning state:\n");
    printBoard(prevState, rows, cols);

    cudaError_t errors;
    errors = cudaSetDevice(0);

    if (errors != cudaSuccess)
    {
      printf("Error setting device\n");
      exit(0);
    }

    errors = cudaMalloc((void **)&gpu_prevState, boardSize * sizeof(char));
    if (errors != cudaSuccess)
    {
      printf("Error allocating previous state\n");
      exit(0);
    }

    errors = cudaMalloc((void **)&gpu_nextState, boardSize * sizeof(char));
    if (errors != cudaSuccess)
    {
      printf("Error allocating next state\n");
      exit(0);
    }

    errors = cudaMemcpy(gpu_prevState, prevState, boardSize * sizeof(char), cudaMemcpyHostToDevice);
    if (errors != cudaSuccess)
    {
      printf("Error copying previous state\n");
      exit(0);
    }

    errors = cudaMemcpy(gpu_nextState, nextState, boardSize * sizeof(char), cudaMemcpyHostToDevice);
    if (errors != cudaSuccess)
    {
      printf("Error copying next state\n");
      exit(0);
    }
    for(int i = 0; i < iterations; i++)
    {
      printf("On iteration %d\n", i);
      conwayThread <<<64, 1024>>>(gpu_prevState, gpu_nextState, rows, cols);

      errors = cudaGetLastError();
      if (errors != cudaSuccess)
      {
        printf("Error launching kernel\n");
        exit(0);
      }

      errors = cudaDeviceSynchronize();
      if (errors != cudaSuccess)
      {
        printf("Error synchronizing device\n");
        exit(0);
      }

      cudaMemcpy(nextState, gpu_nextState, boardSize * sizeof(char), cudaMemcpyDeviceToHost);
      //printBoard(nextState, rows, cols);
      cudaMemcpy(gpu_prevState, nextState, boardSize * sizeof(char), cudaMemcpyHostToDevice);
    }

    printf("Final state\n");
    printBoard(nextState, rows, cols);


    // cudaDeviceReset must be called before exiting in order for profiling and
    // tracing tools such as Nsight and Visual Profiler to show complete traces.
    errors = cudaDeviceReset();
    if (errors != cudaSuccess) {
        fprintf(stderr, "cudaDeviceReset failed!");
        return 1;
    }

    return 0;
}

// Helper function for using CUDA to add vectors in parallel.
cudaError_t addWithCuda(int *c, const int *a, const int *b, unsigned int size)
{
    int *dev_a = 0;
    int *dev_b = 0;
    int *dev_c = 0;
    cudaError_t cudaStatus;

    // Choose which GPU to run on, change this on a multi-GPU system.
    cudaStatus = cudaSetDevice(0);
    if (cudaStatus != cudaSuccess) {
        fprintf(stderr, "cudaSetDevice failed!  Do you have a CUDA-capable GPU installed?");
        goto Error;
    }

    // Allocate GPU buffers for three vectors (two input, one output)    .
    cudaStatus = cudaMalloc((void**)&dev_c, size * sizeof(int));
    if (cudaStatus != cudaSuccess) {
        fprintf(stderr, "cudaMalloc failed!");
        goto Error;
    }

    cudaStatus = cudaMalloc((void**)&dev_a, size * sizeof(int));
    if (cudaStatus != cudaSuccess) {
        fprintf(stderr, "cudaMalloc failed!");
        goto Error;
    }

    cudaStatus = cudaMalloc((void**)&dev_b, size * sizeof(int));
    if (cudaStatus != cudaSuccess) {
        fprintf(stderr, "cudaMalloc failed!");
        goto Error;
    }

    // Copy input vectors from host memory to GPU buffers.
    cudaStatus = cudaMemcpy(dev_a, a, size * sizeof(int), cudaMemcpyHostToDevice);
    if (cudaStatus != cudaSuccess) {
        fprintf(stderr, "cudaMemcpy failed!");
        goto Error;
    }

    cudaStatus = cudaMemcpy(dev_b, b, size * sizeof(int), cudaMemcpyHostToDevice);
    if (cudaStatus != cudaSuccess) {
        fprintf(stderr, "cudaMemcpy failed!");
        goto Error;
    }

    // Launch a kernel on the GPU with one thread for each element.
    addKernel<<<1, size>>>(dev_c, dev_a, dev_b);

    // Check for any errors launching the kernel
    cudaStatus = cudaGetLastError();
    if (cudaStatus != cudaSuccess) {
        fprintf(stderr, "addKernel launch failed: %s\n", cudaGetErrorString(cudaStatus));
        goto Error;
    }
    
    // cudaDeviceSynchronize waits for the kernel to finish, and returns
    // any errors encountered during the launch.
    cudaStatus = cudaDeviceSynchronize();
    if (cudaStatus != cudaSuccess) {
        fprintf(stderr, "cudaDeviceSynchronize returned error code %d after launching addKernel!\n", cudaStatus);
        goto Error;
    }

    // Copy output vector from GPU buffer to host memory.
    cudaStatus = cudaMemcpy(c, dev_c, size * sizeof(int), cudaMemcpyDeviceToHost);
    if (cudaStatus != cudaSuccess) {
        fprintf(stderr, "cudaMemcpy failed!");
        goto Error;
    }

Error:
    cudaFree(dev_c);
    cudaFree(dev_a);
    cudaFree(dev_b);
    
    return cudaStatus;
}

	.file	"tmpxft_0037ee38_00000000-6_kernel.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2034:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2034:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z11idxToCoordsiPiS_ii
	.type	_Z11idxToCoordsiPiS_ii, @function
_Z11idxToCoordsiPiS_ii:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2027:
	.size	_Z11idxToCoordsiPiS_ii, .-_Z11idxToCoordsiPiS_ii
	.globl	_Z11coordsToIdxiiPiii
	.type	_Z11coordsToIdxiiPiii, @function
_Z11coordsToIdxiiPiii:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2028:
	.size	_Z11coordsToIdxiiPiii, .-_Z11coordsToIdxiiPiii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"-"
.LC1:
	.string	"0"
.LC2:
	.string	"\n"
	.text
	.globl	_Z10printBoardPcii
	.type	_Z10printBoardPcii, @function
_Z10printBoardPcii:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rdi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%edx, %ebx
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	movl	%esi, 12(%rsp)
.L7:
	movl	12(%rsp), %eax
	cmpl	%eax, %r12d
	jge	.L16
	xorl	%ebp, %ebp
	movslq	%r13d, %r15
.L11:
	cmpl	%ebp, %ebx
	jle	.L17
	leaq	(%r14,%r15), %rax
	leaq	.LC0(%rip), %rsi
	cmpb	$0, (%rax,%rbp)
	je	.L14
	leaq	.LC1(%rip), %rsi
.L14:
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%rbp
	call	__printf_chk@PLT
	jmp	.L11
.L17:
	xorl	%eax, %eax
	testl	%ebx, %ebx
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	cmovns	%ebx, %eax
	incl	%r12d
	addl	%eax, %r13d
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L7
.L16:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z10printBoardPcii, .-_Z10printBoardPcii
	.globl	_Z34__device_stub__Z9addKernelPiPKiS1_PiPKiS1_
	.type	_Z34__device_stub__Z9addKernelPiPKiS1_PiPKiS1_, @function
_Z34__device_stub__Z9addKernelPiPKiS1_PiPKiS1_:
.LFB2056:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L18
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z9addKernelPiPKiS1_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L18:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L20
	call	__stack_chk_fail@PLT
.L20:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2056:
	.size	_Z34__device_stub__Z9addKernelPiPKiS1_PiPKiS1_, .-_Z34__device_stub__Z9addKernelPiPKiS1_PiPKiS1_
	.globl	_Z9addKernelPiPKiS1_
	.type	_Z9addKernelPiPKiS1_, @function
_Z9addKernelPiPKiS1_:
.LFB2057:
	.cfi_startproc
	endbr64
	jmp	_Z34__device_stub__Z9addKernelPiPKiS1_PiPKiS1_
	.cfi_endproc
.LFE2057:
	.size	_Z9addKernelPiPKiS1_, .-_Z9addKernelPiPKiS1_
	.section	.rodata.str1.1
.LC3:
	.string	"cudaSetDevice failed!  Do you have a CUDA-capable GPU installed?"
.LC4:
	.string	"cudaMalloc failed!"
.LC5:
	.string	"cudaMemcpy failed!"
.LC6:
	.string	"addKernel launch failed: %s\n"
.LC7:
	.string	"cudaDeviceSynchronize returned error code %d after launching addKernel!\n"
	.text
	.globl	_Z11addWithCudaPiPKiS1_j
	.type	_Z11addWithCudaPiPKiS1_j, @function
_Z11addWithCudaPiPKiS1_j:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rsi, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rdx, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rdi, %r13
	xorl	%edi, %edi
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%ecx, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	xorl	%eax, %eax
	movq	%rax, 8(%rsp)
	movq	%rax, 16(%rsp)
	movq	%rax, 24(%rsp)
	call	cudaSetDevice@PLT
	leaq	.LC3(%rip), %rdx
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L38
	movl	%r12d, %ebp
	leaq	24(%rsp), %rdi
	salq	$2, %rbp
	movq	%rbp, %rsi
	call	cudaMalloc@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L41
	leaq	8(%rsp), %rdi
	movq	%rbp, %rsi
	call	cudaMalloc@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L41
	leaq	16(%rsp), %rdi
	movq	%rbp, %rsi
	call	cudaMalloc@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L28
.L41:
	leaq	.LC4(%rip), %rdx
	jmp	.L38
.L28:
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rdx
	movq	%r15, %rsi
	call	cudaMemcpy@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L39
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rdx
	movq	%r14, %rsi
	call	cudaMemcpy@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L39
	movl	%r12d, 44(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movq	%rdi, 48(%rsp)
	movl	52(%rsp), %ecx
	movq	44(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L31
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rsi
	movq	24(%rsp), %rdi
	call	_Z34__device_stub__Z9addKernelPiPKiS1_PiPKiS1_
.L31:
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L32
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	movq	stderr(%rip), %rdi
	movl	$2, %esi
	leaq	.LC6(%rip), %rdx
	movq	%rax, %rcx
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	jmp	.L25
.L32:
	call	cudaDeviceSynchronize@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L33
	movq	stderr(%rip), %rdi
	movl	%eax, %ecx
	movl	$2, %esi
	xorl	%eax, %eax
	leaq	.LC7(%rip), %rdx
	call	__fprintf_chk@PLT
	jmp	.L25
.L33:
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbp, %rdx
	movq	%r13, %rdi
	call	cudaMemcpy@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L25
.L39:
	leaq	.LC5(%rip), %rdx
.L38:
	movq	stderr(%rip), %rdi
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
.L25:
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L36
	call	__stack_chk_fail@PLT
.L36:
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	movl	%ebx, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2031:
	.size	_Z11addWithCudaPiPKiS1_j, .-_Z11addWithCudaPiPKiS1_j
	.globl	_Z36__device_stub__Z12conwayThreadPcS_iiPcS_ii
	.type	_Z36__device_stub__Z12conwayThreadPcS_iiPcS_ii, @function
_Z36__device_stub__Z12conwayThreadPcS_iiPcS_ii:
.LFB2058:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L42
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z12conwayThreadPcS_ii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L42:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L44
	call	__stack_chk_fail@PLT
.L44:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2058:
	.size	_Z36__device_stub__Z12conwayThreadPcS_iiPcS_ii, .-_Z36__device_stub__Z12conwayThreadPcS_iiPcS_ii
	.globl	_Z12conwayThreadPcS_ii
	.type	_Z12conwayThreadPcS_ii, @function
_Z12conwayThreadPcS_ii:
.LFB2059:
	.cfi_startproc
	endbr64
	jmp	_Z36__device_stub__Z12conwayThreadPcS_iiPcS_ii
	.cfi_endproc
.LFE2059:
	.size	_Z12conwayThreadPcS_ii, .-_Z12conwayThreadPcS_ii
	.section	.rodata.str1.1
.LC8:
	.string	"Beginning state:\n"
.LC9:
	.string	"Error setting device\n"
.LC10:
	.string	"Error allocating previous state\n"
.LC11:
	.string	"Error allocating next state\n"
.LC12:
	.string	"Error copying previous state\n"
.LC13:
	.string	"Error copying next state\n"
.LC14:
	.string	"On iteration %d\n"
.LC15:
	.string	"Error launching kernel\n"
.LC16:
	.string	"Error synchronizing device\n"
.LC17:
	.string	"Final state\n"
.LC18:
	.string	"cudaDeviceReset failed!"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	leaq	-131072(%rsp), %r11
	.cfi_def_cfa 11, 131104
.LPSRL0:
	subq	$4096, %rsp
	orq	$0, (%rsp)
	cmpq	%r11, %rsp
	jne	.LPSRL0
	.cfi_def_cfa_register 7
	subq	$48, %rsp
	.cfi_def_cfa_offset 131152
	xorl	%ebx, %ebx
	movl	$2, %r12d
	movq	%fs:40, %rax
	movq	%rax, 131112(%rsp)
	xorl	%eax, %eax
	xorl	%eax, %eax
	movq	%rax, (%rsp)
	movq	%rax, 8(%rsp)
.L48:
	call	rand@PLT
	leaq	40(%rsp), %rbp
	cltd
	idivl	%r12d
	movb	%dl, 40(%rsp,%rbx)
	incq	%rbx
	cmpq	$65536, %rbx
	jne	.L48
	leaq	.LC8(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$256, %esi
	movl	$256, %edx
	movq	%rbp, %rdi
	call	_Z10printBoardPcii
	xorl	%edi, %edi
	call	cudaSetDevice@PLT
	leaq	.LC9(%rip), %rsi
	testl	%eax, %eax
	jne	.L66
	movq	%rsp, %rdi
	movl	$65536, %esi
	call	cudaMalloc@PLT
	testl	%eax, %eax
	je	.L50
	leaq	.LC10(%rip), %rsi
.L66:
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	xorl	%edi, %edi
	call	exit@PLT
.L50:
	movl	$65536, %esi
	leaq	8(%rsp), %rdi
	call	cudaMalloc@PLT
	leaq	.LC11(%rip), %rsi
	testl	%eax, %eax
	jne	.L66
	movq	(%rsp), %rdi
	movq	%rbp, %rsi
	movl	$1, %ecx
	movl	$65536, %edx
	call	cudaMemcpy@PLT
	leaq	.LC12(%rip), %rsi
	testl	%eax, %eax
	jne	.L66
	movq	8(%rsp), %rdi
	leaq	65576(%rsp), %rbx
	movl	$1, %ecx
	xorl	%ebp, %ebp
	movq	%rbx, %rsi
	movl	$65536, %edx
	leaq	.LC14(%rip), %r12
	call	cudaMemcpy@PLT
	leaq	.LC13(%rip), %rsi
	testl	%eax, %eax
	jne	.L66
.L53:
	movl	%ebp, %edx
	movq	%r12, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$4194305, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$67108865, %edi
	salq	$10, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	salq	$6, %rdi
	movq	%rdx, 28(%rsp)
	movl	$1, 36(%rsp)
	movq	%rdi, 16(%rsp)
	movl	$1, 24(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L54
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	movl	$256, %ecx
	movl	$256, %edx
	call	_Z36__device_stub__Z12conwayThreadPcS_iiPcS_ii
.L54:
	call	cudaGetLastError@PLT
	testl	%eax, %eax
	je	.L55
	leaq	.LC15(%rip), %rsi
	jmp	.L66
.L55:
	call	cudaDeviceSynchronize@PLT
	testl	%eax, %eax
	je	.L56
	leaq	.LC16(%rip), %rsi
	jmp	.L66
.L56:
	movq	8(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	incl	%ebp
	movl	$65536, %edx
	call	cudaMemcpy@PLT
	movq	(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$65536, %edx
	call	cudaMemcpy@PLT
	cmpl	$100, %ebp
	jne	.L53
	leaq	.LC17(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$256, %edx
	movl	$256, %esi
	movq	%rbx, %rdi
	call	_Z10printBoardPcii
	call	cudaDeviceReset@PLT
	movl	%eax, %edx
	xorl	%eax, %eax
	testl	%edx, %edx
	je	.L47
	movq	stderr(%rip), %rdi
	leaq	.LC18(%rip), %rdx
	movl	$2, %esi
	call	__fprintf_chk@PLT
	movl	$1, %eax
.L47:
	movq	131112(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L58
	call	__stack_chk_fail@PLT
.L58:
	addq	$131120, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2030:
	.size	main, .-main
	.section	.rodata.str1.1
.LC19:
	.string	"_Z12conwayThreadPcS_ii"
.LC20:
	.string	"_Z9addKernelPiPKiS1_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2061:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC19(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z12conwayThreadPcS_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC20(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z9addKernelPiPKiS1_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2061:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include "hip/hip_runtime.h"


#include <stdio.h>
#include <stdlib.h>

hipError_t addWithCuda(int *c, const int *a, const int *b, unsigned int size);

__global__ void addKernel(int *c, const int *a, const int *b)
{
    int i = threadIdx.x;
    c[i] = a[i] + b[i];
}

__device__ void idxToCoords(const int idx, int *row, int *col, int rows, int cols)
{
  *row = idx / rows;
  *col = idx % cols;
  return;
}

__device__ void coordsToIdx(const int row, const int col, int *idx, int rows, int cols)
{
  *idx = row * cols + col;
}

__global__ void conwayThread(char *oldState, char *newState, int rows, int cols)
{
  int idx = threadIdx.x + blockIdx.x * blockDim.x;
  //printf("This is thread %d\n", idx);
  if( idx >= rows * cols )
    return;

  int colIdx;
  int rowIdx;
  int newIdx;

  idxToCoords(idx, &rowIdx, &colIdx, rows, cols);
  coordsToIdx(rowIdx, colIdx, &newIdx, rows, cols);

  //printf("Block: %d, Blockdim: %d, Thread: %d, Overall %d: row %d, col %d, newIdx %d\n", blockIdx.x, blockDim.x, threadIdx.x, idx, rowIdx, colIdx, newIdx);

  int numLiveNeighbors = 0;
  int tempRow;
  int tempCol;
  int tempIdx;

  //__syncthreads();

  //printf("Thread: %d continuing\n", idx);

  if (colIdx != 0)
  {
    tempRow = rowIdx;
    tempCol = colIdx - 1;
    coordsToIdx(tempRow, tempCol, &tempIdx, rows, cols);
//    if(idx == 0)
//      printf("Checking %d - %d, %d\n", tempIdx, tempRow, tempCol);
    if (oldState[tempIdx] == 1)
      numLiveNeighbors++;
  }
  if (colIdx != 0 && rowIdx != 0)
  {
    tempRow = rowIdx - 1;
    tempCol = colIdx - 1;
    coordsToIdx(tempRow, tempCol, &tempIdx, rows, cols);
//    if(idx == 0)
//      printf("Checking %d - %d, %d\n", tempIdx, tempRow, tempCol);
    if (oldState[tempIdx] == 1)
      numLiveNeighbors++;
  }
  if (rowIdx != 0)
  {
    tempRow = rowIdx - 1;
    tempCol = colIdx;
    coordsToIdx(tempRow, tempCol, &tempIdx, rows, cols);
//    if(idx == 0)
//      printf("Checking %d - %d, %d\n", tempIdx, tempRow, tempCol);
    if (oldState[tempIdx] == 1)
      numLiveNeighbors++;
  }
  if (rowIdx != 0 && colIdx != cols - 1)
  {
    tempRow = rowIdx - 1;
    tempCol = colIdx + 1;
    coordsToIdx(tempRow, tempCol, &tempIdx, rows, cols);
//    if(idx == 0)
//      printf("Checking %d - %d, %d\n", tempIdx, tempRow, tempCol);
    if (oldState[tempIdx] == 1)
      numLiveNeighbors++;
  }
  if (colIdx != cols - 1)
  {
    tempRow = rowIdx;
    tempCol = colIdx + 1;
    coordsToIdx(tempRow, tempCol, &tempIdx, rows, cols);
//    if(idx == 0)
//      printf("Checking %d - %d, %d\n", tempIdx, tempRow, tempCol);
    if(oldState[tempIdx] == 1)
      numLiveNeighbors++;
  }
  if (colIdx != cols - 1 && rowIdx != rows - 1)
  {
    tempRow = rowIdx + 1;
    tempCol = colIdx + 1;
    coordsToIdx(tempRow, tempCol, &tempIdx, rows, cols);
//    if(idx == 0)
//      printf("Checking %d - %d, %d\n", tempIdx, tempRow, tempCol);
    if (oldState[tempIdx] == 1)
      numLiveNeighbors++;
  }
  if (rowIdx != rows - 1)
  {
    tempRow = rowIdx + 1;
    tempCol = colIdx;
    coordsToIdx(tempRow, tempCol, &tempIdx, rows, cols);
//    if(idx == 0)
//      printf("Checking %d - %d, %d\n", tempIdx, tempRow, tempCol);
    if (oldState[tempIdx] == 1)
      numLiveNeighbors++;
  }
  if (rowIdx != rows - 1 && colIdx != 0)
  {
    tempRow = rowIdx + 1;
    tempCol = colIdx - 1;
    coordsToIdx(tempRow, tempCol, &tempIdx, rows, cols);
//    if(idx == 0)
//      printf("Checking %d - %d, %d\n", tempIdx, tempRow, tempCol);
    if (oldState[tempIdx] == 1)
      numLiveNeighbors++;
  }

  if (oldState[idx] == 1)
  {
    if (numLiveNeighbors < 2 || numLiveNeighbors > 3)
    {
      newState[idx] = 0;
    }
    else
    {
      newState[idx] = 1;
    }
  }
  else
  {
    if (numLiveNeighbors == 3)
    {
      newState[idx] = 1;
    }
    else
    {
      newState[idx] = 0;
    }
  }
  //printf("Cell %d has %d live neighbors\n", idx, numLiveNeighbors);
}

void printBoard(char *board, int rows, int cols)
{
  int counter = 0;
  for(int i = 0; i < rows; i++)
  {
    for(int j = 0; j < cols; j++)
    {
      if(board[counter] == 0)
        printf("-");
      else
        printf("0");
      counter++;
    }
    printf("\n");
  }
  return;
}

int main()
{
    //const int arraySize = 5;
    //const int a[arraySize] = { 1, 2, 3, 4, 5 };
    //const int b[arraySize] = { 10, 20, 30, 40, 50 };
    //int c[arraySize] = { 0 };
    const int iterations = 100;
    const int rows = 256;
    const int cols = 256;
    const int boardSize = rows * cols;
    char prevState[boardSize];
    char nextState[boardSize];

    char *gpu_prevState = 0;
    char *gpu_nextState = 0;

    for(int i = 0; i < boardSize; i++)
      prevState[i] = rand() % 2;

    printf("Beginning state:\n");
    printBoard(prevState, rows, cols);

    hipError_t errors;
    errors = hipSetDevice(0);

    if (errors != hipSuccess)
    {
      printf("Error setting device\n");
      exit(0);
    }

    errors = hipMalloc((void **)&gpu_prevState, boardSize * sizeof(char));
    if (errors != hipSuccess)
    {
      printf("Error allocating previous state\n");
      exit(0);
    }

    errors = hipMalloc((void **)&gpu_nextState, boardSize * sizeof(char));
    if (errors != hipSuccess)
    {
      printf("Error allocating next state\n");
      exit(0);
    }

    errors = hipMemcpy(gpu_prevState, prevState, boardSize * sizeof(char), hipMemcpyHostToDevice);
    if (errors != hipSuccess)
    {
      printf("Error copying previous state\n");
      exit(0);
    }

    errors = hipMemcpy(gpu_nextState, nextState, boardSize * sizeof(char), hipMemcpyHostToDevice);
    if (errors != hipSuccess)
    {
      printf("Error copying next state\n");
      exit(0);
    }
    for(int i = 0; i < iterations; i++)
    {
      printf("On iteration %d\n", i);
      conwayThread <<<64, 1024>>>(gpu_prevState, gpu_nextState, rows, cols);

      errors = hipGetLastError();
      if (errors != hipSuccess)
      {
        printf("Error launching kernel\n");
        exit(0);
      }

      errors = hipDeviceSynchronize();
      if (errors != hipSuccess)
      {
        printf("Error synchronizing device\n");
        exit(0);
      }

      hipMemcpy(nextState, gpu_nextState, boardSize * sizeof(char), hipMemcpyDeviceToHost);
      //printBoard(nextState, rows, cols);
      hipMemcpy(gpu_prevState, nextState, boardSize * sizeof(char), hipMemcpyHostToDevice);
    }

    printf("Final state\n");
    printBoard(nextState, rows, cols);


    // cudaDeviceReset must be called before exiting in order for profiling and
    // tracing tools such as Nsight and Visual Profiler to show complete traces.
    errors = hipDeviceReset();
    if (errors != hipSuccess) {
        fprintf(stderr, "hipDeviceReset failed!");
        return 1;
    }

    return 0;
}

// Helper function for using CUDA to add vectors in parallel.
hipError_t addWithCuda(int *c, const int *a, const int *b, unsigned int size)
{
    int *dev_a = 0;
    int *dev_b = 0;
    int *dev_c = 0;
    hipError_t cudaStatus;

    // Choose which GPU to run on, change this on a multi-GPU system.
    cudaStatus = hipSetDevice(0);
    if (cudaStatus != hipSuccess) {
        fprintf(stderr, "hipSetDevice failed!  Do you have a CUDA-capable GPU installed?");
        goto Error;
    }

    // Allocate GPU buffers for three vectors (two input, one output)    .
    cudaStatus = hipMalloc((void**)&dev_c, size * sizeof(int));
    if (cudaStatus != hipSuccess) {
        fprintf(stderr, "hipMalloc failed!");
        goto Error;
    }

    cudaStatus = hipMalloc((void**)&dev_a, size * sizeof(int));
    if (cudaStatus != hipSuccess) {
        fprintf(stderr, "hipMalloc failed!");
        goto Error;
    }

    cudaStatus = hipMalloc((void**)&dev_b, size * sizeof(int));
    if (cudaStatus != hipSuccess) {
        fprintf(stderr, "hipMalloc failed!");
        goto Error;
    }

    // Copy input vectors from host memory to GPU buffers.
    cudaStatus = hipMemcpy(dev_a, a, size * sizeof(int), hipMemcpyHostToDevice);
    if (cudaStatus != hipSuccess) {
        fprintf(stderr, "hipMemcpy failed!");
        goto Error;
    }

    cudaStatus = hipMemcpy(dev_b, b, size * sizeof(int), hipMemcpyHostToDevice);
    if (cudaStatus != hipSuccess) {
        fprintf(stderr, "hipMemcpy failed!");
        goto Error;
    }

    // Launch a kernel on the GPU with one thread for each element.
    addKernel<<<1, size>>>(dev_c, dev_a, dev_b);

    // Check for any errors launching the kernel
    cudaStatus = hipGetLastError();
    if (cudaStatus != hipSuccess) {
        fprintf(stderr, "addKernel launch failed: %s\n", hipGetErrorString(cudaStatus));
        goto Error;
    }
    
    // cudaDeviceSynchronize waits for the kernel to finish, and returns
    // any errors encountered during the launch.
    cudaStatus = hipDeviceSynchronize();
    if (cudaStatus != hipSuccess) {
        fprintf(stderr, "hipDeviceSynchronize returned error code %d after launching addKernel!\n", cudaStatus);
        goto Error;
    }

    // Copy output vector from GPU buffer to host memory.
    cudaStatus = hipMemcpy(c, dev_c, size * sizeof(int), hipMemcpyDeviceToHost);
    if (cudaStatus != hipSuccess) {
        fprintf(stderr, "hipMemcpy failed!");
        goto Error;
    }

Error:
    hipFree(dev_c);
    hipFree(dev_a);
    hipFree(dev_b);
    
    return cudaStatus;
}

	.text
	.file	"kernel.hip"
	.globl	_Z24__device_stub__addKernelPiPKiS1_ # -- Begin function _Z24__device_stub__addKernelPiPKiS1_
	.type	_Z24__device_stub__addKernelPiPKiS1_,@function
_Z24__device_stub__addKernelPiPKiS1_:   # @_Z24__device_stub__addKernelPiPKiS1_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9addKernelPiPKiS1_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z24__device_stub__addKernelPiPKiS1_, .Lfunc_end0-_Z24__device_stub__addKernelPiPKiS1_
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__conwayThreadPcS_ii # -- Begin function _Z27__device_stub__conwayThreadPcS_ii
	.type	_Z27__device_stub__conwayThreadPcS_ii,@function
_Z27__device_stub__conwayThreadPcS_ii:  # @_Z27__device_stub__conwayThreadPcS_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12conwayThreadPcS_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z27__device_stub__conwayThreadPcS_ii, .Lfunc_end1-_Z27__device_stub__conwayThreadPcS_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z10printBoardPcii              # -- Begin function _Z10printBoardPcii
	.type	_Z10printBoardPcii,@function
_Z10printBoardPcii:                     # @_Z10printBoardPcii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%edx, 8(%rsp)                   # 4-byte Spill
	movq	%rdi, 16(%rsp)                  # 8-byte Spill
	movl	%esi, 12(%rsp)                  # 4-byte Spill
	testl	%esi, %esi
	jle	.LBB2_6
# %bb.1:                                # %.preheader.lr.ph
	xorl	%r15d, %r15d
	movl	8(%rsp), %eax                   # 4-byte Reload
	testl	%eax, %eax
	movl	$0, %r12d
	cmovgl	%eax, %r12d
	movl	%eax, %r13d
	xorl	%r14d, %r14d
.LBB2_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_4 Depth 2
	cmpl	$0, 8(%rsp)                     # 4-byte Folded Reload
	jle	.LBB2_5
# %bb.3:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB2_2 Depth=1
	movslq	%r15d, %rbp
	addq	16(%rsp), %rbp                  # 8-byte Folded Reload
	xorl	%ebx, %ebx
.LBB2_4:                                # %.lr.ph
                                        #   Parent Loop BB2_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorl	%eax, %eax
	cmpb	$0, (%rbp,%rbx)
	setne	%al
	leal	(%rax,%rax,2), %edi
	addl	$45, %edi
	callq	putchar@PLT
	incq	%rbx
	cmpl	%ebx, %r13d
	jne	.LBB2_4
.LBB2_5:                                # %._crit_edge
                                        #   in Loop: Header=BB2_2 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incl	%r14d
	addl	%r12d, %r15d
	cmpl	12(%rsp), %r14d                 # 4-byte Folded Reload
	jne	.LBB2_2
.LBB2_6:                                # %._crit_edge16
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z10printBoardPcii, .Lfunc_end2-_Z10printBoardPcii
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$131096, %rsp                   # imm = 0x20018
	.cfi_def_cfa_offset 131136
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	xorl	%ebx, %ebx
	movq	%rbx, 8(%rsp)
	movq	%rbx, (%rsp)
.LBB3_1:                                # =>This Inner Loop Header: Depth=1
	callq	rand
	movl	%eax, %ecx
	shrl	$31, %ecx
	addl	%eax, %ecx
	andl	$254, %ecx
	subl	%ecx, %eax
	movb	%al, 65552(%rsp,%rbx)
	incq	%rbx
	cmpq	$65536, %rbx                    # imm = 0x10000
	jne	.LBB3_1
# %bb.2:
	movl	$.Lstr, %edi
	callq	puts@PLT
	leaq	65552(%rsp), %rdi
	movl	$256, %esi                      # imm = 0x100
	movl	$256, %edx                      # imm = 0x100
	callq	_Z10printBoardPcii
	xorl	%edi, %edi
	callq	hipSetDevice
	testl	%eax, %eax
	jne	.LBB3_3
# %bb.5:
	leaq	8(%rsp), %rdi
	movl	$65536, %esi                    # imm = 0x10000
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB3_6
# %bb.7:
	movq	%rsp, %rdi
	movl	$65536, %esi                    # imm = 0x10000
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB3_8
# %bb.9:
	movq	8(%rsp), %rdi
	leaq	65552(%rsp), %rsi
	movl	$65536, %edx                    # imm = 0x10000
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB3_10
# %bb.11:
	movq	(%rsp), %rdi
	leaq	16(%rsp), %rsi
	movl	$65536, %edx                    # imm = 0x10000
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB3_17
# %bb.12:                               # %.preheader.preheader
	movabsq	$4294967360, %rbx               # imm = 0x100000040
	leaq	960(%rbx), %r14
	leaq	16(%rsp), %r15
	xorl	%ebp, %ebp
.LBB3_13:                               # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	movl	$.L.str.9, %edi
	movl	%ebp, %esi
	xorl	%eax, %eax
	callq	printf
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_15
# %bb.14:                               #   in Loop: Header=BB3_13 Depth=1
	movq	8(%rsp), %rdi
	movq	(%rsp), %rsi
	movl	$256, %edx                      # imm = 0x100
	movl	$256, %ecx                      # imm = 0x100
	callq	_Z27__device_stub__conwayThreadPcS_ii
.LBB3_15:                               #   in Loop: Header=BB3_13 Depth=1
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB3_16
# %bb.18:                               #   in Loop: Header=BB3_13 Depth=1
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB3_19
# %bb.20:                               #   in Loop: Header=BB3_13 Depth=1
	movq	(%rsp), %rsi
	movl	$65536, %edx                    # imm = 0x10000
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	movl	$65536, %edx                    # imm = 0x10000
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	incl	%ebp
	cmpl	$100, %ebp
	jne	.LBB3_13
# %bb.21:
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	leaq	16(%rsp), %rdi
	movl	$256, %esi                      # imm = 0x100
	movl	$256, %edx                      # imm = 0x100
	callq	_Z10printBoardPcii
	callq	hipDeviceReset
	movl	%eax, %ecx
	xorl	%eax, %eax
	testl	%ecx, %ecx
	jne	.LBB3_22
.LBB3_23:
	addq	$131096, %rsp                   # imm = 0x20018
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB3_22:
	.cfi_def_cfa_offset 131136
	movq	stderr(%rip), %rcx
	movl	$.L.str.13, %edi
	movl	$22, %esi
	movl	$1, %edx
	callq	fwrite@PLT
	movl	$1, %eax
	jmp	.LBB3_23
.LBB3_19:
	movl	$.Lstr.2, %edi
	jmp	.LBB3_4
.LBB3_16:
	movl	$.Lstr.3, %edi
.LBB3_4:
	callq	puts@PLT
	xorl	%edi, %edi
	callq	exit
.LBB3_3:
	movl	$.Lstr.8, %edi
	jmp	.LBB3_4
.LBB3_6:
	movl	$.Lstr.7, %edi
	jmp	.LBB3_4
.LBB3_8:
	movl	$.Lstr.6, %edi
	jmp	.LBB3_4
.LBB3_10:
	movl	$.Lstr.5, %edi
	jmp	.LBB3_4
.LBB3_17:
	movl	$.Lstr.4, %edi
	jmp	.LBB3_4
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
                                        # -- End function
	.globl	_Z11addWithCudaPiPKiS1_j        # -- Begin function _Z11addWithCudaPiPKiS1_j
	.type	_Z11addWithCudaPiPKiS1_j,@function
_Z11addWithCudaPiPKiS1_j:               # @_Z11addWithCudaPiPKiS1_j
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%ecx, %r15d
	movq	%rdx, %r13
	movq	%rsi, %rbp
	movq	%rdi, %r14
	xorl	%eax, %eax
	movq	%rax, 16(%rsp)
	movq	%rax, 8(%rsp)
	movq	%rax, (%rsp)
	xorl	%edi, %edi
	callq	hipSetDevice
	testl	%eax, %eax
	jne	.LBB4_1
# %bb.2:
	movl	%r15d, %r12d
	leaq	(,%r12,4), %r15
	movq	%rsp, %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB4_3
# %bb.6:
	leaq	16(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB4_3
# %bb.7:
	leaq	8(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB4_3
# %bb.8:
	movq	16(%rsp), %rdi
	movq	%rbp, %rsi
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB4_9
# %bb.10:
	movq	8(%rsp), %rdi
	movq	%r13, %rsi
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB4_9
# %bb.11:
	btsq	$32, %r12
	movabsq	$4294967296, %rdi               # imm = 0x100000000
	orq	$1, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_13
# %bb.12:
	movq	(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	callq	_Z24__device_stub__addKernelPiPKiS1_
.LBB4_13:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB4_14
# %bb.15:
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB4_16
# %bb.17:
	movq	(%rsp), %rsi
	movq	%r14, %rdi
	movq	%r15, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	xorl	%ebx, %ebx
	testl	%eax, %eax
	je	.LBB4_19
# %bb.18:
	movl	%eax, %ebp
	movq	stderr(%rip), %rcx
	movl	$.L.str.16, %edi
	movl	$17, %esi
	movl	$1, %edx
	callq	fwrite@PLT
	movl	%ebp, %ebx
	jmp	.LBB4_19
.LBB4_3:
	movl	%eax, %ebx
	movq	stderr(%rip), %rcx
	movl	$.L.str.15, %edi
	jmp	.LBB4_4
.LBB4_9:
	movl	%eax, %ebx
	movq	stderr(%rip), %rcx
	movl	$.L.str.16, %edi
.LBB4_4:
	movl	$17, %esi
.LBB4_5:
	movl	$1, %edx
	callq	fwrite@PLT
.LBB4_19:
	movq	(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movl	%ebx, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB4_1:
	.cfi_def_cfa_offset 80
	movl	%eax, %ebx
	movq	stderr(%rip), %rcx
	movl	$.L.str.14, %edi
	movl	$63, %esi
	jmp	.LBB4_5
.LBB4_14:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.17, %esi
	movq	%r14, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB4_19
.LBB4_16:
	movl	%eax, %ebx
	movq	stderr(%rip), %rdi
	movl	$.L.str.18, %esi
	movl	%eax, %edx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB4_19
.Lfunc_end4:
	.size	_Z11addWithCudaPiPKiS1_j, .Lfunc_end4-_Z11addWithCudaPiPKiS1_j
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9addKernelPiPKiS1_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12conwayThreadPcS_ii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z9addKernelPiPKiS1_,@object    # @_Z9addKernelPiPKiS1_
	.section	.rodata,"a",@progbits
	.globl	_Z9addKernelPiPKiS1_
	.p2align	3, 0x0
_Z9addKernelPiPKiS1_:
	.quad	_Z24__device_stub__addKernelPiPKiS1_
	.size	_Z9addKernelPiPKiS1_, 8

	.type	_Z12conwayThreadPcS_ii,@object  # @_Z12conwayThreadPcS_ii
	.globl	_Z12conwayThreadPcS_ii
	.p2align	3, 0x0
_Z12conwayThreadPcS_ii:
	.quad	_Z27__device_stub__conwayThreadPcS_ii
	.size	_Z12conwayThreadPcS_ii, 8

	.type	.L.str.9,@object                # @.str.9
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.9:
	.asciz	"On iteration %d\n"
	.size	.L.str.9, 17

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	"hipDeviceReset failed!"
	.size	.L.str.13, 23

	.type	.L.str.14,@object               # @.str.14
.L.str.14:
	.asciz	"hipSetDevice failed!  Do you have a CUDA-capable GPU installed?"
	.size	.L.str.14, 64

	.type	.L.str.15,@object               # @.str.15
.L.str.15:
	.asciz	"hipMalloc failed!"
	.size	.L.str.15, 18

	.type	.L.str.16,@object               # @.str.16
.L.str.16:
	.asciz	"hipMemcpy failed!"
	.size	.L.str.16, 18

	.type	.L.str.17,@object               # @.str.17
.L.str.17:
	.asciz	"addKernel launch failed: %s\n"
	.size	.L.str.17, 29

	.type	.L.str.18,@object               # @.str.18
.L.str.18:
	.asciz	"hipDeviceSynchronize returned error code %d after launching addKernel!\n"
	.size	.L.str.18, 72

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z9addKernelPiPKiS1_"
	.size	.L__unnamed_1, 21

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z12conwayThreadPcS_ii"
	.size	.L__unnamed_2, 23

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Beginning state:"
	.size	.Lstr, 17

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"Final state"
	.size	.Lstr.1, 12

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"Error synchronizing device"
	.size	.Lstr.2, 27

	.type	.Lstr.3,@object                 # @str.3
.Lstr.3:
	.asciz	"Error launching kernel"
	.size	.Lstr.3, 23

	.type	.Lstr.4,@object                 # @str.4
.Lstr.4:
	.asciz	"Error copying next state"
	.size	.Lstr.4, 25

	.type	.Lstr.5,@object                 # @str.5
.Lstr.5:
	.asciz	"Error copying previous state"
	.size	.Lstr.5, 29

	.type	.Lstr.6,@object                 # @str.6
.Lstr.6:
	.asciz	"Error allocating next state"
	.size	.Lstr.6, 28

	.type	.Lstr.7,@object                 # @str.7
.Lstr.7:
	.asciz	"Error allocating previous state"
	.size	.Lstr.7, 32

	.type	.Lstr.8,@object                 # @str.8
.Lstr.8:
	.asciz	"Error setting device"
	.size	.Lstr.8, 21

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z24__device_stub__addKernelPiPKiS1_
	.addrsig_sym _Z27__device_stub__conwayThreadPcS_ii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z9addKernelPiPKiS1_
	.addrsig_sym _Z12conwayThreadPcS_ii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z9addKernelPiPKiS1_    ; -- Begin function _Z9addKernelPiPKiS1_
	.globl	_Z9addKernelPiPKiS1_
	.p2align	8
	.type	_Z9addKernelPiPKiS1_,@function
_Z9addKernelPiPKiS1_:                   ; @_Z9addKernelPiPKiS1_
; %bb.0:
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	v_lshlrev_b32_e32 v0, 2, v0
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b32 v1, v0, s[6:7]
	global_load_b32 v2, v0, s[0:1]
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v1, v2, v1
	global_store_b32 v0, v1, s[4:5]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9addKernelPiPKiS1_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 24
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 3
		.amdhsa_next_free_sgpr 8
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z9addKernelPiPKiS1_, .Lfunc_end0-_Z9addKernelPiPKiS1_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 76
; NumSgprs: 8
; NumVgprs: 3
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 8
; NumVGPRsForWavesPerEU: 3
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z12conwayThreadPcS_ii  ; -- Begin function _Z12conwayThreadPcS_ii
	.globl	_Z12conwayThreadPcS_ii
	.p2align	8
	.type	_Z12conwayThreadPcS_ii,@function
_Z12conwayThreadPcS_ii:                 ; @_Z12conwayThreadPcS_ii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b64 s[8:9], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mul_i32 s2, s9, s8
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cmp_gt_i32_e32 vcc_lo, s2, v1
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB1_28
; %bb.1:
	s_ashr_i32 s4, s9, 31
	s_ashr_i32 s2, s8, 31
	s_add_i32 s5, s9, s4
	s_add_i32 s3, s8, s2
	s_xor_b32 s4, s5, s4
	s_xor_b32 s3, s3, s2
	v_cvt_f32_u32_e32 v2, s4
	v_cvt_f32_u32_e32 v0, s3
	s_sub_i32 s5, 0, s3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v2, v2
	v_rcp_iflag_f32_e32 v0, v0
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v2, 0x4f7ffffe, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cvt_u32_f32_e32 v3, v2
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	v_ashrrev_i32_e32 v2, 31, v1
	v_cvt_u32_f32_e32 v0, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v6, v1, v2
	v_mul_lo_u32 v4, s5, v0
	s_sub_i32 s5, 0, s4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v6, v6, v2
	v_mul_lo_u32 v5, s5, v3
	v_mul_hi_u32 v4, v0, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v5, v3, v5
	v_add_nc_u32_e32 v0, v0, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v3, v5
	v_mul_hi_u32 v0, v6, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v6, v3
	v_mul_lo_u32 v4, v0, s3
	v_add_nc_u32_e32 v5, 1, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v3, v3, s4
	v_sub_nc_u32_e32 v4, v6, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v3, v6, v3
	v_subrev_nc_u32_e32 v6, s3, v4
	v_cmp_le_u32_e32 vcc_lo, s3, v4
	v_cndmask_b32_e32 v0, v0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_subrev_nc_u32_e32 v5, s4, v3
	v_cndmask_b32_e32 v4, v4, v6, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s4, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_cndmask_b32 v3, v3, v5 :: v_dual_add_nc_u32 v6, 1, v0
	v_cmp_le_u32_e32 vcc_lo, s3, v4
	v_xor_b32_e32 v5, s2, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_subrev_nc_u32_e32 v4, s4, v3
	v_cndmask_b32_e32 v0, v0, v6, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s4, v3
	s_load_b128 s[4:7], s[0:1], 0x0
	s_mov_b32 s0, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v0, v0, v5
	v_cndmask_b32_e32 v3, v3, v4, vcc_lo
	v_sub_nc_u32_e32 v5, v0, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v0, v3, v2
	v_mov_b32_e32 v3, 0
	v_mul_lo_u32 v6, v5, s9
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v0, v0, v2
	v_ashrrev_i32_e32 v4, 31, v0
	s_delay_alu instid0(VALU_DEP_3)
	v_ashrrev_i32_e32 v7, 31, v6
	v_cmpx_ne_u32_e32 0, v0
	s_cbranch_execz .LBB1_3
; %bb.2:
	v_add_co_u32 v3, vcc_lo, v0, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, v4, v7, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v8, vcc_lo, s4, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, s5, v9, vcc_lo
	global_load_u8 v3, v[8:9], off offset:-1
	s_waitcnt vmcnt(0)
	v_cmp_eq_u16_e32 vcc_lo, 1, v3
	v_cndmask_b32_e64 v3, 0, 1, vcc_lo
.LBB1_3:
	s_or_b32 exec_lo, exec_lo, s0
	v_cmp_ne_u32_e32 vcc_lo, 0, v0
	v_cmp_ne_u32_e64 s0, 0, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, s0, vcc_lo
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_5
; %bb.4:
	v_subrev_nc_u32_e32 v8, s9, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v9, 31, v8
	v_add_co_u32 v8, s0, v0, v8
	v_add_co_ci_u32_e64 v9, s0, v4, v9, s0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v8, s0, s4, v8
	v_add_co_ci_u32_e64 v9, s0, s5, v9, s0
	global_load_u8 v8, v[8:9], off offset:-1
	s_waitcnt vmcnt(0)
	v_cmp_eq_u16_e64 s0, 1, v8
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v3, s0, 0, v3, s0
.LBB1_5:
	s_or_b32 exec_lo, exec_lo, s1
	v_cmp_eq_u32_e64 s1, 0, v5
	v_add_nc_u32_e32 v8, -1, v5
	s_mov_b32 s2, exec_lo
	v_cmpx_ne_u32_e32 0, v5
	s_cbranch_execz .LBB1_7
; %bb.6:
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[9:10], null, v8, s9, v[0:1]
	v_ashrrev_i32_e32 v10, 31, v9
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v9, s0, s4, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v10, s0, s5, v10, s0
	global_load_u8 v9, v[9:10], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u16_e64 s0, 1, v9
	v_add_co_ci_u32_e64 v3, s0, 0, v3, s0
.LBB1_7:
	s_or_b32 exec_lo, exec_lo, s2
	s_add_i32 s2, s9, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_eq_u32_e64 s0, s2, v0
	v_cmp_ne_u32_e64 s2, s2, v0
	s_or_b32 s1, s1, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s1, s1, -1
	s_and_saveexec_b32 s3, s1
	s_cbranch_execz .LBB1_9
; %bb.8:
	v_mul_lo_u32 v8, v8, s9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v9, 31, v8
	v_add_co_u32 v8, s1, v0, v8
	v_add_co_ci_u32_e64 v9, s1, v4, v9, s1
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v8, s1, s4, v8
	v_add_co_ci_u32_e64 v9, s1, s5, v9, s1
	global_load_u8 v8, v[8:9], off offset:1
	s_waitcnt vmcnt(0)
	v_cmp_eq_u16_e64 s1, 1, v8
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v3, s1, 0, v3, s1
.LBB1_9:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB1_11
; %bb.10:
	v_add_co_u32 v8, s1, v0, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e64 v9, s1, v4, v7, s1
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v7, s1, s4, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v8, s1, s5, v9, s1
	global_load_u8 v7, v[7:8], off offset:1
	s_waitcnt vmcnt(0)
	v_cmp_eq_u16_e64 s1, 1, v7
	v_add_co_ci_u32_e64 v3, s1, 0, v3, s1
.LBB1_11:
	s_or_b32 exec_lo, exec_lo, s3
	v_add_nc_u32_e32 v7, s9, v6
	s_add_i32 s2, s8, -1
	s_xor_b32 s0, s0, -1
	v_cmp_ne_u32_e64 s1, s2, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v8, 31, v7
	s_and_b32 s0, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s0
	s_cbranch_execz .LBB1_13
; %bb.12:
	v_add_co_u32 v9, s0, v0, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e64 v10, s0, v4, v8, s0
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v9, s0, s4, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v10, s0, s5, v10, s0
	global_load_u8 v9, v[9:10], off offset:1
	s_waitcnt vmcnt(0)
	v_cmp_eq_u16_e64 s0, 1, v9
	v_add_co_ci_u32_e64 v3, s0, 0, v3, s0
.LBB1_13:
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s3, s1
	s_cbranch_execz .LBB1_15
; %bb.14:
	v_add3_u32 v6, v6, s9, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v10, 31, v6
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v9, s0, s4, v6
	v_add_co_ci_u32_e64 v10, s0, s5, v10, s0
	global_load_u8 v6, v[9:10], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u16_e64 s0, 1, v6
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v3, s0, 0, v3, s0
.LBB1_15:
	s_or_b32 exec_lo, exec_lo, s3
	v_cmp_ne_u32_e64 s0, s2, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, s0, vcc_lo
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB1_17
; %bb.16:
	v_add_co_u32 v0, vcc_lo, v0, v7
	v_add_co_ci_u32_e32 v5, vcc_lo, v4, v8, vcc_lo
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
	global_load_u8 v0, v[4:5], off offset:-1
	s_waitcnt vmcnt(0)
	v_cmp_eq_u16_e32 vcc_lo, 1, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
.LBB1_17:
	s_or_b32 exec_lo, exec_lo, s0
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v4, vcc_lo, s4, v1
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v2, vcc_lo
	s_mov_b32 s0, exec_lo
	global_load_u8 v0, v[4:5], off
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u16_e32 1, v0
	s_xor_b32 s1, exec_lo, s0
	s_cbranch_execz .LBB1_23
; %bb.18:
	v_add_co_u32 v0, s0, s6, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v1, s0, s7, v2, s0
	s_mov_b32 s0, exec_lo
	v_cmpx_ne_u32_e32 3, v3
	s_xor_b32 s0, exec_lo, s0
	s_cbranch_execz .LBB1_20
; %bb.19:
	v_mov_b32_e32 v2, 0
	global_store_b8 v[0:1], v2, off
                                        ; implicit-def: $vgpr0_vgpr1
.LBB1_20:                               ; %Flow
	s_and_not1_saveexec_b32 s0, s0
	s_cbranch_execz .LBB1_22
; %bb.21:
	v_mov_b32_e32 v2, 1
	global_store_b8 v[0:1], v2, off
.LBB1_22:                               ; %Flow183
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr3
                                        ; implicit-def: $vgpr1_vgpr2
.LBB1_23:                               ; %Flow186
	s_and_not1_saveexec_b32 s0, s1
	s_cbranch_execz .LBB1_28
; %bb.24:
	v_add_nc_u32_e32 v0, -4, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_lt_u32_e32 vcc_lo, -3, v0
	v_add_co_u32 v0, s0, s6, v1
	v_add_co_ci_u32_e64 v1, s0, s7, v2, s0
	s_and_saveexec_b32 s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s0, exec_lo, s0
	s_cbranch_execz .LBB1_26
; %bb.25:
	v_mov_b32_e32 v2, 1
	global_store_b8 v[0:1], v2, off
                                        ; implicit-def: $vgpr0_vgpr1
.LBB1_26:                               ; %Flow184
	s_and_not1_saveexec_b32 s0, s0
	s_cbranch_execz .LBB1_28
; %bb.27:
	v_mov_b32_e32 v2, 0
	global_store_b8 v[0:1], v2, off
.LBB1_28:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12conwayThreadPcS_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z12conwayThreadPcS_ii, .Lfunc_end1-_Z12conwayThreadPcS_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1400
; NumSgprs: 18
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 24
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9addKernelPiPKiS1_
    .private_segment_fixed_size: 0
    .sgpr_count:     8
    .sgpr_spill_count: 0
    .symbol:         _Z9addKernelPiPKiS1_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     3
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12conwayThreadPcS_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z12conwayThreadPcS_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     11
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
