#include <stdio.h>
#include <stdlib.h>
#include <math.h>

#define M 32

void desplegar(int *matriz, int m, int n);


__global__ void calcularGPU2D(int *mask, int *imagen, int *res, int p, int m, int n)
{
   int i = blockIdx.x*blockDim.x + threadIdx.x;
   int j = blockIdx.y*blockDim.y + threadIdx.y;
   res[i*n+j] = 0;
   float div = (float)1/(p*p);
   int offset = p/2; //offset de la mascara
   
   //recorriendo la mascara...
   for (int k=0; k<p; k++)
   {
      for (int l=0; l<p; l++)
      {
          if ((i- offset + k)*n >=0 && (j- offset + l) >= 0)   
              res[i*n+j] += round(imagen[(i-offset + k)*n + (j-offset + l)] * div * mask[k*p+l]);
      }
   }
}

float multiplicarGPU(int *mask, int *imagen, int *res, int p, int m, int n)
{
   int *dev_mask, *dev_imagen, *dev_res;
   cudaEvent_t gpuI, gpuF;
   float gpuT;
   cudaEventCreate( &gpuI );
   cudaEventCreate( &gpuF );
   cudaEventRecord( gpuI, 0 );

   cudaMalloc( (void**)&dev_mask, p*p*sizeof(int) );
   cudaMalloc( (void**)&dev_imagen, m*n*sizeof(int) );
   cudaMalloc( (void**)&dev_res, m*n*sizeof(int) );
   cudaMemcpy( dev_mask, mask, p*p*sizeof(int), cudaMemcpyHostToDevice );
   cudaMemcpy( dev_imagen, imagen, m*n*sizeof(int), cudaMemcpyHostToDevice );


   dim3 bloques( m/M, n/M );
   dim3 threads( M, M );
   calcularGPU2D<<<bloques, threads>>>( dev_mask, dev_imagen, dev_res, p, m, n );

   cudaDeviceSynchronize();
   cudaMemcpy( res, dev_res, m*n*sizeof(int), cudaMemcpyDeviceToHost );

   cudaEventRecord( gpuF, 0 );
   cudaEventSynchronize( gpuF );
   cudaEventElapsedTime( &gpuT, gpuI, gpuF );
   cudaFree( dev_mask );
   cudaFree( dev_imagen );
   cudaFree( dev_res );
   return gpuT;
}

void desplegar(int *matriz, int m, int n)
{
   for (int i=0; i<m; i++)
   {
      for (int j=0; j<n; j++)
         printf("%d ", matriz[i*n+j]);
      printf("\n");
   }
   printf("\n");
}

void inicializar(int *mask, int *imagen, int *res, int p, int m, int n)
{
   for(int i = 0; i<m*n; i++)
   {
      imagen[i] = 255 - ((i/n)%256);
      res[i] = 0;
   }
   for(int i = 0; i<p*p; i++)
   {
        mask[i] = (i/p) + 1;
   }
   desplegar(imagen, m, n);
}

void sumaEuler( int p, int m, int n)
{
   int *mask, *imagen, *res;
   mask = (int*) malloc(p*p*sizeof(int));
   imagen = (int*) malloc(m*n*sizeof(int));
   res = (int*) malloc(m*n*sizeof(int));

   inicializar( mask, imagen, res, p, m, n );
   
   
   printf("Tiempo (GPU): %f ms\n", multiplicarGPU( mask, imagen, res, p, m, n ) );
   
   desplegar(res, m, n);
   
   free( mask );
   free( imagen );
   free( res );
}

int main (int argc, char *argv[] )
{
    if ( argc != 4 )
    {
      printf("%s P M N\n", argv[0]);
      exit(0);
    }
    int p = atoi(argv[1]);
    int m = atoi(argv[2]);
    int n = atoi(argv[3]);
   
    if ( p == 3 || p == 5 || p == 7 )
        if (m>n && m/n==2 && m%512 == 0 && n%256==0)
            sumaEuler (p, m, n);
    else
    {
        printf("valor incorrecto para p\n", M);
        exit(0);
    }
    return 1;
}

	.file	"tmpxft_00332989_00000000-6_practica2.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2034:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2034:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"%d "
.LC1:
	.string	"\n"
	.text
	.globl	_Z9desplegarPiii
	.type	_Z9desplegarPiii, @function
_Z9desplegarPiii:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%esi, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%edx, %ebx
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
.L3:
	cmpl	%r14d, %r13d
	jge	.L5
	movslq	%r12d, %rax
	xorl	%r15d, %r15d
	leaq	0(%rbp,%rax,4), %r8
.L6:
	cmpl	%r15d, %ebx
	jle	.L9
	movl	(%r8,%r15,4), %edx
	leaq	.LC0(%rip), %rsi
	xorl	%eax, %eax
	incq	%r15
	movl	$2, %edi
	movq	%r8, 8(%rsp)
	call	__printf_chk@PLT
	movq	8(%rsp), %r8
	jmp	.L6
.L9:
	leaq	.LC1(%rip), %rsi
	xorl	%eax, %eax
	incl	%r13d
	addl	%ebx, %r12d
	movl	$2, %edi
	call	__printf_chk@PLT
	jmp	.L3
.L5:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	__printf_chk@PLT
	.cfi_endproc
.LFE2028:
	.size	_Z9desplegarPiii, .-_Z9desplegarPiii
	.globl	_Z11inicializarPiS_S_iii
	.type	_Z11inicializarPiS_S_iii, @function
_Z11inicializarPiS_S_iii:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movq	%rdi, %r10
	movq	%rdx, %r11
	movq	%rsi, %rdi
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movl	%r8d, %ebp
	xorl	%esi, %esi
	movl	$255, %r12d
	imull	%r9d, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movl	$256, %ebx
.L11:
	movl	%esi, %eax
	cmpl	%esi, %ebp
	jle	.L16
	cltd
	idivl	%r9d
	cltd
	idivl	%ebx
	movl	%r12d, %eax
	subl	%edx, %eax
	movl	%eax, (%rdi,%rsi,4)
	xorl	%eax, %eax
	movl	%eax, (%r11,%rsi,4)
	incq	%rsi
	jmp	.L11
.L16:
	movl	%ecx, %r11d
	xorl	%esi, %esi
	imull	%ecx, %r11d
.L13:
	movl	%esi, %eax
	cmpl	%esi, %r11d
	jle	.L17
	cltd
	idivl	%ecx
	incl	%eax
	movl	%eax, (%r10,%rsi,4)
	incq	%rsi
	jmp	.L13
.L17:
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	%r9d, %edx
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	%r8d, %esi
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z9desplegarPiii
	.cfi_endproc
.LFE2029:
	.size	_Z11inicializarPiS_S_iii, .-_Z11inicializarPiS_S_iii
	.globl	_Z40__device_stub__Z13calcularGPU2DPiS_S_iiiPiS_S_iii
	.type	_Z40__device_stub__Z13calcularGPU2DPiS_S_iiiPiS_S_iii, @function
_Z40__device_stub__Z13calcularGPU2DPiS_S_iiiPiS_S_iii:
.LFB2056:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L18
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z13calcularGPU2DPiS_S_iii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L18:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L20
	call	__stack_chk_fail@PLT
.L20:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2056:
	.size	_Z40__device_stub__Z13calcularGPU2DPiS_S_iiiPiS_S_iii, .-_Z40__device_stub__Z13calcularGPU2DPiS_S_iiiPiS_S_iii
	.globl	_Z13calcularGPU2DPiS_S_iii
	.type	_Z13calcularGPU2DPiS_S_iii, @function
_Z13calcularGPU2DPiS_S_iii:
.LFB2057:
	.cfi_startproc
	endbr64
	jmp	_Z40__device_stub__Z13calcularGPU2DPiS_S_iiiPiS_S_iii
	.cfi_endproc
.LFE2057:
	.size	_Z13calcularGPU2DPiS_S_iii, .-_Z13calcularGPU2DPiS_S_iii
	.globl	_Z14multiplicarGPUPiS_S_iii
	.type	_Z14multiplicarGPUPiS_S_iii, @function
_Z14multiplicarGPUPiS_S_iii:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rdi, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rsi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rdx, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%ecx, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%r9d, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%r8d, %ebx
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	48(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	56(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	48(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	%r12d, %edx
	leaq	24(%rsp), %rdi
	imull	%r12d, %edx
	movslq	%edx, %rdx
	salq	$2, %rdx
	movq	%rdx, %rsi
	movq	%rdx, 8(%rsp)
	call	cudaMalloc@PLT
	movl	%ebx, %eax
	leaq	32(%rsp), %rdi
	imull	%ebp, %eax
	cltq
	salq	$2, %rax
	movq	%rax, %rsi
	movq	%rax, (%rsp)
	call	cudaMalloc@PLT
	movq	(%rsp), %rsi
	leaq	40(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdx
	movq	24(%rsp), %rdi
	movq	%r15, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	(%rsp), %rdx
	movq	32(%rsp), %rdi
	movq	%r14, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	%ebx, %eax
	movl	$32, %ecx
	xorl	%r9d, %r9d
	cltd
	xorl	%r8d, %r8d
	movl	$1, %esi
	idivl	%ecx
	movl	%eax, 64(%rsp)
	movl	%ebp, %eax
	cltd
	idivl	%ecx
	movabsq	$137438953504, %rdx
	movl	$1, %ecx
	movl	%eax, 68(%rsp)
	movq	64(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L24
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	movl	%ebp, %r9d
	movl	%ebx, %r8d
	movq	24(%rsp), %rdi
	movl	%r12d, %ecx
	call	_Z40__device_stub__Z13calcularGPU2DPiS_S_iiiPiS_S_iii
.L24:
	call	cudaDeviceSynchronize@PLT
	movq	(%rsp), %rdx
	movq	40(%rsp), %rsi
	movq	%r13, %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movq	56(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	56(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rsi
	leaq	20(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movss	20(%rsp), %xmm0
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L25
	call	__stack_chk_fail@PLT
.L25:
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z14multiplicarGPUPiS_S_iii, .-_Z14multiplicarGPUPiS_S_iii
	.section	.rodata.str1.1
.LC2:
	.string	"Tiempo (GPU): %f ms\n"
	.text
	.globl	_Z9sumaEuleriii
	.type	_Z9sumaEuleriii, @function
_Z9sumaEuleriii:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	%edi, %r13d
	imull	%edi, %edi
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%edx, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%esi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%ebp, %ebx
	movslq	%edi, %rdi
	imull	%r12d, %ebx
	pushq	%rax
	.cfi_def_cfa_offset 64
	salq	$2, %rdi
	call	malloc@PLT
	movslq	%ebx, %rbx
	salq	$2, %rbx
	movq	%rax, %r15
	movq	%rbx, %rdi
	call	malloc@PLT
	movq	%rbx, %rdi
	movq	%rax, %r14
	call	malloc@PLT
	movl	%r12d, %r9d
	movl	%ebp, %r8d
	movl	%r13d, %ecx
	movq	%rax, %rbx
	movq	%rax, %rdx
	movq	%r14, %rsi
	movq	%r15, %rdi
	call	_Z11inicializarPiS_S_iii
	movl	%r12d, %r9d
	movl	%ebp, %r8d
	movl	%r13d, %ecx
	movq	%rbx, %rdx
	movq	%r14, %rsi
	movq	%r15, %rdi
	call	_Z14multiplicarGPUPiS_S_iii
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	movl	%r12d, %edx
	movl	%ebp, %esi
	movq	%rbx, %rdi
	call	_Z9desplegarPiii
	movq	%r15, %rdi
	call	free@PLT
	movq	%r14, %rdi
	call	free@PLT
	popq	%rdx
	.cfi_def_cfa_offset 56
	movq	%rbx, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	free@PLT
	.cfi_endproc
.LFE2030:
	.size	_Z9sumaEuleriii, .-_Z9sumaEuleriii
	.section	.rodata.str1.1
.LC3:
	.string	"%s P M N\n"
.LC4:
	.string	"valor incorrecto para p\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rsi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	cmpl	$4, %edi
	je	.L30
	movq	(%rsi), %rdx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC3(%rip), %rsi
	call	__printf_chk@PLT
	jmp	.L37
.L30:
	movq	8(%rsi), %rdi
	call	atoi@PLT
	movq	16(%rbp), %rdi
	movl	%eax, %r12d
	call	atoi@PLT
	movq	24(%rbp), %rdi
	movl	%eax, %ebx
	call	atoi@PLT
	movl	%eax, %ecx
	cmpl	$7, %r12d
	ja	.L31
	movl	$168, %eax
	btq	%r12, %rax
	jnc	.L31
	cmpl	%ecx, %ebx
	jle	.L32
	movl	%ebx, %eax
	cltd
	idivl	%ecx
	cmpl	$2, %eax
	jne	.L32
	movl	%ebx, %edx
	movzbl	%cl, %eax
	andl	$511, %edx
	orl	%edx, %eax
	jne	.L32
	movl	%ecx, %edx
	movl	%ebx, %esi
	movl	%r12d, %edi
	call	_Z9sumaEuleriii
	jmp	.L31
.L32:
	movl	$32, %edx
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L37:
	xorl	%edi, %edi
	call	exit@PLT
.L31:
	popq	%rbx
	.cfi_def_cfa_offset 24
	movl	$1, %eax
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2031:
	.size	main, .-main
	.section	.rodata.str1.1
.LC5:
	.string	"_Z13calcularGPU2DPiS_S_iii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2059:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z13calcularGPU2DPiS_S_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2059:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <math.h>

#define M 32

void desplegar(int *matriz, int m, int n);


__global__ void calcularGPU2D(int *mask, int *imagen, int *res, int p, int m, int n)
{
   int i = blockIdx.x*blockDim.x + threadIdx.x;
   int j = blockIdx.y*blockDim.y + threadIdx.y;
   res[i*n+j] = 0;
   float div = (float)1/(p*p);
   int offset = p/2; //offset de la mascara
   
   //recorriendo la mascara...
   for (int k=0; k<p; k++)
   {
      for (int l=0; l<p; l++)
      {
          if ((i- offset + k)*n >=0 && (j- offset + l) >= 0)   
              res[i*n+j] += round(imagen[(i-offset + k)*n + (j-offset + l)] * div * mask[k*p+l]);
      }
   }
}

float multiplicarGPU(int *mask, int *imagen, int *res, int p, int m, int n)
{
   int *dev_mask, *dev_imagen, *dev_res;
   hipEvent_t gpuI, gpuF;
   float gpuT;
   hipEventCreate( &gpuI );
   hipEventCreate( &gpuF );
   hipEventRecord( gpuI, 0 );

   hipMalloc( (void**)&dev_mask, p*p*sizeof(int) );
   hipMalloc( (void**)&dev_imagen, m*n*sizeof(int) );
   hipMalloc( (void**)&dev_res, m*n*sizeof(int) );
   hipMemcpy( dev_mask, mask, p*p*sizeof(int), hipMemcpyHostToDevice );
   hipMemcpy( dev_imagen, imagen, m*n*sizeof(int), hipMemcpyHostToDevice );


   dim3 bloques( m/M, n/M );
   dim3 threads( M, M );
   calcularGPU2D<<<bloques, threads>>>( dev_mask, dev_imagen, dev_res, p, m, n );

   hipDeviceSynchronize();
   hipMemcpy( res, dev_res, m*n*sizeof(int), hipMemcpyDeviceToHost );

   hipEventRecord( gpuF, 0 );
   hipEventSynchronize( gpuF );
   hipEventElapsedTime( &gpuT, gpuI, gpuF );
   hipFree( dev_mask );
   hipFree( dev_imagen );
   hipFree( dev_res );
   return gpuT;
}

void desplegar(int *matriz, int m, int n)
{
   for (int i=0; i<m; i++)
   {
      for (int j=0; j<n; j++)
         printf("%d ", matriz[i*n+j]);
      printf("\n");
   }
   printf("\n");
}

void inicializar(int *mask, int *imagen, int *res, int p, int m, int n)
{
   for(int i = 0; i<m*n; i++)
   {
      imagen[i] = 255 - ((i/n)%256);
      res[i] = 0;
   }
   for(int i = 0; i<p*p; i++)
   {
        mask[i] = (i/p) + 1;
   }
   desplegar(imagen, m, n);
}

void sumaEuler( int p, int m, int n)
{
   int *mask, *imagen, *res;
   mask = (int*) malloc(p*p*sizeof(int));
   imagen = (int*) malloc(m*n*sizeof(int));
   res = (int*) malloc(m*n*sizeof(int));

   inicializar( mask, imagen, res, p, m, n );
   
   
   printf("Tiempo (GPU): %f ms\n", multiplicarGPU( mask, imagen, res, p, m, n ) );
   
   desplegar(res, m, n);
   
   free( mask );
   free( imagen );
   free( res );
}

int main (int argc, char *argv[] )
{
    if ( argc != 4 )
    {
      printf("%s P M N\n", argv[0]);
      exit(0);
    }
    int p = atoi(argv[1]);
    int m = atoi(argv[2]);
    int n = atoi(argv[3]);
   
    if ( p == 3 || p == 5 || p == 7 )
        if (m>n && m/n==2 && m%512 == 0 && n%256==0)
            sumaEuler (p, m, n);
    else
    {
        printf("valor incorrecto para p\n", M);
        exit(0);
    }
    return 1;
}

	.text
	.file	"practica2.hip"
	.globl	_Z28__device_stub__calcularGPU2DPiS_S_iii # -- Begin function _Z28__device_stub__calcularGPU2DPiS_S_iii
	.type	_Z28__device_stub__calcularGPU2DPiS_S_iii,@function
_Z28__device_stub__calcularGPU2DPiS_S_iii: # @_Z28__device_stub__calcularGPU2DPiS_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13calcularGPU2DPiS_S_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z28__device_stub__calcularGPU2DPiS_S_iii, .Lfunc_end0-_Z28__device_stub__calcularGPU2DPiS_S_iii
	.cfi_endproc
                                        # -- End function
	.globl	_Z14multiplicarGPUPiS_S_iii     # -- Begin function _Z14multiplicarGPUPiS_S_iii
	.type	_Z14multiplicarGPUPiS_S_iii,@function
_Z14multiplicarGPUPiS_S_iii:            # @_Z14multiplicarGPUPiS_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, %r14d
	movl	%r8d, %r15d
	movl	%ecx, %ebx
	movq	%rdx, 64(%rsp)                  # 8-byte Spill
	movq	%rsi, 56(%rsp)                  # 8-byte Spill
	movq	%rdi, 48(%rsp)                  # 8-byte Spill
	leaq	72(%rsp), %r12
	movq	%r12, %rdi
	callq	hipEventCreate
	leaq	8(%rsp), %rdi
	callq	hipEventCreate
	movq	(%r12), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movl	%ebx, 28(%rsp)                  # 4-byte Spill
	movl	%ebx, %ebp
	imull	%ebp, %ebp
	shlq	$2, %rbp
	leaq	40(%rsp), %r13
	movq	%r13, %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	movl	%r14d, %eax
	imull	%r15d, %eax
	movslq	%eax, %r12
	shlq	$2, %r12
	leaq	32(%rsp), %rbx
	movq	%rbx, %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	movq	(%r13), %rdi
	movq	48(%rsp), %rsi                  # 8-byte Reload
	movq	%rbp, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbx), %rdi
	movq	56(%rsp), %rsi                  # 8-byte Reload
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leal	31(%r15), %eax
	testl	%r15d, %r15d
	cmovnsl	%r15d, %eax
	sarl	$5, %eax
	leal	31(%r14), %edi
	testl	%r14d, %r14d
	cmovnsl	%r14d, %edi
	sarl	$5, %edi
	shlq	$32, %rdi
	orq	%rax, %rdi
	movabsq	$137438953504, %rdx             # imm = 0x2000000020
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_2
# %bb.1:
	movq	40(%rsp), %rdi
	movq	32(%rsp), %rsi
	movq	16(%rsp), %rdx
	movl	28(%rsp), %ecx                  # 4-byte Reload
	movl	%r15d, %r8d
	movl	%r14d, %r9d
	callq	_Z28__device_stub__calcularGPU2DPiS_S_iii
.LBB1_2:
	callq	hipDeviceSynchronize
	movq	16(%rsp), %rsi
	movq	64(%rsp), %rdi                  # 8-byte Reload
	movq	%r12, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	8(%rsp), %rdi
	callq	hipEventSynchronize
	movq	72(%rsp), %rsi
	movq	8(%rsp), %rdx
	leaq	84(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movss	(%rbx), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z14multiplicarGPUPiS_S_iii, .Lfunc_end1-_Z14multiplicarGPUPiS_S_iii
	.cfi_endproc
                                        # -- End function
	.globl	_Z9desplegarPiii                # -- Begin function _Z9desplegarPiii
	.type	_Z9desplegarPiii,@function
_Z9desplegarPiii:                       # @_Z9desplegarPiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdi, 8(%rsp)                   # 8-byte Spill
	testl	%esi, %esi
	jle	.LBB2_6
# %bb.1:                                # %.preheader.lr.ph
	movl	%edx, %ebx
	movl	%esi, %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	%edx, %r12d
	xorl	%ebp, %ebp
	xorl	%r13d, %r13d
.LBB2_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_4 Depth 2
	testl	%ebx, %ebx
	jle	.LBB2_5
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB2_2 Depth=1
	movl	%ebp, %eax
	movq	8(%rsp), %rcx                   # 8-byte Reload
	leaq	(%rcx,%rax,4), %r14
	xorl	%r15d, %r15d
.LBB2_4:                                #   Parent Loop BB2_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%r14,%r15,4), %esi
	movl	$.L.str, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%r15
	cmpq	%r15, %r12
	jne	.LBB2_4
.LBB2_5:                                # %._crit_edge
                                        #   in Loop: Header=BB2_2 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%r13
	addl	%ebx, %ebp
	cmpq	16(%rsp), %r13                  # 8-byte Folded Reload
	jne	.LBB2_2
.LBB2_6:                                # %._crit_edge14
	movl	$10, %edi
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	putchar@PLT                     # TAILCALL
.Lfunc_end2:
	.size	_Z9desplegarPiii, .Lfunc_end2-_Z9desplegarPiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z11inicializarPiS_S_iii        # -- Begin function _Z11inicializarPiS_S_iii
	.type	_Z11inicializarPiS_S_iii,@function
_Z11inicializarPiS_S_iii:               # @_Z11inicializarPiS_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movl	%r9d, %eax
	imull	%r8d, %eax
	testl	%eax, %eax
	jle	.LBB3_3
# %bb.1:                                # %.lr.ph.preheader
	movq	%rdx, %r10
	movl	%eax, %ebx
	xorl	%r11d, %r11d
	movl	$255, %r14d
.LBB3_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	%r11d, %eax
	cltd
	idivl	%r9d
                                        # kill: def $eax killed $eax def $rax
	leal	(%rax,%r14), %edx
	testl	%eax, %eax
	cmovnsl	%eax, %edx
	andl	$-256, %edx
	subl	%eax, %edx
	addl	%r14d, %edx
	movl	%edx, (%rsi,%r11,4)
	movl	$0, (%r10,%r11,4)
	incq	%r11
	cmpq	%r11, %rbx
	jne	.LBB3_2
.LBB3_3:                                # %.preheader
	testl	%ecx, %ecx
	je	.LBB3_6
# %bb.4:                                # %.lr.ph23.preheader
	movl	%ecx, %r11d
	imull	%r11d, %r11d
	cmpl	$1, %r11d
	adcl	$0, %r11d
	xorl	%r10d, %r10d
.LBB3_5:                                # %.lr.ph23
                                        # =>This Inner Loop Header: Depth=1
	movl	%r10d, %eax
	cltd
	idivl	%ecx
	incl	%eax
	movl	%eax, (%rdi,%r10,4)
	incq	%r10
	cmpq	%r10, %r11
	jne	.LBB3_5
.LBB3_6:                                # %._crit_edge
	movq	%rsi, %rdi
	movl	%r8d, %esi
	movl	%r9d, %edx
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	_Z9desplegarPiii                # TAILCALL
.Lfunc_end3:
	.size	_Z11inicializarPiS_S_iii, .Lfunc_end3-_Z11inicializarPiS_S_iii
	.cfi_endproc
                                        # -- End function
	.globl	_Z9sumaEuleriii                 # -- Begin function _Z9sumaEuleriii
	.type	_Z9sumaEuleriii,@function
_Z9sumaEuleriii:                        # @_Z9sumaEuleriii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%edx, %ebx
	movl	%esi, %ebp
	movl	%edi, %r13d
	imull	%edi, %edi
	shlq	$2, %rdi
	callq	malloc
	movq	%rax, %r14
	movl	%ebx, %eax
	imull	%ebp, %eax
	movslq	%eax, %r12
	shlq	$2, %r12
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, %r15
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, %r12
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%rax, %rdx
	movl	%r13d, %ecx
	movl	%ebp, %r8d
	movl	%ebx, %r9d
	callq	_Z11inicializarPiS_S_iii
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movl	%r13d, %ecx
	movl	%ebp, %r8d
	movl	%ebx, %r9d
	callq	_Z14multiplicarGPUPiS_S_iii
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.2, %edi
	movb	$1, %al
	callq	printf
	movq	%r12, %rdi
	movl	%ebp, %esi
	movl	%ebx, %edx
	callq	_Z9desplegarPiii
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	movq	%r12, %rdi
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	free                            # TAILCALL
.Lfunc_end4:
	.size	_Z9sumaEuleriii, .Lfunc_end4-_Z9sumaEuleriii
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %r14
	cmpl	$4, %edi
	jne	.LBB5_11
# %bb.1:
	movq	8(%r14), %rdi
	callq	atoi
	movl	%eax, %ebx
	movq	16(%r14), %rdi
	callq	atoi
	movl	%eax, %ebp
	movq	24(%r14), %rdi
	callq	atoi
	cmpl	$7, %ebx
	ja	.LBB5_8
# %bb.2:
	movl	%eax, %ecx
	movl	$168, %eax
	btl	%ebx, %eax
	jae	.LBB5_8
# %bb.3:
	cmpl	%ecx, %ebp
	jle	.LBB5_9
# %bb.4:
	movl	%ebp, %eax
	cltd
	idivl	%ecx
	testl	$511, %ebp                      # imm = 0x1FF
	jne	.LBB5_9
# %bb.5:
	cmpl	$2, %eax
	jne	.LBB5_9
# %bb.6:
	movzbl	%cl, %eax
	testl	%eax, %eax
	jne	.LBB5_9
# %bb.7:
	movl	%ebx, %edi
	movl	%ebp, %esi
	movl	%ecx, %edx
	callq	_Z9sumaEuleriii
.LBB5_8:
	movl	$1, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB5_9:
	.cfi_def_cfa_offset 32
	movl	$.Lstr, %edi
	callq	puts@PLT
	jmp	.LBB5_10
.LBB5_11:
	movq	(%r14), %rsi
	movl	$.L.str.3, %edi
	xorl	%eax, %eax
	callq	printf
.LBB5_10:
	xorl	%edi, %edi
	callq	exit
.Lfunc_end5:
	.size	main, .Lfunc_end5-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB6_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB6_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13calcularGPU2DPiS_S_iii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end6:
	.size	__hip_module_ctor, .Lfunc_end6-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB7_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB7_2:
	retq
.Lfunc_end7:
	.size	__hip_module_dtor, .Lfunc_end7-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z13calcularGPU2DPiS_S_iii,@object # @_Z13calcularGPU2DPiS_S_iii
	.section	.rodata,"a",@progbits
	.globl	_Z13calcularGPU2DPiS_S_iii
	.p2align	3, 0x0
_Z13calcularGPU2DPiS_S_iii:
	.quad	_Z28__device_stub__calcularGPU2DPiS_S_iii
	.size	_Z13calcularGPU2DPiS_S_iii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"%d "
	.size	.L.str, 4

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Tiempo (GPU): %f ms\n"
	.size	.L.str.2, 21

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"%s P M N\n"
	.size	.L.str.3, 10

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z13calcularGPU2DPiS_S_iii"
	.size	.L__unnamed_1, 27

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"valor incorrecto para p"
	.size	.Lstr, 24

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z28__device_stub__calcularGPU2DPiS_S_iii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z13calcularGPU2DPiS_S_iii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z13calcularGPU2DPiS_S_iii ; -- Begin function _Z13calcularGPU2DPiS_S_iii
	.globl	_Z13calcularGPU2DPiS_S_iii
	.p2align	8
	.type	_Z13calcularGPU2DPiS_S_iii,@function
_Z13calcularGPU2DPiS_S_iii:             ; @_Z13calcularGPU2DPiS_S_iii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x34
	s_load_b32 s8, s[0:1], 0x20
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v0, v0, 10, 10
	s_load_b32 s9, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, s14, s2, v[1:2]
	v_mad_u64_u32 v[2:3], null, s15, s3, v[0:1]
	s_load_b64 s[2:3], s[0:1], 0x10
	s_cmp_lt_i32 s9, 1
	v_mad_u64_u32 v[0:1], null, v4, s8, v[2:3]
	v_mov_b32_e32 v3, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_store_b32 v[0:1], v3, off
	s_cbranch_scc1 .LBB0_9
; %bb.1:                                ; %.preheader.lr.ph
	s_mul_i32 s2, s9, s9
	s_load_b128 s[4:7], s[0:1], 0x0
	v_cvt_f32_i32_e32 v7, s2
	s_lshr_b32 s0, s9, 1
	s_mov_b32 s3, 0
	v_subrev_nc_u32_e32 v4, s0, v4
	s_mov_b32 s1, 0
	v_div_scale_f32 v5, null, v7, v7, 1.0
	v_div_scale_f32 v9, vcc_lo, 1.0, v7, 1.0
	s_mov_b32 s10, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v6, v5
	s_waitcnt_depctr 0xfff
	v_fma_f32 v8, -v5, v6, 1.0
	v_fmac_f32_e32 v6, v8, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v8, v9, v6
	v_fma_f32 v10, -v5, v8, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v8, v10, v6
	v_fma_f32 v5, -v5, v8, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_div_fmas_f32 v8, v5, v6, v8
	v_mul_lo_u32 v5, s8, v4
	v_subrev_nc_u32_e32 v6, s0, v2
	v_div_fixup_f32 v7, v8, v7, 1.0
	v_mov_b32_e32 v8, 0
.LBB0_2:                                ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_3 Depth 2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v9, v6 :: v_dual_add_nc_u32 v2, s10, v4
	s_mov_b32 s2, s1
	s_mov_b32 s11, s9
	v_mul_lo_u32 v2, v2, s8
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_lt_i32_e32 vcc_lo, -1, v2
.LBB0_3:                                ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_and_saveexec_b32 s12, vcc_lo
	s_cbranch_execz .LBB0_7
; %bb.4:                                ;   in Loop: Header=BB0_3 Depth=2
	s_mov_b32 s13, exec_lo
	v_cmpx_lt_i32_e32 -1, v9
	s_cbranch_execz .LBB0_6
; %bb.5:                                ;   in Loop: Header=BB0_3 Depth=2
	v_add_nc_u32_e32 v2, v5, v9
	s_lshl_b64 s[14:15], s[2:3], 2
	v_cvt_f32_i32_e32 v8, v8
	s_waitcnt lgkmcnt(0)
	s_add_u32 s14, s4, s14
	s_addc_u32 s15, s5, s15
	v_lshlrev_b64 v[10:11], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v10, s0, s6, v10
	v_add_co_ci_u32_e64 v11, s0, s7, v11, s0
	global_load_b32 v2, v[10:11], off
	global_load_b32 v10, v3, s[14:15]
	s_waitcnt vmcnt(1)
	v_cvt_f32_i32_e32 v2, v2
	s_waitcnt vmcnt(0)
	v_cvt_f32_i32_e32 v10, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v2, v7, v2
	v_mul_f32_e32 v2, v2, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_trunc_f32_e32 v10, v2
	v_sub_f32_e32 v11, v2, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_f32_e64 s0, |v11|, 0.5
	v_cndmask_b32_e64 v11, 0, 1.0, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_bfi_b32 v2, 0x7fffffff, v11, v2
	v_add_f32_e32 v2, v10, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v2, v2, v8
	v_cvt_i32_f32_e32 v8, v2
	global_store_b32 v[0:1], v8, off
.LBB0_6:                                ; %Flow
                                        ;   in Loop: Header=BB0_3 Depth=2
	s_or_b32 exec_lo, exec_lo, s13
.LBB0_7:                                ;   in Loop: Header=BB0_3 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s12
	v_add_nc_u32_e32 v9, 1, v9
	s_add_i32 s11, s11, -1
	s_add_i32 s2, s2, 1
	s_cmp_eq_u32 s11, 0
	s_cbranch_scc0 .LBB0_3
; %bb.8:                                ; %._crit_edge
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_add_nc_u32_e32 v5, s8, v5
	s_add_i32 s10, s10, 1
	s_add_i32 s1, s1, s9
	s_cmp_eq_u32 s10, s9
	s_cbranch_scc0 .LBB0_2
.LBB0_9:                                ; %._crit_edge46
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13calcularGPU2DPiS_S_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 12
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z13calcularGPU2DPiS_S_iii, .Lfunc_end0-_Z13calcularGPU2DPiS_S_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 584
; NumSgprs: 18
; NumVgprs: 12
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 12
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z13calcularGPU2DPiS_S_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z13calcularGPU2DPiS_S_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     12
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
