/**
 * File: fw-cuda.cu
 *
 * Floyd Warshall algorithm CUDA implementation
 *
 * @author Mateusz Bojanowski
 * @source https://github.com/MTB90/CUDA_Blocked_Floyd-Warshall
 */

#include<stdio.h>
#include<stdlib.h>
#include<unistd.h>

// CUDA Headers
#include "cuda.h"
#include "cuda_runtime.h"
#include "device_launch_parameters.h"

// Helper definition
#define VAR(v, i) __typeof(i) v=(i)
#define FOR(i, j, k) for (int i = (j); i <= (k); ++i)
#define FORD(i, j, k)for (int i=(j); i >= (k); --i)
#define FORE(i, c) for(VAR(i, (c).begin()); i != (c).end(); ++i)
#define REP(i, n) for(int i = 0;i <(n); ++i)

// CONSTS
#define INF   1061109567 // 3F 3F 3F 3F
#define CHARINF 63     // 3F  
#define CHARBIT 8
#define NONE  -1

#define CMCPYHTD cudaMemcpyHostToDevice
#define CMCPYDTH cudaMemcpyDeviceToHost

// CONSTS for compute capability 2.0
#define BLOCK_WIDTH 16
#define WARP       32

bool gPrint = false;   // print graph d or not
bool gDebug = false;  // print more deatails to debug

/** Cuda handle error, if err is not success print error and line in code
*
* @param status CUDA Error types
*/
#define HANDLE_ERROR(err) \
{ \
  if (err != cudaSuccess) \
  { \
    fprintf(stderr, "%s failed  at line %d \nError message: %s \n", \
      __FILE__, __LINE__ ,cudaGetErrorString(err)); \
    exit(EXIT_FAILURE); \
  } \
}

/**Kernel for wake gpu
*
* @param reps dummy variable only to perform some action
*/
__global__ void wake_gpu_kernel(int reps) 
{
  int idx = blockIdx.x * blockDim.x + threadIdx.x;
  if (idx >= reps) return;
}

/**Kernel for parallel Floyd Warshall algorithm on gpu
* 
* @param u number vertex of which is performed relaxation paths [v1, v2]
* @param n number of vertices in the graph G:=(V,E), n := |V(G)|
* @param d matrix of shortest paths d(G)
* @param p matrix of predecessors p(G)
*/
__global__ void fw_kernel(const unsigned int u, const unsigned int n, int * const d, int * const p)
{
  int v1 = blockDim.y * blockIdx.y + threadIdx.y;
  int v2 = blockDim.x * blockIdx.x + threadIdx.x;
  
  if (v1 < n && v2 < n) 
  {
    int newPath = d[v1 * n + u] + d[u * n + v2];
    int oldPath = d[v1 * n + v2];
    if (oldPath > newPath)
    {
      d[v1 * n + v2] = newPath;
      p[v1 * n + v2] = p[u * n + v2];    
    }
  }
}

/** Parallel Floyd Warshall algorithm using gpu
*
* @param n number of vertices in the graph G:=(V,E), n := |V(G)|
* @param G is a the graph G:=(V,E)
* @param d matrix of shortest paths d(G)
* @param p matrix of predecessors p(G)
*/
extern "C" void fw_gpu(const unsigned int n, const int * const G, int * const d, int * const p)
{
  int *dev_d = 0;
  int *dev_p = 0;
  cudaError_t cudaStatus;
  cudaStream_t cpyStream;

  // Choose which GPU to run on, change this on a multi-GPU system.
      cudaStatus = cudaSetDevice(0);
  HANDLE_ERROR(cudaStatus);

  // Initialize the grid and block dimensions here
  dim3 dimGrid((n - 1) / BLOCK_WIDTH + 1, (n - 1) / BLOCK_WIDTH + 1, 1); 
  dim3 dimBlock(BLOCK_WIDTH, BLOCK_WIDTH, 1);

  if (gDebug) 
  {
    printf("|V| %d\n", n);
    printf("Dim Grid:\nx - %d\ny - %d\nz - %d\n", dimGrid.x, dimGrid.y, dimGrid.z);
    printf("Dim Block::\nx - %d\ny - %d\nz - %d\n", dimBlock.x, dimBlock.y, dimBlock.z);
  }

  // Create new stream to copy data  
  cudaStatus = cudaStreamCreate(&cpyStream);
  HANDLE_ERROR(cudaStatus);

  // Allocate GPU buffers for matrix of shortest paths d(G) and predecessors p(G)
  cudaStatus =  cudaMalloc((void**)&dev_d, n * n * sizeof(int));
  HANDLE_ERROR(cudaStatus);
  cudaStatus =  cudaMalloc((void**)&dev_p, n * n * sizeof(int));
  HANDLE_ERROR(cudaStatus);
  
  // Wake up gpu
  wake_gpu_kernel<<<1, dimBlock>>>(32);

        // Copy input from host memory to GPU buffers.
        cudaStatus = cudaMemcpyAsync(dev_d, G, n * n * sizeof(int), CMCPYHTD, cpyStream);
  cudaStatus = cudaMemcpyAsync(dev_p, p, n * n * sizeof(int), CMCPYHTD, cpyStream);

        // cudaDeviceSynchronize waits for the kernel to finish, and returns
        cudaStatus = cudaDeviceSynchronize();
        HANDLE_ERROR(cudaStatus);

  cudaFuncSetCacheConfig(fw_kernel, cudaFuncCachePreferL1 );
  FOR(u, 0, n - 1) 
  {
    fw_kernel<<<dimGrid, dimBlock>>>(u, n, dev_d, dev_p);
  }

  // Check for any errors launching the kernel
      cudaStatus = cudaGetLastError();
  HANDLE_ERROR(cudaStatus);

        // cudaDeviceSynchronize waits for the kernel to finish, and returns
  // any errors encountered during the launch.
  cudaStatus = cudaDeviceSynchronize();
  HANDLE_ERROR(cudaStatus);
  
  cudaStatus = cudaMemcpy(d, dev_d, n * n * sizeof(int), CMCPYDTH);
  HANDLE_ERROR(cudaStatus);

  cudaStatus = cudaMemcpy(p, dev_p, n * n * sizeof(int), CMCPYDTH);
  HANDLE_ERROR(cudaStatus);

  cudaStatus = cudaFree(dev_d);
  HANDLE_ERROR(cudaStatus);

  cudaStatus = cudaFree(dev_p);
  HANDLE_ERROR(cudaStatus);

  return;
}

/**
* Print graph G as a matrix
*
* @param n number of vertices in the graph G:=(V,E), n := |V(G)|
* @param G is a the graph G:=(V,E)
*/
void print_graph(const unsigned int n, const int * const G)
{
  FOR(v1, 0, n - 1)
  {
    FOR(v2, 0, n - 1) 
    {  
      if (G[v1 * n + v2] < INF)
        printf("%d ", G[v1 * n + v2]);
      else
        printf("INF ");
    }
    printf("\n");
  }
  printf("\n");
}

/**
* Reconstruct Path
*
* @param i, j id vertex 
* @param G is a the graph G:=(V,E)
* @param p matrix of predecessors p(G)
*/
int reconstruct_path(unsigned int n, unsigned int i, unsigned int j, const int * const p, const int * const G)
{
  if (i == j )
    return 0;
  else if ( p[i * n + j] == NONE)
    return INF;
  else
  {
    int path = reconstruct_path(n, i, p[i * n + j], p, G);
    if (path == INF) 
      return INF;
    else
      return path + G[ p [i * n + j] * n + j];
  }
}

/**
* Check paths
*
* @param n number of vertices in the graph G:=(V,E), n := |V(G)|
* @param G is a the graph G:=(V,E)
* @param d matrix of shortest paths d(G)
* @param p matrix of predecessors p(G)
*/
bool check_paths(const unsigned int n, const int * const G, const int * const d, const int * const p)
{
  
  FOR (i, 0, n - 1)
  {
    FOR (j, 0, n - 1)
    {
      int path = reconstruct_path(n, i, j, p, G);
      if (gDebug)
        printf("%d %d %d == %d \n", i, j, path, d[i * n + j]);
      if (path != d[i * n + j])
        return false;
    }
  }

  return true;
}

	.file	"tmpxft_0039e998_00000000-6_fw-cuda.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2046:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2046:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"%d "
.LC1:
	.string	"INF "
.LC2:
	.string	"\n"
	.text
	.globl	_Z11print_graphjPKi
	.type	_Z11print_graphjPKi, @function
_Z11print_graphjPKi:
.LFB2041:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	leal	-1(%rdi), %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rsi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%edi, %ebx
	pushq	%rcx
	.cfi_def_cfa_offset 64
.L3:
	xorl	%r15d, %r15d
.L6:
	leal	(%r15,%r12), %eax
	movl	0(%r13,%rax,4), %edx
	cmpl	$1061109566, %edx
	jg	.L4
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L5
.L4:
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L5:
	incl	%r15d
	cmpl	%r15d, %r14d
	jnb	.L6
	leaq	.LC2(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	incl	%ebp
	call	__printf_chk@PLT
	addl	%ebx, %r12d
	cmpl	%ebp, %r14d
	leaq	.LC2(%rip), %rsi
	jnb	.L3
	popq	%rdx
	.cfi_def_cfa_offset 56
	movl	$2, %edi
	popq	%rbx
	.cfi_def_cfa_offset 48
	xorl	%eax, %eax
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	__printf_chk@PLT
	.cfi_endproc
.LFE2041:
	.size	_Z11print_graphjPKi, .-_Z11print_graphjPKi
	.globl	_Z16reconstruct_pathjjjPKiS0_
	.type	_Z16reconstruct_pathjjjPKiS0_, @function
_Z16reconstruct_pathjjjPKiS0_:
.LFB2042:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
	cmpl	%edx, %esi
	je	.L19
	movl	%esi, %eax
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	imull	%edi, %eax
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movl	%edi, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movl	%edx, %ebx
	addl	%edx, %eax
	pushq	%r9
	.cfi_def_cfa_offset 48
	movl	%eax, %eax
	movl	(%rcx,%rax,4), %ebp
	movl	$1061109567, %eax
	cmpl	$-1, %ebp
	je	.L11
	movl	%ebp, %edx
	movq	%r8, %r13
	call	_Z16reconstruct_pathjjjPKiS0_
	cmpl	$1061109567, %eax
	je	.L11
	imull	%r12d, %ebp
	leal	0(%rbp,%rbx), %edx
	addl	0(%r13,%rdx,4), %eax
.L11:
	popq	%rdx
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
.L19:
	.cfi_restore 3
	.cfi_restore 6
	.cfi_restore 12
	.cfi_restore 13
	ret
	.cfi_endproc
.LFE2042:
	.size	_Z16reconstruct_pathjjjPKiS0_, .-_Z16reconstruct_pathjjjPKiS0_
	.section	.rodata.str1.1
.LC3:
	.string	"%d %d %d == %d \n"
	.text
	.globl	_Z11check_pathsjPKiS0_S0_
	.type	_Z11check_pathsjPKiS0_S0_, @function
_Z11check_pathsjPKiS0_S0_:
.LFB2043:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	leal	-1(%rdi), %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rdx, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%edi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	xorl	%ebx, %ebx
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	movq	%rsi, (%rsp)
	movq	%rcx, 8(%rsp)
.L23:
	xorl	%r15d, %r15d
.L26:
	movq	(%rsp), %r8
	movq	8(%rsp), %rcx
	movl	%r15d, %edx
	movl	%ebx, %esi
	movl	%ebp, %edi
	call	_Z16reconstruct_pathjjjPKiS0_
	cmpb	$0, gDebug(%rip)
	movl	%eax, %r8d
	leal	(%r12,%r15), %eax
	leaq	0(%r13,%rax,4), %r11
	je	.L24
	movl	(%r11), %r9d
	movl	%r15d, %ecx
	movl	%ebx, %edx
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	movq	%r11, 24(%rsp)
	movl	%r8d, 20(%rsp)
	call	__printf_chk@PLT
	movq	24(%rsp), %r11
	movl	20(%rsp), %r8d
.L24:
	cmpl	%r8d, (%r11)
	jne	.L27
	incl	%r15d
	cmpl	%r15d, %r14d
	jnb	.L26
	incl	%ebx
	addl	%ebp, %r12d
	cmpl	%ebx, %r14d
	jnb	.L23
	movb	$1, %al
	jmp	.L22
.L27:
	xorl	%eax, %eax
.L22:
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2043:
	.size	_Z11check_pathsjPKiS0_S0_, .-_Z11check_pathsjPKiS0_S0_
	.globl	_Z34__device_stub__Z15wake_gpu_kernelii
	.type	_Z34__device_stub__Z15wake_gpu_kernelii, @function
_Z34__device_stub__Z15wake_gpu_kernelii:
.LFB2068:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movl	%edi, 12(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	leaq	44(%rsp), %rsi
	leaq	32(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L31
	pushq	24(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z15wake_gpu_kerneli(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 128
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L31:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L33
	call	__stack_chk_fail@PLT
.L33:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2068:
	.size	_Z34__device_stub__Z15wake_gpu_kernelii, .-_Z34__device_stub__Z15wake_gpu_kernelii
	.globl	_Z15wake_gpu_kerneli
	.type	_Z15wake_gpu_kerneli, @function
_Z15wake_gpu_kerneli:
.LFB2069:
	.cfi_startproc
	endbr64
	jmp	_Z34__device_stub__Z15wake_gpu_kernelii
	.cfi_endproc
.LFE2069:
	.size	_Z15wake_gpu_kerneli, .-_Z15wake_gpu_kerneli
	.globl	_Z32__device_stub__Z9fw_kerneljjPiS_jjPiS_
	.type	_Z32__device_stub__Z9fw_kerneljjPiS_jjPiS_, @function
_Z32__device_stub__Z9fw_kerneljjPiS_jjPiS_:
.LFB2070:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movl	%edi, 28(%rsp)
	leaq	56(%rsp), %rdi
	movl	%esi, 24(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 16(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L36
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z9fw_kerneljjPiS_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L36:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L38
	call	__stack_chk_fail@PLT
.L38:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2070:
	.size	_Z32__device_stub__Z9fw_kerneljjPiS_jjPiS_, .-_Z32__device_stub__Z9fw_kerneljjPiS_jjPiS_
	.globl	_Z9fw_kerneljjPiS_
	.type	_Z9fw_kerneljjPiS_, @function
_Z9fw_kerneljjPiS_:
.LFB2071:
	.cfi_startproc
	endbr64
	jmp	_Z32__device_stub__Z9fw_kerneljjPiS_jjPiS_
	.cfi_endproc
.LFE2071:
	.size	_Z9fw_kerneljjPiS_, .-_Z9fw_kerneljjPiS_
	.section	.rodata.str1.1
.LC4:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/vsuhasm/Group-steiner-VLSI-routing/master/fw-cuda.cu"
.LC5:
	.string	"%s failed  at line %d \nError message: %s \n"
.LC6:
	.string	"|V| %d\n"
.LC7:
	.string	"Dim Grid:\nx - %d\ny - %d\nz - %d\n"
.LC8:
	.string	"Dim Block::\nx - %d\ny - %d\nz - %d\n"
	.text
	.globl	fw_gpu
	.type	fw_gpu, @function
fw_gpu:
.LFB2040:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rdx, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rsi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rcx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%edi, %ebx
	xorl	%edi, %edi
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	xorl	%eax, %eax
	movq	%rax, 24(%rsp)
	movq	%rax, 32(%rsp)
	call	cudaSetDevice@PLT
	testl	%eax, %eax
	je	.L42
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	movl	$106, %r8d
	movq	%rax, %r9
	jmp	.L60
.L42:
	leal	-1(%rbx), %r15d
	movl	%r15d, %ebp
	shrl	$4, %ebp
	incl	%ebp
	cmpb	$0, gDebug(%rip)
	je	.L43
	movl	%ebx, %edx
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %r8d
	movl	%ebp, %ecx
	movl	%ebp, %edx
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %r8d
	xorl	%eax, %eax
	movl	$16, %ecx
	movl	$16, %edx
	leaq	.LC8(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
.L43:
	leaq	40(%rsp), %rdi
	call	cudaStreamCreate@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L44
	call	cudaGetErrorString@PLT
	movl	$121, %r8d
	movq	%rax, %r9
.L60:
	movq	stderr(%rip), %rdi
	leaq	.LC4(%rip), %rcx
	leaq	.LC5(%rip), %rdx
	xorl	%eax, %eax
	movl	$2, %esi
	call	__fprintf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L44:
	movl	%ebx, %eax
	leaq	24(%rsp), %rdi
	imull	%ebx, %eax
	salq	$2, %rax
	movq	%rax, %rsi
	movq	%rax, 8(%rsp)
	call	cudaMalloc@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L45
	call	cudaGetErrorString@PLT
	movl	$125, %r8d
	movq	%rax, %r9
	jmp	.L60
.L45:
	movq	8(%rsp), %rsi
	leaq	32(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L46
	call	cudaGetErrorString@PLT
	movl	$127, %r8d
	movq	%rax, %r9
	jmp	.L60
.L46:
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movl	$1, 68(%rsp)
	movabsq	$68719476752, %rdx
	movq	%rdi, 60(%rsp)
	movq	%rdx, 48(%rsp)
	movl	$1, 56(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L47
	movl	$32, %edi
	call	_Z34__device_stub__Z15wake_gpu_kernelii
.L47:
	movq	40(%rsp), %r8
	movq	8(%rsp), %rdx
	movl	$1, %ecx
	movq	%r13, %rsi
	movq	24(%rsp), %rdi
	call	cudaMemcpyAsync@PLT
	movq	32(%rsp), %rdi
	movq	40(%rsp), %r8
	movq	%r12, %rsi
	movq	8(%rsp), %rdx
	movl	$1, %ecx
	call	cudaMemcpyAsync@PLT
	call	cudaDeviceSynchronize@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L48
	call	cudaGetErrorString@PLT
	movl	$138, %r8d
	movq	%rax, %r9
	jmp	.L60
.L48:
	movl	$2, %esi
	leaq	_Z9fw_kerneljjPiS_(%rip), %rdi
	xorl	%r13d, %r13d
	call	cudaFuncSetCacheConfig@PLT
.L50:
	movl	%ebp, 60(%rsp)
	movl	56(%rsp), %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	%ebp, 64(%rsp)
	movq	48(%rsp), %rdx
	movl	$1, %esi
	movq	60(%rsp), %rdi
	movl	$1, 68(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L49
	movq	32(%rsp), %rcx
	movq	24(%rsp), %rdx
	movl	%ebx, %esi
	movl	%r13d, %edi
	call	_Z32__device_stub__Z9fw_kerneljjPiS_jjPiS_
.L49:
	incl	%r13d
	cmpl	%r13d, %r15d
	jnb	.L50
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L51
	call	cudaGetErrorString@PLT
	movl	$148, %r8d
	movq	%rax, %r9
	jmp	.L60
.L51:
	call	cudaDeviceSynchronize@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L52
	call	cudaGetErrorString@PLT
	movl	$153, %r8d
	movq	%rax, %r9
	jmp	.L60
.L52:
	movq	8(%rsp), %rdx
	movq	24(%rsp), %rsi
	movq	%r14, %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L53
	call	cudaGetErrorString@PLT
	movl	$156, %r8d
	movq	%rax, %r9
	jmp	.L60
.L53:
	movq	8(%rsp), %rdx
	movq	32(%rsp), %rsi
	movq	%r12, %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L54
	call	cudaGetErrorString@PLT
	movl	$159, %r8d
	movq	%rax, %r9
	jmp	.L60
.L54:
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L55
	call	cudaGetErrorString@PLT
	movl	$162, %r8d
	movq	%rax, %r9
	jmp	.L60
.L55:
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L41
	call	cudaGetErrorString@PLT
	movl	$165, %r8d
	movq	%rax, %r9
	jmp	.L60
.L41:
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L57
	call	__stack_chk_fail@PLT
.L57:
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2040:
	.size	fw_gpu, .-fw_gpu
	.section	.rodata.str1.1
.LC9:
	.string	"_Z9fw_kerneljjPiS_"
.LC10:
	.string	"_Z15wake_gpu_kerneli"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2073:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC9(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z9fw_kerneljjPiS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC10(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z15wake_gpu_kerneli(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2073:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	gDebug
	.bss
	.type	gDebug, @object
	.size	gDebug, 1
gDebug:
	.zero	1
	.globl	gPrint
	.type	gPrint, @object
	.size	gPrint, 1
gPrint:
	.zero	1
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/**
 * File: fw-cuda.cu
 *
 * Floyd Warshall algorithm CUDA implementation
 *
 * @author Mateusz Bojanowski
 * @source https://github.com/MTB90/CUDA_Blocked_Floyd-Warshall
 */

#include<stdio.h>
#include<stdlib.h>
#include<unistd.h>

// CUDA Headers
#include "hip/hip_runtime.h"



// Helper definition
#define VAR(v, i) __typeof(i) v=(i)
#define FOR(i, j, k) for (int i = (j); i <= (k); ++i)
#define FORD(i, j, k)for (int i=(j); i >= (k); --i)
#define FORE(i, c) for(VAR(i, (c).begin()); i != (c).end(); ++i)
#define REP(i, n) for(int i = 0;i <(n); ++i)

// CONSTS
#define INF   1061109567 // 3F 3F 3F 3F
#define CHARINF 63     // 3F  
#define CHARBIT 8
#define NONE  -1

#define CMCPYHTD hipMemcpyHostToDevice
#define CMCPYDTH hipMemcpyDeviceToHost

// CONSTS for compute capability 2.0
#define BLOCK_WIDTH 16
#define WARP       32

bool gPrint = false;   // print graph d or not
bool gDebug = false;  // print more deatails to debug

/** Cuda handle error, if err is not success print error and line in code
*
* @param status CUDA Error types
*/
#define HANDLE_ERROR(err) \
{ \
  if (err != hipSuccess) \
  { \
    fprintf(stderr, "%s failed  at line %d \nError message: %s \n", \
      __FILE__, __LINE__ ,hipGetErrorString(err)); \
    exit(EXIT_FAILURE); \
  } \
}

/**Kernel for wake gpu
*
* @param reps dummy variable only to perform some action
*/
__global__ void wake_gpu_kernel(int reps) 
{
  int idx = blockIdx.x * blockDim.x + threadIdx.x;
  if (idx >= reps) return;
}

/**Kernel for parallel Floyd Warshall algorithm on gpu
* 
* @param u number vertex of which is performed relaxation paths [v1, v2]
* @param n number of vertices in the graph G:=(V,E), n := |V(G)|
* @param d matrix of shortest paths d(G)
* @param p matrix of predecessors p(G)
*/
__global__ void fw_kernel(const unsigned int u, const unsigned int n, int * const d, int * const p)
{
  int v1 = blockDim.y * blockIdx.y + threadIdx.y;
  int v2 = blockDim.x * blockIdx.x + threadIdx.x;
  
  if (v1 < n && v2 < n) 
  {
    int newPath = d[v1 * n + u] + d[u * n + v2];
    int oldPath = d[v1 * n + v2];
    if (oldPath > newPath)
    {
      d[v1 * n + v2] = newPath;
      p[v1 * n + v2] = p[u * n + v2];    
    }
  }
}

/** Parallel Floyd Warshall algorithm using gpu
*
* @param n number of vertices in the graph G:=(V,E), n := |V(G)|
* @param G is a the graph G:=(V,E)
* @param d matrix of shortest paths d(G)
* @param p matrix of predecessors p(G)
*/
extern "C" void fw_gpu(const unsigned int n, const int * const G, int * const d, int * const p)
{
  int *dev_d = 0;
  int *dev_p = 0;
  hipError_t cudaStatus;
  hipStream_t cpyStream;

  // Choose which GPU to run on, change this on a multi-GPU system.
      cudaStatus = hipSetDevice(0);
  HANDLE_ERROR(cudaStatus);

  // Initialize the grid and block dimensions here
  dim3 dimGrid((n - 1) / BLOCK_WIDTH + 1, (n - 1) / BLOCK_WIDTH + 1, 1); 
  dim3 dimBlock(BLOCK_WIDTH, BLOCK_WIDTH, 1);

  if (gDebug) 
  {
    printf("|V| %d\n", n);
    printf("Dim Grid:\nx - %d\ny - %d\nz - %d\n", dimGrid.x, dimGrid.y, dimGrid.z);
    printf("Dim Block::\nx - %d\ny - %d\nz - %d\n", dimBlock.x, dimBlock.y, dimBlock.z);
  }

  // Create new stream to copy data  
  cudaStatus = hipStreamCreate(&cpyStream);
  HANDLE_ERROR(cudaStatus);

  // Allocate GPU buffers for matrix of shortest paths d(G) and predecessors p(G)
  cudaStatus =  hipMalloc((void**)&dev_d, n * n * sizeof(int));
  HANDLE_ERROR(cudaStatus);
  cudaStatus =  hipMalloc((void**)&dev_p, n * n * sizeof(int));
  HANDLE_ERROR(cudaStatus);
  
  // Wake up gpu
  wake_gpu_kernel<<<1, dimBlock>>>(32);

        // Copy input from host memory to GPU buffers.
        cudaStatus = hipMemcpyAsync(dev_d, G, n * n * sizeof(int), CMCPYHTD, cpyStream);
  cudaStatus = hipMemcpyAsync(dev_p, p, n * n * sizeof(int), CMCPYHTD, cpyStream);

        // cudaDeviceSynchronize waits for the kernel to finish, and returns
        cudaStatus = hipDeviceSynchronize();
        HANDLE_ERROR(cudaStatus);

  hipFuncSetCacheConfig(reinterpret_cast<const void*>(fw_kernel), hipFuncCachePreferL1 );
  FOR(u, 0, n - 1) 
  {
    fw_kernel<<<dimGrid, dimBlock>>>(u, n, dev_d, dev_p);
  }

  // Check for any errors launching the kernel
      cudaStatus = hipGetLastError();
  HANDLE_ERROR(cudaStatus);

        // cudaDeviceSynchronize waits for the kernel to finish, and returns
  // any errors encountered during the launch.
  cudaStatus = hipDeviceSynchronize();
  HANDLE_ERROR(cudaStatus);
  
  cudaStatus = hipMemcpy(d, dev_d, n * n * sizeof(int), CMCPYDTH);
  HANDLE_ERROR(cudaStatus);

  cudaStatus = hipMemcpy(p, dev_p, n * n * sizeof(int), CMCPYDTH);
  HANDLE_ERROR(cudaStatus);

  cudaStatus = hipFree(dev_d);
  HANDLE_ERROR(cudaStatus);

  cudaStatus = hipFree(dev_p);
  HANDLE_ERROR(cudaStatus);

  return;
}

/**
* Print graph G as a matrix
*
* @param n number of vertices in the graph G:=(V,E), n := |V(G)|
* @param G is a the graph G:=(V,E)
*/
void print_graph(const unsigned int n, const int * const G)
{
  FOR(v1, 0, n - 1)
  {
    FOR(v2, 0, n - 1) 
    {  
      if (G[v1 * n + v2] < INF)
        printf("%d ", G[v1 * n + v2]);
      else
        printf("INF ");
    }
    printf("\n");
  }
  printf("\n");
}

/**
* Reconstruct Path
*
* @param i, j id vertex 
* @param G is a the graph G:=(V,E)
* @param p matrix of predecessors p(G)
*/
int reconstruct_path(unsigned int n, unsigned int i, unsigned int j, const int * const p, const int * const G)
{
  if (i == j )
    return 0;
  else if ( p[i * n + j] == NONE)
    return INF;
  else
  {
    int path = reconstruct_path(n, i, p[i * n + j], p, G);
    if (path == INF) 
      return INF;
    else
      return path + G[ p [i * n + j] * n + j];
  }
}

/**
* Check paths
*
* @param n number of vertices in the graph G:=(V,E), n := |V(G)|
* @param G is a the graph G:=(V,E)
* @param d matrix of shortest paths d(G)
* @param p matrix of predecessors p(G)
*/
bool check_paths(const unsigned int n, const int * const G, const int * const d, const int * const p)
{
  
  FOR (i, 0, n - 1)
  {
    FOR (j, 0, n - 1)
    {
      int path = reconstruct_path(n, i, j, p, G);
      if (gDebug)
        printf("%d %d %d == %d \n", i, j, path, d[i * n + j]);
      if (path != d[i * n + j])
        return false;
    }
  }

  return true;
}

	.text
	.file	"fw-cuda.hip"
	.globl	_Z30__device_stub__wake_gpu_kerneli # -- Begin function _Z30__device_stub__wake_gpu_kerneli
	.type	_Z30__device_stub__wake_gpu_kerneli,@function
_Z30__device_stub__wake_gpu_kerneli:    # @_Z30__device_stub__wake_gpu_kerneli
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	16(%rsp), %rbx
	movq	%rax, (%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	40(%rsp), %r12
	leaq	32(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15wake_gpu_kerneli, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z30__device_stub__wake_gpu_kerneli, .Lfunc_end0-_Z30__device_stub__wake_gpu_kerneli
	.cfi_endproc
                                        # -- End function
	.globl	_Z24__device_stub__fw_kerneljjPiS_ # -- Begin function _Z24__device_stub__fw_kerneljjPiS_
	.type	_Z24__device_stub__fw_kerneljjPiS_,@function
_Z24__device_stub__fw_kerneljjPiS_:     # @_Z24__device_stub__fw_kerneljjPiS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	8(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9fw_kerneljjPiS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z24__device_stub__fw_kerneljjPiS_, .Lfunc_end1-_Z24__device_stub__fw_kerneljjPiS_
	.cfi_endproc
                                        # -- End function
	.globl	fw_gpu                          # -- Begin function fw_gpu
	.type	fw_gpu,@function
fw_gpu:                                 # @fw_gpu
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rcx, %rbx
	movq	%rdx, %r12
	movq	%rsi, %r13
	movl	%edi, %r15d
	xorl	%eax, %eax
	movq	%rax, 16(%rsp)
	movq	%rax, 8(%rsp)
	xorl	%edi, %edi
	callq	hipSetDevice
	testl	%eax, %eax
	jne	.LBB2_1
# %bb.3:
	leal	-1(%r15), %r14d
	shrl	$4, %r14d
	cmpb	$0, gDebug(%rip)
	je	.LBB2_5
# %bb.4:
	leal	1(%r14), %ebp
	movl	$.L.str.2, %edi
	movl	%r15d, %esi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.3, %edi
	movl	%ebp, %esi
	movl	%ebp, %edx
	movl	$1, %ecx
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.4, %edi
	movl	$16, %esi
	movl	$16, %edx
	movl	$1, %ecx
	xorl	%eax, %eax
	callq	printf
.LBB2_5:
	movq	%r12, 32(%rsp)                  # 8-byte Spill
	leaq	24(%rsp), %rdi
	callq	hipStreamCreate
	testl	%eax, %eax
	jne	.LBB2_6
# %bb.7:
	movl	%r15d, %r12d
	imull	%r12d, %r12d
	shlq	$2, %r12
	leaq	16(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_8
# %bb.9:
	leaq	8(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_10
# %bb.11:
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	movabsq	$68719476752, %rbp              # imm = 0x1000000010
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_13
# %bb.12:
	movl	$32, %edi
	callq	_Z30__device_stub__wake_gpu_kerneli
.LBB2_13:
	movq	16(%rsp), %rdi
	movq	24(%rsp), %r8
	movq	%r13, %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpyAsync
	movq	8(%rsp), %rdi
	movq	24(%rsp), %r8
	movq	%rbx, %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpyAsync
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB2_14
# %bb.15:
	leaq	1(%r14), %rax
	shlq	$32, %rax
	leaq	(%r14,%rax), %r13
	incq	%r13
	movl	$_Z9fw_kerneljjPiS_, %edi
	movl	$2, %esi
	callq	hipFuncSetCacheConfig
	xorl	%r14d, %r14d
.LBB2_16:                               # =>This Inner Loop Header: Depth=1
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_18
# %bb.17:                               #   in Loop: Header=BB2_16 Depth=1
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rcx
	movl	%r14d, %edi
	movl	%r15d, %esi
	callq	_Z24__device_stub__fw_kerneljjPiS_
.LBB2_18:                               #   in Loop: Header=BB2_16 Depth=1
	incl	%r14d
	cmpl	%r14d, %r15d
	jne	.LBB2_16
# %bb.19:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB2_20
# %bb.21:
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB2_22
# %bb.23:
	movq	16(%rsp), %rsi
	movq	32(%rsp), %rdi                  # 8-byte Reload
	movq	%r12, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB2_24
# %bb.25:
	movq	8(%rsp), %rsi
	movq	%rbx, %rdi
	movq	%r12, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB2_26
# %bb.27:
	movq	16(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB2_28
# %bb.29:
	movq	8(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB2_30
# %bb.31:
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB2_1:
	.cfi_def_cfa_offset 96
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movq	%rbx, %rdi
	movl	$106, %ecx
	jmp	.LBB2_2
.LBB2_6:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movq	%rbx, %rdi
	movl	$121, %ecx
	jmp	.LBB2_2
.LBB2_8:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movq	%rbx, %rdi
	movl	$125, %ecx
	jmp	.LBB2_2
.LBB2_10:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movq	%rbx, %rdi
	movl	$127, %ecx
	jmp	.LBB2_2
.LBB2_14:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movq	%rbx, %rdi
	movl	$138, %ecx
	jmp	.LBB2_2
.LBB2_20:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movq	%rbx, %rdi
	movl	$148, %ecx
	jmp	.LBB2_2
.LBB2_22:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movq	%rbx, %rdi
	movl	$153, %ecx
	jmp	.LBB2_2
.LBB2_24:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movq	%rbx, %rdi
	movl	$156, %ecx
	jmp	.LBB2_2
.LBB2_26:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movq	%rbx, %rdi
	movl	$159, %ecx
	jmp	.LBB2_2
.LBB2_28:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movq	%rbx, %rdi
	movl	$162, %ecx
	jmp	.LBB2_2
.LBB2_30:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movq	%rbx, %rdi
	movl	$165, %ecx
.LBB2_2:
	movq	%rax, %r8
	xorl	%eax, %eax
	callq	fprintf
	movl	$1, %edi
	callq	exit
.Lfunc_end2:
	.size	fw_gpu, .Lfunc_end2-fw_gpu
	.cfi_endproc
                                        # -- End function
	.globl	_Z11print_graphjPKi             # -- Begin function _Z11print_graphjPKi
	.type	_Z11print_graphjPKi,@function
_Z11print_graphjPKi:                    # @_Z11print_graphjPKi
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %rbx
	movl	%edi, %r14d
	xorl	%r15d, %r15d
	xorl	%ebp, %ebp
.LBB3_1:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_2 Depth 2
	xorl	%r12d, %r12d
.LBB3_2:                                #   Parent Loop BB3_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	leal	(%r15,%r12), %eax
	movl	(%rbx,%rax,4), %esi
	cmpl	$1061109566, %esi               # imm = 0x3F3F3F3E
	jg	.LBB3_6
# %bb.3:                                #   in Loop: Header=BB3_2 Depth=2
	movl	$.L.str.5, %edi
	xorl	%eax, %eax
	callq	printf
	jmp	.LBB3_7
.LBB3_6:                                #   in Loop: Header=BB3_2 Depth=2
	movl	$.L.str.6, %edi
	xorl	%eax, %eax
	callq	printf
.LBB3_7:                                #   in Loop: Header=BB3_2 Depth=2
	incq	%r12
	cmpq	%r12, %r14
	jne	.LBB3_2
# %bb.4:                                #   in Loop: Header=BB3_1 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incl	%ebp
	addq	%r14, %r15
	cmpl	%r14d, %ebp
	jne	.LBB3_1
# %bb.5:
	movl	$10, %edi
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	putchar@PLT                     # TAILCALL
.Lfunc_end3:
	.size	_Z11print_graphjPKi, .Lfunc_end3-_Z11print_graphjPKi
	.cfi_endproc
                                        # -- End function
	.globl	_Z16reconstruct_pathjjjPKiS0_   # -- Begin function _Z16reconstruct_pathjjjPKiS0_
	.type	_Z16reconstruct_pathjjjPKiS0_,@function
_Z16reconstruct_pathjjjPKiS0_:          # @_Z16reconstruct_pathjjjPKiS0_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	xorl	%r15d, %r15d
	cmpl	%edx, %esi
	je	.LBB4_4
# %bb.1:
	movl	%edx, %ebp
	movl	%edi, %r14d
	movl	%esi, %eax
	imull	%edi, %eax
	addl	%edx, %eax
	movl	(%rcx,%rax,4), %r12d
	movl	$1061109567, %r15d              # imm = 0x3F3F3F3F
	cmpl	$-1, %r12d
	je	.LBB4_4
# %bb.2:
	movq	%r8, %rbx
	movl	%r14d, %edi
	movl	%r12d, %edx
	callq	_Z16reconstruct_pathjjjPKiS0_
	cmpl	$1061109567, %eax               # imm = 0x3F3F3F3F
	je	.LBB4_4
# %bb.3:
	imull	%r14d, %r12d
	addl	%ebp, %r12d
	addl	(%rbx,%r12,4), %eax
	movl	%eax, %r15d
.LBB4_4:
	movl	%r15d, %eax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z16reconstruct_pathjjjPKiS0_, .Lfunc_end4-_Z16reconstruct_pathjjjPKiS0_
	.cfi_endproc
                                        # -- End function
	.globl	_Z11check_pathsjPKiS0_S0_       # -- Begin function _Z11check_pathsjPKiS0_S0_
	.type	_Z11check_pathsjPKiS0_S0_,@function
_Z11check_pathsjPKiS0_S0_:              # @_Z11check_pathsjPKiS0_S0_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rcx, 48(%rsp)                  # 8-byte Spill
	movq	%rdx, %r14
	movq	%rsi, 40(%rsp)                  # 8-byte Spill
                                        # kill: def $edi killed $edi def $rdi
	leal	-1(%rdi), %eax
	movl	%eax, 4(%rsp)                   # 4-byte Spill
	movb	gDebug(%rip), %dl
	movq	%rdi, 32(%rsp)                  # 8-byte Spill
	movl	%edi, %eax
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	xorl	%eax, %eax
	xorl	%ecx, %ecx
	movq	%rcx, 16(%rsp)                  # 8-byte Spill
	xorl	%ebp, %ebp
.LBB5_1:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB5_3 Depth 2
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	movb	%dl, 3(%rsp)                    # 1-byte Spill
	movl	%edx, %r15d
	xorl	%r13d, %r13d
.LBB5_3:                                #   Parent Loop BB5_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	32(%rsp), %rdi                  # 8-byte Reload
                                        # kill: def $edi killed $edi killed $rdi
	movl	%ebp, %esi
	movl	%r13d, %edx
	movq	48(%rsp), %rcx                  # 8-byte Reload
	movq	40(%rsp), %r8                   # 8-byte Reload
	callq	_Z16reconstruct_pathjjjPKiS0_
	movl	%eax, %ebx
	movq	16(%rsp), %rax                  # 8-byte Reload
	leal	(%rax,%r13), %r12d
	testb	%r15b, %r15b
	je	.LBB5_4
# %bb.5:                                #   in Loop: Header=BB5_3 Depth=2
	movl	(%r14,%r12,4), %r8d
	movl	$.L.str.8, %edi
	movl	%ebp, %esi
	movl	%r13d, %edx
	movl	%ebx, %ecx
	xorl	%eax, %eax
	callq	printf
	movb	gDebug(%rip), %al
	movb	%al, 3(%rsp)                    # 1-byte Spill
	movl	%eax, %r15d
	jmp	.LBB5_6
.LBB5_4:                                #   in Loop: Header=BB5_3 Depth=2
	xorl	%r15d, %r15d
.LBB5_6:                                # %._crit_edge
                                        #   in Loop: Header=BB5_3 Depth=2
	cmpl	(%r14,%r12,4), %ebx
	jne	.LBB5_7
# %bb.2:                                #   in Loop: Header=BB5_3 Depth=2
	incq	%r13
	cmpq	%r13, 8(%rsp)                   # 8-byte Folded Reload
	jne	.LBB5_3
# %bb.8:                                #   in Loop: Header=BB5_1 Depth=1
	cmpl	4(%rsp), %ebp                   # 4-byte Folded Reload
	leal	1(%rbp), %edx
	setae	%al
	movq	8(%rsp), %rcx                   # 8-byte Reload
	addq	%rcx, 16(%rsp)                  # 8-byte Folded Spill
	movl	%edx, %ebp
	cmpl	%ecx, %edx
	movb	3(%rsp), %dl                    # 1-byte Reload
	jne	.LBB5_1
	jmp	.LBB5_9
.LBB5_7:
	movq	24(%rsp), %rax                  # 8-byte Reload
.LBB5_9:                                # %.loopexit
	andb	$1, %al
                                        # kill: def $al killed $al killed $rax
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z11check_pathsjPKiS0_S0_, .Lfunc_end5-_Z11check_pathsjPKiS0_S0_
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB6_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB6_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15wake_gpu_kerneli, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9fw_kerneljjPiS_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end6:
	.size	__hip_module_ctor, .Lfunc_end6-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB7_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB7_2:
	retq
.Lfunc_end7:
	.size	__hip_module_dtor, .Lfunc_end7-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	gPrint,@object                  # @gPrint
	.bss
	.globl	gPrint
gPrint:
	.byte	0                               # 0x0
	.size	gPrint, 1

	.type	gDebug,@object                  # @gDebug
	.globl	gDebug
gDebug:
	.byte	0                               # 0x0
	.size	gDebug, 1

	.type	_Z15wake_gpu_kerneli,@object    # @_Z15wake_gpu_kerneli
	.section	.rodata,"a",@progbits
	.globl	_Z15wake_gpu_kerneli
	.p2align	3, 0x0
_Z15wake_gpu_kerneli:
	.quad	_Z30__device_stub__wake_gpu_kerneli
	.size	_Z15wake_gpu_kerneli, 8

	.type	_Z9fw_kerneljjPiS_,@object      # @_Z9fw_kerneljjPiS_
	.globl	_Z9fw_kerneljjPiS_
	.p2align	3, 0x0
_Z9fw_kerneljjPiS_:
	.quad	_Z24__device_stub__fw_kerneljjPiS_
	.size	_Z9fw_kerneljjPiS_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"%s failed  at line %d \nError message: %s \n"
	.size	.L.str, 43

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/vsuhasm/Group-steiner-VLSI-routing/master/fw-cuda.hip"
	.size	.L.str.1, 116

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"|V| %d\n"
	.size	.L.str.2, 8

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Dim Grid:\nx - %d\ny - %d\nz - %d\n"
	.size	.L.str.3, 32

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Dim Block::\nx - %d\ny - %d\nz - %d\n"
	.size	.L.str.4, 34

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"%d "
	.size	.L.str.5, 4

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"INF "
	.size	.L.str.6, 5

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"%d %d %d == %d \n"
	.size	.L.str.8, 17

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z15wake_gpu_kerneli"
	.size	.L__unnamed_1, 21

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z9fw_kerneljjPiS_"
	.size	.L__unnamed_2, 19

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z30__device_stub__wake_gpu_kerneli
	.addrsig_sym _Z24__device_stub__fw_kerneljjPiS_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z15wake_gpu_kerneli
	.addrsig_sym _Z9fw_kerneljjPiS_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z15wake_gpu_kerneli    ; -- Begin function _Z15wake_gpu_kerneli
	.globl	_Z15wake_gpu_kerneli
	.p2align	8
	.type	_Z15wake_gpu_kerneli,@function
_Z15wake_gpu_kerneli:                   ; @_Z15wake_gpu_kerneli
; %bb.0:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15wake_gpu_kerneli
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 4
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 1
		.amdhsa_next_free_sgpr 1
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z15wake_gpu_kerneli, .Lfunc_end0-_Z15wake_gpu_kerneli
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 4
; NumSgprs: 0
; NumVgprs: 0
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 1
; NumVGPRsForWavesPerEU: 1
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z9fw_kerneljjPiS_      ; -- Begin function _Z9fw_kerneljjPiS_
	.globl	_Z9fw_kerneljjPiS_
	.p2align	8
	.type	_Z9fw_kerneljjPiS_,@function
_Z9fw_kerneljjPiS_:                     ; @_Z9fw_kerneljjPiS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b64 s[4:5], s[0:1], 0x0
	v_bfe_u32 v1, v0, 10, 10
	v_and_b32_e32 v4, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	v_mad_u64_u32 v[2:3], null, s15, s3, v[1:2]
	v_mad_u64_u32 v[0:1], null, s14, s2, v[4:5]
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_u32_e32 v1, v2, v0
	v_cmpx_gt_u32_e64 s5, v1
	s_cbranch_execz .LBB1_3
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x8
	v_mul_lo_u32 v3, v2, s5
	v_mov_b32_e32 v5, 0
	v_mad_u64_u32 v[1:2], null, s5, s4, v[0:1]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v4, s4, v3
	v_mov_b32_e32 v2, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[6:7], 2, v[4:5]
	v_add_nc_u32_e32 v4, v3, v0
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[0:1], 2, v[4:5]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v6, vcc_lo, s0, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v8, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v9, vcc_lo, s1, v3, vcc_lo
	v_add_co_u32 v4, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v1, vcc_lo
	s_clause 0x2
	global_load_b32 v8, v[8:9], off
	global_load_b32 v6, v[6:7], off
	global_load_b32 v7, v[4:5], off
	s_waitcnt vmcnt(1)
	v_add_nc_u32_e32 v6, v8, v6
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_i32_e32 vcc_lo, v7, v6
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_3
; %bb.2:
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	global_store_b32 v[4:5], v6, off
	v_add_co_u32 v0, vcc_lo, s2, v0
	global_load_b32 v2, v[2:3], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v2, off
.LBB1_3:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9fw_kerneljjPiS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z9fw_kerneljjPiS_, .Lfunc_end1-_Z9fw_kerneljjPiS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 332
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 4
    .kernarg_segment_size: 4
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15wake_gpu_kerneli
    .private_segment_fixed_size: 0
    .sgpr_count:     0
    .sgpr_spill_count: 0
    .symbol:         _Z15wake_gpu_kerneli.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     0
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .offset:         4
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9fw_kerneljjPiS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z9fw_kerneljjPiS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
