#include <cstdlib>
#include <iostream>
#include <math.h>
#include <ctime>
#include <chrono>
#include <vector>
using namespace std;

#define N 4000
#define count N*N
#define threadsPerBlock 1000
#define numberBlocks N*N/threadsPerBlock

// __device__ int partition(double* input, int start, int end)
// {
//     double pivot = input[end];
//
//     while(start < end){
//         while(input[start] < pivot)
//             start++;
//         while (input[end] > pivot)
//             end--;
//         if (input[start] == inpucout<<"time: "<<endTime<<"   "<<startTime<<"   "<<CLOCKS_PER_SEC<<endl;t[end])
//             start++;
//         else if(start < end){
//             double tmp = input[start];
//             input[start] = input[end];
//             input[end] = tmp;
//         }
//     }
//     return end;
// }
//
// __device__ double quickSelect(double* input, int p, int r, int k){
//     if(p == r){
//       return input[p];
//     }
//     int j = partition(input, p, r);
//     int length = j - p + 1;
//     if (length == k){
//       return input[j];
//     }cout<<"time: "<<endTime<<"   "<<startTime<<"   "<<CLOCKS_PER_SEC<<endl;
//     else if( k < length ){
//       return quickSelect(input, p, j - 1, k);
//     }
//     else{
//       return quickSelect(input, j + 1, r, k - length);
//     }
// }

__device__ void sort(double* input){
  for(int i=0;i<5;i++){
    for(int j=i;j<5;j++){
      if(input[j]<input[i]){
        double new_temp = input[i];
        input[i] = input[j];
        input[j] = new_temp;
      }
    }
  }
}

__global__ void median (double *a, double *b) {
  int number = blockIdx.x*blockDim.x + threadIdx.x;
  // if((number <N) || (number>=N*N-N)||(number/N==0)||(number/N==N-1)){
  //   b[number]=a[number];
  // }
  // if((number > N-1) && (threadIdx.x > 0) && (threadIdx.x < N-1) && (number < N*N-N)){
  if((number > N-1) && (number%N > 0) && (number%N < N-1) && (number < N*N-N)){
    double tempCompare[5];
    tempCompare[0] = a[number];
    tempCompare[1] = a[number-1];
    tempCompare[2] = a[number+1];
    tempCompare[3] = a[number-N];
    tempCompare[4] = a[number+N];
    // b[number] = quickSelect(tempCompare,0,4,2);
    // a[number] = tempCompare[2];
    sort(tempCompare);
    b[number]=tempCompare[2];
  }
  else if(number < N*N){
    b[number]=a[number];
  }
  __syncthreads();
}

__global__ void move (double *b, double *a) {
  int number = blockIdx.x*blockDim.x + threadIdx.x;
  a[number] = b[number];
}

__global__ void reduction (double *in, double *out) {
  __shared__ double temp[threadsPerBlock];
  int id = threadIdx.x;
  temp[id] = in[blockIdx.x*blockDim.x + id];
  __syncthreads();
  if(id<500 && id>11){
    temp[id] += temp[id+500]; __syncthreads();
  }
  __syncthreads();
  if(id<256){
    temp[id] += temp[id+256]; __syncthreads();
  }
  if(id<128){
    temp[id] += temp[id+128]; __syncthreads();
  }
  if(id<64){
    temp[id] += temp[id+64]; __syncthreads();
  }
  if(id<32){
    temp[id] += temp[id+32]; __syncthreads();
  }
  if(id<16){
    temp[id] += temp[id+16]; __syncthreads();
  }
  if(id<8){
    temp[id] += temp[id+8]; __syncthreads();
  }
  if(id<4){
    temp[id] += temp[id+4]; __syncthreads();
  }
  if(id<2){
    temp[id] += temp[id+2]; __syncthreads();
  }
  if(id<1){
    temp[id] += temp[id+1]; __syncthreads();
  }
  if(id<1){out[blockIdx.x] = temp[id];}
}

__global__ void sumGen (double *in, double *out) {
  for(int i=0;i<(N/threadsPerBlock)*(N/threadsPerBlock);i++){
    out[0]+=in[i];
  }
}

__global__ void assign (double *a, double *spe) {
  spe[0] = a[count/2+N/2];
  spe[1] = a[17*N+31];
}

int main(){
  double A[count], B[count];
  double sum[1], speNum[2];
  double *d_a, *d_b, *d_partSum, *d_ppartSum, *d_sum, *d_speNum;
  int size = N*N*sizeof(double);
  int twosize = 2*sizeof(double);

  sum[0]=0;

  for(int i=0;i<N;i++){
    for(int j=0;j<N;j++){
      A[i*N+j] = sin(i*i+j)*sin(i*i+j)+cos(i-j);
      // A[i*N+j] = j;
      B[i*N+j] = 0;
    }
  }
  cudaMalloc((void **)&d_a, size);
  cudaMalloc((void **)&d_b, size);
  cudaMalloc((void **)&d_partSum, size/threadsPerBlock);
  cudaMalloc((void **)&d_ppartSum, size/threadsPerBlock/threadsPerBlock);
  cudaMalloc((void **)&d_sum, sizeof(double));
  cudaMalloc((void **)&d_speNum,twosize);
  cudaMemcpy(d_a, A, size, cudaMemcpyHostToDevice);
  cudaMemcpy(d_sum, sum, sizeof(double), cudaMemcpyHostToDevice);
  // clock_t startaaa = clock();
  // cudaEvent_t startTime=0, endTime=0;
  // cudaEventCreate(&startTime);
  // cudaEventCreate(&endTime);
  auto start = std::chrono::system_clock::now();
  // cudaEventRecord(startTime, 0);
  for(int i=0;i<10;i++){
      median<<<numberBlocks,threadsPerBlock>>>(d_a,d_b);
      cudaDeviceSynchronize();
      move<<<numberBlocks,threadsPerBlock>>>(d_b,d_a);
      cudaDeviceSynchronize();
  }
  reduction<<<count/threadsPerBlock, threadsPerBlock>>>(d_a,d_partSum);
  reduction<<<(count/threadsPerBlock/threadsPerBlock),threadsPerBlock>>>(d_partSum,d_ppartSum);
  sumGen<<<1,1>>>(d_ppartSum,d_sum);
  assign<<<1,1>>>(d_a, d_speNum);
  cudaDeviceSynchronize();
  // clock_t endbbb = clock();
  // cudaEventRecord(endTime, 0);
  // cudaEventSynchronize(endTime) ;
  // float time;
  // cudaEventElapsedTime(&time,startTime,endTime);
  auto end = std::chrono::system_clock::now();
  std::chrono::duration<double> elapsed_seconds = end-start;

  cudaMemcpy(sum, d_sum, sizeof(double), cudaMemcpyDeviceToHost);
  cudaMemcpy(speNum, d_speNum, twosize, cudaMemcpyDeviceToHost);
  cudaMemcpy(B, d_a, size, cudaMemcpyDeviceToHost);
  cudaFree(d_a);cudaFree(d_b);cudaFree(d_partSum);cudaFree(d_ppartSum);cudaFree(d_sum);cudaFree(d_speNum);


  cout.precision(8);

  // cout<<"time: "<<endbbb<<"   "<<startaaa<<"   "<<CLOCKS_PER_SEC<<endl;
  // cout<<"time: "<<(endTime-startTime)/CLOCKS_PER_SEC<<endl;
  // cout<<"time: "<<time<<endl;
  // cout<<"time: "<<elapsed_seconds<<endl;
  printf("time :%f\n",elapsed_seconds);
  cout<<"Sum: "<<sum[0]<<endl;
  cout<<"A[n/2][n/2]: "<<speNum[0]<<"    "<<A[count/2+N/2]<<"    "<<B[count/2+N/2]<<endl;
  cout<<"A[17][31]: "<<speNum[1]<<"    "<<A[17*N+31]<<"    "<<B[17*N+31]<<endl;
  cout<<"A[999][999]: "<<A[999*N+999]<<"    "<<B[999*N+999]<<endl;
  cout<<"A[999][500]: "<<A[999*N+500]<<"    "<<B[999*N+500]<<endl;
  cout<<"A[500][999]: "<<A[500*N+999]<<"    "<<B[500*N+999]<<endl;
  cout<<"A[500][0]: "<<A[500*N]<<"    "<<B[500*N]<<endl;
  cout<<"A[501][0]: "<<A[501*N]<<"    "<<B[501*N]<<endl;

  return 0;
}

	.file	"tmpxft_002b2712_00000000-6_p5test.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4104:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4104:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.align 2
	.type	_ZNSolsEPFRSoS_E.isra.0, @function
_ZNSolsEPFRSoS_E.isra.0:
.LFB4823:
	.cfi_startproc
	jmp	*%rsi
	.cfi_endproc
.LFE4823:
	.size	_ZNSolsEPFRSoS_E.isra.0, .-_ZNSolsEPFRSoS_E.isra.0
	.globl	_Z4sortPd
	.type	_Z4sortPd, @function
_Z4sortPd:
.LFB4097:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE4097:
	.size	_Z4sortPd, .-_Z4sortPd
	.globl	_Z27__device_stub__Z6medianPdS_PdS_
	.type	_Z27__device_stub__Z6medianPdS_PdS_, @function
_Z27__device_stub__Z6medianPdS_PdS_:
.LFB4126:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L5
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z6medianPdS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L5:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L7
	call	__stack_chk_fail@PLT
.L7:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4126:
	.size	_Z27__device_stub__Z6medianPdS_PdS_, .-_Z27__device_stub__Z6medianPdS_PdS_
	.globl	_Z6medianPdS_
	.type	_Z6medianPdS_, @function
_Z6medianPdS_:
.LFB4127:
	.cfi_startproc
	endbr64
	jmp	_Z27__device_stub__Z6medianPdS_PdS_
	.cfi_endproc
.LFE4127:
	.size	_Z6medianPdS_, .-_Z6medianPdS_
	.globl	_Z25__device_stub__Z4movePdS_PdS_
	.type	_Z25__device_stub__Z4movePdS_PdS_, @function
_Z25__device_stub__Z4movePdS_PdS_:
.LFB4128:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L11
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z4movePdS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L11:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L13
	call	__stack_chk_fail@PLT
.L13:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4128:
	.size	_Z25__device_stub__Z4movePdS_PdS_, .-_Z25__device_stub__Z4movePdS_PdS_
	.globl	_Z4movePdS_
	.type	_Z4movePdS_, @function
_Z4movePdS_:
.LFB4129:
	.cfi_startproc
	endbr64
	jmp	_Z25__device_stub__Z4movePdS_PdS_
	.cfi_endproc
.LFE4129:
	.size	_Z4movePdS_, .-_Z4movePdS_
	.globl	_Z30__device_stub__Z9reductionPdS_PdS_
	.type	_Z30__device_stub__Z9reductionPdS_PdS_, @function
_Z30__device_stub__Z9reductionPdS_PdS_:
.LFB4130:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z9reductionPdS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L16:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L18
	call	__stack_chk_fail@PLT
.L18:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4130:
	.size	_Z30__device_stub__Z9reductionPdS_PdS_, .-_Z30__device_stub__Z9reductionPdS_PdS_
	.globl	_Z9reductionPdS_
	.type	_Z9reductionPdS_, @function
_Z9reductionPdS_:
.LFB4131:
	.cfi_startproc
	endbr64
	jmp	_Z30__device_stub__Z9reductionPdS_PdS_
	.cfi_endproc
.LFE4131:
	.size	_Z9reductionPdS_, .-_Z9reductionPdS_
	.globl	_Z27__device_stub__Z6sumGenPdS_PdS_
	.type	_Z27__device_stub__Z6sumGenPdS_PdS_, @function
_Z27__device_stub__Z6sumGenPdS_PdS_:
.LFB4132:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L21
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z6sumGenPdS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L21:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L23
	call	__stack_chk_fail@PLT
.L23:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4132:
	.size	_Z27__device_stub__Z6sumGenPdS_PdS_, .-_Z27__device_stub__Z6sumGenPdS_PdS_
	.globl	_Z6sumGenPdS_
	.type	_Z6sumGenPdS_, @function
_Z6sumGenPdS_:
.LFB4133:
	.cfi_startproc
	endbr64
	jmp	_Z27__device_stub__Z6sumGenPdS_PdS_
	.cfi_endproc
.LFE4133:
	.size	_Z6sumGenPdS_, .-_Z6sumGenPdS_
	.globl	_Z27__device_stub__Z6assignPdS_PdS_
	.type	_Z27__device_stub__Z6assignPdS_PdS_, @function
_Z27__device_stub__Z6assignPdS_PdS_:
.LFB4134:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L26
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z6assignPdS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L26:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L28
	call	__stack_chk_fail@PLT
.L28:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4134:
	.size	_Z27__device_stub__Z6assignPdS_PdS_, .-_Z27__device_stub__Z6assignPdS_PdS_
	.globl	_Z6assignPdS_
	.type	_Z6assignPdS_, @function
_Z6assignPdS_:
.LFB4135:
	.cfi_startproc
	endbr64
	jmp	_Z27__device_stub__Z6assignPdS_PdS_
	.cfi_endproc
.LFE4135:
	.size	_Z6assignPdS_, .-_Z6assignPdS_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"time :%f\n"
.LC3:
	.string	"Sum: "
.LC4:
	.string	"A[n/2][n/2]: "
.LC5:
	.string	"    "
.LC6:
	.string	"A[17][31]: "
.LC7:
	.string	"A[999][999]: "
.LC8:
	.string	"A[999][500]: "
.LC9:
	.string	"A[500][999]: "
.LC10:
	.string	"A[500][0]: "
.LC11:
	.string	"A[501][0]: "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB4098:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	leaq	-256000000(%rsp), %r11
	.cfi_def_cfa 11, 256000056
.LPSRL0:
	subq	$4096, %rsp
	orq	$0, (%rsp)
	cmpq	%r11, %rsp
	jne	.LPSRL0
	.cfi_def_cfa_register 7
	subq	$136, %rsp
	.cfi_def_cfa_offset 256000192
	xorl	%ebx, %ebx
	movq	%fs:40, %rax
	movq	%rax, 256000120(%rsp)
	xorl	%eax, %eax
	leaq	120(%rsp), %r13
	movq	$0x000000000, 96(%rsp)
	movq	%r13, %r12
.L33:
	movl	%ebx, %r14d
	xorl	%ebp, %ebp
	imull	%ebx, %r14d
.L32:
	leal	(%r14,%rbp), %eax
	cvtsi2sdl	%eax, %xmm0
	call	sin@PLT
	movl	%ebx, %eax
	subl	%ebp, %eax
	movsd	%xmm0, 8(%rsp)
	cvtsi2sdl	%eax, %xmm0
	call	cos@PLT
	movsd	8(%rsp), %xmm1
	mulsd	%xmm1, %xmm1
	addsd	%xmm0, %xmm1
	movsd	%xmm1, 0(%r13,%rbp,8)
	incq	%rbp
	cmpq	$4000, %rbp
	jne	.L32
	incl	%ebx
	addq	$32000, %r13
	cmpl	$4000, %ebx
	jne	.L33
	leaq	128000120(%rsp), %rbp
	xorl	%eax, %eax
	movl	$32000000, %ecx
	movl	$128000000, %esi
	movq	%rbp, %rdi
	leaq	96(%rsp), %r13
	movl	$536871037, %ebx
	movl	$10, %r15d
	rep stosl
	leaq	24(%rsp), %rdi
	salq	$3, %rbx
	movabsq	$4294983296, %r14
	call	cudaMalloc@PLT
	leaq	32(%rsp), %rdi
	movl	$128000000, %esi
	call	cudaMalloc@PLT
	leaq	40(%rsp), %rdi
	movl	$128000, %esi
	call	cudaMalloc@PLT
	leaq	48(%rsp), %rdi
	movl	$128, %esi
	call	cudaMalloc@PLT
	leaq	56(%rsp), %rdi
	movl	$8, %esi
	call	cudaMalloc@PLT
	leaq	64(%rsp), %rdi
	movl	$16, %esi
	call	cudaMalloc@PLT
	movq	24(%rsp), %rdi
	movq	%r12, %rsi
	movl	$1, %ecx
	movl	$128000000, %edx
	call	cudaMemcpy@PLT
	movq	56(%rsp), %rdi
	movl	$1, %ecx
	movq	%r13, %rsi
	movl	$8, %edx
	call	cudaMemcpy@PLT
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	movq	%rax, %r12
.L38:
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rbx, %rdx
	movl	$1, %ecx
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%rbx, 84(%rsp)
	movl	$1, 92(%rsp)
	movq	%r14, 72(%rsp)
	movl	$1, 80(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L36
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdi
	call	_Z27__device_stub__Z6medianPdS_PdS_
.L36:
	call	cudaDeviceSynchronize@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rbx, %rdx
	movl	$1, %ecx
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%rbx, 84(%rsp)
	movl	$1, 92(%rsp)
	movq	%r14, 72(%rsp)
	movl	$1, 80(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L37
	movq	24(%rsp), %rsi
	movq	32(%rsp), %rdi
	call	_Z25__device_stub__Z4movePdS_PdS_
.L37:
	call	cudaDeviceSynchronize@PLT
	decl	%r15d
	jne	.L38
	movl	$536871037, %edx
	movl	$33554557, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$3, %rdx
	salq	$7, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rdx, 84(%rsp)
	movl	$1, 92(%rsp)
	movq	%rdi, 72(%rsp)
	movl	$1, 80(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L39
	movq	40(%rsp), %rsi
	movq	24(%rsp), %rdi
	call	_Z30__device_stub__Z9reductionPdS_PdS_
.L39:
	movl	$536871037, %edx
	movl	$268435457, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$3, %rdx
	salq	$4, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rdx, 84(%rsp)
	movl	$1, 92(%rsp)
	movq	%rdi, 72(%rsp)
	movl	$1, 80(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L40
	movq	48(%rsp), %rsi
	movq	40(%rsp), %rdi
	call	_Z30__device_stub__Z9reductionPdS_PdS_
.L40:
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movl	$1, 92(%rsp)
	movq	%rdi, %rdx
	movq	%rdi, 84(%rsp)
	movq	%rdi, 72(%rsp)
	movl	$1, 80(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L41
	movq	56(%rsp), %rsi
	movq	48(%rsp), %rdi
	call	_Z27__device_stub__Z6sumGenPdS_PdS_
.L41:
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movl	$1, 92(%rsp)
	movq	%rdi, %rdx
	movq	%rdi, 84(%rsp)
	movq	%rdi, 72(%rsp)
	movl	$1, 80(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L42
	movq	64(%rsp), %rsi
	movq	24(%rsp), %rdi
	call	_Z27__device_stub__Z6assignPdS_PdS_
.L42:
	call	cudaDeviceSynchronize@PLT
	leaq	.LC5(%rip), %rbx
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	movq	56(%rsp), %rsi
	movl	$2, %ecx
	movq	%r13, %rdi
	subq	%r12, %rax
	movl	$8, %edx
	cvtsi2sdq	%rax, %xmm0
	divsd	.LC1(%rip), %xmm0
	movsd	%xmm0, 8(%rsp)
	call	cudaMemcpy@PLT
	movq	64(%rsp), %rsi
	leaq	104(%rsp), %rdi
	movl	$2, %ecx
	movl	$16, %edx
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbp, %rdi
	movl	$128000000, %edx
	leaq	_ZSt4cout(%rip), %rbp
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	movsd	8(%rsp), %xmm0
	leaq	.LC2(%rip), %rsi
	movb	$1, %al
	movq	$8, 16+_ZSt4cout(%rip)
	movl	$2, %edi
	call	__printf_chk@PLT
	leaq	.LC3(%rip), %rsi
	movq	%rbp, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	96(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC4(%rip), %rsi
	movq	%rbp, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	104(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rbx, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	64016120(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rbx, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	192016120(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC6(%rip), %rsi
	movq	%rbp, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	112(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rbx, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	544368(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rbx, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	128544368(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC7(%rip), %rsi
	movq	%rbp, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	31976112(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rbx, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	159976112(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC8(%rip), %rsi
	movq	%rbp, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	31972120(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rbx, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	159972120(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC9(%rip), %rsi
	movq	%rbp, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	16008112(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rbx, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	144008112(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC10(%rip), %rsi
	movq	%rbp, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	16000120(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rbx, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	144000120(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC11(%rip), %rsi
	movq	%rbp, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	16032120(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rbx, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	144032120(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	256000120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L43
	call	__stack_chk_fail@PLT
.L43:
	addq	$256000136, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4098:
	.size	main, .-main
	.section	.rodata.str1.1
.LC12:
	.string	"_Z6assignPdS_"
.LC13:
	.string	"_Z6sumGenPdS_"
.LC14:
	.string	"_Z9reductionPdS_"
.LC15:
	.string	"_Z4movePdS_"
.LC16:
	.string	"_Z6medianPdS_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4137:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC12(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z6assignPdS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC13(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z6sumGenPdS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC14(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z9reductionPdS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC15(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z4movePdS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC16(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z6medianPdS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4137:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC1:
	.long	0
	.long	1104006501
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <cstdlib>
#include <iostream>
#include <math.h>
#include <ctime>
#include <chrono>
#include <vector>
using namespace std;

#define N 4000
#define count N*N
#define threadsPerBlock 1000
#define numberBlocks N*N/threadsPerBlock

// __device__ int partition(double* input, int start, int end)
// {
//     double pivot = input[end];
//
//     while(start < end){
//         while(input[start] < pivot)
//             start++;
//         while (input[end] > pivot)
//             end--;
//         if (input[start] == inpucout<<"time: "<<endTime<<"   "<<startTime<<"   "<<CLOCKS_PER_SEC<<endl;t[end])
//             start++;
//         else if(start < end){
//             double tmp = input[start];
//             input[start] = input[end];
//             input[end] = tmp;
//         }
//     }
//     return end;
// }
//
// __device__ double quickSelect(double* input, int p, int r, int k){
//     if(p == r){
//       return input[p];
//     }
//     int j = partition(input, p, r);
//     int length = j - p + 1;
//     if (length == k){
//       return input[j];
//     }cout<<"time: "<<endTime<<"   "<<startTime<<"   "<<CLOCKS_PER_SEC<<endl;
//     else if( k < length ){
//       return quickSelect(input, p, j - 1, k);
//     }
//     else{
//       return quickSelect(input, j + 1, r, k - length);
//     }
// }

__device__ void sort(double* input){
  for(int i=0;i<5;i++){
    for(int j=i;j<5;j++){
      if(input[j]<input[i]){
        double new_temp = input[i];
        input[i] = input[j];
        input[j] = new_temp;
      }
    }
  }
}

__global__ void median (double *a, double *b) {
  int number = blockIdx.x*blockDim.x + threadIdx.x;
  // if((number <N) || (number>=N*N-N)||(number/N==0)||(number/N==N-1)){
  //   b[number]=a[number];
  // }
  // if((number > N-1) && (threadIdx.x > 0) && (threadIdx.x < N-1) && (number < N*N-N)){
  if((number > N-1) && (number%N > 0) && (number%N < N-1) && (number < N*N-N)){
    double tempCompare[5];
    tempCompare[0] = a[number];
    tempCompare[1] = a[number-1];
    tempCompare[2] = a[number+1];
    tempCompare[3] = a[number-N];
    tempCompare[4] = a[number+N];
    // b[number] = quickSelect(tempCompare,0,4,2);
    // a[number] = tempCompare[2];
    sort(tempCompare);
    b[number]=tempCompare[2];
  }
  else if(number < N*N){
    b[number]=a[number];
  }
  __syncthreads();
}

__global__ void move (double *b, double *a) {
  int number = blockIdx.x*blockDim.x + threadIdx.x;
  a[number] = b[number];
}

__global__ void reduction (double *in, double *out) {
  __shared__ double temp[threadsPerBlock];
  int id = threadIdx.x;
  temp[id] = in[blockIdx.x*blockDim.x + id];
  __syncthreads();
  if(id<500 && id>11){
    temp[id] += temp[id+500]; __syncthreads();
  }
  __syncthreads();
  if(id<256){
    temp[id] += temp[id+256]; __syncthreads();
  }
  if(id<128){
    temp[id] += temp[id+128]; __syncthreads();
  }
  if(id<64){
    temp[id] += temp[id+64]; __syncthreads();
  }
  if(id<32){
    temp[id] += temp[id+32]; __syncthreads();
  }
  if(id<16){
    temp[id] += temp[id+16]; __syncthreads();
  }
  if(id<8){
    temp[id] += temp[id+8]; __syncthreads();
  }
  if(id<4){
    temp[id] += temp[id+4]; __syncthreads();
  }
  if(id<2){
    temp[id] += temp[id+2]; __syncthreads();
  }
  if(id<1){
    temp[id] += temp[id+1]; __syncthreads();
  }
  if(id<1){out[blockIdx.x] = temp[id];}
}

__global__ void sumGen (double *in, double *out) {
  for(int i=0;i<(N/threadsPerBlock)*(N/threadsPerBlock);i++){
    out[0]+=in[i];
  }
}

__global__ void assign (double *a, double *spe) {
  spe[0] = a[count/2+N/2];
  spe[1] = a[17*N+31];
}

int main(){
  double A[count], B[count];
  double sum[1], speNum[2];
  double *d_a, *d_b, *d_partSum, *d_ppartSum, *d_sum, *d_speNum;
  int size = N*N*sizeof(double);
  int twosize = 2*sizeof(double);

  sum[0]=0;

  for(int i=0;i<N;i++){
    for(int j=0;j<N;j++){
      A[i*N+j] = sin(i*i+j)*sin(i*i+j)+cos(i-j);
      // A[i*N+j] = j;
      B[i*N+j] = 0;
    }
  }
  hipMalloc((void **)&d_a, size);
  hipMalloc((void **)&d_b, size);
  hipMalloc((void **)&d_partSum, size/threadsPerBlock);
  hipMalloc((void **)&d_ppartSum, size/threadsPerBlock/threadsPerBlock);
  hipMalloc((void **)&d_sum, sizeof(double));
  hipMalloc((void **)&d_speNum,twosize);
  hipMemcpy(d_a, A, size, hipMemcpyHostToDevice);
  hipMemcpy(d_sum, sum, sizeof(double), hipMemcpyHostToDevice);
  // clock_t startaaa = clock();
  // cudaEvent_t startTime=0, endTime=0;
  // cudaEventCreate(&startTime);
  // cudaEventCreate(&endTime);
  auto start = std::chrono::system_clock::now();
  // cudaEventRecord(startTime, 0);
  for(int i=0;i<10;i++){
      median<<<numberBlocks,threadsPerBlock>>>(d_a,d_b);
      hipDeviceSynchronize();
      move<<<numberBlocks,threadsPerBlock>>>(d_b,d_a);
      hipDeviceSynchronize();
  }
  reduction<<<count/threadsPerBlock, threadsPerBlock>>>(d_a,d_partSum);
  reduction<<<(count/threadsPerBlock/threadsPerBlock),threadsPerBlock>>>(d_partSum,d_ppartSum);
  sumGen<<<1,1>>>(d_ppartSum,d_sum);
  assign<<<1,1>>>(d_a, d_speNum);
  hipDeviceSynchronize();
  // clock_t endbbb = clock();
  // cudaEventRecord(endTime, 0);
  // cudaEventSynchronize(endTime) ;
  // float time;
  // cudaEventElapsedTime(&time,startTime,endTime);
  auto end = std::chrono::system_clock::now();
  std::chrono::duration<double> elapsed_seconds = end-start;

  hipMemcpy(sum, d_sum, sizeof(double), hipMemcpyDeviceToHost);
  hipMemcpy(speNum, d_speNum, twosize, hipMemcpyDeviceToHost);
  hipMemcpy(B, d_a, size, hipMemcpyDeviceToHost);
  hipFree(d_a);hipFree(d_b);hipFree(d_partSum);hipFree(d_ppartSum);hipFree(d_sum);hipFree(d_speNum);


  cout.precision(8);

  // cout<<"time: "<<endbbb<<"   "<<startaaa<<"   "<<CLOCKS_PER_SEC<<endl;
  // cout<<"time: "<<(endTime-startTime)/CLOCKS_PER_SEC<<endl;
  // cout<<"time: "<<time<<endl;
  // cout<<"time: "<<elapsed_seconds<<endl;
  printf("time :%f\n",elapsed_seconds);
  cout<<"Sum: "<<sum[0]<<endl;
  cout<<"A[n/2][n/2]: "<<speNum[0]<<"    "<<A[count/2+N/2]<<"    "<<B[count/2+N/2]<<endl;
  cout<<"A[17][31]: "<<speNum[1]<<"    "<<A[17*N+31]<<"    "<<B[17*N+31]<<endl;
  cout<<"A[999][999]: "<<A[999*N+999]<<"    "<<B[999*N+999]<<endl;
  cout<<"A[999][500]: "<<A[999*N+500]<<"    "<<B[999*N+500]<<endl;
  cout<<"A[500][999]: "<<A[500*N+999]<<"    "<<B[500*N+999]<<endl;
  cout<<"A[500][0]: "<<A[500*N]<<"    "<<B[500*N]<<endl;
  cout<<"A[501][0]: "<<A[501*N]<<"    "<<B[501*N]<<endl;

  return 0;
}

	.text
	.file	"p5test.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z21__device_stub__medianPdS_   # -- Begin function _Z21__device_stub__medianPdS_
	.type	_Z21__device_stub__medianPdS_,@function
_Z21__device_stub__medianPdS_:          # @_Z21__device_stub__medianPdS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6medianPdS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z21__device_stub__medianPdS_, .Lfunc_end0-_Z21__device_stub__medianPdS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z19__device_stub__movePdS_     # -- Begin function _Z19__device_stub__movePdS_
	.type	_Z19__device_stub__movePdS_,@function
_Z19__device_stub__movePdS_:            # @_Z19__device_stub__movePdS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z4movePdS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z19__device_stub__movePdS_, .Lfunc_end1-_Z19__device_stub__movePdS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z24__device_stub__reductionPdS_ # -- Begin function _Z24__device_stub__reductionPdS_
	.type	_Z24__device_stub__reductionPdS_,@function
_Z24__device_stub__reductionPdS_:       # @_Z24__device_stub__reductionPdS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9reductionPdS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z24__device_stub__reductionPdS_, .Lfunc_end2-_Z24__device_stub__reductionPdS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z21__device_stub__sumGenPdS_   # -- Begin function _Z21__device_stub__sumGenPdS_
	.type	_Z21__device_stub__sumGenPdS_,@function
_Z21__device_stub__sumGenPdS_:          # @_Z21__device_stub__sumGenPdS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6sumGenPdS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z21__device_stub__sumGenPdS_, .Lfunc_end3-_Z21__device_stub__sumGenPdS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z21__device_stub__assignPdS_   # -- Begin function _Z21__device_stub__assignPdS_
	.type	_Z21__device_stub__assignPdS_,@function
_Z21__device_stub__assignPdS_:          # @_Z21__device_stub__assignPdS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6assignPdS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z21__device_stub__assignPdS_, .Lfunc_end4-_Z21__device_stub__assignPdS_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI5_0:
	.quad	0x41cdcd6500000000              # double 1.0E+9
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$256000104, %rsp                # imm = 0xF424068
	.cfi_def_cfa_offset 256000160
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	$0, 64(%rsp)
	leaq	128000096(%rsp), %rdi
	xorl	%ebx, %ebx
	movl	$128000000, %edx                # imm = 0x7A12000
	xorl	%esi, %esi
	callq	memset@PLT
	leaq	96(%rsp), %r14
	movl	$1, %r15d
	xorl	%r12d, %r12d
.LBB5_1:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB5_2 Depth 2
	movl	%r12d, %ebp
	xorl	%r13d, %r13d
.LBB5_2:                                #   Parent Loop BB5_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	leal	(%rbx,%r13), %eax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%eax, %xmm0
	movsd	%xmm0, 72(%rsp)                 # 8-byte Spill
	callq	sin
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	movsd	72(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	sin
	mulsd	16(%rsp), %xmm0                 # 8-byte Folded Reload
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	xorps	%xmm0, %xmm0
	cvtsi2sd	%ebp, %xmm0
	callq	cos
	addsd	16(%rsp), %xmm0                 # 8-byte Folded Reload
	movsd	%xmm0, (%r14,%r13,8)
	incq	%r13
	decl	%ebp
	cmpq	$4000, %r13                     # imm = 0xFA0
	jne	.LBB5_2
# %bb.3:                                #   in Loop: Header=BB5_1 Depth=1
	incq	%r12
	addq	$32000, %r14                    # imm = 0x7D00
	addq	%r15, %rbx
	addq	$2, %r15
	cmpq	$4000, %r12                     # imm = 0xFA0
	jne	.LBB5_1
# %bb.4:
	movabsq	$4294967297, %rbx               # imm = 0x100000001
	leaq	8(%rsp), %r14
	movl	$128000000, %esi                # imm = 0x7A12000
	movq	%r14, %rdi
	callq	hipMalloc
	leaq	56(%rsp), %rdi
	movl	$128000000, %esi                # imm = 0x7A12000
	callq	hipMalloc
	leaq	48(%rsp), %rdi
	movl	$128000, %esi                   # imm = 0x1F400
	callq	hipMalloc
	leaq	40(%rsp), %rdi
	movl	$128, %esi
	callq	hipMalloc
	leaq	32(%rsp), %r15
	movl	$8, %esi
	movq	%r15, %rdi
	callq	hipMalloc
	leaq	24(%rsp), %rdi
	movl	$16, %esi
	callq	hipMalloc
	movq	(%r14), %rdi
	leaq	96(%rsp), %rsi
	movl	$128000000, %edx                # imm = 0x7A12000
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r15), %rdi
	leaq	64(%rsp), %rsi
	movl	$8, %edx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$10, %ebp
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, %r14
	leaq	999(%rbx), %r15
	leaq	15999(%rbx), %r12
.LBB5_5:                                # =>This Inner Loop Header: Depth=1
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_7
# %bb.6:                                #   in Loop: Header=BB5_5 Depth=1
	movq	8(%rsp), %rdi
	movq	56(%rsp), %rsi
	callq	_Z21__device_stub__medianPdS_
.LBB5_7:                                #   in Loop: Header=BB5_5 Depth=1
	callq	hipDeviceSynchronize
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_9
# %bb.8:                                #   in Loop: Header=BB5_5 Depth=1
	movq	56(%rsp), %rdi
	movq	8(%rsp), %rsi
	callq	_Z19__device_stub__movePdS_
.LBB5_9:                                #   in Loop: Header=BB5_5 Depth=1
	callq	hipDeviceSynchronize
	decl	%ebp
	jne	.LBB5_5
# %bb.10:
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_12
# %bb.11:
	movq	8(%rsp), %rdi
	movq	48(%rsp), %rsi
	callq	_Z24__device_stub__reductionPdS_
.LBB5_12:
	leaq	15(%rbx), %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_14
# %bb.13:
	movq	48(%rsp), %rdi
	movq	40(%rsp), %rsi
	callq	_Z24__device_stub__reductionPdS_
.LBB5_14:
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_16
# %bb.15:
	movq	40(%rsp), %rdi
	movq	32(%rsp), %rsi
	callq	_Z21__device_stub__sumGenPdS_
.LBB5_16:
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_18
# %bb.17:
	movq	8(%rsp), %rdi
	movq	24(%rsp), %rsi
	callq	_Z21__device_stub__assignPdS_
.LBB5_18:
	callq	hipDeviceSynchronize
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	subq	%r14, %rax
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI5_0(%rip), %xmm0
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	movq	32(%rsp), %rsi
	leaq	64(%rsp), %r15
	movl	$8, %edx
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rsi
	leaq	80(%rsp), %r14
	movl	$16, %edx
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rsi
	leaq	128000096(%rsp), %rbx
	movl	$128000000, %edx                # imm = 0x7A12000
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	56(%rsp), %rdi
	callq	hipFree
	movq	48(%rsp), %rdi
	callq	hipFree
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rax
	movq	$8, _ZSt4cout+8(%rax)
	movl	$.L.str, %edi
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movb	$1, %al
	callq	printf
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$5, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	(%r15), %xmm0                   # xmm0 = mem[0],zero
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r15
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r15, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$_ZSt4cout, %edi
	movl	$.L.str.2, %esi
	movl	$13, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	(%r14), %xmm0                   # xmm0 = mem[0],zero
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r15
	movl	$.L.str.3, %esi
	movl	$4, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	64016096(%rsp), %xmm0           # xmm0 = mem[0],zero
	movq	%r15, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r15
	movl	$.L.str.3, %esi
	movl	$4, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	64016000(%rbx), %xmm0           # xmm0 = mem[0],zero
	movq	%r15, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r15
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r15, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$_ZSt4cout, %edi
	movl	$.L.str.4, %esi
	movl	$11, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	8(%r14), %xmm0                  # xmm0 = mem[0],zero
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r14
	movl	$.L.str.3, %esi
	movl	$4, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	544344(%rsp), %xmm0             # xmm0 = mem[0],zero
	movq	%r14, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r14
	movl	$.L.str.3, %esi
	movl	$4, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	544248(%rbx), %xmm0             # xmm0 = mem[0],zero
	movq	%r14, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r14
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r14, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$_ZSt4cout, %edi
	movl	$.L.str.5, %esi
	movl	$13, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	31976088(%rsp), %xmm0           # xmm0 = mem[0],zero
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r14
	movl	$.L.str.3, %esi
	movl	$4, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	31975992(%rbx), %xmm0           # xmm0 = mem[0],zero
	movq	%r14, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r14
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r14, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$_ZSt4cout, %edi
	movl	$.L.str.6, %esi
	movl	$13, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	31972096(%rsp), %xmm0           # xmm0 = mem[0],zero
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r14
	movl	$.L.str.3, %esi
	movl	$4, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	31972000(%rbx), %xmm0           # xmm0 = mem[0],zero
	movq	%r14, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r14
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r14, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$_ZSt4cout, %edi
	movl	$.L.str.7, %esi
	movl	$13, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	16008088(%rsp), %xmm0           # xmm0 = mem[0],zero
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r14
	movl	$.L.str.3, %esi
	movl	$4, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	16007992(%rbx), %xmm0           # xmm0 = mem[0],zero
	movq	%r14, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r14
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r14, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$_ZSt4cout, %edi
	movl	$.L.str.8, %esi
	movl	$11, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	16000096(%rsp), %xmm0           # xmm0 = mem[0],zero
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r14
	movl	$.L.str.3, %esi
	movl	$4, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	16000000(%rbx), %xmm0           # xmm0 = mem[0],zero
	movq	%r14, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r14
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r14, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$_ZSt4cout, %edi
	movl	$.L.str.9, %esi
	movl	$11, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	16032096(%rsp), %xmm0           # xmm0 = mem[0],zero
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r14
	movl	$.L.str.3, %esi
	movl	$4, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	16032000(%rbx), %xmm0           # xmm0 = mem[0],zero
	movq	%r14, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	xorl	%eax, %eax
	addq	$256000104, %rsp                # imm = 0xF424068
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	main, .Lfunc_end5-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB6_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB6_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6medianPdS_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z4movePdS_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9reductionPdS_, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6sumGenPdS_, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6assignPdS_, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end6:
	.size	__hip_module_ctor, .Lfunc_end6-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB7_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB7_2:
	retq
.Lfunc_end7:
	.size	__hip_module_dtor, .Lfunc_end7-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z6medianPdS_,@object           # @_Z6medianPdS_
	.section	.rodata,"a",@progbits
	.globl	_Z6medianPdS_
	.p2align	3, 0x0
_Z6medianPdS_:
	.quad	_Z21__device_stub__medianPdS_
	.size	_Z6medianPdS_, 8

	.type	_Z4movePdS_,@object             # @_Z4movePdS_
	.globl	_Z4movePdS_
	.p2align	3, 0x0
_Z4movePdS_:
	.quad	_Z19__device_stub__movePdS_
	.size	_Z4movePdS_, 8

	.type	_Z9reductionPdS_,@object        # @_Z9reductionPdS_
	.globl	_Z9reductionPdS_
	.p2align	3, 0x0
_Z9reductionPdS_:
	.quad	_Z24__device_stub__reductionPdS_
	.size	_Z9reductionPdS_, 8

	.type	_Z6sumGenPdS_,@object           # @_Z6sumGenPdS_
	.globl	_Z6sumGenPdS_
	.p2align	3, 0x0
_Z6sumGenPdS_:
	.quad	_Z21__device_stub__sumGenPdS_
	.size	_Z6sumGenPdS_, 8

	.type	_Z6assignPdS_,@object           # @_Z6assignPdS_
	.globl	_Z6assignPdS_
	.p2align	3, 0x0
_Z6assignPdS_:
	.quad	_Z21__device_stub__assignPdS_
	.size	_Z6assignPdS_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"time :%f\n"
	.size	.L.str, 10

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Sum: "
	.size	.L.str.1, 6

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"A[n/2][n/2]: "
	.size	.L.str.2, 14

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"    "
	.size	.L.str.3, 5

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"A[17][31]: "
	.size	.L.str.4, 12

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"A[999][999]: "
	.size	.L.str.5, 14

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"A[999][500]: "
	.size	.L.str.6, 14

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"A[500][999]: "
	.size	.L.str.7, 14

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"A[500][0]: "
	.size	.L.str.8, 12

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"A[501][0]: "
	.size	.L.str.9, 12

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z6medianPdS_"
	.size	.L__unnamed_1, 14

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z4movePdS_"
	.size	.L__unnamed_2, 12

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z9reductionPdS_"
	.size	.L__unnamed_3, 17

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z6sumGenPdS_"
	.size	.L__unnamed_4, 14

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"_Z6assignPdS_"
	.size	.L__unnamed_5, 14

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__medianPdS_
	.addrsig_sym _Z19__device_stub__movePdS_
	.addrsig_sym _Z24__device_stub__reductionPdS_
	.addrsig_sym _Z21__device_stub__sumGenPdS_
	.addrsig_sym _Z21__device_stub__assignPdS_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z6medianPdS_
	.addrsig_sym _Z4movePdS_
	.addrsig_sym _Z9reductionPdS_
	.addrsig_sym _Z6sumGenPdS_
	.addrsig_sym _Z6assignPdS_
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z6medianPdS_           ; -- Begin function _Z6medianPdS_
	.globl	_Z6medianPdS_
	.p2align	8
	.type	_Z6medianPdS_,@function
_Z6medianPdS_:                          ; @_Z6medianPdS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x1c
	s_load_b128 s[16:19], s[0:1], 0x0
	s_mov_b32 s14, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s0, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, s15, s0, v[0:1]
	v_cmp_gt_i32_e64 s9, 0xfa0, v4
	v_cmpx_lt_i32_e32 0xf9f, v4
	s_cbranch_execz .LBB0_10
; %bb.1:
	v_mul_hi_u32 v0, 0x10624dd3, v4
	s_mov_b32 s15, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v0, 8, v0
	v_mul_u32_u24_e32 v0, 0xfa0, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v0, v4, v0
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	v_cmpx_ne_u32_e32 0, v0
	s_cbranch_execz .LBB0_9
; %bb.2:
	v_cmp_gt_u32_e64 s0, 0xf9f, v0
	v_cmp_gt_u32_e64 s1, 0xf41460, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s1, s1, s0
	s_mov_b32 s0, -1
	s_and_saveexec_b32 s20, s1
	s_cbranch_execz .LBB0_8
; %bb.3:
	v_mov_b32_e32 v5, 0
	s_mov_b64 s[10:11], 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 3, v[4:5]
	v_add_co_u32 v7, s0, s16, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v8, s0, s17, v6, s0
	s_clause 0x1
	global_load_b64 v[13:14], v[7:8], off offset:8
	global_load_b128 v[0:3], v[7:8], off offset:-8
	v_add_co_u32 v9, s0, 0xffff9000, v7
	v_add_co_ci_u32_e64 v10, s0, -1, v8, s0
	v_add_co_u32 v11, s0, 0x7000, v7
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v12, s0, 0, v8, s0
	s_clause 0x1
	global_load_b64 v[7:8], v[9:10], off offset:-3328
	global_load_b64 v[9:10], v[11:12], off offset:3328
	s_waitcnt vmcnt(2)
	v_dual_mov_b32 v12, v3 :: v_dual_mov_b32 v11, v2
	v_dual_mov_b32 v2, v13 :: v_dual_mov_b32 v3, v14
.LBB0_4:                                ; %.preheader.i
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_5 Depth 2
	s_mov_b64 s[12:13], s[10:11]
.LBB0_5:                                ;   Parent Loop BB0_4 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s12, 1
	s_cselect_b32 s0, -1, 0
	s_cmp_eq_u32 s12, 2
	v_cndmask_b32_e64 v13, v12, v1, s0
	v_cndmask_b32_e64 v14, v11, v0, s0
	s_cselect_b32 s1, -1, 0
	s_cmp_eq_u32 s12, 3
	s_cselect_b32 s2, -1, 0
	s_cmp_eq_u32 s12, 4
	v_cndmask_b32_e64 v13, v13, v3, s1
	v_cndmask_b32_e64 v14, v14, v2, s1
	s_cselect_b32 s3, -1, 0
	s_cmp_eq_u32 s10, 1
	s_cselect_b32 s4, -1, 0
	s_waitcnt vmcnt(1)
	v_cndmask_b32_e64 v13, v13, v8, s2
	v_cndmask_b32_e64 v15, v14, v7, s2
	v_cndmask_b32_e64 v16, v12, v1, s4
	v_cndmask_b32_e64 v17, v11, v0, s4
	s_cmp_eq_u32 s10, 2
	s_waitcnt vmcnt(0)
	v_cndmask_b32_e64 v14, v13, v10, s3
	s_cselect_b32 s5, -1, 0
	v_cndmask_b32_e64 v13, v15, v9, s3
	v_cndmask_b32_e64 v15, v16, v3, s5
	v_cndmask_b32_e64 v16, v17, v2, s5
	s_cmp_eq_u32 s10, 3
	v_cndmask_b32_e64 v19, v1, v14, s4
	s_cselect_b32 s6, -1, 0
	s_cmp_eq_u32 s10, 4
	v_cndmask_b32_e64 v15, v15, v8, s6
	v_cndmask_b32_e64 v17, v16, v7, s6
	s_cselect_b32 s7, -1, 0
	s_cmp_eq_u32 s10, 0
	v_cndmask_b32_e64 v18, v10, v14, s7
	v_cndmask_b32_e64 v16, v15, v10, s7
	v_cndmask_b32_e64 v15, v17, v9, s7
	v_cndmask_b32_e64 v23, v0, v13, s4
	s_cselect_b32 s4, -1, 0
	v_cndmask_b32_e64 v20, v8, v14, s6
	v_cndmask_b32_e64 v17, v18, v16, s3
	v_cmp_lt_f64_e64 s8, v[13:14], v[15:16]
	v_cndmask_b32_e64 v18, v3, v14, s5
	v_cndmask_b32_e64 v21, v7, v13, s6
	v_cndmask_b32_e64 v22, v2, v13, s5
	v_cndmask_b32_e64 v14, v12, v14, s4
	v_cndmask_b32_e64 v24, v11, v13, s4
	v_cndmask_b32_e64 v13, v9, v13, s7
	s_cmp_eq_u32 s12, 0
	v_cndmask_b32_e64 v19, v19, v16, s0
	s_cselect_b32 s4, -1, 0
	v_cndmask_b32_e64 v18, v18, v16, s1
	v_cndmask_b32_e64 v20, v20, v16, s2
	v_cndmask_b32_e64 v24, v24, v15, s4
	v_cndmask_b32_e64 v14, v14, v16, s4
	v_cndmask_b32_e64 v13, v13, v15, s3
	v_cndmask_b32_e64 v16, v23, v15, s0
	v_cndmask_b32_e64 v21, v21, v15, s2
	v_cndmask_b32_e64 v15, v22, v15, s1
	s_add_u32 s12, s12, 1
	s_addc_u32 s13, s13, 0
	s_add_i32 s5, s12, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_gt_u32 s5, 3
	v_cndmask_b32_e64 v10, v10, v17, s8
	v_cndmask_b32_e64 v9, v9, v13, s8
	v_cndmask_b32_e64 v8, v8, v20, s8
	v_cndmask_b32_e64 v7, v7, v21, s8
	v_cndmask_b32_e64 v3, v3, v18, s8
	v_cndmask_b32_e64 v2, v2, v15, s8
	v_cndmask_b32_e64 v1, v1, v19, s8
	v_cndmask_b32_e64 v0, v0, v16, s8
	v_cndmask_b32_e64 v12, v12, v14, s8
	v_cndmask_b32_e64 v11, v11, v24, s8
	s_cbranch_scc0 .LBB0_5
; %bb.6:                                ;   in Loop: Header=BB0_4 Depth=1
	s_add_u32 s10, s10, 1
	s_addc_u32 s11, s11, 0
	s_cmp_eq_u32 s10, 5
	s_cbranch_scc0 .LBB0_4
; %bb.7:                                ; %_Z4sortPd.exit
	v_add_co_u32 v0, s0, s18, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v1, s0, s19, v6, s0
	s_xor_b32 s0, exec_lo, -1
	global_store_b64 v[0:1], v[2:3], off
.LBB0_8:                                ; %Flow37
	s_or_b32 exec_lo, exec_lo, s20
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s1, vcc_lo, exec_lo
	s_and_b32 s0, s0, exec_lo
	s_or_b32 vcc_lo, s1, s0
.LBB0_9:                                ; %Flow36
	s_or_b32 exec_lo, exec_lo, s15
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s0, s9, exec_lo
	s_and_b32 s1, vcc_lo, exec_lo
	s_or_b32 s9, s0, s1
.LBB0_10:                               ; %Flow35
	s_or_b32 exec_lo, exec_lo, s14
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s0, s9
	s_cbranch_execz .LBB0_13
; %bb.11:
	v_cmp_gt_i32_e32 vcc_lo, 0xf42400, v4
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_13
; %bb.12:
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[4:5]
	v_add_co_u32 v2, vcc_lo, s16, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s17, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s18, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s19, v1, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	global_store_b64 v[0:1], v[2:3], off
.LBB0_13:
	s_or_b32 exec_lo, exec_lo, s0
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6medianPdS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 25
		.amdhsa_next_free_sgpr 21
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z6medianPdS_, .Lfunc_end0-_Z6medianPdS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1016
; NumSgprs: 23
; NumVgprs: 25
; ScratchSize: 0
; MemoryBound: 1
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 23
; NumVGPRsForWavesPerEU: 25
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z4movePdS_             ; -- Begin function _Z4movePdS_
	.globl	_Z4movePdS_
	.p2align	8
	.type	_Z4movePdS_,@function
_Z4movePdS_:                            ; @_Z4movePdS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x1c
	s_load_b128 s[0:3], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	v_add_co_u32 v2, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	global_store_b64 v[0:1], v[2:3], off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z4movePdS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z4movePdS_, .Lfunc_end1-_Z4movePdS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 120
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z9reductionPdS_        ; -- Begin function _Z9reductionPdS_
	.globl	_Z9reductionPdS_
	.p2align	8
	.type	_Z9reductionPdS_,@function
_Z9reductionPdS_:                       ; @_Z9reductionPdS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s5, s[0:1], 0x1c
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mov_b32 s4, s15
	v_add_nc_u32_e32 v4, -12, v0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s5, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s4, s5, v[0:1]
	v_mov_b32_e32 v2, 0
	v_lshlrev_b64 v[1:2], 3, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s0, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	s_mov_b32 s0, exec_lo
	global_load_b64 v[2:3], v[1:2], off
	v_lshlrev_b32_e32 v1, 3, v0
	s_waitcnt vmcnt(0)
	ds_store_b64 v1, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e32 0x1e8, v4
	s_cbranch_execz .LBB2_2
; %bb.1:
	ds_load_b64 v[2:3], v1 offset:4000
	ds_load_b64 v[4:5], v1
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[2:3], v[2:3], v[4:5]
	ds_store_b64 v1, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB2_2:
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e32 0x100, v0
	s_cbranch_execz .LBB2_4
; %bb.3:
	ds_load_b64 v[2:3], v1 offset:2048
	ds_load_b64 v[4:5], v1
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[2:3], v[2:3], v[4:5]
	ds_store_b64 v1, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB2_4:
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 0x80, v0
	s_cbranch_execz .LBB2_6
; %bb.5:
	ds_load_b64 v[2:3], v1 offset:1024
	ds_load_b64 v[4:5], v1
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[2:3], v[2:3], v[4:5]
	ds_store_b64 v1, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB2_6:
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 64, v0
	s_cbranch_execz .LBB2_8
; %bb.7:
	ds_load_b64 v[2:3], v1 offset:512
	ds_load_b64 v[4:5], v1
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[2:3], v[2:3], v[4:5]
	ds_store_b64 v1, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB2_8:
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 32, v0
	s_cbranch_execz .LBB2_10
; %bb.9:
	ds_load_b64 v[2:3], v1 offset:256
	ds_load_b64 v[4:5], v1
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[2:3], v[2:3], v[4:5]
	ds_store_b64 v1, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB2_10:
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 16, v0
	s_cbranch_execz .LBB2_12
; %bb.11:
	ds_load_b64 v[2:3], v1 offset:128
	ds_load_b64 v[4:5], v1
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[2:3], v[2:3], v[4:5]
	ds_store_b64 v1, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB2_12:
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 8, v0
	s_cbranch_execz .LBB2_14
; %bb.13:
	ds_load_b64 v[2:3], v1 offset:64
	ds_load_b64 v[4:5], v1
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[2:3], v[2:3], v[4:5]
	ds_store_b64 v1, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB2_14:
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 4, v0
	s_cbranch_execz .LBB2_16
; %bb.15:
	ds_load_b64 v[2:3], v1 offset:32
	ds_load_b64 v[4:5], v1
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[2:3], v[2:3], v[4:5]
	ds_store_b64 v1, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB2_16:
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 2, v0
	s_cbranch_execz .LBB2_18
; %bb.17:
	ds_load_b64 v[2:3], v1 offset:16
	ds_load_b64 v[4:5], v1
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[2:3], v[2:3], v[4:5]
	ds_store_b64 v1, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB2_18:
	s_or_b32 exec_lo, exec_lo, s0
	s_mov_b32 s5, 0
	s_mov_b32 s0, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB2_20
; %bb.19:
	v_mov_b32_e32 v6, 0
	s_lshl_b64 s[0:1], s[4:5], 3
	ds_load_b64 v[2:3], v6 offset:8
	ds_load_b64 v[4:5], v1
	s_add_u32 s0, s2, s0
	s_addc_u32 s1, s3, s1
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[2:3], v[2:3], v[4:5]
	ds_store_b64 v1, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b64 v[0:1], v1
	s_waitcnt lgkmcnt(0)
	global_store_b64 v6, v[0:1], s[0:1]
.LBB2_20:                               ; %.critedge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9reductionPdS_
		.amdhsa_group_segment_fixed_size 8000
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z9reductionPdS_, .Lfunc_end2-_Z9reductionPdS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 904
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 8000 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z6sumGenPdS_           ; -- Begin function _Z6sumGenPdS_
	.globl	_Z6sumGenPdS_
	.p2align	8
	.type	_Z6sumGenPdS_,@function
_Z6sumGenPdS_:                          ; @_Z6sumGenPdS_
; %bb.0:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_mov_b32_e32 v2, 0
	s_waitcnt lgkmcnt(0)
	s_load_b64 s[4:5], s[2:3], 0x0
	s_waitcnt lgkmcnt(0)
	v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5
	s_mov_b64 s[4:5], 0
.LBB3_1:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s6, s0, s4
	s_addc_u32 s7, s1, s5
	s_add_u32 s4, s4, 8
	global_load_b64 v[3:4], v2, s[6:7]
	s_addc_u32 s5, s5, 0
	s_cmpk_eq_i32 s4, 0x80
	s_waitcnt vmcnt(0)
	v_add_f64 v[0:1], v[3:4], v[0:1]
	global_store_b64 v2, v[0:1], s[2:3]
	s_cbranch_scc0 .LBB3_1
; %bb.2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6sumGenPdS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 16
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 8
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z6sumGenPdS_, .Lfunc_end3-_Z6sumGenPdS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 108
; NumSgprs: 8
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 8
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z6assignPdS_           ; -- Begin function _Z6assignPdS_
	.globl	_Z6assignPdS_
	.p2align	8
	.type	_Z6assignPdS_,@function
_Z6assignPdS_:                          ; @_Z6assignPdS_
; %bb.0:
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mov_b32 s4, 0x3d0ce80
	v_mov_b32_e32 v3, 0x84000
	s_waitcnt lgkmcnt(0)
	s_load_b64 s[4:5], s[0:1], s4 offset:0x0
	v_mov_b32_e32 v2, 0
	s_waitcnt lgkmcnt(0)
	v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5
	global_store_b64 v2, v[0:1], s[2:3]
	global_load_b64 v[0:1], v3, s[0:1] offset:3576
	s_waitcnt vmcnt(0)
	global_store_b64 v2, v[0:1], s[2:3] offset:8
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6assignPdS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 16
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 6
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end4:
	.size	_Z6assignPdS_, .Lfunc_end4-_Z6assignPdS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 92
; NumSgprs: 6
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 1
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 6
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
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    .language_version:
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    .name:           _Z6medianPdS_
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    .sgpr_spill_count: 0
    .symbol:         _Z6medianPdS_.kd
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    .vgpr_spill_count: 0
    .wavefront_size: 32
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amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
