#import <cuda_runtime.h>
#include <cuda_runtime_api.h>
#include <stdlib.h>
#include <stdio.h>
#include <time.h>
#include <math.h>

void error(char const *str)
{
	fprintf(stderr, "%s\n", str);
	exit(1);
}

void cuda_check(cudaError_t err, char const *str)
{
	if (err != cudaSuccess) {
		fprintf(stderr, "%s: CUDA error %d (%s)\n",
			str, err, cudaGetErrorString(err));
	}
}

__global__
void init_vec(int nels, float* __restrict__ d_vec1)
{
	int i = threadIdx.x + blockIdx.x * blockDim.x;
	d_vec1[i] = i;
}

__global__
void multi_vec(int n_row1,int n_col1,int n_row2,int n_col2,float* __restrict__ res_vec,float* __restrict__ d_vec1,float* __restrict__ d_vec2)
{
	int i = threadIdx.x + blockIdx.x * blockDim.x;
	int c= blockIdx.x*n_row1 + (threadIdx.x)%n_col1;
	int j= ((int)(threadIdx.x/n_row2) + (threadIdx.x%n_row2)*n_col2);
	res_vec[i]=d_vec1[c]*d_vec2[j];

}

__global__
void scalareMatrice(float* __restrict__ res_vec,float scalar,float* __restrict__ d_vec)
{
	int i = threadIdx.x + blockIdx.x * blockDim.x;
	res_vec[i]=d_vec[i]*scalar;
}

__global__
void reduction_row(int N,float* __restrict__ res_vec,float* __restrict__ d_vec1)
{
	int i = threadIdx.x + blockIdx.x * blockDim.x;
	int idx=(int)(i/N);
	float c =res_vec[idx];
	float d =d_vec1[i];
	if(i%N==31){
		res_vec[idx]=d_vec1[i-31]+d_vec1[i-30]+d_vec1[i-29]+d_vec1[i-28]+d_vec1[i-27]+d_vec1[i-26]+d_vec1[i-25]+d_vec1[i-24]+
								d_vec1[i-23]+d_vec1[i-22]+d_vec1[i-21]+d_vec1[i-20]+d_vec1[i-19]+d_vec1[i-18]+d_vec1[i-17]+d_vec1[i-16]+
								d_vec1[i-15]+d_vec1[i-14]+d_vec1[i-13]+d_vec1[i-12]+d_vec1[i-11]+d_vec1[i-10]+d_vec1[i-9]+d_vec1[i-8]+
								d_vec1[i-7]+d_vec1[i-6]+d_vec1[i-5]+d_vec1[i-4]+d_vec1[i-3]+d_vec1[i-2]+d_vec1[i-1]+d_vec1[i];
	}
}

__global__
void transpose(int nrow,int ncols, float* __restrict__ res_vec, float* __restrict__ d_vec1)
{
	int c = threadIdx.x;
	int r=blockIdx.x;
	int l_in = r*ncols + c;
	int l_out = c * nrow + r;
	res_vec[l_out] = d_vec1[l_in];
}


__global__
void vecsum(int nels, float* __restrict__ res_vec, float* __restrict__ d_vec1, float* __restrict__ d_vec2)
{
	int i = threadIdx.x + blockIdx.x * blockDim.x;
	res_vec[i] = d_vec1[i]+d_vec2[i];
}

__global__
void vecdif(int nels, float* __restrict__ res_vec, float* __restrict__ d_vec1, float* __restrict__ d_vec2)
{
	int i = threadIdx.x + blockIdx.x * blockDim.x;
	res_vec[i] = d_vec1[i]-d_vec2[i];
}
void stampa(float* matrice,int m){
  int i,j;
	printf("\n");
  for(i=0;i<m;i++){
      printf("%f  ",matrice[i]);
			printf("\n");
	}

}

int main(int argc, char *argv[]){
  float* matriceA;
  float* matriceB;
  float* matriceX;
	float* pk;
	float* trasposta;
	float* prodotto;
	float* somma;
	float* res;
	float* den;
	float* res0;
	float* res1;
	float* res2;
	float* red_den;
  float* matrice;
	float* scalar;
	float* num;
	float* deno;
  float ak;
  int nels;
  printf("%d\n",argc );
  if (argc != 2) {
    error("syntax: serve N come arg");
  }

  int N = atoi(argv[1]);
  if (N < 0) {
    error("N < 0");
  }
	int M=1;

  nels=N*N;
  size_t memsize = nels*sizeof(float);
  cudaError_t err;
  err = cudaMalloc((void**)&matriceA, memsize);
  cuda_check(err, "alloc matriceA");
  err = cudaMalloc((void**)&matriceB, N*M*sizeof(float));
  cuda_check(err, "alloc matriceB");
  err = cudaMalloc((void**)&matriceX, N*sizeof(float));
  cuda_check(err, "alloc matriceX");
  err = cudaMallocHost(&matrice, N*N*sizeof(float));
	cuda_check(err, "alloc matrice");
	err = cudaMallocHost(&num, M*sizeof(float));
	cuda_check(err, "alloc matrice");
	err = cudaMallocHost(&deno, M*sizeof(float));
	cuda_check(err, "alloc matrice");
	err = cudaMalloc((void**)&somma,nels*M*sizeof(float));
	cuda_check(err, "alloc somma");
	err = cudaMalloc((void**)&res,M*N*N*sizeof(float));
	cuda_check(err, "alloc res");
	err = cudaMalloc((void**)&res0,M*N*sizeof(float));
	cuda_check(err, "alloc res0");
	err = cudaMalloc((void**)&prodotto,M*N*N*sizeof(float));
	cuda_check(err, "alloc prodotto");
	err = cudaMalloc((void**)&res1,M*N*sizeof(float));
	cuda_check(err, "alloc res1");
	err = cudaMalloc((void**)&res2,M*N*sizeof(float));
	cuda_check(err, "alloc res2");
	err = cudaMalloc((void**)&pk,M*N*sizeof(float));
	cuda_check(err, "alloc pk");
	err = cudaMalloc((void**)&trasposta,M*N*sizeof(float));
	cuda_check(err, "alloc trasposta	");
	err = cudaMalloc((void**)&den,M*N*sizeof(float));
	cuda_check(err, "alloc den");
	err = cudaMalloc((void**)&red_den,M*sizeof(float));
	cuda_check(err, "alloc den");
	err = cudaMalloc((void**)&scalar,M*N*sizeof(float));
	cuda_check(err, "alloc scalar");

  cudaEvent_t pre_init, post_init, pre_sum, post_sum, pre_red, post_red,pre_prodotto,post_prodotto,
							pre_transpose,post_transpose,pre_scalar_matrice,post_scalar_matrice,pre_vecsum,post_vecsum,
							pre_vecdif,post_vecdif;


	err = cudaEventCreate(&pre_init, 0);
	cuda_check(err, "create pre_init");
	err = cudaEventCreate(&pre_red, 0);
	cuda_check(err, "create pre_red");
	err = cudaEventCreate(&pre_prodotto, 0);
	cuda_check(err, "create pre_sum");
	err = cudaEventCreate(&pre_transpose, 0);
	cuda_check(err, "create pre_traspose");
	err = cudaEventCreate(&pre_scalar_matrice, 0);
	cuda_check(err, "create pre_scalar_matrice");
	err = cudaEventCreate(&pre_vecdif, 0);
	cuda_check(err, "create pre_vecdif");
	err = cudaEventCreate(&pre_vecsum, 0);
	cuda_check(err, "create pre_vecsum");

	err = cudaEventCreate(&post_init, 0);
	cuda_check(err, "create post_init");
	err = cudaEventCreate(&post_red, 0);
	cuda_check(err, "create post_red");
	err = cudaEventCreate(&post_prodotto, 0);
	cuda_check(err, "create post_sum");
	err = cudaEventCreate(&post_transpose, 0);
	cuda_check(err, "create post_traspose");
	err = cudaEventCreate(&post_scalar_matrice, 0);
	cuda_check(err, "create post_scalar_matrice");
	err = cudaEventCreate(&post_vecdif, 0);
	cuda_check(err, "create post_vecdif");
	err = cudaEventCreate(&post_vecsum, 0);
	cuda_check(err, "create post_vecsum");


	cudaEventRecord(pre_init);
	init_vec<<<N, N>>>(nels, matriceA);
	cudaEventRecord(post_init);
  init_vec<<<1, M*N>>>(M*N, matriceB);
	init_vec<<<1, M*N>>>(M*N, matriceX);
	int i;

	for(i=0;i<1;i++){
		cudaEventRecord(pre_prodotto);
		multi_vec<<<N, M*N>>>(N,N,N,M,somma,matriceA,matriceX);
		cudaEventRecord(post_prodotto);
		cudaEventRecord(pre_red);
		reduction_row<<<N, M*N>>>(N,res0,somma);
		cudaEventRecord(post_red);

		cudaEventRecord(pre_vecdif);
		vecdif<<<N,M>>>(N*M,pk,matriceB,res0);
		cudaEventRecord(post_vecdif);

		cudaEventRecord(pre_transpose);
		transpose<<<N,M>>>(N,M,trasposta,pk);
		cudaEventRecord(post_transpose);

		multi_vec<<<M, N>>>(M,N,N,M,prodotto,trasposta,pk);
		reduction_row<<<M, N>>>(N,res1,prodotto);

		multi_vec<<<M, M*N*N>>>(M,N,N,N,res,trasposta,matriceA);
		reduction_row<<<M*N, N>>>(N,res2,res);
		multi_vec<<<N, M*N>>>(M,N,N,M,den,res2,pk);
		reduction_row<<<N, M*N>>>(N,red_den,den);

		err = cudaMemcpy(num, res1, 1*sizeof(float), cudaMemcpyDeviceToHost);
		err = cudaMemcpy(deno, red_den, 1*sizeof(float), cudaMemcpyDeviceToHost);
		ak=num[0]/deno[0];

		cudaEventRecord(pre_scalar_matrice);
		scalareMatrice<<<N, M>>>(scalar,ak,pk);
		cudaEventRecord(post_scalar_matrice);

		cudaEventRecord(pre_vecsum);
		vecsum<<<N, M>>>(N*M*N,matriceX,matriceX,scalar);
		cudaEventRecord(post_vecsum);

	  err = cudaMemcpy(matrice, matriceX, M*N*sizeof(float), cudaMemcpyDeviceToHost);
		cuda_check(err, "create mem");
	  stampa(matrice,M*N);



		float runtime_init_ms, runtime_prodotto_ms, runtime_red_ms,runtime_transpose_ms,runtime_scalar_matrice_ms,
					runtime_vecdif_ms,runtime_vecsum_ms;
		err = cudaEventElapsedTime(&runtime_init_ms, pre_init, post_init);
		cuda_check(err, "elapsed time init");
		err = cudaEventElapsedTime(&runtime_prodotto_ms, pre_prodotto, post_prodotto);
		cuda_check(err, "elapsed time prodotto");
		err = cudaEventElapsedTime(&runtime_red_ms, pre_red, post_red);
		cuda_check(err, "elapsed time reduction");
		err = cudaEventElapsedTime(&runtime_transpose_ms, pre_transpose, post_transpose);
		cuda_check(err, "elapsed time traspose");
		err = cudaEventElapsedTime(&runtime_scalar_matrice_ms, pre_scalar_matrice, post_scalar_matrice);
		cuda_check(err, "elapsed time scalar_matrice");
		err = cudaEventElapsedTime(&runtime_vecdif_ms, pre_vecdif, post_vecdif);
		cuda_check(err, "elapsed time vecdif");
		err = cudaEventElapsedTime(&runtime_vecsum_ms, pre_vecsum, post_vecsum);
		cuda_check(err, "elapsed time vecsum");


		printf("init: runtime %.4gms, %.4g GE/s, %.4g GB/s\n",
			runtime_init_ms, nels/runtime_init_ms/1.0e6, memsize/runtime_init_ms/1.0e6);
		printf("prodotto: runtime %.4gms, %.4g GE/s, %.4g GB/s\n",
			runtime_prodotto_ms, nels/runtime_prodotto_ms/1.0e6, memsize/runtime_prodotto_ms/1.0e6);
		printf("reduction: runtime %.4gms, %.4g GE/s, %.4g GB/s\n",
			runtime_red_ms, nels/runtime_red_ms/1.0e6, memsize/runtime_red_ms/1.0e6);
		printf("transpose: runtime %.4gms, %.4g GE/s, %.4g GB/s\n",
			runtime_transpose_ms, N/runtime_transpose_ms/1.0e6, (N*sizeof(float))/runtime_transpose_ms/1.0e6);
		printf("scalareMatrice: runtime %.4gms, %.4g GE/s, %.4g GB/s\n",
			runtime_scalar_matrice_ms, N/runtime_scalar_matrice_ms/1.0e6, (N*sizeof(float))/runtime_scalar_matrice_ms/1.0e6);
		printf("vecdif: runtime %.4gms, %.4g GE/s, %.4g GB/s\n",
			runtime_vecdif_ms, N/runtime_vecdif_ms/1.0e6, (N*sizeof(float))/runtime_vecdif_ms/1.0e6);
		printf("vecsum: runtime %.4gms, %.4g GE/s, %.4g GB/s\n",
				runtime_vecsum_ms, N/runtime_vecsum_ms/1.0e6, (N*sizeof(float))/runtime_vecsum_ms/1.0e6);
	}
  cudaFree(matriceA);
	cudaFreeHost(matrice);
	cudaFree(somma);
	cudaFree(res);
	cudaFree(pk);
	cudaFree(trasposta);
	cudaFree(prodotto);
	cudaFree(den);
	cudaFree(res0);
	cudaFree(res1);
	cudaFree(res2);
	cudaFree(red_den);
	cudaFree(scalar);
	cudaFree(matriceB);
	cudaFree(matriceX);
	cudaFreeHost(num);
	cudaFreeHost(deno);

}

	.file	"tmpxft_002fde2d_00000000-6_versione1.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2033:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2033:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"%s\n"
	.text
	.globl	_Z5errorPKc
	.type	_Z5errorPKc, @function
_Z5errorPKc:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	leaq	.LC0(%rip), %rdx
	movl	$2, %esi
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	%rdi, %rcx
	movq	stderr(%rip), %rdi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
	.cfi_endproc
.LFE2027:
	.size	_Z5errorPKc, .-_Z5errorPKc
	.section	.rodata.str1.1
.LC1:
	.string	"%s: CUDA error %d (%s)\n"
	.text
	.globl	_Z10cuda_check9cudaErrorPKc
	.type	_Z10cuda_check9cudaErrorPKc, @function
_Z10cuda_check9cudaErrorPKc:
.LFB2028:
	.cfi_startproc
	endbr64
	testl	%edi, %edi
	je	.L4
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rsi, %rbx
	subq	$16, %rsp
	.cfi_def_cfa_offset 32
	movl	%edi, 12(%rsp)
	call	cudaGetErrorString@PLT
	movl	12(%rsp), %r8d
	movq	%rbx, %rcx
	movq	stderr(%rip), %rdi
	addq	$16, %rsp
	.cfi_def_cfa_offset 16
	movq	%rax, %r9
	movl	$2, %esi
	xorl	%eax, %eax
	leaq	.LC1(%rip), %rdx
	popq	%rbx
	.cfi_restore 3
	.cfi_def_cfa_offset 8
	jmp	__fprintf_chk@PLT
.L4:
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z10cuda_check9cudaErrorPKc, .-_Z10cuda_check9cudaErrorPKc
	.section	.rodata.str1.1
.LC2:
	.string	"\n"
.LC3:
	.string	"%f  "
	.text
	.globl	_Z6stampaPfi
	.type	_Z6stampaPfi, @function
_Z6stampaPfi:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	xorl	%eax, %eax
	leaq	.LC3(%rip), %r14
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	leaq	.LC2(%rip), %r13
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%rdi, %r12
	movl	$2, %edi
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movl	%esi, %ebp
	movq	%r13, %rsi
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	xorl	%ebx, %ebx
	call	__printf_chk@PLT
.L11:
	cmpl	%ebx, %ebp
	jle	.L14
	movq	%r14, %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	(%r12,%rbx,4), %xmm0
	call	__printf_chk@PLT
	movq	%r13, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	incq	%rbx
	jmp	.L11
.L14:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z6stampaPfi, .-_Z6stampaPfi
	.globl	_Z28__device_stub__Z8init_veciPfiPf
	.type	_Z28__device_stub__Z8init_veciPfiPf, @function
_Z28__device_stub__Z8init_veciPfiPf:
.LFB2055:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movl	%edi, 12(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	leaq	40(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movq	%rsi, 16(%rsp)
	leaq	52(%rsp), %rsi
	movq	%rax, 88(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movl	$1, 48(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z8init_veciPf(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L15:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L17
	call	__stack_chk_fail@PLT
.L17:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2055:
	.size	_Z28__device_stub__Z8init_veciPfiPf, .-_Z28__device_stub__Z8init_veciPfiPf
	.globl	_Z8init_veciPf
	.type	_Z8init_veciPf, @function
_Z8init_veciPf:
.LFB2056:
	.cfi_startproc
	endbr64
	jmp	_Z28__device_stub__Z8init_veciPfiPf
	.cfi_endproc
.LFE2056:
	.size	_Z8init_veciPf, .-_Z8init_veciPf
	.globl	_Z36__device_stub__Z9multi_veciiiiPfS_S_iiiiPfS_S_
	.type	_Z36__device_stub__Z9multi_veciiiiPfS_S_iiiiPfS_S_, @function
_Z36__device_stub__Z9multi_veciiiiPfS_S_iiiiPfS_S_:
.LFB2057:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movl	%edi, 12(%rsp)
	leaq	64(%rsp), %rdi
	movl	%esi, 8(%rsp)
	leaq	76(%rsp), %rsi
	movl	%edx, 4(%rsp)
	leaq	48(%rsp), %rdx
	movl	%ecx, (%rsp)
	leaq	56(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movq	%r8, 24(%rsp)
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movq	%rsp, %rax
	movq	%rax, 136(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 152(%rsp)
	movq	192(%rsp), %rax
	movq	%r9, 32(%rsp)
	movq	%rax, 40(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movl	$1, 72(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L20
	pushq	56(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z9multi_veciiiiPfS_S_(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 208
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L20:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L22
	call	__stack_chk_fail@PLT
.L22:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2057:
	.size	_Z36__device_stub__Z9multi_veciiiiPfS_S_iiiiPfS_S_, .-_Z36__device_stub__Z9multi_veciiiiPfS_S_iiiiPfS_S_
	.globl	_Z9multi_veciiiiPfS_S_
	.type	_Z9multi_veciiiiPfS_S_, @function
_Z9multi_veciiiiPfS_S_:
.LFB2058:
	.cfi_startproc
	endbr64
	jmp	_Z36__device_stub__Z9multi_veciiiiPfS_S_iiiiPfS_S_
	.cfi_endproc
.LFE2058:
	.size	_Z9multi_veciiiiPfS_S_, .-_Z9multi_veciiiiPfS_S_
	.globl	_Z37__device_stub__Z14scalareMatricePffS_PffS_
	.type	_Z37__device_stub__Z14scalareMatricePffS_PffS_, @function
_Z37__device_stub__Z14scalareMatricePffS_PffS_:
.LFB2059:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movss	%xmm0, 12(%rsp)
	leaq	40(%rsp), %rcx
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	16(%rsp), %rax
	movq	%rdi, 16(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rax, 96(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rsi, 24(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movl	$1, 56(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L25
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z14scalareMatricePffS_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L25:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L27
	call	__stack_chk_fail@PLT
.L27:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2059:
	.size	_Z37__device_stub__Z14scalareMatricePffS_PffS_, .-_Z37__device_stub__Z14scalareMatricePffS_PffS_
	.globl	_Z14scalareMatricePffS_
	.type	_Z14scalareMatricePffS_, @function
_Z14scalareMatricePffS_:
.LFB2060:
	.cfi_startproc
	endbr64
	jmp	_Z37__device_stub__Z14scalareMatricePffS_PffS_
	.cfi_endproc
.LFE2060:
	.size	_Z14scalareMatricePffS_, .-_Z14scalareMatricePffS_
	.globl	_Z36__device_stub__Z13reduction_rowiPfS_iPfS_
	.type	_Z36__device_stub__Z13reduction_rowiPfS_iPfS_, @function
_Z36__device_stub__Z13reduction_rowiPfS_iPfS_:
.LFB2061:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movl	%edi, 12(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rdx, 24(%rsp)
	leaq	32(%rsp), %rdx
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movl	$1, 56(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L30
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z13reduction_rowiPfS_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L30:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L32
	call	__stack_chk_fail@PLT
.L32:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2061:
	.size	_Z36__device_stub__Z13reduction_rowiPfS_iPfS_, .-_Z36__device_stub__Z13reduction_rowiPfS_iPfS_
	.globl	_Z13reduction_rowiPfS_
	.type	_Z13reduction_rowiPfS_, @function
_Z13reduction_rowiPfS_:
.LFB2062:
	.cfi_startproc
	endbr64
	jmp	_Z36__device_stub__Z13reduction_rowiPfS_iPfS_
	.cfi_endproc
.LFE2062:
	.size	_Z13reduction_rowiPfS_, .-_Z13reduction_rowiPfS_
	.globl	_Z32__device_stub__Z9transposeiiPfS_iiPfS_
	.type	_Z32__device_stub__Z9transposeiiPfS_iiPfS_, @function
_Z32__device_stub__Z9transposeiiPfS_iiPfS_:
.LFB2063:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movl	%edi, 12(%rsp)
	leaq	56(%rsp), %rdi
	movl	%esi, 8(%rsp)
	leaq	68(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movq	%rdx, 24(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rcx, 32(%rsp)
	leaq	48(%rsp), %rcx
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movl	$1, 64(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L35
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z9transposeiiPfS_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L35:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L37
	call	__stack_chk_fail@PLT
.L37:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2063:
	.size	_Z32__device_stub__Z9transposeiiPfS_iiPfS_, .-_Z32__device_stub__Z9transposeiiPfS_iiPfS_
	.globl	_Z9transposeiiPfS_
	.type	_Z9transposeiiPfS_, @function
_Z9transposeiiPfS_:
.LFB2064:
	.cfi_startproc
	endbr64
	jmp	_Z32__device_stub__Z9transposeiiPfS_iiPfS_
	.cfi_endproc
.LFE2064:
	.size	_Z9transposeiiPfS_, .-_Z9transposeiiPfS_
	.globl	_Z30__device_stub__Z6vecsumiPfS_S_iPfS_S_
	.type	_Z30__device_stub__Z6vecsumiPfS_S_iPfS_S_, @function
_Z30__device_stub__Z6vecsumiPfS_S_iPfS_S_:
.LFB2065:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movl	%edi, 12(%rsp)
	leaq	56(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rdx, 24(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, 32(%rsp)
	leaq	48(%rsp), %rcx
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movl	$1, 64(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L40
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z6vecsumiPfS_S_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L40:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L42
	call	__stack_chk_fail@PLT
.L42:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2065:
	.size	_Z30__device_stub__Z6vecsumiPfS_S_iPfS_S_, .-_Z30__device_stub__Z6vecsumiPfS_S_iPfS_S_
	.globl	_Z6vecsumiPfS_S_
	.type	_Z6vecsumiPfS_S_, @function
_Z6vecsumiPfS_S_:
.LFB2066:
	.cfi_startproc
	endbr64
	jmp	_Z30__device_stub__Z6vecsumiPfS_S_iPfS_S_
	.cfi_endproc
.LFE2066:
	.size	_Z6vecsumiPfS_S_, .-_Z6vecsumiPfS_S_
	.globl	_Z30__device_stub__Z6vecdifiPfS_S_iPfS_S_
	.type	_Z30__device_stub__Z6vecdifiPfS_S_iPfS_S_, @function
_Z30__device_stub__Z6vecdifiPfS_S_iPfS_S_:
.LFB2067:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movl	%edi, 12(%rsp)
	leaq	56(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rdx, 24(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, 32(%rsp)
	leaq	48(%rsp), %rcx
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movl	$1, 64(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L45
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z6vecdifiPfS_S_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L45:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L47
	call	__stack_chk_fail@PLT
.L47:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2067:
	.size	_Z30__device_stub__Z6vecdifiPfS_S_iPfS_S_, .-_Z30__device_stub__Z6vecdifiPfS_S_iPfS_S_
	.globl	_Z6vecdifiPfS_S_
	.type	_Z6vecdifiPfS_S_, @function
_Z6vecdifiPfS_S_:
.LFB2068:
	.cfi_startproc
	endbr64
	jmp	_Z30__device_stub__Z6vecdifiPfS_S_iPfS_S_
	.cfi_endproc
.LFE2068:
	.size	_Z6vecdifiPfS_S_, .-_Z6vecdifiPfS_S_
	.section	.rodata.str1.1
.LC4:
	.string	"%d\n"
.LC5:
	.string	"syntax: serve N come arg"
.LC6:
	.string	"N < 0"
.LC7:
	.string	"alloc matriceA"
.LC8:
	.string	"alloc matriceB"
.LC9:
	.string	"alloc matriceX"
.LC10:
	.string	"alloc matrice"
.LC11:
	.string	"alloc somma"
.LC12:
	.string	"alloc res"
.LC13:
	.string	"alloc res0"
.LC14:
	.string	"alloc prodotto"
.LC15:
	.string	"alloc res1"
.LC16:
	.string	"alloc res2"
.LC17:
	.string	"alloc pk"
.LC18:
	.string	"alloc trasposta\t"
.LC19:
	.string	"alloc den"
.LC20:
	.string	"alloc scalar"
.LC21:
	.string	"create pre_init"
.LC22:
	.string	"create pre_red"
.LC23:
	.string	"create pre_sum"
.LC24:
	.string	"create pre_traspose"
.LC25:
	.string	"create pre_scalar_matrice"
.LC26:
	.string	"create pre_vecdif"
.LC27:
	.string	"create pre_vecsum"
.LC28:
	.string	"create post_init"
.LC29:
	.string	"create post_red"
.LC30:
	.string	"create post_sum"
.LC31:
	.string	"create post_traspose"
.LC32:
	.string	"create post_scalar_matrice"
.LC33:
	.string	"create post_vecdif"
.LC34:
	.string	"create post_vecsum"
.LC35:
	.string	"create mem"
.LC36:
	.string	"elapsed time init"
.LC37:
	.string	"elapsed time prodotto"
.LC38:
	.string	"elapsed time reduction"
.LC39:
	.string	"elapsed time traspose"
.LC40:
	.string	"elapsed time scalar_matrice"
.LC41:
	.string	"elapsed time vecdif"
.LC42:
	.string	"elapsed time vecsum"
.LC44:
	.string	"init: runtime %.4gms, %.4g GE/s, %.4g GB/s\n"
.LC45:
	.string	"prodotto: runtime %.4gms, %.4g GE/s, %.4g GB/s\n"
.LC46:
	.string	"reduction: runtime %.4gms, %.4g GE/s, %.4g GB/s\n"
.LC47:
	.string	"transpose: runtime %.4gms, %.4g GE/s, %.4g GB/s\n"
.LC48:
	.string	"scalareMatrice: runtime %.4gms, %.4g GE/s, %.4g GB/s\n"
.LC49:
	.string	"vecdif: runtime %.4gms, %.4g GE/s, %.4g GB/s\n"
.LC50:
	.string	"vecsum: runtime %.4gms, %.4g GE/s, %.4g GB/s\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	%edi, %edx
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%rsi, %rbp
	leaq	.LC4(%rip), %rsi
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movl	%edi, %ebx
	movl	$2, %edi
	subq	$320, %rsp
	.cfi_def_cfa_offset 368
	movq	%fs:40, %rax
	movq	%rax, 312(%rsp)
	xorl	%eax, %eax
	call	__printf_chk@PLT
	cmpl	$2, %ebx
	je	.L51
	movq	312(%rsp), %rax
	subq	%fs:40, %rax
	leaq	.LC5(%rip), %rdi
	je	.L73
	jmp	.L74
.L51:
	movq	8(%rbp), %rdi
	call	atoi@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jns	.L53
	movq	312(%rsp), %rax
	subq	%fs:40, %rax
	leaq	.LC6(%rip), %rdi
	jne	.L74
.L73:
	call	_Z5errorPKc
.L53:
	movl	%eax, %r13d
	leaq	40(%rsp), %rdi
	movslq	%ebx, %rbp
	imull	%eax, %r13d
	salq	$2, %rbp
	leaq	.LC10(%rip), %r14
	movslq	%r13d, %r12
	salq	$2, %r12
	movq	%r12, %rsi
	call	cudaMalloc@PLT
	leaq	.LC7(%rip), %rsi
	movl	%eax, %edi
	call	_Z10cuda_check9cudaErrorPKc
	leaq	48(%rsp), %rdi
	movq	%rbp, %rsi
	call	cudaMalloc@PLT
	leaq	.LC8(%rip), %rsi
	movl	%eax, %edi
	call	_Z10cuda_check9cudaErrorPKc
	leaq	56(%rsp), %rdi
	movq	%rbp, %rsi
	call	cudaMalloc@PLT
	leaq	.LC9(%rip), %rsi
	movl	%eax, %edi
	call	_Z10cuda_check9cudaErrorPKc
	xorl	%edx, %edx
	leaq	144(%rsp), %rdi
	movq	%r12, %rsi
	call	cudaHostAlloc@PLT
	movq	%r14, %rsi
	movl	%eax, %edi
	call	_Z10cuda_check9cudaErrorPKc
	xorl	%edx, %edx
	movl	$4, %esi
	leaq	160(%rsp), %rdi
	call	cudaHostAlloc@PLT
	movq	%r14, %rsi
	movl	%eax, %edi
	call	_Z10cuda_check9cudaErrorPKc
	xorl	%edx, %edx
	movl	$4, %esi
	leaq	168(%rsp), %rdi
	call	cudaHostAlloc@PLT
	movq	%r14, %rsi
	leaq	.LC19(%rip), %r14
	movl	%eax, %edi
	call	_Z10cuda_check9cudaErrorPKc
	leaq	88(%rsp), %rdi
	movq	%r12, %rsi
	call	cudaMalloc@PLT
	leaq	.LC11(%rip), %rsi
	movl	%eax, %edi
	call	_Z10cuda_check9cudaErrorPKc
	leaq	96(%rsp), %rdi
	movq	%r12, %rsi
	call	cudaMalloc@PLT
	leaq	.LC12(%rip), %rsi
	movl	%eax, %edi
	call	_Z10cuda_check9cudaErrorPKc
	leaq	112(%rsp), %rdi
	movq	%rbp, %rsi
	call	cudaMalloc@PLT
	leaq	.LC13(%rip), %rsi
	movl	%eax, %edi
	call	_Z10cuda_check9cudaErrorPKc
	leaq	80(%rsp), %rdi
	movq	%r12, %rsi
	call	cudaMalloc@PLT
	leaq	.LC14(%rip), %rsi
	movl	%eax, %edi
	call	_Z10cuda_check9cudaErrorPKc
	leaq	120(%rsp), %rdi
	movq	%rbp, %rsi
	call	cudaMalloc@PLT
	leaq	.LC15(%rip), %rsi
	movl	%eax, %edi
	call	_Z10cuda_check9cudaErrorPKc
	leaq	128(%rsp), %rdi
	movq	%rbp, %rsi
	call	cudaMalloc@PLT
	leaq	.LC16(%rip), %rsi
	movl	%eax, %edi
	call	_Z10cuda_check9cudaErrorPKc
	leaq	64(%rsp), %rdi
	movq	%rbp, %rsi
	call	cudaMalloc@PLT
	leaq	.LC17(%rip), %rsi
	movl	%eax, %edi
	call	_Z10cuda_check9cudaErrorPKc
	leaq	72(%rsp), %rdi
	movq	%rbp, %rsi
	call	cudaMalloc@PLT
	leaq	.LC18(%rip), %rsi
	movl	%eax, %edi
	call	_Z10cuda_check9cudaErrorPKc
	leaq	104(%rsp), %rdi
	movq	%rbp, %rsi
	call	cudaMalloc@PLT
	movq	%r14, %rsi
	movl	%eax, %edi
	call	_Z10cuda_check9cudaErrorPKc
	leaq	136(%rsp), %rdi
	movl	$4, %esi
	call	cudaMalloc@PLT
	movq	%r14, %rsi
	movl	%eax, %edi
	call	_Z10cuda_check9cudaErrorPKc
	leaq	152(%rsp), %rdi
	movq	%rbp, %rsi
	call	cudaMalloc@PLT
	leaq	.LC20(%rip), %rsi
	movl	%eax, %edi
	call	_Z10cuda_check9cudaErrorPKc
	xorl	%esi, %esi
	leaq	176(%rsp), %rdi
	call	cudaEventCreateWithFlags@PLT
	leaq	.LC21(%rip), %rsi
	movl	%eax, %edi
	call	_Z10cuda_check9cudaErrorPKc
	xorl	%esi, %esi
	leaq	192(%rsp), %rdi
	call	cudaEventCreateWithFlags@PLT
	leaq	.LC22(%rip), %rsi
	movl	%eax, %edi
	call	_Z10cuda_check9cudaErrorPKc
	xorl	%esi, %esi
	leaq	208(%rsp), %rdi
	call	cudaEventCreateWithFlags@PLT
	leaq	.LC23(%rip), %rsi
	movl	%eax, %edi
	call	_Z10cuda_check9cudaErrorPKc
	xorl	%esi, %esi
	leaq	224(%rsp), %rdi
	call	cudaEventCreateWithFlags@PLT
	leaq	.LC24(%rip), %rsi
	movl	%eax, %edi
	call	_Z10cuda_check9cudaErrorPKc
	xorl	%esi, %esi
	leaq	240(%rsp), %rdi
	call	cudaEventCreateWithFlags@PLT
	leaq	.LC25(%rip), %rsi
	movl	%eax, %edi
	call	_Z10cuda_check9cudaErrorPKc
	xorl	%esi, %esi
	leaq	272(%rsp), %rdi
	call	cudaEventCreateWithFlags@PLT
	leaq	.LC26(%rip), %rsi
	movl	%eax, %edi
	call	_Z10cuda_check9cudaErrorPKc
	xorl	%esi, %esi
	leaq	256(%rsp), %rdi
	call	cudaEventCreateWithFlags@PLT
	leaq	.LC27(%rip), %rsi
	movl	%eax, %edi
	call	_Z10cuda_check9cudaErrorPKc
	xorl	%esi, %esi
	leaq	184(%rsp), %rdi
	call	cudaEventCreateWithFlags@PLT
	leaq	.LC28(%rip), %rsi
	movl	%eax, %edi
	call	_Z10cuda_check9cudaErrorPKc
	xorl	%esi, %esi
	leaq	200(%rsp), %rdi
	call	cudaEventCreateWithFlags@PLT
	leaq	.LC29(%rip), %rsi
	movl	%eax, %edi
	call	_Z10cuda_check9cudaErrorPKc
	xorl	%esi, %esi
	leaq	216(%rsp), %rdi
	call	cudaEventCreateWithFlags@PLT
	leaq	.LC30(%rip), %rsi
	movl	%eax, %edi
	call	_Z10cuda_check9cudaErrorPKc
	xorl	%esi, %esi
	leaq	232(%rsp), %rdi
	call	cudaEventCreateWithFlags@PLT
	leaq	.LC31(%rip), %rsi
	movl	%eax, %edi
	call	_Z10cuda_check9cudaErrorPKc
	xorl	%esi, %esi
	leaq	248(%rsp), %rdi
	call	cudaEventCreateWithFlags@PLT
	leaq	.LC32(%rip), %rsi
	movl	%eax, %edi
	call	_Z10cuda_check9cudaErrorPKc
	xorl	%esi, %esi
	leaq	280(%rsp), %rdi
	call	cudaEventCreateWithFlags@PLT
	leaq	.LC33(%rip), %rsi
	movl	%eax, %edi
	call	_Z10cuda_check9cudaErrorPKc
	xorl	%esi, %esi
	leaq	264(%rsp), %rdi
	call	cudaEventCreateWithFlags@PLT
	leaq	.LC34(%rip), %rsi
	movl	%eax, %edi
	call	_Z10cuda_check9cudaErrorPKc
	movq	176(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	%ebx, 300(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	movl	%ebx, 288(%rsp)
	movq	%rax, 304(%rsp)
	movl	308(%rsp), %ecx
	movq	%rax, 292(%rsp)
	movq	300(%rsp), %rdx
	movq	288(%rsp), %rdi
	movl	296(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L55
	movq	40(%rsp), %rsi
	movl	%r13d, %edi
	call	_Z28__device_stub__Z8init_veciPfiPf
.L55:
	movq	184(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movl	%ebx, 300(%rsp)
	movq	%rdi, 304(%rsp)
	movl	308(%rsp), %ecx
	movq	300(%rsp), %rdx
	movq	%rdi, 288(%rsp)
	movl	$1, 296(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L56
	movq	48(%rsp), %rsi
	movl	%ebx, %edi
	call	_Z28__device_stub__Z8init_veciPfiPf
.L56:
	movabsq	$4294967297, %rdi
	movl	%ebx, 300(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rdi, 304(%rsp)
	movl	$1, %esi
	movl	308(%rsp), %ecx
	movq	300(%rsp), %rdx
	movq	%rdi, 288(%rsp)
	movl	$1, 296(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L57
	movq	56(%rsp), %rsi
	movl	%ebx, %edi
	call	_Z28__device_stub__Z8init_veciPfiPf
.L57:
	movq	208(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	%ebx, 300(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	movl	%ebx, 288(%rsp)
	movq	%rax, 304(%rsp)
	movl	308(%rsp), %ecx
	movq	%rax, 292(%rsp)
	movq	300(%rsp), %rdx
	movq	288(%rsp), %rdi
	movl	296(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L58
	pushq	%r14
	.cfi_def_cfa_offset 376
	movl	%ebx, %edx
	movl	$1, %ecx
	movl	%ebx, %esi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 384
	movq	56(%rsp), %r9
	movl	%ebx, %edi
	movq	104(%rsp), %r8
	call	_Z36__device_stub__Z9multi_veciiiiPfS_S_iiiiPfS_S_
	popq	%rax
	.cfi_def_cfa_offset 376
	popq	%rdx
	.cfi_def_cfa_offset 368
.L58:
	movq	216(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	192(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	%ebx, 300(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	movl	%ebx, 288(%rsp)
	movq	%rax, 304(%rsp)
	movl	308(%rsp), %ecx
	movq	%rax, 292(%rsp)
	movq	300(%rsp), %rdx
	movq	288(%rsp), %rdi
	movl	296(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L59
	movq	88(%rsp), %rdx
	movq	112(%rsp), %rsi
	movl	%ebx, %edi
	call	_Z36__device_stub__Z13reduction_rowiPfS_iPfS_
.L59:
	movq	200(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	272(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movabsq	$4294967297, %rdx
	movl	%ebx, 288(%rsp)
	movq	%rdx, 292(%rsp)
	movq	288(%rsp), %rdi
	movl	296(%rsp), %esi
	movq	%rdx, 300(%rsp)
	movl	$1, 308(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L60
	movq	112(%rsp), %rcx
	movq	48(%rsp), %rdx
	movl	%ebx, %edi
	movq	64(%rsp), %rsi
	call	_Z30__device_stub__Z6vecdifiPfS_S_iPfS_S_
.L60:
	movq	280(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	224(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movabsq	$4294967297, %rdx
	movl	%ebx, 288(%rsp)
	movq	%rdx, 292(%rsp)
	movq	288(%rsp), %rdi
	movl	296(%rsp), %esi
	movq	%rdx, 300(%rsp)
	movl	$1, 308(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L61
	movq	64(%rsp), %rcx
	movq	72(%rsp), %rdx
	movl	$1, %esi
	movl	%ebx, %edi
	call	_Z32__device_stub__Z9transposeiiPfS_iiPfS_
.L61:
	movq	232(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movl	%ebx, 300(%rsp)
	movq	%rdi, 304(%rsp)
	movl	308(%rsp), %ecx
	movq	300(%rsp), %rdx
	movq	%rdi, 288(%rsp)
	movl	$1, 296(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L62
	pushq	%r9
	.cfi_def_cfa_offset 376
	movl	$1, %ecx
	movl	%ebx, %edx
	movl	%ebx, %esi
	pushq	72(%rsp)
	.cfi_def_cfa_offset 384
	movq	88(%rsp), %r9
	movl	$1, %edi
	movq	96(%rsp), %r8
	call	_Z36__device_stub__Z9multi_veciiiiPfS_S_iiiiPfS_S_
	popq	%r10
	.cfi_def_cfa_offset 376
	popq	%r11
	.cfi_def_cfa_offset 368
.L62:
	movabsq	$4294967297, %rdi
	movl	%ebx, 300(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rdi, 304(%rsp)
	movl	$1, %esi
	movl	308(%rsp), %ecx
	movq	300(%rsp), %rdx
	movq	%rdi, 288(%rsp)
	movl	$1, 296(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L63
	movq	80(%rsp), %rdx
	movq	120(%rsp), %rsi
	movl	%ebx, %edi
	call	_Z36__device_stub__Z13reduction_rowiPfS_iPfS_
.L63:
	movabsq	$4294967297, %rdi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %esi
	movq	%rdi, 304(%rsp)
	movl	308(%rsp), %ecx
	movl	%r13d, 300(%rsp)
	movq	300(%rsp), %rdx
	movq	%rdi, 288(%rsp)
	movl	$1, 296(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L64
	pushq	%rsi
	.cfi_def_cfa_offset 376
	movl	$1, %edi
	movl	%ebx, %ecx
	movl	%ebx, %edx
	pushq	48(%rsp)
	.cfi_def_cfa_offset 384
	movq	88(%rsp), %r9
	movl	%ebx, %esi
	movq	112(%rsp), %r8
	call	_Z36__device_stub__Z9multi_veciiiiPfS_S_iiiiPfS_S_
	popq	%rdi
	.cfi_def_cfa_offset 376
	popq	%r8
	.cfi_def_cfa_offset 368
.L64:
	movabsq	$4294967297, %rax
	movl	%ebx, 300(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rax, 304(%rsp)
	movl	308(%rsp), %ecx
	movq	%rax, 292(%rsp)
	movq	300(%rsp), %rdx
	movl	%ebx, 288(%rsp)
	movl	296(%rsp), %esi
	movq	288(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L65
	movq	96(%rsp), %rdx
	movq	128(%rsp), %rsi
	movl	%ebx, %edi
	call	_Z36__device_stub__Z13reduction_rowiPfS_iPfS_
.L65:
	movabsq	$4294967297, %rax
	movl	%ebx, 300(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rax, 304(%rsp)
	movl	308(%rsp), %ecx
	movq	%rax, 292(%rsp)
	movq	300(%rsp), %rdx
	movl	%ebx, 288(%rsp)
	movl	296(%rsp), %esi
	movq	288(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L66
	pushq	%rax
	.cfi_def_cfa_offset 376
	movl	$1, %ecx
	movl	%ebx, %edx
	movl	%ebx, %esi
	pushq	72(%rsp)
	.cfi_def_cfa_offset 384
	movq	120(%rsp), %r8
	movl	$1, %edi
	movq	144(%rsp), %r9
	call	_Z36__device_stub__Z9multi_veciiiiPfS_S_iiiiPfS_S_
	popq	%rdx
	.cfi_def_cfa_offset 376
	popq	%rcx
	.cfi_def_cfa_offset 368
.L66:
	movabsq	$4294967297, %rax
	movl	%ebx, 300(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rax, 304(%rsp)
	movl	308(%rsp), %ecx
	movq	%rax, 292(%rsp)
	movq	300(%rsp), %rdx
	movl	%ebx, 288(%rsp)
	movl	296(%rsp), %esi
	movq	288(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L67
	movq	104(%rsp), %rdx
	movq	136(%rsp), %rsi
	movl	%ebx, %edi
	call	_Z36__device_stub__Z13reduction_rowiPfS_iPfS_
.L67:
	movq	120(%rsp), %rsi
	movl	$2, %ecx
	movl	$4, %edx
	movq	160(%rsp), %rdi
	call	cudaMemcpy@PLT
	movl	$2, %ecx
	movl	$4, %edx
	movq	136(%rsp), %rsi
	movq	168(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	160(%rsp), %rax
	movq	240(%rsp), %rdi
	xorl	%esi, %esi
	movss	(%rax), %xmm0
	movq	168(%rsp), %rax
	movss	(%rax), %xmm4
	movss	%xmm0, 12(%rsp)
	movss	%xmm4, 8(%rsp)
	call	cudaEventRecord@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movabsq	$4294967297, %rdx
	movl	%ebx, 288(%rsp)
	movq	%rdx, 292(%rsp)
	movq	288(%rsp), %rdi
	movl	296(%rsp), %esi
	movq	%rdx, 300(%rsp)
	movl	$1, 308(%rsp)
	call	__cudaPushCallConfiguration@PLT
	movss	12(%rsp), %xmm0
	testl	%eax, %eax
	jne	.L68
	movq	64(%rsp), %rsi
	movq	152(%rsp), %rdi
	divss	8(%rsp), %xmm0
	call	_Z37__device_stub__Z14scalareMatricePffS_PffS_
.L68:
	movq	248(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	256(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movabsq	$4294967297, %rdx
	movl	%ebx, 288(%rsp)
	movq	%rdx, 292(%rsp)
	movq	288(%rsp), %rdi
	movl	296(%rsp), %esi
	movq	%rdx, 300(%rsp)
	movl	$1, 308(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L69
	movq	56(%rsp), %rsi
	movq	152(%rsp), %rcx
	movl	%r13d, %edi
	movq	%rsi, %rdx
	call	_Z30__device_stub__Z6vecsumiPfS_S_iPfS_S_
.L69:
	movq	264(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	56(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbp, %rdx
	movq	144(%rsp), %rdi
	call	cudaMemcpy@PLT
	leaq	.LC35(%rip), %rsi
	movl	%eax, %edi
	call	_Z10cuda_check9cudaErrorPKc
	movq	144(%rsp), %rdi
	movl	%ebx, %esi
	call	_Z6stampaPfi
	movq	184(%rsp), %rdx
	leaq	20(%rsp), %rdi
	movq	176(%rsp), %rsi
	call	cudaEventElapsedTime@PLT
	leaq	.LC36(%rip), %rsi
	movl	%eax, %edi
	call	_Z10cuda_check9cudaErrorPKc
	movq	216(%rsp), %rdx
	leaq	24(%rsp), %rdi
	movq	208(%rsp), %rsi
	call	cudaEventElapsedTime@PLT
	leaq	.LC37(%rip), %rsi
	movl	%eax, %edi
	call	_Z10cuda_check9cudaErrorPKc
	movq	200(%rsp), %rdx
	leaq	28(%rsp), %rdi
	movq	192(%rsp), %rsi
	call	cudaEventElapsedTime@PLT
	leaq	.LC38(%rip), %rsi
	movl	%eax, %edi
	call	_Z10cuda_check9cudaErrorPKc
	movq	232(%rsp), %rdx
	leaq	32(%rsp), %rdi
	movq	224(%rsp), %rsi
	call	cudaEventElapsedTime@PLT
	leaq	.LC39(%rip), %rsi
	movl	%eax, %edi
	call	_Z10cuda_check9cudaErrorPKc
	movq	248(%rsp), %rdx
	leaq	36(%rsp), %rdi
	movq	240(%rsp), %rsi
	call	cudaEventElapsedTime@PLT
	leaq	.LC40(%rip), %rsi
	movl	%eax, %edi
	call	_Z10cuda_check9cudaErrorPKc
	movq	280(%rsp), %rdx
	movq	272(%rsp), %rsi
	leaq	288(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	leaq	.LC41(%rip), %rsi
	movl	%eax, %edi
	call	_Z10cuda_check9cudaErrorPKc
	movq	264(%rsp), %rdx
	movq	256(%rsp), %rsi
	leaq	300(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	leaq	.LC42(%rip), %rsi
	movl	%eax, %edi
	call	_Z10cuda_check9cudaErrorPKc
	cvtsi2ssl	%r13d, %xmm6
	movb	$3, %al
	movss	20(%rsp), %xmm0
	cvtsi2ssq	%r12, %xmm3
	leaq	.LC44(%rip), %rsi
	movl	$2, %edi
	movaps	%xmm6, %xmm1
	movd	%xmm6, %r12d
	divss	%xmm0, %xmm1
	movaps	%xmm3, %xmm2
	movss	%xmm3, 8(%rsp)
	divss	%xmm0, %xmm2
	cvtss2sd	%xmm0, %xmm0
	cvtss2sd	%xmm1, %xmm1
	divsd	.LC43(%rip), %xmm1
	cvtss2sd	%xmm2, %xmm2
	divsd	.LC43(%rip), %xmm2
	call	__printf_chk@PLT
	movb	$3, %al
	movss	8(%rsp), %xmm3
	movss	24(%rsp), %xmm0
	movd	%r12d, %xmm1
	leaq	.LC45(%rip), %rsi
	movl	$2, %edi
	divss	%xmm0, %xmm1
	movaps	%xmm3, %xmm2
	divss	%xmm0, %xmm2
	cvtss2sd	%xmm0, %xmm0
	cvtss2sd	%xmm1, %xmm1
	divsd	.LC43(%rip), %xmm1
	cvtss2sd	%xmm2, %xmm2
	divsd	.LC43(%rip), %xmm2
	call	__printf_chk@PLT
	movb	$3, %al
	movss	28(%rsp), %xmm0
	movss	8(%rsp), %xmm3
	movd	%r12d, %xmm1
	leaq	.LC46(%rip), %rsi
	movl	$2, %edi
	divss	%xmm0, %xmm3
	divss	%xmm0, %xmm1
	cvtss2sd	%xmm0, %xmm0
	cvtss2sd	%xmm3, %xmm2
	divsd	.LC43(%rip), %xmm2
	cvtss2sd	%xmm1, %xmm1
	divsd	.LC43(%rip), %xmm1
	call	__printf_chk@PLT
	cvtsi2ssl	%ebx, %xmm4
	cvtsi2ssq	%rbp, %xmm7
	movss	32(%rsp), %xmm0
	leaq	.LC47(%rip), %rsi
	movb	$3, %al
	movl	$2, %edi
	movaps	%xmm4, %xmm1
	movd	%xmm4, %ebx
	divss	%xmm0, %xmm1
	movaps	%xmm7, %xmm2
	movd	%xmm7, %ebp
	divss	%xmm0, %xmm2
	cvtss2sd	%xmm0, %xmm0
	cvtss2sd	%xmm1, %xmm1
	divsd	.LC43(%rip), %xmm1
	cvtss2sd	%xmm2, %xmm2
	divsd	.LC43(%rip), %xmm2
	call	__printf_chk@PLT
	movd	%ebp, %xmm2
	movss	36(%rsp), %xmm0
	movd	%ebx, %xmm1
	movl	$2, %edi
	movb	$3, %al
	leaq	.LC48(%rip), %rsi
	divss	%xmm0, %xmm2
	divss	%xmm0, %xmm1
	cvtss2sd	%xmm0, %xmm0
	cvtss2sd	%xmm2, %xmm2
	divsd	.LC43(%rip), %xmm2
	cvtss2sd	%xmm1, %xmm1
	divsd	.LC43(%rip), %xmm1
	call	__printf_chk@PLT
	movd	%ebp, %xmm2
	movss	288(%rsp), %xmm0
	movd	%ebx, %xmm1
	movl	$2, %edi
	movb	$3, %al
	leaq	.LC49(%rip), %rsi
	divss	%xmm0, %xmm2
	divss	%xmm0, %xmm1
	cvtss2sd	%xmm0, %xmm0
	cvtss2sd	%xmm2, %xmm2
	divsd	.LC43(%rip), %xmm2
	cvtss2sd	%xmm1, %xmm1
	divsd	.LC43(%rip), %xmm1
	call	__printf_chk@PLT
	movd	%ebp, %xmm2
	movss	300(%rsp), %xmm0
	movd	%ebx, %xmm1
	movl	$2, %edi
	movb	$3, %al
	leaq	.LC50(%rip), %rsi
	divss	%xmm0, %xmm2
	divss	%xmm0, %xmm1
	cvtss2sd	%xmm0, %xmm0
	cvtss2sd	%xmm2, %xmm2
	divsd	.LC43(%rip), %xmm2
	cvtss2sd	%xmm1, %xmm1
	divsd	.LC43(%rip), %xmm1
	call	__printf_chk@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	144(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	88(%rsp), %rdi
	call	cudaFree@PLT
	movq	96(%rsp), %rdi
	call	cudaFree@PLT
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rdi
	call	cudaFree@PLT
	movq	80(%rsp), %rdi
	call	cudaFree@PLT
	movq	104(%rsp), %rdi
	call	cudaFree@PLT
	movq	112(%rsp), %rdi
	call	cudaFree@PLT
	movq	120(%rsp), %rdi
	call	cudaFree@PLT
	movq	128(%rsp), %rdi
	call	cudaFree@PLT
	movq	136(%rsp), %rdi
	call	cudaFree@PLT
	movq	152(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	160(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	168(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	312(%rsp), %rax
	subq	%fs:40, %rax
	je	.L70
.L74:
	call	__stack_chk_fail@PLT
.L70:
	addq	$320, %rsp
	.cfi_def_cfa_offset 48
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2030:
	.size	main, .-main
	.section	.rodata.str1.1
.LC51:
	.string	"_Z6vecdifiPfS_S_"
.LC52:
	.string	"_Z6vecsumiPfS_S_"
.LC53:
	.string	"_Z9transposeiiPfS_"
.LC54:
	.string	"_Z13reduction_rowiPfS_"
.LC55:
	.string	"_Z14scalareMatricePffS_"
.LC56:
	.string	"_Z9multi_veciiiiPfS_S_"
.LC57:
	.string	"_Z8init_veciPf"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2070:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC51(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z6vecdifiPfS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC52(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z6vecsumiPfS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC53(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z9transposeiiPfS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC54(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z13reduction_rowiPfS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC55(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z14scalareMatricePffS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC56(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z9multi_veciiiiPfS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC57(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z8init_veciPf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2070:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC43:
	.long	0
	.long	1093567616
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#import <hip/hip_runtime.h>
#include <hip/hip_runtime_api.h>
#include <stdlib.h>
#include <stdio.h>
#include <time.h>
#include <math.h>

void error(char const *str)
{
	fprintf(stderr, "%s\n", str);
	exit(1);
}

void cuda_check(hipError_t err, char const *str)
{
	if (err != hipSuccess) {
		fprintf(stderr, "%s: CUDA error %d (%s)\n",
			str, err, hipGetErrorString(err));
	}
}

__global__
void init_vec(int nels, float* __restrict__ d_vec1)
{
	int i = threadIdx.x + blockIdx.x * blockDim.x;
	d_vec1[i] = i;
}

__global__
void multi_vec(int n_row1,int n_col1,int n_row2,int n_col2,float* __restrict__ res_vec,float* __restrict__ d_vec1,float* __restrict__ d_vec2)
{
	int i = threadIdx.x + blockIdx.x * blockDim.x;
	int c= blockIdx.x*n_row1 + (threadIdx.x)%n_col1;
	int j= ((int)(threadIdx.x/n_row2) + (threadIdx.x%n_row2)*n_col2);
	res_vec[i]=d_vec1[c]*d_vec2[j];

}

__global__
void scalareMatrice(float* __restrict__ res_vec,float scalar,float* __restrict__ d_vec)
{
	int i = threadIdx.x + blockIdx.x * blockDim.x;
	res_vec[i]=d_vec[i]*scalar;
}

__global__
void reduction_row(int N,float* __restrict__ res_vec,float* __restrict__ d_vec1)
{
	int i = threadIdx.x + blockIdx.x * blockDim.x;
	int idx=(int)(i/N);
	float c =res_vec[idx];
	float d =d_vec1[i];
	if(i%N==31){
		res_vec[idx]=d_vec1[i-31]+d_vec1[i-30]+d_vec1[i-29]+d_vec1[i-28]+d_vec1[i-27]+d_vec1[i-26]+d_vec1[i-25]+d_vec1[i-24]+
								d_vec1[i-23]+d_vec1[i-22]+d_vec1[i-21]+d_vec1[i-20]+d_vec1[i-19]+d_vec1[i-18]+d_vec1[i-17]+d_vec1[i-16]+
								d_vec1[i-15]+d_vec1[i-14]+d_vec1[i-13]+d_vec1[i-12]+d_vec1[i-11]+d_vec1[i-10]+d_vec1[i-9]+d_vec1[i-8]+
								d_vec1[i-7]+d_vec1[i-6]+d_vec1[i-5]+d_vec1[i-4]+d_vec1[i-3]+d_vec1[i-2]+d_vec1[i-1]+d_vec1[i];
	}
}

__global__
void transpose(int nrow,int ncols, float* __restrict__ res_vec, float* __restrict__ d_vec1)
{
	int c = threadIdx.x;
	int r=blockIdx.x;
	int l_in = r*ncols + c;
	int l_out = c * nrow + r;
	res_vec[l_out] = d_vec1[l_in];
}


__global__
void vecsum(int nels, float* __restrict__ res_vec, float* __restrict__ d_vec1, float* __restrict__ d_vec2)
{
	int i = threadIdx.x + blockIdx.x * blockDim.x;
	res_vec[i] = d_vec1[i]+d_vec2[i];
}

__global__
void vecdif(int nels, float* __restrict__ res_vec, float* __restrict__ d_vec1, float* __restrict__ d_vec2)
{
	int i = threadIdx.x + blockIdx.x * blockDim.x;
	res_vec[i] = d_vec1[i]-d_vec2[i];
}
void stampa(float* matrice,int m){
  int i,j;
	printf("\n");
  for(i=0;i<m;i++){
      printf("%f  ",matrice[i]);
			printf("\n");
	}

}

int main(int argc, char *argv[]){
  float* matriceA;
  float* matriceB;
  float* matriceX;
	float* pk;
	float* trasposta;
	float* prodotto;
	float* somma;
	float* res;
	float* den;
	float* res0;
	float* res1;
	float* res2;
	float* red_den;
  float* matrice;
	float* scalar;
	float* num;
	float* deno;
  float ak;
  int nels;
  printf("%d\n",argc );
  if (argc != 2) {
    error("syntax: serve N come arg");
  }

  int N = atoi(argv[1]);
  if (N < 0) {
    error("N < 0");
  }
	int M=1;

  nels=N*N;
  size_t memsize = nels*sizeof(float);
  hipError_t err;
  err = hipMalloc((void**)&matriceA, memsize);
  cuda_check(err, "alloc matriceA");
  err = hipMalloc((void**)&matriceB, N*M*sizeof(float));
  cuda_check(err, "alloc matriceB");
  err = hipMalloc((void**)&matriceX, N*sizeof(float));
  cuda_check(err, "alloc matriceX");
  err = hipHostMalloc(&matrice, N*N*sizeof(float), hipHostMallocDefault);
	cuda_check(err, "alloc matrice");
	err = hipHostMalloc(&num, M*sizeof(float), hipHostMallocDefault);
	cuda_check(err, "alloc matrice");
	err = hipHostMalloc(&deno, M*sizeof(float), hipHostMallocDefault);
	cuda_check(err, "alloc matrice");
	err = hipMalloc((void**)&somma,nels*M*sizeof(float));
	cuda_check(err, "alloc somma");
	err = hipMalloc((void**)&res,M*N*N*sizeof(float));
	cuda_check(err, "alloc res");
	err = hipMalloc((void**)&res0,M*N*sizeof(float));
	cuda_check(err, "alloc res0");
	err = hipMalloc((void**)&prodotto,M*N*N*sizeof(float));
	cuda_check(err, "alloc prodotto");
	err = hipMalloc((void**)&res1,M*N*sizeof(float));
	cuda_check(err, "alloc res1");
	err = hipMalloc((void**)&res2,M*N*sizeof(float));
	cuda_check(err, "alloc res2");
	err = hipMalloc((void**)&pk,M*N*sizeof(float));
	cuda_check(err, "alloc pk");
	err = hipMalloc((void**)&trasposta,M*N*sizeof(float));
	cuda_check(err, "alloc trasposta	");
	err = hipMalloc((void**)&den,M*N*sizeof(float));
	cuda_check(err, "alloc den");
	err = hipMalloc((void**)&red_den,M*sizeof(float));
	cuda_check(err, "alloc den");
	err = hipMalloc((void**)&scalar,M*N*sizeof(float));
	cuda_check(err, "alloc scalar");

  hipEvent_t pre_init, post_init, pre_sum, post_sum, pre_red, post_red,pre_prodotto,post_prodotto,
							pre_transpose,post_transpose,pre_scalar_matrice,post_scalar_matrice,pre_vecsum,post_vecsum,
							pre_vecdif,post_vecdif;


	err = hipEventCreateWithFlags(&pre_init, 0);
	cuda_check(err, "create pre_init");
	err = hipEventCreateWithFlags(&pre_red, 0);
	cuda_check(err, "create pre_red");
	err = hipEventCreateWithFlags(&pre_prodotto, 0);
	cuda_check(err, "create pre_sum");
	err = hipEventCreateWithFlags(&pre_transpose, 0);
	cuda_check(err, "create pre_traspose");
	err = hipEventCreateWithFlags(&pre_scalar_matrice, 0);
	cuda_check(err, "create pre_scalar_matrice");
	err = hipEventCreateWithFlags(&pre_vecdif, 0);
	cuda_check(err, "create pre_vecdif");
	err = hipEventCreateWithFlags(&pre_vecsum, 0);
	cuda_check(err, "create pre_vecsum");

	err = hipEventCreateWithFlags(&post_init, 0);
	cuda_check(err, "create post_init");
	err = hipEventCreateWithFlags(&post_red, 0);
	cuda_check(err, "create post_red");
	err = hipEventCreateWithFlags(&post_prodotto, 0);
	cuda_check(err, "create post_sum");
	err = hipEventCreateWithFlags(&post_transpose, 0);
	cuda_check(err, "create post_traspose");
	err = hipEventCreateWithFlags(&post_scalar_matrice, 0);
	cuda_check(err, "create post_scalar_matrice");
	err = hipEventCreateWithFlags(&post_vecdif, 0);
	cuda_check(err, "create post_vecdif");
	err = hipEventCreateWithFlags(&post_vecsum, 0);
	cuda_check(err, "create post_vecsum");


	hipEventRecord(pre_init);
	init_vec<<<N, N>>>(nels, matriceA);
	hipEventRecord(post_init);
  init_vec<<<1, M*N>>>(M*N, matriceB);
	init_vec<<<1, M*N>>>(M*N, matriceX);
	int i;

	for(i=0;i<1;i++){
		hipEventRecord(pre_prodotto);
		multi_vec<<<N, M*N>>>(N,N,N,M,somma,matriceA,matriceX);
		hipEventRecord(post_prodotto);
		hipEventRecord(pre_red);
		reduction_row<<<N, M*N>>>(N,res0,somma);
		hipEventRecord(post_red);

		hipEventRecord(pre_vecdif);
		vecdif<<<N,M>>>(N*M,pk,matriceB,res0);
		hipEventRecord(post_vecdif);

		hipEventRecord(pre_transpose);
		transpose<<<N,M>>>(N,M,trasposta,pk);
		hipEventRecord(post_transpose);

		multi_vec<<<M, N>>>(M,N,N,M,prodotto,trasposta,pk);
		reduction_row<<<M, N>>>(N,res1,prodotto);

		multi_vec<<<M, M*N*N>>>(M,N,N,N,res,trasposta,matriceA);
		reduction_row<<<M*N, N>>>(N,res2,res);
		multi_vec<<<N, M*N>>>(M,N,N,M,den,res2,pk);
		reduction_row<<<N, M*N>>>(N,red_den,den);

		err = hipMemcpy(num, res1, 1*sizeof(float), hipMemcpyDeviceToHost);
		err = hipMemcpy(deno, red_den, 1*sizeof(float), hipMemcpyDeviceToHost);
		ak=num[0]/deno[0];

		hipEventRecord(pre_scalar_matrice);
		scalareMatrice<<<N, M>>>(scalar,ak,pk);
		hipEventRecord(post_scalar_matrice);

		hipEventRecord(pre_vecsum);
		vecsum<<<N, M>>>(N*M*N,matriceX,matriceX,scalar);
		hipEventRecord(post_vecsum);

	  err = hipMemcpy(matrice, matriceX, M*N*sizeof(float), hipMemcpyDeviceToHost);
		cuda_check(err, "create mem");
	  stampa(matrice,M*N);



		float runtime_init_ms, runtime_prodotto_ms, runtime_red_ms,runtime_transpose_ms,runtime_scalar_matrice_ms,
					runtime_vecdif_ms,runtime_vecsum_ms;
		err = hipEventElapsedTime(&runtime_init_ms, pre_init, post_init);
		cuda_check(err, "elapsed time init");
		err = hipEventElapsedTime(&runtime_prodotto_ms, pre_prodotto, post_prodotto);
		cuda_check(err, "elapsed time prodotto");
		err = hipEventElapsedTime(&runtime_red_ms, pre_red, post_red);
		cuda_check(err, "elapsed time reduction");
		err = hipEventElapsedTime(&runtime_transpose_ms, pre_transpose, post_transpose);
		cuda_check(err, "elapsed time traspose");
		err = hipEventElapsedTime(&runtime_scalar_matrice_ms, pre_scalar_matrice, post_scalar_matrice);
		cuda_check(err, "elapsed time scalar_matrice");
		err = hipEventElapsedTime(&runtime_vecdif_ms, pre_vecdif, post_vecdif);
		cuda_check(err, "elapsed time vecdif");
		err = hipEventElapsedTime(&runtime_vecsum_ms, pre_vecsum, post_vecsum);
		cuda_check(err, "elapsed time vecsum");


		printf("init: runtime %.4gms, %.4g GE/s, %.4g GB/s\n",
			runtime_init_ms, nels/runtime_init_ms/1.0e6, memsize/runtime_init_ms/1.0e6);
		printf("prodotto: runtime %.4gms, %.4g GE/s, %.4g GB/s\n",
			runtime_prodotto_ms, nels/runtime_prodotto_ms/1.0e6, memsize/runtime_prodotto_ms/1.0e6);
		printf("reduction: runtime %.4gms, %.4g GE/s, %.4g GB/s\n",
			runtime_red_ms, nels/runtime_red_ms/1.0e6, memsize/runtime_red_ms/1.0e6);
		printf("transpose: runtime %.4gms, %.4g GE/s, %.4g GB/s\n",
			runtime_transpose_ms, N/runtime_transpose_ms/1.0e6, (N*sizeof(float))/runtime_transpose_ms/1.0e6);
		printf("scalareMatrice: runtime %.4gms, %.4g GE/s, %.4g GB/s\n",
			runtime_scalar_matrice_ms, N/runtime_scalar_matrice_ms/1.0e6, (N*sizeof(float))/runtime_scalar_matrice_ms/1.0e6);
		printf("vecdif: runtime %.4gms, %.4g GE/s, %.4g GB/s\n",
			runtime_vecdif_ms, N/runtime_vecdif_ms/1.0e6, (N*sizeof(float))/runtime_vecdif_ms/1.0e6);
		printf("vecsum: runtime %.4gms, %.4g GE/s, %.4g GB/s\n",
				runtime_vecsum_ms, N/runtime_vecsum_ms/1.0e6, (N*sizeof(float))/runtime_vecsum_ms/1.0e6);
	}
  hipFree(matriceA);
	hipHostFree(matrice);
	hipFree(somma);
	hipFree(res);
	hipFree(pk);
	hipFree(trasposta);
	hipFree(prodotto);
	hipFree(den);
	hipFree(res0);
	hipFree(res1);
	hipFree(res2);
	hipFree(red_den);
	hipFree(scalar);
	hipFree(matriceB);
	hipFree(matriceX);
	hipHostFree(num);
	hipHostFree(deno);

}

	.text
	.file	"versione1.hip"
	.globl	_Z5errorPKc                     # -- Begin function _Z5errorPKc
	.type	_Z5errorPKc,@function
_Z5errorPKc:                            # @_Z5errorPKc
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	%rdi, %rdx
	movq	stderr(%rip), %rdi
	movl	$.L.str, %esi
	xorl	%eax, %eax
	callq	fprintf
	movl	$1, %edi
	callq	exit
.Lfunc_end0:
	.size	_Z5errorPKc, .Lfunc_end0-_Z5errorPKc
	.cfi_endproc
                                        # -- End function
	.globl	_Z10cuda_check10hipError_tPKc   # -- Begin function _Z10cuda_check10hipError_tPKc
	.type	_Z10cuda_check10hipError_tPKc,@function
_Z10cuda_check10hipError_tPKc:          # @_Z10cuda_check10hipError_tPKc
	.cfi_startproc
# %bb.0:
	testl	%edi, %edi
	jne	.LBB1_2
# %bb.1:
	retq
.LBB1_2:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rsi, %r14
	movl	%edi, %ebx
	movq	stderr(%rip), %r15
	callq	hipGetErrorString
	movl	$.L.str.1, %esi
	movq	%r15, %rdi
	movq	%r14, %rdx
	movl	%ebx, %ecx
	movq	%rax, %r8
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	fprintf                         # TAILCALL
.Lfunc_end1:
	.size	_Z10cuda_check10hipError_tPKc, .Lfunc_end1-_Z10cuda_check10hipError_tPKc
	.cfi_endproc
                                        # -- End function
	.globl	_Z23__device_stub__init_veciPf  # -- Begin function _Z23__device_stub__init_veciPf
	.type	_Z23__device_stub__init_veciPf,@function
_Z23__device_stub__init_veciPf:         # @_Z23__device_stub__init_veciPf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	leaq	24(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8init_veciPf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z23__device_stub__init_veciPf, .Lfunc_end2-_Z23__device_stub__init_veciPf
	.cfi_endproc
                                        # -- End function
	.globl	_Z24__device_stub__multi_veciiiiPfS_S_ # -- Begin function _Z24__device_stub__multi_veciiiiPfS_S_
	.type	_Z24__device_stub__multi_veciiiiPfS_S_,@function
_Z24__device_stub__multi_veciiiiPfS_S_: # @_Z24__device_stub__multi_veciiiiPfS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	8(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	4(%rsp), %rsi
	movl	%edx, (%rsi)
	movq	%rsp, %rdx
	movl	%ecx, (%rdx)
	leaq	40(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	32(%rsp), %r8
	movq	%r9, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	192(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9multi_veciiiiPfS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z24__device_stub__multi_veciiiiPfS_S_, .Lfunc_end3-_Z24__device_stub__multi_veciiiiPfS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z29__device_stub__scalareMatricePffS_ # -- Begin function _Z29__device_stub__scalareMatricePffS_
	.type	_Z29__device_stub__scalareMatricePffS_,@function
_Z29__device_stub__scalareMatricePffS_: # @_Z29__device_stub__scalareMatricePffS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	12(%rsp), %rcx
	movss	%xmm0, (%rcx)
	leaq	32(%rsp), %rdx
	movq	%rsi, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rdx, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14scalareMatricePffS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z29__device_stub__scalareMatricePffS_, .Lfunc_end4-_Z29__device_stub__scalareMatricePffS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z28__device_stub__reduction_rowiPfS_ # -- Begin function _Z28__device_stub__reduction_rowiPfS_
	.type	_Z28__device_stub__reduction_rowiPfS_,@function
_Z28__device_stub__reduction_rowiPfS_:  # @_Z28__device_stub__reduction_rowiPfS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	40(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	32(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13reduction_rowiPfS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z28__device_stub__reduction_rowiPfS_, .Lfunc_end5-_Z28__device_stub__reduction_rowiPfS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z24__device_stub__transposeiiPfS_ # -- Begin function _Z24__device_stub__transposeiiPfS_
	.type	_Z24__device_stub__transposeiiPfS_,@function
_Z24__device_stub__transposeiiPfS_:     # @_Z24__device_stub__transposeiiPfS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	8(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9transposeiiPfS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z24__device_stub__transposeiiPfS_, .Lfunc_end6-_Z24__device_stub__transposeiiPfS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z21__device_stub__vecsumiPfS_S_ # -- Begin function _Z21__device_stub__vecsumiPfS_S_
	.type	_Z21__device_stub__vecsumiPfS_S_,@function
_Z21__device_stub__vecsumiPfS_S_:       # @_Z21__device_stub__vecsumiPfS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	leaq	40(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	32(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	24(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6vecsumiPfS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	_Z21__device_stub__vecsumiPfS_S_, .Lfunc_end7-_Z21__device_stub__vecsumiPfS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z21__device_stub__vecdifiPfS_S_ # -- Begin function _Z21__device_stub__vecdifiPfS_S_
	.type	_Z21__device_stub__vecdifiPfS_S_,@function
_Z21__device_stub__vecdifiPfS_S_:       # @_Z21__device_stub__vecdifiPfS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	leaq	40(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	32(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	24(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6vecdifiPfS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	_Z21__device_stub__vecdifiPfS_S_, .Lfunc_end8-_Z21__device_stub__vecdifiPfS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z6stampaPfi                    # -- Begin function _Z6stampaPfi
	.type	_Z6stampaPfi,@function
_Z6stampaPfi:                           # @_Z6stampaPfi
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%esi, %ebp
	movq	%rdi, %rbx
	movl	$10, %edi
	callq	putchar@PLT
	testl	%ebp, %ebp
	jle	.LBB9_3
# %bb.1:                                # %.lr.ph.preheader
	movl	%ebp, %r14d
	xorl	%r15d, %r15d
.LBB9_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbx,%r15,4), %xmm0
	movl	$.L.str.3, %edi
	movb	$1, %al
	callq	printf
	movl	$10, %edi
	callq	putchar@PLT
	incq	%r15
	cmpq	%r15, %r14
	jne	.LBB9_2
.LBB9_3:                                # %._crit_edge
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end9:
	.size	_Z6stampaPfi, .Lfunc_end9-_Z6stampaPfi
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI10_0:
	.quad	0x412e848000000000              # double 1.0E+6
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$312, %rsp                      # imm = 0x138
	.cfi_def_cfa_offset 368
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %rbx
	movl	%edi, %ebp
	movl	$.L.str.4, %edi
	movl	%ebp, %esi
	xorl	%eax, %eax
	callq	printf
	cmpl	$2, %ebp
	jne	.LBB10_1
# %bb.3:
	movq	8(%rbx), %rdi
	callq	atoi
	testl	%eax, %eax
	js	.LBB10_4
# %bb.5:
	movl	%eax, %ebx
	movabsq	$4294967297, %r13               # imm = 0x100000001
	imull	%eax, %eax
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	leaq	(,%rax,4), %r12
	leaq	48(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	movl	$.L.str.7, %esi
	movl	%eax, %edi
	callq	_Z10cuda_check10hipError_tPKc
	movl	%ebx, %r15d
	leaq	(,%r15,4), %r14
	leaq	152(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movl	$.L.str.8, %esi
	movl	%eax, %edi
	callq	_Z10cuda_check10hipError_tPKc
	leaq	32(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movl	$.L.str.9, %esi
	movl	%eax, %edi
	callq	_Z10cuda_check10hipError_tPKc
	leaq	80(%rsp), %rdi
	movq	%r12, %rsi
	xorl	%edx, %edx
	callq	hipHostMalloc
	movl	$.L.str.10, %esi
	movl	%eax, %edi
	callq	_Z10cuda_check10hipError_tPKc
	leaq	64(%rsp), %rdi
	movl	$4, %esi
	xorl	%edx, %edx
	callq	hipHostMalloc
	movl	$.L.str.10, %esi
	movl	%eax, %edi
	callq	_Z10cuda_check10hipError_tPKc
	leaq	56(%rsp), %rdi
	movl	$4, %esi
	xorl	%edx, %edx
	callq	hipHostMalloc
	movl	$.L.str.10, %esi
	movl	%eax, %edi
	callq	_Z10cuda_check10hipError_tPKc
	leaq	136(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	movl	$.L.str.11, %esi
	movl	%eax, %edi
	callq	_Z10cuda_check10hipError_tPKc
	leaq	128(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	movl	$.L.str.12, %esi
	movl	%eax, %edi
	callq	_Z10cuda_check10hipError_tPKc
	leaq	112(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movl	$.L.str.13, %esi
	movl	%eax, %edi
	callq	_Z10cuda_check10hipError_tPKc
	leaq	144(%rsp), %rdi
	movq	%r12, 16(%rsp)                  # 8-byte Spill
	movq	%r12, %rsi
	callq	hipMalloc
	movl	$.L.str.14, %esi
	movl	%eax, %edi
	callq	_Z10cuda_check10hipError_tPKc
	leaq	104(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movl	$.L.str.15, %esi
	movl	%eax, %edi
	callq	_Z10cuda_check10hipError_tPKc
	leaq	96(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movl	$.L.str.16, %esi
	movl	%eax, %edi
	callq	_Z10cuda_check10hipError_tPKc
	leaq	24(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movl	$.L.str.17, %esi
	movl	%eax, %edi
	callq	_Z10cuda_check10hipError_tPKc
	leaq	40(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movl	$.L.str.18, %esi
	movl	%eax, %edi
	callq	_Z10cuda_check10hipError_tPKc
	leaq	120(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movl	$.L.str.19, %esi
	movl	%eax, %edi
	callq	_Z10cuda_check10hipError_tPKc
	leaq	88(%rsp), %rdi
	movl	$4, %esi
	callq	hipMalloc
	movl	$.L.str.19, %esi
	movl	%eax, %edi
	callq	_Z10cuda_check10hipError_tPKc
	leaq	72(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movl	$.L.str.20, %esi
	movl	%eax, %edi
	callq	_Z10cuda_check10hipError_tPKc
	leaq	288(%rsp), %rbp
	movq	%rbp, %rdi
	xorl	%esi, %esi
	callq	hipEventCreateWithFlags
	movl	$.L.str.21, %esi
	movl	%eax, %edi
	callq	_Z10cuda_check10hipError_tPKc
	leaq	272(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventCreateWithFlags
	movl	$.L.str.22, %esi
	movl	%eax, %edi
	callq	_Z10cuda_check10hipError_tPKc
	leaq	256(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventCreateWithFlags
	movl	$.L.str.23, %esi
	movl	%eax, %edi
	callq	_Z10cuda_check10hipError_tPKc
	leaq	240(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventCreateWithFlags
	movl	$.L.str.24, %esi
	movl	%eax, %edi
	callq	_Z10cuda_check10hipError_tPKc
	leaq	224(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventCreateWithFlags
	movl	$.L.str.25, %esi
	movl	%eax, %edi
	callq	_Z10cuda_check10hipError_tPKc
	leaq	192(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventCreateWithFlags
	movl	$.L.str.26, %esi
	movl	%eax, %edi
	callq	_Z10cuda_check10hipError_tPKc
	leaq	208(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventCreateWithFlags
	movl	$.L.str.27, %esi
	movl	%eax, %edi
	callq	_Z10cuda_check10hipError_tPKc
	leaq	280(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventCreateWithFlags
	movl	$.L.str.28, %esi
	movl	%eax, %edi
	callq	_Z10cuda_check10hipError_tPKc
	leaq	264(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventCreateWithFlags
	movl	$.L.str.29, %esi
	movl	%eax, %edi
	callq	_Z10cuda_check10hipError_tPKc
	leaq	248(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventCreateWithFlags
	movl	$.L.str.30, %esi
	movl	%eax, %edi
	callq	_Z10cuda_check10hipError_tPKc
	leaq	232(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventCreateWithFlags
	movl	$.L.str.31, %esi
	movl	%eax, %edi
	callq	_Z10cuda_check10hipError_tPKc
	leaq	216(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventCreateWithFlags
	movl	$.L.str.32, %esi
	movl	%eax, %edi
	callq	_Z10cuda_check10hipError_tPKc
	leaq	184(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventCreateWithFlags
	movl	$.L.str.33, %esi
	movl	%eax, %edi
	callq	_Z10cuda_check10hipError_tPKc
	leaq	200(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventCreateWithFlags
	movl	$.L.str.34, %esi
	movl	%eax, %edi
	callq	_Z10cuda_check10hipError_tPKc
	movq	(%rbp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	leaq	(%r15,%r13), %rbp
	decq	%rbp
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB10_7
# %bb.6:
	movq	48(%rsp), %rsi
	movq	8(%rsp), %rdi                   # 8-byte Reload
                                        # kill: def $edi killed $edi killed $rdi
	callq	_Z23__device_stub__init_veciPf
.LBB10_7:
	movq	280(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB10_9
# %bb.8:
	movq	152(%rsp), %rsi
	movl	%ebx, %edi
	callq	_Z23__device_stub__init_veciPf
.LBB10_9:
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB10_11
# %bb.10:
	movq	32(%rsp), %rsi
	movl	%ebx, %edi
	callq	_Z23__device_stub__init_veciPf
.LBB10_11:                              # %.critedge
	movq	256(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB10_13
# %bb.12:
	movq	136(%rsp), %r8
	movq	48(%rsp), %r9
	movq	32(%rsp), %rax
	movq	%rax, (%rsp)
	movl	%ebx, %edi
	movl	%ebx, %esi
	movl	%ebx, %edx
	movl	$1, %ecx
	callq	_Z24__device_stub__multi_veciiiiPfS_S_
.LBB10_13:
	movq	248(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	272(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB10_15
# %bb.14:
	movq	112(%rsp), %rsi
	movq	136(%rsp), %rdx
	movl	%ebx, %edi
	callq	_Z28__device_stub__reduction_rowiPfS_
.LBB10_15:
	movq	264(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	192(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB10_17
# %bb.16:
	movq	24(%rsp), %rsi
	movq	152(%rsp), %rdx
	movq	112(%rsp), %rcx
	movl	%ebx, %edi
	callq	_Z21__device_stub__vecdifiPfS_S_
.LBB10_17:
	movq	184(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	240(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB10_19
# %bb.18:
	movq	40(%rsp), %rdx
	movq	24(%rsp), %rcx
	movl	%ebx, %edi
	movl	$1, %esi
	callq	_Z24__device_stub__transposeiiPfS_
.LBB10_19:
	movq	232(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB10_21
# %bb.20:
	movq	144(%rsp), %r8
	movq	40(%rsp), %r9
	movq	24(%rsp), %rax
	movq	%rax, (%rsp)
	movl	$1, %edi
	movl	%ebx, %esi
	movl	%ebx, %edx
	movl	$1, %ecx
	callq	_Z24__device_stub__multi_veciiiiPfS_S_
.LBB10_21:
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB10_23
# %bb.22:
	movq	104(%rsp), %rsi
	movq	144(%rsp), %rdx
	movl	%ebx, %edi
	callq	_Z28__device_stub__reduction_rowiPfS_
.LBB10_23:
	movq	8(%rsp), %rax                   # 8-byte Reload
	leaq	(%rax,%r13), %rdx
	decq	%rdx
	movq	%r13, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB10_25
# %bb.24:
	movq	128(%rsp), %r8
	movq	40(%rsp), %r9
	movq	48(%rsp), %rax
	movq	%rax, (%rsp)
	movl	$1, %edi
	movl	%ebx, %esi
	movl	%ebx, %edx
	movl	%ebx, %ecx
	callq	_Z24__device_stub__multi_veciiiiPfS_S_
.LBB10_25:
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB10_27
# %bb.26:
	movq	96(%rsp), %rsi
	movq	128(%rsp), %rdx
	movl	%ebx, %edi
	callq	_Z28__device_stub__reduction_rowiPfS_
.LBB10_27:
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB10_29
# %bb.28:
	movq	120(%rsp), %r8
	movq	96(%rsp), %r9
	movq	24(%rsp), %rax
	movq	%rax, (%rsp)
	movl	$1, %edi
	movl	%ebx, %esi
	movl	%ebx, %edx
	movl	$1, %ecx
	callq	_Z24__device_stub__multi_veciiiiPfS_S_
.LBB10_29:
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB10_31
# %bb.30:
	movq	88(%rsp), %rsi
	movq	120(%rsp), %rdx
	movl	%ebx, %edi
	callq	_Z28__device_stub__reduction_rowiPfS_
.LBB10_31:
	movq	64(%rsp), %rdi
	movq	104(%rsp), %rsi
	movl	$4, %edx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	56(%rsp), %rdi
	movq	88(%rsp), %rsi
	movl	$4, %edx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	64(%rsp), %rax
	movss	(%rax), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 168(%rsp)                # 4-byte Spill
	movq	56(%rsp), %rax
	movss	(%rax), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 164(%rsp)                # 4-byte Spill
	movq	224(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB10_33
# %bb.32:
	movss	168(%rsp), %xmm0                # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	divss	164(%rsp), %xmm0                # 4-byte Folded Reload
	movq	72(%rsp), %rdi
	movq	24(%rsp), %rsi
	callq	_Z29__device_stub__scalareMatricePffS_
.LBB10_33:
	movq	216(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	208(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB10_35
# %bb.34:
	movq	32(%rsp), %rdx
	movq	72(%rsp), %rcx
	movq	8(%rsp), %rdi                   # 8-byte Reload
                                        # kill: def $edi killed $edi killed $rdi
	movq	%rdx, %rsi
	callq	_Z21__device_stub__vecsumiPfS_S_
.LBB10_35:
	movq	200(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	80(%rsp), %rdi
	movq	32(%rsp), %rsi
	movq	%r14, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$.L.str.35, %esi
	movl	%eax, %edi
	callq	_Z10cuda_check10hipError_tPKc
	movq	80(%rsp), %rdi
	movl	%ebx, %esi
	callq	_Z6stampaPfi
	movq	288(%rsp), %rsi
	movq	280(%rsp), %rdx
	leaq	308(%rsp), %r12
	movq	%r12, %rdi
	callq	hipEventElapsedTime
	movl	$.L.str.36, %esi
	movl	%eax, %edi
	callq	_Z10cuda_check10hipError_tPKc
	movq	256(%rsp), %rsi
	movq	248(%rsp), %rdx
	leaq	304(%rsp), %rbp
	movq	%rbp, %rdi
	callq	hipEventElapsedTime
	movl	$.L.str.37, %esi
	movl	%eax, %edi
	callq	_Z10cuda_check10hipError_tPKc
	movq	272(%rsp), %rsi
	movq	264(%rsp), %rdx
	leaq	300(%rsp), %r13
	movq	%r13, %rdi
	callq	hipEventElapsedTime
	movl	$.L.str.38, %esi
	movl	%eax, %edi
	callq	_Z10cuda_check10hipError_tPKc
	movq	240(%rsp), %rsi
	movq	232(%rsp), %rdx
	leaq	296(%rsp), %r15
	movq	%r15, %rdi
	callq	hipEventElapsedTime
	movl	$.L.str.39, %esi
	movl	%eax, %edi
	callq	_Z10cuda_check10hipError_tPKc
	movq	224(%rsp), %rsi
	movq	216(%rsp), %rdx
	leaq	180(%rsp), %rdi
	callq	hipEventElapsedTime
	movl	$.L.str.40, %esi
	movl	%eax, %edi
	callq	_Z10cuda_check10hipError_tPKc
	movq	192(%rsp), %rsi
	movq	184(%rsp), %rdx
	leaq	176(%rsp), %rdi
	callq	hipEventElapsedTime
	movl	$.L.str.41, %esi
	movl	%eax, %edi
	callq	_Z10cuda_check10hipError_tPKc
	movq	208(%rsp), %rsi
	movq	200(%rsp), %rdx
	leaq	172(%rsp), %rdi
	callq	hipEventElapsedTime
	movl	$.L.str.42, %esi
	movl	%eax, %edi
	callq	_Z10cuda_check10hipError_tPKc
	movss	(%r12), %xmm2                   # xmm2 = mem[0],zero,zero,zero
	cvtss2sd	%xmm2, %xmm0
	cvtsi2ssl	8(%rsp), %xmm1          # 4-byte Folded Reload
	movss	%xmm1, 8(%rsp)                  # 4-byte Spill
	divss	%xmm2, %xmm1
	cvtss2sd	%xmm1, %xmm1
	movsd	.LCPI10_0(%rip), %xmm4          # xmm4 = mem[0],zero
	divsd	%xmm4, %xmm1
	cvtsi2ssq	16(%rsp), %xmm3         # 8-byte Folded Reload
	movss	%xmm3, 16(%rsp)                 # 4-byte Spill
	divss	%xmm2, %xmm3
	xorps	%xmm2, %xmm2
	cvtss2sd	%xmm3, %xmm2
	divsd	%xmm4, %xmm2
	movl	$.L.str.43, %edi
	movb	$3, %al
	callq	printf
	movss	(%rbp), %xmm2                   # xmm2 = mem[0],zero,zero,zero
	xorps	%xmm0, %xmm0
	cvtss2sd	%xmm2, %xmm0
	movss	8(%rsp), %xmm1                  # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	divss	%xmm2, %xmm1
	cvtss2sd	%xmm1, %xmm1
	movsd	.LCPI10_0(%rip), %xmm4          # xmm4 = mem[0],zero
	divsd	%xmm4, %xmm1
	movss	16(%rsp), %xmm3                 # 4-byte Reload
                                        # xmm3 = mem[0],zero,zero,zero
	divss	%xmm2, %xmm3
	xorps	%xmm2, %xmm2
	cvtss2sd	%xmm3, %xmm2
	divsd	%xmm4, %xmm2
	movl	$.L.str.44, %edi
	movb	$3, %al
	callq	printf
	movss	(%r13), %xmm2                   # xmm2 = mem[0],zero,zero,zero
	xorps	%xmm0, %xmm0
	cvtss2sd	%xmm2, %xmm0
	movss	8(%rsp), %xmm1                  # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	divss	%xmm2, %xmm1
	cvtss2sd	%xmm1, %xmm1
	movsd	.LCPI10_0(%rip), %xmm3          # xmm3 = mem[0],zero
	divsd	%xmm3, %xmm1
	movss	16(%rsp), %xmm4                 # 4-byte Reload
                                        # xmm4 = mem[0],zero,zero,zero
	divss	%xmm2, %xmm4
	xorps	%xmm2, %xmm2
	cvtss2sd	%xmm4, %xmm2
	divsd	%xmm3, %xmm2
	movl	$.L.str.45, %edi
	movb	$3, %al
	callq	printf
	movss	(%r15), %xmm2                   # xmm2 = mem[0],zero,zero,zero
	xorps	%xmm1, %xmm1
	cvtsi2ss	%ebx, %xmm1
	movss	%xmm1, 8(%rsp)                  # 4-byte Spill
	xorps	%xmm0, %xmm0
	cvtss2sd	%xmm2, %xmm0
	divss	%xmm2, %xmm1
	cvtss2sd	%xmm1, %xmm1
	movsd	.LCPI10_0(%rip), %xmm4          # xmm4 = mem[0],zero
	divsd	%xmm4, %xmm1
	xorps	%xmm3, %xmm3
	cvtsi2ss	%r14, %xmm3
	movss	%xmm3, 16(%rsp)                 # 4-byte Spill
	divss	%xmm2, %xmm3
	xorps	%xmm2, %xmm2
	cvtss2sd	%xmm3, %xmm2
	divsd	%xmm4, %xmm2
	movl	$.L.str.46, %edi
	movb	$3, %al
	callq	printf
	leaq	180(%rsp), %rax
	movss	(%rax), %xmm2                   # xmm2 = mem[0],zero,zero,zero
	xorps	%xmm0, %xmm0
	cvtss2sd	%xmm2, %xmm0
	movss	8(%rsp), %xmm1                  # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	divss	%xmm2, %xmm1
	cvtss2sd	%xmm1, %xmm1
	movsd	.LCPI10_0(%rip), %xmm4          # xmm4 = mem[0],zero
	divsd	%xmm4, %xmm1
	movss	16(%rsp), %xmm3                 # 4-byte Reload
                                        # xmm3 = mem[0],zero,zero,zero
	divss	%xmm2, %xmm3
	xorps	%xmm2, %xmm2
	cvtss2sd	%xmm3, %xmm2
	divsd	%xmm4, %xmm2
	movl	$.L.str.47, %edi
	movb	$3, %al
	callq	printf
	leaq	176(%rsp), %rax
	movss	(%rax), %xmm2                   # xmm2 = mem[0],zero,zero,zero
	xorps	%xmm0, %xmm0
	cvtss2sd	%xmm2, %xmm0
	movss	8(%rsp), %xmm1                  # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	divss	%xmm2, %xmm1
	cvtss2sd	%xmm1, %xmm1
	movsd	.LCPI10_0(%rip), %xmm4          # xmm4 = mem[0],zero
	divsd	%xmm4, %xmm1
	movss	16(%rsp), %xmm3                 # 4-byte Reload
                                        # xmm3 = mem[0],zero,zero,zero
	divss	%xmm2, %xmm3
	xorps	%xmm2, %xmm2
	cvtss2sd	%xmm3, %xmm2
	divsd	%xmm4, %xmm2
	movl	$.L.str.48, %edi
	movb	$3, %al
	callq	printf
	leaq	172(%rsp), %rax
	movss	(%rax), %xmm2                   # xmm2 = mem[0],zero,zero,zero
	xorps	%xmm0, %xmm0
	cvtss2sd	%xmm2, %xmm0
	movss	8(%rsp), %xmm1                  # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	divss	%xmm2, %xmm1
	cvtss2sd	%xmm1, %xmm1
	movsd	.LCPI10_0(%rip), %xmm4          # xmm4 = mem[0],zero
	divsd	%xmm4, %xmm1
	movss	16(%rsp), %xmm3                 # 4-byte Reload
                                        # xmm3 = mem[0],zero,zero,zero
	divss	%xmm2, %xmm3
	xorps	%xmm2, %xmm2
	cvtss2sd	%xmm3, %xmm2
	divsd	%xmm4, %xmm2
	movl	$.L.str.49, %edi
	movb	$3, %al
	callq	printf
	movq	48(%rsp), %rdi
	callq	hipFree
	movq	80(%rsp), %rdi
	callq	hipHostFree
	movq	136(%rsp), %rdi
	callq	hipFree
	movq	128(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	144(%rsp), %rdi
	callq	hipFree
	movq	120(%rsp), %rdi
	callq	hipFree
	movq	112(%rsp), %rdi
	callq	hipFree
	movq	104(%rsp), %rdi
	callq	hipFree
	movq	96(%rsp), %rdi
	callq	hipFree
	movq	88(%rsp), %rdi
	callq	hipFree
	movq	72(%rsp), %rdi
	callq	hipFree
	movq	152(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	64(%rsp), %rdi
	callq	hipHostFree
	movq	56(%rsp), %rdi
	callq	hipHostFree
	xorl	%eax, %eax
	addq	$312, %rsp                      # imm = 0x138
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB10_1:
	.cfi_def_cfa_offset 368
	movq	stderr(%rip), %rdi
	movl	$.L.str, %esi
	movl	$.L.str.5, %edx
	jmp	.LBB10_2
.LBB10_4:
	movq	stderr(%rip), %rdi
	movl	$.L.str, %esi
	movl	$.L.str.6, %edx
.LBB10_2:
	xorl	%eax, %eax
	callq	fprintf
	movl	$1, %edi
	callq	exit
.Lfunc_end10:
	.size	main, .Lfunc_end10-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB11_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB11_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8init_veciPf, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9multi_veciiiiPfS_S_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14scalareMatricePffS_, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13reduction_rowiPfS_, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9transposeiiPfS_, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6vecsumiPfS_S_, %esi
	movl	$.L__unnamed_6, %edx
	movl	$.L__unnamed_6, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6vecdifiPfS_S_, %esi
	movl	$.L__unnamed_7, %edx
	movl	$.L__unnamed_7, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end11:
	.size	__hip_module_ctor, .Lfunc_end11-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB12_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB12_2:
	retq
.Lfunc_end12:
	.size	__hip_module_dtor, .Lfunc_end12-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"%s\n"
	.size	.L.str, 4

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"%s: CUDA error %d (%s)\n"
	.size	.L.str.1, 24

	.type	_Z8init_veciPf,@object          # @_Z8init_veciPf
	.section	.rodata,"a",@progbits
	.globl	_Z8init_veciPf
	.p2align	3, 0x0
_Z8init_veciPf:
	.quad	_Z23__device_stub__init_veciPf
	.size	_Z8init_veciPf, 8

	.type	_Z9multi_veciiiiPfS_S_,@object  # @_Z9multi_veciiiiPfS_S_
	.globl	_Z9multi_veciiiiPfS_S_
	.p2align	3, 0x0
_Z9multi_veciiiiPfS_S_:
	.quad	_Z24__device_stub__multi_veciiiiPfS_S_
	.size	_Z9multi_veciiiiPfS_S_, 8

	.type	_Z14scalareMatricePffS_,@object # @_Z14scalareMatricePffS_
	.globl	_Z14scalareMatricePffS_
	.p2align	3, 0x0
_Z14scalareMatricePffS_:
	.quad	_Z29__device_stub__scalareMatricePffS_
	.size	_Z14scalareMatricePffS_, 8

	.type	_Z13reduction_rowiPfS_,@object  # @_Z13reduction_rowiPfS_
	.globl	_Z13reduction_rowiPfS_
	.p2align	3, 0x0
_Z13reduction_rowiPfS_:
	.quad	_Z28__device_stub__reduction_rowiPfS_
	.size	_Z13reduction_rowiPfS_, 8

	.type	_Z9transposeiiPfS_,@object      # @_Z9transposeiiPfS_
	.globl	_Z9transposeiiPfS_
	.p2align	3, 0x0
_Z9transposeiiPfS_:
	.quad	_Z24__device_stub__transposeiiPfS_
	.size	_Z9transposeiiPfS_, 8

	.type	_Z6vecsumiPfS_S_,@object        # @_Z6vecsumiPfS_S_
	.globl	_Z6vecsumiPfS_S_
	.p2align	3, 0x0
_Z6vecsumiPfS_S_:
	.quad	_Z21__device_stub__vecsumiPfS_S_
	.size	_Z6vecsumiPfS_S_, 8

	.type	_Z6vecdifiPfS_S_,@object        # @_Z6vecdifiPfS_S_
	.globl	_Z6vecdifiPfS_S_
	.p2align	3, 0x0
_Z6vecdifiPfS_S_:
	.quad	_Z21__device_stub__vecdifiPfS_S_
	.size	_Z6vecdifiPfS_S_, 8

	.type	.L.str.3,@object                # @.str.3
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.3:
	.asciz	"%f  "
	.size	.L.str.3, 5

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"%d\n"
	.size	.L.str.4, 4

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"syntax: serve N come arg"
	.size	.L.str.5, 25

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"N < 0"
	.size	.L.str.6, 6

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"alloc matriceA"
	.size	.L.str.7, 15

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"alloc matriceB"
	.size	.L.str.8, 15

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"alloc matriceX"
	.size	.L.str.9, 15

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"alloc matrice"
	.size	.L.str.10, 14

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"alloc somma"
	.size	.L.str.11, 12

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"alloc res"
	.size	.L.str.12, 10

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	"alloc res0"
	.size	.L.str.13, 11

	.type	.L.str.14,@object               # @.str.14
.L.str.14:
	.asciz	"alloc prodotto"
	.size	.L.str.14, 15

	.type	.L.str.15,@object               # @.str.15
.L.str.15:
	.asciz	"alloc res1"
	.size	.L.str.15, 11

	.type	.L.str.16,@object               # @.str.16
.L.str.16:
	.asciz	"alloc res2"
	.size	.L.str.16, 11

	.type	.L.str.17,@object               # @.str.17
.L.str.17:
	.asciz	"alloc pk"
	.size	.L.str.17, 9

	.type	.L.str.18,@object               # @.str.18
.L.str.18:
	.asciz	"alloc trasposta\t"
	.size	.L.str.18, 17

	.type	.L.str.19,@object               # @.str.19
.L.str.19:
	.asciz	"alloc den"
	.size	.L.str.19, 10

	.type	.L.str.20,@object               # @.str.20
.L.str.20:
	.asciz	"alloc scalar"
	.size	.L.str.20, 13

	.type	.L.str.21,@object               # @.str.21
.L.str.21:
	.asciz	"create pre_init"
	.size	.L.str.21, 16

	.type	.L.str.22,@object               # @.str.22
.L.str.22:
	.asciz	"create pre_red"
	.size	.L.str.22, 15

	.type	.L.str.23,@object               # @.str.23
.L.str.23:
	.asciz	"create pre_sum"
	.size	.L.str.23, 15

	.type	.L.str.24,@object               # @.str.24
.L.str.24:
	.asciz	"create pre_traspose"
	.size	.L.str.24, 20

	.type	.L.str.25,@object               # @.str.25
.L.str.25:
	.asciz	"create pre_scalar_matrice"
	.size	.L.str.25, 26

	.type	.L.str.26,@object               # @.str.26
.L.str.26:
	.asciz	"create pre_vecdif"
	.size	.L.str.26, 18

	.type	.L.str.27,@object               # @.str.27
.L.str.27:
	.asciz	"create pre_vecsum"
	.size	.L.str.27, 18

	.type	.L.str.28,@object               # @.str.28
.L.str.28:
	.asciz	"create post_init"
	.size	.L.str.28, 17

	.type	.L.str.29,@object               # @.str.29
.L.str.29:
	.asciz	"create post_red"
	.size	.L.str.29, 16

	.type	.L.str.30,@object               # @.str.30
.L.str.30:
	.asciz	"create post_sum"
	.size	.L.str.30, 16

	.type	.L.str.31,@object               # @.str.31
.L.str.31:
	.asciz	"create post_traspose"
	.size	.L.str.31, 21

	.type	.L.str.32,@object               # @.str.32
.L.str.32:
	.asciz	"create post_scalar_matrice"
	.size	.L.str.32, 27

	.type	.L.str.33,@object               # @.str.33
.L.str.33:
	.asciz	"create post_vecdif"
	.size	.L.str.33, 19

	.type	.L.str.34,@object               # @.str.34
.L.str.34:
	.asciz	"create post_vecsum"
	.size	.L.str.34, 19

	.type	.L.str.35,@object               # @.str.35
.L.str.35:
	.asciz	"create mem"
	.size	.L.str.35, 11

	.type	.L.str.36,@object               # @.str.36
.L.str.36:
	.asciz	"elapsed time init"
	.size	.L.str.36, 18

	.type	.L.str.37,@object               # @.str.37
.L.str.37:
	.asciz	"elapsed time prodotto"
	.size	.L.str.37, 22

	.type	.L.str.38,@object               # @.str.38
.L.str.38:
	.asciz	"elapsed time reduction"
	.size	.L.str.38, 23

	.type	.L.str.39,@object               # @.str.39
.L.str.39:
	.asciz	"elapsed time traspose"
	.size	.L.str.39, 22

	.type	.L.str.40,@object               # @.str.40
.L.str.40:
	.asciz	"elapsed time scalar_matrice"
	.size	.L.str.40, 28

	.type	.L.str.41,@object               # @.str.41
.L.str.41:
	.asciz	"elapsed time vecdif"
	.size	.L.str.41, 20

	.type	.L.str.42,@object               # @.str.42
.L.str.42:
	.asciz	"elapsed time vecsum"
	.size	.L.str.42, 20

	.type	.L.str.43,@object               # @.str.43
.L.str.43:
	.asciz	"init: runtime %.4gms, %.4g GE/s, %.4g GB/s\n"
	.size	.L.str.43, 44

	.type	.L.str.44,@object               # @.str.44
.L.str.44:
	.asciz	"prodotto: runtime %.4gms, %.4g GE/s, %.4g GB/s\n"
	.size	.L.str.44, 48

	.type	.L.str.45,@object               # @.str.45
.L.str.45:
	.asciz	"reduction: runtime %.4gms, %.4g GE/s, %.4g GB/s\n"
	.size	.L.str.45, 49

	.type	.L.str.46,@object               # @.str.46
.L.str.46:
	.asciz	"transpose: runtime %.4gms, %.4g GE/s, %.4g GB/s\n"
	.size	.L.str.46, 49

	.type	.L.str.47,@object               # @.str.47
.L.str.47:
	.asciz	"scalareMatrice: runtime %.4gms, %.4g GE/s, %.4g GB/s\n"
	.size	.L.str.47, 54

	.type	.L.str.48,@object               # @.str.48
.L.str.48:
	.asciz	"vecdif: runtime %.4gms, %.4g GE/s, %.4g GB/s\n"
	.size	.L.str.48, 46

	.type	.L.str.49,@object               # @.str.49
.L.str.49:
	.asciz	"vecsum: runtime %.4gms, %.4g GE/s, %.4g GB/s\n"
	.size	.L.str.49, 46

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z8init_veciPf"
	.size	.L__unnamed_1, 15

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z9multi_veciiiiPfS_S_"
	.size	.L__unnamed_2, 23

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z14scalareMatricePffS_"
	.size	.L__unnamed_3, 24

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z13reduction_rowiPfS_"
	.size	.L__unnamed_4, 23

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"_Z9transposeiiPfS_"
	.size	.L__unnamed_5, 19

	.type	.L__unnamed_6,@object           # @5
.L__unnamed_6:
	.asciz	"_Z6vecsumiPfS_S_"
	.size	.L__unnamed_6, 17

	.type	.L__unnamed_7,@object           # @6
.L__unnamed_7:
	.asciz	"_Z6vecdifiPfS_S_"
	.size	.L__unnamed_7, 17

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z23__device_stub__init_veciPf
	.addrsig_sym _Z24__device_stub__multi_veciiiiPfS_S_
	.addrsig_sym _Z29__device_stub__scalareMatricePffS_
	.addrsig_sym _Z28__device_stub__reduction_rowiPfS_
	.addrsig_sym _Z24__device_stub__transposeiiPfS_
	.addrsig_sym _Z21__device_stub__vecsumiPfS_S_
	.addrsig_sym _Z21__device_stub__vecdifiPfS_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z8init_veciPf
	.addrsig_sym _Z9multi_veciiiiPfS_S_
	.addrsig_sym _Z14scalareMatricePffS_
	.addrsig_sym _Z13reduction_rowiPfS_
	.addrsig_sym _Z9transposeiiPfS_
	.addrsig_sym _Z6vecsumiPfS_S_
	.addrsig_sym _Z6vecdifiPfS_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z8init_veciPf          ; -- Begin function _Z8init_veciPf
	.globl	_Z8init_veciPf
	.p2align	8
	.type	_Z8init_veciPf,@function
_Z8init_veciPf:                         ; @_Z8init_veciPf
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x1c
	s_load_b64 s[0:1], s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	v_ashrrev_i32_e32 v2, 31, v1
	v_cvt_f32_i32_e32 v4, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	v_add_co_u32 v0, vcc_lo, s0, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v3, vcc_lo
	global_store_b32 v[0:1], v4, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8init_veciPf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z8init_veciPf, .Lfunc_end0-_Z8init_veciPf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 100
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z9multi_veciiiiPfS_S_  ; -- Begin function _Z9multi_veciiiiPfS_S_
	.globl	_Z9multi_veciiiiPfS_S_
	.p2align	8
	.type	_Z9multi_veciiiiPfS_S_,@function
_Z9multi_veciiiiPfS_S_:                 ; @_Z9multi_veciiiiPfS_S_
; %bb.0:
	s_load_b256 s[4:11], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	v_cvt_f32_u32_e32 v1, s6
	v_cvt_f32_u32_e32 v2, s5
	s_sub_i32 s2, 0, s6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v1, v1
	v_rcp_iflag_f32_e32 v2, v2
	s_waitcnt_depctr 0xfff
	v_dual_mul_f32 v1, 0x4f7ffffe, v1 :: v_dual_mul_f32 v2, 0x4f7ffffe, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_u32_f32_e32 v1, v1
	v_cvt_u32_f32_e32 v2, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_mul_lo_u32 v3, s2, v1
	s_sub_i32 s2, 0, s5
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_mul_lo_u32 v4, s2, v2
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x20
	s_load_b32 s0, s[0:1], 0x34
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, v3
	v_mul_hi_u32 v4, v2, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v2, v2, v4
	v_mul_hi_u32 v2, v0, v2
	s_waitcnt lgkmcnt(0)
	s_and_b32 s0, s0, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v2, v2, s5
	v_sub_nc_u32_e32 v2, v0, v2
	v_add_nc_u32_e32 v1, v1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v1, v0, v1
	v_mul_lo_u32 v3, v1, s6
	v_add_nc_u32_e32 v4, 1, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v3, v0, v3
	v_subrev_nc_u32_e32 v5, s6, v3
	v_cmp_le_u32_e32 vcc_lo, s6, v3
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v1, v1, v4, vcc_lo
	v_subrev_nc_u32_e32 v4, s5, v2
	v_cndmask_b32_e32 v3, v3, v5, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s5, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_cndmask_b32 v2, v2, v4 :: v_dual_add_nc_u32 v5, 1, v1
	v_cmp_le_u32_e32 vcc_lo, s6, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_subrev_nc_u32_e32 v3, s5, v2
	v_cndmask_b32_e32 v1, v1, v5, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s5, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_lo_u32 v4, v1, s6
	v_cndmask_b32_e32 v2, v2, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v7, v0, v4
	v_mad_u64_u32 v[3:4], null, s15, s4, v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[5:6], null, v7, s7, v[1:2]
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v6, 31, v5
	v_lshlrev_b64 v[1:2], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[3:4], 2, v[5:6]
	v_add_co_u32 v1, vcc_lo, s10, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v2, vcc_lo, s11, v2, vcc_lo
	v_add_co_u32 v3, vcc_lo, s2, v3
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v4, vcc_lo, s3, v4, vcc_lo
	global_load_b32 v5, v[1:2], off
	global_load_b32 v3, v[3:4], off
	v_mad_u64_u32 v[1:2], null, s15, s0, v[0:1]
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_add_co_u32 v0, vcc_lo, s8, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s9, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v2, v5, v3
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9multi_veciiiiPfS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z9multi_veciiiiPfS_S_, .Lfunc_end1-_Z9multi_veciiiiPfS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 464
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z14scalareMatricePffS_ ; -- Begin function _Z14scalareMatricePffS_
	.globl	_Z14scalareMatricePffS_
	.p2align	8
	.type	_Z14scalareMatricePffS_,@function
_Z14scalareMatricePffS_:                ; @_Z14scalareMatricePffS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_add_co_u32 v2, vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x8
	s_load_b64 s[0:1], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v2, s2, v2
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14scalareMatricePffS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z14scalareMatricePffS_, .Lfunc_end2-_Z14scalareMatricePffS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 148
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z13reduction_rowiPfS_  ; -- Begin function _Z13reduction_rowiPfS_
	.globl	_Z13reduction_rowiPfS_
	.p2align	8
	.type	_Z13reduction_rowiPfS_,@function
_Z13reduction_rowiPfS_:                 ; @_Z13reduction_rowiPfS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x0
	s_load_b32 s3, s[0:1], 0x24
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s4, s2, 31
	s_and_b32 s3, s3, 0xffff
	s_add_i32 s5, s2, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s5, s5, s4
	v_cvt_f32_u32_e32 v1, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	v_cvt_u32_f32_e32 v3, v1
	v_mad_u64_u32 v[1:2], null, s15, s3, v[0:1]
	s_sub_i32 s3, 0, s5
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_mul_lo_u32 v0, s3, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v2, 31, v1
	v_mul_hi_u32 v0, v3, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v4, v1, v2
	v_xor_b32_e32 v4, v4, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v3, v0
	v_mul_hi_u32 v0, v4, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v3, v0, s5
	v_sub_nc_u32_e32 v3, v4, v3
	v_add_nc_u32_e32 v4, 1, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v5, s5, v3
	v_cmp_le_u32_e32 vcc_lo, s5, v3
	v_dual_cndmask_b32 v3, v3, v5 :: v_dual_cndmask_b32 v0, v0, v4
	v_xor_b32_e32 v5, s4, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_le_u32_e32 vcc_lo, s5, v3
	v_add_nc_u32_e32 v4, 1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v0, v0, v4, vcc_lo
	v_xor_b32_e32 v0, v0, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v0, v0, v5
	v_mul_lo_u32 v3, v0, s2
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v3, v1, v3
	v_cmpx_eq_u32_e32 31, v3
	s_cbranch_execz .LBB3_2
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x8
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v29, vcc_lo, s2, v1
	v_add_co_ci_u32_e32 v30, vcc_lo, s3, v2, vcc_lo
	s_clause 0x7
	global_load_b128 v[1:4], v[29:30], off offset:-124
	global_load_b128 v[5:8], v[29:30], off offset:-108
	global_load_b128 v[9:12], v[29:30], off offset:-92
	global_load_b128 v[13:16], v[29:30], off offset:-76
	global_load_b128 v[17:20], v[29:30], off offset:-60
	global_load_b128 v[21:24], v[29:30], off offset:-44
	global_load_b128 v[25:28], v[29:30], off offset:-28
	global_load_b128 v[29:32], v[29:30], off offset:-12
	s_waitcnt vmcnt(7)
	v_add_f32_e32 v1, v1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v1, v1, v3
	v_add_f32_e32 v1, v1, v4
	s_waitcnt vmcnt(6)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v1, v1, v5
	v_add_f32_e32 v1, v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v1, v1, v7
	v_add_f32_e32 v1, v1, v8
	s_waitcnt vmcnt(5)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v1, v1, v9
	v_add_f32_e32 v1, v1, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v1, v1, v11
	v_add_f32_e32 v1, v1, v12
	s_waitcnt vmcnt(4)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v1, v1, v13
	v_add_f32_e32 v1, v1, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v1, v1, v15
	v_add_f32_e32 v1, v1, v16
	s_waitcnt vmcnt(3)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v1, v1, v17
	v_add_f32_e32 v1, v1, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v1, v1, v19
	v_add_f32_e32 v1, v1, v20
	s_waitcnt vmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v1, v1, v21
	v_add_f32_e32 v1, v1, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v1, v1, v23
	v_add_f32_e32 v1, v1, v24
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v1, v1, v25
	v_add_f32_e32 v1, v1, v26
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v1, v1, v27
	v_add_f32_e32 v1, v1, v28
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f32_e32 v2, v1, v29
	v_ashrrev_i32_e32 v1, 31, v0
	v_add_f32_e32 v2, v2, v30
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_add_f32_e32 v2, v2, v31
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_add_f32_e32 v2, v2, v32
	global_store_b32 v[0:1], v2, off
.LBB3_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13reduction_rowiPfS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 33
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z13reduction_rowiPfS_, .Lfunc_end3-_Z13reduction_rowiPfS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 620
; NumSgprs: 18
; NumVgprs: 33
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 4
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 33
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z9transposeiiPfS_      ; -- Begin function _Z9transposeiiPfS_
	.globl	_Z9transposeiiPfS_
	.p2align	8
	.type	_Z9transposeiiPfS_,@function
_Z9transposeiiPfS_:                     ; @_Z9transposeiiPfS_
; %bb.0:
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_mov_b32 s2, s15
	s_waitcnt lgkmcnt(0)
	v_mad_u64_u32 v[1:2], null, s2, s5, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s0, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	global_load_b32 v3, v[1:2], off
	v_mad_u64_u32 v[1:2], null, v0, s4, s[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v3, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9transposeiiPfS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 24
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end4:
	.size	_Z9transposeiiPfS_, .Lfunc_end4-_Z9transposeiiPfS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 140
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z6vecsumiPfS_S_        ; -- Begin function _Z6vecsumiPfS_S_
	.globl	_Z6vecsumiPfS_S_
	.p2align	8
	.type	_Z6vecsumiPfS_S_,@function
_Z6vecsumiPfS_S_:                       ; @_Z6vecsumiPfS_S_
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b128 s[4:7], s[0:1], 0x8
	s_load_b64 s[0:1], s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_add_co_u32 v2, vcc_lo, s6, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s4, v0
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v2, v2, v3
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6vecsumiPfS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end5:
	.size	_Z6vecsumiPfS_S_, .Lfunc_end5-_Z6vecsumiPfS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 152
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z6vecdifiPfS_S_        ; -- Begin function _Z6vecdifiPfS_S_
	.globl	_Z6vecdifiPfS_S_
	.p2align	8
	.type	_Z6vecdifiPfS_S_,@function
_Z6vecdifiPfS_S_:                       ; @_Z6vecdifiPfS_S_
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b128 s[4:7], s[0:1], 0x8
	s_load_b64 s[0:1], s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_add_co_u32 v2, vcc_lo, s6, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s4, v0
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_sub_f32_e32 v2, v2, v3
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6vecdifiPfS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end6:
	.size	_Z6vecdifiPfS_S_, .Lfunc_end6-_Z6vecdifiPfS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 152
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .actual_access:  write_only
        .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z8init_veciPf
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z8init_veciPf.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .offset:         4
        .size:           4
        .value_kind:     by_value
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
      - .actual_access:  write_only
        .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .actual_access:  read_only
        .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .actual_access:  read_only
        .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9multi_veciiiiPfS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z9multi_veciiiiPfS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .actual_access:  write_only
        .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .actual_access:  read_only
        .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z14scalareMatricePffS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z14scalareMatricePffS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     4
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .actual_access:  write_only
        .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .actual_access:  read_only
        .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z13reduction_rowiPfS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z13reduction_rowiPfS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     33
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .offset:         4
        .size:           4
        .value_kind:     by_value
      - .actual_access:  write_only
        .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .actual_access:  read_only
        .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 24
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9transposeiiPfS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z9transposeiiPfS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     4
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .actual_access:  write_only
        .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .actual_access:  read_only
        .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .actual_access:  read_only
        .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6vecsumiPfS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z6vecsumiPfS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .actual_access:  write_only
        .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .actual_access:  read_only
        .address_space:  global
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        .size:           8
        .value_kind:     global_buffer
      - .actual_access:  read_only
        .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
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      - .offset:         46
        .size:           2
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      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6vecdifiPfS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z6vecdifiPfS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
