#include <bits/stdc++.h>
#include <cuda.h>
using namespace std;

#define N ((int)1e3)
#define TILE 32
#define CEIL(a, b) ((a-1)/b +1)

__global__ void multiply(float *d_a, float *d_b, float *d_c) {

	int x = blockIdx.x*blockDim.x + threadIdx.x;
	int y = blockIdx.y*blockDim.y + threadIdx.y;

	__shared__ float a[TILE][TILE];
	__shared__ float b[TILE][TILE];

	float cij = 0.0;
	for(int k=0; k<CEIL(N, TILE); k++) {
		// Copy the kth tile on the horizontal strip from A
		if(x<N && TILE*k + threadIdx.y < N)
			a[threadIdx.x][threadIdx.y] = d_a[x*N + TILE*k + threadIdx.y];
		else
			a[threadIdx.x][threadIdx.y] = 0.0;

		// Copy the kth tile on the vertical strip from B
		if(y<N && TILE*k + threadIdx.x < N)
			b[threadIdx.x][threadIdx.y] = d_b[(TILE*k + threadIdx.x)*N + y];
		else
			b[threadIdx.x][threadIdx.y] = 0.0;

		// Wait for all elements to be copied
		__syncthreads();

		// Do all operations related to these tiles before moving to next tile
		for(int kk=0; kk<TILE; kk++)
			cij += a[threadIdx.x][kk] * b[kk][threadIdx.y];

		// Wait before copying next tile
		__syncthreads();
	}

	if(x < N && y < N)
		d_c[x*N + y] = cij;
}

template <class T>
void testSolution(T *h_a, T *h_b, T *h_c, float precision=0.0) {

	int errors = 0;
	for(int i=0; i<N; i++)
		for(int j=0; j<N; j++) {

			float exp = 0.0, act;
			for(int k=0; k<N; k++)
				exp += h_a[i*N + k] * h_b[k*N + j];
			act = h_c[i*N + j];

			if(abs(act-exp) / (max(exp, precision)) > precision) {
				
				errors++;
				if(errors <= 10)
					printf("Test failed at index : (%d, %d) [Expected: %10.2f | Got: %10.2f]\n", 
						i, j, exp, act);
			}
		}

	if(errors)
		printf("\n%d Tests failed!\n\n", errors);
	else
		printf("All tests passed !\n\n");
}

int main() {

	float *h_a, *h_b, *h_c;
	float *d_a, *d_b, *d_c;

	// Allocate host memory
	h_a = new float[N*N];
	h_b = new float[N*N];
	h_c = new float[N*N];

	printf("\nSize of matrices : %d x %d\n\n", N, N);

	srand(time(0));
	for(int i=0; i<N; i++)
		for(int j=0; j<N; j++) {
			h_a[i*N + j] = (rand()%N) *1.0/ (rand()%N +1);
			h_b[i*N + j] = (rand()%N) *1.0/ (rand()%N +1);
		}

	// Allocate memory on device
	cudaMalloc((void**)&d_a, N*N*sizeof(float));
	cudaMalloc((void**)&d_b, N*N*sizeof(float));
	cudaMalloc((void**)&d_c, N*N*sizeof(float));

	//Copy data into device memory
	cudaMemcpy(d_a, h_a, N*N*sizeof(float), cudaMemcpyHostToDevice);
	cudaMemcpy(d_b, h_b, N*N*sizeof(float), cudaMemcpyHostToDevice);

	// Kernel call
	dim3 grid(CEIL(N, 32), CEIL(N, 32), 1);
	dim3 block(32, 32, 1);

	multiply <<<grid, block>>> (d_a, d_b, d_c);
	cudaThreadSynchronize();

	// Copy data back to host
	cudaMemcpy(h_c, d_c, N*N*sizeof(float), cudaMemcpyDeviceToHost);

	// Free device memory
	cudaFree(d_a);
	cudaFree(d_b);
	cudaFree(d_c);

	testSolution(h_a, h_b, h_c, 1e-3); //Tolerates 0.1% relative error

	// Free host memory
	delete[] h_a, h_b, h_c;
}
	.file	"tmpxft_002645f7_00000000-6_matrixTileMultiplication.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB10829:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE10829:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z31__device_stub__Z8multiplyPfS_S_PfS_S_
	.type	_Z31__device_stub__Z8multiplyPfS_S_PfS_S_, @function
_Z31__device_stub__Z8multiplyPfS_S_PfS_S_:
.LFB10851:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z8multiplyPfS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L2:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE10851:
	.size	_Z31__device_stub__Z8multiplyPfS_S_PfS_S_, .-_Z31__device_stub__Z8multiplyPfS_S_PfS_S_
	.globl	_Z8multiplyPfS_S_
	.type	_Z8multiplyPfS_S_, @function
_Z8multiplyPfS_S_:
.LFB10852:
	.cfi_startproc
	endbr64
	jmp	_Z31__device_stub__Z8multiplyPfS_S_PfS_S_
	.cfi_endproc
.LFE10852:
	.size	_Z8multiplyPfS_S_, .-_Z8multiplyPfS_S_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z8multiplyPfS_S_"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB10854:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z8multiplyPfS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE10854:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.rodata._Z12testSolutionIfEvPT_S1_S1_f.str1.1,"aMS",@progbits,1
.LC3:
	.string	"Test failed at index : (%d, %d) [Expected: %10.2f | Got: %10.2f]\n"
.LC4:
	.string	"\n%d Tests failed!\n\n"
.LC5:
	.string	"All tests passed !\n\n"
	.section	.text._Z12testSolutionIfEvPT_S1_S1_f,"axG",@progbits,_Z12testSolutionIfEvPT_S1_S1_f,comdat
	.weak	_Z12testSolutionIfEvPT_S1_S1_f
	.type	_Z12testSolutionIfEvPT_S1_S1_f, @function
_Z12testSolutionIfEvPT_S1_S1_f:
.LFB11533:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rsi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rdi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	xorl	%ebx, %ebx
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	movq	%rdx, 16(%rsp)
	movss	%xmm0, (%rsp)
.L11:
	imulq	$4000, %rbp, %rax
	movq	16(%rsp), %rcx
	movl	%ebp, 4(%rsp)
	xorl	%r12d, %r12d
	leaq	0(%r13,%rax), %r15
	addq	%rcx, %rax
	movq	%rax, 8(%rsp)
.L19:
	leaq	(%r14,%r12,4), %rdx
	xorl	%eax, %eax
	xorps	%xmm1, %xmm1
.L12:
	movss	(%r15,%rax,4), %xmm0
	mulss	(%rdx), %xmm0
	incq	%rax
	addq	$4000, %rdx
	addss	%xmm0, %xmm1
	cmpq	$1000, %rax
	jne	.L12
	movq	8(%rsp), %rax
	movss	(%rsp), %xmm0
	movss	%xmm1, 24(%rsp)
	movss	(%rax,%r12,4), %xmm2
	movss	%xmm2, 28(%rsp)
	call	fmaxf@PLT
	movss	28(%rsp), %xmm2
	movss	24(%rsp), %xmm1
	movaps	%xmm0, %xmm3
	movaps	%xmm2, %xmm0
	subss	%xmm1, %xmm0
	andps	.LC2(%rip), %xmm0
	divss	%xmm3, %xmm0
	comiss	(%rsp), %xmm0
	jbe	.L13
	incl	%ebx
	cmpl	$10, %ebx
	jg	.L13
	movl	4(%rsp), %edx
	movl	%r12d, %ecx
	leaq	.LC3(%rip), %rsi
	movb	$2, %al
	movl	$2, %edi
	cvtss2sd	%xmm1, %xmm0
	cvtss2sd	%xmm2, %xmm1
	call	__printf_chk@PLT
.L13:
	incq	%r12
	cmpq	$1000, %r12
	jne	.L19
	incq	%rbp
	cmpq	$1000, %rbp
	jne	.L11
	testl	%ebx, %ebx
	je	.L20
	addq	$40, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	movl	%ebx, %edx
	leaq	.LC4(%rip), %rsi
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	movl	$2, %edi
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	__printf_chk@PLT
.L20:
	.cfi_restore_state
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	__printf_chk@PLT
	.cfi_endproc
.LFE11533:
	.size	_Z12testSolutionIfEvPT_S1_S1_f, .-_Z12testSolutionIfEvPT_S1_S1_f
	.section	.rodata.str1.1
.LC6:
	.string	"\nSize of matrices : %d x %d\n\n"
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB10826:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$4000000, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	xorl	%r14d, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	$1000, %ebx
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	call	_Znam@PLT
	movl	$4000000, %edi
	movq	%rax, %rbp
	call	_Znam@PLT
	movl	$4000000, %edi
	movq	%rax, %r12
	call	_Znam@PLT
	movl	$1000, %ecx
	movl	$1000, %edx
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %r15
	xorl	%eax, %eax
	call	__printf_chk@PLT
	xorl	%edi, %edi
	call	time@PLT
	movl	%eax, %edi
	call	srand@PLT
.L25:
	xorl	%r13d, %r13d
.L26:
	call	rand@PLT
	cltd
	idivl	%ebx
	cvtsi2sdl	%edx, %xmm0
	movsd	%xmm0, 8(%rsp)
	call	rand@PLT
	movsd	8(%rsp), %xmm0
	leaq	0(%rbp,%r14), %rcx
	cltd
	idivl	%ebx
	incl	%edx
	cvtsi2sdl	%edx, %xmm1
	divsd	%xmm1, %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%rcx,%r13)
	call	rand@PLT
	cltd
	idivl	%ebx
	cvtsi2sdl	%edx, %xmm0
	movsd	%xmm0, 8(%rsp)
	call	rand@PLT
	movsd	8(%rsp), %xmm0
	leaq	(%r12,%r14), %rcx
	cltd
	idivl	%ebx
	incl	%edx
	cvtsi2sdl	%edx, %xmm1
	divsd	%xmm1, %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%rcx,%r13)
	addq	$4, %r13
	cmpq	$4000, %r13
	jne	.L26
	addq	$4000, %r14
	cmpq	$4000000, %r14
	jne	.L25
	leaq	24(%rsp), %rdi
	movl	$4000000, %esi
	call	cudaMalloc@PLT
	leaq	32(%rsp), %rdi
	movl	$4000000, %esi
	call	cudaMalloc@PLT
	leaq	40(%rsp), %rdi
	movl	$4000000, %esi
	call	cudaMalloc@PLT
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$4000000, %edx
	call	cudaMemcpy@PLT
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$4000000, %edx
	call	cudaMemcpy@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movabsq	$137438953504, %rdi
	movl	$1, %esi
	movq	%rdi, %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L28
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdi
	call	_Z31__device_stub__Z8multiplyPfS_S_PfS_S_
.L28:
	call	cudaThreadSynchronize@PLT
	movq	40(%rsp), %rsi
	movl	$2, %ecx
	movq	%r15, %rdi
	movl	$4000000, %edx
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	%rbp, %rdi
	movq	%r15, %rdx
	movq	%r12, %rsi
	movss	.LC7(%rip), %xmm0
	call	_Z12testSolutionIfEvPT_S1_S1_f
	movq	%rbp, %rdi
	call	_ZdaPv@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L29
	call	__stack_chk_fail@PLT
.L29:
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE10826:
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst16,"aM",@progbits,16
	.align 16
.LC2:
	.long	2147483647
	.long	0
	.long	0
	.long	0
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC7:
	.long	981668463
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <bits/stdc++.h>
#include <hip/hip_runtime.h>
using namespace std;

#define N ((int)1e3)
#define TILE 32
#define CEIL(a, b) ((a-1)/b +1)

__global__ void multiply(float *d_a, float *d_b, float *d_c) {

	int x = blockIdx.x*blockDim.x + threadIdx.x;
	int y = blockIdx.y*blockDim.y + threadIdx.y;

	__shared__ float a[TILE][TILE];
	__shared__ float b[TILE][TILE];

	float cij = 0.0;
	for(int k=0; k<CEIL(N, TILE); k++) {
		// Copy the kth tile on the horizontal strip from A
		if(x<N && TILE*k + threadIdx.y < N)
			a[threadIdx.x][threadIdx.y] = d_a[x*N + TILE*k + threadIdx.y];
		else
			a[threadIdx.x][threadIdx.y] = 0.0;

		// Copy the kth tile on the vertical strip from B
		if(y<N && TILE*k + threadIdx.x < N)
			b[threadIdx.x][threadIdx.y] = d_b[(TILE*k + threadIdx.x)*N + y];
		else
			b[threadIdx.x][threadIdx.y] = 0.0;

		// Wait for all elements to be copied
		__syncthreads();

		// Do all operations related to these tiles before moving to next tile
		for(int kk=0; kk<TILE; kk++)
			cij += a[threadIdx.x][kk] * b[kk][threadIdx.y];

		// Wait before copying next tile
		__syncthreads();
	}

	if(x < N && y < N)
		d_c[x*N + y] = cij;
}

template <class T>
void testSolution(T *h_a, T *h_b, T *h_c, float precision=0.0) {

	int errors = 0;
	for(int i=0; i<N; i++)
		for(int j=0; j<N; j++) {

			float exp = 0.0, act;
			for(int k=0; k<N; k++)
				exp += h_a[i*N + k] * h_b[k*N + j];
			act = h_c[i*N + j];

			if(abs(act-exp) / (max(exp, precision)) > precision) {
				
				errors++;
				if(errors <= 10)
					printf("Test failed at index : (%d, %d) [Expected: %10.2f | Got: %10.2f]\n", 
						i, j, exp, act);
			}
		}

	if(errors)
		printf("\n%d Tests failed!\n\n", errors);
	else
		printf("All tests passed !\n\n");
}

int main() {

	float *h_a, *h_b, *h_c;
	float *d_a, *d_b, *d_c;

	// Allocate host memory
	h_a = new float[N*N];
	h_b = new float[N*N];
	h_c = new float[N*N];

	printf("\nSize of matrices : %d x %d\n\n", N, N);

	srand(time(0));
	for(int i=0; i<N; i++)
		for(int j=0; j<N; j++) {
			h_a[i*N + j] = (rand()%N) *1.0/ (rand()%N +1);
			h_b[i*N + j] = (rand()%N) *1.0/ (rand()%N +1);
		}

	// Allocate memory on device
	hipMalloc((void**)&d_a, N*N*sizeof(float));
	hipMalloc((void**)&d_b, N*N*sizeof(float));
	hipMalloc((void**)&d_c, N*N*sizeof(float));

	//Copy data into device memory
	hipMemcpy(d_a, h_a, N*N*sizeof(float), hipMemcpyHostToDevice);
	hipMemcpy(d_b, h_b, N*N*sizeof(float), hipMemcpyHostToDevice);

	// Kernel call
	dim3 grid(CEIL(N, 32), CEIL(N, 32), 1);
	dim3 block(32, 32, 1);

	multiply <<<grid, block>>> (d_a, d_b, d_c);
	hipDeviceSynchronize();

	// Copy data back to host
	hipMemcpy(h_c, d_c, N*N*sizeof(float), hipMemcpyDeviceToHost);

	// Free device memory
	hipFree(d_a);
	hipFree(d_b);
	hipFree(d_c);

	testSolution(h_a, h_b, h_c, 1e-3); //Tolerates 0.1% relative error

	// Free host memory
	delete[] h_a, h_b, h_c;
}
	.text
	.file	"matrixTileMultiplication.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z23__device_stub__multiplyPfS_S_ # -- Begin function _Z23__device_stub__multiplyPfS_S_
	.type	_Z23__device_stub__multiplyPfS_S_,@function
_Z23__device_stub__multiplyPfS_S_:      # @_Z23__device_stub__multiplyPfS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8multiplyPfS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z23__device_stub__multiplyPfS_S_, .Lfunc_end0-_Z23__device_stub__multiplyPfS_S_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI1_0:
	.long	0x3a83126f                      # float 0.00100000005
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$4000000, %edi                  # imm = 0x3D0900
	callq	_Znam
	movq	%rax, %rbx
	movl	$4000000, %edi                  # imm = 0x3D0900
	callq	_Znam
	movq	%rax, %r14
	movl	$4000000, %edi                  # imm = 0x3D0900
	callq	_Znam
	movq	%rax, 40(%rsp)                  # 8-byte Spill
	xorl	%r12d, %r12d
	movl	$.L.str, %edi
	movl	$1000, %esi                     # imm = 0x3E8
	movl	$1000, %edx                     # imm = 0x3E8
	xorl	%eax, %eax
	callq	printf
	xorl	%edi, %edi
	callq	time
	movl	%eax, %edi
	callq	srand
	movl	$4000, %r13d                    # imm = 0xFA0
	movq	%rbx, %rbp
	movq	%r14, 48(%rsp)                  # 8-byte Spill
.LBB1_1:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_2 Depth 2
	xorl	%r15d, %r15d
.LBB1_2:                                #   Parent Loop BB1_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	cltq
	imulq	$274877907, %rax, %rcx          # imm = 0x10624DD3
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$38, %rcx
	addl	%edx, %ecx
	imull	$1000, %ecx, %ecx               # imm = 0x3E8
	subl	%ecx, %eax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%eax, %xmm0
	movsd	%xmm0, 8(%rsp)                  # 8-byte Spill
	callq	rand
	cltq
	imulq	$274877907, %rax, %rcx          # imm = 0x10624DD3
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$38, %rcx
	addl	%edx, %ecx
	imull	$1000, %ecx, %ecx               # imm = 0x3E8
	negl	%ecx
	addl	%ecx, %eax
	incl	%eax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%eax, %xmm0
	movsd	8(%rsp), %xmm1                  # 8-byte Reload
                                        # xmm1 = mem[0],zero
	divsd	%xmm0, %xmm1
	xorps	%xmm0, %xmm0
	cvtsd2ss	%xmm1, %xmm0
	movss	%xmm0, (%rbp,%r15,4)
	callq	rand
	cltq
	imulq	$274877907, %rax, %rcx          # imm = 0x10624DD3
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$38, %rcx
	addl	%edx, %ecx
	imull	$1000, %ecx, %ecx               # imm = 0x3E8
	subl	%ecx, %eax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%eax, %xmm0
	movsd	%xmm0, 8(%rsp)                  # 8-byte Spill
	callq	rand
	cltq
	imulq	$274877907, %rax, %rcx          # imm = 0x10624DD3
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$38, %rcx
	addl	%edx, %ecx
	imull	$1000, %ecx, %ecx               # imm = 0x3E8
	negl	%ecx
	addl	%ecx, %eax
	incl	%eax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%eax, %xmm0
	movsd	8(%rsp), %xmm1                  # 8-byte Reload
                                        # xmm1 = mem[0],zero
	divsd	%xmm0, %xmm1
	xorps	%xmm0, %xmm0
	cvtsd2ss	%xmm1, %xmm0
	movss	%xmm0, (%r14,%r15,4)
	incq	%r15
	cmpq	$1000, %r15                     # imm = 0x3E8
	jne	.LBB1_2
# %bb.3:                                #   in Loop: Header=BB1_1 Depth=1
	incq	%r12
	addq	%r13, %r14
	addq	%r13, %rbp
	cmpq	$1000, %r12                     # imm = 0x3E8
	jne	.LBB1_1
# %bb.4:
	leaq	32(%rsp), %r12
	movl	$4000000, %esi                  # imm = 0x3D0900
	movq	%r12, %rdi
	callq	hipMalloc
	leaq	24(%rsp), %r13
	movl	$4000000, %esi                  # imm = 0x3D0900
	movq	%r13, %rdi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movl	$4000000, %esi                  # imm = 0x3D0900
	callq	hipMalloc
	movq	(%r12), %rdi
	movl	$4000000, %edx                  # imm = 0x3D0900
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r13), %rdi
	movl	$4000000, %edx                  # imm = 0x3D0900
	movq	48(%rsp), %r14                  # 8-byte Reload
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$137438953504, %rdi             # imm = 0x2000000020
	movl	$1, %esi
	movq	%rdi, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_6
# %bb.5:
	movq	32(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdx
	callq	_Z23__device_stub__multiplyPfS_S_
.LBB1_6:
	callq	hipDeviceSynchronize
	movq	16(%rsp), %rsi
	movl	$4000000, %edx                  # imm = 0x3D0900
	movq	40(%rsp), %r15                  # 8-byte Reload
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movss	.LCPI1_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	movq	%rbx, %rdi
	movq	%r14, %rsi
	movq	%r15, %rdx
	callq	_Z12testSolutionIfEvPT_S1_S1_f
	movq	%rbx, %rdi
	callq	_ZdaPv
	xorl	%eax, %eax
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function _Z12testSolutionIfEvPT_S1_S1_f
.LCPI2_0:
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.section	.text._Z12testSolutionIfEvPT_S1_S1_f,"axG",@progbits,_Z12testSolutionIfEvPT_S1_S1_f,comdat
	.weak	_Z12testSolutionIfEvPT_S1_S1_f
	.type	_Z12testSolutionIfEvPT_S1_S1_f,@function
_Z12testSolutionIfEvPT_S1_S1_f:         # @_Z12testSolutionIfEvPT_S1_S1_f
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movaps	%xmm0, %xmm4
	movq	%rdx, 16(%rsp)                  # 8-byte Spill
	movq	%rsi, 8(%rsp)                   # 8-byte Spill
	movq	%rdi, %r15
	xorl	%r12d, %r12d
	movaps	.LCPI2_0(%rip), %xmm5           # xmm5 = [NaN,NaN,NaN,NaN]
	xorl	%esi, %esi
	movss	%xmm0, 4(%rsp)                  # 4-byte Spill
.LBB2_1:                                # %.preheader32
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_2 Depth 2
                                        #       Child Loop BB2_3 Depth 3
	imulq	$4000, %r12, %rbp               # imm = 0xFA0
	addq	16(%rsp), %rbp                  # 8-byte Folded Reload
	movq	8(%rsp), %r14                   # 8-byte Reload
	xorl	%r13d, %r13d
.LBB2_2:                                # %.preheader
                                        #   Parent Loop BB2_1 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB2_3 Depth 3
	xorps	%xmm0, %xmm0
	movq	%r14, %rax
	xorl	%ecx, %ecx
.LBB2_3:                                #   Parent Loop BB2_1 Depth=1
                                        #     Parent Loop BB2_2 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movss	(%r15,%rcx,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	mulss	(%rax), %xmm1
	addss	%xmm1, %xmm0
	incq	%rcx
	addq	$4000, %rax                     # imm = 0xFA0
	cmpq	$1000, %rcx                     # imm = 0x3E8
	jne	.LBB2_3
# %bb.4:                                #   in Loop: Header=BB2_2 Depth=2
	movss	(%rbp,%r13,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	movaps	%xmm1, %xmm2
	subss	%xmm0, %xmm2
	andps	%xmm5, %xmm2
	movaps	%xmm4, %xmm3
	maxss	%xmm0, %xmm3
	divss	%xmm3, %xmm2
	ucomiss	%xmm4, %xmm2
	jbe	.LBB2_8
# %bb.5:                                #   in Loop: Header=BB2_2 Depth=2
	leal	1(%rsi), %ebx
	cmpl	$9, %esi
	jg	.LBB2_7
# %bb.6:                                #   in Loop: Header=BB2_2 Depth=2
	cvtss2sd	%xmm0, %xmm0
	cvtss2sd	%xmm1, %xmm1
	movl	$.L.str.1, %edi
	movl	%r12d, %esi
	movl	%r13d, %edx
	movb	$2, %al
	callq	printf
	movaps	.LCPI2_0(%rip), %xmm5           # xmm5 = [NaN,NaN,NaN,NaN]
	movss	4(%rsp), %xmm4                  # 4-byte Reload
                                        # xmm4 = mem[0],zero,zero,zero
.LBB2_7:                                #   in Loop: Header=BB2_2 Depth=2
	movl	%ebx, %esi
.LBB2_8:                                #   in Loop: Header=BB2_2 Depth=2
	incq	%r13
	addq	$4, %r14
	cmpq	$1000, %r13                     # imm = 0x3E8
	jne	.LBB2_2
# %bb.9:                                #   in Loop: Header=BB2_1 Depth=1
	incq	%r12
	addq	$4000, %r15                     # imm = 0xFA0
	cmpq	$1000, %r12                     # imm = 0x3E8
	jne	.LBB2_1
# %bb.10:
	testl	%esi, %esi
	je	.LBB2_12
# %bb.11:
	movl	$.L.str.2, %edi
                                        # kill: def $esi killed $esi killed $rsi
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	printf                          # TAILCALL
.LBB2_12:
	.cfi_def_cfa_offset 80
	movl	$.Lstr, %edi
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	puts@PLT                        # TAILCALL
.Lfunc_end2:
	.size	_Z12testSolutionIfEvPT_S1_S1_f, .Lfunc_end2-_Z12testSolutionIfEvPT_S1_S1_f
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8multiplyPfS_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z8multiplyPfS_S_,@object       # @_Z8multiplyPfS_S_
	.section	.rodata,"a",@progbits
	.globl	_Z8multiplyPfS_S_
	.p2align	3, 0x0
_Z8multiplyPfS_S_:
	.quad	_Z23__device_stub__multiplyPfS_S_
	.size	_Z8multiplyPfS_S_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"\nSize of matrices : %d x %d\n\n"
	.size	.L.str, 30

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Test failed at index : (%d, %d) [Expected: %10.2f | Got: %10.2f]\n"
	.size	.L.str.1, 66

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"\n%d Tests failed!\n\n"
	.size	.L.str.2, 20

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z8multiplyPfS_S_"
	.size	.L__unnamed_1, 18

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"All tests passed !\n"
	.size	.Lstr, 20

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z23__device_stub__multiplyPfS_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z8multiplyPfS_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z8multiplyPfS_S_       ; -- Begin function _Z8multiplyPfS_S_
	.globl	_Z8multiplyPfS_S_
	.p2align	8
	.type	_Z8multiplyPfS_S_,@function
_Z8multiplyPfS_S_:                      ; @_Z8multiplyPfS_S_
; %bb.0:
	s_load_b32 s8, s[0:1], 0x24
	v_bfe_u32 v1, v0, 10, 10
	v_and_b32_e32 v0, 0x3ff, v0
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x10
	v_lshlrev_b32_e32 v6, 2, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_or_b32_e32 v8, 0x1000, v6
	s_waitcnt lgkmcnt(0)
	s_and_b32 s1, s8, 0xffff
	s_lshr_b32 s0, s8, 16
	v_mad_u64_u32 v[4:5], null, s14, s1, v[0:1]
	v_mov_b32_e32 v5, 0
	v_mad_u64_u32 v[2:3], null, s15, s0, v[1:2]
	v_lshlrev_b32_e32 v7, 7, v0
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, 0x3e8, v4
	v_add_nc_u32_e32 v9, v7, v6
	v_mul_lo_u32 v6, 0x3e8, v4
	v_mov_b32_e32 v4, 0
	v_cmp_gt_i32_e64 s0, 0x3e8, v2
	v_add_nc_u32_e32 v10, v8, v7
.LBB0_1:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_10 Depth 2
	v_mov_b32_e32 v3, 0
	s_and_saveexec_b32 s9, vcc_lo
	s_cbranch_execz .LBB0_5
; %bb.2:                                ;   in Loop: Header=BB0_1 Depth=1
	v_lshl_add_u32 v11, s8, 5, v1
	v_mov_b32_e32 v3, 0
	s_mov_b32 s10, exec_lo
	s_delay_alu instid0(VALU_DEP_2)
	v_cmpx_gt_u32_e32 0x3e8, v11
	s_cbranch_execz .LBB0_4
; %bb.3:                                ;   in Loop: Header=BB0_1 Depth=1
	v_add_nc_u32_e32 v3, v11, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[3:4]
	v_add_co_u32 v11, s1, s4, v11
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v12, s1, s5, v12, s1
	global_load_b32 v3, v[11:12], off
.LBB0_4:                                ; %Flow54
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s10
.LBB0_5:                                ;   in Loop: Header=BB0_1 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s9
	v_mov_b32_e32 v11, 0
	s_waitcnt vmcnt(0)
	ds_store_b32 v9, v3
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB0_9
; %bb.6:                                ;   in Loop: Header=BB0_1 Depth=1
	v_lshl_add_u32 v3, s8, 5, v0
	v_mov_b32_e32 v11, 0
	s_mov_b32 s10, exec_lo
	s_delay_alu instid0(VALU_DEP_2)
	v_cmpx_gt_u32_e32 0x3e8, v3
	s_cbranch_execz .LBB0_8
; %bb.7:                                ;   in Loop: Header=BB0_1 Depth=1
	v_mad_u64_u32 v[11:12], null, 0x3e8, v3, v[2:3]
	v_mov_b32_e32 v12, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[11:12]
	v_add_co_u32 v11, s1, s6, v11
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v12, s1, s7, v12, s1
	global_load_b32 v11, v[11:12], off
.LBB0_8:                                ; %Flow
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s10
.LBB0_9:                                ;   in Loop: Header=BB0_1 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s9
	v_mov_b32_e32 v3, v8
	s_mov_b32 s1, 0
	s_waitcnt vmcnt(0)
	ds_store_b32 v10, v11
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB0_10:                               ;   Parent Loop BB0_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_nc_u32_e32 v11, s1, v7
	s_add_i32 s1, s1, 4
	ds_load_b32 v12, v3
	ds_load_b32 v11, v11
	v_add_nc_u32_e32 v3, 0x80, v3
	s_cmpk_eq_i32 s1, 0x80
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v5, v11, v12
	s_cbranch_scc0 .LBB0_10
; %bb.11:                               ;   in Loop: Header=BB0_1 Depth=1
	s_add_i32 s8, s8, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s8, 32
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB0_1
; %bb.12:
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_14
; %bb.13:
	v_add_nc_u32_e32 v0, v6, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_store_b32 v[0:1], v5, off
.LBB0_14:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8multiplyPfS_S_
		.amdhsa_group_segment_fixed_size 8192
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 13
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z8multiplyPfS_S_, .Lfunc_end0-_Z8multiplyPfS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 560
; NumSgprs: 18
; NumVgprs: 13
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 8192 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 13
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 8192
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z8multiplyPfS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z8multiplyPfS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     13
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
