/*
152096 - William Matheus
Friendly Numbers
Programacao Paralela e Distribuida
CUDA - 2019/2 - UPF
Programa 2
*/


#include <stdio.h>
#include <cuda.h>


__device__ void gcd ( int a, int b, int *result){
	int c, resto;	
	while ( a != 0 ) {
     	c = a; 
     	a = b % a;
		b = c;
	}
    *result = b;
}


__global__ void numDem(long int *device_num, long int *device_den, long int start, long int end, int size, int inc)
{
	int i = blockIdx.x * blockDim.x + threadIdx.x + inc;
	int result;
	long int factor, ii, sum, done, n;

	if (i < size) {
		ii = i - start;
		sum = 1 + i;
		done = i;
		factor = 2;
		while (factor < done) {
			if ((i % factor) == 0) {
				sum += (factor + (i / factor));
				//doneFactor(i, factor, &done);
				if ((done = i / factor) == factor)
					sum -= factor;
			}
			factor++;
		}
		device_num[ii] = sum;
		device_den[ii] = i;
	 	gcd(device_num[ii], device_den[ii], &result);
		n = result;
		device_num[ii] /= n;
		device_den[ii] /= n;
	}
}

__global__ void sum(long int* device_num, long int* device_den, long int* device_vet, int size, int x)
{
	int i = blockIdx.x * blockDim.x + threadIdx.x + x;
	int j;

	if (i < size) {
		for (j = i + 1; j < size; j++) {
			if ((device_num[i] == device_num[j]) && (device_den[i] == device_den[j]))
				device_vet[i]++;
		}
	}
}

void friendly_numbers(long int start, long int end) {
	cudaSetDevice(0);


	int deviceId;
	int number_grid, c=0, i;
	long int *device_num, *device_den, *device_vet;

	struct cudaDeviceProp prop;

	cudaGetDevice(&deviceId);
	cudaGetDeviceProperties(&prop, deviceId);


	long int last = end - start + 1;
	size_t size = last * sizeof(long int);

	int nBlocks = 4*((prop.maxThreadsPerMultiProcessor * prop.multiProcessorCount)/prop.maxThreadsPerBlock);	
	int threads = prop.maxThreadsPerBlock;

	number_grid = last / (nBlocks * threads)+1;

	long int *num;
	long int *den;
	long int *vet;

	num = (long int*) malloc(size);
	den = (long int*) malloc(size);
	vet = (long int*) malloc(size);

	cudaMalloc((void**)&device_num, size);
	cudaMalloc((void**)&device_den, size);
	cudaMalloc((void**)&device_vet, size);
	
	for (i = 0; i < last; i++) {
		vet[i] = 0;
	}

	cudaMemcpy(device_num, num, size, cudaMemcpyHostToDevice);
	cudaMemcpy(device_den, den, size, cudaMemcpyHostToDevice);
	cudaMemcpy(device_vet, vet, size, cudaMemcpyHostToDevice);

	int x = 0;

	for (i = 0; i < number_grid; i++) {
		numDem<<<nBlocks, threads>>>(device_num, device_den, start, end, last, x);
		x += nBlocks * threads;
	}
	
	x = 0;

	for (i = 0; i < number_grid; i++) {
		sum<<<nBlocks, threads>>>(device_num, device_den, device_vet, last, x);
		x += nBlocks * threads;;
	}

	cudaMemcpy(vet, device_vet, size, cudaMemcpyDeviceToHost);

	for (i = 0; i < last; i++) {
		c += vet[i];
	}

	printf("Found %d pairs of mutually friendly numbers\n", c);

	free(num);
	free(den);
	free(vet);

	cudaFree(device_num);
	cudaFree(device_den);
	cudaFree(device_vet);
}

int main(int argc, char **argv) {
	long int start;
	long int end;

	if (argc != 3){
		printf("Wrong number of arguments\n");
		return EXIT_FAILURE;
	}

	start = atoi(argv[1]);
	end = atoi(argv[2]);

	printf("Number %ld to %ld\n", start, end);
	friendly_numbers(start, end);

	return EXIT_SUCCESS;
}

	.file	"tmpxft_0037348f_00000000-6_programa2.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2032:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2032:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z3gcdiiPi
	.type	_Z3gcdiiPi, @function
_Z3gcdiiPi:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2027:
	.size	_Z3gcdiiPi, .-_Z3gcdiiPi
	.globl	_Z31__device_stub__Z6numDemPlS_lliiPlS_llii
	.type	_Z31__device_stub__Z6numDemPlS_lliiPlS_llii, @function
_Z31__device_stub__Z6numDemPlS_lliiPlS_llii:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movl	%r9d, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L4
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z6numDemPlS_llii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L4:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L6
	call	__stack_chk_fail@PLT
.L6:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z31__device_stub__Z6numDemPlS_lliiPlS_llii, .-_Z31__device_stub__Z6numDemPlS_lliiPlS_llii
	.globl	_Z6numDemPlS_llii
	.type	_Z6numDemPlS_llii, @function
_Z6numDemPlS_llii:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z31__device_stub__Z6numDemPlS_lliiPlS_llii
	.cfi_endproc
.LFE2055:
	.size	_Z6numDemPlS_llii, .-_Z6numDemPlS_llii
	.globl	_Z28__device_stub__Z3sumPlS_S_iiPlS_S_ii
	.type	_Z28__device_stub__Z3sumPlS_S_iiPlS_S_ii, @function
_Z28__device_stub__Z3sumPlS_S_iiPlS_S_ii:
.LFB2056:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L10
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z3sumPlS_S_ii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L10:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L12
	call	__stack_chk_fail@PLT
.L12:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2056:
	.size	_Z28__device_stub__Z3sumPlS_S_iiPlS_S_ii, .-_Z28__device_stub__Z3sumPlS_S_iiPlS_S_ii
	.globl	_Z3sumPlS_S_ii
	.type	_Z3sumPlS_S_ii, @function
_Z3sumPlS_S_ii:
.LFB2057:
	.cfi_startproc
	endbr64
	jmp	_Z28__device_stub__Z3sumPlS_S_iiPlS_S_ii
	.cfi_endproc
.LFE2057:
	.size	_Z3sumPlS_S_ii, .-_Z3sumPlS_S_ii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Found %d pairs of mutually friendly numbers\n"
	.text
	.globl	_Z16friendly_numbersll
	.type	_Z16friendly_numbersll, @function
_Z16friendly_numbersll:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rdi, %r15
	xorl	%edi, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$1176, %rsp
	.cfi_def_cfa_offset 1232
	movq	%rsi, 56(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 1160(%rsp)
	xorl	%eax, %eax
	call	cudaSetDevice@PLT
	leaq	76(%rsp), %rdi
	call	cudaGetDevice@PLT
	movl	76(%rsp), %esi
	leaq	128(%rsp), %rdi
	call	cudaGetDeviceProperties_v2@PLT
	movq	56(%rsp), %rax
	movl	448(%rsp), %ebp
	subq	%r15, %rax
	movl	%ebp, %r13d
	incq	%rax
	movq	%rax, 16(%rsp)
	salq	$3, %rax
	movq	%rax, 8(%rsp)
	movl	752(%rsp), %eax
	imull	516(%rsp), %eax
	movq	8(%rsp), %rdi
	cltd
	idivl	%ebp
	leal	0(,%rax,4), %ebx
	movq	16(%rsp), %rax
	imull	%ebx, %r13d
	cqto
	movslq	%r13d, %rcx
	idivq	%rcx
	incl	%eax
	movl	%eax, 36(%rsp)
	call	malloc@PLT
	movq	8(%rsp), %rdi
	movq	%rax, 40(%rsp)
	call	malloc@PLT
	movq	8(%rsp), %rdi
	movq	%rax, 48(%rsp)
	call	malloc@PLT
	movq	8(%rsp), %rsi
	leaq	80(%rsp), %rdi
	movq	%rax, 24(%rsp)
	call	cudaMalloc@PLT
	movq	8(%rsp), %rsi
	leaq	88(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rsi
	leaq	96(%rsp), %rdi
	call	cudaMalloc@PLT
	xorl	%eax, %eax
.L16:
	cmpq	%rax, 16(%rsp)
	jle	.L28
	movq	24(%rsp), %rdx
	xorl	%ecx, %ecx
	movq	%rcx, (%rdx,%rax,8)
	incq	%rax
	jmp	.L16
.L28:
	movq	8(%rsp), %rdx
	movq	40(%rsp), %rsi
	movl	$1, %ecx
	xorl	%r12d, %r12d
	movabsq	$4294967297, %r14
	movq	80(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdx
	movq	48(%rsp), %rsi
	movl	$1, %ecx
	movq	88(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdx
	movq	24(%rsp), %rsi
	movl	$1, %ecx
	movq	96(%rsp), %rdi
	call	cudaMemcpy@PLT
	xorl	%eax, %eax
	movl	%eax, 32(%rsp)
.L18:
	movl	36(%rsp), %eax
	cmpl	%eax, %r12d
	jge	.L29
	movq	%r14, 120(%rsp)
	movl	124(%rsp), %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r14, 108(%rsp)
	movl	112(%rsp), %esi
	movl	%ebp, 116(%rsp)
	movq	116(%rsp), %rdx
	movl	%ebx, 104(%rsp)
	movq	104(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L19
	movl	32(%rsp), %r9d
	movl	16(%rsp), %r8d
	movq	%r15, %rdx
	movq	56(%rsp), %rcx
	movq	88(%rsp), %rsi
	movq	80(%rsp), %rdi
	call	_Z31__device_stub__Z6numDemPlS_lliiPlS_llii
.L19:
	addl	%r13d, 32(%rsp)
	incl	%r12d
	jmp	.L18
.L29:
	movabsq	$4294967297, %r15
	xorl	%r14d, %r14d
	xorl	%r12d, %r12d
.L21:
	movl	36(%rsp), %eax
	cmpl	%eax, %r12d
	jge	.L30
	movq	%r15, 120(%rsp)
	movl	124(%rsp), %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r15, 108(%rsp)
	movl	112(%rsp), %esi
	movl	%ebp, 116(%rsp)
	movq	116(%rsp), %rdx
	movl	%ebx, 104(%rsp)
	movq	104(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L22
	movl	16(%rsp), %ecx
	movq	96(%rsp), %rdx
	movl	%r14d, %r8d
	movq	88(%rsp), %rsi
	movq	80(%rsp), %rdi
	call	_Z28__device_stub__Z3sumPlS_S_iiPlS_S_ii
.L22:
	addl	%r13d, %r14d
	incl	%r12d
	jmp	.L21
.L30:
	movq	8(%rsp), %rdx
	movq	96(%rsp), %rsi
	movl	$2, %ecx
	movq	24(%rsp), %rdi
	call	cudaMemcpy@PLT
	xorl	%eax, %eax
	xorl	%edx, %edx
.L24:
	cmpq	%rax, 16(%rsp)
	jle	.L31
	movq	24(%rsp), %rbx
	addl	(%rbx,%rax,8), %edx
	incq	%rax
	jmp	.L24
.L31:
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	40(%rsp), %rdi
	call	free@PLT
	movq	48(%rsp), %rdi
	call	free@PLT
	movq	24(%rsp), %rdi
	call	free@PLT
	movq	80(%rsp), %rdi
	call	cudaFree@PLT
	movq	88(%rsp), %rdi
	call	cudaFree@PLT
	movq	96(%rsp), %rdi
	call	cudaFree@PLT
	movq	1160(%rsp), %rax
	subq	%fs:40, %rax
	je	.L26
	call	__stack_chk_fail@PLT
.L26:
	addq	$1176, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z16friendly_numbersll, .-_Z16friendly_numbersll
	.section	.rodata.str1.1
.LC1:
	.string	"Wrong number of arguments\n"
.LC2:
	.string	"Number %ld to %ld\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	pushq	%rcx
	.cfi_def_cfa_offset 32
	cmpl	$3, %edi
	je	.L33
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %eax
	jmp	.L32
.L33:
	movq	8(%rsi), %rdi
	movq	%rsi, %rbp
	call	atoi@PLT
	movq	16(%rbp), %rdi
	movslq	%eax, %rbx
	call	atoi@PLT
	movq	%rbx, %rdx
	movl	$2, %edi
	leaq	.LC2(%rip), %rsi
	movslq	%eax, %rbp
	xorl	%eax, %eax
	movq	%rbp, %rcx
	call	__printf_chk@PLT
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_Z16friendly_numbersll
	xorl	%eax, %eax
.L32:
	popq	%rdx
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	main, .-main
	.section	.rodata.str1.1
.LC3:
	.string	"_Z3sumPlS_S_ii"
.LC4:
	.string	"_Z6numDemPlS_llii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2059:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z3sumPlS_S_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC4(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z6numDemPlS_llii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2059:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/*
152096 - William Matheus
Friendly Numbers
Programacao Paralela e Distribuida
CUDA - 2019/2 - UPF
Programa 2
*/


#include <stdio.h>
#include <hip/hip_runtime.h>


__device__ void gcd ( int a, int b, int *result){
	int c, resto;	
	while ( a != 0 ) {
     	c = a; 
     	a = b % a;
		b = c;
	}
    *result = b;
}


__global__ void numDem(long int *device_num, long int *device_den, long int start, long int end, int size, int inc)
{
	int i = blockIdx.x * blockDim.x + threadIdx.x + inc;
	int result;
	long int factor, ii, sum, done, n;

	if (i < size) {
		ii = i - start;
		sum = 1 + i;
		done = i;
		factor = 2;
		while (factor < done) {
			if ((i % factor) == 0) {
				sum += (factor + (i / factor));
				//doneFactor(i, factor, &done);
				if ((done = i / factor) == factor)
					sum -= factor;
			}
			factor++;
		}
		device_num[ii] = sum;
		device_den[ii] = i;
	 	gcd(device_num[ii], device_den[ii], &result);
		n = result;
		device_num[ii] /= n;
		device_den[ii] /= n;
	}
}

__global__ void sum(long int* device_num, long int* device_den, long int* device_vet, int size, int x)
{
	int i = blockIdx.x * blockDim.x + threadIdx.x + x;
	int j;

	if (i < size) {
		for (j = i + 1; j < size; j++) {
			if ((device_num[i] == device_num[j]) && (device_den[i] == device_den[j]))
				device_vet[i]++;
		}
	}
}

void friendly_numbers(long int start, long int end) {
	hipSetDevice(0);


	int deviceId;
	int number_grid, c=0, i;
	long int *device_num, *device_den, *device_vet;

	struct hipDeviceProp_t prop;

	hipGetDevice(&deviceId);
	hipGetDeviceProperties(&prop, deviceId);


	long int last = end - start + 1;
	size_t size = last * sizeof(long int);

	int nBlocks = 4*((prop.maxThreadsPerMultiProcessor * prop.multiProcessorCount)/prop.maxThreadsPerBlock);	
	int threads = prop.maxThreadsPerBlock;

	number_grid = last / (nBlocks * threads)+1;

	long int *num;
	long int *den;
	long int *vet;

	num = (long int*) malloc(size);
	den = (long int*) malloc(size);
	vet = (long int*) malloc(size);

	hipMalloc((void**)&device_num, size);
	hipMalloc((void**)&device_den, size);
	hipMalloc((void**)&device_vet, size);
	
	for (i = 0; i < last; i++) {
		vet[i] = 0;
	}

	hipMemcpy(device_num, num, size, hipMemcpyHostToDevice);
	hipMemcpy(device_den, den, size, hipMemcpyHostToDevice);
	hipMemcpy(device_vet, vet, size, hipMemcpyHostToDevice);

	int x = 0;

	for (i = 0; i < number_grid; i++) {
		numDem<<<nBlocks, threads>>>(device_num, device_den, start, end, last, x);
		x += nBlocks * threads;
	}
	
	x = 0;

	for (i = 0; i < number_grid; i++) {
		sum<<<nBlocks, threads>>>(device_num, device_den, device_vet, last, x);
		x += nBlocks * threads;;
	}

	hipMemcpy(vet, device_vet, size, hipMemcpyDeviceToHost);

	for (i = 0; i < last; i++) {
		c += vet[i];
	}

	printf("Found %d pairs of mutually friendly numbers\n", c);

	free(num);
	free(den);
	free(vet);

	hipFree(device_num);
	hipFree(device_den);
	hipFree(device_vet);
}

int main(int argc, char **argv) {
	long int start;
	long int end;

	if (argc != 3){
		printf("Wrong number of arguments\n");
		return EXIT_FAILURE;
	}

	start = atoi(argv[1]);
	end = atoi(argv[2]);

	printf("Number %ld to %ld\n", start, end);
	friendly_numbers(start, end);

	return EXIT_SUCCESS;
}

	.text
	.file	"programa2.hip"
	.globl	_Z21__device_stub__numDemPlS_llii # -- Begin function _Z21__device_stub__numDemPlS_llii
	.type	_Z21__device_stub__numDemPlS_llii,@function
_Z21__device_stub__numDemPlS_llii:      # @_Z21__device_stub__numDemPlS_llii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6numDemPlS_llii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z21__device_stub__numDemPlS_llii, .Lfunc_end0-_Z21__device_stub__numDemPlS_llii
	.cfi_endproc
                                        # -- End function
	.globl	_Z18__device_stub__sumPlS_S_ii  # -- Begin function _Z18__device_stub__sumPlS_S_ii
	.type	_Z18__device_stub__sumPlS_S_ii,@function
_Z18__device_stub__sumPlS_S_ii:         # @_Z18__device_stub__sumPlS_S_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	movq	%rsp, %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z3sumPlS_S_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z18__device_stub__sumPlS_S_ii, .Lfunc_end1-_Z18__device_stub__sumPlS_S_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z16friendly_numbersll          # -- Begin function _Z16friendly_numbersll
	.type	_Z16friendly_numbersll,@function
_Z16friendly_numbersll:                 # @_Z16friendly_numbersll
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$1592, %rsp                     # imm = 0x638
	.cfi_def_cfa_offset 1648
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %r15
	movq	%rdi, %r12
	xorl	%edi, %edi
	callq	hipSetDevice
	leaq	116(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipGetDevice
	movl	(%rbx), %esi
	leaq	120(%rsp), %r14
	movq	%r14, %rdi
	callq	hipGetDevicePropertiesR0600
	movq	%r15, 104(%rsp)                 # 8-byte Spill
	movq	%r12, 96(%rsp)                  # 8-byte Spill
	subq	%r12, %r15
	leaq	1(%r15), %rbx
	leaq	8(,%r15,8), %rbp
	movl	320(%r14), %ecx
	movl	388(%r14), %eax
	imull	624(%r14), %eax
	cltd
	idivl	%ecx
	movl	%eax, %r12d
	shll	$2, %r12d
	movl	%r12d, 8(%rsp)                  # 4-byte Spill
	movq	%rcx, 40(%rsp)                  # 8-byte Spill
	imull	%ecx, %r12d
	movslq	%r12d, %rcx
	movq	%rbx, %rax
	cqto
	idivq	%rcx
	movq	%rax, %r14
	movq	%rbp, %rdi
	callq	malloc
	movq	%rax, 56(%rsp)                  # 8-byte Spill
	movq	%rbp, %rdi
	callq	malloc
	movq	%rax, 48(%rsp)                  # 8-byte Spill
	movq	%rbp, %rdi
	callq	malloc
	movq	%rax, %r13
	leaq	32(%rsp), %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	leaq	24(%rsp), %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	movq	%r15, 80(%rsp)                  # 8-byte Spill
	testq	%r15, %r15
	js	.LBB2_2
# %bb.1:                                # %.lr.ph.preheader
	movq	%r13, %rdi
	xorl	%esi, %esi
	movq	%rbp, %rdx
	callq	memset@PLT
.LBB2_2:                                # %._crit_edge
	movq	32(%rsp), %rdi
	movq	56(%rsp), %rsi                  # 8-byte Reload
	movq	%rbp, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rdi
	movq	48(%rsp), %rsi                  # 8-byte Reload
	movq	%rbp, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rdi
	movq	%r13, 88(%rsp)                  # 8-byte Spill
	movq	%r13, %rsi
	movq	%rbp, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	cmpl	$2147483646, %r14d              # imm = 0x7FFFFFFE
	movq	40(%rsp), %rax                  # 8-byte Reload
	ja	.LBB2_12
# %bb.3:                                # %.lr.ph86
	movq	%rbp, 72(%rsp)                  # 8-byte Spill
	movq	%rbx, 64(%rsp)                  # 8-byte Spill
	movl	8(%rsp), %r15d                  # 4-byte Reload
	movq	%r15, 8(%rsp)                   # 8-byte Spill
	btsq	$32, %r15
	movq	%rax, %rbp
	btsq	$32, %rbp
	leal	1(%r14), %ebx
	xorl	%r13d, %r13d
.LBB2_4:                                # =>This Inner Loop Header: Depth=1
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_6
# %bb.5:                                #   in Loop: Header=BB2_4 Depth=1
	movq	32(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	96(%rsp), %rdx                  # 8-byte Reload
	movq	104(%rsp), %rcx                 # 8-byte Reload
	movq	64(%rsp), %r8                   # 8-byte Reload
                                        # kill: def $r8d killed $r8d killed $r8
	movl	%r13d, %r9d
	callq	_Z21__device_stub__numDemPlS_llii
.LBB2_6:                                #   in Loop: Header=BB2_4 Depth=1
	addl	%r12d, %r13d
	decl	%ebx
	jne	.LBB2_4
# %bb.7:                                # %.preheader
	cmpl	$2147483646, %r14d              # imm = 0x7FFFFFFE
	movq	64(%rsp), %rbx                  # 8-byte Reload
	movq	72(%rsp), %rbp                  # 8-byte Reload
	movq	40(%rsp), %r13                  # 8-byte Reload
	ja	.LBB2_12
# %bb.8:                                # %.lr.ph89
	movabsq	$4294967296, %rax               # imm = 0x100000000
	orq	%rax, 8(%rsp)                   # 8-byte Folded Spill
	orq	%rax, %r13
	incl	%r14d
	xorl	%r15d, %r15d
.LBB2_9:                                # =>This Inner Loop Header: Depth=1
	movq	8(%rsp), %rdi                   # 8-byte Reload
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_11
# %bb.10:                               #   in Loop: Header=BB2_9 Depth=1
	movq	32(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdx
	movl	%ebx, %ecx
	movl	%r15d, %r8d
	callq	_Z18__device_stub__sumPlS_S_ii
.LBB2_11:                               #   in Loop: Header=BB2_9 Depth=1
	addl	%r12d, %r15d
	decl	%r14d
	jne	.LBB2_9
.LBB2_12:                               # %._crit_edge90
	movq	16(%rsp), %rsi
	movq	88(%rsp), %r14                  # 8-byte Reload
	movq	%r14, %rdi
	movq	%rbp, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	cmpq	$0, 80(%rsp)                    # 8-byte Folded Reload
	js	.LBB2_13
# %bb.14:                               # %.lr.ph95.preheader
	xorl	%eax, %eax
	xorl	%esi, %esi
.LBB2_15:                               # %.lr.ph95
                                        # =>This Inner Loop Header: Depth=1
	addl	(%r14,%rax,8), %esi
	incq	%rax
	cmpq	%rax, %rbx
	jne	.LBB2_15
	jmp	.LBB2_16
.LBB2_13:
	xorl	%esi, %esi
.LBB2_16:                               # %._crit_edge96
	movl	$.L.str, %edi
	xorl	%eax, %eax
	callq	printf
	movq	56(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	48(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	addq	$1592, %rsp                     # imm = 0x638
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z16friendly_numbersll, .Lfunc_end2-_Z16friendly_numbersll
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	cmpl	$3, %edi
	jne	.LBB3_1
# %bb.2:
	movq	%rsi, %rbx
	movq	8(%rsi), %rdi
	callq	atoi
	movslq	%eax, %r14
	movq	16(%rbx), %rdi
	callq	atoi
	movslq	%eax, %r15
	xorl	%ebx, %ebx
	movl	$.L.str.2, %edi
	movq	%r14, %rsi
	movq	%r15, %rdx
	xorl	%eax, %eax
	callq	printf
	movq	%r14, %rdi
	movq	%r15, %rsi
	callq	_Z16friendly_numbersll
	jmp	.LBB3_3
.LBB3_1:
	movl	$.Lstr, %edi
	callq	puts@PLT
	movl	$1, %ebx
.LBB3_3:
	movl	%ebx, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6numDemPlS_llii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z3sumPlS_S_ii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z6numDemPlS_llii,@object       # @_Z6numDemPlS_llii
	.section	.rodata,"a",@progbits
	.globl	_Z6numDemPlS_llii
	.p2align	3, 0x0
_Z6numDemPlS_llii:
	.quad	_Z21__device_stub__numDemPlS_llii
	.size	_Z6numDemPlS_llii, 8

	.type	_Z3sumPlS_S_ii,@object          # @_Z3sumPlS_S_ii
	.globl	_Z3sumPlS_S_ii
	.p2align	3, 0x0
_Z3sumPlS_S_ii:
	.quad	_Z18__device_stub__sumPlS_S_ii
	.size	_Z3sumPlS_S_ii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Found %d pairs of mutually friendly numbers\n"
	.size	.L.str, 45

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Number %ld to %ld\n"
	.size	.L.str.2, 19

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z6numDemPlS_llii"
	.size	.L__unnamed_1, 18

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z3sumPlS_S_ii"
	.size	.L__unnamed_2, 15

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Wrong number of arguments"
	.size	.Lstr, 26

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__numDemPlS_llii
	.addrsig_sym _Z18__device_stub__sumPlS_S_ii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z6numDemPlS_llii
	.addrsig_sym _Z3sumPlS_S_ii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z6numDemPlS_llii       ; -- Begin function _Z6numDemPlS_llii
	.globl	_Z6numDemPlS_llii
	.p2align	8
	.type	_Z6numDemPlS_llii,@function
_Z6numDemPlS_llii:                      ; @_Z6numDemPlS_llii
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x34
	s_load_b64 s[2:3], s[0:1], 0x20
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s15, s15, s4
	v_add3_u32 v2, s15, s3, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_i32_e32 vcc_lo, s2, v2
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB0_12
; %bb.1:
	v_add_nc_u32_e32 v4, 1, v2
	v_ashrrev_i32_e32 v3, 31, v2
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_2)
	v_ashrrev_i32_e32 v5, 31, v4
	v_cmpx_lt_i32_e32 2, v2
	s_cbranch_execz .LBB0_7
; %bb.2:                                ; %.lr.ph.preheader
	v_dual_mov_b32 v0, v2 :: v_dual_mov_b32 v1, v3
	s_mov_b64 s[4:5], 2
	s_mov_b32 s6, 0
.LBB0_3:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_cvt_f32_u32_e32 v6, s4
	v_cvt_f32_u32_e32 v7, s5
	s_sub_u32 s2, 0, s4
	s_subb_u32 s7, 0, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v6, 0x4f800000, v7
	v_rcp_f32_e32 v6, v6
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v6, 0x5f7ffffc, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v7, 0x2f800000, v6
	v_trunc_f32_e32 v7, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v6, 0xcf800000, v7
	v_cvt_u32_f32_e32 v7, v7
	v_cvt_u32_f32_e32 v6, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v8, s2, v7
	v_mul_hi_u32 v9, s2, v6
	v_mul_lo_u32 v10, s7, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v8, v9, v8
	v_mul_lo_u32 v9, s2, v6
	v_add_nc_u32_e32 v8, v8, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v10, v6, v9
	v_mul_lo_u32 v11, v6, v8
	v_mul_hi_u32 v12, v6, v8
	v_mul_hi_u32 v13, v7, v9
	v_mul_lo_u32 v9, v7, v9
	v_mul_hi_u32 v14, v7, v8
	v_mul_lo_u32 v8, v7, v8
	v_add_co_u32 v10, vcc_lo, v10, v11
	v_add_co_ci_u32_e32 v11, vcc_lo, 0, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v9, vcc_lo, v10, v9
	v_add_co_ci_u32_e32 v9, vcc_lo, v11, v13, vcc_lo
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v14, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v9, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v6, v8
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_hi_u32 v8, s2, v6
	v_mul_lo_u32 v10, s7, v6
	v_mul_lo_u32 v9, s2, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v8, v8, v9
	v_mul_lo_u32 v9, s2, v6
	v_add_nc_u32_e32 v8, v8, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v10, v6, v9
	v_mul_lo_u32 v11, v6, v8
	v_mul_hi_u32 v12, v6, v8
	v_mul_hi_u32 v13, v7, v9
	v_mul_lo_u32 v9, v7, v9
	v_mul_hi_u32 v14, v7, v8
	v_mul_lo_u32 v8, v7, v8
	v_add_co_u32 v10, vcc_lo, v10, v11
	v_add_co_ci_u32_e32 v11, vcc_lo, 0, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v9, vcc_lo, v10, v9
	v_add_co_ci_u32_e32 v9, vcc_lo, v11, v13, vcc_lo
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v14, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v9, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v10, vcc_lo, v6, v8
	v_add_co_ci_u32_e32 v12, vcc_lo, v7, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_hi_u32 v13, v2, v10
	v_mad_u64_u32 v[8:9], null, v3, v10, 0
	v_mad_u64_u32 v[6:7], null, v2, v12, 0
	v_mad_u64_u32 v[10:11], null, v3, v12, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v13, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v6, v8
	v_add_co_ci_u32_e32 v6, vcc_lo, v7, v9, vcc_lo
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v11, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v6, v10
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v10, s5, v8
	v_mad_u64_u32 v[6:7], null, s4, v8, 0
	v_mul_lo_u32 v11, s4, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_co_u32 v6, vcc_lo, v2, v6
	v_add3_u32 v7, v7, v11, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v10, v3, v7
	v_subrev_co_ci_u32_e64 v10, s2, s5, v10, vcc_lo
	v_add_co_u32 v11, s2, v8, 2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v12, s2, 0, v9, s2
	v_sub_co_u32 v13, s2, v6, s4
	v_sub_co_ci_u32_e32 v7, vcc_lo, v3, v7, vcc_lo
	v_subrev_co_ci_u32_e64 v10, s2, 0, v10, s2
	v_cmp_le_u32_e32 vcc_lo, s4, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cmp_eq_u32_e64 s2, s5, v7
	v_cndmask_b32_e64 v13, 0, -1, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s5, v10
	v_cndmask_b32_e64 v14, 0, -1, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s4, v6
	v_cndmask_b32_e64 v6, 0, -1, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s5, v7
	v_cndmask_b32_e64 v15, 0, -1, vcc_lo
	v_cmp_eq_u32_e32 vcc_lo, s5, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v6, v15, v6, s2
	v_cndmask_b32_e32 v10, v14, v13, vcc_lo
	v_add_co_u32 v13, vcc_lo, v8, 1
	v_add_co_ci_u32_e32 v14, vcc_lo, 0, v9, vcc_lo
	v_cmp_ne_u32_e32 vcc_lo, 0, v10
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v7, v14, v12 :: v_dual_cndmask_b32 v10, v13, v11
	v_cmp_ne_u32_e32 vcc_lo, 0, v6
	v_dual_cndmask_b32 v7, v9, v7 :: v_dual_cndmask_b32 v6, v8, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v10, v7, s4
	v_mul_lo_u32 v11, v6, s5
	v_mad_u64_u32 v[8:9], null, v6, s4, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add3_u32 v9, v9, v11, v10
	v_sub_co_u32 v8, vcc_lo, v2, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_co_ci_u32_e32 v9, vcc_lo, v3, v9, vcc_lo
	v_cmpx_eq_u64_e32 0, v[8:9]
; %bb.4:                                ;   in Loop: Header=BB0_3 Depth=1
	v_cmp_eq_u64_e32 vcc_lo, s[4:5], v[6:7]
	v_cndmask_b32_e64 v1, 0, s4, vcc_lo
	v_cndmask_b32_e64 v0, 0, s5, vcc_lo
	v_add_co_u32 v8, vcc_lo, s4, v6
	v_add_co_ci_u32_e32 v9, vcc_lo, s5, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_sub_co_u32 v1, vcc_lo, v4, v1
	v_sub_co_ci_u32_e32 v0, vcc_lo, v5, v0, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, v8, v1
	v_add_co_ci_u32_e32 v5, vcc_lo, v9, v0, vcc_lo
	v_dual_mov_b32 v0, v6 :: v_dual_mov_b32 v1, v7
; %bb.5:                                ;   in Loop: Header=BB0_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	s_add_u32 s4, s4, 1
	s_addc_u32 s5, s5, 0
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ge_i64_e32 vcc_lo, s[4:5], v[0:1]
	s_or_b32 s6, vcc_lo, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s6
	s_cbranch_execnz .LBB0_3
; %bb.6:                                ; %Flow61
	s_or_b32 exec_lo, exec_lo, s6
.LBB0_7:                                ; %Flow62
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s3
	s_clause 0x1
	s_load_b64 s[4:5], s[0:1], 0x10
	s_load_b128 s[0:3], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	v_sub_co_u32 v0, vcc_lo, v2, s4
	v_subrev_co_ci_u32_e32 v1, vcc_lo, s5, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[0:1]
	v_add_co_u32 v6, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	s_mov_b32 s1, 0
	global_store_b64 v[6:7], v[4:5], off
	global_store_b64 v[0:1], v[2:3], off
	global_load_b64 v[4:5], v[6:7], off
	s_mov_b32 s0, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u32_e32 0, v4
	s_cbranch_execz .LBB0_11
; %bb.8:                                ; %.lr.ph.i.preheader
	v_mov_b32_e32 v3, v4
.LBB0_9:                                ; %.lr.ph.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v8, v3
	v_ashrrev_i32_e32 v11, 31, v2
	v_ashrrev_i32_e32 v3, 31, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v2, v11
	v_add_nc_u32_e32 v9, v8, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v2, v2, v11
	v_xor_b32_e32 v3, v9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cvt_f32_u32_e32 v9, v3
	v_sub_nc_u32_e32 v10, 0, v3
	v_rcp_iflag_f32_e32 v9, v9
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v9, 0x4f7ffffe, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v9, v9
	v_mul_lo_u32 v10, v10, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v10, v9, v10
	v_add_nc_u32_e32 v9, v9, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v9, v2, v9
	v_mul_lo_u32 v9, v9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v2, v2, v9
	v_sub_nc_u32_e32 v9, v2, v3
	v_cmp_ge_u32_e32 vcc_lo, v2, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v2, v2, v9, vcc_lo
	v_sub_nc_u32_e32 v9, v2, v3
	v_cmp_ge_u32_e32 vcc_lo, v2, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v2, v2, v9, vcc_lo
	v_xor_b32_e32 v2, v2, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v3, v2, v11
	v_mov_b32_e32 v2, v8
	v_cmp_eq_u32_e32 vcc_lo, 0, v3
	s_or_b32 s1, vcc_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB0_9
; %bb.10:                               ; %_Z3gcdiiPi.exit.loopexit
	s_or_b32 exec_lo, exec_lo, s1
	v_ashrrev_i32_e32 v9, 31, v8
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v2, v8 :: v_dual_mov_b32 v3, v9
.LBB0_11:                               ; %Flow
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v12, v3
	v_mov_b32_e32 v13, v3
	v_add_co_u32 v2, vcc_lo, v2, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, v3, v13, vcc_lo
	v_xor_b32_e32 v14, v2, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v15, v3, v13
	v_cvt_f32_u32_e32 v2, v14
	v_sub_co_u32 v16, vcc_lo, 0, v14
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cvt_f32_u32_e32 v3, v15
	v_sub_co_ci_u32_e32 v17, vcc_lo, 0, v15, vcc_lo
	v_fmamk_f32 v2, v3, 0x4f800000, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v2, v2
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v2, 0x5f7ffffc, v2
	v_mul_f32_e32 v3, 0x2f800000, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_trunc_f32_e32 v3, v3
	v_fmamk_f32 v2, v3, 0xcf800000, v2
	v_cvt_u32_f32_e32 v18, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_u32_f32_e32 v19, v2
	v_mul_lo_u32 v8, v16, v18
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v9, v17, v19
	v_mad_u64_u32 v[2:3], null, v16, v19, 0
	v_add3_u32 v20, v3, v8, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_hi_u32 v21, v19, v2
	v_mad_u64_u32 v[10:11], null, v18, v2, 0
	v_mad_u64_u32 v[8:9], null, v19, v20, 0
	v_mad_u64_u32 v[2:3], null, v18, v20, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v8, vcc_lo, v21, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v8, v10
	v_add_co_ci_u32_e32 v8, vcc_lo, v9, v11, vcc_lo
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v8, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v19, vcc_lo, v19, v2
	v_add_co_ci_u32_e32 v18, vcc_lo, v18, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v8, v17, v19
	v_mad_u64_u32 v[2:3], null, v16, v19, 0
	v_mul_lo_u32 v9, v16, v18
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_hi_u32 v17, v19, v2
	v_mad_u64_u32 v[10:11], null, v18, v2, 0
	v_add3_u32 v16, v3, v9, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mad_u64_u32 v[8:9], null, v19, v16, 0
	v_mad_u64_u32 v[2:3], null, v18, v16, 0
	v_ashrrev_i32_e32 v16, 31, v5
	v_add_co_u32 v8, vcc_lo, v17, v8
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo
	v_add_co_u32 v8, vcc_lo, v8, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e32 v8, vcc_lo, v9, v11, vcc_lo
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v4, vcc_lo, v4, v16
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v16, vcc_lo
	v_add_co_u32 v2, vcc_lo, v8, v2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	v_xor_b32_e32 v10, v4, v16
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v11, vcc_lo, v19, v2
	v_add_co_ci_u32_e32 v17, vcc_lo, v18, v3, vcc_lo
	v_xor_b32_e32 v18, v5, v16
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_hi_u32 v19, v10, v11
	v_mad_u64_u32 v[2:3], null, v10, v17, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mad_u64_u32 v[4:5], null, v18, v11, 0
	v_mad_u64_u32 v[8:9], null, v18, v17, 0
	v_add_co_u32 v2, vcc_lo, v19, v2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, v2, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v3, v5, vcc_lo
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v9, vcc_lo
	v_add_co_u32 v4, vcc_lo, v2, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v3, vcc_lo
	v_mul_lo_u32 v8, v15, v4
	v_mad_u64_u32 v[2:3], null, v14, v4, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v9, v14, v5
	v_sub_co_u32 v2, vcc_lo, v10, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v3, v3, v9, v8
	v_sub_nc_u32_e32 v8, v18, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_sub_co_ci_u32_e64 v8, s0, v8, v15, vcc_lo
	v_add_co_u32 v9, s0, v4, 2
	v_add_co_ci_u32_e64 v10, s0, 0, v5, s0
	v_sub_co_u32 v19, s0, v2, v14
	v_sub_co_ci_u32_e32 v3, vcc_lo, v18, v3, vcc_lo
	v_subrev_co_ci_u32_e64 v8, s0, 0, v8, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_ge_u32_e32 vcc_lo, v19, v14
	v_cmp_eq_u32_e64 s0, v3, v15
	v_cndmask_b32_e64 v18, 0, -1, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_cmp_ge_u32_e32 vcc_lo, v8, v15
	v_cndmask_b32_e64 v19, 0, -1, vcc_lo
	v_cmp_ge_u32_e32 vcc_lo, v2, v14
	v_cndmask_b32_e64 v2, 0, -1, vcc_lo
	v_cmp_ge_u32_e32 vcc_lo, v3, v15
	v_cndmask_b32_e64 v20, 0, -1, vcc_lo
	v_cmp_eq_u32_e32 vcc_lo, v8, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v2, v20, v2, s0
	v_cndmask_b32_e32 v8, v19, v18, vcc_lo
	v_add_co_u32 v18, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v19, vcc_lo, 0, v5, vcc_lo
	v_cmp_ne_u32_e32 vcc_lo, 0, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_dual_cndmask_b32 v3, v19, v10 :: v_dual_cndmask_b32 v8, v18, v9
	v_cmp_ne_u32_e32 vcc_lo, 0, v2
	v_xor_b32_e32 v2, v16, v12
	v_dual_cndmask_b32 v4, v4, v8 :: v_dual_cndmask_b32 v3, v5, v3
	v_xor_b32_e32 v5, v16, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v4, v4, v2
	v_xor_b32_e32 v3, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_co_u32 v2, vcc_lo, v4, v2
	v_sub_co_ci_u32_e32 v3, vcc_lo, v3, v5, vcc_lo
	global_store_b64 v[6:7], v[2:3], off
	global_load_b64 v[2:3], v[0:1], off
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v8, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v2, v8
	v_add_co_ci_u32_e32 v3, vcc_lo, v3, v8, vcc_lo
	v_xor_b32_e32 v9, v2, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v10, v3, v8
	v_mad_u64_u32 v[2:3], null, v9, v17, 0
	v_mul_hi_u32 v16, v9, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mad_u64_u32 v[4:5], null, v10, v11, 0
	v_mad_u64_u32 v[6:7], null, v10, v17, 0
	v_add_co_u32 v2, vcc_lo, v16, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v2, v4
	v_add_co_ci_u32_e32 v2, vcc_lo, v3, v5, vcc_lo
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, v2, v6
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v6, v15, v4
	v_mad_u64_u32 v[2:3], null, v14, v4, 0
	v_mul_lo_u32 v7, v14, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_co_u32 v2, vcc_lo, v9, v2
	v_add3_u32 v3, v3, v7, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v6, v10, v3
	v_sub_co_ci_u32_e64 v6, s0, v6, v15, vcc_lo
	v_add_co_u32 v7, s0, v4, 2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v9, s0, 0, v5, s0
	v_sub_co_u32 v11, s0, v2, v14
	v_sub_co_ci_u32_e32 v3, vcc_lo, v10, v3, vcc_lo
	v_subrev_co_ci_u32_e64 v6, s0, 0, v6, s0
	v_cmp_ge_u32_e32 vcc_lo, v11, v14
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cmp_eq_u32_e64 s0, v3, v15
	v_cndmask_b32_e64 v10, 0, -1, vcc_lo
	v_cmp_ge_u32_e32 vcc_lo, v6, v15
	v_cndmask_b32_e64 v11, 0, -1, vcc_lo
	v_cmp_ge_u32_e32 vcc_lo, v2, v14
	v_cndmask_b32_e64 v2, 0, -1, vcc_lo
	v_cmp_ge_u32_e32 vcc_lo, v3, v15
	v_cndmask_b32_e64 v14, 0, -1, vcc_lo
	v_cmp_eq_u32_e32 vcc_lo, v6, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v2, v14, v2, s0
	v_cndmask_b32_e32 v6, v11, v10, vcc_lo
	v_add_co_u32 v10, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v11, vcc_lo, 0, v5, vcc_lo
	v_cmp_ne_u32_e32 vcc_lo, 0, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_dual_cndmask_b32 v3, v11, v9 :: v_dual_cndmask_b32 v6, v10, v7
	v_cmp_ne_u32_e32 vcc_lo, 0, v2
	v_xor_b32_e32 v2, v8, v12
	v_dual_cndmask_b32 v4, v4, v6 :: v_dual_cndmask_b32 v3, v5, v3
	v_xor_b32_e32 v5, v8, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v4, v4, v2
	v_xor_b32_e32 v3, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_co_u32 v2, vcc_lo, v4, v2
	v_sub_co_ci_u32_e32 v3, vcc_lo, v3, v5, vcc_lo
	global_store_b64 v[0:1], v[2:3], off
.LBB0_12:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6numDemPlS_llii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 22
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z6numDemPlS_llii, .Lfunc_end0-_Z6numDemPlS_llii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2576
; NumSgprs: 18
; NumVgprs: 22
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 22
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z3sumPlS_S_ii          ; -- Begin function _Z3sumPlS_S_ii
	.globl	_Z3sumPlS_S_ii
	.p2align	8
	.type	_Z3sumPlS_S_ii,@function
_Z3sumPlS_S_ii:                         ; @_Z3sumPlS_S_ii
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x2c
	s_load_b64 s[2:3], s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s15, s15, s4
	v_add3_u32 v0, s15, s3, v0
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s2, v0
	s_cbranch_execz .LBB1_7
; %bb.1:                                ; %.preheader
	v_add_nc_u32_e32 v10, 1, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_i32_e32 vcc_lo, s2, v10
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_7
; %bb.2:                                ; %.lr.ph
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v1, 31, v0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 3, v[0:1]
	v_add_co_u32 v8, vcc_lo, v4, 8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v5, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s4, v4
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v5, vcc_lo
	v_add_co_u32 v2, vcc_lo, s6, v4
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v5, vcc_lo
	v_add_co_u32 v4, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
	v_add_co_u32 v6, vcc_lo, s4, v8
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v9, vcc_lo
	v_add_co_u32 v8, vcc_lo, s6, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, s7, v9, vcc_lo
	s_mov_b32 s1, 0
.LBB1_3:                                ; =>This Inner Loop Header: Depth=1
	global_load_b64 v[11:12], v[0:1], off
	global_load_b64 v[13:14], v[6:7], off
	s_mov_b32 s0, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_eq_u64_e64 v[11:12], v[13:14]
	s_cbranch_execz .LBB1_6
; %bb.4:                                ;   in Loop: Header=BB1_3 Depth=1
	global_load_b64 v[11:12], v[2:3], off
	global_load_b64 v[13:14], v[8:9], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[11:12], v[13:14]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_6
; %bb.5:                                ;   in Loop: Header=BB1_3 Depth=1
	global_load_b64 v[11:12], v[4:5], off
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v11, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v12, vcc_lo
	global_store_b64 v[4:5], v[11:12], off
.LBB1_6:                                ;   in Loop: Header=BB1_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v10, 1, v10
	v_add_co_u32 v6, vcc_lo, v6, 8
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_le_i32_e32 vcc_lo, s2, v10
	v_add_co_u32 v8, s0, v8, 8
	v_add_co_ci_u32_e64 v9, s0, 0, v9, s0
	s_or_b32 s1, vcc_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB1_3
.LBB1_7:                                ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z3sumPlS_S_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 15
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z3sumPlS_S_ii, .Lfunc_end1-_Z3sumPlS_S_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 376
; NumSgprs: 18
; NumVgprs: 15
; ScratchSize: 0
; MemoryBound: 1
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 15
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           8
        .value_kind:     by_value
      - .offset:         24
        .size:           8
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6numDemPlS_llii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z6numDemPlS_llii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     22
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z3sumPlS_S_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z3sumPlS_S_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     15
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
