#include <stdio.h>
#include <stdlib.h>
#include <string.h>

__global__ void pattern_blur_kernel(
    float *pattern, int pattern_size,
    unsigned char *in_img, int height, int width,
    unsigned char *out_img)
{
    int row_ind = threadIdx.x + blockIdx.x * blockDim.x;
    int col_ind = threadIdx.y + blockIdx.y * blockDim.y;

    if (row_ind >= height || col_ind >= width)
    {
        return;
    }

    int radius = (pattern_size - 1) / 2;

    for (int ch = 0; ch < 3; ++ch)
    {
        float new_value = 0.0;

        for (int di = -radius; di <= radius; ++di)
        {
            for (int dj = -radius; dj <= radius; ++dj)
            {
                int rind = row_ind + di;
                int cind = col_ind + dj;

                if (rind < 0) rind = 0;
                if (cind < 0) cind = 0;

                if (rind >= height) rind = height - 1;
                if (cind >= width) cind = width - 1;

                new_value += (
                    pattern[(di + radius) * pattern_size + (dj + radius)] *
                    in_img[(rind * width + cind) * 3 + ch]
                );
            }
        }

        if (new_value < 0) new_value = 0;
        if (new_value > 255) new_value = 255;

        out_img[(row_ind * width + col_ind) * 3 + ch] = (
            (unsigned char) new_value
        );
    }
}

int main(int argc, char *argv[])
{
    if (argc < 4)
    {
        printf(
            "Usage: %s input_pattern.txt input_img.bmp output.bmp\n", argv[0]);

        return 1;
    }

    FILE *input_pattern = fopen(argv[1], "r");

    int pattern_size;
    fscanf(input_pattern, "%d", &pattern_size);

    int pattern_sizeof = pattern_size * pattern_size * sizeof(float);
    float *h_pattern = (float *) malloc(pattern_sizeof);
    float pattern_sum = 0.0;

    for (int i = 0; i < pattern_size; ++i)
    {
        for (int j = 0; j < pattern_size; ++j)
        {
            float value;
            fscanf(input_pattern, "%f", &value);

            h_pattern[i * pattern_size + j] = value;
            pattern_sum += value;
        }
    }

    if (pattern_sum)
    {
        for (int i = 0; i < pattern_size; ++i)
        {
            for (int j = 0; j < pattern_size; ++j)
            {
                h_pattern[i * pattern_size + j] /= pattern_sum;
            }
        }
    }

    fclose(input_pattern);

    FILE *input_img = fopen(argv[2], "rb");

    int width, height;
    unsigned short int bpp;
    unsigned char header[138];

    fseek(input_img, 18, 0);
    fread(&width, sizeof(int), 1, input_img);

    fseek(input_img, 22, 0);
    fread(&height, sizeof(int), 1, input_img);

    fseek(input_img, 28, 0);
    fread(&bpp, sizeof(unsigned char), 1, input_img);

    fseek(input_img, 0, 0);
    fread(&header, sizeof(unsigned char), 138, input_img);

    int img_sizeof = height * width * 3 * sizeof(unsigned char);

    unsigned char *h_in_img = (unsigned char *) malloc(img_sizeof);

    unsigned int padding_size = (int)((width * bpp + 31) / 32) * 4 - width * 3;
    unsigned char *h_padding = (unsigned char *) malloc(padding_size);

    for (int i = 0; i < height; ++i)
    {
        for (int j = 0; j < width; ++j)
        {
            unsigned char b, g, r;

            fread(&b, sizeof(unsigned char), 1, input_img);
            fread(&g, sizeof(unsigned char), 1, input_img);
            fread(&r, sizeof(unsigned char), 1, input_img);

            h_in_img[(i * width + j) * 3] = r;
            h_in_img[(i * width + j) * 3 + 1] = g;
            h_in_img[(i * width + j) * 3 + 2] = b;
        }

        if (padding_size)
        {
            fread(&h_padding, padding_size, 1, input_img);
        }
    }

    fclose(input_img);

    unsigned char *h_out_img = (unsigned char *) malloc(img_sizeof);

    float *d_pattern;
    unsigned char *d_in_img;
    unsigned char *d_out_img;

    cudaSetDevice(0);

    cudaMalloc((void **) &d_pattern, pattern_sizeof);
    cudaMalloc((void **) &d_in_img, img_sizeof);
    cudaMalloc((void **) &d_out_img, img_sizeof);

    cudaMemcpy(d_pattern, h_pattern, pattern_sizeof, cudaMemcpyHostToDevice);
    cudaMemcpy(d_in_img, h_in_img, img_sizeof, cudaMemcpyHostToDevice);

    dim3 gridSize((int)(height / 16) + 1, int(width / 16) + 1);
    dim3 blockSize(16, 16);

    pattern_blur_kernel<<< gridSize, blockSize >>>(
        d_pattern, pattern_size,
        d_in_img, height, width,
        d_out_img);

    cudaDeviceSynchronize();

    cudaMemcpy(h_out_img, d_out_img, img_sizeof, cudaMemcpyDeviceToHost);

    FILE *output_img = fopen(argv[3], "wb");

    fwrite(header, sizeof(unsigned char), 138, output_img);

    for (int i = 0; i < height; ++i)
    {
        for (int j = 0; j < width; ++j)
        {
            unsigned char r = h_out_img[(i * width + j) * 3];
            unsigned char g = h_out_img[(i * width + j) * 3 + 1];
            unsigned char b = h_out_img[(i * width + j) * 3 + 2];

            fwrite(&b, sizeof(unsigned char), 1, output_img);
            fwrite(&g, sizeof(unsigned char), 1, output_img);
            fwrite(&r, sizeof(unsigned char), 1, output_img);
        }

        if (padding_size)
        {
            fwrite(&h_padding, padding_size, 1, output_img);
        }
    }

    fflush(output_img);
    fclose(output_img);

    free(h_pattern);
    free(h_padding);
    free(h_in_img);
    free(h_out_img);

    cudaFree(d_pattern);
    cudaFree(d_in_img);
    cudaFree(d_out_img);

    return 0;
}

	.file	"tmpxft_0027098c_00000000-6_pattern_blur.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z47__device_stub__Z19pattern_blur_kernelPfiPhiiS0_PfiPhiiS0_
	.type	_Z47__device_stub__Z19pattern_blur_kernelPfiPhiiS0_PfiPhiiS0_, @function
_Z47__device_stub__Z19pattern_blur_kernelPfiPhiiS0_PfiPhiiS0_:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movl	%esi, 36(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 32(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 20(%rsp)
	movq	%r9, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	36(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z19pattern_blur_kernelPfiPhiiS0_(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L2:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z47__device_stub__Z19pattern_blur_kernelPfiPhiiS0_PfiPhiiS0_, .-_Z47__device_stub__Z19pattern_blur_kernelPfiPhiiS0_PfiPhiiS0_
	.globl	_Z19pattern_blur_kernelPfiPhiiS0_
	.type	_Z19pattern_blur_kernelPfiPhiiS0_, @function
_Z19pattern_blur_kernelPfiPhiiS0_:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z47__device_stub__Z19pattern_blur_kernelPfiPhiiS0_PfiPhiiS0_
	.cfi_endproc
.LFE2053:
	.size	_Z19pattern_blur_kernelPfiPhiiS0_, .-_Z19pattern_blur_kernelPfiPhiiS0_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"Usage: %s input_pattern.txt input_img.bmp output.bmp\n"
.LC2:
	.string	"r"
.LC3:
	.string	"%d"
.LC4:
	.string	"%f"
.LC5:
	.string	"rb"
.LC6:
	.string	"wb"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rsi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$296, %rsp
	.cfi_def_cfa_offset 352
	movq	%fs:40, %rax
	movq	%rax, 280(%rsp)
	xorl	%eax, %eax
	cmpl	$3, %edi
	jg	.L9
	movq	(%rsi), %rdx
	movl	$2, %edi
	leaq	.LC1(%rip), %rsi
	call	__printf_chk@PLT
	movl	$1, %eax
	jmp	.L8
.L9:
	movq	8(%rsi), %rdi
	leaq	.LC2(%rip), %rsi
	xorl	%r14d, %r14d
	leaq	.LC4(%rip), %rbp
	call	fopen@PLT
	leaq	68(%rsp), %rdx
	leaq	.LC3(%rip), %rsi
	movq	%rax, %rdi
	movq	%rax, %rbx
	xorl	%eax, %eax
	call	__isoc23_fscanf@PLT
	movl	68(%rsp), %eax
	imull	%eax, %eax
	sall	$2, %eax
	cltq
	movq	%rax, %rdi
	movq	%rax, 24(%rsp)
	call	malloc@PLT
	xorps	%xmm0, %xmm0
	movq	%rax, %r12
.L11:
	movl	68(%rsp), %eax
	cmpl	%r14d, %eax
	jle	.L41
	xorl	%r15d, %r15d
.L13:
	cmpl	%r15d, 68(%rsp)
	jle	.L42
	leaq	128(%rsp), %rdx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	movss	%xmm0, 8(%rsp)
	call	__isoc23_fscanf@PLT
	movl	68(%rsp), %eax
	movss	8(%rsp), %xmm0
	movss	128(%rsp), %xmm1
	imull	%r14d, %eax
	addss	%xmm1, %xmm0
	addl	%r15d, %eax
	incl	%r15d
	cltq
	movss	%xmm1, (%r12,%rax,4)
	jmp	.L13
.L42:
	incl	%r14d
	jmp	.L11
.L41:
	xorps	%xmm1, %xmm1
	ucomiss	%xmm1, %xmm0
	jp	.L32
	je	.L14
.L32:
	movslq	%eax, %rdi
	movq	%r12, %rsi
	xorl	%ecx, %ecx
	salq	$2, %rdi
	jmp	.L16
.L14:
	movq	%rbx, %rdi
	xorl	%ebx, %ebx
	call	fclose@PLT
	movq	16(%r13), %rdi
	leaq	.LC5(%rip), %rsi
	call	fopen@PLT
	xorl	%edx, %edx
	movl	$18, %esi
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
	call	fseek@PLT
	movq	8(%rsp), %r8
	movl	$1, %ecx
	leaq	72(%rsp), %rdi
	movl	$4, %edx
	movl	$4, %esi
	call	__fread_chk@PLT
	movq	8(%rsp), %rdi
	xorl	%edx, %edx
	movl	$22, %esi
	call	fseek@PLT
	movq	8(%rsp), %r8
	movl	$1, %ecx
	leaq	76(%rsp), %rdi
	movl	$4, %edx
	movl	$4, %esi
	call	__fread_chk@PLT
	movq	8(%rsp), %rdi
	xorl	%edx, %edx
	movl	$28, %esi
	call	fseek@PLT
	movq	8(%rsp), %r8
	movl	$1, %ecx
	leaq	66(%rsp), %rdi
	movl	$1, %edx
	movl	$2, %esi
	call	__fread_chk@PLT
	movq	8(%rsp), %rdi
	xorl	%edx, %edx
	xorl	%esi, %esi
	call	fseek@PLT
	movq	8(%rsp), %r8
	movl	$138, %ecx
	movl	$1, %edx
	movl	$138, %esi
	leaq	142(%rsp), %rdi
	call	__fread_chk@PLT
	movl	72(%rsp), %r14d
	movl	76(%rsp), %eax
	imull	%r14d, %eax
	leal	(%rax,%rax,2), %eax
	cltq
	movq	%rax, %rdi
	movq	%rax, 16(%rsp)
	call	malloc@PLT
	movl	$32, %ecx
	movq	%rax, %rbp
	movzwl	66(%rsp), %eax
	imull	%r14d, %eax
	imull	$-3, %r14d, %r14d
	addl	$31, %eax
	cltd
	idivl	%ecx
	leal	(%r14,%rax,4), %eax
	movl	%eax, %edi
	movq	%rax, 32(%rsp)
	movq	%rax, %r14
	call	malloc@PLT
	movq	%rax, 80(%rsp)
	leaq	104(%rsp), %rax
	movq	%rax, 40(%rsp)
	jmp	.L17
.L18:
	movss	(%rdx), %xmm1
	incl	%r8d
	addq	$4, %rdx
	divss	%xmm0, %xmm1
	movss	%xmm1, -4(%rdx)
	cmpl	%r8d, %eax
	jne	.L18
	incl	%ecx
	addq	%rdi, %rsi
.L16:
	cmpl	%ecx, %eax
	jle	.L14
	movq	%rsi, %rdx
	xorl	%r8d, %r8d
	jmp	.L18
.L44:
	testl	%r14d, %r14d
	je	.L20
	movq	8(%rsp), %r8
	movq	32(%rsp), %rdx
	leaq	80(%rsp), %rdi
	movl	$1, %ecx
	movl	$8, %esi
	call	__fread_chk@PLT
.L20:
	incl	%ebx
.L17:
	cmpl	%ebx, 76(%rsp)
	jle	.L43
	xorl	%r15d, %r15d
.L21:
	cmpl	%r15d, 72(%rsp)
	jle	.L44
	movq	8(%rsp), %r8
	movq	40(%rsp), %rdi
	movl	$1, %ecx
	movl	$1, %edx
	movl	$1, %esi
	call	__fread_chk@PLT
	movq	8(%rsp), %r8
	leaq	116(%rsp), %rdi
	movl	$1, %ecx
	movl	$1, %edx
	movl	$1, %esi
	call	__fread_chk@PLT
	movq	8(%rsp), %r8
	movl	$1, %edx
	leaq	128(%rsp), %rdi
	movl	$1, %ecx
	movl	$1, %esi
	call	__fread_chk@PLT
	movl	72(%rsp), %eax
	movb	128(%rsp), %dl
	imull	%ebx, %eax
	addl	%r15d, %eax
	incl	%r15d
	leal	(%rax,%rax,2), %eax
	cltq
	movb	%dl, 0(%rbp,%rax)
	movb	116(%rsp), %dl
	movb	%dl, 1(%rbp,%rax)
	movb	104(%rsp), %dl
	movb	%dl, 2(%rbp,%rax)
	jmp	.L21
.L43:
	movq	8(%rsp), %rdi
	call	fclose@PLT
	movq	16(%rsp), %rdi
	call	malloc@PLT
	xorl	%edi, %edi
	movq	%rax, %rbx
	call	cudaSetDevice@PLT
	movq	24(%rsp), %rsi
	leaq	88(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	16(%rsp), %rsi
	leaq	96(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	16(%rsp), %rsi
	leaq	104(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	24(%rsp), %rdx
	movq	88(%rsp), %rdi
	movq	%r12, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdx
	movq	96(%rsp), %rdi
	movq	%rbp, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	72(%rsp), %eax
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$16, %esi
	movl	$1, 124(%rsp)
	movl	$1, 136(%rsp)
	cltd
	idivl	%esi
	leal	1(%rax), %ecx
	movl	76(%rsp), %eax
	movl	%ecx, 120(%rsp)
	movl	$1, %ecx
	cltd
	idivl	%esi
	movabsq	$68719476752, %rdx
	movl	$1, %esi
	movq	%rdx, 128(%rsp)
	incl	%eax
	movl	%eax, 116(%rsp)
	movq	116(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L22
	movq	104(%rsp), %r9
	movl	72(%rsp), %r8d
	movl	76(%rsp), %ecx
	movq	96(%rsp), %rdx
	movl	68(%rsp), %esi
	movq	88(%rsp), %rdi
	call	_Z47__device_stub__Z19pattern_blur_kernelPfiPhiiS0_PfiPhiiS0_
.L22:
	call	cudaDeviceSynchronize@PLT
	movq	16(%rsp), %rdx
	movq	104(%rsp), %rsi
	movq	%rbx, %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movq	24(%r13), %rdi
	leaq	.LC6(%rip), %rsi
	xorl	%r13d, %r13d
	call	fopen@PLT
	movl	$138, %edx
	movl	$1, %esi
	leaq	142(%rsp), %rdi
	movq	%rax, %rcx
	movq	%rax, 8(%rsp)
	call	fwrite@PLT
	leaq	65(%rsp), %rax
	movq	%rax, 16(%rsp)
.L23:
	cmpl	%r13d, 76(%rsp)
	jle	.L45
	xorl	%r15d, %r15d
.L26:
	movl	72(%rsp), %eax
	cmpl	%r15d, %eax
	jle	.L46
	imull	%r13d, %eax
	movq	8(%rsp), %rcx
	movq	16(%rsp), %rdi
	movl	$1, %esi
	addl	%r15d, %eax
	incl	%r15d
	leal	(%rax,%rax,2), %eax
	cltq
	movb	(%rbx,%rax), %dl
	movb	%dl, 63(%rsp)
	movb	1(%rbx,%rax), %dl
	movb	2(%rbx,%rax), %al
	movb	%dl, 64(%rsp)
	movl	$1, %edx
	movb	%al, 65(%rsp)
	call	fwrite@PLT
	movq	8(%rsp), %rcx
	leaq	64(%rsp), %rdi
	movl	$1, %edx
	movl	$1, %esi
	call	fwrite@PLT
	movq	8(%rsp), %rcx
	leaq	63(%rsp), %rdi
	movl	$1, %edx
	movl	$1, %esi
	call	fwrite@PLT
	jmp	.L26
.L46:
	testl	%r14d, %r14d
	je	.L25
	movq	8(%rsp), %rcx
	movq	32(%rsp), %rsi
	leaq	80(%rsp), %rdi
	movl	$1, %edx
	call	fwrite@PLT
.L25:
	incl	%r13d
	jmp	.L23
.L45:
	movq	8(%rsp), %rdi
	call	fflush@PLT
	movq	8(%rsp), %rdi
	call	fclose@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	80(%rsp), %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	88(%rsp), %rdi
	call	cudaFree@PLT
	movq	96(%rsp), %rdi
	call	cudaFree@PLT
	movq	104(%rsp), %rdi
	call	cudaFree@PLT
	xorl	%eax, %eax
.L8:
	movq	280(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L27
	call	__stack_chk_fail@PLT
.L27:
	addq	$296, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC7:
	.string	"_Z19pattern_blur_kernelPfiPhiiS0_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC7(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z19pattern_blur_kernelPfiPhiiS0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>

__global__ void pattern_blur_kernel(
    float *pattern, int pattern_size,
    unsigned char *in_img, int height, int width,
    unsigned char *out_img)
{
    int row_ind = threadIdx.x + blockIdx.x * blockDim.x;
    int col_ind = threadIdx.y + blockIdx.y * blockDim.y;

    if (row_ind >= height || col_ind >= width)
    {
        return;
    }

    int radius = (pattern_size - 1) / 2;

    for (int ch = 0; ch < 3; ++ch)
    {
        float new_value = 0.0;

        for (int di = -radius; di <= radius; ++di)
        {
            for (int dj = -radius; dj <= radius; ++dj)
            {
                int rind = row_ind + di;
                int cind = col_ind + dj;

                if (rind < 0) rind = 0;
                if (cind < 0) cind = 0;

                if (rind >= height) rind = height - 1;
                if (cind >= width) cind = width - 1;

                new_value += (
                    pattern[(di + radius) * pattern_size + (dj + radius)] *
                    in_img[(rind * width + cind) * 3 + ch]
                );
            }
        }

        if (new_value < 0) new_value = 0;
        if (new_value > 255) new_value = 255;

        out_img[(row_ind * width + col_ind) * 3 + ch] = (
            (unsigned char) new_value
        );
    }
}

int main(int argc, char *argv[])
{
    if (argc < 4)
    {
        printf(
            "Usage: %s input_pattern.txt input_img.bmp output.bmp\n", argv[0]);

        return 1;
    }

    FILE *input_pattern = fopen(argv[1], "r");

    int pattern_size;
    fscanf(input_pattern, "%d", &pattern_size);

    int pattern_sizeof = pattern_size * pattern_size * sizeof(float);
    float *h_pattern = (float *) malloc(pattern_sizeof);
    float pattern_sum = 0.0;

    for (int i = 0; i < pattern_size; ++i)
    {
        for (int j = 0; j < pattern_size; ++j)
        {
            float value;
            fscanf(input_pattern, "%f", &value);

            h_pattern[i * pattern_size + j] = value;
            pattern_sum += value;
        }
    }

    if (pattern_sum)
    {
        for (int i = 0; i < pattern_size; ++i)
        {
            for (int j = 0; j < pattern_size; ++j)
            {
                h_pattern[i * pattern_size + j] /= pattern_sum;
            }
        }
    }

    fclose(input_pattern);

    FILE *input_img = fopen(argv[2], "rb");

    int width, height;
    unsigned short int bpp;
    unsigned char header[138];

    fseek(input_img, 18, 0);
    fread(&width, sizeof(int), 1, input_img);

    fseek(input_img, 22, 0);
    fread(&height, sizeof(int), 1, input_img);

    fseek(input_img, 28, 0);
    fread(&bpp, sizeof(unsigned char), 1, input_img);

    fseek(input_img, 0, 0);
    fread(&header, sizeof(unsigned char), 138, input_img);

    int img_sizeof = height * width * 3 * sizeof(unsigned char);

    unsigned char *h_in_img = (unsigned char *) malloc(img_sizeof);

    unsigned int padding_size = (int)((width * bpp + 31) / 32) * 4 - width * 3;
    unsigned char *h_padding = (unsigned char *) malloc(padding_size);

    for (int i = 0; i < height; ++i)
    {
        for (int j = 0; j < width; ++j)
        {
            unsigned char b, g, r;

            fread(&b, sizeof(unsigned char), 1, input_img);
            fread(&g, sizeof(unsigned char), 1, input_img);
            fread(&r, sizeof(unsigned char), 1, input_img);

            h_in_img[(i * width + j) * 3] = r;
            h_in_img[(i * width + j) * 3 + 1] = g;
            h_in_img[(i * width + j) * 3 + 2] = b;
        }

        if (padding_size)
        {
            fread(&h_padding, padding_size, 1, input_img);
        }
    }

    fclose(input_img);

    unsigned char *h_out_img = (unsigned char *) malloc(img_sizeof);

    float *d_pattern;
    unsigned char *d_in_img;
    unsigned char *d_out_img;

    hipSetDevice(0);

    hipMalloc((void **) &d_pattern, pattern_sizeof);
    hipMalloc((void **) &d_in_img, img_sizeof);
    hipMalloc((void **) &d_out_img, img_sizeof);

    hipMemcpy(d_pattern, h_pattern, pattern_sizeof, hipMemcpyHostToDevice);
    hipMemcpy(d_in_img, h_in_img, img_sizeof, hipMemcpyHostToDevice);

    dim3 gridSize((int)(height / 16) + 1, int(width / 16) + 1);
    dim3 blockSize(16, 16);

    pattern_blur_kernel<<< gridSize, blockSize >>>(
        d_pattern, pattern_size,
        d_in_img, height, width,
        d_out_img);

    hipDeviceSynchronize();

    hipMemcpy(h_out_img, d_out_img, img_sizeof, hipMemcpyDeviceToHost);

    FILE *output_img = fopen(argv[3], "wb");

    fwrite(header, sizeof(unsigned char), 138, output_img);

    for (int i = 0; i < height; ++i)
    {
        for (int j = 0; j < width; ++j)
        {
            unsigned char r = h_out_img[(i * width + j) * 3];
            unsigned char g = h_out_img[(i * width + j) * 3 + 1];
            unsigned char b = h_out_img[(i * width + j) * 3 + 2];

            fwrite(&b, sizeof(unsigned char), 1, output_img);
            fwrite(&g, sizeof(unsigned char), 1, output_img);
            fwrite(&r, sizeof(unsigned char), 1, output_img);
        }

        if (padding_size)
        {
            fwrite(&h_padding, padding_size, 1, output_img);
        }
    }

    fflush(output_img);
    fclose(output_img);

    free(h_pattern);
    free(h_padding);
    free(h_in_img);
    free(h_out_img);

    hipFree(d_pattern);
    hipFree(d_in_img);
    hipFree(d_out_img);

    return 0;
}

	.text
	.file	"pattern_blur.hip"
	.globl	_Z34__device_stub__pattern_blur_kernelPfiPhiiS0_ # -- Begin function _Z34__device_stub__pattern_blur_kernelPfiPhiiS0_
	.type	_Z34__device_stub__pattern_blur_kernelPfiPhiiS0_,@function
_Z34__device_stub__pattern_blur_kernelPfiPhiiS0_: # @_Z34__device_stub__pattern_blur_kernelPfiPhiiS0_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	20(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	48(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	16(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	40(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z19pattern_blur_kernelPfiPhiiS0_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z34__device_stub__pattern_blur_kernelPfiPhiiS0_, .Lfunc_end0-_Z34__device_stub__pattern_blur_kernelPfiPhiiS0_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$296, %rsp                      # imm = 0x128
	.cfi_def_cfa_offset 352
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %r15
	cmpl	$3, %edi
	jg	.LBB1_2
# %bb.1:
	movq	(%r15), %rsi
	movl	$.L.str, %edi
	xorl	%eax, %eax
	callq	printf
	movl	$1, %eax
	jmp	.LBB1_29
.LBB1_2:
	movq	8(%r15), %rdi
	movl	$.L.str.1, %esi
	callq	fopen
	movq	%rax, %r14
	leaq	36(%rsp), %rbx
	movl	$.L.str.2, %esi
	movq	%rax, %rdi
	movq	%rbx, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movl	(%rbx), %ebx
	movl	%ebx, %eax
	imull	%ebx, %eax
	shll	$2, %eax
	movslq	%eax, %rdi
	movq	%rdi, 56(%rsp)                  # 8-byte Spill
	callq	malloc
	movq	%rax, %r13
	testl	%ebx, %ebx
	movq	%r15, 104(%rsp)                 # 8-byte Spill
	jle	.LBB1_14
# %bb.3:                                # %.preheader120.preheader
	xorps	%xmm1, %xmm1
	leaq	144(%rsp), %r15
	xorl	%ebp, %ebp
.LBB1_4:                                # %.preheader120
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_6 Depth 2
	testl	%ebx, %ebx
	jle	.LBB1_7
# %bb.5:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB1_4 Depth=1
	xorl	%r12d, %r12d
.LBB1_6:                                # %.lr.ph
                                        #   Parent Loop BB1_4 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	%xmm1, 8(%rsp)                  # 4-byte Spill
	movl	$.L.str.3, %esi
	movq	%r14, %rdi
	movq	%r15, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movss	8(%rsp), %xmm1                  # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	movss	144(%rsp), %xmm0                # xmm0 = mem[0],zero,zero,zero
	movl	36(%rsp), %ebx
	movl	%ebp, %eax
	imull	%ebx, %eax
	cltq
	addq	%r12, %rax
	movss	%xmm0, (%r13,%rax,4)
	addss	%xmm0, %xmm1
	incq	%r12
	cmpl	%ebx, %r12d
	jl	.LBB1_6
.LBB1_7:                                # %._crit_edge
                                        #   in Loop: Header=BB1_4 Depth=1
	incl	%ebp
	cmpl	%ebx, %ebp
	jl	.LBB1_4
# %bb.8:                                # %._crit_edge125
	xorps	%xmm0, %xmm0
	ucomiss	%xmm0, %xmm1
	movq	104(%rsp), %r15                 # 8-byte Reload
	jne	.LBB1_9
	jnp	.LBB1_14
.LBB1_9:                                # %._crit_edge125
	testl	%ebx, %ebx
	jle	.LBB1_14
# %bb.10:                               # %.preheader118.lr.ph
	movl	%ebx, %eax
	leaq	(,%rax,4), %rcx
	xorl	%edx, %edx
	movq	%r13, %rsi
.LBB1_11:                               # %.lr.ph129
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_12 Depth 2
	xorl	%edi, %edi
.LBB1_12:                               #   Parent Loop BB1_11 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	(%rsi,%rdi,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	divss	%xmm1, %xmm0
	movss	%xmm0, (%rsi,%rdi,4)
	incq	%rdi
	cmpq	%rdi, %rax
	jne	.LBB1_12
# %bb.13:                               # %._crit_edge130
                                        #   in Loop: Header=BB1_11 Depth=1
	incq	%rdx
	addq	%rcx, %rsi
	cmpq	%rax, %rdx
	jne	.LBB1_11
.LBB1_14:                               # %.loopexit
	movq	%r13, 112(%rsp)                 # 8-byte Spill
	movq	%r14, %rdi
	callq	fclose
	movq	16(%r15), %rdi
	movl	$.L.str.4, %esi
	callq	fopen
	movq	%rax, %r14
	movl	$18, %esi
	movq	%rax, %rdi
	xorl	%edx, %edx
	callq	fseek
	leaq	140(%rsp), %r15
	movl	$4, %esi
	movl	$1, %edx
	movq	%r15, %rdi
	movq	%r14, %rcx
	callq	fread
	movl	$22, %esi
	movq	%r14, %rdi
	xorl	%edx, %edx
	callq	fseek
	leaq	136(%rsp), %r12
	movl	$4, %esi
	movl	$1, %edx
	movq	%r12, %rdi
	movq	%r14, %rcx
	callq	fread
	movl	$28, %esi
	movq	%r14, %rdi
	xorl	%edx, %edx
	callq	fseek
	leaq	102(%rsp), %r13
	movl	$1, %esi
	movl	$1, %edx
	movq	%r13, %rdi
	movq	%r14, %rcx
	callq	fread
	movq	%r14, %rdi
	xorl	%esi, %esi
	xorl	%edx, %edx
	callq	fseek
	leaq	144(%rsp), %rdi
	movl	$1, %esi
	movl	$138, %edx
	movq	%r14, %rcx
	callq	fread
	movl	(%r12), %ebx
	movl	(%r15), %r15d
	movl	%ebx, %eax
	imull	%r15d, %eax
	leal	(%rax,%rax,2), %eax
	movslq	%eax, %rdi
	movq	%rdi, 128(%rsp)                 # 8-byte Spill
	callq	malloc
	movq	%rax, %r12
	movzwl	(%r13), %edi
	imull	%r15d, %edi
	leal	31(%rdi), %eax
	addl	$62, %edi
	testl	%eax, %eax
	cmovnsl	%eax, %edi
	sarl	$5, %edi
	shll	$2, %edi
	movq	%r15, 8(%rsp)                   # 8-byte Spill
	leal	(%r15,%r15,2), %eax
	subl	%eax, %edi
	movq	%rdi, 120(%rsp)                 # 8-byte Spill
	callq	malloc
	xorl	%ecx, %ecx
	movq	%rax, 88(%rsp)
	movq	%rbx, 80(%rsp)                  # 8-byte Spill
	testl	%ebx, %ebx
	jle	.LBB1_20
# %bb.15:                               # %.preheader117.lr.ph
	movq	8(%rsp), %rax                   # 8-byte Reload
	leal	(%rax,%rax,2), %eax
	movl	%eax, 20(%rsp)                  # 4-byte Spill
	xorl	%ebx, %ebx
.LBB1_16:                               # %.preheader117
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_30 Depth 2
	movq	%rbx, 64(%rsp)                  # 8-byte Spill
	movq	8(%rsp), %rax                   # 8-byte Reload
	movq	%rax, %rbx
	movq	%rcx, 72(%rsp)                  # 8-byte Spill
	movl	%ecx, %r13d
	testl	%eax, %eax
	leaq	40(%rsp), %rbp
	leaq	24(%rsp), %r15
	jle	.LBB1_17
.LBB1_30:                               #   Parent Loop BB1_16 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	$1, %esi
	movl	$1, %edx
	leaq	48(%rsp), %rdi
	movq	%r14, %rcx
	callq	fread
	movl	$1, %esi
	movl	$1, %edx
	movq	%rbp, %rdi
	movq	%r14, %rcx
	callq	fread
	movl	$1, %esi
	movl	$1, %edx
	movq	%r15, %rdi
	movq	%r14, %rcx
	callq	fread
	movb	24(%rsp), %al
	movl	%r13d, %ecx
	movb	%al, (%r12,%rcx)
	movb	40(%rsp), %al
	movb	%al, 1(%r12,%rcx)
	movb	48(%rsp), %al
	movb	%al, 2(%r12,%rcx)
	addl	$3, %r13d
	decq	%rbx
	jne	.LBB1_30
.LBB1_17:                               # %._crit_edge134
                                        #   in Loop: Header=BB1_16 Depth=1
	movq	120(%rsp), %rsi                 # 8-byte Reload
	testq	%rsi, %rsi
	movq	64(%rsp), %rbx                  # 8-byte Reload
	je	.LBB1_19
# %bb.18:                               #   in Loop: Header=BB1_16 Depth=1
	movl	$1, %edx
	leaq	88(%rsp), %rdi
	movq	%r14, %rcx
	callq	fread
.LBB1_19:                               #   in Loop: Header=BB1_16 Depth=1
	incq	%rbx
	movq	72(%rsp), %rcx                  # 8-byte Reload
	addl	20(%rsp), %ecx                  # 4-byte Folded Reload
	cmpq	80(%rsp), %rbx                  # 8-byte Folded Reload
	jne	.LBB1_16
.LBB1_20:                               # %._crit_edge136
	movq	%r14, %rdi
	callq	fclose
	movq	128(%rsp), %rbp                 # 8-byte Reload
	movq	%rbp, %rdi
	callq	malloc
	movq	%rax, %r14
	xorl	%edi, %edi
	callq	hipSetDevice
	leaq	48(%rsp), %r15
	movq	%r15, %rdi
	movq	56(%rsp), %rbx                  # 8-byte Reload
	movq	%rbx, %rsi
	callq	hipMalloc
	leaq	40(%rsp), %r13
	movq	%r13, %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	leaq	24(%rsp), %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	movq	(%r15), %rdi
	movq	112(%rsp), %rsi                 # 8-byte Reload
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r13), %rdi
	movq	%r12, 56(%rsp)                  # 8-byte Spill
	movq	%r12, %rsi
	movq	%rbp, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	80(%rsp), %rbx                  # 8-byte Reload
	leal	15(%rbx), %eax
	testl	%ebx, %ebx
	cmovnsl	%ebx, %eax
	sarl	$4, %eax
	incl	%eax
	movq	8(%rsp), %rcx                   # 8-byte Reload
	leal	15(%rcx), %edi
	testl	%ecx, %ecx
	cmovnsl	%ecx, %edi
	sarl	$4, %edi
	incl	%edi
	shlq	$32, %rdi
	orq	%rax, %rdi
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_22
# %bb.21:
	movq	48(%rsp), %rdi
	movl	36(%rsp), %esi
	movq	40(%rsp), %rdx
	movq	24(%rsp), %r9
	movl	%ebx, %ecx
	movq	8(%rsp), %r8                    # 8-byte Reload
                                        # kill: def $r8d killed $r8d killed $r8
	callq	_Z34__device_stub__pattern_blur_kernelPfiPhiiS0_
.LBB1_22:
	callq	hipDeviceSynchronize
	movq	24(%rsp), %rsi
	movq	%r14, %rdi
	movq	%rbp, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	104(%rsp), %rax                 # 8-byte Reload
	movq	24(%rax), %rdi
	movl	$.L.str.5, %esi
	callq	fopen
	movq	%rax, %r13
	leaq	144(%rsp), %rdi
	movl	$1, %esi
	movl	$138, %edx
	movq	%rax, %rcx
	callq	fwrite
	testl	%ebx, %ebx
	jle	.LBB1_28
# %bb.23:                               # %.preheader.lr.ph
	movq	8(%rsp), %rax                   # 8-byte Reload
	leal	(%rax,%rax,2), %eax
	movl	%eax, 20(%rsp)                  # 4-byte Spill
	xorl	%ecx, %ecx
	xorl	%ebx, %ebx
.LBB1_24:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_31 Depth 2
	movq	%rbx, 64(%rsp)                  # 8-byte Spill
	movq	8(%rsp), %rax                   # 8-byte Reload
	movq	%rax, %rbx
	movq	%rcx, 72(%rsp)                  # 8-byte Spill
	movl	%ecx, %r12d
	testl	%eax, %eax
	jle	.LBB1_25
.LBB1_31:                               #   Parent Loop BB1_24 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	%r12d, %eax
	movsbl	(%r14,%rax), %ebp
	movsbl	1(%r14,%rax), %r15d
	movsbl	2(%r14,%rax), %edi
	movq	%r13, %rsi
	callq	fputc@PLT
	movl	%r15d, %edi
	movq	%r13, %rsi
	callq	fputc@PLT
	movl	%ebp, %edi
	movq	%r13, %rsi
	callq	fputc@PLT
	addl	$3, %r12d
	decq	%rbx
	jne	.LBB1_31
.LBB1_25:                               # %._crit_edge139
                                        #   in Loop: Header=BB1_24 Depth=1
	movq	120(%rsp), %rsi                 # 8-byte Reload
	testl	%esi, %esi
	movq	64(%rsp), %rbx                  # 8-byte Reload
	je	.LBB1_27
# %bb.26:                               #   in Loop: Header=BB1_24 Depth=1
	movl	$1, %edx
	leaq	88(%rsp), %rdi
	movq	%r13, %rcx
	callq	fwrite
.LBB1_27:                               #   in Loop: Header=BB1_24 Depth=1
	incq	%rbx
	movq	72(%rsp), %rcx                  # 8-byte Reload
	addl	20(%rsp), %ecx                  # 4-byte Folded Reload
	cmpq	80(%rsp), %rbx                  # 8-byte Folded Reload
	jne	.LBB1_24
.LBB1_28:                               # %._crit_edge141
	movq	%r13, %rdi
	callq	fflush
	movq	%r13, %rdi
	callq	fclose
	movq	112(%rsp), %rdi                 # 8-byte Reload
	callq	free
	movq	88(%rsp), %rdi
	callq	free
	movq	56(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	48(%rsp), %rdi
	callq	hipFree
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
.LBB1_29:
	addq	$296, %rsp                      # imm = 0x128
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z19pattern_blur_kernelPfiPhiiS0_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z19pattern_blur_kernelPfiPhiiS0_,@object # @_Z19pattern_blur_kernelPfiPhiiS0_
	.section	.rodata,"a",@progbits
	.globl	_Z19pattern_blur_kernelPfiPhiiS0_
	.p2align	3, 0x0
_Z19pattern_blur_kernelPfiPhiiS0_:
	.quad	_Z34__device_stub__pattern_blur_kernelPfiPhiiS0_
	.size	_Z19pattern_blur_kernelPfiPhiiS0_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Usage: %s input_pattern.txt input_img.bmp output.bmp\n"
	.size	.L.str, 54

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"r"
	.size	.L.str.1, 2

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"%d"
	.size	.L.str.2, 3

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"%f"
	.size	.L.str.3, 3

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"rb"
	.size	.L.str.4, 3

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"wb"
	.size	.L.str.5, 3

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z19pattern_blur_kernelPfiPhiiS0_"
	.size	.L__unnamed_1, 34

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z34__device_stub__pattern_blur_kernelPfiPhiiS0_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z19pattern_blur_kernelPfiPhiiS0_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z19pattern_blur_kernelPfiPhiiS0_ ; -- Begin function _Z19pattern_blur_kernelPfiPhiiS0_
	.globl	_Z19pattern_blur_kernelPfiPhiiS0_
	.p2align	8
	.type	_Z19pattern_blur_kernelPfiPhiiS0_,@function
_Z19pattern_blur_kernelPfiPhiiS0_:      ; @_Z19pattern_blur_kernelPfiPhiiS0_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x34
	s_load_b64 s[4:5], s[0:1], 0x18
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s4, v0
	v_cmp_gt_i32_e64 s2, s5, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_9
; %bb.1:
	s_clause 0x3
	s_load_b32 s9, s[0:1], 0x8
	s_load_b64 s[2:3], s[0:1], 0x0
	s_load_b64 s[6:7], s[0:1], 0x10
	s_load_b64 s[0:1], s[0:1], 0x20
	v_mad_u64_u32 v[2:3], null, v0, s5, v[1:2]
	v_mov_b32_e32 v3, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_lshl_add_u32 v2, v2, 1, v2
	s_waitcnt lgkmcnt(0)
	s_add_i32 s8, s9, -1
	s_lshr_b32 s10, s8, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_add_i32 s10, s8, s10
	s_mov_b32 s8, 0
	s_ashr_i32 s10, s10, 1
	s_sub_i32 s12, 0, s10
	s_cmp_gt_i32 s9, -1
	v_subrev_nc_u32_e32 v1, s10, v1
	s_cselect_b32 s13, -1, 0
	s_abs_i32 s15, s10
	s_add_i32 s14, s4, -1
	s_add_i32 s17, s10, s15
	s_add_i32 s16, s5, -1
	s_add_i32 s17, s17, 1
.LBB0_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_4 Depth 2
                                        ;       Child Loop BB0_5 Depth 3
	v_mov_b32_e32 v4, 0
	s_and_not1_b32 vcc_lo, exec_lo, s13
	s_cbranch_vccnz .LBB0_8
; %bb.3:                                ; %.preheader.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v4, 0
	s_mov_b32 s18, 0
	s_mov_b32 s19, s12
.LBB0_4:                                ; %.preheader
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_5 Depth 3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v6, v1 :: v_dual_add_nc_u32 v5, s19, v0
	s_mov_b32 s10, s18
	s_mov_b32 s20, s17
	v_max_i32_e32 v5, 0, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e32 vcc_lo, s4, v5
	v_cndmask_b32_e32 v5, s14, v5, vcc_lo
	v_mul_lo_u32 v5, v5, s5
.LBB0_5:                                ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_4 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_max_i32_e32 v7, 0, v6
	s_ashr_i32 s11, s10, 31
	v_add_nc_u32_e32 v6, 1, v6
	s_lshl_b64 s[22:23], s[10:11], 2
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s5, v7
	s_add_u32 s22, s2, s22
	s_addc_u32 s23, s3, s23
	s_add_i32 s20, s20, -1
	s_add_i32 s10, s10, 1
	v_cndmask_b32_e32 v7, s16, v7, vcc_lo
	s_cmp_eq_u32 s20, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v9, v7, v5
	v_mad_u64_u32 v[7:8], null, v9, 3, s[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v8, 31, v7
	v_add_co_u32 v7, vcc_lo, s6, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v8, vcc_lo
	global_load_u8 v7, v[7:8], off
	global_load_b32 v8, v3, s[22:23]
	s_waitcnt vmcnt(1)
	v_cvt_f32_ubyte0_e32 v7, v7
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v4, v8, v7
	s_cbranch_scc0 .LBB0_5
; %bb.6:                                ; %._crit_edge
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_add_i32 s10, s19, 1
	s_add_i32 s18, s18, s9
	s_cmp_eq_u32 s19, s15
	s_cbranch_scc1 .LBB0_8
; %bb.7:                                ;   in Loop: Header=BB0_4 Depth=2
	s_mov_b32 s19, s10
	s_branch .LBB0_4
.LBB0_8:                                ; %._crit_edge72
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_cmp_ngt_f32_e32 vcc_lo, 0, v4
	v_add_nc_u32_e32 v5, s8, v2
	s_add_i32 s8, s8, 1
	s_cmp_eq_u32 s8, 3
	v_cndmask_b32_e32 v4, 0, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v6, 31, v5
	v_cmp_nlt_f32_e32 vcc_lo, 0x437f0000, v4
	v_cndmask_b32_e32 v4, 0x437f0000, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_i32_f32_e32 v7, v4
	v_add_co_u32 v4, vcc_lo, s0, v5
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v6, vcc_lo
	global_store_b8 v[4:5], v7, off
	s_cbranch_scc0 .LBB0_2
.LBB0_9:                                ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z19pattern_blur_kernelPfiPhiiS0_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 24
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z19pattern_blur_kernelPfiPhiiS0_, .Lfunc_end0-_Z19pattern_blur_kernelPfiPhiiS0_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 536
; NumSgprs: 26
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 26
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
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      - .address_space:  global
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        .size:           8
        .value_kind:     global_buffer
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        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
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        .size:           4
        .value_kind:     hidden_block_count_z
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        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z19pattern_blur_kernelPfiPhiiS0_
    .private_segment_fixed_size: 0
    .sgpr_count:     26
    .sgpr_spill_count: 0
    .symbol:         _Z19pattern_blur_kernelPfiPhiiS0_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
