#include <cuda.h>
#include <iostream>
#include <stdio.h>
#include <time.h>

using namespace std;

__global__ void convolution_2D_basic_kernel(int *in, int *mask, int *out,
                                            int maskwidth, int w, int h) {
  int Col = blockIdx.x * blockDim.x + threadIdx.x;
  int Row = blockIdx.y * blockDim.y + threadIdx.y;

  if (Col < w && Row < h) {
    int pixVal = 0;
    int N_start_col = Col - (maskwidth / 2);
    int N_start_row = Row - (maskwidth / 2);

    for (int j = 0; j < maskwidth; j++) {
      for (int k = 0; k < maskwidth; k++) {
        int curRow = N_start_row + j;
        int curCol = N_start_col + k;

        if (curRow > -1 && curRow < h && curCol > -1 && curCol < w) {
          pixVal += in[curRow * w + curCol] * mask[j * maskwidth + k];
        }
      }
    }
    out[Row * w + Col] = pixVal;
  }
}

void convolution_2D_basic(int *in, int *mask, int *out, int maskwidth, int w,
                          int h) {
  for (int Col = 0; Col < w; Col++) {
    for (int Row = 0; Row < h; Row++) {
      int pixVal = 0;
      int N_start_col = Col - (maskwidth / 2);
      int N_start_row = Row - (maskwidth / 2);

      for (int j = 0; j < maskwidth; j++) {
        for (int k = 0; k < maskwidth; k++) {
          int curRow = N_start_row + j;
          int curCol = N_start_col + k;

          if (curRow > -1 && curRow < h && curCol > -1 && curCol < w) {
            pixVal += in[curRow * w + curCol] * mask[j * maskwidth + k];
          }
        }
      }
      out[Row * w + Col] = pixVal;
    }
  }
}

void printMatrix(int *result, int h, int w) {
  for (int i = 0; i < h; i++) {
    for (int j = 0; j < w; j++) {
      cout << result[i * w + j] << " ";
    }
    cout << endl;
  }
}

bool compareTo(int *h_c, int *h_result, int h, int w) {
  for (int i = 0; i < h; i++) {
    for (int j = 0; j < w; j++) {
      if (h_c[i * w + j] != h_result[i * w + j]) {
        return false;
      }
    }
  }
  return true;
}

int main() {
  clock_t start, end;
  double cpu_time_used, gpu_time_used;
  float blockSize = 4;
  int *in, *mask, *out, *d_in, *d_mask, *d_out, *out_result;
  int h = 7, w = 7, maskwidth = 3;
  // Asignar memoria en el host
  in = (int *)malloc(sizeof(int) * h * w);
  mask = (int *)malloc(sizeof(int) * maskwidth * maskwidth);
  out = (int *)malloc(sizeof(int) * h * w);
  out_result = (int *)malloc(sizeof(int) * h * w);

  // Inicializar las matrices
  for (int i = 0; i < h; i++) {
    for (int j = 0; j < w; j++) {
      in[i * w + j] = 1;
      out[i * w + j] = 1;
      out_result[i * w + j] = 1;
    }
  }
  for (int i = 0; i < maskwidth; i++) {
    for (int j = 0; j < maskwidth; j++) {
      mask[i * w + j] = i + 1;
    }
  }

  start = clock();
  // Llamar funcion que sume dos vectores y retorne el resultado en out
  convolution_2D_basic(in, mask, out, maskwidth, w, h);
  end = clock();
  cpu_time_used = ((double)(end - start)) / CLOCKS_PER_SEC;
  printf("Tiempo invertido CPU = %lf s\n", cpu_time_used);

  // Asignacion de memoria en el device
  cudaMalloc(&d_in, sizeof(int) * h * w);
  cudaMalloc(&d_mask, sizeof(int) * maskwidth * maskwidth);
  cudaMalloc(&d_out, sizeof(int) * h * w);

  // Copiar los datos del host al device
  cudaMemcpy(d_in, in, h * w * sizeof(int), cudaMemcpyHostToDevice);
  cudaMemcpy(d_mask, mask, maskwidth * maskwidth * sizeof(int),
             cudaMemcpyHostToDevice);

  dim3 dimBlock(blockSize, blockSize, 1);
  dim3 dimGrid(ceil(w / blockSize), ceil(h / blockSize), 1);

  start = clock();
  convolution_2D_basic_kernel<<<dimGrid, dimBlock>>>(d_in, d_mask, d_out,
                                                     maskwidth, w, h);
  cudaMemcpy(out_result, d_out, h * w * sizeof(int), cudaMemcpyDeviceToHost);
  end = clock();
  gpu_time_used = ((double)(end - start)) / CLOCKS_PER_SEC;
  printf("Tiempo invertido GPU = %lf s\n", gpu_time_used);

  printMatrix(out, h, w);
  cout << "matrix" << endl;
  printMatrix(out_result, h, w);
  if (compareTo(out, out_result, h, w)) {
    printf("Matrices Iguales");
  } else {
    printf("Matrices Diferentes");
  }
  cudaFree(d_in);
  cudaFree(d_mask);
  cudaFree(d_out);
  free(in);
  free(mask);
  free(out);
  free(out_result);
  return 0;
}

	.file	"tmpxft_0024dea8_00000000-6_convolution2D.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3641:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3641:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z20convolution_2D_basicPiS_S_iii
	.type	_Z20convolution_2D_basicPiS_S_iii, @function
_Z20convolution_2D_basicPiS_S_iii:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	%ecx, %eax
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rsi, -16(%rsp)
	movl	$2, %esi
	movq	%rdx, -48(%rsp)
	cltd
	idivl	%esi
	movq	%rdi, -24(%rsp)
	movl	%r9d, -36(%rsp)
	movslq	%r8d, %rdx
	leaq	0(,%rdx,4), %rbx
	xorl	%edx, %edx
	movq	%rbx, -32(%rsp)
	movl	%r8d, %ebx
	movl	%edx, -40(%rsp)
	negl	%eax
	imull	%eax, %ebx
	movl	%eax, %esi
	movl	%ebx, -8(%rsp)
.L3:
	cmpl	%r8d, -40(%rsp)
	jge	.L17
	movq	-48(%rsp), %rbx
	movl	-8(%rsp), %r11d
	movl	%eax, %edi
	movq	%rbx, -56(%rsp)
	leal	(%rcx,%rsi), %ebx
	movl	%ebx, -4(%rsp)
.L8:
	movl	%edi, %edx
	subl	%eax, %edx
	cmpl	%edx, -36(%rsp)
	jle	.L18
	movl	%esi, %r12d
	movl	%r11d, %ebp
	xorl	%r9d, %r9d
	xorl	%ebx, %ebx
	negl	%r12d
.L4:
	cmpl	%ecx, %r9d
	jge	.L19
	movl	%esi, %edx
	leal	(%r9,%rdi), %r15d
.L6:
	movl	%edx, %r14d
	orl	%r15d, %r14d
	js	.L5
	cmpl	%r15d, -36(%rsp)
	jle	.L5
	cmpl	%edx, %r8d
	jle	.L5
	leal	(%rdx,%r12), %r14d
	leal	(%rdx,%rbp), %r13d
	movslq	%r14d, %r10
	movq	-24(%rsp), %r14
	movslq	%r13d, %r13
	movl	(%r14,%r13,4), %r13d
	movq	-16(%rsp), %r14
	imull	(%r14,%r10,4), %r13d
	addl	%r13d, %ebx
.L5:
	movl	-4(%rsp), %r14d
	incl	%edx
	cmpl	%r14d, %edx
	jne	.L6
	incl	%r9d
	addl	%r8d, %ebp
	addl	%ecx, %r12d
	jmp	.L4
.L19:
	movq	-56(%rsp), %rdx
	addl	%r8d, %r11d
	incl	%edi
	movl	%ebx, (%rdx)
	movq	-32(%rsp), %rbx
	addq	%rbx, -56(%rsp)
	jmp	.L8
.L18:
	incl	-40(%rsp)
	incl	%esi
	addq	$4, -48(%rsp)
	jmp	.L3
.L17:
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	_Z20convolution_2D_basicPiS_S_iii, .-_Z20convolution_2D_basicPiS_S_iii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	" "
	.text
	.globl	_Z11printMatrixPiii
	.type	_Z11printMatrixPiii, @function
_Z11printMatrixPiii:
.LFB3636:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%esi, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%edx, %ebx
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
.L21:
	cmpl	%r14d, %r13d
	jge	.L20
	movslq	%r12d, %rax
	xorl	%r15d, %r15d
	leaq	0(%rbp,%rax,4), %rcx
.L24:
	cmpl	%r15d, %ebx
	jle	.L26
	movl	(%rcx,%r15,4), %esi
	leaq	_ZSt4cout(%rip), %rdi
	movq	%rcx, 8(%rsp)
	incq	%r15
	call	_ZNSolsEi@PLT
	leaq	.LC0(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	8(%rsp), %rcx
	jmp	.L24
.L26:
	leaq	_ZSt4cout(%rip), %rdi
	incl	%r13d
	addl	%ebx, %r12d
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	jmp	.L21
.L20:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3636:
	.size	_Z11printMatrixPiii, .-_Z11printMatrixPiii
	.globl	_Z9compareToPiS_ii
	.type	_Z9compareToPiS_ii, @function
_Z9compareToPiS_ii:
.LFB3637:
	.cfi_startproc
	endbr64
	movq	%rdi, %r10
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
.L28:
	cmpl	%edx, %r9d
	jge	.L33
	movslq	%r8d, %rax
	xorl	%edi, %edi
	salq	$2, %rax
.L31:
	cmpl	%ecx, %edi
	jge	.L34
	movl	(%r10,%rax), %r11d
	addq	$4, %rax
	cmpl	-4(%rsi,%rax), %r11d
	jne	.L32
	incl	%edi
	jmp	.L31
.L34:
	incl	%r9d
	addl	%ecx, %r8d
	jmp	.L28
.L32:
	xorl	%eax, %eax
	ret
.L33:
	movb	$1, %al
	ret
	.cfi_endproc
.LFE3637:
	.size	_Z9compareToPiS_ii, .-_Z9compareToPiS_ii
	.globl	_Z54__device_stub__Z27convolution_2D_basic_kernelPiS_S_iiiPiS_S_iii
	.type	_Z54__device_stub__Z27convolution_2D_basic_kernelPiS_S_iiiPiS_S_iii, @function
_Z54__device_stub__Z27convolution_2D_basic_kernelPiS_S_iiiPiS_S_iii:
.LFB3663:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L35
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z27convolution_2D_basic_kernelPiS_S_iii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L35:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L37
	call	__stack_chk_fail@PLT
.L37:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3663:
	.size	_Z54__device_stub__Z27convolution_2D_basic_kernelPiS_S_iiiPiS_S_iii, .-_Z54__device_stub__Z27convolution_2D_basic_kernelPiS_S_iiiPiS_S_iii
	.globl	_Z27convolution_2D_basic_kernelPiS_S_iii
	.type	_Z27convolution_2D_basic_kernelPiS_S_iii, @function
_Z27convolution_2D_basic_kernelPiS_S_iii:
.LFB3664:
	.cfi_startproc
	endbr64
	jmp	_Z54__device_stub__Z27convolution_2D_basic_kernelPiS_S_iiiPiS_S_iii
	.cfi_endproc
.LFE3664:
	.size	_Z27convolution_2D_basic_kernelPiS_S_iii, .-_Z27convolution_2D_basic_kernelPiS_S_iii
	.section	.rodata.str1.1
.LC2:
	.string	"Tiempo invertido CPU = %lf s\n"
.LC3:
	.string	"Tiempo invertido GPU = %lf s\n"
.LC4:
	.string	"matrix"
.LC5:
	.string	"Matrices Iguales"
.LC6:
	.string	"Matrices Diferentes"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3638:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	$196, %edi
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movl	$36, %edi
	movq	%rax, %r13
	call	malloc@PLT
	movl	$196, %edi
	movq	%rax, %r12
	call	malloc@PLT
	movl	$196, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	xorl	%edx, %edx
	movq	%rax, %rbx
.L41:
	movq	%rdx, %rax
	movl	$7, %ecx
.L42:
	movl	$1, 0(%r13,%rax)
	movl	$1, 0(%rbp,%rax)
	movl	$1, (%rbx,%rax)
	addq	$4, %rax
	decl	%ecx
	jne	.L42
	addq	$28, %rdx
	cmpq	$196, %rdx
	jne	.L41
	movq	%r12, %rcx
	xorl	%eax, %eax
.L43:
	xorl	%edx, %edx
	incl	%eax
.L44:
	movl	%eax, (%rcx,%rdx,4)
	incq	%rdx
	cmpq	$3, %rdx
	jne	.L44
	addq	$28, %rcx
	cmpl	$3, %eax
	jne	.L43
	call	clock@PLT
	movl	$3, %ecx
	movq	%rbp, %rdx
	movq	%r12, %rsi
	movl	$7, %r9d
	movl	$7, %r8d
	movq	%r13, %rdi
	movq	%rax, %r14
	call	_Z20convolution_2D_basicPiS_S_iii
	call	clock@PLT
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	subq	%r14, %rax
	cvtsi2sdq	%rax, %xmm0
	movb	$1, %al
	divsd	.LC1(%rip), %xmm0
	call	__printf_chk@PLT
	leaq	8(%rsp), %rdi
	movl	$196, %esi
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$36, %esi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$196, %esi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%r13, %rsi
	movl	$196, %edx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$36, %edx
	call	cudaMemcpy@PLT
	movl	$1, 40(%rsp)
	movabsq	$17179869188, %rax
	movq	%rax, 32(%rsp)
	movabsq	$8589934594, %rax
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	clock@PLT
	movl	40(%rsp), %ecx
	movl	52(%rsp), %esi
	xorl	%r9d, %r9d
	movq	32(%rsp), %rdx
	movq	44(%rsp), %rdi
	xorl	%r8d, %r8d
	movq	%rax, %r14
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L46
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movl	$7, %r9d
	movl	$7, %r8d
	movq	8(%rsp), %rdi
	movl	$3, %ecx
	call	_Z54__device_stub__Z27convolution_2D_basic_kernelPiS_S_iiiPiS_S_iii
.L46:
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movl	$196, %edx
	movq	%rbx, %rdi
	call	cudaMemcpy@PLT
	call	clock@PLT
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	subq	%r14, %rax
	cvtsi2sdq	%rax, %xmm0
	movb	$1, %al
	divsd	.LC1(%rip), %xmm0
	call	__printf_chk@PLT
	movl	$7, %edx
	movl	$7, %esi
	movq	%rbp, %rdi
	call	_Z11printMatrixPiii
	leaq	.LC4(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movl	$7, %edx
	movl	$7, %esi
	movq	%rbx, %rdi
	call	_Z11printMatrixPiii
	movq	%rbx, %rsi
	movl	$7, %ecx
	movq	%rbp, %rdi
	movl	$7, %edx
	call	_Z9compareToPiS_ii
	leaq	.LC5(%rip), %rsi
	testb	%al, %al
	jne	.L54
	leaq	.LC6(%rip), %rsi
.L54:
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	%r13, %rdi
	call	free@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L49
	call	__stack_chk_fail@PLT
.L49:
	addq	$64, %rsp
	.cfi_def_cfa_offset 48
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3638:
	.size	main, .-main
	.section	.rodata.str1.1
.LC7:
	.string	"_Z27convolution_2D_basic_kernelPiS_S_iii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3666:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC7(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z27convolution_2D_basic_kernelPiS_S_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3666:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC1:
	.long	0
	.long	1093567616
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <hip/hip_runtime.h>
#include <iostream>
#include <stdio.h>
#include <time.h>

using namespace std;

__global__ void convolution_2D_basic_kernel(int *in, int *mask, int *out,
                                            int maskwidth, int w, int h) {
  int Col = blockIdx.x * blockDim.x + threadIdx.x;
  int Row = blockIdx.y * blockDim.y + threadIdx.y;

  if (Col < w && Row < h) {
    int pixVal = 0;
    int N_start_col = Col - (maskwidth / 2);
    int N_start_row = Row - (maskwidth / 2);

    for (int j = 0; j < maskwidth; j++) {
      for (int k = 0; k < maskwidth; k++) {
        int curRow = N_start_row + j;
        int curCol = N_start_col + k;

        if (curRow > -1 && curRow < h && curCol > -1 && curCol < w) {
          pixVal += in[curRow * w + curCol] * mask[j * maskwidth + k];
        }
      }
    }
    out[Row * w + Col] = pixVal;
  }
}

void convolution_2D_basic(int *in, int *mask, int *out, int maskwidth, int w,
                          int h) {
  for (int Col = 0; Col < w; Col++) {
    for (int Row = 0; Row < h; Row++) {
      int pixVal = 0;
      int N_start_col = Col - (maskwidth / 2);
      int N_start_row = Row - (maskwidth / 2);

      for (int j = 0; j < maskwidth; j++) {
        for (int k = 0; k < maskwidth; k++) {
          int curRow = N_start_row + j;
          int curCol = N_start_col + k;

          if (curRow > -1 && curRow < h && curCol > -1 && curCol < w) {
            pixVal += in[curRow * w + curCol] * mask[j * maskwidth + k];
          }
        }
      }
      out[Row * w + Col] = pixVal;
    }
  }
}

void printMatrix(int *result, int h, int w) {
  for (int i = 0; i < h; i++) {
    for (int j = 0; j < w; j++) {
      cout << result[i * w + j] << " ";
    }
    cout << endl;
  }
}

bool compareTo(int *h_c, int *h_result, int h, int w) {
  for (int i = 0; i < h; i++) {
    for (int j = 0; j < w; j++) {
      if (h_c[i * w + j] != h_result[i * w + j]) {
        return false;
      }
    }
  }
  return true;
}

int main() {
  clock_t start, end;
  double cpu_time_used, gpu_time_used;
  float blockSize = 4;
  int *in, *mask, *out, *d_in, *d_mask, *d_out, *out_result;
  int h = 7, w = 7, maskwidth = 3;
  // Asignar memoria en el host
  in = (int *)malloc(sizeof(int) * h * w);
  mask = (int *)malloc(sizeof(int) * maskwidth * maskwidth);
  out = (int *)malloc(sizeof(int) * h * w);
  out_result = (int *)malloc(sizeof(int) * h * w);

  // Inicializar las matrices
  for (int i = 0; i < h; i++) {
    for (int j = 0; j < w; j++) {
      in[i * w + j] = 1;
      out[i * w + j] = 1;
      out_result[i * w + j] = 1;
    }
  }
  for (int i = 0; i < maskwidth; i++) {
    for (int j = 0; j < maskwidth; j++) {
      mask[i * w + j] = i + 1;
    }
  }

  start = clock();
  // Llamar funcion que sume dos vectores y retorne el resultado en out
  convolution_2D_basic(in, mask, out, maskwidth, w, h);
  end = clock();
  cpu_time_used = ((double)(end - start)) / CLOCKS_PER_SEC;
  printf("Tiempo invertido CPU = %lf s\n", cpu_time_used);

  // Asignacion de memoria en el device
  hipMalloc(&d_in, sizeof(int) * h * w);
  hipMalloc(&d_mask, sizeof(int) * maskwidth * maskwidth);
  hipMalloc(&d_out, sizeof(int) * h * w);

  // Copiar los datos del host al device
  hipMemcpy(d_in, in, h * w * sizeof(int), hipMemcpyHostToDevice);
  hipMemcpy(d_mask, mask, maskwidth * maskwidth * sizeof(int),
             hipMemcpyHostToDevice);

  dim3 dimBlock(blockSize, blockSize, 1);
  dim3 dimGrid(ceil(w / blockSize), ceil(h / blockSize), 1);

  start = clock();
  convolution_2D_basic_kernel<<<dimGrid, dimBlock>>>(d_in, d_mask, d_out,
                                                     maskwidth, w, h);
  hipMemcpy(out_result, d_out, h * w * sizeof(int), hipMemcpyDeviceToHost);
  end = clock();
  gpu_time_used = ((double)(end - start)) / CLOCKS_PER_SEC;
  printf("Tiempo invertido GPU = %lf s\n", gpu_time_used);

  printMatrix(out, h, w);
  cout << "matrix" << endl;
  printMatrix(out_result, h, w);
  if (compareTo(out, out_result, h, w)) {
    printf("Matrices Iguales");
  } else {
    printf("Matrices Diferentes");
  }
  hipFree(d_in);
  hipFree(d_mask);
  hipFree(d_out);
  free(in);
  free(mask);
  free(out);
  free(out_result);
  return 0;
}

	.text
	.file	"convolution2D.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z42__device_stub__convolution_2D_basic_kernelPiS_S_iii # -- Begin function _Z42__device_stub__convolution_2D_basic_kernelPiS_S_iii
	.type	_Z42__device_stub__convolution_2D_basic_kernelPiS_S_iii,@function
_Z42__device_stub__convolution_2D_basic_kernelPiS_S_iii: # @_Z42__device_stub__convolution_2D_basic_kernelPiS_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z27convolution_2D_basic_kernelPiS_S_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z42__device_stub__convolution_2D_basic_kernelPiS_S_iii, .Lfunc_end0-_Z42__device_stub__convolution_2D_basic_kernelPiS_S_iii
	.cfi_endproc
                                        # -- End function
	.globl	_Z20convolution_2D_basicPiS_S_iii # -- Begin function _Z20convolution_2D_basicPiS_S_iii
	.type	_Z20convolution_2D_basicPiS_S_iii,@function
_Z20convolution_2D_basicPiS_S_iii:      # @_Z20convolution_2D_basicPiS_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%ecx, -84(%rsp)                 # 4-byte Spill
	movq	%rdx, -56(%rsp)                 # 8-byte Spill
	movq	%rsi, -48(%rsp)                 # 8-byte Spill
	testl	%r8d, %r8d
	jle	.LBB1_7
# %bb.1:                                # %.preheader50.lr.ph
	movl	-84(%rsp), %eax                 # 4-byte Reload
	movl	%eax, %ecx
	shrl	$31, %ecx
	addl	%eax, %ecx
	sarl	%ecx
	movl	%ecx, %r10d
	negl	%r10d
	cltq
	movl	%r8d, %ebx
	movl	%r9d, %edx
	movq	%rdx, -40(%rsp)                 # 8-byte Spill
	movl	%eax, %r15d
	shlq	$2, %rax
	movq	%rax, -8(%rsp)                  # 8-byte Spill
	movl	%r8d, %eax
	notl	%eax
	movl	%ecx, -68(%rsp)                 # 4-byte Spill
	imull	%ecx, %eax
	movq	%rax, -64(%rsp)                 # 8-byte Spill
	xorl	%eax, %eax
	movq	%rax, -80(%rsp)                 # 8-byte Spill
.LBB1_2:                                # %.preheader50
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_4 Depth 2
                                        #       Child Loop BB1_9 Depth 3
                                        #         Child Loop BB1_10 Depth 4
	testl	%r9d, %r9d
	jle	.LBB1_6
# %bb.3:                                # %.lr.ph58
                                        #   in Loop: Header=BB1_2 Depth=1
	movq	-56(%rsp), %rax                 # 8-byte Reload
	movq	-80(%rsp), %rcx                 # 8-byte Reload
	leaq	(%rax,%rcx,4), %rax
	movq	%rax, -32(%rsp)                 # 8-byte Spill
	movq	-64(%rsp), %r12                 # 8-byte Reload
	xorl	%edx, %edx
.LBB1_4:                                #   Parent Loop BB1_2 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB1_9 Depth 3
                                        #         Child Loop BB1_10 Depth 4
	cmpl	$0, -84(%rsp)                   # 4-byte Folded Reload
	movq	%r12, -16(%rsp)                 # 8-byte Spill
	movq	%rdx, -24(%rsp)                 # 8-byte Spill
	jle	.LBB1_5
# %bb.8:                                # %.preheader.preheader
                                        #   in Loop: Header=BB1_4 Depth=2
                                        # kill: def $edx killed $edx killed $rdx def $rdx
	subl	-68(%rsp), %edx                 # 4-byte Folded Reload
	xorl	%esi, %esi
	movq	-48(%rsp), %rcx                 # 8-byte Reload
	xorl	%r13d, %r13d
.LBB1_9:                                # %.preheader
                                        #   Parent Loop BB1_2 Depth=1
                                        #     Parent Loop BB1_4 Depth=2
                                        # =>    This Loop Header: Depth=3
                                        #         Child Loop BB1_10 Depth 4
	leal	(%rdx,%rsi), %ebp
	xorl	%r14d, %r14d
.LBB1_10:                               #   Parent Loop BB1_2 Depth=1
                                        #     Parent Loop BB1_4 Depth=2
                                        #       Parent Loop BB1_9 Depth=3
                                        # =>      This Inner Loop Header: Depth=4
	testl	%ebp, %ebp
	js	.LBB1_15
# %bb.11:                               #   in Loop: Header=BB1_10 Depth=4
	cmpl	%r9d, %ebp
	jge	.LBB1_15
# %bb.12:                               #   in Loop: Header=BB1_10 Depth=4
	leaq	(%r10,%r14), %rax
	testl	%eax, %eax
	js	.LBB1_15
# %bb.13:                               #   in Loop: Header=BB1_10 Depth=4
	cmpl	%r8d, %eax
	jge	.LBB1_15
# %bb.14:                               #   in Loop: Header=BB1_10 Depth=4
	leal	(%r12,%r14), %eax
	cltq
	movl	(%rcx,%r14,4), %r11d
	imull	(%rdi,%rax,4), %r11d
	addl	%r11d, %r13d
.LBB1_15:                               #   in Loop: Header=BB1_10 Depth=4
	incq	%r14
	cmpq	%r14, %r15
	jne	.LBB1_10
# %bb.16:                               # %._crit_edge
                                        #   in Loop: Header=BB1_9 Depth=3
	incq	%rsi
	addq	-8(%rsp), %rcx                  # 8-byte Folded Reload
	addq	%rbx, %r12
	cmpq	%r15, %rsi
	jne	.LBB1_9
	jmp	.LBB1_17
.LBB1_5:                                #   in Loop: Header=BB1_4 Depth=2
	xorl	%r13d, %r13d
.LBB1_17:                               # %._crit_edge55
                                        #   in Loop: Header=BB1_4 Depth=2
	movq	-24(%rsp), %rdx                 # 8-byte Reload
	movq	%rdx, %rax
	imulq	%rbx, %rax
	movq	-32(%rsp), %rcx                 # 8-byte Reload
	movl	%r13d, (%rcx,%rax,4)
	incq	%rdx
	movq	-16(%rsp), %r12                 # 8-byte Reload
	addq	%rbx, %r12
	cmpq	-40(%rsp), %rdx                 # 8-byte Folded Reload
	jne	.LBB1_4
.LBB1_6:                                # %._crit_edge59
                                        #   in Loop: Header=BB1_2 Depth=1
	movq	-80(%rsp), %rcx                 # 8-byte Reload
	incq	%rcx
	incq	%r10
	incq	-64(%rsp)                       # 8-byte Folded Spill
	movq	%rcx, %rax
	movq	%rcx, -80(%rsp)                 # 8-byte Spill
	cmpq	%rbx, %rcx
	jne	.LBB1_2
.LBB1_7:                                # %._crit_edge61
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z20convolution_2D_basicPiS_S_iii, .Lfunc_end1-_Z20convolution_2D_basicPiS_S_iii
	.cfi_endproc
                                        # -- End function
	.globl	_Z11printMatrixPiii             # -- Begin function _Z11printMatrixPiii
	.type	_Z11printMatrixPiii,@function
_Z11printMatrixPiii:                    # @_Z11printMatrixPiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdi, 8(%rsp)                   # 8-byte Spill
	testl	%esi, %esi
	jle	.LBB2_6
# %bb.1:                                # %.preheader.lr.ph
	movl	%edx, %ebx
	movl	%esi, %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	%edx, %r12d
	xorl	%r13d, %r13d
	xorl	%ebp, %ebp
.LBB2_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_4 Depth 2
	testl	%ebx, %ebx
	jle	.LBB2_5
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB2_2 Depth=1
	movl	%r13d, %eax
	movq	8(%rsp), %rcx                   # 8-byte Reload
	leaq	(%rcx,%rax,4), %r14
	xorl	%r15d, %r15d
.LBB2_4:                                #   Parent Loop BB2_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%r14,%r15,4), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSolsEi
	movl	$.L.str, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	incq	%r15
	cmpq	%r15, %r12
	jne	.LBB2_4
.LBB2_5:                                # %._crit_edge
                                        #   in Loop: Header=BB2_2 Depth=1
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	movl	$_ZSt4cout, %eax
	addq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	incq	%rbp
	addl	%ebx, %r13d
	cmpq	16(%rsp), %rbp                  # 8-byte Folded Reload
	jne	.LBB2_2
.LBB2_6:                                # %._crit_edge13
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z11printMatrixPiii, .Lfunc_end2-_Z11printMatrixPiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z9compareToPiS_ii              # -- Begin function _Z9compareToPiS_ii
	.type	_Z9compareToPiS_ii,@function
_Z9compareToPiS_ii:                     # @_Z9compareToPiS_ii
	.cfi_startproc
# %bb.0:
	testl	%edx, %edx
	jle	.LBB3_1
# %bb.3:                                # %.preheader.lr.ph
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	movl	%edx, %edx
	movl	%ecx, %r8d
	xorl	%r9d, %r9d
	xorl	%r10d, %r10d
	xorl	%eax, %eax
.LBB3_4:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_7 Depth 2
	testl	%ecx, %ecx
	jle	.LBB3_8
# %bb.5:                                # %.lr.ph
                                        #   in Loop: Header=BB3_4 Depth=1
	movl	%r9d, %ebx
	leaq	(%rsi,%rbx,4), %r11
	leaq	(%rdi,%rbx,4), %rbx
	xorl	%r14d, %r14d
.LBB3_7:                                #   Parent Loop BB3_4 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%rbx,%r14,4), %ebp
	cmpl	(%r11,%r14,4), %ebp
	jne	.LBB3_9
# %bb.6:                                #   in Loop: Header=BB3_7 Depth=2
	incq	%r14
	cmpq	%r14, %r8
	jne	.LBB3_7
.LBB3_8:                                # %._crit_edge
                                        #   in Loop: Header=BB3_4 Depth=1
	incq	%r10
	cmpq	%rdx, %r10
	setae	%al
	addl	%ecx, %r9d
	cmpq	%rdx, %r10
	jne	.LBB3_4
.LBB3_9:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
	.cfi_restore %rbp
	jmp	.LBB3_2
.LBB3_1:
	movb	$1, %al
.LBB3_2:                                # %.thread
	andb	$1, %al
                                        # kill: def $al killed $al killed $rax
	retq
.Lfunc_end3:
	.size	_Z9compareToPiS_ii, .Lfunc_end3-_Z9compareToPiS_ii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI4_0:
	.quad	0x412e848000000000              # double 1.0E+6
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$196, %edi
	callq	malloc
	movq	%rax, %rbx
	movl	$36, %edi
	callq	malloc
	movq	%rax, %r14
	movl	$196, %edi
	callq	malloc
	movq	%rax, %r15
	movl	$196, %edi
	callq	malloc
	movq	%rax, %r12
	xorl	%eax, %eax
	movl	$1, %ecx
	movq	%rbx, %rdx
	movq	%r15, %rsi
	movq	%r12, %rdi
.LBB4_1:                                # %.preheader100
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_2 Depth 2
	xorl	%r8d, %r8d
.LBB4_2:                                #   Parent Loop BB4_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	%ecx, (%rdx,%r8,4)
	movl	%ecx, (%rsi,%r8,4)
	movl	%ecx, (%rdi,%r8,4)
	incq	%r8
	cmpq	$7, %r8
	jne	.LBB4_2
# %bb.3:                                #   in Loop: Header=BB4_1 Depth=1
	incq	%rax
	addq	$28, %rdi
	addq	$28, %rsi
	addq	$28, %rdx
	cmpq	$7, %rax
	jne	.LBB4_1
# %bb.4:                                # %.preheader.preheader
	xorl	%eax, %eax
	movq	%r14, %rcx
.LBB4_5:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_6 Depth 2
	incq	%rax
	xorl	%edx, %edx
.LBB4_6:                                #   Parent Loop BB4_5 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	%eax, (%rcx,%rdx,4)
	incq	%rdx
	cmpq	$3, %rdx
	jne	.LBB4_6
# %bb.7:                                #   in Loop: Header=BB4_5 Depth=1
	addq	$28, %rcx
	cmpq	$3, %rax
	jne	.LBB4_5
# %bb.8:
	callq	clock
	movq	%rax, %r13
	movq	%rbx, %rdi
	movq	%r14, %rsi
	movq	%r15, %rdx
	movl	$3, %ecx
	movl	$7, %r8d
	movl	$7, %r9d
	callq	_Z20convolution_2D_basicPiS_S_iii
	callq	clock
	subq	%r13, %rax
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI4_0(%rip), %xmm0
	movl	$.L.str.1, %edi
	movb	$1, %al
	callq	printf
	leaq	16(%rsp), %r13
	movl	$196, %esi
	movq	%r13, %rdi
	callq	hipMalloc
	leaq	8(%rsp), %rbp
	movl	$36, %esi
	movq	%rbp, %rdi
	callq	hipMalloc
	movq	%rsp, %rdi
	movl	$196, %esi
	callq	hipMalloc
	movq	(%r13), %rdi
	movl	$196, %edx
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbp), %rdi
	movl	$36, %edx
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	callq	clock
	movq	%rax, %r13
	movabsq	$8589934594, %rdi               # imm = 0x200000002
	movabsq	$17179869188, %rdx              # imm = 0x400000004
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_10
# %bb.9:
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdx
	movl	$3, %ecx
	movl	$7, %r8d
	movl	$7, %r9d
	callq	_Z42__device_stub__convolution_2D_basic_kernelPiS_S_iii
.LBB4_10:
	movq	(%rsp), %rsi
	movl	$196, %edx
	movq	%r12, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	callq	clock
	subq	%r13, %rax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI4_0(%rip), %xmm0
	movl	$.L.str.2, %edi
	movb	$1, %al
	callq	printf
	movq	%r15, %rdi
	movl	$7, %esi
	movl	$7, %edx
	callq	_Z11printMatrixPiii
	movl	$_ZSt4cout, %r13d
	movl	$_ZSt4cout, %edi
	movl	$.L.str.3, %esi
	movl	$6, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%r13, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	%r12, %rdi
	movl	$7, %esi
	movl	$7, %edx
	callq	_Z11printMatrixPiii
	xorl	%esi, %esi
	movq	%r15, %rax
	movq	%r12, %rdx
	xorl	%ecx, %ecx
.LBB4_11:                               # %.preheader.i
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_13 Depth 2
	xorl	%edi, %edi
.LBB4_13:                               #   Parent Loop BB4_11 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%rax,%rdi,4), %r8d
	cmpl	(%rdx,%rdi,4), %r8d
	jne	.LBB4_15
# %bb.12:                               #   in Loop: Header=BB4_13 Depth=2
	incq	%rdi
	cmpq	$7, %rdi
	jne	.LBB4_13
# %bb.14:                               # %._crit_edge.i
                                        #   in Loop: Header=BB4_11 Depth=1
	cmpq	$6, %rsi
	leaq	1(%rsi), %rdi
	setae	%cl
	addq	$28, %rdx
	addq	$28, %rax
	movq	%rdi, %rsi
	cmpq	$7, %rdi
	jne	.LBB4_11
.LBB4_15:                               # %_Z9compareToPiS_ii.exit
	movl	$.L.str.4, %eax
	movl	$.L.str.5, %edi
	testb	$1, %cl
	cmovneq	%rax, %rdi
	xorl	%eax, %eax
	callq	printf
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	movq	%r12, %rdi
	callq	free
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	main, .Lfunc_end4-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z27convolution_2D_basic_kernelPiS_S_iii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z27convolution_2D_basic_kernelPiS_S_iii,@object # @_Z27convolution_2D_basic_kernelPiS_S_iii
	.section	.rodata,"a",@progbits
	.globl	_Z27convolution_2D_basic_kernelPiS_S_iii
	.p2align	3, 0x0
_Z27convolution_2D_basic_kernelPiS_S_iii:
	.quad	_Z42__device_stub__convolution_2D_basic_kernelPiS_S_iii
	.size	_Z27convolution_2D_basic_kernelPiS_S_iii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	" "
	.size	.L.str, 2

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Tiempo invertido CPU = %lf s\n"
	.size	.L.str.1, 30

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Tiempo invertido GPU = %lf s\n"
	.size	.L.str.2, 30

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"matrix"
	.size	.L.str.3, 7

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Matrices Iguales"
	.size	.L.str.4, 17

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Matrices Diferentes"
	.size	.L.str.5, 20

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z27convolution_2D_basic_kernelPiS_S_iii"
	.size	.L__unnamed_1, 41

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z42__device_stub__convolution_2D_basic_kernelPiS_S_iii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z27convolution_2D_basic_kernelPiS_S_iii
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z27convolution_2D_basic_kernelPiS_S_iii ; -- Begin function _Z27convolution_2D_basic_kernelPiS_S_iii
	.globl	_Z27convolution_2D_basic_kernelPiS_S_iii
	.p2align	8
	.type	_Z27convolution_2D_basic_kernelPiS_S_iii,@function
_Z27convolution_2D_basic_kernelPiS_S_iii: ; @_Z27convolution_2D_basic_kernelPiS_S_iii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x34
	s_load_b128 s[4:7], s[0:1], 0x18
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s5, v0
	v_cmp_gt_i32_e64 s2, s6, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_12
; %bb.1:
	s_clause 0x1
	s_load_b128 s[8:11], s[0:1], 0x0
	s_load_b64 s[12:13], s[0:1], 0x10
	s_cmp_lt_i32 s4, 1
	s_cbranch_scc1 .LBB0_10
; %bb.2:                                ; %.preheader.preheader
	s_lshr_b32 s0, s4, 31
	v_mov_b32_e32 v2, 0
	s_add_i32 s0, s4, s0
	s_mov_b32 s15, 0
	s_ashr_i32 s0, s0, 1
	s_mov_b32 s3, 0
	v_subrev_nc_u32_e32 v3, s0, v1
	v_subrev_nc_u32_e32 v5, s0, v0
	s_mov_b32 s7, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_mul_lo_u32 v4, s5, v3
.LBB0_3:                                ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_4 Depth 2
	v_add_nc_u32_e32 v6, s7, v3
	s_mov_b32 s14, s3
	s_mov_b32 s16, s4
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_lt_i32_e32 vcc_lo, -1, v6
	v_cmp_gt_i32_e64 s0, s6, v6
	v_mov_b32_e32 v6, v5
.LBB0_4:                                ;   Parent Loop BB0_3 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_and_saveexec_b32 s17, vcc_lo
	s_cbranch_execz .LBB0_8
; %bb.5:                                ;   in Loop: Header=BB0_4 Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_lt_i32_e64 s1, -1, v6
	v_cmp_gt_i32_e64 s2, s5, v6
	s_and_b32 s1, s0, s1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, s1, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s2, s1
	s_cbranch_execz .LBB0_7
; %bb.6:                                ;   in Loop: Header=BB0_4 Depth=2
	v_add_nc_u32_e32 v7, v4, v6
	s_lshl_b64 s[18:19], s[14:15], 2
	s_waitcnt lgkmcnt(0)
	s_add_u32 s18, s10, s18
	s_addc_u32 s19, s11, s19
	v_ashrrev_i32_e32 v8, 31, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 2, v[7:8]
	v_add_co_u32 v7, s1, s8, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v8, s1, s9, v8, s1
	s_load_b32 s1, s[18:19], 0x0
	global_load_b32 v9, v[7:8], off
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_mad_u64_u32 v[7:8], null, s1, v9, v[2:3]
	v_mov_b32_e32 v2, v7
.LBB0_7:                                ; %Flow
                                        ;   in Loop: Header=BB0_4 Depth=2
	s_or_b32 exec_lo, exec_lo, s2
.LBB0_8:                                ;   in Loop: Header=BB0_4 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s17
	v_add_nc_u32_e32 v6, 1, v6
	s_add_i32 s16, s16, -1
	s_add_i32 s14, s14, 1
	s_cmp_eq_u32 s16, 0
	s_cbranch_scc0 .LBB0_4
; %bb.9:                                ; %._crit_edge
                                        ;   in Loop: Header=BB0_3 Depth=1
	v_add_nc_u32_e32 v4, s5, v4
	s_add_i32 s7, s7, 1
	s_add_i32 s3, s3, s4
	s_cmp_eq_u32 s7, s4
	s_cbranch_scc0 .LBB0_3
	s_branch .LBB0_11
.LBB0_10:
	v_mov_b32_e32 v2, 0
.LBB0_11:                               ; %._crit_edge57
	v_mad_u64_u32 v[3:4], null, v1, s5, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[0:1], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s12, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s13, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB0_12:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z27convolution_2D_basic_kernelPiS_S_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z27convolution_2D_basic_kernelPiS_S_iii, .Lfunc_end0-_Z27convolution_2D_basic_kernelPiS_S_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 476
; NumSgprs: 22
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z27convolution_2D_basic_kernelPiS_S_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     22
    .sgpr_spill_count: 0
    .symbol:         _Z27convolution_2D_basic_kernelPiS_S_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
