# include <bits/stdc++.h>
# include <cuda.h>

#define TILE_WIDTH 32 //(TITLE_WIDTH = BLOCKSIZE)

using namespace std;
// ::::::::::::::::::::::::::::::::::::::::::GPU::::::::::::::::::::::::::::::::

__global__ void KernelNormalMul(float *Mat1,float *Mat2,float *Mat3,int m,int n,int p){
  int j = threadIdx.y + blockDim.y * blockIdx.y; // row
  int i = threadIdx.x + blockDim.x * blockIdx.x; // col

  if((j<m) && (i<p)){
    float value=0.0;
    for(int k=0;k<n;++k){
      value+=Mat1[n*j+k]*Mat2[p*k+i];
    }
    Mat3[p*j+i]=value;
  }
}


__global__ void  KernelTilesMul(float *Mat1,float *Mat2,float *Mat3,int rowM1,int colM1,int colM2){

  __shared__ float Mds[TILE_WIDTH][TILE_WIDTH];
  __shared__ float Nds[TILE_WIDTH][TILE_WIDTH];

  int bx = blockIdx.x;
  int by = blockIdx.y;
  int tx = threadIdx.x;
  int ty = threadIdx.y;

  int row = by * TILE_WIDTH + ty;
  int col = bx * TILE_WIDTH + tx;

  float Pvalue = 0.0;


  for(int k = 0; k < (colM1+TILE_WIDTH-1)/(TILE_WIDTH); ++k){

    if(k*TILE_WIDTH + tx < colM1 && row < rowM1){
      Mds[ty][tx] = Mat1[row*colM1 + k*TILE_WIDTH + tx];
    }else{
      Mds[ty][tx] = 0.0;
    }
    if(k*TILE_WIDTH + ty < colM1 && col < colM2){
      Nds[ty][tx] = Mat2[(k*TILE_WIDTH + ty) * colM2 + col];
    }else{
      Nds[ty][tx] =0.0;
    }

    __syncthreads();

    for(int k = 0; k < TILE_WIDTH; ++k){
      Pvalue += Mds[ty][k] * Nds[k][tx];
    }
    __syncthreads();
  }

  if (row < rowM1 && col < colM2){
    Mat3[row*colM2+col] = Pvalue;
  }

}



void d_MatrixMult(float *Mat1,float *Mat2,float *Mat3,int rowM1,int colM1,int colM2, int op ){
  float * d_Mat1;
  float * d_Mat2;
  float * d_Mat3;
  float Blocksize=TILE_WIDTH; // Bloque de 2 dimensiones 32*32=256  número de blokes= 1024 (1024/256=4)
  int size1=rowM1*colM1;
  int size2=colM1*colM2;
  int size3=rowM1*colM2;

  // 1. Separamos memoria en el device
  cudaMalloc(&d_Mat1,size1*sizeof(float));
  cudaMalloc(&d_Mat2,size2*sizeof(float));
  cudaMalloc(&d_Mat3,size3*sizeof(float));

  // 2. Copiamos el valor de las variables de host a las variables del device.
  cudaMemcpy(d_Mat1, Mat1,size1*sizeof(float),cudaMemcpyHostToDevice);
  cudaMemcpy(d_Mat2, Mat2,size2*sizeof(float),cudaMemcpyHostToDevice);
  // 3. Lógica de bloques e hilos, elementos para realizar la parelelización.
  dim3 dimGrid(ceil(colM2/Blocksize),ceil(rowM1/Blocksize),1);
  //dim3 dimGrid((m+Blocksize-1)/Blocksize,(p+Blocksize-1)/Blocksize,1);
  dim3 dimBlock(Blocksize,Blocksize,1);
  // 4. Invocación del kernel (invoción del host, ejecutadas en el device), <<<<#dimGrid,#dimBlock>>>
  if(op==1){KernelNormalMul<<<dimGrid,dimBlock>>>(d_Mat1,d_Mat2,d_Mat3,rowM1,colM1,colM2);}else{
    KernelTilesMul<<<dimGrid,dimBlock>>>(d_Mat1,d_Mat2,d_Mat3,rowM1,colM1,colM2);
  }
  // 5. Copiamos el resultado para mostrar en el I/O del host.
  cudaMemcpy (Mat3,d_Mat3,size3*sizeof(float),cudaMemcpyDeviceToHost);
  // 6. Liberamos memoria.
  cudaFree(d_Mat3);
}

// :::::::::::::::::::::::::::::::::::::::Normal::::::::::::::::::::::::::::::::


void h_Mul_Mat(float *Mat1,float *Mat2, float *Mat3,int m,int n,int p){

  for(int i=0;i<m;i++){
    for(int j=0;j<p;j++){
      float value=0.0;
      for(int k=0;k<n;k++){
        value+=Mat1[n*i+k]*Mat2[p*k+j];
      }
      Mat3[p*i+j]=value;
    }
  }
}

void llena_mat(float *Mat, float Value,int m,int n){// ver matriz como vector serial.
  int size=n*m; // matriz lineal
  for(int i =0 ; i<size ; i++){
    Mat[i]=Value;
  }
}

void mostrar_mat(float *Mat,int m,int n){//
  int size=n*m; // matriz lineal
  for (int i=0;i<size;i++) {
    if(i%n==0 && n!=0){
      cout<<endl;
    }
    cout<<"["<<Mat[i]<<"] ";
  }
  cout<<endl;
}


int check_mat(float *Mat1,float *Mat2,int m,int p){
  for(int i=0; i<(m*p);++i){
    if(Mat1[i]!=Mat2[i]){
      cout<<"Error, Las matrices no son iguales"<<endl;
      return 0;
    }
  }
  cout<<"Las Matrices son iguales"<<endl;
  return 0;
}

int check_mat_float(float *Mat1,float *Mat2,int m,int p){
  for(int i=0; i<(m*p);++i){
    if(fabs(Mat1[i]-Mat2[i]) > 0.1){
      cout<<"Error, Las matrices no son iguales"<<endl;
      return 0;
    }
  }
  cout<<"Las Matrices son iguales"<<endl;
  return 0;
}



// :::::::::::::::::::::::::::::::::::Clock Function::::::::::::::::::::::::::::

double diffclock(clock_t clock1,clock_t clock2){
  double diffticks=clock2-clock1;
  double diffms=(diffticks)/(CLOCKS_PER_SEC/1); //  /1000 mili
  return diffms;
}

// :::::::::::::::::::::::::::::::::::::::Main::::::::::::::::::::::::::::::::.

int main(){
  double T1,T2,T3; // variables de tiempo

  int rowM1=2048;
  int colM1=1024;
  int colM2=1200;
  float *Mat1 = (float*)malloc((rowM1*colM1)*sizeof(float));
  float *Mat2 = (float*)malloc((colM1*colM2)*sizeof(float));
  float *Mat3 = (float*)malloc((rowM1*colM2)*sizeof(float));
  float *Mat4 = (float*)malloc((rowM1*colM2)*sizeof(float));
  float *Mat5 = (float*)malloc((rowM1*colM2)*sizeof(float));

  llena_mat(Mat1,1.0,rowM1,colM1);
  llena_mat(Mat2,2.0,colM1,colM2);
  llena_mat(Mat3,0.0,rowM1,colM2);
  llena_mat(Mat4,0.0,rowM1,colM2);
  llena_mat(Mat5,0.0,rowM1,colM2);

  clock_t start = clock();
  h_Mul_Mat(Mat1,Mat2,Mat3,rowM1,colM1,colM2);
  clock_t end = clock();
  T1=diffclock(start,end);
  cout <<"Tiempo secuencial: "<<T1<<endl;
  //mostrar_mat(Mat3,rowM1,colM2);
  clock_t start2 = clock();
  d_MatrixMult(Mat1,Mat2,Mat4,rowM1,colM1,colM2,1); // paralelo
  clock_t end2 = clock();
  //mostrar_mat(Mat4,rowM1,colM2);
  T2=diffclock(start2,end2);
  cout <<"Tiempo Paralelo: "<<T2<<endl;
  cout<<"Aceleración lograda: "<<T1/T2<<endl;

  check_mat_float(Mat3,Mat4,rowM1,colM2);

  clock_t start3 = clock();
  d_MatrixMult(Mat1,Mat2,Mat5,rowM1,colM1,colM2,2); // tiles
  //mostrar_mat(Mat5,rowM1,colM2);
  clock_t end3 = clock();
  T3=diffclock(start3,end3);

  cout <<"Tiempo Paralelo con Tiles: "<<T3<<endl;
  cout<<"Aceleración lograda Respecto a el tiempo paralelo: "<<T2/T3<<endl;

  check_mat_float(Mat4,Mat5,rowM1,colM2);

  free(Mat1);
  free(Mat2);
  free(Mat3);
  free(Mat4);
  free(Mat5);

  return 0;
}

// http://www.techdarting.com/2014/03/matrix-multiplication-in-cuda-using.html

	.file	"tmpxft_0022c2b1_00000000-6_tiles_float.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB10835:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE10835:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.align 2
	.type	_ZNSolsEPFRSoS_E.isra.0, @function
_ZNSolsEPFRSoS_E.isra.0:
.LFB12565:
	.cfi_startproc
	jmp	*%rsi
	.cfi_endproc
.LFE12565:
	.size	_ZNSolsEPFRSoS_E.isra.0, .-_ZNSolsEPFRSoS_E.isra.0
	.globl	_Z9h_Mul_MatPfS_S_iii
	.type	_Z9h_Mul_MatPfS_S_iii, @function
_Z9h_Mul_MatPfS_S_iii:
.LFB10826:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	xorl	%r10d, %r10d
	xorl	%r11d, %r11d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%ecx, %r12d
	xorl	%ecx, %ecx
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rsi, %rbp
	movq	%rdx, %rsi
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movslq	%r9d, %rbx
	salq	$2, %rbx
.L4:
	cmpl	%r12d, %r11d
	jge	.L3
	movslq	%r10d, %rax
	leaq	(%rsi,%rax,4), %r15
	movslq	%ecx, %rax
	leaq	(%rdi,%rax,4), %r14
	xorl	%eax, %eax
.L9:
	cmpl	%eax, %r9d
	jle	.L6
	leaq	0(%rbp,%rax,4), %r13
	xorl	%edx, %edx
	xorps	%xmm0, %xmm0
.L7:
	cmpl	%edx, %r8d
	jle	.L12
	movss	(%r14,%rdx,4), %xmm1
	mulss	0(%r13), %xmm1
	incq	%rdx
	addq	%rbx, %r13
	addss	%xmm1, %xmm0
	jmp	.L7
.L12:
	movss	%xmm0, (%r15,%rax,4)
	incq	%rax
	jmp	.L9
.L6:
	incl	%r11d
	addl	%r9d, %r10d
	addl	%r8d, %ecx
	jmp	.L4
.L3:
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE10826:
	.size	_Z9h_Mul_MatPfS_S_iii, .-_Z9h_Mul_MatPfS_S_iii
	.globl	_Z9llena_matPffii
	.type	_Z9llena_matPffii, @function
_Z9llena_matPffii:
.LFB10827:
	.cfi_startproc
	endbr64
	imull	%esi, %edx
	xorl	%eax, %eax
.L14:
	cmpl	%eax, %edx
	jle	.L16
	movss	%xmm0, (%rdi,%rax,4)
	incq	%rax
	jmp	.L14
.L16:
	ret
	.cfi_endproc
.LFE10827:
	.size	_Z9llena_matPffii, .-_Z9llena_matPffii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"["
.LC2:
	.string	"] "
	.text
	.globl	_Z11mostrar_matPfii
	.type	_Z11mostrar_matPfii, @function
_Z11mostrar_matPfii:
.LFB10828:
	.cfi_startproc
	endbr64
	imull	%edx, %esi
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movq	%rdi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	leaq	_ZSt4cout(%rip), %r12
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movl	%esi, %r13d
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movl	%edx, %ebx
.L18:
	movl	%ebp, %eax
	cmpl	%ebp, %r13d
	jle	.L28
	cltd
	idivl	%ebx
	testl	%edx, %edx
	jne	.L19
	testl	%ebx, %ebx
	je	.L19
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%r12, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
.L19:
	leaq	.LC1(%rip), %rsi
	movq	%r12, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtss2sd	(%r14,%rbp,4), %xmm0
	incq	%rbp
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC2(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	jmp	.L18
.L28:
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	popq	%rbx
	.cfi_def_cfa_offset 40
	movq	%r12, %rdi
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	_ZNSolsEPFRSoS_E.isra.0
	.cfi_endproc
.LFE10828:
	.size	_Z11mostrar_matPfii, .-_Z11mostrar_matPfii
	.section	.rodata.str1.1
.LC3:
	.string	"Error, Las matrices no son iguales"
.LC4:
	.string	"Las Matrices son iguales"
	.text
	.globl	_Z9check_matPfS_ii
	.type	_Z9check_matPfS_ii, @function
_Z9check_matPfS_ii:
.LFB10829:
	.cfi_startproc
	endbr64
	imull	%ecx, %edx
	pushq	%r8
	.cfi_def_cfa_offset 16
	xorl	%eax, %eax
.L30:
	cmpl	%eax, %edx
	jle	.L38
	movss	(%rdi,%rax,4), %xmm0
	incq	%rax
	ucomiss	-4(%rsi,%rax,4), %xmm0
	jp	.L34
	je	.L30
.L34:
	leaq	.LC3(%rip), %rsi
	jmp	.L37
.L38:
	leaq	.LC4(%rip), %rsi
.L37:
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	xorl	%eax, %eax
	popq	%rdx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE10829:
	.size	_Z9check_matPfS_ii, .-_Z9check_matPfS_ii
	.globl	_Z15check_mat_floatPfS_ii
	.type	_Z15check_mat_floatPfS_ii, @function
_Z15check_mat_floatPfS_ii:
.LFB10830:
	.cfi_startproc
	endbr64
	pushq	%r8
	.cfi_def_cfa_offset 16
	imull	%ecx, %edx
	movsd	.LC6(%rip), %xmm2
	xorl	%eax, %eax
	movss	.LC5(%rip), %xmm1
.L40:
	cmpl	%eax, %edx
	jle	.L47
	movss	(%rdi,%rax,4), %xmm0
	subss	(%rsi,%rax,4), %xmm0
	incq	%rax
	andps	%xmm1, %xmm0
	cvtss2sd	%xmm0, %xmm0
	comisd	%xmm2, %xmm0
	jbe	.L40
	leaq	.LC3(%rip), %rsi
	jmp	.L46
.L47:
	leaq	.LC4(%rip), %rsi
.L46:
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	xorl	%eax, %eax
	popq	%rdx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE10830:
	.size	_Z15check_mat_floatPfS_ii, .-_Z15check_mat_floatPfS_ii
	.globl	_Z9diffclockll
	.type	_Z9diffclockll, @function
_Z9diffclockll:
.LFB10831:
	.cfi_startproc
	endbr64
	subq	%rdi, %rsi
	cvtsi2sdq	%rsi, %xmm0
	divsd	.LC7(%rip), %xmm0
	ret
	.cfi_endproc
.LFE10831:
	.size	_Z9diffclockll, .-_Z9diffclockll
	.globl	_Z42__device_stub__Z15KernelNormalMulPfS_S_iiiPfS_S_iii
	.type	_Z42__device_stub__Z15KernelNormalMulPfS_S_iiiPfS_S_iii, @function
_Z42__device_stub__Z15KernelNormalMulPfS_S_iiiPfS_S_iii:
.LFB10857:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L49
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z15KernelNormalMulPfS_S_iii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L49:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L51
	call	__stack_chk_fail@PLT
.L51:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE10857:
	.size	_Z42__device_stub__Z15KernelNormalMulPfS_S_iiiPfS_S_iii, .-_Z42__device_stub__Z15KernelNormalMulPfS_S_iiiPfS_S_iii
	.globl	_Z15KernelNormalMulPfS_S_iii
	.type	_Z15KernelNormalMulPfS_S_iii, @function
_Z15KernelNormalMulPfS_S_iii:
.LFB10858:
	.cfi_startproc
	endbr64
	jmp	_Z42__device_stub__Z15KernelNormalMulPfS_S_iiiPfS_S_iii
	.cfi_endproc
.LFE10858:
	.size	_Z15KernelNormalMulPfS_S_iii, .-_Z15KernelNormalMulPfS_S_iii
	.globl	_Z41__device_stub__Z14KernelTilesMulPfS_S_iiiPfS_S_iii
	.type	_Z41__device_stub__Z14KernelTilesMulPfS_S_iiiPfS_S_iii, @function
_Z41__device_stub__Z14KernelTilesMulPfS_S_iiiPfS_S_iii:
.LFB10859:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L54
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z14KernelTilesMulPfS_S_iii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L54:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L56
	call	__stack_chk_fail@PLT
.L56:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE10859:
	.size	_Z41__device_stub__Z14KernelTilesMulPfS_S_iiiPfS_S_iii, .-_Z41__device_stub__Z14KernelTilesMulPfS_S_iiiPfS_S_iii
	.globl	_Z14KernelTilesMulPfS_S_iii
	.type	_Z14KernelTilesMulPfS_S_iii, @function
_Z14KernelTilesMulPfS_S_iii:
.LFB10860:
	.cfi_startproc
	endbr64
	jmp	_Z41__device_stub__Z14KernelTilesMulPfS_S_iiiPfS_S_iii
	.cfi_endproc
.LFE10860:
	.size	_Z14KernelTilesMulPfS_S_iii, .-_Z14KernelTilesMulPfS_S_iii
	.globl	_Z12d_MatrixMultPfS_S_iiii
	.type	_Z12d_MatrixMultPfS_S_iiii, @function
_Z12d_MatrixMultPfS_S_iiii:
.LFB10825:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	%r8d, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	imull	%r9d, %r15d
	movl	%ecx, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	imull	%r9d, %r14d
	movq	%rdi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%r8d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movslq	%r15d, %r15
	movl	%r9d, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	salq	$2, %r15
	movslq	%r14d, %r14
	movl	%ecx, %ebx
	salq	$2, %r14
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdx, 16(%rsp)
	movl	%ecx, %edx
	leaq	40(%rsp), %rdi
	imull	%r8d, %edx
	movq	%rsi, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	movslq	%edx, %rdx
	salq	$2, %rdx
	movq	%rdx, %rsi
	movq	%rdx, 24(%rsp)
	call	cudaMalloc@PLT
	leaq	48(%rsp), %rdi
	movq	%r15, %rsi
	call	cudaMalloc@PLT
	leaq	56(%rsp), %rdi
	movq	%r14, %rsi
	call	cudaMalloc@PLT
	movq	24(%rsp), %rdx
	movq	40(%rsp), %rdi
	movq	%r13, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rsi
	movq	48(%rsp), %rdi
	movq	%r15, %rdx
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	cvtsi2ssl	%ebx, %xmm0
	mulss	.LC8(%rip), %xmm0
	call	ceilf@PLT
	movd	%xmm0, %r13d
	cvtsi2ssl	%ebp, %xmm0
	mulss	.LC8(%rip), %xmm0
	call	ceilf@PLT
	movd	%r13d, %xmm1
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	cvttss2siq	%xmm0, %rax
	movl	$1, %ecx
	movl	$1, %esi
	cmpl	$1, 160(%rsp)
	movabsq	$137438953504, %rdx
	movl	%eax, 64(%rsp)
	cvttss2siq	%xmm1, %rax
	movl	%eax, 68(%rsp)
	movq	64(%rsp), %rdi
	jne	.L60
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L62
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rsi
	movl	%ebp, %r9d
	movl	%r12d, %r8d
	movq	40(%rsp), %rdi
	movl	%ebx, %ecx
	call	_Z42__device_stub__Z15KernelNormalMulPfS_S_iiiPfS_S_iii
	jmp	.L62
.L60:
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L62
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rsi
	movl	%ebp, %r9d
	movl	%r12d, %r8d
	movq	40(%rsp), %rdi
	movl	%ebx, %ecx
	call	_Z41__device_stub__Z14KernelTilesMulPfS_S_iiiPfS_S_iii
.L62:
	movq	16(%rsp), %rdi
	movq	56(%rsp), %rsi
	movl	$2, %ecx
	movq	%r14, %rdx
	call	cudaMemcpy@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L64
	call	__stack_chk_fail@PLT
.L64:
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE10825:
	.size	_Z12d_MatrixMultPfS_S_iiii, .-_Z12d_MatrixMultPfS_S_iiii
	.section	.rodata.str1.1
.LC11:
	.string	"Tiempo secuencial: "
.LC12:
	.string	"Tiempo Paralelo: "
.LC13:
	.string	"Aceleraci\303\263n lograda: "
.LC14:
	.string	"Tiempo Paralelo con Tiles: "
.LC15:
	.string	"Aceleraci\303\263n lograda Respecto a el tiempo paralelo: "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB10832:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$8388608, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	call	malloc@PLT
	movl	$4915200, %edi
	movq	%rax, %r12
	call	malloc@PLT
	movl	$9830400, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	movl	$9830400, %edi
	movq	%rax, %r14
	call	malloc@PLT
	movl	$9830400, %edi
	movq	%rax, 8(%rsp)
	call	malloc@PLT
	movss	.LC9(%rip), %xmm0
	movq	%r12, %rdi
	movl	$1024, %edx
	movl	$2048, %esi
	movq	%rax, %r13
	call	_Z9llena_matPffii
	movss	.LC10(%rip), %xmm0
	movq	%rbp, %rdi
	movl	$1200, %edx
	movl	$1024, %esi
	call	_Z9llena_matPffii
	xorps	%xmm0, %xmm0
	movl	$2048, %esi
	movq	%r14, %rdi
	movl	$1200, %edx
	call	_Z9llena_matPffii
	movq	8(%rsp), %rdi
	movl	$1200, %edx
	call	_Z9llena_matPffii
	movq	%r13, %rdi
	movl	$1200, %edx
	call	_Z9llena_matPffii
	call	clock@PLT
	movq	%r14, %rdx
	movl	$2048, %ecx
	movq	%rbp, %rsi
	movl	$1200, %r9d
	movl	$1024, %r8d
	movq	%r12, %rdi
	movq	%rax, %r15
	call	_Z9h_Mul_MatPfS_S_iii
	call	clock@PLT
	leaq	.LC11(%rip), %rsi
	subq	%r15, %rax
	leaq	_ZSt4cout(%rip), %r15
	movq	%r15, %rdi
	cvtsi2sdq	%rax, %xmm0
	divsd	.LC7(%rip), %xmm0
	movsd	%xmm0, 24(%rsp)
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	24(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	call	clock@PLT
	movq	%rbp, %rsi
	movq	%r12, %rdi
	movl	$2048, %ecx
	movq	%rax, %rbx
	pushq	%rax
	.cfi_def_cfa_offset 104
	movl	$1200, %r9d
	movl	$1024, %r8d
	pushq	$1
	.cfi_def_cfa_offset 112
	movq	24(%rsp), %rdx
	call	_Z12d_MatrixMultPfS_S_iiii
	call	clock@PLT
	leaq	.LC12(%rip), %rsi
	movq	%r15, %rdi
	subq	%rbx, %rax
	cvtsi2sdq	%rax, %xmm0
	divsd	.LC7(%rip), %xmm0
	movsd	%xmm0, 32(%rsp)
	popq	%rdx
	.cfi_def_cfa_offset 104
	popq	%rcx
	.cfi_def_cfa_offset 96
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	16(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC13(%rip), %rsi
	movq	%r15, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	24(%rsp), %xmm0
	divsd	16(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	8(%rsp), %rsi
	movq	%r14, %rdi
	movl	$1200, %ecx
	movl	$2048, %edx
	call	_Z15check_mat_floatPfS_ii
	call	clock@PLT
	movq	%r13, %rdx
	movl	$2048, %ecx
	movq	%r12, %rdi
	pushq	%rsi
	.cfi_def_cfa_offset 104
	movl	$1200, %r9d
	movq	%rbp, %rsi
	movl	$1024, %r8d
	pushq	$2
	.cfi_def_cfa_offset 112
	movq	%rax, %rbx
	call	_Z12d_MatrixMultPfS_S_iiii
	call	clock@PLT
	leaq	.LC14(%rip), %rsi
	subq	%rbx, %rax
	cvtsi2sdq	%rax, %xmm0
	divsd	.LC7(%rip), %xmm0
	movsd	%xmm0, 40(%rsp)
	popq	%rdi
	.cfi_def_cfa_offset 104
	movq	%r15, %rdi
	popq	%r8
	.cfi_def_cfa_offset 96
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	24(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC15(%rip), %rsi
	movq	%r15, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	16(%rsp), %xmm0
	divsd	24(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	8(%rsp), %rdi
	movq	%r13, %rsi
	movl	$1200, %ecx
	movl	$2048, %edx
	call	_Z15check_mat_floatPfS_ii
	movq	%r12, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	%r14, %rdi
	call	free@PLT
	movq	8(%rsp), %rdi
	call	free@PLT
	movq	%r13, %rdi
	call	free@PLT
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE10832:
	.size	main, .-main
	.section	.rodata.str1.1
.LC16:
	.string	"_Z14KernelTilesMulPfS_S_iii"
.LC17:
	.string	"_Z15KernelNormalMulPfS_S_iii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB10862:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC16(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z14KernelTilesMulPfS_S_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC17(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z15KernelNormalMulPfS_S_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE10862:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst16,"aM",@progbits,16
	.align 16
.LC5:
	.long	2147483647
	.long	0
	.long	0
	.long	0
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC6:
	.long	-1717986918
	.long	1069128089
	.align 8
.LC7:
	.long	0
	.long	1093567616
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC8:
	.long	1023410176
	.align 4
.LC9:
	.long	1065353216
	.align 4
.LC10:
	.long	1073741824
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

# include <bits/stdc++.h>
# include <hip/hip_runtime.h>

#define TILE_WIDTH 32 //(TITLE_WIDTH = BLOCKSIZE)

using namespace std;
// ::::::::::::::::::::::::::::::::::::::::::GPU::::::::::::::::::::::::::::::::

__global__ void KernelNormalMul(float *Mat1,float *Mat2,float *Mat3,int m,int n,int p){
  int j = threadIdx.y + blockDim.y * blockIdx.y; // row
  int i = threadIdx.x + blockDim.x * blockIdx.x; // col

  if((j<m) && (i<p)){
    float value=0.0;
    for(int k=0;k<n;++k){
      value+=Mat1[n*j+k]*Mat2[p*k+i];
    }
    Mat3[p*j+i]=value;
  }
}


__global__ void  KernelTilesMul(float *Mat1,float *Mat2,float *Mat3,int rowM1,int colM1,int colM2){

  __shared__ float Mds[TILE_WIDTH][TILE_WIDTH];
  __shared__ float Nds[TILE_WIDTH][TILE_WIDTH];

  int bx = blockIdx.x;
  int by = blockIdx.y;
  int tx = threadIdx.x;
  int ty = threadIdx.y;

  int row = by * TILE_WIDTH + ty;
  int col = bx * TILE_WIDTH + tx;

  float Pvalue = 0.0;


  for(int k = 0; k < (colM1+TILE_WIDTH-1)/(TILE_WIDTH); ++k){

    if(k*TILE_WIDTH + tx < colM1 && row < rowM1){
      Mds[ty][tx] = Mat1[row*colM1 + k*TILE_WIDTH + tx];
    }else{
      Mds[ty][tx] = 0.0;
    }
    if(k*TILE_WIDTH + ty < colM1 && col < colM2){
      Nds[ty][tx] = Mat2[(k*TILE_WIDTH + ty) * colM2 + col];
    }else{
      Nds[ty][tx] =0.0;
    }

    __syncthreads();

    for(int k = 0; k < TILE_WIDTH; ++k){
      Pvalue += Mds[ty][k] * Nds[k][tx];
    }
    __syncthreads();
  }

  if (row < rowM1 && col < colM2){
    Mat3[row*colM2+col] = Pvalue;
  }

}



void d_MatrixMult(float *Mat1,float *Mat2,float *Mat3,int rowM1,int colM1,int colM2, int op ){
  float * d_Mat1;
  float * d_Mat2;
  float * d_Mat3;
  float Blocksize=TILE_WIDTH; // Bloque de 2 dimensiones 32*32=256  número de blokes= 1024 (1024/256=4)
  int size1=rowM1*colM1;
  int size2=colM1*colM2;
  int size3=rowM1*colM2;

  // 1. Separamos memoria en el device
  hipMalloc(&d_Mat1,size1*sizeof(float));
  hipMalloc(&d_Mat2,size2*sizeof(float));
  hipMalloc(&d_Mat3,size3*sizeof(float));

  // 2. Copiamos el valor de las variables de host a las variables del device.
  hipMemcpy(d_Mat1, Mat1,size1*sizeof(float),hipMemcpyHostToDevice);
  hipMemcpy(d_Mat2, Mat2,size2*sizeof(float),hipMemcpyHostToDevice);
  // 3. Lógica de bloques e hilos, elementos para realizar la parelelización.
  dim3 dimGrid(ceil(colM2/Blocksize),ceil(rowM1/Blocksize),1);
  //dim3 dimGrid((m+Blocksize-1)/Blocksize,(p+Blocksize-1)/Blocksize,1);
  dim3 dimBlock(Blocksize,Blocksize,1);
  // 4. Invocación del kernel (invoción del host, ejecutadas en el device), <<<<#dimGrid,#dimBlock>>>
  if(op==1){KernelNormalMul<<<dimGrid,dimBlock>>>(d_Mat1,d_Mat2,d_Mat3,rowM1,colM1,colM2);}else{
    KernelTilesMul<<<dimGrid,dimBlock>>>(d_Mat1,d_Mat2,d_Mat3,rowM1,colM1,colM2);
  }
  // 5. Copiamos el resultado para mostrar en el I/O del host.
  hipMemcpy (Mat3,d_Mat3,size3*sizeof(float),hipMemcpyDeviceToHost);
  // 6. Liberamos memoria.
  hipFree(d_Mat3);
}

// :::::::::::::::::::::::::::::::::::::::Normal::::::::::::::::::::::::::::::::


void h_Mul_Mat(float *Mat1,float *Mat2, float *Mat3,int m,int n,int p){

  for(int i=0;i<m;i++){
    for(int j=0;j<p;j++){
      float value=0.0;
      for(int k=0;k<n;k++){
        value+=Mat1[n*i+k]*Mat2[p*k+j];
      }
      Mat3[p*i+j]=value;
    }
  }
}

void llena_mat(float *Mat, float Value,int m,int n){// ver matriz como vector serial.
  int size=n*m; // matriz lineal
  for(int i =0 ; i<size ; i++){
    Mat[i]=Value;
  }
}

void mostrar_mat(float *Mat,int m,int n){//
  int size=n*m; // matriz lineal
  for (int i=0;i<size;i++) {
    if(i%n==0 && n!=0){
      cout<<endl;
    }
    cout<<"["<<Mat[i]<<"] ";
  }
  cout<<endl;
}


int check_mat(float *Mat1,float *Mat2,int m,int p){
  for(int i=0; i<(m*p);++i){
    if(Mat1[i]!=Mat2[i]){
      cout<<"Error, Las matrices no son iguales"<<endl;
      return 0;
    }
  }
  cout<<"Las Matrices son iguales"<<endl;
  return 0;
}

int check_mat_float(float *Mat1,float *Mat2,int m,int p){
  for(int i=0; i<(m*p);++i){
    if(fabs(Mat1[i]-Mat2[i]) > 0.1){
      cout<<"Error, Las matrices no son iguales"<<endl;
      return 0;
    }
  }
  cout<<"Las Matrices son iguales"<<endl;
  return 0;
}



// :::::::::::::::::::::::::::::::::::Clock Function::::::::::::::::::::::::::::

double diffclock(clock_t clock1,clock_t clock2){
  double diffticks=clock2-clock1;
  double diffms=(diffticks)/(CLOCKS_PER_SEC/1); //  /1000 mili
  return diffms;
}

// :::::::::::::::::::::::::::::::::::::::Main::::::::::::::::::::::::::::::::.

int main(){
  double T1,T2,T3; // variables de tiempo

  int rowM1=2048;
  int colM1=1024;
  int colM2=1200;
  float *Mat1 = (float*)malloc((rowM1*colM1)*sizeof(float));
  float *Mat2 = (float*)malloc((colM1*colM2)*sizeof(float));
  float *Mat3 = (float*)malloc((rowM1*colM2)*sizeof(float));
  float *Mat4 = (float*)malloc((rowM1*colM2)*sizeof(float));
  float *Mat5 = (float*)malloc((rowM1*colM2)*sizeof(float));

  llena_mat(Mat1,1.0,rowM1,colM1);
  llena_mat(Mat2,2.0,colM1,colM2);
  llena_mat(Mat3,0.0,rowM1,colM2);
  llena_mat(Mat4,0.0,rowM1,colM2);
  llena_mat(Mat5,0.0,rowM1,colM2);

  clock_t start = clock();
  h_Mul_Mat(Mat1,Mat2,Mat3,rowM1,colM1,colM2);
  clock_t end = clock();
  T1=diffclock(start,end);
  cout <<"Tiempo secuencial: "<<T1<<endl;
  //mostrar_mat(Mat3,rowM1,colM2);
  clock_t start2 = clock();
  d_MatrixMult(Mat1,Mat2,Mat4,rowM1,colM1,colM2,1); // paralelo
  clock_t end2 = clock();
  //mostrar_mat(Mat4,rowM1,colM2);
  T2=diffclock(start2,end2);
  cout <<"Tiempo Paralelo: "<<T2<<endl;
  cout<<"Aceleración lograda: "<<T1/T2<<endl;

  check_mat_float(Mat3,Mat4,rowM1,colM2);

  clock_t start3 = clock();
  d_MatrixMult(Mat1,Mat2,Mat5,rowM1,colM1,colM2,2); // tiles
  //mostrar_mat(Mat5,rowM1,colM2);
  clock_t end3 = clock();
  T3=diffclock(start3,end3);

  cout <<"Tiempo Paralelo con Tiles: "<<T3<<endl;
  cout<<"Aceleración lograda Respecto a el tiempo paralelo: "<<T2/T3<<endl;

  check_mat_float(Mat4,Mat5,rowM1,colM2);

  free(Mat1);
  free(Mat2);
  free(Mat3);
  free(Mat4);
  free(Mat5);

  return 0;
}

// http://www.techdarting.com/2014/03/matrix-multiplication-in-cuda-using.html

	.text
	.file	"tiles_float.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z30__device_stub__KernelNormalMulPfS_S_iii # -- Begin function _Z30__device_stub__KernelNormalMulPfS_S_iii
	.type	_Z30__device_stub__KernelNormalMulPfS_S_iii,@function
_Z30__device_stub__KernelNormalMulPfS_S_iii: # @_Z30__device_stub__KernelNormalMulPfS_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15KernelNormalMulPfS_S_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z30__device_stub__KernelNormalMulPfS_S_iii, .Lfunc_end0-_Z30__device_stub__KernelNormalMulPfS_S_iii
	.cfi_endproc
                                        # -- End function
	.globl	_Z29__device_stub__KernelTilesMulPfS_S_iii # -- Begin function _Z29__device_stub__KernelTilesMulPfS_S_iii
	.type	_Z29__device_stub__KernelTilesMulPfS_S_iii,@function
_Z29__device_stub__KernelTilesMulPfS_S_iii: # @_Z29__device_stub__KernelTilesMulPfS_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14KernelTilesMulPfS_S_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z29__device_stub__KernelTilesMulPfS_S_iii, .Lfunc_end1-_Z29__device_stub__KernelTilesMulPfS_S_iii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z12d_MatrixMultPfS_S_iiii
.LCPI2_0:
	.long	0x3d000000                      # float 0.03125
	.text
	.globl	_Z12d_MatrixMultPfS_S_iiii
	.type	_Z12d_MatrixMultPfS_S_iiii,@function
_Z12d_MatrixMultPfS_S_iiii:             # @_Z12d_MatrixMultPfS_S_iiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, %ebp
	movl	%ecx, %ebx
	movq	%rdx, 48(%rsp)                  # 8-byte Spill
	movq	%rsi, 40(%rsp)                  # 8-byte Spill
	movq	%rdi, 32(%rsp)                  # 8-byte Spill
	movl	%r8d, %eax
	imull	%ecx, %eax
	movl	%r9d, %r15d
	movl	%r8d, 4(%rsp)                   # 4-byte Spill
	imull	%r8d, %r15d
	movl	%r9d, %r12d
	imull	%ecx, %r12d
	movslq	%eax, %r14
	shlq	$2, %r14
	leaq	16(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movslq	%r15d, %r13
	shlq	$2, %r13
	leaq	24(%rsp), %r15
	movq	%r15, %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	movslq	%r12d, %r12
	shlq	$2, %r12
	leaq	8(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	leaq	16(%rsp), %rax
	movq	(%rax), %rdi
	movq	32(%rsp), %rsi                  # 8-byte Reload
	movq	%r14, %rdx
	movl	%ebx, %r14d
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r15), %rdi
	movq	40(%rsp), %rsi                  # 8-byte Reload
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	cvtsi2ss	%ebp, %xmm0
	mulss	.LCPI2_0(%rip), %xmm0
	callq	ceilf@PLT
	cvttss2si	%xmm0, %rbx
	xorps	%xmm0, %xmm0
	cvtsi2ss	%r14d, %xmm0
	mulss	.LCPI2_0(%rip), %xmm0
	callq	ceilf@PLT
	cvttss2si	%xmm0, %rdi
	movl	%ebx, %eax
	shlq	$32, %rdi
	orq	%rax, %rdi
	movabsq	$137438953504, %rdx             # imm = 0x2000000020
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	cmpl	$1, 112(%rsp)
	jne	.LBB2_3
# %bb.1:
	testl	%eax, %eax
	jne	.LBB2_5
# %bb.2:
	movq	16(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	8(%rsp), %rdx
	movl	%r14d, %ecx
	movl	4(%rsp), %r8d                   # 4-byte Reload
	movl	%ebp, %r9d
	callq	_Z30__device_stub__KernelNormalMulPfS_S_iii
	jmp	.LBB2_5
.LBB2_3:
	testl	%eax, %eax
	jne	.LBB2_5
# %bb.4:
	movq	16(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	8(%rsp), %rdx
	movl	%r14d, %ecx
	movl	4(%rsp), %r8d                   # 4-byte Reload
	movl	%ebp, %r9d
	callq	_Z29__device_stub__KernelTilesMulPfS_S_iii
.LBB2_5:
	movq	8(%rsp), %rsi
	movq	48(%rsp), %rdi                  # 8-byte Reload
	movq	%r12, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	callq	hipFree
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z12d_MatrixMultPfS_S_iiii, .Lfunc_end2-_Z12d_MatrixMultPfS_S_iiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z9h_Mul_MatPfS_S_iii           # -- Begin function _Z9h_Mul_MatPfS_S_iii
	.type	_Z9h_Mul_MatPfS_S_iii,@function
_Z9h_Mul_MatPfS_S_iii:                  # @_Z9h_Mul_MatPfS_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, -8(%rsp)                  # 8-byte Spill
	movq	%rsi, -16(%rsp)                 # 8-byte Spill
	movq	%rdi, -24(%rsp)                 # 8-byte Spill
	testl	%ecx, %ecx
	jle	.LBB3_9
# %bb.1:                                # %.preheader27.lr.ph
	movslq	%r9d, %rdi
	movl	%ecx, %ecx
	movl	%edi, %r10d
	movl	%r8d, %r11d
	leaq	(,%rdi,4), %rbx
	xorl	%r14d, %r14d
	xorl	%r15d, %r15d
.LBB3_2:                                # %.preheader27
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_4 Depth 2
                                        #       Child Loop BB3_6 Depth 3
	testl	%r9d, %r9d
	jle	.LBB3_8
# %bb.3:                                # %.preheader.lr.ph
                                        #   in Loop: Header=BB3_2 Depth=1
	movl	%r14d, %eax
	movq	-24(%rsp), %rdx                 # 8-byte Reload
	leaq	(%rdx,%rax,4), %r12
	movq	%r15, %rax
	imulq	%rdi, %rax
	movq	-8(%rsp), %rdx                  # 8-byte Reload
	leaq	(%rdx,%rax,4), %r13
	movq	-16(%rsp), %rsi                 # 8-byte Reload
	xorl	%eax, %eax
.LBB3_4:                                # %.preheader
                                        #   Parent Loop BB3_2 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB3_6 Depth 3
	xorps	%xmm0, %xmm0
	testl	%r8d, %r8d
	jle	.LBB3_7
# %bb.5:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB3_4 Depth=2
	movq	%rsi, %rbp
	xorl	%edx, %edx
.LBB3_6:                                # %.lr.ph
                                        #   Parent Loop BB3_2 Depth=1
                                        #     Parent Loop BB3_4 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movss	(%r12,%rdx,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	mulss	(%rbp), %xmm1
	addss	%xmm1, %xmm0
	incq	%rdx
	addq	%rbx, %rbp
	cmpq	%rdx, %r11
	jne	.LBB3_6
.LBB3_7:                                # %._crit_edge
                                        #   in Loop: Header=BB3_4 Depth=2
	movss	%xmm0, (%r13,%rax,4)
	incq	%rax
	addq	$4, %rsi
	cmpq	%r10, %rax
	jne	.LBB3_4
.LBB3_8:                                # %._crit_edge31
                                        #   in Loop: Header=BB3_2 Depth=1
	incq	%r15
	addl	%r8d, %r14d
	cmpq	%rcx, %r15
	jne	.LBB3_2
.LBB3_9:                                # %._crit_edge33
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z9h_Mul_MatPfS_S_iii, .Lfunc_end3-_Z9h_Mul_MatPfS_S_iii
	.cfi_endproc
                                        # -- End function
	.globl	_Z9llena_matPffii               # -- Begin function _Z9llena_matPffii
	.type	_Z9llena_matPffii,@function
_Z9llena_matPffii:                      # @_Z9llena_matPffii
	.cfi_startproc
# %bb.0:
	imull	%edx, %esi
	testl	%esi, %esi
	jle	.LBB4_3
# %bb.1:                                # %.lr.ph.preheader
	movl	%esi, %eax
	xorl	%ecx, %ecx
.LBB4_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movss	%xmm0, (%rdi,%rcx,4)
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB4_2
.LBB4_3:                                # %._crit_edge
	retq
.Lfunc_end4:
	.size	_Z9llena_matPffii, .Lfunc_end4-_Z9llena_matPffii
	.cfi_endproc
                                        # -- End function
	.globl	_Z11mostrar_matPfii             # -- Begin function _Z11mostrar_matPfii
	.type	_Z11mostrar_matPfii,@function
_Z11mostrar_matPfii:                    # @_Z11mostrar_matPfii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	imull	%edx, %esi
	testl	%esi, %esi
	jle	.LBB5_5
# %bb.1:                                # %.lr.ph.preheader
	movl	%edx, %ebx
	movq	%rdi, %r14
	movl	%esi, %r12d
	xorl	%r15d, %r15d
	movl	$_ZSt4cout, %r13d
.LBB5_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	%r15d, %eax
	cltd
	idivl	%ebx
	testl	%edx, %edx
	jne	.LBB5_4
# %bb.3:                                #   in Loop: Header=BB5_2 Depth=1
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%r13, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.LBB5_4:                                #   in Loop: Header=BB5_2 Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r14,%r15,4), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.1, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	incq	%r15
	cmpq	%r15, %r12
	jne	.LBB5_2
.LBB5_5:                                # %._crit_edge
	movq	_ZSt4cout(%rip), %rax
	movl	$_ZSt4cout, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_ZNSo5flushEv                   # TAILCALL
.Lfunc_end5:
	.size	_Z11mostrar_matPfii, .Lfunc_end5-_Z11mostrar_matPfii
	.cfi_endproc
                                        # -- End function
	.globl	_Z9check_matPfS_ii              # -- Begin function _Z9check_matPfS_ii
	.type	_Z9check_matPfS_ii,@function
_Z9check_matPfS_ii:                     # @_Z9check_matPfS_ii
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	imull	%ecx, %edx
	testl	%edx, %edx
	jle	.LBB6_5
# %bb.1:                                # %.lr.ph.preheader
	movl	%edx, %eax
	xorl	%ecx, %ecx
.LBB6_3:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movss	(%rdi,%rcx,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	ucomiss	(%rsi,%rcx,4), %xmm0
	jne	.LBB6_4
	jp	.LBB6_4
# %bb.2:                                #   in Loop: Header=BB6_3 Depth=1
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB6_3
.LBB6_5:                                # %._crit_edge
	movl	$_ZSt4cout, %edi
	movl	$.L.str.3, %esi
	movl	$24, %edx
	jmp	.LBB6_6
.LBB6_4:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.2, %esi
	movl	$34, %edx
.LBB6_6:
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movl	$_ZSt4cout, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	xorl	%eax, %eax
	popq	%rcx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z9check_matPfS_ii, .Lfunc_end6-_Z9check_matPfS_ii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function _Z15check_mat_floatPfS_ii
.LCPI7_0:
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI7_1:
	.quad	0x3fb999999999999a              # double 0.10000000000000001
	.text
	.globl	_Z15check_mat_floatPfS_ii
	.type	_Z15check_mat_floatPfS_ii,@function
_Z15check_mat_floatPfS_ii:              # @_Z15check_mat_floatPfS_ii
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	imull	%ecx, %edx
	testl	%edx, %edx
	jle	.LBB7_5
# %bb.1:                                # %.lr.ph.preheader
	movl	%edx, %eax
	xorl	%ecx, %ecx
	movaps	.LCPI7_0(%rip), %xmm0           # xmm0 = [NaN,NaN,NaN,NaN]
	movsd	.LCPI7_1(%rip), %xmm1           # xmm1 = mem[0],zero
.LBB7_3:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movss	(%rdi,%rcx,4), %xmm2            # xmm2 = mem[0],zero,zero,zero
	subss	(%rsi,%rcx,4), %xmm2
	andps	%xmm0, %xmm2
	cvtss2sd	%xmm2, %xmm2
	ucomisd	%xmm1, %xmm2
	ja	.LBB7_4
# %bb.2:                                #   in Loop: Header=BB7_3 Depth=1
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB7_3
.LBB7_5:                                # %._crit_edge
	movl	$_ZSt4cout, %edi
	movl	$.L.str.3, %esi
	movl	$24, %edx
	jmp	.LBB7_6
.LBB7_4:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.2, %esi
	movl	$34, %edx
.LBB7_6:
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movl	$_ZSt4cout, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	xorl	%eax, %eax
	popq	%rcx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	_Z15check_mat_floatPfS_ii, .Lfunc_end7-_Z15check_mat_floatPfS_ii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z9diffclockll
.LCPI8_0:
	.quad	0x412e848000000000              # double 1.0E+6
	.text
	.globl	_Z9diffclockll
	.type	_Z9diffclockll,@function
_Z9diffclockll:                         # @_Z9diffclockll
	.cfi_startproc
# %bb.0:
	subq	%rdi, %rsi
	cvtsi2sd	%rsi, %xmm0
	divsd	.LCPI8_0(%rip), %xmm0
	retq
.Lfunc_end8:
	.size	_Z9diffclockll, .Lfunc_end8-_Z9diffclockll
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI9_0:
	.quad	0x412e848000000000              # double 1.0E+6
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$8388608, %edi                  # imm = 0x800000
	callq	malloc
	movq	%rax, %rbx
	movl	$4915200, %edi                  # imm = 0x4B0000
	callq	malloc
	movq	%rax, %r14
	movl	$9830400, %edi                  # imm = 0x960000
	callq	malloc
	movq	%rax, %r15
	movl	$9830400, %edi                  # imm = 0x960000
	callq	malloc
	movq	%rax, %r12
	movl	$9830400, %edi                  # imm = 0x960000
	callq	malloc
	movq	%rax, %rbp
	xorl	%eax, %eax
.LBB9_1:                                # %.lr.ph.i
                                        # =>This Inner Loop Header: Depth=1
	movl	$1065353216, (%rbx,%rax,4)      # imm = 0x3F800000
	incq	%rax
	cmpq	$2097152, %rax                  # imm = 0x200000
	jne	.LBB9_1
# %bb.2:                                # %.lr.ph.i68.preheader
	xorl	%eax, %eax
.LBB9_3:                                # %.lr.ph.i68
                                        # =>This Inner Loop Header: Depth=1
	movl	$1073741824, (%r14,%rax,4)      # imm = 0x40000000
	incq	%rax
	cmpq	$1228800, %rax                  # imm = 0x12C000
	jne	.LBB9_3
# %bb.4:                                # %.lr.ph.i73.preheader
	xorl	%r13d, %r13d
	movl	$9830400, %edx                  # imm = 0x960000
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	movl	$9830400, %edx                  # imm = 0x960000
	movq	%r12, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	movl	$9830400, %edx                  # imm = 0x960000
	movq	%rbp, 32(%rsp)                  # 8-byte Spill
	movq	%rbp, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	callq	clock
	movq	%rax, %rbp
	movq	%rbx, %rax
.LBB9_5:                                # %.preheader27.i
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB9_6 Depth 2
                                        #       Child Loop BB9_7 Depth 3
	imulq	$4800, %r13, %rcx               # imm = 0x12C0
	addq	%r15, %rcx
	movq	%r14, %rdx
	xorl	%esi, %esi
.LBB9_6:                                # %.preheader.i
                                        #   Parent Loop BB9_5 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB9_7 Depth 3
	xorps	%xmm0, %xmm0
	movq	%rdx, %rdi
	xorl	%r8d, %r8d
.LBB9_7:                                # %.lr.ph.i88
                                        #   Parent Loop BB9_5 Depth=1
                                        #     Parent Loop BB9_6 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movss	(%rax,%r8,4), %xmm1             # xmm1 = mem[0],zero,zero,zero
	mulss	(%rdi), %xmm1
	addss	%xmm1, %xmm0
	incq	%r8
	addq	$4800, %rdi                     # imm = 0x12C0
	cmpq	$1024, %r8                      # imm = 0x400
	jne	.LBB9_7
# %bb.8:                                # %._crit_edge.i
                                        #   in Loop: Header=BB9_6 Depth=2
	movss	%xmm0, (%rcx,%rsi,4)
	incq	%rsi
	addq	$4, %rdx
	cmpq	$1200, %rsi                     # imm = 0x4B0
	jne	.LBB9_6
# %bb.9:                                # %._crit_edge31.i
                                        #   in Loop: Header=BB9_5 Depth=1
	incq	%r13
	addq	$4096, %rax                     # imm = 0x1000
	cmpq	$2048, %r13                     # imm = 0x800
	jne	.LBB9_5
# %bb.10:                               # %_Z9h_Mul_MatPfS_S_iii.exit
	callq	clock
	subq	%rbp, %rax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI9_0(%rip), %xmm0
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.4, %esi
	movl	$19, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbp
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbp, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbp, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	callq	clock
	movq	%rax, %rbp
	movl	$1, (%rsp)
	movq	%rbx, %rdi
	movq	%r14, %rsi
	movq	%r12, %rdx
	movl	$2048, %ecx                     # imm = 0x800
	movl	$1024, %r8d                     # imm = 0x400
	movl	$1200, %r9d                     # imm = 0x4B0
	callq	_Z12d_MatrixMultPfS_S_iiii
	callq	clock
	subq	%rbp, %rax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI9_0(%rip), %xmm0
	movsd	%xmm0, 24(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.5, %esi
	movl	$17, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movsd	24(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbp
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbp, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbp, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$_ZSt4cout, %edi
	movl	$.L.str.6, %esi
	movl	$22, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	divsd	24(%rsp), %xmm0                 # 8-byte Folded Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbp
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbp, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbp, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	%r15, %rdi
	movq	%r12, %rsi
	movl	$2048, %edx                     # imm = 0x800
	movl	$1200, %ecx                     # imm = 0x4B0
	callq	_Z15check_mat_floatPfS_ii
	callq	clock
	movq	%rax, %rbp
	movl	$2, (%rsp)
	movq	%rbx, %rdi
	movq	%r14, %rsi
	movq	32(%rsp), %r13                  # 8-byte Reload
	movq	%r13, %rdx
	movl	$2048, %ecx                     # imm = 0x800
	movl	$1024, %r8d                     # imm = 0x400
	movl	$1200, %r9d                     # imm = 0x4B0
	callq	_Z12d_MatrixMultPfS_S_iiii
	callq	clock
	subq	%rbp, %rax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI9_0(%rip), %xmm0
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.7, %esi
	movl	$27, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbp
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbp, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbp, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$_ZSt4cout, %edi
	movl	$.L.str.8, %esi
	movl	$52, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	24(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	divsd	16(%rsp), %xmm0                 # 8-byte Folded Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbp
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbp, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbp, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	%r12, %rdi
	movq	%r13, %rsi
	movl	$2048, %edx                     # imm = 0x800
	movl	$1200, %ecx                     # imm = 0x4B0
	callq	_Z15check_mat_floatPfS_ii
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	movq	%r12, %rdi
	callq	free
	movq	%r13, %rdi
	callq	free
	xorl	%eax, %eax
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end9:
	.size	main, .Lfunc_end9-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB10_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB10_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15KernelNormalMulPfS_S_iii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14KernelTilesMulPfS_S_iii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end10:
	.size	__hip_module_ctor, .Lfunc_end10-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB11_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB11_2:
	retq
.Lfunc_end11:
	.size	__hip_module_dtor, .Lfunc_end11-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z15KernelNormalMulPfS_S_iii,@object # @_Z15KernelNormalMulPfS_S_iii
	.section	.rodata,"a",@progbits
	.globl	_Z15KernelNormalMulPfS_S_iii
	.p2align	3, 0x0
_Z15KernelNormalMulPfS_S_iii:
	.quad	_Z30__device_stub__KernelNormalMulPfS_S_iii
	.size	_Z15KernelNormalMulPfS_S_iii, 8

	.type	_Z14KernelTilesMulPfS_S_iii,@object # @_Z14KernelTilesMulPfS_S_iii
	.globl	_Z14KernelTilesMulPfS_S_iii
	.p2align	3, 0x0
_Z14KernelTilesMulPfS_S_iii:
	.quad	_Z29__device_stub__KernelTilesMulPfS_S_iii
	.size	_Z14KernelTilesMulPfS_S_iii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"["
	.size	.L.str, 2

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"] "
	.size	.L.str.1, 3

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Error, Las matrices no son iguales"
	.size	.L.str.2, 35

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Las Matrices son iguales"
	.size	.L.str.3, 25

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Tiempo secuencial: "
	.size	.L.str.4, 20

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Tiempo Paralelo: "
	.size	.L.str.5, 18

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Aceleraci\303\263n lograda: "
	.size	.L.str.6, 23

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"Tiempo Paralelo con Tiles: "
	.size	.L.str.7, 28

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"Aceleraci\303\263n lograda Respecto a el tiempo paralelo: "
	.size	.L.str.8, 53

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z15KernelNormalMulPfS_S_iii"
	.size	.L__unnamed_1, 29

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z14KernelTilesMulPfS_S_iii"
	.size	.L__unnamed_2, 28

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z30__device_stub__KernelNormalMulPfS_S_iii
	.addrsig_sym _Z29__device_stub__KernelTilesMulPfS_S_iii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z15KernelNormalMulPfS_S_iii
	.addrsig_sym _Z14KernelTilesMulPfS_S_iii
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z15KernelNormalMulPfS_S_iii ; -- Begin function _Z15KernelNormalMulPfS_S_iii
	.globl	_Z15KernelNormalMulPfS_S_iii
	.p2align	8
	.type	_Z15KernelNormalMulPfS_S_iii,@function
_Z15KernelNormalMulPfS_S_iii:           ; @_Z15KernelNormalMulPfS_S_iii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x34
	s_load_b128 s[4:7], s[0:1], 0x18
	v_bfe_u32 v2, v0, 10, 10
	v_and_b32_e32 v3, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[0:1], null, s15, s3, v[2:3]
	v_mad_u64_u32 v[1:2], null, s14, s2, v[3:4]
	v_cmp_gt_i32_e32 vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s2, s6, v1
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_6
; %bb.1:                                ; %.preheader
	s_clause 0x1
	s_load_b128 s[8:11], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_cmp_lt_i32 s5, 1
	s_cbranch_scc1 .LBB0_4
; %bb.2:                                ; %.lr.ph
	v_mul_lo_u32 v2, v0, s5
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v4, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s8, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s9, v3, vcc_lo
.LBB0_3:                                ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v5, 31, v4
	s_add_i32 s5, s5, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_eq_u32 s5, 0
	v_lshlrev_b64 v[7:8], 2, v[4:5]
	v_add_nc_u32_e32 v4, s6, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v7, vcc_lo, s10, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s11, v8, vcc_lo
	global_load_b32 v5, v[2:3], off
	global_load_b32 v7, v[7:8], off
	v_add_co_u32 v2, vcc_lo, v2, 4
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v6, v5, v7
	s_cbranch_scc0 .LBB0_3
	s_branch .LBB0_5
.LBB0_4:
	v_mov_b32_e32 v6, 0
.LBB0_5:                                ; %Flow54
	v_mad_u64_u32 v[2:3], null, v0, s6, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v6, off
.LBB0_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15KernelNormalMulPfS_S_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z15KernelNormalMulPfS_S_iii, .Lfunc_end0-_Z15KernelNormalMulPfS_S_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 340
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z14KernelTilesMulPfS_S_iii ; -- Begin function _Z14KernelTilesMulPfS_S_iii
	.globl	_Z14KernelTilesMulPfS_S_iii
	.p2align	8
	.type	_Z14KernelTilesMulPfS_S_iii,@function
_Z14KernelTilesMulPfS_S_iii:            ; @_Z14KernelTilesMulPfS_S_iii
; %bb.0:
	s_clause 0x2
	s_load_b128 s[4:7], s[0:1], 0x18
	s_load_b128 s[8:11], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x10
	v_bfe_u32 v3, v0, 10, 10
	v_and_b32_e32 v4, 0x3ff, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshl_add_u32 v1, s15, 5, v3
	v_lshl_add_u32 v0, s14, 5, v4
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s4, v1
	v_cmp_gt_i32_e64 s0, s6, v0
	s_cmp_lt_i32 s5, 1
	s_cbranch_scc1 .LBB1_9
; %bb.1:                                ; %.lr.ph
	v_lshlrev_b32_e32 v2, 2, v4
	v_lshlrev_b32_e32 v5, 7, v3
	v_mul_lo_u32 v7, v1, s5
	s_add_i32 s1, s5, 31
	s_mov_b32 s12, 0
	v_or_b32_e32 v6, 0x1000, v2
	v_add_nc_u32_e32 v8, v5, v2
	v_mov_b32_e32 v2, 0
	s_lshr_b32 s7, s1, 5
	s_delay_alu instid0(VALU_DEP_3)
	v_add_nc_u32_e32 v9, v6, v5
.LBB1_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_7 Depth 2
	s_lshl_b32 s13, s12, 5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v10, 0 :: v_dual_add_nc_u32 v11, s13, v4
	v_cmp_gt_i32_e64 s1, s5, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, s1, vcc_lo
	s_and_saveexec_b32 s14, s1
	s_cbranch_execz .LBB1_4
; %bb.3:                                ;   in Loop: Header=BB1_2 Depth=1
	v_add_nc_u32_e32 v10, v11, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v11, 31, v10
	v_lshlrev_b64 v[10:11], 2, v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v10, s1, s8, v10
	v_add_co_ci_u32_e64 v11, s1, s9, v11, s1
	global_load_b32 v10, v[10:11], off
.LBB1_4:                                ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s14
	v_dual_mov_b32 v12, 0 :: v_dual_add_nc_u32 v11, s13, v3
	s_waitcnt vmcnt(0)
	ds_store_b32 v8, v10
	v_cmp_gt_i32_e64 s1, s5, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, s1, s0
	s_and_saveexec_b32 s13, s1
	s_cbranch_execz .LBB1_6
; %bb.5:                                ;   in Loop: Header=BB1_2 Depth=1
	v_mad_u64_u32 v[12:13], null, v11, s6, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v13, 31, v12
	v_lshlrev_b64 v[10:11], 2, v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v10, s1, s10, v10
	v_add_co_ci_u32_e64 v11, s1, s11, v11, s1
	global_load_b32 v12, v[10:11], off
.LBB1_6:                                ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
	v_mov_b32_e32 v10, v6
	s_mov_b32 s1, 0
	s_waitcnt vmcnt(0)
	ds_store_b32 v9, v12
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB1_7:                                ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_nc_u32_e32 v11, s1, v5
	s_add_i32 s1, s1, 4
	ds_load_b32 v12, v10
	ds_load_b32 v11, v11
	v_add_nc_u32_e32 v10, 0x80, v10
	s_cmpk_eq_i32 s1, 0x80
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v2, v11, v12
	s_cbranch_scc0 .LBB1_7
; %bb.8:                                ;   in Loop: Header=BB1_2 Depth=1
	s_add_i32 s12, s12, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s12, s7
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB1_2
	s_branch .LBB1_10
.LBB1_9:
	v_mov_b32_e32 v2, 0
.LBB1_10:                               ; %Flow92
	v_cmp_gt_i32_e32 vcc_lo, s4, v1
	v_cmp_gt_i32_e64 s0, s6, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s0
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_12
; %bb.11:
	v_mad_u64_u32 v[3:4], null, v1, s6, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[0:1], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB1_12:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14KernelTilesMulPfS_S_iii
		.amdhsa_group_segment_fixed_size 8192
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 36
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z14KernelTilesMulPfS_S_iii, .Lfunc_end1-_Z14KernelTilesMulPfS_S_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 544
; NumSgprs: 18
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 8192 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15KernelNormalMulPfS_S_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z15KernelNormalMulPfS_S_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 8192
    .kernarg_segment_align: 8
    .kernarg_segment_size: 36
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z14KernelTilesMulPfS_S_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z14KernelTilesMulPfS_S_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     14
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
