#include <iostream>
#include <complex>
#include <math.h>
#include <thrust/complex.h>
#include <sys/time.h>
#include <cassert>

using namespace std;

__constant__ const int block_1 = 16;
__constant__ const int block_2 = 8;


void checkError(){
	cudaError_t errSync  = cudaGetLastError();
	cudaError_t errAsync = cudaDeviceSynchronize();
	if (errSync != cudaSuccess) 
	  printf("Sync kernel error: %s\n", cudaGetErrorString(errSync));
	if (errAsync != cudaSuccess)
	  printf("Async kernel error: %s\n", cudaGetErrorString(errAsync));
}

__global__
void fft_16(thrust::complex<double> *x, int l){
	const int n = block_1;
	int blidx = blockIdx.x, blidy = blockIdx.y;
	int k = blidx*l+blidy;
	int step = l/n;
	extern __shared__ thrust::complex<double> temp[];
	int thid = threadIdx.x;
	int pout=0, pin=1;
	temp[pout*n + thid] = x[k+thid*step];
	__syncthreads();
	int thid1;
	thid1 = 0;
	int b = __log2f(n+1);
	for(int i=0; i<b;i++){
	  if(thid & (1<<i))
	    thid1 |= (1<<(b-1-i));
	}
	pout = 1 - pout;
	pin = 1 - pin;
	temp[pout*n + thid] = temp[pin*n + thid1];
	__syncthreads();

	for(int i=1; i<n; i*=2){
		pout = 1 - pout;
		pin = 1 - pin;
		thid1 = thid ^ i;
		thrust::complex<double> factor(cos(-M_PI*thid/i), sin(-M_PI*thid/i));
		if(thid1 > thid){
			temp[pout*n + thid] = temp[pin*n + thid] + factor * temp[pin*n + thid1];
		}
		else{
			temp[pout*n + thid] = temp[pin*n + thid1] + factor * temp[pin*n + thid];
		}
		__syncthreads();
	}
	thrust::complex<double> factor = thrust::complex<double>(cos(-M_PI*2*thid*blidy/l), sin(-M_PI*2*thid*blidy/l));
	x[k+thid*step] = factor * temp[pout*n + thid];
}

__global__
void fft_8(thrust::complex<double> *x, int l){
	const int n = block_2;
	int blidx = blockIdx.x, blidy = blockIdx.y;
	int k = blidx*l+blidy;
	int step = l/n;
	extern __shared__ thrust::complex<double> temp[];
	int thid = threadIdx.x;
	int pout=0, pin=1;
	temp[pout*n + thid] = x[k+thid*step];
	__syncthreads();
	int thid1;
	thid1 = 0;
	int b = __log2f(n+1);
	for(int i=0; i<b;i++){
	  if(thid & (1<<i))
	    thid1 |= (1<<(b-1-i));
	}
	pout = 1 - pout;
	pin = 1 - pin;
	temp[pout*n + thid] = temp[pin*n + thid1];
	__syncthreads();

	for(int i=1; i<n; i*=2){
		pout = 1 - pout;
		pin = 1 - pin;
		thid1 = thid ^ i;
		thrust::complex<double> factor(cos(-M_PI*thid/i), sin(-M_PI*thid/i));
		if(thid1 > thid){
			temp[pout*n + thid] = temp[pin*n + thid] + factor * temp[pin*n + thid1];
		}
		else{
			temp[pout*n + thid] = temp[pin*n + thid1] + factor * temp[pin*n + thid];
		}
		__syncthreads();
	}
	thrust::complex<double> factor = thrust::complex<double>(cos(-M_PI*2*thid*blidy/l), sin(-M_PI*2*thid*blidy/l));
	x[k+thid*step] = factor * temp[pout*n + thid];
}

__global__
void fft_last(thrust::complex<double> *x, thrust::complex<double> *y, int x1, int x2){
	const int n = block_1;
	int blidx = blockIdx.x;
	int l=block_1, blidy=0;
	int k = blidx*l+blidy;
	int step = l/n;
	extern __shared__ thrust::complex<double> temp[];
	int thid = threadIdx.x;
	int pout=0, pin=1;
	temp[pout*n + thid] = x[k+thid*step];
	__syncthreads();
	int thid1;
	thid1 = 0;
	int b = __log2f(n+1);
	for(int i=0; i<b;i++){
	  if(thid & (1<<i))
	    thid1 |= (1<<(b-1-i));
	}
	pout = 1 - pout;
	pin = 1 - pin;
	temp[pout*n + thid] = temp[pin*n + thid1];
	__syncthreads();

	for(int i=1; i<n; i*=2){
		pout = 1 - pout;
		pin = 1 - pin;
		thid1 = thid ^ i;
		thrust::complex<double> factor(cos(-M_PI*thid/i), sin(-M_PI*thid/i));
		if(thid1 > thid){
			temp[pout*n + thid] = temp[pin*n + thid] + factor * temp[pin*n + thid1];
		}
		else{
			temp[pout*n + thid] = temp[pin*n + thid1] + factor * temp[pin*n + thid];
		}
		__syncthreads();
	}

	int p = blidx;
	int j = thid;
	int loc = j;
	for(int k=0; k<x2; k++){
		int t = p&(block_2-1);
		loc = loc*block_2+t;
		p = p/block_2;
	}
	for(int k=0; k<x1-1; k++){
		int t = p&(block_1-1);
		loc = loc*block_1+t;
		p = p/block_1;
	}

	y[loc] = temp[pout*n + thid];
}

void fft(thrust::complex<double> *x, thrust::complex<double> *y, int n){
	int m = log2(n+1);
	int x1,x2, log_block_1=log2(block_1+1), log_block_2=log2(block_2+1);
	for(int i=0; i<log_block_1; i++){
		if((m-log_block_2*i)%log_block_1 == 0){
			x1 = (m-log_block_2*i)/log_block_1;
			x2=i;
		}
	}
	int l = n;
	for(int i=0; i<x1-1; i++){
		dim3 grid(n/l, l/block_1, 1);
		dim3 block(block_1,1,1);
		fft_16<<<grid, block, 2*block_1*sizeof(thrust::complex<double>)>>>(x, l);
		checkError();
		l/=block_1;
	}
	for(int i=0; i<x2; i++){
		dim3 grid(n/l, l/block_2, 1);
		dim3 block(block_2,1,1);
		fft_8<<<grid, block, 2*block_2*sizeof(thrust::complex<double>)>>>(x, l);
		checkError();
		l/=block_2;
	}
	assert(l==block_1);
	dim3 grid(n/l, 1, 1);
	dim3 block(block_1,1,1);
	fft_last<<<grid, block, 2*block_1*sizeof(thrust::complex<double>)>>>(x, y, x1, x2);
}


int main(){
	int n;
	cin>>n;
	thrust::complex<double> *x, *y;
	cudaMallocManaged(&x, n*sizeof(thrust::complex<double>));
	cudaMallocManaged(&y, n*sizeof(thrust::complex<double>));
	for(int i=0; i<n; i++){
		int t,u; cin>>t>>u;
		x[i] = thrust::complex<double>(t, u);
	}
	
	cudaEvent_t start, stop;
	cudaEventCreate(&start);
	cudaEventCreate(&stop);
	cudaEventRecord(start);
	
	fft(x, y, n);

	checkError();
	cudaEventRecord(stop);
	cudaEventSynchronize(stop);
	float milliseconds = 0;
	cudaEventElapsedTime(&milliseconds, start, stop);
	cout<<milliseconds;
	for(int i=0; i<n; i++){
		// if(i%(n/block_1)==0) cout<<endl;
		// cout<<y[i]<<"\n";
	}
}
	.file	"tmpxft_002a8da8_00000000-6_cooley-tukey-parallel.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB5946:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE5946:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Sync kernel error: %s\n"
.LC1:
	.string	"Async kernel error: %s\n"
	.text
	.globl	_Z10checkErrorv
	.type	_Z10checkErrorv, @function
_Z10checkErrorv:
.LFB5940:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	pushq	%rsi
	.cfi_def_cfa_offset 32
	call	cudaGetLastError@PLT
	movl	%eax, %ebp
	call	cudaDeviceSynchronize@PLT
	movl	%eax, %ebx
	testl	%ebp, %ebp
	je	.L3
	movl	%ebp, %edi
	call	cudaGetErrorString@PLT
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rdx
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L3:
	testl	%ebx, %ebx
	je	.L2
	movl	%ebx, %edi
	call	cudaGetErrorString@PLT
	popq	%rcx
	.cfi_remember_state
	.cfi_def_cfa_offset 24
	movl	$2, %edi
	popq	%rbx
	.cfi_def_cfa_offset 16
	movq	%rax, %rdx
	leaq	.LC1(%rip), %rsi
	xorl	%eax, %eax
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	__printf_chk@PLT
.L2:
	.cfi_restore_state
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE5940:
	.size	_Z10checkErrorv, .-_Z10checkErrorv
	.globl	_Z67__device_stub__Z6fft_16PN6thrust20THRUST_200700_890_NS7complexIdEEiPN6thrust20THRUST_200700_890_NS7complexIdEEi
	.type	_Z67__device_stub__Z6fft_16PN6thrust20THRUST_200700_890_NS7complexIdEEiPN6thrust20THRUST_200700_890_NS7complexIdEEi, @function
_Z67__device_stub__Z6fft_16PN6thrust20THRUST_200700_890_NS7complexIdEEiPN6thrust20THRUST_200700_890_NS7complexIdEEi:
.LFB5968:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movl	%esi, 4(%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L10
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z6fft_16PN6thrust20THRUST_200700_890_NS7complexIdEEi(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L10:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L12
	call	__stack_chk_fail@PLT
.L12:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE5968:
	.size	_Z67__device_stub__Z6fft_16PN6thrust20THRUST_200700_890_NS7complexIdEEiPN6thrust20THRUST_200700_890_NS7complexIdEEi, .-_Z67__device_stub__Z6fft_16PN6thrust20THRUST_200700_890_NS7complexIdEEiPN6thrust20THRUST_200700_890_NS7complexIdEEi
	.globl	_Z6fft_16PN6thrust20THRUST_200700_890_NS7complexIdEEi
	.type	_Z6fft_16PN6thrust20THRUST_200700_890_NS7complexIdEEi, @function
_Z6fft_16PN6thrust20THRUST_200700_890_NS7complexIdEEi:
.LFB5969:
	.cfi_startproc
	endbr64
	jmp	_Z67__device_stub__Z6fft_16PN6thrust20THRUST_200700_890_NS7complexIdEEiPN6thrust20THRUST_200700_890_NS7complexIdEEi
	.cfi_endproc
.LFE5969:
	.size	_Z6fft_16PN6thrust20THRUST_200700_890_NS7complexIdEEi, .-_Z6fft_16PN6thrust20THRUST_200700_890_NS7complexIdEEi
	.globl	_Z66__device_stub__Z5fft_8PN6thrust20THRUST_200700_890_NS7complexIdEEiPN6thrust20THRUST_200700_890_NS7complexIdEEi
	.type	_Z66__device_stub__Z5fft_8PN6thrust20THRUST_200700_890_NS7complexIdEEiPN6thrust20THRUST_200700_890_NS7complexIdEEi, @function
_Z66__device_stub__Z5fft_8PN6thrust20THRUST_200700_890_NS7complexIdEEiPN6thrust20THRUST_200700_890_NS7complexIdEEi:
.LFB5970:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movl	%esi, 4(%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z5fft_8PN6thrust20THRUST_200700_890_NS7complexIdEEi(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L15:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L17
	call	__stack_chk_fail@PLT
.L17:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE5970:
	.size	_Z66__device_stub__Z5fft_8PN6thrust20THRUST_200700_890_NS7complexIdEEiPN6thrust20THRUST_200700_890_NS7complexIdEEi, .-_Z66__device_stub__Z5fft_8PN6thrust20THRUST_200700_890_NS7complexIdEEiPN6thrust20THRUST_200700_890_NS7complexIdEEi
	.globl	_Z5fft_8PN6thrust20THRUST_200700_890_NS7complexIdEEi
	.type	_Z5fft_8PN6thrust20THRUST_200700_890_NS7complexIdEEi, @function
_Z5fft_8PN6thrust20THRUST_200700_890_NS7complexIdEEi:
.LFB5971:
	.cfi_startproc
	endbr64
	jmp	_Z66__device_stub__Z5fft_8PN6thrust20THRUST_200700_890_NS7complexIdEEiPN6thrust20THRUST_200700_890_NS7complexIdEEi
	.cfi_endproc
.LFE5971:
	.size	_Z5fft_8PN6thrust20THRUST_200700_890_NS7complexIdEEi, .-_Z5fft_8PN6thrust20THRUST_200700_890_NS7complexIdEEi
	.globl	_Z73__device_stub__Z8fft_lastPN6thrust20THRUST_200700_890_NS7complexIdEES3_iiPN6thrust20THRUST_200700_890_NS7complexIdEES3_ii
	.type	_Z73__device_stub__Z8fft_lastPN6thrust20THRUST_200700_890_NS7complexIdEES3_iiPN6thrust20THRUST_200700_890_NS7complexIdEES3_ii, @function
_Z73__device_stub__Z8fft_lastPN6thrust20THRUST_200700_890_NS7complexIdEES3_iiPN6thrust20THRUST_200700_890_NS7complexIdEES3_ii:
.LFB5972:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L20
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z8fft_lastPN6thrust20THRUST_200700_890_NS7complexIdEES3_ii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L20:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L22
	call	__stack_chk_fail@PLT
.L22:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE5972:
	.size	_Z73__device_stub__Z8fft_lastPN6thrust20THRUST_200700_890_NS7complexIdEES3_iiPN6thrust20THRUST_200700_890_NS7complexIdEES3_ii, .-_Z73__device_stub__Z8fft_lastPN6thrust20THRUST_200700_890_NS7complexIdEES3_iiPN6thrust20THRUST_200700_890_NS7complexIdEES3_ii
	.globl	_Z8fft_lastPN6thrust20THRUST_200700_890_NS7complexIdEES3_ii
	.type	_Z8fft_lastPN6thrust20THRUST_200700_890_NS7complexIdEES3_ii, @function
_Z8fft_lastPN6thrust20THRUST_200700_890_NS7complexIdEES3_ii:
.LFB5973:
	.cfi_startproc
	endbr64
	jmp	_Z73__device_stub__Z8fft_lastPN6thrust20THRUST_200700_890_NS7complexIdEES3_iiPN6thrust20THRUST_200700_890_NS7complexIdEES3_ii
	.cfi_endproc
.LFE5973:
	.size	_Z8fft_lastPN6thrust20THRUST_200700_890_NS7complexIdEES3_ii, .-_Z8fft_lastPN6thrust20THRUST_200700_890_NS7complexIdEES3_ii
	.globl	_Z3fftPN6thrust20THRUST_200700_890_NS7complexIdEES3_i
	.type	_Z3fftPN6thrust20THRUST_200700_890_NS7complexIdEES3_i, @function
_Z3fftPN6thrust20THRUST_200700_890_NS7complexIdEES3_i:
.LFB5941:
	.cfi_startproc
	endbr64
	leal	1(%rdx), %eax
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	cvtsi2sdl	%eax, %xmm0
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%edx, %ebx
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	movq	%rsi, 24(%rsp)
	call	log2@PLT
	xorl	%ecx, %ecx
	movl	$4, %esi
	cvttsd2sil	%xmm0, %edi
.L27:
	imull	$-3, %ecx, %eax
	addl	%edi, %eax
	testb	$3, %al
	jne	.L26
	cltd
	movl	%ecx, %r13d
	idivl	%esi
	movl	%eax, 20(%rsp)
.L26:
	incl	%ecx
	cmpl	$4, %ecx
	jne	.L27
	movabsq	$4294967312, %r14
	movl	%ebx, %r12d
	xorl	%ebp, %ebp
.L28:
	movl	%ebx, %eax
	cltd
	idivl	%r12d
	movl	%eax, %esi
	movl	20(%rsp), %eax
	decl	%eax
	cmpl	%ebp, %eax
	jle	.L37
	movl	%r12d, %eax
	movl	$16, %ecx
	movl	%esi, 40(%rsp)
	xorl	%r9d, %r9d
	cltd
	movl	$512, %r8d
	movl	$1, %esi
	movl	$1, 48(%rsp)
	idivl	%ecx
	movq	%r14, 52(%rsp)
	movl	$1, 60(%rsp)
	movq	%r14, %rdx
	movl	$1, %ecx
	movl	%eax, 44(%rsp)
	movq	40(%rsp), %rdi
	movl	%eax, %r15d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L29
	movq	8(%rsp), %rdi
	movl	%r12d, %esi
	call	_Z67__device_stub__Z6fft_16PN6thrust20THRUST_200700_890_NS7complexIdEEiPN6thrust20THRUST_200700_890_NS7complexIdEEi
.L29:
	call	_Z10checkErrorv
	incl	%ebp
	movl	%r15d, %r12d
	jmp	.L28
.L37:
	movabsq	$4294967304, %r14
	xorl	%ebp, %ebp
.L31:
	movl	%ebx, %eax
	cltd
	idivl	%r12d
	movl	%eax, %ecx
	cmpl	%ebp, %r13d
	jle	.L38
	movl	%r12d, %eax
	movl	$8, %esi
	movl	%ecx, 40(%rsp)
	xorl	%r9d, %r9d
	cltd
	movl	$256, %r8d
	movl	$1, %ecx
	movl	$1, 48(%rsp)
	idivl	%esi
	movq	%r14, 52(%rsp)
	movl	$1, 60(%rsp)
	movq	%r14, %rdx
	movl	$1, %esi
	movl	%eax, 44(%rsp)
	movq	40(%rsp), %rdi
	movl	%eax, %r15d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L32
	movq	8(%rsp), %rdi
	movl	%r12d, %esi
	call	_Z66__device_stub__Z5fft_8PN6thrust20THRUST_200700_890_NS7complexIdEEiPN6thrust20THRUST_200700_890_NS7complexIdEEi
.L32:
	call	_Z10checkErrorv
	incl	%ebp
	movl	%r15d, %r12d
	jmp	.L31
.L38:
	movl	%eax, 40(%rsp)
	movl	$268435457, %edx
	xorl	%r9d, %r9d
	movabsq	$4294967297, %rax
	movq	%rax, 44(%rsp)
	movq	40(%rsp), %rdi
	salq	$4, %rdx
	movl	$512, %r8d
	movl	48(%rsp), %esi
	movl	$1, %ecx
	movq	%rdx, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L25
	movl	20(%rsp), %edx
	movq	24(%rsp), %rsi
	movl	%r13d, %ecx
	movq	8(%rsp), %rdi
	addq	$72, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z73__device_stub__Z8fft_lastPN6thrust20THRUST_200700_890_NS7complexIdEES3_iiPN6thrust20THRUST_200700_890_NS7complexIdEES3_ii
.L25:
	.cfi_restore_state
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE5941:
	.size	_Z3fftPN6thrust20THRUST_200700_890_NS7complexIdEES3_i, .-_Z3fftPN6thrust20THRUST_200700_890_NS7complexIdEES3_i
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB5943:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	leaq	_ZSt3cin(%rip), %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%r12, %rdi
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	xorl	%ebx, %ebx
	subq	$56, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %rsi
	leaq	24(%rsp), %rbp
	call	_ZNSirsERi@PLT
	movslq	(%rsp), %rsi
	leaq	8(%rsp), %rdi
	movl	$1, %edx
	salq	$4, %rsi
	call	cudaMallocManaged@PLT
	movslq	(%rsp), %rsi
	leaq	16(%rsp), %rdi
	movl	$1, %edx
	salq	$4, %rsi
	call	cudaMallocManaged@PLT
.L40:
	cmpl	%ebx, (%rsp)
	leaq	32(%rsp), %r13
	jle	.L44
	movq	%rbp, %rsi
	movq	%r12, %rdi
	call	_ZNSirsERi@PLT
	movq	%r13, %rsi
	movq	%rax, %rdi
	call	_ZNSirsERi@PLT
	cvtsi2sdl	32(%rsp), %xmm0
	movq	%rbx, %rax
	incq	%rbx
	cvtsi2sdl	24(%rsp), %xmm1
	salq	$4, %rax
	addq	8(%rsp), %rax
	movsd	%xmm0, 8(%rax)
	movsd	%xmm1, (%rax)
	jmp	.L40
.L44:
	movq	%rbp, %rdi
	call	cudaEventCreate@PLT
	movq	%r13, %rdi
	call	cudaEventCreate@PLT
	movq	24(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	(%rsp), %edx
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	call	_Z3fftPN6thrust20THRUST_200700_890_NS7complexIdEES3_i
	call	_Z10checkErrorv
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	32(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	32(%rsp), %rdx
	movq	24(%rsp), %rsi
	leaq	4(%rsp), %rdi
	movl	$0x00000000, 4(%rsp)
	call	cudaEventElapsedTime@PLT
	leaq	_ZSt4cout(%rip), %rdi
	cvtss2sd	4(%rsp), %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L42
	call	__stack_chk_fail@PLT
.L42:
	addq	$56, %rsp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE5943:
	.size	main, .-main
	.section	.rodata.str1.1
.LC3:
	.string	"_Z8fft_lastPN6thrust20THRUST_200700_890_NS7complexIdEES3_ii"
.LC4:
	.string	"_Z5fft_8PN6thrust20THRUST_200700_890_NS7complexIdEEi"
.LC5:
	.string	"_Z6fft_16PN6thrust20THRUST_200700_890_NS7complexIdEEi"
.LC6:
	.string	"block_1"
.LC7:
	.string	"block_2"
.LC8:
	.string	"_ZN55_INTERNAL_23af607b_24_cooley_tukey_parallel_cu_064afbf64cuda3std3__45__cpo5beginE"
.LC9:
	.string	"_ZN55_INTERNAL_23af607b_24_cooley_tukey_parallel_cu_064afbf64cuda3std3__45__cpo3endE"
.LC10:
	.string	"_ZN55_INTERNAL_23af607b_24_cooley_tukey_parallel_cu_064afbf64cuda3std3__45__cpo6cbeginE"
.LC11:
	.string	"_ZN55_INTERNAL_23af607b_24_cooley_tukey_parallel_cu_064afbf64cuda3std3__45__cpo4cendE"
.LC12:
	.string	"_ZN55_INTERNAL_23af607b_24_cooley_tukey_parallel_cu_064afbf64cuda3std3__457_GLOBAL__N__23af607b_24_cooley_tukey_parallel_cu_064afbf66ignoreE"
.LC13:
	.string	"_ZN55_INTERNAL_23af607b_24_cooley_tukey_parallel_cu_064afbf64cuda3std3__419piecewise_constructE"
.LC14:
	.string	"_ZN55_INTERNAL_23af607b_24_cooley_tukey_parallel_cu_064afbf64cuda3std3__48in_placeE"
.LC15:
	.string	"_ZN55_INTERNAL_23af607b_24_cooley_tukey_parallel_cu_064afbf64cuda3std6ranges3__45__cpo4swapE"
.LC16:
	.string	"_ZN55_INTERNAL_23af607b_24_cooley_tukey_parallel_cu_064afbf64cuda3std6ranges3__45__cpo9iter_moveE"
.LC17:
	.string	"_ZN55_INTERNAL_23af607b_24_cooley_tukey_parallel_cu_064afbf64cuda3std6ranges3__45__cpo7advanceE"
.LC18:
	.string	"_ZN55_INTERNAL_23af607b_24_cooley_tukey_parallel_cu_064afbf66thrust20THRUST_200700_890_NS6system6detail10sequential3seqE"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB5975:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z8fft_lastPN6thrust20THRUST_200700_890_NS7complexIdEES3_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC4(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z5fft_8PN6thrust20THRUST_200700_890_NS7complexIdEEi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC5(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z6fft_16PN6thrust20THRUST_200700_890_NS7complexIdEEi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC6(%rip), %rdx
	movl	$4, %r9d
	leaq	_ZL7block_1(%rip), %rsi
	pushq	$1
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC7(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$4, %r9d
	leaq	_ZL7block_2(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC8(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__45__cpo5beginE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC9(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__45__cpo3endE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC10(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__45__cpo6cbeginE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC11(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__45__cpo4cendE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC12(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__457_GLOBAL__N__23af607b_24_cooley_tukey_parallel_cu_064afbf66ignoreE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC13(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__419piecewise_constructE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC14(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__48in_placeE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC15(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo4swapE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC16(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo9iter_moveE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC17(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo7advanceE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC18(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movl	$1, %r9d
	movq	%rdx, %rcx
	leaq	_ZN6thrust20THRUST_200700_890_NS6system6detail10sequentialL3seqE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%r8
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE5975:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata
	.align 4
	.type	_ZL7block_2, @object
	.size	_ZL7block_2, 4
_ZL7block_2:
	.long	8
	.align 4
	.type	_ZL7block_1, @object
	.size	_ZL7block_1, 4
_ZL7block_1:
	.long	16
	.type	_ZN6thrust20THRUST_200700_890_NS6system6detail10sequentialL3seqE, @object
	.size	_ZN6thrust20THRUST_200700_890_NS6system6detail10sequentialL3seqE, 1
_ZN6thrust20THRUST_200700_890_NS6system6detail10sequentialL3seqE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo7advanceE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo7advanceE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo7advanceE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo7advanceE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo7advanceE, 1
_ZN4cuda3std6ranges3__45__cpo7advanceE:
	.zero	1
	.hidden	_ZN4cuda3std3__457_GLOBAL__N__23af607b_24_cooley_tukey_parallel_cu_064afbf66ignoreE
	.weak	_ZN4cuda3std3__457_GLOBAL__N__23af607b_24_cooley_tukey_parallel_cu_064afbf66ignoreE
	.section	.rodata._ZN4cuda3std3__457_GLOBAL__N__23af607b_24_cooley_tukey_parallel_cu_064afbf66ignoreE,"aG",@progbits,_ZN4cuda3std3__457_GLOBAL__N__23af607b_24_cooley_tukey_parallel_cu_064afbf66ignoreE,comdat
	.type	_ZN4cuda3std3__457_GLOBAL__N__23af607b_24_cooley_tukey_parallel_cu_064afbf66ignoreE, @gnu_unique_object
	.size	_ZN4cuda3std3__457_GLOBAL__N__23af607b_24_cooley_tukey_parallel_cu_064afbf66ignoreE, 1
_ZN4cuda3std3__457_GLOBAL__N__23af607b_24_cooley_tukey_parallel_cu_064afbf66ignoreE:
	.zero	1
	.weak	_ZN4cuda3std3__48in_placeE
	.section	.rodata._ZN4cuda3std3__48in_placeE,"aG",@progbits,_ZN4cuda3std3__48in_placeE,comdat
	.type	_ZN4cuda3std3__48in_placeE, @gnu_unique_object
	.size	_ZN4cuda3std3__48in_placeE, 1
_ZN4cuda3std3__48in_placeE:
	.zero	1
	.weak	_ZN4cuda3std3__45__cpo4cendE
	.section	.rodata._ZN4cuda3std3__45__cpo4cendE,"aG",@progbits,_ZN4cuda3std3__45__cpo4cendE,comdat
	.type	_ZN4cuda3std3__45__cpo4cendE, @gnu_unique_object
	.size	_ZN4cuda3std3__45__cpo4cendE, 1
_ZN4cuda3std3__45__cpo4cendE:
	.zero	1
	.weak	_ZN4cuda3std3__45__cpo6cbeginE
	.section	.rodata._ZN4cuda3std3__45__cpo6cbeginE,"aG",@progbits,_ZN4cuda3std3__45__cpo6cbeginE,comdat
	.type	_ZN4cuda3std3__45__cpo6cbeginE, @gnu_unique_object
	.size	_ZN4cuda3std3__45__cpo6cbeginE, 1
_ZN4cuda3std3__45__cpo6cbeginE:
	.zero	1
	.weak	_ZN4cuda3std3__45__cpo3endE
	.section	.rodata._ZN4cuda3std3__45__cpo3endE,"aG",@progbits,_ZN4cuda3std3__45__cpo3endE,comdat
	.type	_ZN4cuda3std3__45__cpo3endE, @gnu_unique_object
	.size	_ZN4cuda3std3__45__cpo3endE, 1
_ZN4cuda3std3__45__cpo3endE:
	.zero	1
	.weak	_ZN4cuda3std3__45__cpo5beginE
	.section	.rodata._ZN4cuda3std3__45__cpo5beginE,"aG",@progbits,_ZN4cuda3std3__45__cpo5beginE,comdat
	.type	_ZN4cuda3std3__45__cpo5beginE, @gnu_unique_object
	.size	_ZN4cuda3std3__45__cpo5beginE, 1
_ZN4cuda3std3__45__cpo5beginE:
	.zero	1
	.weak	_ZN4cuda3std3__419piecewise_constructE
	.section	.rodata._ZN4cuda3std3__419piecewise_constructE,"aG",@progbits,_ZN4cuda3std3__419piecewise_constructE,comdat
	.type	_ZN4cuda3std3__419piecewise_constructE, @gnu_unique_object
	.size	_ZN4cuda3std3__419piecewise_constructE, 1
_ZN4cuda3std3__419piecewise_constructE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo9iter_moveE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo9iter_moveE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo9iter_moveE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo9iter_moveE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo9iter_moveE, 1
_ZN4cuda3std6ranges3__45__cpo9iter_moveE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo4swapE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo4swapE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4swapE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo4swapE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo4swapE, 1
_ZN4cuda3std6ranges3__45__cpo4swapE:
	.zero	1
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <iostream>
#include <complex>
#include <math.h>
#include <thrust/complex.h>
#include <sys/time.h>
#include <cassert>

using namespace std;

__constant__ const int block_1 = 16;
__constant__ const int block_2 = 8;


void checkError(){
	hipError_t errSync  = hipGetLastError();
	hipError_t errAsync = hipDeviceSynchronize();
	if (errSync != hipSuccess) 
	  printf("Sync kernel error: %s\n", hipGetErrorString(errSync));
	if (errAsync != hipSuccess)
	  printf("Async kernel error: %s\n", hipGetErrorString(errAsync));
}

__global__
void fft_16(thrust::complex<double> *x, int l){
	const int n = block_1;
	int blidx = blockIdx.x, blidy = blockIdx.y;
	int k = blidx*l+blidy;
	int step = l/n;
	extern __shared__ thrust::complex<double> temp[];
	int thid = threadIdx.x;
	int pout=0, pin=1;
	temp[pout*n + thid] = x[k+thid*step];
	__syncthreads();
	int thid1;
	thid1 = 0;
	int b = __log2f(n+1);
	for(int i=0; i<b;i++){
	  if(thid & (1<<i))
	    thid1 |= (1<<(b-1-i));
	}
	pout = 1 - pout;
	pin = 1 - pin;
	temp[pout*n + thid] = temp[pin*n + thid1];
	__syncthreads();

	for(int i=1; i<n; i*=2){
		pout = 1 - pout;
		pin = 1 - pin;
		thid1 = thid ^ i;
		thrust::complex<double> factor(cos(-M_PI*thid/i), sin(-M_PI*thid/i));
		if(thid1 > thid){
			temp[pout*n + thid] = temp[pin*n + thid] + factor * temp[pin*n + thid1];
		}
		else{
			temp[pout*n + thid] = temp[pin*n + thid1] + factor * temp[pin*n + thid];
		}
		__syncthreads();
	}
	thrust::complex<double> factor = thrust::complex<double>(cos(-M_PI*2*thid*blidy/l), sin(-M_PI*2*thid*blidy/l));
	x[k+thid*step] = factor * temp[pout*n + thid];
}

__global__
void fft_8(thrust::complex<double> *x, int l){
	const int n = block_2;
	int blidx = blockIdx.x, blidy = blockIdx.y;
	int k = blidx*l+blidy;
	int step = l/n;
	extern __shared__ thrust::complex<double> temp[];
	int thid = threadIdx.x;
	int pout=0, pin=1;
	temp[pout*n + thid] = x[k+thid*step];
	__syncthreads();
	int thid1;
	thid1 = 0;
	int b = __log2f(n+1);
	for(int i=0; i<b;i++){
	  if(thid & (1<<i))
	    thid1 |= (1<<(b-1-i));
	}
	pout = 1 - pout;
	pin = 1 - pin;
	temp[pout*n + thid] = temp[pin*n + thid1];
	__syncthreads();

	for(int i=1; i<n; i*=2){
		pout = 1 - pout;
		pin = 1 - pin;
		thid1 = thid ^ i;
		thrust::complex<double> factor(cos(-M_PI*thid/i), sin(-M_PI*thid/i));
		if(thid1 > thid){
			temp[pout*n + thid] = temp[pin*n + thid] + factor * temp[pin*n + thid1];
		}
		else{
			temp[pout*n + thid] = temp[pin*n + thid1] + factor * temp[pin*n + thid];
		}
		__syncthreads();
	}
	thrust::complex<double> factor = thrust::complex<double>(cos(-M_PI*2*thid*blidy/l), sin(-M_PI*2*thid*blidy/l));
	x[k+thid*step] = factor * temp[pout*n + thid];
}

__global__
void fft_last(thrust::complex<double> *x, thrust::complex<double> *y, int x1, int x2){
	const int n = block_1;
	int blidx = blockIdx.x;
	int l=block_1, blidy=0;
	int k = blidx*l+blidy;
	int step = l/n;
	extern __shared__ thrust::complex<double> temp[];
	int thid = threadIdx.x;
	int pout=0, pin=1;
	temp[pout*n + thid] = x[k+thid*step];
	__syncthreads();
	int thid1;
	thid1 = 0;
	int b = __log2f(n+1);
	for(int i=0; i<b;i++){
	  if(thid & (1<<i))
	    thid1 |= (1<<(b-1-i));
	}
	pout = 1 - pout;
	pin = 1 - pin;
	temp[pout*n + thid] = temp[pin*n + thid1];
	__syncthreads();

	for(int i=1; i<n; i*=2){
		pout = 1 - pout;
		pin = 1 - pin;
		thid1 = thid ^ i;
		thrust::complex<double> factor(cos(-M_PI*thid/i), sin(-M_PI*thid/i));
		if(thid1 > thid){
			temp[pout*n + thid] = temp[pin*n + thid] + factor * temp[pin*n + thid1];
		}
		else{
			temp[pout*n + thid] = temp[pin*n + thid1] + factor * temp[pin*n + thid];
		}
		__syncthreads();
	}

	int p = blidx;
	int j = thid;
	int loc = j;
	for(int k=0; k<x2; k++){
		int t = p&(block_2-1);
		loc = loc*block_2+t;
		p = p/block_2;
	}
	for(int k=0; k<x1-1; k++){
		int t = p&(block_1-1);
		loc = loc*block_1+t;
		p = p/block_1;
	}

	y[loc] = temp[pout*n + thid];
}

void fft(thrust::complex<double> *x, thrust::complex<double> *y, int n){
	int m = log2(n+1);
	int x1,x2, log_block_1=log2(block_1+1), log_block_2=log2(block_2+1);
	for(int i=0; i<log_block_1; i++){
		if((m-log_block_2*i)%log_block_1 == 0){
			x1 = (m-log_block_2*i)/log_block_1;
			x2=i;
		}
	}
	int l = n;
	for(int i=0; i<x1-1; i++){
		dim3 grid(n/l, l/block_1, 1);
		dim3 block(block_1,1,1);
		fft_16<<<grid, block, 2*block_1*sizeof(thrust::complex<double>)>>>(x, l);
		checkError();
		l/=block_1;
	}
	for(int i=0; i<x2; i++){
		dim3 grid(n/l, l/block_2, 1);
		dim3 block(block_2,1,1);
		fft_8<<<grid, block, 2*block_2*sizeof(thrust::complex<double>)>>>(x, l);
		checkError();
		l/=block_2;
	}
	assert(l==block_1);
	dim3 grid(n/l, 1, 1);
	dim3 block(block_1,1,1);
	fft_last<<<grid, block, 2*block_1*sizeof(thrust::complex<double>)>>>(x, y, x1, x2);
}


int main(){
	int n;
	cin>>n;
	thrust::complex<double> *x, *y;
	hipMallocManaged(&x, n*sizeof(thrust::complex<double>));
	hipMallocManaged(&y, n*sizeof(thrust::complex<double>));
	for(int i=0; i<n; i++){
		int t,u; cin>>t>>u;
		x[i] = thrust::complex<double>(t, u);
	}
	
	hipEvent_t start, stop;
	hipEventCreate(&start);
	hipEventCreate(&stop);
	hipEventRecord(start);
	
	fft(x, y, n);

	checkError();
	hipEventRecord(stop);
	hipEventSynchronize(stop);
	float milliseconds = 0;
	hipEventElapsedTime(&milliseconds, start, stop);
	cout<<milliseconds;
	for(int i=0; i<n; i++){
		// if(i%(n/block_1)==0) cout<<endl;
		// cout<<y[i]<<"\n";
	}
}
	.text
	.file	"cooley-tukey-parallel.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z10checkErrorv                 # -- Begin function _Z10checkErrorv
	.type	_Z10checkErrorv,@function
_Z10checkErrorv:                        # @_Z10checkErrorv
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %rbp, -16
	callq	hipGetLastError
	movl	%eax, %ebp
	callq	hipDeviceSynchronize
	movl	%eax, %ebx
	testl	%ebp, %ebp
	je	.LBB0_2
# %bb.1:
	movl	%ebp, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
.LBB0_2:
	testl	%ebx, %ebx
	je	.LBB0_3
# %bb.4:
	movl	%ebx, %edi
	callq	hipGetErrorString
	movl	$.L.str.1, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	printf                          # TAILCALL
.LBB0_3:
	.cfi_def_cfa_offset 32
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z10checkErrorv, .Lfunc_end0-_Z10checkErrorv
	.cfi_endproc
                                        # -- End function
	.globl	_Z21__device_stub__fft_16PN6thrust7complexIdEEi # -- Begin function _Z21__device_stub__fft_16PN6thrust7complexIdEEi
	.type	_Z21__device_stub__fft_16PN6thrust7complexIdEEi,@function
_Z21__device_stub__fft_16PN6thrust7complexIdEEi: # @_Z21__device_stub__fft_16PN6thrust7complexIdEEi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6fft_16PN6thrust7complexIdEEi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z21__device_stub__fft_16PN6thrust7complexIdEEi, .Lfunc_end1-_Z21__device_stub__fft_16PN6thrust7complexIdEEi
	.cfi_endproc
                                        # -- End function
	.globl	_Z20__device_stub__fft_8PN6thrust7complexIdEEi # -- Begin function _Z20__device_stub__fft_8PN6thrust7complexIdEEi
	.type	_Z20__device_stub__fft_8PN6thrust7complexIdEEi,@function
_Z20__device_stub__fft_8PN6thrust7complexIdEEi: # @_Z20__device_stub__fft_8PN6thrust7complexIdEEi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z5fft_8PN6thrust7complexIdEEi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z20__device_stub__fft_8PN6thrust7complexIdEEi, .Lfunc_end2-_Z20__device_stub__fft_8PN6thrust7complexIdEEi
	.cfi_endproc
                                        # -- End function
	.globl	_Z23__device_stub__fft_lastPN6thrust7complexIdEES2_ii # -- Begin function _Z23__device_stub__fft_lastPN6thrust7complexIdEES2_ii
	.type	_Z23__device_stub__fft_lastPN6thrust7complexIdEES2_ii,@function
_Z23__device_stub__fft_lastPN6thrust7complexIdEES2_ii: # @_Z23__device_stub__fft_lastPN6thrust7complexIdEES2_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8fft_lastPN6thrust7complexIdEES2_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z23__device_stub__fft_lastPN6thrust7complexIdEES2_ii, .Lfunc_end3-_Z23__device_stub__fft_lastPN6thrust7complexIdEES2_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z3fftPN6thrust7complexIdEES2_i # -- Begin function _Z3fftPN6thrust7complexIdEES2_i
	.type	_Z3fftPN6thrust7complexIdEES2_i,@function
_Z3fftPN6thrust7complexIdEES2_i:        # @_Z3fftPN6thrust7complexIdEES2_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
                                        # kill: def $edx killed $edx def $rdx
	movq	%rsi, 16(%rsp)                  # 8-byte Spill
	movq	%rdi, 8(%rsp)                   # 8-byte Spill
	movq	%rdx, (%rsp)                    # 8-byte Spill
	leal	1(%rdx), %eax
	cvtsi2sd	%eax, %xmm0
	callq	log2
	cvttsd2si	%xmm0, %eax
	xorl	%ecx, %ecx
                                        # implicit-def: $r15d
                                        # implicit-def: $ebp
.LBB4_1:                                # =>This Inner Loop Header: Depth=1
	leal	3(%rax), %edx
	testl	%eax, %eax
	cmovnsl	%eax, %edx
	sarl	$2, %edx
	testb	$3, %al
	cmovel	%ecx, %ebp
	cmovel	%edx, %r15d
	incl	%ecx
	addl	$-3, %eax
	cmpl	$4, %ecx
	jne	.LBB4_1
# %bb.2:                                # %.preheader79
	movabsq	$4294967312, %rbx               # imm = 0x100000010
	movq	(%rsp), %r12                    # 8-byte Reload
                                        # kill: def $r12d killed $r12d killed $r12 def $r12
	cmpl	$2, %r15d
	jl	.LBB4_7
# %bb.3:                                # %.lr.ph.preheader
	leal	-1(%r15), %r14d
	movq	(%rsp), %r13                    # 8-byte Reload
                                        # kill: def $r13d killed $r13d killed $r13 def $r13
.LBB4_4:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movq	(%rsp), %rax                    # 8-byte Reload
                                        # kill: def $eax killed $eax killed $rax
	cltd
	idivl	%r13d
                                        # kill: def $eax killed $eax def $rax
	leal	15(%r13), %r12d
	testl	%r13d, %r13d
	cmovnsl	%r13d, %r12d
	sarl	$4, %r12d
	movq	%r12, %rdi
	shlq	$32, %rdi
	orq	%rax, %rdi
	movl	$512, %r8d                      # imm = 0x200
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_6
# %bb.5:                                #   in Loop: Header=BB4_4 Depth=1
	movq	8(%rsp), %rdi                   # 8-byte Reload
	movl	%r13d, %esi
	callq	_Z21__device_stub__fft_16PN6thrust7complexIdEEi
.LBB4_6:                                #   in Loop: Header=BB4_4 Depth=1
	callq	_Z10checkErrorv
	movl	%r12d, %r13d
	decl	%r14d
	jne	.LBB4_4
.LBB4_7:                                # %.preheader
	testl	%ebp, %ebp
	jle	.LBB4_8
# %bb.11:
	leaq	-8(%rbx), %r13
	movl	%ebp, %r14d
.LBB4_12:                               # %.lr.ph87
                                        # =>This Inner Loop Header: Depth=1
	movq	(%rsp), %rax                    # 8-byte Reload
                                        # kill: def $eax killed $eax killed $rax
	cltd
	idivl	%r12d
                                        # kill: def $eax killed $eax def $rax
	leal	7(%r12), %ebx
	testl	%r12d, %r12d
	cmovnsl	%r12d, %ebx
	sarl	$3, %ebx
	movq	%rbx, %rdi
	shlq	$32, %rdi
	orq	%rax, %rdi
	movl	$256, %r8d                      # imm = 0x100
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_14
# %bb.13:                               #   in Loop: Header=BB4_12 Depth=1
	movq	8(%rsp), %rdi                   # 8-byte Reload
	movl	%r12d, %esi
	callq	_Z20__device_stub__fft_8PN6thrust7complexIdEEi
.LBB4_14:                               #   in Loop: Header=BB4_12 Depth=1
	callq	_Z10checkErrorv
	movl	%ebx, %r12d
	decl	%r14d
	jne	.LBB4_12
	jmp	.LBB4_9
.LBB4_8:
	movl	%r12d, %ebx
.LBB4_9:                                # %._crit_edge
	movq	(%rsp), %rax                    # 8-byte Reload
                                        # kill: def $eax killed $eax killed $rax
	cltd
	idivl	%ebx
                                        # kill: def $eax killed $eax def $rax
	movabsq	$4294967312, %rdx               # imm = 0x100000010
	leaq	(%rdx,%rax), %rdi
	addq	$-16, %rdi
	movl	$512, %r8d                      # imm = 0x200
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	je	.LBB4_10
# %bb.15:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB4_10:
	.cfi_def_cfa_offset 80
	movq	8(%rsp), %rdi                   # 8-byte Reload
	movq	16(%rsp), %rsi                  # 8-byte Reload
	movl	%r15d, %edx
	movl	%ebp, %ecx
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z23__device_stub__fft_lastPN6thrust7complexIdEES2_ii # TAILCALL
.Lfunc_end4:
	.size	_Z3fftPN6thrust7complexIdEES2_i, .Lfunc_end4-_Z3fftPN6thrust7complexIdEES2_i
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$56, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rbx
	movl	$_ZSt3cin, %edi
	movq	%rbx, %rsi
	callq	_ZNSirsERi
	movslq	(%rbx), %rsi
	shlq	$4, %rsi
	leaq	32(%rsp), %rdi
	movl	$1, %edx
	callq	hipMallocManaged
	movslq	(%rbx), %rsi
	shlq	$4, %rsi
	leaq	40(%rsp), %rdi
	movl	$1, %edx
	callq	hipMallocManaged
	cmpl	$0, (%rbx)
	jle	.LBB5_3
# %bb.1:                                # %.lr.ph.preheader
	movl	$8, %r15d
	xorl	%r12d, %r12d
	leaq	24(%rsp), %rbx
	leaq	16(%rsp), %r14
.LBB5_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	$_ZSt3cin, %edi
	movq	%rbx, %rsi
	callq	_ZNSirsERi
	movq	%rax, %rdi
	movq	%r14, %rsi
	callq	_ZNSirsERi
	xorps	%xmm0, %xmm0
	cvtsi2sdl	24(%rsp), %xmm0
	xorps	%xmm1, %xmm1
	cvtsi2sdl	16(%rsp), %xmm1
	movq	32(%rsp), %rax
	movsd	%xmm0, -8(%rax,%r15)
	movsd	%xmm1, (%rax,%r15)
	incq	%r12
	movslq	12(%rsp), %rax
	addq	$16, %r15
	cmpq	%rax, %r12
	jl	.LBB5_2
.LBB5_3:                                # %._crit_edge
	leaq	24(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventCreate
	leaq	16(%rsp), %r14
	movq	%r14, %rdi
	callq	hipEventCreate
	movq	(%rbx), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	32(%rsp), %rdi
	movq	40(%rsp), %rsi
	movl	12(%rsp), %edx
	callq	_Z3fftPN6thrust7complexIdEES2_i
	callq	_Z10checkErrorv
	movq	(%r14), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%r14), %rdi
	callq	hipEventSynchronize
	leaq	52(%rsp), %r15
	movl	$0, (%r15)
	movq	(%rbx), %rsi
	movq	(%r14), %rdx
	movq	%r15, %rdi
	callq	hipEventElapsedTime
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r15), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	xorl	%eax, %eax
	addq	$56, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	main, .Lfunc_end5-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB6_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB6_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6fft_16PN6thrust7complexIdEEi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z5fft_8PN6thrust7complexIdEEi, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8fft_lastPN6thrust7complexIdEES2_ii, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end6:
	.size	__hip_module_ctor, .Lfunc_end6-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB7_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB7_2:
	retq
.Lfunc_end7:
	.size	__hip_module_dtor, .Lfunc_end7-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Sync kernel error: %s\n"
	.size	.L.str, 23

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Async kernel error: %s\n"
	.size	.L.str.1, 24

	.type	_Z6fft_16PN6thrust7complexIdEEi,@object # @_Z6fft_16PN6thrust7complexIdEEi
	.section	.rodata,"a",@progbits
	.globl	_Z6fft_16PN6thrust7complexIdEEi
	.p2align	3, 0x0
_Z6fft_16PN6thrust7complexIdEEi:
	.quad	_Z21__device_stub__fft_16PN6thrust7complexIdEEi
	.size	_Z6fft_16PN6thrust7complexIdEEi, 8

	.type	_Z5fft_8PN6thrust7complexIdEEi,@object # @_Z5fft_8PN6thrust7complexIdEEi
	.globl	_Z5fft_8PN6thrust7complexIdEEi
	.p2align	3, 0x0
_Z5fft_8PN6thrust7complexIdEEi:
	.quad	_Z20__device_stub__fft_8PN6thrust7complexIdEEi
	.size	_Z5fft_8PN6thrust7complexIdEEi, 8

	.type	_Z8fft_lastPN6thrust7complexIdEES2_ii,@object # @_Z8fft_lastPN6thrust7complexIdEES2_ii
	.globl	_Z8fft_lastPN6thrust7complexIdEES2_ii
	.p2align	3, 0x0
_Z8fft_lastPN6thrust7complexIdEES2_ii:
	.quad	_Z23__device_stub__fft_lastPN6thrust7complexIdEES2_ii
	.size	_Z8fft_lastPN6thrust7complexIdEES2_ii, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z6fft_16PN6thrust7complexIdEEi"
	.size	.L__unnamed_1, 32

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z5fft_8PN6thrust7complexIdEEi"
	.size	.L__unnamed_2, 31

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z8fft_lastPN6thrust7complexIdEES2_ii"
	.size	.L__unnamed_3, 38

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__fft_16PN6thrust7complexIdEEi
	.addrsig_sym _Z20__device_stub__fft_8PN6thrust7complexIdEEi
	.addrsig_sym _Z23__device_stub__fft_lastPN6thrust7complexIdEES2_ii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z6fft_16PN6thrust7complexIdEEi
	.addrsig_sym _Z5fft_8PN6thrust7complexIdEEi
	.addrsig_sym _Z8fft_lastPN6thrust7complexIdEES2_ii
	.addrsig_sym _ZSt3cin
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z6fft_16PN6thrust7complexIdEEi ; -- Begin function _Z6fft_16PN6thrust7complexIdEEi
	.globl	_Z6fft_16PN6thrust7complexIdEEi
	.p2align	8
	.type	_Z6fft_16PN6thrust7complexIdEEi,@function
_Z6fft_16PN6thrust7complexIdEEi:        ; @_Z6fft_16PN6thrust7complexIdEEi
; %bb.0:
	s_clause 0x1
	s_load_b32 s33, s[0:1], 0x8
	s_load_b64 s[0:1], s[0:1], 0x0
	v_log_f32_e32 v7, 0x41880000
	v_lshl_add_u32 v28, v0, 4, 0
	s_waitcnt_depctr 0xfff
	v_cvt_i32_f32_e32 v7, v7
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s2, s33, 31
	s_mul_i32 s14, s14, s33
	s_lshr_b32 s2, s2, 28
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s2, s33, s2
	s_ashr_i32 s2, s2, 4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v1, s2, v0
	v_add3_u32 v1, s14, s15, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[1:2], 4, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s0, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	v_cmp_gt_i32_e32 vcc_lo, 1, v7
	v_readfirstlane_b32 s1, v7
	s_mov_b32 s0, 0
	global_load_b128 v[3:6], v[1:2], off
	s_and_b32 vcc_lo, exec_lo, vcc_lo
	s_waitcnt vmcnt(0)
	ds_store_b128 v28, v[3:6]
	v_mov_b32_e32 v5, 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_vccnz .LBB0_3
; %bb.1:                                ; %.lr.ph.preheader
	s_add_i32 s1, s1, -1
.LBB0_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_lshrrev_b32_e32 v3, s0, v0
	s_lshl_b32 s2, 1, s1
	s_add_i32 s1, s1, -1
	s_add_i32 s0, s0, 1
	s_cmp_eq_u32 s1, -1
	v_and_b32_e32 v3, 1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e32 vcc_lo, 1, v3
	v_cndmask_b32_e64 v3, 0, s2, vcc_lo
	v_or_b32_e32 v5, v3, v5
	s_cbranch_scc0 .LBB0_2
.LBB0_3:                                ; %Flow147
	v_cvt_f64_i32_e32 v[3:4], v0
	s_delay_alu instid0(VALU_DEP_2)
	v_lshl_add_u32 v5, v5, 4, 0
	s_mov_b32 s3, 0xc00921fb
	s_mov_b32 s2, 0x54442d18
	v_add_nc_u32_e32 v27, 0x100, v28
	s_mov_b32 s10, 0x6dc9c883
	ds_load_b128 v[5:8], v5
	s_mov_b32 s12, 0x33145c00
	s_mov_b32 s16, 0x252049c0
	s_mov_b32 s18, 0x9037ab78
	s_mov_b32 s20, 0x46cc5e42
	s_mov_b32 s22, 0xa17f65f6
	s_mov_b32 s24, 0x19f4ec90
	s_mov_b32 s26, 0x16c16967
	s_mov_b32 s28, 0x55555555
	s_mov_b32 s30, 0xb42fdfa7
	s_mov_b32 s34, 0xf9a43bb8
	s_mov_b32 s36, 0x796cde01
	s_mov_b32 s38, 0x19e83e5c
	s_mov_b32 s40, 0x11110bb3
	s_mov_b32 s14, 0
	s_mov_b32 s44, 1
	s_mov_b32 s5, 0x3ff921fb
	s_mov_b32 s7, 0x3c91a626
	s_mov_b32 s8, 0x33145c07
	s_mov_b32 s11, 0x3fe45f30
	s_waitcnt lgkmcnt(0)
	ds_store_b128 v28, v[5:8] offset:256
	v_mov_b32_e32 v7, 0
	s_mov_b32 s13, 0xbc91a626
	s_mov_b32 s17, 0xb97b839a
	s_mov_b32 s19, 0x3e21eeb6
	s_mov_b32 s21, 0xbda907db
	s_mov_b32 s23, 0xbe927e4f
	s_mov_b32 s25, 0x3efa01a0
	s_mov_b32 s27, 0xbf56c16c
	s_mov_b32 s29, 0x3fa55555
	s_mov_b32 s31, 0xbe5ae600
	s_mov_b32 s35, 0x3de5e0b2
	v_mul_f64 v[5:6], v[3:4], s[2:3]
	s_mov_b32 s37, 0x3ec71de3
	s_mov_b32 s39, 0xbf2a01a0
	s_mov_b32 s41, 0x3f811111
	s_mov_b32 s3, 0xbff921fb
	s_mov_b32 s43, 0xbfc55555
	s_mov_b32 s45, 1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB0_4:                                ; =>This Inner Loop Header: Depth=1
	v_cvt_f64_i32_e32 v[8:9], s45
                                        ; implicit-def: $vgpr29
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f64 v[10:11], null, v[8:9], v[8:9], v[5:6]
	v_div_scale_f64 v[16:17], vcc_lo, v[5:6], v[8:9], v[5:6]
	v_rcp_f64_e32 v[12:13], v[10:11]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[14:15], -v[10:11], v[12:13], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[12:13], v[12:13], v[14:15], v[12:13]
	v_fma_f64 v[14:15], -v[10:11], v[12:13], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[12:13], v[12:13], v[14:15], v[12:13]
	v_mul_f64 v[14:15], v[16:17], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[10:11], -v[10:11], v[14:15], v[16:17]
	v_div_fmas_f64 v[10:11], v[10:11], v[12:13], v[14:15]
                                        ; implicit-def: $vgpr13_vgpr14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f64 v[9:10], v[10:11], v[8:9], v[5:6]
                                        ; implicit-def: $vgpr11_vgpr12
	v_cmp_ngt_f64_e64 s1, 0x41d00000, |v[9:10]|
	v_trig_preop_f64 v[19:20], |v[9:10]|, 0
	v_trig_preop_f64 v[17:18], |v[9:10]|, 1
	v_ldexp_f64 v[21:22], |v[9:10]|, 0xffffff80
	v_trig_preop_f64 v[15:16], |v[9:10]|, 2
	v_and_b32_e32 v31, 0x7fffffff, v10
	s_and_saveexec_b32 s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s6, exec_lo, s0
	s_cbranch_execz .LBB0_6
; %bb.5:                                ;   in Loop: Header=BB0_4 Depth=1
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[9:10]|
	s_mov_b32 s4, s2
	s_mov_b32 s9, s7
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v12, v31, v22 :: v_dual_cndmask_b32 v11, v9, v21
	v_mul_f64 v[13:14], v[19:20], v[11:12]
	v_mul_f64 v[23:24], v[17:18], v[11:12]
	v_mul_f64 v[38:39], v[15:16], v[11:12]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[25:26], v[19:20], v[11:12], -v[13:14]
	v_fma_f64 v[40:41], v[17:18], v[11:12], -v[23:24]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[11:12], v[15:16], v[11:12], -v[38:39]
	v_add_f64 v[29:30], v[23:24], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[32:33], v[29:30], -v[23:24]
	v_add_f64 v[36:37], v[13:14], v[29:30]
	v_add_f64 v[34:35], v[29:30], -v[32:33]
	v_add_f64 v[25:26], v[25:26], -v[32:33]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[32:33], v[36:37], -2
	v_add_f64 v[13:14], v[36:37], -v[13:14]
	v_add_f64 v[23:24], v[23:24], -v[34:35]
	v_add_f64 v[34:35], v[38:39], v[40:41]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[32:33]|
	v_add_f64 v[13:14], v[29:30], -v[13:14]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[23:24], v[25:26], v[23:24]
	v_fract_f64_e32 v[25:26], v[32:33]
	v_add_f64 v[29:30], v[34:35], v[23:24]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v26, 0, v26 :: v_dual_cndmask_b32 v25, 0, v25
	v_ldexp_f64 v[25:26], v[25:26], 2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[32:33], v[13:14], v[29:30]
	v_add_f64 v[42:43], v[29:30], -v[34:35]
	v_add_f64 v[36:37], v[32:33], v[25:26]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[48:49], v[29:30], -v[42:43]
	v_add_f64 v[23:24], v[23:24], -v[42:43]
	v_add_f64 v[13:14], v[32:33], -v[13:14]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[36:37]
	v_add_f64 v[36:37], v[34:35], -v[38:39]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[13:14], v[29:30], -v[13:14]
	v_cndmask_b32_e64 v8, 0, 0x40100000, vcc_lo
	v_add_f64 v[46:47], v[34:35], -v[36:37]
	v_add_f64 v[36:37], v[40:41], -v[36:37]
	v_add_f64 v[34:35], v[34:35], -v[48:49]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[25:26], v[25:26], v[7:8]
	v_add_f64 v[40:41], v[38:39], -v[46:47]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[23:24], v[23:24], v[34:35]
	v_add_f64 v[44:45], v[32:33], v[25:26]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[36:37], v[36:37], v[40:41]
	v_cvt_i32_f64_e32 v8, v[44:45]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[23:24], v[36:37], v[23:24]
	v_cvt_f64_i32_e32 v[42:43], v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[11:12], v[11:12], v[23:24]
	v_add_f64 v[25:26], v[25:26], -v[42:43]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[11:12], v[13:14], v[11:12]
	v_add_f64 v[34:35], v[32:33], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[23:24], v[34:35], -v[25:26]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[34:35]
	v_add_f64 v[13:14], v[32:33], -v[23:24]
	v_add_co_ci_u32_e64 v29, s0, 0, v8, vcc_lo
	v_cndmask_b32_e64 v8, 0, 0x3ff00000, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[11:12], v[11:12], v[13:14]
	v_add_f64 v[13:14], v[34:35], -v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[23:24], v[13:14], v[11:12]
	v_mul_f64 v[25:26], v[23:24], s[4:5]
	v_add_f64 v[13:14], v[23:24], -v[13:14]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[32:33], v[23:24], s[4:5], -v[25:26]
	v_add_f64 v[11:12], v[11:12], -v[13:14]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[13:14], v[23:24], s[8:9], v[32:33]
	v_fma_f64 v[13:14], v[11:12], s[4:5], v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[11:12], v[25:26], v[13:14]
	v_add_f64 v[23:24], v[11:12], -v[25:26]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[13:14], v[13:14], -v[23:24]
.LBB0_6:                                ; %Flow145
                                        ;   in Loop: Header=BB0_4 Depth=1
	s_and_not1_saveexec_b32 s0, s6
	s_cbranch_execz .LBB0_8
; %bb.7:                                ;   in Loop: Header=BB0_4 Depth=1
	v_mul_f64 v[11:12], |v[9:10]|, s[10:11]
	s_mov_b32 s6, s12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[23:24], v[11:12]
	v_fma_f64 v[11:12], v[23:24], s[2:3], |v[9:10]|
	v_mul_f64 v[13:14], v[23:24], s[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[29:30], v[23:24], s[12:13], v[11:12]
	v_add_f64 v[25:26], v[11:12], v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[11:12], v[11:12], -v[25:26]
	v_add_f64 v[25:26], v[25:26], -v[29:30]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[11:12], v[11:12], v[13:14]
	v_fma_f64 v[13:14], v[23:24], s[6:7], v[13:14]
	v_add_f64 v[11:12], v[25:26], v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[11:12], v[11:12], -v[13:14]
	v_fma_f64 v[13:14], v[23:24], s[16:17], v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[11:12], v[29:30], v[13:14]
	v_add_f64 v[25:26], v[11:12], -v[29:30]
	v_cvt_i32_f64_e32 v29, v[23:24]
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f64 v[13:14], v[13:14], -v[25:26]
.LBB0_8:                                ; %_ZL3cosd.exit95
                                        ;   in Loop: Header=BB0_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr30
                                        ; implicit-def: $vgpr23_vgpr24
                                        ; implicit-def: $vgpr25_vgpr26
	s_and_saveexec_b32 s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s1, exec_lo, s0
	s_cbranch_execz .LBB0_10
; %bb.9:                                ;   in Loop: Header=BB0_4 Depth=1
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[9:10]|
	s_mov_b32 s4, s2
	s_mov_b32 s9, s7
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v22, v31, v22 :: v_dual_cndmask_b32 v21, v9, v21
	v_mul_f64 v[23:24], v[19:20], v[21:22]
	v_mul_f64 v[25:26], v[17:18], v[21:22]
	v_mul_f64 v[38:39], v[15:16], v[21:22]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[19:20], v[19:20], v[21:22], -v[23:24]
	v_fma_f64 v[17:18], v[17:18], v[21:22], -v[25:26]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[15:16], v[15:16], v[21:22], -v[38:39]
	v_add_f64 v[30:31], v[25:26], v[19:20]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[32:33], v[30:31], -v[25:26]
	v_add_f64 v[36:37], v[23:24], v[30:31]
	v_add_f64 v[34:35], v[30:31], -v[32:33]
	v_add_f64 v[19:20], v[19:20], -v[32:33]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[32:33], v[36:37], -2
	v_add_f64 v[23:24], v[36:37], -v[23:24]
	v_add_f64 v[25:26], v[25:26], -v[34:35]
	v_add_f64 v[34:35], v[38:39], v[17:18]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[32:33]|
	v_add_f64 v[23:24], v[30:31], -v[23:24]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[19:20], v[19:20], v[25:26]
	v_fract_f64_e32 v[25:26], v[32:33]
	v_add_f64 v[30:31], v[34:35], v[19:20]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v26, 0, v26 :: v_dual_cndmask_b32 v25, 0, v25
	v_ldexp_f64 v[25:26], v[25:26], 2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[32:33], v[23:24], v[30:31]
	v_add_f64 v[40:41], v[30:31], -v[34:35]
	v_add_f64 v[36:37], v[32:33], v[25:26]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[46:47], v[30:31], -v[40:41]
	v_add_f64 v[19:20], v[19:20], -v[40:41]
	v_add_f64 v[21:22], v[32:33], -v[23:24]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[36:37]
	v_add_f64 v[36:37], v[34:35], -v[38:39]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[21:22], v[30:31], -v[21:22]
	v_cndmask_b32_e64 v8, 0, 0x40100000, vcc_lo
	v_add_f64 v[44:45], v[34:35], -v[36:37]
	v_add_f64 v[17:18], v[17:18], -v[36:37]
	v_add_f64 v[34:35], v[34:35], -v[46:47]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[25:26], v[25:26], v[7:8]
	v_add_f64 v[36:37], v[38:39], -v[44:45]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[19:20], v[19:20], v[34:35]
	v_add_f64 v[42:43], v[32:33], v[25:26]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[17:18], v[17:18], v[36:37]
	v_cvt_i32_f64_e32 v8, v[42:43]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[17:18], v[17:18], v[19:20]
	v_cvt_f64_i32_e32 v[40:41], v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[15:16], v[15:16], v[17:18]
	v_add_f64 v[25:26], v[25:26], -v[40:41]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[15:16], v[21:22], v[15:16]
	v_add_f64 v[19:20], v[32:33], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[17:18], v[19:20], -v[25:26]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[19:20]
	v_add_f64 v[17:18], v[32:33], -v[17:18]
	v_add_co_ci_u32_e64 v30, s0, 0, v8, vcc_lo
	v_cndmask_b32_e64 v8, 0, 0x3ff00000, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[15:16], v[15:16], v[17:18]
	v_add_f64 v[17:18], v[19:20], -v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[19:20], v[17:18], v[15:16]
	v_mul_f64 v[21:22], v[19:20], s[4:5]
	v_add_f64 v[17:18], v[19:20], -v[17:18]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[23:24], v[19:20], s[4:5], -v[21:22]
	v_add_f64 v[15:16], v[15:16], -v[17:18]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[17:18], v[19:20], s[8:9], v[23:24]
	v_fma_f64 v[15:16], v[15:16], s[4:5], v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[23:24], v[21:22], v[15:16]
	v_add_f64 v[17:18], v[23:24], -v[21:22]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[25:26], v[15:16], -v[17:18]
.LBB0_10:                               ; %Flow144
                                        ;   in Loop: Header=BB0_4 Depth=1
	s_and_not1_saveexec_b32 s0, s1
	s_cbranch_execz .LBB0_12
; %bb.11:                               ;   in Loop: Header=BB0_4 Depth=1
	v_mul_f64 v[15:16], |v[9:10]|, s[10:11]
	s_mov_b32 s6, s12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[15:16], v[15:16]
	v_fma_f64 v[17:18], v[15:16], s[2:3], |v[9:10]|
	v_mul_f64 v[19:20], v[15:16], s[12:13]
	v_cvt_i32_f64_e32 v30, v[15:16]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[25:26], v[15:16], s[12:13], v[17:18]
	v_add_f64 v[21:22], v[17:18], v[19:20]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[17:18], v[17:18], -v[21:22]
	v_add_f64 v[21:22], v[21:22], -v[25:26]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[17:18], v[17:18], v[19:20]
	v_fma_f64 v[19:20], v[15:16], s[6:7], v[19:20]
	v_add_f64 v[17:18], v[21:22], v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[17:18], v[17:18], -v[19:20]
	v_fma_f64 v[17:18], v[15:16], s[16:17], v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[23:24], v[25:26], v[17:18]
	v_add_f64 v[19:20], v[23:24], -v[25:26]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[25:26], v[17:18], -v[19:20]
.LBB0_12:                               ; %_ZL3sind.exit100
                                        ;   in Loop: Header=BB0_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_mul_f64 v[15:16], v[11:12], v[11:12]
	v_mul_f64 v[17:18], v[23:24], v[23:24]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[43:44], v[13:14], 0.5
	v_mul_f64 v[49:50], v[25:26], 0.5
	s_mov_b32 s42, s28
	v_cmp_class_f64_e64 s0, v[9:10], 0x1f8
	s_sub_i32 s14, 1, s14
	s_not_b32 s1, s45
	s_lshl_b32 s4, s14, 4
	s_sub_i32 s44, 1, s44
	v_fma_f64 v[19:20], v[15:16], s[34:35], s[30:31]
	v_fma_f64 v[21:22], v[17:18], s[34:35], s[30:31]
	v_mul_f64 v[33:34], v[15:16], 0.5
	v_fma_f64 v[31:32], v[15:16], s[20:21], s[18:19]
	v_fma_f64 v[35:36], v[17:18], s[20:21], s[18:19]
	v_mul_f64 v[37:38], v[17:18], 0.5
	v_mul_f64 v[45:46], v[11:12], -v[15:16]
	v_mul_f64 v[51:52], v[23:24], -v[17:18]
	v_fma_f64 v[19:20], v[15:16], v[19:20], s[36:37]
	v_fma_f64 v[21:22], v[17:18], v[21:22], s[36:37]
	v_add_f64 v[39:40], -v[33:34], 1.0
	v_fma_f64 v[31:32], v[15:16], v[31:32], s[22:23]
	v_fma_f64 v[35:36], v[17:18], v[35:36], s[22:23]
	v_add_f64 v[41:42], -v[37:38], 1.0
	v_fma_f64 v[19:20], v[15:16], v[19:20], s[38:39]
	v_fma_f64 v[21:22], v[17:18], v[21:22], s[38:39]
	v_add_f64 v[47:48], -v[39:40], 1.0
	v_fma_f64 v[31:32], v[15:16], v[31:32], s[24:25]
	v_fma_f64 v[35:36], v[17:18], v[35:36], s[24:25]
	v_add_f64 v[53:54], -v[41:42], 1.0
	v_fma_f64 v[19:20], v[15:16], v[19:20], s[40:41]
	v_fma_f64 v[21:22], v[17:18], v[21:22], s[40:41]
	v_add_f64 v[33:34], v[47:48], -v[33:34]
	v_fma_f64 v[31:32], v[15:16], v[31:32], s[26:27]
	v_fma_f64 v[35:36], v[17:18], v[35:36], s[26:27]
	v_add_f64 v[37:38], v[53:54], -v[37:38]
	v_fma_f64 v[19:20], v[45:46], v[19:20], v[43:44]
	v_fma_f64 v[21:22], v[51:52], v[21:22], v[49:50]
	v_fma_f64 v[33:34], v[11:12], -v[13:14], v[33:34]
	v_mul_f64 v[43:44], v[15:16], v[15:16]
	v_fma_f64 v[31:32], v[15:16], v[31:32], s[28:29]
	v_fma_f64 v[13:14], v[15:16], v[19:20], -v[13:14]
	v_mul_f64 v[15:16], v[17:18], v[17:18]
	v_fma_f64 v[19:20], v[17:18], v[35:36], s[28:29]
	v_fma_f64 v[35:36], v[23:24], -v[25:26], v[37:38]
	v_fma_f64 v[17:18], v[17:18], v[21:22], -v[25:26]
	v_fma_f64 v[21:22], v[43:44], v[31:32], v[33:34]
	v_fma_f64 v[13:14], v[45:46], s[42:43], v[13:14]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[15:16], v[15:16], v[19:20], v[35:36]
	v_fma_f64 v[17:18], v[51:52], s[42:43], v[17:18]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[19:20], v[39:40], v[21:22]
	v_and_b32_e32 v21, s1, v0
	v_add_f64 v[11:12], v[11:12], -v[13:14]
	v_and_b32_e32 v8, 1, v29
	v_add_f64 v[13:14], v[41:42], v[15:16]
	v_add_f64 v[15:16], v[23:24], -v[17:18]
	v_and_b32_e32 v18, 1, v30
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cmp_eq_u32_e32 vcc_lo, 0, v8
	v_or_b32_e32 v8, s45, v0
	v_cmp_eq_u32_e64 s1, 0, v18
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v8, s4, v8
	v_lshl_add_u32 v8, v8, 4, 0
	v_cndmask_b32_e32 v17, v11, v19, vcc_lo
	v_xor_b32_e32 v12, 0x80000000, v12
	v_lshlrev_b32_e32 v9, 30, v30
	v_lshlrev_b32_e32 v19, 30, v29
	v_cndmask_b32_e64 v14, v14, v16, s1
	v_cndmask_b32_e64 v13, v13, v15, s1
	v_cndmask_b32_e32 v12, v12, v20, vcc_lo
	v_xor_b32_e32 v22, v9, v10
	ds_load_b128 v[8:11], v8
	v_and_b32_e32 v18, 0x80000000, v19
	v_add_nc_u32_e32 v15, s4, v21
	v_cndmask_b32_e64 v16, 0, v17, s0
	v_and_b32_e32 v19, 0x80000000, v22
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v12, v12, v18
	v_lshl_add_u32 v15, v15, 4, 0
	v_cndmask_b32_e64 v18, 0, v13, s0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v14, v14, v19
	v_cndmask_b32_e64 v17, 0x7ff80000, v12, s0
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v19, 0x7ff80000, v14, s0
	ds_load_b128 v[12:15], v15
	s_lshl_b32 s0, s45, 1
	s_cmp_gt_u32 s45, 7
	s_mov_b32 s45, s0
	s_waitcnt lgkmcnt(1)
	v_mul_f64 v[20:21], v[10:11], v[18:19]
	v_mul_f64 v[10:11], v[10:11], v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[16:17], v[8:9], v[16:17], -v[20:21]
	v_fma_f64 v[10:11], v[8:9], v[18:19], v[10:11]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[8:9], v[12:13], v[16:17]
	v_add_f64 v[10:11], v[14:15], v[10:11]
	v_lshl_add_u32 v12, s44, 8, v28
	ds_store_b128 v12, v[8:11]
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB0_4
; %bb.13:
	s_mov_b32 s3, 0xc01921fb
	s_mov_b32 s2, 0x54442d18
	v_cvt_f64_i32_e32 v[5:6], s15
	v_mul_f64 v[3:4], v[3:4], s[2:3]
	v_cvt_f64_i32_e32 v[7:8], s33
                                        ; implicit-def: $vgpr0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[3:4], v[3:4], v[5:6]
	v_div_scale_f64 v[5:6], null, v[7:8], v[7:8], v[3:4]
	v_div_scale_f64 v[13:14], vcc_lo, v[3:4], v[7:8], v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[9:10], v[5:6]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[11:12], -v[5:6], v[9:10], 1.0
	v_fma_f64 v[9:10], v[9:10], v[11:12], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[11:12], -v[5:6], v[9:10], 1.0
	v_fma_f64 v[9:10], v[9:10], v[11:12], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[11:12], v[13:14], v[9:10]
	v_fma_f64 v[5:6], -v[5:6], v[11:12], v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[5:6], v[5:6], v[9:10], v[11:12]
	v_div_fixup_f64 v[3:4], v[5:6], v[7:8], v[3:4]
                                        ; implicit-def: $vgpr5_vgpr6
                                        ; implicit-def: $vgpr7_vgpr8
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ngt_f64_e64 s1, 0x41d00000, |v[3:4]|
	v_trig_preop_f64 v[13:14], |v[3:4]|, 0
	v_trig_preop_f64 v[11:12], |v[3:4]|, 1
	v_ldexp_f64 v[15:16], |v[3:4]|, 0xffffff80
	v_trig_preop_f64 v[9:10], |v[3:4]|, 2
	v_and_b32_e32 v22, 0x7fffffff, v4
	s_and_saveexec_b32 s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s4, exec_lo, s0
	s_cbranch_execz .LBB0_15
; %bb.14:
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[3:4]|
	v_mov_b32_e32 v36, 0
	s_mov_b32 s3, 0x3ff921fb
	s_mov_b32 s6, 0x33145c07
	s_mov_b32 s7, 0x3c91a626
	v_dual_cndmask_b32 v6, v22, v16 :: v_dual_cndmask_b32 v5, v3, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[7:8], v[13:14], v[5:6]
	v_mul_f64 v[17:18], v[11:12], v[5:6]
	v_mul_f64 v[32:33], v[9:10], v[5:6]
	v_fma_f64 v[19:20], v[13:14], v[5:6], -v[7:8]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[34:35], v[11:12], v[5:6], -v[17:18]
	v_fma_f64 v[5:6], v[9:10], v[5:6], -v[32:33]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[23:24], v[17:18], v[19:20]
	v_add_f64 v[25:26], v[23:24], -v[17:18]
	v_add_f64 v[30:31], v[7:8], v[23:24]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[28:29], v[23:24], -v[25:26]
	v_add_f64 v[19:20], v[19:20], -v[25:26]
	v_ldexp_f64 v[25:26], v[30:31], -2
	v_add_f64 v[7:8], v[30:31], -v[7:8]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[17:18], v[17:18], -v[28:29]
	v_add_f64 v[28:29], v[32:33], v[34:35]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[25:26]|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[7:8], v[23:24], -v[7:8]
	v_add_f64 v[17:18], v[19:20], v[17:18]
	v_fract_f64_e32 v[19:20], v[25:26]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[23:24], v[28:29], v[17:18]
	v_dual_cndmask_b32 v20, 0, v20 :: v_dual_cndmask_b32 v19, 0, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[19:20], v[19:20], 2
	v_add_f64 v[25:26], v[7:8], v[23:24]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[30:31], v[25:26], v[19:20]
	v_add_f64 v[7:8], v[25:26], -v[7:8]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[30:31]
	v_add_f64 v[30:31], v[28:29], -v[32:33]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[7:8], v[23:24], -v[7:8]
	v_cndmask_b32_e64 v37, 0, 0x40100000, vcc_lo
	v_add_f64 v[41:42], v[28:29], -v[30:31]
	v_add_f64 v[30:31], v[34:35], -v[30:31]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[19:20], v[19:20], v[36:37]
	v_add_f64 v[37:38], v[23:24], -v[28:29]
	v_add_f64 v[34:35], v[32:33], -v[41:42]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[39:40], v[25:26], v[19:20]
	v_add_f64 v[43:44], v[23:24], -v[37:38]
	v_add_f64 v[17:18], v[17:18], -v[37:38]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[30:31], v[30:31], v[34:35]
	v_cvt_i32_f64_e32 v0, v[39:40]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[28:29], v[28:29], -v[43:44]
	v_cvt_f64_i32_e32 v[37:38], v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[17:18], v[17:18], v[28:29]
	v_add_f64 v[19:20], v[19:20], -v[37:38]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[17:18], v[30:31], v[17:18]
	v_add_f64 v[28:29], v[25:26], v[19:20]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[5:6], v[5:6], v[17:18]
	v_add_f64 v[17:18], v[28:29], -v[19:20]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[28:29]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[5:6], v[7:8], v[5:6]
	v_add_f64 v[7:8], v[25:26], -v[17:18]
	v_cndmask_b32_e64 v37, 0, 0x3ff00000, vcc_lo
	v_add_co_ci_u32_e64 v0, s0, 0, v0, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[5:6], v[5:6], v[7:8]
	v_add_f64 v[7:8], v[28:29], -v[36:37]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[17:18], v[7:8], v[5:6]
	v_mul_f64 v[19:20], v[17:18], s[2:3]
	v_add_f64 v[7:8], v[17:18], -v[7:8]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[23:24], v[17:18], s[2:3], -v[19:20]
	v_add_f64 v[5:6], v[5:6], -v[7:8]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[7:8], v[17:18], s[6:7], v[23:24]
	v_fma_f64 v[7:8], v[5:6], s[2:3], v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[5:6], v[19:20], v[7:8]
	v_add_f64 v[17:18], v[5:6], -v[19:20]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[7:8], v[7:8], -v[17:18]
.LBB0_15:                               ; %Flow143
	s_and_not1_saveexec_b32 s0, s4
	s_cbranch_execz .LBB0_17
; %bb.16:
	s_mov_b32 s2, 0x6dc9c883
	s_mov_b32 s3, 0x3fe45f30
	s_mov_b32 s5, 0xbc91a626
	v_mul_f64 v[5:6], |v[3:4]|, s[2:3]
	s_mov_b32 s2, 0x54442d18
	s_mov_b32 s3, 0xbff921fb
	s_mov_b32 s4, 0x33145c00
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[17:18], v[5:6]
	v_fma_f64 v[5:6], v[17:18], s[2:3], |v[3:4]|
	v_mul_f64 v[7:8], v[17:18], s[4:5]
	s_mov_b32 s2, 0x252049c0
	s_mov_b32 s3, 0xb97b839a
	v_cvt_i32_f64_e32 v0, v[17:18]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[23:24], v[17:18], s[4:5], v[5:6]
	v_add_f64 v[19:20], v[5:6], v[7:8]
	s_mov_b32 s5, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[5:6], v[5:6], -v[19:20]
	v_add_f64 v[19:20], v[19:20], -v[23:24]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[5:6], v[5:6], v[7:8]
	v_fma_f64 v[7:8], v[17:18], s[4:5], v[7:8]
	v_add_f64 v[5:6], v[19:20], v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[5:6], v[5:6], -v[7:8]
	v_fma_f64 v[7:8], v[17:18], s[2:3], v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[5:6], v[23:24], v[7:8]
	v_add_f64 v[19:20], v[5:6], -v[23:24]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[7:8], v[7:8], -v[19:20]
.LBB0_17:                               ; %_ZL3cosd.exit
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr21
                                        ; implicit-def: $vgpr17_vgpr18
                                        ; implicit-def: $vgpr19_vgpr20
	s_and_saveexec_b32 s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s1, exec_lo, s0
	s_cbranch_execz .LBB0_19
; %bb.18:
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[3:4]|
	v_mov_b32_e32 v32, 0
	s_mov_b32 s2, 0x54442d18
	s_mov_b32 s3, 0x3ff921fb
	s_mov_b32 s4, 0x33145c07
	s_mov_b32 s5, 0x3c91a626
	v_dual_cndmask_b32 v16, v22, v16 :: v_dual_cndmask_b32 v15, v3, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[17:18], v[13:14], v[15:16]
	v_mul_f64 v[19:20], v[11:12], v[15:16]
	v_mul_f64 v[30:31], v[9:10], v[15:16]
	v_fma_f64 v[13:14], v[13:14], v[15:16], -v[17:18]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[11:12], v[11:12], v[15:16], -v[19:20]
	v_fma_f64 v[9:10], v[9:10], v[15:16], -v[30:31]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[21:22], v[19:20], v[13:14]
	v_add_f64 v[23:24], v[21:22], -v[19:20]
	v_add_f64 v[28:29], v[17:18], v[21:22]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[25:26], v[21:22], -v[23:24]
	v_add_f64 v[13:14], v[13:14], -v[23:24]
	v_ldexp_f64 v[23:24], v[28:29], -2
	v_add_f64 v[17:18], v[28:29], -v[17:18]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[19:20], v[19:20], -v[25:26]
	v_add_f64 v[25:26], v[30:31], v[11:12]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[23:24]|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[17:18], v[21:22], -v[17:18]
	v_add_f64 v[13:14], v[13:14], v[19:20]
	v_fract_f64_e32 v[19:20], v[23:24]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[21:22], v[25:26], v[13:14]
	v_dual_cndmask_b32 v20, 0, v20 :: v_dual_cndmask_b32 v19, 0, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[19:20], v[19:20], 2
	v_add_f64 v[23:24], v[17:18], v[21:22]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[28:29], v[23:24], v[19:20]
	v_add_f64 v[15:16], v[23:24], -v[17:18]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[28:29]
	v_add_f64 v[28:29], v[25:26], -v[30:31]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[15:16], v[21:22], -v[15:16]
	v_cndmask_b32_e64 v33, 0, 0x40100000, vcc_lo
	v_add_f64 v[37:38], v[25:26], -v[28:29]
	v_add_f64 v[11:12], v[11:12], -v[28:29]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[19:20], v[19:20], v[32:33]
	v_add_f64 v[33:34], v[21:22], -v[25:26]
	v_add_f64 v[28:29], v[30:31], -v[37:38]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[35:36], v[23:24], v[19:20]
	v_add_f64 v[39:40], v[21:22], -v[33:34]
	v_add_f64 v[13:14], v[13:14], -v[33:34]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[11:12], v[11:12], v[28:29]
	v_cvt_i32_f64_e32 v35, v[35:36]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[25:26], v[25:26], -v[39:40]
	v_cvt_f64_i32_e32 v[33:34], v35
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[13:14], v[13:14], v[25:26]
	v_add_f64 v[19:20], v[19:20], -v[33:34]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[11:12], v[11:12], v[13:14]
	v_add_f64 v[13:14], v[23:24], v[19:20]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[9:10], v[11:12]
	v_add_f64 v[11:12], v[13:14], -v[19:20]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[13:14]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[9:10], v[15:16], v[9:10]
	v_add_f64 v[11:12], v[23:24], -v[11:12]
	v_cndmask_b32_e64 v33, 0, 0x3ff00000, vcc_lo
	v_add_co_ci_u32_e64 v21, s0, 0, v35, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[9:10], v[9:10], v[11:12]
	v_add_f64 v[11:12], v[13:14], -v[32:33]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[13:14], v[11:12], v[9:10]
	v_mul_f64 v[15:16], v[13:14], s[2:3]
	v_add_f64 v[11:12], v[13:14], -v[11:12]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[17:18], v[13:14], s[2:3], -v[15:16]
	v_add_f64 v[9:10], v[9:10], -v[11:12]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[11:12], v[13:14], s[4:5], v[17:18]
	v_fma_f64 v[9:10], v[9:10], s[2:3], v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[17:18], v[15:16], v[9:10]
	v_add_f64 v[11:12], v[17:18], -v[15:16]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[19:20], v[9:10], -v[11:12]
.LBB0_19:                               ; %Flow
	s_and_not1_saveexec_b32 s0, s1
	s_cbranch_execz .LBB0_21
; %bb.20:
	s_mov_b32 s2, 0x6dc9c883
	s_mov_b32 s3, 0x3fe45f30
	s_mov_b32 s5, 0xbc91a626
	v_mul_f64 v[9:10], |v[3:4]|, s[2:3]
	s_mov_b32 s2, 0x54442d18
	s_mov_b32 s3, 0xbff921fb
	s_mov_b32 s4, 0x33145c00
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[9:10], v[9:10]
	v_fma_f64 v[11:12], v[9:10], s[2:3], |v[3:4]|
	v_mul_f64 v[13:14], v[9:10], s[4:5]
	s_mov_b32 s2, 0x252049c0
	s_mov_b32 s3, 0xb97b839a
	v_cvt_i32_f64_e32 v21, v[9:10]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[19:20], v[9:10], s[4:5], v[11:12]
	v_add_f64 v[15:16], v[11:12], v[13:14]
	s_mov_b32 s5, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[11:12], v[11:12], -v[15:16]
	v_add_f64 v[15:16], v[15:16], -v[19:20]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[11:12], v[11:12], v[13:14]
	v_fma_f64 v[13:14], v[9:10], s[4:5], v[13:14]
	v_add_f64 v[11:12], v[15:16], v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[11:12], v[11:12], -v[13:14]
	v_fma_f64 v[11:12], v[9:10], s[2:3], v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[17:18], v[19:20], v[11:12]
	v_add_f64 v[13:14], v[17:18], -v[19:20]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[19:20], v[11:12], -v[13:14]
.LBB0_21:                               ; %_ZL3sind.exit
	s_or_b32 exec_lo, exec_lo, s0
	v_mul_f64 v[9:10], v[5:6], v[5:6]
	v_mul_f64 v[11:12], v[17:18], v[17:18]
	s_mov_b32 s0, 0xb42fdfa7
	s_mov_b32 s2, 0xf9a43bb8
	s_mov_b32 s1, 0xbe5ae600
	s_mov_b32 s3, 0x3de5e0b2
	s_mov_b32 s4, 0x796cde01
	s_mov_b32 s5, 0x3ec71de3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[36:37], v[7:8], 0.5
	v_mul_f64 v[42:43], v[19:20], 0.5
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[13:14], v[9:10], s[2:3], s[0:1]
	v_fma_f64 v[15:16], v[11:12], s[2:3], s[0:1]
	s_mov_b32 s0, 0x9037ab78
	s_mov_b32 s2, 0x46cc5e42
	s_mov_b32 s1, 0x3e21eeb6
	s_mov_b32 s3, 0xbda907db
	v_mul_f64 v[24:25], v[9:10], 0.5
	v_fma_f64 v[22:23], v[9:10], s[2:3], s[0:1]
	v_fma_f64 v[28:29], v[11:12], s[2:3], s[0:1]
	v_mul_f64 v[30:31], v[11:12], 0.5
	s_mov_b32 s0, 0xa17f65f6
	s_mov_b32 s2, 0x19e83e5c
	s_mov_b32 s1, 0xbe927e4f
	s_mov_b32 s3, 0xbf2a01a0
	v_mul_f64 v[38:39], v[5:6], -v[9:10]
	v_mul_f64 v[44:45], v[17:18], -v[11:12]
	v_fma_f64 v[13:14], v[9:10], v[13:14], s[4:5]
	v_fma_f64 v[15:16], v[11:12], v[15:16], s[4:5]
	v_add_f64 v[32:33], -v[24:25], 1.0
	v_fma_f64 v[22:23], v[9:10], v[22:23], s[0:1]
	v_fma_f64 v[28:29], v[11:12], v[28:29], s[0:1]
	v_add_f64 v[34:35], -v[30:31], 1.0
	s_mov_b32 s0, 0x19f4ec90
	s_mov_b32 s1, 0x3efa01a0
	v_fma_f64 v[13:14], v[9:10], v[13:14], s[2:3]
	v_fma_f64 v[15:16], v[11:12], v[15:16], s[2:3]
	s_mov_b32 s2, 0x11110bb3
	s_mov_b32 s3, 0x3f811111
	v_add_f64 v[40:41], -v[32:33], 1.0
	v_fma_f64 v[22:23], v[9:10], v[22:23], s[0:1]
	v_fma_f64 v[28:29], v[11:12], v[28:29], s[0:1]
	v_add_f64 v[46:47], -v[34:35], 1.0
	s_mov_b32 s0, 0x16c16967
	s_mov_b32 s1, 0xbf56c16c
	v_fma_f64 v[13:14], v[9:10], v[13:14], s[2:3]
	v_fma_f64 v[15:16], v[11:12], v[15:16], s[2:3]
	v_add_f64 v[24:25], v[40:41], -v[24:25]
	v_fma_f64 v[22:23], v[9:10], v[22:23], s[0:1]
	v_fma_f64 v[28:29], v[11:12], v[28:29], s[0:1]
	v_add_f64 v[30:31], v[46:47], -v[30:31]
	s_mov_b32 s0, 0x55555555
	s_mov_b32 s1, 0x3fa55555
	v_fma_f64 v[13:14], v[38:39], v[13:14], v[36:37]
	v_fma_f64 v[15:16], v[44:45], v[15:16], v[42:43]
	v_mul_f64 v[36:37], v[9:10], v[9:10]
	v_fma_f64 v[24:25], v[5:6], -v[7:8], v[24:25]
	v_fma_f64 v[22:23], v[9:10], v[22:23], s[0:1]
	v_fma_f64 v[7:8], v[9:10], v[13:14], -v[7:8]
	v_mul_f64 v[9:10], v[11:12], v[11:12]
	v_fma_f64 v[13:14], v[11:12], v[28:29], s[0:1]
	v_fma_f64 v[28:29], v[17:18], -v[19:20], v[30:31]
	v_fma_f64 v[11:12], v[11:12], v[15:16], -v[19:20]
	s_mov_b32 s1, 0xbfc55555
	v_fma_f64 v[15:16], v[36:37], v[22:23], v[24:25]
	v_fma_f64 v[7:8], v[38:39], s[0:1], v[7:8]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[9:10], v[9:10], v[13:14], v[28:29]
	v_fma_f64 v[11:12], v[44:45], s[0:1], v[11:12]
	v_cmp_class_f64_e64 s0, v[3:4], 0x1f8
	v_lshlrev_b32_e32 v3, 30, v21
	v_add_f64 v[13:14], v[32:33], v[15:16]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v15, v3, v4
	v_add_f64 v[6:7], v[5:6], -v[7:8]
	v_and_b32_e32 v5, 1, v0
	v_add_f64 v[8:9], v[34:35], v[9:10]
	v_add_f64 v[10:11], v[17:18], -v[11:12]
	v_cmp_eq_u32_e32 vcc_lo, 0, v5
	v_cndmask_b32_e32 v12, v6, v13, vcc_lo
	v_and_b32_e32 v13, 1, v21
	ds_load_b128 v[3:6], v27
	v_xor_b32_e32 v7, 0x80000000, v7
	v_lshlrev_b32_e32 v0, 30, v0
	v_cmp_eq_u32_e64 s1, 0, v13
	v_and_b32_e32 v13, 0x80000000, v15
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_cndmask_b32 v7, v7, v14 :: v_dual_and_b32 v0, 0x80000000, v0
	v_cndmask_b32_e64 v10, v8, v10, s1
	v_cndmask_b32_e64 v8, v9, v11, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v0, v7, v0
	v_cndmask_b32_e64 v9, 0, v10, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v11, v8, v13
	v_cndmask_b32_e64 v8, 0, v12, s0
	v_cndmask_b32_e64 v10, 0x7ff80000, v11, s0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mul_f64 v[11:12], v[5:6], v[9:10]
	v_mul_f64 v[15:16], v[3:4], v[9:10]
	v_cndmask_b32_e64 v9, 0x7ff80000, v0, s0
	v_fma_f64 v[3:4], v[3:4], v[8:9], -v[11:12]
	s_delay_alu instid0(VALU_DEP_3)
	v_fma_f64 v[5:6], v[5:6], v[8:9], v[15:16]
	global_store_b128 v[1:2], v[3:6], off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6fft_16PN6thrust7complexIdEEi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 12
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 55
		.amdhsa_next_free_sgpr 46
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z6fft_16PN6thrust7complexIdEEi, .Lfunc_end0-_Z6fft_16PN6thrust7complexIdEEi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 5968
; NumSgprs: 48
; NumVgprs: 55
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 5
; VGPRBlocks: 6
; NumSGPRsForWavesPerEU: 48
; NumVGPRsForWavesPerEU: 55
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z5fft_8PN6thrust7complexIdEEi ; -- Begin function _Z5fft_8PN6thrust7complexIdEEi
	.globl	_Z5fft_8PN6thrust7complexIdEEi
	.p2align	8
	.type	_Z5fft_8PN6thrust7complexIdEEi,@function
_Z5fft_8PN6thrust7complexIdEEi:         ; @_Z5fft_8PN6thrust7complexIdEEi
; %bb.0:
	s_clause 0x1
	s_load_b32 s33, s[0:1], 0x8
	s_load_b64 s[0:1], s[0:1], 0x0
	v_log_f32_e32 v7, 0x41100000
	v_lshl_add_u32 v27, v0, 4, 0
	s_waitcnt_depctr 0xfff
	v_cvt_i32_f32_e32 v7, v7
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s2, s33, 31
	s_mul_i32 s14, s14, s33
	s_lshr_b32 s2, s2, 29
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s2, s33, s2
	s_ashr_i32 s2, s2, 3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v1, s2, v0
	v_add3_u32 v1, s14, s15, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[1:2], 4, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s0, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	v_cmp_gt_i32_e32 vcc_lo, 1, v7
	v_readfirstlane_b32 s1, v7
	s_mov_b32 s0, 0
	global_load_b128 v[3:6], v[1:2], off
	s_and_b32 vcc_lo, exec_lo, vcc_lo
	s_waitcnt vmcnt(0)
	ds_store_b128 v27, v[3:6]
	v_mov_b32_e32 v5, 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_vccnz .LBB1_3
; %bb.1:                                ; %.lr.ph.preheader
	s_add_i32 s1, s1, -1
.LBB1_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_lshrrev_b32_e32 v3, s0, v0
	s_lshl_b32 s2, 1, s1
	s_add_i32 s1, s1, -1
	s_add_i32 s0, s0, 1
	s_cmp_eq_u32 s1, -1
	v_and_b32_e32 v3, 1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e32 vcc_lo, 1, v3
	v_cndmask_b32_e64 v3, 0, s2, vcc_lo
	v_or_b32_e32 v5, v3, v5
	s_cbranch_scc0 .LBB1_2
.LBB1_3:                                ; %Flow147
	v_cvt_f64_i32_e32 v[3:4], v0
	s_delay_alu instid0(VALU_DEP_2)
	v_lshl_add_u32 v5, v5, 4, 0
	s_mov_b32 s3, 0xc00921fb
	s_mov_b32 s2, 0x54442d18
	s_mov_b32 s10, 0x6dc9c883
	s_mov_b32 s12, 0x33145c00
	ds_load_b128 v[5:8], v5
	s_mov_b32 s16, 0x252049c0
	s_mov_b32 s18, 0x9037ab78
	s_mov_b32 s20, 0x46cc5e42
	s_mov_b32 s22, 0xa17f65f6
	s_mov_b32 s24, 0x19f4ec90
	s_mov_b32 s26, 0x16c16967
	s_mov_b32 s28, 0x55555555
	s_mov_b32 s30, 0xb42fdfa7
	s_mov_b32 s34, 0xf9a43bb8
	s_mov_b32 s36, 0x796cde01
	s_mov_b32 s38, 0x19e83e5c
	s_mov_b32 s40, 0x11110bb3
	s_mov_b32 s14, 0
	s_mov_b32 s44, 1
	s_mov_b32 s5, 0x3ff921fb
	s_mov_b32 s7, 0x3c91a626
	s_mov_b32 s8, 0x33145c07
	s_mov_b32 s11, 0x3fe45f30
	s_mov_b32 s13, 0xbc91a626
	s_waitcnt lgkmcnt(0)
	ds_store_b128 v27, v[5:8] offset:128
	v_mov_b32_e32 v7, 0
	s_mov_b32 s17, 0xb97b839a
	s_mov_b32 s19, 0x3e21eeb6
	s_mov_b32 s21, 0xbda907db
	s_mov_b32 s23, 0xbe927e4f
	s_mov_b32 s25, 0x3efa01a0
	s_mov_b32 s27, 0xbf56c16c
	s_mov_b32 s29, 0x3fa55555
	s_mov_b32 s31, 0xbe5ae600
	s_mov_b32 s35, 0x3de5e0b2
	s_mov_b32 s37, 0x3ec71de3
	v_mul_f64 v[5:6], v[3:4], s[2:3]
	s_mov_b32 s39, 0xbf2a01a0
	s_mov_b32 s41, 0x3f811111
	s_mov_b32 s3, 0xbff921fb
	s_mov_b32 s43, 0xbfc55555
	s_mov_b32 s45, 1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB1_4:                                ; =>This Inner Loop Header: Depth=1
	v_cvt_f64_i32_e32 v[8:9], s45
                                        ; implicit-def: $vgpr28
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f64 v[10:11], null, v[8:9], v[8:9], v[5:6]
	v_div_scale_f64 v[16:17], vcc_lo, v[5:6], v[8:9], v[5:6]
	v_rcp_f64_e32 v[12:13], v[10:11]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[14:15], -v[10:11], v[12:13], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[12:13], v[12:13], v[14:15], v[12:13]
	v_fma_f64 v[14:15], -v[10:11], v[12:13], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[12:13], v[12:13], v[14:15], v[12:13]
	v_mul_f64 v[14:15], v[16:17], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[10:11], -v[10:11], v[14:15], v[16:17]
	v_div_fmas_f64 v[10:11], v[10:11], v[12:13], v[14:15]
                                        ; implicit-def: $vgpr13_vgpr14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f64 v[9:10], v[10:11], v[8:9], v[5:6]
                                        ; implicit-def: $vgpr11_vgpr12
	v_cmp_ngt_f64_e64 s1, 0x41d00000, |v[9:10]|
	v_trig_preop_f64 v[19:20], |v[9:10]|, 0
	v_trig_preop_f64 v[17:18], |v[9:10]|, 1
	v_ldexp_f64 v[21:22], |v[9:10]|, 0xffffff80
	v_trig_preop_f64 v[15:16], |v[9:10]|, 2
	v_and_b32_e32 v30, 0x7fffffff, v10
	s_and_saveexec_b32 s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s6, exec_lo, s0
	s_cbranch_execz .LBB1_6
; %bb.5:                                ;   in Loop: Header=BB1_4 Depth=1
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[9:10]|
	s_mov_b32 s4, s2
	s_mov_b32 s9, s7
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v12, v30, v22 :: v_dual_cndmask_b32 v11, v9, v21
	v_mul_f64 v[13:14], v[19:20], v[11:12]
	v_mul_f64 v[23:24], v[17:18], v[11:12]
	v_mul_f64 v[37:38], v[15:16], v[11:12]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[25:26], v[19:20], v[11:12], -v[13:14]
	v_fma_f64 v[39:40], v[17:18], v[11:12], -v[23:24]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[11:12], v[15:16], v[11:12], -v[37:38]
	v_add_f64 v[28:29], v[23:24], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[31:32], v[28:29], -v[23:24]
	v_add_f64 v[35:36], v[13:14], v[28:29]
	v_add_f64 v[33:34], v[28:29], -v[31:32]
	v_add_f64 v[25:26], v[25:26], -v[31:32]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[31:32], v[35:36], -2
	v_add_f64 v[13:14], v[35:36], -v[13:14]
	v_add_f64 v[23:24], v[23:24], -v[33:34]
	v_add_f64 v[33:34], v[37:38], v[39:40]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[31:32]|
	v_add_f64 v[13:14], v[28:29], -v[13:14]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[23:24], v[25:26], v[23:24]
	v_fract_f64_e32 v[25:26], v[31:32]
	v_add_f64 v[28:29], v[33:34], v[23:24]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v26, 0, v26 :: v_dual_cndmask_b32 v25, 0, v25
	v_ldexp_f64 v[25:26], v[25:26], 2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[31:32], v[13:14], v[28:29]
	v_add_f64 v[41:42], v[28:29], -v[33:34]
	v_add_f64 v[35:36], v[31:32], v[25:26]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[47:48], v[28:29], -v[41:42]
	v_add_f64 v[23:24], v[23:24], -v[41:42]
	v_add_f64 v[13:14], v[31:32], -v[13:14]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[35:36]
	v_add_f64 v[35:36], v[33:34], -v[37:38]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[13:14], v[28:29], -v[13:14]
	v_cndmask_b32_e64 v8, 0, 0x40100000, vcc_lo
	v_add_f64 v[45:46], v[33:34], -v[35:36]
	v_add_f64 v[35:36], v[39:40], -v[35:36]
	v_add_f64 v[33:34], v[33:34], -v[47:48]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[25:26], v[25:26], v[7:8]
	v_add_f64 v[39:40], v[37:38], -v[45:46]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[23:24], v[23:24], v[33:34]
	v_add_f64 v[43:44], v[31:32], v[25:26]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[35:36], v[35:36], v[39:40]
	v_cvt_i32_f64_e32 v8, v[43:44]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[23:24], v[35:36], v[23:24]
	v_cvt_f64_i32_e32 v[41:42], v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[11:12], v[11:12], v[23:24]
	v_add_f64 v[25:26], v[25:26], -v[41:42]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[11:12], v[13:14], v[11:12]
	v_add_f64 v[33:34], v[31:32], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[23:24], v[33:34], -v[25:26]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[33:34]
	v_add_f64 v[13:14], v[31:32], -v[23:24]
	v_add_co_ci_u32_e64 v28, s0, 0, v8, vcc_lo
	v_cndmask_b32_e64 v8, 0, 0x3ff00000, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[11:12], v[11:12], v[13:14]
	v_add_f64 v[13:14], v[33:34], -v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[23:24], v[13:14], v[11:12]
	v_mul_f64 v[25:26], v[23:24], s[4:5]
	v_add_f64 v[13:14], v[23:24], -v[13:14]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[31:32], v[23:24], s[4:5], -v[25:26]
	v_add_f64 v[11:12], v[11:12], -v[13:14]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[13:14], v[23:24], s[8:9], v[31:32]
	v_fma_f64 v[13:14], v[11:12], s[4:5], v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[11:12], v[25:26], v[13:14]
	v_add_f64 v[23:24], v[11:12], -v[25:26]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[13:14], v[13:14], -v[23:24]
.LBB1_6:                                ; %Flow145
                                        ;   in Loop: Header=BB1_4 Depth=1
	s_and_not1_saveexec_b32 s0, s6
	s_cbranch_execz .LBB1_8
; %bb.7:                                ;   in Loop: Header=BB1_4 Depth=1
	v_mul_f64 v[11:12], |v[9:10]|, s[10:11]
	s_mov_b32 s6, s12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[23:24], v[11:12]
	v_fma_f64 v[11:12], v[23:24], s[2:3], |v[9:10]|
	v_mul_f64 v[13:14], v[23:24], s[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[28:29], v[23:24], s[12:13], v[11:12]
	v_add_f64 v[25:26], v[11:12], v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[11:12], v[11:12], -v[25:26]
	v_add_f64 v[25:26], v[25:26], -v[28:29]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[11:12], v[11:12], v[13:14]
	v_fma_f64 v[13:14], v[23:24], s[6:7], v[13:14]
	v_add_f64 v[11:12], v[25:26], v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[11:12], v[11:12], -v[13:14]
	v_fma_f64 v[13:14], v[23:24], s[16:17], v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[11:12], v[28:29], v[13:14]
	v_add_f64 v[25:26], v[11:12], -v[28:29]
	v_cvt_i32_f64_e32 v28, v[23:24]
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f64 v[13:14], v[13:14], -v[25:26]
.LBB1_8:                                ; %_ZL3cosd.exit95
                                        ;   in Loop: Header=BB1_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr29
                                        ; implicit-def: $vgpr23_vgpr24
                                        ; implicit-def: $vgpr25_vgpr26
	s_and_saveexec_b32 s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s1, exec_lo, s0
	s_cbranch_execz .LBB1_10
; %bb.9:                                ;   in Loop: Header=BB1_4 Depth=1
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[9:10]|
	s_mov_b32 s4, s2
	s_mov_b32 s9, s7
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v22, v30, v22 :: v_dual_cndmask_b32 v21, v9, v21
	v_mul_f64 v[23:24], v[19:20], v[21:22]
	v_mul_f64 v[25:26], v[17:18], v[21:22]
	v_mul_f64 v[37:38], v[15:16], v[21:22]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[19:20], v[19:20], v[21:22], -v[23:24]
	v_fma_f64 v[17:18], v[17:18], v[21:22], -v[25:26]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[15:16], v[15:16], v[21:22], -v[37:38]
	v_add_f64 v[29:30], v[25:26], v[19:20]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[31:32], v[29:30], -v[25:26]
	v_add_f64 v[35:36], v[23:24], v[29:30]
	v_add_f64 v[33:34], v[29:30], -v[31:32]
	v_add_f64 v[19:20], v[19:20], -v[31:32]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[31:32], v[35:36], -2
	v_add_f64 v[23:24], v[35:36], -v[23:24]
	v_add_f64 v[25:26], v[25:26], -v[33:34]
	v_add_f64 v[33:34], v[37:38], v[17:18]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[31:32]|
	v_add_f64 v[23:24], v[29:30], -v[23:24]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[19:20], v[19:20], v[25:26]
	v_fract_f64_e32 v[25:26], v[31:32]
	v_add_f64 v[29:30], v[33:34], v[19:20]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v26, 0, v26 :: v_dual_cndmask_b32 v25, 0, v25
	v_ldexp_f64 v[25:26], v[25:26], 2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[31:32], v[23:24], v[29:30]
	v_add_f64 v[39:40], v[29:30], -v[33:34]
	v_add_f64 v[35:36], v[31:32], v[25:26]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[45:46], v[29:30], -v[39:40]
	v_add_f64 v[19:20], v[19:20], -v[39:40]
	v_add_f64 v[21:22], v[31:32], -v[23:24]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[35:36]
	v_add_f64 v[35:36], v[33:34], -v[37:38]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[21:22], v[29:30], -v[21:22]
	v_cndmask_b32_e64 v8, 0, 0x40100000, vcc_lo
	v_add_f64 v[43:44], v[33:34], -v[35:36]
	v_add_f64 v[17:18], v[17:18], -v[35:36]
	v_add_f64 v[33:34], v[33:34], -v[45:46]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[25:26], v[25:26], v[7:8]
	v_add_f64 v[35:36], v[37:38], -v[43:44]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[19:20], v[19:20], v[33:34]
	v_add_f64 v[41:42], v[31:32], v[25:26]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[17:18], v[17:18], v[35:36]
	v_cvt_i32_f64_e32 v8, v[41:42]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[17:18], v[17:18], v[19:20]
	v_cvt_f64_i32_e32 v[39:40], v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[15:16], v[15:16], v[17:18]
	v_add_f64 v[25:26], v[25:26], -v[39:40]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[15:16], v[21:22], v[15:16]
	v_add_f64 v[19:20], v[31:32], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[17:18], v[19:20], -v[25:26]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[19:20]
	v_add_f64 v[17:18], v[31:32], -v[17:18]
	v_add_co_ci_u32_e64 v29, s0, 0, v8, vcc_lo
	v_cndmask_b32_e64 v8, 0, 0x3ff00000, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[15:16], v[15:16], v[17:18]
	v_add_f64 v[17:18], v[19:20], -v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[19:20], v[17:18], v[15:16]
	v_mul_f64 v[21:22], v[19:20], s[4:5]
	v_add_f64 v[17:18], v[19:20], -v[17:18]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[23:24], v[19:20], s[4:5], -v[21:22]
	v_add_f64 v[15:16], v[15:16], -v[17:18]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[17:18], v[19:20], s[8:9], v[23:24]
	v_fma_f64 v[15:16], v[15:16], s[4:5], v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[23:24], v[21:22], v[15:16]
	v_add_f64 v[17:18], v[23:24], -v[21:22]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[25:26], v[15:16], -v[17:18]
.LBB1_10:                               ; %Flow144
                                        ;   in Loop: Header=BB1_4 Depth=1
	s_and_not1_saveexec_b32 s0, s1
	s_cbranch_execz .LBB1_12
; %bb.11:                               ;   in Loop: Header=BB1_4 Depth=1
	v_mul_f64 v[15:16], |v[9:10]|, s[10:11]
	s_mov_b32 s6, s12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[15:16], v[15:16]
	v_fma_f64 v[17:18], v[15:16], s[2:3], |v[9:10]|
	v_mul_f64 v[19:20], v[15:16], s[12:13]
	v_cvt_i32_f64_e32 v29, v[15:16]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[25:26], v[15:16], s[12:13], v[17:18]
	v_add_f64 v[21:22], v[17:18], v[19:20]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[17:18], v[17:18], -v[21:22]
	v_add_f64 v[21:22], v[21:22], -v[25:26]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[17:18], v[17:18], v[19:20]
	v_fma_f64 v[19:20], v[15:16], s[6:7], v[19:20]
	v_add_f64 v[17:18], v[21:22], v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[17:18], v[17:18], -v[19:20]
	v_fma_f64 v[17:18], v[15:16], s[16:17], v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[23:24], v[25:26], v[17:18]
	v_add_f64 v[19:20], v[23:24], -v[25:26]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[25:26], v[17:18], -v[19:20]
.LBB1_12:                               ; %_ZL3sind.exit100
                                        ;   in Loop: Header=BB1_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_mul_f64 v[15:16], v[11:12], v[11:12]
	v_mul_f64 v[17:18], v[23:24], v[23:24]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[42:43], v[13:14], 0.5
	v_mul_f64 v[48:49], v[25:26], 0.5
	s_mov_b32 s42, s28
	v_cmp_class_f64_e64 s0, v[9:10], 0x1f8
	s_sub_i32 s14, 1, s14
	s_not_b32 s1, s45
	s_lshl_b32 s4, s14, 3
	s_sub_i32 s44, 1, s44
	v_fma_f64 v[19:20], v[15:16], s[34:35], s[30:31]
	v_fma_f64 v[21:22], v[17:18], s[34:35], s[30:31]
	v_mul_f64 v[32:33], v[15:16], 0.5
	v_fma_f64 v[30:31], v[15:16], s[20:21], s[18:19]
	v_fma_f64 v[34:35], v[17:18], s[20:21], s[18:19]
	v_mul_f64 v[36:37], v[17:18], 0.5
	v_mul_f64 v[44:45], v[11:12], -v[15:16]
	v_mul_f64 v[50:51], v[23:24], -v[17:18]
	v_fma_f64 v[19:20], v[15:16], v[19:20], s[36:37]
	v_fma_f64 v[21:22], v[17:18], v[21:22], s[36:37]
	v_add_f64 v[38:39], -v[32:33], 1.0
	v_fma_f64 v[30:31], v[15:16], v[30:31], s[22:23]
	v_fma_f64 v[34:35], v[17:18], v[34:35], s[22:23]
	v_add_f64 v[40:41], -v[36:37], 1.0
	v_fma_f64 v[19:20], v[15:16], v[19:20], s[38:39]
	v_fma_f64 v[21:22], v[17:18], v[21:22], s[38:39]
	v_add_f64 v[46:47], -v[38:39], 1.0
	v_fma_f64 v[30:31], v[15:16], v[30:31], s[24:25]
	v_fma_f64 v[34:35], v[17:18], v[34:35], s[24:25]
	v_add_f64 v[52:53], -v[40:41], 1.0
	v_fma_f64 v[19:20], v[15:16], v[19:20], s[40:41]
	v_fma_f64 v[21:22], v[17:18], v[21:22], s[40:41]
	v_add_f64 v[32:33], v[46:47], -v[32:33]
	v_fma_f64 v[30:31], v[15:16], v[30:31], s[26:27]
	v_fma_f64 v[34:35], v[17:18], v[34:35], s[26:27]
	v_add_f64 v[36:37], v[52:53], -v[36:37]
	v_fma_f64 v[19:20], v[44:45], v[19:20], v[42:43]
	v_fma_f64 v[21:22], v[50:51], v[21:22], v[48:49]
	v_fma_f64 v[32:33], v[11:12], -v[13:14], v[32:33]
	v_mul_f64 v[42:43], v[15:16], v[15:16]
	v_fma_f64 v[30:31], v[15:16], v[30:31], s[28:29]
	v_fma_f64 v[13:14], v[15:16], v[19:20], -v[13:14]
	v_mul_f64 v[15:16], v[17:18], v[17:18]
	v_fma_f64 v[19:20], v[17:18], v[34:35], s[28:29]
	v_fma_f64 v[34:35], v[23:24], -v[25:26], v[36:37]
	v_fma_f64 v[17:18], v[17:18], v[21:22], -v[25:26]
	v_fma_f64 v[21:22], v[42:43], v[30:31], v[32:33]
	v_fma_f64 v[13:14], v[44:45], s[42:43], v[13:14]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[15:16], v[15:16], v[19:20], v[34:35]
	v_fma_f64 v[17:18], v[50:51], s[42:43], v[17:18]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[19:20], v[38:39], v[21:22]
	v_and_b32_e32 v21, s1, v0
	v_add_f64 v[11:12], v[11:12], -v[13:14]
	v_and_b32_e32 v8, 1, v28
	v_add_f64 v[13:14], v[40:41], v[15:16]
	v_add_f64 v[15:16], v[23:24], -v[17:18]
	v_and_b32_e32 v18, 1, v29
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cmp_eq_u32_e32 vcc_lo, 0, v8
	v_or_b32_e32 v8, s45, v0
	v_cmp_eq_u32_e64 s1, 0, v18
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v8, s4, v8
	v_lshl_add_u32 v8, v8, 4, 0
	v_cndmask_b32_e32 v17, v11, v19, vcc_lo
	v_xor_b32_e32 v12, 0x80000000, v12
	v_lshlrev_b32_e32 v9, 30, v29
	v_lshlrev_b32_e32 v19, 30, v28
	v_cndmask_b32_e64 v14, v14, v16, s1
	v_cndmask_b32_e64 v13, v13, v15, s1
	v_cndmask_b32_e32 v12, v12, v20, vcc_lo
	v_xor_b32_e32 v22, v9, v10
	ds_load_b128 v[8:11], v8
	v_and_b32_e32 v18, 0x80000000, v19
	v_add_nc_u32_e32 v15, s4, v21
	v_cndmask_b32_e64 v16, 0, v17, s0
	v_and_b32_e32 v19, 0x80000000, v22
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v12, v12, v18
	v_lshl_add_u32 v15, v15, 4, 0
	v_cndmask_b32_e64 v18, 0, v13, s0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v14, v14, v19
	v_cndmask_b32_e64 v17, 0x7ff80000, v12, s0
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v19, 0x7ff80000, v14, s0
	ds_load_b128 v[12:15], v15
	s_lshl_b32 s0, s45, 1
	s_cmp_gt_u32 s45, 3
	s_mov_b32 s45, s0
	s_waitcnt lgkmcnt(1)
	v_mul_f64 v[20:21], v[10:11], v[18:19]
	v_mul_f64 v[10:11], v[10:11], v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[16:17], v[8:9], v[16:17], -v[20:21]
	v_fma_f64 v[10:11], v[8:9], v[18:19], v[10:11]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[8:9], v[12:13], v[16:17]
	v_add_f64 v[10:11], v[14:15], v[10:11]
	v_lshl_add_u32 v12, s44, 7, v27
	ds_store_b128 v12, v[8:11]
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB1_4
; %bb.13:
	s_mov_b32 s3, 0xc01921fb
	s_mov_b32 s2, 0x54442d18
	v_cvt_f64_i32_e32 v[5:6], s15
	v_mul_f64 v[3:4], v[3:4], s[2:3]
	v_cvt_f64_i32_e32 v[7:8], s33
                                        ; implicit-def: $vgpr0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[3:4], v[3:4], v[5:6]
	v_div_scale_f64 v[5:6], null, v[7:8], v[7:8], v[3:4]
	v_div_scale_f64 v[13:14], vcc_lo, v[3:4], v[7:8], v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[9:10], v[5:6]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[11:12], -v[5:6], v[9:10], 1.0
	v_fma_f64 v[9:10], v[9:10], v[11:12], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[11:12], -v[5:6], v[9:10], 1.0
	v_fma_f64 v[9:10], v[9:10], v[11:12], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[11:12], v[13:14], v[9:10]
	v_fma_f64 v[5:6], -v[5:6], v[11:12], v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[5:6], v[5:6], v[9:10], v[11:12]
	v_div_fixup_f64 v[3:4], v[5:6], v[7:8], v[3:4]
                                        ; implicit-def: $vgpr5_vgpr6
                                        ; implicit-def: $vgpr7_vgpr8
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ngt_f64_e64 s1, 0x41d00000, |v[3:4]|
	v_trig_preop_f64 v[13:14], |v[3:4]|, 0
	v_trig_preop_f64 v[11:12], |v[3:4]|, 1
	v_ldexp_f64 v[15:16], |v[3:4]|, 0xffffff80
	v_trig_preop_f64 v[9:10], |v[3:4]|, 2
	v_and_b32_e32 v22, 0x7fffffff, v4
	s_and_saveexec_b32 s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s4, exec_lo, s0
	s_cbranch_execz .LBB1_15
; %bb.14:
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[3:4]|
	v_mov_b32_e32 v36, 0
	s_mov_b32 s3, 0x3ff921fb
	s_mov_b32 s6, 0x33145c07
	s_mov_b32 s7, 0x3c91a626
	v_dual_cndmask_b32 v6, v22, v16 :: v_dual_cndmask_b32 v5, v3, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[7:8], v[13:14], v[5:6]
	v_mul_f64 v[17:18], v[11:12], v[5:6]
	v_mul_f64 v[32:33], v[9:10], v[5:6]
	v_fma_f64 v[19:20], v[13:14], v[5:6], -v[7:8]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[34:35], v[11:12], v[5:6], -v[17:18]
	v_fma_f64 v[5:6], v[9:10], v[5:6], -v[32:33]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[23:24], v[17:18], v[19:20]
	v_add_f64 v[25:26], v[23:24], -v[17:18]
	v_add_f64 v[30:31], v[7:8], v[23:24]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[28:29], v[23:24], -v[25:26]
	v_add_f64 v[19:20], v[19:20], -v[25:26]
	v_ldexp_f64 v[25:26], v[30:31], -2
	v_add_f64 v[7:8], v[30:31], -v[7:8]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[17:18], v[17:18], -v[28:29]
	v_add_f64 v[28:29], v[32:33], v[34:35]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[25:26]|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[7:8], v[23:24], -v[7:8]
	v_add_f64 v[17:18], v[19:20], v[17:18]
	v_fract_f64_e32 v[19:20], v[25:26]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[23:24], v[28:29], v[17:18]
	v_dual_cndmask_b32 v20, 0, v20 :: v_dual_cndmask_b32 v19, 0, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[19:20], v[19:20], 2
	v_add_f64 v[25:26], v[7:8], v[23:24]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[30:31], v[25:26], v[19:20]
	v_add_f64 v[7:8], v[25:26], -v[7:8]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[30:31]
	v_add_f64 v[30:31], v[28:29], -v[32:33]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[7:8], v[23:24], -v[7:8]
	v_cndmask_b32_e64 v37, 0, 0x40100000, vcc_lo
	v_add_f64 v[41:42], v[28:29], -v[30:31]
	v_add_f64 v[30:31], v[34:35], -v[30:31]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[19:20], v[19:20], v[36:37]
	v_add_f64 v[37:38], v[23:24], -v[28:29]
	v_add_f64 v[34:35], v[32:33], -v[41:42]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[39:40], v[25:26], v[19:20]
	v_add_f64 v[43:44], v[23:24], -v[37:38]
	v_add_f64 v[17:18], v[17:18], -v[37:38]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[30:31], v[30:31], v[34:35]
	v_cvt_i32_f64_e32 v0, v[39:40]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[28:29], v[28:29], -v[43:44]
	v_cvt_f64_i32_e32 v[37:38], v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[17:18], v[17:18], v[28:29]
	v_add_f64 v[19:20], v[19:20], -v[37:38]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[17:18], v[30:31], v[17:18]
	v_add_f64 v[28:29], v[25:26], v[19:20]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[5:6], v[5:6], v[17:18]
	v_add_f64 v[17:18], v[28:29], -v[19:20]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[28:29]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[5:6], v[7:8], v[5:6]
	v_add_f64 v[7:8], v[25:26], -v[17:18]
	v_cndmask_b32_e64 v37, 0, 0x3ff00000, vcc_lo
	v_add_co_ci_u32_e64 v0, s0, 0, v0, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[5:6], v[5:6], v[7:8]
	v_add_f64 v[7:8], v[28:29], -v[36:37]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[17:18], v[7:8], v[5:6]
	v_mul_f64 v[19:20], v[17:18], s[2:3]
	v_add_f64 v[7:8], v[17:18], -v[7:8]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[23:24], v[17:18], s[2:3], -v[19:20]
	v_add_f64 v[5:6], v[5:6], -v[7:8]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[7:8], v[17:18], s[6:7], v[23:24]
	v_fma_f64 v[7:8], v[5:6], s[2:3], v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[5:6], v[19:20], v[7:8]
	v_add_f64 v[17:18], v[5:6], -v[19:20]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[7:8], v[7:8], -v[17:18]
.LBB1_15:                               ; %Flow143
	s_and_not1_saveexec_b32 s0, s4
	s_cbranch_execz .LBB1_17
; %bb.16:
	s_mov_b32 s2, 0x6dc9c883
	s_mov_b32 s3, 0x3fe45f30
	s_mov_b32 s5, 0xbc91a626
	v_mul_f64 v[5:6], |v[3:4]|, s[2:3]
	s_mov_b32 s2, 0x54442d18
	s_mov_b32 s3, 0xbff921fb
	s_mov_b32 s4, 0x33145c00
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[17:18], v[5:6]
	v_fma_f64 v[5:6], v[17:18], s[2:3], |v[3:4]|
	v_mul_f64 v[7:8], v[17:18], s[4:5]
	s_mov_b32 s2, 0x252049c0
	s_mov_b32 s3, 0xb97b839a
	v_cvt_i32_f64_e32 v0, v[17:18]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[23:24], v[17:18], s[4:5], v[5:6]
	v_add_f64 v[19:20], v[5:6], v[7:8]
	s_mov_b32 s5, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[5:6], v[5:6], -v[19:20]
	v_add_f64 v[19:20], v[19:20], -v[23:24]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[5:6], v[5:6], v[7:8]
	v_fma_f64 v[7:8], v[17:18], s[4:5], v[7:8]
	v_add_f64 v[5:6], v[19:20], v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[5:6], v[5:6], -v[7:8]
	v_fma_f64 v[7:8], v[17:18], s[2:3], v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[5:6], v[23:24], v[7:8]
	v_add_f64 v[19:20], v[5:6], -v[23:24]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[7:8], v[7:8], -v[19:20]
.LBB1_17:                               ; %_ZL3cosd.exit
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr21
                                        ; implicit-def: $vgpr17_vgpr18
                                        ; implicit-def: $vgpr19_vgpr20
	s_and_saveexec_b32 s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s1, exec_lo, s0
	s_cbranch_execz .LBB1_19
; %bb.18:
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[3:4]|
	v_mov_b32_e32 v32, 0
	s_mov_b32 s2, 0x54442d18
	s_mov_b32 s3, 0x3ff921fb
	s_mov_b32 s4, 0x33145c07
	s_mov_b32 s5, 0x3c91a626
	v_dual_cndmask_b32 v16, v22, v16 :: v_dual_cndmask_b32 v15, v3, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[17:18], v[13:14], v[15:16]
	v_mul_f64 v[19:20], v[11:12], v[15:16]
	v_mul_f64 v[30:31], v[9:10], v[15:16]
	v_fma_f64 v[13:14], v[13:14], v[15:16], -v[17:18]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[11:12], v[11:12], v[15:16], -v[19:20]
	v_fma_f64 v[9:10], v[9:10], v[15:16], -v[30:31]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[21:22], v[19:20], v[13:14]
	v_add_f64 v[23:24], v[21:22], -v[19:20]
	v_add_f64 v[28:29], v[17:18], v[21:22]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[25:26], v[21:22], -v[23:24]
	v_add_f64 v[13:14], v[13:14], -v[23:24]
	v_ldexp_f64 v[23:24], v[28:29], -2
	v_add_f64 v[17:18], v[28:29], -v[17:18]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[19:20], v[19:20], -v[25:26]
	v_add_f64 v[25:26], v[30:31], v[11:12]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[23:24]|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[17:18], v[21:22], -v[17:18]
	v_add_f64 v[13:14], v[13:14], v[19:20]
	v_fract_f64_e32 v[19:20], v[23:24]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[21:22], v[25:26], v[13:14]
	v_dual_cndmask_b32 v20, 0, v20 :: v_dual_cndmask_b32 v19, 0, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[19:20], v[19:20], 2
	v_add_f64 v[23:24], v[17:18], v[21:22]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[28:29], v[23:24], v[19:20]
	v_add_f64 v[15:16], v[23:24], -v[17:18]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[28:29]
	v_add_f64 v[28:29], v[25:26], -v[30:31]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[15:16], v[21:22], -v[15:16]
	v_cndmask_b32_e64 v33, 0, 0x40100000, vcc_lo
	v_add_f64 v[37:38], v[25:26], -v[28:29]
	v_add_f64 v[11:12], v[11:12], -v[28:29]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[19:20], v[19:20], v[32:33]
	v_add_f64 v[33:34], v[21:22], -v[25:26]
	v_add_f64 v[28:29], v[30:31], -v[37:38]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[35:36], v[23:24], v[19:20]
	v_add_f64 v[39:40], v[21:22], -v[33:34]
	v_add_f64 v[13:14], v[13:14], -v[33:34]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[11:12], v[11:12], v[28:29]
	v_cvt_i32_f64_e32 v35, v[35:36]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[25:26], v[25:26], -v[39:40]
	v_cvt_f64_i32_e32 v[33:34], v35
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[13:14], v[13:14], v[25:26]
	v_add_f64 v[19:20], v[19:20], -v[33:34]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[11:12], v[11:12], v[13:14]
	v_add_f64 v[13:14], v[23:24], v[19:20]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[9:10], v[9:10], v[11:12]
	v_add_f64 v[11:12], v[13:14], -v[19:20]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[13:14]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[9:10], v[15:16], v[9:10]
	v_add_f64 v[11:12], v[23:24], -v[11:12]
	v_cndmask_b32_e64 v33, 0, 0x3ff00000, vcc_lo
	v_add_co_ci_u32_e64 v21, s0, 0, v35, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[9:10], v[9:10], v[11:12]
	v_add_f64 v[11:12], v[13:14], -v[32:33]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[13:14], v[11:12], v[9:10]
	v_mul_f64 v[15:16], v[13:14], s[2:3]
	v_add_f64 v[11:12], v[13:14], -v[11:12]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[17:18], v[13:14], s[2:3], -v[15:16]
	v_add_f64 v[9:10], v[9:10], -v[11:12]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[11:12], v[13:14], s[4:5], v[17:18]
	v_fma_f64 v[9:10], v[9:10], s[2:3], v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[17:18], v[15:16], v[9:10]
	v_add_f64 v[11:12], v[17:18], -v[15:16]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[19:20], v[9:10], -v[11:12]
.LBB1_19:                               ; %Flow
	s_and_not1_saveexec_b32 s0, s1
	s_cbranch_execz .LBB1_21
; %bb.20:
	s_mov_b32 s2, 0x6dc9c883
	s_mov_b32 s3, 0x3fe45f30
	s_mov_b32 s5, 0xbc91a626
	v_mul_f64 v[9:10], |v[3:4]|, s[2:3]
	s_mov_b32 s2, 0x54442d18
	s_mov_b32 s3, 0xbff921fb
	s_mov_b32 s4, 0x33145c00
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[9:10], v[9:10]
	v_fma_f64 v[11:12], v[9:10], s[2:3], |v[3:4]|
	v_mul_f64 v[13:14], v[9:10], s[4:5]
	s_mov_b32 s2, 0x252049c0
	s_mov_b32 s3, 0xb97b839a
	v_cvt_i32_f64_e32 v21, v[9:10]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[19:20], v[9:10], s[4:5], v[11:12]
	v_add_f64 v[15:16], v[11:12], v[13:14]
	s_mov_b32 s5, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[11:12], v[11:12], -v[15:16]
	v_add_f64 v[15:16], v[15:16], -v[19:20]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[11:12], v[11:12], v[13:14]
	v_fma_f64 v[13:14], v[9:10], s[4:5], v[13:14]
	v_add_f64 v[11:12], v[15:16], v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[11:12], v[11:12], -v[13:14]
	v_fma_f64 v[11:12], v[9:10], s[2:3], v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[17:18], v[19:20], v[11:12]
	v_add_f64 v[13:14], v[17:18], -v[19:20]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[19:20], v[11:12], -v[13:14]
.LBB1_21:                               ; %_ZL3sind.exit
	s_or_b32 exec_lo, exec_lo, s0
	v_mul_f64 v[9:10], v[5:6], v[5:6]
	v_mul_f64 v[11:12], v[17:18], v[17:18]
	s_mov_b32 s0, 0xb42fdfa7
	s_mov_b32 s2, 0xf9a43bb8
	s_mov_b32 s1, 0xbe5ae600
	s_mov_b32 s3, 0x3de5e0b2
	s_mov_b32 s4, 0x796cde01
	s_mov_b32 s5, 0x3ec71de3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[36:37], v[7:8], 0.5
	v_mul_f64 v[42:43], v[19:20], 0.5
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[13:14], v[9:10], s[2:3], s[0:1]
	v_fma_f64 v[15:16], v[11:12], s[2:3], s[0:1]
	s_mov_b32 s0, 0x9037ab78
	s_mov_b32 s2, 0x46cc5e42
	s_mov_b32 s1, 0x3e21eeb6
	s_mov_b32 s3, 0xbda907db
	v_mul_f64 v[24:25], v[9:10], 0.5
	v_fma_f64 v[22:23], v[9:10], s[2:3], s[0:1]
	v_fma_f64 v[28:29], v[11:12], s[2:3], s[0:1]
	v_mul_f64 v[30:31], v[11:12], 0.5
	s_mov_b32 s0, 0xa17f65f6
	s_mov_b32 s2, 0x19e83e5c
	s_mov_b32 s1, 0xbe927e4f
	s_mov_b32 s3, 0xbf2a01a0
	v_mul_f64 v[38:39], v[5:6], -v[9:10]
	v_mul_f64 v[44:45], v[17:18], -v[11:12]
	v_fma_f64 v[13:14], v[9:10], v[13:14], s[4:5]
	v_fma_f64 v[15:16], v[11:12], v[15:16], s[4:5]
	v_add_f64 v[32:33], -v[24:25], 1.0
	v_fma_f64 v[22:23], v[9:10], v[22:23], s[0:1]
	v_fma_f64 v[28:29], v[11:12], v[28:29], s[0:1]
	v_add_f64 v[34:35], -v[30:31], 1.0
	s_mov_b32 s0, 0x19f4ec90
	s_mov_b32 s1, 0x3efa01a0
	v_fma_f64 v[13:14], v[9:10], v[13:14], s[2:3]
	v_fma_f64 v[15:16], v[11:12], v[15:16], s[2:3]
	s_mov_b32 s2, 0x11110bb3
	s_mov_b32 s3, 0x3f811111
	v_add_f64 v[40:41], -v[32:33], 1.0
	v_fma_f64 v[22:23], v[9:10], v[22:23], s[0:1]
	v_fma_f64 v[28:29], v[11:12], v[28:29], s[0:1]
	v_add_f64 v[46:47], -v[34:35], 1.0
	s_mov_b32 s0, 0x16c16967
	s_mov_b32 s1, 0xbf56c16c
	v_fma_f64 v[13:14], v[9:10], v[13:14], s[2:3]
	v_fma_f64 v[15:16], v[11:12], v[15:16], s[2:3]
	v_add_f64 v[24:25], v[40:41], -v[24:25]
	v_fma_f64 v[22:23], v[9:10], v[22:23], s[0:1]
	v_fma_f64 v[28:29], v[11:12], v[28:29], s[0:1]
	v_add_f64 v[30:31], v[46:47], -v[30:31]
	s_mov_b32 s0, 0x55555555
	s_mov_b32 s1, 0x3fa55555
	v_fma_f64 v[13:14], v[38:39], v[13:14], v[36:37]
	v_fma_f64 v[15:16], v[44:45], v[15:16], v[42:43]
	v_mul_f64 v[36:37], v[9:10], v[9:10]
	v_fma_f64 v[24:25], v[5:6], -v[7:8], v[24:25]
	v_fma_f64 v[22:23], v[9:10], v[22:23], s[0:1]
	v_fma_f64 v[7:8], v[9:10], v[13:14], -v[7:8]
	v_mul_f64 v[9:10], v[11:12], v[11:12]
	v_fma_f64 v[13:14], v[11:12], v[28:29], s[0:1]
	v_fma_f64 v[28:29], v[17:18], -v[19:20], v[30:31]
	v_fma_f64 v[11:12], v[11:12], v[15:16], -v[19:20]
	s_mov_b32 s1, 0xbfc55555
	v_fma_f64 v[15:16], v[36:37], v[22:23], v[24:25]
	v_fma_f64 v[7:8], v[38:39], s[0:1], v[7:8]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[9:10], v[9:10], v[13:14], v[28:29]
	v_fma_f64 v[11:12], v[44:45], s[0:1], v[11:12]
	v_cmp_class_f64_e64 s0, v[3:4], 0x1f8
	v_lshlrev_b32_e32 v3, 30, v21
	v_add_f64 v[13:14], v[32:33], v[15:16]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v15, v3, v4
	v_add_f64 v[6:7], v[5:6], -v[7:8]
	v_and_b32_e32 v5, 1, v0
	v_add_f64 v[8:9], v[34:35], v[9:10]
	v_add_f64 v[10:11], v[17:18], -v[11:12]
	v_cmp_eq_u32_e32 vcc_lo, 0, v5
	v_cndmask_b32_e32 v12, v6, v13, vcc_lo
	v_and_b32_e32 v13, 1, v21
	ds_load_b128 v[3:6], v27
	v_xor_b32_e32 v7, 0x80000000, v7
	v_lshlrev_b32_e32 v0, 30, v0
	v_cmp_eq_u32_e64 s1, 0, v13
	v_and_b32_e32 v13, 0x80000000, v15
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_cndmask_b32 v7, v7, v14 :: v_dual_and_b32 v0, 0x80000000, v0
	v_cndmask_b32_e64 v10, v8, v10, s1
	v_cndmask_b32_e64 v8, v9, v11, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v0, v7, v0
	v_cndmask_b32_e64 v9, 0, v10, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v11, v8, v13
	v_cndmask_b32_e64 v8, 0, v12, s0
	v_cndmask_b32_e64 v10, 0x7ff80000, v11, s0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mul_f64 v[11:12], v[5:6], v[9:10]
	v_mul_f64 v[15:16], v[3:4], v[9:10]
	v_cndmask_b32_e64 v9, 0x7ff80000, v0, s0
	v_fma_f64 v[3:4], v[3:4], v[8:9], -v[11:12]
	s_delay_alu instid0(VALU_DEP_3)
	v_fma_f64 v[5:6], v[5:6], v[8:9], v[15:16]
	global_store_b128 v[1:2], v[3:6], off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z5fft_8PN6thrust7complexIdEEi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 12
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 54
		.amdhsa_next_free_sgpr 46
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z5fft_8PN6thrust7complexIdEEi, .Lfunc_end1-_Z5fft_8PN6thrust7complexIdEEi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 5960
; NumSgprs: 48
; NumVgprs: 54
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 5
; VGPRBlocks: 6
; NumSGPRsForWavesPerEU: 48
; NumVGPRsForWavesPerEU: 54
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z8fft_lastPN6thrust7complexIdEES2_ii ; -- Begin function _Z8fft_lastPN6thrust7complexIdEES2_ii
	.globl	_Z8fft_lastPN6thrust7complexIdEES2_ii
	.p2align	8
	.type	_Z8fft_lastPN6thrust7complexIdEES2_ii,@function
_Z8fft_lastPN6thrust7complexIdEES2_ii:  ; @_Z8fft_lastPN6thrust7complexIdEES2_ii
; %bb.0:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_lshl_add_u32 v1, s15, 4, v0
	v_log_f32_e32 v5, 0x41880000
	v_lshl_add_u32 v24, v0, 4, 0
	s_mov_b32 s2, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[1:2], 4, v[1:2]
	s_waitcnt_depctr 0xfff
	v_cvt_i32_f32_e32 v5, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_readfirstlane_b32 s3, v5
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v1, vcc_lo, s4, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s5, v2, vcc_lo
	v_cmp_gt_i32_e32 vcc_lo, 1, v5
	global_load_b128 v[1:4], v[1:2], off
	s_and_b32 vcc_lo, exec_lo, vcc_lo
	s_waitcnt vmcnt(0)
	ds_store_b128 v24, v[1:4]
	v_mov_b32_e32 v1, 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_vccnz .LBB2_3
; %bb.1:                                ; %.lr.ph.preheader
	s_add_i32 s3, s3, -1
.LBB2_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_lshrrev_b32_e32 v2, s2, v0
	s_lshl_b32 s4, 1, s3
	s_add_i32 s3, s3, -1
	s_add_i32 s2, s2, 1
	s_cmp_eq_u32 s3, -1
	v_and_b32_e32 v2, 1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e32 vcc_lo, 1, v2
	v_cndmask_b32_e64 v2, 0, s4, vcc_lo
	v_or_b32_e32 v1, v2, v1
	s_cbranch_scc0 .LBB2_2
.LBB2_3:                                ; %Flow185
	v_cvt_f64_i32_e32 v[5:6], v0
	s_delay_alu instid0(VALU_DEP_2)
	v_lshl_add_u32 v1, v1, 4, 0
	s_mov_b32 s5, 0xc00921fb
	s_mov_b32 s4, 0x54442d18
	v_add_nc_u32_e32 v23, 0x100, v24
	s_mov_b32 s16, 0x6dc9c883
	ds_load_b128 v[1:4], v1
	s_mov_b32 s18, 0x33145c00
	s_mov_b32 s20, 0x252049c0
	s_mov_b32 s22, 0x9037ab78
	s_mov_b32 s24, 0x46cc5e42
	s_mov_b32 s26, 0xa17f65f6
	s_mov_b32 s28, 0x19f4ec90
	s_mov_b32 s30, 0x16c16967
	s_mov_b32 s34, 0x55555555
	s_mov_b32 s36, 0xb42fdfa7
	s_mov_b32 s38, 0xf9a43bb8
	s_mov_b32 s40, 0x796cde01
	s_mov_b32 s42, 0x19e83e5c
	s_mov_b32 s44, 0x11110bb3
	s_mov_b32 s14, 0
	s_mov_b32 s33, 1
	s_mov_b32 s9, 0x3ff921fb
	s_mov_b32 s11, 0x3c91a626
	s_mov_b32 s12, 0x33145c07
	s_mov_b32 s17, 0x3fe45f30
	s_waitcnt lgkmcnt(0)
	ds_store_b128 v24, v[1:4] offset:256
	v_mov_b32_e32 v3, 0
	s_mov_b32 s19, 0xbc91a626
	s_mov_b32 s21, 0xb97b839a
	s_mov_b32 s23, 0x3e21eeb6
	s_mov_b32 s25, 0xbda907db
	s_mov_b32 s27, 0xbe927e4f
	s_mov_b32 s29, 0x3efa01a0
	s_mov_b32 s31, 0xbf56c16c
	s_mov_b32 s35, 0x3fa55555
	s_mov_b32 s37, 0xbe5ae600
	s_mov_b32 s39, 0x3de5e0b2
	v_mul_f64 v[1:2], v[5:6], s[4:5]
	s_mov_b32 s41, 0x3ec71de3
	s_mov_b32 s43, 0xbf2a01a0
	s_mov_b32 s45, 0x3f811111
	s_mov_b32 s5, 0xbff921fb
	s_mov_b32 s47, 0xbfc55555
	s_mov_b32 s48, 1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB2_4:                                ; =>This Inner Loop Header: Depth=1
	v_cvt_f64_i32_e32 v[4:5], s48
                                        ; implicit-def: $vgpr25
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f64 v[6:7], null, v[4:5], v[4:5], v[1:2]
	v_div_scale_f64 v[12:13], vcc_lo, v[1:2], v[4:5], v[1:2]
	v_rcp_f64_e32 v[8:9], v[6:7]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[10:11], -v[6:7], v[8:9], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], v[8:9], v[10:11], v[8:9]
	v_fma_f64 v[10:11], -v[6:7], v[8:9], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], v[8:9], v[10:11], v[8:9]
	v_mul_f64 v[10:11], v[12:13], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], -v[6:7], v[10:11], v[12:13]
	v_div_fmas_f64 v[6:7], v[6:7], v[8:9], v[10:11]
                                        ; implicit-def: $vgpr9_vgpr10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f64 v[5:6], v[6:7], v[4:5], v[1:2]
                                        ; implicit-def: $vgpr7_vgpr8
	v_cmp_ngt_f64_e64 s3, 0x41d00000, |v[5:6]|
	v_trig_preop_f64 v[15:16], |v[5:6]|, 0
	v_trig_preop_f64 v[13:14], |v[5:6]|, 1
	v_ldexp_f64 v[17:18], |v[5:6]|, 0xffffff80
	v_trig_preop_f64 v[11:12], |v[5:6]|, 2
	v_and_b32_e32 v27, 0x7fffffff, v6
	s_and_saveexec_b32 s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s10, exec_lo, s2
	s_cbranch_execz .LBB2_6
; %bb.5:                                ;   in Loop: Header=BB2_4 Depth=1
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[5:6]|
	s_mov_b32 s8, s4
	s_mov_b32 s13, s11
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v8, v27, v18 :: v_dual_cndmask_b32 v7, v5, v17
	v_mul_f64 v[9:10], v[15:16], v[7:8]
	v_mul_f64 v[19:20], v[13:14], v[7:8]
	v_mul_f64 v[34:35], v[11:12], v[7:8]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[21:22], v[15:16], v[7:8], -v[9:10]
	v_fma_f64 v[36:37], v[13:14], v[7:8], -v[19:20]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[7:8], v[11:12], v[7:8], -v[34:35]
	v_add_f64 v[25:26], v[19:20], v[21:22]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[28:29], v[25:26], -v[19:20]
	v_add_f64 v[32:33], v[9:10], v[25:26]
	v_add_f64 v[30:31], v[25:26], -v[28:29]
	v_add_f64 v[21:22], v[21:22], -v[28:29]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[28:29], v[32:33], -2
	v_add_f64 v[9:10], v[32:33], -v[9:10]
	v_add_f64 v[19:20], v[19:20], -v[30:31]
	v_add_f64 v[30:31], v[34:35], v[36:37]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[28:29]|
	v_add_f64 v[9:10], v[25:26], -v[9:10]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[19:20], v[21:22], v[19:20]
	v_fract_f64_e32 v[21:22], v[28:29]
	v_add_f64 v[25:26], v[30:31], v[19:20]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v22, 0, v22 :: v_dual_cndmask_b32 v21, 0, v21
	v_ldexp_f64 v[21:22], v[21:22], 2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[28:29], v[9:10], v[25:26]
	v_add_f64 v[38:39], v[25:26], -v[30:31]
	v_add_f64 v[32:33], v[28:29], v[21:22]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[44:45], v[25:26], -v[38:39]
	v_add_f64 v[19:20], v[19:20], -v[38:39]
	v_add_f64 v[9:10], v[28:29], -v[9:10]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[32:33]
	v_add_f64 v[32:33], v[30:31], -v[34:35]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[9:10], v[25:26], -v[9:10]
	v_cndmask_b32_e64 v4, 0, 0x40100000, vcc_lo
	v_add_f64 v[42:43], v[30:31], -v[32:33]
	v_add_f64 v[32:33], v[36:37], -v[32:33]
	v_add_f64 v[30:31], v[30:31], -v[44:45]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[21:22], v[21:22], v[3:4]
	v_add_f64 v[36:37], v[34:35], -v[42:43]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[19:20], v[19:20], v[30:31]
	v_add_f64 v[40:41], v[28:29], v[21:22]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[32:33], v[32:33], v[36:37]
	v_cvt_i32_f64_e32 v4, v[40:41]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[19:20], v[32:33], v[19:20]
	v_cvt_f64_i32_e32 v[38:39], v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[7:8], v[7:8], v[19:20]
	v_add_f64 v[21:22], v[21:22], -v[38:39]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[7:8], v[9:10], v[7:8]
	v_add_f64 v[30:31], v[28:29], v[21:22]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[19:20], v[30:31], -v[21:22]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[30:31]
	v_add_f64 v[9:10], v[28:29], -v[19:20]
	v_add_co_ci_u32_e64 v25, s2, 0, v4, vcc_lo
	v_cndmask_b32_e64 v4, 0, 0x3ff00000, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[7:8], v[7:8], v[9:10]
	v_add_f64 v[9:10], v[30:31], -v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[19:20], v[9:10], v[7:8]
	v_mul_f64 v[21:22], v[19:20], s[8:9]
	v_add_f64 v[9:10], v[19:20], -v[9:10]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[28:29], v[19:20], s[8:9], -v[21:22]
	v_add_f64 v[7:8], v[7:8], -v[9:10]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[9:10], v[19:20], s[12:13], v[28:29]
	v_fma_f64 v[9:10], v[7:8], s[8:9], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[7:8], v[21:22], v[9:10]
	v_add_f64 v[19:20], v[7:8], -v[21:22]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[9:10], v[9:10], -v[19:20]
.LBB2_6:                                ; %Flow183
                                        ;   in Loop: Header=BB2_4 Depth=1
	s_and_not1_saveexec_b32 s2, s10
	s_cbranch_execz .LBB2_8
; %bb.7:                                ;   in Loop: Header=BB2_4 Depth=1
	v_mul_f64 v[7:8], |v[5:6]|, s[16:17]
	s_mov_b32 s10, s18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[19:20], v[7:8]
	v_fma_f64 v[7:8], v[19:20], s[4:5], |v[5:6]|
	v_mul_f64 v[9:10], v[19:20], s[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[25:26], v[19:20], s[18:19], v[7:8]
	v_add_f64 v[21:22], v[7:8], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[7:8], v[7:8], -v[21:22]
	v_add_f64 v[21:22], v[21:22], -v[25:26]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[7:8], v[7:8], v[9:10]
	v_fma_f64 v[9:10], v[19:20], s[10:11], v[9:10]
	v_add_f64 v[7:8], v[21:22], v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[7:8], v[7:8], -v[9:10]
	v_fma_f64 v[9:10], v[19:20], s[20:21], v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[7:8], v[25:26], v[9:10]
	v_add_f64 v[21:22], v[7:8], -v[25:26]
	v_cvt_i32_f64_e32 v25, v[19:20]
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f64 v[9:10], v[9:10], -v[21:22]
.LBB2_8:                                ; %_ZL3cosd.exit
                                        ;   in Loop: Header=BB2_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr26
                                        ; implicit-def: $vgpr19_vgpr20
                                        ; implicit-def: $vgpr21_vgpr22
	s_and_saveexec_b32 s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s3, exec_lo, s2
	s_cbranch_execz .LBB2_10
; %bb.9:                                ;   in Loop: Header=BB2_4 Depth=1
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[5:6]|
	s_mov_b32 s8, s4
	s_mov_b32 s13, s11
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v18, v27, v18 :: v_dual_cndmask_b32 v17, v5, v17
	v_mul_f64 v[19:20], v[15:16], v[17:18]
	v_mul_f64 v[21:22], v[13:14], v[17:18]
	v_mul_f64 v[34:35], v[11:12], v[17:18]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[15:16], v[15:16], v[17:18], -v[19:20]
	v_fma_f64 v[13:14], v[13:14], v[17:18], -v[21:22]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[11:12], v[11:12], v[17:18], -v[34:35]
	v_add_f64 v[26:27], v[21:22], v[15:16]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[28:29], v[26:27], -v[21:22]
	v_add_f64 v[32:33], v[19:20], v[26:27]
	v_add_f64 v[30:31], v[26:27], -v[28:29]
	v_add_f64 v[15:16], v[15:16], -v[28:29]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[28:29], v[32:33], -2
	v_add_f64 v[19:20], v[32:33], -v[19:20]
	v_add_f64 v[21:22], v[21:22], -v[30:31]
	v_add_f64 v[30:31], v[34:35], v[13:14]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[28:29]|
	v_add_f64 v[19:20], v[26:27], -v[19:20]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[15:16], v[15:16], v[21:22]
	v_fract_f64_e32 v[21:22], v[28:29]
	v_add_f64 v[26:27], v[30:31], v[15:16]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v22, 0, v22 :: v_dual_cndmask_b32 v21, 0, v21
	v_ldexp_f64 v[21:22], v[21:22], 2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[28:29], v[19:20], v[26:27]
	v_add_f64 v[36:37], v[26:27], -v[30:31]
	v_add_f64 v[32:33], v[28:29], v[21:22]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[42:43], v[26:27], -v[36:37]
	v_add_f64 v[15:16], v[15:16], -v[36:37]
	v_add_f64 v[17:18], v[28:29], -v[19:20]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[32:33]
	v_add_f64 v[32:33], v[30:31], -v[34:35]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[17:18], v[26:27], -v[17:18]
	v_cndmask_b32_e64 v4, 0, 0x40100000, vcc_lo
	v_add_f64 v[40:41], v[30:31], -v[32:33]
	v_add_f64 v[13:14], v[13:14], -v[32:33]
	v_add_f64 v[30:31], v[30:31], -v[42:43]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[21:22], v[21:22], v[3:4]
	v_add_f64 v[32:33], v[34:35], -v[40:41]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[15:16], v[15:16], v[30:31]
	v_add_f64 v[38:39], v[28:29], v[21:22]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[13:14], v[13:14], v[32:33]
	v_cvt_i32_f64_e32 v4, v[38:39]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[13:14], v[13:14], v[15:16]
	v_cvt_f64_i32_e32 v[36:37], v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[11:12], v[11:12], v[13:14]
	v_add_f64 v[21:22], v[21:22], -v[36:37]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[11:12], v[17:18], v[11:12]
	v_add_f64 v[15:16], v[28:29], v[21:22]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[13:14], v[15:16], -v[21:22]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[15:16]
	v_add_f64 v[13:14], v[28:29], -v[13:14]
	v_add_co_ci_u32_e64 v26, s2, 0, v4, vcc_lo
	v_cndmask_b32_e64 v4, 0, 0x3ff00000, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[11:12], v[11:12], v[13:14]
	v_add_f64 v[13:14], v[15:16], -v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[15:16], v[13:14], v[11:12]
	v_mul_f64 v[17:18], v[15:16], s[8:9]
	v_add_f64 v[13:14], v[15:16], -v[13:14]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[19:20], v[15:16], s[8:9], -v[17:18]
	v_add_f64 v[11:12], v[11:12], -v[13:14]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[13:14], v[15:16], s[12:13], v[19:20]
	v_fma_f64 v[11:12], v[11:12], s[8:9], v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[19:20], v[17:18], v[11:12]
	v_add_f64 v[13:14], v[19:20], -v[17:18]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[21:22], v[11:12], -v[13:14]
.LBB2_10:                               ; %Flow182
                                        ;   in Loop: Header=BB2_4 Depth=1
	s_and_not1_saveexec_b32 s2, s3
	s_cbranch_execz .LBB2_12
; %bb.11:                               ;   in Loop: Header=BB2_4 Depth=1
	v_mul_f64 v[11:12], |v[5:6]|, s[16:17]
	s_mov_b32 s10, s18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[11:12], v[11:12]
	v_fma_f64 v[13:14], v[11:12], s[4:5], |v[5:6]|
	v_mul_f64 v[15:16], v[11:12], s[18:19]
	v_cvt_i32_f64_e32 v26, v[11:12]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[21:22], v[11:12], s[18:19], v[13:14]
	v_add_f64 v[17:18], v[13:14], v[15:16]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[13:14], v[13:14], -v[17:18]
	v_add_f64 v[17:18], v[17:18], -v[21:22]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[13:14], v[13:14], v[15:16]
	v_fma_f64 v[15:16], v[11:12], s[10:11], v[15:16]
	v_add_f64 v[13:14], v[17:18], v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[13:14], v[13:14], -v[15:16]
	v_fma_f64 v[13:14], v[11:12], s[20:21], v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[19:20], v[21:22], v[13:14]
	v_add_f64 v[15:16], v[19:20], -v[21:22]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[21:22], v[13:14], -v[15:16]
.LBB2_12:                               ; %_ZL3sind.exit
                                        ;   in Loop: Header=BB2_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	v_mul_f64 v[11:12], v[7:8], v[7:8]
	v_mul_f64 v[13:14], v[19:20], v[19:20]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[39:40], v[9:10], 0.5
	v_mul_f64 v[45:46], v[21:22], 0.5
	s_mov_b32 s46, s34
	v_cmp_class_f64_e64 s2, v[5:6], 0x1f8
	s_sub_i32 s14, 1, s14
	s_not_b32 s3, s48
	s_lshl_b32 s8, s14, 4
	s_sub_i32 s33, 1, s33
	v_fma_f64 v[15:16], v[11:12], s[38:39], s[36:37]
	v_fma_f64 v[17:18], v[13:14], s[38:39], s[36:37]
	v_mul_f64 v[29:30], v[11:12], 0.5
	v_fma_f64 v[27:28], v[11:12], s[24:25], s[22:23]
	v_fma_f64 v[31:32], v[13:14], s[24:25], s[22:23]
	v_mul_f64 v[33:34], v[13:14], 0.5
	v_mul_f64 v[41:42], v[7:8], -v[11:12]
	v_mul_f64 v[47:48], v[19:20], -v[13:14]
	v_fma_f64 v[15:16], v[11:12], v[15:16], s[40:41]
	v_fma_f64 v[17:18], v[13:14], v[17:18], s[40:41]
	v_add_f64 v[35:36], -v[29:30], 1.0
	v_fma_f64 v[27:28], v[11:12], v[27:28], s[26:27]
	v_fma_f64 v[31:32], v[13:14], v[31:32], s[26:27]
	v_add_f64 v[37:38], -v[33:34], 1.0
	v_fma_f64 v[15:16], v[11:12], v[15:16], s[42:43]
	v_fma_f64 v[17:18], v[13:14], v[17:18], s[42:43]
	v_add_f64 v[43:44], -v[35:36], 1.0
	v_fma_f64 v[27:28], v[11:12], v[27:28], s[28:29]
	v_fma_f64 v[31:32], v[13:14], v[31:32], s[28:29]
	v_add_f64 v[49:50], -v[37:38], 1.0
	v_fma_f64 v[15:16], v[11:12], v[15:16], s[44:45]
	v_fma_f64 v[17:18], v[13:14], v[17:18], s[44:45]
	v_add_f64 v[29:30], v[43:44], -v[29:30]
	v_fma_f64 v[27:28], v[11:12], v[27:28], s[30:31]
	v_fma_f64 v[31:32], v[13:14], v[31:32], s[30:31]
	v_add_f64 v[33:34], v[49:50], -v[33:34]
	v_fma_f64 v[15:16], v[41:42], v[15:16], v[39:40]
	v_fma_f64 v[17:18], v[47:48], v[17:18], v[45:46]
	v_fma_f64 v[29:30], v[7:8], -v[9:10], v[29:30]
	v_mul_f64 v[39:40], v[11:12], v[11:12]
	v_fma_f64 v[27:28], v[11:12], v[27:28], s[34:35]
	v_fma_f64 v[9:10], v[11:12], v[15:16], -v[9:10]
	v_mul_f64 v[11:12], v[13:14], v[13:14]
	v_fma_f64 v[15:16], v[13:14], v[31:32], s[34:35]
	v_fma_f64 v[31:32], v[19:20], -v[21:22], v[33:34]
	v_fma_f64 v[13:14], v[13:14], v[17:18], -v[21:22]
	v_fma_f64 v[17:18], v[39:40], v[27:28], v[29:30]
	v_fma_f64 v[9:10], v[41:42], s[46:47], v[9:10]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[11:12], v[11:12], v[15:16], v[31:32]
	v_fma_f64 v[13:14], v[47:48], s[46:47], v[13:14]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[15:16], v[35:36], v[17:18]
	v_and_b32_e32 v17, s3, v0
	v_add_f64 v[7:8], v[7:8], -v[9:10]
	v_and_b32_e32 v4, 1, v25
	v_add_f64 v[9:10], v[37:38], v[11:12]
	v_add_f64 v[11:12], v[19:20], -v[13:14]
	v_and_b32_e32 v14, 1, v26
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cmp_eq_u32_e32 vcc_lo, 0, v4
	v_or_b32_e32 v4, s48, v0
	v_cmp_eq_u32_e64 s3, 0, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v4, s8, v4
	v_lshl_add_u32 v4, v4, 4, 0
	v_cndmask_b32_e32 v13, v7, v15, vcc_lo
	v_xor_b32_e32 v8, 0x80000000, v8
	v_lshlrev_b32_e32 v5, 30, v26
	v_lshlrev_b32_e32 v15, 30, v25
	v_cndmask_b32_e64 v10, v10, v12, s3
	v_cndmask_b32_e64 v9, v9, v11, s3
	v_cndmask_b32_e32 v8, v8, v16, vcc_lo
	v_xor_b32_e32 v18, v5, v6
	ds_load_b128 v[4:7], v4
	v_and_b32_e32 v14, 0x80000000, v15
	v_add_nc_u32_e32 v11, s8, v17
	v_cndmask_b32_e64 v12, 0, v13, s2
	v_and_b32_e32 v15, 0x80000000, v18
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v8, v8, v14
	v_lshl_add_u32 v11, v11, 4, 0
	v_cndmask_b32_e64 v14, 0, v9, s2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v10, v10, v15
	v_cndmask_b32_e64 v13, 0x7ff80000, v8, s2
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v15, 0x7ff80000, v10, s2
	ds_load_b128 v[8:11], v11
	s_lshl_b32 s2, s48, 1
	s_cmp_gt_u32 s48, 7
	s_mov_b32 s48, s2
	s_waitcnt lgkmcnt(1)
	v_mul_f64 v[16:17], v[6:7], v[14:15]
	v_mul_f64 v[6:7], v[6:7], v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[12:13], v[4:5], v[12:13], -v[16:17]
	v_fma_f64 v[6:7], v[4:5], v[14:15], v[6:7]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[4:5], v[8:9], v[12:13]
	v_add_f64 v[6:7], v[10:11], v[6:7]
	v_lshl_add_u32 v8, s33, 8, v24
	ds_store_b128 v8, v[4:7]
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB2_4
; %bb.13:                               ; %.preheader115
	s_load_b64 s[0:1], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s1, 1
	s_cbranch_scc1 .LBB2_15
.LBB2_14:                               ; %.lr.ph124
                                        ; =>This Inner Loop Header: Depth=1
	s_ashr_i32 s2, s15, 31
	s_and_b32 s3, s15, 7
	s_lshr_b32 s2, s2, 29
	v_lshl_or_b32 v0, v0, 3, s3
	s_add_i32 s2, s15, s2
	s_add_i32 s1, s1, -1
	s_ashr_i32 s15, s2, 3
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc0 .LBB2_14
.LBB2_15:                               ; %.preheader
	s_cmp_lt_i32 s0, 2
	s_cbranch_scc1 .LBB2_18
; %bb.16:                               ; %.lr.ph130.preheader
	s_add_i32 s0, s0, -1
.LBB2_17:                               ; %.lr.ph130
                                        ; =>This Inner Loop Header: Depth=1
	s_ashr_i32 s1, s15, 31
	s_and_b32 s2, s15, 15
	s_lshr_b32 s1, s1, 28
	v_lshl_or_b32 v0, v0, 4, s2
	s_add_i32 s1, s15, s1
	s_add_i32 s0, s0, -1
	s_ashr_i32 s15, s1, 4
	s_cmp_eq_u32 s0, 0
	s_cbranch_scc0 .LBB2_17
.LBB2_18:                               ; %Flow179
	ds_load_b128 v[2:5], v23
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 4, v[0:1]
	v_add_co_u32 v0, vcc_lo, s6, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	s_waitcnt lgkmcnt(0)
	global_store_b128 v[0:1], v[2:5], off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8fft_lastPN6thrust7complexIdEES2_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 24
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 51
		.amdhsa_next_free_sgpr 49
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z8fft_lastPN6thrust7complexIdEES2_ii, .Lfunc_end2-_Z8fft_lastPN6thrust7complexIdEES2_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 3264
; NumSgprs: 51
; NumVgprs: 51
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 6
; VGPRBlocks: 6
; NumSGPRsForWavesPerEU: 51
; NumVGPRsForWavesPerEU: 51
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 12
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6fft_16PN6thrust7complexIdEEi
    .private_segment_fixed_size: 0
    .sgpr_count:     48
    .sgpr_spill_count: 0
    .symbol:         _Z6fft_16PN6thrust7complexIdEEi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     55
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 12
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z5fft_8PN6thrust7complexIdEEi
    .private_segment_fixed_size: 0
    .sgpr_count:     48
    .sgpr_spill_count: 0
    .symbol:         _Z5fft_8PN6thrust7complexIdEEi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     54
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 24
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z8fft_lastPN6thrust7complexIdEES2_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     51
    .sgpr_spill_count: 0
    .symbol:         _Z8fft_lastPN6thrust7complexIdEES2_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     51
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
