/**
 * 2DConvolution.cu: This file is part of the PolyBench/GPU 1.0 test suite.
 *
 *
 * Contact: Scott Grauer-Gray <sgrauerg@gmail.com>
 * Louis-Noel Pouchet <pouchet@cse.ohio-state.edu>
 * Web address: http://www.cse.ohio-state.edu/~pouchet/software/polybench/GPU
 */

#include <unistd.h>
#include <stdio.h>
#include <time.h>
#include <sys/time.h>
#include <stdlib.h>
#include <stdarg.h>
#include <string.h>
#include <cuda.h>

#include "../../common/polybenchUtilFuncts.h"

//define the error threshold for the results "not matching"
#define PERCENT_DIFF_ERROR_THRESHOLD 0.05

#define GPU_DEVICE 0

/* Problem size */
#define NI 4096
#define NJ 4096

/* Thread block dimensions */
#define DIM_THREAD_BLOCK_X 32
#define DIM_THREAD_BLOCK_Y 8

/* Can switch DATA_TYPE between float and double */
typedef float DATA_TYPE;



void conv2D(DATA_TYPE* A, DATA_TYPE* B)
{
	int i, j;
	DATA_TYPE c11, c12, c13, c21, c22, c23, c31, c32, c33;

	c11 = +0.2;  c21 = +0.5;  c31 = -0.8;
	c12 = -0.3;  c22 = +0.6;  c32 = -0.9;
	c13 = +0.4;  c23 = +0.7;  c33 = +0.10;


	for (i = 1; i < NI - 1; ++i) // 0
	{
		for (j = 1; j < NJ - 1; ++j) // 1
		{
			B[i*NJ + j] = c11 * A[(i - 1)*NJ + (j - 1)]  +  c12 * A[(i + 0)*NJ + (j - 1)]  +  c13 * A[(i + 1)*NJ + (j - 1)]
				+ c21 * A[(i - 1)*NJ + (j + 0)]  +  c22 * A[(i + 0)*NJ + (j + 0)]  +  c23 * A[(i + 1)*NJ + (j + 0)] 
				+ c31 * A[(i - 1)*NJ + (j + 1)]  +  c32 * A[(i + 0)*NJ + (j + 1)]  +  c33 * A[(i + 1)*NJ + (j + 1)];
		}
	}
}



void init(DATA_TYPE* A)
{
	int i, j;

	for (i = 0; i < NI; ++i)
    	{
		for (j = 0; j < NJ; ++j)
		{
			A[i*NJ + j] = (float)rand()/RAND_MAX;
        	}
    	}
}


void compareResults(DATA_TYPE* B, DATA_TYPE* B_outputFromGpu)
{
	int i, j, fail;
	fail = 0;
	
	// Compare a and b
	for (i=1; i < (NI-1); i++) 
	{
		for (j=1; j < (NJ-1); j++) 
		{
			if (percentDiff(B[i*NJ + j], B_outputFromGpu[i*NJ + j]) > PERCENT_DIFF_ERROR_THRESHOLD) 
			{
				fail++;
			}
		}
	}
	
	// Print results
	printf("Non-Matching CPU-GPU Outputs Beyond Error Threshold of %4.2f Percent: %d\n", PERCENT_DIFF_ERROR_THRESHOLD, fail);
	
}


void GPU_argv_init()
{
	cudaDeviceProp deviceProp;
	cudaGetDeviceProperties(&deviceProp, GPU_DEVICE);
	printf("setting device %d with name %s\n",GPU_DEVICE,deviceProp.name);
	cudaSetDevice( GPU_DEVICE );
}


__global__ void Convolution2D_kernel(DATA_TYPE *A, DATA_TYPE *B)
{
	int j = blockIdx.x * blockDim.x + threadIdx.x;
	int i = blockIdx.y * blockDim.y + threadIdx.y;

	DATA_TYPE c11, c12, c13, c21, c22, c23, c31, c32, c33;

	c11 = +0.2;  c21 = +0.5;  c31 = -0.8;
	c12 = -0.3;  c22 = +0.6;  c32 = -0.9;
	c13 = +0.4;  c23 = +0.7;  c33 = +0.10;

	if ((i < NI-1) && (j < NJ-1) && (i > 0) && (j > 0))
	{
		B[i * NJ + j] =  c11 * A[(i - 1) * NJ + (j - 1)]  + c21 * A[(i - 1) * NJ + (j + 0)] + c31 * A[(i - 1) * NJ + (j + 1)] 
			+ c12 * A[(i + 0) * NJ + (j - 1)]  + c22 * A[(i + 0) * NJ + (j + 0)] +  c32 * A[(i + 0) * NJ + (j + 1)]
			+ c13 * A[(i + 1) * NJ + (j - 1)]  + c23 * A[(i + 1) * NJ + (j + 0)] +  c33 * A[(i + 1) * NJ + (j + 1)];
	}
}


void convolution2DCuda(DATA_TYPE* A, DATA_TYPE* B, DATA_TYPE* B_outputFromGpu)
{
	double t_start, t_end;

	DATA_TYPE *A_gpu;
	DATA_TYPE *B_gpu;

	cudaMalloc((void **)&A_gpu, sizeof(DATA_TYPE) * NI * NJ);
	cudaMalloc((void **)&B_gpu, sizeof(DATA_TYPE) * NI * NJ);
	cudaMemcpy(A_gpu, A, sizeof(DATA_TYPE) * NI * NJ, cudaMemcpyHostToDevice);
	
	dim3 block(DIM_THREAD_BLOCK_X, DIM_THREAD_BLOCK_Y);
	dim3 grid((size_t)ceil( ((float)NI) / ((float)block.x) ), (size_t)ceil( ((float)NJ) / ((float)block.y)) );
	t_start = rtclock();
	Convolution2D_kernel<<<grid,block>>>(A_gpu,B_gpu);
	cudaThreadSynchronize();
	t_end = rtclock();
	fprintf(stdout, "GPU Runtime: %0.6lfs\n", t_end - t_start);//);

	cudaMemcpy(B_outputFromGpu, B_gpu, sizeof(DATA_TYPE) * NI * NJ, cudaMemcpyDeviceToHost);
	
	cudaFree(A_gpu);
	cudaFree(B_gpu);
}


int main(int argc, char *argv[])
{
	double t_start, t_end;

	DATA_TYPE* A;
	DATA_TYPE* B;  
	DATA_TYPE* B_outputFromGpu;
	
	A = (DATA_TYPE*)malloc(NI*NJ*sizeof(DATA_TYPE));
	B = (DATA_TYPE*)malloc(NI*NJ*sizeof(DATA_TYPE));
	B_outputFromGpu = (DATA_TYPE*)malloc(NI*NJ*sizeof(DATA_TYPE));

	//initialize the arrays
	init(A);
	
	GPU_argv_init();

	convolution2DCuda(A, B, B_outputFromGpu);
	
	t_start = rtclock();
	conv2D(A, B);
	t_end = rtclock();
	fprintf(stdout, "CPU Runtime: %0.6lfs\n", t_end - t_start);//);
	
	compareResults(B, B_outputFromGpu);

	free(A);
	free(B);
	free(B_outputFromGpu);
	
	return 0;
}


	.file	"tmpxft_00360a56_00000000-6_2DConvolution.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2051:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2051:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Error return from gettimeofday: %d"
	.text
	.globl	_Z7rtclockv
	.type	_Z7rtclockv, @function
_Z7rtclockv:
.LFB2040:
	.cfi_startproc
	endbr64
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	%fs:40, %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %rsi
	leaq	8(%rsp), %rdi
	call	gettimeofday@PLT
	testl	%eax, %eax
	je	.L3
	movl	%eax, %edx
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L3:
	cvtsi2sdq	16(%rsp), %xmm0
	mulsd	.LC1(%rip), %xmm0
	cvtsi2sdq	8(%rsp), %xmm1
	addsd	%xmm1, %xmm0
	movq	24(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2040:
	.size	_Z7rtclockv, .-_Z7rtclockv
	.globl	_Z6absValf
	.type	_Z6absValf, @function
_Z6absValf:
.LFB2041:
	.cfi_startproc
	endbr64
	xorps	%xmm1, %xmm1
	comiss	%xmm0, %xmm1
	jbe	.L11
	xorps	.LC3(%rip), %xmm0
.L11:
	ret
	.cfi_endproc
.LFE2041:
	.size	_Z6absValf, .-_Z6absValf
	.globl	_Z11percentDiffdd
	.type	_Z11percentDiffdd, @function
_Z11percentDiffdd:
.LFB2042:
	.cfi_startproc
	endbr64
	xorps	%xmm3, %xmm3
	movaps	%xmm0, %xmm2
	cvtsd2ss	%xmm0, %xmm0
	comiss	%xmm0, %xmm3
	jbe	.L15
	xorps	.LC3(%rip), %xmm0
.L15:
	movsd	.LC4(%rip), %xmm4
	cvtss2sd	%xmm0, %xmm0
	comisd	%xmm0, %xmm4
	jbe	.L17
	xorps	%xmm3, %xmm3
	cvtsd2ss	%xmm1, %xmm0
	comiss	%xmm0, %xmm3
	jbe	.L19
	xorps	.LC3(%rip), %xmm0
.L19:
	cvtss2sd	%xmm0, %xmm3
	comisd	%xmm3, %xmm4
	xorps	%xmm0, %xmm0
	ja	.L14
.L17:
	movaps	%xmm2, %xmm0
	subsd	%xmm1, %xmm0
	xorps	%xmm1, %xmm1
	cvtsd2ss	%xmm0, %xmm0
	comiss	%xmm0, %xmm1
	jbe	.L22
	xorps	.LC3(%rip), %xmm0
.L22:
	addsd	.LC5(%rip), %xmm2
	cvtsd2ss	%xmm2, %xmm1
	xorps	%xmm2, %xmm2
	comiss	%xmm1, %xmm2
	jbe	.L24
	xorps	.LC3(%rip), %xmm1
.L24:
	divss	%xmm1, %xmm0
	xorps	%xmm1, %xmm1
	comiss	%xmm0, %xmm1
	jbe	.L26
	xorps	.LC3(%rip), %xmm0
.L26:
	mulss	.LC6(%rip), %xmm0
.L14:
	ret
	.cfi_endproc
.LFE2042:
	.size	_Z11percentDiffdd, .-_Z11percentDiffdd
	.globl	_Z6conv2DPfS_
	.type	_Z6conv2DPfS_, @function
_Z6conv2DPfS_:
.LFB2043:
	.cfi_startproc
	endbr64
	movss	.LC7(%rip), %xmm1
	movss	.LC8(%rip), %xmm2
	xorl	%r8d, %r8d
	movl	$16384, %ecx
	movss	.LC9(%rip), %xmm3
	movss	.LC10(%rip), %xmm4
	movss	.LC11(%rip), %xmm5
	movss	.LC12(%rip), %xmm6
	movss	.LC13(%rip), %xmm7
	movss	.LC14(%rip), %xmm8
	movss	.LC15(%rip), %xmm9
.L36:
	addl	$4096, %r8d
	movq	%rcx, %rax
	movl	$1, %edx
.L37:
	movss	-16384(%rdi,%rax), %xmm0
	movss	(%rdi,%rax), %xmm10
	incl	%edx
	mulss	%xmm2, %xmm10
	mulss	%xmm1, %xmm0
	addss	%xmm10, %xmm0
	movss	16384(%rdi,%rax), %xmm10
	mulss	%xmm3, %xmm10
	addss	%xmm10, %xmm0
	movss	-16380(%rdi,%rax), %xmm10
	mulss	%xmm4, %xmm10
	addss	%xmm10, %xmm0
	movss	4(%rdi,%rax), %xmm10
	mulss	%xmm5, %xmm10
	addss	%xmm10, %xmm0
	movss	16388(%rdi,%rax), %xmm10
	mulss	%xmm6, %xmm10
	addss	%xmm10, %xmm0
	movss	-16376(%rdi,%rax), %xmm10
	mulss	%xmm7, %xmm10
	addss	%xmm10, %xmm0
	movss	8(%rdi,%rax), %xmm10
	mulss	%xmm8, %xmm10
	addss	%xmm10, %xmm0
	movss	16392(%rdi,%rax), %xmm10
	mulss	%xmm9, %xmm10
	addss	%xmm10, %xmm0
	movss	%xmm0, 4(%rsi,%rax)
	addq	$4, %rax
	cmpl	$4095, %edx
	jne	.L37
	addq	$16384, %rcx
	cmpl	$16769024, %r8d
	jne	.L36
	ret
	.cfi_endproc
.LFE2043:
	.size	_Z6conv2DPfS_, .-_Z6conv2DPfS_
	.globl	_Z4initPf
	.type	_Z4initPf, @function
_Z4initPf:
.LFB2044:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movq	%rdi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	pushq	%rdx
	.cfi_def_cfa_offset 48
.L41:
	movq	%rbp, %r12
	xorl	%ebx, %ebx
	salq	$14, %r12
	addq	%r13, %r12
.L42:
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC16(%rip), %xmm0
	movss	%xmm0, (%r12,%rbx,4)
	incq	%rbx
	cmpq	$4096, %rbx
	jne	.L42
	incq	%rbp
	cmpq	$4096, %rbp
	jne	.L41
	popq	%rax
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2044:
	.size	_Z4initPf, .-_Z4initPf
	.section	.rodata.str1.1
.LC18:
	.string	"Non-Matching CPU-GPU Outputs Beyond Error Threshold of %4.2f Percent: %d\n"
	.text
	.globl	_Z14compareResultsPfS_
	.type	_Z14compareResultsPfS_, @function
_Z14compareResultsPfS_:
.LFB2045:
	.cfi_startproc
	endbr64
	pushq	%r8
	.cfi_def_cfa_offset 16
	movsd	.LC17(%rip), %xmm5
	movl	$16384, %eax
	xorl	%ecx, %ecx
.L47:
	movl	$1, %edx
	leaq	(%rsi,%rax), %r9
	leaq	(%rdi,%rax), %r8
.L50:
	cvtss2sd	(%r8,%rdx,4), %xmm0
	cvtss2sd	(%r9,%rdx,4), %xmm1
	call	_Z11percentDiffdd
	cvtss2sd	%xmm0, %xmm0
	comisd	%xmm5, %xmm0
	jbe	.L48
	incl	%ecx
.L48:
	incq	%rdx
	cmpq	$4095, %rdx
	jne	.L50
	addq	$16384, %rax
	cmpq	$67092480, %rax
	jne	.L47
	movl	%ecx, %edx
	movaps	%xmm5, %xmm0
	leaq	.LC18(%rip), %rsi
	movb	$1, %al
	movl	$2, %edi
	popq	%rcx
	.cfi_def_cfa_offset 8
	jmp	__printf_chk@PLT
	.cfi_endproc
.LFE2045:
	.size	_Z14compareResultsPfS_, .-_Z14compareResultsPfS_
	.section	.rodata.str1.1
.LC19:
	.string	"setting device %d with name %s\n"
	.text
	.globl	_Z13GPU_argv_initv
	.type	_Z13GPU_argv_initv, @function
_Z13GPU_argv_initv:
.LFB2046:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	xorl	%esi, %esi
	subq	$1040, %rsp
	.cfi_def_cfa_offset 1056
	movq	%fs:40, %rax
	movq	%rax, 1032(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %rbx
	movq	%rbx, %rdi
	call	cudaGetDeviceProperties_v2@PLT
	xorl	%edx, %edx
	movl	$2, %edi
	xorl	%eax, %eax
	movq	%rbx, %rcx
	leaq	.LC19(%rip), %rsi
	call	__printf_chk@PLT
	xorl	%edi, %edi
	call	cudaSetDevice@PLT
	movq	1032(%rsp), %rax
	subq	%fs:40, %rax
	je	.L56
	call	__stack_chk_fail@PLT
.L56:
	addq	$1040, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2046:
	.size	_Z13GPU_argv_initv, .-_Z13GPU_argv_initv
	.globl	_Z42__device_stub__Z20Convolution2D_kernelPfS_PfS_
	.type	_Z42__device_stub__Z20Convolution2D_kernelPfS_PfS_, @function
_Z42__device_stub__Z20Convolution2D_kernelPfS_PfS_:
.LFB2073:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L58
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z20Convolution2D_kernelPfS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L58:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L60
	call	__stack_chk_fail@PLT
.L60:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2073:
	.size	_Z42__device_stub__Z20Convolution2D_kernelPfS_PfS_, .-_Z42__device_stub__Z20Convolution2D_kernelPfS_PfS_
	.globl	_Z20Convolution2D_kernelPfS_
	.type	_Z20Convolution2D_kernelPfS_, @function
_Z20Convolution2D_kernelPfS_:
.LFB2074:
	.cfi_startproc
	endbr64
	jmp	_Z42__device_stub__Z20Convolution2D_kernelPfS_PfS_
	.cfi_endproc
.LFE2074:
	.size	_Z20Convolution2D_kernelPfS_, .-_Z20Convolution2D_kernelPfS_
	.section	.rodata.str1.1
.LC20:
	.string	"GPU Runtime: %0.6lfs\n"
	.text
	.globl	_Z17convolution2DCudaPfS_S_
	.type	_Z17convolution2DCudaPfS_S_, @function
_Z17convolution2DCudaPfS_S_:
.LFB2047:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	$67108864, %esi
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movq	%rdx, %rbx
	subq	$72, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	leaq	16(%rsp), %rdi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$67108864, %esi
	call	cudaMalloc@PLT
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$67108864, %edx
	call	cudaMemcpy@PLT
	movl	$1, 52(%rsp)
	movabsq	$2199023255680, %rax
	movq	%rax, 44(%rsp)
	call	_Z7rtclockv
	movl	$1073741825, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	44(%rsp), %rdi
	movl	52(%rsp), %esi
	salq	$5, %rdx
	movl	$1, %ecx
	movsd	%xmm0, 8(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L64
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	call	_Z42__device_stub__Z20Convolution2D_kernelPfS_PfS_
.L64:
	call	cudaThreadSynchronize@PLT
	call	_Z7rtclockv
	subsd	8(%rsp), %xmm0
	movl	$2, %esi
	movb	$1, %al
	movq	stdout(%rip), %rdi
	leaq	.LC20(%rip), %rdx
	call	__fprintf_chk@PLT
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	movl	$67108864, %edx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L65
	call	__stack_chk_fail@PLT
.L65:
	addq	$72, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2047:
	.size	_Z17convolution2DCudaPfS_S_, .-_Z17convolution2DCudaPfS_S_
	.section	.rodata.str1.1
.LC21:
	.string	"CPU Runtime: %0.6lfs\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2048:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	$67108864, %edi
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	call	malloc@PLT
	movl	$67108864, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	movl	$67108864, %edi
	movq	%rax, %rbx
	call	malloc@PLT
	movq	%rbp, %rdi
	movq	%rax, %r12
	call	_Z4initPf
	call	_Z13GPU_argv_initv
	movq	%r12, %rdx
	movq	%rbx, %rsi
	movq	%rbp, %rdi
	call	_Z17convolution2DCudaPfS_S_
	call	_Z7rtclockv
	movq	%rbx, %rsi
	movq	%rbp, %rdi
	movsd	%xmm0, 8(%rsp)
	call	_Z6conv2DPfS_
	call	_Z7rtclockv
	subsd	8(%rsp), %xmm0
	movl	$2, %esi
	movb	$1, %al
	movq	stdout(%rip), %rdi
	leaq	.LC21(%rip), %rdx
	call	__fprintf_chk@PLT
	movq	%r12, %rsi
	movq	%rbx, %rdi
	call	_Z14compareResultsPfS_
	movq	%rbp, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	%r12, %rdi
	call	free@PLT
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2048:
	.size	main, .-main
	.section	.rodata.str1.1
.LC22:
	.string	"_Z20Convolution2D_kernelPfS_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2076:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC22(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z20Convolution2D_kernelPfS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2076:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC1:
	.long	-1598689907
	.long	1051772663
	.section	.rodata.cst16,"aM",@progbits,16
	.align 16
.LC3:
	.long	-2147483648
	.long	0
	.long	0
	.long	0
	.section	.rodata.cst8
	.align 8
.LC4:
	.long	1202590843
	.long	1065646817
	.align 8
.LC5:
	.long	-536870912
	.long	1044740494
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC6:
	.long	1120403456
	.align 4
.LC7:
	.long	1045220557
	.align 4
.LC8:
	.long	-1097229926
	.align 4
.LC9:
	.long	1053609165
	.align 4
.LC10:
	.long	1056964608
	.align 4
.LC11:
	.long	1058642330
	.align 4
.LC12:
	.long	1060320051
	.align 4
.LC13:
	.long	-1085485875
	.align 4
.LC14:
	.long	-1083808154
	.align 4
.LC15:
	.long	1036831949
	.align 4
.LC16:
	.long	805306368
	.section	.rodata.cst8
	.align 8
.LC17:
	.long	-1717986918
	.long	1068079513
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/**
 * 2DConvolution.cu: This file is part of the PolyBench/GPU 1.0 test suite.
 *
 *
 * Contact: Scott Grauer-Gray <sgrauerg@gmail.com>
 * Louis-Noel Pouchet <pouchet@cse.ohio-state.edu>
 * Web address: http://www.cse.ohio-state.edu/~pouchet/software/polybench/GPU
 */

#include <unistd.h>
#include <stdio.h>
#include <time.h>
#include <sys/time.h>
#include <stdlib.h>
#include <stdarg.h>
#include <string.h>
#include <hip/hip_runtime.h>

#include "../../common/polybenchUtilFuncts.h"

//define the error threshold for the results "not matching"
#define PERCENT_DIFF_ERROR_THRESHOLD 0.05

#define GPU_DEVICE 0

/* Problem size */
#define NI 4096
#define NJ 4096

/* Thread block dimensions */
#define DIM_THREAD_BLOCK_X 32
#define DIM_THREAD_BLOCK_Y 8

/* Can switch DATA_TYPE between float and double */
typedef float DATA_TYPE;



void conv2D(DATA_TYPE* A, DATA_TYPE* B)
{
	int i, j;
	DATA_TYPE c11, c12, c13, c21, c22, c23, c31, c32, c33;

	c11 = +0.2;  c21 = +0.5;  c31 = -0.8;
	c12 = -0.3;  c22 = +0.6;  c32 = -0.9;
	c13 = +0.4;  c23 = +0.7;  c33 = +0.10;


	for (i = 1; i < NI - 1; ++i) // 0
	{
		for (j = 1; j < NJ - 1; ++j) // 1
		{
			B[i*NJ + j] = c11 * A[(i - 1)*NJ + (j - 1)]  +  c12 * A[(i + 0)*NJ + (j - 1)]  +  c13 * A[(i + 1)*NJ + (j - 1)]
				+ c21 * A[(i - 1)*NJ + (j + 0)]  +  c22 * A[(i + 0)*NJ + (j + 0)]  +  c23 * A[(i + 1)*NJ + (j + 0)] 
				+ c31 * A[(i - 1)*NJ + (j + 1)]  +  c32 * A[(i + 0)*NJ + (j + 1)]  +  c33 * A[(i + 1)*NJ + (j + 1)];
		}
	}
}



void init(DATA_TYPE* A)
{
	int i, j;

	for (i = 0; i < NI; ++i)
    	{
		for (j = 0; j < NJ; ++j)
		{
			A[i*NJ + j] = (float)rand()/RAND_MAX;
        	}
    	}
}


void compareResults(DATA_TYPE* B, DATA_TYPE* B_outputFromGpu)
{
	int i, j, fail;
	fail = 0;
	
	// Compare a and b
	for (i=1; i < (NI-1); i++) 
	{
		for (j=1; j < (NJ-1); j++) 
		{
			if (percentDiff(B[i*NJ + j], B_outputFromGpu[i*NJ + j]) > PERCENT_DIFF_ERROR_THRESHOLD) 
			{
				fail++;
			}
		}
	}
	
	// Print results
	printf("Non-Matching CPU-GPU Outputs Beyond Error Threshold of %4.2f Percent: %d\n", PERCENT_DIFF_ERROR_THRESHOLD, fail);
	
}


void GPU_argv_init()
{
	hipDeviceProp_t deviceProp;
	hipGetDeviceProperties(&deviceProp, GPU_DEVICE);
	printf("setting device %d with name %s\n",GPU_DEVICE,deviceProp.name);
	hipSetDevice( GPU_DEVICE );
}


__global__ void Convolution2D_kernel(DATA_TYPE *A, DATA_TYPE *B)
{
	int j = blockIdx.x * blockDim.x + threadIdx.x;
	int i = blockIdx.y * blockDim.y + threadIdx.y;

	DATA_TYPE c11, c12, c13, c21, c22, c23, c31, c32, c33;

	c11 = +0.2;  c21 = +0.5;  c31 = -0.8;
	c12 = -0.3;  c22 = +0.6;  c32 = -0.9;
	c13 = +0.4;  c23 = +0.7;  c33 = +0.10;

	if ((i < NI-1) && (j < NJ-1) && (i > 0) && (j > 0))
	{
		B[i * NJ + j] =  c11 * A[(i - 1) * NJ + (j - 1)]  + c21 * A[(i - 1) * NJ + (j + 0)] + c31 * A[(i - 1) * NJ + (j + 1)] 
			+ c12 * A[(i + 0) * NJ + (j - 1)]  + c22 * A[(i + 0) * NJ + (j + 0)] +  c32 * A[(i + 0) * NJ + (j + 1)]
			+ c13 * A[(i + 1) * NJ + (j - 1)]  + c23 * A[(i + 1) * NJ + (j + 0)] +  c33 * A[(i + 1) * NJ + (j + 1)];
	}
}


void convolution2DCuda(DATA_TYPE* A, DATA_TYPE* B, DATA_TYPE* B_outputFromGpu)
{
	double t_start, t_end;

	DATA_TYPE *A_gpu;
	DATA_TYPE *B_gpu;

	hipMalloc((void **)&A_gpu, sizeof(DATA_TYPE) * NI * NJ);
	hipMalloc((void **)&B_gpu, sizeof(DATA_TYPE) * NI * NJ);
	hipMemcpy(A_gpu, A, sizeof(DATA_TYPE) * NI * NJ, hipMemcpyHostToDevice);
	
	dim3 block(DIM_THREAD_BLOCK_X, DIM_THREAD_BLOCK_Y);
	dim3 grid((size_t)ceil( ((float)NI) / ((float)block.x) ), (size_t)ceil( ((float)NJ) / ((float)block.y)) );
	t_start = rtclock();
	Convolution2D_kernel<<<grid,block>>>(A_gpu,B_gpu);
	hipDeviceSynchronize();
	t_end = rtclock();
	fprintf(stdout, "GPU Runtime: %0.6lfs\n", t_end - t_start);//);

	hipMemcpy(B_outputFromGpu, B_gpu, sizeof(DATA_TYPE) * NI * NJ, hipMemcpyDeviceToHost);
	
	hipFree(A_gpu);
	hipFree(B_gpu);
}


int main(int argc, char *argv[])
{
	double t_start, t_end;

	DATA_TYPE* A;
	DATA_TYPE* B;  
	DATA_TYPE* B_outputFromGpu;
	
	A = (DATA_TYPE*)malloc(NI*NJ*sizeof(DATA_TYPE));
	B = (DATA_TYPE*)malloc(NI*NJ*sizeof(DATA_TYPE));
	B_outputFromGpu = (DATA_TYPE*)malloc(NI*NJ*sizeof(DATA_TYPE));

	//initialize the arrays
	init(A);
	
	GPU_argv_init();

	convolution2DCuda(A, B, B_outputFromGpu);
	
	t_start = rtclock();
	conv2D(A, B);
	t_end = rtclock();
	fprintf(stdout, "CPU Runtime: %0.6lfs\n", t_end - t_start);//);
	
	compareResults(B, B_outputFromGpu);

	free(A);
	free(B);
	free(B_outputFromGpu);
	
	return 0;
}


	.text
	.file	"2DConvolution.hip"
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z7rtclockv
.LCPI0_0:
	.quad	0x3eb0c6f7a0b5ed8d              # double 9.9999999999999995E-7
	.text
	.globl	_Z7rtclockv
	.type	_Z7rtclockv,@function
_Z7rtclockv:                            # @_Z7rtclockv
	.cfi_startproc
# %bb.0:
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rsp, %rdi
	leaq	16(%rsp), %rsi
	callq	gettimeofday
	testl	%eax, %eax
	je	.LBB0_2
# %bb.1:
	movl	$.L.str, %edi
	movl	%eax, %esi
	xorl	%eax, %eax
	callq	printf
.LBB0_2:
	cvtsi2sdq	(%rsp), %xmm1
	cvtsi2sdq	8(%rsp), %xmm0
	mulsd	.LCPI0_0(%rip), %xmm0
	addsd	%xmm1, %xmm0
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z7rtclockv, .Lfunc_end0-_Z7rtclockv
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function _Z6absValf
.LCPI1_0:
	.long	0x80000000                      # float -0
	.long	0x80000000                      # float -0
	.long	0x80000000                      # float -0
	.long	0x80000000                      # float -0
	.text
	.globl	_Z6absValf
	.type	_Z6absValf,@function
_Z6absValf:                             # @_Z6absValf
	.cfi_startproc
# %bb.0:
	movaps	.LCPI1_0(%rip), %xmm1           # xmm1 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0]
	xorps	%xmm0, %xmm1
	maxss	%xmm0, %xmm1
	movaps	%xmm1, %xmm0
	retq
.Lfunc_end1:
	.size	_Z6absValf, .Lfunc_end1-_Z6absValf
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function _Z11percentDiffdd
.LCPI2_0:
	.long	0x80000000                      # float -0
	.long	0x80000000                      # float -0
	.long	0x80000000                      # float -0
	.long	0x80000000                      # float -0
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI2_1:
	.quad	0x3f847ae147ae147b              # double 0.01
.LCPI2_2:
	.quad	0x3e45798ee0000000              # double 9.9999999392252903E-9
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0
.LCPI2_3:
	.long	0x42c80000                      # float 100
	.text
	.globl	_Z11percentDiffdd
	.type	_Z11percentDiffdd,@function
_Z11percentDiffdd:                      # @_Z11percentDiffdd
	.cfi_startproc
# %bb.0:
	cvtsd2ss	%xmm0, %xmm2
	movaps	.LCPI2_0(%rip), %xmm3           # xmm3 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0]
	xorps	%xmm2, %xmm3
	maxss	%xmm2, %xmm3
	xorps	%xmm2, %xmm2
	cvtss2sd	%xmm3, %xmm2
	movsd	.LCPI2_1(%rip), %xmm3           # xmm3 = mem[0],zero
	ucomisd	%xmm2, %xmm3
	jbe	.LBB2_2
# %bb.1:
	xorps	%xmm2, %xmm2
	cvtsd2ss	%xmm1, %xmm2
	movaps	.LCPI2_0(%rip), %xmm4           # xmm4 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0]
	xorps	%xmm2, %xmm4
	maxss	%xmm2, %xmm4
	cvtss2sd	%xmm4, %xmm4
	xorps	%xmm2, %xmm2
	ucomisd	%xmm4, %xmm3
	ja	.LBB2_3
.LBB2_2:
	movaps	%xmm0, %xmm2
	subsd	%xmm1, %xmm2
	xorps	%xmm1, %xmm1
	cvtsd2ss	%xmm2, %xmm1
	movaps	.LCPI2_0(%rip), %xmm2           # xmm2 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0]
	movaps	%xmm1, %xmm3
	xorps	%xmm2, %xmm3
	maxss	%xmm1, %xmm3
	addsd	.LCPI2_2(%rip), %xmm0
	cvtsd2ss	%xmm0, %xmm0
	movaps	%xmm0, %xmm1
	xorps	%xmm2, %xmm1
	maxss	%xmm0, %xmm1
	divss	%xmm1, %xmm3
	xorps	%xmm3, %xmm2
	maxss	%xmm3, %xmm2
	mulss	.LCPI2_3(%rip), %xmm2
.LBB2_3:
	movaps	%xmm2, %xmm0
	retq
.Lfunc_end2:
	.size	_Z11percentDiffdd, .Lfunc_end2-_Z11percentDiffdd
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z6conv2DPfS_
.LCPI3_0:
	.long	0x3e4ccccd                      # float 0.200000003
.LCPI3_1:
	.long	0xbe99999a                      # float -0.300000012
.LCPI3_2:
	.long	0x3ecccccd                      # float 0.400000006
.LCPI3_3:
	.long	0x3f000000                      # float 0.5
.LCPI3_4:
	.long	0x3f19999a                      # float 0.600000024
.LCPI3_5:
	.long	0x3f333333                      # float 0.699999988
.LCPI3_6:
	.long	0xbf4ccccd                      # float -0.800000011
.LCPI3_7:
	.long	0xbf666666                      # float -0.899999976
.LCPI3_8:
	.long	0x3dcccccd                      # float 0.100000001
	.text
	.globl	_Z6conv2DPfS_
	.type	_Z6conv2DPfS_,@function
_Z6conv2DPfS_:                          # @_Z6conv2DPfS_
	.cfi_startproc
# %bb.0:
	addq	$32776, %rdi                    # imm = 0x8008
	addq	$16388, %rsi                    # imm = 0x4004
	movl	$1, %eax
	movss	.LCPI3_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	movss	.LCPI3_1(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	movss	.LCPI3_2(%rip), %xmm2           # xmm2 = mem[0],zero,zero,zero
	movss	.LCPI3_3(%rip), %xmm3           # xmm3 = mem[0],zero,zero,zero
	movss	.LCPI3_4(%rip), %xmm4           # xmm4 = mem[0],zero,zero,zero
	movss	.LCPI3_5(%rip), %xmm5           # xmm5 = mem[0],zero,zero,zero
	movss	.LCPI3_6(%rip), %xmm6           # xmm6 = mem[0],zero,zero,zero
	movss	.LCPI3_7(%rip), %xmm7           # xmm7 = mem[0],zero,zero,zero
	movss	.LCPI3_8(%rip), %xmm8           # xmm8 = mem[0],zero,zero,zero
	movl	$16384, %ecx                    # imm = 0x4000
.LBB3_1:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_2 Depth 2
	xorl	%edx, %edx
.LBB3_2:                                #   Parent Loop BB3_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	-32776(%rdi,%rdx,4), %xmm9      # xmm9 = mem[0],zero,zero,zero
	mulss	%xmm0, %xmm9
	movss	-16392(%rdi,%rdx,4), %xmm10     # xmm10 = mem[0],zero,zero,zero
	mulss	%xmm1, %xmm10
	addss	%xmm9, %xmm10
	movss	-8(%rdi,%rdx,4), %xmm9          # xmm9 = mem[0],zero,zero,zero
	mulss	%xmm2, %xmm9
	addss	%xmm10, %xmm9
	movss	-32772(%rdi,%rdx,4), %xmm10     # xmm10 = mem[0],zero,zero,zero
	mulss	%xmm3, %xmm10
	addss	%xmm9, %xmm10
	movss	-16388(%rdi,%rdx,4), %xmm9      # xmm9 = mem[0],zero,zero,zero
	mulss	%xmm4, %xmm9
	addss	%xmm10, %xmm9
	movss	-4(%rdi,%rdx,4), %xmm10         # xmm10 = mem[0],zero,zero,zero
	mulss	%xmm5, %xmm10
	addss	%xmm9, %xmm10
	movss	-32768(%rdi,%rdx,4), %xmm9      # xmm9 = mem[0],zero,zero,zero
	mulss	%xmm6, %xmm9
	addss	%xmm10, %xmm9
	movss	-16384(%rdi,%rdx,4), %xmm10     # xmm10 = mem[0],zero,zero,zero
	mulss	%xmm7, %xmm10
	addss	%xmm9, %xmm10
	movss	(%rdi,%rdx,4), %xmm9            # xmm9 = mem[0],zero,zero,zero
	mulss	%xmm8, %xmm9
	addss	%xmm10, %xmm9
	movss	%xmm9, (%rsi,%rdx,4)
	incq	%rdx
	cmpq	$4094, %rdx                     # imm = 0xFFE
	jne	.LBB3_2
# %bb.3:                                #   in Loop: Header=BB3_1 Depth=1
	incq	%rax
	addq	%rcx, %rdi
	addq	%rcx, %rsi
	cmpq	$4095, %rax                     # imm = 0xFFF
	jne	.LBB3_1
# %bb.4:
	retq
.Lfunc_end3:
	.size	_Z6conv2DPfS_, .Lfunc_end3-_Z6conv2DPfS_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z4initPf
.LCPI4_0:
	.long	0x30000000                      # float 4.65661287E-10
	.text
	.globl	_Z4initPf
	.type	_Z4initPf,@function
_Z4initPf:                              # @_Z4initPf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %rbx
	xorl	%r14d, %r14d
.LBB4_1:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_2 Depth 2
	xorl	%r15d, %r15d
.LBB4_2:                                #   Parent Loop BB4_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	movss	.LCPI4_0(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	%xmm1, %xmm0
	movss	%xmm0, (%rbx,%r15,4)
	incq	%r15
	cmpq	$4096, %r15                     # imm = 0x1000
	jne	.LBB4_2
# %bb.3:                                #   in Loop: Header=BB4_1 Depth=1
	incq	%r14
	addq	$16384, %rbx                    # imm = 0x4000
	cmpq	$4096, %r14                     # imm = 0x1000
	jne	.LBB4_1
# %bb.4:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z4initPf, .Lfunc_end4-_Z4initPf
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z14compareResultsPfS_
.LCPI5_0:
	.quad	0x3fa999999999999a              # double 0.050000000000000003
	.text
	.globl	_Z14compareResultsPfS_
	.type	_Z14compareResultsPfS_,@function
_Z14compareResultsPfS_:                 # @_Z14compareResultsPfS_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %rbx
	movq	%rdi, %r14
	movl	$16388, %eax                    # imm = 0x4004
	addq	%rax, %rbx
	addq	%rax, %r14
	xorl	%r15d, %r15d
	movl	$1, %r12d
	movl	$16384, %r13d                   # imm = 0x4000
.LBB5_1:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB5_2 Depth 2
	xorl	%ebp, %ebp
.LBB5_2:                                #   Parent Loop BB5_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r14,%rbp,4), %xmm0
	xorps	%xmm1, %xmm1
	cvtss2sd	(%rbx,%rbp,4), %xmm1
	callq	_Z11percentDiffdd
	cvtss2sd	%xmm0, %xmm0
	xorl	%eax, %eax
	ucomisd	.LCPI5_0(%rip), %xmm0
	seta	%al
	addl	%eax, %r15d
	incq	%rbp
	cmpq	$4094, %rbp                     # imm = 0xFFE
	jne	.LBB5_2
# %bb.3:                                #   in Loop: Header=BB5_1 Depth=1
	incq	%r12
	addq	%r13, %rbx
	addq	%r13, %r14
	cmpq	$4095, %r12                     # imm = 0xFFF
	jne	.LBB5_1
# %bb.4:
	movsd	.LCPI5_0(%rip), %xmm0           # xmm0 = mem[0],zero
	movl	$.L.str.1, %edi
	movl	%r15d, %esi
	movb	$1, %al
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	printf                          # TAILCALL
.Lfunc_end5:
	.size	_Z14compareResultsPfS_, .Lfunc_end5-_Z14compareResultsPfS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z13GPU_argv_initv              # -- Begin function _Z13GPU_argv_initv
	.type	_Z13GPU_argv_initv,@function
_Z13GPU_argv_initv:                     # @_Z13GPU_argv_initv
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$1472, %rsp                     # imm = 0x5C0
	.cfi_def_cfa_offset 1488
	.cfi_offset %rbx, -16
	movq	%rsp, %rbx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	hipGetDevicePropertiesR0600
	movl	$.L.str.2, %edi
	xorl	%esi, %esi
	movq	%rbx, %rdx
	xorl	%eax, %eax
	callq	printf
	xorl	%edi, %edi
	callq	hipSetDevice
	addq	$1472, %rsp                     # imm = 0x5C0
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z13GPU_argv_initv, .Lfunc_end6-_Z13GPU_argv_initv
	.cfi_endproc
                                        # -- End function
	.globl	_Z35__device_stub__Convolution2D_kernelPfS_ # -- Begin function _Z35__device_stub__Convolution2D_kernelPfS_
	.type	_Z35__device_stub__Convolution2D_kernelPfS_,@function
_Z35__device_stub__Convolution2D_kernelPfS_: # @_Z35__device_stub__Convolution2D_kernelPfS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z20Convolution2D_kernelPfS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	_Z35__device_stub__Convolution2D_kernelPfS_, .Lfunc_end7-_Z35__device_stub__Convolution2D_kernelPfS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z17convolution2DCudaPfS_S_     # -- Begin function _Z17convolution2DCudaPfS_S_
	.type	_Z17convolution2DCudaPfS_S_,@function
_Z17convolution2DCudaPfS_S_:            # @_Z17convolution2DCudaPfS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdx, %rbx
	movq	%rdi, %r14
	leaq	16(%rsp), %r15
	movl	$67108864, %esi                 # imm = 0x4000000
	movq	%r15, %rdi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movl	$67108864, %esi                 # imm = 0x4000000
	callq	hipMalloc
	movq	(%r15), %rdi
	movl	$67108864, %edx                 # imm = 0x4000000
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	callq	_Z7rtclockv
	movsd	%xmm0, 24(%rsp)                 # 8-byte Spill
	movabsq	$2199023255680, %rdi            # imm = 0x20000000080
	movabsq	$34359738400, %rdx              # imm = 0x800000020
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB8_2
# %bb.1:
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	callq	_Z35__device_stub__Convolution2D_kernelPfS_
.LBB8_2:
	callq	hipDeviceSynchronize
	callq	_Z7rtclockv
	movq	stdout(%rip), %rdi
	subsd	24(%rsp), %xmm0                 # 8-byte Folded Reload
	movl	$.L.str.3, %esi
	movb	$1, %al
	callq	fprintf
	movq	8(%rsp), %rsi
	movl	$67108864, %edx                 # imm = 0x4000000
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	_Z17convolution2DCudaPfS_S_, .Lfunc_end8-_Z17convolution2DCudaPfS_S_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI9_0:
	.long	0x30000000                      # float 4.65661287E-10
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$67108864, %edi                 # imm = 0x4000000
	callq	malloc
	movq	%rax, %rbx
	movl	$67108864, %edi                 # imm = 0x4000000
	callq	malloc
	movq	%rax, %r14
	movl	$67108864, %edi                 # imm = 0x4000000
	callq	malloc
	movq	%rax, %r15
	xorl	%r12d, %r12d
	movq	%rbx, %r13
.LBB9_1:                                # %.preheader.i
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB9_2 Depth 2
	xorl	%ebp, %ebp
.LBB9_2:                                #   Parent Loop BB9_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	movss	.LCPI9_0(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	%xmm1, %xmm0
	movss	%xmm0, (%r13,%rbp,4)
	incq	%rbp
	cmpq	$4096, %rbp                     # imm = 0x1000
	jne	.LBB9_2
# %bb.3:                                #   in Loop: Header=BB9_1 Depth=1
	incq	%r12
	addq	$16384, %r13                    # imm = 0x4000
	cmpq	$4096, %r12                     # imm = 0x1000
	jne	.LBB9_1
# %bb.4:                                # %_Z4initPf.exit
	callq	_Z13GPU_argv_initv
	movq	%rbx, %rdi
	movq	%r15, %rdx
	callq	_Z17convolution2DCudaPfS_S_
	callq	_Z7rtclockv
	movsd	%xmm0, (%rsp)                   # 8-byte Spill
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	_Z6conv2DPfS_
	callq	_Z7rtclockv
	movq	stdout(%rip), %rdi
	subsd	(%rsp), %xmm0                   # 8-byte Folded Reload
	movl	$.L.str.4, %esi
	movb	$1, %al
	callq	fprintf
	movq	%r14, %rdi
	movq	%r15, %rsi
	callq	_Z14compareResultsPfS_
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	xorl	%eax, %eax
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end9:
	.size	main, .Lfunc_end9-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB10_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB10_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z20Convolution2D_kernelPfS_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end10:
	.size	__hip_module_ctor, .Lfunc_end10-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB11_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB11_2:
	retq
.Lfunc_end11:
	.size	__hip_module_dtor, .Lfunc_end11-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Error return from gettimeofday: %d"
	.size	.L.str, 35

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Non-Matching CPU-GPU Outputs Beyond Error Threshold of %4.2f Percent: %d\n"
	.size	.L.str.1, 74

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"setting device %d with name %s\n"
	.size	.L.str.2, 32

	.type	_Z20Convolution2D_kernelPfS_,@object # @_Z20Convolution2D_kernelPfS_
	.section	.rodata,"a",@progbits
	.globl	_Z20Convolution2D_kernelPfS_
	.p2align	3, 0x0
_Z20Convolution2D_kernelPfS_:
	.quad	_Z35__device_stub__Convolution2D_kernelPfS_
	.size	_Z20Convolution2D_kernelPfS_, 8

	.type	.L.str.3,@object                # @.str.3
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.3:
	.asciz	"GPU Runtime: %0.6lfs\n"
	.size	.L.str.3, 22

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"CPU Runtime: %0.6lfs\n"
	.size	.L.str.4, 22

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z20Convolution2D_kernelPfS_"
	.size	.L__unnamed_1, 29

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z35__device_stub__Convolution2D_kernelPfS_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z20Convolution2D_kernelPfS_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z20Convolution2D_kernelPfS_ ; -- Begin function _Z20Convolution2D_kernelPfS_
	.globl	_Z20Convolution2D_kernelPfS_
	.p2align	8
	.type	_Z20Convolution2D_kernelPfS_,@function
_Z20Convolution2D_kernelPfS_:           ; @_Z20Convolution2D_kernelPfS_
; %bb.0:
	s_load_b32 s2, s[0:1], 0x1c
	v_bfe_u32 v1, v0, 10, 10
	v_and_b32_e32 v4, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	v_mad_u64_u32 v[2:3], null, s15, s3, v[1:2]
	v_mad_u64_u32 v[0:1], null, s14, s2, v[4:5]
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, -1, v2
	v_add_nc_u32_e32 v1, -1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_u32_e32 v3, v1, v3
	v_cmpx_gt_u32_e32 0xffe, v3
	s_cbranch_execz .LBB0_2
; %bb.1:
	v_dual_mov_b32 v3, 0 :: v_dual_lshlrev_b32 v14, 12, v2
	s_load_b128 s[0:3], s[0:1], 0x0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v8, 0xfffff000, v14
	v_add_nc_u32_e32 v2, v8, v1
	v_add_co_u32 v4, s4, v8, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v5, null, 0, 0, s4
	v_lshlrev_b64 v[6:7], 2, v[2:3]
	v_add_nc_u32_e32 v2, v8, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_lshlrev_b64 v[8:9], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_co_u32 v6, vcc_lo, s0, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v7, vcc_lo
	v_add_nc_u32_e32 v2, v14, v1
	v_add_co_u32 v8, vcc_lo, s0, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, s1, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_lshlrev_b64 v[10:11], 2, v[2:3]
	v_add_nc_u32_e32 v2, v14, v0
	s_clause 0x1
	global_load_b32 v15, v[6:7], off
	global_load_b32 v16, v[8:9], off
	v_add_co_u32 v6, s4, v14, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v7, null, 0, 0, s4
	v_add_co_u32 v4, vcc_lo, s0, v4
	v_lshlrev_b64 v[12:13], 2, v[2:3]
	v_add_nc_u32_e32 v14, 0x1000, v14
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
	v_add_co_u32 v8, vcc_lo, s0, v10
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	v_add_co_ci_u32_e32 v9, vcc_lo, s1, v11, vcc_lo
	v_add_co_u32 v10, vcc_lo, s0, v12
	v_add_nc_u32_e32 v2, v14, v1
	global_load_b32 v17, v[4:5], off offset:4
	v_add_co_ci_u32_e32 v11, vcc_lo, s1, v13, vcc_lo
	v_add_co_u32 v6, vcc_lo, s0, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v7, vcc_lo
	v_lshlrev_b64 v[4:5], 2, v[2:3]
	v_add_nc_u32_e32 v2, v14, v0
	s_clause 0x2
	global_load_b32 v8, v[8:9], off
	global_load_b32 v9, v[10:11], off
	global_load_b32 v6, v[6:7], off offset:4
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	v_add_co_u32 v4, vcc_lo, s0, v4
	v_add_nc_u32_e32 v2, 1, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_clause 0x1
	global_load_b32 v4, v[4:5], off
	global_load_b32 v5, v[0:1], off
	v_add_co_u32 v0, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v3, vcc_lo
	global_load_b32 v0, v[0:1], off
	s_waitcnt vmcnt(7)
	v_mul_f32_e32 v1, 0.5, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmamk_f32 v1, v15, 0x3e4ccccd, v1
	s_waitcnt vmcnt(6)
	v_fmamk_f32 v1, v17, 0xbf4ccccd, v1
	s_waitcnt vmcnt(5)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmamk_f32 v1, v8, 0xbe99999a, v1
	s_waitcnt vmcnt(4)
	v_fmamk_f32 v1, v9, 0x3f19999a, v1
	s_waitcnt vmcnt(3)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmamk_f32 v1, v6, 0xbf666666, v1
	s_waitcnt vmcnt(2)
	v_fmamk_f32 v1, v4, 0x3ecccccd, v1
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmamk_f32 v1, v5, 0x3f333333, v1
	s_waitcnt vmcnt(0)
	v_fmamk_f32 v2, v0, 0x3dcccccd, v1
	v_add_co_u32 v0, vcc_lo, s2, v12
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v13, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z20Convolution2D_kernelPfS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 18
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z20Convolution2D_kernelPfS_, .Lfunc_end0-_Z20Convolution2D_kernelPfS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 628
; NumSgprs: 18
; NumVgprs: 18
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 18
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z20Convolution2D_kernelPfS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z20Convolution2D_kernelPfS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     18
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
