#include <iostream>
#include <fstream>
#include <sstream>
#include <string>
#include <stdio.h>
#include <curand.h>
#include <curand_kernel.h>

#define BLOCK_SIZE 		16
#define MAX_TRIANGLE	100
#define MAX_LIGHT 		10
#define eps 			0.0001
#define MAX_RAY_DEPTH 	20
#define	AAKERNEL_SIZE	6


using namespace std;

__device__ unsigned int WangHash(unsigned int a) {
    a = (a ^ 61) ^ (a >> 16);
    a = a + (a << 3);
    a = a ^ (a >> 4);
    a = a * 0x27d4eb2d;
    a = a ^ (a >> 15);
    return a;
}

#define gpuErrchk(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(cudaError_t code, const char *file, int line, bool abort=true)
{
   if (code != cudaSuccess)
   {
      fprintf(stderr,"GPUassert: %s %s %d\n", cudaGetErrorString(code), file, line);
      if (abort) exit(code);
   }
}

struct Vec {        
   float x, y, z;                 
   __host__ __device__ Vec(){} 
   __host__ __device__ Vec(float x_, float y_, float z_){ x=x_; y=y_; z=z_; } 
   __host__ __device__ Vec operator+(const Vec &b) const { return Vec(x+b.x,y+b.y,z+b.z); } 
   __host__ __device__ Vec operator-(const Vec &b) const { return Vec(x-b.x,y-b.y,z-b.z); } 
   __host__ __device__ Vec operator*(float b) const { return Vec(x*b,y*b,z*b); } 
   __host__ __device__ Vec mult(const Vec &b) const { return Vec(x*b.x,y*b.y,z*b.z); } 
   __host__ __device__ Vec& norm(){ return *this = *this * (1/sqrtf(x*x+y*y+z*z)); } 
   __host__ __device__ float dot(const Vec &b) const { return x*b.x+y*b.y+z*b.z; } // cross: 
   __host__ __device__ Vec operator%(const Vec&b) const{return Vec(y*b.z-z*b.y,z*b.x-x*b.z,x*b.y-y*b.x);} 
}; 

__device__ float normalize(Vec v)
{
	return sqrt(v.x*v.x + v.y*v.y + v.z*v.z);
}

struct Parameter {
	int w;
	int h;
	int samps;
	int n_triangles;
	int n_lights;
	float fov;
    float aspectratio;
	float angle;
};

struct Tracing_Stack{
	Vec o;
	Vec d;
	Vec pre_color;
	int depth;
	__device__ Tracing_Stack(){};	
	__device__ Tracing_Stack(const Vec &o,
					  const Vec &d,
					  const Vec &pre_color,
					  const int depth){
		this->o = o;
		this->d = d;
		this->pre_color = pre_color;
		this->depth = depth;
	}
};

struct Light
{
	Vec pos;
	Vec color;
	Vec x_vec;
	Vec y_vec;
	int n_x;
	int n_y;
	
	
};


class Triangle
{
public:	
	Vec v1;   // use one vertex and two edges to save some time and space
	Vec edge1;
	Vec edge2;
	Vec norm;
	Vec surfaceColor;
	Vec emissionColor;
	char token;		// T or D or L- transparent or diffusive surface or light source surface
    __host__ __device__ Triangle(){};
	__host__ Triangle(const Vec &a,
					  const Vec &b,
					  const Vec &c, 
					  const Vec &sColor, 
					  const Vec &eColor, 
					  char tld_token){
		v1 = a;
		Vec v2 = b;
		Vec v3 = c;
		edge1 = v2-v1;
		edge2 = v3-v1;
		token = tld_token;
		surfaceColor = sColor;
		emissionColor =  eColor;
		computeNormal();
	}

	__host__ void computeNormal()
	{
		norm = edge2%edge1;
		norm.norm();		
	}

	__device__ bool intersection(const Vec &origin, const Vec &dir, float & t) const
	{
		Vec pVec = dir%edge2;
		float det=edge1.dot(pVec);
		//if(det>-eps && det <eps)
		if(det==0)
		{
			return false;
		}

		float invDet=1./det;
		Vec tVec=origin-v1;
		float u=(tVec.dot(pVec))*(invDet);
		if(u<0. || u>1.)
		{
			return false;
		}

		Vec qVec = tVec%edge1;
		float v = dir.dot(qVec)*(invDet);

		if (v<0.||v+u>1.)
		{
			return false;
		}
		t = (edge2.dot(qVec))*(invDet);
		if (t>eps){
			return true;
		}
		return false;
	}	

};

__constant__ Triangle ctriangles[MAX_TRIANGLE];
__constant__ Parameter cparam[1];
__constant__ Light clights[MAX_LIGHT];
__constant__ float AAFilter[AAKERNEL_SIZE][3] 	=		/* X, Y, coef */
	{
		-0.52, 0.38, 0.128,
		0.41, 0.56, 0.119,
		0.27, 0.08, 0.294,
		-0.17, -0.29, 0.249,
		0.58, -0.55, 0.104,
		-0.31, -0.71, 0.106
	};	
__host__ void parse(string file_name, Triangle* triangles, int &n_triangles)
{
	ifstream fin;
	fin.open(file_name);
	int cnt_v  = 0;
	float v[15];

	if(fin.fail())
	{
		cout<<"Could not open file"<<endl;
		exit(1);
	}

	string buffer;
	n_triangles = 0;
	while(!fin.eof())
	{
		getline(fin,buffer);
	    istringstream buf(buffer);
	    for(string token; getline(buf, token,' '); )
        {
        	if (token=="triangle") {
        		cnt_v = 0;
			}
			else if(token=="T" || token=="D"|| token=="S")
			{
				if (n_triangles>=MAX_TRIANGLE){
					cout<<"Number of triangles should be equal or less than "<<MAX_TRIANGLE<<endl;
					exit(1);
				}
				Vec v1(v[0],v[1],v[2]);
				Vec v2(v[3],v[4],v[5]);
				Vec v3(v[6],v[7],v[8]);
				Vec sColor(v[9],v[10],v[11]);
				Vec eColor(v[12],v[13],v[14]);
				Triangle tri_tmp(v1,v2,v3,sColor,eColor,token[0]);
				triangles[n_triangles++] = tri_tmp;
				
			}
        	else v[cnt_v++] = stof(token);
		}
	}
	fin.close();
	return;
}

__host__ float clamp(float x){ return x<0 ? 0 : x>1 ? 1 : x; }
__host__ int toInt(float x){ return int(powf(clamp(x),1/2.2)*255+.5); }


__global__ void init_rand(curandState *state, unsigned int seed) {
	int idx_x = blockIdx.x * blockDim.x + threadIdx.x;
	int idx_y = blockIdx.y * blockDim.y + threadIdx.y;
	int idx = idx_y*(cparam[0].w)+idx_x;
	curand_init(seed + WangHash(idx),0 , 0, &state[idx]);
}


__device__ bool intersect(const Vec &origin, const Vec &direction, float &t, int &id){
	   int n = cparam[0].n_triangles;  
	   float d, inf=1e5;
	   t = inf;
	   for(int i=0; i<n; i++) if((ctriangles[i].intersection(origin,direction,d))&&d<t){t=d;id=i;} 
	   return (t<inf);
}

__device__ Vec raytrace(Vec &o, Vec &d) {
	
	Tracing_Stack stk[MAX_RAY_DEPTH+1];
	int stk_cnt = 1;
	stk[0] = Tracing_Stack(o,d,Vec(1,1,1),0);
	Vec color(0,0,0);
	
	do{
		float t;
		int id;
		if (!intersect(stk[stk_cnt-1].o, stk[stk_cnt-1].d, t, id)) {stk_cnt--; continue;} //no hit
		const Triangle &obj = ctriangles[id];        // the hit object
		Vec new_o = stk[stk_cnt-1].o + stk[stk_cnt-1].d*t;    // update the origin
		Vec n = obj.norm;
		Vec nl = n.dot(stk[stk_cnt-1].d)<0?n:n*-1;
		Vec f = obj.surfaceColor;
	   
		//float p = f.x>f.y && f.x>f.z ? f.x : f.y>f.z ? f.y : f.z; // max refl 
		if (stk[stk_cnt-1].depth>=MAX_RAY_DEPTH) {
			 {color = color + stk[stk_cnt-1].pre_color.mult(obj.emissionColor);stk_cnt--;continue;} //R.R.
		}
		
		if (obj.token == 'D'){                  // Ideal DIFFUSE reflection 
			
			Vec col(0,0,0);
	
			for (int i = 0; i < cparam[0].n_lights;i++){
				float factor = 1./clights[i].n_x/clights[i].n_y;
				for (int j = 0; j<clights[i].n_x; j++) {
					for (int k = 0; k<clights[i].n_y; k++) {
						Vec l_pos = clights[i].pos - clights[i].x_vec*0.5 + clights[i].x_vec * (1./clights[i].n_x*j) 
											  - clights[i].y_vec*0.5 + clights[i].y_vec * (1./clights[i].n_y*k);
						Vec d = (l_pos - new_o);
						float t_light = normalize(d);
						d = d.norm();
						int id = 0;
						if (!intersect(new_o, d, t, id) || ctriangles[id].token=='L' || t>t_light) {
							col = col + f.mult(clights[i].color)*(d.dot(obj.norm))*factor;	
						}
					}
				}
			}
			color = color + stk[stk_cnt-1].pre_color.mult(col);stk_cnt--;
			
			continue;
		}
		
		
		else if (obj.token == 'S'){            // Ideal SPECULAR reflection 
   			color = color+stk[stk_cnt-1].pre_color.mult(obj.emissionColor);
			stk[stk_cnt-1].o = new_o;
			stk[stk_cnt-1].d = stk[stk_cnt-1].d - n*2*n.dot(stk[stk_cnt-1].d);
			stk[stk_cnt-1].pre_color = stk[stk_cnt-1].pre_color.mult(f);
			stk[stk_cnt-1].depth++;
			continue;
		}
		
				
   		Vec reflRay(stk[stk_cnt-1].d-n*2*n.dot(stk[stk_cnt-1].d));     // Ideal dielectric REFRACTION
		
   		bool into = n.dot(nl)>0;                // Ray from outside going in? 
   		float nc=1, nt=2.4, nnt=into?nc/nt:nt/nc, ddn=stk[stk_cnt-1].d.dot(nl), cos2t; 
   		if ((cos2t=1-nnt*nnt*(1-ddn*ddn))<0)    {// Total internal reflection
     //cout<<"TIR"<<endl;
			color = color + stk[stk_cnt-1].pre_color.mult(obj.emissionColor);
			stk[stk_cnt-1].o = new_o;
			stk[stk_cnt-1].d = reflRay;
			stk[stk_cnt-1].pre_color = stk[stk_cnt-1].pre_color.mult(f);
			stk[stk_cnt-1].depth++;
			continue;
   		}
	 	Vec tdir = (stk[stk_cnt-1].d*nnt - n*((into?1:-1)*(ddn*nnt+sqrtf(cos2t)))).norm(); 
  		float a=nt-nc, b=nt+nc, R0=a*a/(b*b), c = 1-(into?-ddn:tdir.dot(n)); 
  		float Re=R0+(1-R0)*c*c*c*c*c,Tr=1-Re;
		
		color = color + stk[stk_cnt-1].pre_color.mult(obj.emissionColor);
		stk[stk_cnt-1].o = new_o;
		stk[stk_cnt-1].d = reflRay;
		stk[stk_cnt-1].pre_color = stk[stk_cnt-1].pre_color.mult(f);
		stk[stk_cnt-1].depth++;
		stk_cnt++;
		stk[stk_cnt-1].o = new_o;
		stk[stk_cnt-1].d = tdir;
		stk[stk_cnt-1].pre_color = stk[stk_cnt-2].pre_color;
		stk[stk_cnt-1].depth = stk[stk_cnt-2].depth;
		
		stk[stk_cnt-2].pre_color = stk[stk_cnt-2].pre_color*Re;
		stk[stk_cnt-1].pre_color = stk[stk_cnt-1].pre_color*Tr;
		
	} while (stk_cnt);
		
	
	
	return color;
}




__global__ void path_tracing(Vec *d_c) {
	int x = blockIdx.x * blockDim.x + threadIdx.x;
	int y = blockIdx.y * blockDim.y + threadIdx.y;
	int idx = y*(cparam[0].w)+x;

	Vec dr;
	d_c[idx] = Vec(0,0,0);
	for (int i = 0; i<AAKERNEL_SIZE; i++){
		dr.x = (2. * ((x+0.5+AAFilter[i][0])/cparam[0].w) -1.  )*cparam[0].angle*cparam[0].aspectratio;
		float temp = (1. - 2.*((y+0.5+AAFilter[i][1])/cparam[0].h)) ;
		dr.y=temp*cparam[0].angle;
		dr.z = 1.;

		dr.norm();

		Vec dr_origin(0,0,0);

		d_c[idx] = d_c[idx] + (raytrace(dr_origin, dr)*AAFilter[i][2]);
	}
}

int main(int argc, char *argv[]){
	Parameter hparam;
	hparam.w = 1024;
	hparam.h = 1024;
	hparam.samps = argc==2 ? atoi(argv[1]) : 500; // # samples

	if (hparam.w%BLOCK_SIZE) {
		hparam.w = (hparam.w/BLOCK_SIZE+1)*BLOCK_SIZE;
		cout<<"Width has been changed to "<<hparam.w<<endl;
	}
	if (hparam.h%BLOCK_SIZE) {
		hparam.h = (hparam.h/BLOCK_SIZE+1)*BLOCK_SIZE;
		cout<<"Height has been changed to "<<hparam.h<<endl;
	}

	hparam.fov = 40.0;
    hparam.aspectratio = hparam.w/hparam.h;
	hparam.angle = tanf(0.5*hparam.fov*M_PI/180.0);
	
	
	Triangle htriangles[MAX_TRIANGLE];
	Light hlights[MAX_LIGHT];
	parse("prism_oct_no_light.asc", htriangles, hparam.n_triangles);
	
	hparam.n_lights = 1;
	
	hlights[0].pos = Vec(1.6,2.749,10.75);
	hlights[0].color = Vec(1,1,1);
	hlights[0].x_vec = Vec(1.2,0,0);
	hlights[0].y_vec = Vec(0,0,1.2);
	hlights[0].n_x = 9;
	hlights[0].n_y = 9;
	
	gpuErrchk(cudaSetDevice(0));	

	gpuErrchk(cudaMemcpyToSymbol(ctriangles,  htriangles,   sizeof(Triangle)*MAX_TRIANGLE));
	gpuErrchk(cudaMemcpyToSymbol(cparam , &hparam, sizeof(Parameter)));
	gpuErrchk(cudaMemcpyToSymbol(clights, &hlights, sizeof(Light)*MAX_LIGHT));
	
	Vec *c;
	Vec *d_c;

	c = (Vec*)malloc((hparam.w)*(hparam.h)*sizeof(Vec));

	gpuErrchk(cudaMalloc((void**) &d_c, (hparam.w)*(hparam.h)*sizeof(Vec)));

	dim3 dimBlock(BLOCK_SIZE,BLOCK_SIZE);
	dim3 dimGrid(hparam.w/BLOCK_SIZE,hparam.h/BLOCK_SIZE);

	
	curandState_t* states;
	gpuErrchk(cudaMalloc((void**) &states, (hparam.w)*(hparam.h) * sizeof(curandState_t)));
	init_rand<<<dimGrid,dimBlock>>>(states, time(0));
	gpuErrchk( cudaPeekAtLastError());
	

	path_tracing<<<dimGrid,dimBlock>>>(d_c);
	gpuErrchk( cudaPeekAtLastError());
	
	
	gpuErrchk(cudaMemcpy(c, d_c, (hparam.w)*(hparam.h)*sizeof(Vec), cudaMemcpyDeviceToHost));
	
	FILE *f = fopen("image_ray.ppm", "w");         // Write image to PPM file.
   	fprintf(f, "P3\n%d %d\n%d\n", hparam.w, hparam.h, 255);
   	for (int i=0; i<(hparam.w)*(hparam.h); i++) {
		fprintf(f,"%d %d %d ", toInt(c[i].x), toInt(c[i].y), toInt(c[i].z));
	}
	fclose(f);
	
	free(c);
	cudaFree(d_c);
	cudaFree(states);
	
	
	
	return 0;
}

	.file	"tmpxft_002f3531_00000000-6_ray_tracer.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4079:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4079:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z8WangHashj
	.type	_Z8WangHashj, @function
_Z8WangHashj:
.LFB4037:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE4037:
	.size	_Z8WangHashj, .-_Z8WangHashj
	.section	.rodata._Z9gpuAssert9cudaErrorPKcib.str1.1,"aMS",@progbits,1
.LC0:
	.string	"GPUassert: %s %s %d\n"
	.section	.text._Z9gpuAssert9cudaErrorPKcib,"axG",@progbits,_Z9gpuAssert9cudaErrorPKcib,comdat
	.weak	_Z9gpuAssert9cudaErrorPKcib
	.type	_Z9gpuAssert9cudaErrorPKcib, @function
_Z9gpuAssert9cudaErrorPKcib:
.LFB4038:
	.cfi_startproc
	endbr64
	testl	%edi, %edi
	je	.L10
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	%ecx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movl	%edi, %ebx
	subq	$24, %rsp
	.cfi_def_cfa_offset 48
	movl	%edx, 12(%rsp)
	movq	%rsi, (%rsp)
	call	cudaGetErrorString@PLT
	movl	12(%rsp), %r9d
	movq	(%rsp), %r8
	leaq	.LC0(%rip), %rdx
	movq	stderr(%rip), %rdi
	movq	%rax, %rcx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	testb	%bpl, %bpl
	je	.L4
	movl	%ebx, %edi
	call	exit@PLT
.L4:
	addq	$24, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
.L10:
	.cfi_restore 3
	.cfi_restore 6
	ret
	.cfi_endproc
.LFE4038:
	.size	_Z9gpuAssert9cudaErrorPKcib, .-_Z9gpuAssert9cudaErrorPKcib
	.text
	.globl	_Z9normalize3Vec
	.type	_Z9normalize3Vec, @function
_Z9normalize3Vec:
.LFB4052:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movl	$1, 28(%rsp)
	movl	28(%rsp), %edi
	movq	%xmm0, (%rsp)
	movss	%xmm1, 8(%rsp)
	call	exit@PLT
	.cfi_endproc
.LFE4052:
	.size	_Z9normalize3Vec, .-_Z9normalize3Vec
	.globl	_Z5clampf
	.type	_Z5clampf, @function
_Z5clampf:
.LFB4072:
	.cfi_startproc
	endbr64
	xorps	%xmm1, %xmm1
	comiss	%xmm0, %xmm1
	ja	.L19
	movss	.LC2(%rip), %xmm1
	minss	%xmm0, %xmm1
	movaps	%xmm1, %xmm0
	ret
.L19:
	xorps	%xmm0, %xmm0
	ret
	.cfi_endproc
.LFE4072:
	.size	_Z5clampf, .-_Z5clampf
	.globl	_Z5toIntf
	.type	_Z5toIntf, @function
_Z5toIntf:
.LFB4073:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	_Z5clampf
	movss	.LC3(%rip), %xmm1
	call	powf@PLT
	mulss	.LC4(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	addsd	.LC5(%rip), %xmm0
	popq	%rdx
	.cfi_def_cfa_offset 8
	cvttsd2sil	%xmm0, %eax
	ret
	.cfi_endproc
.LFE4073:
	.size	_Z5toIntf, .-_Z5toIntf
	.globl	_Z9intersectRK3VecS1_RfRi
	.type	_Z9intersectRK3VecS1_RfRi, @function
_Z9intersectRK3VecS1_RfRi:
.LFB4074:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE4074:
	.size	_Z9intersectRK3VecS1_RfRi, .-_Z9intersectRK3VecS1_RfRi
	.globl	_Z8raytraceR3VecS0_
	.type	_Z8raytraceR3VecS0_, @function
_Z8raytraceR3VecS0_:
.LFB4075:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE4075:
	.size	_Z8raytraceR3VecS0_, .-_Z8raytraceR3VecS0_
	.globl	_Z47__device_stub__Z9init_randP17curandStateXORWOWjP17curandStateXORWOWj
	.type	_Z47__device_stub__Z9init_randP17curandStateXORWOWjP17curandStateXORWOWj, @function
_Z47__device_stub__Z9init_randP17curandStateXORWOWjP17curandStateXORWOWj:
.LFB4101:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movl	%esi, 4(%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L27
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z9init_randP17curandStateXORWOWj(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L27:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L29
	call	__stack_chk_fail@PLT
.L29:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4101:
	.size	_Z47__device_stub__Z9init_randP17curandStateXORWOWjP17curandStateXORWOWj, .-_Z47__device_stub__Z9init_randP17curandStateXORWOWjP17curandStateXORWOWj
	.globl	_Z9init_randP17curandStateXORWOWj
	.type	_Z9init_randP17curandStateXORWOWj, @function
_Z9init_randP17curandStateXORWOWj:
.LFB4102:
	.cfi_startproc
	endbr64
	jmp	_Z47__device_stub__Z9init_randP17curandStateXORWOWjP17curandStateXORWOWj
	.cfi_endproc
.LFE4102:
	.size	_Z9init_randP17curandStateXORWOWj, .-_Z9init_randP17curandStateXORWOWj
	.globl	_Z35__device_stub__Z12path_tracingP3VecP3Vec
	.type	_Z35__device_stub__Z12path_tracingP3VecP3Vec, @function
_Z35__device_stub__Z12path_tracingP3VecP3Vec:
.LFB4103:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	leaq	44(%rsp), %rsi
	leaq	32(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L32
	pushq	24(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z12path_tracingP3Vec(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 128
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L32:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L34
	call	__stack_chk_fail@PLT
.L34:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4103:
	.size	_Z35__device_stub__Z12path_tracingP3VecP3Vec, .-_Z35__device_stub__Z12path_tracingP3VecP3Vec
	.globl	_Z12path_tracingP3Vec
	.type	_Z12path_tracingP3Vec, @function
_Z12path_tracingP3Vec:
.LFB4104:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z12path_tracingP3VecP3Vec
	.cfi_endproc
.LFE4104:
	.size	_Z12path_tracingP3Vec, .-_Z12path_tracingP3Vec
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC6:
	.string	"_Z12path_tracingP3Vec"
.LC7:
	.string	"_Z9init_randP17curandStateXORWOWj"
.LC8:
	.string	"precalc_xorwow_matrix"
.LC9:
	.string	"precalc_xorwow_offset_matrix"
.LC10:
	.string	"mrg32k3aM1"
.LC11:
	.string	"mrg32k3aM2"
.LC12:
	.string	"mrg32k3aM1SubSeq"
.LC13:
	.string	"mrg32k3aM2SubSeq"
.LC14:
	.string	"mrg32k3aM1Seq"
.LC15:
	.string	"mrg32k3aM2Seq"
.LC16:
	.string	"__cr_lgamma_table"
.LC17:
	.string	"ctriangles"
.LC18:
	.string	"cparam"
.LC19:
	.string	"clights"
.LC20:
	.string	"AAFilter"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4106:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC6(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z12path_tracingP3Vec(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC7(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z9init_randP17curandStateXORWOWj(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC8(%rip), %rdx
	movl	$102400, %r9d
	leaq	_ZL21precalc_xorwow_matrix(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC9(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$102400, %r9d
	leaq	_ZL28precalc_xorwow_offset_matrix(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC10(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL10mrg32k3aM1(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC11(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL10mrg32k3aM2(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC12(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$2016, %r9d
	leaq	_ZL16mrg32k3aM1SubSeq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC13(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$2016, %r9d
	leaq	_ZL16mrg32k3aM2SubSeq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC14(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL13mrg32k3aM1Seq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC15(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL13mrg32k3aM2Seq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC16(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$72, %r9d
	leaq	_ZL17__cr_lgamma_table(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC17(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$7600, %r9d
	leaq	_ZL10ctriangles(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC18(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$32, %r9d
	leaq	_ZL6cparam(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC19(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$560, %r9d
	leaq	_ZL7clights(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC20(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movl	$72, %r9d
	movq	%rdx, %rcx
	leaq	_ZL8AAFilter(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%r8
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4106:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.text._ZZN9__gnu_cxx6__stoaIffcJEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev,"axG",@progbits,_ZZN9__gnu_cxx6__stoaIffcJEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD5Ev,comdat
	.align 2
	.weak	_ZZN9__gnu_cxx6__stoaIffcJEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev
	.type	_ZZN9__gnu_cxx6__stoaIffcJEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev, @function
_ZZN9__gnu_cxx6__stoaIffcJEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev:
.LFB4230:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	call	__errno_location@PLT
	cmpl	$0, (%rax)
	jne	.L39
	movl	(%rbx), %edx
	movl	%edx, (%rax)
.L39:
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4230:
	.size	_ZZN9__gnu_cxx6__stoaIffcJEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev, .-_ZZN9__gnu_cxx6__stoaIffcJEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev
	.weak	_ZZN9__gnu_cxx6__stoaIffcJEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD1Ev
	.set	_ZZN9__gnu_cxx6__stoaIffcJEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD1Ev,_ZZN9__gnu_cxx6__stoaIffcJEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev
	.section	.text._ZSteqIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_,"axG",@progbits,_ZSteqIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_,comdat
	.weak	_ZSteqIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_
	.type	_ZSteqIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_, @function
_ZSteqIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_:
.LFB4451:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movq	%rdi, %rbx
	subq	$24, %rsp
	.cfi_def_cfa_offset 48
	movq	8(%rdi), %r12
	movq	%rsi, %rdi
	movq	%rsi, 8(%rsp)
	call	strlen@PLT
	movq	8(%rsp), %rsi
	movq	%rax, %rdx
	xorl	%eax, %eax
	cmpq	%rdx, %r12
	jne	.L42
	movb	$1, %al
	testq	%r12, %r12
	je	.L42
	movq	(%rbx), %rdi
	movq	%r12, %rdx
	call	memcmp@PLT
	testl	%eax, %eax
	sete	%al
.L42:
	addq	$24, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4451:
	.size	_ZSteqIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_, .-_ZSteqIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_
	.section	.rodata.str1.1
.LC21:
	.string	"Could not open file"
.LC22:
	.string	"triangle"
.LC23:
	.string	"T"
.LC24:
	.string	"D"
.LC25:
	.string	"S"
.LC26:
	.string	"stof"
.LC27:
	.string	"Number of triangles should be equal or less than "
	.text
	.globl	_Z5parseNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEP8TriangleRi
	.type	_Z5parseNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEP8TriangleRi, @function
_Z5parseNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEP8TriangleRi:
.LFB4070:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA4070
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rsi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rdx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdi, %rbx
	subq	$1160, %rsp
	.cfi_def_cfa_offset 1216
	movq	%fs:40, %rax
	movq	%rax, 1144(%rsp)
	xorl	%eax, %eax
	leaq	624(%rsp), %rbp
	movq	%rbp, %rdi
.LEHB0:
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEEC1Ev@PLT
.LEHE0:
	movq	(%rbx), %rsi
	movl	$8, %edx
	leaq	640(%rsp), %rdi
.LEHB1:
	call	_ZNSt13basic_filebufIcSt11char_traitsIcEE4openEPKcSt13_Ios_Openmode@PLT
	movq	624(%rsp), %rdx
	movq	-24(%rdx), %rdi
	addq	%rbp, %rdi
	testq	%rax, %rax
	jne	.L48
	movl	$4, %esi
	call	_ZNSt9basic_iosIcSt11char_traitsIcEE8setstateESt12_Ios_Iostate@PLT
	jmp	.L49
.L48:
	xorl	%esi, %esi
	call	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate@PLT
.L49:
	movl	912(%rsp), %ebx
	andl	$5, %ebx
	je	.L50
	leaq	.LC21(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
.LEHE1:
.L69:
	movl	$1, %edi
	call	exit@PLT
.L50:
	leaq	128(%rsp), %rax
	xorl	%ecx, %ecx
	xorl	%esi, %esi
	movb	$0, 128(%rsp)
	movq	%rax, 112(%rsp)
	movq	%rcx, 120(%rsp)
	movl	%esi, (%r12)
.L51:
	leaq	112(%rsp), %rax
	testb	$2, 912(%rsp)
	movq	%rax, 24(%rsp)
	jne	.L85
	movq	624(%rsp), %rax
	movq	-24(%rax), %rax
	movq	864(%rsp,%rax), %r14
	testq	%r14, %r14
	jne	.L52
	movq	1144(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L82
.LEHB2:
	call	_ZSt16__throw_bad_castv@PLT
.L52:
	cmpb	$0, 56(%r14)
	je	.L54
	movb	67(%r14), %al
	jmp	.L55
.L54:
	movq	%r14, %rdi
	call	_ZNKSt5ctypeIcE13_M_widen_initEv@PLT
	movq	(%r14), %rax
	movl	$10, %esi
	movq	%r14, %rdi
	call	*48(%rax)
.L55:
	movq	24(%rsp), %rsi
	movsbl	%al, %edx
	movq	%rbp, %rdi
	call	_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EES4_@PLT
	leaq	240(%rsp), %rax
	movq	24(%rsp), %rsi
	movl	$8, %edx
	movq	%rax, %rdi
	movq	%rax, 16(%rsp)
	call	_ZNSt7__cxx1119basic_istringstreamIcSt11char_traitsIcESaIcEEC1ERKNS_12basic_stringIcS2_S3_EESt13_Ios_Openmode@PLT
.LEHE2:
	leaq	160(%rsp), %rax
	xorl	%edx, %edx
	movb	$0, 160(%rsp)
	movq	%rax, 144(%rsp)
	leaq	144(%rsp), %rax
	movq	%rdx, 152(%rsp)
	movq	%rax, 8(%rsp)
.L57:
	movq	8(%rsp), %rsi
	movq	16(%rsp), %rdi
	movl	$32, %edx
.LEHB3:
	call	_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EES4_@PLT
.LEHE3:
	movq	(%rax), %rdx
	movq	-24(%rdx), %rdx
	testb	$5, 32(%rax,%rdx)
	jne	.L86
	movq	8(%rsp), %rdi
	leaq	.LC22(%rip), %rsi
	call	_ZSteqIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_
	testb	%al, %al
	jne	.L76
	movq	8(%rsp), %rdi
	leaq	.LC23(%rip), %rsi
	call	_ZSteqIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_
	testb	%al, %al
	jne	.L58
	movq	8(%rsp), %rdi
	leaq	.LC24(%rip), %rsi
	call	_ZSteqIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_
	testb	%al, %al
	jne	.L58
	movq	8(%rsp), %rdi
	leaq	.LC25(%rip), %rsi
	call	_ZSteqIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_
	testb	%al, %al
	je	.L59
.L58:
	cmpl	$99, (%r12)
	jle	.L81
	jmp	.L87
.L59:
	call	__errno_location@PLT
	movq	144(%rsp), %r14
	leaq	104(%rsp), %rsi
	movl	(%rax), %edx
	movq	%rax, %r15
	xorl	%eax, %eax
	movl	%eax, (%r15)
	movq	%r14, %rdi
	movl	%edx, 100(%rsp)
	call	strtof@PLT
	cmpq	104(%rsp), %r14
	leaq	100(%rsp), %r14
	jne	.L62
	movq	1144(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L82
	leaq	.LC26(%rip), %rdi
.LEHB4:
	call	_ZSt24__throw_invalid_argumentPKc@PLT
.L62:
	cmpl	$34, (%r15)
	jne	.L64
	movq	1144(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L82
	leaq	.LC26(%rip), %rdi
	call	_ZSt20__throw_out_of_rangePKc@PLT
.LEHE4:
.L64:
	movq	%r14, %rdi
	movss	%xmm0, 32(%rsp)
	call	_ZZN9__gnu_cxx6__stoaIffcJEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD1Ev
	movss	32(%rsp), %xmm0
	movslq	%ebx, %rax
	incl	%ebx
	movss	%xmm0, 180(%rsp,%rax,4)
	jmp	.L57
.L80:
	endbr64
	movq	%rax, %rbx
.L67:
	movq	%r14, %rdi
	call	_ZZN9__gnu_cxx6__stoaIffcJEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD1Ev
	jmp	.L68
.L87:
	leaq	.LC27(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
.LEHB5:
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	movl	$100, %esi
	call	_ZNSolsEi@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
.LEHE5:
	jmp	.L69
.L81:
	movss	184(%rsp), %xmm11
	movss	180(%rsp), %xmm12
	movss	208(%rsp), %xmm5
	movss	204(%rsp), %xmm6
	movss	212(%rsp), %xmm4
	movss	%xmm11, 72(%rsp)
	movss	196(%rsp), %xmm8
	movss	192(%rsp), %xmm9
	subss	%xmm11, %xmm5
	subss	%xmm12, %xmm6
	movss	188(%rsp), %xmm10
	subss	%xmm11, %xmm8
	movq	216(%rsp), %rsi
	movss	200(%rsp), %xmm7
	movss	%xmm12, 68(%rsp)
	subss	%xmm12, %xmm9
	subss	%xmm10, %xmm4
	movq	224(%rsp), %rcx
	movq	144(%rsp), %rax
	movaps	%xmm6, %xmm3
	movaps	%xmm5, %xmm0
	subss	%xmm10, %xmm7
	movq	%rsi, 88(%rsp)
	mulss	%xmm8, %xmm3
	movaps	%xmm5, %xmm2
	movb	(%rax), %r14b
	movq	%rcx, 80(%rsp)
	mulss	%xmm9, %xmm0
	movaps	%xmm4, %xmm1
	movq	232(%rsp), %r15
	movss	%xmm10, 76(%rsp)
	mulss	%xmm9, %xmm1
	movss	%xmm9, 64(%rsp)
	mulss	%xmm7, %xmm2
	movss	%xmm6, 60(%rsp)
	movss	%xmm5, 56(%rsp)
	movss	%xmm7, 52(%rsp)
	subss	%xmm0, %xmm3
	movaps	%xmm6, %xmm0
	movss	%xmm4, 48(%rsp)
	mulss	%xmm7, %xmm0
	movss	%xmm8, 44(%rsp)
	movss	%xmm3, 32(%rsp)
	subss	%xmm0, %xmm1
	movaps	%xmm4, %xmm0
	mulss	%xmm8, %xmm0
	movaps	%xmm1, %xmm13
	movss	%xmm1, 36(%rsp)
	mulss	%xmm1, %xmm13
	subss	%xmm0, %xmm2
	movaps	%xmm2, %xmm0
	movss	%xmm2, 40(%rsp)
	mulss	%xmm2, %xmm0
	addss	%xmm13, %xmm0
	movaps	%xmm3, %xmm13
	mulss	%xmm3, %xmm13
	addss	%xmm13, %xmm0
	call	sqrtf@PLT
	movss	40(%rsp), %xmm2
	movss	36(%rsp), %xmm1
	movaps	%xmm0, %xmm13
	movslq	(%r12), %rax
	movss	.LC2(%rip), %xmm0
	movss	32(%rsp), %xmm3
	movss	68(%rsp), %xmm12
	divss	%xmm13, %xmm0
	leal	1(%rax), %edi
	movss	72(%rsp), %xmm11
	movss	76(%rsp), %xmm10
	imulq	$76, %rax, %rax
	movss	52(%rsp), %xmm7
	movl	%edi, (%r12)
	movss	64(%rsp), %xmm9
	movss	44(%rsp), %xmm8
	movss	60(%rsp), %xmm6
	movss	56(%rsp), %xmm5
	movss	48(%rsp), %xmm4
	movq	88(%rsp), %rsi
	addq	%r13, %rax
	movq	80(%rsp), %rcx
	movq	%r15, 64(%rax)
	movq	%rsi, 48(%rax)
	movq	%rcx, 56(%rax)
	movss	%xmm12, (%rax)
	movss	%xmm11, 4(%rax)
	movss	%xmm10, 8(%rax)
	movss	%xmm9, 12(%rax)
	movss	%xmm8, 16(%rax)
	movss	%xmm7, 20(%rax)
	movss	%xmm6, 24(%rax)
	movss	%xmm5, 28(%rax)
	movss	%xmm4, 32(%rax)
	mulss	%xmm0, %xmm2
	mulss	%xmm0, %xmm1
	mulss	%xmm3, %xmm0
	movss	%xmm2, 36(%rax)
	movss	%xmm1, 40(%rax)
	movss	%xmm0, 44(%rax)
	movb	%r14b, 72(%rax)
	jmp	.L57
.L76:
	xorl	%ebx, %ebx
	jmp	.L57
.L86:
	movq	8(%rsp), %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	16(%rsp), %rdi
	call	_ZNSt7__cxx1119basic_istringstreamIcSt11char_traitsIcESaIcEED1Ev@PLT
	jmp	.L51
.L85:
	movq	%rbp, %rdi
.LEHB6:
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEE5closeEv@PLT
.LEHE6:
	movq	24(%rsp), %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	%rbp, %rdi
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev@PLT
	movq	1144(%rsp), %rax
	subq	%fs:40, %rax
	je	.L75
	jmp	.L82
.L78:
	endbr64
	movq	%rax, %rbx
.L68:
	movq	8(%rsp), %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	16(%rsp), %rdi
	call	_ZNSt7__cxx1119basic_istringstreamIcSt11char_traitsIcESaIcEED1Ev@PLT
	jmp	.L72
.L79:
	endbr64
	movq	%rax, %rbx
.L72:
	movq	24(%rsp), %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	jmp	.L73
.L77:
	endbr64
	movq	%rax, %rbx
.L73:
	movq	%rbp, %rdi
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev@PLT
	movq	1144(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L82
	movq	%rbx, %rdi
.LEHB7:
	call	_Unwind_Resume@PLT
.LEHE7:
.L82:
	call	__stack_chk_fail@PLT
.L75:
	addq	$1160, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4070:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table,"a",@progbits
.LLSDA4070:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE4070-.LLSDACSB4070
.LLSDACSB4070:
	.uleb128 .LEHB0-.LFB4070
	.uleb128 .LEHE0-.LEHB0
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB1-.LFB4070
	.uleb128 .LEHE1-.LEHB1
	.uleb128 .L77-.LFB4070
	.uleb128 0
	.uleb128 .LEHB2-.LFB4070
	.uleb128 .LEHE2-.LEHB2
	.uleb128 .L79-.LFB4070
	.uleb128 0
	.uleb128 .LEHB3-.LFB4070
	.uleb128 .LEHE3-.LEHB3
	.uleb128 .L78-.LFB4070
	.uleb128 0
	.uleb128 .LEHB4-.LFB4070
	.uleb128 .LEHE4-.LEHB4
	.uleb128 .L80-.LFB4070
	.uleb128 0
	.uleb128 .LEHB5-.LFB4070
	.uleb128 .LEHE5-.LEHB5
	.uleb128 .L78-.LFB4070
	.uleb128 0
	.uleb128 .LEHB6-.LFB4070
	.uleb128 .LEHE6-.LEHB6
	.uleb128 .L79-.LFB4070
	.uleb128 0
	.uleb128 .LEHB7-.LFB4070
	.uleb128 .LEHE7-.LEHB7
	.uleb128 0
	.uleb128 0
.LLSDACSE4070:
	.text
	.size	_Z5parseNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEP8TriangleRi, .-_Z5parseNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEP8TriangleRi
	.section	.rodata.str1.1
.LC29:
	.string	"prism_oct_no_light.asc"
.LC30:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/Lmolkenboer/SC_Tracer/master/cuda/ray_tracer.cu"
.LC31:
	.string	"w"
.LC32:
	.string	"image_ray.ppm"
.LC33:
	.string	"P3\n%d %d\n%d\n"
.LC34:
	.string	"%d %d %d "
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB4076:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA4076
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	subq	$4096, %rsp
	.cfi_def_cfa_offset 4144
	orq	$0, (%rsp)
	subq	$4096, %rsp
	.cfi_def_cfa_offset 8240
	orq	$0, (%rsp)
	subq	$80, %rsp
	.cfi_def_cfa_offset 8320
	movq	%fs:40, %rax
	movq	%rax, 8264(%rsp)
	movabsq	$4398046512128, %rax
	movq	%rax, 72(%rsp)
	movl	$500, %eax
	cmpl	$2, %edi
	jne	.L89
	movq	8(%rsi), %rdi
	call	atoi@PLT
.L89:
	movl	%eax, 80(%rsp)
	leaq	104(%rsp), %rbp
	leaq	56(%rsp), %rsi
	xorl	%edx, %edx
	movabsq	$4575657222517817344, %rax
	movq	%rbp, %rdi
	movl	$0x3eba5a4e, 100(%rsp)
	leaq	664(%rsp), %r12
	movq	%rax, 92(%rsp)
	leaq	120(%rsp), %rax
	movq	%rax, 104(%rsp)
	movq	$22, 56(%rsp)
.LEHB8:
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_createERmm@PLT
.LEHE8:
	leaq	22+.LC29(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, 104(%rsp)
	movq	56(%rsp), %rax
	leaq	-22(%rdx), %rsi
	movq	%rax, 120(%rsp)
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE13_S_copy_charsEPcPKcS7_@PLT
	movq	56(%rsp), %rax
	movq	%r12, %rsi
	movq	%rbp, %rdi
	movq	104(%rsp), %rdx
	movq	%rax, 112(%rsp)
	movb	$0, (%rdx,%rax)
	leaq	84(%rsp), %rdx
.LEHB9:
	call	_Z5parseNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEP8TriangleRi
.LEHE9:
	movq	%rbp, %rdi
	leaq	.LC30(%rip), %rbx
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	xorl	%edi, %edi
	movl	$1, 88(%rsp)
	movabsq	$4625178805287046349, %rax
	movq	%rax, 104(%rsp)
	movabsq	$4575657222501826560, %rax
	movq	%rax, 112(%rsp)
	subq	$28049408, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	movq	%rax, 136(%rsp)
	movl	$533515469, %eax
	movq	$1067030938, 128(%rsp)
	salq	$33, %rax
	movq	%rax, 144(%rsp)
	movabsq	$38654705673, %rax
	movq	%rax, 152(%rsp)
.LEHB10:
	call	cudaSetDevice@PLT
	movl	$1, %ecx
	movl	$396, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movl	$1, %r8d
	xorl	%ecx, %ecx
	movq	%r12, %rsi
	movl	$7600, %edx
	leaq	_ZL10ctriangles(%rip), %rdi
	call	cudaMemcpyToSymbol@PLT
	movl	$1, %ecx
	movl	$398, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movl	$1, %r8d
	xorl	%ecx, %ecx
	leaq	72(%rsp), %rsi
	movl	$32, %edx
	leaq	_ZL6cparam(%rip), %rdi
	call	cudaMemcpyToSymbol@PLT
	movl	$1, %ecx
	movl	$399, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movl	$1, %r8d
	xorl	%ecx, %ecx
	movq	%rbp, %rsi
	movl	$560, %edx
	leaq	_ZL7clights(%rip), %rdi
	call	cudaMemcpyToSymbol@PLT
	movl	$1, %ecx
	movl	$400, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movl	72(%rsp), %r12d
	imull	76(%rsp), %r12d
	movslq	%r12d, %r12
	imulq	$12, %r12, %r12
	movq	%r12, %rdi
	call	malloc@PLT
	leaq	24(%rsp), %rdi
	movq	%r12, %rsi
	movq	%rax, %rbp
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$407, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movl	72(%rsp), %edi
	movabsq	$68719476752, %rax
	movl	$16, %ecx
	movq	%rax, 44(%rsp)
	movl	76(%rsp), %esi
	movl	%edi, %eax
	movl	$1, 52(%rsp)
	cltd
	movl	$1, 64(%rsp)
	idivl	%ecx
	movl	%eax, 56(%rsp)
	movl	%esi, %eax
	imull	%edi, %esi
	leaq	32(%rsp), %rdi
	cltd
	idivl	%ecx
	movslq	%esi, %rsi
	imulq	$48, %rsi, %rsi
	movl	%eax, 60(%rsp)
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$414, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movl	52(%rsp), %ecx
	movl	64(%rsp), %esi
	xorl	%r9d, %r9d
	movq	44(%rsp), %rdx
	movq	56(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L90
	xorl	%edi, %edi
	call	time@PLT
	movq	32(%rsp), %rdi
	movl	%eax, %esi
	call	_Z47__device_stub__Z9init_randP17curandStateXORWOWjP17curandStateXORWOWj
.L90:
	call	cudaPeekAtLastError@PLT
	movl	$1, %ecx
	movl	$416, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movl	52(%rsp), %ecx
	movl	64(%rsp), %esi
	xorl	%r9d, %r9d
	movq	44(%rsp), %rdx
	movq	56(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L91
	movq	24(%rsp), %rdi
	call	_Z35__device_stub__Z12path_tracingP3VecP3Vec
.L91:
	call	cudaPeekAtLastError@PLT
	movq	%rbx, %rsi
	movq	%rbp, %r12
	xorl	%r13d, %r13d
	movl	%eax, %edi
	movl	$1, %ecx
	movl	$420, %edx
	call	_Z9gpuAssert9cudaErrorPKcib
	movl	72(%rsp), %edx
	imull	76(%rsp), %edx
	movq	%rbp, %rdi
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	leaq	.LC34(%rip), %r14
	movslq	%edx, %rdx
	imulq	$12, %rdx, %rdx
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movl	$423, %edx
	movq	%rbx, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	leaq	.LC31(%rip), %rsi
	leaq	.LC32(%rip), %rdi
	call	fopen@PLT
	movl	76(%rsp), %r8d
	movl	72(%rsp), %ecx
	movl	$255, %r9d
	movq	%rax, %rdi
	movq	%rax, %rbx
	movl	$2, %esi
	xorl	%eax, %eax
	leaq	.LC33(%rip), %rdx
	call	__fprintf_chk@PLT
.L92:
	movl	72(%rsp), %eax
	imull	76(%rsp), %eax
	cmpl	%r13d, %eax
	jle	.L102
	movss	8(%r12), %xmm0
	incl	%r13d
	addq	$12, %r12
	call	_Z5toIntf
	movss	-8(%r12), %xmm0
	movl	%eax, 12(%rsp)
	call	_Z5toIntf
	movss	-12(%r12), %xmm0
	movl	%eax, 8(%rsp)
	call	_Z5toIntf
	movl	12(%rsp), %r9d
	movq	%r14, %rdx
	movq	%rbx, %rdi
	movl	8(%rsp), %r8d
	movl	%eax, %ecx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	jmp	.L92
.L102:
	movq	%rbx, %rdi
	call	fclose@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	8264(%rsp), %rax
	subq	%fs:40, %rax
	je	.L96
	jmp	.L99
.L98:
	endbr64
	movq	%rax, %rbx
.L94:
	movq	%rbp, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	8264(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L99
	movq	%rbx, %rdi
	call	_Unwind_Resume@PLT
.LEHE10:
.L99:
	call	__stack_chk_fail@PLT
.L96:
	addq	$8272, %rsp
	.cfi_def_cfa_offset 48
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4076:
	.section	.gcc_except_table
.LLSDA4076:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE4076-.LLSDACSB4076
.LLSDACSB4076:
	.uleb128 .LEHB8-.LFB4076
	.uleb128 .LEHE8-.LEHB8
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB9-.LFB4076
	.uleb128 .LEHE9-.LEHB9
	.uleb128 .L98-.LFB4076
	.uleb128 0
	.uleb128 .LEHB10-.LFB4076
	.uleb128 .LEHE10-.LEHB10
	.uleb128 0
	.uleb128 0
.LLSDACSE4076:
	.section	.text.startup
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZL8AAFilter
	.comm	_ZL8AAFilter,72,32
	.local	_ZL7clights
	.comm	_ZL7clights,560,32
	.local	_ZL6cparam
	.comm	_ZL6cparam,32,32
	.local	_ZL10ctriangles
	.comm	_ZL10ctriangles,7600,32
	.local	_ZL17__cr_lgamma_table
	.comm	_ZL17__cr_lgamma_table,72,32
	.local	_ZL13mrg32k3aM2Seq
	.comm	_ZL13mrg32k3aM2Seq,2304,32
	.local	_ZL13mrg32k3aM1Seq
	.comm	_ZL13mrg32k3aM1Seq,2304,32
	.local	_ZL16mrg32k3aM2SubSeq
	.comm	_ZL16mrg32k3aM2SubSeq,2016,32
	.local	_ZL16mrg32k3aM1SubSeq
	.comm	_ZL16mrg32k3aM1SubSeq,2016,32
	.local	_ZL10mrg32k3aM2
	.comm	_ZL10mrg32k3aM2,2304,32
	.local	_ZL10mrg32k3aM1
	.comm	_ZL10mrg32k3aM1,2304,32
	.local	_ZL28precalc_xorwow_offset_matrix
	.comm	_ZL28precalc_xorwow_offset_matrix,102400,32
	.local	_ZL21precalc_xorwow_matrix
	.comm	_ZL21precalc_xorwow_matrix,102400,32
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC2:
	.long	1065353216
	.align 4
.LC3:
	.long	1055439407
	.align 4
.LC4:
	.long	1132396544
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC5:
	.long	0
	.long	1071644672
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <iostream>
#include <fstream>
#include <sstream>
#include <string>
#include <stdio.h>
#include <hiprand/hiprand.h>
#include <hiprand/hiprand_kernel.h>

#define BLOCK_SIZE 		16
#define MAX_TRIANGLE	100
#define MAX_LIGHT 		10
#define eps 			0.0001
#define MAX_RAY_DEPTH 	20
#define	AAKERNEL_SIZE	6


using namespace std;

__device__ unsigned int WangHash(unsigned int a) {
    a = (a ^ 61) ^ (a >> 16);
    a = a + (a << 3);
    a = a ^ (a >> 4);
    a = a * 0x27d4eb2d;
    a = a ^ (a >> 15);
    return a;
}

#define gpuErrchk(ans) { gpuAssert((ans), __FILE__, __LINE__); }
inline void gpuAssert(hipError_t code, const char *file, int line, bool abort=true)
{
   if (code != hipSuccess)
   {
      fprintf(stderr,"GPUassert: %s %s %d\n", hipGetErrorString(code), file, line);
      if (abort) exit(code);
   }
}

struct Vec {        
   float x, y, z;                 
   __host__ __device__ Vec(){} 
   __host__ __device__ Vec(float x_, float y_, float z_){ x=x_; y=y_; z=z_; } 
   __host__ __device__ Vec operator+(const Vec &b) const { return Vec(x+b.x,y+b.y,z+b.z); } 
   __host__ __device__ Vec operator-(const Vec &b) const { return Vec(x-b.x,y-b.y,z-b.z); } 
   __host__ __device__ Vec operator*(float b) const { return Vec(x*b,y*b,z*b); } 
   __host__ __device__ Vec mult(const Vec &b) const { return Vec(x*b.x,y*b.y,z*b.z); } 
   __host__ __device__ Vec& norm(){ return *this = *this * (1/sqrtf(x*x+y*y+z*z)); } 
   __host__ __device__ float dot(const Vec &b) const { return x*b.x+y*b.y+z*b.z; } // cross: 
   __host__ __device__ Vec operator%(const Vec&b) const{return Vec(y*b.z-z*b.y,z*b.x-x*b.z,x*b.y-y*b.x);} 
}; 

__device__ float normalize(Vec v)
{
	return sqrt(v.x*v.x + v.y*v.y + v.z*v.z);
}

struct Parameter {
	int w;
	int h;
	int samps;
	int n_triangles;
	int n_lights;
	float fov;
    float aspectratio;
	float angle;
};

struct Tracing_Stack{
	Vec o;
	Vec d;
	Vec pre_color;
	int depth;
	__device__ Tracing_Stack(){};	
	__device__ Tracing_Stack(const Vec &o,
					  const Vec &d,
					  const Vec &pre_color,
					  const int depth){
		this->o = o;
		this->d = d;
		this->pre_color = pre_color;
		this->depth = depth;
	}
};

struct Light
{
	Vec pos;
	Vec color;
	Vec x_vec;
	Vec y_vec;
	int n_x;
	int n_y;
	
	
};


class Triangle
{
public:	
	Vec v1;   // use one vertex and two edges to save some time and space
	Vec edge1;
	Vec edge2;
	Vec norm;
	Vec surfaceColor;
	Vec emissionColor;
	char token;		// T or D or L- transparent or diffusive surface or light source surface
    __host__ __device__ Triangle(){};
	__host__ Triangle(const Vec &a,
					  const Vec &b,
					  const Vec &c, 
					  const Vec &sColor, 
					  const Vec &eColor, 
					  char tld_token){
		v1 = a;
		Vec v2 = b;
		Vec v3 = c;
		edge1 = v2-v1;
		edge2 = v3-v1;
		token = tld_token;
		surfaceColor = sColor;
		emissionColor =  eColor;
		computeNormal();
	}

	__host__ void computeNormal()
	{
		norm = edge2%edge1;
		norm.norm();		
	}

	__device__ bool intersection(const Vec &origin, const Vec &dir, float & t) const
	{
		Vec pVec = dir%edge2;
		float det=edge1.dot(pVec);
		//if(det>-eps && det <eps)
		if(det==0)
		{
			return false;
		}

		float invDet=1./det;
		Vec tVec=origin-v1;
		float u=(tVec.dot(pVec))*(invDet);
		if(u<0. || u>1.)
		{
			return false;
		}

		Vec qVec = tVec%edge1;
		float v = dir.dot(qVec)*(invDet);

		if (v<0.||v+u>1.)
		{
			return false;
		}
		t = (edge2.dot(qVec))*(invDet);
		if (t>eps){
			return true;
		}
		return false;
	}	

};

__constant__ Triangle ctriangles[MAX_TRIANGLE];
__constant__ Parameter cparam[1];
__constant__ Light clights[MAX_LIGHT];
__constant__ float AAFilter[AAKERNEL_SIZE][3] 	=		/* X, Y, coef */
	{
		-0.52, 0.38, 0.128,
		0.41, 0.56, 0.119,
		0.27, 0.08, 0.294,
		-0.17, -0.29, 0.249,
		0.58, -0.55, 0.104,
		-0.31, -0.71, 0.106
	};	
__host__ void parse(string file_name, Triangle* triangles, int &n_triangles)
{
	ifstream fin;
	fin.open(file_name);
	int cnt_v  = 0;
	float v[15];

	if(fin.fail())
	{
		cout<<"Could not open file"<<endl;
		exit(1);
	}

	string buffer;
	n_triangles = 0;
	while(!fin.eof())
	{
		getline(fin,buffer);
	    istringstream buf(buffer);
	    for(string token; getline(buf, token,' '); )
        {
        	if (token=="triangle") {
        		cnt_v = 0;
			}
			else if(token=="T" || token=="D"|| token=="S")
			{
				if (n_triangles>=MAX_TRIANGLE){
					cout<<"Number of triangles should be equal or less than "<<MAX_TRIANGLE<<endl;
					exit(1);
				}
				Vec v1(v[0],v[1],v[2]);
				Vec v2(v[3],v[4],v[5]);
				Vec v3(v[6],v[7],v[8]);
				Vec sColor(v[9],v[10],v[11]);
				Vec eColor(v[12],v[13],v[14]);
				Triangle tri_tmp(v1,v2,v3,sColor,eColor,token[0]);
				triangles[n_triangles++] = tri_tmp;
				
			}
        	else v[cnt_v++] = stof(token);
		}
	}
	fin.close();
	return;
}

__host__ float clamp(float x){ return x<0 ? 0 : x>1 ? 1 : x; }
__host__ int toInt(float x){ return int(powf(clamp(x),1/2.2)*255+.5); }


__global__ void init_rand(hiprandState *state, unsigned int seed) {
	int idx_x = blockIdx.x * blockDim.x + threadIdx.x;
	int idx_y = blockIdx.y * blockDim.y + threadIdx.y;
	int idx = idx_y*(cparam[0].w)+idx_x;
	hiprand_init(seed + WangHash(idx),0 , 0, &state[idx]);
}


__device__ bool intersect(const Vec &origin, const Vec &direction, float &t, int &id){
	   int n = cparam[0].n_triangles;  
	   float d, inf=1e5;
	   t = inf;
	   for(int i=0; i<n; i++) if((ctriangles[i].intersection(origin,direction,d))&&d<t){t=d;id=i;} 
	   return (t<inf);
}

__device__ Vec raytrace(Vec &o, Vec &d) {
	
	Tracing_Stack stk[MAX_RAY_DEPTH+1];
	int stk_cnt = 1;
	stk[0] = Tracing_Stack(o,d,Vec(1,1,1),0);
	Vec color(0,0,0);
	
	do{
		float t;
		int id;
		if (!intersect(stk[stk_cnt-1].o, stk[stk_cnt-1].d, t, id)) {stk_cnt--; continue;} //no hit
		const Triangle &obj = ctriangles[id];        // the hit object
		Vec new_o = stk[stk_cnt-1].o + stk[stk_cnt-1].d*t;    // update the origin
		Vec n = obj.norm;
		Vec nl = n.dot(stk[stk_cnt-1].d)<0?n:n*-1;
		Vec f = obj.surfaceColor;
	   
		//float p = f.x>f.y && f.x>f.z ? f.x : f.y>f.z ? f.y : f.z; // max refl 
		if (stk[stk_cnt-1].depth>=MAX_RAY_DEPTH) {
			 {color = color + stk[stk_cnt-1].pre_color.mult(obj.emissionColor);stk_cnt--;continue;} //R.R.
		}
		
		if (obj.token == 'D'){                  // Ideal DIFFUSE reflection 
			
			Vec col(0,0,0);
	
			for (int i = 0; i < cparam[0].n_lights;i++){
				float factor = 1./clights[i].n_x/clights[i].n_y;
				for (int j = 0; j<clights[i].n_x; j++) {
					for (int k = 0; k<clights[i].n_y; k++) {
						Vec l_pos = clights[i].pos - clights[i].x_vec*0.5 + clights[i].x_vec * (1./clights[i].n_x*j) 
											  - clights[i].y_vec*0.5 + clights[i].y_vec * (1./clights[i].n_y*k);
						Vec d = (l_pos - new_o);
						float t_light = normalize(d);
						d = d.norm();
						int id = 0;
						if (!intersect(new_o, d, t, id) || ctriangles[id].token=='L' || t>t_light) {
							col = col + f.mult(clights[i].color)*(d.dot(obj.norm))*factor;	
						}
					}
				}
			}
			color = color + stk[stk_cnt-1].pre_color.mult(col);stk_cnt--;
			
			continue;
		}
		
		
		else if (obj.token == 'S'){            // Ideal SPECULAR reflection 
   			color = color+stk[stk_cnt-1].pre_color.mult(obj.emissionColor);
			stk[stk_cnt-1].o = new_o;
			stk[stk_cnt-1].d = stk[stk_cnt-1].d - n*2*n.dot(stk[stk_cnt-1].d);
			stk[stk_cnt-1].pre_color = stk[stk_cnt-1].pre_color.mult(f);
			stk[stk_cnt-1].depth++;
			continue;
		}
		
				
   		Vec reflRay(stk[stk_cnt-1].d-n*2*n.dot(stk[stk_cnt-1].d));     // Ideal dielectric REFRACTION
		
   		bool into = n.dot(nl)>0;                // Ray from outside going in? 
   		float nc=1, nt=2.4, nnt=into?nc/nt:nt/nc, ddn=stk[stk_cnt-1].d.dot(nl), cos2t; 
   		if ((cos2t=1-nnt*nnt*(1-ddn*ddn))<0)    {// Total internal reflection
     //cout<<"TIR"<<endl;
			color = color + stk[stk_cnt-1].pre_color.mult(obj.emissionColor);
			stk[stk_cnt-1].o = new_o;
			stk[stk_cnt-1].d = reflRay;
			stk[stk_cnt-1].pre_color = stk[stk_cnt-1].pre_color.mult(f);
			stk[stk_cnt-1].depth++;
			continue;
   		}
	 	Vec tdir = (stk[stk_cnt-1].d*nnt - n*((into?1:-1)*(ddn*nnt+sqrtf(cos2t)))).norm(); 
  		float a=nt-nc, b=nt+nc, R0=a*a/(b*b), c = 1-(into?-ddn:tdir.dot(n)); 
  		float Re=R0+(1-R0)*c*c*c*c*c,Tr=1-Re;
		
		color = color + stk[stk_cnt-1].pre_color.mult(obj.emissionColor);
		stk[stk_cnt-1].o = new_o;
		stk[stk_cnt-1].d = reflRay;
		stk[stk_cnt-1].pre_color = stk[stk_cnt-1].pre_color.mult(f);
		stk[stk_cnt-1].depth++;
		stk_cnt++;
		stk[stk_cnt-1].o = new_o;
		stk[stk_cnt-1].d = tdir;
		stk[stk_cnt-1].pre_color = stk[stk_cnt-2].pre_color;
		stk[stk_cnt-1].depth = stk[stk_cnt-2].depth;
		
		stk[stk_cnt-2].pre_color = stk[stk_cnt-2].pre_color*Re;
		stk[stk_cnt-1].pre_color = stk[stk_cnt-1].pre_color*Tr;
		
	} while (stk_cnt);
		
	
	
	return color;
}




__global__ void path_tracing(Vec *d_c) {
	int x = blockIdx.x * blockDim.x + threadIdx.x;
	int y = blockIdx.y * blockDim.y + threadIdx.y;
	int idx = y*(cparam[0].w)+x;

	Vec dr;
	d_c[idx] = Vec(0,0,0);
	for (int i = 0; i<AAKERNEL_SIZE; i++){
		dr.x = (2. * ((x+0.5+AAFilter[i][0])/cparam[0].w) -1.  )*cparam[0].angle*cparam[0].aspectratio;
		float temp = (1. - 2.*((y+0.5+AAFilter[i][1])/cparam[0].h)) ;
		dr.y=temp*cparam[0].angle;
		dr.z = 1.;

		dr.norm();

		Vec dr_origin(0,0,0);

		d_c[idx] = d_c[idx] + (raytrace(dr_origin, dr)*AAFilter[i][2]);
	}
}

int main(int argc, char *argv[]){
	Parameter hparam;
	hparam.w = 1024;
	hparam.h = 1024;
	hparam.samps = argc==2 ? atoi(argv[1]) : 500; // # samples

	if (hparam.w%BLOCK_SIZE) {
		hparam.w = (hparam.w/BLOCK_SIZE+1)*BLOCK_SIZE;
		cout<<"Width has been changed to "<<hparam.w<<endl;
	}
	if (hparam.h%BLOCK_SIZE) {
		hparam.h = (hparam.h/BLOCK_SIZE+1)*BLOCK_SIZE;
		cout<<"Height has been changed to "<<hparam.h<<endl;
	}

	hparam.fov = 40.0;
    hparam.aspectratio = hparam.w/hparam.h;
	hparam.angle = tanf(0.5*hparam.fov*M_PI/180.0);
	
	
	Triangle htriangles[MAX_TRIANGLE];
	Light hlights[MAX_LIGHT];
	parse("prism_oct_no_light.asc", htriangles, hparam.n_triangles);
	
	hparam.n_lights = 1;
	
	hlights[0].pos = Vec(1.6,2.749,10.75);
	hlights[0].color = Vec(1,1,1);
	hlights[0].x_vec = Vec(1.2,0,0);
	hlights[0].y_vec = Vec(0,0,1.2);
	hlights[0].n_x = 9;
	hlights[0].n_y = 9;
	
	gpuErrchk(hipSetDevice(0));	

	gpuErrchk(hipMemcpyToSymbol(HIP_SYMBOL(ctriangles),  htriangles,   sizeof(Triangle)*MAX_TRIANGLE));
	gpuErrchk(hipMemcpyToSymbol(HIP_SYMBOL(cparam) , &hparam, sizeof(Parameter)));
	gpuErrchk(hipMemcpyToSymbol(HIP_SYMBOL(clights), &hlights, sizeof(Light)*MAX_LIGHT));
	
	Vec *c;
	Vec *d_c;

	c = (Vec*)malloc((hparam.w)*(hparam.h)*sizeof(Vec));

	gpuErrchk(hipMalloc((void**) &d_c, (hparam.w)*(hparam.h)*sizeof(Vec)));

	dim3 dimBlock(BLOCK_SIZE,BLOCK_SIZE);
	dim3 dimGrid(hparam.w/BLOCK_SIZE,hparam.h/BLOCK_SIZE);

	
	hiprandState_t* states;
	gpuErrchk(hipMalloc((void**) &states, (hparam.w)*(hparam.h) * sizeof(hiprandState_t)));
	init_rand<<<dimGrid,dimBlock>>>(states, time(0));
	gpuErrchk( hipPeekAtLastError());
	

	path_tracing<<<dimGrid,dimBlock>>>(d_c);
	gpuErrchk( hipPeekAtLastError());
	
	
	gpuErrchk(hipMemcpy(c, d_c, (hparam.w)*(hparam.h)*sizeof(Vec), hipMemcpyDeviceToHost));
	
	FILE *f = fopen("image_ray.ppm", "w");         // Write image to PPM file.
   	fprintf(f, "P3\n%d %d\n%d\n", hparam.w, hparam.h, 255);
   	for (int i=0; i<(hparam.w)*(hparam.h); i++) {
		fprintf(f,"%d %d %d ", toInt(c[i].x), toInt(c[i].y), toInt(c[i].z));
	}
	fclose(f);
	
	free(c);
	hipFree(d_c);
	hipFree(states);
	
	
	
	return 0;
}

	.text
	.file	"ray_tracer.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z5parseNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEP8TriangleRi
.LCPI0_0:
	.long	0x3f800000                      # float 1
	.text
	.globl	_Z5parseNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEP8TriangleRi
	.type	_Z5parseNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEP8TriangleRi,@function
_Z5parseNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEP8TriangleRi: # @_Z5parseNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEP8TriangleRi
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$1144, %rsp                     # imm = 0x478
	.cfi_def_cfa_offset 1200
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, %r14
	movq	%rsi, %r15
	movq	%rdi, %rbx
	leaq	240(%rsp), %r12
	movq	%r12, %rdi
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEEC1Ev
.Ltmp0:
	movq	%r12, %rdi
	movq	%rbx, %rsi
	movl	$8, %edx
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEE4openERKNSt7__cxx1112basic_stringIcS1_SaIcEEESt13_Ios_Openmode
.Ltmp1:
# %bb.1:
	movq	240(%rsp), %rax
	movq	-24(%rax), %rcx
	testb	$5, 272(%rsp,%rcx)
	jne	.LBB0_40
# %bb.2:
	leaq	176(%rsp), %rcx
	movq	%rcx, -16(%rcx)
	movq	$0, -8(%rcx)
	movb	$0, (%rcx)
	movl	$0, (%r14)
	movq	-24(%rax), %rax
	testb	$2, 272(%rsp,%rax)
	jne	.LBB0_28
# %bb.3:                                # %.lr.ph
	leaq	(%rsp,%rax), %rdi
	addq	$240, %rdi
	leaq	64(%rsp), %rbx
	xorl	%r13d, %r13d
	leaq	160(%rsp), %r12
	leaq	760(%rsp), %rbp
.LBB0_4:                                # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_8 Depth 2
                                        #       Child Loop BB0_9 Depth 3
                                        #         Child Loop BB0_10 Depth 4
.Ltmp8:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp9:
# %bb.5:                                # %.noexc
                                        #   in Loop: Header=BB0_4 Depth=1
.Ltmp10:
	movsbl	%al, %edx
	leaq	240(%rsp), %rdi
	movq	%r12, %rsi
	callq	_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EES4_
.Ltmp11:
# %bb.6:                                # %_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EE.exit
                                        #   in Loop: Header=BB0_4 Depth=1
.Ltmp13:
	movq	%rbp, %rdi
	movq	%r12, %rsi
	movl	$8, %edx
	callq	_ZNSt7__cxx1119basic_istringstreamIcSt11char_traitsIcESaIcEEC1ERKNS_12basic_stringIcS2_S3_EESt13_Ios_Openmode
.Ltmp14:
# %bb.7:                                #   in Loop: Header=BB0_4 Depth=1
	movq	%rbx, 48(%rsp)
	movq	$0, 56(%rsp)
	movb	$0, 64(%rsp)
	movl	%r13d, %eax
.LBB0_8:                                # %_ZSteqIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_.exit.thread.outer
                                        #   Parent Loop BB0_4 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB0_9 Depth 3
                                        #         Child Loop BB0_10 Depth 4
	leaq	48(%rsp), %rbx
.LBB0_9:                                # %_ZSteqIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_.exit.thread.outer
                                        #   Parent Loop BB0_4 Depth=1
                                        #     Parent Loop BB0_8 Depth=2
                                        # =>    This Loop Header: Depth=3
                                        #         Child Loop BB0_10 Depth 4
	movl	%eax, %r13d
	movss	80(%rsp), %xmm4                 # xmm4 = mem[0],zero,zero,zero
	movss	84(%rsp), %xmm5                 # xmm5 = mem[0],zero,zero,zero
	movss	88(%rsp), %xmm6                 # xmm6 = mem[0],zero,zero,zero
	movss	92(%rsp), %xmm3                 # xmm3 = mem[0],zero,zero,zero
	movss	96(%rsp), %xmm2                 # xmm2 = mem[0],zero,zero,zero
	movss	100(%rsp), %xmm7                # xmm7 = mem[0],zero,zero,zero
	movss	104(%rsp), %xmm0                # xmm0 = mem[0],zero,zero,zero
	movss	108(%rsp), %xmm1                # xmm1 = mem[0],zero,zero,zero
	movss	112(%rsp), %xmm8                # xmm8 = mem[0],zero,zero,zero
	movss	116(%rsp), %xmm9                # xmm9 = mem[0],zero,zero,zero
	movss	%xmm9, 28(%rsp)                 # 4-byte Spill
	movss	120(%rsp), %xmm9                # xmm9 = mem[0],zero,zero,zero
	movss	%xmm9, 24(%rsp)                 # 4-byte Spill
	subss	%xmm4, %xmm3
	subss	%xmm5, %xmm2
	subss	%xmm6, %xmm7
	movss	%xmm4, (%rsp)                   # 4-byte Spill
	subss	%xmm4, %xmm0
	movss	%xmm5, 44(%rsp)                 # 4-byte Spill
	subss	%xmm5, %xmm1
	movaps	%xmm0, %xmm4
	unpcklps	%xmm1, %xmm4                    # xmm4 = xmm4[0],xmm1[0],xmm4[1],xmm1[1]
	movaps	%xmm4, 224(%rsp)                # 16-byte Spill
	movaps	%xmm7, %xmm5
	mulss	%xmm1, %xmm5
	movaps	%xmm3, %xmm4
	mulss	%xmm3, %xmm1
	unpcklps	%xmm2, %xmm3                    # xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
	movaps	%xmm3, 192(%rsp)                # 16-byte Spill
	movss	%xmm6, 40(%rsp)                 # 4-byte Spill
	subss	%xmm6, %xmm8
	movss	%xmm7, 36(%rsp)                 # 4-byte Spill
	movaps	%xmm7, %xmm3
	mulss	%xmm0, %xmm3
	mulss	%xmm2, %xmm0
	mulss	%xmm8, %xmm2
	subss	%xmm2, %xmm5
	movss	124(%rsp), %xmm2                # xmm2 = mem[0],zero,zero,zero
	movss	%xmm2, 20(%rsp)                 # 4-byte Spill
	movss	%xmm8, 32(%rsp)                 # 4-byte Spill
	mulss	%xmm8, %xmm4
	subss	%xmm3, %xmm4
	subss	%xmm1, %xmm0
	movaps	%xmm5, %xmm1
	mulss	%xmm5, %xmm1
	movaps	%xmm4, %xmm2
	mulss	%xmm4, %xmm2
	addss	%xmm1, %xmm2
	movaps	%xmm0, %xmm1
	mulss	%xmm0, %xmm1
	addss	%xmm2, %xmm1
	sqrtss	%xmm1, %xmm1
	movss	.LCPI0_0(%rip), %xmm2           # xmm2 = mem[0],zero,zero,zero
	divss	%xmm1, %xmm2
	movss	128(%rsp), %xmm1                # xmm1 = mem[0],zero,zero,zero
	movss	%xmm1, 12(%rsp)                 # 4-byte Spill
	mulss	%xmm2, %xmm5
	mulss	%xmm2, %xmm4
	unpcklps	%xmm4, %xmm5                    # xmm5 = xmm5[0],xmm4[0],xmm5[1],xmm4[1]
	movaps	%xmm5, 208(%rsp)                # 16-byte Spill
	movss	132(%rsp), %xmm1                # xmm1 = mem[0],zero,zero,zero
	movss	%xmm1, 8(%rsp)                  # 4-byte Spill
	mulss	%xmm0, %xmm2
	movss	%xmm2, 16(%rsp)                 # 4-byte Spill
	movss	136(%rsp), %xmm0                # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 4(%rsp)                  # 4-byte Spill
.LBB0_10:                               # %_ZSteqIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_.exit.thread
                                        #   Parent Loop BB0_4 Depth=1
                                        #     Parent Loop BB0_8 Depth=2
                                        #       Parent Loop BB0_9 Depth=3
                                        # =>      This Inner Loop Header: Depth=4
.Ltmp16:
	movq	%rbp, %rdi
	movq	%rbx, %rsi
	movl	$32, %edx
	callq	_ZSt7getlineIcSt11char_traitsIcESaIcEERSt13basic_istreamIT_T0_ES7_RNSt7__cxx1112basic_stringIS4_S5_T1_EES4_
.Ltmp17:
# %bb.11:                               #   in Loop: Header=BB0_10 Depth=4
	movq	(%rax), %rcx
	movq	-24(%rcx), %rcx
	testb	$5, 32(%rax,%rcx)
	jne	.LBB0_25
# %bb.12:                               #   in Loop: Header=BB0_10 Depth=4
	movq	48(%rsp), %r12
	movq	56(%rsp), %rax
	cmpq	$1, %rax
	jne	.LBB0_18
# %bb.13:                               # %_ZSteqIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_.exit22
                                        #   in Loop: Header=BB0_10 Depth=4
	cmpb	$84, (%r12)
	je	.LBB0_16
# %bb.14:                               # %_ZSteqIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_.exit24
                                        #   in Loop: Header=BB0_10 Depth=4
	cmpb	$68, (%r12)
	je	.LBB0_16
# %bb.15:                               # %_ZSteqIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_.exit24.thread63
                                        #   in Loop: Header=BB0_10 Depth=4
	cmpb	$83, (%r12)
	jne	.LBB0_20
.LBB0_16:                               # %_ZSteqIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_.exit22.thread
                                        #   in Loop: Header=BB0_10 Depth=4
	movslq	(%r14), %rax
	cmpq	$100, %rax
	jge	.LBB0_32
# %bb.17:                               #   in Loop: Header=BB0_10 Depth=4
	movb	(%r12), %cl
	leal	1(%rax), %edx
	movl	%edx, (%r14)
	imulq	$76, %rax, %rax
	movss	(%rsp), %xmm0                   # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, (%r15,%rax)
	movss	44(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 4(%r15,%rax)
	movss	40(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 8(%r15,%rax)
	movaps	192(%rsp), %xmm0                # 16-byte Reload
	movlps	%xmm0, 12(%r15,%rax)
	movss	36(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 20(%r15,%rax)
	movaps	224(%rsp), %xmm0                # 16-byte Reload
	movlps	%xmm0, 24(%r15,%rax)
	movss	32(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 32(%r15,%rax)
	movaps	208(%rsp), %xmm0                # 16-byte Reload
	movlps	%xmm0, 36(%r15,%rax)
	movss	16(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 44(%r15,%rax)
	movss	28(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 48(%r15,%rax)
	movss	24(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 52(%r15,%rax)
	movss	20(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 56(%r15,%rax)
	movss	12(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 60(%r15,%rax)
	movss	8(%rsp), %xmm0                  # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 64(%r15,%rax)
	movss	4(%rsp), %xmm0                  # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 68(%r15,%rax)
	movb	%cl, 72(%r15,%rax)
	jmp	.LBB0_10
.LBB0_18:                               #   in Loop: Header=BB0_9 Depth=3
	cmpq	$8, %rax
	jne	.LBB0_20
# %bb.19:                               # %_ZSteqIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_.exit
                                        #   in Loop: Header=BB0_9 Depth=3
	xorl	%eax, %eax
	movabsq	$7308330019093836404, %rcx      # imm = 0x656C676E61697274
	cmpq	%rcx, (%r12)
	je	.LBB0_9
.LBB0_20:                               # %_ZSteqIcSt11char_traitsIcESaIcEEbRKNSt7__cxx1112basic_stringIT_T0_T1_EEPKS5_.exit26.thread64
                                        #   in Loop: Header=BB0_8 Depth=2
	movq	%rbp, %rbx
	movl	%r13d, %ebp
	callq	__errno_location
	movq	%rax, %r13
	movl	(%rax), %eax
	movl	%eax, (%rsp)                    # 4-byte Spill
	movl	$0, (%r13)
	movq	%r12, %rdi
	leaq	152(%rsp), %rsi
	callq	strtof
	cmpq	%r12, 152(%rsp)
	je	.LBB0_36
# %bb.21:                               #   in Loop: Header=BB0_8 Depth=2
	movl	(%r13), %eax
	testl	%eax, %eax
	je	.LBB0_23
# %bb.22:                               #   in Loop: Header=BB0_8 Depth=2
	cmpl	$34, %eax
	jne	.LBB0_24
	jmp	.LBB0_38
.LBB0_23:                               #   in Loop: Header=BB0_8 Depth=2
	movl	(%rsp), %eax                    # 4-byte Reload
	movl	%eax, (%r13)
.LBB0_24:                               #   in Loop: Header=BB0_8 Depth=2
	movslq	%ebp, %rax
	incl	%ebp
	movss	%xmm0, 80(%rsp,%rax,4)
	movl	%ebp, %eax
	movq	%rbx, %rbp
	jmp	.LBB0_8
.LBB0_25:                               #   in Loop: Header=BB0_4 Depth=1
	movq	48(%rsp), %rdi
	leaq	64(%rsp), %rbx
	cmpq	%rbx, %rdi
	je	.LBB0_27
# %bb.26:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i
                                        #   in Loop: Header=BB0_4 Depth=1
	callq	_ZdlPv
.LBB0_27:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit
                                        #   in Loop: Header=BB0_4 Depth=1
	movl	$_ZTTNSt7__cxx1119basic_istringstreamIcSt11char_traitsIcESaIcEEE, %esi
	movq	%rbp, %rdi
	callq	_ZNSt7__cxx1119basic_istringstreamIcSt11char_traitsIcESaIcEED2Ev
	leaq	880(%rsp), %rdi
	callq	_ZNSt8ios_baseD2Ev
	movq	240(%rsp), %rax
	movq	-24(%rax), %rax
	leaq	(%rsp,%rax), %rdi
	addq	$240, %rdi
	testb	$2, 32(%rdi)
	leaq	160(%rsp), %r12
	je	.LBB0_4
.LBB0_28:                               # %._crit_edge
.Ltmp19:
	leaq	240(%rsp), %rdi
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEE5closeEv
.Ltmp20:
# %bb.29:
	movq	160(%rsp), %rdi
	leaq	176(%rsp), %rax
	cmpq	%rax, %rdi
	je	.LBB0_31
# %bb.30:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i35
	callq	_ZdlPv
.LBB0_31:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit37
	leaq	240(%rsp), %rdi
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev
	addq	$1144, %rsp                     # imm = 0x478
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB0_32:
	.cfi_def_cfa_offset 1200
.Ltmp22:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.5, %esi
	movl	$49, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp23:
# %bb.33:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit28
.Ltmp24:
	movl	$_ZSt4cout, %edi
	movl	$100, %esi
	callq	_ZNSolsEi
.Ltmp25:
# %bb.34:
.Ltmp26:
	movq	%rax, %rdi
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
.Ltmp27:
.LBB0_35:                               # %_ZNSolsEPFRSoS_E.exit
	movl	$1, %edi
	callq	exit
.LBB0_36:
.Ltmp31:
	movl	$.L.str.14, %edi
	callq	_ZSt24__throw_invalid_argumentPKc
.Ltmp32:
# %bb.37:
.LBB0_38:                               # %.critedge.i.i
.Ltmp29:
	movl	$.L.str.14, %edi
	callq	_ZSt20__throw_out_of_rangePKc
.Ltmp30:
# %bb.39:
.LBB0_40:
.Ltmp3:
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$19, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp4:
# %bb.41:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
.Ltmp5:
	movl	$_ZSt4cout, %edi
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
.Ltmp6:
	jmp	.LBB0_35
.LBB0_42:
.Ltmp7:
	jmp	.LBB0_45
.LBB0_43:                               # %.loopexit.split-lp68
.Ltmp21:
	jmp	.LBB0_48
.LBB0_44:
.Ltmp2:
.LBB0_45:
	movq	%rax, %r14
	jmp	.LBB0_59
.LBB0_46:
.Ltmp15:
	jmp	.LBB0_48
.LBB0_47:                               # %.loopexit67
.Ltmp12:
.LBB0_48:
	movq	%rax, %r14
	jmp	.LBB0_57
.LBB0_49:
.Ltmp33:
	movq	%rax, %r14
	cmpl	$0, (%r13)
	jne	.LBB0_54
# %bb.50:
	movl	(%rsp), %eax                    # 4-byte Reload
	movl	%eax, (%r13)
	jmp	.LBB0_54
.LBB0_51:                               # %.loopexit.split-lp
.Ltmp28:
	jmp	.LBB0_53
.LBB0_52:                               # %.loopexit
.Ltmp18:
.LBB0_53:                               # %.body
	movq	%rax, %r14
.LBB0_54:                               # %_ZZN9__gnu_cxx6__stoaIffcJEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev.exit.i.i
	leaq	64(%rsp), %rax
	movq	48(%rsp), %rdi
	cmpq	%rax, %rdi
	je	.LBB0_56
# %bb.55:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i32
	callq	_ZdlPv
.LBB0_56:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit34
	leaq	760(%rsp), %rdi
	movl	$_ZTTNSt7__cxx1119basic_istringstreamIcSt11char_traitsIcESaIcEEE, %esi
	callq	_ZNSt7__cxx1119basic_istringstreamIcSt11char_traitsIcESaIcEED2Ev
	leaq	880(%rsp), %rdi
	callq	_ZNSt8ios_baseD2Ev
.LBB0_57:
	movq	160(%rsp), %rdi
	leaq	176(%rsp), %rax
	cmpq	%rax, %rdi
	je	.LBB0_59
# %bb.58:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i38
	callq	_ZdlPv
.LBB0_59:
	leaq	240(%rsp), %rdi
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev
	movq	%r14, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end0:
	.size	_Z5parseNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEP8TriangleRi, .Lfunc_end0-_Z5parseNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEP8TriangleRi
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table0:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Lfunc_begin0-.Lfunc_begin0    # >> Call Site 1 <<
	.uleb128 .Ltmp0-.Lfunc_begin0           #   Call between .Lfunc_begin0 and .Ltmp0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 2 <<
	.uleb128 .Ltmp1-.Ltmp0                  #   Call between .Ltmp0 and .Ltmp1
	.uleb128 .Ltmp2-.Lfunc_begin0           #     jumps to .Ltmp2
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp8-.Lfunc_begin0           # >> Call Site 3 <<
	.uleb128 .Ltmp11-.Ltmp8                 #   Call between .Ltmp8 and .Ltmp11
	.uleb128 .Ltmp12-.Lfunc_begin0          #     jumps to .Ltmp12
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp13-.Lfunc_begin0          # >> Call Site 4 <<
	.uleb128 .Ltmp14-.Ltmp13                #   Call between .Ltmp13 and .Ltmp14
	.uleb128 .Ltmp15-.Lfunc_begin0          #     jumps to .Ltmp15
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp16-.Lfunc_begin0          # >> Call Site 5 <<
	.uleb128 .Ltmp17-.Ltmp16                #   Call between .Ltmp16 and .Ltmp17
	.uleb128 .Ltmp18-.Lfunc_begin0          #     jumps to .Ltmp18
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp19-.Lfunc_begin0          # >> Call Site 6 <<
	.uleb128 .Ltmp20-.Ltmp19                #   Call between .Ltmp19 and .Ltmp20
	.uleb128 .Ltmp21-.Lfunc_begin0          #     jumps to .Ltmp21
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp22-.Lfunc_begin0          # >> Call Site 7 <<
	.uleb128 .Ltmp27-.Ltmp22                #   Call between .Ltmp22 and .Ltmp27
	.uleb128 .Ltmp28-.Lfunc_begin0          #     jumps to .Ltmp28
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp31-.Lfunc_begin0          # >> Call Site 8 <<
	.uleb128 .Ltmp30-.Ltmp31                #   Call between .Ltmp31 and .Ltmp30
	.uleb128 .Ltmp33-.Lfunc_begin0          #     jumps to .Ltmp33
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp3-.Lfunc_begin0           # >> Call Site 9 <<
	.uleb128 .Ltmp6-.Ltmp3                  #   Call between .Ltmp3 and .Ltmp6
	.uleb128 .Ltmp7-.Lfunc_begin0           #     jumps to .Ltmp7
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp6-.Lfunc_begin0           # >> Call Site 10 <<
	.uleb128 .Lfunc_end0-.Ltmp6             #   Call between .Ltmp6 and .Lfunc_end0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.p2align	2, 0x0
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z5clampf
.LCPI1_0:
	.long	0x3f800000                      # float 1
	.text
	.globl	_Z5clampf
	.type	_Z5clampf,@function
_Z5clampf:                              # @_Z5clampf
	.cfi_startproc
# %bb.0:
	movss	.LCPI1_0(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	minss	%xmm0, %xmm1
	xorps	%xmm2, %xmm2
	cmpltss	%xmm2, %xmm0
	andnps	%xmm1, %xmm0
	retq
.Lfunc_end1:
	.size	_Z5clampf, .Lfunc_end1-_Z5clampf
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z5toIntf
.LCPI2_0:
	.long	0x3f800000                      # float 1
.LCPI2_1:
	.long	0x3ee8ba2f                      # float 0.454545468
.LCPI2_2:
	.long	0x437f0000                      # float 255
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI2_3:
	.quad	0x3fe0000000000000              # double 0.5
	.text
	.globl	_Z5toIntf
	.type	_Z5toIntf,@function
_Z5toIntf:                              # @_Z5toIntf
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movss	.LCPI2_0(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	minss	%xmm0, %xmm1
	xorps	%xmm2, %xmm2
	cmpltss	%xmm2, %xmm0
	andnps	%xmm1, %xmm0
	movss	.LCPI2_1(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	callq	powf
	mulss	.LCPI2_2(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	addsd	.LCPI2_3(%rip), %xmm0
	cvttsd2si	%xmm0, %eax
	popq	%rcx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z5toIntf, .Lfunc_end2-_Z5toIntf
	.cfi_endproc
                                        # -- End function
	.globl	_Z24__device_stub__init_randP12hiprandStatej # -- Begin function _Z24__device_stub__init_randP12hiprandStatej
	.type	_Z24__device_stub__init_randP12hiprandStatej,@function
_Z24__device_stub__init_randP12hiprandStatej: # @_Z24__device_stub__init_randP12hiprandStatej
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9init_randP12hiprandStatej, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z24__device_stub__init_randP12hiprandStatej, .Lfunc_end3-_Z24__device_stub__init_randP12hiprandStatej
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__path_tracingP3Vec # -- Begin function _Z27__device_stub__path_tracingP3Vec
	.type	_Z27__device_stub__path_tracingP3Vec,@function
_Z27__device_stub__path_tracingP3Vec:   # @_Z27__device_stub__path_tracingP3Vec
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsp, %rbx
	movq	%rax, (%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12path_tracingP3Vec, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$80, %rsp
	.cfi_adjust_cfa_offset -80
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z27__device_stub__path_tracingP3Vec, .Lfunc_end4-_Z27__device_stub__path_tracingP3Vec
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function main
.LCPI5_0:
	.long	1070386381                      # 0x3fcccccd
	.long	1076883358                      # 0x402fef9e
	.long	1093402624                      # 0x412c0000
	.long	1065353216                      # 0x3f800000
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0
.LCPI5_1:
	.long	0x3f800000                      # float 1
.LCPI5_2:
	.long	0x3ee8ba2f                      # float 0.454545468
.LCPI5_3:
	.long	0x437f0000                      # float 255
.LCPI5_5:
	.long	0x00000000                      # float 0
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI5_4:
	.quad	0x3fe0000000000000              # double 0.5
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
.Lfunc_begin1:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception1
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$8248, %rsp                     # imm = 0x2038
	.cfi_def_cfa_offset 8304
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movabsq	$4398046512128, %rax            # imm = 0x40000000400
	movq	%rax, 8(%rsp)
	movl	$500, %eax                      # imm = 0x1F4
	cmpl	$2, %edi
	jne	.LBB5_2
# %bb.1:
	movq	8(%rsi), %rdi
	callq	atoi
.LBB5_2:                                # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_.exit
	leaq	20(%rsp), %rbx
	movl	%eax, -4(%rbx)
	movabsq	$4575657222517817344, %rax      # imm = 0x3F80000042200000
	movq	%rax, 8(%rbx)
	movl	$1052400206, 16(%rbx)           # imm = 0x3EBA5A4E
	leaq	64(%rsp), %r15
	movq	%r15, -16(%r15)
	leaq	48(%rsp), %r14
	movl	$.L.str.8, %esi
	movl	$.L.str.8+22, %edx
	movq	%r14, %rdi
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
.Ltmp34:
	leaq	640(%rsp), %rsi
	movq	%r14, %rdi
	movq	%rbx, %rdx
	callq	_Z5parseNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEP8TriangleRi
.Ltmp35:
# %bb.3:
	movq	48(%rsp), %rdi
	cmpq	%r15, %rdi
	je	.LBB5_5
# %bb.4:                                # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i
	callq	_ZdlPv
.LBB5_5:                                # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit
	movl	$1, 24(%rsp)
	movapd	.LCPI5_0(%rip), %xmm0           # xmm0 = [1070386381,1076883358,1093402624,1065353216]
	movapd	%xmm0, 80(%rsp)
	movabsq	$4575657222473777152, %rax      # imm = 0x3F8000003F800000
	movq	%rax, 96(%rsp)
	movl	$1067030938, 104(%rsp)          # imm = 0x3F99999A
	xorpd	%xmm0, %xmm0
	movupd	%xmm0, 108(%rsp)
	movabsq	$39721736602, %rax              # imm = 0x93F99999A
	movq	%rax, 124(%rsp)
	movl	$9, 132(%rsp)
	xorl	%edi, %edi
	callq	hipSetDevice
	testl	%eax, %eax
	jne	.LBB5_6
# %bb.8:                                # %_Z9gpuAssert10hipError_tPKcib.exit
	leaq	640(%rsp), %rsi
	movl	$ctriangles, %edi
	movl	$7600, %edx                     # imm = 0x1DB0
	xorl	%ecx, %ecx
	movl	$1, %r8d
	callq	hipMemcpyToSymbol
	testl	%eax, %eax
	jne	.LBB5_9
# %bb.10:                               # %_Z9gpuAssert10hipError_tPKcib.exit42
	leaq	8(%rsp), %rsi
	movl	$cparam, %edi
	movl	$32, %edx
	xorl	%ecx, %ecx
	movl	$1, %r8d
	callq	hipMemcpyToSymbol
	testl	%eax, %eax
	jne	.LBB5_11
# %bb.12:                               # %_Z9gpuAssert10hipError_tPKcib.exit44
	leaq	80(%rsp), %rsi
	movl	$clights, %edi
	movl	$560, %edx                      # imm = 0x230
	xorl	%ecx, %ecx
	movl	$1, %r8d
	callq	hipMemcpyToSymbol
	testl	%eax, %eax
	jne	.LBB5_13
# %bb.14:                               # %_Z9gpuAssert10hipError_tPKcib.exit46
	movslq	8(%rsp), %rax
	movslq	12(%rsp), %rcx
	imulq	%rax, %rcx
	shlq	$2, %rcx
	leaq	(%rcx,%rcx,2), %r14
	movq	%r14, %rdi
	callq	malloc
	movq	%rax, %rbx
	movq	%rsp, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB5_15
# %bb.17:                               # %_Z9gpuAssert10hipError_tPKcib.exit48
	movl	8(%rsp), %eax
	movl	12(%rsp), %ecx
	leal	15(%rax), %r15d
	testl	%eax, %eax
	cmovnsl	%eax, %r15d
	leal	15(%rcx), %r14d
	testl	%ecx, %ecx
	cmovnsl	%ecx, %r14d
	imull	%eax, %ecx
	movslq	%ecx, %rax
	shlq	$4, %rax
	leaq	(%rax,%rax,2), %rsi
	leaq	40(%rsp), %rdi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB5_18
# %bb.19:                               # %_Z9gpuAssert10hipError_tPKcib.exit50
	sarl	$4, %r15d
	sarl	$4, %r14d
	shlq	$32, %r14
	orq	%r15, %r14
	movabsq	$68719476752, %r15              # imm = 0x1000000010
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_21
# %bb.20:
	movq	40(%rsp), %r12
	xorl	%edi, %edi
	callq	time
	movq	%r12, %rdi
	movl	%eax, %esi
	callq	_Z24__device_stub__init_randP12hiprandStatej
.LBB5_21:
	callq	hipPeekAtLastError
	testl	%eax, %eax
	jne	.LBB5_22
# %bb.26:                               # %_Z9gpuAssert10hipError_tPKcib.exit55
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_28
# %bb.27:
	movq	(%rsp), %rdi
	callq	_Z27__device_stub__path_tracingP3Vec
.LBB5_28:
	callq	hipPeekAtLastError
	testl	%eax, %eax
	jne	.LBB5_29
# %bb.30:                               # %_Z9gpuAssert10hipError_tPKcib.exit57
	movq	(%rsp), %rsi
	movslq	8(%rsp), %rax
	movslq	12(%rsp), %rcx
	imulq	%rax, %rcx
	shlq	$2, %rcx
	leaq	(%rcx,%rcx,2), %rdx
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB5_31
# %bb.32:                               # %_Z9gpuAssert10hipError_tPKcib.exit59
	movl	$.L.str.10, %edi
	movl	$.L.str.11, %esi
	callq	fopen
	movq	%rax, %r14
	movl	8(%rsp), %edx
	movl	12(%rsp), %ecx
	movl	$.L.str.12, %esi
	movq	%rax, %rdi
	movl	$255, %r8d
	xorl	%eax, %eax
	callq	fprintf
	movl	12(%rsp), %eax
	imull	8(%rsp), %eax
	testl	%eax, %eax
	jle	.LBB5_35
# %bb.33:                               # %.lr.ph.preheader
	movq	%rbx, %r12
	addq	$8, %r12
	xorl	%r13d, %r13d
.LBB5_34:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movss	-8(%r12), %xmm0                 # xmm0 = mem[0],zero,zero,zero
	movss	.LCPI5_1(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	minss	%xmm0, %xmm1
	xorps	%xmm2, %xmm2
	cmpltss	%xmm2, %xmm0
	andnps	%xmm1, %xmm0
	movss	.LCPI5_2(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	callq	powf
	movss	.LCPI5_3(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	mulss	%xmm1, %xmm0
	cvtss2sd	%xmm0, %xmm0
	movsd	.LCPI5_4(%rip), %xmm1           # xmm1 = mem[0],zero
	addsd	%xmm1, %xmm0
	cvttsd2si	%xmm0, %ebp
	movss	-4(%r12), %xmm0                 # xmm0 = mem[0],zero,zero,zero
	movss	.LCPI5_1(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	minss	%xmm0, %xmm1
	cmpltss	.LCPI5_5(%rip), %xmm0
	andnps	%xmm1, %xmm0
	movss	.LCPI5_2(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	callq	powf
	mulss	.LCPI5_3(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	addsd	.LCPI5_4(%rip), %xmm0
	cvttsd2si	%xmm0, %r15d
	movss	(%r12), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	movss	.LCPI5_1(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	minss	%xmm0, %xmm1
	cmpltss	.LCPI5_5(%rip), %xmm0
	andnps	%xmm1, %xmm0
	movss	.LCPI5_2(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	callq	powf
	mulss	.LCPI5_3(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	addsd	.LCPI5_4(%rip), %xmm0
	cvttsd2si	%xmm0, %r8d
	movl	$.L.str.13, %esi
	movq	%r14, %rdi
	movl	%ebp, %edx
	movl	%r15d, %ecx
	xorl	%eax, %eax
	callq	fprintf
	incq	%r13
	movslq	8(%rsp), %rax
	movslq	12(%rsp), %rcx
	imulq	%rax, %rcx
	addq	$12, %r12
	cmpq	%rcx, %r13
	jl	.LBB5_34
.LBB5_35:                               # %._crit_edge
	movq	%r14, %rdi
	callq	fclose
	movq	%rbx, %rdi
	callq	free
	movq	(%rsp), %rdi
	callq	hipFree
	movq	40(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$8248, %rsp                     # imm = 0x2038
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB5_6:
	.cfi_def_cfa_offset 8304
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.15, %esi
	movl	$.L.str.9, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$398, %r8d                      # imm = 0x18E
	jmp	.LBB5_7
.LBB5_9:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.15, %esi
	movl	$.L.str.9, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$400, %r8d                      # imm = 0x190
	jmp	.LBB5_7
.LBB5_11:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.15, %esi
	movl	$.L.str.9, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$401, %r8d                      # imm = 0x191
	jmp	.LBB5_7
.LBB5_13:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.15, %esi
	movl	$.L.str.9, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$402, %r8d                      # imm = 0x192
.LBB5_7:
	xorl	%eax, %eax
	callq	fprintf
	movl	%ebx, %edi
	callq	exit
.LBB5_15:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.15, %esi
	movl	$.L.str.9, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$409, %r8d                      # imm = 0x199
	jmp	.LBB5_16
.LBB5_18:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.15, %esi
	movl	$.L.str.9, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$416, %r8d                      # imm = 0x1A0
	jmp	.LBB5_16
.LBB5_22:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.15, %esi
	movl	$.L.str.9, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$418, %r8d                      # imm = 0x1A2
	jmp	.LBB5_16
.LBB5_29:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.15, %esi
	movl	$.L.str.9, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$422, %r8d                      # imm = 0x1A6
	jmp	.LBB5_16
.LBB5_31:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.15, %esi
	movl	$.L.str.9, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$425, %r8d                      # imm = 0x1A9
.LBB5_16:
	xorl	%eax, %eax
	callq	fprintf
	movl	%ebp, %edi
	callq	exit
.LBB5_23:
.Ltmp36:
	movq	%rax, %rbx
	movq	48(%rsp), %rdi
	cmpq	%r15, %rdi
	je	.LBB5_25
# %bb.24:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i51
	callq	_ZdlPv
.LBB5_25:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit53
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end5:
	.size	main, .Lfunc_end5-main
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table5:
.Lexception1:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end1-.Lcst_begin1
.Lcst_begin1:
	.uleb128 .Lfunc_begin1-.Lfunc_begin1    # >> Call Site 1 <<
	.uleb128 .Ltmp34-.Lfunc_begin1          #   Call between .Lfunc_begin1 and .Ltmp34
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp34-.Lfunc_begin1          # >> Call Site 2 <<
	.uleb128 .Ltmp35-.Ltmp34                #   Call between .Ltmp34 and .Ltmp35
	.uleb128 .Ltmp36-.Lfunc_begin1          #     jumps to .Ltmp36
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp35-.Lfunc_begin1          # >> Call Site 3 <<
	.uleb128 .Lfunc_end5-.Ltmp35            #   Call between .Ltmp35 and .Lfunc_end5
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end1:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag,"axG",@progbits,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag,comdat
	.weak	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag # -- Begin function _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
	.p2align	1, 0x90
	.type	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag,@function
_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag: # @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdx, %r14
	movq	%rsi, %r15
	movq	%rdi, %rbx
	subq	%rsi, %r14
	movq	%r14, (%rsp)
	cmpq	$15, %r14
	jbe	.LBB6_1
# %bb.2:
	movq	%rsp, %r12
	movq	%rbx, %rdi
	movq	%r12, %rsi
	xorl	%edx, %edx
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_createERmm
	movq	%rax, (%rbx)
	movq	(%r12), %rcx
	movq	%rcx, 16(%rbx)
	jmp	.LBB6_3
.LBB6_1:                                # %._crit_edge
	movq	(%rbx), %rax
.LBB6_3:
	testq	%r14, %r14
	je	.LBB6_7
# %bb.4:
	cmpq	$1, %r14
	jne	.LBB6_6
# %bb.5:
	movb	(%r15), %cl
	movb	%cl, (%rax)
	jmp	.LBB6_7
.LBB6_6:
	movq	%rax, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	callq	memcpy@PLT
.LBB6_7:                                # %_ZZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tagEN6_GuardD2Ev.exit
	movq	(%rsp), %rax
	movq	%rax, 8(%rbx)
	movq	(%rbx), %rcx
	movb	$0, (%rcx,%rax)
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag, .Lfunc_end6-_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB7_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB7_2:
	subq	$32, %rsp
	.cfi_adjust_cfa_offset 32
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9init_randP12hiprandStatej, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12path_tracingP3Vec, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movl	$ctriangles, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movl	$7600, %r9d                     # imm = 0x1DB0
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$1
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$cparam, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movl	$32, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$1
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$clights, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movl	$560, %r9d                      # imm = 0x230
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$1
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$AAFilter, %esi
	movl	$.L__unnamed_6, %edx
	movl	$.L__unnamed_6, %ecx
	movl	$72, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_adjust_cfa_offset 8
	pushq	$1
	.cfi_adjust_cfa_offset 8
	callq	__hipRegisterVar
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
	movl	$__hip_module_dtor, %edi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end7:
	.size	__hip_module_ctor, .Lfunc_end7-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB8_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB8_2:
	retq
.Lfunc_end8:
	.size	__hip_module_dtor, .Lfunc_end8-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	ctriangles,@object              # @ctriangles
	.local	ctriangles
	.comm	ctriangles,7600,16
	.type	cparam,@object                  # @cparam
	.local	cparam
	.comm	cparam,32,16
	.type	clights,@object                 # @clights
	.local	clights
	.comm	clights,560,16
	.type	AAFilter,@object                # @AAFilter
	.local	AAFilter
	.comm	AAFilter,72,16
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Could not open file"
	.size	.L.str, 20

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"triangle"
	.size	.L.str.1, 9

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Number of triangles should be equal or less than "
	.size	.L.str.5, 50

	.type	_Z9init_randP12hiprandStatej,@object # @_Z9init_randP12hiprandStatej
	.section	.rodata,"a",@progbits
	.globl	_Z9init_randP12hiprandStatej
	.p2align	3, 0x0
_Z9init_randP12hiprandStatej:
	.quad	_Z24__device_stub__init_randP12hiprandStatej
	.size	_Z9init_randP12hiprandStatej, 8

	.type	_Z12path_tracingP3Vec,@object   # @_Z12path_tracingP3Vec
	.globl	_Z12path_tracingP3Vec
	.p2align	3, 0x0
_Z12path_tracingP3Vec:
	.quad	_Z27__device_stub__path_tracingP3Vec
	.size	_Z12path_tracingP3Vec, 8

	.type	.L.str.8,@object                # @.str.8
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.8:
	.asciz	"prism_oct_no_light.asc"
	.size	.L.str.8, 23

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/Lmolkenboer/SC_Tracer/master/cuda/ray_tracer.hip"
	.size	.L.str.9, 111

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"image_ray.ppm"
	.size	.L.str.10, 14

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"w"
	.size	.L.str.11, 2

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"P3\n%d %d\n%d\n"
	.size	.L.str.12, 13

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	"%d %d %d "
	.size	.L.str.13, 10

	.type	.L.str.14,@object               # @.str.14
.L.str.14:
	.asciz	"stof"
	.size	.L.str.14, 5

	.type	.L.str.15,@object               # @.str.15
.L.str.15:
	.asciz	"GPUassert: %s %s %d\n"
	.size	.L.str.15, 21

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z9init_randP12hiprandStatej"
	.size	.L__unnamed_1, 29

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z12path_tracingP3Vec"
	.size	.L__unnamed_2, 22

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"ctriangles"
	.size	.L__unnamed_3, 11

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"cparam"
	.size	.L__unnamed_4, 7

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"clights"
	.size	.L__unnamed_5, 8

	.type	.L__unnamed_6,@object           # @5
.L__unnamed_6:
	.asciz	"AAFilter"
	.size	.L__unnamed_6, 9

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym _Z24__device_stub__init_randP12hiprandStatej
	.addrsig_sym _Z27__device_stub__path_tracingP3Vec
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym ctriangles
	.addrsig_sym cparam
	.addrsig_sym clights
	.addrsig_sym AAFilter
	.addrsig_sym _ZSt4cout
	.addrsig_sym _Z9init_randP12hiprandStatej
	.addrsig_sym _Z12path_tracingP3Vec
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z9init_randP12hiprandStatej ; -- Begin function _Z9init_randP12hiprandStatej
	.globl	_Z9init_randP12hiprandStatej
	.p2align	8
	.type	_Z9init_randP12hiprandStatej,@function
_Z9init_randP12hiprandStatej:           ; @_Z9init_randP12hiprandStatej
; %bb.0:
	s_load_b32 s4, s[0:1], 0x1c
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, cparam@rel32@lo+4
	s_addc_u32 s3, s3, cparam@rel32@hi+12
	v_bfe_u32 v1, v0, 10, 10
	s_load_b32 s2, s[2:3], 0x0
	v_dual_mov_b32 v5, 0 :: v_dual_and_b32 v0, 0x3ff, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_mov_b32_e32 v6, v5
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s4, 16
	v_mad_u64_u32 v[2:3], null, s15, s3, v[1:2]
	v_mov_b32_e32 v3, 0x8f14727c
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_mul_lo_u32 v1, v2, s2
	s_and_b32 s2, s4, 0xffff
	s_mul_i32 s14, s14, s2
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x8
	s_load_b64 s[0:1], s[0:1], 0x0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v0, s14, v0, v1
	v_lshrrev_b32_e32 v1, 16, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor3_b32 v1, v0, v1, 61
	v_lshl_add_u32 v1, v1, 3, v1
	s_waitcnt lgkmcnt(0)
	v_mad_i64_i32 v[7:8], null, v0, 48, s[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v2, 4, v1
	v_xor_b32_e32 v1, v2, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v1, 0x27d4eb2d, v1
	v_lshrrev_b32_e32 v2, 15, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_xad_u32 v1, v2, v1, s2
	v_mov_b32_e32 v2, 0xa96f9d04
	v_xor_b32_e32 v1, 0x2c7f967f, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v9, 0x493c4aa1, v1
	v_add_nc_u32_e32 v4, 0x8ac25218, v9
	v_add_nc_u32_e32 v0, 0x75bcd15, v9
	v_xor_b32_e32 v1, 0x159a55e5, v9
	v_add_nc_u32_e32 v9, 0x583f19, v9
	s_clause 0x2
	global_store_b96 v[7:8], v[4:6], off
	global_store_b128 v[7:8], v[0:3], off offset:24
	global_store_b32 v[7:8], v9, off offset:40
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9init_randP12hiprandStatej
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z9init_randP12hiprandStatej, .Lfunc_end0-_Z9init_randP12hiprandStatej
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 328
; NumSgprs: 16
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 16
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z12path_tracingP3Vec   ; -- Begin function _Z12path_tracingP3Vec
	.globl	_Z12path_tracingP3Vec
	.p2align	8
	.type	_Z12path_tracingP3Vec,@function
_Z12path_tracingP3Vec:                  ; @_Z12path_tracingP3Vec
; %bb.0:
	s_load_b32 s2, s[0:1], 0x14
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v0, v0, 10, 10
	v_sub_nc_u32_e64 v36, 16, 40
	v_dual_mov_b32 v42, 0x3ed55555 :: v_dual_mov_b32 v19, 0
	s_mov_b32 s12, 0xeb1c432d
	s_mov_b32 s13, 0x3f1a36e2
	s_mov_b32 s29, 0
	v_dual_mov_b32 v6, 1.0 :: v_dual_mov_b32 v41, 0x3e31c71c
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mad_u64_u32 v[2:3], null, s14, s2, v[1:2]
	v_mad_u64_u32 v[3:4], null, s15, s3, v[0:1]
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, cparam@rel32@lo+4
	s_addc_u32 s3, s3, cparam@rel32@hi+12
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, cparam@rel32@lo+28
	s_addc_u32 s5, s5, cparam@rel32@hi+36
	s_clause 0x1
	s_load_b64 s[2:3], s[2:3], 0x0
	s_load_b64 s[8:9], s[4:5], 0x0
	v_cvt_f64_i32_e32 v[0:1], v2
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, cparam@rel32@lo+16
	s_addc_u32 s5, s5, cparam@rel32@hi+24
	v_cvt_f64_i32_e32 v[4:5], v3
	s_load_b64 s[0:1], s[0:1], 0x0
	s_load_b64 s[10:11], s[4:5], 0x0
	s_waitcnt lgkmcnt(0)
	v_cvt_f64_i32_e32 v[22:23], s2
	v_cvt_f64_f32_e32 v[24:25], s9
	v_cvt_f64_f32_e32 v[26:27], s8
	v_cvt_f64_i32_e32 v[32:33], s3
	s_mov_b32 s8, 16
	s_cmp_gt_i32 s10, 0
	s_cselect_b32 s28, -1, 0
	s_cmp_gt_i32 s11, 0
	s_cselect_b32 s30, -1, 0
	v_add_f64 v[28:29], v[0:1], 0.5
	v_mov_b32_e32 v0, 0
	v_add_f64 v[30:31], v[4:5], 0.5
	v_mad_u64_u32 v[4:5], null, v3, s2, v[2:3]
	s_delay_alu instid0(VALU_DEP_3)
	v_mov_b32_e32 v1, v0
	v_mov_b32_e32 v2, v0
	v_mov_b32_e32 v20, v0
	v_mov_b32_e32 v21, v0
	v_mad_i64_i32 v[34:35], null, v4, 12, s[0:1]
	global_store_b96 v[34:35], v[0:2], off
.LBB1_1:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_2 Depth 2
                                        ;       Child Loop BB1_4 Depth 3
                                        ;       Child Loop BB1_28 Depth 3
                                        ;         Child Loop BB1_30 Depth 4
                                        ;           Child Loop BB1_32 Depth 5
                                        ;             Child Loop BB1_34 Depth 6
	s_mul_i32 s2, s29, 12
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, AAFilter@rel32@lo+4
	s_addc_u32 s1, s1, AAFilter@rel32@hi+12
	s_mul_hi_u32 s3, s29, 12
	s_add_u32 s0, s2, s0
	s_addc_u32 s1, s3, s1
	v_mov_b32_e32 v43, 0
	s_load_b64 s[0:1], s[0:1], 0x0
	v_mov_b32_e32 v45, 0
	s_mov_b32 s31, 0
	v_mov_b32_e32 v48, 1
	v_mov_b32_e32 v44, 0
	s_waitcnt lgkmcnt(0)
	v_cvt_f64_f32_e32 v[1:2], s0
	v_cvt_f64_f32_e32 v[3:4], s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[1:2], v[28:29], v[1:2]
	v_add_f64 v[3:4], v[30:31], v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_scale_f64 v[7:8], null, v[22:23], v[22:23], v[1:2]
	v_div_scale_f64 v[11:12], null, v[32:33], v[32:33], v[3:4]
	v_div_scale_f64 v[39:40], s0, v[3:4], v[32:33], v[3:4]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f64_e32 v[9:10], v[7:8]
	v_rcp_f64_e32 v[15:16], v[11:12]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[13:14], -v[7:8], v[9:10], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[9:10], v[9:10], v[13:14], v[9:10]
	v_fma_f64 v[13:14], -v[11:12], v[15:16], 1.0
	v_fma_f64 v[17:18], -v[7:8], v[9:10], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[13:14], v[15:16], v[13:14], v[15:16]
	v_div_scale_f64 v[15:16], vcc_lo, v[1:2], v[22:23], v[1:2]
	v_fma_f64 v[9:10], v[9:10], v[17:18], v[9:10]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[17:18], -v[11:12], v[13:14], 1.0
	s_waitcnt vmcnt(0)
	v_mul_f64 v[37:38], v[15:16], v[9:10]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[13:14], v[13:14], v[17:18], v[13:14]
	v_fma_f64 v[7:8], -v[7:8], v[37:38], v[15:16]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[15:16], v[39:40], v[13:14]
	v_div_fmas_f64 v[7:8], v[7:8], v[9:10], v[37:38]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[9:10], -v[11:12], v[15:16], v[39:40]
	s_mov_b32 vcc_lo, s0
	v_div_fixup_f64 v[1:2], v[7:8], v[22:23], v[1:2]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fmas_f64 v[7:8], v[9:10], v[13:14], v[15:16]
	v_fma_f64 v[1:2], v[1:2], 2.0, -1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fixup_f64 v[3:4], v[7:8], v[32:33], v[3:4]
	v_mul_f64 v[1:2], v[1:2], v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[3:4], v[3:4], -2.0, 1.0
	v_mul_f64 v[1:2], v[1:2], v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f32_f64_e32 v3, v[3:4]
	v_cvt_f32_f64_e32 v8, v[1:2]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v2, s9, v3
	v_mul_f32_e32 v1, v2, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v1, v8, v8
	v_add_f32_e32 v1, 1.0, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v3, 0x4f800000, v1
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v1
	v_cndmask_b32_e32 v1, v1, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_sqrt_f32_e32 v3, v1
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v4, -1, v3
	v_add_nc_u32_e32 v5, 1, v3
	v_fma_f32 v7, -v4, v3, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v9, -v5, v3, v1
	v_cmp_ge_f32_e64 s0, 0, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v3, v3, v4, s0
	v_cmp_lt_f32_e64 s0, 0, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v3, v3, v5, s0
	v_mul_f32_e32 v4, 0x37800000, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v3, v3, v4, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v1, 0x260
	v_cndmask_b32_e32 v1, v3, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f32 v3, null, v1, v1, 1.0
	v_div_scale_f32 v7, vcc_lo, 1.0, v1, 1.0
	v_rcp_f32_e32 v4, v3
	s_waitcnt_depctr 0xfff
	v_fma_f32 v5, -v3, v4, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v4, v5, v4
	v_mul_f32_e32 v5, v7, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v9, -v3, v5, v7
	v_fmac_f32_e32 v5, v9, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f32 v3, -v3, v5, v7
	v_mov_b32_e32 v7, v6
	v_div_fmas_f32 v3, v3, v4, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v5, v3, v1, 1.0
	v_dual_mov_b32 v1, v0 :: v_dual_mul_f32 v4, v2, v5
	v_dual_mov_b32 v2, v0 :: v_dual_mul_f32 v3, v5, v8
	scratch_store_b128 off, v[4:7], off offset:32
	v_mov_b32_e32 v7, v0
	s_clause 0x1
	scratch_store_b128 off, v[0:3], off offset:16
	; meta instruction
	scratch_store_b64 off, v[6:7], off offset:48
.LBB1_2:                                ;   Parent Loop BB1_1 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB1_4 Depth 3
                                        ;       Child Loop BB1_28 Depth 3
                                        ;         Child Loop BB1_30 Depth 4
                                        ;           Child Loop BB1_32 Depth 5
                                        ;             Child Loop BB1_34 Depth 6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[39:40], null, v48, 40, s[8:9]
	s_and_not1_b32 vcc_lo, exec_lo, s28
	v_add_nc_u32_e32 v40, 12, v39
	s_cbranch_vccnz .LBB1_10
; %bb.3:                                ; %.lr.ph.i.i
                                        ;   in Loop: Header=BB1_2 Depth=2
	scratch_load_b96 v[1:3], v40, off offset:-40
	v_mov_b32_e32 v14, 0x47c35000
	s_mov_b32 s16, 0
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, ctriangles@rel32@lo+36
	s_addc_u32 s3, s3, ctriangles@rel32@hi+44
                                        ; implicit-def: $sgpr17
                                        ; implicit-def: $vgpr4
.LBB1_4:                                ;   Parent Loop BB1_1 Depth=1
                                        ;     Parent Loop BB1_2 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_add_u32 s0, s2, 0xffffffec
	s_addc_u32 s1, s3, -1
	s_add_u32 s4, s2, -4
	s_addc_u32 s5, s3, -1
	s_and_not1_b32 s17, s17, exec_lo
	s_clause 0x1
	s_load_b64 s[14:15], s[4:5], 0x0
	s_load_b128 s[4:7], s[0:1], 0x0
	s_mov_b32 s18, exec_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_mul_f32 v7, s15, v1 :: v_dual_mul_f32 v8, s14, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v10, v3, s7, -v7
	v_fma_f32 v7, v2, s15, -v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v9, s5, v10
	v_dual_mul_f32 v8, s7, v2 :: v_dual_fmac_f32 v9, s4, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v8, v1, s14, -v8
	v_fmac_f32_e32 v9, s6, v8
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_neq_f32_e32 0, v9
	s_cbranch_execz .LBB1_8
; %bb.5:                                ;   in Loop: Header=BB1_4 Depth=3
	scratch_load_b96 v[11:13], v39, off offset:-40
	v_div_scale_f32 v15, null, v9, v9, 1.0
	s_add_u32 s0, s2, 0xffffffe0
	s_addc_u32 s1, s3, -1
	s_add_u32 s20, s2, 0xffffffe8
	s_delay_alu instid0(VALU_DEP_1)
	v_rcp_f32_e32 v16, v15
	s_load_b64 s[0:1], s[0:1], 0x0
	s_addc_u32 s21, s3, -1
	v_div_scale_f32 v18, vcc_lo, 1.0, v9, 1.0
	s_load_b32 s19, s[20:21], 0x0
	s_waitcnt_depctr 0xfff
	v_fma_f32 v17, -v15, v16, 1.0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v16, v17, v16 :: v_dual_subrev_f32 v11, s0, v11
	v_mul_f32_e32 v17, v18, v16
	v_subrev_f32_e32 v12, s1, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v37, -v15, v17, v18
	v_fmac_f32_e32 v17, v37, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f32 v15, -v15, v17, v18
	v_mul_f32_e32 v18, v10, v12
	v_subrev_f32_e32 v10, s19, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fmac_f32_e32 v18, v7, v11
	v_div_fmas_f32 v15, v15, v16, v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v18, v8, v10
	v_div_fixup_f32 v7, v15, v9, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v8, v7, v18
	v_cmp_ngt_f32_e32 vcc_lo, 0, v8
	v_cmp_nlt_f32_e64 s0, 1.0, v8
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 s1, vcc_lo, s0
	s_mov_b32 s0, 0
	s_and_saveexec_b32 s19, s1
	s_cbranch_execz .LBB1_7
; %bb.6:                                ;   in Loop: Header=BB1_4 Depth=3
	v_mul_f32_e32 v13, s5, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f32 v13, s6, v12, -v13
	v_mul_f32_e32 v9, s6, v11
	v_fma_f32 v15, s4, v10, -v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v10, s14, v15
	v_dual_fmac_f32 v10, s7, v13 :: v_dual_mul_f32 v9, s4, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v11, s5, v11, -v9
	v_fmac_f32_e32 v10, s15, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v12, v7, v10
	v_cvt_f64_f32_e32 v[9:10], v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_lt_f64_e32 vcc_lo, s[12:13], v[9:10]
	v_mul_f32_e32 v9, v2, v15
	v_fmac_f32_e32 v9, v1, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v9, v3, v11
	v_mul_f32_e32 v10, v7, v9
	v_fmac_f32_e32 v8, v7, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_ngt_f32_e64 s0, 0, v10
	v_cmp_nlt_f32_e64 s1, 1.0, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, s0, s1
	v_cndmask_b32_e64 v4, v4, v12, s0
	s_and_b32 s0, s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s0, s0, exec_lo
.LBB1_7:                                ; %Flow150
                                        ;   in Loop: Header=BB1_4 Depth=3
	s_or_b32 exec_lo, exec_lo, s19
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s1, s17, exec_lo
	s_and_b32 s0, s0, exec_lo
	s_or_b32 s17, s1, s0
.LBB1_8:                                ; %_ZNK8Triangle12intersectionERK3VecS2_Rf.exit.i.i
                                        ;   in Loop: Header=BB1_4 Depth=3
	s_or_b32 exec_lo, exec_lo, s18
	v_cmp_lt_f32_e32 vcc_lo, v4, v14
	s_and_b32 vcc_lo, s17, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cndmask_b32_e64 v5, v5, s16, vcc_lo
	s_add_i32 s16, s16, 1
	v_cndmask_b32_e32 v14, v14, v4, vcc_lo
	s_add_u32 s2, s2, 0x4c
	s_addc_u32 s3, s3, 0
	s_cmp_eq_u32 s10, s16
	s_cbranch_scc0 .LBB1_4
; %bb.9:                                ; %._crit_edge.loopexit.i.i
                                        ;   in Loop: Header=BB1_2 Depth=2
	v_cmp_gt_f32_e64 s0, 0x47c35000, v14
	s_branch .LBB1_11
.LBB1_10:                               ;   in Loop: Header=BB1_2 Depth=2
	v_mov_b32_e32 v14, 0x47c35000
	s_mov_b32 s0, 0
.LBB1_11:                               ; %_Z9intersectRK3VecS1_RfRi.exit.i
                                        ;   in Loop: Header=BB1_2 Depth=2
	v_add_nc_u32_e32 v46, -1, v48
	s_delay_alu instid0(VALU_DEP_2)
	s_and_saveexec_b32 s33, s0
	s_cbranch_execz .LBB1_53
; %bb.12:                               ;   in Loop: Header=BB1_2 Depth=2
	v_mad_u64_u32 v[1:2], null, v48, 40, s[8:9]
                                        ; implicit-def: $vgpr51
                                        ; implicit-def: $vgpr52
                                        ; implicit-def: $vgpr50
	s_mov_b32 s0, exec_lo
	scratch_load_b32 v17, v1, off offset:-4
	s_waitcnt vmcnt(0)
	v_cmpx_gt_i32_e32 20, v17
	s_xor_b32 s34, exec_lo, s0
	s_cbranch_execz .LBB1_50
; %bb.13:                               ; %NodeBlock
                                        ;   in Loop: Header=BB1_2 Depth=2
	v_mul_lo_u32 v47, v48, 40
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, ctriangles@rel32@lo+40
	s_addc_u32 s1, s1, ctriangles@rel32@hi+48
	s_mov_b32 s2, 0
	v_mad_i64_i32 v[37:38], null, 0x4c, v5, s[0:1]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, ctriangles@rel32@lo+76
	s_addc_u32 s1, s1, ctriangles@rel32@hi+84
                                        ; implicit-def: $vgpr51
                                        ; implicit-def: $vgpr52
                                        ; implicit-def: $vgpr50
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mad_i64_i32 v[15:16], null, 0x4c, v5, s[0:1]
	v_add3_u32 v49, v36, v47, 16
	s_mov_b32 s1, 0
	s_mov_b32 s0, exec_lo
	scratch_load_b64 v[12:13], v49, off
	global_load_b128 v[1:4], v[37:38], off
	scratch_load_b128 v[8:11], v39, off offset:-40
	s_clause 0x1
	global_load_u8 v15, v[15:16], off
	global_load_b64 v[37:38], v[37:38], off offset:16
	s_waitcnt vmcnt(2)
	v_fma_f32 v7, v14, v11, v8
	v_mul_f32_e32 v16, v12, v2
	v_fma_f32 v8, v14, v12, v9
	v_fma_f32 v9, v14, v13, v10
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v16, v11, v1
	v_fmac_f32_e32 v16, v13, v3
	s_waitcnt vmcnt(1)
	v_cmpx_lt_i16_e32 0x52, v15
	s_xor_b32 s0, exec_lo, s0
	s_cbranch_execz .LBB1_17
; %bb.14:                               ; %LeafBlock129
                                        ;   in Loop: Header=BB1_2 Depth=2
	s_mov_b32 s3, -1
	s_mov_b32 s1, exec_lo
                                        ; implicit-def: $vgpr51
                                        ; implicit-def: $vgpr52
                                        ; implicit-def: $vgpr50
	v_cmpx_eq_u16_e32 0x53, v15
	s_cbranch_execz .LBB1_16
; %bb.15:                               ;   in Loop: Header=BB1_2 Depth=2
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[14:15], null, v48, 40, v[36:37]
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, ctriangles@rel32@lo+64
	s_addc_u32 s5, s5, ctriangles@rel32@hi+72
	v_dual_add_f32 v18, v2, v2 :: v_dual_add_nc_u32 v15, 1, v17
	v_mad_i64_i32 v[50:51], null, 0x4c, v5, s[4:5]
	s_xor_b32 s3, exec_lo, -1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v10, 24, v14
	v_fma_f32 v53, -v18, v16, v12
	v_add_nc_u32_e32 v18, 32, v14
	scratch_load_b96 v[56:58], v10, off
	global_load_b96 v[59:61], v[50:51], off
	v_add_f32_e32 v50, v3, v3
	v_add_f32_e32 v10, v1, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v54, -v50, v16, v13
	v_fma_f32 v10, -v10, v16, v11
	s_waitcnt vmcnt(1)
	v_mul_f32_e32 v55, v4, v56
	s_waitcnt vmcnt(0)
	v_fma_f32 v50, v56, v59, v43
	v_mul_f32_e32 v56, v37, v57
	v_mul_f32_e32 v14, v38, v58
	v_fma_f32 v52, v57, v60, v44
	v_fma_f32 v51, v58, v61, v45
	s_clause 0x2
	scratch_store_b128 v49, v[53:56], off
	scratch_store_b128 v39, v[7:10], off offset:-40
	scratch_store_b64 v18, v[14:15], off
.LBB1_16:                               ; %Flow143
                                        ;   in Loop: Header=BB1_2 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s1, s3, exec_lo
                                        ; implicit-def: $vgpr15
.LBB1_17:                               ; %Flow142
                                        ;   in Loop: Header=BB1_2 Depth=2
	s_and_not1_saveexec_b32 s0, s0
; %bb.18:                               ; %LeafBlock
                                        ;   in Loop: Header=BB1_2 Depth=2
	v_cmp_ne_u16_e32 vcc_lo, 0x44, v15
	s_and_not1_b32 s1, s1, exec_lo
	s_mov_b32 s2, exec_lo
                                        ; implicit-def: $vgpr51
                                        ; implicit-def: $vgpr52
                                        ; implicit-def: $vgpr50
	s_and_b32 s3, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s1, s1, s3
; %bb.19:                               ; %Flow144
                                        ;   in Loop: Header=BB1_2 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s3, exec_lo, s0
	s_cbranch_execz .LBB1_25
; %bb.20:                               ;   in Loop: Header=BB1_2 Depth=2
	v_cmp_gt_f32_e32 vcc_lo, 0, v16
                                        ; implicit-def: $vgpr51
                                        ; implicit-def: $vgpr52
	s_mov_b32 s1, exec_lo
	v_add_f32_e32 v50, v3, v3
	v_add_f32_e32 v18, v2, v2
	v_cndmask_b32_e64 v14, -v2, v2, vcc_lo
	v_cndmask_b32_e64 v10, -v1, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v15, v2, v14
	v_mul_f32_e32 v53, v12, v14
	v_cndmask_b32_e64 v14, -v3, v3, vcc_lo
	v_fmac_f32_e32 v15, v1, v10
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v53, v11, v10
	v_fmac_f32_e32 v15, v3, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v53, v13, v14
	v_cmp_lt_f32_e64 s0, 0, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f32 v14, -v53, v53, 1.0
	v_add_f32_e32 v15, v1, v1
	v_cndmask_b32_e64 v10, 0x40b851ec, v41, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v54, -v10, v14, 1.0
	v_fma_f32 v10, -v15, v16, v11
	v_fma_f32 v15, -v18, v16, v12
	v_fma_f32 v16, -v50, v16, v13
	v_add_nc_u32_e32 v14, 1, v17
                                        ; implicit-def: $vgpr50
	v_cmpx_ngt_f32_e32 0, v54
	s_xor_b32 s4, exec_lo, s1
	s_cbranch_execz .LBB1_22
; %bb.21:                               ;   in Loop: Header=BB1_2 Depth=2
	v_mad_u64_u32 v[64:65], null, v48, 40, s[8:9]
	s_getpc_b64 s[6:7]
	s_add_u32 s6, s6, ctriangles@rel32@lo+64
	s_addc_u32 s7, s7, ctriangles@rel32@hi+72
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v54
	v_add_nc_u32_e32 v48, 1, v48
	scratch_load_b96 v[55:57], v64, off offset:-16
	v_add_nc_u32_e32 v58, 24, v64
	v_add_nc_u32_e32 v65, 32, v64
	s_waitcnt vmcnt(0)
	v_dual_mul_f32 v17, v4, v55 :: v_dual_mul_f32 v18, v37, v56
	v_mul_f32_e32 v51, v38, v57
	s_clause 0x1
	scratch_store_b128 v49, v[15:18], off
	scratch_store_b32 v64, v51, off offset:-8
	s_clause 0x1
	scratch_load_b64 v[15:16], v64, off offset:-16
	scratch_load_b32 v52, v64, off offset:-8
	v_mad_i64_i32 v[49:50], null, 0x4c, v5, s[6:7]
	s_waitcnt vmcnt(1)
	scratch_store_b64 v58, v[15:16], off
	s_waitcnt vmcnt(0)
	scratch_store_b32 v65, v52, off
	scratch_load_b96 v[58:60], v58, off
	global_load_b96 v[61:63], v[49:50], off
	v_mul_f32_e32 v15, 0x4f800000, v54
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v15, v54, v15, vcc_lo
	v_sqrt_f32_e32 v16, v15
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v49, -1, v16
	v_add_nc_u32_e32 v50, 1, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v52, -v49, v16, v15
	v_fma_f32 v54, -v50, v16, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_f32_e64 s1, 0, v52
	v_cndmask_b32_e64 v16, v16, v49, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_f32_e64 s1, 0, v54
	v_cndmask_b32_e64 v16, v16, v50, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v49, 0x37800000, v16
	v_cndmask_b32_e32 v16, v16, v49, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v15, 0x260
	v_cndmask_b32_e64 v49, 0x4019999a, v42, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v15, v16, v15, vcc_lo
	v_fmac_f32_e32 v15, v53, v49
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v15, -v15, v15, s0
	v_mul_f32_e32 v16, v2, v15
	v_mul_f32_e32 v50, v1, v15
	v_mul_f32_e32 v15, v3, v15
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v12, v12, v49, -v16
	v_fma_f32 v11, v11, v49, -v50
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v13, v13, v49, -v15
	v_mul_f32_e32 v16, v12, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v16, v11, v11
	v_fmac_f32_e32 v16, v13, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v16
	v_mul_f32_e32 v15, 0x4f800000, v16
	v_cndmask_b32_e32 v15, v16, v15, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_sqrt_f32_e32 v16, v15
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v49, -1, v16
	v_add_nc_u32_e32 v50, 1, v16
	v_fma_f32 v52, -v49, v16, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v54, -v50, v16, v15
	v_cmp_ge_f32_e64 s1, 0, v52
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v16, v16, v49, s1
	v_cmp_lt_f32_e64 s1, 0, v54
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v16, v16, v50, s1
	v_mul_f32_e32 v49, 0x37800000, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v16, v16, v49, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v15, 0x260
	v_cndmask_b32_e32 v15, v16, v15, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f32 v16, null, v15, v15, 1.0
	v_div_scale_f32 v52, vcc_lo, 1.0, v15, 1.0
	v_rcp_f32_e32 v49, v16
	s_waitcnt_depctr 0xfff
	v_fma_f32 v50, -v16, v49, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v49, v50, v49
	v_mul_f32_e32 v50, v52, v49
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v54, -v16, v50, v52
	v_fmac_f32_e32 v50, v54, v49
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v16, -v16, v50, v52
	v_div_fmas_f32 v16, v16, v49, v50
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v16, v16, v15, 1.0
	v_mul_f32_e32 v49, v11, v16
	v_mul_f32_e32 v15, v12, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v16, v13, v16 :: v_dual_mul_f32 v11, v2, v15
	v_fmac_f32_e32 v11, v1, v49
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, v3, v16
	v_cndmask_b32_e64 v11, v11, -v53, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v11, 1.0, v11
	v_mul_f32_e32 v12, 0x3f54985c, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v12, v11, v12
	v_mul_f32_e32 v12, v11, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v12, v11, v12
	v_fmaak_f32 v13, v11, v12, 0x3e2d9e91
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v11, v13, v17
	v_dual_sub_f32 v53, 1.0, v13 :: v_dual_mul_f32 v12, v13, v18
	v_mul_f32_e32 v13, v13, v51
	scratch_store_b128 v39, v[7:10], off offset:-40
	v_mov_b32_e32 v10, v49
                                        ; implicit-def: $vgpr49
	scratch_store_b128 v64, v[11:14], off offset:-16
	s_waitcnt vmcnt(1)
	v_mul_f32_e32 v17, v53, v58
	v_mul_f32_e32 v18, v53, v59
	v_mul_f32_e32 v13, v53, v60
	s_waitcnt vmcnt(0)
	v_fma_f32 v50, v55, v61, v43
	v_fma_f32 v52, v56, v62, v44
	v_fma_f32 v51, v57, v63, v45
	s_clause 0x2
	scratch_store_b128 v39, v[7:10], off
	scratch_store_b128 v40, v[15:18], off offset:4
	scratch_store_b64 v65, v[13:14], off
                                        ; implicit-def: $vgpr39_vgpr40
                                        ; implicit-def: $vgpr15
                                        ; implicit-def: $vgpr14
.LBB1_22:                               ; %Flow
                                        ;   in Loop: Header=BB1_2 Depth=2
	s_and_not1_saveexec_b32 s0, s4
	s_cbranch_execz .LBB1_24
; %bb.23:                               ;   in Loop: Header=BB1_2 Depth=2
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[11:12], null, v48, 40, v[36:37]
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, ctriangles@rel32@lo+64
	s_addc_u32 s5, s5, ctriangles@rel32@hi+72
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_i64_i32 v[12:13], null, 0x4c, v5, s[4:5]
	v_add_nc_u32_e32 v17, 24, v11
	v_add_nc_u32_e32 v11, 32, v11
	scratch_load_b96 v[51:53], v17, off
	global_load_b96 v[54:56], v[12:13], off
	s_waitcnt vmcnt(1)
	v_mul_f32_e32 v18, v37, v52
	s_waitcnt vmcnt(0)
	v_fma_f32 v50, v51, v54, v43
	v_mul_f32_e32 v17, v4, v51
	v_fma_f32 v52, v52, v55, v44
	v_fma_f32 v51, v53, v56, v45
	v_mul_f32_e32 v13, v38, v53
	s_clause 0x2
	scratch_store_b128 v49, v[15:18], off
	scratch_store_b128 v39, v[7:10], off offset:-40
	scratch_store_b64 v11, v[13:14], off
.LBB1_24:                               ; %Flow131
                                        ;   in Loop: Header=BB1_2 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 s2, s2, exec_lo
.LBB1_25:                               ; %Flow145
                                        ;   in Loop: Header=BB1_2 Depth=2
	s_or_b32 exec_lo, exec_lo, s3
	s_and_saveexec_b32 s35, s2
	s_cbranch_execz .LBB1_49
; %bb.26:                               ; %.preheader477.i
                                        ;   in Loop: Header=BB1_2 Depth=2
	v_dual_mov_b32 v18, 0 :: v_dual_mov_b32 v39, 0
	v_mov_b32_e32 v40, 0
	s_and_not1_b32 vcc_lo, exec_lo, s30
	s_cbranch_vccnz .LBB1_48
; %bb.27:                               ; %.lr.ph496.i.preheader
                                        ;   in Loop: Header=BB1_2 Depth=2
	v_dual_mov_b32 v18, 0 :: v_dual_mov_b32 v39, 0
	v_mov_b32_e32 v40, 0
	s_mov_b32 s36, 0
.LBB1_28:                               ; %.lr.ph496.i
                                        ;   Parent Loop BB1_1 Depth=1
                                        ;     Parent Loop BB1_2 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB1_30 Depth 4
                                        ;           Child Loop BB1_32 Depth 5
                                        ;             Child Loop BB1_34 Depth 6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mul_i32 s2, s36, 56
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, clights@rel32@lo+52
	s_addc_u32 s5, s5, clights@rel32@hi+60
	s_mul_hi_u32 s1, s36, 56
	s_add_u32 s4, s2, s4
	s_addc_u32 s5, s1, s5
	s_load_b64 s[14:15], s[4:5], 0x0
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s14, 1
	s_cbranch_scc1 .LBB1_47
; %bb.29:                               ; %.preheader.lr.ph.i
                                        ;   in Loop: Header=BB1_28 Depth=3
	v_cvt_f64_i32_e32 v[10:11], s14
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, clights@rel32@lo+4
	s_addc_u32 s5, s5, clights@rel32@hi+12
	s_add_u32 s16, s2, s4
	s_addc_u32 s17, s1, s5
	s_cmp_gt_i32 s15, 0
	s_mov_b32 s38, 0
	s_cselect_b32 s37, -1, 0
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, clights@rel32@lo+28
	s_addc_u32 s5, s5, clights@rel32@hi+36
	s_add_u32 s18, s2, s4
	s_addc_u32 s19, s1, s5
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, clights@rel32@lo+16
	s_addc_u32 s5, s5, clights@rel32@hi+24
	s_add_u32 s20, s2, s4
	s_addc_u32 s21, s1, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_scale_f64 v[12:13], null, v[10:11], v[10:11], 1.0
	v_div_scale_f64 v[48:49], vcc_lo, 1.0, v[10:11], 1.0
	v_rcp_f64_e32 v[14:15], v[12:13]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[16:17], -v[12:13], v[14:15], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[14:15], v[14:15], v[16:17], v[14:15]
	v_fma_f64 v[16:17], -v[12:13], v[14:15], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[14:15], v[14:15], v[16:17], v[14:15]
	v_mul_f64 v[16:17], v[48:49], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[12:13], -v[12:13], v[16:17], v[48:49]
	v_div_fmas_f64 v[12:13], v[12:13], v[14:15], v[16:17]
	v_cvt_f64_i32_e32 v[14:15], s15
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fixup_f64 v[10:11], v[12:13], v[10:11], 1.0
	v_div_scale_f64 v[48:49], null, v[14:15], v[14:15], 1.0
	v_div_scale_f64 v[58:59], s0, 1.0, v[14:15], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_div_scale_f64 v[12:13], null, v[14:15], v[14:15], v[10:11]
	v_rcp_f64_e32 v[52:53], v[48:49]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[16:17], v[12:13]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[50:51], -v[12:13], v[16:17], 1.0
	v_fma_f64 v[16:17], v[16:17], v[50:51], v[16:17]
	v_fma_f64 v[50:51], -v[48:49], v[52:53], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[54:55], -v[12:13], v[16:17], 1.0
	v_fma_f64 v[50:51], v[52:53], v[50:51], v[52:53]
	v_div_scale_f64 v[52:53], vcc_lo, v[10:11], v[14:15], v[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[16:17], v[16:17], v[54:55], v[16:17]
	v_fma_f64 v[54:55], -v[48:49], v[50:51], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[56:57], v[52:53], v[16:17]
	v_fma_f64 v[50:51], v[50:51], v[54:55], v[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[12:13], -v[12:13], v[56:57], v[52:53]
	v_mul_f64 v[52:53], v[58:59], v[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fmas_f64 v[12:13], v[12:13], v[16:17], v[56:57]
	v_fma_f64 v[16:17], -v[48:49], v[52:53], v[58:59]
	s_mov_b32 vcc_lo, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fixup_f64 v[12:13], v[12:13], v[14:15], v[10:11]
	v_div_fmas_f64 v[16:17], v[16:17], v[50:51], v[52:53]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f32_f64_e32 v48, v[12:13]
	v_div_fixup_f64 v[12:13], v[16:17], v[14:15], 1.0
	v_mov_b32_e32 v14, 0
	v_mov_b32_e32 v15, 0
.LBB1_30:                               ; %.preheader.i
                                        ;   Parent Loop BB1_1 Depth=1
                                        ;     Parent Loop BB1_2 Depth=2
                                        ;       Parent Loop BB1_28 Depth=3
                                        ; =>      This Loop Header: Depth=4
                                        ;           Child Loop BB1_32 Depth 5
                                        ;             Child Loop BB1_34 Depth 6
	s_and_not1_b32 vcc_lo, exec_lo, s37
	s_cbranch_vccnz .LBB1_46
; %bb.31:                               ; %.lr.ph.i
                                        ;   in Loop: Header=BB1_30 Depth=4
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f64 v[16:17], v[10:11], v[14:15]
	s_clause 0x2
	s_load_b128 s[0:3], s[18:19], 0x0
	s_load_b128 s[4:7], s[16:17], 0x0
	s_load_b64 s[22:23], s[18:19], 0x10
	s_waitcnt lgkmcnt(0)
	v_fma_f32 v49, s0, -0.5, s4
	v_fma_f32 v50, s1, -0.5, s5
	v_fma_f32 v51, s2, -0.5, s6
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f32_f64_e32 v16, v[16:17]
	v_fmac_f32_e32 v49, s0, v16
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fmac_f32_e32 v50, s1, v16
	v_dual_fmac_f32 v51, s2, v16 :: v_dual_mov_b32 v16, 0
	v_mov_b32_e32 v17, 0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fmac_f32_e64 v49, s3, -0.5
	v_fmac_f32_e64 v50, s22, -0.5
	s_delay_alu instid0(VALU_DEP_4)
	v_fmac_f32_e64 v51, s23, -0.5
	s_mov_b32 s2, 0
.LBB1_32:                               ;   Parent Loop BB1_1 Depth=1
                                        ;     Parent Loop BB1_2 Depth=2
                                        ;       Parent Loop BB1_28 Depth=3
                                        ;         Parent Loop BB1_30 Depth=4
                                        ; =>        This Loop Header: Depth=5
                                        ;             Child Loop BB1_34 Depth 6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[52:53], v[12:13], v[16:17]
	v_cvt_f32_f64_e32 v52, v[52:53]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f32 v53, s22, v52, v50
	v_fma_f32 v54, s3, v52, v49
	v_fma_f32 v52, s23, v52, v51
	v_dual_sub_f32 v53, v53, v8 :: v_dual_sub_f32 v54, v54, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v55, v53, v53
	v_dual_sub_f32 v56, v52, v9 :: v_dual_fmac_f32 v55, v54, v54
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v55, v56, v56
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v55
	v_mul_f32_e32 v52, 0x4f800000, v55
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v52, v55, v52, vcc_lo
	v_sqrt_f32_e32 v55, v52
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v57, -1, v55
	v_add_nc_u32_e32 v58, 1, v55
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v59, -v57, v55, v52
	v_fma_f32 v60, -v58, v55, v52
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_f32_e64 s0, 0, v59
	v_cndmask_b32_e64 v55, v55, v57, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_f32_e64 s0, 0, v60
	v_cndmask_b32_e64 v55, v55, v58, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v57, 0x37800000, v55
	v_cndmask_b32_e32 v55, v55, v57, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v52, 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v55, v55, v52, vcc_lo
	v_div_scale_f32 v52, null, v55, v55, 1.0
	v_div_scale_f32 v59, vcc_lo, 1.0, v55, 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v57, v52
	s_waitcnt_depctr 0xfff
	v_fma_f32 v58, -v52, v57, 1.0
	v_fmac_f32_e32 v57, v58, v57
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v58, v59, v57
	v_fma_f32 v60, -v52, v58, v59
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v58, v60, v57
	v_fma_f32 v52, -v52, v58, v59
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v52, v52, v57, v58
	s_and_not1_b32 vcc_lo, exec_lo, s28
	v_div_fixup_f32 v57, v52, v55, 1.0
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v52, v54, v57
	v_mul_f32_e32 v54, v53, v57
	v_mul_f32_e32 v53, v56, v57
	s_cbranch_vccnz .LBB1_40
; %bb.33:                               ; %.lr.ph.i205.i.preheader
                                        ;   in Loop: Header=BB1_32 Depth=5
	v_dual_mov_b32 v57, 0 :: v_dual_mov_b32 v56, 0x47c35000
	s_mov_b32 s39, 0
	s_getpc_b64 s[24:25]
	s_add_u32 s24, s24, ctriangles@rel32@lo+36
	s_addc_u32 s25, s25, ctriangles@rel32@hi+44
                                        ; implicit-def: $sgpr40
                                        ; implicit-def: $vgpr58
.LBB1_34:                               ; %.lr.ph.i205.i
                                        ;   Parent Loop BB1_1 Depth=1
                                        ;     Parent Loop BB1_2 Depth=2
                                        ;       Parent Loop BB1_28 Depth=3
                                        ;         Parent Loop BB1_30 Depth=4
                                        ;           Parent Loop BB1_32 Depth=5
                                        ; =>          This Inner Loop Header: Depth=6
	s_add_u32 s0, s24, 0xffffffec
	s_addc_u32 s1, s25, -1
	s_add_u32 s4, s24, -4
	s_addc_u32 s5, s25, -1
	s_and_not1_b32 s40, s40, exec_lo
	s_clause 0x1
	s_load_b64 s[26:27], s[4:5], 0x0
	s_load_b128 s[4:7], s[0:1], 0x0
	s_mov_b32 s41, exec_lo
	s_waitcnt lgkmcnt(0)
	v_dual_mul_f32 v59, s27, v52 :: v_dual_mul_f32 v60, s26, v53
	v_mul_f32_e32 v61, s7, v54
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v62, v53, s7, -v59
	v_fma_f32 v60, v54, s27, -v60
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v61, v52, s26, -v61
	v_mul_f32_e32 v59, s5, v62
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v59, s4, v60
	v_fmac_f32_e32 v59, s6, v61
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_neq_f32_e32 0, v59
	s_cbranch_execz .LBB1_38
; %bb.35:                               ;   in Loop: Header=BB1_34 Depth=6
	v_div_scale_f32 v65, null, v59, v59, 1.0
	s_add_u32 s0, s24, 0xffffffe0
	s_addc_u32 s1, s25, -1
	s_add_u32 s42, s24, 0xffffffe8
	s_delay_alu instid0(VALU_DEP_1)
	v_rcp_f32_e32 v66, v65
	s_load_b64 s[0:1], s[0:1], 0x0
	s_addc_u32 s43, s25, -1
	v_div_scale_f32 v67, vcc_lo, 1.0, v59, 1.0
	s_load_b32 s42, s[42:43], 0x0
	s_waitcnt_depctr 0xfff
	v_fma_f32 v63, -v65, v66, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v66, v63, v66
	s_waitcnt lgkmcnt(0)
	v_subrev_f32_e32 v64, s1, v8
	v_dual_mul_f32 v68, v67, v66 :: v_dual_mul_f32 v69, v62, v64
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f32 v63, -v65, v68, v67
	v_subrev_f32_e32 v62, s42, v9
	v_dual_fmac_f32 v68, v63, v66 :: v_dual_subrev_f32 v63, s0, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v65, -v65, v68, v67
	v_fmac_f32_e32 v69, v60, v63
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v60, v65, v66, v68
	v_fmac_f32_e32 v69, v61, v62
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v60, v60, v59, 1.0
	v_mul_f32_e32 v59, v60, v69
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_ngt_f32_e32 vcc_lo, 0, v59
	v_cmp_nlt_f32_e64 s0, 1.0, v59
	s_and_b32 s1, vcc_lo, s0
	s_mov_b32 s0, 0
	s_and_saveexec_b32 s42, s1
	s_cbranch_execz .LBB1_37
; %bb.36:                               ;   in Loop: Header=BB1_34 Depth=6
	v_mul_f32_e32 v61, s6, v63
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f32 v66, s4, v62, -v61
	v_mul_f32_e32 v61, s4, v64
	v_fma_f32 v63, s5, v63, -v61
	v_mul_f32_e32 v65, s5, v62
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v62, s26, v66
	v_fma_f32 v65, s6, v64, -v65
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v62, s7, v65
	v_fmac_f32_e32 v62, s27, v63
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v64, v60, v62
	v_cvt_f64_f32_e32 v[61:62], v64
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_lt_f64_e32 vcc_lo, s[12:13], v[61:62]
	v_mul_f32_e32 v61, v54, v66
	v_fmac_f32_e32 v61, v52, v65
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v61, v53, v63
	v_mul_f32_e32 v62, v60, v61
	v_fmac_f32_e32 v59, v60, v61
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_ngt_f32_e64 s0, 0, v62
	v_cmp_nlt_f32_e64 s1, 1.0, v59
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, s0, s1
	v_cndmask_b32_e64 v58, v58, v64, s0
	s_and_b32 s0, s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s0, s0, exec_lo
.LBB1_37:                               ; %Flow133
                                        ;   in Loop: Header=BB1_34 Depth=6
	s_or_b32 exec_lo, exec_lo, s42
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s1, s40, exec_lo
	s_and_b32 s0, s0, exec_lo
	s_or_b32 s40, s1, s0
.LBB1_38:                               ; %_ZNK8Triangle12intersectionERK3VecS2_Rf.exit.i212.i
                                        ;   in Loop: Header=BB1_34 Depth=6
	s_or_b32 exec_lo, exec_lo, s41
	v_cmp_lt_f32_e32 vcc_lo, v58, v56
	s_and_b32 vcc_lo, s40, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cndmask_b32_e64 v57, v57, s39, vcc_lo
	s_add_i32 s39, s39, 1
	v_cndmask_b32_e32 v56, v56, v58, vcc_lo
	s_add_u32 s24, s24, 0x4c
	s_addc_u32 s25, s25, 0
	s_cmp_eq_u32 s10, s39
	s_cbranch_scc0 .LBB1_34
; %bb.39:                               ; %._crit_edge.loopexit.i217.i
                                        ;   in Loop: Header=BB1_32 Depth=5
	v_cmp_gt_f32_e64 s0, 0x47c35000, v56
	s_branch .LBB1_41
.LBB1_40:                               ;   in Loop: Header=BB1_32 Depth=5
	v_dual_mov_b32 v56, 0x47c35000 :: v_dual_mov_b32 v57, 0
	s_mov_b32 s0, 0
.LBB1_41:                               ; %_Z9intersectRK3VecS1_RfRi.exit219.i
                                        ;   in Loop: Header=BB1_32 Depth=5
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_xor_b32 s1, s0, -1
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB1_43
; %bb.42:                               ;   in Loop: Header=BB1_32 Depth=5
	s_getpc_b64 s[6:7]
	s_add_u32 s6, s6, ctriangles@rel32@lo+76
	s_addc_u32 s7, s7, ctriangles@rel32@hi+84
	v_cmp_gt_f32_e64 s0, v56, v55
	v_mad_i64_i32 v[58:59], null, 0x4c, v57, s[6:7]
	s_and_not1_b32 s1, s1, exec_lo
	global_load_u8 v57, v[58:59], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u16_e32 vcc_lo, 0x4c, v57
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, s0, exec_lo
	s_or_b32 s1, s1, s0
.LBB1_43:                               ; %Flow132
                                        ;   in Loop: Header=BB1_32 Depth=5
	s_or_b32 exec_lo, exec_lo, s4
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB1_45
; %bb.44:                               ;   in Loop: Header=BB1_32 Depth=5
	s_clause 0x1
	s_load_b64 s[4:5], s[20:21], 0x0
	s_load_b32 s1, s[20:21], 0x8
	v_mul_f32_e32 v54, v2, v54
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v54, v1, v52 :: v_dual_mul_f32 v55, s1, v38
	v_fmac_f32_e32 v54, v3, v53
	v_dual_mul_f32 v53, s5, v37 :: v_dual_mul_f32 v52, s4, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v53, v54, v53
	v_fmac_f32_e32 v39, v53, v48
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v52, v54, v52
	v_mul_f32_e32 v54, v54, v55
	v_fmac_f32_e32 v40, v52, v48
	s_delay_alu instid0(VALU_DEP_2)
	v_fmac_f32_e32 v18, v54, v48
.LBB1_45:                               ;   in Loop: Header=BB1_32 Depth=5
	s_or_b32 exec_lo, exec_lo, s0
	v_add_f64 v[16:17], v[16:17], 1.0
	s_add_i32 s2, s2, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s2, s15
	s_cbranch_scc0 .LBB1_32
.LBB1_46:                               ; %._crit_edge.i
                                        ;   in Loop: Header=BB1_30 Depth=4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_f64 v[14:15], v[14:15], 1.0
	s_add_i32 s38, s38, 1
	s_cmp_eq_u32 s38, s14
	s_cbranch_scc0 .LBB1_30
.LBB1_47:                               ; %._crit_edge488.i
                                        ;   in Loop: Header=BB1_28 Depth=3
	s_add_i32 s36, s36, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s36, s11
	s_cbranch_scc0 .LBB1_28
.LBB1_48:                               ; %._crit_edge497.i
                                        ;   in Loop: Header=BB1_2 Depth=2
	v_add3_u32 v1, v36, v47, 24
	v_mov_b32_e32 v48, v46
	scratch_load_b96 v[1:3], v1, off
	s_waitcnt vmcnt(0)
	v_dual_fmac_f32 v45, v18, v3 :: v_dual_fmac_f32 v44, v39, v2
	v_fmac_f32_e32 v43, v40, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_mov_b32 v51, v45 :: v_dual_mov_b32 v52, v44
	v_mov_b32_e32 v50, v43
.LBB1_49:                               ; %Flow146
                                        ;   in Loop: Header=BB1_2 Depth=2
	s_or_b32 exec_lo, exec_lo, s35
                                        ; implicit-def: $vgpr43
                                        ; implicit-def: $vgpr44
                                        ; implicit-def: $vgpr45
                                        ; implicit-def: $vgpr46
.LBB1_50:                               ; %Flow148
                                        ;   in Loop: Header=BB1_2 Depth=2
	s_and_not1_saveexec_b32 s0, s34
	s_cbranch_execz .LBB1_52
; %bb.51:                               ;   in Loop: Header=BB1_2 Depth=2
	v_mul_lo_u32 v1, v48, 40
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, ctriangles@rel32@lo+64
	s_addc_u32 s3, s3, ctriangles@rel32@hi+72
	v_mov_b32_e32 v48, v46
	v_mad_i64_i32 v[7:8], null, 0x4c, v5, s[2:3]
	s_delay_alu instid0(VALU_DEP_3)
	v_add3_u32 v1, v36, v1, 24
	scratch_load_b96 v[1:3], v1, off
	global_load_b96 v[7:9], v[7:8], off
	s_waitcnt vmcnt(0)
	v_dual_fmac_f32 v45, v3, v9 :: v_dual_fmac_f32 v44, v2, v8
	v_fmac_f32_e32 v43, v1, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_mov_b32 v51, v45 :: v_dual_mov_b32 v52, v44
	v_mov_b32_e32 v50, v43
.LBB1_52:                               ; %Flow149
                                        ;   in Loop: Header=BB1_2 Depth=2
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_mov_b32 v43, v50 :: v_dual_mov_b32 v44, v52
	v_dual_mov_b32 v45, v51 :: v_dual_mov_b32 v46, v48
.LBB1_53:                               ;   in Loop: Header=BB1_2 Depth=2
	s_or_b32 exec_lo, exec_lo, s33
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v46
	v_mov_b32_e32 v48, v46
	s_or_b32 s31, vcc_lo, s31
	s_and_not1_b32 exec_lo, exec_lo, s31
	s_cbranch_execnz .LBB1_2
; %bb.54:                               ; %_Z8raytraceR3VecS0_.exit
                                        ;   in Loop: Header=BB1_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s31
	s_mul_i32 s2, s29, 12
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, AAFilter@rel32@lo+12
	s_addc_u32 s1, s1, AAFilter@rel32@hi+20
	s_mul_hi_u32 s3, s29, 12
	s_add_u32 s0, s2, s0
	s_addc_u32 s1, s3, s1
	s_add_i32 s29, s29, 1
	s_load_b32 s0, s[0:1], 0x0
	s_cmp_eq_u32 s29, 6
	s_waitcnt lgkmcnt(0)
	v_dual_fmac_f32 v19, s0, v43 :: v_dual_fmac_f32 v20, s0, v44
	v_fmac_f32_e32 v21, s0, v45
	global_store_b96 v[34:35], v[19:21], off
	s_cbranch_scc0 .LBB1_1
; %bb.55:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12path_tracingP3Vec
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 864
		.amdhsa_kernarg_size 264
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 1
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 70
		.amdhsa_next_free_sgpr 44
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z12path_tracingP3Vec, .Lfunc_end1-_Z12path_tracingP3Vec
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 5524
; NumSgprs: 46
; NumVgprs: 70
; ScratchSize: 864
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 5
; VGPRBlocks: 8
; NumSGPRsForWavesPerEU: 46
; NumVGPRsForWavesPerEU: 70
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 1
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.protected	ctriangles              ; @ctriangles
	.type	ctriangles,@object
	.section	.bss,"aw",@nobits
	.globl	ctriangles
	.p2align	4, 0x0
ctriangles:
	.zero	7600
	.size	ctriangles, 7600

	.protected	cparam                  ; @cparam
	.type	cparam,@object
	.globl	cparam
	.p2align	4, 0x0
cparam:
	.zero	32
	.size	cparam, 32

	.protected	clights                 ; @clights
	.type	clights,@object
	.globl	clights
	.p2align	4, 0x0
clights:
	.zero	560
	.size	clights, 560

	.protected	AAFilter                ; @AAFilter
	.type	AAFilter,@object
	.data
	.globl	AAFilter
	.p2align	4, 0x0
AAFilter:
	.long	0xbf051eb8                      ; float -0.519999981
	.long	0x3ec28f5c                      ; float 0.379999995
	.long	0x3e03126f                      ; float 0.128000006
	.long	0x3ed1eb85                      ; float 0.409999996
	.long	0x3f0f5c29                      ; float 0.560000002
	.long	0x3df3b646                      ; float 0.119000003
	.long	0x3e8a3d71                      ; float 0.270000011
	.long	0x3da3d70a                      ; float 0.0799999982
	.long	0x3e96872b                      ; float 0.294
	.long	0xbe2e147b                      ; float -0.170000002
	.long	0xbe947ae1                      ; float -0.289999992
	.long	0x3e7ef9db                      ; float 0.248999998
	.long	0x3f147ae1                      ; float 0.579999983
	.long	0xbf0ccccd                      ; float -0.550000012
	.long	0x3dd4fdf4                      ; float 0.104000002
	.long	0xbe9eb852                      ; float -0.310000002
	.long	0xbf35c28f                      ; float -0.709999978
	.long	0x3dd91687                      ; float 0.105999999
	.size	AAFilter, 72

	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym ctriangles
	.addrsig_sym cparam
	.addrsig_sym clights
	.addrsig_sym AAFilter
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9init_randP12hiprandStatej
    .private_segment_fixed_size: 0
    .sgpr_count:     16
    .sgpr_spill_count: 0
    .symbol:         _Z9init_randP12hiprandStatej.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         12
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         20
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         22
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         24
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         26
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         28
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         30
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         48
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         72
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 264
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12path_tracingP3Vec
    .private_segment_fixed_size: 864
    .sgpr_count:     46
    .sgpr_spill_count: 0
    .symbol:         _Z12path_tracingP3Vec.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     70
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
