#include<cuda.h>
#include<cuda_runtime.h>
#include<stdio.h>
#include<stdlib.h>
#include<cmath>
#define TILE_SIZE 32            //Tile size and block size, both are taken as 32
__device__ void store_full(float*,float*,int,int,int);
__device__ void load_full(float*,float*,int,int,int);
__device__ void store_lower(float*,float*,int,int,int);
__device__ void load_lower(float*,float*,int,int,int);
__device__ void potrf_tile(float*);
__device__ void trsm_tile(float*,int,int,int);
__device__ void syrk_tile(float*,float*,int,int,int);
__global__ void right_looking_launch_kernel(float*,int);

__device__ void store_full(float* read_data,float* write_data,int i,int j,int N)
{
    int global_y = j*blockDim.y + threadIdx.y;
    int global_x = i*blockDim.x + threadIdx.x;
        write_data[global_y*N + global_x] = read_data[threadIdx.x + TILE_SIZE*threadIdx.y];
    __syncthreads();
}
__device__ void load_full(float* read_data,float* write_data,int i,int j,int N)
{
    int global_y = j*blockDim.y + threadIdx.y;
    int global_x = i*blockDim.x + threadIdx.x;
        write_data[threadIdx.x + TILE_SIZE*threadIdx.y] = read_data[global_y*N + global_x];
    __syncthreads();
}
__device__ void store_lower(float* read_data,float* write_data,int i,int j,int N)
{
    int global_y = j*blockDim.y + threadIdx.y;
    int global_x = i*blockDim.x + threadIdx.x;
    if(threadIdx.y >= threadIdx.x)
        write_data[global_y*N + global_x] = read_data[threadIdx.x + TILE_SIZE*threadIdx.y];
    else
        write_data[global_y*N + global_x] = 0.0;
    __syncthreads();
}
__device__ void load_lower(float* read_data,float* write_data,int i,int j,int N)
{
    int global_y = j*blockDim.y + threadIdx.y;
    int global_x = i*blockDim.x + threadIdx.x;
    if(threadIdx.y >= threadIdx.x)
        write_data[threadIdx.x + TILE_SIZE*threadIdx.y] = read_data[global_y*N + global_x];
    else
        write_data[threadIdx.x + TILE_SIZE*threadIdx.y] = 0.0;
    __syncthreads();
}
__device__ void potrf_tile(float* t_A)
{
    int t_x = threadIdx.x;
    int t_y = threadIdx.y;
    __shared__ float temp2;                        // Using shared memory to Optimize
    for(int k=0;k<TILE_SIZE;k++)
    {
        if(t_x==t_y && t_x==k)
        {
            t_A[k*TILE_SIZE + k] = sqrtf(t_A[k*TILE_SIZE + k]);
            temp2 = t_A[k*TILE_SIZE + k];
        }
        __syncthreads();
        if(t_x<t_y && t_x == k)
        {
            t_A[t_y*TILE_SIZE + k]/= temp2;
        }
        __syncthreads();
        if(k<t_y && k<t_x && t_x<=t_y)
        {
            t_A[t_y*TILE_SIZE + t_x]-= t_A[t_x*TILE_SIZE + k]*t_A[t_y*TILE_SIZE + k];
        }
        __syncthreads();
    }
}
__device__ void trsm_tile(float *read_data,int i,int j,int N)
{
    int global_y = j*blockDim.y + threadIdx.y;
    int global_x = i*blockDim.x + threadIdx.x;
    int t_x = threadIdx.x;
    int t_y = threadIdx.y;
    for(int s=0;s<TILE_SIZE;s++)
    {
	if(t_x==s)
        {
	    read_data[global_y*N + global_x]/= read_data[global_x*N + global_x];
	}
	__syncthreads();
	if(t_x > s)
        {
	    read_data[global_y*N + global_x]-= read_data[global_x*N + global_x - t_x + s]*read_data[global_y*N + global_x - t_x + s];
	}
	__syncthreads();
    }
}
__device__ void syrk_tile(float* read_data,float* rA2,int i,int j,int k,int N) 
{
    int global_y = j*blockDim.y + threadIdx.y;
    int global_x = k*blockDim.x + threadIdx.x;
    int t_y = threadIdx.y;
    int t_x = threadIdx.x;
    __shared__ float temp0[TILE_SIZE][TILE_SIZE];
    __shared__ float temp1[TILE_SIZE][TILE_SIZE];
    temp0[t_y][t_x] = read_data[global_x*N + i*blockDim.x + t_y];
    temp1[t_x][t_y] = read_data[global_y*N + i*blockDim.x + t_x];
    __syncthreads();
    float valueToSubtract = 0.0;
    for(int r=0;r<TILE_SIZE;r++)
    {
        valueToSubtract+= temp0[r][t_x]*temp1[r][t_y];
    }
    rA2[t_y*TILE_SIZE + t_x]-= valueToSubtract;
    __syncthreads();
}
__global__ void right_looking_launch_kernel(float* read_data,int N)
{
    __shared__ float block_data[TILE_SIZE*TILE_SIZE];
    int i,j,k;
    for(i=0;i<N/TILE_SIZE;i++)
    {
        load_lower(read_data,block_data,i,i,N);
        potrf_tile(block_data);
        store_lower(block_data,read_data,i,i,N);
        for(j=i+1;j<N/TILE_SIZE;j++)
        {
            trsm_tile(read_data,i,j,N);
            for(k=i+1;k<j;k++)
            {
                load_full(read_data,block_data,k,j,N);
                syrk_tile(read_data,block_data,i,j,k,N);
                store_full(block_data,read_data,k,j,N);
            }
            load_lower(read_data,block_data,k,j,N);        
            syrk_tile(read_data,block_data,i,j,k,N);
            store_lower(block_data,read_data,k,j,N);
        }
    }
}
	.file	"tmpxft_002ba898_00000000-6_right_looking.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2036:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2036:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z10store_fullPfS_iii
	.type	_Z10store_fullPfS_iii, @function
_Z10store_fullPfS_iii:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2027:
	.size	_Z10store_fullPfS_iii, .-_Z10store_fullPfS_iii
	.globl	_Z9load_fullPfS_iii
	.type	_Z9load_fullPfS_iii, @function
_Z9load_fullPfS_iii:
.LFB2178:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2178:
	.size	_Z9load_fullPfS_iii, .-_Z9load_fullPfS_iii
	.globl	_Z11store_lowerPfS_iii
	.type	_Z11store_lowerPfS_iii, @function
_Z11store_lowerPfS_iii:
.LFB2180:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2180:
	.size	_Z11store_lowerPfS_iii, .-_Z11store_lowerPfS_iii
	.globl	_Z10load_lowerPfS_iii
	.type	_Z10load_lowerPfS_iii, @function
_Z10load_lowerPfS_iii:
.LFB2182:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2182:
	.size	_Z10load_lowerPfS_iii, .-_Z10load_lowerPfS_iii
	.globl	_Z10potrf_tilePf
	.type	_Z10potrf_tilePf, @function
_Z10potrf_tilePf:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2031:
	.size	_Z10potrf_tilePf, .-_Z10potrf_tilePf
	.globl	_Z9trsm_tilePfiii
	.type	_Z9trsm_tilePfiii, @function
_Z9trsm_tilePfiii:
.LFB2032:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2032:
	.size	_Z9trsm_tilePfiii, .-_Z9trsm_tilePfiii
	.globl	_Z9syrk_tilePfS_iiii
	.type	_Z9syrk_tilePfS_iiii, @function
_Z9syrk_tilePfS_iiii:
.LFB2033:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2033:
	.size	_Z9syrk_tilePfS_iiii, .-_Z9syrk_tilePfS_iiii
	.globl	_Z48__device_stub__Z27right_looking_launch_kernelPfiPfi
	.type	_Z48__device_stub__Z27right_looking_launch_kernelPfiPfi, @function
_Z48__device_stub__Z27right_looking_launch_kernelPfiPfi:
.LFB2058:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movl	%esi, 4(%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z27right_looking_launch_kernelPfi(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L16:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L18
	call	__stack_chk_fail@PLT
.L18:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2058:
	.size	_Z48__device_stub__Z27right_looking_launch_kernelPfiPfi, .-_Z48__device_stub__Z27right_looking_launch_kernelPfiPfi
	.globl	_Z27right_looking_launch_kernelPfi
	.type	_Z27right_looking_launch_kernelPfi, @function
_Z27right_looking_launch_kernelPfi:
.LFB2059:
	.cfi_startproc
	endbr64
	jmp	_Z48__device_stub__Z27right_looking_launch_kernelPfiPfi
	.cfi_endproc
.LFE2059:
	.size	_Z27right_looking_launch_kernelPfi, .-_Z27right_looking_launch_kernelPfi
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z27right_looking_launch_kernelPfi"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2061:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z27right_looking_launch_kernelPfi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2061:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include<hip/hip_runtime.h>

#include<stdio.h>
#include<stdlib.h>
#include<cmath>
#define TILE_SIZE 32            //Tile size and block size, both are taken as 32
__device__ void store_full(float*,float*,int,int,int);
__device__ void load_full(float*,float*,int,int,int);
__device__ void store_lower(float*,float*,int,int,int);
__device__ void load_lower(float*,float*,int,int,int);
__device__ void potrf_tile(float*);
__device__ void trsm_tile(float*,int,int,int);
__device__ void syrk_tile(float*,float*,int,int,int);
__global__ void right_looking_launch_kernel(float*,int);

__device__ void store_full(float* read_data,float* write_data,int i,int j,int N)
{
    int global_y = j*blockDim.y + threadIdx.y;
    int global_x = i*blockDim.x + threadIdx.x;
        write_data[global_y*N + global_x] = read_data[threadIdx.x + TILE_SIZE*threadIdx.y];
    __syncthreads();
}
__device__ void load_full(float* read_data,float* write_data,int i,int j,int N)
{
    int global_y = j*blockDim.y + threadIdx.y;
    int global_x = i*blockDim.x + threadIdx.x;
        write_data[threadIdx.x + TILE_SIZE*threadIdx.y] = read_data[global_y*N + global_x];
    __syncthreads();
}
__device__ void store_lower(float* read_data,float* write_data,int i,int j,int N)
{
    int global_y = j*blockDim.y + threadIdx.y;
    int global_x = i*blockDim.x + threadIdx.x;
    if(threadIdx.y >= threadIdx.x)
        write_data[global_y*N + global_x] = read_data[threadIdx.x + TILE_SIZE*threadIdx.y];
    else
        write_data[global_y*N + global_x] = 0.0;
    __syncthreads();
}
__device__ void load_lower(float* read_data,float* write_data,int i,int j,int N)
{
    int global_y = j*blockDim.y + threadIdx.y;
    int global_x = i*blockDim.x + threadIdx.x;
    if(threadIdx.y >= threadIdx.x)
        write_data[threadIdx.x + TILE_SIZE*threadIdx.y] = read_data[global_y*N + global_x];
    else
        write_data[threadIdx.x + TILE_SIZE*threadIdx.y] = 0.0;
    __syncthreads();
}
__device__ void potrf_tile(float* t_A)
{
    int t_x = threadIdx.x;
    int t_y = threadIdx.y;
    __shared__ float temp2;                        // Using shared memory to Optimize
    for(int k=0;k<TILE_SIZE;k++)
    {
        if(t_x==t_y && t_x==k)
        {
            t_A[k*TILE_SIZE + k] = sqrtf(t_A[k*TILE_SIZE + k]);
            temp2 = t_A[k*TILE_SIZE + k];
        }
        __syncthreads();
        if(t_x<t_y && t_x == k)
        {
            t_A[t_y*TILE_SIZE + k]/= temp2;
        }
        __syncthreads();
        if(k<t_y && k<t_x && t_x<=t_y)
        {
            t_A[t_y*TILE_SIZE + t_x]-= t_A[t_x*TILE_SIZE + k]*t_A[t_y*TILE_SIZE + k];
        }
        __syncthreads();
    }
}
__device__ void trsm_tile(float *read_data,int i,int j,int N)
{
    int global_y = j*blockDim.y + threadIdx.y;
    int global_x = i*blockDim.x + threadIdx.x;
    int t_x = threadIdx.x;
    int t_y = threadIdx.y;
    for(int s=0;s<TILE_SIZE;s++)
    {
	if(t_x==s)
        {
	    read_data[global_y*N + global_x]/= read_data[global_x*N + global_x];
	}
	__syncthreads();
	if(t_x > s)
        {
	    read_data[global_y*N + global_x]-= read_data[global_x*N + global_x - t_x + s]*read_data[global_y*N + global_x - t_x + s];
	}
	__syncthreads();
    }
}
__device__ void syrk_tile(float* read_data,float* rA2,int i,int j,int k,int N) 
{
    int global_y = j*blockDim.y + threadIdx.y;
    int global_x = k*blockDim.x + threadIdx.x;
    int t_y = threadIdx.y;
    int t_x = threadIdx.x;
    __shared__ float temp0[TILE_SIZE][TILE_SIZE];
    __shared__ float temp1[TILE_SIZE][TILE_SIZE];
    temp0[t_y][t_x] = read_data[global_x*N + i*blockDim.x + t_y];
    temp1[t_x][t_y] = read_data[global_y*N + i*blockDim.x + t_x];
    __syncthreads();
    float valueToSubtract = 0.0;
    for(int r=0;r<TILE_SIZE;r++)
    {
        valueToSubtract+= temp0[r][t_x]*temp1[r][t_y];
    }
    rA2[t_y*TILE_SIZE + t_x]-= valueToSubtract;
    __syncthreads();
}
__global__ void right_looking_launch_kernel(float* read_data,int N)
{
    __shared__ float block_data[TILE_SIZE*TILE_SIZE];
    int i,j,k;
    for(i=0;i<N/TILE_SIZE;i++)
    {
        load_lower(read_data,block_data,i,i,N);
        potrf_tile(block_data);
        store_lower(block_data,read_data,i,i,N);
        for(j=i+1;j<N/TILE_SIZE;j++)
        {
            trsm_tile(read_data,i,j,N);
            for(k=i+1;k<j;k++)
            {
                load_full(read_data,block_data,k,j,N);
                syrk_tile(read_data,block_data,i,j,k,N);
                store_full(block_data,read_data,k,j,N);
            }
            load_lower(read_data,block_data,k,j,N);        
            syrk_tile(read_data,block_data,i,j,k,N);
            store_lower(block_data,read_data,k,j,N);
        }
    }
}
	.text
	.file	"right_looking.hip"
	.globl	_Z42__device_stub__right_looking_launch_kernelPfi # -- Begin function _Z42__device_stub__right_looking_launch_kernelPfi
	.type	_Z42__device_stub__right_looking_launch_kernelPfi,@function
_Z42__device_stub__right_looking_launch_kernelPfi: # @_Z42__device_stub__right_looking_launch_kernelPfi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z27right_looking_launch_kernelPfi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z42__device_stub__right_looking_launch_kernelPfi, .Lfunc_end0-_Z42__device_stub__right_looking_launch_kernelPfi
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB1_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB1_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z27right_looking_launch_kernelPfi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end1:
	.size	__hip_module_ctor, .Lfunc_end1-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB2_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB2_2:
	retq
.Lfunc_end2:
	.size	__hip_module_dtor, .Lfunc_end2-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z27right_looking_launch_kernelPfi,@object # @_Z27right_looking_launch_kernelPfi
	.section	.rodata,"a",@progbits
	.globl	_Z27right_looking_launch_kernelPfi
	.p2align	3, 0x0
_Z27right_looking_launch_kernelPfi:
	.quad	_Z42__device_stub__right_looking_launch_kernelPfi
	.size	_Z27right_looking_launch_kernelPfi, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z27right_looking_launch_kernelPfi"
	.size	.L__unnamed_1, 35

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z42__device_stub__right_looking_launch_kernelPfi
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z27right_looking_launch_kernelPfi
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z27right_looking_launch_kernelPfi ; -- Begin function _Z27right_looking_launch_kernelPfi
	.globl	_Z27right_looking_launch_kernelPfi
	.p2align	8
	.type	_Z27right_looking_launch_kernelPfi,@function
_Z27right_looking_launch_kernelPfi:     ; @_Z27right_looking_launch_kernelPfi
; %bb.0:
	s_load_b32 s5, s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s5, 32
	s_cbranch_scc1 .LBB0_35
; %bb.1:                                ; %.lr.ph84
	s_clause 0x1
	s_load_b32 s3, s[0:1], 0x1c
	s_load_b64 s[6:7], s[0:1], 0x0
	v_bfe_u32 v1, v0, 10, 10
	v_and_b32_e32 v0, 0x3ff, v0
	s_ashr_i32 s2, s5, 31
	s_add_i32 s8, s5, 1
	s_lshr_b32 s0, s2, 27
	v_dual_mov_b32 v22, 0 :: v_dual_lshlrev_b32 v11, 7, v1
	v_lshlrev_b32_e32 v2, 2, v0
	v_cmp_lt_u32_e32 vcc_lo, v1, v0
	v_lshlrev_b32_e32 v13, 7, v0
	v_lshl_or_b32 v14, v1, 2, 0x2000
	s_add_i32 s4, s5, s0
	v_or_b32_e32 v15, 0x1000, v2
	v_cmp_ge_u32_e64 s0, v1, v0
	v_cmp_eq_u32_e64 s1, v0, v1
	v_cmp_lt_u32_e64 s2, v0, v1
	v_min_u32_e32 v12, v1, v0
	s_ashr_i32 s9, s4, 5
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s10, s3, 16
	s_and_b32 s11, s3, 0xffff
	v_add_nc_u32_e32 v3, s10, v1
	s_mul_i32 s12, s5, s10
	v_add_nc_u32_e32 v16, v11, v2
	v_add_nc_u32_e32 v17, v2, v13
	v_add_nc_u32_e32 v18, v15, v11
	v_mul_lo_u32 v19, s5, v3
	v_mul_lo_u32 v20, v0, s5
	v_add_nc_u32_e32 v21, v14, v13
	s_add_i32 s13, s12, s11
	s_mul_i32 s14, s8, s11
	s_mov_b32 s15, 0
	s_xor_b32 s16, vcc_lo, -1
.LBB0_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_5 Depth 2
                                        ;     Child Loop BB0_16 Depth 2
                                        ;       Child Loop BB0_17 Depth 3
                                        ;       Child Loop BB0_24 Depth 3
                                        ;         Child Loop BB0_25 Depth 4
                                        ;       Child Loop BB0_30 Depth 3
	v_mov_b32_e32 v2, 0
	s_mul_i32 s17, s15, s11
	s_and_saveexec_b32 s3, s0
	s_cbranch_execz .LBB0_4
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, s15, s10, v[1:2]
	v_mul_lo_u32 v2, v2, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v2, s17, v0, v2
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_add_co_u32 v2, vcc_lo, s6, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
	global_load_b32 v2, v[2:3], off
.LBB0_4:                                ; %_Z10load_lowerPfS_iii.exit
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt vmcnt(0)
	ds_store_b32 v16, v2
	v_dual_mov_b32 v2, v13 :: v_dual_mov_b32 v3, v11
	s_mov_b32 s18, 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB0_5:                                ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_cmp_eq_u32_e32 vcc_lo, s18, v0
	s_and_b32 s3, s1, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s19, s3
	s_cbranch_execz .LBB0_7
; %bb.6:                                ;   in Loop: Header=BB0_5 Depth=2
	ds_load_b32 v4, v17
	s_waitcnt lgkmcnt(0)
	v_mul_f32_e32 v5, 0x4f800000, v4
	v_cmp_gt_f32_e64 s3, 0xf800000, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v4, v4, v5, s3
	v_sqrt_f32_e32 v5, v4
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v6, -1, v5
	v_add_nc_u32_e32 v7, 1, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v8, -v6, v5, v4
	v_fma_f32 v9, -v7, v5, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_f32_e64 s4, 0, v8
	v_cndmask_b32_e64 v5, v5, v6, s4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_f32_e64 s4, 0, v9
	v_cndmask_b32_e64 v5, v5, v7, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v6, 0x37800000, v5
	v_cndmask_b32_e64 v5, v5, v6, s3
	v_cmp_class_f32_e64 s3, v4, 0x260
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v4, v5, v4, s3
	ds_store_b32 v17, v4
	ds_store_b32 v22, v4 offset:12288
.LBB0_7:                                ;   in Loop: Header=BB0_5 Depth=2
	s_or_b32 exec_lo, exec_lo, s19
	s_and_b32 s4, s2, vcc_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s3, s4
	s_cbranch_execz .LBB0_9
; %bb.8:                                ;   in Loop: Header=BB0_5 Depth=2
	ds_load_b32 v4, v22 offset:12288
	ds_load_b32 v5, v16
	s_waitcnt lgkmcnt(0)
	v_div_scale_f32 v6, null, v4, v4, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v7, v6
	s_waitcnt_depctr 0xfff
	v_fma_f32 v8, -v6, v7, 1.0
	v_fmac_f32_e32 v7, v8, v7
	v_div_scale_f32 v8, vcc_lo, v5, v4, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v9, v8, v7
	v_fma_f32 v10, -v6, v9, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v9, v10, v7
	v_fma_f32 v6, -v6, v9, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v6, v6, v7, v9
	v_div_fixup_f32 v4, v6, v4, v5
	ds_store_b32 v16, v4
.LBB0_9:                                ;   in Loop: Header=BB0_5 Depth=2
	s_or_b32 exec_lo, exec_lo, s3
	v_cmp_lt_u32_e32 vcc_lo, s18, v12
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_b32 s4, s16, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s4
	s_cbranch_execz .LBB0_11
; %bb.10:                               ;   in Loop: Header=BB0_5 Depth=2
	ds_load_b32 v4, v2
	ds_load_b32 v5, v3
	ds_load_b32 v6, v16
	s_waitcnt lgkmcnt(0)
	v_fma_f32 v4, -v4, v5, v6
	ds_store_b32 v16, v4
.LBB0_11:                               ;   in Loop: Header=BB0_5 Depth=2
	s_or_b32 exec_lo, exec_lo, s3
	v_add_nc_u32_e32 v3, 4, v3
	v_add_nc_u32_e32 v2, 4, v2
	s_add_i32 s18, s18, 1
	s_waitcnt lgkmcnt(0)
	s_cmp_lg_u32 s18, 32
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB0_5
; %bb.12:                               ; %_Z10potrf_tilePf.exit
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v3, 0
	s_and_saveexec_b32 s3, s0
	s_cbranch_execz .LBB0_14
; %bb.13:                               ;   in Loop: Header=BB0_2 Depth=1
	ds_load_b32 v3, v16
.LBB0_14:                               ; %_Z11store_lowerPfS_iii.exit
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	v_mad_u64_u32 v[4:5], null, s15, s10, v[1:2]
	v_add_nc_u32_e32 v2, s17, v0
	s_add_i32 s15, s15, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_cmp_ge_i32 s15, s9
	s_waitcnt lgkmcnt(0)
	v_mad_u64_u32 v[5:6], null, v4, s5, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v6, 31, v5
	v_lshlrev_b64 v[4:5], 2, v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s6, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v5, vcc_lo
	global_store_b32 v[4:5], v3, off
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB0_34
; %bb.15:                               ; %.lr.ph82
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_mul_lo_u32 v3, v2, s8
	v_mov_b32_e32 v23, v19
	s_mov_b32 s3, s15
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[4:5], 2, v[3:4]
	v_add_nc_u32_e32 v3, s17, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, s6, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v5, vcc_lo
.LBB0_16:                               ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_17 Depth 3
                                        ;       Child Loop BB0_24 Depth 3
                                        ;         Child Loop BB0_25 Depth 4
                                        ;       Child Loop BB0_30 Depth 3
	v_mad_u64_u32 v[6:7], null, s3, s10, v[1:2]
	s_mov_b32 s4, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v24, v6, s5
	v_add_nc_u32_e32 v6, v24, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v7, 31, v6
	v_lshlrev_b64 v[7:8], 2, v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v7, vcc_lo, s6, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v8, vcc_lo
.LBB0_17:                               ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_16 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_mov_b32 s17, exec_lo
	v_cmpx_eq_u32_e64 s4, v0
	s_cbranch_execz .LBB0_19
; %bb.18:                               ;   in Loop: Header=BB0_17 Depth=3
	s_clause 0x1
	global_load_b32 v9, v[4:5], off
	global_load_b32 v10, v[7:8], off
	s_waitcnt vmcnt(0)
	v_div_scale_f32 v25, null, v9, v9, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v26, v25
	s_waitcnt_depctr 0xfff
	v_fma_f32 v27, -v25, v26, 1.0
	v_fmac_f32_e32 v26, v27, v26
	v_div_scale_f32 v27, vcc_lo, v10, v9, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v28, v27, v26
	v_fma_f32 v29, -v25, v28, v27
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v28, v29, v26
	v_fma_f32 v25, -v25, v28, v27
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v25, v25, v26, v28
	v_div_fixup_f32 v9, v25, v9, v10
	global_store_b32 v[7:8], v9, off
.LBB0_19:                               ;   in Loop: Header=BB0_17 Depth=3
	s_or_b32 exec_lo, exec_lo, s17
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s17, exec_lo
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_cmpx_lt_u32_e64 s4, v0
	s_cbranch_execz .LBB0_21
; %bb.20:                               ;   in Loop: Header=BB0_17 Depth=3
	v_add_nc_u32_e32 v9, s4, v23
	v_add_nc_u32_e32 v25, s4, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v10, 31, v9
	v_ashrrev_i32_e32 v26, 31, v25
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	v_lshlrev_b64 v[25:26], 2, v[25:26]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v9, vcc_lo, s6, v9
	v_add_co_ci_u32_e32 v10, vcc_lo, s7, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v25, vcc_lo, s6, v25
	v_add_co_ci_u32_e32 v26, vcc_lo, s7, v26, vcc_lo
	s_clause 0x2
	global_load_b32 v9, v[9:10], off
	global_load_b32 v10, v[25:26], off
	global_load_b32 v25, v[7:8], off
	s_waitcnt vmcnt(0)
	v_fma_f32 v9, -v10, v9, v25
	global_store_b32 v[7:8], v9, off
.LBB0_21:                               ;   in Loop: Header=BB0_17 Depth=3
	s_or_b32 exec_lo, exec_lo, s17
	s_add_i32 s4, s4, 1
	s_waitcnt_vscnt null, 0x0
	s_cmp_lg_u32 s4, 32
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB0_17
; %bb.22:                               ; %_Z9trsm_tilePfiii.exit.preheader
                                        ;   in Loop: Header=BB0_16 Depth=2
	s_cmp_ge_u32 s15, s3
	s_mov_b32 s4, s15
	s_cbranch_scc1 .LBB0_27
; %bb.23:                               ; %.lr.ph
                                        ;   in Loop: Header=BB0_16 Depth=2
	v_mov_b32_e32 v7, v22
	s_mov_b32 s4, s15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 2, v[6:7]
	v_add_co_u32 v7, vcc_lo, s6, v7
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v8, vcc_lo
.LBB0_24:                               ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_16 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB0_25 Depth 4
	v_mad_u64_u32 v[25:26], null, s4, s11, v[0:1]
	s_mov_b32 s17, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v9, v25, v24
	v_mad_u64_u32 v[26:27], null, v25, s5, v[3:4]
	v_mov_b32_e32 v27, v22
	v_ashrrev_i32_e32 v10, 31, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[25:26], 2, v[26:27]
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v9, vcc_lo, s6, v9
	v_add_co_ci_u32_e32 v10, vcc_lo, s7, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v25, vcc_lo, s6, v25
	v_add_co_ci_u32_e32 v26, vcc_lo, s7, v26, vcc_lo
	global_load_b32 v28, v[9:10], off
	s_waitcnt vmcnt(0)
	ds_store_b32 v16, v28
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_clause 0x1
	global_load_b32 v26, v[25:26], off
	global_load_b32 v27, v[7:8], off
	v_mov_b32_e32 v25, 0
	s_waitcnt vmcnt(1)
	ds_store_b32 v18, v26
	s_waitcnt vmcnt(0)
	ds_store_b32 v21, v27
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB0_25:                               ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_16 Depth=2
                                        ;       Parent Loop BB0_24 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	v_add_nc_u32_e32 v26, s17, v15
	v_add_nc_u32_e32 v27, s17, v14
	s_addk_i32 s17, 0x80
	ds_load_b32 v26, v26
	ds_load_b32 v27, v27
	s_cmpk_lg_i32 s17, 0x1000
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v25, v26, v27
	s_cbranch_scc1 .LBB0_25
; %bb.26:                               ; %_Z9syrk_tilePfS_iiii.exit
                                        ;   in Loop: Header=BB0_24 Depth=3
	ds_load_b32 v26, v16
	s_add_i32 s4, s4, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lt_u32 s4, s3
	s_waitcnt lgkmcnt(0)
	v_sub_f32_e32 v25, v26, v25
	ds_store_b32 v16, v25
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v25, v16
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[9:10], v25, off
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB0_24
.LBB0_27:                               ; %_Z9trsm_tilePfiii.exit._crit_edge
                                        ;   in Loop: Header=BB0_16 Depth=2
	v_mov_b32_e32 v8, 0
	v_mov_b32_e32 v10, 0
	s_mul_i32 s4, s4, s11
	s_and_saveexec_b32 s17, s0
	s_cbranch_execz .LBB0_29
; %bb.28:                               ;   in Loop: Header=BB0_16 Depth=2
	v_add3_u32 v9, v24, v0, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v10, 31, v9
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v9, vcc_lo, s6, v9
	v_add_co_ci_u32_e32 v10, vcc_lo, s7, v10, vcc_lo
	global_load_b32 v10, v[9:10], off
.LBB0_29:                               ; %_Z10load_lowerPfS_iii.exit67
                                        ;   in Loop: Header=BB0_16 Depth=2
	s_or_b32 exec_lo, exec_lo, s17
	v_add_nc_u32_e32 v9, s4, v0
	v_mov_b32_e32 v7, v22
	s_waitcnt vmcnt(0)
	ds_store_b32 v16, v10
	s_waitcnt lgkmcnt(0)
	s_barrier
	v_mad_u64_u32 v[25:26], null, v9, s5, v[3:4]
	v_mov_b32_e32 v26, v22
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	buffer_gl0_inv
	s_mov_b32 s4, 0
	v_lshlrev_b64 v[25:26], 2, v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v25, vcc_lo, s6, v25
	v_add_co_ci_u32_e32 v26, vcc_lo, s7, v26, vcc_lo
	v_add_co_u32 v6, vcc_lo, s6, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v7, vcc_lo
	s_clause 0x1
	global_load_b32 v10, v[25:26], off
	global_load_b32 v6, v[6:7], off
	s_waitcnt vmcnt(1)
	ds_store_b32 v18, v10
	s_waitcnt vmcnt(0)
	ds_store_b32 v21, v6
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB0_30:                               ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_16 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	v_add_nc_u32_e32 v6, s4, v15
	v_add_nc_u32_e32 v7, s4, v14
	s_addk_i32 s4, 0x80
	ds_load_b32 v6, v6
	ds_load_b32 v7, v7
	s_cmpk_lg_i32 s4, 0x1000
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v8, v6, v7
	s_cbranch_scc1 .LBB0_30
; %bb.31:                               ; %_Z9syrk_tilePfS_iiii.exit73
                                        ;   in Loop: Header=BB0_16 Depth=2
	ds_load_b32 v6, v16
	s_waitcnt lgkmcnt(0)
	v_dual_sub_f32 v7, v6, v8 :: v_dual_mov_b32 v6, 0
	ds_store_b32 v16, v7
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB0_33
; %bb.32:                               ;   in Loop: Header=BB0_16 Depth=2
	ds_load_b32 v6, v16
.LBB0_33:                               ; %_Z11store_lowerPfS_iii.exit78
                                        ;   in Loop: Header=BB0_16 Depth=2
	s_or_b32 exec_lo, exec_lo, s4
	v_add_nc_u32_e32 v7, v9, v24
	v_add_nc_u32_e32 v23, s12, v23
	s_add_i32 s3, s3, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_cmp_ge_i32 s3, s9
	v_ashrrev_i32_e32 v8, 31, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 2, v[7:8]
	v_add_co_u32 v7, vcc_lo, s6, v7
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v8, vcc_lo
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[7:8], v6, off
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB0_16
.LBB0_34:                               ; %.loopexit
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_add_nc_u32_e32 v19, s13, v19
	v_add_nc_u32_e32 v20, s14, v20
	s_cmp_eq_u32 s15, s9
	s_cbranch_scc0 .LBB0_2
.LBB0_35:                               ; %._crit_edge
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z27right_looking_launch_kernelPfi
		.amdhsa_group_segment_fixed_size 12292
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 30
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z27right_looking_launch_kernelPfi, .Lfunc_end0-_Z27right_looking_launch_kernelPfi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2200
; NumSgprs: 22
; NumVgprs: 30
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 12292 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 30
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 12292
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z27right_looking_launch_kernelPfi
    .private_segment_fixed_size: 0
    .sgpr_count:     22
    .sgpr_spill_count: 0
    .symbol:         _Z27right_looking_launch_kernelPfi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     30
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
