
#include "cuda_runtime.h"
#include "device_launch_parameters.h"

#include <stdio.h>
#include <stdlib.h>
#include <time.h>
#include <math.h>



float secuential(const int array[] , int dim){
	float mean=0;
	for(int i=0; i<dim;i++){
		mean+=array[i];
	}
	mean=mean/dim;
	float sum=0;
	for(int i=0; i<dim;i++){
		sum+=(array[i]-mean)*(array[i]-mean);
	}
	return sqrt(sum/(dim-1));

}

     
__global__ void func( const int array[] , int dim,float result[], const int thread_number)
{
    int index = blockIdx.x* blockDim.x* blockDim.y* blockDim.z+threadIdx.z* blockDim.y* blockDim.x+ threadIdx.y* blockDim.x+ threadIdx.x;
 	//printf("sum:%i\n",  result[0]);
	if(index<dim){
		if(dim<=thread_number){ //if more threads than array size
		//	printf("Thread %i; Adding value of index %i\n", index, index, array[index]);
			atomicAdd(result,array[index]);
		}
		else{ //if less threads than array size
			if(index!=thread_number-1){//if not last thread deal with size_array/thread_nb array entries
				for(int i=index*(int)(dim/thread_number); i< index*(int)(dim/thread_number)+(int)(dim/thread_number); i++){
			//		printf("Thread %i; Adding value of index %i\n", index, i, array[i]);
					atomicAdd(result,array[i]);
				}
			}
			else{ //if last thread deal with all remaining array entries
				for(int i=index*(int)(dim/thread_number); i< dim; i++){
				//	printf("Thread %i; Adding value of index %i\n",index, i, array[i]);
					atomicAdd(result,array[i]);
				}
			}
		}
		//printf("sum:%i\n",  result[0]);
	}
	
	 __syncthreads();

	float mean=result[0]/dim;
	result[0]=0;
	if(index<dim){
		if(dim<=thread_number){ //if more threads than array size
			//printf("Thread %i; Adding value of index %i\n", index, index, array[index]);
			atomicAdd(result,(array[index]-mean)*(array[index]-mean));
		}
		else{ //if less threads than array size
			if(index!=thread_number-1){//if not last thread deal with size_array/thread_nb array entries
				for(int i=index*(int)(dim/thread_number); i< index*(int)(dim/thread_number)+(int)(dim/thread_number); i++){
					//printf("Thread %i; Adding value of index %i\n", index, i, array[i]);
					atomicAdd(result,(array[i]-mean)*(array[i]-mean));
				}
			}
			else{ //if last thread deal with all remaining array entries
				for(int i=index*(int)(dim/thread_number); i< dim; i++){
					//printf("Thread %i; Adding value of index %i\n",index, i, array[i]);
					atomicAdd(result,(array[i]-mean)*(array[i]-mean));
				}
			}
		}
	}
	 __syncthreads();
	result[0]=sqrt(result[0]/(dim-1));
} 


    
int main(int argc, char *argv[]){
	//Measure time
	clock_t time_begin;
	
    // pointers to host & device arrays
     int *device_array = 0;
     int *host_array = 0;
	 int size_array=9;
	 float *d_gpu_res=NULL;
	 float *h_gpu_res= 0;
	 bool verbose=false;
	 int N=1;
	 if(argc == 3){
		 size_array=atoi(argv[1]);
		 N=atoi(argv[2]);
	 }
	 else if(argc== 4 ){
		 size_array=atoi(argv[1]);
		 N=atoi(argv[2]);
		 verbose=(argv[3][0]=='v');
	 }
	 
	 h_gpu_res=( float*)malloc(sizeof( float));
	 h_gpu_res[0]=0;
      // malloc a host array
     host_array = (int*)malloc( size_array * sizeof(int));
	
    for(int i=0; i<size_array; i++){
		host_array[i]=rand()%10;
		if(argc==4 && verbose){
			printf("%i\t", host_array[i]);
		}
		else if(argc==4)
			host_array[i]=atoi(argv[3]);
    }
    printf("\n");
	
	
     // cudaMalloc a device array
     cudaMalloc(&device_array,size_array * sizeof(int));    
	 cudaError_t er=cudaMalloc(&d_gpu_res, sizeof(float));  
    // download and inspect the result on the host:
    cudaError_t e=cudaMemcpy(device_array, host_array, sizeof(int)*size_array, cudaMemcpyHostToDevice); 
	cudaError_t error=cudaMemcpy(d_gpu_res, h_gpu_res, sizeof(int), cudaMemcpyHostToDevice);
	//cudaerrorinvalidvalue(11)

    dim3 bloque(N,N); //Bloque bidimensional de N*N hilos
    dim3 grid(1,1);  //Grid bidimensional de M*M bloques
	int thread_number= N*N;
	if (N*N > 512){
            bloque.x = 512;
            bloque.y = 512;
            grid.x = ceil(double(N)/double(bloque.x));
            grid.y = ceil(double(N)/double(bloque.y));
     }
	time_begin=clock();
    func<<<grid, bloque>>>(device_array, size_array , d_gpu_res, thread_number);
    cudaThreadSynchronize();
    // download and inspect the result on the host:
   //cudaMemcpy(host_array, device_array, sizeof(int)*size_array, cudaMemcpyDeviceToHost); 
	cudaMemcpy(h_gpu_res, d_gpu_res, sizeof(int), cudaMemcpyDeviceToHost); 
	printf("GPU time: %f seconds\t", (((float)clock() - (float)time_begin) / 1000000.0F ) * 1000  ); //1.215s
	printf("GPU result: %f\n", h_gpu_res[0]);
	
	time_begin=clock();
	float cpu_res=secuential(host_array, size_array);
	printf("CPU time: %f seconds\t", (((float)clock() - (float)time_begin) / 1000000.0F ) * 1000  ); //1.215s
	printf("CPU result: %f\n", cpu_res);

     // deallocate memory
      free(host_array);free(h_gpu_res);
      cudaFree(device_array); cudaFree(d_gpu_res);

	

}
	.file	"tmpxft_00292c7e_00000000-6_entrega1_2.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z10secuentialPKii
	.type	_Z10secuentialPKii, @function
_Z10secuentialPKii:
.LFB2027:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
	xorps	%xmm0, %xmm0
.L3:
	cmpl	%eax, %esi
	jle	.L8
	cvtsi2ssl	(%rdi,%rax,4), %xmm1
	incq	%rax
	addss	%xmm1, %xmm0
	jmp	.L3
.L8:
	cvtsi2ssl	%esi, %xmm1
	movaps	%xmm0, %xmm2
	xorps	%xmm0, %xmm0
	xorl	%eax, %eax
	divss	%xmm1, %xmm2
.L5:
	cmpl	%eax, %esi
	jle	.L9
	cvtsi2ssl	(%rdi,%rax,4), %xmm1
	incq	%rax
	subss	%xmm2, %xmm1
	mulss	%xmm1, %xmm1
	addss	%xmm1, %xmm0
	jmp	.L5
.L9:
	decl	%esi
	cvtsi2ssl	%esi, %xmm1
	divss	%xmm1, %xmm0
	jmp	sqrtf@PLT
	.cfi_endproc
.LFE2027:
	.size	_Z10secuentialPKii, .-_Z10secuentialPKii
	.globl	_Z28__device_stub__Z4funcPKiiPfiPKiiPfi
	.type	_Z28__device_stub__Z4funcPKiiPfiPKiiPfi, @function
_Z28__device_stub__Z4funcPKiiPfiPKiiPfi:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movl	%esi, 20(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 16(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L10
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z4funcPKiiPfi(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L10:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L12
	call	__stack_chk_fail@PLT
.L12:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z28__device_stub__Z4funcPKiiPfiPKiiPfi, .-_Z28__device_stub__Z4funcPKiiPfiPKiiPfi
	.globl	_Z4funcPKiiPfi
	.type	_Z4funcPKiiPfi, @function
_Z4funcPKiiPfi:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z28__device_stub__Z4funcPKiiPfiPKiiPfi
	.cfi_endproc
.LFE2054:
	.size	_Z4funcPKiiPfi, .-_Z4funcPKiiPfi
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"%i\t"
.LC2:
	.string	"\n"
.LC6:
	.string	"GPU time: %f seconds\t"
.LC7:
	.string	"GPU result: %f\n"
.LC8:
	.string	"CPU time: %f seconds\t"
.LC9:
	.string	"CPU result: %f\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	%edi, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rsi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	xorl	%eax, %eax
	movq	%rax, 32(%rsp)
	movq	%rax, 40(%rsp)
	cmpl	$3, %edi
	jne	.L16
	movq	8(%rsi), %rdi
	xorl	%r15d, %r15d
	call	atoi@PLT
	movq	16(%r12), %rdi
	movl	%eax, %ebp
	call	atoi@PLT
	movl	%eax, %ebx
	jmp	.L17
.L16:
	cmpl	$4, %edi
	jne	.L26
	movq	8(%rsi), %rdi
	call	atoi@PLT
	movq	16(%r12), %rdi
	movl	%eax, %ebp
	call	atoi@PLT
	movl	%eax, %ebx
	movq	24(%r12), %rax
	cmpb	$118, (%rax)
	sete	%r15b
	jmp	.L17
.L26:
	movl	$1, %ebx
	xorl	%r15d, %r15d
	movl	$9, %ebp
.L17:
	movl	$4, %edi
	xorl	%r14d, %r14d
	call	malloc@PLT
	movq	%rax, 8(%rsp)
	movl	$0x00000000, (%rax)
	movslq	%ebp, %rax
	salq	$2, %rax
	movq	%rax, %rdi
	movq	%rax, 24(%rsp)
	call	malloc@PLT
	movq	%rax, 16(%rsp)
.L18:
	cmpl	%r14d, %ebp
	jle	.L34
	call	rand@PLT
	movl	$10, %ecx
	cltd
	idivl	%ecx
	movq	16(%rsp), %rax
	movl	%edx, (%rax,%r14,4)
	cmpl	$4, %r13d
	jne	.L20
	testb	%r15b, %r15b
	je	.L19
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L20
.L19:
	cmpl	$4, %r13d
	jne	.L20
	movq	24(%r12), %rdi
	call	atoi@PLT
	movq	16(%rsp), %rdx
	movl	%eax, (%rdx,%r14,4)
.L20:
	incq	%r14
	jmp	.L18
.L34:
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	movl	%ebx, %r12d
	call	__printf_chk@PLT
	movq	24(%rsp), %rsi
	leaq	32(%rsp), %rdi
	imull	%ebx, %r12d
	call	cudaMalloc@PLT
	leaq	40(%rsp), %rdi
	movl	$4, %esi
	call	cudaMalloc@PLT
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movl	$1, %ecx
	movq	32(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rsi
	movq	40(%rsp), %rdi
	movl	$1, %ecx
	movl	$4, %edx
	call	cudaMemcpy@PLT
	movl	$1, 56(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	cmpl	$512, %r12d
	jle	.L23
	cvtsi2sdl	%ebx, %xmm0
	mulsd	.LC3(%rip), %xmm0
	movl	$512, %ebx
	call	ceil@PLT
	cvttsd2siq	%xmm0, %rax
	movl	%eax, 60(%rsp)
	movl	%eax, 64(%rsp)
.L23:
	call	clock@PLT
	movl	%ebx, 48(%rsp)
	movl	56(%rsp), %ecx
	xorl	%r9d, %r9d
	movl	%ebx, 52(%rsp)
	movq	60(%rsp), %rdi
	xorl	%r8d, %r8d
	movq	%rax, %r13
	movq	48(%rsp), %rdx
	movl	68(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L24
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rdi
	movl	%r12d, %ecx
	movl	%ebp, %esi
	call	_Z28__device_stub__Z4funcPKiiPfiPKiiPfi
.L24:
	call	cudaThreadSynchronize@PLT
	movq	40(%rsp), %rsi
	movq	8(%rsp), %rdi
	movl	$2, %ecx
	movl	$4, %edx
	call	cudaMemcpy@PLT
	call	clock@PLT
	cvtsi2ssq	%r13, %xmm1
	movl	$2, %edi
	leaq	.LC6(%rip), %rsi
	cvtsi2ssq	%rax, %xmm0
	movb	$1, %al
	subss	%xmm1, %xmm0
	divss	.LC4(%rip), %xmm0
	mulss	.LC5(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	movq	8(%rsp), %rax
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	cvtss2sd	(%rax), %xmm0
	movb	$1, %al
	call	__printf_chk@PLT
	call	clock@PLT
	movq	16(%rsp), %rdi
	movl	%ebp, %esi
	movq	%rax, %r12
	call	_Z10secuentialPKii
	movd	%xmm0, %ebx
	call	clock@PLT
	cvtsi2ssq	%r12, %xmm1
	movl	$2, %edi
	leaq	.LC8(%rip), %rsi
	cvtsi2ssq	%rax, %xmm0
	movb	$1, %al
	subss	%xmm1, %xmm0
	divss	.LC4(%rip), %xmm0
	mulss	.LC5(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	movd	%ebx, %xmm2
	movl	$2, %edi
	leaq	.LC9(%rip), %rsi
	movb	$1, %al
	cvtss2sd	%xmm2, %xmm0
	call	__printf_chk@PLT
	movq	16(%rsp), %rdi
	call	free@PLT
	movq	8(%rsp), %rdi
	call	free@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L25
	call	__stack_chk_fail@PLT
.L25:
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	main, .-main
	.section	.rodata.str1.1
.LC10:
	.string	"_Z4funcPKiiPfi"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2056:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC10(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z4funcPKiiPfi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2056:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC3:
	.long	0
	.long	1063256064
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC4:
	.long	1232348160
	.align 4
.LC5:
	.long	1148846080
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include "hip/hip_runtime.h"


#include <stdio.h>
#include <stdlib.h>
#include <time.h>
#include <math.h>



float secuential(const int array[] , int dim){
	float mean=0;
	for(int i=0; i<dim;i++){
		mean+=array[i];
	}
	mean=mean/dim;
	float sum=0;
	for(int i=0; i<dim;i++){
		sum+=(array[i]-mean)*(array[i]-mean);
	}
	return sqrt(sum/(dim-1));

}

     
__global__ void func( const int array[] , int dim,float result[], const int thread_number)
{
    int index = blockIdx.x* blockDim.x* blockDim.y* blockDim.z+threadIdx.z* blockDim.y* blockDim.x+ threadIdx.y* blockDim.x+ threadIdx.x;
 	//printf("sum:%i\n",  result[0]);
	if(index<dim){
		if(dim<=thread_number){ //if more threads than array size
		//	printf("Thread %i; Adding value of index %i\n", index, index, array[index]);
			atomicAdd(result,array[index]);
		}
		else{ //if less threads than array size
			if(index!=thread_number-1){//if not last thread deal with size_array/thread_nb array entries
				for(int i=index*(int)(dim/thread_number); i< index*(int)(dim/thread_number)+(int)(dim/thread_number); i++){
			//		printf("Thread %i; Adding value of index %i\n", index, i, array[i]);
					atomicAdd(result,array[i]);
				}
			}
			else{ //if last thread deal with all remaining array entries
				for(int i=index*(int)(dim/thread_number); i< dim; i++){
				//	printf("Thread %i; Adding value of index %i\n",index, i, array[i]);
					atomicAdd(result,array[i]);
				}
			}
		}
		//printf("sum:%i\n",  result[0]);
	}
	
	 __syncthreads();

	float mean=result[0]/dim;
	result[0]=0;
	if(index<dim){
		if(dim<=thread_number){ //if more threads than array size
			//printf("Thread %i; Adding value of index %i\n", index, index, array[index]);
			atomicAdd(result,(array[index]-mean)*(array[index]-mean));
		}
		else{ //if less threads than array size
			if(index!=thread_number-1){//if not last thread deal with size_array/thread_nb array entries
				for(int i=index*(int)(dim/thread_number); i< index*(int)(dim/thread_number)+(int)(dim/thread_number); i++){
					//printf("Thread %i; Adding value of index %i\n", index, i, array[i]);
					atomicAdd(result,(array[i]-mean)*(array[i]-mean));
				}
			}
			else{ //if last thread deal with all remaining array entries
				for(int i=index*(int)(dim/thread_number); i< dim; i++){
					//printf("Thread %i; Adding value of index %i\n",index, i, array[i]);
					atomicAdd(result,(array[i]-mean)*(array[i]-mean));
				}
			}
		}
	}
	 __syncthreads();
	result[0]=sqrt(result[0]/(dim-1));
} 


    
int main(int argc, char *argv[]){
	//Measure time
	clock_t time_begin;
	
    // pointers to host & device arrays
     int *device_array = 0;
     int *host_array = 0;
	 int size_array=9;
	 float *d_gpu_res=NULL;
	 float *h_gpu_res= 0;
	 bool verbose=false;
	 int N=1;
	 if(argc == 3){
		 size_array=atoi(argv[1]);
		 N=atoi(argv[2]);
	 }
	 else if(argc== 4 ){
		 size_array=atoi(argv[1]);
		 N=atoi(argv[2]);
		 verbose=(argv[3][0]=='v');
	 }
	 
	 h_gpu_res=( float*)malloc(sizeof( float));
	 h_gpu_res[0]=0;
      // malloc a host array
     host_array = (int*)malloc( size_array * sizeof(int));
	
    for(int i=0; i<size_array; i++){
		host_array[i]=rand()%10;
		if(argc==4 && verbose){
			printf("%i\t", host_array[i]);
		}
		else if(argc==4)
			host_array[i]=atoi(argv[3]);
    }
    printf("\n");
	
	
     // cudaMalloc a device array
     hipMalloc(&device_array,size_array * sizeof(int));    
	 hipError_t er=hipMalloc(&d_gpu_res, sizeof(float));  
    // download and inspect the result on the host:
    hipError_t e=hipMemcpy(device_array, host_array, sizeof(int)*size_array, hipMemcpyHostToDevice); 
	hipError_t error=hipMemcpy(d_gpu_res, h_gpu_res, sizeof(int), hipMemcpyHostToDevice);
	//cudaerrorinvalidvalue(11)

    dim3 bloque(N,N); //Bloque bidimensional de N*N hilos
    dim3 grid(1,1);  //Grid bidimensional de M*M bloques
	int thread_number= N*N;
	if (N*N > 512){
            bloque.x = 512;
            bloque.y = 512;
            grid.x = ceil(double(N)/double(bloque.x));
            grid.y = ceil(double(N)/double(bloque.y));
     }
	time_begin=clock();
    func<<<grid, bloque>>>(device_array, size_array , d_gpu_res, thread_number);
    hipDeviceSynchronize();
    // download and inspect the result on the host:
   //cudaMemcpy(host_array, device_array, sizeof(int)*size_array, cudaMemcpyDeviceToHost); 
	hipMemcpy(h_gpu_res, d_gpu_res, sizeof(int), hipMemcpyDeviceToHost); 
	printf("GPU time: %f seconds\t", (((float)clock() - (float)time_begin) / 1000000.0F ) * 1000  ); //1.215s
	printf("GPU result: %f\n", h_gpu_res[0]);
	
	time_begin=clock();
	float cpu_res=secuential(host_array, size_array);
	printf("CPU time: %f seconds\t", (((float)clock() - (float)time_begin) / 1000000.0F ) * 1000  ); //1.215s
	printf("CPU result: %f\n", cpu_res);

     // deallocate memory
      free(host_array);free(h_gpu_res);
      hipFree(device_array); hipFree(d_gpu_res);

	

}
	.text
	.file	"entrega1_2.hip"
	.globl	_Z10secuentialPKii              # -- Begin function _Z10secuentialPKii
	.type	_Z10secuentialPKii,@function
_Z10secuentialPKii:                     # @_Z10secuentialPKii
	.cfi_startproc
# %bb.0:
	xorps	%xmm1, %xmm1
	xorps	%xmm0, %xmm0
	testl	%esi, %esi
	jle	.LBB0_5
# %bb.1:                                # %.lr.ph.preheader
	movl	%esi, %eax
	xorps	%xmm2, %xmm2
	xorl	%ecx, %ecx
.LBB0_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtsi2ssl	(%rdi,%rcx,4), %xmm0
	addss	%xmm0, %xmm2
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB0_2
# %bb.3:                                # %._crit_edge
	testl	%esi, %esi
	jle	.LBB0_4
# %bb.7:                                # %.lr.ph28.preheader
	xorps	%xmm0, %xmm0
	cvtsi2ss	%esi, %xmm0
	divss	%xmm0, %xmm2
	xorps	%xmm0, %xmm0
	xorl	%ecx, %ecx
.LBB0_8:                                # %.lr.ph28
                                        # =>This Inner Loop Header: Depth=1
	xorps	%xmm3, %xmm3
	cvtsi2ssl	(%rdi,%rcx,4), %xmm3
	subss	%xmm2, %xmm3
	mulss	%xmm3, %xmm3
	addss	%xmm3, %xmm0
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB0_8
	jmp	.LBB0_5
.LBB0_4:
	xorps	%xmm0, %xmm0
.LBB0_5:                                # %._crit_edge29
	decl	%esi
	xorps	%xmm2, %xmm2
	cvtsi2ss	%esi, %xmm2
	divss	%xmm2, %xmm0
	ucomiss	%xmm1, %xmm0
	jb	sqrtf                           # TAILCALL
# %bb.6:                                # %._crit_edge29.split
	sqrtss	%xmm0, %xmm0
	retq
.Lfunc_end0:
	.size	_Z10secuentialPKii, .Lfunc_end0-_Z10secuentialPKii
	.cfi_endproc
                                        # -- End function
	.globl	_Z19__device_stub__funcPKiiPfi  # -- Begin function _Z19__device_stub__funcPKiiPfi
	.type	_Z19__device_stub__funcPKiiPfi,@function
_Z19__device_stub__funcPKiiPfi:         # @_Z19__device_stub__funcPKiiPfi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	12(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	32(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z4funcPKiiPfi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z19__device_stub__funcPKiiPfi, .Lfunc_end1-_Z19__device_stub__funcPKiiPfi
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI2_0:
	.quad	0x3f60000000000000              # double 0.001953125
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0
.LCPI2_1:
	.long	0x49742400                      # float 1.0E+6
.LCPI2_2:
	.long	0x447a0000                      # float 1000
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %r12
	movl	%edi, %r13d
	xorl	%eax, %eax
	movq	%rax, 16(%rsp)
	movq	%rax, 8(%rsp)
	cmpl	$4, %edi
	je	.LBB2_4
# %bb.1:
	movb	$1, %r14b
	cmpl	$3, %r13d
	jne	.LBB2_2
# %bb.3:
	movq	8(%r12), %rdi
	callq	atoi
	movl	%eax, %ebx
	movq	16(%r12), %rdi
	callq	atoi
	movl	%eax, 4(%rsp)                   # 4-byte Spill
	jmp	.LBB2_5
.LBB2_4:
	movq	8(%r12), %rdi
	callq	atoi
	movl	%eax, %ebx
	movq	16(%r12), %rdi
	callq	atoi
	movl	%eax, 4(%rsp)                   # 4-byte Spill
	movq	24(%r12), %rax
	cmpb	$118, (%rax)
	setne	%r14b
	jmp	.LBB2_5
.LBB2_2:
	movl	$9, %ebx
	movl	$1, 4(%rsp)                     # 4-byte Folded Spill
.LBB2_5:
	movl	$4, %edi
	callq	malloc
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	movl	$0, (%rax)
	movl	%ebx, (%rsp)                    # 4-byte Spill
	movslq	%ebx, %rbx
	leaq	(,%rbx,4), %rdi
	movq	%rdi, 24(%rsp)                  # 8-byte Spill
	callq	malloc
	movq	%rax, %r15
	testl	%ebx, %ebx
	jle	.LBB2_9
# %bb.6:                                # %.lr.ph
	cmpl	$4, %r13d
	setne	%bpl
	orb	%r14b, %bpl
	movl	(%rsp), %r14d                   # 4-byte Reload
	xorl	%ebx, %ebx
.LBB2_7:                                # =>This Inner Loop Header: Depth=1
	callq	rand
	movslq	%eax, %rsi
	imulq	$1717986919, %rsi, %rax         # imm = 0x66666667
	movq	%rax, %rcx
	shrq	$63, %rcx
	sarq	$34, %rax
	addl	%ecx, %eax
	addl	%eax, %eax
	leal	(%rax,%rax,4), %eax
	subl	%eax, %esi
	movl	%esi, (%r15,%rbx,4)
	testb	%bpl, %bpl
	je	.LBB2_8
# %bb.11:                               #   in Loop: Header=BB2_7 Depth=1
	cmpl	$4, %r13d
	jne	.LBB2_13
# %bb.12:                               #   in Loop: Header=BB2_7 Depth=1
	movq	24(%r12), %rdi
	callq	atoi
	movl	%eax, (%r15,%rbx,4)
	jmp	.LBB2_13
.LBB2_8:                                #   in Loop: Header=BB2_7 Depth=1
	movl	$.L.str, %edi
                                        # kill: def $esi killed $esi killed $rsi
	xorl	%eax, %eax
	callq	printf
.LBB2_13:                               #   in Loop: Header=BB2_7 Depth=1
	incq	%rbx
	cmpq	%rbx, %r14
	jne	.LBB2_7
.LBB2_9:                                # %._crit_edge
	movabsq	$4294967297, %r12               # imm = 0x100000001
	movl	$10, %edi
	callq	putchar@PLT
	leaq	16(%rsp), %r13
	movq	%r13, %rdi
	movq	24(%rsp), %rbx                  # 8-byte Reload
	movq	%rbx, %rsi
	callq	hipMalloc
	leaq	8(%rsp), %rbp
	movl	$4, %esi
	movq	%rbp, %rdi
	callq	hipMalloc
	movq	(%r13), %rdi
	movq	%r15, %rsi
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbp), %rdi
	movl	$4, %edx
	movq	32(%rsp), %r14                  # 8-byte Reload
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	4(%rsp), %eax                   # 4-byte Reload
	movl	%eax, %ebx
	imull	%eax, %ebx
	cmpl	$512, %ebx                      # imm = 0x200
	jbe	.LBB2_10
# %bb.14:
	cvtsi2sd	%eax, %xmm0
	mulsd	.LCPI2_0(%rip), %xmm0
	callq	ceil@PLT
	cvttsd2si	%xmm0, %rax
	movl	%eax, %eax
	imulq	%rax, %r12
	movabsq	$2199023256064, %rbp            # imm = 0x20000000200
	jmp	.LBB2_15
.LBB2_10:
	movl	%eax, %eax
	movq	%rax, %rbp
	shlq	$32, %rbp
	orq	%rax, %rbp
.LBB2_15:
	callq	clock
	movq	%rax, %r13
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	movl	(%rsp), %ebp                    # 4-byte Reload
	jne	.LBB2_17
# %bb.16:
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rdx
	movl	%ebp, %esi
	movl	%ebx, %ecx
	callq	_Z19__device_stub__funcPKiiPfi
.LBB2_17:
	callq	hipDeviceSynchronize
	movq	8(%rsp), %rsi
	movl	$4, %edx
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	callq	clock
	xorps	%xmm0, %xmm0
	cvtsi2ss	%rax, %xmm0
	cvtsi2ss	%r13, %xmm1
	subss	%xmm1, %xmm0
	divss	.LCPI2_1(%rip), %xmm0
	mulss	.LCPI2_2(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.2, %edi
	movb	$1, %al
	callq	printf
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r14), %xmm0
	movl	$.L.str.3, %edi
	movb	$1, %al
	callq	printf
	callq	clock
	movq	%rax, %rbx
	movq	%r15, %rdi
	movl	%ebp, %esi
	callq	_Z10secuentialPKii
	movss	%xmm0, (%rsp)                   # 4-byte Spill
	callq	clock
	xorps	%xmm0, %xmm0
	cvtsi2ss	%rax, %xmm0
	xorps	%xmm1, %xmm1
	cvtsi2ss	%rbx, %xmm1
	subss	%xmm1, %xmm0
	divss	.LCPI2_1(%rip), %xmm0
	mulss	.LCPI2_2(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.4, %edi
	movb	$1, %al
	callq	printf
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rsp), %xmm0                   # 4-byte Folded Reload
	movl	$.L.str.5, %edi
	movb	$1, %al
	callq	printf
	movq	%r15, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z4funcPKiiPfi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z4funcPKiiPfi,@object          # @_Z4funcPKiiPfi
	.section	.rodata,"a",@progbits
	.globl	_Z4funcPKiiPfi
	.p2align	3, 0x0
_Z4funcPKiiPfi:
	.quad	_Z19__device_stub__funcPKiiPfi
	.size	_Z4funcPKiiPfi, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"%i\t"
	.size	.L.str, 4

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"GPU time: %f seconds\t"
	.size	.L.str.2, 22

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"GPU result: %f\n"
	.size	.L.str.3, 16

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"CPU time: %f seconds\t"
	.size	.L.str.4, 22

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"CPU result: %f\n"
	.size	.L.str.5, 16

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z4funcPKiiPfi"
	.size	.L__unnamed_1, 15

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z19__device_stub__funcPKiiPfi
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z4funcPKiiPfi
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z4funcPKiiPfi          ; -- Begin function _Z4funcPKiiPfi
	.globl	_Z4funcPKiiPfi
	.p2align	8
	.type	_Z4funcPKiiPfi,@function
_Z4funcPKiiPfi:                         ; @_Z4funcPKiiPfi
; %bb.0:
	s_load_b64 s[8:9], s[0:1], 0x2c
	v_bfe_u32 v1, v0, 20, 10
	s_clause 0x1
	s_load_b64 s[4:5], s[0:1], 0x0
	s_load_b32 s6, s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s9, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mad_u64_u32 v[2:3], null, s15, s2, v[1:2]
	v_bfe_u32 v1, v0, 10, 10
	s_lshr_b32 s2, s8, 16
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[3:4], null, v2, s2, v[1:2]
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x10
	s_load_b32 s1, s[0:1], 0x18
	v_and_b32_e32 v2, 0x3ff, v0
	s_and_b32 s0, s8, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, v3, s0, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s0, s6, v0
	s_and_saveexec_b32 s7, s0
	s_cbranch_execz .LBB0_31
; %bb.1:
	s_waitcnt lgkmcnt(0)
	s_cmp_gt_i32 s6, s1
	s_mov_b32 s8, -1
	s_cbranch_scc1 .LBB0_9
; %bb.2:
	v_ashrrev_i32_e32 v1, 31, v0
	v_bfrev_b32_e32 v3, 1
	s_mov_b32 s8, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[0:1]
	v_add_co_u32 v1, vcc_lo, s4, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s5, v2, vcc_lo
	global_load_b32 v1, v[1:2], off
	s_waitcnt vmcnt(0)
	v_cvt_f32_i32_e32 v1, v1
.LBB0_3:                                ; %ComputeLoop
                                        ; =>This Inner Loop Header: Depth=1
	s_ctz_i32_b32 s9, s8
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_readlane_b32 s10, v1, s9
	s_lshl_b32 s9, 1, s9
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s8, s8, s9
	s_cmp_lg_u32 s8, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v3, s10, v3
	s_cbranch_scc1 .LBB0_3
; %bb.4:                                ; %ComputeEnd
	v_mbcnt_lo_u32_b32 v1, exec_lo, 0
	s_mov_b32 s8, 0
	s_mov_b32 s9, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v1
	s_xor_b32 s9, exec_lo, s9
	s_cbranch_execz .LBB0_8
; %bb.5:
	s_load_b32 s10, s[2:3], 0x0
	v_mov_b32_e32 v4, 0
	s_waitcnt lgkmcnt(0)
	v_mov_b32_e32 v2, s10
	s_mov_b32 s10, 0
.LBB0_6:                                ; %atomicrmw.start
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v1, v2, v3
	global_atomic_cmpswap_b32 v1, v4, v[1:2], s[2:3] glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v1, v2
	v_mov_b32_e32 v2, v1
	s_or_b32 s10, vcc_lo, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s10
	s_cbranch_execnz .LBB0_6
; %bb.7:                                ; %Flow194
	s_or_b32 exec_lo, exec_lo, s10
.LBB0_8:                                ; %Flow195
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s9
.LBB0_9:                                ; %Flow206
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s8
	s_cbranch_vccz .LBB0_31
; %bb.10:
	s_ashr_i32 s8, s1, 31
	s_ashr_i32 s12, s6, 31
	s_add_i32 s9, s1, s8
	s_add_i32 s13, s6, s12
	s_xor_b32 s9, s9, s8
	s_xor_b32 s13, s13, s12
	v_cvt_f32_u32_e32 v1, s9
	s_sub_i32 s11, 0, s9
	s_xor_b32 s8, s12, s8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	v_cvt_u32_f32_e32 v1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s10, v1
	s_mul_i32 s11, s11, s10
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s11, s10, s11
	s_add_i32 s10, s10, s11
	s_add_i32 s11, s1, -1
	s_mul_hi_u32 s10, s13, s10
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s14, s10, s9
	s_sub_i32 s12, s13, s14
	s_add_i32 s13, s10, 1
	s_sub_i32 s14, s12, s9
	s_cmp_ge_u32 s12, s9
	s_cselect_b32 s10, s13, s10
	s_cselect_b32 s12, s14, s12
	s_add_i32 s13, s10, 1
	s_cmp_ge_u32 s12, s9
	s_cselect_b32 s9, s13, s10
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s9, s9, s8
	s_sub_i32 s9, s9, s8
	s_mov_b32 s8, exec_lo
	v_mul_lo_u32 v1, s9, v0
	v_cmpx_ne_u32_e64 s11, v0
	s_xor_b32 s8, exec_lo, s8
	s_cbranch_execz .LBB0_21
; %bb.11:
	s_cmp_lt_i32 s9, 1
	s_cbranch_scc1 .LBB0_21
; %bb.12:                               ; %.lr.ph.preheader
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_mov_b32 v5, 0 :: v_dual_add_nc_u32 v4, s9, v1
	s_mov_b32 s9, 0
.LBB0_13:                               ; %.lr.ph
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_14 Depth 2
                                        ;     Child Loop BB0_17 Depth 2
	v_ashrrev_i32_e32 v2, 31, v1
	v_bfrev_b32_e32 v6, 1
	s_mov_b32 s10, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	v_add_co_u32 v2, vcc_lo, s4, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_cvt_f32_i32_e32 v2, v2
.LBB0_14:                               ; %ComputeLoop114
                                        ;   Parent Loop BB0_13 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_ctz_i32_b32 s11, s10
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_readlane_b32 s12, v2, s11
	s_lshl_b32 s11, 1, s11
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s10, s10, s11
	s_cmp_lg_u32 s10, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v6, s12, v6
	s_cbranch_scc1 .LBB0_14
; %bb.15:                               ; %ComputeEnd115
                                        ;   in Loop: Header=BB0_13 Depth=1
	v_mbcnt_lo_u32_b32 v2, exec_lo, 0
	s_mov_b32 s10, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v2
	s_xor_b32 s10, exec_lo, s10
	s_cbranch_execz .LBB0_19
; %bb.16:                               ;   in Loop: Header=BB0_13 Depth=1
	global_load_b32 v3, v5, s[2:3]
	s_mov_b32 s11, 0
.LBB0_17:                               ; %atomicrmw.start135
                                        ;   Parent Loop BB0_13 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v2, v3, v6
	global_atomic_cmpswap_b32 v2, v5, v[2:3], s[2:3] glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v2, v3
	v_mov_b32_e32 v3, v2
	s_or_b32 s11, vcc_lo, s11
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB0_17
; %bb.18:                               ; %Flow196
                                        ;   in Loop: Header=BB0_13 Depth=1
	s_or_b32 exec_lo, exec_lo, s11
.LBB0_19:                               ; %Flow197
                                        ;   in Loop: Header=BB0_13 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s10
	v_add_nc_u32_e32 v1, 1, v1
	v_cmp_ge_i32_e32 vcc_lo, v1, v4
	s_or_b32 s9, vcc_lo, s9
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s9
	s_cbranch_execnz .LBB0_13
; %bb.20:                               ; %Flow198
	s_or_b32 exec_lo, exec_lo, s9
                                        ; implicit-def: $vgpr1
.LBB0_21:                               ; %Flow204
	s_and_not1_saveexec_b32 s8, s8
	s_cbranch_execz .LBB0_31
; %bb.22:
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s6, v1
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_31
; %bb.23:                               ; %.lr.ph103.preheader
	v_mov_b32_e32 v4, 0
	s_mov_b32 s8, 0
.LBB0_24:                               ; %.lr.ph103
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_25 Depth 2
                                        ;     Child Loop BB0_28 Depth 2
	v_ashrrev_i32_e32 v2, 31, v1
	v_bfrev_b32_e32 v5, 1
	s_mov_b32 s9, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	v_add_co_u32 v2, vcc_lo, s4, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_cvt_f32_i32_e32 v2, v2
.LBB0_25:                               ; %ComputeLoop118
                                        ;   Parent Loop BB0_24 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_ctz_i32_b32 s10, s9
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_readlane_b32 s11, v2, s10
	s_lshl_b32 s10, 1, s10
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s9, s9, s10
	s_cmp_lg_u32 s9, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v5, s11, v5
	s_cbranch_scc1 .LBB0_25
; %bb.26:                               ; %ComputeEnd119
                                        ;   in Loop: Header=BB0_24 Depth=1
	v_mbcnt_lo_u32_b32 v2, exec_lo, 0
	s_mov_b32 s9, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v2
	s_xor_b32 s9, exec_lo, s9
	s_cbranch_execz .LBB0_30
; %bb.27:                               ;   in Loop: Header=BB0_24 Depth=1
	global_load_b32 v3, v4, s[2:3]
	s_mov_b32 s10, 0
.LBB0_28:                               ; %atomicrmw.start141
                                        ;   Parent Loop BB0_24 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v2, v3, v5
	global_atomic_cmpswap_b32 v2, v4, v[2:3], s[2:3] glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v2, v3
	v_mov_b32_e32 v3, v2
	s_or_b32 s10, vcc_lo, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s10
	s_cbranch_execnz .LBB0_28
; %bb.29:                               ; %Flow200
                                        ;   in Loop: Header=BB0_24 Depth=1
	s_or_b32 exec_lo, exec_lo, s10
.LBB0_30:                               ; %Flow201
                                        ;   in Loop: Header=BB0_24 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s9
	v_add_nc_u32_e32 v1, 1, v1
	v_cmp_le_i32_e32 vcc_lo, s6, v1
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB0_24
.LBB0_31:                               ; %.loopexit99
	s_or_b32 exec_lo, exec_lo, s7
	v_mov_b32_e32 v4, 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	global_load_b32 v1, v4, s[2:3]
	global_store_b32 v4, v4, s[2:3]
	s_and_saveexec_b32 s7, s0
	s_cbranch_execz .LBB0_62
; %bb.32:
	v_cvt_f32_i32_e32 v2, s6
	s_cmp_gt_i32 s6, s1
	s_mov_b32 s0, -1
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f32 v3, null, v2, v2, v1
	v_rcp_f32_e32 v5, v3
	s_waitcnt_depctr 0xfff
	v_fma_f32 v6, -v3, v5, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v5, v6, v5
	v_div_scale_f32 v6, vcc_lo, v1, v2, v1
	v_mul_f32_e32 v7, v6, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v8, -v3, v7, v6
	v_fmac_f32_e32 v7, v8, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v3, -v3, v7, v6
	v_div_fmas_f32 v3, v3, v5, v7
	s_delay_alu instid0(VALU_DEP_1)
	v_div_fixup_f32 v5, v3, v2, v1
	s_cbranch_scc1 .LBB0_40
; %bb.33:
	v_ashrrev_i32_e32 v1, 31, v0
	v_bfrev_b32_e32 v3, 1
	s_mov_b32 s0, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[0:1]
	v_add_co_u32 v1, vcc_lo, s4, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v2, vcc_lo, s5, v2, vcc_lo
	global_load_b32 v1, v[1:2], off
	s_waitcnt vmcnt(0)
	v_cvt_f32_i32_e32 v1, v1
	v_sub_f32_e32 v1, v1, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v1, v1, v1
.LBB0_34:                               ; %ComputeLoop122
                                        ; =>This Inner Loop Header: Depth=1
	s_ctz_i32_b32 s8, s0
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_readlane_b32 s9, v1, s8
	s_lshl_b32 s8, 1, s8
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s0, s0, s8
	s_cmp_lg_u32 s0, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v3, s9, v3
	s_cbranch_scc1 .LBB0_34
; %bb.35:                               ; %ComputeEnd123
	v_mbcnt_lo_u32_b32 v1, exec_lo, 0
	s_mov_b32 s0, 0
	s_mov_b32 s8, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v1
	s_xor_b32 s8, exec_lo, s8
	s_cbranch_execz .LBB0_39
; %bb.36:
	v_mov_b32_e32 v6, 0
	s_mov_b32 s9, 0
	global_load_b32 v2, v6, s[2:3]
.LBB0_37:                               ; %atomicrmw.start147
                                        ; =>This Inner Loop Header: Depth=1
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v1, v2, v3
	global_atomic_cmpswap_b32 v1, v6, v[1:2], s[2:3] glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v1, v2
	v_mov_b32_e32 v2, v1
	s_or_b32 s9, vcc_lo, s9
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s9
	s_cbranch_execnz .LBB0_37
; %bb.38:                               ; %Flow
	s_or_b32 exec_lo, exec_lo, s9
.LBB0_39:                               ; %Flow181
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s8
.LBB0_40:                               ; %Flow192
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccz .LBB0_62
; %bb.41:
	s_ashr_i32 s0, s1, 31
	s_ashr_i32 s11, s6, 31
	s_add_i32 s8, s1, s0
	s_add_i32 s12, s6, s11
	s_xor_b32 s8, s8, s0
	s_xor_b32 s12, s12, s11
	v_cvt_f32_u32_e32 v1, s8
	s_sub_i32 s10, 0, s8
	s_xor_b32 s0, s11, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	v_cvt_u32_f32_e32 v1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s9, v1
	s_mul_i32 s10, s10, s9
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s10, s9, s10
	s_add_i32 s9, s9, s10
	s_add_i32 s10, s1, -1
	s_mul_hi_u32 s9, s12, s9
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_mul_i32 s1, s9, s8
	s_add_i32 s11, s9, 1
	s_sub_i32 s1, s12, s1
	s_sub_i32 s12, s1, s8
	s_cmp_ge_u32 s1, s8
	s_cselect_b32 s9, s11, s9
	s_cselect_b32 s1, s12, s1
	s_add_i32 s11, s9, 1
	s_cmp_ge_u32 s1, s8
	s_cselect_b32 s1, s11, s9
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s1, s1, s0
	s_sub_i32 s1, s1, s0
	s_mov_b32 s0, exec_lo
	v_mul_lo_u32 v1, s1, v0
	v_cmpx_ne_u32_e64 s10, v0
	s_xor_b32 s0, exec_lo, s0
	s_cbranch_execz .LBB0_52
; %bb.42:
	s_cmp_lt_i32 s1, 1
	s_cbranch_scc1 .LBB0_52
; %bb.43:                               ; %.lr.ph105.preheader
	s_delay_alu instid0(VALU_DEP_2)
	v_add_nc_u32_e32 v0, s1, v1
	v_mov_b32_e32 v6, 0
	s_mov_b32 s1, 0
.LBB0_44:                               ; %.lr.ph105
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_45 Depth 2
                                        ;     Child Loop BB0_48 Depth 2
	v_ashrrev_i32_e32 v2, 31, v1
	v_bfrev_b32_e32 v7, 1
	s_mov_b32 s8, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	v_add_co_u32 v2, vcc_lo, s4, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_cvt_f32_i32_e32 v2, v2
	v_sub_f32_e32 v2, v2, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v2, v2, v2
.LBB0_45:                               ; %ComputeLoop126
                                        ;   Parent Loop BB0_44 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_ctz_i32_b32 s9, s8
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_readlane_b32 s10, v2, s9
	s_lshl_b32 s9, 1, s9
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s8, s8, s9
	s_cmp_lg_u32 s8, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v7, s10, v7
	s_cbranch_scc1 .LBB0_45
; %bb.46:                               ; %ComputeEnd127
                                        ;   in Loop: Header=BB0_44 Depth=1
	v_mbcnt_lo_u32_b32 v2, exec_lo, 0
	s_mov_b32 s8, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v2
	s_xor_b32 s8, exec_lo, s8
	s_cbranch_execz .LBB0_50
; %bb.47:                               ;   in Loop: Header=BB0_44 Depth=1
	global_load_b32 v3, v6, s[2:3]
	s_mov_b32 s9, 0
.LBB0_48:                               ; %atomicrmw.start153
                                        ;   Parent Loop BB0_44 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v2, v3, v7
	global_atomic_cmpswap_b32 v2, v6, v[2:3], s[2:3] glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v2, v3
	v_mov_b32_e32 v3, v2
	s_or_b32 s9, vcc_lo, s9
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s9
	s_cbranch_execnz .LBB0_48
; %bb.49:                               ; %Flow182
                                        ;   in Loop: Header=BB0_44 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
.LBB0_50:                               ; %Flow183
                                        ;   in Loop: Header=BB0_44 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s8
	v_add_nc_u32_e32 v1, 1, v1
	v_cmp_ge_i32_e32 vcc_lo, v1, v0
	s_or_b32 s1, vcc_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB0_44
; %bb.51:                               ; %Flow184
	s_or_b32 exec_lo, exec_lo, s1
                                        ; implicit-def: $vgpr1
                                        ; implicit-def: $vgpr5
.LBB0_52:                               ; %Flow190
	s_and_not1_saveexec_b32 s0, s0
	s_cbranch_execz .LBB0_62
; %bb.53:
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s6, v1
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_62
; %bb.54:                               ; %.lr.ph107.preheader
	v_mov_b32_e32 v0, 0
	s_mov_b32 s0, 0
.LBB0_55:                               ; %.lr.ph107
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_56 Depth 2
                                        ;     Child Loop BB0_59 Depth 2
	v_ashrrev_i32_e32 v2, 31, v1
	v_bfrev_b32_e32 v6, 1
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	v_add_co_u32 v2, vcc_lo, s4, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_cvt_f32_i32_e32 v2, v2
	v_sub_f32_e32 v2, v2, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v2, v2, v2
.LBB0_56:                               ; %ComputeLoop130
                                        ;   Parent Loop BB0_55 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_ctz_i32_b32 s8, s1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_readlane_b32 s9, v2, s8
	s_lshl_b32 s8, 1, s8
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s1, s1, s8
	s_cmp_lg_u32 s1, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v6, s9, v6
	s_cbranch_scc1 .LBB0_56
; %bb.57:                               ; %ComputeEnd131
                                        ;   in Loop: Header=BB0_55 Depth=1
	v_mbcnt_lo_u32_b32 v2, exec_lo, 0
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v2
	s_xor_b32 s1, exec_lo, s1
	s_cbranch_execz .LBB0_61
; %bb.58:                               ;   in Loop: Header=BB0_55 Depth=1
	global_load_b32 v3, v0, s[2:3]
	s_mov_b32 s8, 0
.LBB0_59:                               ; %atomicrmw.start159
                                        ;   Parent Loop BB0_55 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v2, v3, v6
	global_atomic_cmpswap_b32 v2, v0, v[2:3], s[2:3] glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v2, v3
	v_mov_b32_e32 v3, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB0_59
; %bb.60:                               ; %Flow186
                                        ;   in Loop: Header=BB0_55 Depth=1
	s_or_b32 exec_lo, exec_lo, s8
.LBB0_61:                               ; %Flow187
                                        ;   in Loop: Header=BB0_55 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_add_nc_u32_e32 v1, 1, v1
	v_cmp_le_i32_e32 vcc_lo, s6, v1
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB0_55
.LBB0_62:                               ; %.loopexit
	s_or_b32 exec_lo, exec_lo, s7
	s_waitcnt vmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	global_load_b32 v0, v4, s[2:3]
	s_add_i32 s6, s6, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cvt_f32_i32_e32 v1, s6
	s_waitcnt vmcnt(0)
	v_div_scale_f32 v2, null, v1, v1, v0
	v_div_scale_f32 v6, vcc_lo, v0, v1, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v3, v2
	s_waitcnt_depctr 0xfff
	v_fma_f32 v5, -v2, v3, 1.0
	v_fmac_f32_e32 v3, v5, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v5, v6, v3
	v_fma_f32 v7, -v2, v5, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v5, v7, v3
	v_fma_f32 v2, -v2, v5, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v2, v2, v3, v5
	v_div_fixup_f32 v0, v2, v1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v1, 0x4f800000, v0
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v0
	v_cndmask_b32_e32 v0, v0, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_sqrt_f32_e32 v1, v0
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v2, -1, v1
	v_add_nc_u32_e32 v3, 1, v1
	v_fma_f32 v5, -v2, v1, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v6, -v3, v1, v0
	v_cmp_ge_f32_e64 s0, 0, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v1, v1, v2, s0
	v_cmp_lt_f32_e64 s0, 0, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v1, v1, v3, s0
	v_mul_f32_e32 v2, 0x37800000, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v1, v1, v2, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v0, 0x260
	v_cndmask_b32_e32 v0, v1, v0, vcc_lo
	global_store_b32 v4, v0, s[2:3]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z4funcPKiiPfi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z4funcPKiiPfi, .Lfunc_end0-_Z4funcPKiiPfi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2456
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z4funcPKiiPfi
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z4funcPKiiPfi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
