#include <stdio.h>
#include <cuda.h>
#include "cuComplex.h"

#define WARP_SIZE 32

// Kernel that executes on the CUDA device
template <int N>
__global__ void test(float *in, float *mul, float *out)
{
  int lane_id = threadIdx.x % WARP_SIZE;
  int warp_id = threadIdx.x / WARP_SIZE;

  __shared__ float smem [WARP_SIZE*2];
  volatile float* my_smem = &smem[WARP_SIZE*warp_id];
  __shared__ float smul[N];

  my_smem[lane_id] = in[lane_id];

  if (lane_id < N)
	smul[lane_id] = mul[lane_id];
  
  my_smem[lane_id] = smul[lane_id%N] * my_smem[lane_id];
  out[lane_id] = my_smem[lane_id];
}



// main routine that executes on the host
int main(void)
{
 
  const int N = 8;  // Number of elements in arrays
  size_t elems = 256;
  size_t size = elems * sizeof(float);
  
  float* in_h = (float*)calloc(elems, sizeof(float));        // Allocate array on host
  float* mul_h = (float*)calloc(N, sizeof(float));
  float* out_h = (float*)calloc(elems, sizeof(float));        // Allocate array on host

  for (int i = 0; i < elems; i++)
  {
    in_h[i] = (float)i;
  }
  for (int i = 0; i < N; i++)
  {
    mul_h[i] = 1.f;
  }
  
  float *in_d, *out_d, *mul_d;

  cudaMalloc((void **) &in_d, size);   // Allocate array on device
  cudaMalloc((void **) &out_d, size);   // Allocate array on device
  cudaMalloc((void **) &mul_d, N*sizeof(float));   // Allocate array on device
  cudaMemcpy(in_d, in_h, size, cudaMemcpyDefault);
  cudaMemcpy(out_d, out_h, size, cudaMemcpyDefault);
  cudaMemcpy(mul_d, mul_h, N*sizeof(float), cudaMemcpyDefault);
  cudaDeviceSynchronize();

  {    
    test<N> <<< 1, WARP_SIZE >>> (in_d, mul_d, out_d);
    cudaDeviceSynchronize();
    cudaMemcpy(out_h, out_d, WARP_SIZE*sizeof(float), cudaMemcpyDefault);
    cudaDeviceSynchronize();
  
    float expected = 0.0, got = 0.0, test = 0.0;
    for (int j = 0; j < 32; j++)
    {
      expected += in_h[j]*mul_h[j%N];
      got += out_h[j];
    }
   
    // Print results
    printf("sz: %d, Expected: %f, Got: %f\n", 32, expected, got);
  }  

  // Cleanup
  free(in_h);
  free(mul_h);
  free(out_h);
  cudaFree(in_d);
  cudaFree(out_d);
  cudaFree(mul_d);

  return 0;
}

	.file	"tmpxft_00256c3a_00000000-6_main.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2055:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.type	_ZL36__device_stub__Z4testILi8EEvPfS0_S0_PfS_S_, @function
_ZL36__device_stub__Z4testILi8EEvPfS0_S0_PfS_S_:
.LFB2077:
	.cfi_startproc
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z4testILi8EEvPfS0_S0_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L2:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2077:
	.size	_ZL36__device_stub__Z4testILi8EEvPfS0_S0_PfS_S_, .-_ZL36__device_stub__Z4testILi8EEvPfS0_S0_PfS_S_
	.section	.text._Z4testILi8EEvPfS0_S0_,"axG",@progbits,_Z4testILi8EEvPfS0_S0_,comdat
	.weak	_Z4testILi8EEvPfS0_S0_
	.type	_Z4testILi8EEvPfS0_S0_, @function
_Z4testILi8EEvPfS0_S0_:
.LFB2126:
	.cfi_startproc
	endbr64
	jmp	_ZL36__device_stub__Z4testILi8EEvPfS0_S0_PfS_S_
	.cfi_endproc
.LFE2126:
	.size	_Z4testILi8EEvPfS0_S0_, .-_Z4testILi8EEvPfS0_S0_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"sz: %d, Expected: %f, Got: %f\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2052:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	$4, %esi
	movl	$256, %edi
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$64, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	calloc@PLT
	movl	$4, %esi
	movl	$8, %edi
	movq	%rax, %r12
	call	calloc@PLT
	movl	$4, %esi
	movl	$256, %edi
	movq	%rax, %rbp
	call	calloc@PLT
	movq	%rax, %rbx
	xorl	%eax, %eax
.L9:
	cvtsi2ssl	%eax, %xmm0
	movss	%xmm0, (%r12,%rax,4)
	incq	%rax
	cmpq	$256, %rax
	jne	.L9
	movss	.LC1(%rip), %xmm0
	xorl	%eax, %eax
.L10:
	movss	%xmm0, 0(%rbp,%rax,4)
	incq	%rax
	cmpq	$8, %rax
	jne	.L10
	leaq	8(%rsp), %rdi
	movl	$1024, %esi
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$1024, %esi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$32, %esi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	movl	$4, %ecx
	movq	%r12, %rsi
	movl	$1024, %edx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	movl	$4, %ecx
	movq	%rbx, %rsi
	movl	$1024, %edx
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdi
	movl	$4, %ecx
	movq	%rbp, %rsi
	movl	$32, %edx
	call	cudaMemcpy@PLT
	call	cudaDeviceSynchronize@PLT
	movl	$134217729, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$5, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L11
	movq	16(%rsp), %rdx
	movq	24(%rsp), %rsi
	movq	8(%rsp), %rdi
	call	_ZL36__device_stub__Z4testILi8EEvPfS0_S0_PfS_S_
.L11:
	call	cudaDeviceSynchronize@PLT
	movq	16(%rsp), %rsi
	movl	$4, %ecx
	movq	%rbx, %rdi
	movl	$128, %edx
	call	cudaMemcpy@PLT
	call	cudaDeviceSynchronize@PLT
	xorps	%xmm1, %xmm1
	xorl	%eax, %eax
	movaps	%xmm1, %xmm0
.L12:
	movq	%rax, %rdx
	addss	(%rbx,%rax,4), %xmm1
	andl	$7, %edx
	movss	0(%rbp,%rdx,4), %xmm2
	mulss	(%r12,%rax,4), %xmm2
	incq	%rax
	addss	%xmm2, %xmm0
	cmpq	$32, %rax
	jne	.L12
	movl	$32, %edx
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	movb	$2, %al
	cvtss2sd	%xmm0, %xmm0
	cvtss2sd	%xmm1, %xmm1
	call	__printf_chk@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L13
	call	__stack_chk_fail@PLT
.L13:
	addq	$64, %rsp
	.cfi_def_cfa_offset 32
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	main, .-main
	.section	.rodata.str1.1
.LC3:
	.string	"_Z4testILi8EEvPfS0_S0_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2080:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z4testILi8EEvPfS0_S0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2080:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC1:
	.long	1065353216
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include <hip/hip_runtime.h>
#include "hip/hip_complex.h"

#define WARP_SIZE 32

// Kernel that executes on the CUDA device
template <int N>
__global__ void test(float *in, float *mul, float *out)
{
  int lane_id = threadIdx.x % WARP_SIZE;
  int warp_id = threadIdx.x / WARP_SIZE;

  __shared__ float smem [WARP_SIZE*2];
  volatile float* my_smem = &smem[WARP_SIZE*warp_id];
  __shared__ float smul[N];

  my_smem[lane_id] = in[lane_id];

  if (lane_id < N)
	smul[lane_id] = mul[lane_id];
  
  my_smem[lane_id] = smul[lane_id%N] * my_smem[lane_id];
  out[lane_id] = my_smem[lane_id];
}



// main routine that executes on the host
int main(void)
{
 
  const int N = 8;  // Number of elements in arrays
  size_t elems = 256;
  size_t size = elems * sizeof(float);
  
  float* in_h = (float*)calloc(elems, sizeof(float));        // Allocate array on host
  float* mul_h = (float*)calloc(N, sizeof(float));
  float* out_h = (float*)calloc(elems, sizeof(float));        // Allocate array on host

  for (int i = 0; i < elems; i++)
  {
    in_h[i] = (float)i;
  }
  for (int i = 0; i < N; i++)
  {
    mul_h[i] = 1.f;
  }
  
  float *in_d, *out_d, *mul_d;

  hipMalloc((void **) &in_d, size);   // Allocate array on device
  hipMalloc((void **) &out_d, size);   // Allocate array on device
  hipMalloc((void **) &mul_d, N*sizeof(float));   // Allocate array on device
  hipMemcpy(in_d, in_h, size, hipMemcpyDefault);
  hipMemcpy(out_d, out_h, size, hipMemcpyDefault);
  hipMemcpy(mul_d, mul_h, N*sizeof(float), hipMemcpyDefault);
  hipDeviceSynchronize();

  {    
    test<N> <<< 1, WARP_SIZE >>> (in_d, mul_d, out_d);
    hipDeviceSynchronize();
    hipMemcpy(out_h, out_d, WARP_SIZE*sizeof(float), hipMemcpyDefault);
    hipDeviceSynchronize();
  
    float expected = 0.0, got = 0.0, test = 0.0;
    for (int j = 0; j < 32; j++)
    {
      expected += in_h[j]*mul_h[j%N];
      got += out_h[j];
    }
   
    // Print results
    printf("sz: %d, Expected: %f, Got: %f\n", 32, expected, got);
  }  

  // Cleanup
  free(in_h);
  free(mul_h);
  free(out_h);
  hipFree(in_d);
  hipFree(out_d);
  hipFree(mul_d);

  return 0;
}

	.text
	.file	"main.hip"
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$256, %edi                      # imm = 0x100
	movl	$4, %esi
	callq	calloc
	movq	%rax, %rbx
	movl	$8, %edi
	movl	$4, %esi
	callq	calloc
	movq	%rax, %r14
	movl	$256, %edi                      # imm = 0x100
	movl	$4, %esi
	callq	calloc
	movq	%rax, %r15
	xorl	%eax, %eax
.LBB0_1:                                # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	%xmm0, (%rbx,%rax,4)
	incq	%rax
	cmpq	$256, %rax                      # imm = 0x100
	jne	.LBB0_1
# %bb.2:                                # %.preheader.preheader
	xorl	%eax, %eax
.LBB0_3:                                # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	movl	$1065353216, (%r14,%rax,4)      # imm = 0x3F800000
	incq	%rax
	cmpq	$8, %rax
	jne	.LBB0_3
# %bb.4:
	leaq	16(%rsp), %r12
	movl	$1024, %esi                     # imm = 0x400
	movq	%r12, %rdi
	callq	hipMalloc
	movq	%rsp, %r13
	movl	$1024, %esi                     # imm = 0x400
	movq	%r13, %rdi
	callq	hipMalloc
	leaq	8(%rsp), %rbp
	movl	$32, %esi
	movq	%rbp, %rdi
	callq	hipMalloc
	movq	(%r12), %rdi
	movl	$1024, %edx                     # imm = 0x400
	movq	%rbx, %rsi
	movl	$4, %ecx
	callq	hipMemcpy
	movq	(%r13), %rdi
	movl	$1024, %edx                     # imm = 0x400
	movq	%r15, %rsi
	movl	$4, %ecx
	callq	hipMemcpy
	movq	(%rbp), %rdi
	movl	$32, %edx
	movq	%r14, %rsi
	movl	$4, %ecx
	callq	hipMemcpy
	callq	hipDeviceSynchronize
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	leaq	31(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_6
# %bb.5:
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdx
	callq	_Z19__device_stub__testILi8EEvPfS0_S0_
.LBB0_6:
	callq	hipDeviceSynchronize
	movq	(%rsp), %rsi
	movl	$128, %edx
	movq	%r15, %rdi
	movl	$4, %ecx
	callq	hipMemcpy
	callq	hipDeviceSynchronize
	xorps	%xmm1, %xmm1
	xorl	%eax, %eax
	xorps	%xmm0, %xmm0
.LBB0_7:                                # =>This Inner Loop Header: Depth=1
	movss	(%rbx,%rax,4), %xmm2            # xmm2 = mem[0],zero,zero,zero
	movl	%eax, %ecx
	andl	$7, %ecx
	mulss	(%r14,%rcx,4), %xmm2
	addss	%xmm2, %xmm0
	addss	(%r15,%rax,4), %xmm1
	incq	%rax
	cmpq	$32, %rax
	jne	.LBB0_7
# %bb.8:
	cvtss2sd	%xmm0, %xmm0
	cvtss2sd	%xmm1, %xmm1
	movl	$.L.str, %edi
	movl	$32, %esi
	movb	$2, %al
	callq	printf
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	main, .Lfunc_end0-main
	.cfi_endproc
                                        # -- End function
	.section	.text._Z19__device_stub__testILi8EEvPfS0_S0_,"axG",@progbits,_Z19__device_stub__testILi8EEvPfS0_S0_,comdat
	.weak	_Z19__device_stub__testILi8EEvPfS0_S0_ # -- Begin function _Z19__device_stub__testILi8EEvPfS0_S0_
	.type	_Z19__device_stub__testILi8EEvPfS0_S0_,@function
_Z19__device_stub__testILi8EEvPfS0_S0_: # @_Z19__device_stub__testILi8EEvPfS0_S0_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z4testILi8EEvPfS0_S0_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z19__device_stub__testILi8EEvPfS0_S0_, .Lfunc_end1-_Z19__device_stub__testILi8EEvPfS0_S0_
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z4testILi8EEvPfS0_S0_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z4testILi8EEvPfS0_S0_,@object  # @_Z4testILi8EEvPfS0_S0_
	.section	.rodata._Z4testILi8EEvPfS0_S0_,"aG",@progbits,_Z4testILi8EEvPfS0_S0_,comdat
	.weak	_Z4testILi8EEvPfS0_S0_
	.p2align	3, 0x0
_Z4testILi8EEvPfS0_S0_:
	.quad	_Z19__device_stub__testILi8EEvPfS0_S0_
	.size	_Z4testILi8EEvPfS0_S0_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"sz: %d, Expected: %f, Got: %f\n"
	.size	.L.str, 31

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z4testILi8EEvPfS0_S0_"
	.size	.L__unnamed_1, 23

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z19__device_stub__testILi8EEvPfS0_S0_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z4testILi8EEvPfS0_S0_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.section	.text._Z4testILi8EEvPfS0_S0_,"axG",@progbits,_Z4testILi8EEvPfS0_S0_,comdat
	.protected	_Z4testILi8EEvPfS0_S0_  ; -- Begin function _Z4testILi8EEvPfS0_S0_
	.globl	_Z4testILi8EEvPfS0_S0_
	.p2align	8
	.type	_Z4testILi8EEvPfS0_S0_,@function
_Z4testILi8EEvPfS0_S0_:                 ; @_Z4testILi8EEvPfS0_S0_
; %bb.0:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_and_b32_e32 v4, 31, v0
	s_load_b64 s[0:1], s[0:1], 0x10
	v_and_b32_e32 v1, 0x3e0, v0
	s_mov_b64 s[2:3], src_shared_base
	s_mov_b32 s2, exec_lo
	v_lshlrev_b32_e32 v3, 2, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_or_b32 v1, v1, 2, v3
	v_cmp_ne_u32_e32 vcc_lo, -1, v1
	s_waitcnt lgkmcnt(0)
	global_load_b32 v5, v3, s[4:5]
	v_cndmask_b32_e32 v1, 0, v1, vcc_lo
	v_cndmask_b32_e64 v2, 0, s3, vcc_lo
	s_waitcnt vmcnt(0)
	flat_store_b32 v[1:2], v5 dlc
	s_waitcnt_vscnt null, 0x0
	v_cmpx_gt_u32_e32 8, v4
	s_cbranch_execz .LBB0_2
; %bb.1:
	global_load_b32 v4, v3, s[6:7]
	s_waitcnt vmcnt(0)
	ds_store_b32 v3, v4 offset:256
.LBB0_2:
	s_or_b32 exec_lo, exec_lo, s2
	v_and_b32_e32 v0, 7, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b32_e32 v0, 2, v0
	ds_load_b32 v0, v0 offset:256
	flat_load_b32 v4, v[1:2] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_mul_f32_e32 v0, v0, v4
	flat_store_b32 v[1:2], v0 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v0, v[1:2] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	global_store_b32 v3, v0, s[0:1]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z4testILi8EEvPfS0_S0_
		.amdhsa_group_segment_fixed_size 288
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 24
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 8
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z4testILi8EEvPfS0_S0_,"axG",@progbits,_Z4testILi8EEvPfS0_S0_,comdat
.Lfunc_end0:
	.size	_Z4testILi8EEvPfS0_S0_, .Lfunc_end0-_Z4testILi8EEvPfS0_S0_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 208
; NumSgprs: 10
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 288 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 10
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 288
    .kernarg_segment_align: 8
    .kernarg_segment_size: 24
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z4testILi8EEvPfS0_S0_
    .private_segment_fixed_size: 0
    .sgpr_count:     10
    .sgpr_spill_count: 0
    .symbol:         _Z4testILi8EEvPfS0_S0_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
