/*
 * Application:- Imogen's ported kernel from "gpuImogen/gpuclass/cudaArrayAtomic.cu" 
 * Purpose:-
 *     To perform operation on single array. Useful when parameters like density
 * are required to be kept to have certain minimum value or certain maximum value
 * or require NaNs to be replaced by zeros.
 */ 

/*
 * Shader frequency of GTX 480 
 * Better will be to deriver this in case we are simulation in a different GPU
 * But calling function to derive frequncy so many times will be still expensive
 * Tip:- Get this from the caller as input parameter.
 */
#define SHADER_CLOCK 1401000
/*
 * This will set all array elements with less than minimum 
 * threshold to value specified in input parameter
 */
__device__ void ArraySetMin(void *params)
{
    /*
     * Kernel Benchmarking parameters
     * Uncomment to benchmark inside CUDA kernel.
     * Don't uncomment otherwise else it will lead to unnecessary console logs.
     */
    //clock_t start, stop;
    //start = clock();
    //printf("Thread %d\n", threadIdx.x);
    /*
     * CUDA Threads
     */
    int warp_size = 32;

    /*
     * Get thread tid (we should keep it from 0-31 range only)
     */
    int tid = threadIdx.x % warp_size;

    /*
     * Get input parameters
     */
    double* paramsIn = (double*)params;

    /*
     * First argument is basis of getting into this function
     */
    paramsIn = paramsIn + 1;

    /*
     * Get minimum threshold parameter
     */
    double min = (double)paramsIn[0];

    /*
     * Get number of elements in the array
     */
    paramsIn = paramsIn + 1;
    int n   = (int)paramsIn[0];

    /*
     * Get the array
     */
    paramsIn       = paramsIn + 1;
    double *array  = paramsIn;

    /*
     * Loop and set values
     */
    while (tid < n) {
        if (array[tid] < min) {
            array[tid] = min;
        }
        //printf("tid = %d, n = %d\n", tid, n);
        //printf("incrementing Thread %d\n", threadIdx.x);
        /*
         * Skip next 32 entries, other threads will take care of them
         */
        tid += warp_size;
    }
    /*
     * No need of synchronization within 1 warp
     */
    //__syncthreads();
    /*
     * Kernel Benchmarking parameters
     * Uncomment to benchmark inside CUDA kernel.
     * Don't uncomment otherwise else it will lead to unnecessary console logs.
     */
    //printf("Thread %d\n", threadIdx.x);
    //stop = clock();
    //float time = (float)(stop - start)/(float)SHADER_CLOCK;
    //printf("Time taken %f ms\n", time);    
}

/*
 * This will set all array elements with greater than maximum 
 * threshold to value specified in input parameter
 */
__device__ void ArraySetMax(void *params)
{
    /*
     * CUDA Threads
     */
    int warp_size = 32;
    int tid = threadIdx.x % warp_size;

    /*
     * Get input parameters
     */
    double* paramsIn = (double*)params;

    /*
     * First argument is basis of getting into this function
     */
    paramsIn = paramsIn + 1;

    /*
     * Get maximum threshold
     */
    double max = (double)paramsIn[0];

    /*
     * Get number of array elements
     */
    paramsIn = paramsIn + 1;
    int n   = (int)paramsIn[0];

    /*
     * Get the array itself
     */
    paramsIn       = paramsIn + 1;
    double *array = paramsIn;

    /*
     * Loop and set values
     */
    while (tid < n) {
        if (array[tid] > max) {
            array[tid] = max;
        }
        /*
         * Skip next 32 entries, other threads will take care of them
         */
        tid += warp_size;
    }
}

/*
 * This will set all array elements which are not a number
 * to value specified in input parameter
 */
__device__ void ArraySetNaN(void *params)
{
    /*
     * CUDA Threads
     */
    int warp_size = 32;
    int tid = threadIdx.x % warp_size;

    /*
     * Get input parameters
     */
    double* paramsIn = (double*)params;

    /*
     * First argument is basis of getting into this function
     */
    paramsIn = paramsIn + 1;

    /*
     * Get fixed values to replace NaNs
     */
    double fixval = (double)paramsIn[0];

    /*
     * Get number of array elements
     */
    paramsIn = paramsIn + 1;
    int n   = (int)paramsIn[0];

    /*
     * Get the array itself
     */
    paramsIn       = paramsIn + 1;
    double *array = paramsIn;

    /*
     * Loop and set values
     */
    while (tid < n) {
        if (isnan(array[tid])) {
            array[tid] = fixval;
        }
        /*
         * Skip next 32 entries, other threads will take care of them
         */
        tid += warp_size;
    }
}

/*
 * Sub-kernel selection function, Superkernel will call this function only
 */
__device__ void ArrayAtomic(void *params)
{
    /*
     * Get the selection option
     */
    double *operation = (double*)params;

    switch((int)*operation) {
    /*
     * Call set min for selection option 1
     */
    case 1: ArraySetMin(params);
        break;
    /*
     * Call set max for selection option 2
     */
    case 2: ArraySetMax(params);
        break;
    /*
     * Call set NaN for selection option 3
     */
    case 3: ArraySetNaN(params);
        break;
    }
}

	.file	"tmpxft_003aaa1c_00000000-6_ArrayAtomic.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2014:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2014:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z11ArraySetMinPv
	.type	_Z11ArraySetMinPv, @function
_Z11ArraySetMinPv:
.LFB2008:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2008:
	.size	_Z11ArraySetMinPv, .-_Z11ArraySetMinPv
	.globl	_Z11ArraySetMaxPv
	.type	_Z11ArraySetMaxPv, @function
_Z11ArraySetMaxPv:
.LFB2153:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	_Z11ArraySetMinPv
	.cfi_endproc
.LFE2153:
	.size	_Z11ArraySetMaxPv, .-_Z11ArraySetMaxPv
	.globl	_Z11ArraySetNaNPv
	.type	_Z11ArraySetNaNPv, @function
_Z11ArraySetNaNPv:
.LFB2155:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	_Z11ArraySetMinPv
	.cfi_endproc
.LFE2155:
	.size	_Z11ArraySetNaNPv, .-_Z11ArraySetNaNPv
	.globl	_Z11ArrayAtomicPv
	.type	_Z11ArrayAtomicPv, @function
_Z11ArrayAtomicPv:
.LFB2157:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	_Z11ArraySetMinPv
	.cfi_endproc
.LFE2157:
	.size	_Z11ArrayAtomicPv, .-_Z11ArrayAtomicPv
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2037:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	movq	%rax, %rdi
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2037:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
/*
 * Application:- Imogen's ported kernel from "gpuImogen/gpuclass/cudaArrayAtomic.cu" 
 * Purpose:-
 *     To perform operation on single array. Useful when parameters like density
 * are required to be kept to have certain minimum value or certain maximum value
 * or require NaNs to be replaced by zeros.
 */ 

/*
 * Shader frequency of GTX 480 
 * Better will be to deriver this in case we are simulation in a different GPU
 * But calling function to derive frequncy so many times will be still expensive
 * Tip:- Get this from the caller as input parameter.
 */
#define SHADER_CLOCK 1401000
/*
 * This will set all array elements with less than minimum 
 * threshold to value specified in input parameter
 */
__device__ void ArraySetMin(void *params)
{
    /*
     * Kernel Benchmarking parameters
     * Uncomment to benchmark inside CUDA kernel.
     * Don't uncomment otherwise else it will lead to unnecessary console logs.
     */
    //clock_t start, stop;
    //start = clock();
    //printf("Thread %d\n", threadIdx.x);
    /*
     * CUDA Threads
     */
    int warp_size = 32;

    /*
     * Get thread tid (we should keep it from 0-31 range only)
     */
    int tid = threadIdx.x % warp_size;

    /*
     * Get input parameters
     */
    double* paramsIn = (double*)params;

    /*
     * First argument is basis of getting into this function
     */
    paramsIn = paramsIn + 1;

    /*
     * Get minimum threshold parameter
     */
    double min = (double)paramsIn[0];

    /*
     * Get number of elements in the array
     */
    paramsIn = paramsIn + 1;
    int n   = (int)paramsIn[0];

    /*
     * Get the array
     */
    paramsIn       = paramsIn + 1;
    double *array  = paramsIn;

    /*
     * Loop and set values
     */
    while (tid < n) {
        if (array[tid] < min) {
            array[tid] = min;
        }
        //printf("tid = %d, n = %d\n", tid, n);
        //printf("incrementing Thread %d\n", threadIdx.x);
        /*
         * Skip next 32 entries, other threads will take care of them
         */
        tid += warp_size;
    }
    /*
     * No need of synchronization within 1 warp
     */
    //__syncthreads();
    /*
     * Kernel Benchmarking parameters
     * Uncomment to benchmark inside CUDA kernel.
     * Don't uncomment otherwise else it will lead to unnecessary console logs.
     */
    //printf("Thread %d\n", threadIdx.x);
    //stop = clock();
    //float time = (float)(stop - start)/(float)SHADER_CLOCK;
    //printf("Time taken %f ms\n", time);    
}

/*
 * This will set all array elements with greater than maximum 
 * threshold to value specified in input parameter
 */
__device__ void ArraySetMax(void *params)
{
    /*
     * CUDA Threads
     */
    int warp_size = 32;
    int tid = threadIdx.x % warp_size;

    /*
     * Get input parameters
     */
    double* paramsIn = (double*)params;

    /*
     * First argument is basis of getting into this function
     */
    paramsIn = paramsIn + 1;

    /*
     * Get maximum threshold
     */
    double max = (double)paramsIn[0];

    /*
     * Get number of array elements
     */
    paramsIn = paramsIn + 1;
    int n   = (int)paramsIn[0];

    /*
     * Get the array itself
     */
    paramsIn       = paramsIn + 1;
    double *array = paramsIn;

    /*
     * Loop and set values
     */
    while (tid < n) {
        if (array[tid] > max) {
            array[tid] = max;
        }
        /*
         * Skip next 32 entries, other threads will take care of them
         */
        tid += warp_size;
    }
}

/*
 * This will set all array elements which are not a number
 * to value specified in input parameter
 */
__device__ void ArraySetNaN(void *params)
{
    /*
     * CUDA Threads
     */
    int warp_size = 32;
    int tid = threadIdx.x % warp_size;

    /*
     * Get input parameters
     */
    double* paramsIn = (double*)params;

    /*
     * First argument is basis of getting into this function
     */
    paramsIn = paramsIn + 1;

    /*
     * Get fixed values to replace NaNs
     */
    double fixval = (double)paramsIn[0];

    /*
     * Get number of array elements
     */
    paramsIn = paramsIn + 1;
    int n   = (int)paramsIn[0];

    /*
     * Get the array itself
     */
    paramsIn       = paramsIn + 1;
    double *array = paramsIn;

    /*
     * Loop and set values
     */
    while (tid < n) {
        if (isnan(array[tid])) {
            array[tid] = fixval;
        }
        /*
         * Skip next 32 entries, other threads will take care of them
         */
        tid += warp_size;
    }
}

/*
 * Sub-kernel selection function, Superkernel will call this function only
 */
__device__ void ArrayAtomic(void *params)
{
    /*
     * Get the selection option
     */
    double *operation = (double*)params;

    switch((int)*operation) {
    /*
     * Call set min for selection option 1
     */
    case 1: ArraySetMin(params);
        break;
    /*
     * Call set max for selection option 2
     */
    case 2: ArraySetMax(params);
        break;
    /*
     * Call set NaN for selection option 3
     */
    case 3: ArraySetNaN(params);
        break;
    }
}

	.text
	.file	"ArrayAtomic.hip"
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_

	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.amdgpu_metadata
---
amdhsa.kernels:  []
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
