#include <iostream>

//some of the materials here was reused or based on NERSC/OLCF cuda training-series (https://github.com/olcf/cuda-training-series)
#define cudaCheck(msg) \
do { \
    cudaError_t __err = cudaGetLastError(); \
    if (__err != cudaSuccess) { \
        fprintf(stderr, "Fatal error: %s (%s at %s:%d)\n", \
            msg, cudaGetErrorString(__err), \
            __FILE__, __LINE__); \
        fprintf(stderr, "*** FAILED - ABORTING\n"); \
        exit(1); \
    } \
} while (0)


#define DATA_SIZE 1024*1024*32

void result_check(float *A, float *B, float *C);

// kernel
__global__ 
void vector_add_kernel(const float *A, const float *B, float *C, int size);
__global__ 
void vector_add_kernel_memory(const float *A, const float *B, float *C, int size, int stride_size);

int main(){

  float *A_h, *B_h, *C_h; // host pointers
  float *A_d, *B_d, *C_d;// device pointers

  A_h = new float[DATA_SIZE];  // allocating host arrays
  B_h = new float[DATA_SIZE];
  C_h = new float[DATA_SIZE];

  for (int i = 0; i < DATA_SIZE; i++){  // initializing host vectors
    A_h[i] = rand()/(float)RAND_MAX;
    B_h[i] = rand()/(float)RAND_MAX;
    C_h[i] = 0;
    }

  cudaMalloc(&A_d, DATA_SIZE*sizeof(float));  //allocate memory for device vectors
  cudaMalloc(&B_d, DATA_SIZE*sizeof(float));  
  cudaMalloc(&C_d, DATA_SIZE*sizeof(float));  
  cudaCheck("Error in cudaMallocs"); //check if any errors during memory allocation on device
  // copy host vectors to device
  cudaMemcpy(A_d, A_h, DATA_SIZE*sizeof(float), cudaMemcpyHostToDevice);
  cudaMemcpy(B_d, B_h, DATA_SIZE*sizeof(float), cudaMemcpyHostToDevice);
  cudaCheck("host to device copy error");
  
  int blocks = 4;  // to set number of blocks
  int threads = 256; // to set number of threads per block
  // set memory stride size
  
  //*************************************************************************************///
  //*********** uncomment the below kernel for studying launch configurations ***********///
  //*************************************************************************************///

  vector_add_kernel<<<blocks, threads>>>(A_d, B_d, C_d, DATA_SIZE);

  //*************************************************************************************///
  //*********** uncomment the below two lines to study memory caching and coalescing ***********///
  //*************************************************************************************///
    // int mem_stride = 8; 
    // vector_add_kernel_memory<<<blocks, threads>>>(A_d, B_d, C_d, DATA_SIZE, mem_stride);

  cudaCheck("kernel launch error");
  // copy result vector from device to host
  cudaMemcpy(C_h, C_d, DATA_SIZE*sizeof(float), cudaMemcpyDeviceToHost);
  cudaCheck("device to host copy error or kernel launch failure");

  result_check(A_h, B_h, C_h);

  return 0;
} // end main

void result_check(float *A, float *B, float *C){
    int errors = 0;
    for(int i = 0; i < DATA_SIZE; i++){
        if(A[i] + B[i] != C[i]){
            errors++;
        }
    }
    if(errors == 0){
      std::cout<<"\tCorrectness Test Passed\n";
    }else{
      std::cout<<"\tCorrectness Test Failed\n";
    }
} 

// kernel for launch configurations
__global__ 
void vector_add_kernel(const float *A, const float *B, float *C, int size){
  int idx = threadIdx.x + blockIdx.x * blockDim.x;
  int total_threads = gridDim.x*blockDim.x;

  for(int i = idx; i < size; i+=total_threads)
    C[i] = A[i] + B[i]; 
}

// kernel for stuyding effect of caching
__global__ 
void vector_add_kernel_memory(const float *A, const float *B, float *C, int size, int stride_size){
  int idx = threadIdx.x + blockIdx.x * blockDim.x;
  int total_threads = gridDim.x*blockDim.x;
  int strides_per_thread = size/(total_threads*stride_size);

  for(int j = 0; j < strides_per_thread; j++){
      int stride_begin = stride_size * idx + j * stride_size * total_threads;
      int stride_end = stride_size + stride_begin;

      for(int i = stride_begin; i < stride_end; i++ ){
        C[i] = A[i] + B[i];
      }
  }
}

	.file	"tmpxft_003a5533_00000000-6_vec_add.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3639:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3639:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"\tCorrectness Test Passed\n"
.LC1:
	.string	"\tCorrectness Test Failed\n"
	.text
	.globl	_Z12result_checkPfS_S_
	.type	_Z12result_checkPfS_S_, @function
_Z12result_checkPfS_S_:
.LFB3636:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
	xorl	%ecx, %ecx
.L5:
	movss	(%rdi,%rax), %xmm0
	addss	(%rsi,%rax), %xmm0
	ucomiss	(%rdx,%rax), %xmm0
	jp	.L7
	je	.L3
.L7:
	incl	%ecx
.L3:
	addq	$4, %rax
	cmpq	$134217728, %rax
	jne	.L5
	testl	%ecx, %ecx
	movl	$25, %edx
	leaq	.LC0(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	je	.L9
	leaq	.LC1(%rip), %rsi
.L9:
	jmp	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
	.cfi_endproc
.LFE3636:
	.size	_Z12result_checkPfS_S_, .-_Z12result_checkPfS_S_
	.globl	_Z44__device_stub__Z17vector_add_kernelPKfS0_PfiPKfS0_Pfi
	.type	_Z44__device_stub__Z17vector_add_kernelPKfS0_PfiPKfS0_Pfi, @function
_Z44__device_stub__Z17vector_add_kernelPKfS0_PfiPKfS0_Pfi:
.LFB3661:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L11
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z17vector_add_kernelPKfS0_Pfi(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L11:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L13
	call	__stack_chk_fail@PLT
.L13:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3661:
	.size	_Z44__device_stub__Z17vector_add_kernelPKfS0_PfiPKfS0_Pfi, .-_Z44__device_stub__Z17vector_add_kernelPKfS0_PfiPKfS0_Pfi
	.globl	_Z17vector_add_kernelPKfS0_Pfi
	.type	_Z17vector_add_kernelPKfS0_Pfi, @function
_Z17vector_add_kernelPKfS0_Pfi:
.LFB3662:
	.cfi_startproc
	endbr64
	jmp	_Z44__device_stub__Z17vector_add_kernelPKfS0_PfiPKfS0_Pfi
	.cfi_endproc
.LFE3662:
	.size	_Z17vector_add_kernelPKfS0_Pfi, .-_Z17vector_add_kernelPKfS0_Pfi
	.section	.rodata.str1.1
.LC4:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/mgawan/nersc_cuda_tutorial/master/Session-2/vec_add.cu"
.LC5:
	.string	"Error in cudaMallocs"
.LC6:
	.string	"Fatal error: %s (%s at %s:%d)\n"
.LC7:
	.string	"*** FAILED - ABORTING\n"
.LC8:
	.string	"host to device copy error"
.LC9:
	.string	"kernel launch error"
.LC10:
	.string	"device to host copy error or kernel launch failure"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	$134217728, %edi
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	xorl	%ebx, %ebx
	subq	$72, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	_Znam@PLT
	movl	$134217728, %edi
	movq	%rax, %rbp
	call	_Znam@PLT
	movl	$134217728, %edi
	movq	%rax, %r12
	call	_Znam@PLT
	movq	%rax, %r13
.L17:
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC2(%rip), %xmm0
	movss	%xmm0, 0(%rbp,%rbx)
	call	rand@PLT
	movl	$0x00000000, 0(%r13,%rbx)
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC2(%rip), %xmm0
	movss	%xmm0, (%r12,%rbx)
	addq	$4, %rbx
	cmpq	$134217728, %rbx
	jne	.L17
	leaq	8(%rsp), %rdi
	movl	$134217728, %esi
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$134217728, %esi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$134217728, %esi
	call	cudaMalloc@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L18
	call	cudaGetErrorString@PLT
	leaq	.LC5(%rip), %rcx
	pushq	%r9
	.cfi_remember_state
	.cfi_def_cfa_offset 120
	movq	%rax, %r8
	leaq	.LC4(%rip), %r9
	pushq	$45
	.cfi_def_cfa_offset 128
	jmp	.L26
.L18:
	.cfi_restore_state
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movl	$134217728, %edx
	movq	%rbp, %rsi
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$134217728, %edx
	call	cudaMemcpy@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L19
	call	cudaGetErrorString@PLT
	leaq	.LC4(%rip), %r9
	leaq	.LC8(%rip), %rcx
	pushq	%rdi
	.cfi_def_cfa_offset 120
	movq	%rax, %r8
	pushq	$49
	.cfi_def_cfa_offset 128
.L26:
	movq	stderr(%rip), %rdi
	leaq	.LC6(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	movq	stderr(%rip), %rdi
	popq	%rcx
	.cfi_def_cfa_offset 120
	xorl	%eax, %eax
	popq	%rsi
	.cfi_def_cfa_offset 112
	leaq	.LC7(%rip), %rdx
	movl	$2, %esi
	call	__fprintf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L19:
	movl	$16777217, %edx
	movl	$1073741825, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$8, %rdx
	salq	$2, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L20
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movl	$33554432, %ecx
	movq	8(%rsp), %rdi
	call	_Z44__device_stub__Z17vector_add_kernelPKfS0_PfiPKfS0_Pfi
.L20:
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L21
	call	cudaGetErrorString@PLT
	leaq	.LC4(%rip), %r9
	leaq	.LC9(%rip), %rcx
	pushq	%rdx
	.cfi_remember_state
	.cfi_def_cfa_offset 120
	movq	%rax, %r8
	pushq	$67
	.cfi_def_cfa_offset 128
	jmp	.L26
.L21:
	.cfi_restore_state
	movq	24(%rsp), %rsi
	movq	%r13, %rdi
	movl	$2, %ecx
	movl	$134217728, %edx
	call	cudaMemcpy@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L22
	call	cudaGetErrorString@PLT
	leaq	.LC4(%rip), %r9
	leaq	.LC10(%rip), %rcx
	movq	%rax, %r8
	pushq	%rax
	.cfi_remember_state
	.cfi_def_cfa_offset 120
	pushq	$70
	.cfi_def_cfa_offset 128
	jmp	.L26
.L22:
	.cfi_restore_state
	movq	%r13, %rdx
	movq	%r12, %rsi
	movq	%rbp, %rdi
	call	_Z12result_checkPfS_S_
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L23
	call	__stack_chk_fail@PLT
.L23:
	addq	$72, %rsp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	main, .-main
	.text
	.globl	_Z52__device_stub__Z24vector_add_kernel_memoryPKfS0_PfiiPKfS0_Pfii
	.type	_Z52__device_stub__Z24vector_add_kernel_memoryPKfS0_PfiiPKfS0_Pfii, @function
_Z52__device_stub__Z24vector_add_kernel_memoryPKfS0_PfiiPKfS0_Pfii:
.LFB3663:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L27
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z24vector_add_kernel_memoryPKfS0_Pfii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L27:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L29
	call	__stack_chk_fail@PLT
.L29:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3663:
	.size	_Z52__device_stub__Z24vector_add_kernel_memoryPKfS0_PfiiPKfS0_Pfii, .-_Z52__device_stub__Z24vector_add_kernel_memoryPKfS0_PfiiPKfS0_Pfii
	.globl	_Z24vector_add_kernel_memoryPKfS0_Pfii
	.type	_Z24vector_add_kernel_memoryPKfS0_Pfii, @function
_Z24vector_add_kernel_memoryPKfS0_Pfii:
.LFB3664:
	.cfi_startproc
	endbr64
	jmp	_Z52__device_stub__Z24vector_add_kernel_memoryPKfS0_PfiiPKfS0_Pfii
	.cfi_endproc
.LFE3664:
	.size	_Z24vector_add_kernel_memoryPKfS0_Pfii, .-_Z24vector_add_kernel_memoryPKfS0_Pfii
	.section	.rodata.str1.1
.LC11:
	.string	"_Z24vector_add_kernel_memoryPKfS0_Pfii"
.LC12:
	.string	"_Z17vector_add_kernelPKfS0_Pfi"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3666:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC11(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z24vector_add_kernel_memoryPKfS0_Pfii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC12(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z17vector_add_kernelPKfS0_Pfi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3666:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC2:
	.long	805306368
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <iostream>

//some of the materials here was reused or based on NERSC/OLCF cuda training-series (https://github.com/olcf/cuda-training-series)
#define cudaCheck(msg) \
do { \
    hipError_t __err = hipGetLastError(); \
    if (__err != hipSuccess) { \
        fprintf(stderr, "Fatal error: %s (%s at %s:%d)\n", \
            msg, hipGetErrorString(__err), \
            __FILE__, __LINE__); \
        fprintf(stderr, "*** FAILED - ABORTING\n"); \
        exit(1); \
    } \
} while (0)


#define DATA_SIZE 1024*1024*32

void result_check(float *A, float *B, float *C);

// kernel
__global__ 
void vector_add_kernel(const float *A, const float *B, float *C, int size);
__global__ 
void vector_add_kernel_memory(const float *A, const float *B, float *C, int size, int stride_size);

int main(){

  float *A_h, *B_h, *C_h; // host pointers
  float *A_d, *B_d, *C_d;// device pointers

  A_h = new float[DATA_SIZE];  // allocating host arrays
  B_h = new float[DATA_SIZE];
  C_h = new float[DATA_SIZE];

  for (int i = 0; i < DATA_SIZE; i++){  // initializing host vectors
    A_h[i] = rand()/(float)RAND_MAX;
    B_h[i] = rand()/(float)RAND_MAX;
    C_h[i] = 0;
    }

  hipMalloc(&A_d, DATA_SIZE*sizeof(float));  //allocate memory for device vectors
  hipMalloc(&B_d, DATA_SIZE*sizeof(float));  
  hipMalloc(&C_d, DATA_SIZE*sizeof(float));  
  cudaCheck("Error in cudaMallocs"); //check if any errors during memory allocation on device
  // copy host vectors to device
  hipMemcpy(A_d, A_h, DATA_SIZE*sizeof(float), hipMemcpyHostToDevice);
  hipMemcpy(B_d, B_h, DATA_SIZE*sizeof(float), hipMemcpyHostToDevice);
  cudaCheck("host to device copy error");
  
  int blocks = 4;  // to set number of blocks
  int threads = 256; // to set number of threads per block
  // set memory stride size
  
  //*************************************************************************************///
  //*********** uncomment the below kernel for studying launch configurations ***********///
  //*************************************************************************************///

  vector_add_kernel<<<blocks, threads>>>(A_d, B_d, C_d, DATA_SIZE);

  //*************************************************************************************///
  //*********** uncomment the below two lines to study memory caching and coalescing ***********///
  //*************************************************************************************///
    // int mem_stride = 8; 
    // vector_add_kernel_memory<<<blocks, threads>>>(A_d, B_d, C_d, DATA_SIZE, mem_stride);

  cudaCheck("kernel launch error");
  // copy result vector from device to host
  hipMemcpy(C_h, C_d, DATA_SIZE*sizeof(float), hipMemcpyDeviceToHost);
  cudaCheck("device to host copy error or kernel launch failure");

  result_check(A_h, B_h, C_h);

  return 0;
} // end main

void result_check(float *A, float *B, float *C){
    int errors = 0;
    for(int i = 0; i < DATA_SIZE; i++){
        if(A[i] + B[i] != C[i]){
            errors++;
        }
    }
    if(errors == 0){
      std::cout<<"\tCorrectness Test Passed\n";
    }else{
      std::cout<<"\tCorrectness Test Failed\n";
    }
} 

// kernel for launch configurations
__global__ 
void vector_add_kernel(const float *A, const float *B, float *C, int size){
  int idx = threadIdx.x + blockIdx.x * blockDim.x;
  int total_threads = gridDim.x*blockDim.x;

  for(int i = idx; i < size; i+=total_threads)
    C[i] = A[i] + B[i]; 
}

// kernel for stuyding effect of caching
__global__ 
void vector_add_kernel_memory(const float *A, const float *B, float *C, int size, int stride_size){
  int idx = threadIdx.x + blockIdx.x * blockDim.x;
  int total_threads = gridDim.x*blockDim.x;
  int strides_per_thread = size/(total_threads*stride_size);

  for(int j = 0; j < strides_per_thread; j++){
      int stride_begin = stride_size * idx + j * stride_size * total_threads;
      int stride_end = stride_size + stride_begin;

      for(int i = stride_begin; i < stride_end; i++ ){
        C[i] = A[i] + B[i];
      }
  }
}

	.text
	.file	"vec_add.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI0_0:
	.long	0x30000000                      # float 4.65661287E-10
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$24, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$134217728, %edi                # imm = 0x8000000
	callq	_Znam
	movq	%rax, %rbx
	movl	$134217728, %edi                # imm = 0x8000000
	callq	_Znam
	movq	%rax, %r14
	movl	$134217728, %edi                # imm = 0x8000000
	callq	_Znam
	movq	%rax, %r15
	xorl	%r12d, %r12d
.LBB0_1:                                # =>This Inner Loop Header: Depth=1
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	.LCPI0_0(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	mulss	%xmm1, %xmm0
	movss	%xmm0, (%rbx,%r12,4)
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI0_0(%rip), %xmm0
	movss	%xmm0, (%r14,%r12,4)
	movl	$0, (%r15,%r12,4)
	incq	%r12
	cmpq	$33554432, %r12                 # imm = 0x2000000
	jne	.LBB0_1
# %bb.2:
	leaq	16(%rsp), %rdi
	movl	$134217728, %esi                # imm = 0x8000000
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movl	$134217728, %esi                # imm = 0x8000000
	callq	hipMalloc
	movq	%rsp, %rdi
	movl	$134217728, %esi                # imm = 0x8000000
	callq	hipMalloc
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB0_3
# %bb.5:
	movq	16(%rsp), %rdi
	movl	$134217728, %edx                # imm = 0x8000000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	movl	$134217728, %edx                # imm = 0x8000000
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB0_6
# %bb.7:
	movabsq	$4294967300, %rdi               # imm = 0x100000004
	leaq	252(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_9
# %bb.8:
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdx
	movl	$33554432, %ecx                 # imm = 0x2000000
	callq	_Z32__device_stub__vector_add_kernelPKfS0_Pfi
.LBB0_9:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB0_10
# %bb.11:
	movq	(%rsp), %rsi
	movl	$134217728, %edx                # imm = 0x8000000
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB0_12
# %bb.13:
	movq	%rbx, %rdi
	movq	%r14, %rsi
	movq	%r15, %rdx
	callq	_Z12result_checkPfS_S_
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB0_3:
	.cfi_def_cfa_offset 64
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.1, %edx
	movl	$.L.str.2, %r8d
	movq	%rbx, %rdi
	movq	%rax, %rcx
	movl	$47, %r9d
	jmp	.LBB0_4
.LBB0_6:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.4, %edx
	movl	$.L.str.2, %r8d
	movq	%rbx, %rdi
	movq	%rax, %rcx
	movl	$51, %r9d
	jmp	.LBB0_4
.LBB0_10:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.5, %edx
	movl	$.L.str.2, %r8d
	movq	%rbx, %rdi
	movq	%rax, %rcx
	movl	$69, %r9d
	jmp	.LBB0_4
.LBB0_12:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movl	$.L.str.6, %edx
	movl	$.L.str.2, %r8d
	movq	%rbx, %rdi
	movq	%rax, %rcx
	movl	$72, %r9d
.LBB0_4:
	xorl	%eax, %eax
	callq	fprintf
	movq	stderr(%rip), %rcx
	movl	$.L.str.3, %edi
	movl	$22, %esi
	movl	$1, %edx
	callq	fwrite@PLT
	movl	$1, %edi
	callq	exit
.Lfunc_end0:
	.size	main, .Lfunc_end0-main
	.cfi_endproc
                                        # -- End function
	.globl	_Z32__device_stub__vector_add_kernelPKfS0_Pfi # -- Begin function _Z32__device_stub__vector_add_kernelPKfS0_Pfi
	.type	_Z32__device_stub__vector_add_kernelPKfS0_Pfi,@function
_Z32__device_stub__vector_add_kernelPKfS0_Pfi: # @_Z32__device_stub__vector_add_kernelPKfS0_Pfi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17vector_add_kernelPKfS0_Pfi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z32__device_stub__vector_add_kernelPKfS0_Pfi, .Lfunc_end1-_Z32__device_stub__vector_add_kernelPKfS0_Pfi
	.cfi_endproc
                                        # -- End function
	.globl	_Z12result_checkPfS_S_          # -- Begin function _Z12result_checkPfS_S_
	.type	_Z12result_checkPfS_S_,@function
_Z12result_checkPfS_S_:                 # @_Z12result_checkPfS_S_
	.cfi_startproc
# %bb.0:
	xorl	%eax, %eax
	xorl	%ecx, %ecx
.LBB2_1:                                # =>This Inner Loop Header: Depth=1
	movss	(%rdi,%rax,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	addss	(%rsi,%rax,4), %xmm0
	cmpneqss	(%rdx,%rax,4), %xmm0
	movd	%xmm0, %r8d
	subl	%r8d, %ecx
	incq	%rax
	cmpq	$33554432, %rax                 # imm = 0x2000000
	jne	.LBB2_1
# %bb.2:
	testl	%ecx, %ecx
	movl	$.L.str.7, %eax
	movl	$.L.str.8, %esi
	cmoveq	%rax, %rsi
	movl	$_ZSt4cout, %edi
	movl	$25, %edx
	jmp	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l # TAILCALL
.Lfunc_end2:
	.size	_Z12result_checkPfS_S_, .Lfunc_end2-_Z12result_checkPfS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z39__device_stub__vector_add_kernel_memoryPKfS0_Pfii # -- Begin function _Z39__device_stub__vector_add_kernel_memoryPKfS0_Pfii
	.type	_Z39__device_stub__vector_add_kernel_memoryPKfS0_Pfii,@function
_Z39__device_stub__vector_add_kernel_memoryPKfS0_Pfii: # @_Z39__device_stub__vector_add_kernel_memoryPKfS0_Pfii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	movq	%rsp, %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z24vector_add_kernel_memoryPKfS0_Pfii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z39__device_stub__vector_add_kernel_memoryPKfS0_Pfii, .Lfunc_end3-_Z39__device_stub__vector_add_kernel_memoryPKfS0_Pfii
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17vector_add_kernelPKfS0_Pfi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z24vector_add_kernel_memoryPKfS0_Pfii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Fatal error: %s (%s at %s:%d)\n"
	.size	.L.str, 31

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Error in cudaMallocs"
	.size	.L.str.1, 21

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/mgawan/nersc_cuda_tutorial/master/Session-2/vec_add.hip"
	.size	.L.str.2, 118

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"*** FAILED - ABORTING\n"
	.size	.L.str.3, 23

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"host to device copy error"
	.size	.L.str.4, 26

	.type	_Z17vector_add_kernelPKfS0_Pfi,@object # @_Z17vector_add_kernelPKfS0_Pfi
	.section	.rodata,"a",@progbits
	.globl	_Z17vector_add_kernelPKfS0_Pfi
	.p2align	3, 0x0
_Z17vector_add_kernelPKfS0_Pfi:
	.quad	_Z32__device_stub__vector_add_kernelPKfS0_Pfi
	.size	_Z17vector_add_kernelPKfS0_Pfi, 8

	.type	.L.str.5,@object                # @.str.5
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.5:
	.asciz	"kernel launch error"
	.size	.L.str.5, 20

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"device to host copy error or kernel launch failure"
	.size	.L.str.6, 51

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"\tCorrectness Test Passed\n"
	.size	.L.str.7, 26

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"\tCorrectness Test Failed\n"
	.size	.L.str.8, 26

	.type	_Z24vector_add_kernel_memoryPKfS0_Pfii,@object # @_Z24vector_add_kernel_memoryPKfS0_Pfii
	.section	.rodata,"a",@progbits
	.globl	_Z24vector_add_kernel_memoryPKfS0_Pfii
	.p2align	3, 0x0
_Z24vector_add_kernel_memoryPKfS0_Pfii:
	.quad	_Z39__device_stub__vector_add_kernel_memoryPKfS0_Pfii
	.size	_Z24vector_add_kernel_memoryPKfS0_Pfii, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z17vector_add_kernelPKfS0_Pfi"
	.size	.L__unnamed_1, 31

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z24vector_add_kernel_memoryPKfS0_Pfii"
	.size	.L__unnamed_2, 39

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z32__device_stub__vector_add_kernelPKfS0_Pfi
	.addrsig_sym _Z39__device_stub__vector_add_kernel_memoryPKfS0_Pfii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z17vector_add_kernelPKfS0_Pfi
	.addrsig_sym _ZSt4cout
	.addrsig_sym _Z24vector_add_kernel_memoryPKfS0_Pfii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z17vector_add_kernelPKfS0_Pfi ; -- Begin function _Z17vector_add_kernelPKfS0_Pfi
	.globl	_Z17vector_add_kernelPKfS0_Pfi
	.p2align	8
	.type	_Z17vector_add_kernelPKfS0_Pfi,@function
_Z17vector_add_kernelPKfS0_Pfi:         ; @_Z17vector_add_kernelPKfS0_Pfi
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x2c
	s_load_b32 s12, s[0:1], 0x18
	s_add_u32 s2, s0, 32
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s8, s4, 0xffff
	s_mov_b32 s4, exec_lo
	v_mad_u64_u32 v[1:2], null, s15, s8, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s12, v1
	s_cbranch_execz .LBB0_3
; %bb.1:                                ; %.lr.ph.preheader
	s_load_b32 s9, s[2:3], 0x0
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x10
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s1, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s8, s9, s8
	s_ashr_i32 s9, s8, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[10:11], s[8:9], 2
.LBB0_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_u32 v4, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
	v_add_co_u32 v6, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v3, vcc_lo
	global_load_b32 v0, v[4:5], off
	global_load_b32 v6, v[6:7], off
	v_add_nc_u32_e32 v1, s8, v1
	v_add_co_u32 v4, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, v2, s10
	v_add_co_ci_u32_e32 v3, vcc_lo, s11, v3, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v0, v0, v6
	v_cmp_le_i32_e64 s0, s12, v1
	global_store_b32 v[4:5], v0, off
	s_or_b32 s1, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB0_2
.LBB0_3:                                ; %Flow26
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17vector_add_kernelPKfS0_Pfi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z17vector_add_kernelPKfS0_Pfi, .Lfunc_end0-_Z17vector_add_kernelPKfS0_Pfi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 260
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z24vector_add_kernel_memoryPKfS0_Pfii ; -- Begin function _Z24vector_add_kernel_memoryPKfS0_Pfii
	.globl	_Z24vector_add_kernel_memoryPKfS0_Pfii
	.p2align	8
	.type	_Z24vector_add_kernel_memoryPKfS0_Pfii,@function
_Z24vector_add_kernel_memoryPKfS0_Pfii: ; @_Z24vector_add_kernel_memoryPKfS0_Pfii
; %bb.0:
	s_clause 0x2
	s_load_b32 s4, s[0:1], 0x2c
	s_load_b32 s10, s[0:1], 0x20
	s_load_b64 s[2:3], s[0:1], 0x18
	s_mov_b32 s12, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s13, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mul_i32 s10, s10, s13
	s_ashr_i32 s8, s2, 31
	s_mul_i32 s11, s10, s3
	s_add_i32 s2, s2, s8
	s_ashr_i32 s4, s11, 31
	s_xor_b32 s2, s2, s8
	s_add_i32 s5, s11, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_xor_b32 s5, s5, s4
	s_xor_b32 s4, s8, s4
	v_cvt_f32_u32_e32 v1, s5
	s_sub_i32 s7, 0, s5
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v1, v1
	v_readfirstlane_b32 s6, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s7, s7, s6
	s_mul_hi_u32 s7, s6, s7
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s6, s6, s7
	s_mul_hi_u32 s6, s2, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s7, s6, s5
	s_sub_i32 s2, s2, s7
	s_add_i32 s7, s6, 1
	s_sub_i32 s8, s2, s5
	s_cmp_ge_u32 s2, s5
	s_cselect_b32 s6, s7, s6
	s_cselect_b32 s2, s8, s2
	s_add_i32 s7, s6, 1
	s_cmp_ge_u32 s2, s5
	s_cselect_b32 s2, s7, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s2, s2, s4
	s_sub_i32 s2, s2, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lt_i32 s2, 1
	s_cbranch_scc1 .LBB1_7
; %bb.1:                                ; %.lr.ph29.preheader
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[8:9], s[0:1], 0x10
	v_mad_u64_u32 v[1:2], null, s15, s13, v[0:1]
	s_cmp_gt_i32 s3, 0
	s_cselect_b32 s1, -1, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_lo_u32 v2, s3, v1
.LBB1_2:                                ; %.lr.ph29
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_4 Depth 2
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB1_6
; %bb.3:                                ; %.lr.ph.preheader
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v3, 31, v2
	v_mad_u64_u32 v[4:5], null, s12, s10, v[1:2]
	s_mov_b32 s13, 0
	v_lshlrev_b64 v[7:8], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v0, v4, s3
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, vcc_lo, s4, v7
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v8, vcc_lo
	v_add_co_u32 v5, vcc_lo, s6, v7
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v8, vcc_lo
	v_add_co_u32 v7, vcc_lo, s8, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s9, v8, vcc_lo
	v_add_nc_u32_e32 v9, s3, v0
.LBB1_4:                                ; %.lr.ph
                                        ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_b32 v10, v[3:4], off
	global_load_b32 v11, v[5:6], off
	v_add_co_u32 v3, vcc_lo, v3, 4
	v_add_nc_u32_e32 v0, 1, v0
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
	v_add_co_u32 v5, vcc_lo, v5, 4
	v_add_co_ci_u32_e32 v6, vcc_lo, 0, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_cmp_ge_i32_e32 vcc_lo, v0, v9
	s_or_b32 s13, vcc_lo, s13
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v10, v10, v11
	global_store_b32 v[7:8], v10, off
	v_add_co_u32 v7, s0, v7, 4
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v8, s0, 0, v8, s0
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB1_4
; %bb.5:                                ; %Flow
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
.LBB1_6:                                ; %._crit_edge
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v2, s11, v2
	s_add_i32 s12, s12, 1
	s_cmp_eq_u32 s12, s2
	s_cbranch_scc0 .LBB1_2
.LBB1_7:                                ; %._crit_edge30
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z24vector_add_kernel_memoryPKfS0_Pfii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 12
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z24vector_add_kernel_memoryPKfS0_Pfii, .Lfunc_end1-_Z24vector_add_kernel_memoryPKfS0_Pfii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 496
; NumSgprs: 18
; NumVgprs: 12
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 12
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z17vector_add_kernelPKfS0_Pfi
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z17vector_add_kernelPKfS0_Pfi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z24vector_add_kernel_memoryPKfS0_Pfii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z24vector_add_kernel_memoryPKfS0_Pfii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     12
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
