#include <cuda_runtime.h>
#include <stdio.h>
#include <device_launch_parameters.h>
#include <stdlib.h>

#define THREADS_PER_BLOCK 16

void save_to_file(double *AB, const int a_size) {
    FILE *f = fopen("out.txt", "w+");

    fprintf(f, "%d\n", a_size);

    for(int i = 0; i < a_size*(a_size + 1); i++) {
        if((i + 1) % (a_size+1) == 0) {
            fprintf(f, "\n");
            continue;
        }
        fprintf(f, "%lf ", AB[i]);
    }

    for(int i = 0; i < a_size; i++)
        fprintf(f, "%lf ", AB[a_size + i*(a_size + 1)]);
    fprintf(f, "\n");

    fclose(f);
}

double *malloc_matrix(const int a, const int b) {
    return (double*)malloc(sizeof(double *)*a*b);
}

double *load_from_file(int *a_size, char *name) {
    FILE *f = fopen(name, "r");

    int size;
    fscanf(f, "%d", &size);
    double *matrix_ab = malloc_matrix(size, size + 1);

    for(int i = 0; i < size*(size + 1); i++) {
        if((i+1) % (size + 1) == 0)
            continue;
        fscanf(f, "%lf", &matrix_ab[i]);
    }

    for(int i = 0; i < size; i++) {
        fscanf(f, "%lf", &matrix_ab[size + i*(size + 1)]);
    }

    fclose(f);

    *a_size = size;

    return matrix_ab;
}


void print_matrix(double *matrix, const int a, const int b) {
    for(int i = 0; i < a*b; i++) {
        printf("%lf\t", matrix[i]);
        if((i+1) % b == 0)
            printf("\n");
    }
}

void print_output(double *AB, const int a_size) {
    printf("%d\n", a_size);

    for(int i = 0; i < a_size*(a_size + 1); i++) {
        if((i + 1) % (a_size+1) == 0) {
            printf("\n");
            continue;
        }
        printf("%lf\t", AB[i]);
    }

    for(int i = 0; i < a_size; i++)
        printf("%lf\t", AB[a_size + i*(a_size + 1)]);
    printf("\n");
}

int load_size() {
    int size;
    scanf("%d", &size);
    return size;
}

void load_ab_matrix(double *a, const int size) {
    for(int i = 0; i < size*(size + 1); i++) {
        if((i+1) % (size + 1) == 0)
            continue;
        scanf("%lf", &a[i]);
    }

    for(int i = 0; i < size; i++) {
        scanf("%lf", &a[size + i*(size + 1)]);
    }
}

double  *load_input(int *size) {
    *size = load_size();
    double *matrix_ab = malloc_matrix(*size, *size + 1);
    load_ab_matrix(matrix_ab, *size);
    return matrix_ab;
}


__global__ void replace_zero_gpu(double *AB, int rows, int columns, int column) {
    if(fabs(AB[column*columns + column]) <= 1e-4) {
        int row = column;
        for(; row < rows; row++) {
            if(fabs(AB[row*columns + column]) > 1e-4)
                break;
        }
        int threadId = blockDim.x*blockIdx.x + threadIdx.x;
        if(threadId + column >= columns)
            return;

        int zero = column*columns + column + threadId;
        int chosen = row*columns + column + threadId;
        AB[zero] += AB[chosen];
    }
}


__global__ void column_elimination_gpu(double *AB, int rows, int columns, int column) {
    int threadId = blockDim.x*blockIdx.x + threadIdx.x;
    if(threadId >= (rows - 1 - column)*(columns - column))
        return;

    int el_row = column + threadId/(columns - column) + 1;
    int el_col = column + threadId%(columns - column);
    int el = el_col + el_row*columns;
    int upper_el = el_col + column*columns;

    int main_el = column + column*columns;
    int main2_el = column + el_row*columns;
    double f = AB[main2_el]/AB[main_el];

    AB[el] -= f*AB[upper_el];
}

__global__ void multiple_column(double *AB, int rows, int columns, int row) {
    int threadId = threadIdx.x;
    AB[(threadId * columns) + row] *= AB[columns*(row + 1) - 1];
}

__global__ void reverse_row_elimination(double *AB, int rows, int columns, int row) {
    int threadId = threadIdx.x;
    int cols = columns - 2 - row;

    int start_index = row*columns + row + 1;

    int j = cols%2;
    for(int i = cols/2; i > 0; i/=2) {
        if(threadId >= i)
            return;

        AB[start_index + threadId] += (AB[start_index + threadId + i + j]);
        AB[start_index + threadId + i + j] = 0;
        if(j == 1)
            i++;
        j = i%2;
        __syncthreads();
    }

    int x_el = (row + 1)*columns - 1;
    int diag_el = row*columns + row;

    if(diag_el + 1 != x_el) {
        AB[x_el] -= AB[diag_el + 1];
        AB[diag_el + 1] = 0.0;
    }

    AB[x_el] /= AB[diag_el];
    AB[diag_el] = 1.0;
}

__global__ void sum_row(double *AB, int rows, int columns, int row) {
    int threadId = threadIdx.x;

    int j = columns%2;
    for(int i = columns/2; i > 0; i/=2) {
        if(threadId >= i)
            return;

        AB[threadId] += AB[threadId + i + j];
        __syncthreads();
        if(j == 1)
            i++;
        j = i%2;
    }
}


void start_gaussian_elimination_gpu(double *AB, int rows, int cols) {
    double *AB_gpu;

    cudaMalloc(&AB_gpu, sizeof(double)*rows*cols);
    cudaMemcpy(AB_gpu, (void*)AB, sizeof(double)*rows*cols, cudaMemcpyHostToDevice);

    int block_size;

    for(int column = 0; column < cols - 1; column++) {
        block_size = (cols - column - 1)/THREADS_PER_BLOCK + 1;
        replace_zero_gpu<<<block_size, THREADS_PER_BLOCK>>>(AB_gpu, rows, cols, column);
        cudaThreadSynchronize();

        block_size = ((rows - column)*(cols - column) - 1)/THREADS_PER_BLOCK + 1;
        column_elimination_gpu<<<block_size, THREADS_PER_BLOCK>>>(AB_gpu, rows, cols, column);
        cudaThreadSynchronize();
    }

    for(int row = rows - 1; row >= 0; row--) {
        reverse_row_elimination<<<1, cols>>>(AB_gpu, rows, cols, row);
        multiple_column<<<1, row>>>(AB_gpu, rows, cols, row);

        cudaThreadSynchronize();
    }

    cudaMemcpy(AB, (void*)AB_gpu, sizeof(double)*rows*cols, cudaMemcpyDeviceToHost);

    cudaFree(AB_gpu);
}


int main(int argc, char ** argv) {
    int size;
    double *AB = load_from_file(&size, argv[1]);

    print_output(AB, size);

    start_gaussian_elimination_gpu(AB, size, size + 1);

    printf("\n\n");

    print_output(AB, size);

    save_to_file(AB, size);

    return 0;
}

	.file	"tmpxft_003b182a_00000000-6_gpu_solve.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2039:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2039:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"w+"
.LC1:
	.string	"out.txt"
.LC2:
	.string	"%d\n"
.LC3:
	.string	"\n"
.LC4:
	.string	"%lf "
	.text
	.globl	_Z12save_to_filePdi
	.type	_Z12save_to_filePdi, @function
_Z12save_to_filePdi:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leaq	.LC4(%rip), %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rdi, %r13
	leaq	.LC1(%rip), %rdi
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%esi, %r12d
	leaq	.LC0(%rip), %rsi
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	leal	1(%r12), %ebx
	movl	%ebx, %r14d
	imull	%r12d, %r14d
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	call	fopen@PLT
	movl	%r12d, %ecx
	movl	$2, %esi
	leaq	.LC2(%rip), %rdx
	movq	%rax, 8(%rsp)
	movq	%rax, %rdi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
.L3:
	cmpl	%ebp, %r14d
	jle	.L11
	leal	1(%rbp), %eax
	cltd
	idivl	%ebx
	testl	%edx, %edx
	jne	.L4
	movq	8(%rsp), %rdi
	leaq	.LC3(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	jmp	.L5
.L4:
	movq	8(%rsp), %rdi
	movq	%r15, %rdx
	movl	$2, %esi
	movb	$1, %al
	movsd	0(%r13,%rbp,8), %xmm0
	call	__fprintf_chk@PLT
.L5:
	incq	%rbp
	jmp	.L3
.L11:
	movslq	%ebx, %rbx
	leaq	.LC4(%rip), %r15
	salq	$3, %rbx
	leaq	-8(%r13,%rbx), %r14
	xorl	%r13d, %r13d
.L7:
	cmpl	%r12d, %r13d
	jge	.L12
	movsd	(%r14), %xmm0
	movq	8(%rsp), %rdi
	movq	%r15, %rdx
	movb	$1, %al
	movl	$2, %esi
	incl	%r13d
	addq	%rbx, %r14
	call	__fprintf_chk@PLT
	jmp	.L7
.L12:
	movq	8(%rsp), %rdi
	leaq	.LC3(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	movq	8(%rsp), %rdi
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	fclose@PLT
	.cfi_endproc
.LFE2027:
	.size	_Z12save_to_filePdi, .-_Z12save_to_filePdi
	.globl	_Z13malloc_matrixii
	.type	_Z13malloc_matrixii, @function
_Z13malloc_matrixii:
.LFB2028:
	.cfi_startproc
	endbr64
	movslq	%edi, %rdi
	movslq	%esi, %rsi
	imulq	%rsi, %rdi
	salq	$3, %rdi
	jmp	malloc@PLT
	.cfi_endproc
.LFE2028:
	.size	_Z13malloc_matrixii, .-_Z13malloc_matrixii
	.section	.rodata.str1.1
.LC5:
	.string	"r"
.LC6:
	.string	"%d"
.LC7:
	.string	"%lf"
	.text
	.globl	_Z14load_from_filePiPc
	.type	_Z14load_from_filePiPc, @function
_Z14load_from_filePiPc:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	leaq	.LC7(%rip), %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rdi, %r12
	movq	%rsi, %rdi
	leaq	.LC5(%rip), %rsi
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	movq	%fs:40, %rax
	movq	%rax, 8(%rsp)
	xorl	%eax, %eax
	call	fopen@PLT
	leaq	4(%rsp), %rdx
	leaq	.LC6(%rip), %rsi
	movq	%rax, %rdi
	movq	%rax, %rbx
	xorl	%eax, %eax
	call	__isoc23_fscanf@PLT
	movl	4(%rsp), %edi
	leal	1(%rdi), %esi
	call	_Z13malloc_matrixii
	movq	%rax, %rbp
	movq	%rax, %r15
.L15:
	movl	4(%rsp), %eax
	leal	1(%rax), %ecx
	imull	%ecx, %eax
	cmpl	%r13d, %eax
	jle	.L25
	incl	%r13d
	movl	%r13d, %eax
	cltd
	idivl	%ecx
	testl	%edx, %edx
	je	.L16
	movq	%r15, %rdx
	movq	%r14, %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	call	__isoc23_fscanf@PLT
.L16:
	addq	$8, %r15
	jmp	.L15
.L25:
	xorl	%r14d, %r14d
	leaq	.LC7(%rip), %r13
.L18:
	movl	4(%rsp), %edx
	cmpl	%r14d, %edx
	jle	.L26
	leal	1(%rdx), %eax
	movq	%r13, %rsi
	movq	%rbx, %rdi
	imull	%r14d, %eax
	incl	%r14d
	addl	%edx, %eax
	cltq
	leaq	0(%rbp,%rax,8), %rdx
	xorl	%eax, %eax
	call	__isoc23_fscanf@PLT
	jmp	.L18
.L26:
	movq	%rbx, %rdi
	call	fclose@PLT
	movl	4(%rsp), %eax
	movl	%eax, (%r12)
	movq	8(%rsp), %rax
	subq	%fs:40, %rax
	je	.L20
	call	__stack_chk_fail@PLT
.L20:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	movq	%rbp, %rax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z14load_from_filePiPc, .-_Z14load_from_filePiPc
	.section	.rodata.str1.1
.LC8:
	.string	"%lf\t"
	.text
	.globl	_Z12print_matrixPdii
	.type	_Z12print_matrixPdii, @function
_Z12print_matrixPdii:
.LFB2030:
	.cfi_startproc
	endbr64
	imull	%edx, %esi
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	leaq	.LC8(%rip), %r14
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movq	%rdi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movl	%esi, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movl	%edx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	xorl	%ebx, %ebx
.L28:
	cmpl	%ebx, %r12d
	jle	.L32
	movsd	0(%r13,%rbx,8), %xmm0
	movq	%r14, %rsi
	movl	$2, %edi
	movb	$1, %al
	call	__printf_chk@PLT
	leal	1(%rbx), %eax
	cltd
	idivl	%ebp
	testl	%edx, %edx
	jne	.L29
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L29:
	incq	%rbx
	jmp	.L28
.L32:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2030:
	.size	_Z12print_matrixPdii, .-_Z12print_matrixPdii
	.globl	_Z12print_outputPdi
	.type	_Z12print_outputPdi, @function
_Z12print_outputPdi:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	%esi, %edx
	xorl	%eax, %eax
	leaq	.LC8(%rip), %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rdi, %r13
	movl	$2, %edi
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%esi, %ebp
	leaq	.LC2(%rip), %rsi
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	leal	1(%rbp), %ebx
	pushq	%rcx
	.cfi_def_cfa_offset 64
	movl	%ebx, %r14d
	imull	%ebp, %r14d
	call	__printf_chk@PLT
.L34:
	cmpl	%r12d, %r14d
	jle	.L41
	leal	1(%r12), %eax
	cltd
	idivl	%ebx
	testl	%edx, %edx
	jne	.L35
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L36
.L35:
	movsd	0(%r13,%r12,8), %xmm0
	movq	%r15, %rsi
	movl	$2, %edi
	movb	$1, %al
	call	__printf_chk@PLT
.L36:
	incq	%r12
	jmp	.L34
.L41:
	movslq	%ebx, %rbx
	xorl	%r12d, %r12d
	leaq	.LC8(%rip), %r14
	salq	$3, %rbx
	leaq	-8(%r13,%rbx), %r13
.L38:
	cmpl	%ebp, %r12d
	jge	.L42
	movsd	0(%r13), %xmm0
	movq	%r14, %rsi
	movl	$2, %edi
	movb	$1, %al
	incl	%r12d
	addq	%rbx, %r13
	call	__printf_chk@PLT
	jmp	.L38
.L42:
	popq	%rdx
	.cfi_def_cfa_offset 56
	leaq	.LC3(%rip), %rsi
	popq	%rbx
	.cfi_def_cfa_offset 48
	movl	$2, %edi
	popq	%rbp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	__printf_chk@PLT
	.cfi_endproc
.LFE2031:
	.size	_Z12print_outputPdi, .-_Z12print_outputPdi
	.globl	_Z9load_sizev
	.type	_Z9load_sizev, @function
_Z9load_sizev:
.LFB2032:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	leaq	.LC6(%rip), %rdi
	movq	%fs:40, %rax
	movq	%rax, 8(%rsp)
	xorl	%eax, %eax
	leaq	4(%rsp), %rsi
	call	__isoc23_scanf@PLT
	movl	4(%rsp), %eax
	movq	8(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L44
	call	__stack_chk_fail@PLT
.L44:
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2032:
	.size	_Z9load_sizev, .-_Z9load_sizev
	.globl	_Z14load_ab_matrixPdi
	.type	_Z14load_ab_matrixPdi, @function
_Z14load_ab_matrixPdi:
.LFB2033:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rdi, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rdi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%esi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	leal	1(%rsi), %ebx
	movl	%ebx, %r14d
	pushq	%rdx
	.cfi_def_cfa_offset 64
	imull	%esi, %r14d
.L47:
	cmpl	%r12d, %r14d
	jle	.L56
	incl	%r12d
	movl	%r12d, %eax
	cltd
	idivl	%ebx
	testl	%edx, %edx
	je	.L48
	movq	%r15, %rsi
	leaq	.LC7(%rip), %rdi
	xorl	%eax, %eax
	call	__isoc23_scanf@PLT
.L48:
	addq	$8, %r15
	jmp	.L47
.L56:
	movslq	%ebx, %rbx
	xorl	%r12d, %r12d
	leaq	.LC7(%rip), %r14
	salq	$3, %rbx
	leaq	-8(%r13,%rbx), %r13
.L50:
	cmpl	%ebp, %r12d
	jge	.L57
	movq	%r13, %rsi
	movq	%r14, %rdi
	xorl	%eax, %eax
	incl	%r12d
	call	__isoc23_scanf@PLT
	addq	%rbx, %r13
	jmp	.L50
.L57:
	popq	%rax
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2033:
	.size	_Z14load_ab_matrixPdi, .-_Z14load_ab_matrixPdi
	.globl	_Z10load_inputPi
	.type	_Z10load_inputPi, @function
_Z10load_inputPi:
.LFB2034:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rdi, %rbp
	subq	$16, %rsp
	.cfi_def_cfa_offset 32
	call	_Z9load_sizev
	movl	%eax, 0(%rbp)
	movl	%eax, %edi
	leal	1(%rax), %esi
	call	_Z13malloc_matrixii
	movl	0(%rbp), %esi
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
	call	_Z14load_ab_matrixPdi
	movq	8(%rsp), %rax
	addq	$16, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2034:
	.size	_Z10load_inputPi, .-_Z10load_inputPi
	.globl	_Z39__device_stub__Z16replace_zero_gpuPdiiiPdiii
	.type	_Z39__device_stub__Z16replace_zero_gpuPdiiiPdiii, @function
_Z39__device_stub__Z16replace_zero_gpuPdiiiPdiii:
.LFB2061:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movl	%esi, 20(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 16(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 12(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L60
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z16replace_zero_gpuPdiii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L60:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L62
	call	__stack_chk_fail@PLT
.L62:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2061:
	.size	_Z39__device_stub__Z16replace_zero_gpuPdiiiPdiii, .-_Z39__device_stub__Z16replace_zero_gpuPdiiiPdiii
	.globl	_Z16replace_zero_gpuPdiii
	.type	_Z16replace_zero_gpuPdiii, @function
_Z16replace_zero_gpuPdiii:
.LFB2062:
	.cfi_startproc
	endbr64
	jmp	_Z39__device_stub__Z16replace_zero_gpuPdiiiPdiii
	.cfi_endproc
.LFE2062:
	.size	_Z16replace_zero_gpuPdiii, .-_Z16replace_zero_gpuPdiii
	.globl	_Z45__device_stub__Z22column_elimination_gpuPdiiiPdiii
	.type	_Z45__device_stub__Z22column_elimination_gpuPdiiiPdiii, @function
_Z45__device_stub__Z22column_elimination_gpuPdiiiPdiii:
.LFB2063:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movl	%esi, 20(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 16(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 12(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L65
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z22column_elimination_gpuPdiii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L65:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L67
	call	__stack_chk_fail@PLT
.L67:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2063:
	.size	_Z45__device_stub__Z22column_elimination_gpuPdiiiPdiii, .-_Z45__device_stub__Z22column_elimination_gpuPdiiiPdiii
	.globl	_Z22column_elimination_gpuPdiii
	.type	_Z22column_elimination_gpuPdiii, @function
_Z22column_elimination_gpuPdiii:
.LFB2064:
	.cfi_startproc
	endbr64
	jmp	_Z45__device_stub__Z22column_elimination_gpuPdiiiPdiii
	.cfi_endproc
.LFE2064:
	.size	_Z22column_elimination_gpuPdiii, .-_Z22column_elimination_gpuPdiii
	.globl	_Z38__device_stub__Z15multiple_columnPdiiiPdiii
	.type	_Z38__device_stub__Z15multiple_columnPdiiiPdiii, @function
_Z38__device_stub__Z15multiple_columnPdiiiPdiii:
.LFB2065:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movl	%esi, 20(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 16(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 12(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L70
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z15multiple_columnPdiii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L70:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L72
	call	__stack_chk_fail@PLT
.L72:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2065:
	.size	_Z38__device_stub__Z15multiple_columnPdiiiPdiii, .-_Z38__device_stub__Z15multiple_columnPdiiiPdiii
	.globl	_Z15multiple_columnPdiii
	.type	_Z15multiple_columnPdiii, @function
_Z15multiple_columnPdiii:
.LFB2066:
	.cfi_startproc
	endbr64
	jmp	_Z38__device_stub__Z15multiple_columnPdiiiPdiii
	.cfi_endproc
.LFE2066:
	.size	_Z15multiple_columnPdiii, .-_Z15multiple_columnPdiii
	.globl	_Z46__device_stub__Z23reverse_row_eliminationPdiiiPdiii
	.type	_Z46__device_stub__Z23reverse_row_eliminationPdiiiPdiii, @function
_Z46__device_stub__Z23reverse_row_eliminationPdiiiPdiii:
.LFB2067:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movl	%esi, 20(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 16(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 12(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L75
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z23reverse_row_eliminationPdiii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L75:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L77
	call	__stack_chk_fail@PLT
.L77:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2067:
	.size	_Z46__device_stub__Z23reverse_row_eliminationPdiiiPdiii, .-_Z46__device_stub__Z23reverse_row_eliminationPdiiiPdiii
	.globl	_Z23reverse_row_eliminationPdiii
	.type	_Z23reverse_row_eliminationPdiii, @function
_Z23reverse_row_eliminationPdiii:
.LFB2068:
	.cfi_startproc
	endbr64
	jmp	_Z46__device_stub__Z23reverse_row_eliminationPdiiiPdiii
	.cfi_endproc
.LFE2068:
	.size	_Z23reverse_row_eliminationPdiii, .-_Z23reverse_row_eliminationPdiii
	.globl	_Z30start_gaussian_elimination_gpuPdii
	.type	_Z30start_gaussian_elimination_gpuPdii, @function
_Z30start_gaussian_elimination_gpuPdii:
.LFB2035:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movslq	%edx, %rdx
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movabsq	$4294967312, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rdi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%esi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdx, %rbx
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	movslq	%esi, %rax
	leaq	24(%rsp), %rdi
	imulq	%rdx, %rax
	salq	$3, %rax
	movq	%rax, %rsi
	movq	%rax, 8(%rsp)
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdx
	movq	24(%rsp), %rdi
	movq	%r13, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
.L81:
	leal	-1(%rbx), %eax
	cmpl	%r12d, %eax
	jle	.L91
	subl	%r12d, %eax
	movl	%ebx, %r15d
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	sarl	$4, %eax
	movq	%r14, %rdx
	movl	$1, %ecx
	subl	%r12d, %r15d
	incl	%eax
	movq	%r14, 44(%rsp)
	movl	%eax, 32(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 36(%rsp)
	movq	32(%rsp), %rdi
	movl	40(%rsp), %esi
	movl	$1, 52(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L82
	movq	24(%rsp), %rdi
	movl	%r12d, %ecx
	movl	%ebx, %edx
	movl	%ebp, %esi
	call	_Z39__device_stub__Z16replace_zero_gpuPdiiiPdiii
.L82:
	call	cudaThreadSynchronize@PLT
	movl	%ebp, %eax
	movl	$16, %ecx
	xorl	%r9d, %r9d
	subl	%r12d, %eax
	xorl	%r8d, %r8d
	movq	%r14, 44(%rsp)
	imull	%r15d, %eax
	movl	$1, 52(%rsp)
	decl	%eax
	cltd
	idivl	%ecx
	movq	%r14, %rdx
	movl	$1, %ecx
	incl	%eax
	movl	%eax, 32(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 36(%rsp)
	movq	32(%rsp), %rdi
	movl	40(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L83
	movq	24(%rsp), %rdi
	movl	%r12d, %ecx
	movl	%ebx, %edx
	movl	%ebp, %esi
	call	_Z45__device_stub__Z22column_elimination_gpuPdiiiPdiii
.L83:
	call	cudaThreadSynchronize@PLT
	incl	%r12d
	jmp	.L81
.L91:
	movabsq	$4294967297, %r14
	leal	-1(%rbp), %r12d
.L85:
	testl	%r12d, %r12d
	js	.L92
	movq	%r14, 48(%rsp)
	movl	52(%rsp), %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	%ebx, 44(%rsp)
	movq	44(%rsp), %rdx
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%r14, 32(%rsp)
	movl	$1, 40(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L86
	movq	24(%rsp), %rdi
	movl	%r12d, %ecx
	movl	%ebx, %edx
	movl	%ebp, %esi
	call	_Z46__device_stub__Z23reverse_row_eliminationPdiiiPdiii
.L86:
	movq	%r14, 48(%rsp)
	movl	52(%rsp), %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	%r12d, 44(%rsp)
	movq	44(%rsp), %rdx
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%r14, 32(%rsp)
	movl	$1, 40(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L87
	movq	24(%rsp), %rdi
	movl	%r12d, %ecx
	movl	%ebx, %edx
	movl	%ebp, %esi
	call	_Z38__device_stub__Z15multiple_columnPdiiiPdiii
.L87:
	call	cudaThreadSynchronize@PLT
	decl	%r12d
	jmp	.L85
.L92:
	movq	8(%rsp), %rdx
	movq	24(%rsp), %rsi
	movq	%r13, %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L89
	call	__stack_chk_fail@PLT
.L89:
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2035:
	.size	_Z30start_gaussian_elimination_gpuPdii, .-_Z30start_gaussian_elimination_gpuPdii
	.section	.rodata.str1.1
.LC9:
	.string	"\n\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2036:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	subq	$24, %rsp
	.cfi_def_cfa_offset 48
	movq	8(%rsi), %rsi
	movq	%fs:40, %rax
	movq	%rax, 8(%rsp)
	xorl	%eax, %eax
	leaq	4(%rsp), %rdi
	call	_Z14load_from_filePiPc
	movl	4(%rsp), %ebp
	movq	%rax, %rbx
	movq	%rax, %rdi
	movl	%ebp, %esi
	call	_Z12print_outputPdi
	leal	1(%rbp), %edx
	movl	%ebp, %esi
	movq	%rbx, %rdi
	call	_Z30start_gaussian_elimination_gpuPdii
	leaq	.LC9(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	%ebp, %esi
	movq	%rbx, %rdi
	call	_Z12print_outputPdi
	movl	%ebp, %esi
	movq	%rbx, %rdi
	call	_Z12save_to_filePdi
	movq	8(%rsp), %rax
	subq	%fs:40, %rax
	je	.L94
	call	__stack_chk_fail@PLT
.L94:
	addq	$24, %rsp
	.cfi_def_cfa_offset 24
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2036:
	.size	main, .-main
	.text
	.globl	_Z29__device_stub__Z7sum_rowPdiiiPdiii
	.type	_Z29__device_stub__Z7sum_rowPdiiiPdiii, @function
_Z29__device_stub__Z7sum_rowPdiiiPdiii:
.LFB2069:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movl	%esi, 20(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 16(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 12(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L96
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z7sum_rowPdiii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L96:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L98
	call	__stack_chk_fail@PLT
.L98:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2069:
	.size	_Z29__device_stub__Z7sum_rowPdiiiPdiii, .-_Z29__device_stub__Z7sum_rowPdiiiPdiii
	.globl	_Z7sum_rowPdiii
	.type	_Z7sum_rowPdiii, @function
_Z7sum_rowPdiii:
.LFB2070:
	.cfi_startproc
	endbr64
	jmp	_Z29__device_stub__Z7sum_rowPdiiiPdiii
	.cfi_endproc
.LFE2070:
	.size	_Z7sum_rowPdiii, .-_Z7sum_rowPdiii
	.section	.rodata.str1.1
.LC10:
	.string	"_Z7sum_rowPdiii"
.LC11:
	.string	"_Z23reverse_row_eliminationPdiii"
.LC12:
	.string	"_Z15multiple_columnPdiii"
.LC13:
	.string	"_Z22column_elimination_gpuPdiii"
.LC14:
	.string	"_Z16replace_zero_gpuPdiii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2072:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC10(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z7sum_rowPdiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC11(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z23reverse_row_eliminationPdiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC12(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z15multiple_columnPdiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC13(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z22column_elimination_gpuPdiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC14(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z16replace_zero_gpuPdiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2072:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <hip/hip_runtime.h>
#include <stdio.h>

#include <stdlib.h>

#define THREADS_PER_BLOCK 16

void save_to_file(double *AB, const int a_size) {
    FILE *f = fopen("out.txt", "w+");

    fprintf(f, "%d\n", a_size);

    for(int i = 0; i < a_size*(a_size + 1); i++) {
        if((i + 1) % (a_size+1) == 0) {
            fprintf(f, "\n");
            continue;
        }
        fprintf(f, "%lf ", AB[i]);
    }

    for(int i = 0; i < a_size; i++)
        fprintf(f, "%lf ", AB[a_size + i*(a_size + 1)]);
    fprintf(f, "\n");

    fclose(f);
}

double *malloc_matrix(const int a, const int b) {
    return (double*)malloc(sizeof(double *)*a*b);
}

double *load_from_file(int *a_size, char *name) {
    FILE *f = fopen(name, "r");

    int size;
    fscanf(f, "%d", &size);
    double *matrix_ab = malloc_matrix(size, size + 1);

    for(int i = 0; i < size*(size + 1); i++) {
        if((i+1) % (size + 1) == 0)
            continue;
        fscanf(f, "%lf", &matrix_ab[i]);
    }

    for(int i = 0; i < size; i++) {
        fscanf(f, "%lf", &matrix_ab[size + i*(size + 1)]);
    }

    fclose(f);

    *a_size = size;

    return matrix_ab;
}


void print_matrix(double *matrix, const int a, const int b) {
    for(int i = 0; i < a*b; i++) {
        printf("%lf\t", matrix[i]);
        if((i+1) % b == 0)
            printf("\n");
    }
}

void print_output(double *AB, const int a_size) {
    printf("%d\n", a_size);

    for(int i = 0; i < a_size*(a_size + 1); i++) {
        if((i + 1) % (a_size+1) == 0) {
            printf("\n");
            continue;
        }
        printf("%lf\t", AB[i]);
    }

    for(int i = 0; i < a_size; i++)
        printf("%lf\t", AB[a_size + i*(a_size + 1)]);
    printf("\n");
}

int load_size() {
    int size;
    scanf("%d", &size);
    return size;
}

void load_ab_matrix(double *a, const int size) {
    for(int i = 0; i < size*(size + 1); i++) {
        if((i+1) % (size + 1) == 0)
            continue;
        scanf("%lf", &a[i]);
    }

    for(int i = 0; i < size; i++) {
        scanf("%lf", &a[size + i*(size + 1)]);
    }
}

double  *load_input(int *size) {
    *size = load_size();
    double *matrix_ab = malloc_matrix(*size, *size + 1);
    load_ab_matrix(matrix_ab, *size);
    return matrix_ab;
}


__global__ void replace_zero_gpu(double *AB, int rows, int columns, int column) {
    if(fabs(AB[column*columns + column]) <= 1e-4) {
        int row = column;
        for(; row < rows; row++) {
            if(fabs(AB[row*columns + column]) > 1e-4)
                break;
        }
        int threadId = blockDim.x*blockIdx.x + threadIdx.x;
        if(threadId + column >= columns)
            return;

        int zero = column*columns + column + threadId;
        int chosen = row*columns + column + threadId;
        AB[zero] += AB[chosen];
    }
}


__global__ void column_elimination_gpu(double *AB, int rows, int columns, int column) {
    int threadId = blockDim.x*blockIdx.x + threadIdx.x;
    if(threadId >= (rows - 1 - column)*(columns - column))
        return;

    int el_row = column + threadId/(columns - column) + 1;
    int el_col = column + threadId%(columns - column);
    int el = el_col + el_row*columns;
    int upper_el = el_col + column*columns;

    int main_el = column + column*columns;
    int main2_el = column + el_row*columns;
    double f = AB[main2_el]/AB[main_el];

    AB[el] -= f*AB[upper_el];
}

__global__ void multiple_column(double *AB, int rows, int columns, int row) {
    int threadId = threadIdx.x;
    AB[(threadId * columns) + row] *= AB[columns*(row + 1) - 1];
}

__global__ void reverse_row_elimination(double *AB, int rows, int columns, int row) {
    int threadId = threadIdx.x;
    int cols = columns - 2 - row;

    int start_index = row*columns + row + 1;

    int j = cols%2;
    for(int i = cols/2; i > 0; i/=2) {
        if(threadId >= i)
            return;

        AB[start_index + threadId] += (AB[start_index + threadId + i + j]);
        AB[start_index + threadId + i + j] = 0;
        if(j == 1)
            i++;
        j = i%2;
        __syncthreads();
    }

    int x_el = (row + 1)*columns - 1;
    int diag_el = row*columns + row;

    if(diag_el + 1 != x_el) {
        AB[x_el] -= AB[diag_el + 1];
        AB[diag_el + 1] = 0.0;
    }

    AB[x_el] /= AB[diag_el];
    AB[diag_el] = 1.0;
}

__global__ void sum_row(double *AB, int rows, int columns, int row) {
    int threadId = threadIdx.x;

    int j = columns%2;
    for(int i = columns/2; i > 0; i/=2) {
        if(threadId >= i)
            return;

        AB[threadId] += AB[threadId + i + j];
        __syncthreads();
        if(j == 1)
            i++;
        j = i%2;
    }
}


void start_gaussian_elimination_gpu(double *AB, int rows, int cols) {
    double *AB_gpu;

    hipMalloc(&AB_gpu, sizeof(double)*rows*cols);
    hipMemcpy(AB_gpu, (void*)AB, sizeof(double)*rows*cols, hipMemcpyHostToDevice);

    int block_size;

    for(int column = 0; column < cols - 1; column++) {
        block_size = (cols - column - 1)/THREADS_PER_BLOCK + 1;
        replace_zero_gpu<<<block_size, THREADS_PER_BLOCK>>>(AB_gpu, rows, cols, column);
        hipDeviceSynchronize();

        block_size = ((rows - column)*(cols - column) - 1)/THREADS_PER_BLOCK + 1;
        column_elimination_gpu<<<block_size, THREADS_PER_BLOCK>>>(AB_gpu, rows, cols, column);
        hipDeviceSynchronize();
    }

    for(int row = rows - 1; row >= 0; row--) {
        reverse_row_elimination<<<1, cols>>>(AB_gpu, rows, cols, row);
        multiple_column<<<1, row>>>(AB_gpu, rows, cols, row);

        hipDeviceSynchronize();
    }

    hipMemcpy(AB, (void*)AB_gpu, sizeof(double)*rows*cols, hipMemcpyDeviceToHost);

    hipFree(AB_gpu);
}


int main(int argc, char ** argv) {
    int size;
    double *AB = load_from_file(&size, argv[1]);

    print_output(AB, size);

    start_gaussian_elimination_gpu(AB, size, size + 1);

    printf("\n\n");

    print_output(AB, size);

    save_to_file(AB, size);

    return 0;
}

	.text
	.file	"gpu_solve.hip"
	.globl	_Z12save_to_filePdi             # -- Begin function _Z12save_to_filePdi
	.type	_Z12save_to_filePdi,@function
_Z12save_to_filePdi:                    # @_Z12save_to_filePdi
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%esi, %r15d
	movq	%rdi, %r14
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	callq	fopen
	movq	%rax, %rbx
	movl	$.L.str.2, %esi
	movq	%rax, %rdi
	movl	%r15d, %edx
	xorl	%eax, %eax
	callq	fprintf
	leal	1(%r15), %ebp
	movl	%ebp, %eax
	imull	%r15d, %eax
	testl	%eax, %eax
	jle	.LBB0_4
# %bb.1:                                # %.lr.ph.preheader
	movl	%eax, %r13d
	xorl	%ecx, %ecx
.LBB0_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	leaq	1(%rcx), %r12
	movl	%r12d, %eax
	cltd
	idivl	%ebp
	testl	%edx, %edx
	je	.LBB0_3
# %bb.8:                                #   in Loop: Header=BB0_2 Depth=1
	movsd	(%r14,%rcx,8), %xmm0            # xmm0 = mem[0],zero
	movl	$.L.str.4, %esi
	movq	%rbx, %rdi
	movb	$1, %al
	callq	fprintf
	jmp	.LBB0_9
.LBB0_3:                                #   in Loop: Header=BB0_2 Depth=1
	movl	$10, %edi
	movq	%rbx, %rsi
	callq	fputc@PLT
.LBB0_9:                                #   in Loop: Header=BB0_2 Depth=1
	movq	%r12, %rcx
	cmpq	%r12, %r13
	jne	.LBB0_2
.LBB0_4:                                # %.preheader
	testl	%r15d, %r15d
	jle	.LBB0_7
# %bb.5:                                # %.lr.ph26.preheader
	movl	%ebp, %r12d
	movl	%r15d, %r15d
	leaq	(%r14,%r15,8), %r14
	shlq	$3, %r12
.LBB0_6:                                # %.lr.ph26
                                        # =>This Inner Loop Header: Depth=1
	movsd	(%r14), %xmm0                   # xmm0 = mem[0],zero
	movl	$.L.str.4, %esi
	movq	%rbx, %rdi
	movb	$1, %al
	callq	fprintf
	addq	%r12, %r14
	decq	%r15
	jne	.LBB0_6
.LBB0_7:                                # %._crit_edge
	movl	$10, %edi
	movq	%rbx, %rsi
	callq	fputc@PLT
	movq	%rbx, %rdi
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	fclose                          # TAILCALL
.Lfunc_end0:
	.size	_Z12save_to_filePdi, .Lfunc_end0-_Z12save_to_filePdi
	.cfi_endproc
                                        # -- End function
	.globl	_Z13malloc_matrixii             # -- Begin function _Z13malloc_matrixii
	.type	_Z13malloc_matrixii,@function
_Z13malloc_matrixii:                    # @_Z13malloc_matrixii
	.cfi_startproc
# %bb.0:
	movslq	%edi, %rax
	movslq	%esi, %rdi
	imulq	%rax, %rdi
	shlq	$3, %rdi
	jmp	malloc                          # TAILCALL
.Lfunc_end1:
	.size	_Z13malloc_matrixii, .Lfunc_end1-_Z13malloc_matrixii
	.cfi_endproc
                                        # -- End function
	.globl	_Z14load_from_filePiPc          # -- Begin function _Z14load_from_filePiPc
	.type	_Z14load_from_filePiPc,@function
_Z14load_from_filePiPc:                 # @_Z14load_from_filePiPc
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %rax
	movq	%rdi, 16(%rsp)                  # 8-byte Spill
	movl	$.L.str.5, %esi
	movq	%rax, %rdi
	callq	fopen
	movq	%rax, %r14
	leaq	12(%rsp), %r15
	movl	$.L.str.6, %esi
	movq	%rax, %rdi
	movq	%r15, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movslq	(%r15), %rbp
	leaq	1(%rbp), %rbx
	movq	%rbp, %rdi
	imulq	%rbx, %rdi
	shlq	$3, %rdi
	callq	malloc
	movq	%rax, %r15
	movl	%ebx, %eax
	imull	%ebp, %eax
	testl	%eax, %eax
	jle	.LBB2_5
# %bb.1:                                # %.lr.ph.preheader
	movq	%r15, %r12
	xorl	%r13d, %r13d
.LBB2_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	incq	%r13
	movl	%r13d, %eax
	cltd
	idivl	%ebx
	testl	%edx, %edx
	je	.LBB2_4
# %bb.3:                                #   in Loop: Header=BB2_2 Depth=1
	movl	$.L.str.7, %esi
	movq	%r14, %rdi
	movq	%r12, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movl	12(%rsp), %ebp
.LBB2_4:                                #   in Loop: Header=BB2_2 Depth=1
	leal	1(%rbp), %ebx
	movl	%ebx, %eax
	imull	%ebp, %eax
	cltq
	addq	$8, %r12
	cmpq	%rax, %r13
	jl	.LBB2_2
.LBB2_5:                                # %.preheader
	testl	%ebp, %ebp
	jle	.LBB2_8
# %bb.6:                                # %.lr.ph19.preheader
	xorl	%ebx, %ebx
.LBB2_7:                                # %.lr.ph19
                                        # =>This Inner Loop Header: Depth=1
	leal	1(%rbp), %eax
	imull	%ebx, %eax
	addl	%ebp, %eax
	cltq
	leaq	(%r15,%rax,8), %rdx
	movl	$.L.str.7, %esi
	movq	%r14, %rdi
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	incl	%ebx
	movl	12(%rsp), %ebp
	cmpl	%ebp, %ebx
	jl	.LBB2_7
.LBB2_8:                                # %._crit_edge
	movq	%r14, %rdi
	callq	fclose
	movl	12(%rsp), %eax
	movq	16(%rsp), %rcx                  # 8-byte Reload
	movl	%eax, (%rcx)
	movq	%r15, %rax
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z14load_from_filePiPc, .Lfunc_end2-_Z14load_from_filePiPc
	.cfi_endproc
                                        # -- End function
	.globl	_Z12print_matrixPdii            # -- Begin function _Z12print_matrixPdii
	.type	_Z12print_matrixPdii,@function
_Z12print_matrixPdii:                   # @_Z12print_matrixPdii
	.cfi_startproc
# %bb.0:
	imull	%edx, %esi
	testl	%esi, %esi
	jle	.LBB3_6
# %bb.1:                                # %.lr.ph.preheader
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%edx, %ebx
	movq	%rdi, %r14
	movl	%esi, %r12d
	xorl	%r15d, %r15d
.LBB3_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movsd	(%r14,%r15,8), %xmm0            # xmm0 = mem[0],zero
	movl	$.L.str.8, %edi
	movb	$1, %al
	callq	printf
	incq	%r15
	movl	%r15d, %eax
	cltd
	idivl	%ebx
	testl	%edx, %edx
	jne	.LBB3_4
# %bb.3:                                #   in Loop: Header=BB3_2 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
.LBB3_4:                                #   in Loop: Header=BB3_2 Depth=1
	cmpq	%r15, %r12
	jne	.LBB3_2
# %bb.5:
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r12
	.cfi_restore %r14
	.cfi_restore %r15
.LBB3_6:                                # %._crit_edge
	retq
.Lfunc_end3:
	.size	_Z12print_matrixPdii, .Lfunc_end3-_Z12print_matrixPdii
	.cfi_endproc
                                        # -- End function
	.globl	_Z12print_outputPdi             # -- Begin function _Z12print_outputPdi
	.type	_Z12print_outputPdi,@function
_Z12print_outputPdi:                    # @_Z12print_outputPdi
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%esi, %r14d
	movq	%rdi, %rbx
	movl	$.L.str.2, %edi
	xorl	%eax, %eax
	callq	printf
	leal	1(%r14), %ebp
	movl	%ebp, %eax
	imull	%r14d, %eax
	testl	%eax, %eax
	jle	.LBB4_4
# %bb.1:                                # %.lr.ph.preheader
	movl	%eax, %r12d
	xorl	%ecx, %ecx
.LBB4_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	leaq	1(%rcx), %r15
	movl	%r15d, %eax
	cltd
	idivl	%ebp
	testl	%edx, %edx
	je	.LBB4_3
# %bb.8:                                #   in Loop: Header=BB4_2 Depth=1
	movsd	(%rbx,%rcx,8), %xmm0            # xmm0 = mem[0],zero
	movl	$.L.str.8, %edi
	movb	$1, %al
	callq	printf
	jmp	.LBB4_9
.LBB4_3:                                #   in Loop: Header=BB4_2 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
.LBB4_9:                                #   in Loop: Header=BB4_2 Depth=1
	movq	%r15, %rcx
	cmpq	%r15, %r12
	jne	.LBB4_2
.LBB4_4:                                # %.preheader
	testl	%r14d, %r14d
	jle	.LBB4_7
# %bb.5:                                # %.lr.ph20.preheader
	movl	%ebp, %r15d
	movl	%r14d, %r14d
	leaq	(%rbx,%r14,8), %rbx
	shlq	$3, %r15
.LBB4_6:                                # %.lr.ph20
                                        # =>This Inner Loop Header: Depth=1
	movsd	(%rbx), %xmm0                   # xmm0 = mem[0],zero
	movl	$.L.str.8, %edi
	movb	$1, %al
	callq	printf
	addq	%r15, %rbx
	decq	%r14
	jne	.LBB4_6
.LBB4_7:                                # %._crit_edge
	movl	$10, %edi
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	putchar@PLT                     # TAILCALL
.Lfunc_end4:
	.size	_Z12print_outputPdi, .Lfunc_end4-_Z12print_outputPdi
	.cfi_endproc
                                        # -- End function
	.globl	_Z9load_sizev                   # -- Begin function _Z9load_sizev
	.type	_Z9load_sizev,@function
_Z9load_sizev:                          # @_Z9load_sizev
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$16, %rsp
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -16
	leaq	12(%rsp), %rbx
	movl	$.L.str.6, %edi
	movq	%rbx, %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	movl	(%rbx), %eax
	addq	$16, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z9load_sizev, .Lfunc_end5-_Z9load_sizev
	.cfi_endproc
                                        # -- End function
	.globl	_Z14load_ab_matrixPdi           # -- Begin function _Z14load_ab_matrixPdi
	.type	_Z14load_ab_matrixPdi,@function
_Z14load_ab_matrixPdi:                  # @_Z14load_ab_matrixPdi
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%esi, %r14d
	movq	%rdi, %rbx
	leal	1(%r14), %ebp
	movl	%ebp, %eax
	imull	%esi, %eax
	testl	%eax, %eax
	jle	.LBB6_5
# %bb.1:                                # %.lr.ph.preheader
	movl	%eax, %r13d
	movq	%rbx, %r15
	xorl	%r12d, %r12d
.LBB6_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	incq	%r12
	movl	%r12d, %eax
	cltd
	idivl	%ebp
	testl	%edx, %edx
	je	.LBB6_4
# %bb.3:                                #   in Loop: Header=BB6_2 Depth=1
	movl	$.L.str.7, %edi
	movq	%r15, %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
.LBB6_4:                                #   in Loop: Header=BB6_2 Depth=1
	addq	$8, %r15
	cmpq	%r12, %r13
	jne	.LBB6_2
.LBB6_5:                                # %.preheader
	testl	%r14d, %r14d
	jle	.LBB6_8
# %bb.6:                                # %.lr.ph18.preheader
	movl	%ebp, %r15d
	movl	%r14d, %r14d
	leaq	(%rbx,%r14,8), %rbx
	shlq	$3, %r15
.LBB6_7:                                # %.lr.ph18
                                        # =>This Inner Loop Header: Depth=1
	movl	$.L.str.7, %edi
	movq	%rbx, %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	addq	%r15, %rbx
	decq	%r14
	jne	.LBB6_7
.LBB6_8:                                # %._crit_edge
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z14load_ab_matrixPdi, .Lfunc_end6-_Z14load_ab_matrixPdi
	.cfi_endproc
                                        # -- End function
	.globl	_Z10load_inputPi                # -- Begin function _Z10load_inputPi
	.type	_Z10load_inputPi,@function
_Z10load_inputPi:                       # @_Z10load_inputPi
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movq	%rdi, %rbx
	leaq	4(%rsp), %r14
	movl	$.L.str.6, %edi
	movq	%r14, %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	movslq	(%r14), %r14
	movl	%r14d, (%rbx)
	leaq	1(%r14), %rdi
	imulq	%r14, %rdi
	shlq	$3, %rdi
	callq	malloc
	movq	%rax, %rbx
	movq	%rax, %rdi
	movl	%r14d, %esi
	callq	_Z14load_ab_matrixPdi
	movq	%rbx, %rax
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	_Z10load_inputPi, .Lfunc_end7-_Z10load_inputPi
	.cfi_endproc
                                        # -- End function
	.globl	_Z31__device_stub__replace_zero_gpuPdiii # -- Begin function _Z31__device_stub__replace_zero_gpuPdiii
	.type	_Z31__device_stub__replace_zero_gpuPdiii,@function
_Z31__device_stub__replace_zero_gpuPdiii: # @_Z31__device_stub__replace_zero_gpuPdiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	20(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	16(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	12(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16replace_zero_gpuPdiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	_Z31__device_stub__replace_zero_gpuPdiii, .Lfunc_end8-_Z31__device_stub__replace_zero_gpuPdiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z37__device_stub__column_elimination_gpuPdiii # -- Begin function _Z37__device_stub__column_elimination_gpuPdiii
	.type	_Z37__device_stub__column_elimination_gpuPdiii,@function
_Z37__device_stub__column_elimination_gpuPdiii: # @_Z37__device_stub__column_elimination_gpuPdiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	20(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	16(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	12(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z22column_elimination_gpuPdiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end9:
	.size	_Z37__device_stub__column_elimination_gpuPdiii, .Lfunc_end9-_Z37__device_stub__column_elimination_gpuPdiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z30__device_stub__multiple_columnPdiii # -- Begin function _Z30__device_stub__multiple_columnPdiii
	.type	_Z30__device_stub__multiple_columnPdiii,@function
_Z30__device_stub__multiple_columnPdiii: # @_Z30__device_stub__multiple_columnPdiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	20(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	16(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	12(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15multiple_columnPdiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end10:
	.size	_Z30__device_stub__multiple_columnPdiii, .Lfunc_end10-_Z30__device_stub__multiple_columnPdiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z38__device_stub__reverse_row_eliminationPdiii # -- Begin function _Z38__device_stub__reverse_row_eliminationPdiii
	.type	_Z38__device_stub__reverse_row_eliminationPdiii,@function
_Z38__device_stub__reverse_row_eliminationPdiii: # @_Z38__device_stub__reverse_row_eliminationPdiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	20(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	16(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	12(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z23reverse_row_eliminationPdiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end11:
	.size	_Z38__device_stub__reverse_row_eliminationPdiii, .Lfunc_end11-_Z38__device_stub__reverse_row_eliminationPdiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z22__device_stub__sum_rowPdiii # -- Begin function _Z22__device_stub__sum_rowPdiii
	.type	_Z22__device_stub__sum_rowPdiii,@function
_Z22__device_stub__sum_rowPdiii:        # @_Z22__device_stub__sum_rowPdiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	20(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	16(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	12(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7sum_rowPdiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end12:
	.size	_Z22__device_stub__sum_rowPdiii, .Lfunc_end12-_Z22__device_stub__sum_rowPdiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z30start_gaussian_elimination_gpuPdii # -- Begin function _Z30start_gaussian_elimination_gpuPdii
	.type	_Z30start_gaussian_elimination_gpuPdii,@function
_Z30start_gaussian_elimination_gpuPdii: # @_Z30start_gaussian_elimination_gpuPdii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
                                        # kill: def $edx killed $edx def $rdx
	movq	%rdi, %r13
	movabsq	$4294967296, %r12               # imm = 0x100000000
	movl	%esi, 4(%rsp)                   # 4-byte Spill
	movslq	%esi, %r15
	movq	%rdx, 16(%rsp)                  # 8-byte Spill
	movslq	%edx, %rbx
	imulq	%rbx, %r15
	shlq	$3, %r15
	leaq	8(%rsp), %r14
	movq	%r14, %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	movq	(%r14), %rdi
	movq	%r13, 24(%rsp)                  # 8-byte Spill
	movq	%r13, %rsi
	movq	%r15, 32(%rsp)                  # 8-byte Spill
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	cmpl	$2, %ebx
	jl	.LBB13_7
# %bb.1:                                # %.lr.ph.preheader
	movq	16(%rsp), %rax                  # 8-byte Reload
	leal	-1(%rax), %r15d
	xorl	%r13d, %r13d
	leaq	16(%r12), %r14
	movl	4(%rsp), %ebp                   # 4-byte Reload
.LBB13_2:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	leal	15(%r15), %edi
	testl	%r15d, %r15d
	cmovnsl	%r15d, %edi
	sarl	$4, %edi
	incl	%edi
	orq	%r12, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB13_4
# %bb.3:                                #   in Loop: Header=BB13_2 Depth=1
	movq	8(%rsp), %rdi
	movl	4(%rsp), %esi                   # 4-byte Reload
	movq	16(%rsp), %rdx                  # 8-byte Reload
                                        # kill: def $edx killed $edx killed $rdx
	movl	%r13d, %ecx
	callq	_Z31__device_stub__replace_zero_gpuPdiii
.LBB13_4:                               #   in Loop: Header=BB13_2 Depth=1
	leal	1(%r15), %ebx
	callq	hipDeviceSynchronize
	imull	%ebp, %ebx
	leal	-1(%rbx), %eax
	addl	$14, %ebx
	testl	%eax, %eax
	cmovnsl	%eax, %ebx
	sarl	$4, %ebx
	incl	%ebx
	orq	%r12, %rbx
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB13_6
# %bb.5:                                #   in Loop: Header=BB13_2 Depth=1
	movq	8(%rsp), %rdi
	movl	4(%rsp), %esi                   # 4-byte Reload
	movq	16(%rsp), %rdx                  # 8-byte Reload
                                        # kill: def $edx killed $edx killed $rdx
	movl	%r13d, %ecx
	callq	_Z37__device_stub__column_elimination_gpuPdiii
.LBB13_6:                               #   in Loop: Header=BB13_2 Depth=1
	callq	hipDeviceSynchronize
	incl	%r13d
	decl	%ebp
	decl	%r15d
	jne	.LBB13_2
.LBB13_7:                               # %.preheader
	movl	4(%rsp), %ebp                   # 4-byte Reload
	testl	%ebp, %ebp
	movq	16(%rsp), %r15                  # 8-byte Reload
	jle	.LBB13_14
# %bb.8:                                # %.lr.ph77
	movl	%r15d, %r14d
	orq	%r12, %r14
	movl	%ebp, %ebx
	leaq	(%r12,%rbx), %r13
	decq	%r13
	incq	%rbx
	incq	%r12
.LBB13_9:                               # =>This Inner Loop Header: Depth=1
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB13_11
# %bb.10:                               #   in Loop: Header=BB13_9 Depth=1
	movq	8(%rsp), %rdi
	movl	%ebp, %esi
	movl	%r15d, %edx
	movl	%r13d, %ecx
	callq	_Z38__device_stub__reverse_row_eliminationPdiii
.LBB13_11:                              #   in Loop: Header=BB13_9 Depth=1
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB13_13
# %bb.12:                               #   in Loop: Header=BB13_9 Depth=1
	movq	8(%rsp), %rdi
	movl	%ebp, %esi
	movl	%r15d, %edx
	movl	%r13d, %ecx
	callq	_Z30__device_stub__multiple_columnPdiii
.LBB13_13:                              #   in Loop: Header=BB13_9 Depth=1
	callq	hipDeviceSynchronize
	decq	%rbx
	decq	%r13
	cmpq	$1, %rbx
	ja	.LBB13_9
.LBB13_14:                              # %._crit_edge
	movq	8(%rsp), %rsi
	movq	24(%rsp), %rdi                  # 8-byte Reload
	movq	32(%rsp), %rdx                  # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	callq	hipFree
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end13:
	.size	_Z30start_gaussian_elimination_gpuPdii, .Lfunc_end13-_Z30start_gaussian_elimination_gpuPdii
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movq	8(%rsi), %rsi
	leaq	4(%rsp), %rbx
	movq	%rbx, %rdi
	callq	_Z14load_from_filePiPc
	movq	%rax, %r14
	movl	(%rbx), %ebx
	movq	%rax, %rdi
	movl	%ebx, %esi
	callq	_Z12print_outputPdi
	leal	1(%rbx), %edx
	movq	%r14, %rdi
	movl	%ebx, %esi
	callq	_Z30start_gaussian_elimination_gpuPdii
	movl	$.Lstr, %edi
	callq	puts@PLT
	movq	%r14, %rdi
	movl	%ebx, %esi
	callq	_Z12print_outputPdi
	movq	%r14, %rdi
	movl	%ebx, %esi
	callq	_Z12save_to_filePdi
	xorl	%eax, %eax
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end14:
	.size	main, .Lfunc_end14-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB15_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB15_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16replace_zero_gpuPdiii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z22column_elimination_gpuPdiii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15multiple_columnPdiii, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z23reverse_row_eliminationPdiii, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7sum_rowPdiii, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end15:
	.size	__hip_module_ctor, .Lfunc_end15-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB16_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB16_2:
	retq
.Lfunc_end16:
	.size	__hip_module_dtor, .Lfunc_end16-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"out.txt"
	.size	.L.str, 8

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"w+"
	.size	.L.str.1, 3

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"%d\n"
	.size	.L.str.2, 4

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"%lf "
	.size	.L.str.4, 5

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"r"
	.size	.L.str.5, 2

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"%d"
	.size	.L.str.6, 3

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"%lf"
	.size	.L.str.7, 4

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"%lf\t"
	.size	.L.str.8, 5

	.type	_Z16replace_zero_gpuPdiii,@object # @_Z16replace_zero_gpuPdiii
	.section	.rodata,"a",@progbits
	.globl	_Z16replace_zero_gpuPdiii
	.p2align	3, 0x0
_Z16replace_zero_gpuPdiii:
	.quad	_Z31__device_stub__replace_zero_gpuPdiii
	.size	_Z16replace_zero_gpuPdiii, 8

	.type	_Z22column_elimination_gpuPdiii,@object # @_Z22column_elimination_gpuPdiii
	.globl	_Z22column_elimination_gpuPdiii
	.p2align	3, 0x0
_Z22column_elimination_gpuPdiii:
	.quad	_Z37__device_stub__column_elimination_gpuPdiii
	.size	_Z22column_elimination_gpuPdiii, 8

	.type	_Z15multiple_columnPdiii,@object # @_Z15multiple_columnPdiii
	.globl	_Z15multiple_columnPdiii
	.p2align	3, 0x0
_Z15multiple_columnPdiii:
	.quad	_Z30__device_stub__multiple_columnPdiii
	.size	_Z15multiple_columnPdiii, 8

	.type	_Z23reverse_row_eliminationPdiii,@object # @_Z23reverse_row_eliminationPdiii
	.globl	_Z23reverse_row_eliminationPdiii
	.p2align	3, 0x0
_Z23reverse_row_eliminationPdiii:
	.quad	_Z38__device_stub__reverse_row_eliminationPdiii
	.size	_Z23reverse_row_eliminationPdiii, 8

	.type	_Z7sum_rowPdiii,@object         # @_Z7sum_rowPdiii
	.globl	_Z7sum_rowPdiii
	.p2align	3, 0x0
_Z7sum_rowPdiii:
	.quad	_Z22__device_stub__sum_rowPdiii
	.size	_Z7sum_rowPdiii, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z16replace_zero_gpuPdiii"
	.size	.L__unnamed_1, 26

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z22column_elimination_gpuPdiii"
	.size	.L__unnamed_2, 32

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z15multiple_columnPdiii"
	.size	.L__unnamed_3, 25

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z23reverse_row_eliminationPdiii"
	.size	.L__unnamed_4, 33

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"_Z7sum_rowPdiii"
	.size	.L__unnamed_5, 16

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"\n"
	.size	.Lstr, 2

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z31__device_stub__replace_zero_gpuPdiii
	.addrsig_sym _Z37__device_stub__column_elimination_gpuPdiii
	.addrsig_sym _Z30__device_stub__multiple_columnPdiii
	.addrsig_sym _Z38__device_stub__reverse_row_eliminationPdiii
	.addrsig_sym _Z22__device_stub__sum_rowPdiii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z16replace_zero_gpuPdiii
	.addrsig_sym _Z22column_elimination_gpuPdiii
	.addrsig_sym _Z15multiple_columnPdiii
	.addrsig_sym _Z23reverse_row_eliminationPdiii
	.addrsig_sym _Z7sum_rowPdiii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z16replace_zero_gpuPdiii ; -- Begin function _Z16replace_zero_gpuPdiii
	.globl	_Z16replace_zero_gpuPdiii
	.p2align	8
	.type	_Z16replace_zero_gpuPdiii,@function
_Z16replace_zero_gpuPdiii:              ; @_Z16replace_zero_gpuPdiii
; %bb.0:
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x8
	s_load_b64 s[2:3], s[0:1], 0x0
	s_mov_b32 s16, 0xeb1c432d
	s_mov_b32 s17, 0x3f1a36e2
	s_waitcnt lgkmcnt(0)
	s_add_i32 s7, s5, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s10, s7, s6
	s_ashr_i32 s11, s10, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[8:9], s[10:11], 3
	s_add_u32 s8, s2, s8
	s_addc_u32 s9, s3, s9
	s_load_b64 s[12:13], s[8:9], 0x0
	s_waitcnt lgkmcnt(0)
	v_cmp_nle_f64_e64 s7, |s[12:13]|, s[16:17]
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s7
	s_cbranch_vccnz .LBB0_10
; %bb.1:                                ; %.preheader
	s_cmp_ge_i32 s6, s4
	s_cbranch_scc1 .LBB0_7
; %bb.2:
	s_mov_b32 s12, 0xeb1c432d
	s_mov_b32 s13, 0x3f1a36e2
	s_mov_b32 s7, s6
.LBB0_3:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_ashr_i32 s11, s10, 31
	s_mov_b32 s14, -1
	s_lshl_b64 s[16:17], s[10:11], 3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	s_add_u32 s16, s2, s16
	s_addc_u32 s17, s3, s17
	s_load_b64 s[16:17], s[16:17], 0x0
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_f64_e64 s11, |s[16:17]|, s[12:13]
	s_and_b32 vcc_lo, exec_lo, s11
	s_cbranch_vccnz .LBB0_5
; %bb.4:                                ;   in Loop: Header=BB0_3 Depth=1
	s_add_i32 s7, s7, 1
	s_add_i32 s10, s10, s5
	s_cmp_ge_i32 s7, s4
	s_mov_b32 s11, s4
	s_cselect_b32 s14, -1, 0
	s_branch .LBB0_6
.LBB0_5:                                ;   in Loop: Header=BB0_3 Depth=1
	s_mov_b32 s11, s7
                                        ; implicit-def: $sgpr7
                                        ; implicit-def: $sgpr10
.LBB0_6:                                ; %Flow43
                                        ;   in Loop: Header=BB0_3 Depth=1
	s_and_not1_b32 vcc_lo, exec_lo, s14
	s_cbranch_vccnz .LBB0_3
	s_branch .LBB0_8
.LBB0_7:
	s_mov_b32 s11, s6
.LBB0_8:                                ; %._crit_edge
	s_load_b32 s0, s[0:1], 0x24
	s_waitcnt lgkmcnt(0)
	s_and_b32 s0, s0, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s0, v[0:1]
	s_mov_b32 s0, exec_lo
	v_add_nc_u32_e32 v0, s6, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s5, v0
	s_cbranch_execz .LBB0_10
; %bb.9:
	v_mad_u64_u32 v[3:4], null, s11, s5, v[0:1]
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 3, v[3:4]
	v_add_co_u32 v2, vcc_lo, s2, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v4, vcc_lo
	v_add_co_u32 v0, vcc_lo, s8, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s9, v1, vcc_lo
	s_clause 0x1
	global_load_b64 v[2:3], v[2:3], off
	global_load_b64 v[4:5], v[0:1], off
	s_waitcnt vmcnt(0)
	v_add_f64 v[2:3], v[2:3], v[4:5]
	global_store_b64 v[0:1], v[2:3], off
.LBB0_10:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16replace_zero_gpuPdiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 18
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z16replace_zero_gpuPdiii, .Lfunc_end0-_Z16replace_zero_gpuPdiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 404
; NumSgprs: 20
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 20
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z22column_elimination_gpuPdiii ; -- Begin function _Z22column_elimination_gpuPdiii
	.globl	_Z22column_elimination_gpuPdiii
	.p2align	8
	.type	_Z22column_elimination_gpuPdiii,@function
_Z22column_elimination_gpuPdiii:        ; @_Z22column_elimination_gpuPdiii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b128 s[4:7], s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_not_b32 s2, s6
	s_add_i32 s3, s2, s4
	s_sub_i32 s2, s5, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mul_i32 s3, s3, s2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cmp_gt_i32_e32 vcc_lo, s3, v1
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB1_2
; %bb.1:
	s_ashr_i32 s3, s2, 31
	v_ashrrev_i32_e32 v3, 31, v1
	s_add_i32 s4, s2, s3
	s_load_b64 s[0:1], s[0:1], 0x0
	s_xor_b32 s4, s4, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v1, v3
	v_cvt_f32_u32_e32 v0, s4
	s_sub_i32 s7, 0, s4
	v_xor_b32_e32 v4, v4, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v0, v0
	v_xor_b32_e32 v3, s3, v3
	s_mul_i32 s3, s6, s5
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	v_cvt_u32_f32_e32 v0, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v2, s7, v0
	v_mul_hi_u32 v2, v0, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v0, v2
	v_mul_hi_u32 v0, v4, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v2, v0, s4
	v_sub_nc_u32_e32 v2, v4, v2
	v_add_nc_u32_e32 v4, 1, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_subrev_nc_u32_e32 v5, s4, v2
	v_cmp_le_u32_e32 vcc_lo, s4, v2
	v_cndmask_b32_e32 v0, v0, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v2, v2, v5, vcc_lo
	v_add_nc_u32_e32 v4, 1, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_le_u32_e32 vcc_lo, s4, v2
	v_cndmask_b32_e32 v0, v0, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v0, v0, v3
	v_sub_nc_u32_e32 v0, v0, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add3_u32 v2, s6, 1, v0
	v_mul_lo_u32 v0, v0, s2
	s_add_i32 s2, s3, s6
	v_mul_lo_u32 v4, v2, s5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v0, v1, v0
	v_add_nc_u32_e32 v2, s6, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, s6, v0
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_nc_u32_e32 v0, s3, v1
	s_ashr_i32 s3, s2, 31
	v_add_nc_u32_e32 v4, v1, v4
	s_lshl_b64 s[2:3], s[2:3], 3
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_add_u32 s2, s0, s2
	s_addc_u32 s3, s1, s3
	v_ashrrev_i32_e32 v1, 31, v0
	v_ashrrev_i32_e32 v5, 31, v4
	s_load_b64 s[2:3], s[2:3], 0x0
	v_add_co_u32 v2, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	v_lshlrev_b64 v[0:1], 3, v[0:1]
	v_lshlrev_b64 v[4:5], 3, v[4:5]
	global_load_b64 v[2:3], v[2:3], off
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
	s_clause 0x1
	global_load_b64 v[0:1], v[0:1], off
	global_load_b64 v[6:7], v[4:5], off
	s_waitcnt vmcnt(2) lgkmcnt(0)
	v_div_scale_f64 v[8:9], null, s[2:3], s[2:3], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[10:11], v[8:9]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[12:13], -v[8:9], v[10:11], 1.0
	v_fma_f64 v[10:11], v[10:11], v[12:13], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[12:13], -v[8:9], v[10:11], 1.0
	v_fma_f64 v[10:11], v[10:11], v[12:13], v[10:11]
	v_div_scale_f64 v[12:13], vcc_lo, v[2:3], s[2:3], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[14:15], v[12:13], v[10:11]
	v_fma_f64 v[8:9], -v[8:9], v[14:15], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[8:9], v[8:9], v[10:11], v[14:15]
	v_div_fixup_f64 v[2:3], v[8:9], s[2:3], v[2:3]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[0:1], -v[2:3], v[0:1], v[6:7]
	global_store_b64 v[4:5], v[0:1], off
.LBB1_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z22column_elimination_gpuPdiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 16
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z22column_elimination_gpuPdiii, .Lfunc_end1-_Z22column_elimination_gpuPdiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 600
; NumSgprs: 18
; NumVgprs: 16
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 16
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z15multiple_columnPdiii ; -- Begin function _Z15multiple_columnPdiii
	.globl	_Z15multiple_columnPdiii
	.p2align	8
	.type	_Z15multiple_columnPdiii,@function
_Z15multiple_columnPdiii:               ; @_Z15multiple_columnPdiii
; %bb.0:
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0xc
	s_load_b64 s[0:1], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_mov_b32 s4, s3
	s_add_i32 s3, s3, 1
	v_mad_u64_u32 v[1:2], null, v0, s2, s[4:5]
	s_mul_i32 s2, s3, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s3, s2, 31
	s_lshl_b64 s[2:3], s[2:3], 3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_add_u32 s0, s0, s2
	s_addc_u32 s1, s1, s3
	s_add_u32 s0, s0, -8
	global_load_b64 v[2:3], v[0:1], off
	s_addc_u32 s1, s1, -1
	s_load_b64 s[0:1], s[0:1], 0x0
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_mul_f64 v[2:3], s[0:1], v[2:3]
	global_store_b64 v[0:1], v[2:3], off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15multiple_columnPdiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 20
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 6
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z15multiple_columnPdiii, .Lfunc_end2-_Z15multiple_columnPdiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 152
; NumSgprs: 8
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 8
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z23reverse_row_eliminationPdiii ; -- Begin function _Z23reverse_row_eliminationPdiii
	.globl	_Z23reverse_row_eliminationPdiii
	.p2align	8
	.type	_Z23reverse_row_eliminationPdiii,@function
_Z23reverse_row_eliminationPdiii:       ; @_Z23reverse_row_eliminationPdiii
; %bb.0:
	s_clause 0x1
	s_load_b64 s[4:5], s[0:1], 0xc
	s_load_b64 s[0:1], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_sub_i32 s2, s4, s5
	s_add_i32 s3, s4, 1
	s_add_i32 s6, s2, -2
	s_mul_i32 s2, s3, s5
	s_cmp_lt_i32 s6, 2
	s_mov_b32 s3, -1
	s_cbranch_scc1 .LBB3_6
; %bb.1:                                ; %.lr.ph
	s_ashr_i32 s3, s2, 31
	v_add_co_u32 v1, s7, s2, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e64 v2, null, s3, 0, s7
	v_mov_b32_e32 v5, 0
	s_add_u32 s7, s0, 8
	s_addc_u32 s9, s1, 0
	v_lshlrev_b64 v[3:4], 3, v[1:2]
	s_mov_b32 s8, 0
                                        ; implicit-def: $sgpr3
                                        ; implicit-def: $sgpr11
                                        ; implicit-def: $sgpr10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s0, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
.LBB3_2:                                ; =>This Inner Loop Header: Depth=1
	s_lshr_b32 s13, s6, 1
	s_or_b32 s10, s10, exec_lo
	s_or_b32 s11, s11, exec_lo
	s_mov_b32 s12, exec_lo
	v_cmpx_gt_u32_e64 s13, v0
	s_cbranch_execz .LBB3_4
; %bb.3:                                ;   in Loop: Header=BB3_2 Depth=1
	s_and_b32 s6, s6, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	s_add_u32 s14, s6, s13
	s_addc_u32 s15, 0, 0
	v_add_co_u32 v6, vcc_lo, s14, v1
	v_add_co_ci_u32_e32 v7, vcc_lo, s15, v2, vcc_lo
	s_add_i32 s6, s13, s6
	s_cmp_lt_u32 s6, 2
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 3, v[6:7]
	s_cselect_b32 s13, -1, 0
	s_and_not1_b32 s11, s11, exec_lo
	s_and_b32 s13, s13, exec_lo
	s_and_not1_b32 s10, s10, exec_lo
	s_or_b32 s11, s11, s13
	v_add_co_u32 v8, vcc_lo, s7, v6
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v7, vcc_lo
	s_clause 0x1
	global_load_b64 v[6:7], v[8:9], off
	global_load_b64 v[10:11], v[3:4], off offset:8
	s_waitcnt vmcnt(0)
	v_add_f64 v[10:11], v[6:7], v[10:11]
	v_mov_b32_e32 v6, v5
	s_clause 0x1
	global_store_b64 v[3:4], v[10:11], off offset:8
	global_store_b64 v[8:9], v[5:6], off
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
.LBB3_4:                                ; %Flow
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s12
	s_xor_b32 s12, s10, -1
	s_and_b32 s13, exec_lo, s11
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_or_b32 s8, s13, s8
	s_and_not1_b32 s3, s3, exec_lo
	s_and_b32 s12, s12, exec_lo
	s_or_b32 s3, s3, s12
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB3_2
; %bb.5:                                ; %loop.exit.guard
	s_or_b32 exec_lo, exec_lo, s8
.LBB3_6:                                ; %Flow64
	s_and_saveexec_b32 s6, s3
	s_cbranch_execz .LBB3_12
; %bb.7:                                ; %.critedge
	s_add_i32 s3, s5, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_mul_i32 s6, s3, s4
	s_add_i32 s3, s2, 1
	s_add_i32 s4, s6, -1
	s_cmp_lg_u32 s3, s4
	s_mov_b32 s3, -1
	s_cbranch_scc0 .LBB3_9
; %bb.8:
	s_ashr_i32 s3, s2, 31
	v_mov_b32_e32 v0, 0
	s_lshl_b64 s[8:9], s[2:3], 3
	s_mov_b32 s3, 0
	s_add_u32 s8, s0, s8
	s_addc_u32 s9, s1, s9
	s_ashr_i32 s7, s6, 31
	s_ashr_i32 s5, s4, 31
	s_lshl_b64 s[6:7], s[6:7], 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s6, s0, s6
	s_addc_u32 s7, s1, s7
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[8:9] offset:8
	global_load_b64 v[3:4], v0, s[6:7] offset:-8
	s_waitcnt vmcnt(0)
	v_add_f64 v[2:3], v[3:4], -v[1:2]
	v_mov_b32_e32 v1, v0
	s_clause 0x1
	global_store_b64 v0, v[2:3], s[6:7] offset:-8
	global_store_b64 v0, v[0:1], s[8:9] offset:8
.LBB3_9:                                ; %Flow62
	s_and_not1_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccnz .LBB3_11
; %bb.10:                               ; %.critedge._crit_edge
	s_ashr_i32 s5, s4, 31
.LBB3_11:
	s_ashr_i32 s3, s2, 31
	v_mov_b32_e32 v0, 0
	s_lshl_b64 s[2:3], s[2:3], 3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_add_u32 s2, s0, s2
	s_addc_u32 s3, s1, s3
	s_lshl_b64 s[4:5], s[4:5], 3
	s_add_u32 s0, s0, s4
	s_addc_u32 s1, s1, s5
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[2:3]
	global_load_b64 v[3:4], v0, s[0:1]
	s_waitcnt vmcnt(0)
	v_div_scale_f64 v[5:6], null, v[1:2], v[1:2], v[3:4]
	v_div_scale_f64 v[11:12], vcc_lo, v[3:4], v[1:2], v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[7:8], v[5:6]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[9:10], -v[5:6], v[7:8], 1.0
	v_fma_f64 v[7:8], v[7:8], v[9:10], v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[9:10], -v[5:6], v[7:8], 1.0
	v_fma_f64 v[7:8], v[7:8], v[9:10], v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[9:10], v[11:12], v[7:8]
	v_fma_f64 v[5:6], -v[5:6], v[9:10], v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[5:6], v[5:6], v[7:8], v[9:10]
	v_div_fixup_f64 v[2:3], v[5:6], v[1:2], v[3:4]
	v_mov_b32_e32 v1, 0x3ff00000
	s_clause 0x1
	global_store_b64 v0, v[2:3], s[0:1]
	global_store_b64 v0, v[0:1], s[2:3]
.LBB3_12:                               ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z23reverse_row_eliminationPdiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 20
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 13
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z23reverse_row_eliminationPdiii, .Lfunc_end3-_Z23reverse_row_eliminationPdiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 700
; NumSgprs: 18
; NumVgprs: 13
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 13
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z7sum_rowPdiii         ; -- Begin function _Z7sum_rowPdiii
	.globl	_Z7sum_rowPdiii
	.p2align	8
	.type	_Z7sum_rowPdiii,@function
_Z7sum_rowPdiii:                        ; @_Z7sum_rowPdiii
; %bb.0:
	s_load_b32 s3, s[0:1], 0xc
	s_mov_b32 s4, exec_lo
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s2, s3, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s2, s3, s2
	s_ashr_i32 s2, s2, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cmpx_gt_i32_e64 s2, v0
	s_cbranch_execz .LBB4_3
; %bb.1:                                ; %.lr.ph
	s_load_b64 s[0:1], s[0:1], 0x0
	v_lshlrev_b32_e32 v1, 3, v0
	s_lshl_b32 s4, s2, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_sub_i32 s4, s3, s4
	s_mov_b32 s3, 0
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v1, s5, s0, v1
	v_add_co_ci_u32_e64 v2, null, s1, 0, s5
.LBB4_2:                                ; =>This Inner Loop Header: Depth=1
	v_add3_u32 v3, s2, s4, v0
	s_cmp_eq_u32 s4, 1
	s_cselect_b32 s4, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s4, 0
	v_ashrrev_i32_e32 v4, 31, v3
	s_addc_u32 s4, s2, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_lshr_b32 s2, s4, 1
	s_and_b32 s4, s4, 1
	v_lshlrev_b64 v[3:4], 3, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s0, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v4, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s2, v0
	s_clause 0x1
	global_load_b64 v[3:4], v[3:4], off
	global_load_b64 v[5:6], v[1:2], off
	s_or_b32 s3, vcc_lo, s3
	s_waitcnt vmcnt(0)
	v_add_f64 v[3:4], v[3:4], v[5:6]
	global_store_b64 v[1:2], v[3:4], off
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB4_2
.LBB4_3:                                ; %._crit_edge
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7sum_rowPdiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 20
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 6
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end4:
	.size	_Z7sum_rowPdiii, .Lfunc_end4-_Z7sum_rowPdiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 240
; NumSgprs: 8
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 8
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
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amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
