// Author: Ayush Kumar
// Roll No: 170195
// Compile: nvcc -g -G -arch=sm_61 -std=c++11 assignment5-p3.cu -o assignment5-p3

#include <cmath>
#include <iostream>
#include <sys/time.h>

#define SIZE 1024
#define BLOCK_SIZE 16
#define THRESHOLD (0.000001)

using std::cerr;
using std::cout;
using std::endl;

double rtclock() { // Seconds
  struct timezone Tzp;
  struct timeval Tp;
  int stat;
  stat = gettimeofday(&Tp, &Tzp);
  if (stat != 0) {
    cout << "Error return from gettimeofday: " << stat << "\n";
  }
  return (Tp.tv_sec + Tp.tv_usec * 1.0e-6);
}

__host__ void ATAonCPU(double* M, double* P) {
  for (int k = 0; k < SIZE; k++) {
    for (int i = 0; i < SIZE; i++) {
      for (int j = 0; j < SIZE; j++)
        P[i*SIZE + j] += M[k*SIZE + i] * M[k*SIZE + j];
    }
  }
}

__global__ void ATAkernel1(double* A, double* B) {
  // TODO: Fill in
  int i = blockIdx.y * blockDim.y + threadIdx.y;
  int j = blockIdx.x * blockDim.x + threadIdx.x;
  for (int k = 0; k < SIZE; k++) {
    // atomicAdd(&B[i*SIZE + j], A[k*SIZE + i] * A[k*SIZE + j]);
    B[i*SIZE + j] += A[k*SIZE + i] * A[k*SIZE + j];
  }
}

__global__ void ATAkernel2(double* A, double* B) {
  // TODO: Fill in
  // Block row and column
  int block_i = blockIdx.y;
  int block_j = blockIdx.x;

  // Each thread block computes one sub-matrix B_sub of B
  double* B_sub = &B[block_i * blockDim.y * SIZE + block_j * blockDim.x];

  // Each thread computes one element of B_sub
  // by accumulating results into B_value
  double B_value = 0;

  // Thread row and column within B_sub
  int thread_i = threadIdx.y;
  int thread_j = threadIdx.x;

  // Loop over all the sub-matrices of A^T and A that are
  // required to compute B_sub
  // Multiply each pair of sub-matrices together
  // and accumulate the results
  for (int m = 0; m < SIZE/blockDim.x; m++) {
    // Get sub-matrix AT_sub of AT
    double* AT_sub = &A[m * blockDim.y * SIZE + block_i * blockDim.x];
    // Get sub-matrix A_sub of A
    double* A_sub = &A[m * blockDim.y * SIZE + block_j * blockDim.x];

    // Shared memory used to store AT_sub and A_sub respectively
    __shared__ double ATs[BLOCK_SIZE][BLOCK_SIZE];
    __shared__ double As[BLOCK_SIZE][BLOCK_SIZE];

    // Load AT_sub and A_sub from device memory to shared memory
    // Each thread loads one element of each sub-matrix
    ATs[thread_i][thread_j] = AT_sub[thread_i * SIZE + thread_j];
    As[thread_i][thread_j] = A_sub[thread_i * SIZE + thread_j];

    // Synchronize to make sure the sub-matrices are loaded
    // before starting the computation
    __syncthreads();
    // Multiply AT_sub and A_sub together
    for (int k = 0; k < BLOCK_SIZE; k += 16) {
        B_value += ATs[k][thread_i] * As[k][thread_j];
        B_value += ATs[k+1][thread_i] * As[k+1][thread_j];
        B_value += ATs[k+2][thread_i] * As[k+2][thread_j];
        B_value += ATs[k+3][thread_i] * As[k+3][thread_j];
        B_value += ATs[k+4][thread_i] * As[k+4][thread_j];
        B_value += ATs[k+5][thread_i] * As[k+5][thread_j];
        B_value += ATs[k+6][thread_i] * As[k+6][thread_j];
        B_value += ATs[k+7][thread_i] * As[k+7][thread_j];
        B_value += ATs[k+8][thread_i] * As[k+8][thread_j];
        B_value += ATs[k+9][thread_i] * As[k+9][thread_j];
        B_value += ATs[k+10][thread_i] * As[k+10][thread_j];
        B_value += ATs[k+11][thread_i] * As[k+11][thread_j];
        B_value += ATs[k+12][thread_i] * As[k+12][thread_j];
        B_value += ATs[k+13][thread_i] * As[k+13][thread_j];
        B_value += ATs[k+14][thread_i] * As[k+14][thread_j];
        B_value += ATs[k+15][thread_i] * As[k+15][thread_j];
    }
    // Synchronize to make sure that the preceding
    // computation is done before loading two new
    // sub-matrices of AT and A in the next iteration
    __syncthreads();
  }
  // Write B_sub to device memory
  // Each thread writes one element
  B_sub[thread_i * SIZE + thread_j] = B_value;
}

__host__ void check_result(double* Test, double* Ref) {
  double maxdiff = 0, rel_diff = 0;
  int numdiffs = 0;

  for (int i = 0; i < SIZE; i++) {
    for (int j = 0; j < SIZE; j++) {
      rel_diff = (Test[i*SIZE + j] - Ref[i*SIZE + j]);
      if (fabs(rel_diff) > THRESHOLD) {
        numdiffs++;
        if (rel_diff > maxdiff)
          maxdiff = rel_diff;
      }
    }
  }
  if (numdiffs > 0)
    cout << numdiffs << " Diffs found over THRESHOLD " << THRESHOLD << " Max Diff = " << maxdiff
         << "\n";
  else
    cout << "No differences found between base and test versions\n";
}

int main() {
  cout << "Matrix Size = " << SIZE << "\n";

  double* h_in = new double[SIZE*SIZE];
  double* h_cpu_out = new double[SIZE*SIZE];
  double* h_dev_out = new double[SIZE*SIZE];

  for (int i = 0; i < SIZE; i++) {
    for (int j = 0; j < SIZE; j++) {
      h_in[i*SIZE + j] = i * j * 0.25;
      h_cpu_out[i*SIZE + j] = 0;
      h_dev_out[i*SIZE + j] = 0;
    }
  }

  double clkbegin = rtclock();
  ATAonCPU(h_in, h_cpu_out);
  double clkend = rtclock();
  double cpu_time = clkend - clkbegin;
  cout << "A^T.A on CPU: " << ((2.0 * SIZE * SIZE * SIZE) / cpu_time)
       << " GFLOPS; Time = " << cpu_time * 1000 << " msec" << endl;

  cudaError_t status;
  cudaEvent_t start, end;
  double* d_in;
  double* d_out;
  float kernel_time;
  // TODO: Fill in
  cudaMalloc(&d_in, sizeof(double)*SIZE*SIZE);
  cudaMalloc(&d_out, sizeof(double)*SIZE*SIZE);
  dim3 threads_in_block1(BLOCK_SIZE, BLOCK_SIZE);
  dim3 blocks_in_grid1(SIZE/threads_in_block1.x, SIZE/threads_in_block1.y);
  cudaEventCreate(&start);
  cudaEventCreate(&end);
  cudaEventRecord(start, 0);
  /************** CUDA **************/
  cudaMemcpy(d_in, h_in, sizeof(double)*SIZE*SIZE, cudaMemcpyHostToDevice);
  cudaMemset(d_out, 0, sizeof(double)*SIZE*SIZE);
  ATAkernel1<<<blocks_in_grid1, threads_in_block1>>>(d_in, d_out);
  cudaMemcpy(h_dev_out, d_out, sizeof(double)*SIZE*SIZE, cudaMemcpyDeviceToHost);
  /************** CUDA **************/
  cudaEventRecord(end, 0);
  cudaEventSynchronize(end);
  cudaEventElapsedTime(&kernel_time, start, end);
  cudaEventDestroy(start);
  cudaEventDestroy(end);
  check_result(h_cpu_out, h_dev_out);
  cout << "A^T.A on GPU Kernel 1: " << ((2.0 * SIZE * SIZE * SIZE) / (kernel_time * 1.0e-03))
       << " GFLOPS; Time = " << kernel_time << " msec" << endl;
  status = cudaGetLastError();
  if (status != cudaSuccess) {
    cerr << "CUDA Error: " << cudaGetErrorString(status) << endl;
  }

  dim3 threads_in_block2(BLOCK_SIZE, BLOCK_SIZE);
  dim3 blocks_in_grid2(SIZE/threads_in_block2.x, SIZE/threads_in_block2.y);
  cudaEventCreate(&start);
  cudaEventCreate(&end);
  cudaEventRecord(start, 0);
  /************** CUDA **************/
  cudaMemcpy(d_in, h_in, sizeof(double)*SIZE*SIZE, cudaMemcpyHostToDevice);
  cudaMemset(d_out, 0, sizeof(double)*SIZE*SIZE);
  ATAkernel2<<<blocks_in_grid2, threads_in_block2>>>(d_in, d_out);
  cudaMemcpy(h_dev_out, d_out, sizeof(double)*SIZE*SIZE, cudaMemcpyDeviceToHost);
  /************** CUDA **************/
  cudaEventRecord(end, 0);
  cudaEventSynchronize(end);
  cudaEventElapsedTime(&kernel_time, start, end);
  cudaEventDestroy(start);
  cudaEventDestroy(end);
  check_result(h_cpu_out, h_dev_out);
  cout << "A^T.A on GPU Kernel 2: " << ((2.0 * SIZE * SIZE * SIZE) / (kernel_time * 1.0e-03))
       << " GFLOPS; Time = " << kernel_time << " msec" << endl;
  status = cudaGetLastError();
  if (status != cudaSuccess) {
    cerr << "CUDA Error: " << cudaGetErrorString(status) << endl;
  }

  // Free device memory
  cudaFree(d_in);
  cudaFree(d_out);

  // Free host memory
  delete[] h_in;
  delete[] h_cpu_out;
  delete[] h_dev_out;

  return EXIT_SUCCESS;
}

	.file	"tmpxft_00385027_00000000-6_assignment5-p3.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3641:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3641:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.align 2
	.type	_ZNSolsEPFRSoS_E.isra.0, @function
_ZNSolsEPFRSoS_E.isra.0:
.LFB4300:
	.cfi_startproc
	jmp	*%rsi
	.cfi_endproc
.LFE4300:
	.size	_ZNSolsEPFRSoS_E.isra.0, .-_ZNSolsEPFRSoS_E.isra.0
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Error return from gettimeofday: "
.LC1:
	.string	"\n"
	.text
	.globl	_Z7rtclockv
	.type	_Z7rtclockv, @function
_Z7rtclockv:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	movq	%fs:40, %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %rsi
	leaq	8(%rsp), %rdi
	call	gettimeofday@PLT
	testl	%eax, %eax
	je	.L4
	leaq	.LC0(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	movl	%eax, %ebx
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebx, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC1(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
.L4:
	cvtsi2sdq	16(%rsp), %xmm0
	mulsd	.LC2(%rip), %xmm0
	cvtsi2sdq	8(%rsp), %xmm1
	addsd	%xmm1, %xmm0
	movq	24(%rsp), %rax
	subq	%fs:40, %rax
	je	.L5
	call	__stack_chk_fail@PLT
.L5:
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	_Z7rtclockv, .-_Z7rtclockv
	.globl	_Z8ATAonCPUPdS_
	.type	_Z8ATAonCPUPdS_, @function
_Z8ATAonCPUPdS_:
.LFB3636:
	.cfi_startproc
	endbr64
	xorl	%r8d, %r8d
.L12:
	xorl	%edx, %edx
.L16:
	movq	%rdx, %rax
	xorl	%ecx, %ecx
	salq	$13, %rax
	addq	%rsi, %rax
.L13:
	movsd	(%rdi,%rdx,8), %xmm0
	mulsd	(%rdi,%rcx), %xmm0
	addq	$8, %rcx
	addq	$8, %rax
	addsd	-8(%rax), %xmm0
	movsd	%xmm0, -8(%rax)
	cmpq	$8192, %rcx
	jne	.L13
	incq	%rdx
	cmpq	$1024, %rdx
	jne	.L16
	addl	$1024, %r8d
	addq	$8192, %rdi
	cmpl	$1048576, %r8d
	jne	.L12
	ret
	.cfi_endproc
.LFE3636:
	.size	_Z8ATAonCPUPdS_, .-_Z8ATAonCPUPdS_
	.section	.rodata.str1.1
.LC5:
	.string	" Diffs found over THRESHOLD "
.LC6:
	.string	" Max Diff = "
.LC7:
	.string	"No differences found between base and test versions\n"
	.text
	.globl	_Z12check_resultPdS_
	.type	_Z12check_resultPdS_, @function
_Z12check_resultPdS_:
.LFB3637:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rsi, %r8
	xorl	%edx, %edx
	xorl	%esi, %esi
	movq	.LC4(%rip), %xmm2
	xorps	%xmm1, %xmm1
.L19:
	movq	%rdx, %rax
	xorl	%ecx, %ecx
.L22:
	movsd	(%rdi,%rax), %xmm0
	subsd	(%r8,%rax), %xmm0
	movaps	%xmm0, %xmm3
	andps	%xmm2, %xmm3
	comisd	.LC2(%rip), %xmm3
	jbe	.L20
	maxsd	%xmm1, %xmm0
	incl	%esi
	movaps	%xmm0, %xmm1
.L20:
	incl	%ecx
	addq	$8, %rax
	cmpl	$1024, %ecx
	jne	.L22
	addq	$8192, %rdx
	cmpq	$8388608, %rdx
	jne	.L19
	testl	%esi, %esi
	movsd	%xmm1, 8(%rsp)
	leaq	_ZSt4cout(%rip), %rdi
	jle	.L24
	call	_ZNSolsEi@PLT
	leaq	.LC5(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	.LC2(%rip), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC6(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	8(%rsp), %xmm1
	movq	%rax, %rdi
	movaps	%xmm1, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC1(%rip), %rsi
	movq	%rax, %rdi
	jmp	.L29
.L24:
	leaq	.LC7(%rip), %rsi
.L29:
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	jmp	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	.cfi_endproc
.LFE3637:
	.size	_Z12check_resultPdS_, .-_Z12check_resultPdS_
	.globl	_Z32__device_stub__Z10ATAkernel1PdS_PdS_
	.type	_Z32__device_stub__Z10ATAkernel1PdS_PdS_, @function
_Z32__device_stub__Z10ATAkernel1PdS_PdS_:
.LFB3663:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L30
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z10ATAkernel1PdS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L30:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L32
	call	__stack_chk_fail@PLT
.L32:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3663:
	.size	_Z32__device_stub__Z10ATAkernel1PdS_PdS_, .-_Z32__device_stub__Z10ATAkernel1PdS_PdS_
	.globl	_Z10ATAkernel1PdS_
	.type	_Z10ATAkernel1PdS_, @function
_Z10ATAkernel1PdS_:
.LFB3664:
	.cfi_startproc
	endbr64
	jmp	_Z32__device_stub__Z10ATAkernel1PdS_PdS_
	.cfi_endproc
.LFE3664:
	.size	_Z10ATAkernel1PdS_, .-_Z10ATAkernel1PdS_
	.globl	_Z32__device_stub__Z10ATAkernel2PdS_PdS_
	.type	_Z32__device_stub__Z10ATAkernel2PdS_PdS_, @function
_Z32__device_stub__Z10ATAkernel2PdS_PdS_:
.LFB3665:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L35
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z10ATAkernel2PdS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L35:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L37
	call	__stack_chk_fail@PLT
.L37:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3665:
	.size	_Z32__device_stub__Z10ATAkernel2PdS_PdS_, .-_Z32__device_stub__Z10ATAkernel2PdS_PdS_
	.globl	_Z10ATAkernel2PdS_
	.type	_Z10ATAkernel2PdS_, @function
_Z10ATAkernel2PdS_:
.LFB3666:
	.cfi_startproc
	endbr64
	jmp	_Z32__device_stub__Z10ATAkernel2PdS_PdS_
	.cfi_endproc
.LFE3666:
	.size	_Z10ATAkernel2PdS_, .-_Z10ATAkernel2PdS_
	.section	.rodata.str1.1
.LC8:
	.string	"Matrix Size = "
.LC10:
	.string	"A^T.A on CPU: "
.LC12:
	.string	" GFLOPS; Time = "
.LC14:
	.string	" msec"
.LC15:
	.string	"A^T.A on GPU Kernel 1: "
.LC17:
	.string	"CUDA Error: "
.LC18:
	.string	"A^T.A on GPU Kernel 2: "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3638:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leaq	.LC8(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$136, %rsp
	.cfi_def_cfa_offset 192
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$1024, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC1(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$8388608, %edi
	call	_Znam@PLT
	movl	$8388608, %edi
	movq	%rax, %rbx
	call	_Znam@PLT
	movl	$8388608, %edi
	movq	%rax, 16(%rsp)
	call	_Znam@PLT
	movsd	.LC9(%rip), %xmm1
	movq	%rbx, %rcx
	movq	%rax, 8(%rsp)
	xorl	%eax, %eax
.L42:
	xorl	%esi, %esi
	xorl	%edx, %edx
.L41:
	cvtsi2sdl	%esi, %xmm0
	addl	%eax, %esi
	mulsd	%xmm1, %xmm0
	movsd	%xmm0, (%rcx,%rdx,8)
	incq	%rdx
	cmpq	$1024, %rdx
	jne	.L41
	incl	%eax
	addq	$8192, %rcx
	cmpl	$1024, %eax
	jne	.L42
	movq	16(%rsp), %rdi
	xorl	%eax, %eax
	movl	$2097152, %ecx
	leaq	.LC12(%rip), %r12
	leaq	40(%rsp), %r15
	rep stosl
	movq	8(%rsp), %rdi
	movl	$2097152, %ecx
	rep stosl
	call	_Z7rtclockv
	movq	16(%rsp), %rsi
	movq	%rbx, %rdi
	movsd	%xmm0, 24(%rsp)
	call	_Z8ATAonCPUPdS_
	call	_Z7rtclockv
	subsd	24(%rsp), %xmm0
	leaq	.LC10(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	movsd	%xmm0, 24(%rsp)
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	.LC11(%rip), %xmm0
	divsd	24(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%r12, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	24(%rsp), %xmm0
	mulsd	.LC13(%rip), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC14(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	56(%rsp), %rdi
	movl	$8388608, %esi
	call	cudaMalloc@PLT
	movl	$8388608, %esi
	leaq	64(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	%r15, %rdi
	movl	$1, 92(%rsp)
	movabsq	$274877907008, %rax
	movq	%rax, 84(%rsp)
	call	cudaEventCreate@PLT
	leaq	48(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	56(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$8388608, %edx
	call	cudaMemcpy@PLT
	movq	64(%rsp), %rdi
	xorl	%esi, %esi
	movl	$8388608, %edx
	call	cudaMemset@PLT
	movq	84(%rsp), %rdi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	92(%rsp), %esi
	movl	$1, %ecx
	movabsq	$68719476752, %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L45
	movq	64(%rsp), %rsi
	movq	56(%rsp), %rdi
	call	_Z32__device_stub__Z10ATAkernel1PdS_PdS_
.L45:
	movq	64(%rsp), %rsi
	movq	8(%rsp), %rdi
	movl	$2, %ecx
	movl	$8388608, %edx
	leaq	36(%rsp), %r14
	call	cudaMemcpy@PLT
	movq	48(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	48(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	48(%rsp), %rdx
	movq	40(%rsp), %rsi
	movq	%r14, %rdi
	call	cudaEventElapsedTime@PLT
	movq	40(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	48(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	8(%rsp), %rsi
	movq	16(%rsp), %rdi
	call	_Z12check_resultPdS_
	leaq	.LC15(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtss2sd	36(%rsp), %xmm0
	mulsd	.LC16(%rip), %xmm0
	movsd	.LC11(%rip), %xmm1
	movq	%rax, %rdi
	divsd	%xmm0, %xmm1
	movaps	%xmm1, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%r12, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtss2sd	36(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC14(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	call	cudaGetLastError@PLT
	movl	%eax, %ebp
	testl	%eax, %eax
	je	.L46
	leaq	.LC17(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebp, %edi
	movq	%rax, %r13
	call	cudaGetErrorString@PLT
	movq	%r13, %rdi
	movq	%rax, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
.L46:
	movabsq	$274877907008, %rax
	movq	%r15, %rdi
	movl	$1, 116(%rsp)
	movq	%rax, 108(%rsp)
	call	cudaEventCreate@PLT
	leaq	48(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	56(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$8388608, %edx
	call	cudaMemcpy@PLT
	movq	64(%rsp), %rdi
	xorl	%esi, %esi
	movl	$8388608, %edx
	call	cudaMemset@PLT
	movq	108(%rsp), %rdi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	116(%rsp), %esi
	movl	$1, %ecx
	movabsq	$68719476752, %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L47
	movq	64(%rsp), %rsi
	movq	56(%rsp), %rdi
	call	_Z32__device_stub__Z10ATAkernel2PdS_PdS_
.L47:
	movq	64(%rsp), %rsi
	movq	8(%rsp), %rdi
	movl	$2, %ecx
	movl	$8388608, %edx
	call	cudaMemcpy@PLT
	movq	48(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	48(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	48(%rsp), %rdx
	movq	40(%rsp), %rsi
	movq	%r14, %rdi
	call	cudaEventElapsedTime@PLT
	movq	40(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	48(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	8(%rsp), %rsi
	movq	16(%rsp), %rdi
	call	_Z12check_resultPdS_
	leaq	.LC18(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtss2sd	36(%rsp), %xmm1
	mulsd	.LC16(%rip), %xmm1
	movsd	.LC11(%rip), %xmm0
	movq	%rax, %rdi
	divsd	%xmm1, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%r12, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtss2sd	36(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC14(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	call	cudaGetLastError@PLT
	movl	%eax, %ebp
	testl	%eax, %eax
	je	.L48
	leaq	.LC17(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%ebp, %edi
	movq	%rax, %r12
	call	cudaGetErrorString@PLT
	movq	%r12, %rdi
	movq	%rax, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
.L48:
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	movq	%rbx, %rdi
	call	_ZdaPv@PLT
	movq	16(%rsp), %rdi
	call	_ZdaPv@PLT
	movq	8(%rsp), %rdi
	call	_ZdaPv@PLT
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L49
	call	__stack_chk_fail@PLT
.L49:
	addq	$136, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3638:
	.size	main, .-main
	.section	.rodata.str1.1
.LC19:
	.string	"_Z10ATAkernel2PdS_"
.LC20:
	.string	"_Z10ATAkernel1PdS_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3668:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC19(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z10ATAkernel2PdS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC20(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z10ATAkernel1PdS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3668:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC2:
	.long	-1598689907
	.long	1051772663
	.section	.rodata.cst16,"aM",@progbits,16
	.align 16
.LC4:
	.long	-1
	.long	2147483647
	.long	0
	.long	0
	.section	.rodata.cst8
	.align 8
.LC9:
	.long	0
	.long	1070596096
	.align 8
.LC11:
	.long	0
	.long	1105199104
	.align 8
.LC13:
	.long	0
	.long	1083129856
	.align 8
.LC16:
	.long	-755914244
	.long	1062232653
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

// Author: Ayush Kumar
// Roll No: 170195
// Compile: nvcc -g -G -arch=sm_61 -std=c++11 assignment5-p3.cu -o assignment5-p3


#include <hip/hip_runtime.h>
#include <cmath>
#include <iostream>
#include <sys/time.h>

#define SIZE 1024
#define BLOCK_SIZE 16
#define THRESHOLD (0.000001)

using std::cerr;
using std::cout;
using std::endl;

double rtclock() { // Seconds
  struct timezone Tzp;
  struct timeval Tp;
  int stat;
  stat = gettimeofday(&Tp, &Tzp);
  if (stat != 0) {
    cout << "Error return from gettimeofday: " << stat << "\n";
  }
  return (Tp.tv_sec + Tp.tv_usec * 1.0e-6);
}

__host__ void ATAonCPU(double* M, double* P) {
  for (int k = 0; k < SIZE; k++) {
    for (int i = 0; i < SIZE; i++) {
      for (int j = 0; j < SIZE; j++)
        P[i*SIZE + j] += M[k*SIZE + i] * M[k*SIZE + j];
    }
  }
}

__global__ void ATAkernel1(double* A, double* B) {
  // TODO: Fill in
  int i = blockIdx.y * blockDim.y + threadIdx.y;
  int j = blockIdx.x * blockDim.x + threadIdx.x;
  for (int k = 0; k < SIZE; k++) {
    // atomicAdd(&B[i*SIZE + j], A[k*SIZE + i] * A[k*SIZE + j]);
    B[i*SIZE + j] += A[k*SIZE + i] * A[k*SIZE + j];
  }
}

__global__ void ATAkernel2(double* A, double* B) {
  // TODO: Fill in
  // Block row and column
  int block_i = blockIdx.y;
  int block_j = blockIdx.x;

  // Each thread block computes one sub-matrix B_sub of B
  double* B_sub = &B[block_i * blockDim.y * SIZE + block_j * blockDim.x];

  // Each thread computes one element of B_sub
  // by accumulating results into B_value
  double B_value = 0;

  // Thread row and column within B_sub
  int thread_i = threadIdx.y;
  int thread_j = threadIdx.x;

  // Loop over all the sub-matrices of A^T and A that are
  // required to compute B_sub
  // Multiply each pair of sub-matrices together
  // and accumulate the results
  for (int m = 0; m < SIZE/blockDim.x; m++) {
    // Get sub-matrix AT_sub of AT
    double* AT_sub = &A[m * blockDim.y * SIZE + block_i * blockDim.x];
    // Get sub-matrix A_sub of A
    double* A_sub = &A[m * blockDim.y * SIZE + block_j * blockDim.x];

    // Shared memory used to store AT_sub and A_sub respectively
    __shared__ double ATs[BLOCK_SIZE][BLOCK_SIZE];
    __shared__ double As[BLOCK_SIZE][BLOCK_SIZE];

    // Load AT_sub and A_sub from device memory to shared memory
    // Each thread loads one element of each sub-matrix
    ATs[thread_i][thread_j] = AT_sub[thread_i * SIZE + thread_j];
    As[thread_i][thread_j] = A_sub[thread_i * SIZE + thread_j];

    // Synchronize to make sure the sub-matrices are loaded
    // before starting the computation
    __syncthreads();
    // Multiply AT_sub and A_sub together
    for (int k = 0; k < BLOCK_SIZE; k += 16) {
        B_value += ATs[k][thread_i] * As[k][thread_j];
        B_value += ATs[k+1][thread_i] * As[k+1][thread_j];
        B_value += ATs[k+2][thread_i] * As[k+2][thread_j];
        B_value += ATs[k+3][thread_i] * As[k+3][thread_j];
        B_value += ATs[k+4][thread_i] * As[k+4][thread_j];
        B_value += ATs[k+5][thread_i] * As[k+5][thread_j];
        B_value += ATs[k+6][thread_i] * As[k+6][thread_j];
        B_value += ATs[k+7][thread_i] * As[k+7][thread_j];
        B_value += ATs[k+8][thread_i] * As[k+8][thread_j];
        B_value += ATs[k+9][thread_i] * As[k+9][thread_j];
        B_value += ATs[k+10][thread_i] * As[k+10][thread_j];
        B_value += ATs[k+11][thread_i] * As[k+11][thread_j];
        B_value += ATs[k+12][thread_i] * As[k+12][thread_j];
        B_value += ATs[k+13][thread_i] * As[k+13][thread_j];
        B_value += ATs[k+14][thread_i] * As[k+14][thread_j];
        B_value += ATs[k+15][thread_i] * As[k+15][thread_j];
    }
    // Synchronize to make sure that the preceding
    // computation is done before loading two new
    // sub-matrices of AT and A in the next iteration
    __syncthreads();
  }
  // Write B_sub to device memory
  // Each thread writes one element
  B_sub[thread_i * SIZE + thread_j] = B_value;
}

__host__ void check_result(double* Test, double* Ref) {
  double maxdiff = 0, rel_diff = 0;
  int numdiffs = 0;

  for (int i = 0; i < SIZE; i++) {
    for (int j = 0; j < SIZE; j++) {
      rel_diff = (Test[i*SIZE + j] - Ref[i*SIZE + j]);
      if (fabs(rel_diff) > THRESHOLD) {
        numdiffs++;
        if (rel_diff > maxdiff)
          maxdiff = rel_diff;
      }
    }
  }
  if (numdiffs > 0)
    cout << numdiffs << " Diffs found over THRESHOLD " << THRESHOLD << " Max Diff = " << maxdiff
         << "\n";
  else
    cout << "No differences found between base and test versions\n";
}

int main() {
  cout << "Matrix Size = " << SIZE << "\n";

  double* h_in = new double[SIZE*SIZE];
  double* h_cpu_out = new double[SIZE*SIZE];
  double* h_dev_out = new double[SIZE*SIZE];

  for (int i = 0; i < SIZE; i++) {
    for (int j = 0; j < SIZE; j++) {
      h_in[i*SIZE + j] = i * j * 0.25;
      h_cpu_out[i*SIZE + j] = 0;
      h_dev_out[i*SIZE + j] = 0;
    }
  }

  double clkbegin = rtclock();
  ATAonCPU(h_in, h_cpu_out);
  double clkend = rtclock();
  double cpu_time = clkend - clkbegin;
  cout << "A^T.A on CPU: " << ((2.0 * SIZE * SIZE * SIZE) / cpu_time)
       << " GFLOPS; Time = " << cpu_time * 1000 << " msec" << endl;

  hipError_t status;
  hipEvent_t start, end;
  double* d_in;
  double* d_out;
  float kernel_time;
  // TODO: Fill in
  hipMalloc(&d_in, sizeof(double)*SIZE*SIZE);
  hipMalloc(&d_out, sizeof(double)*SIZE*SIZE);
  dim3 threads_in_block1(BLOCK_SIZE, BLOCK_SIZE);
  dim3 blocks_in_grid1(SIZE/threads_in_block1.x, SIZE/threads_in_block1.y);
  hipEventCreate(&start);
  hipEventCreate(&end);
  hipEventRecord(start, 0);
  /************** CUDA **************/
  hipMemcpy(d_in, h_in, sizeof(double)*SIZE*SIZE, hipMemcpyHostToDevice);
  hipMemset(d_out, 0, sizeof(double)*SIZE*SIZE);
  ATAkernel1<<<blocks_in_grid1, threads_in_block1>>>(d_in, d_out);
  hipMemcpy(h_dev_out, d_out, sizeof(double)*SIZE*SIZE, hipMemcpyDeviceToHost);
  /************** CUDA **************/
  hipEventRecord(end, 0);
  hipEventSynchronize(end);
  hipEventElapsedTime(&kernel_time, start, end);
  hipEventDestroy(start);
  hipEventDestroy(end);
  check_result(h_cpu_out, h_dev_out);
  cout << "A^T.A on GPU Kernel 1: " << ((2.0 * SIZE * SIZE * SIZE) / (kernel_time * 1.0e-03))
       << " GFLOPS; Time = " << kernel_time << " msec" << endl;
  status = hipGetLastError();
  if (status != hipSuccess) {
    cerr << "CUDA Error: " << hipGetErrorString(status) << endl;
  }

  dim3 threads_in_block2(BLOCK_SIZE, BLOCK_SIZE);
  dim3 blocks_in_grid2(SIZE/threads_in_block2.x, SIZE/threads_in_block2.y);
  hipEventCreate(&start);
  hipEventCreate(&end);
  hipEventRecord(start, 0);
  /************** CUDA **************/
  hipMemcpy(d_in, h_in, sizeof(double)*SIZE*SIZE, hipMemcpyHostToDevice);
  hipMemset(d_out, 0, sizeof(double)*SIZE*SIZE);
  ATAkernel2<<<blocks_in_grid2, threads_in_block2>>>(d_in, d_out);
  hipMemcpy(h_dev_out, d_out, sizeof(double)*SIZE*SIZE, hipMemcpyDeviceToHost);
  /************** CUDA **************/
  hipEventRecord(end, 0);
  hipEventSynchronize(end);
  hipEventElapsedTime(&kernel_time, start, end);
  hipEventDestroy(start);
  hipEventDestroy(end);
  check_result(h_cpu_out, h_dev_out);
  cout << "A^T.A on GPU Kernel 2: " << ((2.0 * SIZE * SIZE * SIZE) / (kernel_time * 1.0e-03))
       << " GFLOPS; Time = " << kernel_time << " msec" << endl;
  status = hipGetLastError();
  if (status != hipSuccess) {
    cerr << "CUDA Error: " << hipGetErrorString(status) << endl;
  }

  // Free device memory
  hipFree(d_in);
  hipFree(d_out);

  // Free host memory
  delete[] h_in;
  delete[] h_cpu_out;
  delete[] h_dev_out;

  return EXIT_SUCCESS;
}

	.text
	.file	"assignment5-p3.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z7rtclockv
.LCPI0_0:
	.quad	0x3eb0c6f7a0b5ed8d              # double 9.9999999999999995E-7
	.text
	.globl	_Z7rtclockv
	.type	_Z7rtclockv,@function
_Z7rtclockv:                            # @_Z7rtclockv
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	leaq	8(%rsp), %rdi
	leaq	24(%rsp), %rsi
	callq	gettimeofday
	testl	%eax, %eax
	je	.LBB0_2
# %bb.1:
	movl	%eax, %ebx
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$32, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	%ebx, %esi
	callq	_ZNSolsEi
	movl	$.L.str.1, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.LBB0_2:
	cvtsi2sdq	8(%rsp), %xmm1
	cvtsi2sdq	16(%rsp), %xmm0
	mulsd	.LCPI0_0(%rip), %xmm0
	addsd	%xmm1, %xmm0
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z7rtclockv, .Lfunc_end0-_Z7rtclockv
	.cfi_endproc
                                        # -- End function
	.globl	_Z8ATAonCPUPdS_                 # -- Begin function _Z8ATAonCPUPdS_
	.type	_Z8ATAonCPUPdS_,@function
_Z8ATAonCPUPdS_:                        # @_Z8ATAonCPUPdS_
	.cfi_startproc
# %bb.0:
	xorl	%eax, %eax
	movq	%rdi, %rcx
.LBB1_1:                                # %.preheader16
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_2 Depth 2
                                        #       Child Loop BB1_3 Depth 3
	movq	%rax, %rdx
	shlq	$10, %rdx
	movq	%rsi, %r8
	xorl	%r9d, %r9d
.LBB1_2:                                # %.preheader
                                        #   Parent Loop BB1_1 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB1_3 Depth 3
	movq	%r9, %r10
	orq	%rdx, %r10
	xorl	%r11d, %r11d
.LBB1_3:                                #   Parent Loop BB1_1 Depth=1
                                        #     Parent Loop BB1_2 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movsd	(%rdi,%r10,8), %xmm0            # xmm0 = mem[0],zero
	mulsd	(%rcx,%r11,8), %xmm0
	addsd	(%r8,%r11,8), %xmm0
	movsd	%xmm0, (%r8,%r11,8)
	incq	%r11
	cmpq	$1024, %r11                     # imm = 0x400
	jne	.LBB1_3
# %bb.4:                                #   in Loop: Header=BB1_2 Depth=2
	incq	%r9
	addq	$8192, %r8                      # imm = 0x2000
	cmpq	$1024, %r9                      # imm = 0x400
	jne	.LBB1_2
# %bb.5:                                #   in Loop: Header=BB1_1 Depth=1
	incq	%rax
	addq	$8192, %rcx                     # imm = 0x2000
	cmpq	$1024, %rax                     # imm = 0x400
	jne	.LBB1_1
# %bb.6:
	retq
.Lfunc_end1:
	.size	_Z8ATAonCPUPdS_, .Lfunc_end1-_Z8ATAonCPUPdS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__ATAkernel1PdS_ # -- Begin function _Z25__device_stub__ATAkernel1PdS_
	.type	_Z25__device_stub__ATAkernel1PdS_,@function
_Z25__device_stub__ATAkernel1PdS_:      # @_Z25__device_stub__ATAkernel1PdS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10ATAkernel1PdS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z25__device_stub__ATAkernel1PdS_, .Lfunc_end2-_Z25__device_stub__ATAkernel1PdS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__ATAkernel2PdS_ # -- Begin function _Z25__device_stub__ATAkernel2PdS_
	.type	_Z25__device_stub__ATAkernel2PdS_,@function
_Z25__device_stub__ATAkernel2PdS_:      # @_Z25__device_stub__ATAkernel2PdS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10ATAkernel2PdS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z25__device_stub__ATAkernel2PdS_, .Lfunc_end3-_Z25__device_stub__ATAkernel2PdS_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function _Z12check_resultPdS_
.LCPI4_0:
	.quad	0x7fffffffffffffff              # double NaN
	.quad	0x7fffffffffffffff              # double NaN
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI4_1:
	.quad	0x3eb0c6f7a0b5ed8d              # double 9.9999999999999995E-7
	.text
	.globl	_Z12check_resultPdS_
	.type	_Z12check_resultPdS_,@function
_Z12check_resultPdS_:                   # @_Z12check_resultPdS_
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$16, %rsp
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -16
	xorpd	%xmm4, %xmm4
	xorl	%ecx, %ecx
	movapd	.LCPI4_0(%rip), %xmm0           # xmm0 = [NaN,NaN]
	movsd	.LCPI4_1(%rip), %xmm1           # xmm1 = mem[0],zero
	movl	$8192, %edx                     # imm = 0x2000
	xorl	%eax, %eax
.LBB4_1:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_2 Depth 2
	xorl	%r8d, %r8d
.LBB4_2:                                #   Parent Loop BB4_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movsd	(%rdi,%r8,8), %xmm2             # xmm2 = mem[0],zero
	subsd	(%rsi,%r8,8), %xmm2
	movapd	%xmm2, %xmm3
	andpd	%xmm0, %xmm3
	ucomisd	%xmm1, %xmm3
	jbe	.LBB4_5
# %bb.3:                                #   in Loop: Header=BB4_2 Depth=2
	incl	%eax
	ucomisd	%xmm4, %xmm2
	jbe	.LBB4_5
# %bb.4:                                #   in Loop: Header=BB4_2 Depth=2
	movapd	%xmm2, %xmm4
.LBB4_5:                                #   in Loop: Header=BB4_2 Depth=2
	incq	%r8
	cmpq	$1024, %r8                      # imm = 0x400
	jne	.LBB4_2
# %bb.6:                                #   in Loop: Header=BB4_1 Depth=1
	incq	%rcx
	addq	%rdx, %rsi
	addq	%rdx, %rdi
	cmpq	$1024, %rcx                     # imm = 0x400
	jne	.LBB4_1
# %bb.7:
	movl	$_ZSt4cout, %edi
	testl	%eax, %eax
	jle	.LBB4_9
# %bb.8:
	movl	%eax, %esi
	movsd	%xmm4, 8(%rsp)                  # 8-byte Spill
	callq	_ZNSolsEi
	movq	%rax, %rbx
	movl	$.L.str.2, %esi
	movl	$28, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	.LCPI4_1(%rip), %xmm0           # xmm0 = mem[0],zero
	movq	%rbx, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.3, %esi
	movl	$12, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rbx, %rdi
	movsd	8(%rsp), %xmm0                  # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.1, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	jmp	.LBB4_10
.LBB4_9:
	movl	$.L.str.4, %esi
	movl	$52, %edx
.LBB4_10:
	addq	$16, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l # TAILCALL
.Lfunc_end4:
	.size	_Z12check_resultPdS_, .Lfunc_end4-_Z12check_resultPdS_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI5_0:
	.quad	0x3fd0000000000000              # double 0.25
.LCPI5_1:
	.quad	0x41e0000000000000              # double 2147483648
.LCPI5_2:
	.quad	0x408f400000000000              # double 1000
.LCPI5_3:
	.quad	0x3f50624dd2f1a9fc              # double 0.001
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$_ZSt4cout, %edi
	movl	$.L.str.5, %esi
	movl	$14, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$1024, %esi                     # imm = 0x400
	callq	_ZNSolsEi
	movl	$.L.str.1, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$8388608, %edi                  # imm = 0x800000
	callq	_Znam
	movq	%rax, %rbx
	movl	$8388608, %edi                  # imm = 0x800000
	callq	_Znam
	movq	%rax, %r14
	movl	$8388608, %edi                  # imm = 0x800000
	callq	_Znam
	movq	%rax, %r15
	xorl	%r12d, %r12d
	movl	$8388608, %edx                  # imm = 0x800000
	movq	%r14, %r13
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	movl	$8388608, %edx                  # imm = 0x800000
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	movsd	.LCPI5_0(%rip), %xmm0           # xmm0 = mem[0],zero
	movq	%rbx, 40(%rsp)                  # 8-byte Spill
.LBB5_1:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB5_2 Depth 2
	xorl	%ecx, %ecx
	xorl	%edx, %edx
.LBB5_2:                                #   Parent Loop BB5_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm1, %xmm1
	cvtsi2sd	%ecx, %xmm1
	mulsd	%xmm0, %xmm1
	movsd	%xmm1, (%rbx,%rdx,8)
	incq	%rdx
	addl	%r12d, %ecx
	cmpq	$1024, %rdx                     # imm = 0x400
	jne	.LBB5_2
# %bb.3:                                #   in Loop: Header=BB5_1 Depth=1
	incq	%r12
	addq	$8192, %rbx                     # imm = 0x2000
	cmpq	$1024, %r12                     # imm = 0x400
	jne	.LBB5_1
# %bb.4:
	callq	_Z7rtclockv
	movsd	%xmm0, 24(%rsp)                 # 8-byte Spill
	movq	40(%rsp), %r14                  # 8-byte Reload
	movq	%r14, %rdi
	movq	%r13, %rbx
	movq	%r13, %rsi
	callq	_Z8ATAonCPUPdS_
	callq	_Z7rtclockv
	subsd	24(%rsp), %xmm0                 # 8-byte Folded Reload
	movsd	%xmm0, 24(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.6, %esi
	movl	$14, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	.LCPI5_1(%rip), %xmm0           # xmm0 = mem[0],zero
	divsd	24(%rsp), %xmm0                 # 8-byte Folded Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r12
	movl	$.L.str.7, %esi
	movl	$16, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	24(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	.LCPI5_2(%rip), %xmm0
	movq	%r12, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r12
	movl	$.L.str.8, %esi
	movl	$5, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%r12), %rax
	movq	-24(%rax), %rdi
	addq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r12, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	leaq	32(%rsp), %r12
	movl	$8388608, %esi                  # imm = 0x800000
	movq	%r12, %rdi
	callq	hipMalloc
	leaq	8(%rsp), %rbp
	movl	$8388608, %esi                  # imm = 0x800000
	movq	%rbp, %rdi
	callq	hipMalloc
	leaq	16(%rsp), %r13
	movq	%r13, %rdi
	callq	hipEventCreate
	movq	%rsp, %rdi
	callq	hipEventCreate
	movq	(%r13), %rdi
	movabsq	$68719476752, %r13              # imm = 0x1000000010
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%r12), %rdi
	movl	$8388608, %edx                  # imm = 0x800000
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbp), %rdi
	movl	$8388608, %edx                  # imm = 0x800000
	xorl	%esi, %esi
	callq	hipMemset
	movabsq	$274877907008, %rdi             # imm = 0x4000000040
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_6
# %bb.5:
	movq	32(%rsp), %rdi
	movq	8(%rsp), %rsi
	callq	_Z25__device_stub__ATAkernel1PdS_
.LBB5_6:
	movq	8(%rsp), %rsi
	movl	$8388608, %edx                  # imm = 0x800000
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%rsp), %rdi
	callq	hipEventSynchronize
	movq	16(%rsp), %rsi
	movq	(%rsp), %rdx
	leaq	52(%rsp), %rbp
	movq	%rbp, %rdi
	callq	hipEventElapsedTime
	movq	16(%rsp), %rdi
	callq	hipEventDestroy
	movq	(%rsp), %rdi
	callq	hipEventDestroy
	movq	%rbx, %rdi
	movq	%r15, %rsi
	callq	_Z12check_resultPdS_
	movl	$_ZSt4cout, %edi
	movl	$.L.str.9, %esi
	movl	$23, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	cvtss2sd	(%rbp), %xmm1
	mulsd	.LCPI5_3(%rip), %xmm1
	movsd	.LCPI5_1(%rip), %xmm0           # xmm0 = mem[0],zero
	divsd	%xmm1, %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r12
	movl	$.L.str.7, %esi
	movl	$16, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbp), %xmm0
	movq	%r12, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r12
	movl	$.L.str.8, %esi
	movl	$5, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%r12), %rax
	movq	-24(%rax), %rdi
	addq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r12, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB5_11
# %bb.7:
	movl	%eax, %ebp
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.10, %esi
	movl	$12, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebp, %edi
	callq	hipGetErrorString
	testq	%rax, %rax
	je	.LBB5_8
# %bb.9:
	movq	%rax, %r12
	movq	%rax, %rdi
	callq	strlen
	movl	$_ZSt4cerr, %edi
	movq	%r12, %rsi
	movq	%rax, %rdx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB5_10
.LBB5_8:
	movq	_ZSt4cerr(%rip), %rax
	movq	-24(%rax), %rax
	leaq	_ZSt4cerr(%rax), %rdi
	movl	32(%rdi), %esi
	orl	$1, %esi
	callq	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.LBB5_10:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
	movq	_ZSt4cerr(%rip), %rax
	movl	$_ZSt4cerr, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cerr, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.LBB5_11:
	leaq	16(%rsp), %r12
	movq	%r12, %rdi
	callq	hipEventCreate
	movq	%rsp, %rdi
	callq	hipEventCreate
	movq	(%r12), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	32(%rsp), %rdi
	movl	$8388608, %edx                  # imm = 0x800000
	movq	40(%rsp), %rsi                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	movl	$8388608, %edx                  # imm = 0x800000
	xorl	%esi, %esi
	callq	hipMemset
	movabsq	$274877907008, %rdi             # imm = 0x4000000040
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_13
# %bb.12:
	movq	32(%rsp), %rdi
	movq	8(%rsp), %rsi
	callq	_Z25__device_stub__ATAkernel2PdS_
.LBB5_13:
	movq	8(%rsp), %rsi
	movl	$8388608, %edx                  # imm = 0x800000
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%rsp), %rdi
	callq	hipEventSynchronize
	movq	16(%rsp), %rsi
	movq	(%rsp), %rdx
	leaq	52(%rsp), %r12
	movq	%r12, %rdi
	callq	hipEventElapsedTime
	movq	16(%rsp), %rdi
	callq	hipEventDestroy
	movq	(%rsp), %rdi
	callq	hipEventDestroy
	movq	%rbx, %rdi
	movq	%r15, %rsi
	callq	_Z12check_resultPdS_
	movl	$_ZSt4cout, %edi
	movl	$.L.str.11, %esi
	movl	$23, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	cvtss2sd	(%r12), %xmm1
	mulsd	.LCPI5_3(%rip), %xmm1
	movsd	.LCPI5_1(%rip), %xmm0           # xmm0 = mem[0],zero
	divsd	%xmm1, %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r13
	movl	$.L.str.7, %esi
	movl	$16, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r12), %xmm0
	movq	%r13, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r12
	movl	$.L.str.8, %esi
	movl	$5, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%r12), %rax
	movq	-24(%rax), %rdi
	addq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r12, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	callq	hipGetLastError
	testl	%eax, %eax
	je	.LBB5_18
# %bb.14:
	movl	%eax, %ebp
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.10, %esi
	movl	$12, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	%ebp, %edi
	callq	hipGetErrorString
	testq	%rax, %rax
	je	.LBB5_15
# %bb.16:
	movq	%rax, %r12
	movq	%rax, %rdi
	callq	strlen
	movl	$_ZSt4cerr, %edi
	movq	%r12, %rsi
	movq	%rax, %rdx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB5_17
.LBB5_15:
	movq	_ZSt4cerr(%rip), %rax
	movq	-24(%rax), %rax
	leaq	_ZSt4cerr(%rax), %rdi
	movl	32(%rdi), %esi
	orl	$1, %esi
	callq	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.LBB5_17:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit57
	movq	_ZSt4cerr(%rip), %rax
	movl	$_ZSt4cerr, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cerr, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.LBB5_18:
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	40(%rsp), %rdi                  # 8-byte Reload
	callq	_ZdaPv
	movq	%rbx, %rdi
	callq	_ZdaPv
	movq	%r15, %rdi
	callq	_ZdaPv
	xorl	%eax, %eax
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	main, .Lfunc_end5-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB6_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB6_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10ATAkernel1PdS_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10ATAkernel2PdS_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end6:
	.size	__hip_module_ctor, .Lfunc_end6-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB7_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB7_2:
	retq
.Lfunc_end7:
	.size	__hip_module_dtor, .Lfunc_end7-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Error return from gettimeofday: "
	.size	.L.str, 33

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"\n"
	.size	.L.str.1, 2

	.type	_Z10ATAkernel1PdS_,@object      # @_Z10ATAkernel1PdS_
	.section	.rodata,"a",@progbits
	.globl	_Z10ATAkernel1PdS_
	.p2align	3, 0x0
_Z10ATAkernel1PdS_:
	.quad	_Z25__device_stub__ATAkernel1PdS_
	.size	_Z10ATAkernel1PdS_, 8

	.type	_Z10ATAkernel2PdS_,@object      # @_Z10ATAkernel2PdS_
	.globl	_Z10ATAkernel2PdS_
	.p2align	3, 0x0
_Z10ATAkernel2PdS_:
	.quad	_Z25__device_stub__ATAkernel2PdS_
	.size	_Z10ATAkernel2PdS_, 8

	.type	.L.str.2,@object                # @.str.2
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.2:
	.asciz	" Diffs found over THRESHOLD "
	.size	.L.str.2, 29

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	" Max Diff = "
	.size	.L.str.3, 13

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"No differences found between base and test versions\n"
	.size	.L.str.4, 53

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Matrix Size = "
	.size	.L.str.5, 15

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"A^T.A on CPU: "
	.size	.L.str.6, 15

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	" GFLOPS; Time = "
	.size	.L.str.7, 17

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	" msec"
	.size	.L.str.8, 6

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"A^T.A on GPU Kernel 1: "
	.size	.L.str.9, 24

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"CUDA Error: "
	.size	.L.str.10, 13

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"A^T.A on GPU Kernel 2: "
	.size	.L.str.11, 24

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z10ATAkernel1PdS_"
	.size	.L__unnamed_1, 19

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z10ATAkernel2PdS_"
	.size	.L__unnamed_2, 19

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z25__device_stub__ATAkernel1PdS_
	.addrsig_sym _Z25__device_stub__ATAkernel2PdS_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _ZSt4cout
	.addrsig_sym _Z10ATAkernel1PdS_
	.addrsig_sym _Z10ATAkernel2PdS_
	.addrsig_sym _ZSt4cerr
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z10ATAkernel1PdS_      ; -- Begin function _Z10ATAkernel1PdS_
	.globl	_Z10ATAkernel1PdS_
	.p2align	8
	.type	_Z10ATAkernel1PdS_,@function
_Z10ATAkernel1PdS_:                     ; @_Z10ATAkernel1PdS_
; %bb.0:
	s_load_b32 s2, s[0:1], 0x1c
	v_bfe_u32 v2, v0, 10, 10
	v_and_b32_e32 v3, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[0:1], null, s15, s3, v[2:3]
	v_mad_u64_u32 v[1:2], null, s14, s2, v[3:4]
	s_load_b128 s[0:3], s[0:1], 0x0
	v_lshl_add_u32 v2, v0, 10, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	s_mov_b32 s2, 0
	global_load_b64 v[4:5], v[2:3], off
.LBB0_1:                                ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v6, s2, v0
	v_add_nc_u32_e32 v8, s2, v1
	s_addk_i32 s2, 0x400
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_cmp_eq_u32 s2, 0x100000
	v_ashrrev_i32_e32 v7, 31, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v9, 31, v8
	v_lshlrev_b64 v[6:7], 3, v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[8:9], 3, v[8:9]
	v_add_co_u32 v6, vcc_lo, s0, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v7, vcc_lo
	v_add_co_u32 v8, vcc_lo, s0, v8
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v9, vcc_lo, s1, v9, vcc_lo
	s_clause 0x1
	global_load_b64 v[6:7], v[6:7], off
	global_load_b64 v[8:9], v[8:9], off
	s_waitcnt vmcnt(0)
	v_fma_f64 v[4:5], v[6:7], v[8:9], v[4:5]
	global_store_b64 v[2:3], v[4:5], off
	s_cbranch_scc0 .LBB0_1
; %bb.2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10ATAkernel1PdS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z10ATAkernel1PdS_, .Lfunc_end0-_Z10ATAkernel1PdS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 268
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z10ATAkernel2PdS_      ; -- Begin function _Z10ATAkernel2PdS_
	.globl	_Z10ATAkernel2PdS_
	.p2align	8
	.type	_Z10ATAkernel2PdS_,@function
_Z10ATAkernel2PdS_:                     ; @_Z10ATAkernel2PdS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x1c
	s_load_b128 s[0:3], s[0:1], 0x0
	v_bfe_u32 v6, v0, 10, 10
	v_and_b32_e32 v2, 0x3ff, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	v_lshl_or_b32 v0, v6, 10, v2
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_u16_e64 s5, 0x401, s4
	s_lshr_b32 s6, s4, 16
	s_and_b32 s4, s4, 0xffff
	s_mul_i32 s7, s14, s4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccz .LBB1_4
; %bb.1:                                ; %.lr.ph
	v_cvt_f32_u32_e32 v7, s4
	s_mul_i32 s9, s15, s4
	s_mul_i32 s8, s14, s4
	v_lshl_add_u32 v5, v6, 3, 0x800
	s_mov_b32 s5, 0
	v_rcp_iflag_f32_e32 v1, v7
	s_mov_b32 s10, 0
	v_lshlrev_b32_e32 v8, 3, v0
	v_lshlrev_b32_e32 v4, 3, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v6, v6, 7, v4
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x44800000, v1
	v_trunc_f32_e32 v3, v1
	v_mov_b32_e32 v1, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_fma_f32 v9, -v3, v7, 0x44800000
	v_cvt_u32_f32_e32 v10, v3
	v_mov_b32_e32 v2, 0
	v_mov_b32_e32 v3, 0
	v_cmp_ge_f32_e64 s4, |v9|, v7
	v_add_nc_u32_e32 v9, 0x800, v6
	v_readfirstlane_b32 s11, v10
	v_add_co_u32 v7, s0, s0, v8
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	s_cmp_lg_u32 s4, 0
	v_add_co_ci_u32_e64 v8, null, s1, 0, s0
	s_addc_u32 s1, s11, 0
	s_lshl_b32 s0, s6, 10
	s_and_b32 s1, s1, 0xffff
	s_mov_b32 s11, 0
.LBB1_2:                                ; =>This Inner Loop Header: Depth=1
	s_add_i32 s4, s9, s10
	s_add_i32 s12, s8, s10
	s_lshl_b64 s[16:17], s[4:5], 3
	s_mov_b32 s13, s5
	v_add_co_u32 v10, vcc_lo, v7, s16
	s_lshl_b64 s[12:13], s[12:13], 3
	v_add_co_ci_u32_e32 v11, vcc_lo, s17, v8, vcc_lo
	v_add_co_u32 v12, vcc_lo, v7, s12
	v_add_co_ci_u32_e32 v13, vcc_lo, s13, v8, vcc_lo
	s_clause 0x1
	global_load_b64 v[10:11], v[10:11], off
	global_load_b64 v[12:13], v[12:13], off
	s_add_i32 s11, s11, 1
	s_add_i32 s10, s10, s0
	s_cmp_ge_u32 s11, s1
	s_waitcnt vmcnt(1)
	ds_store_b64 v9, v[10:11]
	s_waitcnt vmcnt(0)
	ds_store_b64 v6, v[12:13]
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_2addr_b64 v[10:13], v5 offset1:16
	ds_load_2addr_b64 v[14:17], v4 offset1:16
	s_waitcnt lgkmcnt(0)
	v_fma_f64 v[2:3], v[10:11], v[14:15], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_fma_f64 v[2:3], v[12:13], v[16:17], v[2:3]
	ds_load_2addr_b64 v[10:13], v5 offset0:32 offset1:48
	ds_load_2addr_b64 v[14:17], v4 offset0:32 offset1:48
	s_waitcnt lgkmcnt(0)
	v_fma_f64 v[2:3], v[10:11], v[14:15], v[2:3]
	v_fma_f64 v[2:3], v[12:13], v[16:17], v[2:3]
	ds_load_2addr_b64 v[10:13], v5 offset0:64 offset1:80
	ds_load_2addr_b64 v[14:17], v4 offset0:64 offset1:80
	s_waitcnt lgkmcnt(0)
	v_fma_f64 v[2:3], v[10:11], v[14:15], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_fma_f64 v[2:3], v[12:13], v[16:17], v[2:3]
	ds_load_2addr_b64 v[10:13], v5 offset0:96 offset1:112
	ds_load_2addr_b64 v[14:17], v4 offset0:96 offset1:112
	s_waitcnt lgkmcnt(0)
	v_fma_f64 v[2:3], v[10:11], v[14:15], v[2:3]
	v_fma_f64 v[2:3], v[12:13], v[16:17], v[2:3]
	ds_load_2addr_b64 v[10:13], v5 offset0:128 offset1:144
	ds_load_2addr_b64 v[14:17], v4 offset0:128 offset1:144
	s_waitcnt lgkmcnt(0)
	v_fma_f64 v[2:3], v[10:11], v[14:15], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_fma_f64 v[2:3], v[12:13], v[16:17], v[2:3]
	ds_load_2addr_b64 v[10:13], v5 offset0:160 offset1:176
	ds_load_2addr_b64 v[14:17], v4 offset0:160 offset1:176
	s_waitcnt lgkmcnt(0)
	v_fma_f64 v[2:3], v[10:11], v[14:15], v[2:3]
	v_fma_f64 v[2:3], v[12:13], v[16:17], v[2:3]
	ds_load_2addr_b64 v[10:13], v5 offset0:192 offset1:208
	ds_load_2addr_b64 v[14:17], v4 offset0:192 offset1:208
	s_waitcnt lgkmcnt(0)
	v_fma_f64 v[2:3], v[10:11], v[14:15], v[2:3]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[2:3], v[12:13], v[16:17], v[2:3]
	ds_load_2addr_b64 v[10:13], v5 offset0:224 offset1:240
	ds_load_2addr_b64 v[14:17], v4 offset0:224 offset1:240
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_fma_f64 v[2:3], v[10:11], v[14:15], v[2:3]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[2:3], v[12:13], v[16:17], v[2:3]
	s_cbranch_scc0 .LBB1_2
; %bb.3:                                ; %Flow
	s_mov_b32 s0, 0
	s_branch .LBB1_5
.LBB1_4:
	s_mov_b32 s0, -1
                                        ; implicit-def: $vgpr2_vgpr3
                                        ; implicit-def: $sgpr8
.LBB1_5:                                ; %Flow164
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccz .LBB1_7
; %bb.6:                                ; %.._crit_edge_crit_edge
	v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, 0
	v_mov_b32_e32 v3, 0
	s_mov_b32 s8, s7
.LBB1_7:                                ; %._crit_edge
	s_mul_i32 s15, s15, s6
	s_mov_b32 s1, 0
	s_lshl_b32 s0, s15, 10
	v_lshlrev_b64 v[0:1], 3, v[0:1]
	s_add_i32 s0, s8, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[0:1], 3
	s_add_u32 s0, s2, s0
	s_addc_u32 s1, s3, s1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b64 v[0:1], v[2:3], off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10ATAkernel2PdS_
		.amdhsa_group_segment_fixed_size 4096
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 18
		.amdhsa_next_free_sgpr 18
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z10ATAkernel2PdS_, .Lfunc_end1-_Z10ATAkernel2PdS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 816
; NumSgprs: 20
; NumVgprs: 18
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 4096 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 20
; NumVGPRsForWavesPerEU: 18
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10ATAkernel1PdS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z10ATAkernel1PdS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 4096
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10ATAkernel2PdS_
    .private_segment_fixed_size: 0
    .sgpr_count:     20
    .sgpr_spill_count: 0
    .symbol:         _Z10ATAkernel2PdS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     18
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
