 
#include <stdio.h>
#include <cuda.h>

// Kernel that executes on the CUDA device
__global__ void temp_calc(float *a, float *b, int N, int edge) // a: Source array, b: Target array, N: Total size, edge: Length of edge
{
  int idx = blockIdx.x * blockDim.x + threadIdx.x;
  // Calculates the row and column number
  int row = idx / (edge+1);
  int col = idx - row * (edge+1);
  if (idx<N) {
    if(row>0 && row<edge && col>0 && col<edge) // Not on the edges
      b[row*(edge+1)+col]=(a[(row-1)*(edge+1)+col]+a[(row+1)*(edge+1)+col]+a[row*(edge+1)+col-1]+a[row*(edge+1)+col+1])/4.0;
  }
}


// main routine that executes on the host
int main(void)
{
  //clock_t start = clock();
  float *a_h, *a_d, *b_d;  // Pointer to host & device arrays
  int edge = 1000; // Can be changed
  const int N = (edge+1) * (edge+1);  // Number of elements in arrays
  size_t size = N * sizeof(float);
  a_h = (float *)malloc(size);        // Allocate array on host
  cudaMalloc((void **) &a_d, size);   // Allocate array a on device
  cudaMalloc((void **) &b_d, size);   // Allocate array b on device

  // Initialize host array
  for (int i=0; i<=edge; i++) {
    for (int j=0; j<=edge; j++){
      if(i==0){
        if(j>=10 && j<=30){
          a_h[i*(edge+1)+j]=150.0;
        }
        else{
          a_h[i*(edge+1)+j]=80.0;
        }
      }
      else{
        if(i==edge || j==0 || j==edge){
          a_h[i*(edge+1)+j]=80.0;
        }
        else{
          a_h[i*(edge+1)+j]=0.0;
        }
      }
    }
  }

  // Initialize block size and block number
  int block_size = 256;
  int n_blocks = N/block_size + (N%block_size == 0 ? 0:1);
  
  // Iteration
  int iter = 500; // Can be changed
  for (int i=0;i<iter;i++){
    cudaMemcpy(a_d, a_h, size, cudaMemcpyHostToDevice); // Copy the host array to the CUDA
    cudaMemcpy(b_d, a_h, size, cudaMemcpyHostToDevice);
    temp_calc <<< n_blocks, block_size >>> (a_d, b_d, N, edge); // Calculate the values on CUDA
    cudaMemcpy(a_h, b_d, sizeof(float)*N, cudaMemcpyDeviceToHost); // Retrieve result from device and store it in host array
  }
/*
  // Print results
  for (int i=0; i<=edge; i++) {
    for (int j=0; j<=edge; j++)
      printf("%f ", a_h[i*(edge+1)+j]);
    printf("\n");
  }

  clock_t end = (clock() - start)/1000;
  printf("time: %ldms\n", end);
*/
  // Cleanup
  free(a_h); cudaFree(a_d);
}
	.file	"tmpxft_0033e9d5_00000000-6_cuda.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z32__device_stub__Z9temp_calcPfS_iiPfS_ii
	.type	_Z32__device_stub__Z9temp_calcPfS_iiPfS_ii, @function
_Z32__device_stub__Z9temp_calcPfS_iiPfS_ii:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z9temp_calcPfS_ii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z32__device_stub__Z9temp_calcPfS_iiPfS_ii, .-_Z32__device_stub__Z9temp_calcPfS_iiPfS_ii
	.globl	_Z9temp_calcPfS_ii
	.type	_Z9temp_calcPfS_ii, @function
_Z9temp_calcPfS_ii:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z32__device_stub__Z9temp_calcPfS_iiPfS_ii
	.cfi_endproc
.LFE2053:
	.size	_Z9temp_calcPfS_ii, .-_Z9temp_calcPfS_ii
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	$4008004, %edi
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$48, %rsp
	.cfi_def_cfa_offset 80
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movq	%rsp, %rdi
	movl	$4008004, %esi
	movq	%rax, %rbx
	call	cudaMalloc@PLT
	leaq	8(%rsp), %rdi
	movl	$4008004, %esi
	call	cudaMalloc@PLT
	movss	.LC1(%rip), %xmm0
	xorl	%edx, %edx
.L9:
	imull	$1001, %edx, %r8d
	xorl	%eax, %eax
.L17:
	testl	%edx, %edx
	leaq	1(%rax), %rcx
	jne	.L10
	leal	-10(%rax), %esi
	cmpl	$20, %esi
	ja	.L11
	movl	$0x43160000, (%rbx,%rax,4)
	jmp	.L24
.L11:
	movss	%xmm0, (%rbx,%rax,4)
	jmp	.L13
.L10:
	cmpl	$1000, %eax
	leal	(%r8,%rax), %esi
	sete	%dil
	testl	%eax, %eax
	leaq	(%rbx,%rsi,4), %rsi
	sete	%al
	orb	%al, %dil
	jne	.L21
	cmpl	$1000, %edx
	jne	.L14
.L21:
	movss	%xmm0, (%rsi)
	jmp	.L13
.L14:
	movl	$0x00000000, (%rsi)
.L24:
	movq	%rcx, %rax
	jmp	.L17
.L13:
	movq	%rcx, %rax
	cmpq	$1001, %rcx
	jne	.L17
	incl	%edx
	cmpl	$1001, %edx
	jne	.L9
	movabsq	$4294967552, %r12
	movl	$500, %ebp
.L16:
	movq	(%rsp), %rdi
	movl	$1, %ecx
	movl	$4008004, %edx
	movq	%rbx, %rsi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$4008004, %edx
	call	cudaMemcpy@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r12, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$4294971211, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L18
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	movl	$1000, %ecx
	movl	$1002001, %edx
	call	_Z32__device_stub__Z9temp_calcPfS_iiPfS_ii
.L18:
	movq	8(%rsp), %rsi
	movl	$2, %ecx
	movl	$4008004, %edx
	movq	%rbx, %rdi
	call	cudaMemcpy@PLT
	decl	%ebp
	jne	.L16
	movq	%rbx, %rdi
	call	free@PLT
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L19
	call	__stack_chk_fail@PLT
.L19:
	addq	$48, %rsp
	.cfi_def_cfa_offset 32
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC3:
	.string	"_Z9temp_calcPfS_ii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z9temp_calcPfS_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC1:
	.long	1117782016
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

 
#include <stdio.h>
#include <hip/hip_runtime.h>

// Kernel that executes on the CUDA device
__global__ void temp_calc(float *a, float *b, int N, int edge) // a: Source array, b: Target array, N: Total size, edge: Length of edge
{
  int idx = blockIdx.x * blockDim.x + threadIdx.x;
  // Calculates the row and column number
  int row = idx / (edge+1);
  int col = idx - row * (edge+1);
  if (idx<N) {
    if(row>0 && row<edge && col>0 && col<edge) // Not on the edges
      b[row*(edge+1)+col]=(a[(row-1)*(edge+1)+col]+a[(row+1)*(edge+1)+col]+a[row*(edge+1)+col-1]+a[row*(edge+1)+col+1])/4.0;
  }
}


// main routine that executes on the host
int main(void)
{
  //clock_t start = clock();
  float *a_h, *a_d, *b_d;  // Pointer to host & device arrays
  int edge = 1000; // Can be changed
  const int N = (edge+1) * (edge+1);  // Number of elements in arrays
  size_t size = N * sizeof(float);
  a_h = (float *)malloc(size);        // Allocate array on host
  hipMalloc((void **) &a_d, size);   // Allocate array a on device
  hipMalloc((void **) &b_d, size);   // Allocate array b on device

  // Initialize host array
  for (int i=0; i<=edge; i++) {
    for (int j=0; j<=edge; j++){
      if(i==0){
        if(j>=10 && j<=30){
          a_h[i*(edge+1)+j]=150.0;
        }
        else{
          a_h[i*(edge+1)+j]=80.0;
        }
      }
      else{
        if(i==edge || j==0 || j==edge){
          a_h[i*(edge+1)+j]=80.0;
        }
        else{
          a_h[i*(edge+1)+j]=0.0;
        }
      }
    }
  }

  // Initialize block size and block number
  int block_size = 256;
  int n_blocks = N/block_size + (N%block_size == 0 ? 0:1);
  
  // Iteration
  int iter = 500; // Can be changed
  for (int i=0;i<iter;i++){
    hipMemcpy(a_d, a_h, size, hipMemcpyHostToDevice); // Copy the host array to the CUDA
    hipMemcpy(b_d, a_h, size, hipMemcpyHostToDevice);
    temp_calc <<< n_blocks, block_size >>> (a_d, b_d, N, edge); // Calculate the values on CUDA
    hipMemcpy(a_h, b_d, sizeof(float)*N, hipMemcpyDeviceToHost); // Retrieve result from device and store it in host array
  }
/*
  // Print results
  for (int i=0; i<=edge; i++) {
    for (int j=0; j<=edge; j++)
      printf("%f ", a_h[i*(edge+1)+j]);
    printf("\n");
  }

  clock_t end = (clock() - start)/1000;
  printf("time: %ldms\n", end);
*/
  // Cleanup
  free(a_h); hipFree(a_d);
}
	.text
	.file	"cuda.hip"
	.globl	_Z24__device_stub__temp_calcPfS_ii # -- Begin function _Z24__device_stub__temp_calcPfS_ii
	.type	_Z24__device_stub__temp_calcPfS_ii,@function
_Z24__device_stub__temp_calcPfS_ii:     # @_Z24__device_stub__temp_calcPfS_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9temp_calcPfS_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z24__device_stub__temp_calcPfS_ii, .Lfunc_end0-_Z24__device_stub__temp_calcPfS_ii
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$24, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$4008004, %edi                  # imm = 0x3D2844
	callq	malloc
	movq	%rax, %rbx
	leaq	16(%rsp), %rdi
	movl	$4008004, %esi                  # imm = 0x3D2844
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movl	$4008004, %esi                  # imm = 0x3D2844
	callq	hipMalloc
	xorl	%eax, %eax
	movq	%rbx, %rcx
.LBB1_1:                                # %.preheader65
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_2 Depth 2
	xorl	%edx, %edx
.LBB1_2:                                #   Parent Loop BB1_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	cmpq	$1000, %rax                     # imm = 0x3E8
	je	.LBB1_15
# %bb.3:                                #   in Loop: Header=BB1_2 Depth=2
	testq	%rax, %rax
	jne	.LBB1_13
# %bb.4:                                #   in Loop: Header=BB1_2 Depth=2
	leal	-10(%rdx), %esi
	cmpl	$20, %esi
	ja	.LBB1_12
# %bb.5:                                #   in Loop: Header=BB1_2 Depth=2
	movl	$1125515264, (%rbx,%rdx,4)      # imm = 0x43160000
	jmp	.LBB1_17
.LBB1_13:                               # %switch.early.test
                                        #   in Loop: Header=BB1_2 Depth=2
	cmpl	$1000, %edx                     # imm = 0x3E8
	je	.LBB1_15
# %bb.14:                               # %switch.early.test
                                        #   in Loop: Header=BB1_2 Depth=2
	testl	%edx, %edx
	jne	.LBB1_16
.LBB1_15:                               #   in Loop: Header=BB1_2 Depth=2
	movl	$1117782016, (%rcx,%rdx,4)      # imm = 0x42A00000
	jmp	.LBB1_17
.LBB1_12:                               #   in Loop: Header=BB1_2 Depth=2
	movl	$1117782016, (%rbx,%rdx,4)      # imm = 0x42A00000
	jmp	.LBB1_17
.LBB1_16:                               #   in Loop: Header=BB1_2 Depth=2
	movl	$0, (%rcx,%rdx,4)
.LBB1_17:                               #   in Loop: Header=BB1_2 Depth=2
	incq	%rdx
	cmpq	$1001, %rdx                     # imm = 0x3E9
	jne	.LBB1_2
# %bb.6:                                #   in Loop: Header=BB1_1 Depth=1
	incq	%rax
	addq	$4004, %rcx                     # imm = 0xFA4
	cmpq	$1001, %rax                     # imm = 0x3E9
	jne	.LBB1_1
# %bb.7:                                # %.preheader.preheader
	movl	$500, %ebp                      # imm = 0x1F4
	movabsq	$4294967552, %r14               # imm = 0x100000100
	leaq	3659(%r14), %r15
.LBB1_8:                                # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	movq	16(%rsp), %rdi
	movl	$4008004, %edx                  # imm = 0x3D2844
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	movl	$4008004, %edx                  # imm = 0x3D2844
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_10
# %bb.9:                                #   in Loop: Header=BB1_8 Depth=1
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	movl	$1002001, %edx                  # imm = 0xF4A11
	movl	$1000, %ecx                     # imm = 0x3E8
	callq	_Z24__device_stub__temp_calcPfS_ii
.LBB1_10:                               #   in Loop: Header=BB1_8 Depth=1
	movq	8(%rsp), %rsi
	movl	$4008004, %edx                  # imm = 0x3D2844
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	decl	%ebp
	jne	.LBB1_8
# %bb.11:
	movq	%rbx, %rdi
	callq	free
	movq	16(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9temp_calcPfS_ii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z9temp_calcPfS_ii,@object      # @_Z9temp_calcPfS_ii
	.section	.rodata,"a",@progbits
	.globl	_Z9temp_calcPfS_ii
	.p2align	3, 0x0
_Z9temp_calcPfS_ii:
	.quad	_Z24__device_stub__temp_calcPfS_ii
	.size	_Z9temp_calcPfS_ii, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z9temp_calcPfS_ii"
	.size	.L__unnamed_1, 19

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z24__device_stub__temp_calcPfS_ii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z9temp_calcPfS_ii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z9temp_calcPfS_ii      ; -- Begin function _Z9temp_calcPfS_ii
	.globl	_Z9temp_calcPfS_ii
	.p2align	8
	.type	_Z9temp_calcPfS_ii,@function
_Z9temp_calcPfS_ii:                     ; @_Z9temp_calcPfS_ii
; %bb.0:
	s_clause 0x1
	s_load_b64 s[6:7], s[0:1], 0x10
	s_load_b32 s2, s[0:1], 0x24
	s_waitcnt lgkmcnt(0)
	s_add_i32 s5, s7, 1
	s_and_b32 s2, s2, 0xffff
	s_ashr_i32 s3, s5, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s4, s5, s3
	s_xor_b32 s4, s4, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f32_u32_e32 v1, s4
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_u32_f32_e32 v3, v1
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_sub_i32 s2, 0, s4
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_mul_lo_u32 v0, s2, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v2, 31, v1
	v_mul_hi_u32 v0, v3, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v4, v1, v2
	v_xor_b32_e32 v4, v4, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v3, v0
	v_mul_hi_u32 v0, v4, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v3, v0, s4
	v_sub_nc_u32_e32 v3, v4, v3
	v_add_nc_u32_e32 v4, 1, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v5, s4, v3
	v_cmp_le_u32_e32 vcc_lo, s4, v3
	v_dual_cndmask_b32 v3, v3, v5 :: v_dual_cndmask_b32 v0, v0, v4
	v_xor_b32_e32 v5, s3, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_le_u32_e32 vcc_lo, s4, v3
	v_add_nc_u32_e32 v4, 1, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v0, v0, v4, vcc_lo
	v_cmp_gt_i32_e32 vcc_lo, s6, v1
	v_xor_b32_e32 v0, v0, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v4, v0, v5
	v_mul_lo_u32 v3, v4, s5
	v_cmp_lt_i32_e64 s2, 0, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_and_b32 s2, s2, vcc_lo
	v_sub_nc_u32_e32 v0, v1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_max_i32_e32 v5, v4, v0
	v_cmp_lt_i32_e64 s3, 0, v0
	v_cmp_gt_i32_e64 s4, s7, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s3, s4, s3
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_2
; %bb.1:
	v_subrev_nc_u32_e32 v3, s5, v3
	s_load_b128 s[0:3], s[0:1], 0x0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v0, v3
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_lshl_add_u32 v5, s5, 1, v3
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v6, 31, v5
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s0, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v4, vcc_lo
	v_add_co_u32 v4, vcc_lo, s0, v5
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v6, vcc_lo
	v_add_co_u32 v6, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v1, vcc_lo
	s_clause 0x3
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	global_load_b32 v4, v[6:7], off offset:-4
	global_load_b32 v5, v[6:7], off offset:4
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	s_waitcnt vmcnt(2)
	v_add_f32_e32 v2, v2, v3
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v2, v2, v4
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v2, v2, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v2, 0x3e800000, v2
	global_store_b32 v[0:1], v2, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9temp_calcPfS_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z9temp_calcPfS_ii, .Lfunc_end0-_Z9temp_calcPfS_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 532
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9temp_calcPfS_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z9temp_calcPfS_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
