#include <stdio.h>
#include <stdlib.h>
#include <sys/time.h>

#ifndef N
#define N 1000000 // 1 << 20
#endif
#define ERROR 0.001
#ifndef THREADS
    #define THREADS 256
#endif
// The same code from lecture1 :)
double mysecond(){  
	struct timeval tp;  
	struct timezone tzp;  
	int i;  i = gettimeofday(&tp,&tzp);  
	return ( 
		(double) tp.tv_sec + (double) tp.tv_usec * 1.e-6 );}
	

void cpu_vector_add( float * x, float * y, int n, float A) {
    for(int i = 0; i < n; i++){
        y[i] = A*x[i] + y[i];
    }
}


__global__ void gpu_vector_add(float * __restrict__ x, float * __restrict__  y, int n, float A){
   
   // Each thread calculates its own index
   int i = blockIdx.x*blockDim.x + threadIdx.x;
   if (i < n) y[i] = A*x[i] + y[i];
	
}

int main(){
    float *a, *b, *cudaOut; 
    double t1, t2, t3, t4, t5, t6;  

    printf("Computing SAXPY with %d elements\n", N);

    // Allocate memory
    a   = (float*)malloc(sizeof(float) * N);
    b   = (float*)malloc(sizeof(float) * N);
    cudaOut = (float*)malloc(sizeof(float)*N);
    // Initialize array
    for(int i = 0; i < N; i++){
        a[i] = 1.0f; b[i] = 2.0f;
        cudaOut[i] = 2.0f;
    }
    // Allocate GPU memory
    float *aCuda, *bCuda;
    cudaMalloc((void **)&aCuda, sizeof(float)*N);
    cudaMalloc((void **)&bCuda, sizeof(float)*N); 



    t1 = mysecond();  
    // Copy data to GPU
    cudaMemcpy(aCuda, a, sizeof(float)*N, cudaMemcpyHostToDevice);
    cudaMemcpy(bCuda, b, sizeof(float)*N, cudaMemcpyHostToDevice);
    // Operating


    // Have a fixed number of threads
    int threads = THREADS;
    // Always an extra group in case of non multiple of threads N
    int groups = N/threads + 1; 
 
    t3 = mysecond();  
    gpu_vector_add<<<groups, threads>>>(aCuda, bCuda, N, 1.0); 
    t4 = mysecond(); 

    // Coying back
    cudaMemcpy(cudaOut, bCuda, sizeof(float)*N, cudaMemcpyDeviceToHost);
    t2 = mysecond();  
    printf("Computing SAXPY on the GPU in %fs (taking  into account memcpy), %fs (operational)... Done!\n", (t2 - t1), (t4 -t3));

    // Freeing cuda resources

    cudaFree(aCuda);
    cudaFree(bCuda);    

    t5 = mysecond();  
    cpu_vector_add(a, b, N, 1.0);
    t6 = mysecond();  
    printf("Computing SAXPY on the CPU in %fs… Done!\n", (t6 - t5));
   
    printf("Times: %f,%f,%f\n", (t2 -t1), (t4 - t3), (t6 - t5));

    for(int i = 0; i < N; i++){
        if(abs(b[i] - cudaOut[i]) > ERROR)
        {
            printf("Comparing the output for each implementation, it is incorrect at index %d, %f != %f\n",i,b[i], cudaOut[i]); 
            exit(1);
        }
    }

}

	.file	"tmpxft_002201e5_00000000-6_exercise_2.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2032:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2032:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z8mysecondv
	.type	_Z8mysecondv, @function
_Z8mysecondv:
.LFB2027:
	.cfi_startproc
	endbr64
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	%fs:40, %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %rsi
	leaq	8(%rsp), %rdi
	call	gettimeofday@PLT
	cvtsi2sdq	16(%rsp), %xmm0
	mulsd	.LC0(%rip), %xmm0
	cvtsi2sdq	8(%rsp), %xmm1
	addsd	%xmm1, %xmm0
	movq	24(%rsp), %rax
	subq	%fs:40, %rax
	je	.L3
	call	__stack_chk_fail@PLT
.L3:
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z8mysecondv, .-_Z8mysecondv
	.globl	_Z14cpu_vector_addPfS_if
	.type	_Z14cpu_vector_addPfS_if, @function
_Z14cpu_vector_addPfS_if:
.LFB2028:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
.L7:
	cmpl	%eax, %edx
	jle	.L9
	movss	(%rdi,%rax,4), %xmm1
	mulss	%xmm0, %xmm1
	addss	(%rsi,%rax,4), %xmm1
	movss	%xmm1, (%rsi,%rax,4)
	incq	%rax
	jmp	.L7
.L9:
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z14cpu_vector_addPfS_if, .-_Z14cpu_vector_addPfS_if
	.globl	_Z38__device_stub__Z14gpu_vector_addPfS_ifPfS_if
	.type	_Z38__device_stub__Z14gpu_vector_addPfS_ifPfS_if, @function
_Z38__device_stub__Z14gpu_vector_addPfS_ifPfS_if:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movl	%edx, 12(%rsp)
	leaq	48(%rsp), %rcx
	leaq	40(%rsp), %rdx
	movss	%xmm0, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rax, 104(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rsi, 32(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movl	$1, 64(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L10
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z14gpu_vector_addPfS_if(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L10:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L12
	call	__stack_chk_fail@PLT
.L12:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z38__device_stub__Z14gpu_vector_addPfS_ifPfS_if, .-_Z38__device_stub__Z14gpu_vector_addPfS_ifPfS_if
	.globl	_Z14gpu_vector_addPfS_if
	.type	_Z14gpu_vector_addPfS_if, @function
_Z14gpu_vector_addPfS_if:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z38__device_stub__Z14gpu_vector_addPfS_ifPfS_if
	.cfi_endproc
.LFE2055:
	.size	_Z14gpu_vector_addPfS_if, .-_Z14gpu_vector_addPfS_if
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"Computing SAXPY with %d elements\n"
.LC4:
	.string	"Computing SAXPY on the GPU in %fs (taking  into account memcpy), %fs (operational)... Done!\n"
.LC5:
	.string	"Computing SAXPY on the CPU in %fs\342\200\246 Done!\n"
.LC6:
	.string	"Times: %f,%f,%f\n"
.LC9:
	.string	"Comparing the output for each implementation, it is incorrect at index %d, %f != %f\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	$1000000, %edx
	movl	$2, %edi
	leaq	.LC1(%rip), %rsi
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$88, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$4000000, %edi
	call	malloc@PLT
	movl	$4000000, %edi
	movq	%rax, %r12
	call	malloc@PLT
	movl	$4000000, %edi
	movq	%rax, %rbx
	call	malloc@PLT
	movss	.LC3(%rip), %xmm0
	movq	%rax, %rbp
	xorl	%eax, %eax
.L16:
	movl	$0x3f800000, (%r12,%rax)
	movss	%xmm0, (%rbx,%rax)
	movss	%xmm0, 0(%rbp,%rax)
	addq	$4, %rax
	cmpq	$4000000, %rax
	jne	.L16
	leaq	32(%rsp), %rdi
	movl	$4000000, %esi
	call	cudaMalloc@PLT
	leaq	40(%rsp), %rdi
	movl	$4000000, %esi
	call	cudaMalloc@PLT
	call	_Z8mysecondv
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$4000000, %edx
	movsd	%xmm0, 8(%rsp)
	call	cudaMemcpy@PLT
	movq	40(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$4000000, %edx
	call	cudaMemcpy@PLT
	call	_Z8mysecondv
	movl	$16777217, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$8, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$4294971203, %rdi
	movsd	%xmm0, 16(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L17
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdi
	movl	$1000000, %edx
	movss	.LC2(%rip), %xmm0
	call	_Z38__device_stub__Z14gpu_vector_addPfS_ifPfS_if
.L17:
	call	_Z8mysecondv
	movq	40(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbp, %rdi
	movl	$4000000, %edx
	movsd	%xmm0, 24(%rsp)
	call	cudaMemcpy@PLT
	call	_Z8mysecondv
	movsd	24(%rsp), %xmm1
	subsd	8(%rsp), %xmm0
	movb	$2, %al
	subsd	16(%rsp), %xmm1
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	movq	%xmm0, %r14
	movsd	%xmm1, 16(%rsp)
	call	__printf_chk@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	call	_Z8mysecondv
	movl	$1000000, %edx
	movq	%rbx, %rsi
	movq	%r12, %rdi
	movsd	%xmm0, 8(%rsp)
	movss	.LC2(%rip), %xmm0
	call	_Z14cpu_vector_addPfS_if
	call	_Z8mysecondv
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	movaps	%xmm0, %xmm2
	subsd	8(%rsp), %xmm2
	movaps	%xmm2, %xmm0
	movsd	%xmm2, 8(%rsp)
	call	__printf_chk@PLT
	movsd	8(%rsp), %xmm2
	movb	$3, %al
	movsd	16(%rsp), %xmm1
	movq	%r14, %xmm0
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	movsd	.LC8(%rip), %xmm4
	xorl	%edx, %edx
	movss	.LC7(%rip), %xmm3
.L20:
	movss	(%rbx,%rdx,4), %xmm0
	movss	0(%rbp,%rdx,4), %xmm1
	movaps	%xmm0, %xmm2
	subss	%xmm1, %xmm2
	andps	%xmm3, %xmm2
	cvtss2sd	%xmm2, %xmm2
	comisd	%xmm4, %xmm2
	jbe	.L25
	movl	$2, %edi
	movb	$2, %al
	cvtss2sd	%xmm0, %xmm0
	cvtss2sd	%xmm1, %xmm1
	leaq	.LC9(%rip), %rsi
	call	__printf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L25:
	incq	%rdx
	cmpq	$1000000, %rdx
	jne	.L20
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L21
	call	__stack_chk_fail@PLT
.L21:
	addq	$88, %rsp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	main, .-main
	.section	.rodata.str1.1
.LC10:
	.string	"_Z14gpu_vector_addPfS_if"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2057:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC10(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z14gpu_vector_addPfS_if(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2057:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC0:
	.long	-1598689907
	.long	1051772663
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC2:
	.long	1065353216
	.align 4
.LC3:
	.long	1073741824
	.section	.rodata.cst16,"aM",@progbits,16
	.align 16
.LC7:
	.long	2147483647
	.long	0
	.long	0
	.long	0
	.section	.rodata.cst8
	.align 8
.LC8:
	.long	-755914244
	.long	1062232653
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <sys/time.h>

#ifndef N
#define N 1000000 // 1 << 20
#endif
#define ERROR 0.001
#ifndef THREADS
    #define THREADS 256
#endif
// The same code from lecture1 :)
double mysecond(){  
	struct timeval tp;  
	struct timezone tzp;  
	int i;  i = gettimeofday(&tp,&tzp);  
	return ( 
		(double) tp.tv_sec + (double) tp.tv_usec * 1.e-6 );}
	

void cpu_vector_add( float * x, float * y, int n, float A) {
    for(int i = 0; i < n; i++){
        y[i] = A*x[i] + y[i];
    }
}


__global__ void gpu_vector_add(float * __restrict__ x, float * __restrict__  y, int n, float A){
   
   // Each thread calculates its own index
   int i = blockIdx.x*blockDim.x + threadIdx.x;
   if (i < n) y[i] = A*x[i] + y[i];
	
}

int main(){
    float *a, *b, *cudaOut; 
    double t1, t2, t3, t4, t5, t6;  

    printf("Computing SAXPY with %d elements\n", N);

    // Allocate memory
    a   = (float*)malloc(sizeof(float) * N);
    b   = (float*)malloc(sizeof(float) * N);
    cudaOut = (float*)malloc(sizeof(float)*N);
    // Initialize array
    for(int i = 0; i < N; i++){
        a[i] = 1.0f; b[i] = 2.0f;
        cudaOut[i] = 2.0f;
    }
    // Allocate GPU memory
    float *aCuda, *bCuda;
    hipMalloc((void **)&aCuda, sizeof(float)*N);
    hipMalloc((void **)&bCuda, sizeof(float)*N); 



    t1 = mysecond();  
    // Copy data to GPU
    hipMemcpy(aCuda, a, sizeof(float)*N, hipMemcpyHostToDevice);
    hipMemcpy(bCuda, b, sizeof(float)*N, hipMemcpyHostToDevice);
    // Operating


    // Have a fixed number of threads
    int threads = THREADS;
    // Always an extra group in case of non multiple of threads N
    int groups = N/threads + 1; 
 
    t3 = mysecond();  
    gpu_vector_add<<<groups, threads>>>(aCuda, bCuda, N, 1.0); 
    t4 = mysecond(); 

    // Coying back
    hipMemcpy(cudaOut, bCuda, sizeof(float)*N, hipMemcpyDeviceToHost);
    t2 = mysecond();  
    printf("Computing SAXPY on the GPU in %fs (taking  into account memcpy), %fs (operational)... Done!\n", (t2 - t1), (t4 -t3));

    // Freeing cuda resources

    hipFree(aCuda);
    hipFree(bCuda);    

    t5 = mysecond();  
    cpu_vector_add(a, b, N, 1.0);
    t6 = mysecond();  
    printf("Computing SAXPY on the CPU in %fs… Done!\n", (t6 - t5));
   
    printf("Times: %f,%f,%f\n", (t2 -t1), (t4 - t3), (t6 - t5));

    for(int i = 0; i < N; i++){
        if(abs(b[i] - cudaOut[i]) > ERROR)
        {
            printf("Comparing the output for each implementation, it is incorrect at index %d, %f != %f\n",i,b[i], cudaOut[i]); 
            exit(1);
        }
    }

}

	.text
	.file	"exercise_2.hip"
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z8mysecondv
.LCPI0_0:
	.quad	0x3eb0c6f7a0b5ed8d              # double 9.9999999999999995E-7
	.text
	.globl	_Z8mysecondv
	.type	_Z8mysecondv,@function
_Z8mysecondv:                           # @_Z8mysecondv
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	leaq	16(%rsp), %rbx
	leaq	8(%rsp), %rsi
	movq	%rbx, %rdi
	callq	gettimeofday
	cvtsi2sdq	(%rbx), %xmm1
	cvtsi2sdq	8(%rbx), %xmm0
	mulsd	.LCPI0_0(%rip), %xmm0
	addsd	%xmm1, %xmm0
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z8mysecondv, .Lfunc_end0-_Z8mysecondv
	.cfi_endproc
                                        # -- End function
	.globl	_Z14cpu_vector_addPfS_if        # -- Begin function _Z14cpu_vector_addPfS_if
	.type	_Z14cpu_vector_addPfS_if,@function
_Z14cpu_vector_addPfS_if:               # @_Z14cpu_vector_addPfS_if
	.cfi_startproc
# %bb.0:
	testl	%edx, %edx
	jle	.LBB1_3
# %bb.1:                                # %.lr.ph.preheader
	movl	%edx, %eax
	xorl	%ecx, %ecx
.LBB1_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movss	(%rdi,%rcx,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	mulss	%xmm0, %xmm1
	addss	(%rsi,%rcx,4), %xmm1
	movss	%xmm1, (%rsi,%rcx,4)
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB1_2
.LBB1_3:                                # %._crit_edge
	retq
.Lfunc_end1:
	.size	_Z14cpu_vector_addPfS_if, .Lfunc_end1-_Z14cpu_vector_addPfS_if
	.cfi_endproc
                                        # -- End function
	.globl	_Z29__device_stub__gpu_vector_addPfS_if # -- Begin function _Z29__device_stub__gpu_vector_addPfS_if
	.type	_Z29__device_stub__gpu_vector_addPfS_if,@function
_Z29__device_stub__gpu_vector_addPfS_if: # @_Z29__device_stub__gpu_vector_addPfS_if
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movss	%xmm0, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14gpu_vector_addPfS_if, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z29__device_stub__gpu_vector_addPfS_if, .Lfunc_end2-_Z29__device_stub__gpu_vector_addPfS_if
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI3_0:
	.quad	0x3eb0c6f7a0b5ed8d              # double 9.9999999999999995E-7
.LCPI3_3:
	.quad	0x3f50624dd2f1a9fc              # double 0.001
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0
.LCPI3_1:
	.long	0x3f800000                      # float 1
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0
.LCPI3_2:
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	xorl	%r12d, %r12d
	movl	$.L.str, %edi
	movl	$1000000, %esi                  # imm = 0xF4240
	xorl	%eax, %eax
	callq	printf
	movl	$4000000, %edi                  # imm = 0x3D0900
	callq	malloc
	movq	%rax, %r15
	movl	$4000000, %edi                  # imm = 0x3D0900
	callq	malloc
	movq	%rax, %rbx
	movl	$4000000, %edi                  # imm = 0x3D0900
	callq	malloc
	movq	%rax, %r14
	movl	$1073741824, %eax               # imm = 0x40000000
.LBB3_1:                                # =>This Inner Loop Header: Depth=1
	movl	$1065353216, (%r15,%r12,4)      # imm = 0x3F800000
	movl	%eax, (%rbx,%r12,4)
	movl	%eax, (%r14,%r12,4)
	incq	%r12
	cmpq	$1000000, %r12                  # imm = 0xF4240
	jne	.LBB3_1
# %bb.2:
	leaq	48(%rsp), %r13
	movl	$4000000, %esi                  # imm = 0x3D0900
	movq	%r13, %rdi
	callq	hipMalloc
	leaq	40(%rsp), %r12
	movl	$4000000, %esi                  # imm = 0x3D0900
	movq	%r12, %rdi
	callq	hipMalloc
	leaq	56(%rsp), %rbp
	leaq	8(%rsp), %rsi
	movq	%rbp, %rdi
	callq	gettimeofday
	cvtsi2sdq	(%rbp), %xmm0
	cvtsi2sdq	8(%rbp), %xmm1
	mulsd	.LCPI3_0(%rip), %xmm1
	addsd	%xmm0, %xmm1
	movsd	%xmm1, 32(%rsp)                 # 8-byte Spill
	movq	(%r13), %rdi
	movl	$4000000, %edx                  # imm = 0x3D0900
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r12), %rdi
	movl	$4000000, %edx                  # imm = 0x3D0900
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	56(%rsp), %r12
	leaq	8(%rsp), %rsi
	movq	%r12, %rdi
	callq	gettimeofday
	xorps	%xmm0, %xmm0
	cvtsi2sdq	(%r12), %xmm0
	xorps	%xmm1, %xmm1
	cvtsi2sdq	8(%r12), %xmm1
	mulsd	.LCPI3_0(%rip), %xmm1
	addsd	%xmm0, %xmm1
	movsd	%xmm1, 16(%rsp)                 # 8-byte Spill
	movabsq	$4294967552, %rdx               # imm = 0x100000100
	leaq	3651(%rdx), %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_4
# %bb.3:
	movq	48(%rsp), %rdi
	movq	40(%rsp), %rsi
	movss	.LCPI3_1(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	movl	$1000000, %edx                  # imm = 0xF4240
	callq	_Z29__device_stub__gpu_vector_addPfS_if
.LBB3_4:
	leaq	56(%rsp), %r12
	leaq	8(%rsp), %rsi
	movq	%r12, %rdi
	callq	gettimeofday
	xorps	%xmm0, %xmm0
	cvtsi2sdq	(%r12), %xmm0
	cvtsi2sdq	8(%r12), %xmm2
	movsd	.LCPI3_0(%rip), %xmm1           # xmm1 = mem[0],zero
	mulsd	%xmm1, %xmm2
	addsd	%xmm0, %xmm2
	subsd	16(%rsp), %xmm2                 # 8-byte Folded Reload
	movsd	%xmm2, 16(%rsp)                 # 8-byte Spill
	movq	40(%rsp), %rsi
	movl	$4000000, %edx                  # imm = 0x3D0900
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	leaq	56(%rsp), %r12
	leaq	8(%rsp), %rsi
	movq	%r12, %rdi
	callq	gettimeofday
	xorps	%xmm1, %xmm1
	cvtsi2sdq	(%r12), %xmm1
	xorps	%xmm0, %xmm0
	cvtsi2sdq	8(%r12), %xmm0
	mulsd	.LCPI3_0(%rip), %xmm0
	addsd	%xmm1, %xmm0
	subsd	32(%rsp), %xmm0                 # 8-byte Folded Reload
	movl	$.L.str.1, %edi
	movsd	%xmm0, 32(%rsp)                 # 8-byte Spill
	movsd	16(%rsp), %xmm1                 # 8-byte Reload
                                        # xmm1 = mem[0],zero
	movb	$2, %al
	callq	printf
	movq	48(%rsp), %rdi
	callq	hipFree
	movq	40(%rsp), %rdi
	callq	hipFree
	leaq	56(%rsp), %r12
	leaq	8(%rsp), %rsi
	movq	%r12, %rdi
	callq	gettimeofday
	movq	(%r12), %rax
	xorps	%xmm1, %xmm1
	cvtsi2sdq	8(%r12), %xmm1
	mulsd	.LCPI3_0(%rip), %xmm1
	xorl	%ecx, %ecx
.LBB3_5:                                # %.lr.ph.i
                                        # =>This Inner Loop Header: Depth=1
	movss	(%r15,%rcx,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	addss	(%rbx,%rcx,4), %xmm0
	movss	%xmm0, (%rbx,%rcx,4)
	incq	%rcx
	cmpq	$1000000, %rcx                  # imm = 0xF4240
	jne	.LBB3_5
# %bb.6:                                # %_Z14cpu_vector_addPfS_if.exit
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	addsd	%xmm0, %xmm1
	movsd	%xmm1, 24(%rsp)                 # 8-byte Spill
	leaq	56(%rsp), %r15
	leaq	8(%rsp), %rsi
	movq	%r15, %rdi
	callq	gettimeofday
	xorps	%xmm1, %xmm1
	cvtsi2sdq	(%r15), %xmm1
	xorps	%xmm0, %xmm0
	cvtsi2sdq	8(%r15), %xmm0
	mulsd	.LCPI3_0(%rip), %xmm0
	addsd	%xmm1, %xmm0
	subsd	24(%rsp), %xmm0                 # 8-byte Folded Reload
	movsd	%xmm0, 24(%rsp)                 # 8-byte Spill
	movl	$.L.str.2, %edi
	movb	$1, %al
	callq	printf
	movl	$.L.str.3, %edi
	movsd	32(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movsd	16(%rsp), %xmm1                 # 8-byte Reload
                                        # xmm1 = mem[0],zero
	movsd	24(%rsp), %xmm2                 # 8-byte Reload
                                        # xmm2 = mem[0],zero
	movb	$3, %al
	callq	printf
	xorl	%esi, %esi
	movaps	.LCPI3_2(%rip), %xmm0           # xmm0 = [NaN,NaN,NaN,NaN]
	movsd	.LCPI3_3(%rip), %xmm1           # xmm1 = mem[0],zero
.LBB3_7:                                # =>This Inner Loop Header: Depth=1
	movss	(%rbx,%rsi,4), %xmm2            # xmm2 = mem[0],zero,zero,zero
	movss	(%r14,%rsi,4), %xmm3            # xmm3 = mem[0],zero,zero,zero
	movaps	%xmm2, %xmm4
	subss	%xmm3, %xmm4
	andps	%xmm0, %xmm4
	cvtss2sd	%xmm4, %xmm4
	ucomisd	%xmm1, %xmm4
	ja	.LBB3_10
# %bb.8:                                #   in Loop: Header=BB3_7 Depth=1
	incq	%rsi
	cmpq	$1000000, %rsi                  # imm = 0xF4240
	jne	.LBB3_7
# %bb.9:
	xorl	%eax, %eax
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB3_10:
	.cfi_def_cfa_offset 128
	xorps	%xmm0, %xmm0
	cvtss2sd	%xmm2, %xmm0
	xorps	%xmm1, %xmm1
	cvtss2sd	%xmm3, %xmm1
	movl	$.L.str.4, %edi
                                        # kill: def $esi killed $esi killed $rsi
	movb	$2, %al
	callq	printf
	movl	$1, %edi
	callq	exit
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14gpu_vector_addPfS_if, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z14gpu_vector_addPfS_if,@object # @_Z14gpu_vector_addPfS_if
	.section	.rodata,"a",@progbits
	.globl	_Z14gpu_vector_addPfS_if
	.p2align	3, 0x0
_Z14gpu_vector_addPfS_if:
	.quad	_Z29__device_stub__gpu_vector_addPfS_if
	.size	_Z14gpu_vector_addPfS_if, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Computing SAXPY with %d elements\n"
	.size	.L.str, 34

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Computing SAXPY on the GPU in %fs (taking  into account memcpy), %fs (operational)... Done!\n"
	.size	.L.str.1, 93

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Computing SAXPY on the CPU in %fs\342\200\246 Done!\n"
	.size	.L.str.2, 44

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Times: %f,%f,%f\n"
	.size	.L.str.3, 17

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Comparing the output for each implementation, it is incorrect at index %d, %f != %f\n"
	.size	.L.str.4, 85

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z14gpu_vector_addPfS_if"
	.size	.L__unnamed_1, 25

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z29__device_stub__gpu_vector_addPfS_if
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z14gpu_vector_addPfS_if
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z14gpu_vector_addPfS_if ; -- Begin function _Z14gpu_vector_addPfS_if
	.globl	_Z14gpu_vector_addPfS_if
	.p2align	8
	.type	_Z14gpu_vector_addPfS_if,@function
_Z14gpu_vector_addPfS_if:               ; @_Z14gpu_vector_addPfS_if
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_cmp_gt_i32_e32 vcc_lo, s2, v1
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[0:1], off
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v3, s3, v2
	global_store_b32 v[0:1], v3, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14gpu_vector_addPfS_if
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z14gpu_vector_addPfS_if, .Lfunc_end0-_Z14gpu_vector_addPfS_if
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 156
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .actual_access:  read_only
        .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z14gpu_vector_addPfS_if
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z14gpu_vector_addPfS_if.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     4
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
