#define N 16
#include <stdio.h>

__global__ void matrixMult (int *a, int *b, int *c, int width);

int main() {
	int a[N][N], b[N][N], c[N][N];
	int *dev_a, *dev_b, *dev_c;

	// initialize matrices a and b with appropriate values
	for (int i = 0; i < N; ++i)
	 {
	 	for (int j = 0; j < N; ++j)
	 	{
	 		a[i][j] = rand() % 10;
	 		b[i][j] = rand() % 10;
	 	}
	 } 
	
	int size = N * N * sizeof(int);
	
	cudaMalloc((void **) &dev_a, size);
	cudaMalloc((void **) &dev_b, size);
	cudaMalloc((void **) &dev_c, size);
	
	cudaMemcpy(dev_a, a, size, cudaMemcpyHostToDevice);
	cudaMemcpy(dev_b, b, size, cudaMemcpyHostToDevice);
	
	dim3 dimGrid(1, 1);
	dim3 dimBlock(N, N);
	
	matrixMult<<<dimGrid, dimBlock>>>(dev_a, dev_b, dev_c, N);
	
	cudaMemcpy(c, dev_c, size, cudaMemcpyDeviceToHost);
	
	cudaFree(dev_a); cudaFree(dev_b); cudaFree(dev_c);

	int i, j;
	printf("a {\n");
	for (i = 0; i < N; i++) 
	{
		for (j = 0; j < N; ++j)
		{
			printf("\"[%2d][%2d]\" : %3d, ", i, j, a[i][j]);	
		}
	}
	printf("}\n");

	printf("b {\n");
	for (i = 0; i < N; i++) 
	{
		for (j = 0; j < N; ++j)
		{
			printf("\"[%2d][%2d]\" : %3d, ", i, j, b[i][j]);	
		}
	}
	printf("}\n");

	printf("c {\n");
	for (i = 0; i < N; i++) 
	{
		for (j = 0; j < N; ++j)
		{
			printf("\"[%2d][%2d]\" : %3d, ", i, j, c[i][j]);	
		}
	}
	printf("}\n");
}

__global__ void matrixMult (int *a, int *b, int *c, int width) {
	int k, sum = 0;
	
	int col = threadIdx.x + blockDim.x * blockIdx.x;
	int row = threadIdx.y + blockDim.y * blockIdx.y;
	
	if(col < width && row < width) {
 		for (k = 0; k < width; k++) {
			sum += a[row * width + k] * b[k * width + col];
			c[row * width + col] = sum;
 		}
	}
}
	.file	"tmpxft_0037be74_00000000-6_row_column.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z35__device_stub__Z10matrixMultPiS_S_iPiS_S_i
	.type	_Z35__device_stub__Z10matrixMultPiS_S_iPiS_S_i, @function
_Z35__device_stub__Z10matrixMultPiS_S_iPiS_S_i:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z10matrixMultPiS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z35__device_stub__Z10matrixMultPiS_S_iPiS_S_i, .-_Z35__device_stub__Z10matrixMultPiS_S_iPiS_S_i
	.globl	_Z10matrixMultPiS_S_i
	.type	_Z10matrixMultPiS_S_i, @function
_Z10matrixMultPiS_S_i:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z10matrixMultPiS_S_iPiS_S_i
	.cfi_endproc
.LFE2053:
	.size	_Z10matrixMultPiS_S_i, .-_Z10matrixMultPiS_S_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"a {\n"
.LC1:
	.string	"\"[%2d][%2d]\" : %3d, "
.LC2:
	.string	"}\n"
.LC3:
	.string	"b {\n"
.LC4:
	.string	"c {\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$3144, %rsp
	.cfi_def_cfa_offset 3200
	movq	%fs:40, %rax
	movq	%rax, 3128(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rbx
.L9:
	movq	%r13, %rbp
	movl	$16, %r15d
.L10:
	call	rand@PLT
	movl	$10, %r14d
	leaq	1080(%rsp), %r12
	cltd
	idivl	%r14d
	movl	%edx, 0(%rbp,%rbx)
	call	rand@PLT
	cltd
	idivl	%r14d
	movl	%edx, 1080(%rsp,%rbp)
	addq	$4, %rbp
	decl	%r15d
	jne	.L10
	addq	$64, %r13
	cmpq	$1024, %r13
	jne	.L9
	leaq	8(%rsp), %rdi
	movl	$1024, %esi
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$1024, %esi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$1024, %esi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$1024, %edx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$1024, %edx
	call	cudaMemcpy@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	movl	$1, %esi
	movabsq	$68719476752, %rdx
	movl	$1, 40(%rsp)
	movq	%rdi, 32(%rsp)
	movq	%rdx, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L12
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movl	$16, %ecx
	movq	8(%rsp), %rdi
	call	_Z35__device_stub__Z10matrixMultPiS_S_iPiS_S_i
.L12:
	movq	24(%rsp), %rsi
	leaq	2104(%rsp), %rbp
	movl	$2, %ecx
	xorl	%r15d, %r15d
	movl	$1024, %edx
	movq	%rbp, %rdi
	leaq	.LC1(%rip), %r13
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L13:
	xorl	%r14d, %r14d
.L14:
	movl	(%rbx,%r14,4), %r8d
	movl	%r14d, %ecx
	movl	%r15d, %edx
	movq	%r13, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%r14
	call	__printf_chk@PLT
	cmpq	$16, %r14
	jne	.L14
	incl	%r15d
	addq	$64, %rbx
	cmpl	$16, %r15d
	jne	.L13
	leaq	.LC2(%rip), %r14
	xorl	%eax, %eax
	movq	%r12, %rbx
	xorl	%r15d, %r15d
	movq	%r14, %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L16:
	xorl	%r12d, %r12d
.L17:
	movl	(%rbx,%r12,4), %r8d
	movl	%r12d, %ecx
	movl	%r15d, %edx
	movq	%r13, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%r12
	call	__printf_chk@PLT
	cmpq	$16, %r12
	jne	.L17
	incl	%r15d
	addq	$64, %rbx
	cmpl	$16, %r15d
	jne	.L16
	movq	%r14, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	movq	%rbp, %rbx
	call	__printf_chk@PLT
	movl	$2, %edi
	xorl	%eax, %eax
	xorl	%r12d, %r12d
	leaq	.LC4(%rip), %rsi
	call	__printf_chk@PLT
.L19:
	xorl	%ebp, %ebp
.L20:
	movl	(%rbx,%rbp,4), %r8d
	movl	%ebp, %ecx
	movl	%r12d, %edx
	movq	%r13, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%rbp
	call	__printf_chk@PLT
	cmpq	$16, %rbp
	jne	.L20
	incl	%r12d
	addq	$64, %rbx
	cmpl	$16, %r12d
	jne	.L19
	xorl	%eax, %eax
	movq	%r14, %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	3128(%rsp), %rax
	subq	%fs:40, %rax
	je	.L22
	call	__stack_chk_fail@PLT
.L22:
	addq	$3144, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC5:
	.string	"_Z10matrixMultPiS_S_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z10matrixMultPiS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#define N 16

#include <hip/hip_runtime.h>
#include <stdio.h>

__global__ void matrixMult (int *a, int *b, int *c, int width);

int main() {
	int a[N][N], b[N][N], c[N][N];
	int *dev_a, *dev_b, *dev_c;

	// initialize matrices a and b with appropriate values
	for (int i = 0; i < N; ++i)
	 {
	 	for (int j = 0; j < N; ++j)
	 	{
	 		a[i][j] = rand() % 10;
	 		b[i][j] = rand() % 10;
	 	}
	 } 
	
	int size = N * N * sizeof(int);
	
	hipMalloc((void **) &dev_a, size);
	hipMalloc((void **) &dev_b, size);
	hipMalloc((void **) &dev_c, size);
	
	hipMemcpy(dev_a, a, size, hipMemcpyHostToDevice);
	hipMemcpy(dev_b, b, size, hipMemcpyHostToDevice);
	
	dim3 dimGrid(1, 1);
	dim3 dimBlock(N, N);
	
	matrixMult<<<dimGrid, dimBlock>>>(dev_a, dev_b, dev_c, N);
	
	hipMemcpy(c, dev_c, size, hipMemcpyDeviceToHost);
	
	hipFree(dev_a); hipFree(dev_b); hipFree(dev_c);

	int i, j;
	printf("a {\n");
	for (i = 0; i < N; i++) 
	{
		for (j = 0; j < N; ++j)
		{
			printf("\"[%2d][%2d]\" : %3d, ", i, j, a[i][j]);	
		}
	}
	printf("}\n");

	printf("b {\n");
	for (i = 0; i < N; i++) 
	{
		for (j = 0; j < N; ++j)
		{
			printf("\"[%2d][%2d]\" : %3d, ", i, j, b[i][j]);	
		}
	}
	printf("}\n");

	printf("c {\n");
	for (i = 0; i < N; i++) 
	{
		for (j = 0; j < N; ++j)
		{
			printf("\"[%2d][%2d]\" : %3d, ", i, j, c[i][j]);	
		}
	}
	printf("}\n");
}

__global__ void matrixMult (int *a, int *b, int *c, int width) {
	int k, sum = 0;
	
	int col = threadIdx.x + blockDim.x * blockIdx.x;
	int row = threadIdx.y + blockDim.y * blockIdx.y;
	
	if(col < width && row < width) {
 		for (k = 0; k < width; k++) {
			sum += a[row * width + k] * b[k * width + col];
			c[row * width + col] = sum;
 		}
	}
}
	.text
	.file	"row_column.hip"
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$3104, %rsp                     # imm = 0xC20
	.cfi_def_cfa_offset 3152
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	1056(%rsp), %rbx
	leaq	32(%rsp), %r14
	xorl	%r15d, %r15d
.LBB0_1:                                # %.preheader59
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_2 Depth 2
	xorl	%r12d, %r12d
.LBB0_2:                                #   Parent Loop BB0_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	cltq
	imulq	$1717986919, %rax, %rcx         # imm = 0x66666667
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$34, %rcx
	addl	%edx, %ecx
	addl	%ecx, %ecx
	leal	(%rcx,%rcx,4), %ecx
	subl	%ecx, %eax
	movl	%eax, (%rbx,%r12,4)
	callq	rand
	cltq
	imulq	$1717986919, %rax, %rcx         # imm = 0x66666667
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$34, %rcx
	addl	%edx, %ecx
	addl	%ecx, %ecx
	leal	(%rcx,%rcx,4), %ecx
	subl	%ecx, %eax
	movl	%eax, (%r14,%r12,4)
	incq	%r12
	cmpq	$16, %r12
	jne	.LBB0_2
# %bb.3:                                #   in Loop: Header=BB0_1 Depth=1
	incq	%r15
	addq	$64, %rbx
	addq	$64, %r14
	cmpq	$16, %r15
	jne	.LBB0_1
# %bb.4:
	leaq	24(%rsp), %rbx
	movl	$1024, %esi                     # imm = 0x400
	movq	%rbx, %rdi
	callq	hipMalloc
	leaq	16(%rsp), %r14
	movl	$1024, %esi                     # imm = 0x400
	movq	%r14, %rdi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movl	$1024, %esi                     # imm = 0x400
	callq	hipMalloc
	movq	(%rbx), %rdi
	leaq	1056(%rsp), %r15
	movl	$1024, %edx                     # imm = 0x400
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r14), %rdi
	leaq	32(%rsp), %r14
	movl	$1024, %edx                     # imm = 0x400
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_6
# %bb.5:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	movl	$16, %ecx
	callq	_Z25__device_stub__matrixMultPiS_S_i
.LBB0_6:
	movq	8(%rsp), %rsi
	leaq	2080(%rsp), %rbx
	movl	$1024, %edx                     # imm = 0x400
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movl	$.Lstr, %edi
	callq	puts@PLT
	xorl	%r12d, %r12d
.LBB0_7:                                # %.preheader58
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_8 Depth 2
	xorl	%r13d, %r13d
.LBB0_8:                                #   Parent Loop BB0_7 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%r15,%r13,4), %ecx
	movl	$.L.str.1, %edi
	movl	%r12d, %esi
	movl	%r13d, %edx
	xorl	%eax, %eax
	callq	printf
	incq	%r13
	cmpq	$16, %r13
	jne	.LBB0_8
# %bb.9:                                #   in Loop: Header=BB0_7 Depth=1
	incq	%r12
	addq	$64, %r15
	cmpq	$16, %r12
	jne	.LBB0_7
# %bb.10:
	movl	$.Lstr.5, %edi
	callq	puts@PLT
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	xorl	%r15d, %r15d
.LBB0_11:                               # %.preheader57
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_12 Depth 2
	xorl	%r12d, %r12d
.LBB0_12:                               #   Parent Loop BB0_11 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%r14,%r12,4), %ecx
	movl	$.L.str.1, %edi
	movl	%r15d, %esi
	movl	%r12d, %edx
	xorl	%eax, %eax
	callq	printf
	incq	%r12
	cmpq	$16, %r12
	jne	.LBB0_12
# %bb.13:                               #   in Loop: Header=BB0_11 Depth=1
	incq	%r15
	addq	$64, %r14
	cmpq	$16, %r15
	jne	.LBB0_11
# %bb.14:
	movl	$.Lstr.5, %edi
	callq	puts@PLT
	movl	$.Lstr.4, %edi
	callq	puts@PLT
	xorl	%r14d, %r14d
.LBB0_15:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_16 Depth 2
	xorl	%r15d, %r15d
.LBB0_16:                               #   Parent Loop BB0_15 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%rbx,%r15,4), %ecx
	movl	$.L.str.1, %edi
	movl	%r14d, %esi
	movl	%r15d, %edx
	xorl	%eax, %eax
	callq	printf
	incq	%r15
	cmpq	$16, %r15
	jne	.LBB0_16
# %bb.17:                               #   in Loop: Header=BB0_15 Depth=1
	incq	%r14
	addq	$64, %rbx
	cmpq	$16, %r14
	jne	.LBB0_15
# %bb.18:
	movl	$.Lstr.5, %edi
	callq	puts@PLT
	xorl	%eax, %eax
	addq	$3104, %rsp                     # imm = 0xC20
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	main, .Lfunc_end0-main
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__matrixMultPiS_S_i # -- Begin function _Z25__device_stub__matrixMultPiS_S_i
	.type	_Z25__device_stub__matrixMultPiS_S_i,@function
_Z25__device_stub__matrixMultPiS_S_i:   # @_Z25__device_stub__matrixMultPiS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10matrixMultPiS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z25__device_stub__matrixMultPiS_S_i, .Lfunc_end1-_Z25__device_stub__matrixMultPiS_S_i
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10matrixMultPiS_S_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z10matrixMultPiS_S_i,@object   # @_Z10matrixMultPiS_S_i
	.section	.rodata,"a",@progbits
	.globl	_Z10matrixMultPiS_S_i
	.p2align	3, 0x0
_Z10matrixMultPiS_S_i:
	.quad	_Z25__device_stub__matrixMultPiS_S_i
	.size	_Z10matrixMultPiS_S_i, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"\"[%2d][%2d]\" : %3d, "
	.size	.L.str.1, 21

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z10matrixMultPiS_S_i"
	.size	.L__unnamed_1, 22

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"a {"
	.size	.Lstr, 4

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"b {"
	.size	.Lstr.2, 4

	.type	.Lstr.4,@object                 # @str.4
.Lstr.4:
	.asciz	"c {"
	.size	.Lstr.4, 4

	.type	.Lstr.5,@object                 # @str.5
.Lstr.5:
	.asciz	"}"
	.size	.Lstr.5, 2

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z25__device_stub__matrixMultPiS_S_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z10matrixMultPiS_S_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z10matrixMultPiS_S_i   ; -- Begin function _Z10matrixMultPiS_S_i
	.globl	_Z10matrixMultPiS_S_i
	.p2align	8
	.type	_Z10matrixMultPiS_S_i,@function
_Z10matrixMultPiS_S_i:                  ; @_Z10matrixMultPiS_S_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s3, s[0:1], 0x2c
	s_load_b32 s2, s[0:1], 0x18
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s4, s3, 16
	s_and_b32 s3, s3, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s3, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s4, v[3:4]
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max3_i32 v2, v0, v1, 0
	v_cmpx_gt_i32_e64 s2, v2
	s_cbranch_execz .LBB0_3
; %bb.1:                                ; %.lr.ph
	v_mul_lo_u32 v1, v1, s2
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v1, v0
	v_ashrrev_i32_e32 v2, 31, v1
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[5:6], 2, v[1:2]
	v_lshlrev_b64 v[7:8], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v2, vcc_lo, s4, v5
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v6, vcc_lo
	v_mov_b32_e32 v6, 0
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v4, vcc_lo, s0, v7
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v8, vcc_lo
	s_mov_b32 s0, s2
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v1, 31, v0
	s_add_i32 s0, s0, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s0, 0
	v_lshlrev_b64 v[7:8], 2, v[0:1]
	v_add_nc_u32_e32 v0, s2, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v7, vcc_lo, s6, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v8, vcc_lo
	global_load_b32 v1, v[2:3], off
	global_load_b32 v9, v[7:8], off
	v_add_co_u32 v2, vcc_lo, v2, 4
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[7:8], null, v9, v1, v[6:7]
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v6, v7
	global_store_b32 v[4:5], v7, off
	s_cbranch_scc1 .LBB0_2
.LBB0_3:                                ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10matrixMultPiS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z10matrixMultPiS_S_i, .Lfunc_end0-_Z10matrixMultPiS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 324
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10matrixMultPiS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z10matrixMultPiS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
