#include <cstdio>
#include <iostream>
#include <chrono>
#include <algorithm>
#include <cuda_runtime.h>
#include <device_launch_parameters.h>

__global__ void add_gpu(float *dx, float *dy)
{
  int id = blockIdx.x * blockDim.x + threadIdx.x;
  //int temp = dx[id] > 0 ? dx[id]: (-1)*dx[id]; 
  //dy[id] += temp;
  dy[id] += std::abs(dx[id]);
  //dy[id] += dx[id];
}

void add_cpu(int N, float *hx, float *hy)
{
  for(int i=0; i<N; i++){
    hy[i] += std::abs(hx[i]);
  }
}

int main()
{
  int N = 1 << 20;
  std::cout<<"N:"<<N<<std::endl;
  float *hx, *hy, *dx, *dy;
  hx = new float[N];
  hy = new float[N];
  cudaMalloc(&dx, N*sizeof(float));
  cudaMalloc(&dy, N*sizeof(float));

  for(int i = 0; i < N; i++){
    hx[i] = 1.0f;
    hy[i] = 2.0f;
  }
  
  cudaMemcpy(dx, hx, N*sizeof(float), cudaMemcpyHostToDevice);
  cudaMemcpy(dy, hy, N*sizeof(float), cudaMemcpyHostToDevice);

  // N can be divided by 256
  int threadNums = 256;
  int blockNums = (N + threadNums -1)/threadNums;

  std::chrono::time_point<std::chrono::system_clock> begin; 
  std::chrono::time_point<std::chrono::system_clock> end; 
  std::chrono::duration<double> elapsedTime;
  // call add_cpu
  begin = std::chrono::system_clock::now();
  add_cpu(N, hx, hy); 
  end = std::chrono::system_clock::now();
  elapsedTime = end - begin;
  printf("Call add_cpu, Time: %.6lfs\n", elapsedTime.count());

  // call add_gpu 
  begin = std::chrono::system_clock::now();
  add_gpu<<< blockNums, threadNums>>>(dx, dy);
  end = std::chrono::system_clock::now();
  elapsedTime = end - begin;
  printf("Call add_gpu, Time: %.6lfs\n", elapsedTime.count());

  // block 同步
  cudaDeviceSynchronize();
  
  cudaMemcpy(hy, dy, N*sizeof(float), cudaMemcpyDeviceToHost);

  float maxError = 0.0f;
  for (int i=0; i<N; i++){
    maxError = std::max(maxError, std::abs(hy[i] - 4.0f));
  }
  
  printf("Max error: %.6f\n", maxError);

  delete[] hx;
  delete[] hy;
  cudaFree(dx);
  cudaFree(dy);
  return 0; 
}

	.file	"tmpxft_00342208_00000000-6_main.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4000:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4000:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z7add_cpuiPfS_
	.type	_Z7add_cpuiPfS_, @function
_Z7add_cpuiPfS_:
.LFB3988:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
	movss	.LC0(%rip), %xmm1
.L3:
	cmpl	%eax, %edi
	jle	.L6
	movss	(%rsi,%rax,4), %xmm0
	andps	%xmm1, %xmm0
	addss	(%rdx,%rax,4), %xmm0
	movss	%xmm0, (%rdx,%rax,4)
	incq	%rax
	jmp	.L3
.L6:
	ret
	.cfi_endproc
.LFE3988:
	.size	_Z7add_cpuiPfS_, .-_Z7add_cpuiPfS_
	.globl	_Z28__device_stub__Z7add_gpuPfS_PfS_
	.type	_Z28__device_stub__Z7add_gpuPfS_PfS_, @function
_Z28__device_stub__Z7add_gpuPfS_PfS_:
.LFB4022:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L7
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z7add_gpuPfS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L7:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L9
	call	__stack_chk_fail@PLT
.L9:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4022:
	.size	_Z28__device_stub__Z7add_gpuPfS_PfS_, .-_Z28__device_stub__Z7add_gpuPfS_PfS_
	.globl	_Z7add_gpuPfS_
	.type	_Z7add_gpuPfS_, @function
_Z7add_gpuPfS_:
.LFB4023:
	.cfi_startproc
	endbr64
	jmp	_Z28__device_stub__Z7add_gpuPfS_PfS_
	.cfi_endproc
.LFE4023:
	.size	_Z7add_gpuPfS_, .-_Z7add_gpuPfS_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"N:"
.LC6:
	.string	"Call add_cpu, Time: %.6lfs\n"
.LC7:
	.string	"Call add_gpu, Time: %.6lfs\n"
.LC9:
	.string	"Max error: %.6f\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3989:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	leaq	.LC2(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$48, %rsp
	.cfi_def_cfa_offset 80
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$1048576, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movl	$4194304, %edi
	call	_Znam@PLT
	movl	$4194304, %edi
	movq	%rax, %rbp
	call	_Znam@PLT
	movq	%rsp, %rdi
	movl	$4194304, %esi
	movq	%rax, %rbx
	call	cudaMalloc@PLT
	leaq	8(%rsp), %rdi
	movl	$4194304, %esi
	call	cudaMalloc@PLT
	movss	.LC3(%rip), %xmm1
	movss	.LC4(%rip), %xmm0
	xorl	%eax, %eax
.L13:
	movss	%xmm1, 0(%rbp,%rax)
	movss	%xmm0, (%rbx,%rax)
	addq	$4, %rax
	cmpq	$4194304, %rax
	jne	.L13
	movq	(%rsp), %rdi
	movl	$1, %ecx
	movl	$4194304, %edx
	movq	%rbp, %rsi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$4194304, %edx
	call	cudaMemcpy@PLT
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	movq	%rbx, %rdx
	movq	%rbp, %rsi
	movl	$1048576, %edi
	movq	%rax, %r12
	call	_Z7add_cpuiPfS_
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	subq	%r12, %rax
	cvtsi2sdq	%rax, %xmm0
	movb	$1, %al
	divsd	.LC5(%rip), %xmm0
	call	__printf_chk@PLT
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	movl	$16777217, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1048577, %edi
	salq	$8, %rdx
	movl	$1, %ecx
	movq	%rax, %r12
	salq	$12, %rdi
	movl	$1, %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L14
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	call	_Z28__device_stub__Z7add_gpuPfS_PfS_
.L14:
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	subq	%r12, %rax
	cvtsi2sdq	%rax, %xmm0
	movb	$1, %al
	divsd	.LC5(%rip), %xmm0
	call	__printf_chk@PLT
	call	cudaDeviceSynchronize@PLT
	movq	8(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	movl	$4194304, %edx
	call	cudaMemcpy@PLT
	movss	.LC8(%rip), %xmm3
	xorl	%eax, %eax
	xorps	%xmm0, %xmm0
	movss	.LC0(%rip), %xmm2
.L17:
	movss	(%rbx,%rax,4), %xmm1
	incq	%rax
	subss	%xmm3, %xmm1
	andps	%xmm2, %xmm1
	maxss	%xmm0, %xmm1
	movaps	%xmm1, %xmm0
	cmpq	$1048576, %rax
	jne	.L17
	leaq	.LC9(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	%xmm1, %xmm0
	call	__printf_chk@PLT
	movq	%rbp, %rdi
	call	_ZdaPv@PLT
	movq	%rbx, %rdi
	call	_ZdaPv@PLT
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L18
	call	__stack_chk_fail@PLT
.L18:
	addq	$48, %rsp
	.cfi_def_cfa_offset 32
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3989:
	.size	main, .-main
	.section	.rodata.str1.1
.LC10:
	.string	"_Z7add_gpuPfS_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4025:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC10(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z7add_gpuPfS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4025:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst16,"aM",@progbits,16
	.align 16
.LC0:
	.long	2147483647
	.long	0
	.long	0
	.long	0
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC3:
	.long	1065353216
	.align 4
.LC4:
	.long	1073741824
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC5:
	.long	0
	.long	1104006501
	.section	.rodata.cst4
	.align 4
.LC8:
	.long	1082130432
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <cstdio>
#include <iostream>
#include <chrono>
#include <algorithm>
#include <hip/hip_runtime.h>


__global__ void add_gpu(float *dx, float *dy)
{
  int id = blockIdx.x * blockDim.x + threadIdx.x;
  //int temp = dx[id] > 0 ? dx[id]: (-1)*dx[id]; 
  //dy[id] += temp;
  dy[id] += std::abs(dx[id]);
  //dy[id] += dx[id];
}

void add_cpu(int N, float *hx, float *hy)
{
  for(int i=0; i<N; i++){
    hy[i] += std::abs(hx[i]);
  }
}

int main()
{
  int N = 1 << 20;
  std::cout<<"N:"<<N<<std::endl;
  float *hx, *hy, *dx, *dy;
  hx = new float[N];
  hy = new float[N];
  hipMalloc(&dx, N*sizeof(float));
  hipMalloc(&dy, N*sizeof(float));

  for(int i = 0; i < N; i++){
    hx[i] = 1.0f;
    hy[i] = 2.0f;
  }
  
  hipMemcpy(dx, hx, N*sizeof(float), hipMemcpyHostToDevice);
  hipMemcpy(dy, hy, N*sizeof(float), hipMemcpyHostToDevice);

  // N can be divided by 256
  int threadNums = 256;
  int blockNums = (N + threadNums -1)/threadNums;

  std::chrono::time_point<std::chrono::system_clock> begin; 
  std::chrono::time_point<std::chrono::system_clock> end; 
  std::chrono::duration<double> elapsedTime;
  // call add_cpu
  begin = std::chrono::system_clock::now();
  add_cpu(N, hx, hy); 
  end = std::chrono::system_clock::now();
  elapsedTime = end - begin;
  printf("Call add_cpu, Time: %.6lfs\n", elapsedTime.count());

  // call add_gpu 
  begin = std::chrono::system_clock::now();
  add_gpu<<< blockNums, threadNums>>>(dx, dy);
  end = std::chrono::system_clock::now();
  elapsedTime = end - begin;
  printf("Call add_gpu, Time: %.6lfs\n", elapsedTime.count());

  // block 同步
  hipDeviceSynchronize();
  
  hipMemcpy(hy, dy, N*sizeof(float), hipMemcpyDeviceToHost);

  float maxError = 0.0f;
  for (int i=0; i<N; i++){
    maxError = std::max(maxError, std::abs(hy[i] - 4.0f));
  }
  
  printf("Max error: %.6f\n", maxError);

  delete[] hx;
  delete[] hy;
  hipFree(dx);
  hipFree(dy);
  return 0; 
}

	.text
	.file	"main.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z22__device_stub__add_gpuPfS_  # -- Begin function _Z22__device_stub__add_gpuPfS_
	.type	_Z22__device_stub__add_gpuPfS_,@function
_Z22__device_stub__add_gpuPfS_:         # @_Z22__device_stub__add_gpuPfS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7add_gpuPfS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z22__device_stub__add_gpuPfS_, .Lfunc_end0-_Z22__device_stub__add_gpuPfS_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function _Z7add_cpuiPfS_
.LCPI1_0:
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.text
	.globl	_Z7add_cpuiPfS_
	.type	_Z7add_cpuiPfS_,@function
_Z7add_cpuiPfS_:                        # @_Z7add_cpuiPfS_
	.cfi_startproc
# %bb.0:
	testl	%edi, %edi
	jle	.LBB1_3
# %bb.1:                                # %.lr.ph.preheader
	movl	%edi, %eax
	xorl	%ecx, %ecx
	movaps	.LCPI1_0(%rip), %xmm0           # xmm0 = [NaN,NaN,NaN,NaN]
.LBB1_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movss	(%rsi,%rcx,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	andps	%xmm0, %xmm1
	addss	(%rdx,%rcx,4), %xmm1
	movss	%xmm1, (%rdx,%rcx,4)
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB1_2
.LBB1_3:                                # %._crit_edge
	retq
.Lfunc_end1:
	.size	_Z7add_cpuiPfS_, .Lfunc_end1-_Z7add_cpuiPfS_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function main
.LCPI2_0:
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI2_1:
	.quad	0x41cdcd6500000000              # double 1.0E+9
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0
.LCPI2_2:
	.long	0xc0800000                      # float -4
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$24, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$2, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$1048576, %esi                  # imm = 0x100000
	callq	_ZNSolsEi
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$4194304, %edi                  # imm = 0x400000
	callq	_Znam
	movq	%rax, %rbx
	movl	$4194304, %edi                  # imm = 0x400000
	callq	_Znam
	movq	%rax, %r14
	leaq	16(%rsp), %rdi
	movl	$4194304, %esi                  # imm = 0x400000
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movl	$4194304, %esi                  # imm = 0x400000
	callq	hipMalloc
	xorl	%eax, %eax
.LBB2_1:                                # =>This Inner Loop Header: Depth=1
	movl	$1065353216, (%rbx,%rax,4)      # imm = 0x3F800000
	movl	$1073741824, (%r14,%rax,4)      # imm = 0x40000000
	incq	%rax
	cmpq	$1048576, %rax                  # imm = 0x100000
	jne	.LBB2_1
# %bb.2:
	movq	16(%rsp), %rdi
	movl	$4194304, %edx                  # imm = 0x400000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	movl	$4194304, %edx                  # imm = 0x400000
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	xorl	%r12d, %r12d
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, %r15
.LBB2_3:                                # %.lr.ph.i
                                        # =>This Inner Loop Header: Depth=1
	movss	(%rbx,%r12,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	andps	.LCPI2_0(%rip), %xmm0
	addss	(%r14,%r12,4), %xmm0
	movss	%xmm0, (%r14,%r12,4)
	incq	%r12
	cmpq	$1048576, %r12                  # imm = 0x100000
	jne	.LBB2_3
# %bb.4:                                # %_Z7add_cpuiPfS_.exit
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	subq	%r15, %rax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI2_1(%rip), %xmm0
	movl	$.L.str.1, %edi
	movb	$1, %al
	callq	printf
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, %r15
	movabsq	$4294967552, %rdx               # imm = 0x100000100
	leaq	3840(%rdx), %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_6
# %bb.5:
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	callq	_Z22__device_stub__add_gpuPfS_
.LBB2_6:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	subq	%r15, %rax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI2_1(%rip), %xmm0
	movl	$.L.str.2, %edi
	movb	$1, %al
	callq	printf
	callq	hipDeviceSynchronize
	movq	8(%rsp), %rsi
	movl	$4194304, %edx                  # imm = 0x400000
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	xorpd	%xmm0, %xmm0
	xorl	%eax, %eax
	movss	.LCPI2_2(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	movaps	.LCPI2_0(%rip), %xmm3           # xmm3 = [NaN,NaN,NaN,NaN]
.LBB2_7:                                # =>This Inner Loop Header: Depth=1
	movapd	%xmm0, %xmm2
	movss	(%r14,%rax,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	addss	%xmm1, %xmm0
	andps	%xmm3, %xmm0
	maxss	%xmm2, %xmm0
	incq	%rax
	cmpq	$1048576, %rax                  # imm = 0x100000
	jne	.LBB2_7
# %bb.8:
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.3, %edi
	movb	$1, %al
	callq	printf
	movq	%rbx, %rdi
	callq	_ZdaPv
	movq	%r14, %rdi
	callq	_ZdaPv
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7add_gpuPfS_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z7add_gpuPfS_,@object          # @_Z7add_gpuPfS_
	.section	.rodata,"a",@progbits
	.globl	_Z7add_gpuPfS_
	.p2align	3, 0x0
_Z7add_gpuPfS_:
	.quad	_Z22__device_stub__add_gpuPfS_
	.size	_Z7add_gpuPfS_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"N:"
	.size	.L.str, 3

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Call add_cpu, Time: %.6lfs\n"
	.size	.L.str.1, 28

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Call add_gpu, Time: %.6lfs\n"
	.size	.L.str.2, 28

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Max error: %.6f\n"
	.size	.L.str.3, 17

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z7add_gpuPfS_"
	.size	.L__unnamed_1, 15

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z22__device_stub__add_gpuPfS_
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z7add_gpuPfS_
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z7add_gpuPfS_          ; -- Begin function _Z7add_gpuPfS_
	.globl	_Z7add_gpuPfS_
	.p2align	8
	.type	_Z7add_gpuPfS_,@function
_Z7add_gpuPfS_:                         ; @_Z7add_gpuPfS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x1c
	s_load_b128 s[0:3], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_add_co_u32 v2, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[0:1], off
	s_waitcnt vmcnt(0)
	v_add_f32_e64 v2, v3, |v2|
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7add_gpuPfS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z7add_gpuPfS_, .Lfunc_end0-_Z7add_gpuPfS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 136
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z7add_gpuPfS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z7add_gpuPfS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     4
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
