#include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include <stdio.h>
#include <stdlib.h>
#include <math.h>
#include <time.h>

// thread block size
#define BLOCKDIM 16

// threshold
#define TOLERANCE 0.01
float absf(float n);

__global__ void MatAdd(float *a, float *b, float *c, int N) {
	int i = blockIdx.x * blockDim.x + threadIdx.x;
	int j = blockIdx.y * blockDim.y + threadIdx.y;
	int index = i + j * N;
	if (i < N && j < N)
		c[index] = a[index] + b[index];
}
void MatAddHelper(float* pA, float* pB, float* pC, int N);

__global__ void MatAddRow(float *a, float *b, float *c, int N) {
	int i = blockIdx.x * blockDim.x + threadIdx.x;

	for (int j = 0; j < N; j++) {
		int index = i + j * N;
		if (i < N && j < N)
			c[index] = a[index] + b[index];
	}
}
void MatAddRowHelper(float* pA, float* pB, float* pC, int N);

__global__ void MatAddCol(float *a, float *b, float *c, int N) {
	int j = blockIdx.y * blockDim.y + threadIdx.y;

	for (int i = 0; i < N; i++) {
		int index = i + j * N;
		if (i < N && j < N)
			c[index] = a[index] + b[index];
	}
}
void MatAddColHelper(float* pA, float* pB, float* pC, int N);

typedef float myMat[];

void HostFunction(myMat* A, myMat* B, myMat* C, int N, void(*addHandler)(float*, float*, float*, int));

size_t dsize;

int main() {
	myMat *A, *B, *C;

	int Nsizes[5] = { 100, 200, 500, 1500, 5000 };
	for (int i = 0; i < 5; i++) {
		int N = Nsizes[i];
		dsize = N*N*sizeof(float);
		A = (myMat*)malloc(dsize);
		B = (myMat*)malloc(dsize);
		C = (myMat*)malloc(dsize);
		printf("N = %d\n", N);
		printf("SINGLE ELEMENT: \n");
		HostFunction(A, B, C, N, MatAddHelper);
		printf("ROW: \n");
		HostFunction(A, B, C, N, MatAddRowHelper);
		printf("COLUMN: \n");
		HostFunction(A, B, C, N, MatAddColHelper);
		printf("\n");
		free(A);
		free(B);
		free(C);
	}

	getc(stdin);

	return 0;
}

void HostFunction(myMat* A, myMat* B, myMat* C, int N, void (*addHandler)(float*, float*, float*, int)) {
	//Initialize matricies
	for (int i = 0; i < N; i++) {
		for (int j = 0; j < N; j++) {
			int index = i + j * N;
			(*A)[index] = 100 * (float)rand() / (float)RAND_MAX;
			(*B)[index] = 100 * (float)rand() / (float)RAND_MAX;
			(*C)[index] = 0.0f;
		}
	}

	//Pointer variables
	float *pA, *pB, *pC;

	//Allocate matrices in device memory
	cudaMalloc((void**)&pA, (N*N)*sizeof(float));
	cudaMalloc((void**)&pB, (N*N)*sizeof(float));
	cudaMalloc((void**)&pC, (N*N)*sizeof(float));

	//Copy matrices from host memory to device memory
	cudaMemcpy(pA, A, (N*N)*sizeof(float), cudaMemcpyHostToDevice);
	cudaMemcpy(pB, B, (N*N)*sizeof(float), cudaMemcpyHostToDevice);
	cudaMemcpy(pC, C, (N*N)*sizeof(float), cudaMemcpyHostToDevice);

	//KERNEL CALL
	float time = 0;
	cudaEvent_t start, end;
	cudaEventCreate(&start);
	cudaEventCreate(&end);
	cudaEventRecord(start);
	addHandler(pA, pB, pC, N);
	cudaEventRecord(end);
	cudaEventSynchronize(end);
	cudaEventElapsedTime(&time, start, end);
	cudaEventDestroy(start);
	cudaEventDestroy(end);
	printf("Kernal function time: %f\n", time);

	//Copy result from device memory to host memory
	cudaMemcpy(C, pC, (N*N)*sizeof(float), cudaMemcpyDeviceToHost);

	//Use the CPU to compute addition
	time = 0;
	cudaEventCreate(&start);
	cudaEventCreate(&end);
	cudaEventRecord(start);
	myMat *CTemp;
	CTemp = (myMat*)malloc(dsize);
	for (int i = 0; i < N; i++) {
		for (int j = 0; j < N; j++) {
			int index = i + j * N;
			(*CTemp)[index] = (*A)[index] + (*B)[index];
		}
	}
	cudaEventRecord(end);
	cudaEventSynchronize(end);
	cudaEventElapsedTime(&time, start, end);
	cudaEventDestroy(start);
	cudaEventDestroy(end);
	printf("CPU time: %f\n", time);


	//Check GPU computed against CPU computed
	int good = 1;
	int i, j;
	for (i = 0; i < N; i++) {
		for (j = 0; j < N; j++) {
			int index = i + j * N;
			float diff = (*CTemp)[index] - (*C)[index]; //Compute difference
			if (absf(diff) > TOLERANCE) {
				good = 0;
			}
		}
	}

	if (good == 1) {
		printf("TEST PASSED\n");
	} else {
		printf("TEST FAILED\n");
	}

	// free device memory
	cudaFree(pA);
	cudaFree(pB);
	cudaFree(pC);
}

void MatAddHelper(float* pA, float* pB, float* pC, int N) {
	dim3 threadsPerBlock(BLOCKDIM, BLOCKDIM);
	dim3 numBlocks((int)ceil(N / (float)threadsPerBlock.x), (int)ceil(N / (float)threadsPerBlock.y));
	MatAdd<<<numBlocks, threadsPerBlock>>>(pA, pB, pC, N);
}

void MatAddRowHelper(float* pA, float* pB, float* pC, int N) {
	dim3 threadsPerBlock(BLOCKDIM, BLOCKDIM);
	dim3 numBlocks((int)ceil(N / (float)threadsPerBlock.x), 1);
	MatAddRow<<<numBlocks, threadsPerBlock>>>(pA, pB, pC, N);
}

void MatAddColHelper(float* pA, float* pB, float* pC, int N) {
	dim3 threadsPerBlock(BLOCKDIM, BLOCKDIM);
	dim3 numBlocks(1, (int)ceil(N / (float)threadsPerBlock.y));
	MatAddCol<<<numBlocks, threadsPerBlock>>>(pA, pB, pC, N);
}

float absf(float n) {
	if (n < 0)
		return -n;
	return n;
}
	.file	"tmpxft_0034f3c9_00000000-6_kernel.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2035:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2035:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC3:
	.string	"Kernal function time: %f\n"
.LC4:
	.string	"CPU time: %f\n"
.LC7:
	.string	"TEST PASSED\n"
.LC8:
	.string	"TEST FAILED\n"
	.text
	.globl	_Z12HostFunctionPA_fS0_S0_iPFvPfS1_S1_iE
	.type	_Z12HostFunctionPA_fS0_S0_iPFvPfS1_S1_iE, @function
_Z12HostFunctionPA_fS0_S0_iPFvPfS1_S1_iE:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rsi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rdi, %r12
	movslq	%ecx, %rdi
	xorl	%ecx, %ecx
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	leaq	0(,%rdi,4), %r14
	movq	%rdx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdi, %rbx
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	movq	%r8, 16(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
.L3:
	cmpl	%ecx, %ebx
	jle	.L26
	leaq	0(,%rcx,4), %r15
	xorl	%esi, %esi
.L4:
	movq	%rcx, 24(%rsp)
	movq	%rdi, 8(%rsp)
	movq	%rsi, (%rsp)
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC0(%rip), %xmm0
	mulss	.LC1(%rip), %xmm0
	movss	%xmm0, (%r12,%r15)
	call	rand@PLT
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC0(%rip), %xmm0
	movq	24(%rsp), %rcx
	mulss	.LC1(%rip), %xmm0
	incq	%rsi
	movss	%xmm0, 0(%r13,%r15)
	movl	$0x00000000, 0(%rbp,%r15)
	addq	%r14, %r15
	cmpq	%rdi, %rsi
	jne	.L4
	incq	%rcx
	jmp	.L3
.L26:
	movl	%ebx, %eax
	leaq	48(%rsp), %rdi
	imull	%ebx, %eax
	cltq
	salq	$2, %rax
	movq	%rax, %r15
	movq	%rax, %rsi
	call	cudaMalloc@PLT
	movq	%r15, %rsi
	leaq	56(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	%r15, %rsi
	leaq	64(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	48(%rsp), %rdi
	movq	%r15, %rdx
	movq	%r12, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	56(%rsp), %rdi
	movq	%r15, %rdx
	movq	%r13, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	64(%rsp), %rdi
	movq	%r15, %rdx
	movq	%rbp, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	leaq	72(%rsp), %rax
	movl	$0x00000000, 44(%rsp)
	movq	%rax, %rdi
	movq	%rax, (%rsp)
	call	cudaEventCreate@PLT
	leaq	80(%rsp), %rax
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
	call	cudaEventCreate@PLT
	movq	72(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	%ebx, %ecx
	movq	64(%rsp), %rdx
	movq	56(%rsp), %rsi
	movq	48(%rsp), %rdi
	movq	16(%rsp), %rax
	call	*%rax
	movq	80(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	80(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	80(%rsp), %rdx
	movq	72(%rsp), %rsi
	leaq	44(%rsp), %rax
	movq	%rax, %rdi
	movq	%rax, 16(%rsp)
	call	cudaEventElapsedTime@PLT
	movq	72(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	80(%rsp), %rdi
	call	cudaEventDestroy@PLT
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	44(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	64(%rsp), %rsi
	movq	%r15, %rdx
	movl	$2, %ecx
	movq	%rbp, %rdi
	call	cudaMemcpy@PLT
	movq	(%rsp), %rdi
	movl	$0x00000000, 44(%rsp)
	call	cudaEventCreate@PLT
	movq	8(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	72(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	dsize(%rip), %rdi
	call	malloc@PLT
	xorl	%edx, %edx
	movq	%rax, %r15
.L6:
	cmpl	%edx, %ebx
	jle	.L27
	leaq	0(,%rdx,4), %rax
	xorl	%esi, %esi
.L7:
	movss	(%r12,%rax), %xmm0
	addss	0(%r13,%rax), %xmm0
	incl	%esi
	movss	%xmm0, (%r15,%rax)
	addq	%r14, %rax
	cmpl	%esi, %ebx
	jne	.L7
	incq	%rdx
	jmp	.L6
.L27:
	movq	80(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	80(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	80(%rsp), %rdx
	movq	72(%rsp), %rsi
	movq	16(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movq	72(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	80(%rsp), %rdi
	call	cudaEventDestroy@PLT
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	44(%rsp), %xmm0
	call	__printf_chk@PLT
	xorl	%edx, %edx
	movsd	.LC6(%rip), %xmm3
	movl	$1, %esi
	xorps	%xmm1, %xmm1
	movss	.LC5(%rip), %xmm2
	xorl	%r8d, %r8d
.L9:
	cmpl	%edx, %ebx
	jle	.L14
	leaq	0(,%rdx,4), %rax
	xorl	%edi, %edi
.L13:
	movss	(%r15,%rax), %xmm0
	subss	0(%rbp,%rax), %xmm0
	comiss	%xmm0, %xmm1
	jbe	.L10
	xorps	%xmm2, %xmm0
.L10:
	cvtss2sd	%xmm0, %xmm0
	ucomisd	%xmm3, %xmm0
	cmova	%r8d, %esi
	incl	%edi
	addq	%r14, %rax
	cmpl	%edi, %ebx
	jne	.L13
	incq	%rdx
	jmp	.L9
.L14:
	decl	%esi
	leaq	.LC7(%rip), %rsi
	je	.L24
	leaq	.LC8(%rip), %rsi
.L24:
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L17
	call	__stack_chk_fail@PLT
.L17:
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z12HostFunctionPA_fS0_S0_iPFvPfS1_S1_iE, .-_Z12HostFunctionPA_fS0_S0_iPFvPfS1_S1_iE
	.section	.rodata.str1.1
.LC9:
	.string	"N = %d\n"
.LC10:
	.string	"SINGLE ELEMENT: \n"
.LC11:
	.string	"ROW: \n"
.LC12:
	.string	"COLUMN: \n"
.LC13:
	.string	"\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	xorl	%r15d, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	leaq	.LC9(%rip), %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 24(%rsp)
	movabsq	$858993459300, %rax
	movl	$5000, 20(%rsp)
	movq	%rax, 4(%rsp)
	movabsq	$6442450944500, %rax
	movq	%rax, 12(%rsp)
.L29:
	movl	4(%rsp,%r15,4), %ebp
	incq	%r15
	movl	%ebp, %ebx
	imull	%ebp, %ebx
	movslq	%ebx, %rbx
	salq	$2, %rbx
	movq	%rbx, %rdi
	movq	%rbx, dsize(%rip)
	call	malloc@PLT
	movq	%rbx, %rdi
	movq	%rax, %r14
	call	malloc@PLT
	movq	%rbx, %rdi
	movq	%rax, %r13
	call	malloc@PLT
	movl	%ebp, %edx
	movq	%r12, %rsi
	movl	$2, %edi
	movq	%rax, %rbx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC10(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	%ebp, %ecx
	movq	%rbx, %rdx
	movq	%r13, %rsi
	leaq	_Z12MatAddHelperPfS_S_i(%rip), %r8
	movq	%r14, %rdi
	call	_Z12HostFunctionPA_fS0_S0_iPFvPfS1_S1_iE
	leaq	.LC11(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	%ebp, %ecx
	movq	%rbx, %rdx
	movq	%r13, %rsi
	leaq	_Z15MatAddRowHelperPfS_S_i(%rip), %r8
	movq	%r14, %rdi
	call	_Z12HostFunctionPA_fS0_S0_iPFvPfS1_S1_iE
	leaq	.LC12(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	%ebp, %ecx
	movq	%rbx, %rdx
	movq	%r13, %rsi
	leaq	_Z15MatAddColHelperPfS_S_i(%rip), %r8
	movq	%r14, %rdi
	call	_Z12HostFunctionPA_fS0_S0_iPFvPfS1_S1_iE
	leaq	.LC13(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%r14, %rdi
	call	free@PLT
	movq	%r13, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	cmpq	$5, %r15
	jne	.L29
	movq	stdin(%rip), %rdi
	call	getc@PLT
	movq	24(%rsp), %rax
	subq	%fs:40, %rax
	je	.L30
	call	__stack_chk_fail@PLT
.L30:
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.text
	.globl	_Z4absff
	.type	_Z4absff, @function
_Z4absff:
.LFB2032:
	.cfi_startproc
	endbr64
	xorps	%xmm1, %xmm1
	comiss	%xmm0, %xmm1
	jbe	.L34
	xorps	.LC5(%rip), %xmm0
.L34:
	ret
	.cfi_endproc
.LFE2032:
	.size	_Z4absff, .-_Z4absff
	.globl	_Z30__device_stub__Z6MatAddPfS_S_iPfS_S_i
	.type	_Z30__device_stub__Z6MatAddPfS_S_iPfS_S_i, @function
_Z30__device_stub__Z6MatAddPfS_S_iPfS_S_i:
.LFB2057:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L37
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z6MatAddPfS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L37:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L39
	call	__stack_chk_fail@PLT
.L39:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2057:
	.size	_Z30__device_stub__Z6MatAddPfS_S_iPfS_S_i, .-_Z30__device_stub__Z6MatAddPfS_S_iPfS_S_i
	.globl	_Z6MatAddPfS_S_i
	.type	_Z6MatAddPfS_S_i, @function
_Z6MatAddPfS_S_i:
.LFB2058:
	.cfi_startproc
	endbr64
	jmp	_Z30__device_stub__Z6MatAddPfS_S_iPfS_S_i
	.cfi_endproc
.LFE2058:
	.size	_Z6MatAddPfS_S_i, .-_Z6MatAddPfS_S_i
	.globl	_Z12MatAddHelperPfS_S_i
	.type	_Z12MatAddHelperPfS_S_i, @function
_Z12MatAddHelperPfS_S_i:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	cvtsi2ssl	%ecx, %xmm0
	movq	%rdx, %r13
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rsi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movl	%ecx, %ebx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	mulss	.LC14(%rip), %xmm0
	call	ceilf@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	cvttss2sil	%xmm0, %eax
	movl	$1, %esi
	movabsq	$68719476752, %rdx
	movl	%eax, 20(%rsp)
	movl	%eax, 24(%rsp)
	movq	20(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L42
	addq	$40, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	movl	%ebx, %ecx
	movq	%r13, %rdx
	movq	%r12, %rsi
	popq	%rbx
	.cfi_def_cfa_offset 32
	movq	%rbp, %rdi
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	_Z30__device_stub__Z6MatAddPfS_S_iPfS_S_i
.L42:
	.cfi_restore_state
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z12MatAddHelperPfS_S_i, .-_Z12MatAddHelperPfS_S_i
	.globl	_Z33__device_stub__Z9MatAddRowPfS_S_iPfS_S_i
	.type	_Z33__device_stub__Z9MatAddRowPfS_S_iPfS_S_i, @function
_Z33__device_stub__Z9MatAddRowPfS_S_iPfS_S_i:
.LFB2059:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L45
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z9MatAddRowPfS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L45:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L47
	call	__stack_chk_fail@PLT
.L47:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2059:
	.size	_Z33__device_stub__Z9MatAddRowPfS_S_iPfS_S_i, .-_Z33__device_stub__Z9MatAddRowPfS_S_iPfS_S_i
	.globl	_Z9MatAddRowPfS_S_i
	.type	_Z9MatAddRowPfS_S_i, @function
_Z9MatAddRowPfS_S_i:
.LFB2060:
	.cfi_startproc
	endbr64
	jmp	_Z33__device_stub__Z9MatAddRowPfS_S_iPfS_S_i
	.cfi_endproc
.LFE2060:
	.size	_Z9MatAddRowPfS_S_i, .-_Z9MatAddRowPfS_S_i
	.globl	_Z15MatAddRowHelperPfS_S_i
	.type	_Z15MatAddRowHelperPfS_S_i, @function
_Z15MatAddRowHelperPfS_S_i:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	cvtsi2ssl	%ecx, %xmm0
	movq	%rdx, %r13
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rsi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movl	%ecx, %ebx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	mulss	.LC14(%rip), %xmm0
	call	ceilf@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movabsq	$68719476752, %rdx
	cvttss2sil	%xmm0, %eax
	movl	%eax, 20(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 24(%rsp)
	movq	20(%rsp), %rdi
	movl	28(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L50
	addq	$40, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	movl	%ebx, %ecx
	movq	%r13, %rdx
	movq	%r12, %rsi
	popq	%rbx
	.cfi_def_cfa_offset 32
	movq	%rbp, %rdi
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	_Z33__device_stub__Z9MatAddRowPfS_S_iPfS_S_i
.L50:
	.cfi_restore_state
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2030:
	.size	_Z15MatAddRowHelperPfS_S_i, .-_Z15MatAddRowHelperPfS_S_i
	.globl	_Z33__device_stub__Z9MatAddColPfS_S_iPfS_S_i
	.type	_Z33__device_stub__Z9MatAddColPfS_S_iPfS_S_i, @function
_Z33__device_stub__Z9MatAddColPfS_S_iPfS_S_i:
.LFB2061:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L53
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z9MatAddColPfS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L53:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L55
	call	__stack_chk_fail@PLT
.L55:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2061:
	.size	_Z33__device_stub__Z9MatAddColPfS_S_iPfS_S_i, .-_Z33__device_stub__Z9MatAddColPfS_S_iPfS_S_i
	.globl	_Z9MatAddColPfS_S_i
	.type	_Z9MatAddColPfS_S_i, @function
_Z9MatAddColPfS_S_i:
.LFB2062:
	.cfi_startproc
	endbr64
	jmp	_Z33__device_stub__Z9MatAddColPfS_S_iPfS_S_i
	.cfi_endproc
.LFE2062:
	.size	_Z9MatAddColPfS_S_i, .-_Z9MatAddColPfS_S_i
	.globl	_Z15MatAddColHelperPfS_S_i
	.type	_Z15MatAddColHelperPfS_S_i, @function
_Z15MatAddColHelperPfS_S_i:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	cvtsi2ssl	%ecx, %xmm0
	movq	%rdx, %r13
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rsi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movl	%ecx, %ebx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	mulss	.LC14(%rip), %xmm0
	call	ceilf@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	cvttss2sil	%xmm0, %eax
	movl	$1, 20(%rsp)
	movl	$1, %esi
	movabsq	$68719476752, %rdx
	movl	%eax, 24(%rsp)
	movq	20(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L58
	addq	$40, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	movl	%ebx, %ecx
	movq	%r13, %rdx
	movq	%r12, %rsi
	popq	%rbx
	.cfi_def_cfa_offset 32
	movq	%rbp, %rdi
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	_Z33__device_stub__Z9MatAddColPfS_S_iPfS_S_i
.L58:
	.cfi_restore_state
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2031:
	.size	_Z15MatAddColHelperPfS_S_i, .-_Z15MatAddColHelperPfS_S_i
	.section	.rodata.str1.1
.LC15:
	.string	"_Z9MatAddColPfS_S_i"
.LC16:
	.string	"_Z9MatAddRowPfS_S_i"
.LC17:
	.string	"_Z6MatAddPfS_S_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2064:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC15(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z9MatAddColPfS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC16(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z9MatAddRowPfS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC17(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z6MatAddPfS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2064:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	dsize
	.bss
	.align 8
	.type	dsize, @object
	.size	dsize, 8
dsize:
	.zero	8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	1120403456
	.align 4
.LC1:
	.long	805306368
	.section	.rodata.cst16,"aM",@progbits,16
	.align 16
.LC5:
	.long	-2147483648
	.long	0
	.long	0
	.long	0
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC6:
	.long	1202590843
	.long	1065646817
	.section	.rodata.cst4
	.align 4
.LC14:
	.long	1031798784
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include "hip/hip_runtime.h"

#include <stdio.h>
#include <stdlib.h>
#include <math.h>
#include <time.h>

// thread block size
#define BLOCKDIM 16

// threshold
#define TOLERANCE 0.01
float absf(float n);

__global__ void MatAdd(float *a, float *b, float *c, int N) {
	int i = blockIdx.x * blockDim.x + threadIdx.x;
	int j = blockIdx.y * blockDim.y + threadIdx.y;
	int index = i + j * N;
	if (i < N && j < N)
		c[index] = a[index] + b[index];
}
void MatAddHelper(float* pA, float* pB, float* pC, int N);

__global__ void MatAddRow(float *a, float *b, float *c, int N) {
	int i = blockIdx.x * blockDim.x + threadIdx.x;

	for (int j = 0; j < N; j++) {
		int index = i + j * N;
		if (i < N && j < N)
			c[index] = a[index] + b[index];
	}
}
void MatAddRowHelper(float* pA, float* pB, float* pC, int N);

__global__ void MatAddCol(float *a, float *b, float *c, int N) {
	int j = blockIdx.y * blockDim.y + threadIdx.y;

	for (int i = 0; i < N; i++) {
		int index = i + j * N;
		if (i < N && j < N)
			c[index] = a[index] + b[index];
	}
}
void MatAddColHelper(float* pA, float* pB, float* pC, int N);

typedef float myMat[];

void HostFunction(myMat* A, myMat* B, myMat* C, int N, void(*addHandler)(float*, float*, float*, int));

size_t dsize;

int main() {
	myMat *A, *B, *C;

	int Nsizes[5] = { 100, 200, 500, 1500, 5000 };
	for (int i = 0; i < 5; i++) {
		int N = Nsizes[i];
		dsize = N*N*sizeof(float);
		A = (myMat*)malloc(dsize);
		B = (myMat*)malloc(dsize);
		C = (myMat*)malloc(dsize);
		printf("N = %d\n", N);
		printf("SINGLE ELEMENT: \n");
		HostFunction(A, B, C, N, MatAddHelper);
		printf("ROW: \n");
		HostFunction(A, B, C, N, MatAddRowHelper);
		printf("COLUMN: \n");
		HostFunction(A, B, C, N, MatAddColHelper);
		printf("\n");
		free(A);
		free(B);
		free(C);
	}

	getc(stdin);

	return 0;
}

void HostFunction(myMat* A, myMat* B, myMat* C, int N, void (*addHandler)(float*, float*, float*, int)) {
	//Initialize matricies
	for (int i = 0; i < N; i++) {
		for (int j = 0; j < N; j++) {
			int index = i + j * N;
			(*A)[index] = 100 * (float)rand() / (float)RAND_MAX;
			(*B)[index] = 100 * (float)rand() / (float)RAND_MAX;
			(*C)[index] = 0.0f;
		}
	}

	//Pointer variables
	float *pA, *pB, *pC;

	//Allocate matrices in device memory
	hipMalloc((void**)&pA, (N*N)*sizeof(float));
	hipMalloc((void**)&pB, (N*N)*sizeof(float));
	hipMalloc((void**)&pC, (N*N)*sizeof(float));

	//Copy matrices from host memory to device memory
	hipMemcpy(pA, A, (N*N)*sizeof(float), hipMemcpyHostToDevice);
	hipMemcpy(pB, B, (N*N)*sizeof(float), hipMemcpyHostToDevice);
	hipMemcpy(pC, C, (N*N)*sizeof(float), hipMemcpyHostToDevice);

	//KERNEL CALL
	float time = 0;
	hipEvent_t start, end;
	hipEventCreate(&start);
	hipEventCreate(&end);
	hipEventRecord(start);
	addHandler(pA, pB, pC, N);
	hipEventRecord(end);
	hipEventSynchronize(end);
	hipEventElapsedTime(&time, start, end);
	hipEventDestroy(start);
	hipEventDestroy(end);
	printf("Kernal function time: %f\n", time);

	//Copy result from device memory to host memory
	hipMemcpy(C, pC, (N*N)*sizeof(float), hipMemcpyDeviceToHost);

	//Use the CPU to compute addition
	time = 0;
	hipEventCreate(&start);
	hipEventCreate(&end);
	hipEventRecord(start);
	myMat *CTemp;
	CTemp = (myMat*)malloc(dsize);
	for (int i = 0; i < N; i++) {
		for (int j = 0; j < N; j++) {
			int index = i + j * N;
			(*CTemp)[index] = (*A)[index] + (*B)[index];
		}
	}
	hipEventRecord(end);
	hipEventSynchronize(end);
	hipEventElapsedTime(&time, start, end);
	hipEventDestroy(start);
	hipEventDestroy(end);
	printf("CPU time: %f\n", time);


	//Check GPU computed against CPU computed
	int good = 1;
	int i, j;
	for (i = 0; i < N; i++) {
		for (j = 0; j < N; j++) {
			int index = i + j * N;
			float diff = (*CTemp)[index] - (*C)[index]; //Compute difference
			if (absf(diff) > TOLERANCE) {
				good = 0;
			}
		}
	}

	if (good == 1) {
		printf("TEST PASSED\n");
	} else {
		printf("TEST FAILED\n");
	}

	// free device memory
	hipFree(pA);
	hipFree(pB);
	hipFree(pC);
}

void MatAddHelper(float* pA, float* pB, float* pC, int N) {
	dim3 threadsPerBlock(BLOCKDIM, BLOCKDIM);
	dim3 numBlocks((int)ceil(N / (float)threadsPerBlock.x), (int)ceil(N / (float)threadsPerBlock.y));
	MatAdd<<<numBlocks, threadsPerBlock>>>(pA, pB, pC, N);
}

void MatAddRowHelper(float* pA, float* pB, float* pC, int N) {
	dim3 threadsPerBlock(BLOCKDIM, BLOCKDIM);
	dim3 numBlocks((int)ceil(N / (float)threadsPerBlock.x), 1);
	MatAddRow<<<numBlocks, threadsPerBlock>>>(pA, pB, pC, N);
}

void MatAddColHelper(float* pA, float* pB, float* pC, int N) {
	dim3 threadsPerBlock(BLOCKDIM, BLOCKDIM);
	dim3 numBlocks(1, (int)ceil(N / (float)threadsPerBlock.y));
	MatAddCol<<<numBlocks, threadsPerBlock>>>(pA, pB, pC, N);
}

float absf(float n) {
	if (n < 0)
		return -n;
	return n;
}
	.text
	.file	"kernel.hip"
	.globl	_Z21__device_stub__MatAddPfS_S_i # -- Begin function _Z21__device_stub__MatAddPfS_S_i
	.type	_Z21__device_stub__MatAddPfS_S_i,@function
_Z21__device_stub__MatAddPfS_S_i:       # @_Z21__device_stub__MatAddPfS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6MatAddPfS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z21__device_stub__MatAddPfS_S_i, .Lfunc_end0-_Z21__device_stub__MatAddPfS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z24__device_stub__MatAddRowPfS_S_i # -- Begin function _Z24__device_stub__MatAddRowPfS_S_i
	.type	_Z24__device_stub__MatAddRowPfS_S_i,@function
_Z24__device_stub__MatAddRowPfS_S_i:    # @_Z24__device_stub__MatAddRowPfS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9MatAddRowPfS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z24__device_stub__MatAddRowPfS_S_i, .Lfunc_end1-_Z24__device_stub__MatAddRowPfS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z24__device_stub__MatAddColPfS_S_i # -- Begin function _Z24__device_stub__MatAddColPfS_S_i
	.type	_Z24__device_stub__MatAddColPfS_S_i,@function
_Z24__device_stub__MatAddColPfS_S_i:    # @_Z24__device_stub__MatAddColPfS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9MatAddColPfS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z24__device_stub__MatAddColPfS_S_i, .Lfunc_end2-_Z24__device_stub__MatAddColPfS_S_i
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function main
.LCPI3_0:
	.long	100                             # 0x64
	.long	200                             # 0xc8
	.long	500                             # 0x1f4
	.long	1500                            # 0x5dc
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movaps	.LCPI3_0(%rip), %xmm0           # xmm0 = [100,200,500,1500]
	movaps	%xmm0, (%rsp)
	movl	$5000, 16(%rsp)                 # imm = 0x1388
	xorl	%r13d, %r13d
.LBB3_1:                                # =>This Inner Loop Header: Depth=1
	movl	(%rsp,%r13,4), %ebx
	movl	%ebx, %r12d
	imull	%r12d, %r12d
	shlq	$2, %r12
	movq	%r12, dsize(%rip)
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, %r14
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, %r15
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, %r12
	movl	$.L.str, %edi
	movl	%ebx, %esi
	xorl	%eax, %eax
	callq	printf
	movl	$.Lstr, %edi
	callq	puts@PLT
	movl	$_Z12MatAddHelperPfS_S_i, %r8d
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movl	%ebx, %ecx
	callq	_Z12HostFunctionPA_fS0_S0_iPFvPfS1_S1_iE
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	movl	$_Z15MatAddRowHelperPfS_S_i, %r8d
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movl	%ebx, %ecx
	callq	_Z12HostFunctionPA_fS0_S0_iPFvPfS1_S1_iE
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	movl	$_Z15MatAddColHelperPfS_S_i, %r8d
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movl	%ebx, %ecx
	callq	_Z12HostFunctionPA_fS0_S0_iPFvPfS1_S1_iE
	movl	$10, %edi
	callq	putchar@PLT
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	movq	%r12, %rdi
	callq	free
	incq	%r13
	cmpq	$5, %r13
	jne	.LBB3_1
# %bb.2:
	movq	stdin(%rip), %rdi
	callq	getc
	xorl	%eax, %eax
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z12HostFunctionPA_fS0_S0_iPFvPfS1_S1_iE
.LCPI4_0:
	.long	0x42c80000                      # float 100
.LCPI4_1:
	.long	0x30000000                      # float 4.65661287E-10
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0
.LCPI4_2:
	.long	0x80000000                      # float -0
	.long	0x80000000                      # float -0
	.long	0x80000000                      # float -0
	.long	0x80000000                      # float -0
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI4_3:
	.quad	0x3f847ae147ae147b              # double 0.01
	.text
	.globl	_Z12HostFunctionPA_fS0_S0_iPFvPfS1_S1_iE
	.type	_Z12HostFunctionPA_fS0_S0_iPFvPfS1_S1_iE,@function
_Z12HostFunctionPA_fS0_S0_iPFvPfS1_S1_iE: # @_Z12HostFunctionPA_fS0_S0_iPFvPfS1_S1_iE
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r8, 80(%rsp)                   # 8-byte Spill
	movq	%rdx, 56(%rsp)                  # 8-byte Spill
	movq	%rsi, 48(%rsp)                  # 8-byte Spill
	movq	%rdi, 32(%rsp)                  # 8-byte Spill
	movl	%ecx, %r13d
	movl	%ecx, 4(%rsp)                   # 4-byte Spill
	testl	%ecx, %ecx
	jle	.LBB4_5
# %bb.1:                                # %.preheader74.lr.ph
	leaq	(,%r13,4), %r12
	xorl	%eax, %eax
	movq	32(%rsp), %r15                  # 8-byte Reload
	movq	48(%rsp), %r14                  # 8-byte Reload
	movq	56(%rsp), %rbx                  # 8-byte Reload
	movq	%r13, 88(%rsp)                  # 8-byte Spill
.LBB4_2:                                # %.lr.ph.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_3 Depth 2
	movq	%rax, 96(%rsp)                  # 8-byte Spill
	xorl	%ebp, %ebp
.LBB4_3:                                # %.lr.ph
                                        #   Parent Loop BB4_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI4_0(%rip), %xmm0
	mulss	.LCPI4_1(%rip), %xmm0
	movss	%xmm0, (%r15,%rbp)
	callq	rand
	movss	.LCPI4_0(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	%xmm1, %xmm0
	movss	.LCPI4_1(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	mulss	%xmm1, %xmm0
	movss	%xmm0, (%r14,%rbp)
	movl	$0, (%rbx,%rbp)
	addq	%r12, %rbp
	decq	%r13
	jne	.LBB4_3
# %bb.4:                                # %._crit_edge
                                        #   in Loop: Header=BB4_2 Depth=1
	movq	96(%rsp), %rax                  # 8-byte Reload
	incq	%rax
	addq	$4, %rbx
	addq	$4, %r14
	addq	$4, %r15
	movq	88(%rsp), %r13                  # 8-byte Reload
	cmpq	%r13, %rax
	jne	.LBB4_2
.LBB4_5:                                # %._crit_edge77
	movl	4(%rsp), %eax                   # 4-byte Reload
	movl	%eax, %r14d
	imull	%r14d, %r14d
	shlq	$2, %r14
	leaq	72(%rsp), %rdi
	movq	%rdi, %r15
	movq	%r14, %rsi
	callq	hipMalloc
	leaq	64(%rsp), %rdi
	movq	%rdi, %r12
	movq	%r14, %rsi
	callq	hipMalloc
	leaq	40(%rsp), %rdi
	movq	%rdi, %rbx
	movq	%r14, %rsi
	callq	hipMalloc
	movq	(%r15), %rdi
	movq	32(%rsp), %rsi                  # 8-byte Reload
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r12), %rdi
	movq	48(%rsp), %r15                  # 8-byte Reload
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbx), %rdi
	movq	56(%rsp), %rbx                  # 8-byte Reload
	movq	%rbx, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	xorl	%eax, %eax
	leaq	20(%rsp), %rcx
	movl	%eax, (%rcx)
	leaq	24(%rsp), %rbp
	movq	%rbp, %rdi
	callq	hipEventCreate
	leaq	8(%rsp), %rdi
	movq	%rdi, %r12
	callq	hipEventCreate
	movq	(%rbp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	leaq	72(%rsp), %rax
	movq	(%rax), %rdi
	leaq	64(%rsp), %rax
	movq	(%rax), %rsi
	leaq	40(%rsp), %rax
	movq	(%rax), %rdx
	movl	4(%rsp), %ecx                   # 4-byte Reload
	callq	*80(%rsp)                       # 8-byte Folded Reload
	movq	(%r12), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%r12), %rdi
	callq	hipEventSynchronize
	movq	(%rbp), %rsi
	movq	(%r12), %rdx
	movq	%r12, %rbp
	leaq	20(%rsp), %r12
	movq	%r12, %rdi
	callq	hipEventElapsedTime
	leaq	24(%rsp), %rax
	movq	(%rax), %rdi
	callq	hipEventDestroy
	movq	(%rbp), %rdi
	callq	hipEventDestroy
	cvtss2sd	(%r12), %xmm0
	movl	$.L.str.5, %edi
	movb	$1, %al
	callq	printf
	leaq	40(%rsp), %rax
	movq	(%rax), %rsi
	movq	%rbx, %rdi
	movq	%r14, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	xorl	%eax, %eax
	movl	%eax, (%r12)
	leaq	24(%rsp), %r14
	movq	%r14, %rdi
	callq	hipEventCreate
	leaq	8(%rsp), %rdi
	callq	hipEventCreate
	movq	(%r14), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	dsize(%rip), %rdi
	callq	malloc
	movq	32(%rsp), %rbp                  # 8-byte Reload
	movq	%rax, %r12
	movl	4(%rsp), %eax                   # 4-byte Reload
	testl	%eax, %eax
	jle	.LBB4_10
# %bb.6:                                # %.preheader73.lr.ph
	leaq	(,%r13,4), %rax
	xorl	%ecx, %ecx
	movq	%r12, %rdx
.LBB4_7:                                # %.lr.ph79.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_8 Depth 2
	movq	%r13, %rsi
	xorl	%edi, %edi
.LBB4_8:                                # %.lr.ph79
                                        #   Parent Loop BB4_7 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	(%rbp,%rdi), %xmm0              # xmm0 = mem[0],zero,zero,zero
	addss	(%r15,%rdi), %xmm0
	movss	%xmm0, (%rdx,%rdi)
	addq	%rax, %rdi
	decq	%rsi
	jne	.LBB4_8
# %bb.9:                                # %._crit_edge80
                                        #   in Loop: Header=BB4_7 Depth=1
	incq	%rcx
	addq	$4, %rdx
	addq	$4, %r15
	addq	$4, %rbp
	cmpq	%r13, %rcx
	jne	.LBB4_7
.LBB4_10:                               # %._crit_edge82
	movq	8(%rsp), %rdi
	xorl	%r15d, %r15d
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	8(%rsp), %rdi
	callq	hipEventSynchronize
	movq	24(%rsp), %rsi
	movq	8(%rsp), %rdx
	leaq	20(%rsp), %r14
	movq	%r14, %rdi
	callq	hipEventElapsedTime
	movq	24(%rsp), %rdi
	callq	hipEventDestroy
	movq	8(%rsp), %rdi
	callq	hipEventDestroy
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r14), %xmm0
	movl	$.L.str.6, %edi
	movb	$1, %al
	callq	printf
	cmpl	$0, 4(%rsp)                     # 4-byte Folded Reload
	jle	.LBB4_11
# %bb.12:                               # %.preheader.lr.ph
	leaq	(,%r13,4), %rcx
	movl	$1, %eax
	movaps	.LCPI4_2(%rip), %xmm0           # xmm0 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0]
	movsd	.LCPI4_3(%rip), %xmm1           # xmm1 = mem[0],zero
	xorl	%edx, %edx
.LBB4_13:                               # %.lr.ph85.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_14 Depth 2
	movq	%r13, %rsi
	xorl	%edi, %edi
.LBB4_14:                               # %.lr.ph85
                                        #   Parent Loop BB4_13 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	(%r12,%rdi), %xmm2              # xmm2 = mem[0],zero,zero,zero
	subss	(%rbx,%rdi), %xmm2
	movaps	%xmm2, %xmm3
	xorps	%xmm0, %xmm3
	maxss	%xmm2, %xmm3
	xorps	%xmm2, %xmm2
	cvtss2sd	%xmm3, %xmm2
	ucomisd	%xmm1, %xmm2
	cmoval	%r15d, %eax
	addq	%rcx, %rdi
	decq	%rsi
	jne	.LBB4_14
# %bb.15:                               # %._crit_edge86
                                        #   in Loop: Header=BB4_13 Depth=1
	incq	%rdx
	addq	$4, %rbx
	addq	$4, %r12
	cmpq	%r13, %rdx
	jne	.LBB4_13
# %bb.16:                               # %._crit_edge89
	cmpl	$1, %eax
	movl	$.Lstr.4, %eax
	movl	$.Lstr.3, %edi
	cmoveq	%rax, %rdi
	jmp	.LBB4_17
.LBB4_11:
	movl	$.Lstr.4, %edi
.LBB4_17:                               # %._crit_edge89.thread
	callq	puts@PLT
	movq	72(%rsp), %rdi
	callq	hipFree
	movq	64(%rsp), %rdi
	callq	hipFree
	movq	40(%rsp), %rdi
	callq	hipFree
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z12HostFunctionPA_fS0_S0_iPFvPfS1_S1_iE, .Lfunc_end4-_Z12HostFunctionPA_fS0_S0_iPFvPfS1_S1_iE
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z12MatAddHelperPfS_S_i
.LCPI5_0:
	.long	0x3d800000                      # float 0.0625
	.text
	.globl	_Z12MatAddHelperPfS_S_i
	.type	_Z12MatAddHelperPfS_S_i,@function
_Z12MatAddHelperPfS_S_i:                # @_Z12MatAddHelperPfS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%ecx, %ebx
	movq	%rdx, %r14
	cvtsi2ss	%ecx, %xmm0
	movq	%rsi, %r15
	movq	%rdi, %r12
	mulss	.LCPI5_0(%rip), %xmm0
	callq	ceilf@PLT
	cvttss2si	%xmm0, %eax
	movq	%rax, %rdi
	shlq	$32, %rdi
	orq	%rax, %rdi
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	je	.LBB5_2
# %bb.1:
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB5_2:
	.cfi_def_cfa_offset 48
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	%ebx, %ecx
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z21__device_stub__MatAddPfS_S_i # TAILCALL
.Lfunc_end5:
	.size	_Z12MatAddHelperPfS_S_i, .Lfunc_end5-_Z12MatAddHelperPfS_S_i
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z15MatAddRowHelperPfS_S_i
.LCPI6_0:
	.long	0x3d800000                      # float 0.0625
	.text
	.globl	_Z15MatAddRowHelperPfS_S_i
	.type	_Z15MatAddRowHelperPfS_S_i,@function
_Z15MatAddRowHelperPfS_S_i:             # @_Z15MatAddRowHelperPfS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%ecx, %ebx
	movq	%rdx, %r14
	cvtsi2ss	%ecx, %xmm0
	movq	%rsi, %r15
	movq	%rdi, %r12
	mulss	.LCPI6_0(%rip), %xmm0
	callq	ceilf@PLT
	cvttss2si	%xmm0, %edi
	btsq	$32, %rdi
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	je	.LBB6_2
# %bb.1:
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB6_2:
	.cfi_def_cfa_offset 48
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	%ebx, %ecx
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z24__device_stub__MatAddRowPfS_S_i # TAILCALL
.Lfunc_end6:
	.size	_Z15MatAddRowHelperPfS_S_i, .Lfunc_end6-_Z15MatAddRowHelperPfS_S_i
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z15MatAddColHelperPfS_S_i
.LCPI7_0:
	.long	0x3d800000                      # float 0.0625
	.text
	.globl	_Z15MatAddColHelperPfS_S_i
	.type	_Z15MatAddColHelperPfS_S_i,@function
_Z15MatAddColHelperPfS_S_i:             # @_Z15MatAddColHelperPfS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%ecx, %ebx
	movq	%rdx, %r14
	cvtsi2ss	%ecx, %xmm0
	movq	%rsi, %r15
	movq	%rdi, %r12
	mulss	.LCPI7_0(%rip), %xmm0
	callq	ceilf@PLT
	cvttss2si	%xmm0, %edi
	shlq	$32, %rdi
	orq	$1, %rdi
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	je	.LBB7_2
# %bb.1:
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB7_2:
	.cfi_def_cfa_offset 48
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	%ebx, %ecx
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z24__device_stub__MatAddColPfS_S_i # TAILCALL
.Lfunc_end7:
	.size	_Z15MatAddColHelperPfS_S_i, .Lfunc_end7-_Z15MatAddColHelperPfS_S_i
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function _Z4absff
.LCPI8_0:
	.long	0x80000000                      # float -0
	.long	0x80000000                      # float -0
	.long	0x80000000                      # float -0
	.long	0x80000000                      # float -0
	.text
	.globl	_Z4absff
	.type	_Z4absff,@function
_Z4absff:                               # @_Z4absff
	.cfi_startproc
# %bb.0:
	movaps	.LCPI8_0(%rip), %xmm1           # xmm1 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0]
	xorps	%xmm0, %xmm1
	maxss	%xmm0, %xmm1
	movaps	%xmm1, %xmm0
	retq
.Lfunc_end8:
	.size	_Z4absff, .Lfunc_end8-_Z4absff
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB9_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB9_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6MatAddPfS_S_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9MatAddRowPfS_S_i, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9MatAddColPfS_S_i, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end9:
	.size	__hip_module_ctor, .Lfunc_end9-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB10_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB10_2:
	retq
.Lfunc_end10:
	.size	__hip_module_dtor, .Lfunc_end10-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z6MatAddPfS_S_i,@object        # @_Z6MatAddPfS_S_i
	.section	.rodata,"a",@progbits
	.globl	_Z6MatAddPfS_S_i
	.p2align	3, 0x0
_Z6MatAddPfS_S_i:
	.quad	_Z21__device_stub__MatAddPfS_S_i
	.size	_Z6MatAddPfS_S_i, 8

	.type	_Z9MatAddRowPfS_S_i,@object     # @_Z9MatAddRowPfS_S_i
	.globl	_Z9MatAddRowPfS_S_i
	.p2align	3, 0x0
_Z9MatAddRowPfS_S_i:
	.quad	_Z24__device_stub__MatAddRowPfS_S_i
	.size	_Z9MatAddRowPfS_S_i, 8

	.type	_Z9MatAddColPfS_S_i,@object     # @_Z9MatAddColPfS_S_i
	.globl	_Z9MatAddColPfS_S_i
	.p2align	3, 0x0
_Z9MatAddColPfS_S_i:
	.quad	_Z24__device_stub__MatAddColPfS_S_i
	.size	_Z9MatAddColPfS_S_i, 8

	.type	dsize,@object                   # @dsize
	.bss
	.globl	dsize
	.p2align	3, 0x0
dsize:
	.quad	0                               # 0x0
	.size	dsize, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"N = %d\n"
	.size	.L.str, 8

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Kernal function time: %f\n"
	.size	.L.str.5, 26

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"CPU time: %f\n"
	.size	.L.str.6, 14

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z6MatAddPfS_S_i"
	.size	.L__unnamed_1, 17

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z9MatAddRowPfS_S_i"
	.size	.L__unnamed_2, 20

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z9MatAddColPfS_S_i"
	.size	.L__unnamed_3, 20

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"SINGLE ELEMENT: "
	.size	.Lstr, 17

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"ROW: "
	.size	.Lstr.1, 6

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"COLUMN: "
	.size	.Lstr.2, 9

	.type	.Lstr.3,@object                 # @str.3
.Lstr.3:
	.asciz	"TEST FAILED"
	.size	.Lstr.3, 12

	.type	.Lstr.4,@object                 # @str.4
.Lstr.4:
	.asciz	"TEST PASSED"
	.size	.Lstr.4, 12

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__MatAddPfS_S_i
	.addrsig_sym _Z24__device_stub__MatAddRowPfS_S_i
	.addrsig_sym _Z24__device_stub__MatAddColPfS_S_i
	.addrsig_sym _Z12MatAddHelperPfS_S_i
	.addrsig_sym _Z15MatAddRowHelperPfS_S_i
	.addrsig_sym _Z15MatAddColHelperPfS_S_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z6MatAddPfS_S_i
	.addrsig_sym _Z9MatAddRowPfS_S_i
	.addrsig_sym _Z9MatAddColPfS_S_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z6MatAddPfS_S_i        ; -- Begin function _Z6MatAddPfS_S_i
	.globl	_Z6MatAddPfS_S_i
	.p2align	8
	.type	_Z6MatAddPfS_S_i,@function
_Z6MatAddPfS_S_i:                       ; @_Z6MatAddPfS_S_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s3, s[0:1], 0x2c
	s_load_b32 s2, s[0:1], 0x18
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s4, s3, 16
	s_and_b32 s3, s3, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s3, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s4, v[3:4]
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_i32_e32 v2, v0, v1
	v_cmpx_gt_i32_e64 s2, v2
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_mad_u64_u32 v[2:3], null, v1, s2, v[0:1]
	s_load_b64 s[0:1], s[0:1], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v2, v2, v3
	global_store_b32 v[0:1], v2, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6MatAddPfS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z6MatAddPfS_S_i, .Lfunc_end0-_Z6MatAddPfS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 224
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z9MatAddRowPfS_S_i     ; -- Begin function _Z9MatAddRowPfS_S_i
	.globl	_Z9MatAddRowPfS_S_i
	.p2align	8
	.type	_Z9MatAddRowPfS_S_i,@function
_Z9MatAddRowPfS_S_i:                    ; @_Z9MatAddRowPfS_S_i
; %bb.0:
	s_load_b32 s8, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s8, 1
	s_cbranch_scc1 .LBB1_5
; %bb.1:                                ; %.lr.ph
	s_clause 0x2
	s_load_b32 s9, s[0:1], 0x2c
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x10
	s_mov_b32 s1, s8
	s_waitcnt lgkmcnt(0)
	s_and_b32 s0, s9, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s0, v[0:1]
	v_cmp_gt_i32_e32 vcc_lo, s8, v1
.LBB1_2:                                ; =>This Inner Loop Header: Depth=1
	s_and_saveexec_b32 s9, vcc_lo
	s_cbranch_execz .LBB1_4
; %bb.3:                                ;   in Loop: Header=BB1_2 Depth=1
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	v_add_co_u32 v4, s0, s4, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v5, s0, s5, v3, s0
	v_add_co_u32 v6, s0, s6, v2
	v_add_co_ci_u32_e64 v7, s0, s7, v3, s0
	v_add_co_u32 v2, s0, s2, v2
	global_load_b32 v0, v[4:5], off
	global_load_b32 v4, v[6:7], off
	v_add_co_ci_u32_e64 v3, s0, s3, v3, s0
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v0, v0, v4
	global_store_b32 v[2:3], v0, off
.LBB1_4:                                ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
	v_add_nc_u32_e32 v1, s8, v1
	s_add_i32 s1, s1, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc0 .LBB1_2
.LBB1_5:                                ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9MatAddRowPfS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z9MatAddRowPfS_S_i, .Lfunc_end1-_Z9MatAddRowPfS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 224
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z9MatAddColPfS_S_i     ; -- Begin function _Z9MatAddColPfS_S_i
	.globl	_Z9MatAddColPfS_S_i
	.p2align	8
	.type	_Z9MatAddColPfS_S_i,@function
_Z9MatAddColPfS_S_i:                    ; @_Z9MatAddColPfS_S_i
; %bb.0:
	s_load_b32 s8, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s8, 1
	s_cbranch_scc1 .LBB2_5
; %bb.1:                                ; %.lr.ph
	s_load_b32 s9, s[0:1], 0x2c
	v_bfe_u32 v0, v0, 10, 10
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s0, s9, 16
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s0, v[0:1]
	v_mul_lo_u32 v0, v1, s8
	v_cmp_gt_i32_e32 vcc_lo, s8, v1
.LBB2_2:                                ; =>This Inner Loop Header: Depth=1
	s_and_saveexec_b32 s1, vcc_lo
	s_cbranch_execz .LBB2_4
; %bb.3:                                ;   in Loop: Header=BB2_2 Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[1:2], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v3, s0, s4, v1
	v_add_co_ci_u32_e64 v4, s0, s5, v2, s0
	v_add_co_u32 v5, s0, s6, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v6, s0, s7, v2, s0
	v_add_co_u32 v1, s0, s2, v1
	global_load_b32 v3, v[3:4], off
	global_load_b32 v4, v[5:6], off
	v_add_co_ci_u32_e64 v2, s0, s3, v2, s0
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v3, v3, v4
	global_store_b32 v[1:2], v3, off
.LBB2_4:                                ;   in Loop: Header=BB2_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v0, 1, v0
	s_add_i32 s8, s8, -1
	s_cmp_eq_u32 s8, 0
	s_cbranch_scc0 .LBB2_2
.LBB2_5:                                ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9MatAddColPfS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z9MatAddColPfS_S_i, .Lfunc_end2-_Z9MatAddColPfS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 236
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6MatAddPfS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z6MatAddPfS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9MatAddRowPfS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z9MatAddRowPfS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9MatAddColPfS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z9MatAddColPfS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
