//MatAdd.cu
// author: Pan Yang
// date  : 2015-7-3

#include <stdio.h> 
#include <stdlib.h>
#include <time.h>

#define M 4 // height of matrix
#define N 5 // width of matrix
#define SIZE (M*N)
#define BLOCK_SIZE 16


// Kernel definition 
/*
__global__ void MatAdd_B(float A[m][m], float B[m][m], float C[m][m]) 
{ 
    int i = threadIdx.x; 
    int j = threadIdx.y; 
    
    if (i < m*m && j < m*m)
        C[i][j] = A[i][j] + B[i][j]; 
} 

*/
    
// Kernel definition 
__global__ void MatAdd(float *A, float *B, float *C)
{
    
    int i = blockIdx.y * blockDim.y + threadIdx.y;
    int j = blockIdx.x * blockDim.x + threadIdx.x;
    
    if (i < M && j < N)
        C[i*N + j] = A[i*N + j] + B[i*N + j];
}

int main() 
{ 
    // time for the whole process
    clock_t start, finish; 
    float time;
    start = clock(); 
    
    //----------------------------------1D implementation for 2D array--------------------------------------------------------
    // define a, b, c and alloc memory for them
    
    float *a, *b, *c;
    int i, j;
    
    a = (float *)malloc(SIZE * sizeof(float));
    b = (float *)malloc(SIZE * sizeof(float));
    c = (float *)malloc(SIZE * sizeof(float));
    
    for (i = 0; i < SIZE; ++i)
    {
        a[i] = rand() / (float)RAND_MAX;
        b[i] = rand() / (float)RAND_MAX;
    }
    
    float *d_a, *d_b, *d_c;
    cudaMalloc( (void**)&d_a, SIZE * sizeof(float));
    cudaMalloc( (void**)&d_b, SIZE * sizeof(float));
    cudaMalloc( (void**)&d_c, SIZE * sizeof(float));
    
    // copy data from host memory to device memory
    cudaMemcpy( d_a, a, SIZE * sizeof(int), cudaMemcpyHostToDevice );
    cudaMemcpy( d_b, b, SIZE * sizeof(int), cudaMemcpyHostToDevice );
    //cudaMemcpy( d_c, c, SIZE * sizeof(int), cudaMemcpyHostToDevice );

    // Kernel invocation with m*16*16 threads
    dim3 threadsPerBlock(BLOCK_SIZE, BLOCK_SIZE);
    dim3 blocksPerGrid((N + threadsPerBlock.x -1) / threadsPerBlock.x, (M + threadsPerBlock.y -1) / threadsPerBlock.y);
    MatAdd<<<blocksPerGrid, threadsPerBlock>>>(d_a, d_b, d_c); 

    // copy results form device memory to host memory
    cudaMemcpy( c, d_c, SIZE * sizeof(int), cudaMemcpyDeviceToHost );
    
    //--------------------------------end of 1D implementation for 2D array----------------------------------------------------
    
    
    for (i = 0; i < M; ++i)
    {
        for (j = 0; j < N; ++j)
            printf(" %9f ", a[i * N +j]);
        printf("...");
        printf("\n");
    }
    printf("--------------------------------------------------\n");
    for (i = 0; i < M; ++i)
    {
        for (j = 0; j < N; ++j)
            printf(" %9f ", b[i * N +j]);
        printf("...");
        printf("\n");
    }
    printf("--------------------------------------------------\n");
    for (i = 0; i < M; ++i)
    {
        for (j = 0; j < N; ++j)
            printf(" %9f ", c[i * N +j]);
        printf("...");
        printf("\n");
    }
    
    // free space
    free(a); 
    free(b); 
    free(c);
    
    cudaFree(d_a);
    cudaFree(d_b);
    cudaFree(d_c);
    
    finish = clock();  
    time = (float)(finish - start) / CLOCKS_PER_SEC;
    printf("calculation time = %fms\n", time);
    return 0;
}

	.file	"tmpxft_003b9b3b_00000000-6_MatAdd.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z29__device_stub__Z6MatAddPfS_S_PfS_S_
	.type	_Z29__device_stub__Z6MatAddPfS_S_PfS_S_, @function
_Z29__device_stub__Z6MatAddPfS_S_PfS_S_:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z6MatAddPfS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L2:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z29__device_stub__Z6MatAddPfS_S_PfS_S_, .-_Z29__device_stub__Z6MatAddPfS_S_PfS_S_
	.globl	_Z6MatAddPfS_S_
	.type	_Z6MatAddPfS_S_, @function
_Z6MatAddPfS_S_:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z29__device_stub__Z6MatAddPfS_S_PfS_S_
	.cfi_endproc
.LFE2053:
	.size	_Z6MatAddPfS_S_, .-_Z6MatAddPfS_S_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	" %9f "
.LC2:
	.string	"..."
.LC3:
	.string	"\n"
.LC4:
	.string	"--------------------------------------------------\n"
.LC6:
	.string	"calculation time = %fms\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	call	clock@PLT
	movl	$80, %edi
	movq	%rax, %r14
	call	malloc@PLT
	movl	$80, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	movl	$80, %edi
	movq	%rax, %rbx
	call	malloc@PLT
	movq	%rax, %r12
.L9:
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC0(%rip), %xmm0
	movss	%xmm0, 0(%rbp,%r13)
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC0(%rip), %xmm0
	movss	%xmm0, (%rbx,%r13)
	addq	$4, %r13
	cmpq	$80, %r13
	jne	.L9
	leaq	24(%rsp), %rdi
	movl	$80, %esi
	call	cudaMalloc@PLT
	leaq	32(%rsp), %rdi
	movl	$80, %esi
	call	cudaMalloc@PLT
	leaq	40(%rsp), %rdi
	movl	$80, %esi
	call	cudaMalloc@PLT
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$80, %edx
	call	cudaMemcpy@PLT
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$80, %edx
	call	cudaMemcpy@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movabsq	$68719476752, %rdx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L10
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdi
	call	_Z29__device_stub__Z6MatAddPfS_S_PfS_S_
.L10:
	movq	40(%rsp), %rsi
	movl	$2, %ecx
	movq	%r12, %rdi
	xorl	%r13d, %r13d
	movl	$80, %edx
	call	cudaMemcpy@PLT
.L11:
	imulq	$20, %r13, %r15
	leaq	0(%rbp,%r15), %rax
	xorl	%r15d, %r15d
	movq	%rax, 8(%rsp)
.L12:
	movq	8(%rsp), %rax
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	cvtss2sd	(%rax,%r15,4), %xmm0
	movb	$1, %al
	incq	%r15
	call	__printf_chk@PLT
	cmpq	$5, %r15
	jne	.L12
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%r13
	call	__printf_chk@PLT
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	cmpq	$4, %r13
	jne	.L11
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	xorl	%r13d, %r13d
	call	__printf_chk@PLT
.L14:
	imulq	$20, %r13, %r15
	leaq	(%rbx,%r15), %rax
	xorl	%r15d, %r15d
	movq	%rax, 8(%rsp)
.L15:
	movq	8(%rsp), %rax
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	cvtss2sd	(%rax,%r15,4), %xmm0
	movb	$1, %al
	incq	%r15
	call	__printf_chk@PLT
	cmpq	$5, %r15
	jne	.L15
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%r13
	call	__printf_chk@PLT
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	cmpq	$4, %r13
	jne	.L14
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	xorl	%r13d, %r13d
	call	__printf_chk@PLT
.L17:
	imulq	$20, %r13, %r15
	leaq	(%r12,%r15), %rax
	xorl	%r15d, %r15d
	movq	%rax, 8(%rsp)
.L18:
	movq	8(%rsp), %rax
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	cvtss2sd	(%rax,%r15,4), %xmm0
	movb	$1, %al
	incq	%r15
	call	__printf_chk@PLT
	cmpq	$5, %r15
	jne	.L18
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%r13
	call	__printf_chk@PLT
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	cmpq	$4, %r13
	jne	.L17
	movq	%rbp, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	call	clock@PLT
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	subq	%r14, %rax
	cvtsi2ssq	%rax, %xmm0
	movb	$1, %al
	divss	.LC5(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L20
	call	__stack_chk_fail@PLT
.L20:
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC7:
	.string	"_Z6MatAddPfS_S_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC7(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z6MatAddPfS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	805306368
	.align 4
.LC5:
	.long	1232348160
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

//MatAdd.cu
// author: Pan Yang
// date  : 2015-7-3


#include <hip/hip_runtime.h>
#include <stdio.h> 
#include <stdlib.h>
#include <time.h>

#define M 4 // height of matrix
#define N 5 // width of matrix
#define SIZE (M*N)
#define BLOCK_SIZE 16


// Kernel definition 
/*
__global__ void MatAdd_B(float A[m][m], float B[m][m], float C[m][m]) 
{ 
    int i = threadIdx.x; 
    int j = threadIdx.y; 
    
    if (i < m*m && j < m*m)
        C[i][j] = A[i][j] + B[i][j]; 
} 

*/
    
// Kernel definition 
__global__ void MatAdd(float *A, float *B, float *C)
{
    
    int i = blockIdx.y * blockDim.y + threadIdx.y;
    int j = blockIdx.x * blockDim.x + threadIdx.x;
    
    if (i < M && j < N)
        C[i*N + j] = A[i*N + j] + B[i*N + j];
}

int main() 
{ 
    // time for the whole process
    clock_t start, finish; 
    float time;
    start = clock(); 
    
    //----------------------------------1D implementation for 2D array--------------------------------------------------------
    // define a, b, c and alloc memory for them
    
    float *a, *b, *c;
    int i, j;
    
    a = (float *)malloc(SIZE * sizeof(float));
    b = (float *)malloc(SIZE * sizeof(float));
    c = (float *)malloc(SIZE * sizeof(float));
    
    for (i = 0; i < SIZE; ++i)
    {
        a[i] = rand() / (float)RAND_MAX;
        b[i] = rand() / (float)RAND_MAX;
    }
    
    float *d_a, *d_b, *d_c;
    hipMalloc( (void**)&d_a, SIZE * sizeof(float));
    hipMalloc( (void**)&d_b, SIZE * sizeof(float));
    hipMalloc( (void**)&d_c, SIZE * sizeof(float));
    
    // copy data from host memory to device memory
    hipMemcpy( d_a, a, SIZE * sizeof(int), hipMemcpyHostToDevice );
    hipMemcpy( d_b, b, SIZE * sizeof(int), hipMemcpyHostToDevice );
    //cudaMemcpy( d_c, c, SIZE * sizeof(int), cudaMemcpyHostToDevice );

    // Kernel invocation with m*16*16 threads
    dim3 threadsPerBlock(BLOCK_SIZE, BLOCK_SIZE);
    dim3 blocksPerGrid((N + threadsPerBlock.x -1) / threadsPerBlock.x, (M + threadsPerBlock.y -1) / threadsPerBlock.y);
    MatAdd<<<blocksPerGrid, threadsPerBlock>>>(d_a, d_b, d_c); 

    // copy results form device memory to host memory
    hipMemcpy( c, d_c, SIZE * sizeof(int), hipMemcpyDeviceToHost );
    
    //--------------------------------end of 1D implementation for 2D array----------------------------------------------------
    
    
    for (i = 0; i < M; ++i)
    {
        for (j = 0; j < N; ++j)
            printf(" %9f ", a[i * N +j]);
        printf("...");
        printf("\n");
    }
    printf("--------------------------------------------------\n");
    for (i = 0; i < M; ++i)
    {
        for (j = 0; j < N; ++j)
            printf(" %9f ", b[i * N +j]);
        printf("...");
        printf("\n");
    }
    printf("--------------------------------------------------\n");
    for (i = 0; i < M; ++i)
    {
        for (j = 0; j < N; ++j)
            printf(" %9f ", c[i * N +j]);
        printf("...");
        printf("\n");
    }
    
    // free space
    free(a); 
    free(b); 
    free(c);
    
    hipFree(d_a);
    hipFree(d_b);
    hipFree(d_c);
    
    finish = clock();  
    time = (float)(finish - start) / CLOCKS_PER_SEC;
    printf("calculation time = %fms\n", time);
    return 0;
}

	.text
	.file	"MatAdd.hip"
	.globl	_Z21__device_stub__MatAddPfS_S_ # -- Begin function _Z21__device_stub__MatAddPfS_S_
	.type	_Z21__device_stub__MatAddPfS_S_,@function
_Z21__device_stub__MatAddPfS_S_:        # @_Z21__device_stub__MatAddPfS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6MatAddPfS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z21__device_stub__MatAddPfS_S_, .Lfunc_end0-_Z21__device_stub__MatAddPfS_S_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI1_0:
	.long	0x30000000                      # float 4.65661287E-10
.LCPI1_1:
	.long	0x49742400                      # float 1.0E+6
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	callq	clock
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	movl	$80, %edi
	callq	malloc
	movq	%rax, %r14
	movl	$80, %edi
	callq	malloc
	movq	%rax, %r15
	movl	$80, %edi
	callq	malloc
	movq	%rax, %r12
	xorl	%r13d, %r13d
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	.LCPI1_0(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	mulss	%xmm1, %xmm0
	movss	%xmm0, (%r14,%r13,4)
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI1_0(%rip), %xmm0
	movss	%xmm0, (%r15,%r13,4)
	incq	%r13
	cmpq	$20, %r13
	jne	.LBB1_1
# %bb.2:
	leaq	24(%rsp), %r13
	movl	$80, %esi
	movq	%r13, %rdi
	callq	hipMalloc
	leaq	16(%rsp), %rbp
	movl	$80, %esi
	movq	%rbp, %rdi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movl	$80, %esi
	callq	hipMalloc
	movq	(%r13), %rdi
	movl	$80, %edx
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbp), %rdi
	movl	$80, %edx
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_4
# %bb.3:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	callq	_Z21__device_stub__MatAddPfS_S_
.LBB1_4:
	movq	8(%rsp), %rsi
	movl	$80, %edx
	movq	%r12, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	%r14, %r13
	xorl	%ebp, %ebp
.LBB1_5:                                # %.preheader50
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_6 Depth 2
	xorl	%ebx, %ebx
.LBB1_6:                                #   Parent Loop BB1_5 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r13,%rbx,4), %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	incq	%rbx
	cmpq	$5, %rbx
	jne	.LBB1_6
# %bb.7:                                #   in Loop: Header=BB1_5 Depth=1
	movl	$.L.str.1, %edi
	xorl	%eax, %eax
	callq	printf
	movl	$10, %edi
	callq	putchar@PLT
	incq	%rbp
	addq	$20, %r13
	cmpq	$4, %rbp
	jne	.LBB1_5
# %bb.8:
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	movq	%r15, %r13
	xorl	%ebp, %ebp
.LBB1_9:                                # %.preheader49
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_10 Depth 2
	xorl	%ebx, %ebx
.LBB1_10:                               #   Parent Loop BB1_9 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r13,%rbx,4), %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	incq	%rbx
	cmpq	$5, %rbx
	jne	.LBB1_10
# %bb.11:                               #   in Loop: Header=BB1_9 Depth=1
	movl	$.L.str.1, %edi
	xorl	%eax, %eax
	callq	printf
	movl	$10, %edi
	callq	putchar@PLT
	incq	%rbp
	addq	$20, %r13
	cmpq	$4, %rbp
	jne	.LBB1_9
# %bb.12:
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	movq	%r12, %r13
	xorl	%ebp, %ebp
.LBB1_13:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_14 Depth 2
	xorl	%ebx, %ebx
.LBB1_14:                               #   Parent Loop BB1_13 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r13,%rbx,4), %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	incq	%rbx
	cmpq	$5, %rbx
	jne	.LBB1_14
# %bb.15:                               #   in Loop: Header=BB1_13 Depth=1
	movl	$.L.str.1, %edi
	xorl	%eax, %eax
	callq	printf
	movl	$10, %edi
	callq	putchar@PLT
	incq	%rbp
	addq	$20, %r13
	cmpq	$4, %rbp
	jne	.LBB1_13
# %bb.16:
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	movq	%r12, %rdi
	callq	free
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	callq	clock
	subq	32(%rsp), %rax                  # 8-byte Folded Reload
	xorps	%xmm0, %xmm0
	cvtsi2ss	%rax, %xmm0
	divss	.LCPI1_1(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.4, %edi
	movb	$1, %al
	callq	printf
	xorl	%eax, %eax
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6MatAddPfS_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z6MatAddPfS_S_,@object         # @_Z6MatAddPfS_S_
	.section	.rodata,"a",@progbits
	.globl	_Z6MatAddPfS_S_
	.p2align	3, 0x0
_Z6MatAddPfS_S_:
	.quad	_Z21__device_stub__MatAddPfS_S_
	.size	_Z6MatAddPfS_S_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	" %9f "
	.size	.L.str, 6

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"..."
	.size	.L.str.1, 4

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"calculation time = %fms\n"
	.size	.L.str.4, 25

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z6MatAddPfS_S_"
	.size	.L__unnamed_1, 16

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr.1,@object                 # @str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr.1:
	.asciz	"--------------------------------------------------"
	.size	.Lstr.1, 51

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__MatAddPfS_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z6MatAddPfS_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z6MatAddPfS_S_         ; -- Begin function _Z6MatAddPfS_S_
	.globl	_Z6MatAddPfS_S_
	.p2align	8
	.type	_Z6MatAddPfS_S_,@function
_Z6MatAddPfS_S_:                        ; @_Z6MatAddPfS_S_
; %bb.0:
	s_load_b32 s2, s[0:1], 0x24
	v_bfe_u32 v2, v0, 10, 10
	v_and_b32_e32 v3, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[0:1], null, s15, s3, v[2:3]
	v_mad_u64_u32 v[1:2], null, s14, s2, v[3:4]
	v_cmp_gt_i32_e32 vcc_lo, 4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s2, 5, v1
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v0, 5, v[1:2]
	s_load_b64 s[0:1], s[0:1], 0x10
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v2, v2, v3
	global_store_b32 v[0:1], v2, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6MatAddPfS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z6MatAddPfS_S_, .Lfunc_end0-_Z6MatAddPfS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 224
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6MatAddPfS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z6MatAddPfS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
