#include <cuda.h>
#include <stdio.h>

#define N 16

// Tipo de los datos del algoritmo
typedef int data_t;

// Prototipos 
data_t  add(const data_t a, const data_t b) { return a + b; }
data_t  sub(const data_t a, const data_t b) { return a - b; }
void    init_matrix(data_t *M, const unsigned int size, data_t(*init_op)(const data_t, const data_t));
void    run_GPU(data_t* host_A, data_t* host_B, const unsigned int n_bytes);

__global__ void kernel_operations(data_t * A, data_t * B);

// Host function
int
main(int argc, char** argv)
{
  //const int N = (argc == 2) ? atoi(argv[1]) : 0;
  
  if (!N){
    printf("Parametros incorrectos. El programa se cierra\n");
    return -1;
  } 

  // En la CPU...
  // ...Aloca matrices
  const unsigned int n_bytes = sizeof(data_t)*N*N;
  data_t *host_A = (data_t*) malloc(n_bytes);
  data_t *host_B = (data_t*) malloc(n_bytes);

  // ...Inicializa matrices
  init_matrix(host_A, N, &add);
  init_matrix(host_B, N, &sub);

  run_GPU(host_A, host_B, n_bytes);

  free(host_A);
  free(host_B);

  return 0;
}

void 
run_GPU(data_t* host_A, data_t* host_B, const unsigned int n_bytes)
{
  data_t *gpu_A, *gpu_B;
  int i, j;
  // Aloca memoria en GPU
  cudaMalloc((void**)&gpu_A, n_bytes);
  cudaMalloc((void**)&gpu_B, n_bytes);

  host_A[0] = 1;
  // Copia los datos desde el host a la GPU
  cudaMemcpy(gpu_A, host_A, n_bytes, cudaMemcpyHostToDevice);
  cudaMemcpy(gpu_B, host_B, n_bytes, cudaMemcpyHostToDevice);

  // Configura el tamaño de los grids y los bloques
  dim3 dimGrid(16);   // one block per word  
  dim3 dimBlock(16); // one thread per character
  
  // Invoca al kernel
  kernel_operations<<< dimGrid, dimBlock >>>(gpu_A, gpu_B);

  // Recupera los resultados, guardandolos en el host
  cudaMemcpy(host_A, gpu_A, n_bytes, cudaMemcpyDeviceToHost);
  cudaMemcpy(host_B, gpu_B, n_bytes, cudaMemcpyDeviceToHost);
	for (i = 0; i < N; i++){
		for (j = 0; j < N; j++){
			printf("%8d ",host_A[i*N+j]);
		}
	printf("\n");
	}
  // Libera la memoria alocada en la GPU
  cudaFree(gpu_A);
  cudaFree(gpu_B);
}

// El kernel que ejecutara en cada hilo de la GPU
__global__ void kernel_operations(data_t *A, data_t *B){
	unsigned long int global_id = blockIdx.x * blockDim.x + threadIdx.x;
	A[global_id] = (A[global_id]-B[global_id])*(A[global_id]-B[global_id]);
	//A[global_id] = 2;
}

// Funcion para la inicializacion de las matrices
void 
init_matrix(data_t *M, const unsigned int size, data_t(*init_op)(const data_t, const data_t))
{
  unsigned int i,j;
  for (i=0; i<size; i++) {
    for (j=0; j<size; j++) {
      M[i*size + j] = (*init_op)(i,j);
    }
  }
}

	.file	"tmpxft_00308259_00000000-6_tp.cudafe1.cpp"
	.text
#APP

#NO_APP
	.globl	_Z3addii
	.type	_Z3addii, @function
_Z3addii:
.LFB2027:
	.cfi_startproc
	endbr64
	leal	(%rdi,%rsi), %eax
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z3addii, .-_Z3addii
	.globl	_Z3subii
	.type	_Z3subii, @function
_Z3subii:
.LFB2028:
	.cfi_startproc
	endbr64
	movl	%edi, %eax
	subl	%esi, %eax
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z3subii, .-_Z3subii
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2034:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2034:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z11init_matrixPijPFiiiE
	.type	_Z11init_matrixPijPFiiiE, @function
_Z11init_matrixPijPFiiiE:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	%esi, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rdi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%r15, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
.L5:
	cmpq	%r15, %rbp
	je	.L11
	movl	%ebp, 12(%rsp)
	xorl	%ebx, %ebx
.L6:
	leal	0(%r13,%rbx), %eax
	movq	%rdx, 16(%rsp)
	movl	%ebx, %esi
	movl	12(%rsp), %edi
	leaq	(%r14,%rax,4), %r8
	incq	%rbx
	movq	%r8, 24(%rsp)
	call	*%rdx
	movq	24(%rsp), %r8
	cmpq	%r15, %rbx
	movq	16(%rsp), %rdx
	movl	%eax, (%r8)
	jne	.L6
	incq	%rbp
	addl	%r12d, %r13d
	jmp	.L5
.L11:
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2031:
	.size	_Z11init_matrixPijPFiiiE, .-_Z11init_matrixPijPFiiiE
	.globl	_Z39__device_stub__Z17kernel_operationsPiS_PiS_
	.type	_Z39__device_stub__Z17kernel_operationsPiS_PiS_, @function
_Z39__device_stub__Z17kernel_operationsPiS_PiS_:
.LFB2056:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L12
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z17kernel_operationsPiS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L12:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L14
	call	__stack_chk_fail@PLT
.L14:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2056:
	.size	_Z39__device_stub__Z17kernel_operationsPiS_PiS_, .-_Z39__device_stub__Z17kernel_operationsPiS_PiS_
	.globl	_Z17kernel_operationsPiS_
	.type	_Z17kernel_operationsPiS_, @function
_Z17kernel_operationsPiS_:
.LFB2057:
	.cfi_startproc
	endbr64
	jmp	_Z39__device_stub__Z17kernel_operationsPiS_PiS_
	.cfi_endproc
.LFE2057:
	.size	_Z17kernel_operationsPiS_, .-_Z17kernel_operationsPiS_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"%8d "
.LC1:
	.string	"\n"
	.text
	.globl	_Z7run_GPUPiS_j
	.type	_Z7run_GPUPiS_j, @function
_Z7run_GPUPiS_j:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%rsi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movl	%edx, %ebx
	movq	%rbx, %rsi
	subq	$48, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %rdi
	call	cudaMalloc@PLT
	leaq	8(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	movq	(%rsp), %rdi
	movq	%rbx, %rdx
	movq	%rbp, %rsi
	movl	$1, 0(%rbp)
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdi
	movq	%rbx, %rdx
	movq	%r12, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	$268435457, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$4, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rdi, %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L18
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	call	_Z39__device_stub__Z17kernel_operationsPiS_PiS_
.L18:
	movq	(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdx
	movq	%rbp, %rdi
	leaq	.LC0(%rip), %r14
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rsi
	movq	%r12, %rdi
	movq	%rbx, %rdx
	movl	$2, %ecx
	xorl	%r12d, %r12d
	call	cudaMemcpy@PLT
.L19:
	movq	%r12, %r13
	xorl	%ebx, %ebx
	salq	$6, %r13
	addq	%rbp, %r13
.L20:
	movl	0(%r13,%rbx,4), %edx
	movq	%r14, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%rbx
	call	__printf_chk@PLT
	cmpq	$16, %rbx
	jne	.L20
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%r12
	call	__printf_chk@PLT
	cmpq	$16, %r12
	jne	.L19
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L22
	call	__stack_chk_fail@PLT
.L22:
	addq	$48, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2030:
	.size	_Z7run_GPUPiS_j, .-_Z7run_GPUPiS_j
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	$1024, %edi
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	pushq	%rax
	.cfi_def_cfa_offset 32
	call	malloc@PLT
	movl	$1024, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	movq	%rbp, %rdi
	movl	$16, %esi
	leaq	_Z3addii(%rip), %rdx
	movq	%rax, %rbx
	call	_Z11init_matrixPijPFiiiE
	movq	%rbx, %rdi
	movl	$16, %esi
	leaq	_Z3subii(%rip), %rdx
	call	_Z11init_matrixPijPFiiiE
	movl	$1024, %edx
	movq	%rbx, %rsi
	movq	%rbp, %rdi
	call	_Z7run_GPUPiS_j
	movq	%rbp, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	popq	%rdx
	.cfi_def_cfa_offset 24
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	main, .-main
	.section	.rodata.str1.1
.LC2:
	.string	"_Z17kernel_operationsPiS_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2059:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC2(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z17kernel_operationsPiS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2059:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <hip/hip_runtime.h>
#include <stdio.h>

#define N 16

// Tipo de los datos del algoritmo
typedef int data_t;

// Prototipos 
data_t  add(const data_t a, const data_t b) { return a + b; }
data_t  sub(const data_t a, const data_t b) { return a - b; }
void    init_matrix(data_t *M, const unsigned int size, data_t(*init_op)(const data_t, const data_t));
void    run_GPU(data_t* host_A, data_t* host_B, const unsigned int n_bytes);

__global__ void kernel_operations(data_t * A, data_t * B);

// Host function
int
main(int argc, char** argv)
{
  //const int N = (argc == 2) ? atoi(argv[1]) : 0;
  
  if (!N){
    printf("Parametros incorrectos. El programa se cierra\n");
    return -1;
  } 

  // En la CPU...
  // ...Aloca matrices
  const unsigned int n_bytes = sizeof(data_t)*N*N;
  data_t *host_A = (data_t*) malloc(n_bytes);
  data_t *host_B = (data_t*) malloc(n_bytes);

  // ...Inicializa matrices
  init_matrix(host_A, N, &add);
  init_matrix(host_B, N, &sub);

  run_GPU(host_A, host_B, n_bytes);

  free(host_A);
  free(host_B);

  return 0;
}

void 
run_GPU(data_t* host_A, data_t* host_B, const unsigned int n_bytes)
{
  data_t *gpu_A, *gpu_B;
  int i, j;
  // Aloca memoria en GPU
  hipMalloc((void**)&gpu_A, n_bytes);
  hipMalloc((void**)&gpu_B, n_bytes);

  host_A[0] = 1;
  // Copia los datos desde el host a la GPU
  hipMemcpy(gpu_A, host_A, n_bytes, hipMemcpyHostToDevice);
  hipMemcpy(gpu_B, host_B, n_bytes, hipMemcpyHostToDevice);

  // Configura el tamaño de los grids y los bloques
  dim3 dimGrid(16);   // one block per word  
  dim3 dimBlock(16); // one thread per character
  
  // Invoca al kernel
  kernel_operations<<< dimGrid, dimBlock >>>(gpu_A, gpu_B);

  // Recupera los resultados, guardandolos en el host
  hipMemcpy(host_A, gpu_A, n_bytes, hipMemcpyDeviceToHost);
  hipMemcpy(host_B, gpu_B, n_bytes, hipMemcpyDeviceToHost);
	for (i = 0; i < N; i++){
		for (j = 0; j < N; j++){
			printf("%8d ",host_A[i*N+j]);
		}
	printf("\n");
	}
  // Libera la memoria alocada en la GPU
  hipFree(gpu_A);
  hipFree(gpu_B);
}

// El kernel que ejecutara en cada hilo de la GPU
__global__ void kernel_operations(data_t *A, data_t *B){
	unsigned long int global_id = blockIdx.x * blockDim.x + threadIdx.x;
	A[global_id] = (A[global_id]-B[global_id])*(A[global_id]-B[global_id]);
	//A[global_id] = 2;
}

// Funcion para la inicializacion de las matrices
void 
init_matrix(data_t *M, const unsigned int size, data_t(*init_op)(const data_t, const data_t))
{
  unsigned int i,j;
  for (i=0; i<size; i++) {
    for (j=0; j<size; j++) {
      M[i*size + j] = (*init_op)(i,j);
    }
  }
}

	.text
	.file	"tp.hip"
	.globl	_Z3addii                        # -- Begin function _Z3addii
	.type	_Z3addii,@function
_Z3addii:                               # @_Z3addii
	.cfi_startproc
# %bb.0:
                                        # kill: def $esi killed $esi def $rsi
                                        # kill: def $edi killed $edi def $rdi
	leal	(%rdi,%rsi), %eax
	retq
.Lfunc_end0:
	.size	_Z3addii, .Lfunc_end0-_Z3addii
	.cfi_endproc
                                        # -- End function
	.globl	_Z3subii                        # -- Begin function _Z3subii
	.type	_Z3subii,@function
_Z3subii:                               # @_Z3subii
	.cfi_startproc
# %bb.0:
	movl	%edi, %eax
	subl	%esi, %eax
	retq
.Lfunc_end1:
	.size	_Z3subii, .Lfunc_end1-_Z3subii
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movl	$1024, %edi                     # imm = 0x400
	callq	malloc
	movq	%rax, %rbx
	movl	$1024, %edi                     # imm = 0x400
	callq	malloc
	movq	%rax, %r14
	xorl	%eax, %eax
	movq	%rbx, %rcx
.LBB2_1:                                # %.preheader.i
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_2 Depth 2
	xorl	%edx, %edx
.LBB2_2:                                #   Parent Loop BB2_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	leal	(%rax,%rdx), %esi
	movl	%esi, (%rcx,%rdx,4)
	incq	%rdx
	cmpq	$16, %rdx
	jne	.LBB2_2
# %bb.3:                                #   in Loop: Header=BB2_1 Depth=1
	incq	%rax
	addq	$64, %rcx
	cmpl	$16, %eax
	jne	.LBB2_1
# %bb.4:                                # %.preheader.i6.preheader
	xorl	%eax, %eax
	movq	%r14, %rcx
.LBB2_5:                                # %.preheader.i6
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_6 Depth 2
	movl	%eax, %edx
	xorl	%esi, %esi
.LBB2_6:                                #   Parent Loop BB2_5 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	%edx, (%rcx,%rsi,4)
	incq	%rsi
	decl	%edx
	cmpq	$16, %rsi
	jne	.LBB2_6
# %bb.7:                                #   in Loop: Header=BB2_5 Depth=1
	incl	%eax
	addq	$64, %rcx
	cmpl	$16, %eax
	jne	.LBB2_5
# %bb.8:                                # %_Z11init_matrixPijPFiiiE.exit12
	movq	%rbx, %rdi
	movq	%r14, %rsi
	movl	$1024, %edx                     # imm = 0x400
	callq	_Z7run_GPUPiS_j
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	xorl	%eax, %eax
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.globl	_Z11init_matrixPijPFiiiE        # -- Begin function _Z11init_matrixPijPFiiiE
	.type	_Z11init_matrixPijPFiiiE,@function
_Z11init_matrixPijPFiiiE:               # @_Z11init_matrixPijPFiiiE
	.cfi_startproc
# %bb.0:
	testl	%esi, %esi
	je	.LBB3_6
# %bb.1:                                # %.preheader.preheader
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, %rbx
	movq	%rdi, %r14
	movl	%esi, %r12d
	xorl	%r13d, %r13d
	xorl	%ebp, %ebp
.LBB3_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_3 Depth 2
	xorl	%r15d, %r15d
.LBB3_3:                                #   Parent Loop BB3_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	%ebp, %edi
	movl	%r15d, %esi
	callq	*%rbx
	leal	(%r15,%r13), %ecx
	movl	%eax, (%r14,%rcx,4)
	incq	%r15
	cmpq	%r15, %r12
	jne	.LBB3_3
# %bb.4:                                #   in Loop: Header=BB3_2 Depth=1
	incl	%ebp
	addq	%r12, %r13
	cmpl	%r12d, %ebp
	jne	.LBB3_2
# %bb.5:
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r12
	.cfi_restore %r13
	.cfi_restore %r14
	.cfi_restore %r15
	.cfi_restore %rbp
.LBB3_6:                                # %._crit_edge
	retq
.Lfunc_end3:
	.size	_Z11init_matrixPijPFiiiE, .Lfunc_end3-_Z11init_matrixPijPFiiiE
	.cfi_endproc
                                        # -- End function
	.globl	_Z7run_GPUPiS_j                 # -- Begin function _Z7run_GPUPiS_j
	.type	_Z7run_GPUPiS_j,@function
_Z7run_GPUPiS_j:                        # @_Z7run_GPUPiS_j
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$16, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rsi, %r15
	movq	%rdi, %rbx
	movl	%edx, %r14d
	leaq	8(%rsp), %r12
	movq	%r12, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movq	%rsp, %r13
	movq	%r13, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movl	$1, (%rbx)
	movq	(%r12), %rdi
	movq	%rbx, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r13), %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$4294967312, %rdi               # imm = 0x100000010
	movl	$1, %esi
	movq	%rdi, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_2
# %bb.1:
	movq	8(%rsp), %rdi
	movq	(%rsp), %rsi
	callq	_Z32__device_stub__kernel_operationsPiS_
.LBB4_2:
	movq	8(%rsp), %rsi
	movq	%rbx, %rdi
	movq	%r14, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	(%rsp), %rsi
	movq	%r15, %rdi
	movq	%r14, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	xorl	%r14d, %r14d
.LBB4_3:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_4 Depth 2
	xorl	%r15d, %r15d
.LBB4_4:                                #   Parent Loop BB4_3 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%rbx,%r15,4), %esi
	movl	$.L.str, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%r15
	cmpq	$16, %r15
	jne	.LBB4_4
# %bb.5:                                #   in Loop: Header=BB4_3 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%r14
	addq	$64, %rbx
	cmpq	$16, %r14
	jne	.LBB4_3
# %bb.6:
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	(%rsp), %rdi
	callq	hipFree
	addq	$16, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z7run_GPUPiS_j, .Lfunc_end4-_Z7run_GPUPiS_j
	.cfi_endproc
                                        # -- End function
	.globl	_Z32__device_stub__kernel_operationsPiS_ # -- Begin function _Z32__device_stub__kernel_operationsPiS_
	.type	_Z32__device_stub__kernel_operationsPiS_,@function
_Z32__device_stub__kernel_operationsPiS_: # @_Z32__device_stub__kernel_operationsPiS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17kernel_operationsPiS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z32__device_stub__kernel_operationsPiS_, .Lfunc_end5-_Z32__device_stub__kernel_operationsPiS_
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB6_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB6_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17kernel_operationsPiS_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end6:
	.size	__hip_module_ctor, .Lfunc_end6-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB7_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB7_2:
	retq
.Lfunc_end7:
	.size	__hip_module_dtor, .Lfunc_end7-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z17kernel_operationsPiS_,@object # @_Z17kernel_operationsPiS_
	.section	.rodata,"a",@progbits
	.globl	_Z17kernel_operationsPiS_
	.p2align	3, 0x0
_Z17kernel_operationsPiS_:
	.quad	_Z32__device_stub__kernel_operationsPiS_
	.size	_Z17kernel_operationsPiS_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"%8d "
	.size	.L.str, 5

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z17kernel_operationsPiS_"
	.size	.L__unnamed_1, 26

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z32__device_stub__kernel_operationsPiS_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z17kernel_operationsPiS_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z17kernel_operationsPiS_ ; -- Begin function _Z17kernel_operationsPiS_
	.globl	_Z17kernel_operationsPiS_
	.p2align	8
	.type	_Z17kernel_operationsPiS_,@function
_Z17kernel_operationsPiS_:              ; @_Z17kernel_operationsPiS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x1c
	s_load_b128 s[0:3], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_mov_b32_e32 v2, 0
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_load_b32 v4, v[2:3], off
	global_load_b32 v0, v[0:1], off
	s_waitcnt vmcnt(0)
	v_sub_nc_u32_e32 v0, v4, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_lo_u32 v0, v0, v0
	global_store_b32 v[2:3], v0, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17kernel_operationsPiS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z17kernel_operationsPiS_, .Lfunc_end0-_Z17kernel_operationsPiS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 140
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z17kernel_operationsPiS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z17kernel_operationsPiS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
