#include <stdio.h>
#include <cuda.h>
#include <sys/time.h>
#include <stdlib.h>

#define BLOCKSIZE	1024

__device__ char dec(char c) {
	return (c - 1);
}
__device__ char enc(char c) {
	return (c + 1);
}
__global__ void decrypt(char *src, char *target, int n) {
	int id = blockIdx.x * blockDim.x + threadIdx.x;
	if (id < n)
		target[id] = dec(src[id]);
	else if (id == n)
		target[id] = '\0';
}
__global__ void encrypt(char *src, char *target, int n) {
	int id = blockIdx.x * blockDim.x + threadIdx.x;
	if (id < n)
		target[id] = enc(src[id]);
	else if (id == n)
		target[id] = '\0';
}
void init(char *s, int *n) {
	strcpy(s, "Hello World!");
	*n = strlen(s);
}
int main() {
	char *s, *ds;

	int n;
	s = (char *)malloc(20);
	init(s, &n);

	dim3 block(BLOCKSIZE, 1, 1);
	dim3 grid(ceil((float)n/BLOCKSIZE), 1, 1);
	printf("number of blocks = %d\n", ceil((float)n/BLOCKSIZE));


	cudaMalloc(&ds, (n + 1)*sizeof(char));

	cudaMemcpy(ds, s, (n+1)*sizeof(char), cudaMemcpyHostToDevice);
	encrypt<<<grid, block>>>(ds, ds, n);
	cudaDeviceSynchronize();

	cudaMemcpy(s, ds, (n+1)*sizeof(char), cudaMemcpyDeviceToHost);
	puts(s);

	decrypt<<<grid, block>>>(ds, ds, n);
	cudaDeviceSynchronize();

	cudaMemcpy(s, ds, (n+1)*sizeof(char), cudaMemcpyDeviceToHost);
	puts(s);

	printf("\n");
	return 0;
}

	.file	"tmpxft_0022d58c_00000000-6_encrypt.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2033:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2033:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z3decc
	.type	_Z3decc, @function
_Z3decc:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2027:
	.size	_Z3decc, .-_Z3decc
	.globl	_Z3encc
	.type	_Z3encc, @function
_Z3encc:
.LFB2178:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	_Z3decc
	.cfi_endproc
.LFE2178:
	.size	_Z3encc, .-_Z3encc
	.globl	_Z4initPcPi
	.type	_Z4initPcPi, @function
_Z4initPcPi:
.LFB2029:
	.cfi_startproc
	endbr64
	movabsq	$8022916924116329800, %rax
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rsi, %rbx
	movq	%rax, (%rdi)
	movabsq	$9399091170596640, %rax
	movq	%rax, 5(%rdi)
	call	strlen@PLT
	movl	%eax, (%rbx)
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z4initPcPi, .-_Z4initPcPi
	.globl	_Z29__device_stub__Z7decryptPcS_iPcS_i
	.type	_Z29__device_stub__Z7decryptPcS_iPcS_i, @function
_Z29__device_stub__Z7decryptPcS_iPcS_i:
.LFB2055:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z7decryptPcS_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L8:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2055:
	.size	_Z29__device_stub__Z7decryptPcS_iPcS_i, .-_Z29__device_stub__Z7decryptPcS_iPcS_i
	.globl	_Z7decryptPcS_i
	.type	_Z7decryptPcS_i, @function
_Z7decryptPcS_i:
.LFB2056:
	.cfi_startproc
	endbr64
	jmp	_Z29__device_stub__Z7decryptPcS_iPcS_i
	.cfi_endproc
.LFE2056:
	.size	_Z7decryptPcS_i, .-_Z7decryptPcS_i
	.globl	_Z29__device_stub__Z7encryptPcS_iPcS_i
	.type	_Z29__device_stub__Z7encryptPcS_iPcS_i, @function
_Z29__device_stub__Z7encryptPcS_iPcS_i:
.LFB2057:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L14
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z7encryptPcS_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L14:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L16
	call	__stack_chk_fail@PLT
.L16:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2057:
	.size	_Z29__device_stub__Z7encryptPcS_iPcS_i, .-_Z29__device_stub__Z7encryptPcS_iPcS_i
	.globl	_Z7encryptPcS_i
	.type	_Z7encryptPcS_i, @function
_Z7encryptPcS_i:
.LFB2058:
	.cfi_startproc
	endbr64
	jmp	_Z29__device_stub__Z7encryptPcS_iPcS_i
	.cfi_endproc
.LFE2058:
	.size	_Z7encryptPcS_i, .-_Z7encryptPcS_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"number of blocks = %d\n"
.LC2:
	.string	"\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	$20, %edi
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$48, %rsp
	.cfi_def_cfa_offset 80
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	leaq	4(%rsp), %rsi
	movq	%rax, %rdi
	movq	%rax, %rbx
	call	_Z4initPcPi
	movl	4(%rsp), %r12d
	movl	$4194305, %eax
	movl	$1, 24(%rsp)
	salq	$10, %rax
	cvtsi2ssl	%r12d, %xmm0
	movq	%rax, 16(%rsp)
	leal	1(%r12), %ebp
	mulss	.LC0(%rip), %xmm0
	movslq	%ebp, %rbp
	call	ceilf@PLT
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	cvttss2siq	%xmm0, %rax
	cvtss2sd	%xmm0, %xmm0
	movl	%eax, 28(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movb	$1, %al
	call	__printf_chk@PLT
	leaq	8(%rsp), %rdi
	movq	%rbp, %rsi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	movq	%rbp, %rdx
	movq	%rbx, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	24(%rsp), %ecx
	movl	36(%rsp), %esi
	xorl	%r9d, %r9d
	movq	16(%rsp), %rdx
	movq	28(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L20
	movq	8(%rsp), %rdi
	movl	%r12d, %edx
	movq	%rdi, %rsi
	call	_Z29__device_stub__Z7encryptPcS_iPcS_i
.L20:
	call	cudaDeviceSynchronize@PLT
	movq	8(%rsp), %rsi
	movq	%rbp, %rdx
	movq	%rbx, %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movq	%rbx, %rdi
	call	puts@PLT
	movl	24(%rsp), %ecx
	movl	36(%rsp), %esi
	xorl	%r9d, %r9d
	movq	16(%rsp), %rdx
	movq	28(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L21
	movq	8(%rsp), %rdi
	movl	%r12d, %edx
	movq	%rdi, %rsi
	call	_Z29__device_stub__Z7decryptPcS_iPcS_i
.L21:
	call	cudaDeviceSynchronize@PLT
	movq	8(%rsp), %rsi
	movq	%rbp, %rdx
	movq	%rbx, %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movq	%rbx, %rdi
	call	puts@PLT
	xorl	%eax, %eax
	movl	$2, %edi
	leaq	.LC2(%rip), %rsi
	call	__printf_chk@PLT
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L22
	call	__stack_chk_fail@PLT
.L22:
	addq	$48, %rsp
	.cfi_def_cfa_offset 32
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2030:
	.size	main, .-main
	.section	.rodata.str1.1
.LC3:
	.string	"_Z7encryptPcS_i"
.LC4:
	.string	"_Z7decryptPcS_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2060:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z7encryptPcS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC4(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z7decryptPcS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2060:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	981467136
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include <hip/hip_runtime.h>
#include <sys/time.h>
#include <stdlib.h>

#define BLOCKSIZE	1024

__device__ char dec(char c) {
	return (c - 1);
}
__device__ char enc(char c) {
	return (c + 1);
}
__global__ void decrypt(char *src, char *target, int n) {
	int id = blockIdx.x * blockDim.x + threadIdx.x;
	if (id < n)
		target[id] = dec(src[id]);
	else if (id == n)
		target[id] = '\0';
}
__global__ void encrypt(char *src, char *target, int n) {
	int id = blockIdx.x * blockDim.x + threadIdx.x;
	if (id < n)
		target[id] = enc(src[id]);
	else if (id == n)
		target[id] = '\0';
}
void init(char *s, int *n) {
	strcpy(s, "Hello World!");
	*n = strlen(s);
}
int main() {
	char *s, *ds;

	int n;
	s = (char *)malloc(20);
	init(s, &n);

	dim3 block(BLOCKSIZE, 1, 1);
	dim3 grid(ceil((float)n/BLOCKSIZE), 1, 1);
	printf("number of blocks = %d\n", ceil((float)n/BLOCKSIZE));


	hipMalloc(&ds, (n + 1)*sizeof(char));

	hipMemcpy(ds, s, (n+1)*sizeof(char), hipMemcpyHostToDevice);
	encrypt<<<grid, block>>>(ds, ds, n);
	hipDeviceSynchronize();

	hipMemcpy(s, ds, (n+1)*sizeof(char), hipMemcpyDeviceToHost);
	puts(s);

	decrypt<<<grid, block>>>(ds, ds, n);
	hipDeviceSynchronize();

	hipMemcpy(s, ds, (n+1)*sizeof(char), hipMemcpyDeviceToHost);
	puts(s);

	printf("\n");
	return 0;
}

	.text
	.file	"encrypt.hip"
	.globl	_Z22__device_stub__decryptPcS_i # -- Begin function _Z22__device_stub__decryptPcS_i
	.type	_Z22__device_stub__decryptPcS_i,@function
_Z22__device_stub__decryptPcS_i:        # @_Z22__device_stub__decryptPcS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7decryptPcS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z22__device_stub__decryptPcS_i, .Lfunc_end0-_Z22__device_stub__decryptPcS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z22__device_stub__encryptPcS_i # -- Begin function _Z22__device_stub__encryptPcS_i
	.type	_Z22__device_stub__encryptPcS_i,@function
_Z22__device_stub__encryptPcS_i:        # @_Z22__device_stub__encryptPcS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7encryptPcS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z22__device_stub__encryptPcS_i, .Lfunc_end1-_Z22__device_stub__encryptPcS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z4initPcPi                     # -- Begin function _Z4initPcPi
	.type	_Z4initPcPi,@function
_Z4initPcPi:                            # @_Z4initPcPi
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rsi, %rbx
	movabsq	$9399091170596640, %rax         # imm = 0x21646C726F5720
	movq	%rax, 5(%rdi)
	movabsq	$8022916924116329800, %rax      # imm = 0x6F57206F6C6C6548
	movq	%rax, (%rdi)
	callq	strlen
	movl	%eax, (%rbx)
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z4initPcPi, .Lfunc_end2-_Z4initPcPi
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI3_0:
	.long	0x3a800000                      # float 9.765625E-4
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movabsq	$4294967296, %r14               # imm = 0x100000000
	movl	$20, %edi
	callq	malloc
	movq	%rax, %rbx
	movabsq	$8022916924116329800, %rax      # imm = 0x6F57206F6C6C6548
	movq	%rax, (%rbx)
	movabsq	$9399091170596640, %rax         # imm = 0x21646C726F5720
	movq	%rax, 5(%rbx)
	movq	%rbx, %rdi
	callq	strlen
	movq	%rax, %r15
	cvtsi2ss	%r15d, %xmm0
	mulss	.LCPI3_0(%rip), %xmm0
	callq	ceilf@PLT
	cvttss2si	%xmm0, %rax
	movl	%eax, %r13d
	btsq	$32, %r13
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.1, %edi
	movb	$1, %al
	callq	printf
	leal	1(%r15), %eax
	movslq	%eax, %r12
	movq	%rsp, %rbp
	movq	%rbp, %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	movq	(%rbp), %rdi
	movq	%rbx, %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	1024(%r14), %rdx
	movq	%r13, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_2
# %bb.1:
	movq	(%rsp), %rdi
	movq	%rdi, %rsi
	movl	%r15d, %edx
	callq	_Z22__device_stub__encryptPcS_i
.LBB3_2:
	callq	hipDeviceSynchronize
	movq	(%rsp), %rsi
	movq	%rbx, %rdi
	movq	%r12, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	%rbx, %rdi
	callq	puts
	addq	$1024, %r14                     # imm = 0x400
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_4
# %bb.3:
	movq	(%rsp), %rdi
	movq	%rdi, %rsi
	movl	%r15d, %edx
	callq	_Z22__device_stub__decryptPcS_i
.LBB3_4:
	callq	hipDeviceSynchronize
	movq	(%rsp), %rsi
	movq	%rbx, %rdi
	movq	%r12, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	%rbx, %rdi
	callq	puts
	movl	$10, %edi
	callq	putchar@PLT
	xorl	%eax, %eax
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7decryptPcS_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7encryptPcS_i, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z7decryptPcS_i,@object         # @_Z7decryptPcS_i
	.section	.rodata,"a",@progbits
	.globl	_Z7decryptPcS_i
	.p2align	3, 0x0
_Z7decryptPcS_i:
	.quad	_Z22__device_stub__decryptPcS_i
	.size	_Z7decryptPcS_i, 8

	.type	_Z7encryptPcS_i,@object         # @_Z7encryptPcS_i
	.globl	_Z7encryptPcS_i
	.p2align	3, 0x0
_Z7encryptPcS_i:
	.quad	_Z22__device_stub__encryptPcS_i
	.size	_Z7encryptPcS_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Hello World!"
	.size	.L.str, 13

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"number of blocks = %d\n"
	.size	.L.str.1, 23

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z7decryptPcS_i"
	.size	.L__unnamed_1, 16

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z7encryptPcS_i"
	.size	.L__unnamed_2, 16

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z22__device_stub__decryptPcS_i
	.addrsig_sym _Z22__device_stub__encryptPcS_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z7decryptPcS_i
	.addrsig_sym _Z7encryptPcS_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z7decryptPcS_i         ; -- Begin function _Z7decryptPcS_i
	.globl	_Z7decryptPcS_i
	.p2align	8
	.type	_Z7decryptPcS_i,@function
_Z7decryptPcS_i:                        ; @_Z7decryptPcS_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s4, s[0:1], 0x10
	s_mov_b32 s6, 0
                                        ; implicit-def: $sgpr7
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_le_i32_e64 s4, v1
	s_xor_b32 s2, exec_lo, s2
	s_cbranch_execz .LBB0_4
; %bb.1:
	s_mov_b32 s3, 0
	s_mov_b32 s5, exec_lo
                                        ; implicit-def: $sgpr7
	v_cmpx_eq_u32_e64 s4, v1
	s_xor_b32 s6, exec_lo, s5
; %bb.2:
	s_mov_b32 s3, exec_lo
	s_ashr_i32 s5, s4, 31
	s_mov_b32 s7, 0
; %bb.3:                                ; %Flow21
	s_or_b32 exec_lo, exec_lo, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s6, s3, exec_lo
                                        ; implicit-def: $vgpr1_vgpr2
.LBB0_4:                                ; %Flow
	s_or_saveexec_b32 s8, s2
	s_load_b128 s[0:3], s[0:1], 0x0
	v_mov_b32_e32 v2, s4
	v_dual_mov_b32 v0, s7 :: v_dual_mov_b32 v3, s5
	s_xor_b32 exec_lo, exec_lo, s8
	s_cbranch_execz .LBB0_6
; %bb.5:
	v_ashrrev_i32_e32 v2, 31, v1
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, vcc_lo, s0, v1
	s_or_b32 s6, s6, exec_lo
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v2, vcc_lo
	global_load_u8 v0, v[3:4], off
	v_mov_b32_e32 v3, v2
	v_mov_b32_e32 v2, v1
	s_waitcnt vmcnt(0)
	v_add_nc_u16 v0, v0, -1
.LBB0_6:                                ; %Flow22
	s_or_b32 exec_lo, exec_lo, s8
	s_waitcnt lgkmcnt(0)
	s_and_saveexec_b32 s0, s6
	s_cbranch_execz .LBB0_8
; %bb.7:                                ; %.sink.split
	v_add_co_u32 v1, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v2, vcc_lo, s3, v3, vcc_lo
	global_store_b8 v[1:2], v0, off
.LBB0_8:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7decryptPcS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z7decryptPcS_i, .Lfunc_end0-_Z7decryptPcS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 248
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z7encryptPcS_i         ; -- Begin function _Z7encryptPcS_i
	.globl	_Z7encryptPcS_i
	.p2align	8
	.type	_Z7encryptPcS_i,@function
_Z7encryptPcS_i:                        ; @_Z7encryptPcS_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s4, s[0:1], 0x10
	s_mov_b32 s6, 0
                                        ; implicit-def: $sgpr7
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_le_i32_e64 s4, v1
	s_xor_b32 s2, exec_lo, s2
	s_cbranch_execz .LBB1_4
; %bb.1:
	s_mov_b32 s3, 0
	s_mov_b32 s5, exec_lo
                                        ; implicit-def: $sgpr7
	v_cmpx_eq_u32_e64 s4, v1
	s_xor_b32 s6, exec_lo, s5
; %bb.2:
	s_mov_b32 s3, exec_lo
	s_ashr_i32 s5, s4, 31
	s_mov_b32 s7, 0
; %bb.3:                                ; %Flow21
	s_or_b32 exec_lo, exec_lo, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s6, s3, exec_lo
                                        ; implicit-def: $vgpr1_vgpr2
.LBB1_4:                                ; %Flow
	s_or_saveexec_b32 s8, s2
	s_load_b128 s[0:3], s[0:1], 0x0
	v_mov_b32_e32 v2, s4
	v_dual_mov_b32 v0, s7 :: v_dual_mov_b32 v3, s5
	s_xor_b32 exec_lo, exec_lo, s8
	s_cbranch_execz .LBB1_6
; %bb.5:
	v_ashrrev_i32_e32 v2, 31, v1
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, vcc_lo, s0, v1
	s_or_b32 s6, s6, exec_lo
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v2, vcc_lo
	global_load_u8 v0, v[3:4], off
	v_mov_b32_e32 v3, v2
	v_mov_b32_e32 v2, v1
	s_waitcnt vmcnt(0)
	v_add_nc_u16 v0, v0, 1
.LBB1_6:                                ; %Flow22
	s_or_b32 exec_lo, exec_lo, s8
	s_waitcnt lgkmcnt(0)
	s_and_saveexec_b32 s0, s6
	s_cbranch_execz .LBB1_8
; %bb.7:                                ; %.sink.split
	v_add_co_u32 v1, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v2, vcc_lo, s3, v3, vcc_lo
	global_store_b8 v[1:2], v0, off
.LBB1_8:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7encryptPcS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z7encryptPcS_i, .Lfunc_end1-_Z7encryptPcS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 248
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z7decryptPcS_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z7decryptPcS_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z7encryptPcS_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z7encryptPcS_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
