#include <cuda_runtime.h>
#include <cstdio>
#include <iostream>
/**
 * @property    图像饱和度降低
 * @func        将图像转换为几种HSL图像               
 * @param_out   out_image          转换后的图像          
 * @param_in    in_image           待转换图像 
 * @param_in    pixel_amount       像素点个数 
 * @param_in    type               亮度类型
 * @param_in    alpha              是否有alpha通道
 */
void desaturate_by_cuda(float * const out_image,float const  *in_image,const int pixel_amount, const int type,const bool alpha);
/****************************************************************************************************************************/

__global__ void kernel_desaturate_alpha(float *out,float const *in, const int size,const int type)
{
    extern __shared__   float s[];
    int in_idx = threadIdx.x  + blockIdx.x * blockDim.x * 8 ;
    int out_idx = threadIdx.x+ blockIdx.x * blockDim.x * 4 ;
    int tid=threadIdx.x;
    int stride=tid*4;
    int stride1=stride+blockDim.x*4;
    if (in_idx< size * 4)
    {
        s[tid]=in[in_idx];
        s[tid+blockDim.x]=in[in_idx+blockDim.x];
        s[tid+blockDim.x*2]=in[in_idx+blockDim.x*2];
        s[tid+blockDim.x*3]=in[in_idx+blockDim.x*3];
        s[tid+blockDim.x*4]=in[in_idx+blockDim.x*4];
        s[tid+blockDim.x*5]=in[in_idx+blockDim.x*5];
        s[tid+blockDim.x*6]=in[in_idx+blockDim.x*6];
        s[tid+blockDim.x*7]=in[in_idx+blockDim.x*7];
    }
    __syncthreads();

    if(type==0)
    {
        out[out_idx]=max(s[stride+0],max(s[stride+1],s[stride+2]));
        out[out_idx+blockDim.x*2]=max(s[stride1+0],max(s[stride1+1],s[stride1+2]));
    }
    if(type==1)
    {
        float const max_v = max(s[stride+0],max(s[stride+1],s[stride+2]));
        float const min_v = min(s[stride+0],min(s[stride+1],s[stride+2]));
        out[out_idx]=0.5f*(max_v+min_v);
        float const max_s = max(s[stride1+0],max(s[stride1+1],s[stride1+2]));
        float const min_s = min(s[stride1+0],min(s[stride1+1],s[stride1+2]));
        out[out_idx+blockDim.x*2]=0.5f*(max_s+min_s);
    }
    if(type==2)
    {
        out[out_idx]=0.21f * s[stride+0] + 0.72f * s[stride+1] + 0.07f * s[stride+2];
        out[out_idx+blockDim.x*2]=0.21f * s[stride1+0] + 0.72f * s[stride1+1] + 0.07f * s[stride1+2];
    }
    if(type==3)
    {
        out[out_idx]=0.30f * s[stride+0] + 0.59f * s[stride+1] + 0.11f * s[stride+2];
        out[out_idx+blockDim.x*2]=0.30f * s[stride1+0] + 0.59f * s[stride1+1] + 0.11f * s[stride1+2];
    }
    if(type==4)
    {
        out[out_idx]=((float)(s[stride+0] + s[stride+1] + s[stride+2])) / 3.0f;
        out[out_idx+blockDim.x*2]=((float)(s[stride1+0] + s[stride1+1] + s[stride1+2])) / 3.0f;
    }
    out[out_idx+tid+1]=s[stride+3];
    out[out_idx+blockDim.x*2+tid+1]=s[stride1+3];
}
__global__ void kernel_desaturate(float *out,float const *in, const int size,const int type)
{
    extern __shared__   float s[];
    int in_idx = threadIdx.x  + blockIdx.x * blockDim.x * 6 ;
    int out_idx = threadIdx.x+ blockIdx.x * blockDim.x * 2 ;
    int tid=threadIdx.x;
    int stride=tid*3;
    int stride1=stride+blockDim.x*3;

    if (in_idx< size * 3)
    {
        s[tid]=in[in_idx];
        s[tid+blockDim.x]=in[in_idx+blockDim.x];
        s[tid+blockDim.x*2]=in[in_idx+blockDim.x*2];
        s[tid+blockDim.x*3]=in[in_idx+blockDim.x*3];
        s[tid+blockDim.x*4]=in[in_idx+blockDim.x*4];
        s[tid+blockDim.x*5]=in[in_idx+blockDim.x*5];
    }
    __syncthreads();
    if(type==0)
    {
        out[out_idx]=max(s[stride+0],max(s[stride+1],s[stride+2]));
        out[out_idx+blockDim.x]=max(s[stride1+0],max(s[stride1+1],s[stride1+2]));
    }
    if(type==1)
    {
        float const max_v = max(s[stride+0],max(s[stride+1],s[stride+2]));
        float const min_v = min(s[stride+0],min(s[stride+1],s[stride+2]));
        out[out_idx]=0.5f*(max_v+min_v);
        float const max_s = max(s[stride1+0],max(s[stride1+1],s[stride1+2]));
        float const min_s = min(s[stride1+0],min(s[stride1+1],s[stride1+2]));
        out[out_idx+blockDim.x]=0.5f*(max_s+min_s);
    }
    if(type==2)
    {
        out[out_idx]=0.21f * s[stride+0] + 0.72f * s[stride+1] + 0.07f * s[stride+2];
        out[out_idx+blockDim.x]=0.21f * s[stride1+0] + 0.72f * s[stride1+1] + 0.07f * s[stride1+2];
    }
    if(type==3)
    {
        out[out_idx]=0.30f * s[stride+0] + 0.59f * s[stride+1] + 0.11f * s[stride+2];
        out[out_idx+blockDim.x]=0.30f * s[stride1+0] + 0.59f * s[stride1+1] + 0.11f * s[stride1+2];
    }
    if(type==4)
    {
        out[out_idx]=((float)(s[stride+0] + s[stride+1] + s[stride+2])) / 3.0f;
        out[out_idx+blockDim.x]=((float)(s[stride1+0] + s[stride1+1] + s[stride1+2])) / 3.0f;
    }

}


void desaturate_by_cuda(float  * const out_image,float const *in_image,const int pixel_amount, const int type,const bool alpha)
{
    float *d_in=NULL;
    float *d_out=NULL;

    int bytes_in=pixel_amount*(3+alpha)*sizeof(float);
    int bytes_out=pixel_amount*(1+alpha)* sizeof(float);
    const int  blocksize=256;
    dim3 block(blocksize,1,1);
    dim3 grid((pixel_amount-1+blocksize*2)/(blocksize*2),1,1);
    cudaMalloc(&d_in,bytes_in);
    cudaMalloc(&d_out,bytes_out);
    cudaMemcpy(d_in,in_image,bytes_in,cudaMemcpyHostToDevice);
    if(alpha)
    {
        kernel_desaturate_alpha<<<grid,block,blocksize*4* sizeof(float)>>>(d_out,d_in,pixel_amount,type);
    }
    else
    {
        kernel_desaturate<<<grid,block,blocksize*6* sizeof(float)>>>(d_out,d_in,pixel_amount,type);
    }
    cudaMemcpy(out_image,d_out,bytes_out,cudaMemcpyDeviceToHost);

    cudaFree(d_in);
    cudaFree(d_out);
}

	.file	"tmpxft_00353e84_00000000-6_desaturate.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3638:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3638:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z48__device_stub__Z23kernel_desaturate_alphaPfPKfiiPfPKfii
	.type	_Z48__device_stub__Z23kernel_desaturate_alphaPfPKfiiPfPKfii, @function
_Z48__device_stub__Z23kernel_desaturate_alphaPfPKfiiPfPKfii:
.LFB3660:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z23kernel_desaturate_alphaPfPKfii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3660:
	.size	_Z48__device_stub__Z23kernel_desaturate_alphaPfPKfiiPfPKfii, .-_Z48__device_stub__Z23kernel_desaturate_alphaPfPKfiiPfPKfii
	.globl	_Z23kernel_desaturate_alphaPfPKfii
	.type	_Z23kernel_desaturate_alphaPfPKfii, @function
_Z23kernel_desaturate_alphaPfPKfii:
.LFB3661:
	.cfi_startproc
	endbr64
	jmp	_Z48__device_stub__Z23kernel_desaturate_alphaPfPKfiiPfPKfii
	.cfi_endproc
.LFE3661:
	.size	_Z23kernel_desaturate_alphaPfPKfii, .-_Z23kernel_desaturate_alphaPfPKfii
	.globl	_Z42__device_stub__Z17kernel_desaturatePfPKfiiPfPKfii
	.type	_Z42__device_stub__Z17kernel_desaturatePfPKfiiPfPKfii, @function
_Z42__device_stub__Z17kernel_desaturatePfPKfiiPfPKfii:
.LFB3662:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z17kernel_desaturatePfPKfii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L8:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3662:
	.size	_Z42__device_stub__Z17kernel_desaturatePfPKfiiPfPKfii, .-_Z42__device_stub__Z17kernel_desaturatePfPKfiiPfPKfii
	.globl	_Z17kernel_desaturatePfPKfii
	.type	_Z17kernel_desaturatePfPKfii, @function
_Z17kernel_desaturatePfPKfii:
.LFB3663:
	.cfi_startproc
	endbr64
	jmp	_Z42__device_stub__Z17kernel_desaturatePfPKfiiPfPKfii
	.cfi_endproc
.LFE3663:
	.size	_Z17kernel_desaturatePfPKfii, .-_Z17kernel_desaturatePfPKfii
	.globl	_Z18desaturate_by_cudaPfPKfiib
	.type	_Z18desaturate_by_cudaPfPKfiib, @function
_Z18desaturate_by_cudaPfPKfiib:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rsi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rdi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%ecx, %r12d
	movl	$512, %ecx
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%edx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movzbl	%r8b, %ebx
	addl	$3, %ebx
	imull	%edx, %ebx
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	xorl	%eax, %eax
	leaq	16(%rsp), %rdi
	movl	%r8d, 12(%rsp)
	movq	%rax, 16(%rsp)
	leal	0(,%rbx,4), %r15d
	movq	%rax, 24(%rsp)
	movl	$16777217, %eax
	movslq	%r15d, %r15
	salq	$8, %rax
	movq	%r15, %rsi
	movl	$1, 40(%rsp)
	movq	%rax, 32(%rsp)
	leal	511(%rdx), %eax
	cltd
	idivl	%ecx
	movl	%eax, 44(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	call	cudaMalloc@PLT
	leal	(%rbp,%rbp), %eax
	leaq	24(%rsp), %rdi
	subl	%eax, %ebx
	sall	$2, %ebx
	movslq	%ebx, %rbx
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	movq	16(%rsp), %rdi
	movq	%r15, %rdx
	movq	%r14, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	xorl	%r9d, %r9d
	movl	40(%rsp), %ecx
	movl	52(%rsp), %esi
	movl	12(%rsp), %r8d
	movq	32(%rsp), %rdx
	movq	44(%rsp), %rdi
	testb	%r8b, %r8b
	je	.L14
	movl	$4096, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	movq	16(%rsp), %rsi
	movq	24(%rsp), %rdi
	movl	%r12d, %ecx
	movl	%ebp, %edx
	call	_Z48__device_stub__Z23kernel_desaturate_alphaPfPKfiiPfPKfii
	jmp	.L16
.L14:
	movl	$6144, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	movq	16(%rsp), %rsi
	movq	24(%rsp), %rdi
	movl	%r12d, %ecx
	movl	%ebp, %edx
	call	_Z42__device_stub__Z17kernel_desaturatePfPKfiiPfPKfii
.L16:
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdx
	movq	%r13, %rdi
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L18
	call	__stack_chk_fail@PLT
.L18:
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	_Z18desaturate_by_cudaPfPKfiib, .-_Z18desaturate_by_cudaPfPKfiib
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z17kernel_desaturatePfPKfii"
.LC1:
	.string	"_Z23kernel_desaturate_alphaPfPKfii"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3665:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z17kernel_desaturatePfPKfii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC1(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z23kernel_desaturate_alphaPfPKfii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3665:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <hip/hip_runtime.h>
#include <cstdio>
#include <iostream>
/**
 * @property    图像饱和度降低
 * @func        将图像转换为几种HSL图像               
 * @param_out   out_image          转换后的图像          
 * @param_in    in_image           待转换图像 
 * @param_in    pixel_amount       像素点个数 
 * @param_in    type               亮度类型
 * @param_in    alpha              是否有alpha通道
 */
void desaturate_by_cuda(float * const out_image,float const  *in_image,const int pixel_amount, const int type,const bool alpha);
/****************************************************************************************************************************/

__global__ void kernel_desaturate_alpha(float *out,float const *in, const int size,const int type)
{
    extern __shared__   float s[];
    int in_idx = threadIdx.x  + blockIdx.x * blockDim.x * 8 ;
    int out_idx = threadIdx.x+ blockIdx.x * blockDim.x * 4 ;
    int tid=threadIdx.x;
    int stride=tid*4;
    int stride1=stride+blockDim.x*4;
    if (in_idx< size * 4)
    {
        s[tid]=in[in_idx];
        s[tid+blockDim.x]=in[in_idx+blockDim.x];
        s[tid+blockDim.x*2]=in[in_idx+blockDim.x*2];
        s[tid+blockDim.x*3]=in[in_idx+blockDim.x*3];
        s[tid+blockDim.x*4]=in[in_idx+blockDim.x*4];
        s[tid+blockDim.x*5]=in[in_idx+blockDim.x*5];
        s[tid+blockDim.x*6]=in[in_idx+blockDim.x*6];
        s[tid+blockDim.x*7]=in[in_idx+blockDim.x*7];
    }
    __syncthreads();

    if(type==0)
    {
        out[out_idx]=max(s[stride+0],max(s[stride+1],s[stride+2]));
        out[out_idx+blockDim.x*2]=max(s[stride1+0],max(s[stride1+1],s[stride1+2]));
    }
    if(type==1)
    {
        float const max_v = max(s[stride+0],max(s[stride+1],s[stride+2]));
        float const min_v = min(s[stride+0],min(s[stride+1],s[stride+2]));
        out[out_idx]=0.5f*(max_v+min_v);
        float const max_s = max(s[stride1+0],max(s[stride1+1],s[stride1+2]));
        float const min_s = min(s[stride1+0],min(s[stride1+1],s[stride1+2]));
        out[out_idx+blockDim.x*2]=0.5f*(max_s+min_s);
    }
    if(type==2)
    {
        out[out_idx]=0.21f * s[stride+0] + 0.72f * s[stride+1] + 0.07f * s[stride+2];
        out[out_idx+blockDim.x*2]=0.21f * s[stride1+0] + 0.72f * s[stride1+1] + 0.07f * s[stride1+2];
    }
    if(type==3)
    {
        out[out_idx]=0.30f * s[stride+0] + 0.59f * s[stride+1] + 0.11f * s[stride+2];
        out[out_idx+blockDim.x*2]=0.30f * s[stride1+0] + 0.59f * s[stride1+1] + 0.11f * s[stride1+2];
    }
    if(type==4)
    {
        out[out_idx]=((float)(s[stride+0] + s[stride+1] + s[stride+2])) / 3.0f;
        out[out_idx+blockDim.x*2]=((float)(s[stride1+0] + s[stride1+1] + s[stride1+2])) / 3.0f;
    }
    out[out_idx+tid+1]=s[stride+3];
    out[out_idx+blockDim.x*2+tid+1]=s[stride1+3];
}
__global__ void kernel_desaturate(float *out,float const *in, const int size,const int type)
{
    extern __shared__   float s[];
    int in_idx = threadIdx.x  + blockIdx.x * blockDim.x * 6 ;
    int out_idx = threadIdx.x+ blockIdx.x * blockDim.x * 2 ;
    int tid=threadIdx.x;
    int stride=tid*3;
    int stride1=stride+blockDim.x*3;

    if (in_idx< size * 3)
    {
        s[tid]=in[in_idx];
        s[tid+blockDim.x]=in[in_idx+blockDim.x];
        s[tid+blockDim.x*2]=in[in_idx+blockDim.x*2];
        s[tid+blockDim.x*3]=in[in_idx+blockDim.x*3];
        s[tid+blockDim.x*4]=in[in_idx+blockDim.x*4];
        s[tid+blockDim.x*5]=in[in_idx+blockDim.x*5];
    }
    __syncthreads();
    if(type==0)
    {
        out[out_idx]=max(s[stride+0],max(s[stride+1],s[stride+2]));
        out[out_idx+blockDim.x]=max(s[stride1+0],max(s[stride1+1],s[stride1+2]));
    }
    if(type==1)
    {
        float const max_v = max(s[stride+0],max(s[stride+1],s[stride+2]));
        float const min_v = min(s[stride+0],min(s[stride+1],s[stride+2]));
        out[out_idx]=0.5f*(max_v+min_v);
        float const max_s = max(s[stride1+0],max(s[stride1+1],s[stride1+2]));
        float const min_s = min(s[stride1+0],min(s[stride1+1],s[stride1+2]));
        out[out_idx+blockDim.x]=0.5f*(max_s+min_s);
    }
    if(type==2)
    {
        out[out_idx]=0.21f * s[stride+0] + 0.72f * s[stride+1] + 0.07f * s[stride+2];
        out[out_idx+blockDim.x]=0.21f * s[stride1+0] + 0.72f * s[stride1+1] + 0.07f * s[stride1+2];
    }
    if(type==3)
    {
        out[out_idx]=0.30f * s[stride+0] + 0.59f * s[stride+1] + 0.11f * s[stride+2];
        out[out_idx+blockDim.x]=0.30f * s[stride1+0] + 0.59f * s[stride1+1] + 0.11f * s[stride1+2];
    }
    if(type==4)
    {
        out[out_idx]=((float)(s[stride+0] + s[stride+1] + s[stride+2])) / 3.0f;
        out[out_idx+blockDim.x]=((float)(s[stride1+0] + s[stride1+1] + s[stride1+2])) / 3.0f;
    }

}


void desaturate_by_cuda(float  * const out_image,float const *in_image,const int pixel_amount, const int type,const bool alpha)
{
    float *d_in=NULL;
    float *d_out=NULL;

    int bytes_in=pixel_amount*(3+alpha)*sizeof(float);
    int bytes_out=pixel_amount*(1+alpha)* sizeof(float);
    const int  blocksize=256;
    dim3 block(blocksize,1,1);
    dim3 grid((pixel_amount-1+blocksize*2)/(blocksize*2),1,1);
    hipMalloc(&d_in,bytes_in);
    hipMalloc(&d_out,bytes_out);
    hipMemcpy(d_in,in_image,bytes_in,hipMemcpyHostToDevice);
    if(alpha)
    {
        kernel_desaturate_alpha<<<grid,block,blocksize*4* sizeof(float)>>>(d_out,d_in,pixel_amount,type);
    }
    else
    {
        kernel_desaturate<<<grid,block,blocksize*6* sizeof(float)>>>(d_out,d_in,pixel_amount,type);
    }
    hipMemcpy(out_image,d_out,bytes_out,hipMemcpyDeviceToHost);

    hipFree(d_in);
    hipFree(d_out);
}

	.text
	.file	"desaturate.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z38__device_stub__kernel_desaturate_alphaPfPKfii # -- Begin function _Z38__device_stub__kernel_desaturate_alphaPfPKfii
	.type	_Z38__device_stub__kernel_desaturate_alphaPfPKfii,@function
_Z38__device_stub__kernel_desaturate_alphaPfPKfii: # @_Z38__device_stub__kernel_desaturate_alphaPfPKfii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z23kernel_desaturate_alphaPfPKfii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z38__device_stub__kernel_desaturate_alphaPfPKfii, .Lfunc_end0-_Z38__device_stub__kernel_desaturate_alphaPfPKfii
	.cfi_endproc
                                        # -- End function
	.globl	_Z32__device_stub__kernel_desaturatePfPKfii # -- Begin function _Z32__device_stub__kernel_desaturatePfPKfii
	.type	_Z32__device_stub__kernel_desaturatePfPKfii,@function
_Z32__device_stub__kernel_desaturatePfPKfii: # @_Z32__device_stub__kernel_desaturatePfPKfii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17kernel_desaturatePfPKfii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z32__device_stub__kernel_desaturatePfPKfii, .Lfunc_end1-_Z32__device_stub__kernel_desaturatePfPKfii
	.cfi_endproc
                                        # -- End function
	.globl	_Z18desaturate_by_cudaPfPKfiib  # -- Begin function _Z18desaturate_by_cudaPfPKfiib
	.type	_Z18desaturate_by_cudaPfPKfiib,@function
_Z18desaturate_by_cudaPfPKfiib:         # @_Z18desaturate_by_cudaPfPKfiib
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r8d, %r13d
	movl	%ecx, 12(%rsp)                  # 4-byte Spill
	movl	%edx, %r14d
	movq	%rsi, 40(%rsp)                  # 8-byte Spill
	movq	%rdi, 48(%rsp)                  # 8-byte Spill
	movabsq	$4294967552, %rdi               # imm = 0x100000100
	xorl	%eax, %eax
	leaq	24(%rsp), %r12
	movq	%rax, (%r12)
	leal	3(%r13), %edx
	imull	%r14d, %edx
	movl	%r14d, %ebx
	movl	%r13d, %ecx
	shll	%cl, %ebx
	shll	$2, %edx
	shll	$2, %ebx
	leal	511(%r14), %ecx
	leal	1022(%r14), %esi
	testl	%ecx, %ecx
	cmovnsl	%ecx, %esi
	leaq	16(%rsp), %rbp
	movq	%rax, (%rbp)
	sarl	$9, %esi
	leaq	(%rsi,%rdi), %rax
	addq	$-256, %rax
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	movslq	%edx, %r15
	movq	%r12, %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	movslq	%ebx, %rbx
	movq	%rbp, %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	movq	(%r12), %rdi
	movq	40(%rsp), %rsi                  # 8-byte Reload
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%r13d, %r13d
	je	.LBB2_3
# %bb.1:
	movl	$4096, %r8d                     # imm = 0x1000
	movq	32(%rsp), %rdi                  # 8-byte Reload
	movl	$1, %esi
	movabsq	$4294967552, %rdx               # imm = 0x100000100
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_5
# %bb.2:
	movq	16(%rsp), %rdi
	movq	24(%rsp), %rsi
	movl	%r14d, %edx
	movl	12(%rsp), %ecx                  # 4-byte Reload
	callq	_Z38__device_stub__kernel_desaturate_alphaPfPKfii
	jmp	.LBB2_5
.LBB2_3:
	movl	$6144, %r8d                     # imm = 0x1800
	movq	32(%rsp), %rdi                  # 8-byte Reload
	movl	$1, %esi
	movabsq	$4294967552, %rdx               # imm = 0x100000100
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_5
# %bb.4:
	movq	16(%rsp), %rdi
	movq	24(%rsp), %rsi
	movl	%r14d, %edx
	movl	12(%rsp), %ecx                  # 4-byte Reload
	callq	_Z32__device_stub__kernel_desaturatePfPKfii
.LBB2_5:
	movq	16(%rsp), %rsi
	movq	48(%rsp), %rdi                  # 8-byte Reload
	movq	%rbx, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z18desaturate_by_cudaPfPKfiib, .Lfunc_end2-_Z18desaturate_by_cudaPfPKfiib
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z23kernel_desaturate_alphaPfPKfii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17kernel_desaturatePfPKfii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z23kernel_desaturate_alphaPfPKfii,@object # @_Z23kernel_desaturate_alphaPfPKfii
	.section	.rodata,"a",@progbits
	.globl	_Z23kernel_desaturate_alphaPfPKfii
	.p2align	3, 0x0
_Z23kernel_desaturate_alphaPfPKfii:
	.quad	_Z38__device_stub__kernel_desaturate_alphaPfPKfii
	.size	_Z23kernel_desaturate_alphaPfPKfii, 8

	.type	_Z17kernel_desaturatePfPKfii,@object # @_Z17kernel_desaturatePfPKfii
	.globl	_Z17kernel_desaturatePfPKfii
	.p2align	3, 0x0
_Z17kernel_desaturatePfPKfii:
	.quad	_Z32__device_stub__kernel_desaturatePfPKfii
	.size	_Z17kernel_desaturatePfPKfii, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z23kernel_desaturate_alphaPfPKfii"
	.size	.L__unnamed_1, 35

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z17kernel_desaturatePfPKfii"
	.size	.L__unnamed_2, 29

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z38__device_stub__kernel_desaturate_alphaPfPKfii
	.addrsig_sym _Z32__device_stub__kernel_desaturatePfPKfii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z23kernel_desaturate_alphaPfPKfii
	.addrsig_sym _Z17kernel_desaturatePfPKfii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z23kernel_desaturate_alphaPfPKfii ; -- Begin function _Z23kernel_desaturate_alphaPfPKfii
	.globl	_Z23kernel_desaturate_alphaPfPKfii
	.p2align	8
	.type	_Z23kernel_desaturate_alphaPfPKfii,@function
_Z23kernel_desaturate_alphaPfPKfii:     ; @_Z23kernel_desaturate_alphaPfPKfii
; %bb.0:
	s_clause 0x2
	s_load_b32 s8, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x10
	s_load_b128 s[4:7], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s1, s8, 0xffff
	s_lshl_b32 s0, s2, 2
	s_mul_i32 s15, s15, s1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v1, s15, 3, v0
	v_cmp_gt_i32_e32 vcc_lo, s0, v1
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB0_2
; %bb.1:
	v_ashrrev_i32_e32 v2, 31, v1
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, s1, v1
	s_lshl_b32 s2, s1, 2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[7:8], 2, v[1:2]
	v_lshlrev_b64 v[5:6], 2, v[3:4]
	v_add_nc_u32_e32 v3, s1, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v7, vcc_lo, s6, v7
	v_lshlrev_b64 v[9:10], 2, v[3:4]
	v_add_nc_u32_e32 v3, s1, v3
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v8, vcc_lo
	v_add_co_u32 v5, vcc_lo, s6, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v6, vcc_lo
	v_add_co_u32 v9, vcc_lo, s6, v9
	v_lshlrev_b64 v[11:12], 2, v[3:4]
	v_add_nc_u32_e32 v3, s1, v3
	v_add_co_ci_u32_e32 v10, vcc_lo, s7, v10, vcc_lo
	s_clause 0x2
	global_load_b32 v13, v[7:8], off
	global_load_b32 v14, v[5:6], off
	global_load_b32 v15, v[9:10], off
	v_lshlrev_b64 v[5:6], 2, v[3:4]
	v_add_nc_u32_e32 v3, s1, v3
	v_add_co_u32 v7, vcc_lo, s6, v11
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[9:10], 2, v[3:4]
	v_add_nc_u32_e32 v3, s1, v3
	v_add_co_u32 v5, vcc_lo, s6, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v6, vcc_lo
	v_lshlrev_b64 v[11:12], 2, v[3:4]
	v_add_nc_u32_e32 v3, s1, v3
	v_add_co_u32 v9, vcc_lo, s6, v9
	v_add_co_ci_u32_e32 v10, vcc_lo, s7, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[2:3], 2, v[3:4]
	v_add_co_u32 v11, vcc_lo, s6, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s7, v12, vcc_lo
	v_add_co_u32 v2, vcc_lo, s6, v2
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
	s_clause 0x4
	global_load_b32 v4, v[7:8], off
	global_load_b32 v5, v[5:6], off
	global_load_b32 v6, v[9:10], off
	global_load_b32 v7, v[11:12], off
	global_load_b32 v2, v[2:3], off
	v_lshl_add_u32 v3, v0, 2, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v8, s2, v3
	v_add_nc_u32_e32 v9, s2, v8
	s_waitcnt vmcnt(7)
	ds_store_b32 v3, v13
	s_waitcnt vmcnt(6)
	ds_store_b32 v8, v14
	s_waitcnt vmcnt(5)
	ds_store_b32 v9, v15
	v_add_nc_u32_e32 v10, s2, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v11, s2, v10
	v_add_nc_u32_e32 v12, s2, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v16, s2, v12
	v_add_nc_u32_e32 v3, s2, v16
	s_waitcnt vmcnt(4)
	ds_store_b32 v10, v4
	s_waitcnt vmcnt(3)
	ds_store_b32 v11, v5
	s_waitcnt vmcnt(2)
	ds_store_b32 v12, v6
	s_waitcnt vmcnt(1)
	ds_store_b32 v16, v7
	s_waitcnt vmcnt(0)
	ds_store_b32 v3, v2
.LBB0_2:
	s_or_b32 exec_lo, exec_lo, s0
	s_lshl_b32 s0, s15, 2
	v_lshlrev_b32_e32 v3, 2, v0
	v_subrev_nc_u32_e32 v1, s0, v1
	v_add_lshl_u32 v4, v0, s1, 2
	s_cmp_lt_i32 s3, 2
	s_mov_b32 s2, 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB0_7
; %bb.3:                                ; %NodeBlock117
	s_cmp_gt_i32 s3, 2
	s_cbranch_scc0 .LBB0_8
; %bb.4:                                ; %NodeBlock115
	s_cmp_gt_i32 s3, 3
	s_cbranch_scc0 .LBB0_9
; %bb.5:                                ; %LeafBlock113
	s_cmp_eq_u32 s3, 4
	s_cbranch_scc0 .LBB0_10
; %bb.6:
	v_lshl_add_u32 v2, v3, 2, 0
	v_lshl_add_u32 v9, v4, 2, 0
	s_lshl_b32 s6, s1, 1
	ds_load_2addr_b32 v[5:6], v2 offset1:1
	ds_load_2addr_b32 v[7:8], v9 offset1:1
	ds_load_b32 v2, v2 offset:8
	ds_load_b32 v9, v9 offset:8
	s_waitcnt lgkmcnt(2)
	v_dual_add_f32 v5, v5, v6 :: v_dual_add_f32 v6, v7, v8
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v10, v5, v2 :: v_dual_add_f32 v9, v6, v9
	v_div_scale_f32 v11, null, 0x40400000, 0x40400000, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_div_scale_f32 v12, null, 0x40400000, 0x40400000, v9
	v_div_scale_f32 v15, vcc_lo, v10, 0x40400000, v10
	v_rcp_f32_e32 v13, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v14, v12
	v_div_scale_f32 v16, s0, v9, 0x40400000, v9
	s_waitcnt_depctr 0xfff
	v_fma_f32 v2, -v11, v13, 1.0
	v_fma_f32 v5, -v12, v14, 1.0
	v_dual_fmac_f32 v13, v2, v13 :: v_dual_fmac_f32 v14, v5, v14
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v17, v15, v13 :: v_dual_mul_f32 v18, v16, v14
	v_fma_f32 v5, -v11, v17, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v7, -v12, v18, v16
	v_dual_mov_b32 v6, 0 :: v_dual_fmac_f32 v17, v5, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_dual_fmac_f32 v18, v7, v14 :: v_dual_add_nc_u32 v5, s6, v1
	v_lshlrev_b64 v[7:8], 2, v[1:2]
	v_fma_f32 v2, -v11, v17, v15
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	v_fma_f32 v11, -v12, v18, v16
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v2, v2, v13, v17
	s_mov_b32 vcc_lo, s0
	s_mov_b32 s0, 0
	v_div_fmas_f32 v11, v11, v14, v18
	v_add_co_u32 v7, vcc_lo, s4, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v8, vcc_lo
	v_add_co_u32 v5, vcc_lo, s4, v5
	v_div_fixup_f32 v2, v2, 0x40400000, v10
	v_div_fixup_f32 v9, v11, 0x40400000, v9
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v6, vcc_lo
	s_clause 0x1
	global_store_b32 v[7:8], v2, off
	global_store_b32 v[5:6], v9, off
	s_branch .LBB0_11
.LBB0_7:
	s_mov_b32 s7, -1
	s_mov_b32 s0, 0
                                        ; implicit-def: $sgpr6
	s_branch .LBB0_18
.LBB0_8:
	s_mov_b32 s7, -1
	s_mov_b32 s0, 0
                                        ; implicit-def: $sgpr6
	s_branch .LBB0_15
.LBB0_9:
	s_mov_b32 s7, -1
	s_mov_b32 s0, 0
                                        ; implicit-def: $sgpr6
	s_branch .LBB0_12
.LBB0_10:
	s_mov_b32 s0, -1
                                        ; implicit-def: $sgpr6
.LBB0_11:                               ; %Flow123
	s_mov_b32 s7, 0
.LBB0_12:                               ; %Flow122
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s7
	s_cbranch_vccz .LBB0_14
; %bb.13:
	v_lshl_add_u32 v2, v3, 2, 0
	v_lshl_add_u32 v9, v4, 2, 0
	s_lshl_b32 s6, s1, 1
	v_mov_b32_e32 v10, 0
	ds_load_2addr_b32 v[5:6], v2 offset1:1
	ds_load_2addr_b32 v[7:8], v9 offset1:1
	ds_load_b32 v13, v2 offset:8
	ds_load_b32 v14, v9 offset:8
	v_add_nc_u32_e32 v9, s6, v1
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	v_lshlrev_b64 v[11:12], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v11, vcc_lo, s4, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s5, v12, vcc_lo
	s_waitcnt lgkmcnt(3)
	v_mul_f32_e32 v2, 0x3f170a3d, v6
	s_waitcnt lgkmcnt(2)
	v_mul_f32_e32 v8, 0x3f170a3d, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v2, 0x3e99999a, v5
	v_fmac_f32_e32 v8, 0x3e99999a, v7
	v_add_co_u32 v5, vcc_lo, s4, v9
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v10, vcc_lo
	s_waitcnt lgkmcnt(1)
	v_fmac_f32_e32 v2, 0x3de147ae, v13
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v8, 0x3de147ae, v14
	s_clause 0x1
	global_store_b32 v[11:12], v2, off
	global_store_b32 v[5:6], v8, off
.LBB0_14:                               ; %Flow124
	s_mov_b32 s7, 0
.LBB0_15:                               ; %Flow121
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s7
	s_cbranch_vccz .LBB0_17
; %bb.16:
	v_lshl_add_u32 v2, v3, 2, 0
	v_lshl_add_u32 v9, v4, 2, 0
	s_lshl_b32 s6, s1, 1
	v_mov_b32_e32 v10, 0
	ds_load_2addr_b32 v[5:6], v2 offset1:1
	ds_load_2addr_b32 v[7:8], v9 offset1:1
	ds_load_b32 v13, v2 offset:8
	ds_load_b32 v14, v9 offset:8
	v_add_nc_u32_e32 v9, s6, v1
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	v_lshlrev_b64 v[11:12], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v11, vcc_lo, s4, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s5, v12, vcc_lo
	s_waitcnt lgkmcnt(3)
	v_mul_f32_e32 v2, 0x3f3851ec, v6
	s_waitcnt lgkmcnt(2)
	v_mul_f32_e32 v8, 0x3f3851ec, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v2, 0x3e570a3d, v5
	v_fmac_f32_e32 v8, 0x3e570a3d, v7
	v_add_co_u32 v5, vcc_lo, s4, v9
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v10, vcc_lo
	s_waitcnt lgkmcnt(1)
	v_fmac_f32_e32 v2, 0x3d8f5c29, v13
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v8, 0x3d8f5c29, v14
	s_clause 0x1
	global_store_b32 v[11:12], v2, off
	global_store_b32 v[5:6], v8, off
.LBB0_17:                               ; %Flow125
	s_mov_b32 s7, 0
.LBB0_18:                               ; %Flow
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s7
	s_cbranch_vccz .LBB0_24
; %bb.19:                               ; %NodeBlock
	s_cmp_gt_i32 s3, 0
	s_cbranch_scc0 .LBB0_21
; %bb.20:
	v_lshl_add_u32 v2, v3, 2, 0
	v_lshl_add_u32 v9, v4, 2, 0
	s_lshl_b32 s6, s1, 1
	v_mov_b32_e32 v10, 0
	s_mov_b32 s7, 0
	ds_load_2addr_b32 v[5:6], v2 offset1:1
	ds_load_b32 v13, v2 offset:8
	ds_load_2addr_b32 v[7:8], v9 offset1:1
	ds_load_b32 v14, v9 offset:8
	v_add_nc_u32_e32 v9, s6, v1
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	v_lshlrev_b64 v[11:12], 2, v[1:2]
	s_waitcnt lgkmcnt(2)
	v_max3_f32 v2, v5, v6, v13
	v_min3_f32 v13, v5, v6, v13
	s_waitcnt lgkmcnt(0)
	v_max3_f32 v15, v7, v8, v14
	v_min3_f32 v7, v7, v8, v14
	v_add_co_u32 v5, vcc_lo, s4, v11
	v_add_f32_e32 v2, v2, v13
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f32_e32 v11, v15, v7
	v_add_co_u32 v7, vcc_lo, s4, v9
	v_mul_f32_e32 v2, 0.5, v2
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_mul_f32_e32 v9, 0.5, v11
	s_clause 0x1
	global_store_b32 v[5:6], v2, off
	global_store_b32 v[7:8], v9, off
	s_branch .LBB0_22
.LBB0_21:
	s_mov_b32 s7, -1
                                        ; implicit-def: $sgpr6
.LBB0_22:                               ; %Flow127
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s7
	s_cbranch_vccnz .LBB0_24
; %bb.23:                               ; %LeafBlock
	s_cmp_lg_u32 s3, 0
	s_mov_b32 s2, -1
	s_cselect_b32 s0, -1, 0
                                        ; implicit-def: $sgpr6
.LBB0_24:                               ; %Flow126
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccz .LBB0_26
; %bb.25:                               ; %._crit_edge
	s_lshl_b32 s6, s1, 1
	s_mov_b32 s2, 0
.LBB0_26:                               ; %Flow129
	v_lshl_add_u32 v3, v3, 2, 0
	v_lshl_add_u32 v4, v4, 2, 0
	s_and_not1_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB0_28
; %bb.27:
	ds_load_2addr_b32 v[5:6], v3 offset1:1
	ds_load_b32 v13, v3 offset:8
	ds_load_2addr_b32 v[7:8], v4 offset1:1
	ds_load_b32 v14, v4 offset:8
	v_ashrrev_i32_e32 v2, 31, v1
	s_lshl_b32 s6, s1, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_mov_b32 v10, 0 :: v_dual_add_nc_u32 v9, s6, v1
	v_lshlrev_b64 v[11:12], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	v_add_co_u32 v11, vcc_lo, s4, v11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v12, vcc_lo, s5, v12, vcc_lo
	v_add_co_u32 v9, vcc_lo, s4, v9
	s_waitcnt lgkmcnt(2)
	v_max3_f32 v2, v5, v6, v13
	v_add_co_ci_u32_e32 v10, vcc_lo, s5, v10, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_max3_f32 v5, v7, v8, v14
	s_clause 0x1
	global_store_b32 v[11:12], v2, off
	global_store_b32 v[9:10], v5, off
.LBB0_28:
	v_dual_mov_b32 v2, 0 :: v_dual_add_nc_u32 v5, v1, v0
	v_add_nc_u32_e32 v0, s6, v0
	ds_load_b32 v7, v3 offset:12
	ds_load_b32 v8, v4 offset:12
	v_ashrrev_i32_e32 v6, 31, v5
	v_add3_u32 v1, v0, v1, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[3:4], 2, v[5:6]
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v2, vcc_lo, s4, v3
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v0, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	s_waitcnt lgkmcnt(1)
	global_store_b32 v[2:3], v7, off offset:4
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[0:1], v8, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z23kernel_desaturate_alphaPfPKfii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 19
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z23kernel_desaturate_alphaPfPKfii, .Lfunc_end0-_Z23kernel_desaturate_alphaPfPKfii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1988
; NumSgprs: 18
; NumVgprs: 19
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 19
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z17kernel_desaturatePfPKfii ; -- Begin function _Z17kernel_desaturatePfPKfii
	.globl	_Z17kernel_desaturatePfPKfii
	.p2align	8
	.type	_Z17kernel_desaturatePfPKfii,@function
_Z17kernel_desaturatePfPKfii:           ; @_Z17kernel_desaturatePfPKfii
; %bb.0:
	s_clause 0x2
	s_load_b32 s8, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x10
	s_load_b128 s[4:7], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s1, s8, 0xffff
	s_mul_i32 s0, s2, 3
	s_mul_i32 s15, s15, s1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, 6, v[0:1]
	v_cmp_gt_i32_e32 vcc_lo, s0, v1
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB1_2
; %bb.1:
	v_ashrrev_i32_e32 v2, 31, v1
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, s1, v1
	s_lshl_b32 s2, s1, 2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[7:8], 2, v[1:2]
	v_lshlrev_b64 v[5:6], 2, v[3:4]
	v_add_nc_u32_e32 v3, s1, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v7, vcc_lo, s6, v7
	v_lshlrev_b64 v[9:10], 2, v[3:4]
	v_add_nc_u32_e32 v3, s1, v3
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v8, vcc_lo
	v_add_co_u32 v5, vcc_lo, s6, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v6, vcc_lo
	global_load_b32 v13, v[7:8], off
	v_lshlrev_b64 v[7:8], 2, v[3:4]
	v_add_nc_u32_e32 v3, s1, v3
	v_add_co_u32 v9, vcc_lo, s6, v9
	v_add_co_ci_u32_e32 v10, vcc_lo, s7, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[11:12], 2, v[3:4]
	v_add_nc_u32_e32 v3, s1, v3
	v_add_co_u32 v7, vcc_lo, s6, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v8, vcc_lo
	v_lshlrev_b64 v[2:3], 2, v[3:4]
	v_add_co_u32 v11, vcc_lo, s6, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s7, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v2, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
	s_clause 0x4
	global_load_b32 v4, v[5:6], off
	global_load_b32 v5, v[9:10], off
	global_load_b32 v6, v[7:8], off
	global_load_b32 v7, v[11:12], off
	global_load_b32 v2, v[2:3], off
	v_lshl_add_u32 v3, v0, 2, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v8, s2, v3
	v_add_nc_u32_e32 v9, s2, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v10, s2, v9
	v_add_nc_u32_e32 v11, s2, v10
	s_waitcnt vmcnt(5)
	ds_store_b32 v3, v13
	v_add_nc_u32_e32 v3, s2, v11
	s_waitcnt vmcnt(4)
	ds_store_b32 v8, v4
	s_waitcnt vmcnt(3)
	ds_store_b32 v9, v5
	s_waitcnt vmcnt(2)
	ds_store_b32 v10, v6
	s_waitcnt vmcnt(1)
	ds_store_b32 v11, v7
	s_waitcnt vmcnt(0)
	ds_store_b32 v3, v2
.LBB1_2:
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v2, s1, v0
	s_lshl_b32 s0, s15, 2
	v_mul_u32_u24_e32 v3, 3, v0
	v_subrev_nc_u32_e32 v1, s0, v1
	s_cmp_lt_i32 s3, 2
	v_mul_u32_u24_e32 v0, 3, v2
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB1_7
; %bb.3:                                ; %NodeBlock106
	s_cmp_gt_i32 s3, 2
	s_cbranch_scc0 .LBB1_8
; %bb.4:                                ; %NodeBlock104
	s_cmp_gt_i32 s3, 3
	s_cbranch_scc0 .LBB1_9
; %bb.5:                                ; %LeafBlock102
	s_cmp_eq_u32 s3, 4
	s_mov_b32 s2, 0
	s_cbranch_scc0 .LBB1_10
; %bb.6:
	v_lshl_add_u32 v2, v3, 2, 0
	v_lshl_add_u32 v8, v0, 2, 0
	ds_load_2addr_b32 v[4:5], v2 offset1:1
	ds_load_2addr_b32 v[6:7], v8 offset1:1
	ds_load_b32 v2, v2 offset:8
	ds_load_b32 v8, v8 offset:8
	s_waitcnt lgkmcnt(2)
	v_dual_add_f32 v4, v4, v5 :: v_dual_add_f32 v5, v6, v7
	s_waitcnt lgkmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f32_e32 v6, v4, v2
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v8, v5, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_scale_f32 v2, null, 0x40400000, 0x40400000, v6
	v_div_scale_f32 v4, null, 0x40400000, 0x40400000, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v5, v2
	v_rcp_f32_e32 v7, v4
	s_waitcnt_depctr 0xfff
	v_fma_f32 v9, -v2, v5, 1.0
	v_fma_f32 v10, -v4, v7, 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v5, v9, v5
	v_div_scale_f32 v11, vcc_lo, v6, 0x40400000, v6
	v_fmac_f32_e32 v7, v10, v7
	v_div_scale_f32 v9, s0, v8, 0x40400000, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v10, v11, v5
	v_mul_f32_e32 v12, v9, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v13, -v2, v10, v11
	v_fma_f32 v14, -v4, v12, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v10, v13, v5
	v_fmac_f32_e32 v12, v14, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f32 v11, -v2, v10, v11
	v_ashrrev_i32_e32 v2, 31, v1
	v_fma_f32 v9, -v4, v12, v9
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_div_fmas_f32 v10, v11, v5, v10
	v_lshlrev_b64 v[4:5], 2, v[1:2]
	s_mov_b32 vcc_lo, s0
	s_mov_b32 s0, -1
	v_div_fmas_f32 v2, v9, v7, v12
	v_div_fixup_f32 v9, v10, 0x40400000, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_co_u32 v6, vcc_lo, s4, v4
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v5, vcc_lo
	v_div_fixup_f32 v4, v2, 0x40400000, v8
	global_store_b32 v[6:7], v9, off
	s_branch .LBB1_11
.LBB1_7:
	s_mov_b32 s2, -1
	s_mov_b32 s0, 0
                                        ; implicit-def: $vgpr4
	s_branch .LBB1_17
.LBB1_8:
	s_mov_b32 s2, -1
	s_mov_b32 s0, 0
                                        ; implicit-def: $vgpr4
	s_branch .LBB1_14
.LBB1_9:
	s_mov_b32 s2, -1
.LBB1_10:                               ; %Flow111
	s_mov_b32 s0, 0
                                        ; implicit-def: $vgpr4
.LBB1_11:                               ; %Flow111
	s_and_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccz .LBB1_13
; %bb.12:
	v_lshl_add_u32 v2, v3, 2, 0
	v_lshl_add_u32 v4, v0, 2, 0
	s_mov_b32 s0, -1
	ds_load_2addr_b32 v[5:6], v2 offset1:1
	ds_load_2addr_b32 v[7:8], v4 offset1:1
	ds_load_b32 v9, v2 offset:8
	ds_load_b32 v10, v4 offset:8
	v_ashrrev_i32_e32 v2, 31, v1
	s_waitcnt lgkmcnt(2)
	v_dual_mul_f32 v11, 0x3f170a3d, v6 :: v_dual_mul_f32 v4, 0x3f170a3d, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_fmac_f32 v11, 0x3e99999a, v5 :: v_dual_fmac_f32 v4, 0x3e99999a, v7
	v_lshlrev_b64 v[5:6], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v11, 0x3de147ae, v9 :: v_dual_fmac_f32 v4, 0x3de147ae, v10
	v_add_co_u32 v5, vcc_lo, s4, v5
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v6, vcc_lo
	global_store_b32 v[5:6], v11, off
.LBB1_13:                               ; %Flow113
	s_mov_b32 s2, 0
.LBB1_14:                               ; %Flow110
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccz .LBB1_16
; %bb.15:
	v_lshl_add_u32 v2, v3, 2, 0
	v_lshl_add_u32 v4, v0, 2, 0
	s_mov_b32 s0, -1
	ds_load_2addr_b32 v[5:6], v2 offset1:1
	ds_load_2addr_b32 v[7:8], v4 offset1:1
	ds_load_b32 v9, v2 offset:8
	ds_load_b32 v10, v4 offset:8
	v_ashrrev_i32_e32 v2, 31, v1
	s_waitcnt lgkmcnt(2)
	v_dual_mul_f32 v11, 0x3f3851ec, v6 :: v_dual_mul_f32 v4, 0x3f3851ec, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_fmac_f32 v11, 0x3e570a3d, v5 :: v_dual_fmac_f32 v4, 0x3e570a3d, v7
	v_lshlrev_b64 v[5:6], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v11, 0x3d8f5c29, v9 :: v_dual_fmac_f32 v4, 0x3d8f5c29, v10
	v_add_co_u32 v5, vcc_lo, s4, v5
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v6, vcc_lo
	global_store_b32 v[5:6], v11, off
.LBB1_16:                               ; %Flow114
	s_mov_b32 s2, 0
.LBB1_17:                               ; %Flow
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccz .LBB1_25
; %bb.18:                               ; %NodeBlock
	s_cmp_gt_i32 s3, 0
	s_mov_b32 s2, 0
	s_cbranch_scc0 .LBB1_20
; %bb.19:
	v_lshl_add_u32 v2, v3, 2, 0
	v_lshl_add_u32 v8, v0, 2, 0
	s_mov_b32 s0, -1
	ds_load_2addr_b32 v[4:5], v2 offset1:1
	ds_load_b32 v2, v2 offset:8
	ds_load_2addr_b32 v[6:7], v8 offset1:1
	ds_load_b32 v8, v8 offset:8
	s_waitcnt lgkmcnt(2)
	v_max3_f32 v9, v4, v5, v2
	v_min3_f32 v4, v4, v5, v2
	v_ashrrev_i32_e32 v2, 31, v1
	s_waitcnt lgkmcnt(0)
	v_max3_f32 v10, v6, v7, v8
	v_min3_f32 v6, v6, v7, v8
	v_add_f32_e32 v7, v9, v4
	v_lshlrev_b64 v[4:5], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v2, v10, v6
	v_mul_f32_e32 v8, 0.5, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v6, vcc_lo, s4, v4
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_mul_f32_e32 v4, 0.5, v2
	global_store_b32 v[6:7], v8, off
	s_branch .LBB1_21
.LBB1_20:
	s_mov_b32 s2, -1
                                        ; implicit-def: $vgpr4
.LBB1_21:                               ; %Flow116
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB1_25
; %bb.22:                               ; %LeafBlock
	s_cmp_eq_u32 s3, 0
	s_cbranch_scc1 .LBB1_24
; %bb.23:
                                        ; implicit-def: $vgpr4
	s_branch .LBB1_25
.LBB1_24:
	v_lshl_add_u32 v2, v3, 2, 0
	v_lshl_add_u32 v0, v0, 2, 0
	s_mov_b32 s0, -1
	ds_load_2addr_b32 v[3:4], v2 offset1:1
	ds_load_b32 v9, v2 offset:8
	ds_load_2addr_b32 v[5:6], v0 offset1:1
	ds_load_b32 v0, v0 offset:8
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 2, v[1:2]
	v_add_co_u32 v2, vcc_lo, s4, v7
	s_waitcnt lgkmcnt(2)
	v_max3_f32 v9, v3, v4, v9
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v8, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_max3_f32 v4, v5, v6, v0
	global_store_b32 v[2:3], v9, off
.LBB1_25:                               ; %Flow115
	s_and_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccz .LBB1_27
; %bb.26:                               ; %.sink.split
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v0, s1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_add_co_u32 v0, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	global_store_b32 v[0:1], v4, off
.LBB1_27:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17kernel_desaturatePfPKfii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 15
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z17kernel_desaturatePfPKfii, .Lfunc_end1-_Z17kernel_desaturatePfPKfii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1536
; NumSgprs: 18
; NumVgprs: 15
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 15
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         144
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z23kernel_desaturate_alphaPfPKfii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z23kernel_desaturate_alphaPfPKfii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     19
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         144
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z17kernel_desaturatePfPKfii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z17kernel_desaturatePfPKfii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     15
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
