#ifndef __CUDACC__
#define __CUDACC__
#endif
#include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include <cuda.h>
#include <device_functions.h>
#include <cuda_runtime_api.h>
#include <curand.h>
#include <curand_kernel.h>

#include <math.h>
#include <stdio.h>
#include <random>
#include <iomanip>
#include <iostream>

#define N 16
#define BLOCKSIZE 16

cudaError_t minmaxCuda(double *max, double *min, const double *a, float &time, float &seq_time);

__global__ void minmaxKernel(double *max, double *min, const double *a) {
	__shared__ double maxtile[BLOCKSIZE];
	__shared__ double mintile[BLOCKSIZE];
	
	unsigned int tid = threadIdx.x;
	unsigned int i = blockIdx.x * blockDim.x + threadIdx.x;
	maxtile[tid] = a[i];
	mintile[tid] = a[i];
	__syncthreads();
	
	// strided index and non-divergent branch
	for (unsigned int s = 1; s < blockDim.x; s *= 2) {
		int index = 2 * s * tid;
		if (index < blockDim.x) {
			if (maxtile[tid + s] > maxtile[tid])
				maxtile[tid] = maxtile[tid + s];
			if (mintile[tid + s] < mintile[tid])
				mintile[tid] = mintile[tid + s];
		}
		__syncthreads();
	}
	
	if (tid == 0) {
		max[blockIdx.x] = maxtile[0];
		min[blockIdx.x] = mintile[0];
	}
}

__global__ void seq_minmaxKernel(double *max, double *min, const double *a) {
	__shared__ double maxtile[BLOCKSIZE];
	__shared__ double mintile[BLOCKSIZE];
	
	unsigned int tid = threadIdx.x;
	unsigned int i = blockIdx.x * blockDim.x + threadIdx.x;
	maxtile[tid] = a[i];
	mintile[tid] = a[i];
	__syncthreads();
	
	//sequential addressing by reverse loop and thread-id based indexing
	for (unsigned int s = blockDim.x / 2; s > 0; s >>= 1) {
		if (tid < s) {
			if (maxtile[tid + s] > maxtile[tid])
				maxtile[tid] = maxtile[tid + s];
			if (mintile[tid + s] < mintile[tid])
				mintile[tid] = mintile[tid + s];
		}
		__syncthreads();
	}
	
	if (tid == 0) {
		max[blockIdx.x] = maxtile[0];
		min[blockIdx.x] = mintile[0];
	}
}

__global__ void finalminmaxKernel(double *max, double *min) {
	__shared__ double maxtile[BLOCKSIZE];
	__shared__ double mintile[BLOCKSIZE];

	unsigned int tid = threadIdx.x;
	unsigned int i = blockIdx.x * blockDim.x + threadIdx.x;
	maxtile[tid] = max[i];
	mintile[tid] = min[i];
	__syncthreads();
	
	// strided index and non-divergent branch
	for (unsigned int s = 1; s < blockDim.x; s *= 2) {
		int index = 2 * s * tid;
		if (index < blockDim.x) {
			if (maxtile[tid + s] > maxtile[tid])
				maxtile[tid] = maxtile[tid + s];
			if (mintile[tid + s] < mintile[tid])
				mintile[tid] = mintile[tid + s];
		}
		__syncthreads();
	}
	
	if (tid == 0) {
		max[blockIdx.x] = maxtile[0];
		min[blockIdx.x] = mintile[0];
	}
}

__global__ void seq_finalminmaxKernel(double *max, double *min) {
	__shared__ double maxtile[BLOCKSIZE];
	__shared__ double mintile[BLOCKSIZE];

	unsigned int tid = threadIdx.x;
	unsigned int i = blockIdx.x * blockDim.x + threadIdx.x;
	maxtile[tid] = max[i];
	mintile[tid] = min[i];
	__syncthreads();
	
	//sequential addressing by reverse loop and thread-id based indexing
	for (unsigned int s = blockDim.x / 2; s > 0; s >>= 1) {
		if (tid < s) {
			if (maxtile[tid + s] > maxtile[tid])
				maxtile[tid] = maxtile[tid + s];
			if (mintile[tid + s] < mintile[tid])
				mintile[tid] = mintile[tid + s];
		}
		__syncthreads();
	}
	
	if (tid == 0) {
		max[blockIdx.x] = maxtile[0];
		min[blockIdx.x] = mintile[0];
	}
}

int main()
{
    const double a[N*N] = {-8.5, -8.4, -6.8, -4.5, -4.2, -3.9, -3.4, -2.3, 1.5, 3.3, 4.3, 4.7, 6.5, 6.7, 8.0, 9.4,
							-7.3, -6.9, -6.0, -4.8, -4.4, -4.3, -3.8, -5.0, 2.5, 2.9, 5.8, 6.3, 6.7, 7.1, 8.0, 9.0,
							-9.0, -8.2, -6.0, -4.8, -1.7, -1.2, -1.0, 2.1, 2.7, 3.1, 4.0, 4.2, 7.3, 7.9, 8.1, 8.8,
							-9.4, -8.5, -7.2, -6.6, -5.1, -4.4, -3.8, -3.1, -1.9, 2.0, 1.7, 2.5, 3.3, 5.1, 5.7, 6.6,
							-9.6, -8.9, -5.9, -2.5, -2.1, -1.8, -8.0, 1.0, 1.7, 2.3, 3.0, 3.8, 5.3, 6.4, 8.4, 9.9,
							-9.7, -8.8, -8.1, -7.5, -4.9, -4.2, -2.2, -6.0, 2.1, 3.3, 3.5, 5.3, 5.8, 5.9, 6.7, 7.2,
							-9.5, -8.8, -8.3, -8.2, -7.1, -6.5, -4.4, -3.6, -1.1, -6.0, 2.5, 3.8, 4.5, 4.7, 7.1, 9.6,
							-9.6, -8.6, -8.4, -6.9, -5.5, -5.4, -4.8, -3.9, -3.6, -7.0, 9.0, 1.1, 3.4, 4.3, 5.8, 10.0,
							-9.7, -9.3, -6.1, -5.9, -4.9, -4.6, -4.2, -4.1, -1.8, 4.0, 1.4, 4.0, 5.0, 5.2, 7.3, 7.7,
							-7.9, -5.5, -5.0, -4.2, -4.1, -3.7, -1.5,  1.9, 4.5, 5.4, 6.1, 6.5, 6.7, 7.7, 8.1, 9.8,
							-8.6, -7.1, -5.3, -5.1, -4.5, -4.1, -2.7, -2.4, -2.1, -1.3, -7.0, 4.4, 6.7, 7.0, 8.2, 9.7,
							-9.2, -8.7, -7.9, -6.9, -6.7, -5.3, -2.6, -2.2, -1.9, -1.1, 4.0, 1.4, 6.9, 7.1, 7.9, 9.5,
							-9.9, -6.0, -4.8, -3.4, 4.0,   7.0,  1.2,  1.6, 4.5, 5.3, 6.5, 7.3, 7.6, 8.0, 9.0, 9.8,
							-9.6, -9.0, -6.7, -6.5, -4.8, -3.0, -2.4,  1.1, 1.2, 1.4, 4.0, 4.5, 4.9, 5.5, 7.0, 7.3,
							-8.5, -7.7, -7.1, -6.0, -5.1, -4.8, -3.7, -2.8, -1.8, -1.4, 2.0, 2.3, 4.8, 5.3, 6.4, 9.2,
							-9.4, -6.7, -5.2, -4.6, -3.2, -2.3, -1.9, -5.0, 2.0, 2.9, 3.2, 4.3, 4.7, 5.1, 6.4, 6.6};
    double *max;
	double *min;
	float time = 0.0f;
	float seq_time = 0.0f;

	max = (double *)malloc((N)*sizeof(double));
	min = (double *)malloc((N)*sizeof(double));

    cudaError_t cudaStatus = minmaxCuda(max, min, a, time, seq_time);
    if (cudaStatus != cudaSuccess) {
        fprintf(stderr, "minmaxCuda failed!");
        return 1;
    }

	/*for (int i = 0; i < N; i++) {
		std::cout << "Max[" << i << "] = " << max[i] << std::endl;
	}
	std::cout << std::endl;
	for (int i = 0; i < N; i++) {
		std::cout << "Min[" << i << "] = " << min[i] << std::endl;
	}*/

	std::cout << "Parallel Reduction GPU Implementation" << std::endl;
	std::cout << "Execution Time : " << time / 1000 << " seconds" << std::endl;
	std::cout << "Effective Bandwidth : " << (N*N*sizeof(double)*2) / (time / 1000) << " GB/s" << std::endl;
	std::cout << std::endl;

	std::cout << "Parallel Reduction Sequential Addressing GPU Implementation" << std::endl;
	std::cout << "Execution Time : " << seq_time / 1000 << " seconds" << std::endl;
	std::cout << "Effective Bandwidth : " << (N*N*sizeof(double)*2) / (seq_time / 1000) << " GB/s" << std::endl;
	std::cout << std::endl;

	std::cout << "Max value: " << max[0] << std::endl;
	std::cout << "Min value: " << min[0] << std::endl;

    cudaStatus = cudaDeviceReset();
    if (cudaStatus != cudaSuccess) {
        fprintf(stderr, "cudaDeviceReset failed!");
        return 1;
    }

    return 0;
}

cudaError_t minmaxCuda(double *max, double *min, const double *a, float &time, float &seq_time)
{
    double *dev_a = 0;
    double *dev_max = 0;
	double *dev_min = 0;
	float milliseconds = 0;
	float milliseconds1 = 0;
	dim3 dimBlock(BLOCKSIZE);
    dim3 dimGrid(N);
    cudaError_t cudaStatus;
	cudaEvent_t start, stop;
	cudaEvent_t start1, stop1;
	cudaEventCreate(&start);
	cudaEventCreate(&stop);
	cudaEventCreate(&start1);
	cudaEventCreate(&stop1);

    cudaStatus = cudaSetDevice(0);
    if (cudaStatus != cudaSuccess) {
        fprintf(stderr, "cudaSetDevice failed!  Do you have a CUDA-capable GPU installed?");
        goto Error;
    }

    cudaStatus = cudaMalloc((void**)&dev_max, N * sizeof(double));
    if (cudaStatus != cudaSuccess) {
        fprintf(stderr, "cudaMalloc failed!");
        goto Error;
    }

	cudaStatus = cudaMalloc((void**)&dev_min, N * sizeof(double));
    if (cudaStatus != cudaSuccess) {
        fprintf(stderr, "cudaMalloc failed!");
        goto Error;
    }

    cudaStatus = cudaMalloc((void**)&dev_a, N * N * sizeof(double));
    if (cudaStatus != cudaSuccess) {
        fprintf(stderr, "cudaMalloc failed!");
        goto Error;
    }

    cudaStatus = cudaMemcpy(dev_a, a, N * N * sizeof(double), cudaMemcpyHostToDevice);
    if (cudaStatus != cudaSuccess) {
        fprintf(stderr, "cudaMemcpy failed!");
        goto Error;
    }

	cudaEventRecord(start);
    minmaxKernel<<<dimGrid, dimBlock>>>(dev_max, dev_min, dev_a);
	cudaThreadSynchronize();
	finalminmaxKernel<<<1, dimBlock>>>(dev_max, dev_min);
	cudaEventRecord(stop);
	cudaEventSynchronize(stop);
	cudaThreadSynchronize();

	cudaEventRecord(start1);
    seq_minmaxKernel<<<dimGrid, dimBlock>>>(dev_max, dev_min, dev_a);
	cudaThreadSynchronize();
	seq_finalminmaxKernel<<<1, dimBlock>>>(dev_max, dev_min);
	cudaEventRecord(stop1);
	cudaEventSynchronize(stop1);
	cudaThreadSynchronize();

    cudaStatus = cudaGetLastError();
    if (cudaStatus != cudaSuccess) {
        fprintf(stderr, "minmaxKernel launch failed: %s\n", cudaGetErrorString(cudaStatus));
        goto Error;
    }
    
    cudaStatus = cudaDeviceSynchronize();
    if (cudaStatus != cudaSuccess) {
        fprintf(stderr, "cudaDeviceSynchronize returned error code %d after launching minmaxKernel!\n", cudaStatus);
        goto Error;
    }

    cudaStatus = cudaMemcpy(max, dev_max, N * sizeof(double), cudaMemcpyDeviceToHost);
    if (cudaStatus != cudaSuccess) {
        fprintf(stderr, "cudaMemcpy failed!");
        goto Error;
    }

	cudaStatus = cudaMemcpy(min, dev_min, N * sizeof(double), cudaMemcpyDeviceToHost);
    if (cudaStatus != cudaSuccess) {
        fprintf(stderr, "cudaMemcpy failed!");
        goto Error;
    }

	cudaEventElapsedTime(&milliseconds, start, stop);
	cudaEventElapsedTime(&milliseconds1, start1, stop1);
	time = milliseconds;
	seq_time = milliseconds1;

Error:
    cudaFree(dev_max);
	cudaFree(dev_min);
    cudaFree(dev_a);
    
    return cudaStatus;
}

	.file	"tmpxft_00243f46_00000000-6_kernel.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB5217:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE5217:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.align 2
	.type	_ZNSolsEPFRSoS_E.isra.0, @function
_ZNSolsEPFRSoS_E.isra.0:
.LFB5929:
	.cfi_startproc
	jmp	*%rsi
	.cfi_endproc
.LFE5929:
	.size	_ZNSolsEPFRSoS_E.isra.0, .-_ZNSolsEPFRSoS_E.isra.0
	.globl	_Z37__device_stub__Z12minmaxKernelPdS_PKdPdS_PKd
	.type	_Z37__device_stub__Z12minmaxKernelPdS_PKdPdS_PKd, @function
_Z37__device_stub__Z12minmaxKernelPdS_PKdPdS_PKd:
.LFB5239:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L3
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z12minmaxKernelPdS_PKd(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L3:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L5
	call	__stack_chk_fail@PLT
.L5:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE5239:
	.size	_Z37__device_stub__Z12minmaxKernelPdS_PKdPdS_PKd, .-_Z37__device_stub__Z12minmaxKernelPdS_PKdPdS_PKd
	.globl	_Z12minmaxKernelPdS_PKd
	.type	_Z12minmaxKernelPdS_PKd, @function
_Z12minmaxKernelPdS_PKd:
.LFB5240:
	.cfi_startproc
	endbr64
	jmp	_Z37__device_stub__Z12minmaxKernelPdS_PKdPdS_PKd
	.cfi_endproc
.LFE5240:
	.size	_Z12minmaxKernelPdS_PKd, .-_Z12minmaxKernelPdS_PKd
	.globl	_Z41__device_stub__Z16seq_minmaxKernelPdS_PKdPdS_PKd
	.type	_Z41__device_stub__Z16seq_minmaxKernelPdS_PKdPdS_PKd, @function
_Z41__device_stub__Z16seq_minmaxKernelPdS_PKdPdS_PKd:
.LFB5241:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L9
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z16seq_minmaxKernelPdS_PKd(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L9:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L11
	call	__stack_chk_fail@PLT
.L11:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE5241:
	.size	_Z41__device_stub__Z16seq_minmaxKernelPdS_PKdPdS_PKd, .-_Z41__device_stub__Z16seq_minmaxKernelPdS_PKdPdS_PKd
	.globl	_Z16seq_minmaxKernelPdS_PKd
	.type	_Z16seq_minmaxKernelPdS_PKd, @function
_Z16seq_minmaxKernelPdS_PKd:
.LFB5242:
	.cfi_startproc
	endbr64
	jmp	_Z41__device_stub__Z16seq_minmaxKernelPdS_PKdPdS_PKd
	.cfi_endproc
.LFE5242:
	.size	_Z16seq_minmaxKernelPdS_PKd, .-_Z16seq_minmaxKernelPdS_PKd
	.globl	_Z39__device_stub__Z17finalminmaxKernelPdS_PdS_
	.type	_Z39__device_stub__Z17finalminmaxKernelPdS_PdS_, @function
_Z39__device_stub__Z17finalminmaxKernelPdS_PdS_:
.LFB5243:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L14
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z17finalminmaxKernelPdS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L14:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L16
	call	__stack_chk_fail@PLT
.L16:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE5243:
	.size	_Z39__device_stub__Z17finalminmaxKernelPdS_PdS_, .-_Z39__device_stub__Z17finalminmaxKernelPdS_PdS_
	.globl	_Z17finalminmaxKernelPdS_
	.type	_Z17finalminmaxKernelPdS_, @function
_Z17finalminmaxKernelPdS_:
.LFB5244:
	.cfi_startproc
	endbr64
	jmp	_Z39__device_stub__Z17finalminmaxKernelPdS_PdS_
	.cfi_endproc
.LFE5244:
	.size	_Z17finalminmaxKernelPdS_, .-_Z17finalminmaxKernelPdS_
	.globl	_Z43__device_stub__Z21seq_finalminmaxKernelPdS_PdS_
	.type	_Z43__device_stub__Z21seq_finalminmaxKernelPdS_PdS_, @function
_Z43__device_stub__Z21seq_finalminmaxKernelPdS_PdS_:
.LFB5245:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L19
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z21seq_finalminmaxKernelPdS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L19:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L21
	call	__stack_chk_fail@PLT
.L21:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE5245:
	.size	_Z43__device_stub__Z21seq_finalminmaxKernelPdS_PdS_, .-_Z43__device_stub__Z21seq_finalminmaxKernelPdS_PdS_
	.globl	_Z21seq_finalminmaxKernelPdS_
	.type	_Z21seq_finalminmaxKernelPdS_, @function
_Z21seq_finalminmaxKernelPdS_:
.LFB5246:
	.cfi_startproc
	endbr64
	jmp	_Z43__device_stub__Z21seq_finalminmaxKernelPdS_PdS_
	.cfi_endproc
.LFE5246:
	.size	_Z21seq_finalminmaxKernelPdS_, .-_Z21seq_finalminmaxKernelPdS_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"cudaSetDevice failed!  Do you have a CUDA-capable GPU installed?"
.LC3:
	.string	"cudaMalloc failed!"
.LC4:
	.string	"cudaMemcpy failed!"
.LC5:
	.string	"minmaxKernel launch failed: %s\n"
.LC6:
	.string	"cudaDeviceSynchronize returned error code %d after launching minmaxKernel!\n"
	.text
	.globl	_Z10minmaxCudaPdS_PKdRfS2_
	.type	_Z10minmaxCudaPdS_PKdRfS2_, @function
_Z10minmaxCudaPdS_PKdRfS2_:
.LFB5214:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rdx, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rdi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rsi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rcx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%r8, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	xorl	%eax, %eax
	leaq	32(%rsp), %rdi
	movl	$0x00000000, (%rsp)
	movq	%rax, 8(%rsp)
	movq	%rax, 16(%rsp)
	movq	%rax, 24(%rsp)
	movl	$268435457, %eax
	salq	$4, %rax
	movl	$0x00000000, 4(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	movq	%rax, 80(%rsp)
	movl	$1, 88(%rsp)
	call	cudaEventCreate@PLT
	leaq	40(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	48(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	56(%rsp), %rdi
	call	cudaEventCreate@PLT
	xorl	%edi, %edi
	call	cudaSetDevice@PLT
	leaq	.LC2(%rip), %rdx
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L41
	leaq	16(%rsp), %rdi
	movl	$128, %esi
	call	cudaMalloc@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L27
.L42:
	leaq	.LC3(%rip), %rdx
.L41:
	movq	stderr(%rip), %rdi
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	jmp	.L26
.L27:
	leaq	24(%rsp), %rdi
	movl	$128, %esi
	call	cudaMalloc@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L42
	leaq	8(%rsp), %rdi
	movl	$2048, %esi
	call	cudaMalloc@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L42
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movl	$2048, %edx
	movq	%r15, %rsi
	call	cudaMemcpy@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L43
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	76(%rsp), %ecx
	movl	88(%rsp), %esi
	xorl	%r9d, %r9d
	movq	68(%rsp), %rdx
	movq	80(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L31
	movq	8(%rsp), %rdx
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	call	_Z37__device_stub__Z12minmaxKernelPdS_PKdPdS_PKd
.L31:
	call	cudaThreadSynchronize@PLT
	movl	76(%rsp), %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	68(%rsp), %rdx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movl	$1, 100(%rsp)
	movq	%rdi, 92(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L32
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	call	_Z39__device_stub__Z17finalminmaxKernelPdS_PdS_
.L32:
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	40(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	call	cudaThreadSynchronize@PLT
	movq	48(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	76(%rsp), %ecx
	movl	88(%rsp), %esi
	xorl	%r9d, %r9d
	movq	68(%rsp), %rdx
	movq	80(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L33
	movq	8(%rsp), %rdx
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	call	_Z41__device_stub__Z16seq_minmaxKernelPdS_PKdPdS_PKd
.L33:
	call	cudaThreadSynchronize@PLT
	movl	76(%rsp), %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	68(%rsp), %rdx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movl	$1, 100(%rsp)
	movq	%rdi, 92(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L34
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	call	_Z43__device_stub__Z21seq_finalminmaxKernelPdS_PdS_
.L34:
	movq	56(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	56(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	call	cudaThreadSynchronize@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L35
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	movq	stderr(%rip), %rdi
	movl	$2, %esi
	leaq	.LC5(%rip), %rdx
	movq	%rax, %rcx
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	jmp	.L26
.L35:
	call	cudaDeviceSynchronize@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L36
	movq	stderr(%rip), %rdi
	movl	%eax, %ecx
	movl	$2, %esi
	xorl	%eax, %eax
	leaq	.LC6(%rip), %rdx
	call	__fprintf_chk@PLT
	jmp	.L26
.L36:
	movq	16(%rsp), %rsi
	movl	$2, %ecx
	movl	$128, %edx
	movq	%r14, %rdi
	call	cudaMemcpy@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jne	.L43
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movl	$128, %edx
	movq	%r13, %rdi
	call	cudaMemcpy@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L38
.L43:
	leaq	.LC4(%rip), %rdx
	jmp	.L41
.L38:
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	movq	%rsp, %rdi
	call	cudaEventElapsedTime@PLT
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rsi
	leaq	4(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movss	(%rsp), %xmm0
	movss	%xmm0, (%r12)
	movss	4(%rsp), %xmm0
	movss	%xmm0, 0(%rbp)
.L26:
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L39
	call	__stack_chk_fail@PLT
.L39:
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	movl	%ebx, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE5214:
	.size	_Z10minmaxCudaPdS_PKdRfS2_, .-_Z10minmaxCudaPdS_PKdRfS2_
	.section	.rodata.str1.1
.LC7:
	.string	"minmaxCuda failed!"
.LC8:
	.string	"Parallel Reduction GPU Implementation"
.LC9:
	.string	"Execution Time : "
.LC11:
	.string	" seconds"
.LC12:
	.string	"Effective Bandwidth : "
.LC14:
	.string	" GB/s"
.LC15:
	.string	"Parallel Reduction Sequential Addressing GPU Implementation"
.LC16:
	.string	"Max value: "
.LC17:
	.string	"Min value: "
.LC18:
	.string	"cudaDeviceReset failed!"
	.section	.rodata
	.align 32
.LC0:
	.long	0
	.long	-1071579136
	.long	-858993459
	.long	-1071592244
	.long	858993459
	.long	-1071959245
	.long	0
	.long	-1072562176
	.long	-858993459
	.long	-1072640820
	.long	858993459
	.long	-1072745677
	.long	858993459
	.long	-1073007821
	.long	1717986918
	.long	-1073584538
	.long	0
	.long	1073217536
	.long	1717986918
	.long	1074423398
	.long	858993459
	.long	1074869043
	.long	-858993459
	.long	1074973900
	.long	0
	.long	1075445760
	.long	-858993459
	.long	1075498188
	.long	0
	.long	1075838976
	.long	-858993459
	.long	1076022476
	.long	858993459
	.long	-1071828173
	.long	-1717986918
	.long	-1071933031
	.long	0
	.long	-1072168960
	.long	858993459
	.long	-1072483533
	.long	-1717986918
	.long	-1072588391
	.long	858993459
	.long	-1072614605
	.long	1717986918
	.long	-1072798106
	.long	0
	.long	-1072431104
	.long	0
	.long	1074003968
	.long	858993459
	.long	1074213683
	.long	858993459
	.long	1075262259
	.long	858993459
	.long	1075393331
	.long	-858993459
	.long	1075498188
	.long	1717986918
	.long	1075603046
	.long	0
	.long	1075838976
	.long	0
	.long	1075970048
	.long	0
	.long	-1071513600
	.long	1717986918
	.long	-1071618458
	.long	0
	.long	-1072168960
	.long	858993459
	.long	-1072483533
	.long	858993459
	.long	-1074056397
	.long	858993459
	.long	-1074580685
	.long	0
	.long	-1074790400
	.long	-858993459
	.long	1073794252
	.long	-1717986918
	.long	1074108825
	.long	-858993459
	.long	1074318540
	.long	0
	.long	1074790400
	.long	-858993459
	.long	1074842828
	.long	858993459
	.long	1075655475
	.long	-1717986918
	.long	1075812761
	.long	858993459
	.long	1075852083
	.long	-1717986918
	.long	1075943833
	.long	-858993459
	.long	-1071461172
	.long	0
	.long	-1071579136
	.long	-858993459
	.long	-1071854388
	.long	1717986918
	.long	-1072011674
	.long	1717986918
	.long	-1072404890
	.long	-1717986918
	.long	-1072588391
	.long	1717986918
	.long	-1072798106
	.long	-858993459
	.long	-1073165108
	.long	1717986918
	.long	-1073846682
	.long	0
	.long	1073741824
	.long	858993459
	.long	1073427251
	.long	0
	.long	1074003968
	.long	1717986918
	.long	1074423398
	.long	1717986918
	.long	1075078758
	.long	-858993459
	.long	1075236044
	.long	1717986918
	.long	1075471974
	.long	858993459
	.long	-1071434957
	.long	-858993459
	.long	-1071526708
	.long	-1717986918
	.long	-1072195175
	.long	0
	.long	-1073479680
	.long	-858993459
	.long	-1073689396
	.long	-858993459
	.long	-1073951540
	.long	0
	.long	-1071644672
	.long	0
	.long	1072693248
	.long	858993459
	.long	1073427251
	.long	1717986918
	.long	1073899110
	.long	0
	.long	1074266112
	.long	1717986918
	.long	1074685542
	.long	858993459
	.long	1075131187
	.long	-1717986918
	.long	1075419545
	.long	-858993459
	.long	1075891404
	.long	-858993459
	.long	1076088012
	.long	1717986918
	.long	-1071421850
	.long	-1717986918
	.long	-1071539815
	.long	858993459
	.long	-1071631565
	.long	0
	.long	-1071775744
	.long	-1717986918
	.long	-1072457319
	.long	-858993459
	.long	-1072640820
	.long	-1717986918
	.long	-1073636967
	.long	0
	.long	-1072168960
	.long	-858993459
	.long	1073794252
	.long	1717986918
	.long	1074423398
	.long	0
	.long	1074528256
	.long	858993459
	.long	1075131187
	.long	858993459
	.long	1075262259
	.long	-1717986918
	.long	1075288473
	.long	-858993459
	.long	1075498188
	.long	-858993459
	.long	1075629260
	.long	0
	.long	-1071448064
	.long	-1717986918
	.long	-1071539815
	.long	-1717986918
	.long	-1071605351
	.long	1717986918
	.long	-1071618458
	.long	1717986918
	.long	-1071880602
	.long	0
	.long	-1072037888
	.long	-1717986918
	.long	-1072588391
	.long	-858993459
	.long	-1072902964
	.long	-1717986918
	.long	-1074685543
	.long	0
	.long	-1072168960
	.long	0
	.long	1074003968
	.long	1717986918
	.long	1074685542
	.long	0
	.long	1074921472
	.long	-858993459
	.long	1074973900
	.long	1717986918
	.long	1075603046
	.long	858993459
	.long	1076048691
	.long	858993459
	.long	-1071434957
	.long	858993459
	.long	-1071566029
	.long	-858993459
	.long	-1071592244
	.long	-1717986918
	.long	-1071933031
	.long	0
	.long	-1072300032
	.long	-1717986918
	.long	-1072326247
	.long	858993459
	.long	-1072483533
	.long	858993459
	.long	-1072745677
	.long	-858993459
	.long	-1072902964
	.long	0
	.long	-1071906816
	.long	0
	.long	1075970048
	.long	-1717986918
	.long	1072798105
	.long	858993459
	.long	1074475827
	.long	858993459
	.long	1074869043
	.long	858993459
	.long	1075262259
	.long	0
	.long	1076101120
	.long	1717986918
	.long	-1071421850
	.long	-1717986918
	.long	-1071474279
	.long	1717986918
	.long	-1072142746
	.long	-1717986918
	.long	-1072195175
	.long	-1717986918
	.long	-1072457319
	.long	1717986918
	.long	-1072535962
	.long	-858993459
	.long	-1072640820
	.long	1717986918
	.long	-1072667034
	.long	-858993459
	.long	-1073951540
	.long	0
	.long	1074790400
	.long	1717986918
	.long	1073112678
	.long	0
	.long	1074790400
	.long	0
	.long	1075052544
	.long	-858993459
	.long	1075104972
	.long	858993459
	.long	1075655475
	.long	-858993459
	.long	1075760332
	.long	-1717986918
	.long	-1071670887
	.long	0
	.long	-1072300032
	.long	0
	.long	-1072431104
	.long	-858993459
	.long	-1072640820
	.long	1717986918
	.long	-1072667034
	.long	-1717986918
	.long	-1072850535
	.long	0
	.long	-1074266112
	.long	1717986918
	.long	1073636966
	.long	0
	.long	1074921472
	.long	-1717986918
	.long	1075157401
	.long	1717986918
	.long	1075340902
	.long	0
	.long	1075445760
	.long	-858993459
	.long	1075498188
	.long	-858993459
	.long	1075760332
	.long	858993459
	.long	1075852083
	.long	-1717986918
	.long	1076074905
	.long	858993459
	.long	-1071566029
	.long	1717986918
	.long	-1071880602
	.long	858993459
	.long	-1072352461
	.long	1717986918
	.long	-1072404890
	.long	0
	.long	-1072562176
	.long	1717986918
	.long	-1072667034
	.long	-1717986918
	.long	-1073374823
	.long	858993459
	.long	-1073532109
	.long	-858993459
	.long	-1073689396
	.long	-858993459
	.long	-1074475828
	.long	0
	.long	-1071906816
	.long	-1717986918
	.long	1074895257
	.long	-858993459
	.long	1075498188
	.long	0
	.long	1075576832
	.long	1717986918
	.long	1075865190
	.long	1717986918
	.long	1076061798
	.long	1717986918
	.long	-1071487386
	.long	1717986918
	.long	-1071552922
	.long	-1717986918
	.long	-1071670887
	.long	-1717986918
	.long	-1071933031
	.long	-858993459
	.long	-1071985460
	.long	858993459
	.long	-1072352461
	.long	-858993459
	.long	-1073427252
	.long	-1717986918
	.long	-1073636967
	.long	1717986918
	.long	-1073846682
	.long	-1717986918
	.long	-1074685543
	.long	0
	.long	1074790400
	.long	1717986918
	.long	1073112678
	.long	-1717986918
	.long	1075550617
	.long	1717986918
	.long	1075603046
	.long	-1717986918
	.long	1075812761
	.long	0
	.long	1076035584
	.long	-858993459
	.long	-1071395636
	.long	0
	.long	-1072168960
	.long	858993459
	.long	-1072483533
	.long	858993459
	.long	-1073007821
	.long	0
	.long	1074790400
	.long	0
	.long	1075576832
	.long	858993459
	.long	1072902963
	.long	-1717986918
	.long	1073322393
	.long	0
	.long	1074921472
	.long	858993459
	.long	1075131187
	.long	0
	.long	1075445760
	.long	858993459
	.long	1075655475
	.long	1717986918
	.long	1075734118
	.long	0
	.long	1075838976
	.long	0
	.long	1075970048
	.long	-1717986918
	.long	1076074905
	.long	858993459
	.long	-1071434957
	.long	0
	.long	-1071513600
	.long	-858993459
	.long	-1071985460
	.long	0
	.long	-1072037888
	.long	858993459
	.long	-1072483533
	.long	0
	.long	-1073217536
	.long	858993459
	.long	-1073532109
	.long	-1717986918
	.long	1072798105
	.long	858993459
	.long	1072902963
	.long	1717986918
	.long	1073112678
	.long	0
	.long	1074790400
	.long	0
	.long	1074921472
	.long	-1717986918
	.long	1075026329
	.long	0
	.long	1075183616
	.long	0
	.long	1075576832
	.long	858993459
	.long	1075655475
	.long	0
	.long	-1071579136
	.long	-858993459
	.long	-1071723316
	.long	1717986918
	.long	-1071880602
	.long	0
	.long	-1072168960
	.long	1717986918
	.long	-1072404890
	.long	858993459
	.long	-1072483533
	.long	-1717986918
	.long	-1072850535
	.long	1717986918
	.long	-1073322394
	.long	-858993459
	.long	-1073951540
	.long	1717986918
	.long	-1074370970
	.long	0
	.long	1073741824
	.long	1717986918
	.long	1073899110
	.long	858993459
	.long	1075000115
	.long	858993459
	.long	1075131187
	.long	-1717986918
	.long	1075419545
	.long	1717986918
	.long	1075996262
	.long	-858993459
	.long	-1071461172
	.long	-858993459
	.long	-1071985460
	.long	-858993459
	.long	-1072378676
	.long	1717986918
	.long	-1072535962
	.long	-1717986918
	.long	-1073112679
	.long	1717986918
	.long	-1073584538
	.long	1717986918
	.long	-1073846682
	.long	0
	.long	-1072431104
	.long	0
	.long	1073741824
	.long	858993459
	.long	1074213683
	.long	-1717986918
	.long	1074370969
	.long	858993459
	.long	1074869043
	.long	-858993459
	.long	1074973900
	.long	1717986918
	.long	1075078758
	.long	-1717986918
	.long	1075419545
	.long	1717986918
	.long	1075471974
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB5213:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leaq	.LC0(%rip), %rsi
	movl	$512, %ecx
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$2088, %rsp
	.cfi_def_cfa_offset 2144
	movq	%fs:40, %rax
	movq	%rax, 2072(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rdi
	movl	$0x00000000, 16(%rsp)
	rep movsl
	movl	$128, %edi
	movl	$0x00000000, 20(%rsp)
	call	malloc@PLT
	movl	$128, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	leaq	16(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rbp, %rdi
	leaq	20(%rsp), %r8
	movq	%rax, %rsi
	movq	%rax, %rbx
	call	_Z10minmaxCudaPdS_PKdRfS2_
	testl	%eax, %eax
	je	.L45
	movq	stderr(%rip), %rdi
	leaq	.LC7(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	jmp	.L52
.L45:
	leaq	.LC8(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	leaq	.LC9(%rip), %r15
	leaq	.LC11(%rip), %r14
	movq	%rax, %rdi
	leaq	.LC12(%rip), %r13
	leaq	.LC14(%rip), %r12
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	%r15, %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movss	16(%rsp), %xmm1
	divss	.LC10(%rip), %xmm1
	cvtss2sd	%xmm1, %xmm0
	movq	%rax, %rdi
	movss	%xmm1, 12(%rsp)
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%r14, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	%r13, %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movss	12(%rsp), %xmm1
	movss	.LC13(%rip), %xmm0
	movq	%rax, %rdi
	divss	%xmm1, %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%r12, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC15(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	%r15, %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movss	20(%rsp), %xmm1
	divss	.LC10(%rip), %xmm1
	cvtss2sd	%xmm1, %xmm0
	movq	%rax, %rdi
	movss	%xmm1, 12(%rsp)
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%r14, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	%r13, %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movss	12(%rsp), %xmm1
	movss	.LC13(%rip), %xmm0
	movq	%rax, %rdi
	divss	%xmm1, %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%r12, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC16(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	0(%rbp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC17(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	(%rbx), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	call	cudaDeviceReset@PLT
	movl	%eax, %edx
	xorl	%eax, %eax
	testl	%edx, %edx
	je	.L44
	movq	stderr(%rip), %rdi
	leaq	.LC18(%rip), %rdx
	movl	$2, %esi
.L52:
	call	__fprintf_chk@PLT
	movl	$1, %eax
.L44:
	movq	2072(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L48
	call	__stack_chk_fail@PLT
.L48:
	addq	$2088, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE5213:
	.size	main, .-main
	.section	.rodata.str1.1
.LC20:
	.string	"_Z21seq_finalminmaxKernelPdS_"
.LC21:
	.string	"_Z17finalminmaxKernelPdS_"
.LC22:
	.string	"_Z16seq_minmaxKernelPdS_PKd"
.LC23:
	.string	"_Z12minmaxKernelPdS_PKd"
.LC24:
	.string	"precalc_xorwow_matrix"
.LC25:
	.string	"precalc_xorwow_offset_matrix"
.LC26:
	.string	"mrg32k3aM1"
.LC27:
	.string	"mrg32k3aM2"
.LC28:
	.string	"mrg32k3aM1SubSeq"
.LC29:
	.string	"mrg32k3aM2SubSeq"
.LC30:
	.string	"mrg32k3aM1Seq"
.LC31:
	.string	"mrg32k3aM2Seq"
.LC32:
	.string	"__cr_lgamma_table"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB5248:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC20(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z21seq_finalminmaxKernelPdS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC21(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z17finalminmaxKernelPdS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC22(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z16seq_minmaxKernelPdS_PKd(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC23(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z12minmaxKernelPdS_PKd(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC24(%rip), %rdx
	movl	$102400, %r9d
	leaq	_ZL21precalc_xorwow_matrix(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC25(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$102400, %r9d
	leaq	_ZL28precalc_xorwow_offset_matrix(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC26(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL10mrg32k3aM1(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC27(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL10mrg32k3aM2(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC28(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$2016, %r9d
	leaq	_ZL16mrg32k3aM1SubSeq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC29(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$2016, %r9d
	leaq	_ZL16mrg32k3aM2SubSeq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC30(%rip), %rdx
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL13mrg32k3aM1Seq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC31(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$2304, %r9d
	leaq	_ZL13mrg32k3aM2Seq(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC32(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movl	$72, %r9d
	movq	%rdx, %rcx
	leaq	_ZL17__cr_lgamma_table(%rip), %rsi
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE5248:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZL17__cr_lgamma_table
	.comm	_ZL17__cr_lgamma_table,72,32
	.local	_ZL13mrg32k3aM2Seq
	.comm	_ZL13mrg32k3aM2Seq,2304,32
	.local	_ZL13mrg32k3aM1Seq
	.comm	_ZL13mrg32k3aM1Seq,2304,32
	.local	_ZL16mrg32k3aM2SubSeq
	.comm	_ZL16mrg32k3aM2SubSeq,2016,32
	.local	_ZL16mrg32k3aM1SubSeq
	.comm	_ZL16mrg32k3aM1SubSeq,2016,32
	.local	_ZL10mrg32k3aM2
	.comm	_ZL10mrg32k3aM2,2304,32
	.local	_ZL10mrg32k3aM1
	.comm	_ZL10mrg32k3aM1,2304,32
	.local	_ZL28precalc_xorwow_offset_matrix
	.comm	_ZL28precalc_xorwow_offset_matrix,102400,32
	.local	_ZL21precalc_xorwow_matrix
	.comm	_ZL21precalc_xorwow_matrix,102400,32
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC10:
	.long	1148846080
	.align 4
.LC13:
	.long	1166016512
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#ifndef __HIPCC__
#define __HIPCC__
#endif
#include "hip/hip_runtime.h"


#include <hip/device_functions.h>
#include <hip/hip_runtime_api.h>
#include <hiprand/hiprand.h>
#include <hiprand/hiprand_kernel.h>

#include <math.h>
#include <stdio.h>
#include <random>
#include <iomanip>
#include <iostream>

#define N 16
#define BLOCKSIZE 16

hipError_t minmaxCuda(double *max, double *min, const double *a, float &time, float &seq_time);

__global__ void minmaxKernel(double *max, double *min, const double *a) {
	__shared__ double maxtile[BLOCKSIZE];
	__shared__ double mintile[BLOCKSIZE];
	
	unsigned int tid = threadIdx.x;
	unsigned int i = blockIdx.x * blockDim.x + threadIdx.x;
	maxtile[tid] = a[i];
	mintile[tid] = a[i];
	__syncthreads();
	
	// strided index and non-divergent branch
	for (unsigned int s = 1; s < blockDim.x; s *= 2) {
		int index = 2 * s * tid;
		if (index < blockDim.x) {
			if (maxtile[tid + s] > maxtile[tid])
				maxtile[tid] = maxtile[tid + s];
			if (mintile[tid + s] < mintile[tid])
				mintile[tid] = mintile[tid + s];
		}
		__syncthreads();
	}
	
	if (tid == 0) {
		max[blockIdx.x] = maxtile[0];
		min[blockIdx.x] = mintile[0];
	}
}

__global__ void seq_minmaxKernel(double *max, double *min, const double *a) {
	__shared__ double maxtile[BLOCKSIZE];
	__shared__ double mintile[BLOCKSIZE];
	
	unsigned int tid = threadIdx.x;
	unsigned int i = blockIdx.x * blockDim.x + threadIdx.x;
	maxtile[tid] = a[i];
	mintile[tid] = a[i];
	__syncthreads();
	
	//sequential addressing by reverse loop and thread-id based indexing
	for (unsigned int s = blockDim.x / 2; s > 0; s >>= 1) {
		if (tid < s) {
			if (maxtile[tid + s] > maxtile[tid])
				maxtile[tid] = maxtile[tid + s];
			if (mintile[tid + s] < mintile[tid])
				mintile[tid] = mintile[tid + s];
		}
		__syncthreads();
	}
	
	if (tid == 0) {
		max[blockIdx.x] = maxtile[0];
		min[blockIdx.x] = mintile[0];
	}
}

__global__ void finalminmaxKernel(double *max, double *min) {
	__shared__ double maxtile[BLOCKSIZE];
	__shared__ double mintile[BLOCKSIZE];

	unsigned int tid = threadIdx.x;
	unsigned int i = blockIdx.x * blockDim.x + threadIdx.x;
	maxtile[tid] = max[i];
	mintile[tid] = min[i];
	__syncthreads();
	
	// strided index and non-divergent branch
	for (unsigned int s = 1; s < blockDim.x; s *= 2) {
		int index = 2 * s * tid;
		if (index < blockDim.x) {
			if (maxtile[tid + s] > maxtile[tid])
				maxtile[tid] = maxtile[tid + s];
			if (mintile[tid + s] < mintile[tid])
				mintile[tid] = mintile[tid + s];
		}
		__syncthreads();
	}
	
	if (tid == 0) {
		max[blockIdx.x] = maxtile[0];
		min[blockIdx.x] = mintile[0];
	}
}

__global__ void seq_finalminmaxKernel(double *max, double *min) {
	__shared__ double maxtile[BLOCKSIZE];
	__shared__ double mintile[BLOCKSIZE];

	unsigned int tid = threadIdx.x;
	unsigned int i = blockIdx.x * blockDim.x + threadIdx.x;
	maxtile[tid] = max[i];
	mintile[tid] = min[i];
	__syncthreads();
	
	//sequential addressing by reverse loop and thread-id based indexing
	for (unsigned int s = blockDim.x / 2; s > 0; s >>= 1) {
		if (tid < s) {
			if (maxtile[tid + s] > maxtile[tid])
				maxtile[tid] = maxtile[tid + s];
			if (mintile[tid + s] < mintile[tid])
				mintile[tid] = mintile[tid + s];
		}
		__syncthreads();
	}
	
	if (tid == 0) {
		max[blockIdx.x] = maxtile[0];
		min[blockIdx.x] = mintile[0];
	}
}

int main()
{
    const double a[N*N] = {-8.5, -8.4, -6.8, -4.5, -4.2, -3.9, -3.4, -2.3, 1.5, 3.3, 4.3, 4.7, 6.5, 6.7, 8.0, 9.4,
							-7.3, -6.9, -6.0, -4.8, -4.4, -4.3, -3.8, -5.0, 2.5, 2.9, 5.8, 6.3, 6.7, 7.1, 8.0, 9.0,
							-9.0, -8.2, -6.0, -4.8, -1.7, -1.2, -1.0, 2.1, 2.7, 3.1, 4.0, 4.2, 7.3, 7.9, 8.1, 8.8,
							-9.4, -8.5, -7.2, -6.6, -5.1, -4.4, -3.8, -3.1, -1.9, 2.0, 1.7, 2.5, 3.3, 5.1, 5.7, 6.6,
							-9.6, -8.9, -5.9, -2.5, -2.1, -1.8, -8.0, 1.0, 1.7, 2.3, 3.0, 3.8, 5.3, 6.4, 8.4, 9.9,
							-9.7, -8.8, -8.1, -7.5, -4.9, -4.2, -2.2, -6.0, 2.1, 3.3, 3.5, 5.3, 5.8, 5.9, 6.7, 7.2,
							-9.5, -8.8, -8.3, -8.2, -7.1, -6.5, -4.4, -3.6, -1.1, -6.0, 2.5, 3.8, 4.5, 4.7, 7.1, 9.6,
							-9.6, -8.6, -8.4, -6.9, -5.5, -5.4, -4.8, -3.9, -3.6, -7.0, 9.0, 1.1, 3.4, 4.3, 5.8, 10.0,
							-9.7, -9.3, -6.1, -5.9, -4.9, -4.6, -4.2, -4.1, -1.8, 4.0, 1.4, 4.0, 5.0, 5.2, 7.3, 7.7,
							-7.9, -5.5, -5.0, -4.2, -4.1, -3.7, -1.5,  1.9, 4.5, 5.4, 6.1, 6.5, 6.7, 7.7, 8.1, 9.8,
							-8.6, -7.1, -5.3, -5.1, -4.5, -4.1, -2.7, -2.4, -2.1, -1.3, -7.0, 4.4, 6.7, 7.0, 8.2, 9.7,
							-9.2, -8.7, -7.9, -6.9, -6.7, -5.3, -2.6, -2.2, -1.9, -1.1, 4.0, 1.4, 6.9, 7.1, 7.9, 9.5,
							-9.9, -6.0, -4.8, -3.4, 4.0,   7.0,  1.2,  1.6, 4.5, 5.3, 6.5, 7.3, 7.6, 8.0, 9.0, 9.8,
							-9.6, -9.0, -6.7, -6.5, -4.8, -3.0, -2.4,  1.1, 1.2, 1.4, 4.0, 4.5, 4.9, 5.5, 7.0, 7.3,
							-8.5, -7.7, -7.1, -6.0, -5.1, -4.8, -3.7, -2.8, -1.8, -1.4, 2.0, 2.3, 4.8, 5.3, 6.4, 9.2,
							-9.4, -6.7, -5.2, -4.6, -3.2, -2.3, -1.9, -5.0, 2.0, 2.9, 3.2, 4.3, 4.7, 5.1, 6.4, 6.6};
    double *max;
	double *min;
	float time = 0.0f;
	float seq_time = 0.0f;

	max = (double *)malloc((N)*sizeof(double));
	min = (double *)malloc((N)*sizeof(double));

    hipError_t cudaStatus = minmaxCuda(max, min, a, time, seq_time);
    if (cudaStatus != hipSuccess) {
        fprintf(stderr, "minmaxCuda failed!");
        return 1;
    }

	/*for (int i = 0; i < N; i++) {
		std::cout << "Max[" << i << "] = " << max[i] << std::endl;
	}
	std::cout << std::endl;
	for (int i = 0; i < N; i++) {
		std::cout << "Min[" << i << "] = " << min[i] << std::endl;
	}*/

	std::cout << "Parallel Reduction GPU Implementation" << std::endl;
	std::cout << "Execution Time : " << time / 1000 << " seconds" << std::endl;
	std::cout << "Effective Bandwidth : " << (N*N*sizeof(double)*2) / (time / 1000) << " GB/s" << std::endl;
	std::cout << std::endl;

	std::cout << "Parallel Reduction Sequential Addressing GPU Implementation" << std::endl;
	std::cout << "Execution Time : " << seq_time / 1000 << " seconds" << std::endl;
	std::cout << "Effective Bandwidth : " << (N*N*sizeof(double)*2) / (seq_time / 1000) << " GB/s" << std::endl;
	std::cout << std::endl;

	std::cout << "Max value: " << max[0] << std::endl;
	std::cout << "Min value: " << min[0] << std::endl;

    cudaStatus = hipDeviceReset();
    if (cudaStatus != hipSuccess) {
        fprintf(stderr, "hipDeviceReset failed!");
        return 1;
    }

    return 0;
}

hipError_t minmaxCuda(double *max, double *min, const double *a, float &time, float &seq_time)
{
    double *dev_a = 0;
    double *dev_max = 0;
	double *dev_min = 0;
	float milliseconds = 0;
	float milliseconds1 = 0;
	dim3 dimBlock(BLOCKSIZE);
    dim3 dimGrid(N);
    hipError_t cudaStatus;
	hipEvent_t start, stop;
	hipEvent_t start1, stop1;
	hipEventCreate(&start);
	hipEventCreate(&stop);
	hipEventCreate(&start1);
	hipEventCreate(&stop1);

    cudaStatus = hipSetDevice(0);
    if (cudaStatus != hipSuccess) {
        fprintf(stderr, "hipSetDevice failed!  Do you have a CUDA-capable GPU installed?");
        goto Error;
    }

    cudaStatus = hipMalloc((void**)&dev_max, N * sizeof(double));
    if (cudaStatus != hipSuccess) {
        fprintf(stderr, "hipMalloc failed!");
        goto Error;
    }

	cudaStatus = hipMalloc((void**)&dev_min, N * sizeof(double));
    if (cudaStatus != hipSuccess) {
        fprintf(stderr, "hipMalloc failed!");
        goto Error;
    }

    cudaStatus = hipMalloc((void**)&dev_a, N * N * sizeof(double));
    if (cudaStatus != hipSuccess) {
        fprintf(stderr, "hipMalloc failed!");
        goto Error;
    }

    cudaStatus = hipMemcpy(dev_a, a, N * N * sizeof(double), hipMemcpyHostToDevice);
    if (cudaStatus != hipSuccess) {
        fprintf(stderr, "hipMemcpy failed!");
        goto Error;
    }

	hipEventRecord(start);
    minmaxKernel<<<dimGrid, dimBlock>>>(dev_max, dev_min, dev_a);
	hipDeviceSynchronize();
	finalminmaxKernel<<<1, dimBlock>>>(dev_max, dev_min);
	hipEventRecord(stop);
	hipEventSynchronize(stop);
	hipDeviceSynchronize();

	hipEventRecord(start1);
    seq_minmaxKernel<<<dimGrid, dimBlock>>>(dev_max, dev_min, dev_a);
	hipDeviceSynchronize();
	seq_finalminmaxKernel<<<1, dimBlock>>>(dev_max, dev_min);
	hipEventRecord(stop1);
	hipEventSynchronize(stop1);
	hipDeviceSynchronize();

    cudaStatus = hipGetLastError();
    if (cudaStatus != hipSuccess) {
        fprintf(stderr, "minmaxKernel launch failed: %s\n", hipGetErrorString(cudaStatus));
        goto Error;
    }
    
    cudaStatus = hipDeviceSynchronize();
    if (cudaStatus != hipSuccess) {
        fprintf(stderr, "hipDeviceSynchronize returned error code %d after launching minmaxKernel!\n", cudaStatus);
        goto Error;
    }

    cudaStatus = hipMemcpy(max, dev_max, N * sizeof(double), hipMemcpyDeviceToHost);
    if (cudaStatus != hipSuccess) {
        fprintf(stderr, "hipMemcpy failed!");
        goto Error;
    }

	cudaStatus = hipMemcpy(min, dev_min, N * sizeof(double), hipMemcpyDeviceToHost);
    if (cudaStatus != hipSuccess) {
        fprintf(stderr, "hipMemcpy failed!");
        goto Error;
    }

	hipEventElapsedTime(&milliseconds, start, stop);
	hipEventElapsedTime(&milliseconds1, start1, stop1);
	time = milliseconds;
	seq_time = milliseconds1;

Error:
    hipFree(dev_max);
	hipFree(dev_min);
    hipFree(dev_a);
    
    return cudaStatus;
}

	.text
	.file	"kernel.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z27__device_stub__minmaxKernelPdS_PKd # -- Begin function _Z27__device_stub__minmaxKernelPdS_PKd
	.type	_Z27__device_stub__minmaxKernelPdS_PKd,@function
_Z27__device_stub__minmaxKernelPdS_PKd: # @_Z27__device_stub__minmaxKernelPdS_PKd
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12minmaxKernelPdS_PKd, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z27__device_stub__minmaxKernelPdS_PKd, .Lfunc_end0-_Z27__device_stub__minmaxKernelPdS_PKd
	.cfi_endproc
                                        # -- End function
	.globl	_Z31__device_stub__seq_minmaxKernelPdS_PKd # -- Begin function _Z31__device_stub__seq_minmaxKernelPdS_PKd
	.type	_Z31__device_stub__seq_minmaxKernelPdS_PKd,@function
_Z31__device_stub__seq_minmaxKernelPdS_PKd: # @_Z31__device_stub__seq_minmaxKernelPdS_PKd
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16seq_minmaxKernelPdS_PKd, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z31__device_stub__seq_minmaxKernelPdS_PKd, .Lfunc_end1-_Z31__device_stub__seq_minmaxKernelPdS_PKd
	.cfi_endproc
                                        # -- End function
	.globl	_Z32__device_stub__finalminmaxKernelPdS_ # -- Begin function _Z32__device_stub__finalminmaxKernelPdS_
	.type	_Z32__device_stub__finalminmaxKernelPdS_,@function
_Z32__device_stub__finalminmaxKernelPdS_: # @_Z32__device_stub__finalminmaxKernelPdS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17finalminmaxKernelPdS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z32__device_stub__finalminmaxKernelPdS_, .Lfunc_end2-_Z32__device_stub__finalminmaxKernelPdS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z36__device_stub__seq_finalminmaxKernelPdS_ # -- Begin function _Z36__device_stub__seq_finalminmaxKernelPdS_
	.type	_Z36__device_stub__seq_finalminmaxKernelPdS_,@function
_Z36__device_stub__seq_finalminmaxKernelPdS_: # @_Z36__device_stub__seq_finalminmaxKernelPdS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z21seq_finalminmaxKernelPdS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z36__device_stub__seq_finalminmaxKernelPdS_, .Lfunc_end3-_Z36__device_stub__seq_finalminmaxKernelPdS_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI4_0:
	.long	0x447a0000                      # float 1000
.LCPI4_1:
	.long	0x45800000                      # float 4096
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$2072, %rsp                     # imm = 0x818
	.cfi_def_cfa_offset 2128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	leaq	16(%rsp), %r12
	movl	$.L__const.main.a, %esi
	movl	$2048, %edx                     # imm = 0x800
	movq	%r12, %rdi
	callq	memcpy@PLT
	xorl	%ebx, %ebx
	leaq	12(%rsp), %r13
	movl	%ebx, (%r13)
	leaq	8(%rsp), %rbp
	movl	%ebx, (%rbp)
	movl	$128, %edi
	callq	malloc
	movq	%rax, %r15
	movl	$128, %edi
	callq	malloc
	movq	%rax, %r14
	movq	%r15, %rdi
	movq	%rax, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	movq	%rbp, %r8
	callq	_Z10minmaxCudaPdS_PKdRfS2_
	testl	%eax, %eax
	jne	.LBB4_1
# %bb.2:
	movl	$_ZSt4cout, %r13d
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$37, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%r13, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$_ZSt4cout, %edi
	movl	$.L.str.2, %esi
	movl	$17, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movss	12(%rsp), %xmm0                 # xmm0 = mem[0],zero,zero,zero
	divss	.LCPI4_0(%rip), %xmm0
	movss	%xmm0, 4(%rsp)                  # 4-byte Spill
	cvtss2sd	%xmm0, %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r12
	movl	$.L.str.3, %esi
	movl	$8, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%r12), %rax
	movq	-24(%rax), %rdi
	addq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r12, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$_ZSt4cout, %edi
	movl	$.L.str.4, %esi
	movl	$22, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movss	.LCPI4_1(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	divss	4(%rsp), %xmm0                  # 4-byte Folded Reload
	cvtss2sd	%xmm0, %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r12
	movl	$.L.str.5, %esi
	movl	$5, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%r12), %rax
	movq	-24(%rax), %rdi
	addq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r12, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%r13, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$_ZSt4cout, %edi
	movl	$.L.str.6, %esi
	movl	$59, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%r13, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$_ZSt4cout, %edi
	movl	$.L.str.2, %esi
	movl	$17, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movss	8(%rsp), %xmm0                  # xmm0 = mem[0],zero,zero,zero
	divss	.LCPI4_0(%rip), %xmm0
	movss	%xmm0, 4(%rsp)                  # 4-byte Spill
	cvtss2sd	%xmm0, %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r12
	movl	$.L.str.3, %esi
	movl	$8, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%r12), %rax
	movq	-24(%rax), %rdi
	addq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r12, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$_ZSt4cout, %edi
	movl	$.L.str.4, %esi
	movl	$22, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movss	.LCPI4_1(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	divss	4(%rsp), %xmm0                  # 4-byte Folded Reload
	cvtss2sd	%xmm0, %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r12
	movl	$.L.str.5, %esi
	movl	$5, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%r12), %rax
	movq	-24(%rax), %rdi
	addq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r12, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%r13, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$_ZSt4cout, %edi
	movl	$.L.str.7, %esi
	movl	$11, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	(%r15), %xmm0                   # xmm0 = mem[0],zero
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r15
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r15, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$_ZSt4cout, %edi
	movl	$.L.str.8, %esi
	movl	$11, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	(%r14), %xmm0                   # xmm0 = mem[0],zero
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r14
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r14, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	callq	hipDeviceReset
	testl	%eax, %eax
	jne	.LBB4_3
.LBB4_5:
	movl	%ebx, %eax
	addq	$2072, %rsp                     # imm = 0x818
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB4_1:
	.cfi_def_cfa_offset 2128
	movq	stderr(%rip), %rcx
	movl	$.L.str, %edi
	movl	$18, %esi
	jmp	.LBB4_4
.LBB4_3:
	movq	stderr(%rip), %rcx
	movl	$.L.str.9, %edi
	movl	$22, %esi
.LBB4_4:
	movl	$1, %edx
	callq	fwrite@PLT
	movl	$1, %ebx
	jmp	.LBB4_5
.Lfunc_end4:
	.size	main, .Lfunc_end4-main
	.cfi_endproc
                                        # -- End function
	.globl	_Z10minmaxCudaPdS_PKdRfS2_      # -- Begin function _Z10minmaxCudaPdS_PKdRfS2_
	.type	_Z10minmaxCudaPdS_PKdRfS2_,@function
_Z10minmaxCudaPdS_PKdRfS2_:             # @_Z10minmaxCudaPdS_PKdRfS2_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r8, %rbx
	movq	%rcx, %r14
	movq	%rdx, %r13
	movq	%rsi, %r15
	movq	%rdi, %r12
	xorl	%eax, %eax
	movq	%rax, 24(%rsp)
	movq	%rax, 16(%rsp)
	movq	%rax, 8(%rsp)
	movl	%eax, 52(%rsp)
	movl	%eax, 48(%rsp)
	leaq	64(%rsp), %rdi
	callq	hipEventCreate
	leaq	40(%rsp), %rdi
	callq	hipEventCreate
	leaq	56(%rsp), %rdi
	callq	hipEventCreate
	leaq	32(%rsp), %rdi
	callq	hipEventCreate
	xorl	%edi, %edi
	callq	hipSetDevice
	testl	%eax, %eax
	jne	.LBB5_1
# %bb.2:
	leaq	16(%rsp), %rdi
	movl	$128, %esi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB5_3
# %bb.6:
	leaq	8(%rsp), %rdi
	movl	$128, %esi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB5_3
# %bb.7:
	leaq	24(%rsp), %rdi
	movl	$2048, %esi                     # imm = 0x800
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB5_3
# %bb.8:
	movq	24(%rsp), %rdi
	movl	$2048, %edx                     # imm = 0x800
	movq	%r13, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB5_9
# %bb.10:
	movabsq	$4294967312, %r13               # imm = 0x100000010
	movq	64(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_12
# %bb.11:
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	movq	24(%rsp), %rdx
	callq	_Z27__device_stub__minmaxKernelPdS_PKd
.LBB5_12:
	callq	hipDeviceSynchronize
	leaq	-15(%r13), %rbp
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_14
# %bb.13:
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	callq	_Z32__device_stub__finalminmaxKernelPdS_
.LBB5_14:
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	40(%rsp), %rdi
	callq	hipEventSynchronize
	callq	hipDeviceSynchronize
	movq	56(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_16
# %bb.15:
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	movq	24(%rsp), %rdx
	callq	_Z31__device_stub__seq_minmaxKernelPdS_PKd
.LBB5_16:
	callq	hipDeviceSynchronize
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_18
# %bb.17:
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	callq	_Z36__device_stub__seq_finalminmaxKernelPdS_
.LBB5_18:
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	32(%rsp), %rdi
	callq	hipEventSynchronize
	callq	hipDeviceSynchronize
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB5_19
# %bb.20:
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB5_21
# %bb.22:
	movq	16(%rsp), %rsi
	movl	$128, %edx
	movq	%r12, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB5_9
# %bb.23:
	movq	8(%rsp), %rsi
	movl	$128, %edx
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB5_9
# %bb.24:
	movq	64(%rsp), %rsi
	movq	40(%rsp), %rdx
	leaq	52(%rsp), %r15
	movq	%r15, %rdi
	callq	hipEventElapsedTime
	movq	56(%rsp), %rsi
	movq	32(%rsp), %rdx
	leaq	48(%rsp), %r12
	movq	%r12, %rdi
	callq	hipEventElapsedTime
	movss	(%r15), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, (%r14)
	movss	(%r12), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, (%rbx)
	xorl	%ebp, %ebp
	jmp	.LBB5_25
.LBB5_3:
	movl	%eax, %ebp
	movq	stderr(%rip), %rcx
	movl	$.L.str.11, %edi
	jmp	.LBB5_4
.LBB5_9:
	movl	%eax, %ebp
	movq	stderr(%rip), %rcx
	movl	$.L.str.12, %edi
.LBB5_4:
	movl	$17, %esi
.LBB5_5:
	movl	$1, %edx
	callq	fwrite@PLT
.LBB5_25:
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movl	%ebp, %eax
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB5_1:
	.cfi_def_cfa_offset 128
	movl	%eax, %ebp
	movq	stderr(%rip), %rcx
	movl	$.L.str.10, %edi
	movl	$63, %esi
	jmp	.LBB5_5
.LBB5_19:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.13, %esi
	movq	%rbx, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB5_25
.LBB5_21:
	movl	%eax, %ebp
	movq	stderr(%rip), %rdi
	movl	$.L.str.14, %esi
	movl	%eax, %edx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB5_25
.Lfunc_end5:
	.size	_Z10minmaxCudaPdS_PKdRfS2_, .Lfunc_end5-_Z10minmaxCudaPdS_PKdRfS2_
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB6_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB6_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12minmaxKernelPdS_PKd, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16seq_minmaxKernelPdS_PKd, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17finalminmaxKernelPdS_, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z21seq_finalminmaxKernelPdS_, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end6:
	.size	__hip_module_ctor, .Lfunc_end6-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB7_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB7_2:
	retq
.Lfunc_end7:
	.size	__hip_module_dtor, .Lfunc_end7-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z12minmaxKernelPdS_PKd,@object # @_Z12minmaxKernelPdS_PKd
	.section	.rodata,"a",@progbits
	.globl	_Z12minmaxKernelPdS_PKd
	.p2align	3, 0x0
_Z12minmaxKernelPdS_PKd:
	.quad	_Z27__device_stub__minmaxKernelPdS_PKd
	.size	_Z12minmaxKernelPdS_PKd, 8

	.type	_Z16seq_minmaxKernelPdS_PKd,@object # @_Z16seq_minmaxKernelPdS_PKd
	.globl	_Z16seq_minmaxKernelPdS_PKd
	.p2align	3, 0x0
_Z16seq_minmaxKernelPdS_PKd:
	.quad	_Z31__device_stub__seq_minmaxKernelPdS_PKd
	.size	_Z16seq_minmaxKernelPdS_PKd, 8

	.type	_Z17finalminmaxKernelPdS_,@object # @_Z17finalminmaxKernelPdS_
	.globl	_Z17finalminmaxKernelPdS_
	.p2align	3, 0x0
_Z17finalminmaxKernelPdS_:
	.quad	_Z32__device_stub__finalminmaxKernelPdS_
	.size	_Z17finalminmaxKernelPdS_, 8

	.type	_Z21seq_finalminmaxKernelPdS_,@object # @_Z21seq_finalminmaxKernelPdS_
	.globl	_Z21seq_finalminmaxKernelPdS_
	.p2align	3, 0x0
_Z21seq_finalminmaxKernelPdS_:
	.quad	_Z36__device_stub__seq_finalminmaxKernelPdS_
	.size	_Z21seq_finalminmaxKernelPdS_, 8

	.type	.L__const.main.a,@object        # @__const.main.a
	.p2align	4, 0x0
.L__const.main.a:
	.quad	0xc021000000000000              # double -8.5
	.quad	0xc020cccccccccccd              # double -8.4000000000000004
	.quad	0xc01b333333333333              # double -6.7999999999999998
	.quad	0xc012000000000000              # double -4.5
	.quad	0xc010cccccccccccd              # double -4.2000000000000002
	.quad	0xc00f333333333333              # double -3.8999999999999999
	.quad	0xc00b333333333333              # double -3.3999999999999999
	.quad	0xc002666666666666              # double -2.2999999999999998
	.quad	0x3ff8000000000000              # double 1.5
	.quad	0x400a666666666666              # double 3.2999999999999998
	.quad	0x4011333333333333              # double 4.2999999999999998
	.quad	0x4012cccccccccccd              # double 4.7000000000000002
	.quad	0x401a000000000000              # double 6.5
	.quad	0x401acccccccccccd              # double 6.7000000000000002
	.quad	0x4020000000000000              # double 8
	.quad	0x4022cccccccccccd              # double 9.4000000000000003
	.quad	0xc01d333333333333              # double -7.2999999999999998
	.quad	0xc01b99999999999a              # double -6.9000000000000004
	.quad	0xc018000000000000              # double -6
	.quad	0xc013333333333333              # double -4.7999999999999998
	.quad	0xc01199999999999a              # double -4.4000000000000004
	.quad	0xc011333333333333              # double -4.2999999999999998
	.quad	0xc00e666666666666              # double -3.7999999999999998
	.quad	0xc014000000000000              # double -5
	.quad	0x4004000000000000              # double 2.5
	.quad	0x4007333333333333              # double 2.8999999999999999
	.quad	0x4017333333333333              # double 5.7999999999999998
	.quad	0x4019333333333333              # double 6.2999999999999998
	.quad	0x401acccccccccccd              # double 6.7000000000000002
	.quad	0x401c666666666666              # double 7.0999999999999996
	.quad	0x4020000000000000              # double 8
	.quad	0x4022000000000000              # double 9
	.quad	0xc022000000000000              # double -9
	.quad	0xc020666666666666              # double -8.1999999999999993
	.quad	0xc018000000000000              # double -6
	.quad	0xc013333333333333              # double -4.7999999999999998
	.quad	0xbffb333333333333              # double -1.7
	.quad	0xbff3333333333333              # double -1.2
	.quad	0xbff0000000000000              # double -1
	.quad	0x4000cccccccccccd              # double 2.1000000000000001
	.quad	0x400599999999999a              # double 2.7000000000000002
	.quad	0x4008cccccccccccd              # double 3.1000000000000001
	.quad	0x4010000000000000              # double 4
	.quad	0x4010cccccccccccd              # double 4.2000000000000002
	.quad	0x401d333333333333              # double 7.2999999999999998
	.quad	0x401f99999999999a              # double 7.9000000000000004
	.quad	0x4020333333333333              # double 8.0999999999999996
	.quad	0x402199999999999a              # double 8.8000000000000007
	.quad	0xc022cccccccccccd              # double -9.4000000000000003
	.quad	0xc021000000000000              # double -8.5
	.quad	0xc01ccccccccccccd              # double -7.2000000000000002
	.quad	0xc01a666666666666              # double -6.5999999999999996
	.quad	0xc014666666666666              # double -5.0999999999999996
	.quad	0xc01199999999999a              # double -4.4000000000000004
	.quad	0xc00e666666666666              # double -3.7999999999999998
	.quad	0xc008cccccccccccd              # double -3.1000000000000001
	.quad	0xbffe666666666666              # double -1.8999999999999999
	.quad	0x4000000000000000              # double 2
	.quad	0x3ffb333333333333              # double 1.7
	.quad	0x4004000000000000              # double 2.5
	.quad	0x400a666666666666              # double 3.2999999999999998
	.quad	0x4014666666666666              # double 5.0999999999999996
	.quad	0x4016cccccccccccd              # double 5.7000000000000002
	.quad	0x401a666666666666              # double 6.5999999999999996
	.quad	0xc023333333333333              # double -9.5999999999999996
	.quad	0xc021cccccccccccd              # double -8.9000000000000004
	.quad	0xc01799999999999a              # double -5.9000000000000004
	.quad	0xc004000000000000              # double -2.5
	.quad	0xc000cccccccccccd              # double -2.1000000000000001
	.quad	0xbffccccccccccccd              # double -1.8
	.quad	0xc020000000000000              # double -8
	.quad	0x3ff0000000000000              # double 1
	.quad	0x3ffb333333333333              # double 1.7
	.quad	0x4002666666666666              # double 2.2999999999999998
	.quad	0x4008000000000000              # double 3
	.quad	0x400e666666666666              # double 3.7999999999999998
	.quad	0x4015333333333333              # double 5.2999999999999998
	.quad	0x401999999999999a              # double 6.4000000000000004
	.quad	0x4020cccccccccccd              # double 8.4000000000000004
	.quad	0x4023cccccccccccd              # double 9.9000000000000003
	.quad	0xc023666666666666              # double -9.6999999999999993
	.quad	0xc02199999999999a              # double -8.8000000000000007
	.quad	0xc020333333333333              # double -8.0999999999999996
	.quad	0xc01e000000000000              # double -7.5
	.quad	0xc01399999999999a              # double -4.9000000000000004
	.quad	0xc010cccccccccccd              # double -4.2000000000000002
	.quad	0xc00199999999999a              # double -2.2000000000000002
	.quad	0xc018000000000000              # double -6
	.quad	0x4000cccccccccccd              # double 2.1000000000000001
	.quad	0x400a666666666666              # double 3.2999999999999998
	.quad	0x400c000000000000              # double 3.5
	.quad	0x4015333333333333              # double 5.2999999999999998
	.quad	0x4017333333333333              # double 5.7999999999999998
	.quad	0x401799999999999a              # double 5.9000000000000004
	.quad	0x401acccccccccccd              # double 6.7000000000000002
	.quad	0x401ccccccccccccd              # double 7.2000000000000002
	.quad	0xc023000000000000              # double -9.5
	.quad	0xc02199999999999a              # double -8.8000000000000007
	.quad	0xc02099999999999a              # double -8.3000000000000007
	.quad	0xc020666666666666              # double -8.1999999999999993
	.quad	0xc01c666666666666              # double -7.0999999999999996
	.quad	0xc01a000000000000              # double -6.5
	.quad	0xc01199999999999a              # double -4.4000000000000004
	.quad	0xc00ccccccccccccd              # double -3.6000000000000001
	.quad	0xbff199999999999a              # double -1.1000000000000001
	.quad	0xc018000000000000              # double -6
	.quad	0x4004000000000000              # double 2.5
	.quad	0x400e666666666666              # double 3.7999999999999998
	.quad	0x4012000000000000              # double 4.5
	.quad	0x4012cccccccccccd              # double 4.7000000000000002
	.quad	0x401c666666666666              # double 7.0999999999999996
	.quad	0x4023333333333333              # double 9.5999999999999996
	.quad	0xc023333333333333              # double -9.5999999999999996
	.quad	0xc021333333333333              # double -8.5999999999999996
	.quad	0xc020cccccccccccd              # double -8.4000000000000004
	.quad	0xc01b99999999999a              # double -6.9000000000000004
	.quad	0xc016000000000000              # double -5.5
	.quad	0xc01599999999999a              # double -5.4000000000000004
	.quad	0xc013333333333333              # double -4.7999999999999998
	.quad	0xc00f333333333333              # double -3.8999999999999999
	.quad	0xc00ccccccccccccd              # double -3.6000000000000001
	.quad	0xc01c000000000000              # double -7
	.quad	0x4022000000000000              # double 9
	.quad	0x3ff199999999999a              # double 1.1000000000000001
	.quad	0x400b333333333333              # double 3.3999999999999999
	.quad	0x4011333333333333              # double 4.2999999999999998
	.quad	0x4017333333333333              # double 5.7999999999999998
	.quad	0x4024000000000000              # double 10
	.quad	0xc023666666666666              # double -9.6999999999999993
	.quad	0xc02299999999999a              # double -9.3000000000000007
	.quad	0xc018666666666666              # double -6.0999999999999996
	.quad	0xc01799999999999a              # double -5.9000000000000004
	.quad	0xc01399999999999a              # double -4.9000000000000004
	.quad	0xc012666666666666              # double -4.5999999999999996
	.quad	0xc010cccccccccccd              # double -4.2000000000000002
	.quad	0xc010666666666666              # double -4.0999999999999996
	.quad	0xbffccccccccccccd              # double -1.8
	.quad	0x4010000000000000              # double 4
	.quad	0x3ff6666666666666              # double 1.3999999999999999
	.quad	0x4010000000000000              # double 4
	.quad	0x4014000000000000              # double 5
	.quad	0x4014cccccccccccd              # double 5.2000000000000002
	.quad	0x401d333333333333              # double 7.2999999999999998
	.quad	0x401ecccccccccccd              # double 7.7000000000000001
	.quad	0xc01f99999999999a              # double -7.9000000000000004
	.quad	0xc016000000000000              # double -5.5
	.quad	0xc014000000000000              # double -5
	.quad	0xc010cccccccccccd              # double -4.2000000000000002
	.quad	0xc010666666666666              # double -4.0999999999999996
	.quad	0xc00d99999999999a              # double -3.7000000000000002
	.quad	0xbff8000000000000              # double -1.5
	.quad	0x3ffe666666666666              # double 1.8999999999999999
	.quad	0x4012000000000000              # double 4.5
	.quad	0x401599999999999a              # double 5.4000000000000004
	.quad	0x4018666666666666              # double 6.0999999999999996
	.quad	0x401a000000000000              # double 6.5
	.quad	0x401acccccccccccd              # double 6.7000000000000002
	.quad	0x401ecccccccccccd              # double 7.7000000000000001
	.quad	0x4020333333333333              # double 8.0999999999999996
	.quad	0x402399999999999a              # double 9.8000000000000007
	.quad	0xc021333333333333              # double -8.5999999999999996
	.quad	0xc01c666666666666              # double -7.0999999999999996
	.quad	0xc015333333333333              # double -5.2999999999999998
	.quad	0xc014666666666666              # double -5.0999999999999996
	.quad	0xc012000000000000              # double -4.5
	.quad	0xc010666666666666              # double -4.0999999999999996
	.quad	0xc00599999999999a              # double -2.7000000000000002
	.quad	0xc003333333333333              # double -2.3999999999999999
	.quad	0xc000cccccccccccd              # double -2.1000000000000001
	.quad	0xbff4cccccccccccd              # double -1.3
	.quad	0xc01c000000000000              # double -7
	.quad	0x401199999999999a              # double 4.4000000000000004
	.quad	0x401acccccccccccd              # double 6.7000000000000002
	.quad	0x401c000000000000              # double 7
	.quad	0x4020666666666666              # double 8.1999999999999993
	.quad	0x4023666666666666              # double 9.6999999999999993
	.quad	0xc022666666666666              # double -9.1999999999999993
	.quad	0xc021666666666666              # double -8.6999999999999993
	.quad	0xc01f99999999999a              # double -7.9000000000000004
	.quad	0xc01b99999999999a              # double -6.9000000000000004
	.quad	0xc01acccccccccccd              # double -6.7000000000000002
	.quad	0xc015333333333333              # double -5.2999999999999998
	.quad	0xc004cccccccccccd              # double -2.6000000000000001
	.quad	0xc00199999999999a              # double -2.2000000000000002
	.quad	0xbffe666666666666              # double -1.8999999999999999
	.quad	0xbff199999999999a              # double -1.1000000000000001
	.quad	0x4010000000000000              # double 4
	.quad	0x3ff6666666666666              # double 1.3999999999999999
	.quad	0x401b99999999999a              # double 6.9000000000000004
	.quad	0x401c666666666666              # double 7.0999999999999996
	.quad	0x401f99999999999a              # double 7.9000000000000004
	.quad	0x4023000000000000              # double 9.5
	.quad	0xc023cccccccccccd              # double -9.9000000000000003
	.quad	0xc018000000000000              # double -6
	.quad	0xc013333333333333              # double -4.7999999999999998
	.quad	0xc00b333333333333              # double -3.3999999999999999
	.quad	0x4010000000000000              # double 4
	.quad	0x401c000000000000              # double 7
	.quad	0x3ff3333333333333              # double 1.2
	.quad	0x3ff999999999999a              # double 1.6000000000000001
	.quad	0x4012000000000000              # double 4.5
	.quad	0x4015333333333333              # double 5.2999999999999998
	.quad	0x401a000000000000              # double 6.5
	.quad	0x401d333333333333              # double 7.2999999999999998
	.quad	0x401e666666666666              # double 7.5999999999999996
	.quad	0x4020000000000000              # double 8
	.quad	0x4022000000000000              # double 9
	.quad	0x402399999999999a              # double 9.8000000000000007
	.quad	0xc023333333333333              # double -9.5999999999999996
	.quad	0xc022000000000000              # double -9
	.quad	0xc01acccccccccccd              # double -6.7000000000000002
	.quad	0xc01a000000000000              # double -6.5
	.quad	0xc013333333333333              # double -4.7999999999999998
	.quad	0xc008000000000000              # double -3
	.quad	0xc003333333333333              # double -2.3999999999999999
	.quad	0x3ff199999999999a              # double 1.1000000000000001
	.quad	0x3ff3333333333333              # double 1.2
	.quad	0x3ff6666666666666              # double 1.3999999999999999
	.quad	0x4010000000000000              # double 4
	.quad	0x4012000000000000              # double 4.5
	.quad	0x401399999999999a              # double 4.9000000000000004
	.quad	0x4016000000000000              # double 5.5
	.quad	0x401c000000000000              # double 7
	.quad	0x401d333333333333              # double 7.2999999999999998
	.quad	0xc021000000000000              # double -8.5
	.quad	0xc01ecccccccccccd              # double -7.7000000000000001
	.quad	0xc01c666666666666              # double -7.0999999999999996
	.quad	0xc018000000000000              # double -6
	.quad	0xc014666666666666              # double -5.0999999999999996
	.quad	0xc013333333333333              # double -4.7999999999999998
	.quad	0xc00d99999999999a              # double -3.7000000000000002
	.quad	0xc006666666666666              # double -2.7999999999999998
	.quad	0xbffccccccccccccd              # double -1.8
	.quad	0xbff6666666666666              # double -1.3999999999999999
	.quad	0x4000000000000000              # double 2
	.quad	0x4002666666666666              # double 2.2999999999999998
	.quad	0x4013333333333333              # double 4.7999999999999998
	.quad	0x4015333333333333              # double 5.2999999999999998
	.quad	0x401999999999999a              # double 6.4000000000000004
	.quad	0x4022666666666666              # double 9.1999999999999993
	.quad	0xc022cccccccccccd              # double -9.4000000000000003
	.quad	0xc01acccccccccccd              # double -6.7000000000000002
	.quad	0xc014cccccccccccd              # double -5.2000000000000002
	.quad	0xc012666666666666              # double -4.5999999999999996
	.quad	0xc00999999999999a              # double -3.2000000000000002
	.quad	0xc002666666666666              # double -2.2999999999999998
	.quad	0xbffe666666666666              # double -1.8999999999999999
	.quad	0xc014000000000000              # double -5
	.quad	0x4000000000000000              # double 2
	.quad	0x4007333333333333              # double 2.8999999999999999
	.quad	0x400999999999999a              # double 3.2000000000000002
	.quad	0x4011333333333333              # double 4.2999999999999998
	.quad	0x4012cccccccccccd              # double 4.7000000000000002
	.quad	0x4014666666666666              # double 5.0999999999999996
	.quad	0x401999999999999a              # double 6.4000000000000004
	.quad	0x401a666666666666              # double 6.5999999999999996
	.size	.L__const.main.a, 2048

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"minmaxCuda failed!"
	.size	.L.str, 19

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Parallel Reduction GPU Implementation"
	.size	.L.str.1, 38

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Execution Time : "
	.size	.L.str.2, 18

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	" seconds"
	.size	.L.str.3, 9

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Effective Bandwidth : "
	.size	.L.str.4, 23

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	" GB/s"
	.size	.L.str.5, 6

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Parallel Reduction Sequential Addressing GPU Implementation"
	.size	.L.str.6, 60

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"Max value: "
	.size	.L.str.7, 12

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"Min value: "
	.size	.L.str.8, 12

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"hipDeviceReset failed!"
	.size	.L.str.9, 23

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"hipSetDevice failed!  Do you have a CUDA-capable GPU installed?"
	.size	.L.str.10, 64

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"hipMalloc failed!"
	.size	.L.str.11, 18

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"hipMemcpy failed!"
	.size	.L.str.12, 18

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	"minmaxKernel launch failed: %s\n"
	.size	.L.str.13, 32

	.type	.L.str.14,@object               # @.str.14
.L.str.14:
	.asciz	"hipDeviceSynchronize returned error code %d after launching minmaxKernel!\n"
	.size	.L.str.14, 75

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z12minmaxKernelPdS_PKd"
	.size	.L__unnamed_1, 24

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z16seq_minmaxKernelPdS_PKd"
	.size	.L__unnamed_2, 28

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z17finalminmaxKernelPdS_"
	.size	.L__unnamed_3, 26

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z21seq_finalminmaxKernelPdS_"
	.size	.L__unnamed_4, 30

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z27__device_stub__minmaxKernelPdS_PKd
	.addrsig_sym _Z31__device_stub__seq_minmaxKernelPdS_PKd
	.addrsig_sym _Z32__device_stub__finalminmaxKernelPdS_
	.addrsig_sym _Z36__device_stub__seq_finalminmaxKernelPdS_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z12minmaxKernelPdS_PKd
	.addrsig_sym _Z16seq_minmaxKernelPdS_PKd
	.addrsig_sym _Z17finalminmaxKernelPdS_
	.addrsig_sym _Z21seq_finalminmaxKernelPdS_
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z12minmaxKernelPdS_PKd ; -- Begin function _Z12minmaxKernelPdS_PKd
	.globl	_Z12minmaxKernelPdS_PKd
	.p2align	8
	.type	_Z12minmaxKernelPdS_PKd,@function
_Z12minmaxKernelPdS_PKd:                ; @_Z12minmaxKernelPdS_PKd
; %bb.0:
	s_clause 0x1
	s_load_b32 s3, s[0:1], 0x24
	s_load_b64 s[4:5], s[0:1], 0x10
	s_mov_b32 s2, s15
	v_lshlrev_b32_e32 v3, 3, v0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s3, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s2, s3, v[0:1]
	v_mov_b32_e32 v2, 0
	s_cmp_lt_u32 s3, 2
	v_lshlrev_b64 v[1:2], 3, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s4, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s5, v2, vcc_lo
	global_load_b64 v[1:2], v[1:2], off
	s_waitcnt vmcnt(0)
	ds_store_2addr_b64 v3, v[1:2], v[1:2] offset1:16
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB0_8
; %bb.1:                                ; %.lr.ph.preheader
	v_add_nc_u32_e32 v4, 0x80, v3
	s_mov_b32 s6, 1
.LBB0_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_lshl_b32 s4, s6, 1
	s_mov_b32 s5, exec_lo
	v_mul_lo_u32 v1, s4, v0
	v_cmpx_gt_u32_e64 s3, v1
	s_cbranch_execz .LBB0_7
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	v_lshl_add_u32 v1, s6, 3, v3
	s_mov_b32 s7, exec_lo
	ds_load_b64 v[1:2], v1
	ds_load_b64 v[5:6], v3
	s_waitcnt lgkmcnt(0)
	v_cmpx_gt_f64_e32 v[1:2], v[5:6]
	s_cbranch_execz .LBB0_5
; %bb.4:                                ;   in Loop: Header=BB0_2 Depth=1
	ds_store_b64 v3, v[1:2]
.LBB0_5:                                ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	v_lshl_add_u32 v1, s6, 3, v4
	ds_load_b64 v[1:2], v1
	ds_load_b64 v[5:6], v4
	s_waitcnt lgkmcnt(0)
	v_cmp_lt_f64_e32 vcc_lo, v[1:2], v[5:6]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_7
; %bb.6:                                ;   in Loop: Header=BB0_2 Depth=1
	ds_store_b64 v4, v[1:2]
.LBB0_7:                                ; %Flow39
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_cmp_ge_u32 s4, s3
	s_mov_b32 s6, s4
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB0_2
.LBB0_8:                                ; %._crit_edge
	s_mov_b32 s3, 0
	s_mov_b32 s4, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB0_10
; %bb.9:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_mov_b32_e32 v4, 0
	s_lshl_b64 s[0:1], s[2:3], 3
	ds_load_2addr_b64 v[0:3], v4 offset1:16
	s_waitcnt lgkmcnt(0)
	s_add_u32 s2, s6, s0
	s_addc_u32 s3, s7, s1
	s_add_u32 s0, s4, s0
	s_addc_u32 s1, s5, s1
	s_clause 0x1
	global_store_b64 v4, v[0:1], s[0:1]
	global_store_b64 v4, v[2:3], s[2:3]
.LBB0_10:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12minmaxKernelPdS_PKd
		.amdhsa_group_segment_fixed_size 256
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z12minmaxKernelPdS_PKd, .Lfunc_end0-_Z12minmaxKernelPdS_PKd
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 392
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 256 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z16seq_minmaxKernelPdS_PKd ; -- Begin function _Z16seq_minmaxKernelPdS_PKd
	.globl	_Z16seq_minmaxKernelPdS_PKd
	.p2align	8
	.type	_Z16seq_minmaxKernelPdS_PKd,@function
_Z16seq_minmaxKernelPdS_PKd:            ; @_Z16seq_minmaxKernelPdS_PKd
; %bb.0:
	s_clause 0x1
	s_load_b32 s3, s[0:1], 0x24
	s_load_b64 s[4:5], s[0:1], 0x10
	s_mov_b32 s2, s15
	v_lshlrev_b32_e32 v3, 3, v0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s3, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s2, s3, v[0:1]
	v_mov_b32_e32 v2, 0
	s_cmp_lt_u32 s3, 2
	v_lshlrev_b64 v[1:2], 3, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s4, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s5, v2, vcc_lo
	global_load_b64 v[1:2], v[1:2], off
	s_waitcnt vmcnt(0)
	ds_store_2addr_b64 v3, v[1:2], v[1:2] offset1:16
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB1_8
; %bb.1:
	v_add_nc_u32_e32 v4, 0x80, v3
.LBB1_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_lshr_b32 s4, s3, 1
	s_mov_b32 s5, exec_lo
	v_cmpx_gt_u32_e64 s4, v0
	s_cbranch_execz .LBB1_7
; %bb.3:                                ;   in Loop: Header=BB1_2 Depth=1
	v_lshl_add_u32 v1, s4, 3, v3
	s_mov_b32 s6, exec_lo
	ds_load_b64 v[1:2], v1
	ds_load_b64 v[5:6], v3
	s_waitcnt lgkmcnt(0)
	v_cmpx_gt_f64_e32 v[1:2], v[5:6]
	s_cbranch_execz .LBB1_5
; %bb.4:                                ;   in Loop: Header=BB1_2 Depth=1
	ds_store_b64 v3, v[1:2]
.LBB1_5:                                ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	v_lshl_add_u32 v1, s4, 3, v4
	ds_load_b64 v[1:2], v1
	ds_load_b64 v[5:6], v4
	s_waitcnt lgkmcnt(0)
	v_cmp_lt_f64_e32 vcc_lo, v[1:2], v[5:6]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_7
; %bb.6:                                ;   in Loop: Header=BB1_2 Depth=1
	ds_store_b64 v4, v[1:2]
.LBB1_7:                                ; %Flow41
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_cmp_lt_u32 s3, 4
	s_mov_b32 s3, s4
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB1_2
.LBB1_8:                                ; %._crit_edge
	s_mov_b32 s3, 0
	s_mov_b32 s4, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB1_10
; %bb.9:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_mov_b32_e32 v4, 0
	s_lshl_b64 s[0:1], s[2:3], 3
	ds_load_2addr_b64 v[0:3], v4 offset1:16
	s_waitcnt lgkmcnt(0)
	s_add_u32 s2, s6, s0
	s_addc_u32 s3, s7, s1
	s_add_u32 s0, s4, s0
	s_addc_u32 s1, s5, s1
	s_clause 0x1
	global_store_b64 v4, v[0:1], s[0:1]
	global_store_b64 v4, v[2:3], s[2:3]
.LBB1_10:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16seq_minmaxKernelPdS_PKd
		.amdhsa_group_segment_fixed_size 256
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z16seq_minmaxKernelPdS_PKd, .Lfunc_end1-_Z16seq_minmaxKernelPdS_PKd
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 376
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 256 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z17finalminmaxKernelPdS_ ; -- Begin function _Z17finalminmaxKernelPdS_
	.globl	_Z17finalminmaxKernelPdS_
	.p2align	8
	.type	_Z17finalminmaxKernelPdS_,@function
_Z17finalminmaxKernelPdS_:              ; @_Z17finalminmaxKernelPdS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s5, s[0:1], 0x1c
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mov_b32 s4, s15
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s5, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s4, s5, v[0:1]
	v_mov_b32_e32 v2, 0
	s_cmp_lt_u32 s5, 2
	v_lshlrev_b64 v[1:2], 3, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s0, v1
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v2, vcc_lo
	v_add_co_u32 v1, vcc_lo, s2, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
	global_load_b64 v[4:5], v[3:4], off
	global_load_b64 v[1:2], v[1:2], off
	v_lshlrev_b32_e32 v3, 3, v0
	s_waitcnt vmcnt(0)
	ds_store_2addr_b64 v3, v[4:5], v[1:2] offset1:16
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB2_8
; %bb.1:                                ; %.lr.ph.preheader
	v_add_nc_u32_e32 v4, 0x80, v3
	s_mov_b32 s8, 1
.LBB2_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_lshl_b32 s6, s8, 1
	s_mov_b32 s7, exec_lo
	v_mul_lo_u32 v1, s6, v0
	v_cmpx_gt_u32_e64 s5, v1
	s_cbranch_execz .LBB2_7
; %bb.3:                                ;   in Loop: Header=BB2_2 Depth=1
	v_lshl_add_u32 v1, s8, 3, v3
	s_mov_b32 s9, exec_lo
	ds_load_b64 v[1:2], v1
	ds_load_b64 v[5:6], v3
	s_waitcnt lgkmcnt(0)
	v_cmpx_gt_f64_e32 v[1:2], v[5:6]
	s_cbranch_execz .LBB2_5
; %bb.4:                                ;   in Loop: Header=BB2_2 Depth=1
	ds_store_b64 v3, v[1:2]
.LBB2_5:                                ;   in Loop: Header=BB2_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
	v_lshl_add_u32 v1, s8, 3, v4
	ds_load_b64 v[1:2], v1
	ds_load_b64 v[5:6], v4
	s_waitcnt lgkmcnt(0)
	v_cmp_lt_f64_e32 vcc_lo, v[1:2], v[5:6]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_7
; %bb.6:                                ;   in Loop: Header=BB2_2 Depth=1
	ds_store_b64 v4, v[1:2]
.LBB2_7:                                ; %Flow35
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	s_cmp_ge_u32 s6, s5
	s_mov_b32 s8, s6
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB2_2
.LBB2_8:                                ; %._crit_edge
	s_mov_b32 s5, 0
	s_mov_b32 s6, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB2_10
; %bb.9:
	v_mov_b32_e32 v4, 0
	s_lshl_b64 s[4:5], s[4:5], 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s2, s2, s4
	s_addc_u32 s3, s3, s5
	ds_load_2addr_b64 v[0:3], v4 offset1:16
	s_add_u32 s0, s0, s4
	s_addc_u32 s1, s1, s5
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_store_b64 v4, v[0:1], s[0:1]
	global_store_b64 v4, v[2:3], s[2:3]
.LBB2_10:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17finalminmaxKernelPdS_
		.amdhsa_group_segment_fixed_size 256
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z17finalminmaxKernelPdS_, .Lfunc_end2-_Z17finalminmaxKernelPdS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 408
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 256 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z21seq_finalminmaxKernelPdS_ ; -- Begin function _Z21seq_finalminmaxKernelPdS_
	.globl	_Z21seq_finalminmaxKernelPdS_
	.p2align	8
	.type	_Z21seq_finalminmaxKernelPdS_,@function
_Z21seq_finalminmaxKernelPdS_:          ; @_Z21seq_finalminmaxKernelPdS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s5, s[0:1], 0x1c
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mov_b32 s4, s15
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s5, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s4, s5, v[0:1]
	v_mov_b32_e32 v2, 0
	s_cmp_lt_u32 s5, 2
	v_lshlrev_b64 v[1:2], 3, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s0, v1
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v2, vcc_lo
	v_add_co_u32 v1, vcc_lo, s2, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
	global_load_b64 v[4:5], v[3:4], off
	global_load_b64 v[1:2], v[1:2], off
	v_lshlrev_b32_e32 v3, 3, v0
	s_waitcnt vmcnt(0)
	ds_store_2addr_b64 v3, v[4:5], v[1:2] offset1:16
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB3_8
; %bb.1:
	v_add_nc_u32_e32 v4, 0x80, v3
.LBB3_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_lshr_b32 s6, s5, 1
	s_mov_b32 s7, exec_lo
	v_cmpx_gt_u32_e64 s6, v0
	s_cbranch_execz .LBB3_7
; %bb.3:                                ;   in Loop: Header=BB3_2 Depth=1
	v_lshl_add_u32 v1, s6, 3, v3
	s_mov_b32 s8, exec_lo
	ds_load_b64 v[1:2], v1
	ds_load_b64 v[5:6], v3
	s_waitcnt lgkmcnt(0)
	v_cmpx_gt_f64_e32 v[1:2], v[5:6]
	s_cbranch_execz .LBB3_5
; %bb.4:                                ;   in Loop: Header=BB3_2 Depth=1
	ds_store_b64 v3, v[1:2]
.LBB3_5:                                ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s8
	v_lshl_add_u32 v1, s6, 3, v4
	ds_load_b64 v[1:2], v1
	ds_load_b64 v[5:6], v4
	s_waitcnt lgkmcnt(0)
	v_cmp_lt_f64_e32 vcc_lo, v[1:2], v[5:6]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB3_7
; %bb.6:                                ;   in Loop: Header=BB3_2 Depth=1
	ds_store_b64 v4, v[1:2]
.LBB3_7:                                ; %Flow37
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	s_cmp_lt_u32 s5, 4
	s_mov_b32 s5, s6
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB3_2
.LBB3_8:                                ; %._crit_edge
	s_mov_b32 s5, 0
	s_mov_b32 s6, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB3_10
; %bb.9:
	v_mov_b32_e32 v4, 0
	s_lshl_b64 s[4:5], s[4:5], 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s2, s2, s4
	s_addc_u32 s3, s3, s5
	ds_load_2addr_b64 v[0:3], v4 offset1:16
	s_add_u32 s0, s0, s4
	s_addc_u32 s1, s1, s5
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_store_b64 v4, v[0:1], s[0:1]
	global_store_b64 v4, v[2:3], s[2:3]
.LBB3_10:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z21seq_finalminmaxKernelPdS_
		.amdhsa_group_segment_fixed_size 256
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z21seq_finalminmaxKernelPdS_, .Lfunc_end3-_Z21seq_finalminmaxKernelPdS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 392
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 256 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 256
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12minmaxKernelPdS_PKd
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z12minmaxKernelPdS_PKd.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 256
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z16seq_minmaxKernelPdS_PKd
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z16seq_minmaxKernelPdS_PKd.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 256
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z17finalminmaxKernelPdS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z17finalminmaxKernelPdS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 256
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z21seq_finalminmaxKernelPdS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z21seq_finalminmaxKernelPdS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
