#include <iostream>
#include <vector>
#include <set>
#include <map>
#include <algorithm>
#include <stdio.h>
#include <stdlib.h>
#include <cuda.h>
#include <sys/time.h>

using namespace std;

#define CUDA_SAFE_CALL( err ) (safe_call(err, __LINE__))
#define MAX_THREADS_PER_BLOCK 1024
#define MAX_EDGES_PER_SHARD 33554432 

void safe_call(cudaError_t ret, int line)
{
	if(ret!=cudaSuccess)
	{
		printf("Error at line %d : %s\n",line,cudaGetErrorString(ret));
		exit(-1);
	}
}

typedef struct __interval
{
	int start;
	int end;
} interval_t;

typedef struct __edge
{
	int src;
	int dest;
	int val;
} edge_t;

typedef struct __vertex
{
	int val;
} vertex_t;

typedef struct __shard
{
	int E;
	int Vstart;
	int Vend;
	vertex_t * from;
	vertex_t * to;
} shard_t;
/*
typedef struct __graph
{
	vertex_t * vertices;
} graph_t;

graph_t * load_subgraph(interval_t, vector<edge_t>);
*/
__device__ bool d_over;

__global__ void reset()
{
	d_over = false;
}

__global__ void init(vertex_t * vertices, int starting_vertex, int num_vertices)
{
	int v = blockDim.x*blockIdx.x + threadIdx.x;
	if (v==starting_vertex)
		vertices[v].val = 0;
	else if(v < num_vertices)
		vertices[v].val = -1;
}

/*__global__ void gather_bfs(shard_t * shard, vertex_t * vertices, int current_depth)
{
	int id = blockDim.x*blockIdx.x + threadIdx.x;
	if(id < shard->E)
	{
		if(shard->edges[id].val == (current_depth+1))
		{
			int t=shard->edges[id].dest;
			if(vertices[t].val == -1)
			{
				vertices[t].val = current_depth+1;
				d_over = true;
			}
		}
	}
}*/

__global__ void scatter_bfs(const shard_t * shard, vertex_t * vertices, int current_depth, int V)
{
	int id = blockDim.x*blockIdx.x + threadIdx.x;
	if(id < shard->E)
	{
		int s=shard->from[id].val;
		if(s < V)
		{
			int t=vertices[s].val;
			if(t==current_depth)
			{
				//shard->edges[id].val = t+1;
				int u=shard->to[id].val;
				if(u < V)
				{
					if(vertices[u].val == -1)
					{
						vertices[u].val = t+1;
						d_over = true;
					}
				}
				else
					printf("Illegal vertex dest: %d\n",u);
			}
		}
		else
			printf("Illegal vertex src: %d\n",s);
	}
}


bool cost(const edge_t &a, const edge_t &b)
{
	    return (a.src < b.src);
}

int main(int argc, char * argv[])
{
	struct timeval t1,t2;
	static char * filename;
	if(argc!=2)
	{
		printf("./a.out <filename>\n");
		exit(-1);
	}
	else
	{
		filename = argv[1];
	}

	FILE * fp = fopen(filename,"r");
	if(!fp)
	{
		printf("Error reading file.\n");
		exit(-1);
	}

	/* Set cuda device to K40  */
	CUDA_SAFE_CALL(cudaSetDevice(0));

	printf("Begin file reading...\n");

	/* Get graph from file into CPU memory  */
	int num_vertices, num_edges, i, j, k;
	fscanf(fp,"%d %d",&num_vertices,&num_edges);

	
	//Array of vectors. vector i contains the in edges of vertex i
	vector< vector<edge_t> > outEdges(num_vertices);
	int * prefixV = (int *) calloc(num_vertices,sizeof(int));
	int s,d,v;

	// In Graphchi case, I am storing the source depth in each edge
	// In X-stream case, I am storing the destination depth in each edge
	for(i=0; i<num_edges; i++)
	{
		fscanf(fp,"%d",&s);
		fscanf(fp,"%d",&d);
		edge_t e;
		e.src=s;
		e.dest=d;
		outEdges[s].push_back(e);
	}
	printf("Finished file reading.\n");
	
	printf("\nBegin interval construction...\n");

	// Construction of intervals
	gettimeofday(&t1,NULL);
	int num_intervals = 0, add = 1;
	vector<int> startInter;
	prefixV[0] = outEdges[0].size();
	if(prefixV[0] > MAX_EDGES_PER_SHARD)
	{
		startInter.push_back(0);
		num_intervals++;
		add = 0;
	}
	for(i=1; i<num_vertices; i++)
	{
		prefixV[i] = outEdges[i].size();	
		if(add==1)
			prefixV[i] += prefixV[i-1];
		if(prefixV[i] > MAX_EDGES_PER_SHARD)
		{
			startInter.push_back(i);
			num_intervals++;
			add = 0;
		}
		else
			add = 1;
	}
	if(add==1)
	{
		startInter.push_back(i-1);
		num_intervals++;
	}


	interval_t * interval = (interval_t *) malloc(num_intervals*sizeof(interval_t));
	for(i=0; i<num_intervals; i++)
	{
		interval[i].start = (i == 0) ? 0 : (startInter[i-1]+1);
		interval[i].end = startInter[i];
	}
	gettimeofday(&t2,NULL);
	printf("Time to construct intervals : %f sec\n",((t2.tv_sec+t2.tv_usec*1.0e-6)-(t1.tv_sec+t1.tv_usec*1.0e-6)));


	printf("\nBegin shard construction...\n");
	//Construction of shards
	gettimeofday(&t1,NULL);
	shard_t * shard_host = (shard_t *) malloc(num_intervals*sizeof(shard_t));

	//Finding the max number of edges in a shard
	// We will allocate space for that many edges to each shard to maintain consistency
	int MAX_NUM_EDGES_SHARD = INT_MIN;
	for(i=0; i<num_intervals; i++)
	{
		int t = prefixV[interval[i].end];
		if(t > MAX_NUM_EDGES_SHARD)
			MAX_NUM_EDGES_SHARD = t;
	}

	for(i=0; i<num_intervals; i++)
	{
		// first and last vertices in shard
		shard_host[i].Vstart = interval[i].start;
		shard_host[i].Vend = interval[i].end;

		// number of edges in shard
		shard_host[i].E = prefixV[interval[i].end];
		shard_host[i].from = (vertex_t *) malloc(MAX_NUM_EDGES_SHARD*sizeof(edge_t));
		shard_host[i].to = (vertex_t *) malloc(MAX_NUM_EDGES_SHARD*sizeof(edge_t));
	}


	for(i=0; i<num_intervals; i++)
	{
		vector<edge_t> tempEdges;
		for(j=interval[i].start; j<=interval[i].end; j++)
		{
			for(vector<edge_t>::iterator it=outEdges[j].begin(); it!=outEdges[j].end(); ++it)
				tempEdges.push_back(*it);
		}

		//Sorting based on src vertex to align the edges such that the access of vertices[src] is sequential
		sort(tempEdges.begin(),tempEdges.end(),cost);
		j=0;
		for (vector<edge_t>::iterator it = tempEdges.begin() ; it != tempEdges.end(); ++it)
		{
			shard_host[i].from[j].val = (*it).src;
			shard_host[i].to[j].val = (*it).dest;
			j++;
		}
	}
	gettimeofday(&t2,NULL);
	printf("Time to construct shards : %f sec\n",((t2.tv_sec+t2.tv_usec*1.0e-6)-(t1.tv_sec+t1.tv_usec*1.0e-6)));

	int num_of_blocks = 1;
	int num_of_threads_per_block = MAX_NUM_EDGES_SHARD;

	if(MAX_NUM_EDGES_SHARD>MAX_THREADS_PER_BLOCK)
	{
		num_of_blocks = (int)ceil(MAX_NUM_EDGES_SHARD/(double)MAX_THREADS_PER_BLOCK); 
		num_of_threads_per_block = MAX_THREADS_PER_BLOCK; 
	}

	dim3  grid( num_of_blocks, 1, 1);
	dim3  threads( num_of_threads_per_block, 1, 1);

	shard_t *shard;
	//CUDA_SAFE_CALL(cudaMallocHost((void **)&shard, sizeof(shard_t)));
	//CUDA_SAFE_CALL(cudaMallocHost((void **)&shard->edges, MAX_NUM_EDGES_SHARD*sizeof(edge_t)));
	//CUDA_SAFE_CALL(cudaMallocManaged((void **)&shard, sizeof(shard_t)));
	//CUDA_SAFE_CALL(cudaMallocManaged((void **)&shard->edges, MAX_NUM_EDGES_SHARD*sizeof(edge_t)));

	vertex_t * from_dev;
	vertex_t * to_dev;
	CUDA_SAFE_CALL(cudaMalloc((void **)&shard, sizeof(shard_t)));
	CUDA_SAFE_CALL(cudaMalloc((void **)&from_dev, MAX_NUM_EDGES_SHARD*sizeof(edge_t)));
	CUDA_SAFE_CALL(cudaMalloc((void **)&to_dev, MAX_NUM_EDGES_SHARD*sizeof(edge_t)));

	// It will contain the visited status of each vertex
	vertex_t *vertices;
	//CUDA_SAFE_CALL(cudaMallocHost((void **)&vertices, num_vertices*sizeof(vertex_t)));
	vertex_t *vertices_host = (vertex_t *) malloc(num_vertices*sizeof(vertex_t));
	CUDA_SAFE_CALL(cudaMalloc((void **)&vertices, num_vertices*sizeof(vertex_t)));

	init<<<((num_vertices+MAX_THREADS_PER_BLOCK-1)/MAX_THREADS_PER_BLOCK),MAX_THREADS_PER_BLOCK>>> (vertices, 0, num_vertices);

	cudaEvent_t start,end;
	float diff;
	double time = 0;

	CUDA_SAFE_CALL(cudaEventCreate(&start));
	CUDA_SAFE_CALL(cudaEventCreate(&end));
	
	printf("Begin kernel\n");

	bool stop;
	k=0;
	do
	{
		stop = false;
		CUDA_SAFE_CALL(cudaMemcpyToSymbol(d_over, &stop, sizeof(bool),0, cudaMemcpyHostToDevice));
		CUDA_SAFE_CALL(cudaDeviceSynchronize());

		for(i=0; i<num_intervals; i++)
		{
			//Load the data of shard_host[i] into shard (pinned memory)
			/*shard->E = shard_host[i].E;
			shard->Vstart = shard_host[i].Vstart;
			shard->Vend = shard_host[i].Vend;
			for (j=0; j<shard_host[i].E; j++)
			{
				shard->edges[j] = shard_host[i].edges[j];
				j++;
			}*/
			CUDA_SAFE_CALL(cudaMemcpy(shard, &shard_host[i], sizeof(shard_t),cudaMemcpyHostToDevice));
			CUDA_SAFE_CALL(cudaMemcpy(from_dev, shard_host[i].from, shard_host[i].E*sizeof(vertex_t),cudaMemcpyHostToDevice));
			CUDA_SAFE_CALL(cudaMemcpy(to_dev, shard_host[i].to, shard_host[i].E*sizeof(vertex_t),cudaMemcpyHostToDevice));
			CUDA_SAFE_CALL(cudaMemcpy(&(shard->from), &from_dev, sizeof(vertex_t *),cudaMemcpyHostToDevice));
			CUDA_SAFE_CALL(cudaMemcpy(&(shard->to), &to_dev, sizeof(vertex_t *),cudaMemcpyHostToDevice));


			gettimeofday(&t1,NULL);

			scatter_bfs<<<grid, threads>>> (shard, vertices, k, num_vertices);

			CUDA_SAFE_CALL(cudaDeviceSynchronize());
			gettimeofday(&t2,NULL);
			time += ((t2.tv_sec*1.0e3+t2.tv_usec*1.0e-3)-(t1.tv_sec*1.0e3+t1.tv_usec*1.0e-3));
		}
		/*for(i=0; i<num_intervals; i++)
		{
			//Load the data of shard_host[i] into shard (pinned memory)
			shard.E = shard_host[i].E;
			shard.Vstart = shard_host[i].Vstart;
			shard.Vend = shard_host[i].Vend;
			for (j=0; j<shard_host[i].E; j++)
			{
				shard.edges[j] = shard_host[i].edges[j];
				j++;
			}

			gettimeofday(&t1,NULL);

		 	gather_bfs<<<grid, threads>>> (shard, vertices, k, num_vertices);

			CUDA_SAFE_CALL(cudaDeviceSynchronize());
			gettimeofday(&t2,NULL);
			time += ((t2.tv_sec*1.0e3+t2.tv_usec*1.0e-3)-(t1.tv_sec*1.0e3+t1.tv_usec*1.0e-3))
		}*/

		CUDA_SAFE_CALL(cudaMemcpyFromSymbol(&stop, d_over, sizeof(bool),0, cudaMemcpyDeviceToHost));
		k++;
	}while(stop);

	printf("Number of iterations : %d\n",k);
	CUDA_SAFE_CALL(cudaMemcpy(vertices_host, vertices, num_vertices*sizeof(vertex_t), cudaMemcpyDeviceToHost));
	/*for(int i = 0; i < num_vertices; i++)
	{
		printf("Vertex %d Distance %d\n",i,vertices_host[i].val);
	}*/
	printf("Time: %f ms\n",time);

	free(interval);
	for(i=0; i<num_intervals; i++)
	{
		free(shard_host[i].from);
		free(shard_host[i].to);
	}
	free(shard_host);
	free(vertices_host);
	//CUDA_SAFE_CALL(cudaFreeHost(vertices));
	//CUDA_SAFE_CALL(cudaFreeHost(shard->edges));
	//CUDA_SAFE_CALL(cudaFreeHost(shard));
	CUDA_SAFE_CALL(cudaFree(vertices));
	CUDA_SAFE_CALL(cudaFree(from_dev));
	CUDA_SAFE_CALL(cudaFree(to_dev));
	CUDA_SAFE_CALL(cudaFree(shard));


	CUDA_SAFE_CALL(cudaEventDestroy(start));
	CUDA_SAFE_CALL(cudaEventDestroy(end));

	return 0;
}

	.file	"tmpxft_0034ff83_00000000-6_sequential_addressing.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.globl	_Z4costRK6__edgeS1_
	.type	_Z4costRK6__edgeS1_, @function
_Z4costRK6__edgeS1_:
.LFB4801:
	.cfi_startproc
	endbr64
	movl	(%rsi), %eax
	cmpl	%eax, (%rdi)
	setl	%al
	ret
	.cfi_endproc
.LFE4801:
	.size	_Z4costRK6__edgeS1_, .-_Z4costRK6__edgeS1_
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4825:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4825:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.align 2
	.type	_ZN9__gnu_cxx5__ops15_Iter_comp_iterIPFbRK6__edgeS4_EEclINS_17__normal_iteratorIPS2_St6vectorIS2_SaIS2_EEEESE_EEbT_T0_.isra.0, @function
_ZN9__gnu_cxx5__ops15_Iter_comp_iterIPFbRK6__edgeS4_EEclINS_17__normal_iteratorIPS2_St6vectorIS2_SaIS2_EEEESE_EEbT_T0_.isra.0:
.LFB5743:
	.cfi_startproc
	movq	%rdi, %rax
	movq	%rsi, %rdi
	movq	%rdx, %rsi
	jmp	*%rax
	.cfi_endproc
.LFE5743:
	.size	_ZN9__gnu_cxx5__ops15_Iter_comp_iterIPFbRK6__edgeS4_EEclINS_17__normal_iteratorIPS2_St6vectorIS2_SaIS2_EEEESE_EEbT_T0_.isra.0, .-_ZN9__gnu_cxx5__ops15_Iter_comp_iterIPFbRK6__edgeS4_EEclINS_17__normal_iteratorIPS2_St6vectorIS2_SaIS2_EEEESE_EEbT_T0_.isra.0
	.align 2
	.type	_ZNSt12_Vector_baseIiSaIiEE11_M_allocateEm.isra.0, @function
_ZNSt12_Vector_baseIiSaIiEE11_M_allocateEm.isra.0:
.LFB5744:
	.cfi_startproc
	testq	%rdi, %rdi
	je	.L5
	movabsq	$2305843009213693951, %rax
	cmpq	%rdi, %rax
	jnb	.L6
	pushq	%rax
	.cfi_def_cfa_offset 16
	movabsq	$4611686018427387903, %rax
	cmpq	%rdi, %rax
	jnb	.L7
	call	_ZSt28__throw_bad_array_new_lengthv@PLT
.L7:
	call	_ZSt17__throw_bad_allocv@PLT
.L6:
	.cfi_def_cfa_offset 8
	salq	$2, %rdi
	jmp	_Znwm@PLT
.L5:
	xorl	%eax, %eax
	ret
	.cfi_endproc
.LFE5744:
	.size	_ZNSt12_Vector_baseIiSaIiEE11_M_allocateEm.isra.0, .-_ZNSt12_Vector_baseIiSaIiEE11_M_allocateEm.isra.0
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Error at line %d : %s\n"
	.text
	.globl	_Z9safe_call9cudaErrori
	.type	_Z9safe_call9cudaErrori, @function
_Z9safe_call9cudaErrori:
.LFB4800:
	.cfi_startproc
	endbr64
	testl	%edi, %edi
	je	.L12
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movl	%esi, %ebx
	call	cudaGetErrorString@PLT
	movl	$2, %edi
	movl	%ebx, %edx
	leaq	.LC0(%rip), %rsi
	movq	%rax, %rcx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	orl	$-1, %edi
	call	exit@PLT
.L12:
	.cfi_def_cfa_offset 8
	.cfi_restore 3
	ret
	.cfi_endproc
.LFE4800:
	.size	_Z9safe_call9cudaErrori, .-_Z9safe_call9cudaErrori
	.globl	_Z23__device_stub__Z5resetvv
	.type	_Z23__device_stub__Z5resetvv, @function
_Z23__device_stub__Z5resetvv:
.LFB4847:
	.cfi_startproc
	endbr64
	subq	$88, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	movabsq	$4294967297, %rax
	leaq	8(%rsp), %rcx
	movq	%rsp, %rdx
	leaq	28(%rsp), %rsi
	leaq	16(%rsp), %rdi
	movl	$1, 24(%rsp)
	movl	$1, 36(%rsp)
	movq	%rax, 16(%rsp)
	movq	%rax, 28(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L17
	pushq	8(%rsp)
	.cfi_def_cfa_offset 104
	leaq	_Z5resetv(%rip), %rdi
	pushq	8(%rsp)
	.cfi_def_cfa_offset 112
	movq	44(%rsp), %rcx
	movl	52(%rsp), %r8d
	movq	32(%rsp), %rsi
	movl	40(%rsp), %edx
	leaq	80(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 104
	popq	%rdx
	.cfi_def_cfa_offset 96
.L17:
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L19
	call	__stack_chk_fail@PLT
.L19:
	addq	$88, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4847:
	.size	_Z23__device_stub__Z5resetvv, .-_Z23__device_stub__Z5resetvv
	.globl	_Z5resetv
	.type	_Z5resetv, @function
_Z5resetv:
.LFB4848:
	.cfi_startproc
	endbr64
	jmp	_Z23__device_stub__Z5resetvv
	.cfi_endproc
.LFE4848:
	.size	_Z5resetv, .-_Z5resetv
	.globl	_Z33__device_stub__Z4initP8__vertexiiP8__vertexii
	.type	_Z33__device_stub__Z4initP8__vertexiiP8__vertexii, @function
_Z33__device_stub__Z4initP8__vertexiiP8__vertexii:
.LFB4849:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	32(%rsp), %rdi
	movl	%esi, 4(%rsp)
	leaq	44(%rsp), %rsi
	movl	%edx, (%rsp)
	leaq	16(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L22
	pushq	24(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z4initP8__vertexii(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 144
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L22:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L24
	call	__stack_chk_fail@PLT
.L24:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4849:
	.size	_Z33__device_stub__Z4initP8__vertexiiP8__vertexii, .-_Z33__device_stub__Z4initP8__vertexiiP8__vertexii
	.globl	_Z4initP8__vertexii
	.type	_Z4initP8__vertexii, @function
_Z4initP8__vertexii:
.LFB4850:
	.cfi_startproc
	endbr64
	jmp	_Z33__device_stub__Z4initP8__vertexiiP8__vertexii
	.cfi_endproc
.LFE4850:
	.size	_Z4initP8__vertexii, .-_Z4initP8__vertexii
	.globl	_Z51__device_stub__Z11scatter_bfsPK7__shardP8__vertexiiPK7__shardP8__vertexii
	.type	_Z51__device_stub__Z11scatter_bfsPK7__shardP8__vertexiiPK7__shardP8__vertexii, @function
_Z51__device_stub__Z11scatter_bfsPK7__shardP8__vertexiiPK7__shardP8__vertexii:
.LFB4851:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L27
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z11scatter_bfsPK7__shardP8__vertexii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L27:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L29
	call	__stack_chk_fail@PLT
.L29:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4851:
	.size	_Z51__device_stub__Z11scatter_bfsPK7__shardP8__vertexiiPK7__shardP8__vertexii, .-_Z51__device_stub__Z11scatter_bfsPK7__shardP8__vertexiiPK7__shardP8__vertexii
	.globl	_Z11scatter_bfsPK7__shardP8__vertexii
	.type	_Z11scatter_bfsPK7__shardP8__vertexii, @function
_Z11scatter_bfsPK7__shardP8__vertexii:
.LFB4852:
	.cfi_startproc
	endbr64
	jmp	_Z51__device_stub__Z11scatter_bfsPK7__shardP8__vertexiiPK7__shardP8__vertexii
	.cfi_endproc
.LFE4852:
	.size	_Z11scatter_bfsPK7__shardP8__vertexii, .-_Z11scatter_bfsPK7__shardP8__vertexii
	.section	.rodata.str1.1
.LC1:
	.string	"_Z11scatter_bfsPK7__shardP8__vertexii"
.LC2:
	.string	"_Z4initP8__vertexii"
.LC3:
	.string	"_Z5resetv"
.LC4:
	.string	"d_over"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4854:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC1(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z11scatter_bfsPK7__shardP8__vertexii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC2(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z4initP8__vertexii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC3(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z5resetv(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC4(%rip), %rdx
	movl	$1, %r9d
	leaq	_ZL6d_over(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4854:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.text._ZNSt6vectorIiSaIiEED2Ev,"axG",@progbits,_ZNSt6vectorIiSaIiEED5Ev,comdat
	.align 2
	.weak	_ZNSt6vectorIiSaIiEED2Ev
	.type	_ZNSt6vectorIiSaIiEED2Ev, @function
_ZNSt6vectorIiSaIiEED2Ev:
.LFB5179:
	.cfi_startproc
	endbr64
	movq	(%rdi), %rax
	testq	%rax, %rax
	je	.L34
	movq	16(%rdi), %rsi
	movq	%rax, %rdi
	subq	%rax, %rsi
	jmp	_ZdlPvm@PLT
.L34:
	ret
	.cfi_endproc
.LFE5179:
	.size	_ZNSt6vectorIiSaIiEED2Ev, .-_ZNSt6vectorIiSaIiEED2Ev
	.weak	_ZNSt6vectorIiSaIiEED1Ev
	.set	_ZNSt6vectorIiSaIiEED1Ev,_ZNSt6vectorIiSaIiEED2Ev
	.section	.text._ZNSt6vectorI6__edgeSaIS0_EED2Ev,"axG",@progbits,_ZNSt6vectorI6__edgeSaIS0_EED5Ev,comdat
	.align 2
	.weak	_ZNSt6vectorI6__edgeSaIS0_EED2Ev
	.type	_ZNSt6vectorI6__edgeSaIS0_EED2Ev, @function
_ZNSt6vectorI6__edgeSaIS0_EED2Ev:
.LFB5196:
	.cfi_startproc
	endbr64
	movq	(%rdi), %rax
	testq	%rax, %rax
	je	.L36
	movq	16(%rdi), %rsi
	movq	%rax, %rdi
	subq	%rax, %rsi
	jmp	_ZdlPvm@PLT
.L36:
	ret
	.cfi_endproc
.LFE5196:
	.size	_ZNSt6vectorI6__edgeSaIS0_EED2Ev, .-_ZNSt6vectorI6__edgeSaIS0_EED2Ev
	.weak	_ZNSt6vectorI6__edgeSaIS0_EED1Ev
	.set	_ZNSt6vectorI6__edgeSaIS0_EED1Ev,_ZNSt6vectorI6__edgeSaIS0_EED2Ev
	.section	.text._ZNSt6vectorIS_I6__edgeSaIS0_EESaIS2_EED2Ev,"axG",@progbits,_ZNSt6vectorIS_I6__edgeSaIS0_EESaIS2_EED5Ev,comdat
	.align 2
	.weak	_ZNSt6vectorIS_I6__edgeSaIS0_EESaIS2_EED2Ev
	.type	_ZNSt6vectorIS_I6__edgeSaIS0_EESaIS2_EED2Ev, @function
_ZNSt6vectorIS_I6__edgeSaIS0_EESaIS2_EED2Ev:
.LFB5164:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	8(%rdi), %r12
	movq	%rdi, %rbx
	movq	(%rdi), %rbp
.L39:
	cmpq	%rbp, %r12
	je	.L43
	movq	%rbp, %rdi
	addq	$24, %rbp
	call	_ZNSt6vectorI6__edgeSaIS0_EED1Ev
	jmp	.L39
.L43:
	movq	(%rbx), %rdi
	testq	%rdi, %rdi
	je	.L38
	movq	16(%rbx), %rsi
	popq	%rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	subq	%rdi, %rsi
	jmp	_ZdlPvm@PLT
.L38:
	.cfi_restore_state
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE5164:
	.size	_ZNSt6vectorIS_I6__edgeSaIS0_EESaIS2_EED2Ev, .-_ZNSt6vectorIS_I6__edgeSaIS0_EESaIS2_EED2Ev
	.weak	_ZNSt6vectorIS_I6__edgeSaIS0_EESaIS2_EED1Ev
	.set	_ZNSt6vectorIS_I6__edgeSaIS0_EESaIS2_EED1Ev,_ZNSt6vectorIS_I6__edgeSaIS0_EESaIS2_EED2Ev
	.section	.rodata._ZNSt6vectorI6__edgeSaIS0_EE17_M_realloc_insertIJRKS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_.str1.1,"aMS",@progbits,1
.LC5:
	.string	"vector::_M_realloc_insert"
	.section	.text._ZNSt6vectorI6__edgeSaIS0_EE17_M_realloc_insertIJRKS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_,"axG",@progbits,_ZNSt6vectorI6__edgeSaIS0_EE17_M_realloc_insertIJRKS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_,comdat
	.align 2
	.weak	_ZNSt6vectorI6__edgeSaIS0_EE17_M_realloc_insertIJRKS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
	.type	_ZNSt6vectorI6__edgeSaIS0_EE17_M_realloc_insertIJRKS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_, @function
_ZNSt6vectorI6__edgeSaIS0_EE17_M_realloc_insertIJRKS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_:
.LFB5366:
	.cfi_startproc
	endbr64
	movabsq	$-6148914691236517205, %rax
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	movq	8(%rdi), %rbp
	movq	(%rdi), %r15
	movq	%rsi, (%rsp)
	movabsq	$768614336404564650, %rsi
	movq	%rbp, %rbx
	subq	%r15, %rbx
	sarq	$2, %rbx
	imulq	%rax, %rbx
	cmpq	%rsi, %rbx
	jne	.L45
	leaq	.LC5(%rip), %rdi
	call	_ZSt20__throw_length_errorPKc@PLT
.L45:
	cmpq	%r15, %rbp
	movl	$1, %eax
	movq	(%rsp), %r12
	movq	%rdi, %r13
	cmovne	%rbx, %rax
	addq	%rax, %rbx
	setc	%al
	subq	%r15, %r12
	movzbl	%al, %eax
	testq	%rax, %rax
	jne	.L55
	xorl	%r14d, %r14d
	testq	%rbx, %rbx
	je	.L50
	movabsq	$768614336404564650, %rax
	cmpq	%rax, %rbx
	cmova	%rax, %rbx
	jmp	.L49
.L55:
	movq	%rsi, %rbx
.L49:
	imulq	$12, %rbx, %rdi
	movq	%rdx, 8(%rsp)
	call	_Znwm@PLT
	movq	8(%rsp), %rdx
	movq	%rax, %r14
.L50:
	movq	(%rdx), %rax
	movq	%rax, (%r14,%r12)
	movl	8(%rdx), %eax
	movl	%eax, 8(%r14,%r12)
	testq	%r12, %r12
	jle	.L51
	movq	%r12, %rdx
	movq	%r15, %rsi
	movq	%r14, %rdi
	call	memmove@PLT
.L51:
	movq	(%rsp), %rcx
	leaq	12(%r14,%r12), %rax
	subq	%rcx, %rbp
	testq	%rbp, %rbp
	jle	.L52
	movq	%rcx, %rsi
	movq	%rax, %rdi
	movq	%rbp, %rcx
	rep movsb
.L52:
	addq	%rax, %rbp
	testq	%r15, %r15
	je	.L53
	movq	16(%r13), %rsi
	movq	%r15, %rdi
	subq	%r15, %rsi
	call	_ZdlPvm@PLT
.L53:
	imulq	$12, %rbx, %rax
	movq	%r14, 0(%r13)
	movq	%rbp, 8(%r13)
	leaq	(%r14,%rax), %rbx
	movq	%rbx, 16(%r13)
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE5366:
	.size	_ZNSt6vectorI6__edgeSaIS0_EE17_M_realloc_insertIJRKS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_, .-_ZNSt6vectorI6__edgeSaIS0_EE17_M_realloc_insertIJRKS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
	.section	.text._ZNSt6vectorI6__edgeSaIS0_EE9push_backERKS0_,"axG",@progbits,_ZNSt6vectorI6__edgeSaIS0_EE9push_backERKS0_,comdat
	.align 2
	.weak	_ZNSt6vectorI6__edgeSaIS0_EE9push_backERKS0_
	.type	_ZNSt6vectorI6__edgeSaIS0_EE9push_backERKS0_, @function
_ZNSt6vectorI6__edgeSaIS0_EE9push_backERKS0_:
.LFB5167:
	.cfi_startproc
	endbr64
	movq	%rsi, %rdx
	movq	8(%rdi), %rsi
	cmpq	16(%rdi), %rsi
	je	.L63
	movq	(%rdx), %rax
	addq	$12, %rsi
	movq	%rax, -12(%rsi)
	movl	8(%rdx), %eax
	movl	%eax, -4(%rsi)
	movq	%rsi, 8(%rdi)
	ret
.L63:
	jmp	_ZNSt6vectorI6__edgeSaIS0_EE17_M_realloc_insertIJRKS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
	.cfi_endproc
.LFE5167:
	.size	_ZNSt6vectorI6__edgeSaIS0_EE9push_backERKS0_, .-_ZNSt6vectorI6__edgeSaIS0_EE9push_backERKS0_
	.section	.text._ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc,"axG",@progbits,_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc,comdat
	.align 2
	.weak	_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc
	.type	_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc, @function
_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc:
.LFB5530:
	.cfi_startproc
	endbr64
	movq	%rdi, %rax
	movq	%rdx, %rdi
	movq	8(%rax), %rcx
	subq	(%rax), %rcx
	movabsq	$2305843009213693951, %rax
	sarq	$2, %rcx
	movq	%rax, %rdx
	subq	%rcx, %rdx
	cmpq	%rsi, %rdx
	jnb	.L67
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	_ZSt20__throw_length_errorPKc@PLT
.L67:
	.cfi_def_cfa_offset 8
	cmpq	%rcx, %rsi
	cmovb	%rcx, %rsi
	addq	%rsi, %rcx
	jc	.L66
	movabsq	$2305843009213693951, %rax
	cmpq	%rax, %rcx
	cmovbe	%rcx, %rax
.L66:
	ret
	.cfi_endproc
.LFE5530:
	.size	_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc, .-_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc
	.text
	.align 2
	.type	_ZNSt6vectorIiSaIiEE12emplace_backIJiEEERiDpOT_.isra.0, @function
_ZNSt6vectorIiSaIiEE12emplace_backIJiEEERiDpOT_.isra.0:
.LFB5760:
	.cfi_startproc
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rdi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	movq	8(%rdi), %rbx
	cmpq	16(%rdi), %rbx
	je	.L76
	movl	(%rsi), %eax
	addq	$4, %rbx
	movl	%eax, -4(%rbx)
	movq	%rbx, 8(%rdi)
	jmp	.L75
.L76:
	movq	%rsi, 8(%rsp)
	leaq	.LC5(%rip), %rdx
	movl	$1, %esi
	movq	%rbx, %r15
	call	_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc
	movq	(%r14), %r12
	movq	8(%r14), %r13
	movq	%rax, %rdi
	movq	%rax, (%rsp)
	call	_ZNSt12_Vector_baseIiSaIiEE11_M_allocateEm.isra.0
	movq	8(%rsp), %r8
	subq	%r12, %r15
	movq	%rax, %rbp
	movl	(%r8), %eax
	movl	%eax, 0(%rbp,%r15)
	testq	%r15, %r15
	jle	.L78
	movq	%r15, %rdx
	movq	%r12, %rsi
	movq	%rbp, %rdi
	call	memmove@PLT
.L78:
	subq	%rbx, %r13
	leaq	4(%rbp,%r15), %rdi
	testq	%r13, %r13
	jle	.L79
	movq	%r13, %rdx
	movq	%rbx, %rsi
	call	memmove@PLT
	movq	%rax, %rdi
.L79:
	addq	%rdi, %r13
	testq	%r12, %r12
	je	.L80
	movq	16(%r14), %rsi
	movq	%r12, %rdi
	subq	%r12, %rsi
	call	_ZdlPvm@PLT
.L80:
	movq	(%rsp), %rax
	movq	%rbp, (%r14)
	movq	%r13, 8(%r14)
	leaq	0(%rbp,%rax,4), %rax
	movq	%rax, 16(%r14)
.L75:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE5760:
	.size	_ZNSt6vectorIiSaIiEE12emplace_backIJiEEERiDpOT_.isra.0, .-_ZNSt6vectorIiSaIiEE12emplace_backIJiEEERiDpOT_.isra.0
	.section	.text._ZSt25__unguarded_linear_insertIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops14_Val_comp_iterIPFbRKS2_SB_EEEEvT_T0_,"axG",@progbits,_ZSt25__unguarded_linear_insertIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops14_Val_comp_iterIPFbRKS2_SB_EEEEvT_T0_,comdat
	.weak	_ZSt25__unguarded_linear_insertIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops14_Val_comp_iterIPFbRKS2_SB_EEEEvT_T0_
	.type	_ZSt25__unguarded_linear_insertIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops14_Val_comp_iterIPFbRKS2_SB_EEEEvT_T0_, @function
_ZSt25__unguarded_linear_insertIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops14_Val_comp_iterIPFbRKS2_SB_EEEEvT_T0_:
.LFB5688:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rsi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	leaq	-12(%rdi), %rbx
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	movq	%fs:40, %rax
	movq	%rax, 24(%rsp)
	movq	(%rdi), %rax
	leaq	12(%rsp), %r12
	movq	%rax, 12(%rsp)
	movl	8(%rdi), %eax
	movl	%eax, 20(%rsp)
.L86:
	movq	%rbx, %rsi
	movq	%r12, %rdi
	call	*%rbp
	testb	%al, %al
	je	.L90
	movq	(%rbx), %rax
	subq	$12, %rbx
	movq	%rax, 24(%rbx)
	movl	20(%rbx), %eax
	movl	%eax, 32(%rbx)
	jmp	.L86
.L90:
	movq	12(%rsp), %rax
	movq	%rax, 12(%rbx)
	movl	20(%rsp), %eax
	movl	%eax, 20(%rbx)
	movq	24(%rsp), %rax
	subq	%fs:40, %rax
	je	.L88
	call	__stack_chk_fail@PLT
.L88:
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE5688:
	.size	_ZSt25__unguarded_linear_insertIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops14_Val_comp_iterIPFbRKS2_SB_EEEEvT_T0_, .-_ZSt25__unguarded_linear_insertIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops14_Val_comp_iterIPFbRKS2_SB_EEEEvT_T0_
	.section	.text._ZSt16__insertion_sortIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_T0_,"axG",@progbits,_ZSt16__insertion_sortIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_T0_,comdat
	.weak	_ZSt16__insertion_sortIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_T0_
	.type	_ZSt16__insertion_sortIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_T0_, @function
_ZSt16__insertion_sortIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_T0_:
.LFB5639:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	movq	%rdx, 8(%rsp)
	cmpq	%rdi, %rsi
	je	.L91
	movq	%rdi, %rbp
	movq	%rsi, %r12
	leaq	12(%rdi), %rbx
.L93:
	cmpq	%rbx, %r12
	je	.L91
	movq	8(%rsp), %rdi
	movq	%rbp, %rdx
	movq	%rbx, %rsi
	call	_ZN9__gnu_cxx5__ops15_Iter_comp_iterIPFbRK6__edgeS4_EEclINS_17__normal_iteratorIPS2_St6vectorIS2_SaIS2_EEEESE_EEbT_T0_.isra.0
	testb	%al, %al
	je	.L94
	movq	%rbx, %rdx
	movl	(%rbx), %r14d
	movl	4(%rbx), %r13d
	subq	%rbp, %rdx
	movl	8(%rbx), %r15d
	cmpq	$12, %rdx
	jle	.L95
	movl	$12, %edi
	movq	%rbp, %rsi
	subq	%rdx, %rdi
	addq	%rbx, %rdi
	call	memmove@PLT
	jmp	.L96
.L95:
	jne	.L96
	movq	0(%rbp), %rax
	movq	%rax, (%rbx)
	movl	8(%rbp), %eax
	movl	%eax, 8(%rbx)
.L96:
	movl	%r14d, 0(%rbp)
	movl	%r13d, 4(%rbp)
	movl	%r15d, 8(%rbp)
	jmp	.L97
.L94:
	movq	8(%rsp), %rsi
	movq	%rbx, %rdi
	call	_ZSt25__unguarded_linear_insertIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops14_Val_comp_iterIPFbRKS2_SB_EEEEvT_T0_
.L97:
	addq	$12, %rbx
	jmp	.L93
.L91:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE5639:
	.size	_ZSt16__insertion_sortIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_T0_, .-_ZSt16__insertion_sortIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_T0_
	.section	.text._ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEElS2_NS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_T0_SG_T1_T2_,"axG",@progbits,_ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEElS2_NS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_T0_SG_T1_T2_,comdat
	.weak	_ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEElS2_NS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_T0_SG_T1_T2_
	.type	_ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEElS2_NS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_T0_SG_T1_T2_, @function
_ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEElS2_NS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_T0_SG_T1_T2_:
.LFB5723:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%r9, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rsi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rdx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rsi, %rbx
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movq	%rcx, 16(%rsp)
	movl	$2, %ecx
	movl	%r8d, 24(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	leaq	-1(%rdx), %rax
	cqto
	idivq	%rcx
	movq	%rax, (%rsp)
.L104:
	cmpq	%rbx, (%rsp)
	jle	.L115
	leaq	1(%rbx), %rcx
	movq	%r14, %rdi
	addq	%rcx, %rcx
	imulq	$12, %rcx, %rsi
	leaq	-1(%rcx), %r15
	movq	%rcx, 8(%rsp)
	imulq	$12, %r15, %rdx
	addq	%rbp, %rsi
	addq	%rbp, %rdx
	call	_ZN9__gnu_cxx5__ops15_Iter_comp_iterIPFbRK6__edgeS4_EEclINS_17__normal_iteratorIPS2_St6vectorIS2_SaIS2_EEEESE_EEbT_T0_.isra.0
	movq	8(%rsp), %rcx
	testb	%al, %al
	cmove	%rcx, %r15
	imulq	$12, %rbx, %rbx
	imulq	$12, %r15, %rax
	addq	%rbp, %rbx
	addq	%rbp, %rax
	movq	(%rax), %rdx
	movq	%rdx, (%rbx)
	movl	8(%rax), %eax
	movl	%eax, 8(%rbx)
	movq	%r15, %rbx
	jmp	.L104
.L115:
	testl	$1, %r12d
	jne	.L107
	leaq	-2(%r12), %rax
	movl	$2, %ecx
	cqto
	idivq	%rcx
	cmpq	%rbx, %rax
	jne	.L107
	leaq	1(%rbx,%rbx), %rdx
	imulq	$12, %rdx, %rax
	imulq	$12, %rbx, %rbx
	addq	%rbp, %rax
	movq	(%rax), %rcx
	addq	%rbp, %rbx
	movq	%rcx, (%rbx)
	movl	8(%rax), %eax
	movl	%eax, 8(%rbx)
	movq	%rdx, %rbx
.L107:
	movq	16(%rsp), %rax
	movl	$2, %ecx
	movq	%rax, 44(%rsp)
	movl	24(%rsp), %eax
	movl	%eax, 52(%rsp)
	leaq	-1(%rbx), %rax
	cqto
	idivq	%rcx
	movq	%rax, %r12
	leaq	44(%rsp), %rax
	movq	%rax, (%rsp)
.L109:
	imulq	$12, %rbx, %rdx
	leaq	0(%rbp,%rdx), %r15
	cmpq	%rbx, %r13
	jge	.L108
	imulq	$12, %r12, %rbx
	movq	(%rsp), %rsi
	addq	%rbp, %rbx
	movq	%rbx, %rdi
	call	*%r14
	testb	%al, %al
	je	.L108
	movq	(%rbx), %rax
	movl	$2, %ecx
	movq	%rax, (%r15)
	movl	8(%rbx), %eax
	movq	%r12, %rbx
	movl	%eax, 8(%r15)
	leaq	-1(%r12), %rax
	cqto
	idivq	%rcx
	movq	%rax, %r12
	jmp	.L109
.L108:
	movq	44(%rsp), %rax
	movq	%rax, (%r15)
	movl	52(%rsp), %eax
	movl	%eax, 8(%r15)
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L110
	call	__stack_chk_fail@PLT
.L110:
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE5723:
	.size	_ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEElS2_NS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_T0_SG_T1_T2_, .-_ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEElS2_NS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_T0_SG_T1_T2_
	.section	.text._ZSt16__introsort_loopIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEElNS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_T0_T1_,"axG",@progbits,_ZSt16__introsort_loopIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEElNS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_T0_T1_,comdat
	.weak	_ZSt16__introsort_loopIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEElNS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_T0_T1_
	.type	_ZSt16__introsort_loopIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEElNS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_T0_T1_, @function
_ZSt16__introsort_loopIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEElNS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_T0_T1_:
.LFB5547:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rdx, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rsi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdi, %rbx
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	movq	%rcx, 8(%rsp)
.L117:
	movq	%rbp, %r12
	subq	%rbx, %r12
	cmpq	$192, %r12
	jle	.L116
	movabsq	$-6148914691236517205, %rax
	sarq	$2, %r12
	imulq	%rax, %r12
	testq	%r13, %r13
	jne	.L118
	leaq	-2(%r12), %r13
	sarq	%r13
.L121:
	imulq	$12, %r13, %rax
	movq	8(%rsp), %r9
	movq	%r12, %rdx
	movq	%r13, %rsi
	movq	%rbx, %rdi
	movq	(%rbx,%rax), %rcx
	movl	8(%rbx,%rax), %r8d
	movq	%rcx, 20(%rsp)
	movl	%r8d, 28(%rsp)
	call	_ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEElS2_NS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_T0_SG_T1_T2_
	testq	%r13, %r13
	jne	.L119
	movabsq	$-6148914691236517205, %r13
	jmp	.L120
.L119:
	decq	%r13
	jmp	.L121
.L120:
	movq	%rbp, %rax
	subq	$12, %rbp
	subq	%rbx, %rax
	cmpq	$12, %rax
	jle	.L116
	movq	(%rbx), %rax
	movq	%rbp, %rdx
	movq	0(%rbp), %rcx
	xorl	%esi, %esi
	subq	%rbx, %rdx
	movl	8(%rbp), %r8d
	movq	8(%rsp), %r9
	movq	%rbx, %rdi
	movq	%rax, 0(%rbp)
	movl	8(%rbx), %eax
	sarq	$2, %rdx
	imulq	%r13, %rdx
	movq	%rcx, 20(%rsp)
	movl	%eax, 8(%rbp)
	movl	%r8d, 28(%rsp)
	call	_ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEElS2_NS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_T0_SG_T1_T2_
	jmp	.L120
.L118:
	sarq	%r12
	movq	8(%rsp), %rdi
	leaq	-12(%rbp), %r14
	imulq	$12, %r12, %rcx
	leaq	12(%rbx), %r12
	movq	%r12, %rsi
	leaq	(%rbx,%rcx), %r15
	movq	%r15, %rdx
	call	_ZN9__gnu_cxx5__ops15_Iter_comp_iterIPFbRK6__edgeS4_EEclINS_17__normal_iteratorIPS2_St6vectorIS2_SaIS2_EEEESE_EEbT_T0_.isra.0
	movq	%r14, %rdx
	testb	%al, %al
	je	.L124
	movq	8(%rsp), %rdi
	movq	%r15, %rsi
	call	_ZN9__gnu_cxx5__ops15_Iter_comp_iterIPFbRK6__edgeS4_EEclINS_17__normal_iteratorIPS2_St6vectorIS2_SaIS2_EEEESE_EEbT_T0_.isra.0
	testb	%al, %al
	je	.L125
	movl	8(%rbx), %eax
	jmp	.L129
.L125:
	movq	8(%rsp), %rdi
	movq	%r14, %rdx
	movq	%r12, %rsi
	call	_ZN9__gnu_cxx5__ops15_Iter_comp_iterIPFbRK6__edgeS4_EEclINS_17__normal_iteratorIPS2_St6vectorIS2_SaIS2_EEEESE_EEbT_T0_.isra.0
	testb	%al, %al
	movl	8(%rbx), %eax
	je	.L139
	jmp	.L138
.L124:
	movq	8(%rsp), %rdi
	movq	%r12, %rsi
	call	_ZN9__gnu_cxx5__ops15_Iter_comp_iterIPFbRK6__edgeS4_EEclINS_17__normal_iteratorIPS2_St6vectorIS2_SaIS2_EEEESE_EEbT_T0_.isra.0
	testb	%al, %al
	je	.L128
	movl	8(%rbx), %eax
.L139:
	movq	12(%rbx), %rcx
	movq	(%rbx), %rdx
	movq	%rcx, (%rbx)
	movl	20(%rbx), %ecx
	movq	%rdx, 12(%rbx)
	movl	%ecx, 8(%rbx)
	movl	%eax, 20(%rbx)
	jmp	.L126
.L128:
	movq	8(%rsp), %rdi
	movq	%r14, %rdx
	movq	%r15, %rsi
	call	_ZN9__gnu_cxx5__ops15_Iter_comp_iterIPFbRK6__edgeS4_EEclINS_17__normal_iteratorIPS2_St6vectorIS2_SaIS2_EEEESE_EEbT_T0_.isra.0
	testb	%al, %al
	movl	8(%rbx), %eax
	je	.L129
.L138:
	movq	-12(%rbp), %rsi
	movl	(%rbx), %ecx
	movl	4(%rbx), %edx
	movq	%rsi, (%rbx)
	movl	-4(%rbp), %esi
	movl	%esi, 8(%rbx)
	movl	%ecx, -12(%rbp)
	movl	%edx, -8(%rbp)
	movl	%eax, -4(%rbp)
	jmp	.L126
.L129:
	movq	(%r15), %rsi
	movq	(%rbx), %rdx
	movq	%rsi, (%rbx)
	movl	8(%r15), %esi
	movl	%esi, 8(%rbx)
	movq	%rdx, (%r15)
	movl	%eax, 8(%r15)
.L126:
	movq	%rbp, %r15
.L130:
	movq	8(%rsp), %rdi
	movq	%r12, %rsi
	movq	%rbx, %rdx
	movq	%r12, %r14
	leaq	12(%r12), %r12
	call	_ZN9__gnu_cxx5__ops15_Iter_comp_iterIPFbRK6__edgeS4_EEclINS_17__normal_iteratorIPS2_St6vectorIS2_SaIS2_EEEESE_EEbT_T0_.isra.0
	testb	%al, %al
	jne	.L130
	leaq	-12(%r15), %r12
.L131:
	movq	8(%rsp), %rdi
	movq	%r12, %rdx
	movq	%rbx, %rsi
	movq	%r12, %r15
	subq	$12, %r12
	call	_ZN9__gnu_cxx5__ops15_Iter_comp_iterIPFbRK6__edgeS4_EEclINS_17__normal_iteratorIPS2_St6vectorIS2_SaIS2_EEEESE_EEbT_T0_.isra.0
	testb	%al, %al
	jne	.L131
	cmpq	%r15, %r14
	jb	.L132
	movq	8(%rsp), %rcx
	decq	%r13
	movq	%rbp, %rsi
	movq	%r14, %rdi
	movq	%r13, %rdx
	movq	%r14, %rbp
	call	_ZSt16__introsort_loopIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEElNS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_T0_T1_
	jmp	.L117
.L132:
	movq	(%r15), %rsi
	movl	8(%r14), %eax
	leaq	12(%r14), %r12
	movq	(%r14), %rdx
	movq	%rsi, (%r14)
	movl	8(%r15), %esi
	movl	%esi, 8(%r14)
	movq	%rdx, (%r15)
	movl	%eax, 8(%r15)
	jmp	.L130
.L116:
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE5547:
	.size	_ZSt16__introsort_loopIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEElNS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_T0_T1_, .-_ZSt16__introsort_loopIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEElNS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_T0_T1_
	.section	.rodata.str1.1
.LC7:
	.string	"./a.out <filename>\n"
.LC8:
	.string	"r"
.LC9:
	.string	"Error reading file.\n"
.LC10:
	.string	"Begin file reading...\n"
.LC11:
	.string	"%d %d"
.LC12:
	.string	"cannot create std::vector larger than max_size()"
.LC13:
	.string	"%d"
.LC14:
	.string	"Finished file reading.\n"
.LC15:
	.string	"\nBegin interval construction...\n"
.LC17:
	.string	"Time to construct intervals : %f sec\n"
.LC18:
	.string	"\nBegin shard construction...\n"
.LC19:
	.string	"Time to construct shards : %f sec\n"
.LC21:
	.string	"Begin kernel\n"
.LC24:
	.string	"Number of iterations : %d\n"
.LC25:
	.string	"Time: %f ms\n"
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB4802:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA4802
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$280, %rsp
	.cfi_def_cfa_offset 336
	movq	%fs:40, %rax
	movq	%rax, 264(%rsp)
	xorl	%eax, %eax
	cmpl	$2, %edi
	je	.L141
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	jmp	.L213
.L141:
	movq	8(%rsi), %rdi
	leaq	.LC8(%rip), %rsi
.LEHB0:
	call	fopen@PLT
	movq	%rax, %rbx
	testq	%rax, %rax
	jne	.L142
	leaq	.LC9(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
.L213:
	call	__printf_chk@PLT
	orl	$-1, %edi
	call	exit@PLT
.L142:
	xorl	%edi, %edi
	call	cudaSetDevice@PLT
	movl	$151, %esi
	movl	%eax, %edi
	call	_Z9safe_call9cudaErrori
	leaq	.LC10(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	76(%rsp), %rcx
	movq	%rbx, %rdi
	xorl	%eax, %eax
	leaq	72(%rsp), %rdx
	leaq	.LC11(%rip), %rsi
	call	__isoc23_fscanf@PLT
	movslq	72(%rsp), %rbp
	movabsq	$384307168202282325, %rax
	cmpq	%rbp, %rax
	jnb	.L143
	movq	264(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L211
	leaq	.LC12(%rip), %rdi
	call	_ZSt20__throw_length_errorPKc@PLT
.L143:
	imulq	$24, %rbp, %r12
	xorl	%r14d, %r14d
	testq	%rbp, %rbp
	je	.L145
	movq	%r12, %rdi
	call	_Znwm@PLT
.LEHE0:
	movq	%rax, %r14
.L145:
	addq	%r14, %r12
	movq	%r14, 192(%rsp)
	movq	%r14, %rax
	movq	%r12, 208(%rsp)
.L146:
	testq	%rbp, %rbp
	je	.L214
	xorl	%r8d, %r8d
	decq	%rbp
	addq	$24, %rax
	movq	%r8, -24(%rax)
	movq	%r8, -16(%rax)
	movq	%r8, -8(%rax)
	jmp	.L146
.L214:
	movslq	72(%rsp), %rdi
	movl	$4, %esi
	movq	%r12, 200(%rsp)
	leaq	.LC13(%rip), %r13
	xorl	%r12d, %r12d
	call	calloc@PLT
	movq	%rax, %rbp
.L148:
	cmpl	%r12d, 76(%rsp)
	jle	.L215
	leaq	80(%rsp), %rdx
	movq	%r13, %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
.LEHB1:
	call	__isoc23_fscanf@PLT
	leaq	84(%rsp), %rdx
	movq	%r13, %rsi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	call	__isoc23_fscanf@PLT
	movslq	80(%rsp), %rdi
	movl	84(%rsp), %eax
	leaq	240(%rsp), %rsi
	movl	%edi, 240(%rsp)
	imulq	$24, %rdi, %rdi
	movl	%eax, 244(%rsp)
	addq	%r14, %rdi
	call	_ZNSt6vectorI6__edgeSaIS0_EE9push_backERKS0_
	incl	%r12d
	jmp	.L148
.L215:
	leaq	.LC14(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC15(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.LEHE1:
	leaq	160(%rsp), %rax
	xorl	%esi, %esi
	movq	%rax, %rdi
	movq	%rax, 40(%rsp)
	call	gettimeofday@PLT
	movq	8(%r14), %rax
	subq	(%r14), %rax
	xorl	%edi, %edi
	sarq	$2, %rax
	movq	%rdi, 216(%rsp)
	movabsq	$-6148914691236517205, %rdx
	imulq	%rdx, %rax
	movq	%rdi, 224(%rsp)
	movq	%rdi, 232(%rsp)
	movl	%eax, 0(%rbp)
	cmpl	$33554432, %eax
	jle	.L195
	xorl	%esi, %esi
	leaq	216(%rsp), %rdi
	movl	%esi, 240(%rsp)
	leaq	240(%rsp), %rsi
.LEHB2:
	call	_ZNSt6vectorIiSaIiEE12emplace_backIJiEEERiDpOT_.isra.0
	movl	$1, 4(%rsp)
	xorl	%edx, %edx
	jmp	.L150
.L195:
	xorl	%ecx, %ecx
	movl	$1, %edx
	movl	%ecx, 4(%rsp)
.L150:
	leaq	24(%r14), %r15
	movl	$1, %r12d
.L151:
	movl	%r12d, 16(%rsp)
	cmpl	%r12d, 72(%rsp)
	jle	.L216
	movabsq	$-6148914691236517205, %rcx
	movq	8(%r15), %rax
	subq	(%r15), %rax
	sarq	$2, %rax
	imulq	%rcx, %rax
	decl	%edx
	movl	%eax, 0(%rbp,%r12,4)
	jne	.L152
	addl	-4(%rbp,%r12,4), %eax
	movl	%eax, 0(%rbp,%r12,4)
.L152:
	cmpl	$33554432, 0(%rbp,%r12,4)
	movl	$1, %edx
	jle	.L153
	movq	232(%rsp), %rax
	movq	224(%rsp), %rbx
	movq	%rax, 24(%rsp)
	cmpq	%rax, %rbx
	je	.L154
	movl	16(%rsp), %eax
	addq	$4, %rbx
	movl	%eax, -4(%rbx)
	movq	%rbx, 224(%rsp)
	jmp	.L155
.L154:
	leaq	216(%rsp), %rdi
	leaq	.LC5(%rip), %rdx
	movl	$1, %esi
	call	_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc
	movq	%rax, 32(%rsp)
	movq	216(%rsp), %rax
	movq	32(%rsp), %rdi
	movq	%rax, 8(%rsp)
	subq	%rax, %rbx
	call	_ZNSt12_Vector_baseIiSaIiEE11_M_allocateEm.isra.0
	movq	%rax, %r13
	movl	16(%rsp), %eax
	movl	%eax, 0(%r13,%rbx)
	testq	%rbx, %rbx
	jle	.L156
	movq	8(%rsp), %rsi
	movq	%rbx, %rdx
	movq	%r13, %rdi
	call	memmove@PLT
.L156:
	cmpq	$0, 8(%rsp)
	leaq	4(%r13,%rbx), %rbx
	je	.L157
	movq	8(%rsp), %rax
	movq	24(%rsp), %rsi
	movq	%rax, %rdi
	subq	%rax, %rsi
	call	_ZdlPvm@PLT
.L157:
	movq	32(%rsp), %rax
	movq	%r13, 216(%rsp)
	movq	%rbx, 224(%rsp)
	leaq	0(%r13,%rax,4), %rax
	movq	%rax, 232(%rsp)
.L155:
	incl	4(%rsp)
	xorl	%edx, %edx
.L153:
	incq	%r12
	addq	$24, %r15
	jmp	.L151
.L216:
	decl	%edx
	jne	.L159
	movl	%r12d, %r13d
	leaq	240(%rsp), %rsi
	leaq	216(%rsp), %rdi
	decl	%r13d
	movl	%r13d, 240(%rsp)
	call	_ZNSt6vectorIiSaIiEE12emplace_backIJiEEERiDpOT_.isra.0
	incl	4(%rsp)
.L159:
	movslq	4(%rsp), %rbx
	leaq	0(,%rbx,8), %rdi
	call	malloc@PLT
	movq	216(%rsp), %rcx
	movq	%rax, %r15
	xorl	%eax, %eax
.L160:
	cmpl	%eax, 4(%rsp)
	jle	.L217
	xorl	%edx, %edx
	testq	%rax, %rax
	je	.L161
	movl	-4(%rcx,%rax,4), %edx
	incl	%edx
.L161:
	movl	%edx, (%r15,%rax,8)
	movl	(%rcx,%rax,4), %edx
	movl	%edx, 4(%r15,%rax,8)
	incq	%rax
	jmp	.L160
.L217:
	leaq	176(%rsp), %rax
	xorl	%esi, %esi
	movq	%rax, %rdi
	movq	%rax, 48(%rsp)
	call	gettimeofday@PLT
	leaq	.LC17(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtsi2sdq	184(%rsp), %xmm0
	mulsd	.LC16(%rip), %xmm0
	cvtsi2sdq	176(%rsp), %xmm1
	cvtsi2sdq	160(%rsp), %xmm2
	addsd	%xmm1, %xmm0
	cvtsi2sdq	168(%rsp), %xmm1
	mulsd	.LC16(%rip), %xmm1
	addsd	%xmm2, %xmm1
	subsd	%xmm1, %xmm0
	call	__printf_chk@PLT
	leaq	.LC18(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.LEHE2:
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	salq	$5, %rbx
	call	gettimeofday@PLT
	movq	%rbx, %rdi
	call	malloc@PLT
	movl	$-2147483648, 8(%rsp)
	movq	%rax, 32(%rsp)
	xorl	%eax, %eax
.L163:
	cmpl	%eax, 4(%rsp)
	jle	.L218
	movslq	4(%r15,%rax,8), %rdx
	movl	0(%rbp,%rdx,4), %edx
	cmpl	%edx, 8(%rsp)
	cmovge	8(%rsp), %edx
	incq	%rax
	movl	%edx, 8(%rsp)
	jmp	.L163
.L218:
	movslq	8(%rsp), %rax
	movq	32(%rsp), %rbx
	xorl	%r12d, %r12d
	imulq	$12, %rax, %rax
	movq	%rax, 24(%rsp)
.L165:
	cmpl	%r12d, 4(%rsp)
	jle	.L219
	movl	(%r15,%r12,8), %eax
	movq	24(%rsp), %rdi
	addq	$32, %rbx
	movl	%eax, -28(%rbx)
	movslq	4(%r15,%r12,8), %rax
	incq	%r12
	movl	%eax, -24(%rbx)
	movl	0(%rbp,%rax,4), %eax
	movl	%eax, -32(%rbx)
	call	malloc@PLT
	movq	24(%rsp), %rdi
	movq	%rax, -16(%rbx)
	call	malloc@PLT
	movq	%rax, -8(%rbx)
	jmp	.L165
.L219:
	movq	32(%rsp), %rax
	xorl	%r13d, %r13d
	addq	$16, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, %rbp
.L167:
	cmpl	%r13d, 4(%rsp)
	jle	.L220
	xorl	%eax, %eax
	movslq	(%r15,%r13,8), %rbx
	movq	%rax, 240(%rsp)
	movq	%rax, 248(%rsp)
	movq	%rax, 256(%rsp)
	leaq	240(%rsp), %rax
	movq	%rax, 56(%rsp)
.L168:
	cmpl	%ebx, 4(%r15,%r13,8)
	jl	.L221
	imulq	$24, %rbx, %r12
	movq	(%r14,%r12), %rax
	movq	%rax, 16(%rsp)
.L169:
	movq	16(%rsp), %rax
	cmpq	8(%r14,%r12), %rax
	je	.L222
	movq	16(%rsp), %rsi
	movq	56(%rsp), %rdi
.LEHB3:
	call	_ZNSt6vectorI6__edgeSaIS0_EE9push_backERKS0_
	addq	$12, 16(%rsp)
	jmp	.L169
.L222:
	incq	%rbx
	jmp	.L168
.L221:
	movq	248(%rsp), %rax
	movq	240(%rsp), %r12
	movq	%rax, 16(%rsp)
	cmpq	%rax, %r12
	je	.L172
	movq	%rax, %rbx
	movq	16(%rsp), %rsi
	movq	%r12, %rdi
	movabsq	$-6148914691236517205, %rcx
	subq	%r12, %rbx
	movq	%rbx, %rax
	sarq	$2, %rax
	imulq	%rcx, %rax
	leaq	_Z4costRK6__edgeS1_(%rip), %rcx
	bsrq	%rax, %rdx
	xorq	$63, %rdx
	testq	%rax, %rax
	movl	$64, %eax
	cmovne	%edx, %eax
	movl	$63, %edx
	subl	%eax, %edx
	movslq	%edx, %rdx
	addq	%rdx, %rdx
	call	_ZSt16__introsort_loopIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEElNS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_T0_T1_
	cmpq	$192, %rbx
	jle	.L174
	leaq	192(%r12), %rbx
	leaq	_Z4costRK6__edgeS1_(%rip), %rdx
	movq	%r12, %rdi
	movq	%rbx, %rsi
	call	_ZSt16__insertion_sortIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_T0_
.L175:
	cmpq	%rbx, 16(%rsp)
	je	.L172
	leaq	_Z4costRK6__edgeS1_(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZSt25__unguarded_linear_insertIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops14_Val_comp_iterIPFbRKS2_SB_EEEEvT_T0_
	addq	$12, %rbx
	jmp	.L175
.L174:
	movq	16(%rsp), %rsi
	leaq	_Z4costRK6__edgeS1_(%rip), %rdx
	movq	%r12, %rdi
	call	_ZSt16__insertion_sortIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_T0_
.LEHE3:
.L172:
	xorl	%eax, %eax
.L178:
	cmpq	%r12, 16(%rsp)
	je	.L223
	movl	(%r12), %ecx
	movq	0(%rbp), %rdx
	addq	$12, %r12
	movl	%ecx, (%rdx,%rax)
	movq	8(%rbp), %rdx
	movl	-8(%r12), %ecx
	movl	%ecx, (%rdx,%rax)
	addq	$4, %rax
	jmp	.L178
.L223:
	leaq	240(%rsp), %rdi
	incq	%r13
	addq	$32, %rbp
	call	_ZNSt6vectorI6__edgeSaIS0_EED1Ev
	jmp	.L167
.L220:
	movq	48(%rsp), %rdi
	xorl	%esi, %esi
	call	gettimeofday@PLT
	leaq	.LC19(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtsi2sdq	184(%rsp), %xmm0
	mulsd	.LC16(%rip), %xmm0
	cvtsi2sdq	176(%rsp), %xmm1
	cvtsi2sdq	160(%rsp), %xmm2
	addsd	%xmm1, %xmm0
	cvtsi2sdq	168(%rsp), %xmm1
	mulsd	.LC16(%rip), %xmm1
	addsd	%xmm2, %xmm1
	subsd	%xmm1, %xmm0
.LEHB4:
	call	__printf_chk@PLT
	cmpl	$1024, 8(%rsp)
	movl	$1, %eax
	jle	.L181
	cvtsi2sdl	8(%rsp), %xmm0
	mulsd	.LC20(%rip), %xmm0
	call	ceil@PLT
	movl	$1024, 8(%rsp)
	cvttsd2sil	%xmm0, %eax
.L181:
	movl	8(%rsp), %ecx
	movl	%eax, 120(%rsp)
	leaq	88(%rsp), %rdi
	movabsq	$4294967297, %rax
	movl	$32, %esi
	movq	%rax, 124(%rsp)
	movl	%ecx, 132(%rsp)
	movq	%rax, 136(%rsp)
	call	cudaMalloc@PLT
	movl	%eax, %edi
	movl	$292, %esi
	call	_Z9safe_call9cudaErrori
	leaq	96(%rsp), %r14
	movq	24(%rsp), %rsi
	movq	%r14, %rdi
	call	cudaMalloc@PLT
	movl	%eax, %edi
	movl	$293, %esi
	call	_Z9safe_call9cudaErrori
	movq	24(%rsp), %rsi
	leaq	104(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	%eax, %edi
	movl	$294, %esi
	call	_Z9safe_call9cudaErrori
	movslq	72(%rsp), %rbx
	salq	$2, %rbx
	movq	%rbx, %rdi
	call	malloc@PLT
	leaq	112(%rsp), %rdi
	movq	%rbx, %rsi
	movq	%rax, %rbp
	call	cudaMalloc@PLT
	movl	%eax, %edi
	movl	$300, %esi
	call	_Z9safe_call9cudaErrori
	movl	72(%rsp), %eax
	movl	$1024, %esi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, 248(%rsp)
	movl	$4194305, %ecx
	addl	$1023, %eax
	salq	$10, %rcx
	cltd
	movq	%rcx, 240(%rsp)
	idivl	%esi
	movq	%rcx, %rdx
	movl	$1, %ecx
	movl	%eax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 148(%rsp)
	movq	144(%rsp), %rdi
	movl	152(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L182
	movl	72(%rsp), %edx
	movq	112(%rsp), %rdi
	xorl	%esi, %esi
	call	_Z33__device_stub__Z4initP8__vertexiiP8__vertexii
.L182:
	leaq	144(%rsp), %rdi
	call	cudaEventCreate@PLT
	movl	%eax, %edi
	movl	$308, %esi
	call	_Z9safe_call9cudaErrori
	leaq	240(%rsp), %rdi
	call	cudaEventCreate@PLT
	movl	%eax, %edi
	movl	$309, %esi
	call	_Z9safe_call9cudaErrori
	leaq	.LC21(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	$0x000000000, 8(%rsp)
	xorl	%r12d, %r12d
.L186:
	leaq	71(%rsp), %rsi
	movl	$1, %r8d
	xorl	%ecx, %ecx
	movl	$1, %edx
	leaq	_ZL6d_over(%rip), %rdi
	movb	$0, 71(%rsp)
	call	cudaMemcpyToSymbol@PLT
	movl	%eax, %edi
	movl	$318, %esi
	call	_Z9safe_call9cudaErrori
	call	cudaDeviceSynchronize@PLT
	movl	%eax, %edi
	movl	$319, %esi
	call	_Z9safe_call9cudaErrori
	movq	32(%rsp), %rbx
	xorl	%r13d, %r13d
.L183:
	cmpl	%r13d, 4(%rsp)
	jle	.L224
	movq	88(%rsp), %rdi
	movl	$1, %ecx
	movl	$32, %edx
	movq	%rbx, %rsi
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	movl	$332, %esi
	call	_Z9safe_call9cudaErrori
	movslq	(%rbx), %rdx
	movq	16(%rbx), %rsi
	movl	$1, %ecx
	movq	96(%rsp), %rdi
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	movl	$333, %esi
	call	_Z9safe_call9cudaErrori
	movslq	(%rbx), %rdx
	movq	24(%rbx), %rsi
	movl	$1, %ecx
	movq	104(%rsp), %rdi
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	movl	$334, %esi
	call	_Z9safe_call9cudaErrori
	movq	88(%rsp), %rax
	movl	$1, %ecx
	movl	$8, %edx
	movq	%r14, %rsi
	leaq	16(%rax), %rdi
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	movl	$335, %esi
	call	_Z9safe_call9cudaErrori
	movq	88(%rsp), %rax
	leaq	104(%rsp), %rsi
	movl	$1, %ecx
	movl	$8, %edx
	leaq	24(%rax), %rdi
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	movl	$336, %esi
	call	_Z9safe_call9cudaErrori
	leaq	160(%rsp), %rdi
	xorl	%esi, %esi
	call	gettimeofday@PLT
	movq	120(%rsp), %rdi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	140(%rsp), %ecx
	movq	132(%rsp), %rdx
	movl	128(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L184
	movl	72(%rsp), %ecx
	movq	112(%rsp), %rsi
	movl	%r12d, %edx
	movq	88(%rsp), %rdi
	call	_Z51__device_stub__Z11scatter_bfsPK7__shardP8__vertexiiPK7__shardP8__vertexii
.L184:
	call	cudaDeviceSynchronize@PLT
	movl	%eax, %edi
	movl	$343, %esi
	call	_Z9safe_call9cudaErrori
	leaq	176(%rsp), %rdi
	xorl	%esi, %esi
	incl	%r13d
	addq	$32, %rbx
	call	gettimeofday@PLT
	movsd	.LC23(%rip), %xmm3
	cvtsi2sdq	184(%rsp), %xmm1
	cvtsi2sdq	176(%rsp), %xmm0
	mulsd	.LC22(%rip), %xmm0
	cvtsi2sdq	168(%rsp), %xmm2
	mulsd	%xmm3, %xmm1
	mulsd	%xmm3, %xmm2
	addsd	%xmm1, %xmm0
	cvtsi2sdq	160(%rsp), %xmm1
	mulsd	.LC22(%rip), %xmm1
	addsd	%xmm2, %xmm1
	subsd	%xmm1, %xmm0
	addsd	8(%rsp), %xmm0
	movsd	%xmm0, 8(%rsp)
	jmp	.L183
.L224:
	leaq	71(%rsp), %rdi
	movl	$2, %r8d
	xorl	%ecx, %ecx
	movl	$1, %edx
	leaq	_ZL6d_over(%rip), %rsi
	call	cudaMemcpyFromSymbol@PLT
	movl	%eax, %edi
	movl	$368, %esi
	call	_Z9safe_call9cudaErrori
	incl	%r12d
	cmpb	$0, 71(%rsp)
	jne	.L186
	movl	%r12d, %edx
	leaq	.LC24(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movslq	72(%rsp), %rdx
	movq	112(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbp, %rdi
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	movl	$373, %esi
	call	_Z9safe_call9cudaErrori
	movsd	8(%rsp), %xmm0
	leaq	.LC25(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	call	__printf_chk@PLT
	movq	%r15, %rdi
	xorl	%ebx, %ebx
	call	free@PLT
.L187:
	cmpl	%ebx, 4(%rsp)
	jle	.L225
	movq	40(%rsp), %rax
	incl	%ebx
	movq	(%rax), %rdi
	call	free@PLT
	movq	40(%rsp), %rax
	movq	8(%rax), %rdi
	call	free@PLT
	addq	$32, 40(%rsp)
	jmp	.L187
.L225:
	movq	32(%rsp), %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	112(%rsp), %rdi
	call	cudaFree@PLT
	movl	%eax, %edi
	movl	$391, %esi
	call	_Z9safe_call9cudaErrori
	movq	96(%rsp), %rdi
	call	cudaFree@PLT
	movl	%eax, %edi
	movl	$392, %esi
	call	_Z9safe_call9cudaErrori
	movq	104(%rsp), %rdi
	call	cudaFree@PLT
	movl	%eax, %edi
	movl	$393, %esi
	call	_Z9safe_call9cudaErrori
	movq	88(%rsp), %rdi
	call	cudaFree@PLT
	movl	%eax, %edi
	movl	$394, %esi
	call	_Z9safe_call9cudaErrori
	movq	144(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movl	%eax, %edi
	movl	$397, %esi
	call	_Z9safe_call9cudaErrori
	movq	240(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movl	%eax, %edi
	movl	$398, %esi
	call	_Z9safe_call9cudaErrori
.LEHE4:
	leaq	216(%rsp), %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	leaq	192(%rsp), %rdi
	call	_ZNSt6vectorIS_I6__edgeSaIS0_EESaIS2_EED1Ev
	movq	264(%rsp), %rax
	subq	%fs:40, %rax
	je	.L193
	jmp	.L211
.L203:
	endbr64
	movq	%rax, %rbx
.L189:
	leaq	240(%rsp), %rdi
	call	_ZNSt6vectorI6__edgeSaIS0_EED1Ev
	jmp	.L190
.L202:
	endbr64
	movq	%rax, %rbx
.L190:
	leaq	216(%rsp), %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	jmp	.L191
.L201:
	endbr64
	movq	%rax, %rbx
.L191:
	leaq	192(%rsp), %rdi
	call	_ZNSt6vectorIS_I6__edgeSaIS0_EESaIS2_EED1Ev
	movq	264(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L211
	movq	%rbx, %rdi
.LEHB5:
	call	_Unwind_Resume@PLT
.LEHE5:
.L211:
	call	__stack_chk_fail@PLT
.L193:
	addq	$280, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4802:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table,"a",@progbits
.LLSDA4802:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE4802-.LLSDACSB4802
.LLSDACSB4802:
	.uleb128 .LEHB0-.LFB4802
	.uleb128 .LEHE0-.LEHB0
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB1-.LFB4802
	.uleb128 .LEHE1-.LEHB1
	.uleb128 .L201-.LFB4802
	.uleb128 0
	.uleb128 .LEHB2-.LFB4802
	.uleb128 .LEHE2-.LEHB2
	.uleb128 .L202-.LFB4802
	.uleb128 0
	.uleb128 .LEHB3-.LFB4802
	.uleb128 .LEHE3-.LEHB3
	.uleb128 .L203-.LFB4802
	.uleb128 0
	.uleb128 .LEHB4-.LFB4802
	.uleb128 .LEHE4-.LEHB4
	.uleb128 .L202-.LFB4802
	.uleb128 0
	.uleb128 .LEHB5-.LFB4802
	.uleb128 .LEHE5-.LEHB5
	.uleb128 0
	.uleb128 0
.LLSDACSE4802:
	.section	.text.startup
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZL6d_over
	.comm	_ZL6d_over,1,1
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC16:
	.long	-1598689907
	.long	1051772663
	.align 8
.LC20:
	.long	0
	.long	1062207488
	.align 8
.LC22:
	.long	0
	.long	1083129856
	.align 8
.LC23:
	.long	-755914244
	.long	1062232653
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <vector>
#include <set>
#include <map>
#include <algorithm>
#include <stdio.h>
#include <stdlib.h>
#include <hip/hip_runtime.h>
#include <sys/time.h>

using namespace std;

#define CUDA_SAFE_CALL( err ) (safe_call(err, __LINE__))
#define MAX_THREADS_PER_BLOCK 1024
#define MAX_EDGES_PER_SHARD 33554432 

void safe_call(hipError_t ret, int line)
{
	if(ret!=hipSuccess)
	{
		printf("Error at line %d : %s\n",line,hipGetErrorString(ret));
		exit(-1);
	}
}

typedef struct __interval
{
	int start;
	int end;
} interval_t;

typedef struct __edge
{
	int src;
	int dest;
	int val;
} edge_t;

typedef struct __vertex
{
	int val;
} vertex_t;

typedef struct __shard
{
	int E;
	int Vstart;
	int Vend;
	vertex_t * from;
	vertex_t * to;
} shard_t;
/*
typedef struct __graph
{
	vertex_t * vertices;
} graph_t;

graph_t * load_subgraph(interval_t, vector<edge_t>);
*/
__device__ bool d_over;

__global__ void reset()
{
	d_over = false;
}

__global__ void init(vertex_t * vertices, int starting_vertex, int num_vertices)
{
	int v = blockDim.x*blockIdx.x + threadIdx.x;
	if (v==starting_vertex)
		vertices[v].val = 0;
	else if(v < num_vertices)
		vertices[v].val = -1;
}

/*__global__ void gather_bfs(shard_t * shard, vertex_t * vertices, int current_depth)
{
	int id = blockDim.x*blockIdx.x + threadIdx.x;
	if(id < shard->E)
	{
		if(shard->edges[id].val == (current_depth+1))
		{
			int t=shard->edges[id].dest;
			if(vertices[t].val == -1)
			{
				vertices[t].val = current_depth+1;
				d_over = true;
			}
		}
	}
}*/

__global__ void scatter_bfs(const shard_t * shard, vertex_t * vertices, int current_depth, int V)
{
	int id = blockDim.x*blockIdx.x + threadIdx.x;
	if(id < shard->E)
	{
		int s=shard->from[id].val;
		if(s < V)
		{
			int t=vertices[s].val;
			if(t==current_depth)
			{
				//shard->edges[id].val = t+1;
				int u=shard->to[id].val;
				if(u < V)
				{
					if(vertices[u].val == -1)
					{
						vertices[u].val = t+1;
						d_over = true;
					}
				}
				else
					printf("Illegal vertex dest: %d\n",u);
			}
		}
		else
			printf("Illegal vertex src: %d\n",s);
	}
}


bool cost(const edge_t &a, const edge_t &b)
{
	    return (a.src < b.src);
}

int main(int argc, char * argv[])
{
	struct timeval t1,t2;
	static char * filename;
	if(argc!=2)
	{
		printf("./a.out <filename>\n");
		exit(-1);
	}
	else
	{
		filename = argv[1];
	}

	FILE * fp = fopen(filename,"r");
	if(!fp)
	{
		printf("Error reading file.\n");
		exit(-1);
	}

	/* Set cuda device to K40  */
	CUDA_SAFE_CALL(hipSetDevice(0));

	printf("Begin file reading...\n");

	/* Get graph from file into CPU memory  */
	int num_vertices, num_edges, i, j, k;
	fscanf(fp,"%d %d",&num_vertices,&num_edges);

	
	//Array of vectors. vector i contains the in edges of vertex i
	vector< vector<edge_t> > outEdges(num_vertices);
	int * prefixV = (int *) calloc(num_vertices,sizeof(int));
	int s,d,v;

	// In Graphchi case, I am storing the source depth in each edge
	// In X-stream case, I am storing the destination depth in each edge
	for(i=0; i<num_edges; i++)
	{
		fscanf(fp,"%d",&s);
		fscanf(fp,"%d",&d);
		edge_t e;
		e.src=s;
		e.dest=d;
		outEdges[s].push_back(e);
	}
	printf("Finished file reading.\n");
	
	printf("\nBegin interval construction...\n");

	// Construction of intervals
	gettimeofday(&t1,NULL);
	int num_intervals = 0, add = 1;
	vector<int> startInter;
	prefixV[0] = outEdges[0].size();
	if(prefixV[0] > MAX_EDGES_PER_SHARD)
	{
		startInter.push_back(0);
		num_intervals++;
		add = 0;
	}
	for(i=1; i<num_vertices; i++)
	{
		prefixV[i] = outEdges[i].size();	
		if(add==1)
			prefixV[i] += prefixV[i-1];
		if(prefixV[i] > MAX_EDGES_PER_SHARD)
		{
			startInter.push_back(i);
			num_intervals++;
			add = 0;
		}
		else
			add = 1;
	}
	if(add==1)
	{
		startInter.push_back(i-1);
		num_intervals++;
	}


	interval_t * interval = (interval_t *) malloc(num_intervals*sizeof(interval_t));
	for(i=0; i<num_intervals; i++)
	{
		interval[i].start = (i == 0) ? 0 : (startInter[i-1]+1);
		interval[i].end = startInter[i];
	}
	gettimeofday(&t2,NULL);
	printf("Time to construct intervals : %f sec\n",((t2.tv_sec+t2.tv_usec*1.0e-6)-(t1.tv_sec+t1.tv_usec*1.0e-6)));


	printf("\nBegin shard construction...\n");
	//Construction of shards
	gettimeofday(&t1,NULL);
	shard_t * shard_host = (shard_t *) malloc(num_intervals*sizeof(shard_t));

	//Finding the max number of edges in a shard
	// We will allocate space for that many edges to each shard to maintain consistency
	int MAX_NUM_EDGES_SHARD = INT_MIN;
	for(i=0; i<num_intervals; i++)
	{
		int t = prefixV[interval[i].end];
		if(t > MAX_NUM_EDGES_SHARD)
			MAX_NUM_EDGES_SHARD = t;
	}

	for(i=0; i<num_intervals; i++)
	{
		// first and last vertices in shard
		shard_host[i].Vstart = interval[i].start;
		shard_host[i].Vend = interval[i].end;

		// number of edges in shard
		shard_host[i].E = prefixV[interval[i].end];
		shard_host[i].from = (vertex_t *) malloc(MAX_NUM_EDGES_SHARD*sizeof(edge_t));
		shard_host[i].to = (vertex_t *) malloc(MAX_NUM_EDGES_SHARD*sizeof(edge_t));
	}


	for(i=0; i<num_intervals; i++)
	{
		vector<edge_t> tempEdges;
		for(j=interval[i].start; j<=interval[i].end; j++)
		{
			for(vector<edge_t>::iterator it=outEdges[j].begin(); it!=outEdges[j].end(); ++it)
				tempEdges.push_back(*it);
		}

		//Sorting based on src vertex to align the edges such that the access of vertices[src] is sequential
		sort(tempEdges.begin(),tempEdges.end(),cost);
		j=0;
		for (vector<edge_t>::iterator it = tempEdges.begin() ; it != tempEdges.end(); ++it)
		{
			shard_host[i].from[j].val = (*it).src;
			shard_host[i].to[j].val = (*it).dest;
			j++;
		}
	}
	gettimeofday(&t2,NULL);
	printf("Time to construct shards : %f sec\n",((t2.tv_sec+t2.tv_usec*1.0e-6)-(t1.tv_sec+t1.tv_usec*1.0e-6)));

	int num_of_blocks = 1;
	int num_of_threads_per_block = MAX_NUM_EDGES_SHARD;

	if(MAX_NUM_EDGES_SHARD>MAX_THREADS_PER_BLOCK)
	{
		num_of_blocks = (int)ceil(MAX_NUM_EDGES_SHARD/(double)MAX_THREADS_PER_BLOCK); 
		num_of_threads_per_block = MAX_THREADS_PER_BLOCK; 
	}

	dim3  grid( num_of_blocks, 1, 1);
	dim3  threads( num_of_threads_per_block, 1, 1);

	shard_t *shard;
	//CUDA_SAFE_CALL(cudaMallocHost((void **)&shard, sizeof(shard_t)));
	//CUDA_SAFE_CALL(cudaMallocHost((void **)&shard->edges, MAX_NUM_EDGES_SHARD*sizeof(edge_t)));
	//CUDA_SAFE_CALL(cudaMallocManaged((void **)&shard, sizeof(shard_t)));
	//CUDA_SAFE_CALL(cudaMallocManaged((void **)&shard->edges, MAX_NUM_EDGES_SHARD*sizeof(edge_t)));

	vertex_t * from_dev;
	vertex_t * to_dev;
	CUDA_SAFE_CALL(hipMalloc((void **)&shard, sizeof(shard_t)));
	CUDA_SAFE_CALL(hipMalloc((void **)&from_dev, MAX_NUM_EDGES_SHARD*sizeof(edge_t)));
	CUDA_SAFE_CALL(hipMalloc((void **)&to_dev, MAX_NUM_EDGES_SHARD*sizeof(edge_t)));

	// It will contain the visited status of each vertex
	vertex_t *vertices;
	//CUDA_SAFE_CALL(cudaMallocHost((void **)&vertices, num_vertices*sizeof(vertex_t)));
	vertex_t *vertices_host = (vertex_t *) malloc(num_vertices*sizeof(vertex_t));
	CUDA_SAFE_CALL(hipMalloc((void **)&vertices, num_vertices*sizeof(vertex_t)));

	init<<<((num_vertices+MAX_THREADS_PER_BLOCK-1)/MAX_THREADS_PER_BLOCK),MAX_THREADS_PER_BLOCK>>> (vertices, 0, num_vertices);

	hipEvent_t start,end;
	float diff;
	double time = 0;

	CUDA_SAFE_CALL(hipEventCreate(&start));
	CUDA_SAFE_CALL(hipEventCreate(&end));
	
	printf("Begin kernel\n");

	bool stop;
	k=0;
	do
	{
		stop = false;
		CUDA_SAFE_CALL(hipMemcpyToSymbol(HIP_SYMBOL(d_over), &stop, sizeof(bool),0, hipMemcpyHostToDevice));
		CUDA_SAFE_CALL(hipDeviceSynchronize());

		for(i=0; i<num_intervals; i++)
		{
			//Load the data of shard_host[i] into shard (pinned memory)
			/*shard->E = shard_host[i].E;
			shard->Vstart = shard_host[i].Vstart;
			shard->Vend = shard_host[i].Vend;
			for (j=0; j<shard_host[i].E; j++)
			{
				shard->edges[j] = shard_host[i].edges[j];
				j++;
			}*/
			CUDA_SAFE_CALL(hipMemcpy(shard, &shard_host[i], sizeof(shard_t),hipMemcpyHostToDevice));
			CUDA_SAFE_CALL(hipMemcpy(from_dev, shard_host[i].from, shard_host[i].E*sizeof(vertex_t),hipMemcpyHostToDevice));
			CUDA_SAFE_CALL(hipMemcpy(to_dev, shard_host[i].to, shard_host[i].E*sizeof(vertex_t),hipMemcpyHostToDevice));
			CUDA_SAFE_CALL(hipMemcpy(&(shard->from), &from_dev, sizeof(vertex_t *),hipMemcpyHostToDevice));
			CUDA_SAFE_CALL(hipMemcpy(&(shard->to), &to_dev, sizeof(vertex_t *),hipMemcpyHostToDevice));


			gettimeofday(&t1,NULL);

			scatter_bfs<<<grid, threads>>> (shard, vertices, k, num_vertices);

			CUDA_SAFE_CALL(hipDeviceSynchronize());
			gettimeofday(&t2,NULL);
			time += ((t2.tv_sec*1.0e3+t2.tv_usec*1.0e-3)-(t1.tv_sec*1.0e3+t1.tv_usec*1.0e-3));
		}
		/*for(i=0; i<num_intervals; i++)
		{
			//Load the data of shard_host[i] into shard (pinned memory)
			shard.E = shard_host[i].E;
			shard.Vstart = shard_host[i].Vstart;
			shard.Vend = shard_host[i].Vend;
			for (j=0; j<shard_host[i].E; j++)
			{
				shard.edges[j] = shard_host[i].edges[j];
				j++;
			}

			gettimeofday(&t1,NULL);

		 	gather_bfs<<<grid, threads>>> (shard, vertices, k, num_vertices);

			CUDA_SAFE_CALL(cudaDeviceSynchronize());
			gettimeofday(&t2,NULL);
			time += ((t2.tv_sec*1.0e3+t2.tv_usec*1.0e-3)-(t1.tv_sec*1.0e3+t1.tv_usec*1.0e-3))
		}*/

		CUDA_SAFE_CALL(hipMemcpyFromSymbol(&stop, HIP_SYMBOL(d_over), sizeof(bool),0, hipMemcpyDeviceToHost));
		k++;
	}while(stop);

	printf("Number of iterations : %d\n",k);
	CUDA_SAFE_CALL(hipMemcpy(vertices_host, vertices, num_vertices*sizeof(vertex_t), hipMemcpyDeviceToHost));
	/*for(int i = 0; i < num_vertices; i++)
	{
		printf("Vertex %d Distance %d\n",i,vertices_host[i].val);
	}*/
	printf("Time: %f ms\n",time);

	free(interval);
	for(i=0; i<num_intervals; i++)
	{
		free(shard_host[i].from);
		free(shard_host[i].to);
	}
	free(shard_host);
	free(vertices_host);
	//CUDA_SAFE_CALL(cudaFreeHost(vertices));
	//CUDA_SAFE_CALL(cudaFreeHost(shard->edges));
	//CUDA_SAFE_CALL(cudaFreeHost(shard));
	CUDA_SAFE_CALL(hipFree(vertices));
	CUDA_SAFE_CALL(hipFree(from_dev));
	CUDA_SAFE_CALL(hipFree(to_dev));
	CUDA_SAFE_CALL(hipFree(shard));


	CUDA_SAFE_CALL(hipEventDestroy(start));
	CUDA_SAFE_CALL(hipEventDestroy(end));

	return 0;
}

	.text
	.file	"sequential_addressing.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z9safe_call10hipError_ti       # -- Begin function _Z9safe_call10hipError_ti
	.type	_Z9safe_call10hipError_ti,@function
_Z9safe_call10hipError_ti:              # @_Z9safe_call10hipError_ti
	.cfi_startproc
# %bb.0:
	testl	%edi, %edi
	jne	.LBB0_2
# %bb.1:
	retq
.LBB0_2:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movl	%esi, %ebx
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movl	%ebx, %esi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	printf
	movl	$-1, %edi
	callq	exit
.Lfunc_end0:
	.size	_Z9safe_call10hipError_ti, .Lfunc_end0-_Z9safe_call10hipError_ti
	.cfi_endproc
                                        # -- End function
	.globl	_Z20__device_stub__resetv       # -- Begin function _Z20__device_stub__resetv
	.type	_Z20__device_stub__resetv,@function
_Z20__device_stub__resetv:              # @_Z20__device_stub__resetv
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$56, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rbx
	leaq	24(%rsp), %r14
	leaq	16(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rbx, %rdi
	movq	%r14, %rsi
	movq	%r15, %rdx
	movq	%r12, %rcx
	callq	__hipPopCallConfiguration
	movq	(%rbx), %rsi
	movl	8(%rbx), %edx
	movq	(%r14), %rcx
	movl	8(%r14), %r8d
	movq	%rsp, %r9
	movl	$_Z5resetv, %edi
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	pushq	(%r15)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$72, %rsp
	.cfi_adjust_cfa_offset -72
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z20__device_stub__resetv, .Lfunc_end1-_Z20__device_stub__resetv
	.cfi_endproc
                                        # -- End function
	.globl	_Z19__device_stub__initP8__vertexii # -- Begin function _Z19__device_stub__initP8__vertexii
	.type	_Z19__device_stub__initP8__vertexii,@function
_Z19__device_stub__initP8__vertexii:    # @_Z19__device_stub__initP8__vertexii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$96, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	movq	%rsp, %rsi
	movl	%edx, (%rsi)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z4initP8__vertexii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$112, %rsp
	.cfi_adjust_cfa_offset -112
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z19__device_stub__initP8__vertexii, .Lfunc_end2-_Z19__device_stub__initP8__vertexii
	.cfi_endproc
                                        # -- End function
	.globl	_Z26__device_stub__scatter_bfsPK7__shardP8__vertexii # -- Begin function _Z26__device_stub__scatter_bfsPK7__shardP8__vertexii
	.type	_Z26__device_stub__scatter_bfsPK7__shardP8__vertexii,@function
_Z26__device_stub__scatter_bfsPK7__shardP8__vertexii: # @_Z26__device_stub__scatter_bfsPK7__shardP8__vertexii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11scatter_bfsPK7__shardP8__vertexii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z26__device_stub__scatter_bfsPK7__shardP8__vertexii, .Lfunc_end3-_Z26__device_stub__scatter_bfsPK7__shardP8__vertexii
	.cfi_endproc
                                        # -- End function
	.globl	_Z4costRK6__edgeS1_             # -- Begin function _Z4costRK6__edgeS1_
	.type	_Z4costRK6__edgeS1_,@function
_Z4costRK6__edgeS1_:                    # @_Z4costRK6__edgeS1_
	.cfi_startproc
# %bb.0:
	movl	(%rdi), %eax
	cmpl	(%rsi), %eax
	setl	%al
	retq
.Lfunc_end4:
	.size	_Z4costRK6__edgeS1_, .Lfunc_end4-_Z4costRK6__edgeS1_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI5_0:
	.quad	0x3eb0c6f7a0b5ed8d              # double 9.9999999999999995E-7
.LCPI5_1:
	.quad	0x3f50000000000000              # double 9.765625E-4
.LCPI5_2:
	.quad	0x408f400000000000              # double 1000
.LCPI5_3:
	.quad	0x3f50624dd2f1a9fc              # double 0.001
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0
.LCPI5_4:
	.zero	16
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$232, %rsp
	.cfi_def_cfa_offset 288
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	cmpl	$2, %edi
	jne	.LBB5_127
# %bb.1:
	movq	8(%rsi), %rdi
	movl	$.L.str.2, %esi
	callq	fopen
	testq	%rax, %rax
	je	.LBB5_128
# %bb.2:
	movq	%rax, %rbx
	xorl	%ebp, %ebp
	xorl	%edi, %edi
	callq	hipSetDevice
	movl	%eax, %edi
	movl	$151, %esi
	callq	_Z9safe_call10hipError_ti
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	leaq	20(%rsp), %r14
	leaq	148(%rsp), %r12
	movl	$.L.str.5, %esi
	movq	%rbx, %rdi
	movq	%r14, %rdx
	movq	%r12, %rcx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movslq	(%r14), %rsi
	leaq	168(%rsp), %rdi
	leaq	64(%rsp), %rdx
	callq	_ZNSt6vectorIS_I6__edgeSaIS0_EESaIS2_EEC2EmRKS3_
	movslq	(%r14), %rdi
	movl	$4, %esi
	callq	calloc
	movq	%rax, %r15
	movl	$0, 12(%rsp)
	cmpl	$0, (%r12)
	jle	.LBB5_10
# %bb.3:                                # %.lr.ph
	leaq	144(%rsp), %r14
	leaq	140(%rsp), %r12
	leaq	64(%rsp), %r13
.LBB5_4:                                # =>This Inner Loop Header: Depth=1
.Ltmp0:
	movl	$.L.str.6, %esi
	movq	%rbx, %rdi
	movq	%r14, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
.Ltmp1:
# %bb.5:                                #   in Loop: Header=BB5_4 Depth=1
.Ltmp2:
	movl	$.L.str.6, %esi
	movq	%rbx, %rdi
	movq	%r12, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
.Ltmp3:
# %bb.6:                                #   in Loop: Header=BB5_4 Depth=1
	movslq	144(%rsp), %rax
	movl	%eax, 64(%rsp)
	movl	140(%rsp), %ecx
	movl	%ecx, 68(%rsp)
	movq	168(%rsp), %rcx
	leaq	(%rax,%rax,2), %rax
	leaq	(%rcx,%rax,8), %rdi
	movq	8(%rdi), %rsi
	cmpq	16(%rdi), %rsi
	je	.LBB5_8
# %bb.7:                                #   in Loop: Header=BB5_4 Depth=1
	movl	72(%rsp), %eax
	movl	%eax, 8(%rsi)
	movq	64(%rsp), %rax
	movq	%rax, (%rsi)
	addq	$12, 8(%rdi)
	jmp	.LBB5_9
.LBB5_8:                                #   in Loop: Header=BB5_4 Depth=1
.Ltmp5:
	movq	%r13, %rdx
	callq	_ZNSt6vectorI6__edgeSaIS0_EE17_M_realloc_insertIJRKS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
.Ltmp6:
.LBB5_9:                                # %_ZNSt6vectorI6__edgeSaIS0_EE9push_backERKS0_.exit
                                        #   in Loop: Header=BB5_4 Depth=1
	movl	12(%rsp), %eax
	incl	%eax
	movl	%eax, 12(%rsp)
	cmpl	148(%rsp), %eax
	jl	.LBB5_4
.LBB5_10:                               # %._crit_edge
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	movl	$.Lstr.3, %edi
	callq	puts@PLT
	leaq	152(%rsp), %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	xorpd	%xmm0, %xmm0
	movapd	%xmm0, 64(%rsp)
	movq	$0, 80(%rsp)
	movq	168(%rsp), %rax
	movq	8(%rax), %rcx
	subq	(%rax), %rcx
	shrq	$2, %rcx
	imull	$-1431655765, %ecx, %eax        # imm = 0xAAAAAAAB
	movl	%eax, (%r15)
	movl	$1, %r12d
	cmpl	$33554433, %eax                 # imm = 0x2000001
	jl	.LBB5_13
# %bb.11:
	leaq	32(%rsp), %rdx
	movl	$0, (%rdx)
.Ltmp8:
	xorl	%r12d, %r12d
	leaq	64(%rsp), %rdi
	xorl	%esi, %esi
	callq	_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_
.Ltmp9:
# %bb.12:                               # %_ZNSt6vectorIiSaIiEE9push_backEOi.exit
	movl	$1, %ebp
.LBB5_13:
	movl	$1, 12(%rsp)
	movl	20(%rsp), %ecx
	xorl	%edx, %edx
	cmpl	$2, %ecx
	jl	.LBB5_23
# %bb.14:                               # %.lr.ph201
	movl	$1, %eax
	leaq	64(%rsp), %rbx
	leaq	12(%rsp), %r14
.LBB5_15:                               # =>This Inner Loop Header: Depth=1
	movslq	%eax, %rdx
	movq	168(%rsp), %rsi
	leaq	(%rdx,%rdx,2), %rdi
	movq	8(%rsi,%rdi,8), %r8
	subq	(%rsi,%rdi,8), %r8
	shrq	$2, %r8
	imull	$-1431655765, %r8d, %esi        # imm = 0xAAAAAAAB
	movl	%esi, (%r15,%rdx,4)
	cmpl	$1, %r12d
	jne	.LBB5_17
# %bb.16:                               #   in Loop: Header=BB5_15 Depth=1
	addl	-4(%r15,%rdx,4), %esi
	movl	%esi, (%r15,%rdx,4)
.LBB5_17:                               #   in Loop: Header=BB5_15 Depth=1
	movl	$1, %r12d
	cmpl	$33554433, %esi                 # imm = 0x2000001
	jl	.LBB5_22
# %bb.18:                               #   in Loop: Header=BB5_15 Depth=1
	movq	72(%rsp), %rsi
	cmpq	80(%rsp), %rsi
	je	.LBB5_20
# %bb.19:                               #   in Loop: Header=BB5_15 Depth=1
	movl	%eax, (%rsi)
	addq	$4, %rsi
	movq	%rsi, 72(%rsp)
	jmp	.LBB5_21
.LBB5_20:                               #   in Loop: Header=BB5_15 Depth=1
.Ltmp11:
	movq	%rbx, %rdi
	movq	%r14, %rdx
	callq	_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJRKiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_
.Ltmp12:
.LBB5_21:                               # %_ZNSt6vectorIiSaIiEE9push_backERKi.exit
                                        #   in Loop: Header=BB5_15 Depth=1
	incl	%ebp
	movl	12(%rsp), %eax
	xorl	%r12d, %r12d
	movl	20(%rsp), %ecx
.LBB5_22:                               #   in Loop: Header=BB5_15 Depth=1
	movl	%eax, %edx
	leal	1(%rdx), %eax
	movl	%eax, 12(%rsp)
	cmpl	%ecx, %eax
	jl	.LBB5_15
.LBB5_23:                               # %._crit_edge202
	testl	%r12d, %r12d
	je	.LBB5_28
# %bb.24:
	movl	%edx, 32(%rsp)
	movq	72(%rsp), %rsi
	cmpq	80(%rsp), %rsi
	je	.LBB5_26
# %bb.25:
	movl	%edx, (%rsi)
	addq	$4, %rsi
	movq	%rsi, 72(%rsp)
	jmp	.LBB5_27
.LBB5_26:
.Ltmp14:
	leaq	64(%rsp), %rdi
	leaq	32(%rsp), %rdx
	callq	_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_
.Ltmp15:
.LBB5_27:                               # %_ZNSt6vectorIiSaIiEE9push_backEOi.exit157
	incl	%ebp
.LBB5_28:
	movslq	%ebp, %r12
	leaq	(,%r12,8), %rdi
	callq	malloc
	movq	%rax, %r13
	movl	$0, 12(%rsp)
	testl	%r12d, %r12d
	jle	.LBB5_33
# %bb.29:                               # %.lr.ph207
	movq	64(%rsp), %rax
	movl	%ebp, %ecx
	xorl	%edx, %edx
.LBB5_30:                               # =>This Inner Loop Header: Depth=1
	movl	$0, %esi
	testq	%rdx, %rdx
	je	.LBB5_32
# %bb.31:                               #   in Loop: Header=BB5_30 Depth=1
	movl	-4(%rax,%rdx,4), %esi
	incl	%esi
.LBB5_32:                               #   in Loop: Header=BB5_30 Depth=1
	movl	%esi, (%r13,%rdx,8)
	movl	(%rax,%rdx,4), %esi
	movl	%esi, 4(%r13,%rdx,8)
	incq	%rdx
	movl	%edx, 12(%rsp)
	cmpq	%rdx, %rcx
	jne	.LBB5_30
.LBB5_33:                               # %._crit_edge208
	leaq	192(%rsp), %rbx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	cvtsi2sdq	(%rbx), %xmm1
	xorps	%xmm0, %xmm0
	cvtsi2sdq	8(%rbx), %xmm0
	movsd	.LCPI5_0(%rip), %xmm4           # xmm4 = mem[0],zero
	mulsd	%xmm4, %xmm0
	leaq	152(%rsp), %rbx
	cvtsi2sdq	(%rbx), %xmm2
	cvtsi2sdq	8(%rbx), %xmm3
	addsd	%xmm1, %xmm0
	mulsd	%xmm4, %xmm3
	addsd	%xmm2, %xmm3
	subsd	%xmm3, %xmm0
	movl	$.L.str.9, %edi
	movb	$1, %al
	callq	printf
	movl	$.Lstr.4, %edi
	callq	puts@PLT
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	%r12, %rdi
	shlq	$5, %rdi
	callq	malloc
	movq	%rax, %r14
	testl	%r12d, %r12d
	movq	%r13, 112(%rsp)                 # 8-byte Spill
	movq	%rbp, 24(%rsp)                  # 8-byte Spill
	jle	.LBB5_62
# %bb.34:                               # %.lr.ph212.preheader
	movl	%ebp, %r12d
	movl	$-2147483648, %ebp              # imm = 0x80000000
	xorl	%eax, %eax
.LBB5_35:                               # %.lr.ph212
                                        # =>This Inner Loop Header: Depth=1
	movslq	4(%r13,%rax,8), %rcx
	movl	(%r15,%rcx,4), %ecx
	cmpl	%ebp, %ecx
	cmovgl	%ecx, %ebp
	incq	%rax
	cmpq	%rax, %r12
	jne	.LBB5_35
# %bb.36:                               # %.preheader192
	cmpl	$0, 24(%rsp)                    # 4-byte Folded Reload
	jle	.LBB5_63
# %bb.37:                               # %.lr.ph216
	movslq	%ebp, %rax
	shlq	$2, %rax
	leaq	(%rax,%rax,2), %rbx
	shlq	$3, %r12
	movq	%r15, 96(%rsp)                  # 8-byte Spill
	movq	%r13, %r15
	xorl	%r13d, %r13d
.LBB5_38:                               # =>This Inner Loop Header: Depth=1
	movl	(%r15,%r13), %eax
	movl	%eax, 4(%r14,%r13,4)
	movslq	4(%r15,%r13), %rax
	movl	%eax, 8(%r14,%r13,4)
	movq	96(%rsp), %rcx                  # 8-byte Reload
	movl	(%rcx,%rax,4), %eax
	movl	%eax, (%r14,%r13,4)
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, 16(%r14,%r13,4)
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, 24(%r14,%r13,4)
	addq	$8, %r13
	cmpq	%r13, %r12
	jne	.LBB5_38
# %bb.39:                               # %.preheader191
	movl	$0, 12(%rsp)
	cmpl	$0, 24(%rsp)                    # 4-byte Folded Reload
	jle	.LBB5_64
# %bb.40:                               # %.lr.ph234
	xorl	%eax, %eax
	leaq	32(%rsp), %rbx
	movq	112(%rsp), %r13                 # 8-byte Reload
.LBB5_41:                               # =>This Loop Header: Depth=1
                                        #     Child Loop BB5_43 Depth 2
                                        #       Child Loop BB5_44 Depth 3
                                        #     Child Loop BB5_58 Depth 2
	xorpd	%xmm0, %xmm0
	movapd	%xmm0, 32(%rsp)
	movq	$0, 48(%rsp)
	movslq	%eax, %rcx
	movslq	(%r13,%rcx,8), %r12
	cmpl	4(%r13,%rcx,8), %r12d
	jg	.LBB5_61
# %bb.42:                               # %.lr.ph226.preheader
                                        #   in Loop: Header=BB5_41 Depth=1
	movq	168(%rsp), %rcx
.LBB5_43:                               # %.lr.ph226
                                        #   Parent Loop BB5_41 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB5_44 Depth 3
	leaq	(%r12,%r12,2), %r13
	movq	(%rcx,%r13,8), %r15
	cmpq	8(%rcx,%r13,8), %r15
	je	.LBB5_49
.LBB5_44:                               # %.lr.ph221
                                        #   Parent Loop BB5_41 Depth=1
                                        #     Parent Loop BB5_43 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movq	40(%rsp), %rsi
	cmpq	48(%rsp), %rsi
	je	.LBB5_46
# %bb.45:                               #   in Loop: Header=BB5_44 Depth=3
	movl	8(%r15), %eax
	movl	%eax, 8(%rsi)
	movq	(%r15), %rax
	movq	%rax, (%rsi)
	addq	$12, 40(%rsp)
	jmp	.LBB5_47
.LBB5_46:                               #   in Loop: Header=BB5_44 Depth=3
.Ltmp17:
	movq	%rbx, %rdi
	movq	%r15, %rdx
	callq	_ZNSt6vectorI6__edgeSaIS0_EE17_M_realloc_insertIJRKS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
.Ltmp18:
.LBB5_47:                               # %_ZNSt6vectorI6__edgeSaIS0_EE9push_backERKS0_.exit160
                                        #   in Loop: Header=BB5_44 Depth=3
	addq	$12, %r15
	movq	168(%rsp), %rcx
	cmpq	8(%rcx,%r13,8), %r15
	jne	.LBB5_44
# %bb.48:                               # %._crit_edge222.loopexit
                                        #   in Loop: Header=BB5_43 Depth=2
	movl	12(%rsp), %eax
.LBB5_49:                               # %._crit_edge222
                                        #   in Loop: Header=BB5_43 Depth=2
	leaq	1(%r12), %rdx
	movslq	%eax, %rsi
	movq	112(%rsp), %r13                 # 8-byte Reload
	movslq	4(%r13,%rsi,8), %rsi
	cmpq	%rsi, %r12
	movq	%rdx, %r12
	jl	.LBB5_43
# %bb.50:                               # %._crit_edge227
                                        #   in Loop: Header=BB5_41 Depth=1
	movq	32(%rsp), %r12
	movq	40(%rsp), %r15
	cmpq	%r15, %r12
	je	.LBB5_59
# %bb.51:                               #   in Loop: Header=BB5_41 Depth=1
	movq	%r15, %rax
	subq	%r12, %rax
	sarq	$2, %rax
	movabsq	$-6148914691236517205, %rcx     # imm = 0xAAAAAAAAAAAAAAAB
	imulq	%rcx, %rax
	testq	%rax, %rax
	je	.LBB5_53
# %bb.52:                               # %cond.false
                                        #   in Loop: Header=BB5_41 Depth=1
	bsrq	%rax, %rax
	xorq	$63, %rax
	jmp	.LBB5_54
.LBB5_53:                               #   in Loop: Header=BB5_41 Depth=1
	movl	$64, %eax
.LBB5_54:                               # %cond.end
                                        #   in Loop: Header=BB5_41 Depth=1
	addq	%rax, %rax
	movl	$126, %edx
	subq	%rax, %rdx
.Ltmp20:
	movl	$_Z4costRK6__edgeS1_, %ecx
	movq	%r12, %rdi
	movq	%r15, %rsi
	callq	_ZSt16__introsort_loopIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEElNS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_T0_T1_
.Ltmp21:
# %bb.55:                               # %.noexc162
                                        #   in Loop: Header=BB5_41 Depth=1
.Ltmp22:
	movl	$_Z4costRK6__edgeS1_, %edx
	movq	%r12, %rdi
	movq	%r15, %rsi
	callq	_ZSt22__final_insertion_sortIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_T0_
.Ltmp23:
# %bb.56:                               # %_ZSt4sortIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEEPFbRKS2_S9_EEvT_SC_T0_.exit
                                        #   in Loop: Header=BB5_41 Depth=1
	movq	32(%rsp), %r15
	movq	40(%rsp), %rax
	cmpq	%rax, %r15
	je	.LBB5_59
# %bb.57:                               # %.lr.ph231.preheader
                                        #   in Loop: Header=BB5_41 Depth=1
	xorl	%ecx, %ecx
	movq	%r15, %rdx
.LBB5_58:                               # %.lr.ph231
                                        #   Parent Loop BB5_41 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%rdx), %esi
	movslq	12(%rsp), %rdi
	shlq	$5, %rdi
	movq	16(%r14,%rdi), %rdi
	movl	%esi, (%rdi,%rcx)
	movl	4(%rdx), %esi
	movslq	12(%rsp), %rdi
	shlq	$5, %rdi
	movq	24(%r14,%rdi), %rdi
	movl	%esi, (%rdi,%rcx)
	addq	$4, %rcx
	addq	$12, %rdx
	cmpq	%rax, %rdx
	jne	.LBB5_58
.LBB5_59:                               # %._crit_edge232
                                        #   in Loop: Header=BB5_41 Depth=1
	testq	%r15, %r15
	je	.LBB5_61
# %bb.60:                               #   in Loop: Header=BB5_41 Depth=1
	movq	%r15, %rdi
	callq	_ZdlPv
.LBB5_61:                               # %_ZNSt6vectorI6__edgeSaIS0_EED2Ev.exit
                                        #   in Loop: Header=BB5_41 Depth=1
	movl	12(%rsp), %eax
	incl	%eax
	movl	%eax, 12(%rsp)
	cmpl	24(%rsp), %eax                  # 4-byte Folded Reload
	jl	.LBB5_41
	jmp	.LBB5_64
.LBB5_62:
	movl	$-2147483648, %ebp              # imm = 0x80000000
.LBB5_63:                               # %.preheader191.thread
	movl	$0, 12(%rsp)
.LBB5_64:                               # %._crit_edge235
	leaq	192(%rsp), %rbx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	xorps	%xmm1, %xmm1
	cvtsi2sdq	(%rbx), %xmm1
	xorps	%xmm0, %xmm0
	cvtsi2sdq	8(%rbx), %xmm0
	movsd	.LCPI5_0(%rip), %xmm4           # xmm4 = mem[0],zero
	mulsd	%xmm4, %xmm0
	xorps	%xmm2, %xmm2
	cvtsi2sdq	152(%rsp), %xmm2
	xorps	%xmm3, %xmm3
	cvtsi2sdq	160(%rsp), %xmm3
	addsd	%xmm1, %xmm0
	mulsd	%xmm4, %xmm3
	addsd	%xmm2, %xmm3
	subsd	%xmm3, %xmm0
	movl	$.L.str.11, %edi
	movb	$1, %al
	callq	printf
	movl	$1, %r12d
	movl	%ebp, %r15d
	cmpl	$1025, %ebp                     # imm = 0x401
	jl	.LBB5_66
# %bb.65:
	xorps	%xmm0, %xmm0
	cvtsi2sd	%ebp, %xmm0
	mulsd	.LCPI5_1(%rip), %xmm0
	callq	ceil@PLT
	cvttsd2si	%xmm0, %r12d
	movl	$1024, %r15d                    # imm = 0x400
.LBB5_66:
.Ltmp25:
	leaq	32(%rsp), %rdi
	movl	$32, %esi
	callq	hipMalloc
.Ltmp26:
# %bb.67:
.Ltmp27:
	movl	%eax, %edi
	movl	$292, %esi                      # imm = 0x124
	callq	_Z9safe_call10hipError_ti
.Ltmp28:
# %bb.68:
	movslq	%ebp, %rax
	shlq	$2, %rax
	leaq	(%rax,%rax,2), %rbx
.Ltmp29:
	leaq	128(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
.Ltmp30:
# %bb.69:
.Ltmp31:
	movl	%eax, %edi
	movl	$293, %esi                      # imm = 0x125
	callq	_Z9safe_call10hipError_ti
.Ltmp32:
# %bb.70:
.Ltmp33:
	leaq	120(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
.Ltmp34:
# %bb.71:
.Ltmp35:
	movl	%eax, %edi
	movl	$294, %esi                      # imm = 0x126
	callq	_Z9safe_call10hipError_ti
.Ltmp36:
# %bb.72:
	movslq	20(%rsp), %rbx
	shlq	$2, %rbx
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, %r13
.Ltmp38:
	leaq	104(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
.Ltmp39:
# %bb.73:
.Ltmp40:
	movl	%eax, %edi
	movl	$300, %esi                      # imm = 0x12C
	callq	_Z9safe_call10hipError_ti
.Ltmp41:
# %bb.74:
	movabsq	$4294967296, %rax               # imm = 0x100000000
	movl	20(%rsp), %edi
	leal	1023(%rdi), %ecx
	addl	$2046, %edi                     # imm = 0x7FE
	testl	%ecx, %ecx
	cmovnsl	%ecx, %edi
	sarl	$10, %edi
	orq	%rax, %rdi
.Ltmp42:
	movabsq	$4294968320, %rdx               # imm = 0x100000400
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp43:
# %bb.75:
	testl	%eax, %eax
	jne	.LBB5_77
# %bb.76:
	movq	104(%rsp), %rdi
	movl	20(%rsp), %edx
.Ltmp44:
	xorl	%esi, %esi
	callq	_Z19__device_stub__initP8__vertexii
.Ltmp45:
.LBB5_77:
.Ltmp47:
	movq	%r13, 208(%rsp)                 # 8-byte Spill
	leaq	224(%rsp), %rdi
	callq	hipEventCreate
.Ltmp48:
# %bb.78:
.Ltmp49:
	movl	%eax, %edi
	movl	$308, %esi                      # imm = 0x134
	callq	_Z9safe_call10hipError_ti
.Ltmp50:
# %bb.79:
.Ltmp51:
	leaq	216(%rsp), %rdi
	callq	hipEventCreate
.Ltmp52:
# %bb.80:
.Ltmp53:
	movl	%eax, %edi
	movl	$309, %esi                      # imm = 0x135
	callq	_Z9safe_call10hipError_ti
.Ltmp54:
# %bb.81:
	movl	%r12d, %r12d
	btsq	$32, %r12
	movl	%r15d, %r13d
	btsq	$32, %r13
	movl	$.Lstr.5, %edi
	callq	puts@PLT
	xorl	%ebp, %ebp
	xorpd	%xmm0, %xmm0
	movsd	%xmm0, 96(%rsp)                 # 8-byte Spill
	leaq	152(%rsp), %r15
	leaq	192(%rsp), %rbx
.LBB5_82:                               # =>This Loop Header: Depth=1
                                        #     Child Loop BB5_88 Depth 2
	movb	$0, 19(%rsp)
.Ltmp56:
	movl	$d_over, %edi
	movl	$1, %edx
	leaq	19(%rsp), %rsi
	xorl	%ecx, %ecx
	movl	$1, %r8d
	callq	hipMemcpyToSymbol
.Ltmp57:
# %bb.83:                               # %_Z17hipMemcpyToSymbolIbE10hipError_tRKT_PKvmm13hipMemcpyKind.exit
                                        #   in Loop: Header=BB5_82 Depth=1
.Ltmp58:
	movl	%eax, %edi
	movl	$318, %esi                      # imm = 0x13E
	callq	_Z9safe_call10hipError_ti
.Ltmp59:
# %bb.84:                               #   in Loop: Header=BB5_82 Depth=1
.Ltmp60:
	callq	hipDeviceSynchronize
.Ltmp61:
# %bb.85:                               #   in Loop: Header=BB5_82 Depth=1
.Ltmp62:
	movl	%eax, %edi
	movl	$319, %esi                      # imm = 0x13F
	callq	_Z9safe_call10hipError_ti
.Ltmp63:
# %bb.86:                               # %.preheader
                                        #   in Loop: Header=BB5_82 Depth=1
	movl	$0, 12(%rsp)
	cmpl	$0, 24(%rsp)                    # 4-byte Folded Reload
	jle	.LBB5_104
# %bb.87:                               # %.lr.ph238.preheader
                                        #   in Loop: Header=BB5_82 Depth=1
	xorl	%eax, %eax
.LBB5_88:                               # %.lr.ph238
                                        #   Parent Loop BB5_82 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	32(%rsp), %rdi
	movslq	%eax, %rsi
	shlq	$5, %rsi
	addq	%r14, %rsi
.Ltmp64:
	movl	$32, %edx
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp65:
# %bb.89:                               #   in Loop: Header=BB5_88 Depth=2
.Ltmp66:
	movl	%eax, %edi
	movl	$332, %esi                      # imm = 0x14C
	callq	_Z9safe_call10hipError_ti
.Ltmp67:
# %bb.90:                               #   in Loop: Header=BB5_88 Depth=2
	movq	128(%rsp), %rdi
	movslq	12(%rsp), %rax
	shlq	$5, %rax
	movq	16(%r14,%rax), %rsi
	movslq	(%r14,%rax), %rdx
	shlq	$2, %rdx
.Ltmp68:
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp69:
# %bb.91:                               #   in Loop: Header=BB5_88 Depth=2
.Ltmp70:
	movl	%eax, %edi
	movl	$333, %esi                      # imm = 0x14D
	callq	_Z9safe_call10hipError_ti
.Ltmp71:
# %bb.92:                               #   in Loop: Header=BB5_88 Depth=2
	movq	120(%rsp), %rdi
	movslq	12(%rsp), %rax
	shlq	$5, %rax
	movq	24(%r14,%rax), %rsi
	movslq	(%r14,%rax), %rdx
	shlq	$2, %rdx
.Ltmp72:
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp73:
# %bb.93:                               #   in Loop: Header=BB5_88 Depth=2
.Ltmp74:
	movl	%eax, %edi
	movl	$334, %esi                      # imm = 0x14E
	callq	_Z9safe_call10hipError_ti
.Ltmp75:
# %bb.94:                               #   in Loop: Header=BB5_88 Depth=2
	movq	32(%rsp), %rdi
	addq	$16, %rdi
.Ltmp76:
	movl	$8, %edx
	leaq	128(%rsp), %rsi
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp77:
# %bb.95:                               #   in Loop: Header=BB5_88 Depth=2
.Ltmp78:
	movl	%eax, %edi
	movl	$335, %esi                      # imm = 0x14F
	callq	_Z9safe_call10hipError_ti
.Ltmp79:
# %bb.96:                               #   in Loop: Header=BB5_88 Depth=2
	movq	32(%rsp), %rdi
	addq	$24, %rdi
.Ltmp80:
	movl	$8, %edx
	leaq	120(%rsp), %rsi
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp81:
# %bb.97:                               #   in Loop: Header=BB5_88 Depth=2
.Ltmp82:
	movl	%eax, %edi
	movl	$336, %esi                      # imm = 0x150
	callq	_Z9safe_call10hipError_ti
.Ltmp83:
# %bb.98:                               #   in Loop: Header=BB5_88 Depth=2
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
.Ltmp84:
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp85:
# %bb.99:                               #   in Loop: Header=BB5_88 Depth=2
	testl	%eax, %eax
	jne	.LBB5_101
# %bb.100:                              #   in Loop: Header=BB5_88 Depth=2
	movq	32(%rsp), %rdi
	movq	104(%rsp), %rsi
	movl	20(%rsp), %ecx
.Ltmp86:
	movl	%ebp, %edx
	callq	_Z26__device_stub__scatter_bfsPK7__shardP8__vertexii
.Ltmp87:
.LBB5_101:                              #   in Loop: Header=BB5_88 Depth=2
.Ltmp88:
	callq	hipDeviceSynchronize
.Ltmp89:
# %bb.102:                              #   in Loop: Header=BB5_88 Depth=2
.Ltmp90:
	movl	%eax, %edi
	movl	$343, %esi                      # imm = 0x157
	callq	_Z9safe_call10hipError_ti
.Ltmp91:
# %bb.103:                              #   in Loop: Header=BB5_88 Depth=2
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	cvtsi2sdq	192(%rsp), %xmm0
	cvtsi2sdq	200(%rsp), %xmm1
	movsd	.LCPI5_2(%rip), %xmm3           # xmm3 = mem[0],zero
	mulsd	%xmm3, %xmm0
	movsd	.LCPI5_3(%rip), %xmm4           # xmm4 = mem[0],zero
	mulsd	%xmm4, %xmm1
	cvtsi2sdq	152(%rsp), %xmm2
	addsd	%xmm0, %xmm1
	mulsd	%xmm3, %xmm2
	xorps	%xmm0, %xmm0
	cvtsi2sdq	160(%rsp), %xmm0
	mulsd	%xmm4, %xmm0
	addsd	%xmm2, %xmm0
	subsd	%xmm0, %xmm1
	movsd	96(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	addsd	%xmm1, %xmm0
	movsd	%xmm0, 96(%rsp)                 # 8-byte Spill
	movl	12(%rsp), %eax
	incl	%eax
	movl	%eax, 12(%rsp)
	cmpl	24(%rsp), %eax                  # 4-byte Folded Reload
	jl	.LBB5_88
.LBB5_104:                              # %._crit_edge239
                                        #   in Loop: Header=BB5_82 Depth=1
.Ltmp93:
	movl	$d_over, %esi
	movl	$1, %edx
	leaq	19(%rsp), %rdi
	xorl	%ecx, %ecx
	movl	$2, %r8d
	callq	hipMemcpyFromSymbol
.Ltmp94:
# %bb.105:                              # %_Z19hipMemcpyFromSymbolIbE10hipError_tPvRKT_mm13hipMemcpyKind.exit
                                        #   in Loop: Header=BB5_82 Depth=1
.Ltmp95:
	movl	%eax, %edi
	movl	$368, %esi                      # imm = 0x170
	callq	_Z9safe_call10hipError_ti
.Ltmp96:
# %bb.106:                              #   in Loop: Header=BB5_82 Depth=1
	incl	%ebp
	cmpb	$0, 19(%rsp)
	jne	.LBB5_82
# %bb.107:
	movl	$.L.str.13, %edi
	movl	%ebp, %esi
	xorl	%eax, %eax
	callq	printf
	movq	104(%rsp), %rsi
	movslq	20(%rsp), %rdx
	shlq	$2, %rdx
.Ltmp98:
	movq	208(%rsp), %r15                 # 8-byte Reload
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
.Ltmp99:
# %bb.108:
.Ltmp100:
	movl	%eax, %edi
	movl	$373, %esi                      # imm = 0x175
	callq	_Z9safe_call10hipError_ti
.Ltmp101:
# %bb.109:
	movl	$.L.str.14, %edi
	movsd	96(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movb	$1, %al
	callq	printf
	movq	112(%rsp), %rdi                 # 8-byte Reload
	callq	free
	movl	$0, 12(%rsp)
	movq	24(%rsp), %rbx                  # 8-byte Reload
	testl	%ebx, %ebx
	jle	.LBB5_112
# %bb.110:                              # %.lr.ph243.preheader
	xorl	%eax, %eax
.LBB5_111:                              # %.lr.ph243
                                        # =>This Inner Loop Header: Depth=1
	cltq
	shlq	$5, %rax
	movq	16(%r14,%rax), %rdi
	callq	free
	movslq	12(%rsp), %rax
	shlq	$5, %rax
	movq	24(%r14,%rax), %rdi
	callq	free
	movl	12(%rsp), %eax
	incl	%eax
	movl	%eax, 12(%rsp)
	cmpl	%ebx, %eax
	jl	.LBB5_111
.LBB5_112:                              # %._crit_edge244
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	movq	104(%rsp), %rdi
.Ltmp102:
	callq	hipFree
.Ltmp103:
# %bb.113:
.Ltmp104:
	movl	%eax, %edi
	movl	$391, %esi                      # imm = 0x187
	callq	_Z9safe_call10hipError_ti
.Ltmp105:
# %bb.114:
	movq	128(%rsp), %rdi
.Ltmp106:
	callq	hipFree
.Ltmp107:
# %bb.115:
.Ltmp108:
	movl	%eax, %edi
	movl	$392, %esi                      # imm = 0x188
	callq	_Z9safe_call10hipError_ti
.Ltmp109:
# %bb.116:
	movq	120(%rsp), %rdi
.Ltmp110:
	callq	hipFree
.Ltmp111:
# %bb.117:
.Ltmp112:
	movl	%eax, %edi
	movl	$393, %esi                      # imm = 0x189
	callq	_Z9safe_call10hipError_ti
.Ltmp113:
# %bb.118:
	movq	32(%rsp), %rdi
.Ltmp114:
	callq	hipFree
.Ltmp115:
# %bb.119:
.Ltmp116:
	movl	%eax, %edi
	movl	$394, %esi                      # imm = 0x18A
	callq	_Z9safe_call10hipError_ti
.Ltmp117:
# %bb.120:
	movq	224(%rsp), %rdi
.Ltmp118:
	callq	hipEventDestroy
.Ltmp119:
# %bb.121:
.Ltmp120:
	movl	%eax, %edi
	movl	$397, %esi                      # imm = 0x18D
	callq	_Z9safe_call10hipError_ti
.Ltmp121:
# %bb.122:
	movq	216(%rsp), %rdi
.Ltmp122:
	callq	hipEventDestroy
.Ltmp123:
# %bb.123:
.Ltmp124:
	movl	%eax, %edi
	movl	$398, %esi                      # imm = 0x18E
	callq	_Z9safe_call10hipError_ti
.Ltmp125:
# %bb.124:
	movq	64(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB5_126
# %bb.125:
	callq	_ZdlPv
.LBB5_126:                              # %_ZNSt6vectorIiSaIiEED2Ev.exit
	leaq	168(%rsp), %rdi
	callq	_ZNSt6vectorIS_I6__edgeSaIS0_EESaIS2_EED2Ev
	xorl	%eax, %eax
	addq	$232, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB5_127:
	.cfi_def_cfa_offset 288
	movl	$.Lstr.6, %edi
	jmp	.LBB5_129
.LBB5_128:
	movl	$.Lstr, %edi
.LBB5_129:
	callq	puts@PLT
	movl	$-1, %edi
	callq	exit
.LBB5_130:
.Ltmp16:
	jmp	.LBB5_146
.LBB5_131:
.Ltmp10:
	jmp	.LBB5_146
.LBB5_132:
.Ltmp13:
	jmp	.LBB5_146
.LBB5_133:
.Ltmp46:
	jmp	.LBB5_146
.LBB5_134:
.Ltmp55:
	jmp	.LBB5_146
.LBB5_135:
.Ltmp24:
	jmp	.LBB5_143
.LBB5_136:
.Ltmp37:
	jmp	.LBB5_146
.LBB5_137:
.Ltmp7:
	jmp	.LBB5_140
.LBB5_138:                              # %.loopexit.split-lp.loopexit.split-lp
.Ltmp126:
	jmp	.LBB5_146
.LBB5_139:
.Ltmp4:
.LBB5_140:
	movq	%rax, %rbx
	jmp	.LBB5_149
.LBB5_141:                              # %.loopexit.split-lp.loopexit
.Ltmp97:
	jmp	.LBB5_146
.LBB5_142:
.Ltmp19:
.LBB5_143:
	movq	%rax, %rbx
	movq	32(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB5_147
# %bb.144:
	callq	_ZdlPv
	jmp	.LBB5_147
.LBB5_145:                              # %.loopexit
.Ltmp92:
.LBB5_146:
	movq	%rax, %rbx
.LBB5_147:
	movq	64(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB5_149
# %bb.148:
	callq	_ZdlPv
.LBB5_149:
	leaq	168(%rsp), %rdi
	callq	_ZNSt6vectorIS_I6__edgeSaIS0_EESaIS2_EED2Ev
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end5:
	.size	main, .Lfunc_end5-main
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table5:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Lfunc_begin0-.Lfunc_begin0    # >> Call Site 1 <<
	.uleb128 .Ltmp0-.Lfunc_begin0           #   Call between .Lfunc_begin0 and .Ltmp0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 2 <<
	.uleb128 .Ltmp3-.Ltmp0                  #   Call between .Ltmp0 and .Ltmp3
	.uleb128 .Ltmp4-.Lfunc_begin0           #     jumps to .Ltmp4
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp5-.Lfunc_begin0           # >> Call Site 3 <<
	.uleb128 .Ltmp6-.Ltmp5                  #   Call between .Ltmp5 and .Ltmp6
	.uleb128 .Ltmp7-.Lfunc_begin0           #     jumps to .Ltmp7
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp8-.Lfunc_begin0           # >> Call Site 4 <<
	.uleb128 .Ltmp9-.Ltmp8                  #   Call between .Ltmp8 and .Ltmp9
	.uleb128 .Ltmp10-.Lfunc_begin0          #     jumps to .Ltmp10
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp11-.Lfunc_begin0          # >> Call Site 5 <<
	.uleb128 .Ltmp12-.Ltmp11                #   Call between .Ltmp11 and .Ltmp12
	.uleb128 .Ltmp13-.Lfunc_begin0          #     jumps to .Ltmp13
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp14-.Lfunc_begin0          # >> Call Site 6 <<
	.uleb128 .Ltmp15-.Ltmp14                #   Call between .Ltmp14 and .Ltmp15
	.uleb128 .Ltmp16-.Lfunc_begin0          #     jumps to .Ltmp16
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp17-.Lfunc_begin0          # >> Call Site 7 <<
	.uleb128 .Ltmp18-.Ltmp17                #   Call between .Ltmp17 and .Ltmp18
	.uleb128 .Ltmp19-.Lfunc_begin0          #     jumps to .Ltmp19
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp20-.Lfunc_begin0          # >> Call Site 8 <<
	.uleb128 .Ltmp23-.Ltmp20                #   Call between .Ltmp20 and .Ltmp23
	.uleb128 .Ltmp24-.Lfunc_begin0          #     jumps to .Ltmp24
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp23-.Lfunc_begin0          # >> Call Site 9 <<
	.uleb128 .Ltmp25-.Ltmp23                #   Call between .Ltmp23 and .Ltmp25
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp25-.Lfunc_begin0          # >> Call Site 10 <<
	.uleb128 .Ltmp36-.Ltmp25                #   Call between .Ltmp25 and .Ltmp36
	.uleb128 .Ltmp37-.Lfunc_begin0          #     jumps to .Ltmp37
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp38-.Lfunc_begin0          # >> Call Site 11 <<
	.uleb128 .Ltmp45-.Ltmp38                #   Call between .Ltmp38 and .Ltmp45
	.uleb128 .Ltmp46-.Lfunc_begin0          #     jumps to .Ltmp46
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp47-.Lfunc_begin0          # >> Call Site 12 <<
	.uleb128 .Ltmp54-.Ltmp47                #   Call between .Ltmp47 and .Ltmp54
	.uleb128 .Ltmp55-.Lfunc_begin0          #     jumps to .Ltmp55
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp56-.Lfunc_begin0          # >> Call Site 13 <<
	.uleb128 .Ltmp63-.Ltmp56                #   Call between .Ltmp56 and .Ltmp63
	.uleb128 .Ltmp97-.Lfunc_begin0          #     jumps to .Ltmp97
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp64-.Lfunc_begin0          # >> Call Site 14 <<
	.uleb128 .Ltmp91-.Ltmp64                #   Call between .Ltmp64 and .Ltmp91
	.uleb128 .Ltmp92-.Lfunc_begin0          #     jumps to .Ltmp92
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp93-.Lfunc_begin0          # >> Call Site 15 <<
	.uleb128 .Ltmp96-.Ltmp93                #   Call between .Ltmp93 and .Ltmp96
	.uleb128 .Ltmp97-.Lfunc_begin0          #     jumps to .Ltmp97
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp98-.Lfunc_begin0          # >> Call Site 16 <<
	.uleb128 .Ltmp125-.Ltmp98               #   Call between .Ltmp98 and .Ltmp125
	.uleb128 .Ltmp126-.Lfunc_begin0         #     jumps to .Ltmp126
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp125-.Lfunc_begin0         # >> Call Site 17 <<
	.uleb128 .Lfunc_end5-.Ltmp125           #   Call between .Ltmp125 and .Lfunc_end5
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZNSt6vectorIS_I6__edgeSaIS0_EESaIS2_EEC2EmRKS3_,"axG",@progbits,_ZNSt6vectorIS_I6__edgeSaIS0_EESaIS2_EEC2EmRKS3_,comdat
	.weak	_ZNSt6vectorIS_I6__edgeSaIS0_EESaIS2_EEC2EmRKS3_ # -- Begin function _ZNSt6vectorIS_I6__edgeSaIS0_EESaIS2_EEC2EmRKS3_
	.p2align	1, 0x90
	.type	_ZNSt6vectorIS_I6__edgeSaIS0_EESaIS2_EEC2EmRKS3_,@function
_ZNSt6vectorIS_I6__edgeSaIS0_EESaIS2_EEC2EmRKS3_: # @_ZNSt6vectorIS_I6__edgeSaIS0_EESaIS2_EEC2EmRKS3_
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movabsq	$384307168202282326, %rax       # imm = 0x555555555555556
	cmpq	%rax, %rsi
	jae	.LBB6_5
# %bb.1:                                # %_ZNSt6vectorIS_I6__edgeSaIS0_EESaIS2_EE17_S_check_init_lenEmRKS3_.exit
	movq	%rsi, %r14
	movq	%rdi, %rbx
	xorps	%xmm0, %xmm0
	movups	%xmm0, (%rdi)
	movq	$0, 16(%rdi)
	testq	%rsi, %rsi
	je	.LBB6_2
# %bb.3:                                # %.lr.ph.preheader.i.i.i.i
	movq	%rbx, %rdi
	movq	%r14, %rsi
	xorl	%edx, %edx
	callq	_ZNSt15__new_allocatorISt6vectorI6__edgeSaIS1_EEE8allocateEmPKv
	movq	%rax, (%rbx)
	shlq	$3, %r14
	leaq	(%r14,%r14,2), %rdx
	leaq	(%rax,%rdx), %r14
	movq	%r14, 16(%rbx)
	movq	%rax, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	jmp	.LBB6_4
.LBB6_2:                                # %_ZNSt12_Vector_baseISt6vectorI6__edgeSaIS1_EESaIS3_EEC2EmRKS4_.exit.thread
	movups	%xmm0, (%rbx)
	movq	$0, 16(%rbx)
	xorl	%r14d, %r14d
.LBB6_4:
	movq	%r14, 8(%rbx)
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.LBB6_5:
	.cfi_def_cfa_offset 32
	movl	$.L.str.15, %edi
	callq	_ZSt20__throw_length_errorPKc
.Lfunc_end6:
	.size	_ZNSt6vectorIS_I6__edgeSaIS0_EESaIS2_EEC2EmRKS3_, .Lfunc_end6-_ZNSt6vectorIS_I6__edgeSaIS0_EESaIS2_EEC2EmRKS3_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt6vectorIS_I6__edgeSaIS0_EESaIS2_EED2Ev,"axG",@progbits,_ZNSt6vectorIS_I6__edgeSaIS0_EESaIS2_EED2Ev,comdat
	.weak	_ZNSt6vectorIS_I6__edgeSaIS0_EESaIS2_EED2Ev # -- Begin function _ZNSt6vectorIS_I6__edgeSaIS0_EESaIS2_EED2Ev
	.p2align	1, 0x90
	.type	_ZNSt6vectorIS_I6__edgeSaIS0_EESaIS2_EED2Ev,@function
_ZNSt6vectorIS_I6__edgeSaIS0_EESaIS2_EED2Ev: # @_ZNSt6vectorIS_I6__edgeSaIS0_EESaIS2_EED2Ev
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	(%rdi), %rbx
	movq	8(%rdi), %r15
	cmpq	%r15, %rbx
	je	.LBB7_6
# %bb.1:                                # %.lr.ph.i.i.i.preheader
	movq	%rdi, %r14
.LBB7_2:                                # %.lr.ph.i.i.i
                                        # =>This Inner Loop Header: Depth=1
	movq	(%rbx), %rdi
	testq	%rdi, %rdi
	je	.LBB7_4
# %bb.3:                                #   in Loop: Header=BB7_2 Depth=1
	callq	_ZdlPv
.LBB7_4:                                # %_ZSt8_DestroyISt6vectorI6__edgeSaIS1_EEEvPT_.exit.i.i.i
                                        #   in Loop: Header=BB7_2 Depth=1
	addq	$24, %rbx
	cmpq	%r15, %rbx
	jne	.LBB7_2
# %bb.5:                                # %_ZSt8_DestroyIPSt6vectorI6__edgeSaIS1_EES3_EvT_S5_RSaIT0_E.exitthread-pre-split
	movq	(%r14), %rbx
.LBB7_6:                                # %_ZSt8_DestroyIPSt6vectorI6__edgeSaIS1_EES3_EvT_S5_RSaIT0_E.exit
	testq	%rbx, %rbx
	je	.LBB7_7
# %bb.8:
	movq	%rbx, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_ZdlPv                          # TAILCALL
.LBB7_7:                                # %_ZNSt12_Vector_baseISt6vectorI6__edgeSaIS1_EESaIS3_EED2Ev.exit
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	_ZNSt6vectorIS_I6__edgeSaIS0_EESaIS2_EED2Ev, .Lfunc_end7-_ZNSt6vectorIS_I6__edgeSaIS0_EESaIS2_EED2Ev
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt15__new_allocatorISt6vectorI6__edgeSaIS1_EEE8allocateEmPKv,"axG",@progbits,_ZNSt15__new_allocatorISt6vectorI6__edgeSaIS1_EEE8allocateEmPKv,comdat
	.weak	_ZNSt15__new_allocatorISt6vectorI6__edgeSaIS1_EEE8allocateEmPKv # -- Begin function _ZNSt15__new_allocatorISt6vectorI6__edgeSaIS1_EEE8allocateEmPKv
	.p2align	1, 0x90
	.type	_ZNSt15__new_allocatorISt6vectorI6__edgeSaIS1_EEE8allocateEmPKv,@function
_ZNSt15__new_allocatorISt6vectorI6__edgeSaIS1_EEE8allocateEmPKv: # @_ZNSt15__new_allocatorISt6vectorI6__edgeSaIS1_EEE8allocateEmPKv
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movabsq	$384307168202282326, %rax       # imm = 0x555555555555556
	cmpq	%rax, %rsi
	jae	.LBB8_1
# %bb.3:
	shlq	$3, %rsi
	leaq	(%rsi,%rsi,2), %rdi
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	_Znwm                           # TAILCALL
.LBB8_1:
	.cfi_def_cfa_offset 16
	movabsq	$768614336404564651, %rax       # imm = 0xAAAAAAAAAAAAAAB
	cmpq	%rax, %rsi
	jb	.LBB8_2
# %bb.4:
	callq	_ZSt28__throw_bad_array_new_lengthv
.LBB8_2:
	callq	_ZSt17__throw_bad_allocv
.Lfunc_end8:
	.size	_ZNSt15__new_allocatorISt6vectorI6__edgeSaIS1_EEE8allocateEmPKv, .Lfunc_end8-_ZNSt15__new_allocatorISt6vectorI6__edgeSaIS1_EEE8allocateEmPKv
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt6vectorI6__edgeSaIS0_EE17_M_realloc_insertIJRKS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_,"axG",@progbits,_ZNSt6vectorI6__edgeSaIS0_EE17_M_realloc_insertIJRKS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_,comdat
	.weak	_ZNSt6vectorI6__edgeSaIS0_EE17_M_realloc_insertIJRKS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_ # -- Begin function _ZNSt6vectorI6__edgeSaIS0_EE17_M_realloc_insertIJRKS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
	.p2align	1, 0x90
	.type	_ZNSt6vectorI6__edgeSaIS0_EE17_M_realloc_insertIJRKS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_,@function
_ZNSt6vectorI6__edgeSaIS0_EE17_M_realloc_insertIJRKS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_: # @_ZNSt6vectorI6__edgeSaIS0_EE17_M_realloc_insertIJRKS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, (%rsp)                    # 8-byte Spill
	movq	%rsi, %r12
	movq	%rdi, %rbx
	movl	$1, %esi
	movl	$.L.str.16, %edx
	callq	_ZNKSt6vectorI6__edgeSaIS0_EE12_M_check_lenEmPKc
	movq	%rax, %rsi
	movq	(%rbx), %r13
	movq	8(%rbx), %r15
	movq	%r12, 8(%rsp)                   # 8-byte Spill
	subq	%r13, %r12
	movq	%r12, %rax
	sarq	$2, %rax
	movabsq	$-6148914691236517205, %r14     # imm = 0xAAAAAAAAAAAAAAAB
	imulq	%rax, %r14
	testq	%rsi, %rsi
	movq	%rsi, 16(%rsp)                  # 8-byte Spill
	je	.LBB9_1
# %bb.2:
	movq	%rbx, %rdi
	xorl	%edx, %edx
	callq	_ZNSt15__new_allocatorI6__edgeE8allocateEmPKv
	movq	%rax, %rbp
	jmp	.LBB9_3
.LBB9_1:
	xorl	%ebp, %ebp
.LBB9_3:                                # %_ZNSt12_Vector_baseI6__edgeSaIS0_EE11_M_allocateEm.exit
	leaq	(%r14,%r14,2), %rax
	movq	(%rsp), %rdx                    # 8-byte Reload
	movl	8(%rdx), %ecx
	movl	%ecx, 8(%rbp,%rax,4)
	movq	(%rdx), %rcx
	movq	%rcx, (%rbp,%rax,4)
	testq	%r12, %r12
	jle	.LBB9_5
# %bb.4:
	movq	%rbp, %rdi
	movq	%r13, %rsi
	movq	%r12, %rdx
	callq	memmove@PLT
.LBB9_5:                                # %_ZNSt6vectorI6__edgeSaIS0_EE11_S_relocateEPS0_S3_S3_RS1_.exit
	leaq	(%r12,%rbp), %r14
	addq	$12, %r14
	movq	8(%rsp), %rsi                   # 8-byte Reload
	subq	%rsi, %r15
	testq	%r15, %r15
	jle	.LBB9_7
# %bb.6:
	movq	%r14, %rdi
	movq	%r15, %rdx
	callq	memmove@PLT
.LBB9_7:                                # %_ZNSt6vectorI6__edgeSaIS0_EE11_S_relocateEPS0_S3_S3_RS1_.exit16
	testq	%r13, %r13
	je	.LBB9_9
# %bb.8:
	movq	%r13, %rdi
	callq	_ZdlPv
.LBB9_9:                                # %_ZNSt12_Vector_baseI6__edgeSaIS0_EE13_M_deallocateEPS0_m.exit
	addq	%r15, %r14
	movq	%rbp, (%rbx)
	movq	%r14, 8(%rbx)
	movq	16(%rsp), %rax                  # 8-byte Reload
	leaq	(%rax,%rax,2), %rax
	leaq	(,%rax,4), %rax
	addq	%rbp, %rax
	movq	%rax, 16(%rbx)
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end9:
	.size	_ZNSt6vectorI6__edgeSaIS0_EE17_M_realloc_insertIJRKS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_, .Lfunc_end9-_ZNSt6vectorI6__edgeSaIS0_EE17_M_realloc_insertIJRKS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNKSt6vectorI6__edgeSaIS0_EE12_M_check_lenEmPKc,"axG",@progbits,_ZNKSt6vectorI6__edgeSaIS0_EE12_M_check_lenEmPKc,comdat
	.weak	_ZNKSt6vectorI6__edgeSaIS0_EE12_M_check_lenEmPKc # -- Begin function _ZNKSt6vectorI6__edgeSaIS0_EE12_M_check_lenEmPKc
	.p2align	1, 0x90
	.type	_ZNKSt6vectorI6__edgeSaIS0_EE12_M_check_lenEmPKc,@function
_ZNKSt6vectorI6__edgeSaIS0_EE12_M_check_lenEmPKc: # @_ZNKSt6vectorI6__edgeSaIS0_EE12_M_check_lenEmPKc
	.cfi_startproc
# %bb.0:
	movabsq	$768614336404564650, %rcx       # imm = 0xAAAAAAAAAAAAAAA
	movq	8(%rdi), %rax
	subq	(%rdi), %rax
	sarq	$2, %rax
	movabsq	$-6148914691236517205, %rdi     # imm = 0xAAAAAAAAAAAAAAAB
	imulq	%rax, %rdi
	movq	%rcx, %rax
	subq	%rdi, %rax
	cmpq	%rsi, %rax
	jb	.LBB10_2
# %bb.1:
	cmpq	%rsi, %rdi
	cmovaq	%rdi, %rsi
	leaq	(%rsi,%rdi), %rax
	cmpq	%rcx, %rax
	cmovaeq	%rcx, %rax
	addq	%rdi, %rsi
	cmovbq	%rcx, %rax
	retq
.LBB10_2:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	%rdx, %rdi
	callq	_ZSt20__throw_length_errorPKc
.Lfunc_end10:
	.size	_ZNKSt6vectorI6__edgeSaIS0_EE12_M_check_lenEmPKc, .Lfunc_end10-_ZNKSt6vectorI6__edgeSaIS0_EE12_M_check_lenEmPKc
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt15__new_allocatorI6__edgeE8allocateEmPKv,"axG",@progbits,_ZNSt15__new_allocatorI6__edgeE8allocateEmPKv,comdat
	.weak	_ZNSt15__new_allocatorI6__edgeE8allocateEmPKv # -- Begin function _ZNSt15__new_allocatorI6__edgeE8allocateEmPKv
	.p2align	1, 0x90
	.type	_ZNSt15__new_allocatorI6__edgeE8allocateEmPKv,@function
_ZNSt15__new_allocatorI6__edgeE8allocateEmPKv: # @_ZNSt15__new_allocatorI6__edgeE8allocateEmPKv
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movabsq	$768614336404564651, %rax       # imm = 0xAAAAAAAAAAAAAAB
	cmpq	%rax, %rsi
	jae	.LBB11_1
# %bb.3:
	shlq	$2, %rsi
	leaq	(%rsi,%rsi,2), %rdi
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	_Znwm                           # TAILCALL
.LBB11_1:
	.cfi_def_cfa_offset 16
	movabsq	$1537228672809129302, %rax      # imm = 0x1555555555555556
	cmpq	%rax, %rsi
	jb	.LBB11_2
# %bb.4:
	callq	_ZSt28__throw_bad_array_new_lengthv
.LBB11_2:
	callq	_ZSt17__throw_bad_allocv
.Lfunc_end11:
	.size	_ZNSt15__new_allocatorI6__edgeE8allocateEmPKv, .Lfunc_end11-_ZNSt15__new_allocatorI6__edgeE8allocateEmPKv
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt6vectorIiSaIiEE17_M_realloc_insertIJiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_,"axG",@progbits,_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_,comdat
	.weak	_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_ # -- Begin function _ZNSt6vectorIiSaIiEE17_M_realloc_insertIJiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_
	.p2align	1, 0x90
	.type	_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_,@function
_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_: # @_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, (%rsp)                    # 8-byte Spill
	movq	%rsi, %r12
	movq	%rdi, %rbx
	movl	$1, %esi
	movl	$.L.str.16, %edx
	callq	_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc
	movq	(%rbx), %r13
	movq	8(%rbx), %r15
	movq	%r12, 8(%rsp)                   # 8-byte Spill
	subq	%r13, %r12
	movq	%r12, %r14
	sarq	$2, %r14
	testq	%rax, %rax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	je	.LBB12_1
# %bb.2:
	movq	%rbx, %rdi
	movq	%rax, %rsi
	xorl	%edx, %edx
	callq	_ZNSt15__new_allocatorIiE8allocateEmPKv
	movq	%rax, %rbp
	jmp	.LBB12_3
.LBB12_1:
	xorl	%ebp, %ebp
.LBB12_3:                               # %_ZNSt12_Vector_baseIiSaIiEE11_M_allocateEm.exit
	movq	(%rsp), %rax                    # 8-byte Reload
	movl	(%rax), %eax
	movl	%eax, (%rbp,%r14,4)
	testq	%r12, %r12
	jle	.LBB12_5
# %bb.4:
	movq	%rbp, %rdi
	movq	%r13, %rsi
	movq	%r12, %rdx
	callq	memmove@PLT
.LBB12_5:                               # %_ZNSt6vectorIiSaIiEE11_S_relocateEPiS2_S2_RS0_.exit
	addq	%rbp, %r12
	addq	$4, %r12
	movq	8(%rsp), %rsi                   # 8-byte Reload
	subq	%rsi, %r15
	testq	%r15, %r15
	jle	.LBB12_7
# %bb.6:
	movq	%r12, %rdi
	movq	%r15, %rdx
	callq	memmove@PLT
.LBB12_7:                               # %_ZNSt6vectorIiSaIiEE11_S_relocateEPiS2_S2_RS0_.exit16
	testq	%r13, %r13
	je	.LBB12_9
# %bb.8:
	movq	%r13, %rdi
	callq	_ZdlPv
.LBB12_9:                               # %_ZNSt12_Vector_baseIiSaIiEE13_M_deallocateEPim.exit
	addq	%r15, %r12
	movq	%rbp, (%rbx)
	movq	%r12, 8(%rbx)
	movq	16(%rsp), %rax                  # 8-byte Reload
	leaq	(,%rax,4), %rax
	addq	%rbp, %rax
	movq	%rax, 16(%rbx)
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end12:
	.size	_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_, .Lfunc_end12-_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc,"axG",@progbits,_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc,comdat
	.weak	_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc # -- Begin function _ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc
	.p2align	1, 0x90
	.type	_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc,@function
_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc: # @_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc
	.cfi_startproc
# %bb.0:
	movabsq	$2305843009213693951, %rcx      # imm = 0x1FFFFFFFFFFFFFFF
	movq	8(%rdi), %r8
	subq	(%rdi), %r8
	sarq	$2, %r8
	movq	%rcx, %rax
	subq	%r8, %rax
	cmpq	%rsi, %rax
	jb	.LBB13_2
# %bb.1:
	cmpq	%rsi, %r8
	cmovaq	%r8, %rsi
	leaq	(%rsi,%r8), %rax
	cmpq	%rcx, %rax
	cmovaeq	%rcx, %rax
	addq	%r8, %rsi
	cmovbq	%rcx, %rax
	retq
.LBB13_2:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	%rdx, %rdi
	callq	_ZSt20__throw_length_errorPKc
.Lfunc_end13:
	.size	_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc, .Lfunc_end13-_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt15__new_allocatorIiE8allocateEmPKv,"axG",@progbits,_ZNSt15__new_allocatorIiE8allocateEmPKv,comdat
	.weak	_ZNSt15__new_allocatorIiE8allocateEmPKv # -- Begin function _ZNSt15__new_allocatorIiE8allocateEmPKv
	.p2align	1, 0x90
	.type	_ZNSt15__new_allocatorIiE8allocateEmPKv,@function
_ZNSt15__new_allocatorIiE8allocateEmPKv: # @_ZNSt15__new_allocatorIiE8allocateEmPKv
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	%rsi, %rax
	shrq	$61, %rax
	jne	.LBB14_1
# %bb.3:
	shlq	$2, %rsi
	movq	%rsi, %rdi
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	_Znwm                           # TAILCALL
.LBB14_1:
	.cfi_def_cfa_offset 16
	shrq	$62, %rsi
	je	.LBB14_2
# %bb.4:
	callq	_ZSt28__throw_bad_array_new_lengthv
.LBB14_2:
	callq	_ZSt17__throw_bad_allocv
.Lfunc_end14:
	.size	_ZNSt15__new_allocatorIiE8allocateEmPKv, .Lfunc_end14-_ZNSt15__new_allocatorIiE8allocateEmPKv
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt6vectorIiSaIiEE17_M_realloc_insertIJRKiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_,"axG",@progbits,_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJRKiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_,comdat
	.weak	_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJRKiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_ # -- Begin function _ZNSt6vectorIiSaIiEE17_M_realloc_insertIJRKiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_
	.p2align	1, 0x90
	.type	_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJRKiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_,@function
_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJRKiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_: # @_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJRKiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, (%rsp)                    # 8-byte Spill
	movq	%rsi, %r12
	movq	%rdi, %rbx
	movl	$1, %esi
	movl	$.L.str.16, %edx
	callq	_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc
	movq	(%rbx), %r13
	movq	8(%rbx), %r15
	movq	%r12, 8(%rsp)                   # 8-byte Spill
	subq	%r13, %r12
	movq	%r12, %r14
	sarq	$2, %r14
	testq	%rax, %rax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	je	.LBB15_1
# %bb.2:
	movq	%rbx, %rdi
	movq	%rax, %rsi
	xorl	%edx, %edx
	callq	_ZNSt15__new_allocatorIiE8allocateEmPKv
	movq	%rax, %rbp
	jmp	.LBB15_3
.LBB15_1:
	xorl	%ebp, %ebp
.LBB15_3:                               # %_ZNSt12_Vector_baseIiSaIiEE11_M_allocateEm.exit
	movq	(%rsp), %rax                    # 8-byte Reload
	movl	(%rax), %eax
	movl	%eax, (%rbp,%r14,4)
	testq	%r12, %r12
	jle	.LBB15_5
# %bb.4:
	movq	%rbp, %rdi
	movq	%r13, %rsi
	movq	%r12, %rdx
	callq	memmove@PLT
.LBB15_5:                               # %_ZNSt6vectorIiSaIiEE11_S_relocateEPiS2_S2_RS0_.exit
	addq	%rbp, %r12
	addq	$4, %r12
	movq	8(%rsp), %rsi                   # 8-byte Reload
	subq	%rsi, %r15
	testq	%r15, %r15
	jle	.LBB15_7
# %bb.6:
	movq	%r12, %rdi
	movq	%r15, %rdx
	callq	memmove@PLT
.LBB15_7:                               # %_ZNSt6vectorIiSaIiEE11_S_relocateEPiS2_S2_RS0_.exit16
	testq	%r13, %r13
	je	.LBB15_9
# %bb.8:
	movq	%r13, %rdi
	callq	_ZdlPv
.LBB15_9:                               # %_ZNSt12_Vector_baseIiSaIiEE13_M_deallocateEPim.exit
	addq	%r15, %r12
	movq	%rbp, (%rbx)
	movq	%r12, 8(%rbx)
	movq	16(%rsp), %rax                  # 8-byte Reload
	leaq	(,%rax,4), %rax
	addq	%rbp, %rax
	movq	%rax, 16(%rbx)
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end15:
	.size	_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJRKiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_, .Lfunc_end15-_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJRKiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZSt16__introsort_loopIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEElNS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_T0_T1_,"axG",@progbits,_ZSt16__introsort_loopIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEElNS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_T0_T1_,comdat
	.weak	_ZSt16__introsort_loopIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEElNS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_T0_T1_ # -- Begin function _ZSt16__introsort_loopIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEElNS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_T0_T1_
	.type	_ZSt16__introsort_loopIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEElNS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_T0_T1_,@function
_ZSt16__introsort_loopIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEElNS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_T0_T1_: # @_ZSt16__introsort_loopIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEElNS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_T0_T1_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %rbp
	subq	%rdi, %rbp
	cmpq	$193, %rbp
	jl	.LBB16_12
# %bb.1:                                # %.lr.ph
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	%rsi, %r13
	movq	%rdi, %rbx
	leaq	12(%rdi), %rax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movq	$-12, %rax
	subq	%rdi, %rax
	movq	%rax, 40(%rsp)                  # 8-byte Spill
.LBB16_2:                               # =>This Loop Header: Depth=1
                                        #     Child Loop BB16_5 Depth 2
                                        #       Child Loop BB16_6 Depth 3
                                        #       Child Loop BB16_8 Depth 3
	subq	$1, %r15
	jb	.LBB16_3
# %bb.4:                                #   in Loop: Header=BB16_2 Depth=1
	movq	%r15, 24(%rsp)                  # 8-byte Spill
	movq	%rbp, %rax
	movabsq	$-6148914691236517205, %rcx     # imm = 0xAAAAAAAAAAAAAAAB
	mulq	%rcx
	shrq	$4, %rdx
	leaq	(%rdx,%rdx,2), %rax
	leaq	(%rbx,%rax,4), %rdx
	leaq	-12(%r13), %rcx
	movq	%rbx, %rdi
	movq	16(%rsp), %r12                  # 8-byte Reload
	movq	%r12, %rsi
	movq	%r14, %r8
	callq	_ZSt22__move_median_to_firstIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_SF_SF_T0_
	movq	%r13, 32(%rsp)                  # 8-byte Spill
	movq	%r13, %r15
.LBB16_5:                               #   Parent Loop BB16_2 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB16_6 Depth 3
                                        #       Child Loop BB16_8 Depth 3
	movq	40(%rsp), %rax                  # 8-byte Reload
	leaq	(%rax,%r12), %rbp
	addq	$-12, %r12
	movq	%r12, %r13
.LBB16_6:                               #   Parent Loop BB16_2 Depth=1
                                        #     Parent Loop BB16_5 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	addq	$12, %r13
	movq	%r13, %rdi
	movq	%rbx, %rsi
	callq	*%r14
	addq	$12, %rbp
	testb	%al, %al
	jne	.LBB16_6
# %bb.7:                                # %.preheader.i.i.preheader
                                        #   in Loop: Header=BB16_5 Depth=2
	leaq	12(%r13), %r12
.LBB16_8:                               # %.preheader.i.i
                                        #   Parent Loop BB16_2 Depth=1
                                        #     Parent Loop BB16_5 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	addq	$-12, %r15
	movq	%rbx, %rdi
	movq	%r15, %rsi
	callq	*%r14
	testb	%al, %al
	jne	.LBB16_8
# %bb.9:                                #   in Loop: Header=BB16_5 Depth=2
	cmpq	%r15, %r13
	jae	.LBB16_11
# %bb.10:                               #   in Loop: Header=BB16_5 Depth=2
	movl	8(%r13), %eax
	movl	%eax, 8(%rsp)
	movq	(%r13), %rax
	movq	%rax, (%rsp)
	movl	8(%r15), %eax
	movl	%eax, 8(%r13)
	movq	(%r15), %rax
	movq	%rax, (%r13)
	movl	8(%rsp), %eax
	movl	%eax, 8(%r15)
	movq	(%rsp), %rax
	movq	%rax, (%r15)
	jmp	.LBB16_5
.LBB16_11:                              # %_ZSt27__unguarded_partition_pivotIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEET_SF_SF_T0_.exit
                                        #   in Loop: Header=BB16_2 Depth=1
	movq	%r13, %rdi
	movq	32(%rsp), %rsi                  # 8-byte Reload
	movq	24(%rsp), %r15                  # 8-byte Reload
	movq	%r15, %rdx
	movq	%r14, %rcx
	callq	_ZSt16__introsort_loopIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEElNS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_T0_T1_
	cmpq	$192, %rbp
	jg	.LBB16_2
	jmp	.LBB16_12
.LBB16_3:
	leaq	48(%rsp), %r15
	movq	%r14, (%r15)
	movq	%rsp, %rdx
	movq	%r14, (%rdx)
	movq	%rbx, %rdi
	movq	%r13, %rsi
	callq	_ZSt11__make_heapIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_RT0_
	movq	%rbx, %rdi
	movq	%r13, %rsi
	movq	%r15, %rdx
	callq	_ZSt11__sort_heapIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_RT0_
.LBB16_12:                              # %.loopexit
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end16:
	.size	_ZSt16__introsort_loopIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEElNS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_T0_T1_, .Lfunc_end16-_ZSt16__introsort_loopIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEElNS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_T0_T1_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZSt22__final_insertion_sortIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_T0_,"axG",@progbits,_ZSt22__final_insertion_sortIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_T0_,comdat
	.weak	_ZSt22__final_insertion_sortIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_T0_ # -- Begin function _ZSt22__final_insertion_sortIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_T0_
	.type	_ZSt22__final_insertion_sortIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_T0_,@function
_ZSt22__final_insertion_sortIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_T0_: # @_ZSt22__final_insertion_sortIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_T0_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$16, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdx, %rbx
	movq	%rsi, %r14
	movq	%rsi, %rax
	subq	%rdi, %rax
	cmpq	$193, %rax
	jl	.LBB17_8
# %bb.1:
	leaq	192(%rdi), %r15
	movq	%r15, %rsi
	movq	%rbx, %rdx
	callq	_ZSt16__insertion_sortIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_T0_
	cmpq	%r14, %r15
	je	.LBB17_7
# %bb.2:                                # %.lr.ph.i.preheader
	movq	%rsp, %r12
.LBB17_3:                               # %.lr.ph.i
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB17_5 Depth 2
	movl	8(%r15), %eax
	movl	%eax, 8(%rsp)
	movq	(%r15), %rax
	movq	%rax, (%rsp)
	leaq	-12(%r15), %rsi
	movq	%r12, %rdi
	callq	*%rbx
	movq	%r15, %r13
	testb	%al, %al
	je	.LBB17_6
# %bb.4:                                # %.lr.ph.i.i.preheader
                                        #   in Loop: Header=BB17_3 Depth=1
	movq	%r15, %rsi
.LBB17_5:                               # %.lr.ph.i.i
                                        #   Parent Loop BB17_3 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	leaq	-12(%rsi), %r13
	movl	-4(%rsi), %eax
	movl	%eax, 8(%rsi)
	movq	-12(%rsi), %rax
	movq	%rax, (%rsi)
	addq	$-24, %rsi
	movq	%r12, %rdi
	callq	*%rbx
	movq	%r13, %rsi
	testb	%al, %al
	jne	.LBB17_5
.LBB17_6:                               # %_ZSt25__unguarded_linear_insertIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops14_Val_comp_iterIPFbRKS2_SB_EEEEvT_T0_.exit.i
                                        #   in Loop: Header=BB17_3 Depth=1
	movl	8(%rsp), %eax
	movl	%eax, 8(%r13)
	movq	(%rsp), %rax
	movq	%rax, (%r13)
	addq	$12, %r15
	cmpq	%r14, %r15
	jne	.LBB17_3
.LBB17_7:                               # %_ZSt26__unguarded_insertion_sortIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_T0_.exit
	addq	$16, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB17_8:
	.cfi_def_cfa_offset 64
	movq	%r14, %rsi
	movq	%rbx, %rdx
	addq	$16, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_ZSt16__insertion_sortIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_T0_ # TAILCALL
.Lfunc_end17:
	.size	_ZSt22__final_insertion_sortIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_T0_, .Lfunc_end17-_ZSt22__final_insertion_sortIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_T0_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZSt11__sort_heapIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_RT0_,"axG",@progbits,_ZSt11__sort_heapIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_RT0_,comdat
	.weak	_ZSt11__sort_heapIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_RT0_ # -- Begin function _ZSt11__sort_heapIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_RT0_
	.type	_ZSt11__sort_heapIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_RT0_,@function
_ZSt11__sort_heapIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_RT0_: # @_ZSt11__sort_heapIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_RT0_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rsi, %r12
	subq	%rdi, %r12
	cmpq	$13, %r12
	jl	.LBB18_3
# %bb.1:                                # %.lr.ph.preheader
	movq	%rdx, %rbx
	movq	%rsi, %r14
	movq	%rdi, %r15
	addq	$-12, %r14
	movabsq	$-6148914691236517205, %r13     # imm = 0xAAAAAAAAAAAAAAAB
.LBB18_2:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movq	(%r14), %rcx
	movl	8(%r14), %r8d
	movq	(%r15), %rax
	movq	%rax, (%r14)
	movl	8(%r15), %eax
	movl	%eax, 8(%r14)
	addq	$-12, %r12
	movq	%r12, %rdx
	sarq	$2, %rdx
	imulq	%r13, %rdx
	movq	(%rbx), %r9
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	_ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEElS2_NS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_T0_SG_T1_T2_
	addq	$-12, %r14
	cmpq	$12, %r12
	jg	.LBB18_2
.LBB18_3:                               # %._crit_edge
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end18:
	.size	_ZSt11__sort_heapIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_RT0_, .Lfunc_end18-_ZSt11__sort_heapIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_RT0_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZSt11__make_heapIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_RT0_,"axG",@progbits,_ZSt11__make_heapIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_RT0_,comdat
	.weak	_ZSt11__make_heapIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_RT0_ # -- Begin function _ZSt11__make_heapIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_RT0_
	.type	_ZSt11__make_heapIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_RT0_,@function
_ZSt11__make_heapIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_RT0_: # @_ZSt11__make_heapIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_RT0_
	.cfi_startproc
# %bb.0:
	subq	%rdi, %rsi
	cmpq	$24, %rsi
	jl	.LBB19_4
# %bb.1:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdx, %rbx
	movq	%rdi, %r14
	sarq	$2, %rsi
	movabsq	$-6148914691236517205, %r15     # imm = 0xAAAAAAAAAAAAAAAB
	imulq	%rsi, %r15
	leaq	-2(%r15), %r12
	shrq	%r12
	leaq	(%r12,%r12,2), %rax
	leaq	(%rdi,%rax,4), %r13
	addq	$8, %r13
.LBB19_2:                               # =>This Inner Loop Header: Depth=1
	movq	-8(%r13), %rcx
	movl	(%r13), %r8d
	movq	(%rbx), %r9
	movq	%r14, %rdi
	movq	%r12, %rsi
	movq	%r15, %rdx
	callq	_ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEElS2_NS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_T0_SG_T1_T2_
	addq	$-12, %r13
	addq	$-1, %r12
	jb	.LBB19_2
# %bb.3:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r12
	.cfi_restore %r13
	.cfi_restore %r14
	.cfi_restore %r15
.LBB19_4:                               # %.loopexit
	retq
.Lfunc_end19:
	.size	_ZSt11__make_heapIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_RT0_, .Lfunc_end19-_ZSt11__make_heapIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_RT0_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEElS2_NS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_T0_SG_T1_T2_,"axG",@progbits,_ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEElS2_NS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_T0_SG_T1_T2_,comdat
	.weak	_ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEElS2_NS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_T0_SG_T1_T2_ # -- Begin function _ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEElS2_NS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_T0_SG_T1_T2_
	.type	_ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEElS2_NS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_T0_SG_T1_T2_,@function
_ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEElS2_NS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_T0_SG_T1_T2_: # @_ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEElS2_NS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_T0_SG_T1_T2_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %r14
	movl	%r8d, 20(%rsp)                  # 4-byte Spill
	movq	%rcx, 48(%rsp)                  # 8-byte Spill
	movq	%rdi, %rbx
	leaq	-1(%rdx), %rax
	shrq	$63, %rax
	movq	%rdx, 40(%rsp)                  # 8-byte Spill
	leaq	(%rdx,%rax), %r12
	decq	%r12
	sarq	%r12
	movq	%rsi, %rbp
	movq	%rsi, 8(%rsp)                   # 8-byte Spill
	cmpq	%rsi, %r12
	jle	.LBB20_5
# %bb.1:                                # %.lr.ph.preheader
	movq	8(%rsp), %r15                   # 8-byte Reload
.LBB20_2:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	leaq	2(,%r15,2), %r13
	leaq	(,%r13,2), %rax
	addq	%r13, %rax
	leaq	(%rbx,%rax,4), %rdi
	leaq	1(,%r15,2), %rbp
	leaq	(,%rbp,2), %rax
	addq	%rbp, %rax
	leaq	(%rbx,%rax,4), %rsi
	callq	*%r14
	testb	%al, %al
	jne	.LBB20_4
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB20_2 Depth=1
	movq	%r13, %rbp
.LBB20_4:                               # %.lr.ph
                                        #   in Loop: Header=BB20_2 Depth=1
	leaq	(,%rbp,2), %rax
	addq	%rbp, %rax
	leaq	(%r15,%r15,2), %rcx
	movq	(%rbx,%rax,4), %rdx
	movq	%rdx, (%rbx,%rcx,4)
	movl	8(%rbx,%rax,4), %eax
	movl	%eax, 8(%rbx,%rcx,4)
	movq	%rbp, %r15
	cmpq	%r12, %rbp
	jl	.LBB20_2
.LBB20_5:                               # %._crit_edge
	movq	40(%rsp), %rax                  # 8-byte Reload
	testb	$1, %al
	jne	.LBB20_8
# %bb.6:
	addq	$-2, %rax
	sarq	%rax
	cmpq	%rax, %rbp
	jne	.LBB20_8
# %bb.7:
	leaq	(,%rbp,2), %rax
	addq	%rbp, %rax
	leaq	1(%rbp,%rbp), %rbp
	leaq	(%rbp,%rbp,2), %rcx
	movl	8(%rbx,%rcx,4), %edx
	movl	%edx, 8(%rbx,%rax,4)
	movq	(%rbx,%rcx,4), %rcx
	movq	%rcx, (%rbx,%rax,4)
.LBB20_8:
	movq	48(%rsp), %rax                  # 8-byte Reload
	movq	%rax, 24(%rsp)
	movl	20(%rsp), %eax                  # 4-byte Reload
	movl	%eax, 32(%rsp)
	cmpq	8(%rsp), %rbp                   # 8-byte Folded Reload
	jle	.LBB20_9
# %bb.10:                               # %.lr.ph.i.preheader
	leaq	24(%rsp), %r12
.LBB20_11:                              # %.lr.ph.i
                                        # =>This Inner Loop Header: Depth=1
	leaq	-1(%rbp), %rax
	shrq	$63, %rax
	leaq	(%rax,%rbp), %r15
	decq	%r15
	sarq	%r15
	leaq	(%r15,%r15,2), %rax
	leaq	(%rbx,%rax,4), %r13
	movq	%r13, %rdi
	movq	%r12, %rsi
	callq	*%r14
	testb	%al, %al
	je	.LBB20_9
# %bb.12:                               #   in Loop: Header=BB20_11 Depth=1
	leaq	(,%rbp,2), %rax
	addq	%rbp, %rax
	movl	8(%r13), %ecx
	movl	%ecx, 8(%rbx,%rax,4)
	movq	(%r13), %rcx
	movq	%rcx, (%rbx,%rax,4)
	movq	%r15, %rbp
	cmpq	8(%rsp), %r15                   # 8-byte Folded Reload
	jg	.LBB20_11
	jmp	.LBB20_13
.LBB20_9:
	movq	%rbp, %r15
.LBB20_13:                              # %_ZSt11__push_heapIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEElS2_NS0_5__ops14_Iter_comp_valIPFbRKS2_SB_EEEEvT_T0_SG_T1_RT2_.exit
	leaq	(%r15,%r15,2), %rax
	movl	32(%rsp), %ecx
	movl	%ecx, 8(%rbx,%rax,4)
	movq	24(%rsp), %rcx
	movq	%rcx, (%rbx,%rax,4)
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end20:
	.size	_ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEElS2_NS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_T0_SG_T1_T2_, .Lfunc_end20-_ZSt13__adjust_heapIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEElS2_NS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_T0_SG_T1_T2_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZSt22__move_median_to_firstIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_SF_SF_T0_,"axG",@progbits,_ZSt22__move_median_to_firstIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_SF_SF_T0_,comdat
	.weak	_ZSt22__move_median_to_firstIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_SF_SF_T0_ # -- Begin function _ZSt22__move_median_to_firstIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_SF_SF_T0_
	.type	_ZSt22__move_median_to_firstIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_SF_SF_T0_,@function
_ZSt22__move_median_to_firstIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_SF_SF_T0_: # @_ZSt22__move_median_to_firstIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_SF_SF_T0_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$16, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%r8, %r13
	movq	%rcx, %r14
	movq	%rdx, %r15
	movq	%rsi, %r12
	movq	%rdi, %rbx
	movq	%rsi, %rdi
	movq	%rdx, %rsi
	callq	*%r8
	testb	%al, %al
	je	.LBB21_4
# %bb.1:
	movq	%r15, %rdi
	movq	%r14, %rsi
	callq	*%r13
	testb	%al, %al
	jne	.LBB21_7
# %bb.2:
	movq	%r12, %rdi
	movq	%r14, %rsi
	callq	*%r13
	testb	%al, %al
	je	.LBB21_5
	jmp	.LBB21_3
.LBB21_4:
	movq	%r12, %rdi
	movq	%r14, %rsi
	callq	*%r13
	testb	%al, %al
	je	.LBB21_6
.LBB21_5:
	movl	8(%rbx), %eax
	movl	%eax, 8(%rsp)
	movq	(%rbx), %rax
	movq	%rax, (%rsp)
	movl	8(%r12), %eax
	movl	%eax, 8(%rbx)
	movq	(%r12), %rax
	movq	%rax, (%rbx)
	movl	8(%rsp), %eax
	movl	%eax, 8(%r12)
	movq	(%rsp), %rax
	movq	%rax, (%r12)
	jmp	.LBB21_8
.LBB21_6:
	movq	%r15, %rdi
	movq	%r14, %rsi
	callq	*%r13
	testb	%al, %al
	je	.LBB21_7
.LBB21_3:
	movl	8(%rbx), %eax
	movl	%eax, 8(%rsp)
	movq	(%rbx), %rax
	movq	%rax, (%rsp)
	movl	8(%r14), %eax
	movl	%eax, 8(%rbx)
	movq	(%r14), %rax
	movq	%rax, (%rbx)
	movl	8(%rsp), %eax
	movl	%eax, 8(%r14)
	movq	(%rsp), %rax
	movq	%rax, (%r14)
	jmp	.LBB21_8
.LBB21_7:
	movl	8(%rbx), %eax
	movl	%eax, 8(%rsp)
	movq	(%rbx), %rax
	movq	%rax, (%rsp)
	movl	8(%r15), %eax
	movl	%eax, 8(%rbx)
	movq	(%r15), %rax
	movq	%rax, (%rbx)
	movl	8(%rsp), %eax
	movl	%eax, 8(%r15)
	movq	(%rsp), %rax
	movq	%rax, (%r15)
.LBB21_8:
	addq	$16, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end21:
	.size	_ZSt22__move_median_to_firstIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_SF_SF_T0_, .Lfunc_end21-_ZSt22__move_median_to_firstIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_SF_SF_T0_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZSt16__insertion_sortIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_T0_,"axG",@progbits,_ZSt16__insertion_sortIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_T0_,comdat
	.weak	_ZSt16__insertion_sortIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_T0_ # -- Begin function _ZSt16__insertion_sortIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_T0_
	.type	_ZSt16__insertion_sortIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_T0_,@function
_ZSt16__insertion_sortIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_T0_: # @_ZSt16__insertion_sortIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_T0_
	.cfi_startproc
# %bb.0:
	cmpq	%rsi, %rdi
	je	.LBB22_15
# %bb.1:                                # %.preheader
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %r14
	movq	%rdi, %r15
	leaq	12(%rdi), %rax
	cmpq	%rsi, %rax
	je	.LBB22_14
# %bb.2:                                # %.lr.ph
	movq	%rdx, %rbx
	leaq	8(%rsp), %r12
	movq	%r15, %rbp
.LBB22_3:                               # =>This Loop Header: Depth=1
                                        #     Child Loop BB22_11 Depth 2
	movq	%rax, %r13
	movq	%rax, %rdi
	movq	%r15, %rsi
	callq	*%rbx
	testb	%al, %al
	je	.LBB22_9
# %bb.4:                                #   in Loop: Header=BB22_3 Depth=1
	movl	8(%r13), %eax
	movl	%eax, 16(%rsp)
	movq	(%r13), %rax
	movq	%rax, 8(%rsp)
	movq	%r13, %rcx
	subq	%r15, %rcx
	cmpq	$13, %rcx
	jl	.LBB22_6
# %bb.5:                                #   in Loop: Header=BB22_3 Depth=1
	movq	%rcx, %rax
	movabsq	$-6148914691236517205, %rdx     # imm = 0xAAAAAAAAAAAAAAAB
	mulq	%rdx
	shrq	$3, %rdx
	negq	%rdx
	leaq	(%rdx,%rdx,2), %rax
	leaq	24(,%rax,4), %rdi
	addq	%rbp, %rdi
	movq	%r15, %rsi
	movq	%rcx, %rdx
	callq	memmove@PLT
.LBB22_8:                               # %_ZSt13move_backwardIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEES7_ET0_T_S9_S8_.exit
                                        #   in Loop: Header=BB22_3 Depth=1
	movl	16(%rsp), %eax
	movl	%eax, 8(%r15)
	movq	8(%rsp), %rax
	movq	%rax, (%r15)
	jmp	.LBB22_13
.LBB22_9:                               #   in Loop: Header=BB22_3 Depth=1
	movl	8(%r13), %eax
	movl	%eax, 16(%rsp)
	movq	(%r13), %rax
	movq	%rax, 8(%rsp)
	movq	%r12, %rdi
	movq	%rbp, %rsi
	callq	*%rbx
	movq	%r13, %rbp
	testb	%al, %al
	je	.LBB22_12
# %bb.10:                               # %.lr.ph.i.preheader
                                        #   in Loop: Header=BB22_3 Depth=1
	movq	%r13, %rsi
.LBB22_11:                              # %.lr.ph.i
                                        #   Parent Loop BB22_3 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	leaq	-12(%rsi), %rbp
	movl	-4(%rsi), %eax
	movl	%eax, 8(%rsi)
	movq	-12(%rsi), %rax
	movq	%rax, (%rsi)
	addq	$-24, %rsi
	movq	%r12, %rdi
	callq	*%rbx
	movq	%rbp, %rsi
	testb	%al, %al
	jne	.LBB22_11
.LBB22_12:                              # %_ZSt25__unguarded_linear_insertIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops14_Val_comp_iterIPFbRKS2_SB_EEEEvT_T0_.exit
                                        #   in Loop: Header=BB22_3 Depth=1
	movl	16(%rsp), %eax
	movl	%eax, 8(%rbp)
	movq	8(%rsp), %rax
	movq	%rax, (%rbp)
.LBB22_13:                              #   in Loop: Header=BB22_3 Depth=1
	leaq	12(%r13), %rax
	movq	%r13, %rbp
	cmpq	%r14, %rax
	jne	.LBB22_3
	jmp	.LBB22_14
.LBB22_6:                               #   in Loop: Header=BB22_3 Depth=1
	cmpq	$12, %rcx
	jne	.LBB22_8
# %bb.7:                                #   in Loop: Header=BB22_3 Depth=1
	movl	8(%r15), %eax
	movl	%eax, 20(%rbp)
	movq	(%r15), %rax
	movq	%rax, 12(%rbp)
	jmp	.LBB22_8
.LBB22_14:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r12
	.cfi_restore %r13
	.cfi_restore %r14
	.cfi_restore %r15
	.cfi_restore %rbp
.LBB22_15:                              # %.loopexit
	retq
.Lfunc_end22:
	.size	_ZSt16__insertion_sortIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_T0_, .Lfunc_end22-_ZSt16__insertion_sortIN9__gnu_cxx17__normal_iteratorIP6__edgeSt6vectorIS2_SaIS2_EEEENS0_5__ops15_Iter_comp_iterIPFbRKS2_SB_EEEEvT_SF_T0_
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB23_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB23_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z5resetv, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z4initP8__vertexii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11scatter_bfsPK7__shardP8__vertexii, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$0, 8(%rsp)
	movl	$0, (%rsp)
	movl	$d_over, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movl	$1, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	callq	__hipRegisterVar
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end23:
	.size	__hip_module_ctor, .Lfunc_end23-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB24_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB24_2:
	retq
.Lfunc_end24:
	.size	__hip_module_dtor, .Lfunc_end24-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Error at line %d : %s\n"
	.size	.L.str, 23

	.type	d_over,@object                  # @d_over
	.local	d_over
	.comm	d_over,1,1
	.type	_Z5resetv,@object               # @_Z5resetv
	.section	.rodata,"a",@progbits
	.globl	_Z5resetv
	.p2align	3, 0x0
_Z5resetv:
	.quad	_Z20__device_stub__resetv
	.size	_Z5resetv, 8

	.type	_Z4initP8__vertexii,@object     # @_Z4initP8__vertexii
	.globl	_Z4initP8__vertexii
	.p2align	3, 0x0
_Z4initP8__vertexii:
	.quad	_Z19__device_stub__initP8__vertexii
	.size	_Z4initP8__vertexii, 8

	.type	_Z11scatter_bfsPK7__shardP8__vertexii,@object # @_Z11scatter_bfsPK7__shardP8__vertexii
	.globl	_Z11scatter_bfsPK7__shardP8__vertexii
	.p2align	3, 0x0
_Z11scatter_bfsPK7__shardP8__vertexii:
	.quad	_Z26__device_stub__scatter_bfsPK7__shardP8__vertexii
	.size	_Z11scatter_bfsPK7__shardP8__vertexii, 8

	.type	.L.str.2,@object                # @.str.2
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.2:
	.asciz	"r"
	.size	.L.str.2, 2

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"%d %d"
	.size	.L.str.5, 6

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"%d"
	.size	.L.str.6, 3

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"Time to construct intervals : %f sec\n"
	.size	.L.str.9, 38

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"Time to construct shards : %f sec\n"
	.size	.L.str.11, 35

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	"Number of iterations : %d\n"
	.size	.L.str.13, 27

	.type	.L.str.14,@object               # @.str.14
.L.str.14:
	.asciz	"Time: %f ms\n"
	.size	.L.str.14, 13

	.type	.L.str.15,@object               # @.str.15
.L.str.15:
	.asciz	"cannot create std::vector larger than max_size()"
	.size	.L.str.15, 49

	.type	.L.str.16,@object               # @.str.16
.L.str.16:
	.asciz	"vector::_M_realloc_insert"
	.size	.L.str.16, 26

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z5resetv"
	.size	.L__unnamed_1, 10

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z4initP8__vertexii"
	.size	.L__unnamed_2, 20

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z11scatter_bfsPK7__shardP8__vertexii"
	.size	.L__unnamed_3, 38

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"d_over"
	.size	.L__unnamed_4, 7

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Error reading file."
	.size	.Lstr, 20

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"Begin file reading..."
	.size	.Lstr.1, 22

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"Finished file reading."
	.size	.Lstr.2, 23

	.type	.Lstr.3,@object                 # @str.3
.Lstr.3:
	.asciz	"\nBegin interval construction..."
	.size	.Lstr.3, 32

	.type	.Lstr.4,@object                 # @str.4
.Lstr.4:
	.asciz	"\nBegin shard construction..."
	.size	.Lstr.4, 29

	.type	.Lstr.5,@object                 # @str.5
.Lstr.5:
	.asciz	"Begin kernel"
	.size	.Lstr.5, 13

	.type	.Lstr.6,@object                 # @str.6
.Lstr.6:
	.asciz	"./a.out <filename>"
	.size	.Lstr.6, 19

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z20__device_stub__resetv
	.addrsig_sym _Z19__device_stub__initP8__vertexii
	.addrsig_sym _Z26__device_stub__scatter_bfsPK7__shardP8__vertexii
	.addrsig_sym _Z4costRK6__edgeS1_
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym d_over
	.addrsig_sym _Z5resetv
	.addrsig_sym _Z4initP8__vertexii
	.addrsig_sym _Z11scatter_bfsPK7__shardP8__vertexii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z5resetv               ; -- Begin function _Z5resetv
	.globl	_Z5resetv
	.p2align	8
	.type	_Z5resetv,@function
_Z5resetv:                              ; @_Z5resetv
; %bb.0:
	v_mov_b32_e32 v0, 0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, d_over@rel32@lo+4
	s_addc_u32 s1, s1, d_over@rel32@hi+12
	global_store_b8 v0, v0, s[0:1]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z5resetv
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 0
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 0
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 1
		.amdhsa_next_free_sgpr 2
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z5resetv, .Lfunc_end0-_Z5resetv
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 44
; NumSgprs: 2
; NumVgprs: 1
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 2
; NumVGPRsForWavesPerEU: 1
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z4initP8__vertexii     ; -- Begin function _Z4initP8__vertexii
	.globl	_Z4initP8__vertexii
	.p2align	8
	.type	_Z4initP8__vertexii,@function
_Z4initP8__vertexii:                    ; @_Z4initP8__vertexii
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x1c
	s_load_b64 s[2:3], s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_mov_b32_e32 v2, 0
	v_mov_b32_e32 v0, s2
	v_cmp_eq_u32_e64 s4, s2, v1
	v_cmp_ne_u32_e32 vcc_lo, s2, v1
	s_and_saveexec_b32 s2, vcc_lo
; %bb.1:
	v_cmp_gt_i32_e32 vcc_lo, s3, v1
	v_mov_b32_e32 v2, -1
	v_mov_b32_e32 v0, v1
	s_and_not1_b32 s3, s4, exec_lo
	s_and_b32 s4, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s4, s3, s4
; %bb.2:                                ; %Flow
	s_or_b32 exec_lo, exec_lo, s2
	s_and_saveexec_b32 s2, s4
	s_cbranch_execz .LBB1_4
; %bb.3:                                ; %.sink.split
	s_load_b64 s[0:1], s[0:1], 0x0
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB1_4:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z4initP8__vertexii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 3
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z4initP8__vertexii, .Lfunc_end1-_Z4initP8__vertexii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 172
; NumSgprs: 18
; NumVgprs: 3
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 3
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2align	2                               ; -- Begin function __ockl_printf_append_string_n
	.type	__ockl_printf_append_string_n,@function
__ockl_printf_append_string_n:          ; @__ockl_printf_append_string_n
; %bb.0:
	s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v7, v3 :: v_dual_mov_b32 v6, v2
	v_mov_b32_e32 v8, v0
	s_mov_b32 s0, exec_lo
	s_delay_alu instid0(VALU_DEP_2)
	v_cmpx_ne_u64_e32 0, v[6:7]
	s_xor_b32 s10, exec_lo, s0
	s_cbranch_execz .LBB2_87
; %bb.1:
	s_load_b64 s[2:3], s[8:9], 0x50
	v_dual_mov_b32 v29, 0 :: v_dual_and_b32 v32, 2, v8
	v_dual_mov_b32 v11, 1 :: v_dual_and_b32 v0, -3, v8
	v_mbcnt_lo_u32_b32 v33, -1, 0
	v_mov_b32_e32 v10, 2
	s_mov_b32 s12, 0
	s_mov_b32 s11, 0
.LBB2_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB2_5 Depth 2
                                        ;     Child Loop BB2_13 Depth 2
                                        ;     Child Loop BB2_21 Depth 2
                                        ;     Child Loop BB2_29 Depth 2
                                        ;     Child Loop BB2_37 Depth 2
                                        ;     Child Loop BB2_45 Depth 2
                                        ;     Child Loop BB2_53 Depth 2
                                        ;     Child Loop BB2_61 Depth 2
                                        ;     Child Loop BB2_69 Depth 2
                                        ;     Child Loop BB2_75 Depth 2
                                        ;     Child Loop BB2_84 Depth 2
	v_cmp_gt_u64_e32 vcc_lo, 56, v[4:5]
                                        ; implicit-def: $vgpr2_vgpr3
                                        ; implicit-def: $sgpr4
	s_mov_b32 s0, exec_lo
	v_dual_cndmask_b32 v31, 0, v5 :: v_dual_cndmask_b32 v30, 56, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e32 8, v30
	s_xor_b32 s1, exec_lo, s0
	s_cbranch_execz .LBB2_8
; %bb.3:                                ;   in Loop: Header=BB2_2 Depth=1
	s_waitcnt vmcnt(0)
	v_mov_b32_e32 v2, 0
	v_mov_b32_e32 v3, 0
	s_mov_b32 s6, exec_lo
	v_cmpx_ne_u32_e32 0, v30
	s_cbranch_execz .LBB2_7
; %bb.4:                                ; %.preheader31.preheader
                                        ;   in Loop: Header=BB2_2 Depth=1
	v_lshlrev_b64 v[8:9], 3, v[30:31]
	v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v13, v7
	v_dual_mov_b32 v3, 0 :: v_dual_mov_b32 v12, v6
	s_mov_b64 s[4:5], 0
	s_mov_b32 s7, 0
.LBB2_5:                                ; %.preheader31
                                        ;   Parent Loop BB2_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	flat_load_u8 v9, v[12:13]
	v_mov_b32_e32 v15, s12
	v_add_co_u32 v12, vcc_lo, v12, 1
	v_add_co_ci_u32_e32 v13, vcc_lo, 0, v13, vcc_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_and_b32_e32 v14, 0xffff, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[14:15], s4, v[14:15]
	s_add_u32 s4, s4, 8
	s_addc_u32 s5, s5, 0
	v_cmp_eq_u32_e64 s0, s4, v8
	v_or_b32_e32 v3, v15, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_or_b32_e32 v2, v14, v2
	s_or_b32 s7, s0, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB2_5
; %bb.6:                                ; %Flow172
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
.LBB2_7:                                ; %Flow174
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s6
	s_mov_b32 s4, 0
.LBB2_8:                                ; %Flow176
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_or_saveexec_b32 s0, s1
	v_dual_mov_b32 v14, s4 :: v_dual_mov_b32 v9, v7
	v_mov_b32_e32 v8, v6
	s_xor_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB2_10
; %bb.9:                                ;   in Loop: Header=BB2_2 Depth=1
	s_waitcnt vmcnt(0)
	s_clause 0x5
	flat_load_u8 v2, v[6:7]
	flat_load_u8 v3, v[6:7] offset:1
	flat_load_u8 v8, v[6:7] offset:2
	flat_load_u8 v9, v[6:7] offset:3
	flat_load_u8 v12, v[6:7] offset:5
	flat_load_u8 v13, v[6:7] offset:4
	s_waitcnt vmcnt(5) lgkmcnt(0)
	v_dual_mov_b32 v15, v29 :: v_dual_and_b32 v2, 0xffff, v2
	s_clause 0x1
	flat_load_u8 v14, v[6:7] offset:7
	flat_load_d16_hi_u8 v15, v[6:7] offset:6
	s_waitcnt vmcnt(6)
	v_lshlrev_b32_e32 v3, 8, v3
	s_waitcnt vmcnt(5)
	v_lshlrev_b32_e32 v8, 16, v8
	s_waitcnt vmcnt(4)
	v_lshlrev_b32_e32 v9, 24, v9
	v_or_b32_e32 v2, v3, v2
	s_waitcnt vmcnt(3)
	v_lshlrev_b32_e32 v3, 8, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_or3_b32 v2, v2, v8, v9
	s_waitcnt vmcnt(2)
	v_or3_b32 v3, 0, v13, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or3_b32 v2, v2, 0, 0
	v_or3_b32 v2, v2, 0, 0
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_lshlrev_b32_e32 v8, 24, v14
	v_add_nc_u32_e32 v14, -8, v30
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2)
	v_or3_b32 v3, v3, v15, v8
	v_add_co_u32 v8, vcc_lo, v6, 8
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v7, vcc_lo
.LBB2_10:                               ; %.loopexit32
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr12_vgpr13
                                        ; implicit-def: $sgpr1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 8, v14
	s_xor_b32 s6, exec_lo, s0
	s_cbranch_execz .LBB2_16
; %bb.11:                               ;   in Loop: Header=BB2_2 Depth=1
	v_mov_b32_e32 v12, 0
	v_mov_b32_e32 v13, 0
	s_mov_b32 s7, exec_lo
	v_cmpx_ne_u32_e32 0, v14
	s_cbranch_execz .LBB2_15
; %bb.12:                               ; %.preheader29.preheader
                                        ;   in Loop: Header=BB2_2 Depth=1
	v_mov_b32_e32 v12, 0
	v_mov_b32_e32 v13, 0
	s_mov_b64 s[0:1], 0
	s_mov_b32 s13, 0
	s_mov_b64 s[4:5], 0
.LBB2_13:                               ; %.preheader29
                                        ;   Parent Loop BB2_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v15, vcc_lo, v8, s4
	v_add_co_ci_u32_e32 v16, vcc_lo, s5, v9, vcc_lo
	s_add_u32 s4, s4, 1
	s_addc_u32 s5, s5, 0
	v_cmp_eq_u32_e32 vcc_lo, s4, v14
	flat_load_u8 v15, v[15:16]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v16, s12 :: v_dual_and_b32 v15, 0xffff, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[15:16], s0, v[15:16]
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_or_b32 s13, vcc_lo, s13
	v_or_b32_e32 v13, v16, v13
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v12, v15, v12
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB2_13
; %bb.14:                               ; %Flow167
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
.LBB2_15:                               ; %Flow169
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s7
	s_mov_b32 s1, 0
                                        ; implicit-def: $vgpr14
.LBB2_16:                               ; %Flow171
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_or_saveexec_b32 s0, s6
	v_mov_b32_e32 v16, s1
	s_xor_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB2_18
; %bb.17:                               ;   in Loop: Header=BB2_2 Depth=1
	s_clause 0x5
	flat_load_u8 v12, v[8:9]
	flat_load_u8 v13, v[8:9] offset:1
	flat_load_u8 v15, v[8:9] offset:2
	flat_load_u8 v16, v[8:9] offset:3
	flat_load_u8 v17, v[8:9] offset:5
	flat_load_u8 v18, v[8:9] offset:4
	s_waitcnt vmcnt(5) lgkmcnt(0)
	v_dual_mov_b32 v19, v29 :: v_dual_and_b32 v12, 0xffff, v12
	s_clause 0x1
	flat_load_u8 v20, v[8:9] offset:7
	flat_load_d16_hi_u8 v19, v[8:9] offset:6
	s_waitcnt vmcnt(6)
	v_lshlrev_b32_e32 v13, 8, v13
	s_waitcnt vmcnt(5)
	v_lshlrev_b32_e32 v15, 16, v15
	s_waitcnt vmcnt(4)
	v_lshlrev_b32_e32 v16, 24, v16
	v_add_co_u32 v8, vcc_lo, v8, 8
	v_or_b32_e32 v12, v13, v12
	s_waitcnt vmcnt(3)
	v_lshlrev_b32_e32 v13, 8, v17
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_or3_b32 v12, v12, v15, v16
	s_waitcnt vmcnt(2)
	v_or3_b32 v13, 0, v18, v13
	v_add_nc_u32_e32 v16, -8, v14
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or3_b32 v12, v12, 0, 0
	v_or3_b32 v12, v12, 0, 0
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_lshlrev_b32_e32 v15, 24, v20
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_or3_b32 v13, v13, v19, v15
.LBB2_18:                               ; %.loopexit30
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $sgpr1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 8, v16
	s_xor_b32 s6, exec_lo, s0
	s_cbranch_execz .LBB2_24
; %bb.19:                               ;   in Loop: Header=BB2_2 Depth=1
	v_mov_b32_e32 v14, 0
	v_mov_b32_e32 v15, 0
	s_mov_b32 s7, exec_lo
	v_cmpx_ne_u32_e32 0, v16
	s_cbranch_execz .LBB2_23
; %bb.20:                               ; %.preheader27.preheader
                                        ;   in Loop: Header=BB2_2 Depth=1
	v_mov_b32_e32 v14, 0
	v_mov_b32_e32 v15, 0
	s_mov_b64 s[0:1], 0
	s_mov_b32 s13, 0
	s_mov_b64 s[4:5], 0
.LBB2_21:                               ; %.preheader27
                                        ;   Parent Loop BB2_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v17, vcc_lo, v8, s4
	v_add_co_ci_u32_e32 v18, vcc_lo, s5, v9, vcc_lo
	s_add_u32 s4, s4, 1
	s_addc_u32 s5, s5, 0
	v_cmp_eq_u32_e32 vcc_lo, s4, v16
	flat_load_u8 v17, v[17:18]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v18, s12 :: v_dual_and_b32 v17, 0xffff, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[17:18], s0, v[17:18]
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_or_b32 s13, vcc_lo, s13
	v_or_b32_e32 v15, v18, v15
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v14, v17, v14
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB2_21
; %bb.22:                               ; %Flow162
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
.LBB2_23:                               ; %Flow164
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s7
	s_mov_b32 s1, 0
                                        ; implicit-def: $vgpr16
.LBB2_24:                               ; %Flow166
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_or_saveexec_b32 s0, s6
	v_mov_b32_e32 v18, s1
	s_xor_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB2_26
; %bb.25:                               ;   in Loop: Header=BB2_2 Depth=1
	s_clause 0x5
	flat_load_u8 v14, v[8:9]
	flat_load_u8 v15, v[8:9] offset:1
	flat_load_u8 v17, v[8:9] offset:2
	flat_load_u8 v18, v[8:9] offset:3
	flat_load_u8 v19, v[8:9] offset:5
	flat_load_u8 v20, v[8:9] offset:4
	s_waitcnt vmcnt(5) lgkmcnt(0)
	v_dual_mov_b32 v21, v29 :: v_dual_and_b32 v14, 0xffff, v14
	s_clause 0x1
	flat_load_u8 v22, v[8:9] offset:7
	flat_load_d16_hi_u8 v21, v[8:9] offset:6
	s_waitcnt vmcnt(6)
	v_lshlrev_b32_e32 v15, 8, v15
	s_waitcnt vmcnt(5)
	v_lshlrev_b32_e32 v17, 16, v17
	s_waitcnt vmcnt(4)
	v_lshlrev_b32_e32 v18, 24, v18
	v_add_co_u32 v8, vcc_lo, v8, 8
	v_or_b32_e32 v14, v15, v14
	s_waitcnt vmcnt(3)
	v_lshlrev_b32_e32 v15, 8, v19
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_or3_b32 v14, v14, v17, v18
	s_waitcnt vmcnt(2)
	v_or3_b32 v15, 0, v20, v15
	v_add_nc_u32_e32 v18, -8, v16
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or3_b32 v14, v14, 0, 0
	v_or3_b32 v14, v14, 0, 0
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_lshlrev_b32_e32 v17, 24, v22
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_or3_b32 v15, v15, v21, v17
.LBB2_26:                               ; %.loopexit28
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr16_vgpr17
                                        ; implicit-def: $sgpr1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 8, v18
	s_xor_b32 s6, exec_lo, s0
	s_cbranch_execz .LBB2_32
; %bb.27:                               ;   in Loop: Header=BB2_2 Depth=1
	v_mov_b32_e32 v16, 0
	v_mov_b32_e32 v17, 0
	s_mov_b32 s7, exec_lo
	v_cmpx_ne_u32_e32 0, v18
	s_cbranch_execz .LBB2_31
; %bb.28:                               ; %.preheader25.preheader
                                        ;   in Loop: Header=BB2_2 Depth=1
	v_mov_b32_e32 v16, 0
	v_mov_b32_e32 v17, 0
	s_mov_b64 s[0:1], 0
	s_mov_b32 s13, 0
	s_mov_b64 s[4:5], 0
.LBB2_29:                               ; %.preheader25
                                        ;   Parent Loop BB2_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v19, vcc_lo, v8, s4
	v_add_co_ci_u32_e32 v20, vcc_lo, s5, v9, vcc_lo
	s_add_u32 s4, s4, 1
	s_addc_u32 s5, s5, 0
	v_cmp_eq_u32_e32 vcc_lo, s4, v18
	flat_load_u8 v19, v[19:20]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v20, s12 :: v_dual_and_b32 v19, 0xffff, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[19:20], s0, v[19:20]
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_or_b32 s13, vcc_lo, s13
	v_or_b32_e32 v17, v20, v17
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v16, v19, v16
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB2_29
; %bb.30:                               ; %Flow157
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
.LBB2_31:                               ; %Flow159
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s7
	s_mov_b32 s1, 0
                                        ; implicit-def: $vgpr18
.LBB2_32:                               ; %Flow161
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_or_saveexec_b32 s0, s6
	v_mov_b32_e32 v20, s1
	s_xor_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB2_34
; %bb.33:                               ;   in Loop: Header=BB2_2 Depth=1
	s_clause 0x5
	flat_load_u8 v16, v[8:9]
	flat_load_u8 v17, v[8:9] offset:1
	flat_load_u8 v19, v[8:9] offset:2
	flat_load_u8 v20, v[8:9] offset:3
	flat_load_u8 v21, v[8:9] offset:5
	flat_load_u8 v22, v[8:9] offset:4
	s_waitcnt vmcnt(5) lgkmcnt(0)
	v_dual_mov_b32 v23, v29 :: v_dual_and_b32 v16, 0xffff, v16
	s_clause 0x1
	flat_load_u8 v24, v[8:9] offset:7
	flat_load_d16_hi_u8 v23, v[8:9] offset:6
	s_waitcnt vmcnt(6)
	v_lshlrev_b32_e32 v17, 8, v17
	s_waitcnt vmcnt(5)
	v_lshlrev_b32_e32 v19, 16, v19
	s_waitcnt vmcnt(4)
	v_lshlrev_b32_e32 v20, 24, v20
	v_add_co_u32 v8, vcc_lo, v8, 8
	v_or_b32_e32 v16, v17, v16
	s_waitcnt vmcnt(3)
	v_lshlrev_b32_e32 v17, 8, v21
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_or3_b32 v16, v16, v19, v20
	s_waitcnt vmcnt(2)
	v_or3_b32 v17, 0, v22, v17
	v_add_nc_u32_e32 v20, -8, v18
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or3_b32 v16, v16, 0, 0
	v_or3_b32 v16, v16, 0, 0
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_lshlrev_b32_e32 v19, 24, v24
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_or3_b32 v17, v17, v23, v19
.LBB2_34:                               ; %.loopexit26
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $sgpr1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 8, v20
	s_xor_b32 s6, exec_lo, s0
	s_cbranch_execz .LBB2_40
; %bb.35:                               ;   in Loop: Header=BB2_2 Depth=1
	v_mov_b32_e32 v18, 0
	v_mov_b32_e32 v19, 0
	s_mov_b32 s7, exec_lo
	v_cmpx_ne_u32_e32 0, v20
	s_cbranch_execz .LBB2_39
; %bb.36:                               ; %.preheader23.preheader
                                        ;   in Loop: Header=BB2_2 Depth=1
	v_mov_b32_e32 v18, 0
	v_mov_b32_e32 v19, 0
	s_mov_b64 s[0:1], 0
	s_mov_b32 s13, 0
	s_mov_b64 s[4:5], 0
.LBB2_37:                               ; %.preheader23
                                        ;   Parent Loop BB2_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v21, vcc_lo, v8, s4
	v_add_co_ci_u32_e32 v22, vcc_lo, s5, v9, vcc_lo
	s_add_u32 s4, s4, 1
	s_addc_u32 s5, s5, 0
	v_cmp_eq_u32_e32 vcc_lo, s4, v20
	flat_load_u8 v21, v[21:22]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v22, s12 :: v_dual_and_b32 v21, 0xffff, v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[21:22], s0, v[21:22]
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_or_b32 s13, vcc_lo, s13
	v_or_b32_e32 v19, v22, v19
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v18, v21, v18
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB2_37
; %bb.38:                               ; %Flow152
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
.LBB2_39:                               ; %Flow154
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s7
	s_mov_b32 s1, 0
                                        ; implicit-def: $vgpr20
.LBB2_40:                               ; %Flow156
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_or_saveexec_b32 s0, s6
	v_mov_b32_e32 v22, s1
	s_xor_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB2_42
; %bb.41:                               ;   in Loop: Header=BB2_2 Depth=1
	s_clause 0x5
	flat_load_u8 v18, v[8:9]
	flat_load_u8 v19, v[8:9] offset:1
	flat_load_u8 v21, v[8:9] offset:2
	flat_load_u8 v22, v[8:9] offset:3
	flat_load_u8 v23, v[8:9] offset:5
	flat_load_u8 v24, v[8:9] offset:4
	s_waitcnt vmcnt(5) lgkmcnt(0)
	v_dual_mov_b32 v25, v29 :: v_dual_and_b32 v18, 0xffff, v18
	s_clause 0x1
	flat_load_u8 v26, v[8:9] offset:7
	flat_load_d16_hi_u8 v25, v[8:9] offset:6
	s_waitcnt vmcnt(6)
	v_lshlrev_b32_e32 v19, 8, v19
	s_waitcnt vmcnt(5)
	v_lshlrev_b32_e32 v21, 16, v21
	s_waitcnt vmcnt(4)
	v_lshlrev_b32_e32 v22, 24, v22
	v_add_co_u32 v8, vcc_lo, v8, 8
	v_or_b32_e32 v18, v19, v18
	s_waitcnt vmcnt(3)
	v_lshlrev_b32_e32 v19, 8, v23
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_or3_b32 v18, v18, v21, v22
	s_waitcnt vmcnt(2)
	v_or3_b32 v19, 0, v24, v19
	v_add_nc_u32_e32 v22, -8, v20
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or3_b32 v18, v18, 0, 0
	v_or3_b32 v18, v18, 0, 0
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_lshlrev_b32_e32 v21, 24, v26
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_or3_b32 v19, v19, v25, v21
.LBB2_42:                               ; %.loopexit24
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr20_vgpr21
                                        ; implicit-def: $sgpr1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 8, v22
	s_xor_b32 s6, exec_lo, s0
	s_cbranch_execz .LBB2_48
; %bb.43:                               ;   in Loop: Header=BB2_2 Depth=1
	v_mov_b32_e32 v20, 0
	v_mov_b32_e32 v21, 0
	s_mov_b32 s7, exec_lo
	v_cmpx_ne_u32_e32 0, v22
	s_cbranch_execz .LBB2_47
; %bb.44:                               ; %.preheader21.preheader
                                        ;   in Loop: Header=BB2_2 Depth=1
	v_mov_b32_e32 v20, 0
	v_mov_b32_e32 v21, 0
	s_mov_b64 s[0:1], 0
	s_mov_b32 s13, 0
	s_mov_b64 s[4:5], 0
.LBB2_45:                               ; %.preheader21
                                        ;   Parent Loop BB2_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v23, vcc_lo, v8, s4
	v_add_co_ci_u32_e32 v24, vcc_lo, s5, v9, vcc_lo
	s_add_u32 s4, s4, 1
	s_addc_u32 s5, s5, 0
	v_cmp_eq_u32_e32 vcc_lo, s4, v22
	flat_load_u8 v23, v[23:24]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v24, s12 :: v_dual_and_b32 v23, 0xffff, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[23:24], s0, v[23:24]
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_or_b32 s13, vcc_lo, s13
	v_or_b32_e32 v21, v24, v21
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v20, v23, v20
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB2_45
; %bb.46:                               ; %Flow147
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
.LBB2_47:                               ; %Flow149
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s7
	s_mov_b32 s1, 0
                                        ; implicit-def: $vgpr22
.LBB2_48:                               ; %Flow151
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_or_saveexec_b32 s0, s6
	v_mov_b32_e32 v24, s1
	s_xor_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB2_50
; %bb.49:                               ;   in Loop: Header=BB2_2 Depth=1
	s_clause 0x5
	flat_load_u8 v20, v[8:9]
	flat_load_u8 v21, v[8:9] offset:1
	flat_load_u8 v23, v[8:9] offset:2
	flat_load_u8 v24, v[8:9] offset:3
	flat_load_u8 v25, v[8:9] offset:5
	flat_load_u8 v26, v[8:9] offset:4
	s_waitcnt vmcnt(5) lgkmcnt(0)
	v_dual_mov_b32 v27, v29 :: v_dual_and_b32 v20, 0xffff, v20
	s_clause 0x1
	flat_load_u8 v28, v[8:9] offset:7
	flat_load_d16_hi_u8 v27, v[8:9] offset:6
	s_waitcnt vmcnt(6)
	v_lshlrev_b32_e32 v21, 8, v21
	s_waitcnt vmcnt(5)
	v_lshlrev_b32_e32 v23, 16, v23
	s_waitcnt vmcnt(4)
	v_lshlrev_b32_e32 v24, 24, v24
	v_add_co_u32 v8, vcc_lo, v8, 8
	v_or_b32_e32 v20, v21, v20
	s_waitcnt vmcnt(3)
	v_lshlrev_b32_e32 v21, 8, v25
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_or3_b32 v20, v20, v23, v24
	s_waitcnt vmcnt(2)
	v_or3_b32 v21, 0, v26, v21
	v_add_nc_u32_e32 v24, -8, v22
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or3_b32 v20, v20, 0, 0
	v_or3_b32 v20, v20, 0, 0
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_lshlrev_b32_e32 v23, 24, v28
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_or3_b32 v21, v21, v27, v23
.LBB2_50:                               ; %.loopexit22
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 8, v24
	s_xor_b32 s4, exec_lo, s0
	s_cbranch_execz .LBB2_56
; %bb.51:                               ;   in Loop: Header=BB2_2 Depth=1
	v_mov_b32_e32 v22, 0
	v_mov_b32_e32 v23, 0
	s_mov_b32 s5, exec_lo
	v_cmpx_ne_u32_e32 0, v24
	s_cbranch_execz .LBB2_55
; %bb.52:                               ; %.preheader.preheader
                                        ;   in Loop: Header=BB2_2 Depth=1
	v_mov_b32_e32 v22, 0
	v_mov_b32_e32 v23, 0
	s_mov_b64 s[0:1], 0
	s_mov_b32 s6, 0
.LBB2_53:                               ; %.preheader
                                        ;   Parent Loop BB2_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	flat_load_u8 v25, v[8:9]
	v_mov_b32_e32 v26, s12
	v_add_nc_u32_e32 v24, -1, v24
	v_add_co_u32 v8, vcc_lo, v8, 1
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v24
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_and_b32_e32 v25, 0xffff, v25
	v_lshlrev_b64 v[25:26], s0, v[25:26]
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_or_b32 s6, vcc_lo, s6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v23, v26, v23
	v_or_b32_e32 v22, v25, v22
	s_and_not1_b32 exec_lo, exec_lo, s6
	s_cbranch_execnz .LBB2_53
; %bb.54:                               ; %Flow142
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
.LBB2_55:                               ; %Flow144
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
                                        ; implicit-def: $vgpr8_vgpr9
.LBB2_56:                               ; %Flow146
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_and_not1_saveexec_b32 s0, s4
	s_cbranch_execz .LBB2_58
; %bb.57:                               ;   in Loop: Header=BB2_2 Depth=1
	s_clause 0x5
	flat_load_u8 v22, v[8:9]
	flat_load_u8 v23, v[8:9] offset:1
	flat_load_u8 v24, v[8:9] offset:2
	flat_load_u8 v25, v[8:9] offset:3
	flat_load_u8 v26, v[8:9] offset:5
	flat_load_u8 v27, v[8:9] offset:4
	v_mov_b32_e32 v28, v29
	s_clause 0x1
	flat_load_u8 v34, v[8:9] offset:7
	flat_load_d16_hi_u8 v28, v[8:9] offset:6
	s_waitcnt vmcnt(7) lgkmcnt(0)
	v_and_b32_e32 v8, 0xffff, v22
	s_waitcnt vmcnt(6)
	v_lshlrev_b32_e32 v9, 8, v23
	s_waitcnt vmcnt(5)
	v_lshlrev_b32_e32 v22, 16, v24
	s_waitcnt vmcnt(3)
	v_lshlrev_b32_e32 v23, 8, v26
	v_or_b32_e32 v8, v9, v8
	v_lshlrev_b32_e32 v9, 24, v25
	s_delay_alu instid0(VALU_DEP_1)
	v_or3_b32 v8, v8, v22, v9
	s_waitcnt vmcnt(2)
	v_or3_b32 v9, 0, v27, v23
	s_waitcnt vmcnt(1)
	v_lshlrev_b32_e32 v22, 24, v34
	v_or3_b32 v8, v8, 0, 0
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or3_b32 v23, v9, v28, v22
	v_or3_b32 v22, v8, 0, 0
.LBB2_58:                               ; %.loopexit
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_mov_b32_e32 v28, v33
	v_mov_b32_e32 v8, 0
	v_mov_b32_e32 v9, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s0, v28
	v_cmp_eq_u32_e64 s0, s0, v28
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_64
; %bb.59:                               ;   in Loop: Header=BB2_2 Depth=1
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[26:27], v29, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[8:9], v29, s[2:3] offset:40
	global_load_b64 v[24:25], v29, s[2:3]
	s_mov_b32 s4, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v9, v9, v27
	v_and_b32_e32 v8, v8, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v9, v9, 24
	v_mul_hi_u32 v34, v8, 24
	v_mul_lo_u32 v8, v8, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v9, v34, v9
	s_waitcnt vmcnt(0)
	v_add_co_u32 v8, vcc_lo, v24, v8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, v25, v9, vcc_lo
	global_load_b64 v[24:25], v[8:9], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[8:9], v29, v[24:27], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[8:9], v[26:27]
	s_cbranch_execz .LBB2_63
; %bb.60:                               ; %.preheader3.i.i19.preheader
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_mov_b32 s5, 0
.LBB2_61:                               ; %.preheader3.i.i19
                                        ;   Parent Loop BB2_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[24:25], v29, s[2:3] offset:40
	global_load_b64 v[34:35], v29, s[2:3]
	v_dual_mov_b32 v27, v9 :: v_dual_mov_b32 v26, v8
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v24, v24, v26
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[8:9], null, v24, 24, v[34:35]
	v_and_b32_e32 v34, v25, v27
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[24:25], null, v34, 24, v[9:10]
	v_mov_b32_e32 v9, v24
	global_load_b64 v[24:25], v[8:9], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[8:9], v29, v[24:27], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[26:27]
	s_or_b32 s5, vcc_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB2_61
; %bb.62:                               ; %Flow139
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
.LBB2_63:                               ; %Flow141
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
.LBB2_64:                               ; %.loopexit4.i.i14
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[34:35], v29, s[2:3] offset:40
	global_load_b128 v[24:27], v29, s[2:3]
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_mov_b32 s15, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v34
	v_readfirstlane_b32 s7, v35
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[4:5], s[6:7]
	s_mul_i32 s1, s7, 24
	s_mul_hi_u32 s13, s6, 24
	s_mul_i32 s14, s6, 24
	s_and_saveexec_b32 s16, s0
	s_cbranch_execz .LBB2_66
; %bb.65:                               ;   in Loop: Header=BB2_2 Depth=1
	s_add_i32 s17, s13, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v34, vcc_lo, v24, s14
	v_add_co_ci_u32_e32 v35, vcc_lo, s17, v25, vcc_lo
	v_dual_mov_b32 v8, s15 :: v_dual_mov_b32 v9, v29
	global_store_b128 v[34:35], v[8:11], off offset:8
.LBB2_66:                               ;   in Loop: Header=BB2_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s16
	v_cmp_lt_u64_e32 vcc_lo, 56, v[4:5]
	v_or_b32_e32 v8, 0, v1
	v_or_b32_e32 v9, v0, v32
	v_lshl_add_u32 v34, v30, 2, 28
	s_lshl_b64 s[6:7], s[6:7], 12
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_cndmask_b32 v1, v8, v1 :: v_dual_cndmask_b32 v0, v9, v0
	v_lshlrev_b64 v[8:9], 6, v[28:29]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v26, vcc_lo, v26, s6
	v_and_b32_e32 v34, 0x1e0, v34
	v_add_co_ci_u32_e32 v27, vcc_lo, s7, v27, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v8, vcc_lo, v26, v8
	v_and_or_b32 v0, 0xffffff1f, v0, v34
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v9, vcc_lo, v27, v9, vcc_lo
	s_clause 0x3
	global_store_b128 v[8:9], v[0:3], off
	global_store_b128 v[8:9], v[12:15], off offset:16
	global_store_b128 v[8:9], v[16:19], off offset:32
	global_store_b128 v[8:9], v[20:23], off offset:48
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB2_74
; %bb.67:                               ;   in Loop: Header=BB2_2 Depth=1
	s_clause 0x1
	global_load_b64 v[16:17], v29, s[2:3] offset:32 glc
	global_load_b64 v[0:1], v29, s[2:3] offset:40
	v_dual_mov_b32 v14, s4 :: v_dual_mov_b32 v15, s5
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s16, v0
	v_readfirstlane_b32 s17, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[16:17], s[16:17], s[4:5]
	s_mul_i32 s7, s17, 24
	s_mul_hi_u32 s15, s16, 24
	s_mul_i32 s16, s16, 24
	s_add_i32 s15, s15, s7
	v_add_co_u32 v12, vcc_lo, v24, s16
	v_add_co_ci_u32_e32 v13, vcc_lo, s15, v25, vcc_lo
	s_mov_b32 s7, exec_lo
	global_store_b64 v[12:13], v[16:17], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v29, v[14:17], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[2:3], v[16:17]
	s_cbranch_execz .LBB2_70
; %bb.68:                               ; %.preheader1.i.i17.preheader
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_mov_b32 s15, 0
.LBB2_69:                               ; %.preheader1.i.i17
                                        ;   Parent Loop BB2_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5
	s_sleep 1
	global_store_b64 v[12:13], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[0:1], v29, v[0:3], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	s_or_b32 s15, vcc_lo, s15
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s15
	s_cbranch_execnz .LBB2_69
.LBB2_70:                               ; %Flow137
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	global_load_b64 v[0:1], v29, s[2:3] offset:16
	s_mov_b32 s15, exec_lo
	s_mov_b32 s7, exec_lo
	v_mbcnt_lo_u32_b32 v2, s15, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB2_72
; %bb.71:                               ;   in Loop: Header=BB2_2 Depth=1
	s_bcnt1_i32_b32 s15, s15
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v28, s15
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[28:29], off offset:8
.LBB2_72:                               ;   in Loop: Header=BB2_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB2_74
; %bb.73:                               ;   in Loop: Header=BB2_2 Depth=1
	global_load_b32 v28, v[0:1], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s7, v28
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[2:3], v[28:29], off
	s_and_b32 m0, s7, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB2_74:                               ; %Flow138
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_add_i32 s13, s13, s1
	v_add_co_u32 v0, vcc_lo, v24, s14
	v_add_co_ci_u32_e32 v1, vcc_lo, s13, v25, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB2_75:                               ;   Parent Loop BB2_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_77
; %bb.76:                               ;   in Loop: Header=BB2_75 Depth=2
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB2_77:                               ;   in Loop: Header=BB2_75 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB2_79
; %bb.78:                               ;   in Loop: Header=BB2_75 Depth=2
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB2_80
.LBB2_79:                               ;   in Loop: Header=BB2_75 Depth=2
	s_mov_b32 s1, -1
.LBB2_80:                               ; %Flow132
                                        ;   in Loop: Header=BB2_75 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB2_75
; %bb.81:                               ;   in Loop: Header=BB2_2 Depth=1
	global_load_b128 v[0:3], v[8:9], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_85
; %bb.82:                               ;   in Loop: Header=BB2_2 Depth=1
	s_clause 0x2
	global_load_b64 v[2:3], v29, s[2:3] offset:40
	global_load_b64 v[8:9], v29, s[2:3] offset:24 glc
	global_load_b64 v[14:15], v29, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v16, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v17, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v12, vcc_lo, v16, s4
	v_add_co_ci_u32_e32 v13, vcc_lo, s5, v17, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[12:13]
	v_dual_cndmask_b32 v13, v13, v17 :: v_dual_cndmask_b32 v12, v12, v16
	v_and_b32_e32 v3, v13, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v2, v12, v2
	v_mul_hi_u32 v16, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_u32 v2, vcc_lo, v14, v2
	v_mov_b32_e32 v14, v8
	v_mul_lo_u32 v3, v3, 24
	v_add_nc_u32_e32 v3, v16, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e32 v3, vcc_lo, v15, v3, vcc_lo
	v_mov_b32_e32 v15, v9
	global_store_b64 v[2:3], v[8:9], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[14:15], v29, v[12:15], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[14:15], v[8:9]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_85
; %bb.83:                               ; %.preheader.i.i16.preheader
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_mov_b32 s0, 0
.LBB2_84:                               ; %.preheader.i.i16
                                        ;   Parent Loop BB2_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	global_store_b64 v[2:3], v[14:15], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[8:9], v29, v[12:15], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[14:15]
	v_dual_mov_b32 v15, v9 :: v_dual_mov_b32 v14, v8
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB2_84
.LBB2_85:                               ; %__ockl_hostcall_preview.exit20
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	v_sub_co_u32 v4, vcc_lo, v4, v30
	v_sub_co_ci_u32_e32 v5, vcc_lo, v5, v31, vcc_lo
	v_add_co_u32 v6, s0, v6, v30
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v7, s0, v7, v31, s0
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_or_b32 s11, vcc_lo, s11
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB2_2
; %bb.86:                               ; %Flow177
	s_or_b32 exec_lo, exec_lo, s11
                                        ; implicit-def: $vgpr8
.LBB2_87:                               ; %Flow193
	s_and_not1_saveexec_b32 s1, s10
	s_cbranch_execz .LBB2_116
; %bb.88:
	s_load_b64 s[2:3], s[8:9], 0x50
	s_waitcnt vmcnt(0)
	v_mbcnt_lo_u32_b32 v2, -1, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_readfirstlane_b32 s0, v2
	v_mov_b32_e32 v9, 0
	v_mov_b32_e32 v10, 0
	v_cmp_eq_u32_e64 s0, s0, v2
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB2_94
; %bb.89:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s5, exec_lo
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[5:6], v0, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[3:4], v0, s[2:3] offset:40
	global_load_b64 v[9:10], v0, s[2:3]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v3, v3, v5
	v_and_b32_e32 v4, v4, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v7, v3, 24
	v_mul_lo_u32 v4, v4, 24
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v7, v4
	s_waitcnt vmcnt(0)
	v_add_co_u32 v3, vcc_lo, v9, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, v10, v4, vcc_lo
	global_load_b64 v[3:4], v[3:4], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[9:10], v0, v[3:6], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[9:10], v[5:6]
	s_cbranch_execz .LBB2_93
; %bb.90:                               ; %.preheader3.i.i.preheader
	s_mov_b32 s6, 0
.LBB2_91:                               ; %.preheader3.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[3:4], v0, s[2:3] offset:40
	global_load_b64 v[11:12], v0, s[2:3]
	v_dual_mov_b32 v5, v9 :: v_dual_mov_b32 v6, v10
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v3, v3, v5
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[9:10], null, v3, 24, v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v3, v10 :: v_dual_and_b32 v4, v4, v6
	v_mad_u64_u32 v[10:11], null, v4, 24, v[3:4]
	global_load_b64 v[3:4], v[9:10], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[9:10], v0, v[3:6], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[5:6]
	s_or_b32 s6, vcc_lo, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s6
	s_cbranch_execnz .LBB2_91
; %bb.92:                               ; %Flow189
	s_or_b32 exec_lo, exec_lo, s6
.LBB2_93:                               ; %Flow191
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
.LBB2_94:                               ; %.loopexit4.i.i
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
	v_mov_b32_e32 v3, 0
	v_readfirstlane_b32 s4, v9
	v_readfirstlane_b32 s5, v10
	s_mov_b32 s11, exec_lo
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[11:12], v3, s[2:3] offset:40
	global_load_b128 v[4:7], v3, s[2:3]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v11
	v_readfirstlane_b32 s7, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[4:5], s[6:7]
	s_mul_i32 s8, s7, 24
	s_mul_hi_u32 s9, s6, 24
	s_mul_i32 s10, s6, 24
	s_and_saveexec_b32 s12, s0
	s_cbranch_execz .LBB2_96
; %bb.95:
	s_add_i32 s13, s9, s8
	s_waitcnt vmcnt(0)
	v_add_co_u32 v13, vcc_lo, v4, s10
	v_add_co_ci_u32_e32 v14, vcc_lo, s13, v5, vcc_lo
	v_dual_mov_b32 v9, s11 :: v_dual_mov_b32 v10, v3
	v_dual_mov_b32 v11, 2 :: v_dual_mov_b32 v12, 1
	global_store_b128 v[13:14], v[9:12], off offset:8
.LBB2_96:
	s_or_b32 exec_lo, exec_lo, s12
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[9:10], 6, v[2:3]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v6, s6
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v7, vcc_lo
	s_mov_b32 s12, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v2, v9
	s_mov_b32 s13, s12
	s_mov_b32 s14, s12
	s_mov_b32 s15, s12
	v_and_or_b32 v0, 0xffffff1f, v8, 32
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v10, vcc_lo
	v_mov_b32_e32 v2, v3
	v_dual_mov_b32 v8, s12 :: v_dual_mov_b32 v11, s15
	v_dual_mov_b32 v9, s13 :: v_dual_mov_b32 v10, s14
	s_clause 0x3
	global_store_b128 v[6:7], v[0:3], off
	global_store_b128 v[6:7], v[8:11], off offset:16
	global_store_b128 v[6:7], v[8:11], off offset:32
	global_store_b128 v[6:7], v[8:11], off offset:48
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB2_104
; %bb.97:
	v_mov_b32_e32 v10, 0
	s_mov_b32 s7, exec_lo
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[2:3] offset:32 glc
	global_load_b64 v[0:1], v10, s[2:3] offset:40
	v_dual_mov_b32 v11, s4 :: v_dual_mov_b32 v12, s5
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v1, s5, v1
	v_and_b32_e32 v0, s4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v1, v1, 24
	v_mul_hi_u32 v2, v0, 24
	v_mul_lo_u32 v0, v0, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, v2, v1
	v_add_co_u32 v8, vcc_lo, v4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, v5, v1, vcc_lo
	global_store_b64 v[8:9], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[11:14], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[2:3], v[13:14]
	s_cbranch_execz .LBB2_100
; %bb.98:                               ; %.preheader1.i.i.preheader
	s_mov_b32 s11, 0
.LBB2_99:                               ; %.preheader1.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5
	s_sleep 1
	global_store_b64 v[8:9], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[0:1], v10, v[0:3], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	s_or_b32 s11, vcc_lo, s11
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB2_99
.LBB2_100:                              ; %Flow187
	s_or_b32 exec_lo, exec_lo, s7
	v_mov_b32_e32 v3, 0
	s_mov_b32 s11, exec_lo
	s_mov_b32 s7, exec_lo
	v_mbcnt_lo_u32_b32 v2, s11, 0
	global_load_b64 v[0:1], v3, s[2:3] offset:16
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB2_102
; %bb.101:
	s_bcnt1_i32_b32 s11, s11
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v2, s11
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[2:3], off offset:8
.LBB2_102:
	s_or_b32 exec_lo, exec_lo, s7
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB2_104
; %bb.103:
	global_load_b32 v0, v[0:1], off offset:24
	v_mov_b32_e32 v1, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s7, v0
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[2:3], v[0:1], off
	s_and_b32 m0, s7, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB2_104:                              ; %Flow188
	s_or_b32 exec_lo, exec_lo, s6
	s_add_i32 s9, s9, s8
	v_add_co_u32 v0, vcc_lo, v4, s10
	v_add_co_ci_u32_e32 v1, vcc_lo, s9, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB2_105:                              ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB2_107
; %bb.106:                              ;   in Loop: Header=BB2_105 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB2_107:                              ;   in Loop: Header=BB2_105 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s6, v2
	s_cmp_eq_u32 s6, 0
	s_cbranch_scc1 .LBB2_109
; %bb.108:                              ;   in Loop: Header=BB2_105 Depth=1
	s_mov_b32 s6, 0
	s_sleep 1
	s_branch .LBB2_110
.LBB2_109:                              ;   in Loop: Header=BB2_105 Depth=1
	s_mov_b32 s6, -1
.LBB2_110:                              ; %Flow182
                                        ;   in Loop: Header=BB2_105 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB2_105
; %bb.111:
	global_load_b128 v[0:3], v[6:7], off
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB2_115
; %bb.112:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[2:3] offset:40
	global_load_b64 v[9:10], v8, s[2:3] offset:24 glc
	global_load_b64 v[6:7], v8, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_115
; %bb.113:                              ; %.preheader.i.i.preheader
	s_mov_b32 s0, 0
.LBB2_114:                              ; %.preheader.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB2_114
.LBB2_115:                              ; %__ockl_hostcall_preview.exit
	s_or_b32 exec_lo, exec_lo, s6
.LBB2_116:                              ; %Flow194
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_setpc_b64 s[30:31]
.Lfunc_end2:
	.size	__ockl_printf_append_string_n, .Lfunc_end2-__ockl_printf_append_string_n
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Function info:
; codeLenInByte = 5688
; NumSgprs: 34
; NumVgprs: 36
; ScratchSize: 0
; MemoryBound: 0
	.text
	.protected	_Z11scatter_bfsPK7__shardP8__vertexii ; -- Begin function _Z11scatter_bfsPK7__shardP8__vertexii
	.globl	_Z11scatter_bfsPK7__shardP8__vertexii
	.p2align	8
	.type	_Z11scatter_bfsPK7__shardP8__vertexii,@function
_Z11scatter_bfsPK7__shardP8__vertexii:  ; @_Z11scatter_bfsPK7__shardP8__vertexii
; %bb.0:
	s_mov_b64 s[18:19], s[0:1]
	s_clause 0x1
	s_load_b128 s[20:23], s[0:1], 0x0
	s_load_b32 s0, s[0:1], 0x24
	s_add_u32 s26, s18, 24
	s_addc_u32 s27, s19, 0
	s_mov_b32 s32, 0
	s_waitcnt lgkmcnt(0)
	s_load_b32 s1, s[20:21], 0x0
	s_and_b32 s0, s0, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s0, v[0:1]
	s_mov_b32 s0, exec_lo
	s_waitcnt lgkmcnt(0)
	v_cmpx_gt_i32_e64 s1, v1
	s_cbranch_execz .LBB3_116
; %bb.1:
	s_load_b64 s[0:1], s[20:21], 0x10
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[24:25], s[18:19], 0x10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
	s_mov_b32 s0, exec_lo
	global_load_b32 v38, v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmpx_le_i32_e64 s25, v38
	s_xor_b32 s33, exec_lo, s0
	s_cbranch_execz .LBB3_56
; %bb.2:
	s_load_b64 s[28:29], s[26:27], 0x50
	v_mbcnt_lo_u32_b32 v39, -1, 0
	v_mov_b32_e32 v6, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v7, 0 :: v_dual_mov_b32 v4, v39
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v4
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_8
; %bb.3:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[8:9], v0, s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[28:29] offset:40
	global_load_b64 v[5:6], v0, s[28:29]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB3_7
; %bb.4:                                ; %.preheader3.i.i.i38.preheader
	s_mov_b32 s3, 0
.LBB3_5:                                ; %.preheader3.i.i.i38
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[28:29] offset:40
	global_load_b64 v[10:11], v0, s[28:29]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB3_5
; %bb.6:                                ; %Flow183
	s_or_b32 exec_lo, exec_lo, s3
.LBB3_7:                                ; %Flow185
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB3_8:                                ; %.loopexit4.i.i.i33
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v5, 0
	v_readfirstlane_b32 s2, v6
	v_readfirstlane_b32 s3, v7
	s_mov_b32 s8, exec_lo
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[28:29] offset:40
	global_load_b128 v[0:3], v5, s[28:29]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB3_10
; %bb.9:
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, v5
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v11, vcc_lo, s8, v1, vcc_lo
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB3_10:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v6
	s_mov_b32 s11, s8
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo
	v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v6, v5 :: v_dual_mov_b32 v13, s11
	v_dual_mov_b32 v12, s10 :: v_dual_mov_b32 v11, s9
	v_mov_b32_e32 v10, s8
	s_clause 0x3
	global_store_b128 v[8:9], v[4:7], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB3_17
; %bb.11:
	v_mov_b32_e32 v10, 0
	s_mov_b32 s5, exec_lo
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[28:29] offset:32 glc
	global_load_b64 v[2:3], v10, s[28:29] offset:40
	v_dual_mov_b32 v11, s2 :: v_dual_mov_b32 v12, s3
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, s3, v3
	v_and_b32_e32 v2, s2, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v4, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v4, v3
	v_add_co_u32 v6, vcc_lo, v0, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, v1, v3, vcc_lo
	global_store_b64 v[6:7], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[28:29] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB3_13
.LBB3_12:                               ; %.preheader1.i.i.i36
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[28:29] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB3_12
.LBB3_13:                               ; %Flow181
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[28:29] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB3_15
; %bb.14:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB3_15:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB3_17
; %bb.16:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB3_17:                               ; %Flow182
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB3_18:                               ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_20
; %bb.19:                               ;   in Loop: Header=BB3_18 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB3_20:                               ;   in Loop: Header=BB3_18 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB3_22
; %bb.21:                               ;   in Loop: Header=BB3_18 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB3_23
.LBB3_22:                               ;   in Loop: Header=BB3_18 Depth=1
	s_mov_b32 s1, -1
.LBB3_23:                               ; %Flow176
                                        ;   in Loop: Header=BB3_18 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB3_18
; %bb.24:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_28
; %bb.25:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[28:29] offset:40
	global_load_b64 v[9:10], v8, s[28:29] offset:24 glc
	global_load_b64 v[6:7], v8, s[28:29]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB3_28
; %bb.26:                               ; %.preheader.i.i.i35.preheader
	s_mov_b32 s0, 0
.LBB3_27:                               ; %.preheader.i.i.i35
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB3_27
.LBB3_28:                               ; %__ockl_printf_begin.exit39
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.1@rel32@lo+4
	s_addc_u32 s1, s1, .str.1@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
	s_cmp_lg_u64 s[0:1], 0
	v_mov_b32_e32 v5, 0
	s_cselect_b32 s4, 24, 0
	s_add_u32 s8, s18, 24
	v_mov_b32_e32 v4, s4
	s_addc_u32 s9, s19, 0
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	s_swappc_b64 s[30:31], s[2:3]
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v39
	v_mov_b32_e32 v5, 0
	v_dual_mov_b32 v37, v1 :: v_dual_mov_b32 v6, 0
	v_cmp_eq_u32_e64 s0, s0, v39
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_34
; %bb.29:
	v_mov_b32_e32 v1, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[7:8], v1, s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[2:3], v1, s[28:29] offset:40
	global_load_b64 v[4:5], v1, s[28:29]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v2, v2, v7
	v_and_b32_e32 v3, v3, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v6, v2, 24
	v_mul_lo_u32 v3, v3, 24
	v_mul_lo_u32 v2, v2, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v6, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v4, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, v5, v3, vcc_lo
	global_load_b64 v[5:6], v[2:3], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[5:6], v1, v[5:8], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[5:6], v[7:8]
	s_cbranch_execz .LBB3_33
; %bb.30:                               ; %.preheader3.i.i.i45.preheader
	s_mov_b32 s3, 0
.LBB3_31:                               ; %.preheader3.i.i.i45
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[2:3], v1, s[28:29] offset:40
	global_load_b64 v[9:10], v1, s[28:29]
	v_dual_mov_b32 v8, v6 :: v_dual_mov_b32 v7, v5
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v2, v2, v7
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[4:5], null, v2, 24, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v2, v5 :: v_dual_and_b32 v3, v3, v8
	v_mad_u64_u32 v[5:6], null, v3, 24, v[2:3]
	global_load_b64 v[5:6], v[4:5], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[5:6], v1, v[5:8], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[5:6], v[7:8]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB3_31
; %bb.32:                               ; %Flow169
	s_or_b32 exec_lo, exec_lo, s3
.LBB3_33:                               ; %Flow171
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB3_34:                               ; %.loopexit4.i.i.i40
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v40, 0
	v_readfirstlane_b32 s2, v5
	v_readfirstlane_b32 s3, v6
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[7:8], v40, s[28:29] offset:40
	global_load_b128 v[1:4], v40, s[28:29]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v7
	v_readfirstlane_b32 s5, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB3_36
; %bb.35:
	v_dual_mov_b32 v5, s8 :: v_dual_mov_b32 v6, v40
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v9, vcc_lo, v1, s7
	v_add_co_ci_u32_e32 v10, vcc_lo, s8, v2, vcc_lo
	v_dual_mov_b32 v7, 2 :: v_dual_mov_b32 v8, 1
	global_store_b128 v[9:10], v[5:8], off offset:8
.LBB3_36:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[5:6], 6, v[39:40]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v3, vcc_lo, v3, s4
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v7, vcc_lo, v3, v5
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	s_mov_b32 s11, s8
	v_and_or_b32 v36, 0xffffff1d, v0, 34
	v_add_co_ci_u32_e32 v8, vcc_lo, v4, v6, vcc_lo
	v_mov_b32_e32 v39, v40
	v_dual_mov_b32 v3, s8 :: v_dual_mov_b32 v6, s11
	v_dual_mov_b32 v4, s9 :: v_dual_mov_b32 v5, s10
	s_clause 0x3
	global_store_b128 v[7:8], v[36:39], off
	global_store_b128 v[7:8], v[3:6], off offset:16
	global_store_b128 v[7:8], v[3:6], off offset:32
	global_store_b128 v[7:8], v[3:6], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB3_44
; %bb.37:
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v9, s2
	v_mov_b32_e32 v10, s3
	s_clause 0x1
	global_load_b64 v[11:12], v0, s[28:29] offset:32 glc
	global_load_b64 v[3:4], v0, s[28:29] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v3
	v_readfirstlane_b32 s9, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v7, vcc_lo, v1, s8
	v_add_co_ci_u32_e32 v8, vcc_lo, s9, v2, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[7:8], v[11:12], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[5:6], v0, v[9:12], s[28:29] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[5:6], v[11:12]
	s_cbranch_execz .LBB3_40
; %bb.38:                               ; %.preheader1.i.i.i43.preheader
	s_mov_b32 s8, 0
.LBB3_39:                               ; %.preheader1.i.i.i43
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v3, s2 :: v_dual_mov_b32 v4, s3
	s_sleep 1
	global_store_b64 v[7:8], v[5:6], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[3:4], v0, v[3:6], s[28:29] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[3:4], v[5:6]
	v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v5, v3
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB3_39
.LBB3_40:                               ; %Flow167
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v6, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v0, s8, 0
	global_load_b64 v[3:4], v6, s[28:29] offset:16
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB3_42
; %bb.41:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v5, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[3:4], v[5:6], off offset:8
.LBB3_42:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[5:6], v[3:4], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[5:6]
	s_cbranch_vccnz .LBB3_44
; %bb.43:
	global_load_b32 v3, v[3:4], off offset:24
	v_mov_b32_e32 v4, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v3
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[5:6], v[3:4], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB3_44:                               ; %Flow168
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v1, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB3_45:                               ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_47
; %bb.46:                               ;   in Loop: Header=BB3_45 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB3_47:                               ;   in Loop: Header=BB3_45 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB3_49
; %bb.48:                               ;   in Loop: Header=BB3_45 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB3_50
.LBB3_49:                               ;   in Loop: Header=BB3_45 Depth=1
	s_mov_b32 s1, -1
.LBB3_50:                               ; %Flow162
                                        ;   in Loop: Header=BB3_45 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB3_45
; %bb.51:
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_55
; %bb.52:
	v_mov_b32_e32 v6, 0
	s_clause 0x2
	global_load_b64 v[2:3], v6, s[28:29] offset:40
	global_load_b64 v[7:8], v6, s[28:29] offset:24 glc
	global_load_b64 v[4:5], v6, s[28:29]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v9, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v9, s2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v0, v0, v9
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v0, v2
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v9, v2, 24
	v_mul_lo_u32 v2, v2, 24
	v_add_nc_u32_e32 v3, v9, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v7
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v8
	global_store_b64 v[4:5], v[7:8], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v6, v[0:3], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[7:8]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB3_55
; %bb.53:                               ; %.preheader.i.i.i42.preheader
	s_mov_b32 s0, 0
.LBB3_54:                               ; %.preheader.i.i.i42
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[7:8], v6, v[0:3], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3]
	v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB3_54
.LBB3_55:                               ; %Flow160
	s_or_b32 exec_lo, exec_lo, s1
                                        ; implicit-def: $vgpr38
                                        ; implicit-def: $vgpr0_vgpr1
.LBB3_56:                               ; %Flow221
	s_and_not1_saveexec_b32 s0, s33
	s_cbranch_execz .LBB3_116
; %bb.57:
	v_ashrrev_i32_e32 v39, 31, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[38:39]
	v_add_co_u32 v2, vcc_lo, s22, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s23, v3, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, s24, v2
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB3_116
; %bb.58:
	s_load_b64 s[0:1], s[20:21], 0x18
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_mov_b32 s0, exec_lo
	global_load_b32 v38, v[0:1], off
	s_waitcnt vmcnt(0)
	v_cmpx_le_i32_e64 s25, v38
	s_xor_b32 s25, exec_lo, s0
	s_cbranch_execz .LBB3_113
; %bb.59:
	s_load_b64 s[20:21], s[26:27], 0x50
	v_mbcnt_lo_u32_b32 v39, -1, 0
	v_mov_b32_e32 v6, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v7, 0 :: v_dual_mov_b32 v4, v39
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v4
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_65
; %bb.60:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[8:9], v0, s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[20:21] offset:40
	global_load_b64 v[5:6], v0, s[20:21]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB3_64
; %bb.61:                               ; %.preheader3.i.i.i.preheader
	s_mov_b32 s3, 0
.LBB3_62:                               ; %.preheader3.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[20:21] offset:40
	global_load_b64 v[10:11], v0, s[20:21]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB3_62
; %bb.63:                               ; %Flow212
	s_or_b32 exec_lo, exec_lo, s3
.LBB3_64:                               ; %Flow214
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB3_65:                               ; %.loopexit4.i.i.i
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v5, 0
	v_readfirstlane_b32 s2, v6
	v_readfirstlane_b32 s3, v7
	s_mov_b32 s8, exec_lo
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[20:21] offset:40
	global_load_b128 v[0:3], v5, s[20:21]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB3_67
; %bb.66:
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, v5
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v11, vcc_lo, s8, v1, vcc_lo
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB3_67:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v6
	s_mov_b32 s11, s8
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo
	v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v6, v5 :: v_dual_mov_b32 v13, s11
	v_dual_mov_b32 v12, s10 :: v_dual_mov_b32 v11, s9
	v_mov_b32_e32 v10, s8
	s_clause 0x3
	global_store_b128 v[8:9], v[4:7], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB3_74
; %bb.68:
	v_mov_b32_e32 v10, 0
	s_mov_b32 s5, exec_lo
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[20:21] offset:32 glc
	global_load_b64 v[2:3], v10, s[20:21] offset:40
	v_dual_mov_b32 v11, s2 :: v_dual_mov_b32 v12, s3
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, s3, v3
	v_and_b32_e32 v2, s2, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v4, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v4, v3
	v_add_co_u32 v6, vcc_lo, v0, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, v1, v3, vcc_lo
	global_store_b64 v[6:7], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB3_70
.LBB3_69:                               ; %.preheader1.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB3_69
.LBB3_70:                               ; %Flow210
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[20:21] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB3_72
; %bb.71:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB3_72:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB3_74
; %bb.73:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB3_74:                               ; %Flow211
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB3_75:                               ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_77
; %bb.76:                               ;   in Loop: Header=BB3_75 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB3_77:                               ;   in Loop: Header=BB3_75 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB3_79
; %bb.78:                               ;   in Loop: Header=BB3_75 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB3_80
.LBB3_79:                               ;   in Loop: Header=BB3_75 Depth=1
	s_mov_b32 s1, -1
.LBB3_80:                               ; %Flow205
                                        ;   in Loop: Header=BB3_75 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB3_75
; %bb.81:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_85
; %bb.82:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[20:21] offset:40
	global_load_b64 v[9:10], v8, s[20:21] offset:24 glc
	global_load_b64 v[6:7], v8, s[20:21]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB3_85
; %bb.83:                               ; %.preheader.i.i.i.preheader
	s_mov_b32 s0, 0
.LBB3_84:                               ; %.preheader.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB3_84
.LBB3_85:                               ; %__ockl_printf_begin.exit
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str@rel32@lo+4
	s_addc_u32 s1, s1, .str@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
	s_cmp_lg_u64 s[0:1], 0
	v_mov_b32_e32 v5, 0
	s_cselect_b32 s4, 25, 0
	s_add_u32 s8, s18, 24
	v_mov_b32_e32 v4, s4
	s_addc_u32 s9, s19, 0
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	s_swappc_b64 s[30:31], s[2:3]
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v39
	v_mov_b32_e32 v5, 0
	v_dual_mov_b32 v37, v1 :: v_dual_mov_b32 v6, 0
	v_cmp_eq_u32_e64 s0, s0, v39
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_91
; %bb.86:
	v_mov_b32_e32 v1, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[7:8], v1, s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[2:3], v1, s[20:21] offset:40
	global_load_b64 v[4:5], v1, s[20:21]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v2, v2, v7
	v_and_b32_e32 v3, v3, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v6, v2, 24
	v_mul_lo_u32 v3, v3, 24
	v_mul_lo_u32 v2, v2, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v6, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v4, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, v5, v3, vcc_lo
	global_load_b64 v[5:6], v[2:3], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[5:6], v1, v[5:8], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[5:6], v[7:8]
	s_cbranch_execz .LBB3_90
; %bb.87:                               ; %.preheader3.i.i.i32.preheader
	s_mov_b32 s3, 0
.LBB3_88:                               ; %.preheader3.i.i.i32
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[2:3], v1, s[20:21] offset:40
	global_load_b64 v[9:10], v1, s[20:21]
	v_dual_mov_b32 v8, v6 :: v_dual_mov_b32 v7, v5
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v2, v2, v7
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[4:5], null, v2, 24, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v2, v5 :: v_dual_and_b32 v3, v3, v8
	v_mad_u64_u32 v[5:6], null, v3, 24, v[2:3]
	global_load_b64 v[5:6], v[4:5], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[5:6], v1, v[5:8], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[5:6], v[7:8]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB3_88
; %bb.89:                               ; %Flow198
	s_or_b32 exec_lo, exec_lo, s3
.LBB3_90:                               ; %Flow200
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB3_91:                               ; %.loopexit4.i.i.i27
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v40, 0
	v_readfirstlane_b32 s2, v5
	v_readfirstlane_b32 s3, v6
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[7:8], v40, s[20:21] offset:40
	global_load_b128 v[1:4], v40, s[20:21]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v7
	v_readfirstlane_b32 s5, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB3_93
; %bb.92:
	v_dual_mov_b32 v5, s8 :: v_dual_mov_b32 v6, v40
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v9, vcc_lo, v1, s7
	v_add_co_ci_u32_e32 v10, vcc_lo, s8, v2, vcc_lo
	v_dual_mov_b32 v7, 2 :: v_dual_mov_b32 v8, 1
	global_store_b128 v[9:10], v[5:8], off offset:8
.LBB3_93:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[5:6], 6, v[39:40]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v3, vcc_lo, v3, s4
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v7, vcc_lo, v3, v5
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	s_mov_b32 s11, s8
	v_and_or_b32 v36, 0xffffff1d, v0, 34
	v_add_co_ci_u32_e32 v8, vcc_lo, v4, v6, vcc_lo
	v_mov_b32_e32 v39, v40
	v_dual_mov_b32 v3, s8 :: v_dual_mov_b32 v6, s11
	v_dual_mov_b32 v4, s9 :: v_dual_mov_b32 v5, s10
	s_clause 0x3
	global_store_b128 v[7:8], v[36:39], off
	global_store_b128 v[7:8], v[3:6], off offset:16
	global_store_b128 v[7:8], v[3:6], off offset:32
	global_store_b128 v[7:8], v[3:6], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB3_101
; %bb.94:
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v9, s2
	v_mov_b32_e32 v10, s3
	s_clause 0x1
	global_load_b64 v[11:12], v0, s[20:21] offset:32 glc
	global_load_b64 v[3:4], v0, s[20:21] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v3
	v_readfirstlane_b32 s9, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v7, vcc_lo, v1, s8
	v_add_co_ci_u32_e32 v8, vcc_lo, s9, v2, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[7:8], v[11:12], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[5:6], v0, v[9:12], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[5:6], v[11:12]
	s_cbranch_execz .LBB3_97
; %bb.95:                               ; %.preheader1.i.i.i30.preheader
	s_mov_b32 s8, 0
.LBB3_96:                               ; %.preheader1.i.i.i30
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v3, s2 :: v_dual_mov_b32 v4, s3
	s_sleep 1
	global_store_b64 v[7:8], v[5:6], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[3:4], v0, v[3:6], s[20:21] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[3:4], v[5:6]
	v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v5, v3
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB3_96
.LBB3_97:                               ; %Flow196
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v6, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v0, s8, 0
	global_load_b64 v[3:4], v6, s[20:21] offset:16
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB3_99
; %bb.98:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v5, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[3:4], v[5:6], off offset:8
.LBB3_99:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[5:6], v[3:4], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[5:6]
	s_cbranch_vccnz .LBB3_101
; %bb.100:
	global_load_b32 v3, v[3:4], off offset:24
	v_mov_b32_e32 v4, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v3
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[5:6], v[3:4], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB3_101:                              ; %Flow197
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v1, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB3_102:                              ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_104
; %bb.103:                              ;   in Loop: Header=BB3_102 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB3_104:                              ;   in Loop: Header=BB3_102 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB3_106
; %bb.105:                              ;   in Loop: Header=BB3_102 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB3_107
.LBB3_106:                              ;   in Loop: Header=BB3_102 Depth=1
	s_mov_b32 s1, -1
.LBB3_107:                              ; %Flow191
                                        ;   in Loop: Header=BB3_102 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB3_102
; %bb.108:
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB3_112
; %bb.109:
	v_mov_b32_e32 v6, 0
	s_clause 0x2
	global_load_b64 v[2:3], v6, s[20:21] offset:40
	global_load_b64 v[7:8], v6, s[20:21] offset:24 glc
	global_load_b64 v[4:5], v6, s[20:21]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v9, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v9, s2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v0, v0, v9
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v0, v2
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v9, v2, 24
	v_mul_lo_u32 v2, v2, 24
	v_add_nc_u32_e32 v3, v9, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v7
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v8
	global_store_b64 v[4:5], v[7:8], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v6, v[0:3], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[7:8]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB3_112
; %bb.110:                              ; %.preheader.i.i.i29.preheader
	s_mov_b32 s0, 0
.LBB3_111:                              ; %.preheader.i.i.i29
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[7:8], v6, v[0:3], s[20:21] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3]
	v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB3_111
.LBB3_112:                              ; %Flow189
	s_or_b32 exec_lo, exec_lo, s1
                                        ; implicit-def: $vgpr38
.LBB3_113:                              ; %Flow217
	s_and_not1_saveexec_b32 s0, s25
	s_cbranch_execz .LBB3_116
; %bb.114:
	v_ashrrev_i32_e32 v39, 31, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[38:39]
	v_add_co_u32 v0, vcc_lo, s22, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s23, v1, vcc_lo
	global_load_b32 v2, v[0:1], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, -1, v2
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB3_116
; %bb.115:
	s_add_i32 s2, s24, 1
	v_mov_b32_e32 v4, 1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, 0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, d_over@rel32@lo+4
	s_addc_u32 s1, s1, d_over@rel32@hi+12
	global_store_b32 v[0:1], v2, off
	global_store_b8 v3, v4, s[0:1]
.LBB3_116:                              ; %__ockl_printf_append_args.exit
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11scatter_bfsPK7__shardP8__vertexii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 41
		.amdhsa_next_free_sgpr 34
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z11scatter_bfsPK7__shardP8__vertexii, .Lfunc_end3-_Z11scatter_bfsPK7__shardP8__vertexii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 6060
; NumSgprs: 36
; NumVgprs: 41
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 4
; VGPRBlocks: 5
; NumSGPRsForWavesPerEU: 36
; NumVGPRsForWavesPerEU: 41
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.protected	d_over                  ; @d_over
	.type	d_over,@object
	.section	.bss,"aw",@nobits
	.globl	d_over
d_over:
	.byte	0                               ; 0x0
	.size	d_over, 1

	.type	.str,@object                    ; @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.str:
	.asciz	"Illegal vertex dest: %d\n"
	.size	.str, 25

	.type	.str.1,@object                  ; @.str.1
.str.1:
	.asciz	"Illegal vertex src: %d\n"
	.size	.str.1, 24

	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym d_over
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:           []
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 4
    .kernarg_segment_size: 0
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z5resetv
    .private_segment_fixed_size: 0
    .sgpr_count:     2
    .sgpr_spill_count: 0
    .symbol:         _Z5resetv.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     1
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z4initP8__vertexii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z4initP8__vertexii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     3
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         104
        .size:           8
        .value_kind:     hidden_hostcall_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11scatter_bfsPK7__shardP8__vertexii
    .private_segment_fixed_size: 0
    .sgpr_count:     36
    .sgpr_spill_count: 0
    .symbol:         _Z11scatter_bfsPK7__shardP8__vertexii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     41
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
