template<typename T>
__global__
void init_array_kernel(T *gpu_array, size_t n) {

    for (int i = blockIdx.x * blockDim.x + threadIdx.x; 
        i < n; 
        i += blockDim.x * gridDim.x) 
    {
        new (&gpu_array[i]) T();
    }
}

template<class T, class TransformedT, class TransformationT>
__global__
void transform_kernel(
        T *from_array, size_t n, 
        TransformedT *to_array,
        TransformationT transform) {

    for (int i = blockIdx.x * blockDim.x + threadIdx.x; 
        i < n; 
        i += blockDim.x * gridDim.x) 
    {
        to_array[i] = transform(from_array[i], i);
    }
}

template<typename T, typename Transformation>
__global__
void for_each_kernel(T *gpu_array, size_t n, Transformation fn) {

    for (int i = blockIdx.x * blockDim.x + threadIdx.x; 
        i < n; 
        i += blockDim.x * gridDim.x) 
    {
        fn(gpu_array[i], i);
    }
}

template<typename T, typename Reduction>
__global__
void reduce_2step_kernel(
        T *gpu_array, size_t n, 
        T *out, 
        Reduction fn, T initial_value=T{}) { /*
    Log-reduction based from the one in the book "The CUDA Handbook" by 
    Nicholas Wilt.
    */

    extern __shared__ T partials[];

    const int tid = threadIdx.x;

    auto reduced = initial_value;
    for (int i = blockIdx.x * blockDim.x + tid; 
         i < n; 
         i += blockDim.x * gridDim.x) {

        reduced = fn(reduced, gpu_array[i]);
    }
    partials[tid] = reduced;
    __syncthreads();


    for (int active_threads = blockDim.x / 2;
         active_threads > 0;
         active_threads /= 2) {
        
        auto is_active_thread = tid < active_threads;
        if (is_active_thread) {
            partials[tid] = fn(partials[tid], partials[tid + active_threads]);
        }
        __syncthreads();
    }

    if (tid == 0) {
        out[blockIdx.x] = partials[0];
    }
}

/* -----------------------------------------------------------------------

 These kernels are used and tested on the gpu_array and gpu_object classes.
*/


	.file	"tmpxft_00278300_00000000-6_kernels.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2018:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2018:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2041:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	movq	%rax, %rdi
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2041:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
template<typename T>
__global__
void init_array_kernel(T *gpu_array, size_t n) {

    for (int i = blockIdx.x * blockDim.x + threadIdx.x; 
        i < n; 
        i += blockDim.x * gridDim.x) 
    {
        new (&gpu_array[i]) T();
    }
}

template<class T, class TransformedT, class TransformationT>
__global__
void transform_kernel(
        T *from_array, size_t n, 
        TransformedT *to_array,
        TransformationT transform) {

    for (int i = blockIdx.x * blockDim.x + threadIdx.x; 
        i < n; 
        i += blockDim.x * gridDim.x) 
    {
        to_array[i] = transform(from_array[i], i);
    }
}

template<typename T, typename Transformation>
__global__
void for_each_kernel(T *gpu_array, size_t n, Transformation fn) {

    for (int i = blockIdx.x * blockDim.x + threadIdx.x; 
        i < n; 
        i += blockDim.x * gridDim.x) 
    {
        fn(gpu_array[i], i);
    }
}

template<typename T, typename Reduction>
__global__
void reduce_2step_kernel(
        T *gpu_array, size_t n, 
        T *out, 
        Reduction fn, T initial_value=T{}) { /*
    Log-reduction based from the one in the book "The CUDA Handbook" by 
    Nicholas Wilt.
    */

    extern __shared__ T partials[];

    const int tid = threadIdx.x;

    auto reduced = initial_value;
    for (int i = blockIdx.x * blockDim.x + tid; 
         i < n; 
         i += blockDim.x * gridDim.x) {

        reduced = fn(reduced, gpu_array[i]);
    }
    partials[tid] = reduced;
    __syncthreads();


    for (int active_threads = blockDim.x / 2;
         active_threads > 0;
         active_threads /= 2) {
        
        auto is_active_thread = tid < active_threads;
        if (is_active_thread) {
            partials[tid] = fn(partials[tid], partials[tid + active_threads]);
        }
        __syncthreads();
    }

    if (tid == 0) {
        out[blockIdx.x] = partials[0];
    }
}

/* -----------------------------------------------------------------------

 These kernels are used and tested on the gpu_array and gpu_object classes.
*/


	.text
	.file	"kernels.hip"
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_

	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.amdgpu_metadata
---
amdhsa.kernels:  []
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
