#include <cuda.h>
#include <cuda_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <time.h>

__global__
void mul(float *d_A, float *d_B, float *d_C, int n);

void matMul(float **h_Mat1, float **h_Mat2, float **h_Mat3, int n);

int main()
{
    int n;
    int i, j;
    float **h_Mat1, **h_Mat2, **h_Mat3;

    printf("Enter the dimension of square matrix, n for n X n: ");
    scanf("%d", &n);

    h_Mat1 = (float **) malloc(n * sizeof(float *));
    for (i = 0; i < n; ++i)
    {
        h_Mat1[i] = (float *) malloc(n * sizeof(float));
    }

    h_Mat2 = (float **) malloc(n * sizeof(float *));
    for (i = 0; i < n; ++i)
    {
        h_Mat2[i] = (float *) malloc(n * sizeof(float));
    }

    h_Mat3 = (float **) malloc(n * sizeof(float *));
    for (i = 0; i < n; ++i)
    {
        h_Mat3[i] = (float *) malloc(n * sizeof(float));
    }

    srand(time(0));
    for (i = 0; i < n; ++i)
    {
        for (j = 0; j < n; ++j)
        {
            h_Mat1[i][j] = rand() % 1000;
            h_Mat2[i][j] = rand() % 1000;
        }
    }

    matMul(h_Mat1, h_Mat2, h_Mat3, n);

    return 0;
}

__global__
void mul(float *d_A, float *d_B, float *d_C, int n)
{
    int i, j, k;

    i = blockIdx.y * blockDim.y + threadIdx.y;
    j = blockIdx.x * blockDim.x + threadIdx.x;

    if (i >= n || j >= n)
    {
        return;
    }
    d_C[i * n + j] = 0;
    for (k = 0; k < n; ++k)
    {
        d_C[i * n + j] += d_A[i * n + k] * d_B[k * n + j];
    }

    return;
}

void matMul(float **h_Mat1, float **h_Mat2, float **h_Mat3, int n)
{
    int size = n * n * sizeof(float);
    int i, j, k;
    float *h_A, *h_B, *h_C;
    float *d_A = NULL, *d_B = NULL, *d_C = NULL;
    cudaError_t err = cudaSuccess;

    h_A = (float *) malloc(size);
    h_B = (float *) malloc(size);
    h_C = (float *) malloc(size);

    for (i = 0; i < n; ++i)
    {
        for (j = 0; j < n; ++j)
        {
            h_A[i * n + j] = h_Mat1[i][j];
            h_B[i * n + j] = h_Mat2[i][j];
        }
    }

    err = cudaMalloc((void **) &d_A, size);
    if (err != cudaSuccess)
    {
        fprintf(stderr, "Failed to allocate device vector A (error code %s)!\n", cudaGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    err = cudaMalloc((void **) &d_B, size);
    if (err != cudaSuccess)
    {
        fprintf(stderr, "Failed to allocate device vector B (error code %s)!\n", cudaGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    err = cudaMalloc((void **) &d_C, size);
    if (err != cudaSuccess)
    {
        fprintf(stderr, "Failed to allocate device vector C (error code %s)!\n", cudaGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    err = cudaMemcpy(d_A, h_A, size, cudaMemcpyHostToDevice);
    if (err != cudaSuccess)
    {
        fprintf(stderr, "Failed to copy vector A from host to device (error code %s)!\n", cudaGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    err = cudaMemcpy(d_B, h_B, size, cudaMemcpyHostToDevice);
    if (err != cudaSuccess)
    {
        fprintf(stderr, "Failed to copy vector B from host to device (error code %s)!\n", cudaGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    printf("Launching CUDA mul kernel with (%d, %d, %d) blocks and (%d, %d, %d) threads per block.\n", (n + 15) / 16, (n + 15) / 16, 1, 16, 16, 1);
    dim3 grid((n + 15) / 16, (n + 15) / 16, 1);
    dim3 block(16, 16, 1);
    mul<<<block, grid>>>(d_A, d_B, d_C, n);
    
    err = cudaGetLastError();
    if (err != cudaSuccess)
    {
        fprintf(stderr, "Failed to launch mul kernel (error code %s)!\n", cudaGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    err = cudaMemcpy(h_C, d_C, size, cudaMemcpyDeviceToHost);
    if (err != cudaSuccess)
    {
        fprintf(stderr, "Failed to copy vector C from device to host (error code %s)!\n", cudaGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    cudaFree(d_A);
    cudaFree(d_B);
    cudaFree(d_C);

    for (i = 0; i < n; ++i)
    {
        for (j = 0; j < n; ++j)
        {
            h_Mat3[i][j] = 0;
            for (k = 0; k < n; ++k)
            {
                h_Mat3[i][j] += h_Mat1[i][k] * h_Mat2[k][j];
            }
            if (fabs(h_C[i * n + j] - h_Mat3[i][j]) > 1e-5)
            {
                fprintf(stderr, "Result verification failed at element (%d, %d)!\n", i, j);
                exit(EXIT_FAILURE);
            }
            h_Mat3[i][j] = h_C[i * n + j];
        }
    }
    printf("TEST PASSED\n");
    
    return;
}

	.file	"tmpxft_00386ebf_00000000-6_2_matrix_multiplication.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z27__device_stub__Z3mulPfS_S_iPfS_S_i
	.type	_Z27__device_stub__Z3mulPfS_S_iPfS_S_i, @function
_Z27__device_stub__Z3mulPfS_S_iPfS_S_i:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z3mulPfS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z27__device_stub__Z3mulPfS_S_iPfS_S_i, .-_Z27__device_stub__Z3mulPfS_S_iPfS_S_i
	.globl	_Z3mulPfS_S_i
	.type	_Z3mulPfS_S_i, @function
_Z3mulPfS_S_i:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z27__device_stub__Z3mulPfS_S_iPfS_S_i
	.cfi_endproc
.LFE2054:
	.size	_Z3mulPfS_S_i, .-_Z3mulPfS_S_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Failed to allocate device vector A (error code %s)!\n"
.LC1:
	.string	"Failed to allocate device vector B (error code %s)!\n"
.LC2:
	.string	"Failed to allocate device vector C (error code %s)!\n"
.LC3:
	.string	"Failed to copy vector A from host to device (error code %s)!\n"
.LC4:
	.string	"Failed to copy vector B from host to device (error code %s)!\n"
.LC5:
	.string	"Launching CUDA mul kernel with (%d, %d, %d) blocks and (%d, %d, %d) threads per block.\n"
.LC6:
	.string	"Failed to launch mul kernel (error code %s)!\n"
.LC7:
	.string	"Failed to copy vector C from device to host (error code %s)!\n"
.LC11:
	.string	"Result verification failed at element (%d, %d)!\n"
.LC12:
	.string	"TEST PASSED\n"
	.text
	.globl	_Z6matMulPPfS0_S0_i
	.type	_Z6matMulPPfS0_S0_i, @function
_Z6matMulPPfS0_S0_i:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rsi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movslq	%ecx, %rbp
	xorl	%ecx, %ecx
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rbp, %rbx
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdx, 24(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	movl	%ebp, %eax
	movq	%rcx, 40(%rsp)
	imull	%ebp, %eax
	movq	%rcx, 48(%rsp)
	salq	$2, %rbp
	movq	%rcx, 56(%rsp)
	sall	$2, %eax
	cltq
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
	call	malloc@PLT
	movq	8(%rsp), %rdi
	movq	%rax, %r15
	call	malloc@PLT
	movq	8(%rsp), %rdi
	movq	%rax, %r14
	call	malloc@PLT
	xorl	%esi, %esi
	movq	%rax, 16(%rsp)
	xorl	%eax, %eax
.L9:
	cmpl	%eax, %ebx
	jle	.L35
	movq	(%r12,%rax,8), %r8
	movq	0(%r13,%rax,8), %rdi
	movq	%rsi, %rcx
	xorl	%edx, %edx
.L10:
	movss	(%r8,%rdx,4), %xmm0
	movss	%xmm0, (%r15,%rcx)
	movss	(%rdi,%rdx,4), %xmm0
	incq	%rdx
	movss	%xmm0, (%r14,%rcx)
	addq	$4, %rcx
	cmpl	%edx, %ebx
	jg	.L10
	incq	%rax
	addq	%rbp, %rsi
	jmp	.L9
.L35:
	movq	8(%rsp), %rsi
	leaq	40(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L12
	call	cudaGetErrorString@PLT
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rcx
	jmp	.L33
.L12:
	movq	8(%rsp), %rsi
	leaq	48(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L13
	call	cudaGetErrorString@PLT
	leaq	.LC1(%rip), %rdx
	movq	%rax, %rcx
.L33:
	movq	stderr(%rip), %rdi
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
.L34:
	movl	$1, %edi
	call	exit@PLT
.L13:
	movq	8(%rsp), %rsi
	leaq	56(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L14
	call	cudaGetErrorString@PLT
	leaq	.LC2(%rip), %rdx
	movq	%rax, %rcx
	jmp	.L33
.L14:
	movq	40(%rsp), %rdi
	movq	8(%rsp), %rdx
	movl	$1, %ecx
	movq	%r15, %rsi
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L15
	call	cudaGetErrorString@PLT
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rcx
	jmp	.L33
.L15:
	movq	48(%rsp), %rdi
	movq	8(%rsp), %rdx
	movl	$1, %ecx
	movq	%r14, %rsi
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L16
	call	cudaGetErrorString@PLT
	leaq	.LC4(%rip), %rdx
	movq	%rax, %rcx
	jmp	.L33
.L16:
	leal	15(%rbx), %eax
	movl	$16, %ecx
	pushq	$1
	.cfi_def_cfa_offset 168
	movl	$16, %r9d
	cltd
	pushq	$16
	.cfi_def_cfa_offset 176
	movl	$1, %r8d
	leaq	.LC5(%rip), %rsi
	idivl	%ecx
	movl	$2, %edi
	movl	%eax, %r14d
	movl	%eax, %ecx
	movl	%eax, %edx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	%r14d, 80(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	%r14d, 84(%rsp)
	movl	$1, %ecx
	movabsq	$68719476752, %rdi
	movl	$1, %esi
	movl	$1, 88(%rsp)
	movq	%rdi, 92(%rsp)
	movl	$1, 100(%rsp)
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
	movq	64(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L17
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rsi
	movl	%ebx, %ecx
	movq	40(%rsp), %rdi
	call	_Z27__device_stub__Z3mulPfS_S_iPfS_S_i
.L17:
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L18
	call	cudaGetErrorString@PLT
	leaq	.LC6(%rip), %rdx
	movq	%rax, %rcx
	jmp	.L33
.L18:
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rdx
	movl	$2, %ecx
	movq	56(%rsp), %rsi
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L19
	call	cudaGetErrorString@PLT
	leaq	.LC7(%rip), %rdx
	movq	%rax, %rcx
	jmp	.L33
.L19:
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rcx
	xorl	%eax, %eax
	movsd	.LC10(%rip), %xmm4
	movss	.LC9(%rip), %xmm3
.L20:
	cmpl	%eax, %ebx
	jle	.L36
	movq	24(%rsp), %rsi
	xorl	%r8d, %r8d
	movq	(%rsi,%rax,8), %rdx
	movq	(%r12,%rax,8), %rsi
.L24:
	movl	$0x00000000, (%rdx,%r8,4)
	leaq	0(,%r8,4), %r9
	xorl	%edi, %edi
.L21:
	movq	0(%r13,%rdi,8), %r10
	movss	(%r10,%r9), %xmm0
	mulss	(%rsi,%rdi,4), %xmm0
	incq	%rdi
	addss	(%rdx,%r8,4), %xmm0
	movss	%xmm0, (%rdx,%r8,4)
	cmpl	%edi, %ebx
	jg	.L21
	movss	(%rcx,%r8,4), %xmm2
	movaps	%xmm2, %xmm1
	subss	%xmm0, %xmm1
	andps	%xmm3, %xmm1
	cvtss2sd	%xmm1, %xmm0
	comisd	%xmm4, %xmm0
	jbe	.L31
	movq	stderr(%rip), %rdi
	movl	%eax, %ecx
	movl	$2, %esi
	xorl	%eax, %eax
	leaq	.LC11(%rip), %rdx
	call	__fprintf_chk@PLT
	jmp	.L34
.L31:
	movss	%xmm2, (%rdx,%r8,4)
	incq	%r8
	cmpl	%r8d, %ebx
	jg	.L24
	incq	%rax
	addq	%rbp, %rcx
	jmp	.L20
.L36:
	xorl	%eax, %eax
	leaq	.LC12(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L26
	call	__stack_chk_fail@PLT
.L26:
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z6matMulPPfS0_S0_i, .-_Z6matMulPPfS0_S0_i
	.section	.rodata.str1.1
.LC13:
	.string	"Enter the dimension of square matrix, n for n X n: "
.LC14:
	.string	"%d"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leaq	.LC13(%rip), %rsi
	movl	$2, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	movq	%fs:40, %rax
	movq	%rax, 8(%rsp)
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	4(%rsp), %rsi
	leaq	.LC14(%rip), %rdi
	xorl	%eax, %eax
	call	__isoc23_scanf@PLT
	movslq	4(%rsp), %rbx
	leaq	0(,%rbx,8), %r14
	movq	%rbx, %r15
	salq	$2, %rbx
	movq	%r14, %rdi
	call	malloc@PLT
	movq	%rax, %rbp
.L38:
	cmpl	%r12d, %r15d
	jle	.L50
	movq	%rbx, %rdi
	call	malloc@PLT
	movq	%rax, 0(%rbp,%r12,8)
	incq	%r12
	jmp	.L38
.L50:
	movq	%r14, %rdi
	xorl	%r13d, %r13d
	call	malloc@PLT
	movq	%rax, %r12
.L40:
	cmpl	%r13d, %r15d
	jle	.L51
	movq	%rbx, %rdi
	call	malloc@PLT
	movq	%rax, (%r12,%r13,8)
	incq	%r13
	jmp	.L40
.L51:
	movq	%r14, %rdi
	xorl	%r13d, %r13d
	call	malloc@PLT
	movq	%rax, %r14
.L42:
	cmpl	%r13d, %r15d
	jle	.L52
	movq	%rbx, %rdi
	call	malloc@PLT
	movq	%rax, (%r14,%r13,8)
	incq	%r13
	jmp	.L42
.L52:
	xorl	%edi, %edi
	xorl	%ebx, %ebx
	movl	$1000, %r15d
	call	time@PLT
	movl	%eax, %edi
	call	srand@PLT
.L44:
	movl	4(%rsp), %ecx
	cmpl	%ebx, %ecx
	jle	.L53
	xorl	%r13d, %r13d
.L46:
	cmpl	%r13d, 4(%rsp)
	jle	.L54
	call	rand@PLT
	movq	0(%rbp,%rbx,8), %rcx
	cltd
	idivl	%r15d
	cvtsi2ssl	%edx, %xmm0
	movss	%xmm0, (%rcx,%r13,4)
	call	rand@PLT
	movq	(%r12,%rbx,8), %rcx
	cltd
	idivl	%r15d
	cvtsi2ssl	%edx, %xmm0
	movss	%xmm0, (%rcx,%r13,4)
	incq	%r13
	jmp	.L46
.L54:
	incq	%rbx
	jmp	.L44
.L53:
	movq	%r14, %rdx
	movq	%r12, %rsi
	movq	%rbp, %rdi
	call	_Z6matMulPPfS0_S0_i
	movq	8(%rsp), %rax
	subq	%fs:40, %rax
	je	.L47
	call	__stack_chk_fail@PLT
.L47:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC15:
	.string	"_Z3mulPfS_S_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2056:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC15(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z3mulPfS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2056:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst16,"aM",@progbits,16
	.align 16
.LC9:
	.long	2147483647
	.long	0
	.long	0
	.long	0
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC10:
	.long	-1998362383
	.long	1055193269
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <hip/hip_runtime.h>

#include <stdio.h>
#include <stdlib.h>
#include <time.h>

__global__
void mul(float *d_A, float *d_B, float *d_C, int n);

void matMul(float **h_Mat1, float **h_Mat2, float **h_Mat3, int n);

int main()
{
    int n;
    int i, j;
    float **h_Mat1, **h_Mat2, **h_Mat3;

    printf("Enter the dimension of square matrix, n for n X n: ");
    scanf("%d", &n);

    h_Mat1 = (float **) malloc(n * sizeof(float *));
    for (i = 0; i < n; ++i)
    {
        h_Mat1[i] = (float *) malloc(n * sizeof(float));
    }

    h_Mat2 = (float **) malloc(n * sizeof(float *));
    for (i = 0; i < n; ++i)
    {
        h_Mat2[i] = (float *) malloc(n * sizeof(float));
    }

    h_Mat3 = (float **) malloc(n * sizeof(float *));
    for (i = 0; i < n; ++i)
    {
        h_Mat3[i] = (float *) malloc(n * sizeof(float));
    }

    srand(time(0));
    for (i = 0; i < n; ++i)
    {
        for (j = 0; j < n; ++j)
        {
            h_Mat1[i][j] = rand() % 1000;
            h_Mat2[i][j] = rand() % 1000;
        }
    }

    matMul(h_Mat1, h_Mat2, h_Mat3, n);

    return 0;
}

__global__
void mul(float *d_A, float *d_B, float *d_C, int n)
{
    int i, j, k;

    i = blockIdx.y * blockDim.y + threadIdx.y;
    j = blockIdx.x * blockDim.x + threadIdx.x;

    if (i >= n || j >= n)
    {
        return;
    }
    d_C[i * n + j] = 0;
    for (k = 0; k < n; ++k)
    {
        d_C[i * n + j] += d_A[i * n + k] * d_B[k * n + j];
    }

    return;
}

void matMul(float **h_Mat1, float **h_Mat2, float **h_Mat3, int n)
{
    int size = n * n * sizeof(float);
    int i, j, k;
    float *h_A, *h_B, *h_C;
    float *d_A = NULL, *d_B = NULL, *d_C = NULL;
    hipError_t err = hipSuccess;

    h_A = (float *) malloc(size);
    h_B = (float *) malloc(size);
    h_C = (float *) malloc(size);

    for (i = 0; i < n; ++i)
    {
        for (j = 0; j < n; ++j)
        {
            h_A[i * n + j] = h_Mat1[i][j];
            h_B[i * n + j] = h_Mat2[i][j];
        }
    }

    err = hipMalloc((void **) &d_A, size);
    if (err != hipSuccess)
    {
        fprintf(stderr, "Failed to allocate device vector A (error code %s)!\n", hipGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    err = hipMalloc((void **) &d_B, size);
    if (err != hipSuccess)
    {
        fprintf(stderr, "Failed to allocate device vector B (error code %s)!\n", hipGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    err = hipMalloc((void **) &d_C, size);
    if (err != hipSuccess)
    {
        fprintf(stderr, "Failed to allocate device vector C (error code %s)!\n", hipGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    err = hipMemcpy(d_A, h_A, size, hipMemcpyHostToDevice);
    if (err != hipSuccess)
    {
        fprintf(stderr, "Failed to copy vector A from host to device (error code %s)!\n", hipGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    err = hipMemcpy(d_B, h_B, size, hipMemcpyHostToDevice);
    if (err != hipSuccess)
    {
        fprintf(stderr, "Failed to copy vector B from host to device (error code %s)!\n", hipGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    printf("Launching CUDA mul kernel with (%d, %d, %d) blocks and (%d, %d, %d) threads per block.\n", (n + 15) / 16, (n + 15) / 16, 1, 16, 16, 1);
    dim3 grid((n + 15) / 16, (n + 15) / 16, 1);
    dim3 block(16, 16, 1);
    mul<<<block, grid>>>(d_A, d_B, d_C, n);
    
    err = hipGetLastError();
    if (err != hipSuccess)
    {
        fprintf(stderr, "Failed to launch mul kernel (error code %s)!\n", hipGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    err = hipMemcpy(h_C, d_C, size, hipMemcpyDeviceToHost);
    if (err != hipSuccess)
    {
        fprintf(stderr, "Failed to copy vector C from device to host (error code %s)!\n", hipGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    hipFree(d_A);
    hipFree(d_B);
    hipFree(d_C);

    for (i = 0; i < n; ++i)
    {
        for (j = 0; j < n; ++j)
        {
            h_Mat3[i][j] = 0;
            for (k = 0; k < n; ++k)
            {
                h_Mat3[i][j] += h_Mat1[i][k] * h_Mat2[k][j];
            }
            if (fabs(h_C[i * n + j] - h_Mat3[i][j]) > 1e-5)
            {
                fprintf(stderr, "Result verification failed at element (%d, %d)!\n", i, j);
                exit(EXIT_FAILURE);
            }
            h_Mat3[i][j] = h_C[i * n + j];
        }
    }
    printf("TEST PASSED\n");
    
    return;
}

	.text
	.file	"2_matrix_multiplication.hip"
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$.L.str, %edi
	xorl	%eax, %eax
	callq	printf
	leaq	12(%rsp), %rbx
	movl	$.L.str.1, %edi
	movq	%rbx, %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	movslq	(%rbx), %r13
	leaq	(,%r13,8), %r15
	movq	%r15, %rdi
	callq	malloc
	movq	%rax, %rbx
	testq	%r13, %r13
	jle	.LBB0_1
# %bb.3:                                # %.lr.ph
	movl	%r13d, %ebp
	leaq	(,%r13,4), %r12
	xorl	%r14d, %r14d
.LBB0_4:                                # =>This Inner Loop Header: Depth=1
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, (%rbx,%r14,8)
	incq	%r14
	cmpq	%r14, %rbp
	jne	.LBB0_4
# %bb.5:                                # %._crit_edge
	movq	%r15, %rdi
	callq	malloc
	movq	%rax, %r14
	testl	%ebp, %ebp
	jle	.LBB0_2
# %bb.6:                                # %.lr.ph34
	movq	%r15, 16(%rsp)                  # 8-byte Spill
	xorl	%r15d, %r15d
.LBB0_7:                                # =>This Inner Loop Header: Depth=1
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, (%r14,%r15,8)
	incq	%r15
	cmpq	%r15, %rbp
	jne	.LBB0_7
# %bb.8:                                # %._crit_edge35
	movq	16(%rsp), %rdi                  # 8-byte Reload
	callq	malloc
	movq	%rax, %r15
	testl	%ebp, %ebp
	jle	.LBB0_11
# %bb.9:                                # %.lr.ph38
	movl	%r13d, %r13d
	xorl	%ebp, %ebp
.LBB0_10:                               # =>This Inner Loop Header: Depth=1
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, (%r15,%rbp,8)
	incq	%rbp
	cmpq	%rbp, %r13
	jne	.LBB0_10
	jmp	.LBB0_11
.LBB0_1:                                # %._crit_edge.thread
	movq	%r15, %rdi
	callq	malloc
	movq	%rax, %r14
.LBB0_2:                                # %._crit_edge35.thread
	movq	%r15, %rdi
	callq	malloc
	movq	%rax, %r15
.LBB0_11:                               # %._crit_edge39
	xorl	%edi, %edi
	callq	time
	movl	%eax, %edi
	callq	srand
	movl	12(%rsp), %ecx
	testl	%ecx, %ecx
	jle	.LBB0_18
# %bb.12:                               # %.preheader.preheader
	xorl	%r12d, %r12d
.LBB0_13:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_16 Depth 2
	testl	%ecx, %ecx
	jle	.LBB0_14
# %bb.15:                               # %.lr.ph41
                                        #   in Loop: Header=BB0_13 Depth=1
	xorl	%r13d, %r13d
.LBB0_16:                               #   Parent Loop BB0_13 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	cltq
	imulq	$274877907, %rax, %rcx          # imm = 0x10624DD3
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$38, %rcx
	addl	%edx, %ecx
	imull	$1000, %ecx, %ecx               # imm = 0x3E8
	subl	%ecx, %eax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movq	(%rbx,%r12,8), %rax
	movss	%xmm0, (%rax,%r13,4)
	callq	rand
	cltq
	imulq	$274877907, %rax, %rcx          # imm = 0x10624DD3
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$38, %rcx
	addl	%edx, %ecx
	imull	$1000, %ecx, %ecx               # imm = 0x3E8
	subl	%ecx, %eax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movq	(%r14,%r12,8), %rax
	movss	%xmm0, (%rax,%r13,4)
	incq	%r13
	movl	12(%rsp), %ecx
	movslq	%ecx, %rax
	cmpq	%rax, %r13
	jl	.LBB0_16
	jmp	.LBB0_17
.LBB0_14:                               # %.preheader.._crit_edge42_crit_edge
                                        #   in Loop: Header=BB0_13 Depth=1
	movslq	%ecx, %rax
.LBB0_17:                               # %._crit_edge42
                                        #   in Loop: Header=BB0_13 Depth=1
	incq	%r12
	cmpq	%rax, %r12
	jl	.LBB0_13
.LBB0_18:                               # %._crit_edge44
	movq	%rbx, %rdi
	movq	%r14, %rsi
	movq	%r15, %rdx
	callq	_Z6matMulPPfS0_S0_i
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	main, .Lfunc_end0-main
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function _Z6matMulPPfS0_S0_i
.LCPI1_0:
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI1_1:
	.quad	0x3ee4f8b588e368f1              # double 1.0000000000000001E-5
	.text
	.globl	_Z6matMulPPfS0_S0_i
	.type	_Z6matMulPPfS0_S0_i,@function
_Z6matMulPPfS0_S0_i:                    # @_Z6matMulPPfS0_S0_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%ecx, %ebx
	movq	%rdx, 56(%rsp)                  # 8-byte Spill
	movq	%rsi, %r15
	movq	%rdi, 40(%rsp)                  # 8-byte Spill
	movl	%ecx, %eax
	imull	%ecx, %eax
	shll	$2, %eax
	xorl	%r12d, %r12d
	movq	%r12, 32(%rsp)
	movq	%r12, 24(%rsp)
	movq	%r12, 16(%rsp)
	movslq	%eax, %r13
	movq	%r13, %rdi
	callq	malloc
	movq	%rax, %r14
	movq	%r13, %rdi
	callq	malloc
	movq	%rax, %rbp
	movq	%r13, 48(%rsp)                  # 8-byte Spill
	movq	%r13, %rdi
	callq	malloc
	movq	40(%rsp), %r9                   # 8-byte Reload
	movq	%rax, 64(%rsp)                  # 8-byte Spill
	movl	%ebx, %r13d
	testl	%ebx, %ebx
	jle	.LBB1_5
# %bb.1:                                # %.preheader115.lr.ph
	xorl	%eax, %eax
.LBB1_2:                                # %.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_3 Depth 2
	movl	%r12d, %edx
	leaq	(,%rdx,4), %rcx
	addq	%rbp, %rcx
	leaq	(%r14,%rdx,4), %rdx
	movq	(%r9,%rax,8), %rsi
	movq	(%r15,%rax,8), %rdi
	xorl	%r8d, %r8d
.LBB1_3:                                #   Parent Loop BB1_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	(%rsi,%r8,4), %xmm0             # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, (%rdx,%r8,4)
	movss	(%rdi,%r8,4), %xmm0             # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, (%rcx,%r8,4)
	incq	%r8
	cmpq	%r8, %r13
	jne	.LBB1_3
# %bb.4:                                # %._crit_edge
                                        #   in Loop: Header=BB1_2 Depth=1
	incq	%rax
	addl	%ebx, %r12d
	cmpq	%r13, %rax
	jne	.LBB1_2
.LBB1_5:                                # %._crit_edge120
	leaq	32(%rsp), %rdi
	movq	48(%rsp), %r12                  # 8-byte Reload
	movq	%r12, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_24
# %bb.6:
	leaq	24(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_25
# %bb.7:
	leaq	16(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_26
# %bb.8:
	movq	32(%rsp), %rdi
	movq	%r14, %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_27
# %bb.9:
	movq	24(%rsp), %rdi
	movq	%rbp, %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_28
# %bb.10:
	leal	15(%rbx), %eax
	leal	30(%rbx), %r14d
	testl	%eax, %eax
	cmovnsl	%eax, %r14d
	sarl	$4, %r14d
	movl	$1, (%rsp)
	movl	$.L.str.7, %edi
	movl	%r14d, %esi
	movl	%r14d, %edx
	movl	$1, %ecx
	movl	$16, %r8d
	movl	$16, %r9d
	xorl	%eax, %eax
	callq	printf
	movq	%r14, %rdx
	shlq	$32, %rdx
	orq	%r14, %rdx
	movabsq	$68719476752, %rdi              # imm = 0x1000000010
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_12
# %bb.11:
	movq	32(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdx
	movl	%ebx, %ecx
	callq	_Z18__device_stub__mulPfS_S_i
.LBB1_12:
	callq	hipGetLastError
	testl	%eax, %eax
	movq	64(%rsp), %r14                  # 8-byte Reload
	jne	.LBB1_29
# %bb.13:
	movq	16(%rsp), %rsi
	movq	%r14, %rdi
	movq	48(%rsp), %rdx                  # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_30
# %bb.14:
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	testl	%ebx, %ebx
	movq	56(%rsp), %r10                  # 8-byte Reload
	movq	40(%rsp), %r12                  # 8-byte Reload
	jle	.LBB1_22
# %bb.15:                               # %.preheader.lr.ph
	xorl	%edx, %edx
	movaps	.LCPI1_0(%rip), %xmm0           # xmm0 = [NaN,NaN,NaN,NaN]
	movsd	.LCPI1_1(%rip), %xmm1           # xmm1 = mem[0],zero
.LBB1_16:                               # %.lr.ph126
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_17 Depth 2
                                        #       Child Loop BB1_18 Depth 3
	movq	(%r10,%rdx,8), %rax
	movl	%edx, %ecx
	imull	%ebx, %ecx
	movq	(%r12,%rdx,8), %rsi
	leaq	(%r14,%rcx,4), %rdi
	xorl	%ecx, %ecx
.LBB1_17:                               # %.lr.ph123
                                        #   Parent Loop BB1_16 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB1_18 Depth 3
	movl	$0, (%rax,%rcx,4)
	xorps	%xmm2, %xmm2
	xorl	%r8d, %r8d
.LBB1_18:                               #   Parent Loop BB1_16 Depth=1
                                        #     Parent Loop BB1_17 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movss	(%rsi,%r8,4), %xmm3             # xmm3 = mem[0],zero,zero,zero
	movq	(%r15,%r8,8), %r9
	mulss	(%r9,%rcx,4), %xmm3
	addss	%xmm3, %xmm2
	movss	%xmm2, (%rax,%rcx,4)
	incq	%r8
	cmpq	%r8, %r13
	jne	.LBB1_18
# %bb.19:                               # %._crit_edge124
                                        #   in Loop: Header=BB1_17 Depth=2
	movss	(%rdi,%rcx,4), %xmm3            # xmm3 = mem[0],zero,zero,zero
	movaps	%xmm3, %xmm4
	subss	%xmm2, %xmm4
	andps	%xmm0, %xmm4
	xorps	%xmm2, %xmm2
	cvtss2sd	%xmm4, %xmm2
	ucomisd	%xmm1, %xmm2
	ja	.LBB1_23
# %bb.20:                               #   in Loop: Header=BB1_17 Depth=2
	movss	%xmm3, (%rax,%rcx,4)
	incq	%rcx
	cmpq	%r13, %rcx
	jne	.LBB1_17
# %bb.21:                               # %._crit_edge127
                                        #   in Loop: Header=BB1_16 Depth=1
	incq	%rdx
	cmpq	%r13, %rdx
	jne	.LBB1_16
.LBB1_22:                               # %._crit_edge129
	movl	$.Lstr, %edi
	callq	puts@PLT
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB1_23:
	.cfi_def_cfa_offset 128
	movq	stderr(%rip), %rdi
	movl	$.L.str.10, %esi
                                        # kill: def $edx killed $edx killed $rdx
                                        # kill: def $ecx killed $ecx killed $rcx
	xorl	%eax, %eax
	callq	fprintf
.LBB1_32:
	movl	$1, %edi
	callq	exit
.LBB1_24:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %esi
	jmp	.LBB1_31
.LBB1_25:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.3, %esi
	jmp	.LBB1_31
.LBB1_26:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.4, %esi
	jmp	.LBB1_31
.LBB1_27:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.5, %esi
	jmp	.LBB1_31
.LBB1_28:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %esi
	jmp	.LBB1_31
.LBB1_29:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.8, %esi
	jmp	.LBB1_31
.LBB1_30:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.9, %esi
.LBB1_31:
	movq	%rbx, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB1_32
.Lfunc_end1:
	.size	_Z6matMulPPfS0_S0_i, .Lfunc_end1-_Z6matMulPPfS0_S0_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z18__device_stub__mulPfS_S_i   # -- Begin function _Z18__device_stub__mulPfS_S_i
	.type	_Z18__device_stub__mulPfS_S_i,@function
_Z18__device_stub__mulPfS_S_i:          # @_Z18__device_stub__mulPfS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z3mulPfS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z18__device_stub__mulPfS_S_i, .Lfunc_end2-_Z18__device_stub__mulPfS_S_i
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z3mulPfS_S_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Enter the dimension of square matrix, n for n X n: "
	.size	.L.str, 52

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"%d"
	.size	.L.str.1, 3

	.type	_Z3mulPfS_S_i,@object           # @_Z3mulPfS_S_i
	.section	.rodata,"a",@progbits
	.globl	_Z3mulPfS_S_i
	.p2align	3, 0x0
_Z3mulPfS_S_i:
	.quad	_Z18__device_stub__mulPfS_S_i
	.size	_Z3mulPfS_S_i, 8

	.type	.L.str.2,@object                # @.str.2
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.2:
	.asciz	"Failed to allocate device vector A (error code %s)!\n"
	.size	.L.str.2, 53

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Failed to allocate device vector B (error code %s)!\n"
	.size	.L.str.3, 53

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Failed to allocate device vector C (error code %s)!\n"
	.size	.L.str.4, 53

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Failed to copy vector A from host to device (error code %s)!\n"
	.size	.L.str.5, 62

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Failed to copy vector B from host to device (error code %s)!\n"
	.size	.L.str.6, 62

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"Launching CUDA mul kernel with (%d, %d, %d) blocks and (%d, %d, %d) threads per block.\n"
	.size	.L.str.7, 88

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"Failed to launch mul kernel (error code %s)!\n"
	.size	.L.str.8, 46

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"Failed to copy vector C from device to host (error code %s)!\n"
	.size	.L.str.9, 62

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"Result verification failed at element (%d, %d)!\n"
	.size	.L.str.10, 49

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z3mulPfS_S_i"
	.size	.L__unnamed_1, 14

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"TEST PASSED"
	.size	.Lstr, 12

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z18__device_stub__mulPfS_S_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z3mulPfS_S_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z3mulPfS_S_i           ; -- Begin function _Z3mulPfS_S_i
	.globl	_Z3mulPfS_S_i
	.p2align	8
	.type	_Z3mulPfS_S_i,@function
_Z3mulPfS_S_i:                          ; @_Z3mulPfS_S_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s4, s[0:1], 0x18
	v_bfe_u32 v1, v0, 10, 10
	v_and_b32_e32 v4, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	v_mad_u64_u32 v[2:3], null, s15, s3, v[1:2]
	v_mad_u64_u32 v[0:1], null, s14, s2, v[4:5]
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_i32_e32 v1, v2, v0
	v_cmpx_gt_i32_e64 s4, v1
	s_cbranch_execz .LBB0_4
; %bb.1:
	v_mul_lo_u32 v4, v2, s4
	s_load_b64 s[2:3], s[0:1], 0x10
	s_cmp_lt_i32 s4, 1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v6, 0 :: v_dual_add_nc_u32 v1, v4, v0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s2, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	global_store_b32 v[2:3], v6, off
	s_cbranch_scc1 .LBB0_4
; %bb.2:                                ; %.lr.ph.preheader
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v4, vcc_lo, s0, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
	s_mov_b32 s0, s4
.LBB0_3:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v1, 31, v0
	s_add_i32 s0, s0, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s0, 0
	v_lshlrev_b64 v[7:8], 2, v[0:1]
	v_add_nc_u32_e32 v0, s4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v7, vcc_lo, s2, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s3, v8, vcc_lo
	global_load_b32 v1, v[4:5], off
	global_load_b32 v7, v[7:8], off
	v_add_co_u32 v4, vcc_lo, v4, 4
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v6, v1, v7
	global_store_b32 v[2:3], v6, off
	s_cbranch_scc1 .LBB0_3
.LBB0_4:                                ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z3mulPfS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z3mulPfS_S_i, .Lfunc_end0-_Z3mulPfS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 324
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z3mulPfS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z3mulPfS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
