#include <stdio.h>
#include <sys/time.h>

//////////////////////////////////////////////////////
//	Simple vector addition in CUDA
//////////////////////////////////////////////////////

#define N 1024*1024 //Number of elements in the vector

// Definition of the kernel that will be executed by all threads on the GPU
__global__ void add(float *a, float *b, float *c, int n){
	int id = (blockDim.x * blockIdx.x)*n + threadIdx.x*n;

	for (int i = id; i < id+n; i++)
	{
		c[i] = a[i] + b[i];
	}
}

int main(void) {

	float *A, *B, *C;
	float *d_A, *d_B, *d_C;
	int size = N * sizeof(float);
	int numBlocks, numThreadsPerBlock;
	struct timeval copy_start, copy_end, process_start, process_end;
	int t_copy, t_process;
	
	// Memory allocation on the HOST
	A = (float*)malloc(size);
	B = (float*)malloc(size);
	C = (float*)malloc(size);

	// Initial values
	for (int i=0; i<N; i++)
	{
		A[i] = i+1;
		B[i] = (i+1)*2;
	}
	

	//Memory allocation on the GPU
	cudaMalloc((void**)&d_A, size); 
	cudaMalloc((void**)&d_B, size); 
	cudaMalloc((void**)&d_C, size); 

	//Copy data from HOST to GPU
	gettimeofday(&copy_start, NULL);
	cudaMemcpy(d_A, A, size, cudaMemcpyHostToDevice);
	cudaMemcpy(d_B, B, size, cudaMemcpyHostToDevice);
	gettimeofday(&copy_end, NULL);

	// Number of threads and blocks used to compute the kernel
	numThreadsPerBlock = 1024;
	numBlocks = 256;
	
	//Executing kernel function
	gettimeofday(&process_start, NULL);
	add<<<numBlocks,numThreadsPerBlock>>>(d_A,d_B,d_C,N/(numBlocks*numThreadsPerBlock));
	gettimeofday(&process_end, NULL);

	//Copy result from GPU to HOST
	cudaMemcpy(C, d_C, size, cudaMemcpyDeviceToHost);
	
	//Compute process and copy time
	t_copy = (copy_end.tv_sec - copy_start.tv_sec)*1000000 + copy_end.tv_usec - copy_start.tv_usec;
	t_process = (process_end.tv_sec - process_start.tv_sec)*1000000 + process_end.tv_usec - process_start.tv_usec;

	//Display results
	printf("\n#########################\n");
	printf("Calculation results\n");
	printf("#########################\n");
	printf("Vector A : [%f,%f, ...,%f] \n",A[0],A[1],A[N-1]);
	printf("Vector B : [%f,%f, ...,%f] \n",B[0],B[1],B[N-1]);
	printf("Vector C (result A+B) : [%f,%f, ...,%f] \n",C[0],C[1],C[N-1]);
	
	printf("\n#########################\n");
	printf("Performance results\n");
	printf("#########################\n");
	printf("Copy HOST to GPU time : %d uS\n", t_copy);
	printf("Kernel process time : %d uS\n", t_process);
	cudaFree(d_A);
	cudaFree(d_B);
	cudaFree(d_C);

	free(A);
	free(B);
	free(C);

	return 0;

}

	.file	"tmpxft_0026a4bf_00000000-6_addition_cudacopy.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z27__device_stub__Z3addPfS_S_iPfS_S_i
	.type	_Z27__device_stub__Z3addPfS_S_iPfS_S_i, @function
_Z27__device_stub__Z3addPfS_S_iPfS_S_i:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z3addPfS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z27__device_stub__Z3addPfS_S_iPfS_S_i, .-_Z27__device_stub__Z3addPfS_S_iPfS_S_i
	.globl	_Z3addPfS_S_i
	.type	_Z3addPfS_S_i, @function
_Z3addPfS_S_i:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z27__device_stub__Z3addPfS_S_iPfS_S_i
	.cfi_endproc
.LFE2053:
	.size	_Z3addPfS_S_i, .-_Z3addPfS_S_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"\n#########################\n"
.LC1:
	.string	"Calculation results\n"
.LC2:
	.string	"#########################\n"
.LC3:
	.string	"Vector A : [%f,%f, ...,%f] \n"
.LC4:
	.string	"Vector B : [%f,%f, ...,%f] \n"
.LC5:
	.string	"Vector C (result A+B) : [%f,%f, ...,%f] \n"
.LC6:
	.string	"Performance results\n"
.LC7:
	.string	"Copy HOST to GPU time : %d uS\n"
.LC8:
	.string	"Kernel process time : %d uS\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$4194304, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$136, %rsp
	.cfi_def_cfa_offset 192
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movl	$4194304, %edi
	movq	%rax, %r12
	call	malloc@PLT
	movl	$4194304, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	movq	%rax, %r13
	movl	$1, %eax
.L9:
	cvtsi2ssl	%eax, %xmm0
	leal	(%rax,%rax), %edx
	movss	%xmm0, -4(%r12,%rax,4)
	cvtsi2ssl	%edx, %xmm0
	movss	%xmm0, -4(%rbp,%rax,4)
	incq	%rax
	cmpq	$1048577, %rax
	jne	.L9
	leaq	16(%rsp), %rdi
	movl	$4194304, %esi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$4194304, %esi
	call	cudaMalloc@PLT
	leaq	32(%rsp), %rdi
	movl	$4194304, %esi
	call	cudaMalloc@PLT
	xorl	%esi, %esi
	leaq	56(%rsp), %rdi
	call	gettimeofday@PLT
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$4194304, %edx
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$4194304, %edx
	call	cudaMemcpy@PLT
	xorl	%esi, %esi
	leaq	72(%rsp), %rdi
	call	gettimeofday@PLT
	xorl	%esi, %esi
	leaq	88(%rsp), %rdi
	call	gettimeofday@PLT
	movl	$4194305, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$16777217, %edi
	salq	$10, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	salq	$8, %rdi
	movq	%rdx, 104(%rsp)
	movl	$1, 112(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L10
	movq	32(%rsp), %rdx
	movq	24(%rsp), %rsi
	movl	$4, %ecx
	movq	16(%rsp), %rdi
	call	_Z27__device_stub__Z3addPfS_S_iPfS_S_i
.L10:
	xorl	%esi, %esi
	leaq	104(%rsp), %rdi
	leaq	.LC0(%rip), %r15
	call	gettimeofday@PLT
	movq	32(%rsp), %rsi
	movl	$2, %ecx
	movq	%r13, %rdi
	movl	$4194304, %edx
	leaq	.LC2(%rip), %r14
	call	cudaMemcpy@PLT
	movq	72(%rsp), %rdx
	movq	%r15, %rsi
	xorl	%eax, %eax
	subq	56(%rsp), %rdx
	movq	104(%rsp), %rbx
	movl	$2, %edi
	subq	88(%rsp), %rbx
	imull	$1000000, %edx, %edx
	subl	64(%rsp), %edx
	addl	80(%rsp), %edx
	imull	$1000000, %ebx, %ebx
	subl	96(%rsp), %ebx
	movl	%edx, 12(%rsp)
	addl	112(%rsp), %ebx
	call	__printf_chk@PLT
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%r14, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	movb	$3, %al
	cvtss2sd	(%r12), %xmm0
	cvtss2sd	4(%r12), %xmm1
	cvtss2sd	4194300(%r12), %xmm2
	call	__printf_chk@PLT
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	movb	$3, %al
	cvtss2sd	0(%rbp), %xmm0
	cvtss2sd	4194300(%rbp), %xmm2
	cvtss2sd	4(%rbp), %xmm1
	call	__printf_chk@PLT
	movb	$3, %al
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	cvtss2sd	0(%r13), %xmm0
	cvtss2sd	4194300(%r13), %xmm2
	cvtss2sd	4(%r13), %xmm1
	call	__printf_chk@PLT
	movq	%r15, %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%r14, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	12(%rsp), %edx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC7(%rip), %rsi
	call	__printf_chk@PLT
	movl	%ebx, %edx
	leaq	.LC8(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	%r13, %rdi
	call	free@PLT
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L11
	call	__stack_chk_fail@PLT
.L11:
	addq	$136, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC9:
	.string	"_Z3addPfS_S_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC9(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z3addPfS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <sys/time.h>

//////////////////////////////////////////////////////
//	Simple vector addition in CUDA
//////////////////////////////////////////////////////

#define N 1024*1024 //Number of elements in the vector

// Definition of the kernel that will be executed by all threads on the GPU
__global__ void add(float *a, float *b, float *c, int n){
	int id = (blockDim.x * blockIdx.x)*n + threadIdx.x*n;

	for (int i = id; i < id+n; i++)
	{
		c[i] = a[i] + b[i];
	}
}

int main(void) {

	float *A, *B, *C;
	float *d_A, *d_B, *d_C;
	int size = N * sizeof(float);
	int numBlocks, numThreadsPerBlock;
	struct timeval copy_start, copy_end, process_start, process_end;
	int t_copy, t_process;
	
	// Memory allocation on the HOST
	A = (float*)malloc(size);
	B = (float*)malloc(size);
	C = (float*)malloc(size);

	// Initial values
	for (int i=0; i<N; i++)
	{
		A[i] = i+1;
		B[i] = (i+1)*2;
	}
	

	//Memory allocation on the GPU
	hipMalloc((void**)&d_A, size); 
	hipMalloc((void**)&d_B, size); 
	hipMalloc((void**)&d_C, size); 

	//Copy data from HOST to GPU
	gettimeofday(&copy_start, NULL);
	hipMemcpy(d_A, A, size, hipMemcpyHostToDevice);
	hipMemcpy(d_B, B, size, hipMemcpyHostToDevice);
	gettimeofday(&copy_end, NULL);

	// Number of threads and blocks used to compute the kernel
	numThreadsPerBlock = 1024;
	numBlocks = 256;
	
	//Executing kernel function
	gettimeofday(&process_start, NULL);
	add<<<numBlocks,numThreadsPerBlock>>>(d_A,d_B,d_C,N/(numBlocks*numThreadsPerBlock));
	gettimeofday(&process_end, NULL);

	//Copy result from GPU to HOST
	hipMemcpy(C, d_C, size, hipMemcpyDeviceToHost);
	
	//Compute process and copy time
	t_copy = (copy_end.tv_sec - copy_start.tv_sec)*1000000 + copy_end.tv_usec - copy_start.tv_usec;
	t_process = (process_end.tv_sec - process_start.tv_sec)*1000000 + process_end.tv_usec - process_start.tv_usec;

	//Display results
	printf("\n#########################\n");
	printf("Calculation results\n");
	printf("#########################\n");
	printf("Vector A : [%f,%f, ...,%f] \n",A[0],A[1],A[N-1]);
	printf("Vector B : [%f,%f, ...,%f] \n",B[0],B[1],B[N-1]);
	printf("Vector C (result A+B) : [%f,%f, ...,%f] \n",C[0],C[1],C[N-1]);
	
	printf("\n#########################\n");
	printf("Performance results\n");
	printf("#########################\n");
	printf("Copy HOST to GPU time : %d uS\n", t_copy);
	printf("Kernel process time : %d uS\n", t_process);
	hipFree(d_A);
	hipFree(d_B);
	hipFree(d_C);

	free(A);
	free(B);
	free(C);

	return 0;

}

	.text
	.file	"addition_cudacopy.hip"
	.globl	_Z18__device_stub__addPfS_S_i   # -- Begin function _Z18__device_stub__addPfS_S_i
	.type	_Z18__device_stub__addPfS_S_i,@function
_Z18__device_stub__addPfS_S_i:          # @_Z18__device_stub__addPfS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z3addPfS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z18__device_stub__addPfS_S_i, .Lfunc_end0-_Z18__device_stub__addPfS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$4194304, %edi                  # imm = 0x400000
	callq	malloc
	movq	%rax, %rbx
	movl	$4194304, %edi                  # imm = 0x400000
	callq	malloc
	movq	%rax, %r14
	movl	$4194304, %edi                  # imm = 0x400000
	callq	malloc
	movq	%rax, %r15
	movl	$2, %eax
	xorl	%ecx, %ecx
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	leaq	1(%rcx), %rdx
	xorps	%xmm0, %xmm0
	cvtsi2ss	%edx, %xmm0
	movss	%xmm0, (%rbx,%rcx,4)
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	%xmm0, (%r14,%rcx,4)
	addl	$2, %eax
	movq	%rdx, %rcx
	cmpq	$1048576, %rdx                  # imm = 0x100000
	jne	.LBB1_1
# %bb.2:
	leaq	16(%rsp), %r13
	movl	$4194304, %esi                  # imm = 0x400000
	movq	%r13, %rdi
	callq	hipMalloc
	leaq	8(%rsp), %r12
	movl	$4194304, %esi                  # imm = 0x400000
	movq	%r12, %rdi
	callq	hipMalloc
	movq	%rsp, %rdi
	movl	$4194304, %esi                  # imm = 0x400000
	callq	hipMalloc
	leaq	56(%rsp), %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	(%r13), %rdi
	movl	$4194304, %edx                  # imm = 0x400000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r12), %rdi
	movl	$4194304, %edx                  # imm = 0x400000
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	40(%rsp), %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	leaq	24(%rsp), %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movabsq	$4294967552, %rdi               # imm = 0x100000100
	leaq	768(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_4
# %bb.3:
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdx
	movl	$4, %ecx
	callq	_Z18__device_stub__addPfS_S_i
.LBB1_4:
	leaq	72(%rsp), %r13
	movq	%r13, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	(%rsp), %rsi
	movl	$4194304, %edx                  # imm = 0x400000
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	40(%rsp), %eax
	subl	56(%rsp), %eax
	imull	$1000000, %eax, %ebp            # imm = 0xF4240
	addl	48(%rsp), %ebp
	subl	64(%rsp), %ebp
	movl	(%r13), %eax
	subl	24(%rsp), %eax
	imull	$1000000, %eax, %r12d           # imm = 0xF4240
	addl	8(%r13), %r12d
	subl	32(%rsp), %r12d
	movl	$.Lstr.3, %edi
	callq	puts@PLT
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	movl	$.Lstr.5, %edi
	callq	puts@PLT
	cvtss2sd	(%rbx), %xmm0
	cvtss2sd	4(%rbx), %xmm1
	cvtss2sd	4194300(%rbx), %xmm2
	movl	$.L.str.3, %edi
	movb	$3, %al
	callq	printf
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r14), %xmm0
	xorps	%xmm1, %xmm1
	cvtss2sd	4(%r14), %xmm1
	xorps	%xmm2, %xmm2
	cvtss2sd	4194300(%r14), %xmm2
	movl	$.L.str.4, %edi
	movb	$3, %al
	callq	printf
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r15), %xmm0
	xorps	%xmm1, %xmm1
	cvtss2sd	4(%r15), %xmm1
	xorps	%xmm2, %xmm2
	cvtss2sd	4194300(%r15), %xmm2
	movl	$.L.str.5, %edi
	movb	$3, %al
	callq	printf
	movl	$.Lstr.3, %edi
	callq	puts@PLT
	movl	$.Lstr.4, %edi
	callq	puts@PLT
	movl	$.Lstr.5, %edi
	callq	puts@PLT
	movl	$.L.str.7, %edi
	movl	%ebp, %esi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.8, %edi
	movl	%r12d, %esi
	xorl	%eax, %eax
	callq	printf
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	xorl	%eax, %eax
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z3addPfS_S_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z3addPfS_S_i,@object           # @_Z3addPfS_S_i
	.section	.rodata,"a",@progbits
	.globl	_Z3addPfS_S_i
	.p2align	3, 0x0
_Z3addPfS_S_i:
	.quad	_Z18__device_stub__addPfS_S_i
	.size	_Z3addPfS_S_i, 8

	.type	.L.str.3,@object                # @.str.3
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.3:
	.asciz	"Vector A : [%f,%f, ...,%f] \n"
	.size	.L.str.3, 29

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Vector B : [%f,%f, ...,%f] \n"
	.size	.L.str.4, 29

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Vector C (result A+B) : [%f,%f, ...,%f] \n"
	.size	.L.str.5, 42

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"Copy HOST to GPU time : %d uS\n"
	.size	.L.str.7, 31

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"Kernel process time : %d uS\n"
	.size	.L.str.8, 29

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z3addPfS_S_i"
	.size	.L__unnamed_1, 14

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr.1,@object                 # @str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr.1:
	.asciz	"Calculation results"
	.size	.Lstr.1, 20

	.type	.Lstr.3,@object                 # @str.3
.Lstr.3:
	.asciz	"\n#########################"
	.size	.Lstr.3, 27

	.type	.Lstr.4,@object                 # @str.4
.Lstr.4:
	.asciz	"Performance results"
	.size	.Lstr.4, 20

	.type	.Lstr.5,@object                 # @str.5
.Lstr.5:
	.asciz	"#########################"
	.size	.Lstr.5, 26

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z18__device_stub__addPfS_S_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z3addPfS_S_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z3addPfS_S_i           ; -- Begin function _Z3addPfS_S_i
	.globl	_Z3addPfS_S_i
	.p2align	8
	.type	_Z3addPfS_S_i,@function
_Z3addPfS_S_i:                          ; @_Z3addPfS_S_i
; %bb.0:
	s_load_b32 s2, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s2, 1
	s_cbranch_scc1 .LBB0_3
; %bb.1:                                ; %.lr.ph.preheader
	s_clause 0x2
	s_load_b32 s3, s[0:1], 0x2c
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s3, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s3, v[0:1]
	v_mul_lo_u32 v0, v1, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v1, 31, v0
	v_add_nc_u32_e32 v7, s2, v0
	v_lshlrev_b64 v[5:6], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s4, v5
	v_add_co_ci_u32_e32 v2, vcc_lo, s5, v6, vcc_lo
	v_add_co_u32 v3, vcc_lo, s6, v5
	v_add_co_ci_u32_e32 v4, vcc_lo, s7, v6, vcc_lo
	v_add_co_u32 v5, vcc_lo, s0, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s1, v6, vcc_lo
	s_mov_b32 s1, 0
.LBB0_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	global_load_b32 v8, v[1:2], off
	global_load_b32 v9, v[3:4], off
	v_add_co_u32 v1, vcc_lo, v1, 4
	v_add_nc_u32_e32 v0, 1, v0
	v_add_co_ci_u32_e32 v2, vcc_lo, 0, v2, vcc_lo
	v_add_co_u32 v3, vcc_lo, v3, 4
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_cmp_ge_i32_e32 vcc_lo, v0, v7
	s_or_b32 s1, vcc_lo, s1
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v8, v8, v9
	global_store_b32 v[5:6], v8, off
	v_add_co_u32 v5, s0, v5, 4
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v6, s0, 0, v6, s0
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB0_2
.LBB0_3:                                ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z3addPfS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z3addPfS_S_i, .Lfunc_end0-_Z3addPfS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 256
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z3addPfS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z3addPfS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
