#include <stdio.h>
#include <stdlib.h>
#include <iostream>


#define KERNEL_LOOP 4096 // Used to exacerbate runtime affects 
#define NUM_ELEMENTS 4096
#define MAX_THREADS_PER_BLOCK 1024
__constant__ unsigned int const_data_gpu[NUM_ELEMENTS];
static unsigned int const_data_host[NUM_ELEMENTS];

__device__ void manipulate_shared_data(unsigned int * const data,
																		 	  unsigned int * const s_data,
																				const unsigned int tid)
{	
	// Load data into shared memory while doing an operation at the same time
	unsigned int i = gridDim.x*(blockDim.x)/2;
	if(tid < i){
		s_data[tid] = data[tid] + data[tid+i];
	}
	__syncthreads();
	

	// Add up data through reduction
	// Divides the probelm in half, but half the threads are also idle.
	// I know this isn't the fastest way through, but it's a start
	// Then d
	for (unsigned int s=gridDim.x*blockDim.x/4; s>32; s>>=1) {
		if (tid < s) {
				s_data[tid] += s_data[tid + s];
		}
		__syncthreads();
	}

	// Unwrap last loop
	if (tid < 32) {
		s_data[tid] += s_data[tid+32];
		s_data[tid] += s_data[tid+16];
		s_data[tid] += s_data[tid+8];
		s_data[tid] += s_data[tid+4];
		s_data[tid] += s_data[tid+2];
		s_data[tid] += s_data[tid+1];
	}
	__syncthreads();
}

__device__ void manipulate_constant_data(unsigned int * const data,
																				const unsigned int tid)
{	
	// Load data into shared memory while doing an operation at the same time
	unsigned int i = gridDim.x*(blockDim.x)/2;
	if(tid < i){
		data[tid] = const_data_gpu[tid] + const_data_gpu[tid+i];
	}
	__syncthreads();
	

	// Add up data through reduction
	// Divides the probelm in half, but half the threads are also idle.
	// I know this isn't the fastest way through, but it's a start
	// Then d
	for (unsigned int s=gridDim.x*blockDim.x/4; s>32; s>>=1) {
		if (tid < s) {
				data[tid] += const_data_gpu[tid + s];
		}
		__syncthreads();
	}

	// Unwrap last loop
	if (tid < 32) {
		data[tid] += const_data_gpu[tid+32];
		data[tid] += const_data_gpu[tid+16];
		data[tid] += const_data_gpu[tid+8];
		data[tid] += const_data_gpu[tid+4];
		data[tid] += const_data_gpu[tid+2];
		data[tid] += const_data_gpu[tid+1];
	}
	__syncthreads();
}

__device__ void copy_data(const unsigned int * const src,
								unsigned int * const dst,
								const unsigned int num_elements,
								const unsigned int tid)
{
	if(tid < num_elements) {
		dst[tid] = src[tid];
	}
	__syncthreads();
}

__global__ void gpu_kernel(unsigned int * data, const unsigned int num_elements)
{
	const unsigned int thread_idx = (blockIdx.x * blockDim.x) + threadIdx.x;
	__shared__ unsigned int shared[NUM_ELEMENTS];

	manipulate_shared_data(data, shared, thread_idx);

	copy_data(shared, data, num_elements, thread_idx);
}

__global__ void gpu_kernel_constants(unsigned int * data, const unsigned int num_elements)
{
	const unsigned int thread_idx = (blockIdx.x * blockDim.x) + threadIdx.x;
	manipulate_constant_data(data, thread_idx);
}


__host__ void generate_rand_data(unsigned int * host_data_ptr)
{
	for(unsigned int i=0; i < NUM_ELEMENTS; i++)
	{
  	host_data_ptr[i] = (unsigned int) rand();
	}
}

__host__ void generate_sequetial_data(unsigned int * data) {
	for(unsigned int i=0; i < NUM_ELEMENTS; i++)
	{
  	data[i] = i;
	}
}

__host__ void start_measure(cudaEvent_t * start, cudaEvent_t *stop){
        cudaEventCreate(start,0);
        cudaEventCreate(stop,0);
        cudaEventRecord(*start, 0);
}

__host__ void stop_measure(cudaEvent_t* start, cudaEvent_t * stop, float &time) {
        cudaEventRecord(*stop, 0);
        cudaEventSynchronize(*stop);
        cudaEventElapsedTime(&time, *start, *stop);
}

// Create display function to ensure output is the same for both kernels
__host__ void display_data(const unsigned int * const in_data,
													 const unsigned int * const out_data,
													 const unsigned int num_iter) {
        for(int i = 0; i < num_iter; i ++){
                printf("i=%i, input_data = %u, output_data = %u\n", i, in_data[i], out_data[i]);
        }
}

int main ( int argc, char *argv[] )
{
  const unsigned int num_elements = NUM_ELEMENTS;
  const unsigned int num_threads = MAX_THREADS_PER_BLOCK;
  const unsigned int num_blocks = num_elements/num_threads;
  const unsigned int num_bytes = num_elements * sizeof(unsigned int);
  const unsigned int kernel_loop = KERNEL_LOOP;

  // Prep Host data
  unsigned int * host_pinned;
  unsigned int * host_pinned_final;
  cudaMallocHost((void**)&host_pinned, num_bytes);
  cudaMallocHost((void**)&host_pinned_final, num_bytes);
  generate_rand_data(const_data_host);
  generate_sequetial_data(host_pinned);

  // Prep Device data
  unsigned int * data_gpu;
  cudaMalloc(&data_gpu, num_bytes);

  // Define measurement 
  float time;
  cudaEvent_t kernel_start, kernel_stop;
  cudaEvent_t kernel_start1, kernel_stop1;

	// Copy new data to be manipulated
	cudaMemcpyToSymbol(const_data_gpu, const_data_host, num_bytes, 0, cudaMemcpyHostToDevice);
  cudaThreadSynchronize();
	start_measure(&kernel_start1, &kernel_stop1);
	cudaMemcpy(data_gpu, host_pinned, num_bytes, cudaMemcpyHostToDevice);
  // run gpu kernel
	gpu_kernel_constants <<<num_blocks, num_threads>>>(data_gpu, num_elements);
	/* Copy back the gpu results to the CPU */
	cudaMemcpy(host_pinned_final, data_gpu, num_bytes, cudaMemcpyDeviceToHost);	
	stop_measure(&kernel_start1, &kernel_stop1, time);
	std::cout << "Constant memory kernel took " << time << std::endl;

	display_data(const_data_host, host_pinned_final, 5);

	/* Allocate arrays on the GPU */
	cudaThreadSynchronize();
	start_measure(&kernel_start, &kernel_stop);
	cudaMemcpy(data_gpu, host_pinned, num_bytes, cudaMemcpyHostToDevice);
	// run gpu kernel
	gpu_kernel <<<num_blocks, num_threads>>>(data_gpu, num_elements);
	/* Copy back the gpu results to the CPU */
	cudaMemcpy(host_pinned_final, data_gpu, num_bytes, cudaMemcpyDeviceToHost);	
	stop_measure(&kernel_start, &kernel_stop, time);
	std::cout << "Shared memory kernel took " << time << std::endl;
	display_data(host_pinned, host_pinned_final, 5);



	/* Free the arrays on the GPU as now we're done with them */
	cudaFree(data_gpu);
  cudaFreeHost(host_pinned_final);
  cudaFreeHost(host_pinned);
}

	.file	"tmpxft_0038448a_00000000-6_module_5.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3646:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3646:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z22manipulate_shared_dataPjS_j
	.type	_Z22manipulate_shared_dataPjS_j, @function
_Z22manipulate_shared_dataPjS_j:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3635:
	.size	_Z22manipulate_shared_dataPjS_j, .-_Z22manipulate_shared_dataPjS_j
	.globl	_Z24manipulate_constant_dataPjj
	.type	_Z24manipulate_constant_dataPjj, @function
_Z24manipulate_constant_dataPjj:
.LFB3636:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3636:
	.size	_Z24manipulate_constant_dataPjj, .-_Z24manipulate_constant_dataPjj
	.globl	_Z9copy_dataPKjPjjj
	.type	_Z9copy_dataPKjPjjj, @function
_Z9copy_dataPKjPjjj:
.LFB3637:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3637:
	.size	_Z9copy_dataPKjPjjj, .-_Z9copy_dataPKjPjjj
	.globl	_Z18generate_rand_dataPj
	.type	_Z18generate_rand_dataPj, @function
_Z18generate_rand_dataPj:
.LFB3638:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	xorl	%ebx, %ebx
	pushq	%rdx
	.cfi_def_cfa_offset 32
.L9:
	call	rand@PLT
	movl	%eax, 0(%rbp,%rbx,4)
	incq	%rbx
	cmpq	$4096, %rbx
	jne	.L9
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3638:
	.size	_Z18generate_rand_dataPj, .-_Z18generate_rand_dataPj
	.globl	_Z23generate_sequetial_dataPj
	.type	_Z23generate_sequetial_dataPj, @function
_Z23generate_sequetial_dataPj:
.LFB3639:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
.L14:
	movl	%eax, (%rdi,%rax,4)
	incq	%rax
	cmpq	$4096, %rax
	jne	.L14
	ret
	.cfi_endproc
.LFE3639:
	.size	_Z23generate_sequetial_dataPj, .-_Z23generate_sequetial_dataPj
	.globl	_Z13start_measurePP10CUevent_stS1_
	.type	_Z13start_measurePP10CUevent_stS1_, @function
_Z13start_measurePP10CUevent_stS1_:
.LFB3640:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rsi, %rbp
	xorl	%esi, %esi
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movq	%rdi, %rbx
	pushq	%rax
	.cfi_def_cfa_offset 32
	call	cudaEventCreateWithFlags@PLT
	movq	%rbp, %rdi
	xorl	%esi, %esi
	call	cudaEventCreateWithFlags@PLT
	movq	(%rbx), %rdi
	xorl	%esi, %esi
	popq	%rdx
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	cudaEventRecord@PLT
	.cfi_endproc
.LFE3640:
	.size	_Z13start_measurePP10CUevent_stS1_, .-_Z13start_measurePP10CUevent_stS1_
	.globl	_Z12stop_measurePP10CUevent_stS1_Rf
	.type	_Z12stop_measurePP10CUevent_stS1_Rf, @function
_Z12stop_measurePP10CUevent_stS1_Rf:
.LFB3641:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rdx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rsi, %rbx
	xorl	%esi, %esi
	movq	(%rbx), %rdi
	call	cudaEventRecord@PLT
	movq	(%rbx), %rdi
	call	cudaEventSynchronize@PLT
	movq	(%rbx), %rdx
	movq	(%r12), %rsi
	movq	%rbp, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	cudaEventElapsedTime@PLT
	.cfi_endproc
.LFE3641:
	.size	_Z12stop_measurePP10CUevent_stS1_Rf, .-_Z12stop_measurePP10CUevent_stS1_Rf
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"i=%i, input_data = %u, output_data = %u\n"
	.text
	.globl	_Z12display_dataPKjS0_j
	.type	_Z12display_dataPKjS0_j, @function
_Z12display_dataPKjS0_j:
.LFB3642:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	leaq	.LC0(%rip), %r14
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movq	%rsi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movl	%edx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	xorl	%ebx, %ebx
.L21:
	movl	%ebx, %edx
	cmpq	%rbp, %rbx
	je	.L24
	movl	(%r12,%rbx,4), %ecx
	movl	0(%r13,%rbx,4), %r8d
	movq	%r14, %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	incq	%rbx
	call	__printf_chk@PLT
	jmp	.L21
.L24:
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3642:
	.size	_Z12display_dataPKjS0_j, .-_Z12display_dataPKjS0_j
	.globl	_Z31__device_stub__Z10gpu_kernelPjjPjj
	.type	_Z31__device_stub__Z10gpu_kernelPjjPjj, @function
_Z31__device_stub__Z10gpu_kernelPjjPjj:
.LFB3668:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movl	%esi, 4(%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L25
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z10gpu_kernelPjj(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L25:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L27
	call	__stack_chk_fail@PLT
.L27:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3668:
	.size	_Z31__device_stub__Z10gpu_kernelPjjPjj, .-_Z31__device_stub__Z10gpu_kernelPjjPjj
	.globl	_Z10gpu_kernelPjj
	.type	_Z10gpu_kernelPjj, @function
_Z10gpu_kernelPjj:
.LFB3669:
	.cfi_startproc
	endbr64
	jmp	_Z31__device_stub__Z10gpu_kernelPjjPjj
	.cfi_endproc
.LFE3669:
	.size	_Z10gpu_kernelPjj, .-_Z10gpu_kernelPjj
	.globl	_Z41__device_stub__Z20gpu_kernel_constantsPjjPjj
	.type	_Z41__device_stub__Z20gpu_kernel_constantsPjjPjj, @function
_Z41__device_stub__Z20gpu_kernel_constantsPjjPjj:
.LFB3670:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movl	%esi, 4(%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L30
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z20gpu_kernel_constantsPjj(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L30:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L32
	call	__stack_chk_fail@PLT
.L32:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3670:
	.size	_Z41__device_stub__Z20gpu_kernel_constantsPjjPjj, .-_Z41__device_stub__Z20gpu_kernel_constantsPjjPjj
	.globl	_Z20gpu_kernel_constantsPjj
	.type	_Z20gpu_kernel_constantsPjj, @function
_Z20gpu_kernel_constantsPjj:
.LFB3671:
	.cfi_startproc
	endbr64
	jmp	_Z41__device_stub__Z20gpu_kernel_constantsPjjPjj
	.cfi_endproc
.LFE3671:
	.size	_Z20gpu_kernel_constantsPjj, .-_Z20gpu_kernel_constantsPjj
	.section	.rodata.str1.1
.LC1:
	.string	"Constant memory kernel took "
.LC2:
	.string	"Shared memory kernel took "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3643:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	$16384, %esi
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	leaq	_ZL15const_data_host(%rip), %rbx
	subq	$104, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rdi
	leaq	56(%rsp), %r13
	call	cudaMallocHost@PLT
	movl	$16384, %esi
	leaq	16(%rsp), %rdi
	leaq	48(%rsp), %rbp
	call	cudaMallocHost@PLT
	movq	%rbx, %rdi
	call	_Z18generate_rand_dataPj
	movq	8(%rsp), %rdi
	movl	$16384, %esi
	call	_Z23generate_sequetial_dataPj
	leaq	24(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$1, %r8d
	xorl	%ecx, %ecx
	movq	%rbx, %rsi
	movl	$16384, %edx
	leaq	_ZL14const_data_gpu(%rip), %rdi
	call	cudaMemcpyToSymbol@PLT
	call	cudaThreadSynchronize@PLT
	movq	%r13, %rsi
	movq	%rbp, %rdi
	call	_Z13start_measurePP10CUevent_stS1_
	movq	8(%rsp), %rsi
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movl	$16384, %edx
	call	cudaMemcpy@PLT
	movl	$4194305, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1073741825, %edi
	salq	$10, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	salq	$2, %rdi
	movq	%rdx, 76(%rsp)
	movl	$1, 84(%rsp)
	movq	%rdi, 64(%rsp)
	movl	$1, 72(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L36
	movq	24(%rsp), %rdi
	movl	$4096, %esi
	call	_Z41__device_stub__Z20gpu_kernel_constantsPjjPjj
.L36:
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	movl	$2, %ecx
	movl	$16384, %edx
	leaq	4(%rsp), %r12
	call	cudaMemcpy@PLT
	movq	%r12, %rdx
	movq	%r13, %rsi
	movq	%rbp, %rdi
	leaq	_ZSt4cout(%rip), %rbp
	leaq	40(%rsp), %r13
	call	_Z12stop_measurePP10CUevent_stS1_Rf
	leaq	.LC1(%rip), %rsi
	movq	%rbp, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtss2sd	4(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movq	16(%rsp), %rsi
	movl	$5, %edx
	movq	%rbx, %rdi
	leaq	32(%rsp), %rbx
	call	_Z12display_dataPKjS0_j
	call	cudaThreadSynchronize@PLT
	movq	%r13, %rsi
	movq	%rbx, %rdi
	call	_Z13start_measurePP10CUevent_stS1_
	movq	8(%rsp), %rsi
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movl	$16384, %edx
	call	cudaMemcpy@PLT
	movl	$4194305, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1073741825, %edi
	salq	$10, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	salq	$2, %rdi
	movq	%rdx, 76(%rsp)
	movl	$1, 84(%rsp)
	movq	%rdi, 64(%rsp)
	movl	$1, 72(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L37
	movq	24(%rsp), %rdi
	movl	$4096, %esi
	call	_Z31__device_stub__Z10gpu_kernelPjjPjj
.L37:
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	movl	$2, %ecx
	movl	$16384, %edx
	call	cudaMemcpy@PLT
	movq	%r12, %rdx
	movq	%r13, %rsi
	movq	%rbx, %rdi
	call	_Z12stop_measurePP10CUevent_stS1_Rf
	leaq	.LC2(%rip), %rsi
	movq	%rbp, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtss2sd	4(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	movl	$5, %edx
	call	_Z12display_dataPKjS0_j
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	8(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L38
	call	__stack_chk_fail@PLT
.L38:
	addq	$104, %rsp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3643:
	.size	main, .-main
	.section	.rodata.str1.1
.LC3:
	.string	"_Z20gpu_kernel_constantsPjj"
.LC4:
	.string	"_Z10gpu_kernelPjj"
.LC5:
	.string	"const_data_gpu"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3673:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z20gpu_kernel_constantsPjj(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC4(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z10gpu_kernelPjj(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC5(%rip), %rdx
	movl	$16384, %r9d
	leaq	_ZL14const_data_gpu(%rip), %rsi
	pushq	$1
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3673:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZL15const_data_host
	.comm	_ZL15const_data_host,16384,32
	.local	_ZL14const_data_gpu
	.comm	_ZL14const_data_gpu,16384,32
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <iostream>


#define KERNEL_LOOP 4096 // Used to exacerbate runtime affects 
#define NUM_ELEMENTS 4096
#define MAX_THREADS_PER_BLOCK 1024
__constant__ unsigned int const_data_gpu[NUM_ELEMENTS];
static unsigned int const_data_host[NUM_ELEMENTS];

__device__ void manipulate_shared_data(unsigned int * const data,
																		 	  unsigned int * const s_data,
																				const unsigned int tid)
{	
	// Load data into shared memory while doing an operation at the same time
	unsigned int i = gridDim.x*(blockDim.x)/2;
	if(tid < i){
		s_data[tid] = data[tid] + data[tid+i];
	}
	__syncthreads();
	

	// Add up data through reduction
	// Divides the probelm in half, but half the threads are also idle.
	// I know this isn't the fastest way through, but it's a start
	// Then d
	for (unsigned int s=gridDim.x*blockDim.x/4; s>32; s>>=1) {
		if (tid < s) {
				s_data[tid] += s_data[tid + s];
		}
		__syncthreads();
	}

	// Unwrap last loop
	if (tid < 32) {
		s_data[tid] += s_data[tid+32];
		s_data[tid] += s_data[tid+16];
		s_data[tid] += s_data[tid+8];
		s_data[tid] += s_data[tid+4];
		s_data[tid] += s_data[tid+2];
		s_data[tid] += s_data[tid+1];
	}
	__syncthreads();
}

__device__ void manipulate_constant_data(unsigned int * const data,
																				const unsigned int tid)
{	
	// Load data into shared memory while doing an operation at the same time
	unsigned int i = gridDim.x*(blockDim.x)/2;
	if(tid < i){
		data[tid] = const_data_gpu[tid] + const_data_gpu[tid+i];
	}
	__syncthreads();
	

	// Add up data through reduction
	// Divides the probelm in half, but half the threads are also idle.
	// I know this isn't the fastest way through, but it's a start
	// Then d
	for (unsigned int s=gridDim.x*blockDim.x/4; s>32; s>>=1) {
		if (tid < s) {
				data[tid] += const_data_gpu[tid + s];
		}
		__syncthreads();
	}

	// Unwrap last loop
	if (tid < 32) {
		data[tid] += const_data_gpu[tid+32];
		data[tid] += const_data_gpu[tid+16];
		data[tid] += const_data_gpu[tid+8];
		data[tid] += const_data_gpu[tid+4];
		data[tid] += const_data_gpu[tid+2];
		data[tid] += const_data_gpu[tid+1];
	}
	__syncthreads();
}

__device__ void copy_data(const unsigned int * const src,
								unsigned int * const dst,
								const unsigned int num_elements,
								const unsigned int tid)
{
	if(tid < num_elements) {
		dst[tid] = src[tid];
	}
	__syncthreads();
}

__global__ void gpu_kernel(unsigned int * data, const unsigned int num_elements)
{
	const unsigned int thread_idx = (blockIdx.x * blockDim.x) + threadIdx.x;
	__shared__ unsigned int shared[NUM_ELEMENTS];

	manipulate_shared_data(data, shared, thread_idx);

	copy_data(shared, data, num_elements, thread_idx);
}

__global__ void gpu_kernel_constants(unsigned int * data, const unsigned int num_elements)
{
	const unsigned int thread_idx = (blockIdx.x * blockDim.x) + threadIdx.x;
	manipulate_constant_data(data, thread_idx);
}


__host__ void generate_rand_data(unsigned int * host_data_ptr)
{
	for(unsigned int i=0; i < NUM_ELEMENTS; i++)
	{
  	host_data_ptr[i] = (unsigned int) rand();
	}
}

__host__ void generate_sequetial_data(unsigned int * data) {
	for(unsigned int i=0; i < NUM_ELEMENTS; i++)
	{
  	data[i] = i;
	}
}

__host__ void start_measure(hipEvent_t * start, hipEvent_t *stop){
        hipEventCreateWithFlags(start,0);
        hipEventCreateWithFlags(stop,0);
        hipEventRecord(*start, 0);
}

__host__ void stop_measure(hipEvent_t* start, hipEvent_t * stop, float &time) {
        hipEventRecord(*stop, 0);
        hipEventSynchronize(*stop);
        hipEventElapsedTime(&time, *start, *stop);
}

// Create display function to ensure output is the same for both kernels
__host__ void display_data(const unsigned int * const in_data,
													 const unsigned int * const out_data,
													 const unsigned int num_iter) {
        for(int i = 0; i < num_iter; i ++){
                printf("i=%i, input_data = %u, output_data = %u\n", i, in_data[i], out_data[i]);
        }
}

int main ( int argc, char *argv[] )
{
  const unsigned int num_elements = NUM_ELEMENTS;
  const unsigned int num_threads = MAX_THREADS_PER_BLOCK;
  const unsigned int num_blocks = num_elements/num_threads;
  const unsigned int num_bytes = num_elements * sizeof(unsigned int);
  const unsigned int kernel_loop = KERNEL_LOOP;

  // Prep Host data
  unsigned int * host_pinned;
  unsigned int * host_pinned_final;
  hipHostMalloc((void**)&host_pinned, num_bytes, hipHostMallocDefault);
  hipHostMalloc((void**)&host_pinned_final, num_bytes, hipHostMallocDefault);
  generate_rand_data(const_data_host);
  generate_sequetial_data(host_pinned);

  // Prep Device data
  unsigned int * data_gpu;
  hipMalloc(&data_gpu, num_bytes);

  // Define measurement 
  float time;
  hipEvent_t kernel_start, kernel_stop;
  hipEvent_t kernel_start1, kernel_stop1;

	// Copy new data to be manipulated
	hipMemcpyToSymbol(HIP_SYMBOL(const_data_gpu), const_data_host, num_bytes, 0, hipMemcpyHostToDevice);
  hipDeviceSynchronize();
	start_measure(&kernel_start1, &kernel_stop1);
	hipMemcpy(data_gpu, host_pinned, num_bytes, hipMemcpyHostToDevice);
  // run gpu kernel
	gpu_kernel_constants <<<num_blocks, num_threads>>>(data_gpu, num_elements);
	/* Copy back the gpu results to the CPU */
	hipMemcpy(host_pinned_final, data_gpu, num_bytes, hipMemcpyDeviceToHost);	
	stop_measure(&kernel_start1, &kernel_stop1, time);
	std::cout << "Constant memory kernel took " << time << std::endl;

	display_data(const_data_host, host_pinned_final, 5);

	/* Allocate arrays on the GPU */
	hipDeviceSynchronize();
	start_measure(&kernel_start, &kernel_stop);
	hipMemcpy(data_gpu, host_pinned, num_bytes, hipMemcpyHostToDevice);
	// run gpu kernel
	gpu_kernel <<<num_blocks, num_threads>>>(data_gpu, num_elements);
	/* Copy back the gpu results to the CPU */
	hipMemcpy(host_pinned_final, data_gpu, num_bytes, hipMemcpyDeviceToHost);	
	stop_measure(&kernel_start, &kernel_stop, time);
	std::cout << "Shared memory kernel took " << time << std::endl;
	display_data(host_pinned, host_pinned_final, 5);



	/* Free the arrays on the GPU as now we're done with them */
	hipFree(data_gpu);
  hipHostFree(host_pinned_final);
  hipHostFree(host_pinned);
}

	.text
	.file	"module_5.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z25__device_stub__gpu_kernelPjj # -- Begin function _Z25__device_stub__gpu_kernelPjj
	.type	_Z25__device_stub__gpu_kernelPjj,@function
_Z25__device_stub__gpu_kernelPjj:       # @_Z25__device_stub__gpu_kernelPjj
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10gpu_kernelPjj, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z25__device_stub__gpu_kernelPjj, .Lfunc_end0-_Z25__device_stub__gpu_kernelPjj
	.cfi_endproc
                                        # -- End function
	.globl	_Z35__device_stub__gpu_kernel_constantsPjj # -- Begin function _Z35__device_stub__gpu_kernel_constantsPjj
	.type	_Z35__device_stub__gpu_kernel_constantsPjj,@function
_Z35__device_stub__gpu_kernel_constantsPjj: # @_Z35__device_stub__gpu_kernel_constantsPjj
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z20gpu_kernel_constantsPjj, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z35__device_stub__gpu_kernel_constantsPjj, .Lfunc_end1-_Z35__device_stub__gpu_kernel_constantsPjj
	.cfi_endproc
                                        # -- End function
	.globl	_Z18generate_rand_dataPj        # -- Begin function _Z18generate_rand_dataPj
	.type	_Z18generate_rand_dataPj,@function
_Z18generate_rand_dataPj:               # @_Z18generate_rand_dataPj
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movq	%rdi, %rbx
	xorl	%r14d, %r14d
.LBB2_1:                                # =>This Inner Loop Header: Depth=1
	callq	rand
	movl	%eax, (%rbx,%r14,4)
	incq	%r14
	cmpq	$4096, %r14                     # imm = 0x1000
	jne	.LBB2_1
# %bb.2:
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z18generate_rand_dataPj, .Lfunc_end2-_Z18generate_rand_dataPj
	.cfi_endproc
                                        # -- End function
	.globl	_Z23generate_sequetial_dataPj   # -- Begin function _Z23generate_sequetial_dataPj
	.type	_Z23generate_sequetial_dataPj,@function
_Z23generate_sequetial_dataPj:          # @_Z23generate_sequetial_dataPj
	.cfi_startproc
# %bb.0:
	xorl	%eax, %eax
.LBB3_1:                                # =>This Inner Loop Header: Depth=1
	movl	%eax, (%rdi,%rax,4)
	incq	%rax
	cmpq	$4096, %rax                     # imm = 0x1000
	jne	.LBB3_1
# %bb.2:
	retq
.Lfunc_end3:
	.size	_Z23generate_sequetial_dataPj, .Lfunc_end3-_Z23generate_sequetial_dataPj
	.cfi_endproc
                                        # -- End function
	.globl	_Z13start_measurePP11ihipEvent_tS1_ # -- Begin function _Z13start_measurePP11ihipEvent_tS1_
	.type	_Z13start_measurePP11ihipEvent_tS1_,@function
_Z13start_measurePP11ihipEvent_tS1_:    # @_Z13start_measurePP11ihipEvent_tS1_
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movq	%rsi, %rbx
	movq	%rdi, %r14
	xorl	%esi, %esi
	callq	hipEventCreateWithFlags
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	hipEventCreateWithFlags
	movq	(%r14), %rdi
	xorl	%esi, %esi
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	hipEventRecord                  # TAILCALL
.Lfunc_end4:
	.size	_Z13start_measurePP11ihipEvent_tS1_, .Lfunc_end4-_Z13start_measurePP11ihipEvent_tS1_
	.cfi_endproc
                                        # -- End function
	.globl	_Z12stop_measurePP11ihipEvent_tS1_Rf # -- Begin function _Z12stop_measurePP11ihipEvent_tS1_Rf
	.type	_Z12stop_measurePP11ihipEvent_tS1_Rf,@function
_Z12stop_measurePP11ihipEvent_tS1_Rf:   # @_Z12stop_measurePP11ihipEvent_tS1_Rf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdx, %rbx
	movq	%rsi, %r14
	movq	%rdi, %r15
	movq	(%rsi), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%r14), %rdi
	callq	hipEventSynchronize
	movq	(%r15), %rsi
	movq	(%r14), %rdx
	movq	%rbx, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	hipEventElapsedTime             # TAILCALL
.Lfunc_end5:
	.size	_Z12stop_measurePP11ihipEvent_tS1_Rf, .Lfunc_end5-_Z12stop_measurePP11ihipEvent_tS1_Rf
	.cfi_endproc
                                        # -- End function
	.globl	_Z12display_dataPKjS0_j         # -- Begin function _Z12display_dataPKjS0_j
	.type	_Z12display_dataPKjS0_j,@function
_Z12display_dataPKjS0_j:                # @_Z12display_dataPKjS0_j
	.cfi_startproc
# %bb.0:
	testl	%edx, %edx
	je	.LBB6_4
# %bb.1:                                # %.lr.ph.preheader
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rsi, %rbx
	movq	%rdi, %r14
	movl	%edx, %r12d
	xorl	%r15d, %r15d
.LBB6_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	(%r14,%r15,4), %edx
	movl	(%rbx,%r15,4), %ecx
	movl	$.L.str, %edi
	movl	%r15d, %esi
	xorl	%eax, %eax
	callq	printf
	incq	%r15
	cmpq	%r15, %r12
	jne	.LBB6_2
# %bb.3:
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r12
	.cfi_restore %r14
	.cfi_restore %r15
.LBB6_4:                                # %._crit_edge
	retq
.Lfunc_end6:
	.size	_Z12display_dataPKjS0_j, .Lfunc_end6-_Z12display_dataPKjS0_j
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$72, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rdi
	movl	$16384, %esi                    # imm = 0x4000
	xorl	%edx, %edx
	callq	hipHostMalloc
	leaq	16(%rsp), %rdi
	movl	$16384, %esi                    # imm = 0x4000
	xorl	%edx, %edx
	callq	hipHostMalloc
	movq	$-16384, %rbx                   # imm = 0xC000
.LBB7_1:                                # =>This Inner Loop Header: Depth=1
	callq	rand
	movl	%eax, _ZL15const_data_host+16384(%rbx)
	addq	$4, %rbx
	jne	.LBB7_1
# %bb.2:                                # %_Z18generate_rand_dataPj.exit
	movq	24(%rsp), %rax
	xorl	%ecx, %ecx
.LBB7_3:                                # =>This Inner Loop Header: Depth=1
	movl	%ecx, (%rax,%rcx,4)
	incq	%rcx
	cmpq	$4096, %rcx                     # imm = 0x1000
	jne	.LBB7_3
# %bb.4:                                # %_Z23generate_sequetial_dataPj.exit
	movabsq	$4294967300, %rbx               # imm = 0x100000004
	leaq	8(%rsp), %r14
	movl	$16384, %esi                    # imm = 0x4000
	movq	%r14, %rdi
	callq	hipMalloc
	movl	$const_data_gpu, %edi
	movl	$_ZL15const_data_host, %esi
	movl	$16384, %edx                    # imm = 0x4000
	xorl	%ecx, %ecx
	movl	$1, %r8d
	callq	hipMemcpyToSymbol
	callq	hipDeviceSynchronize
	leaq	48(%rsp), %rdi
	leaq	40(%rsp), %rsi
	callq	_Z13start_measurePP11ihipEvent_tS1_
	movq	(%r14), %rdi
	movq	24(%rsp), %rsi
	movl	$16384, %edx                    # imm = 0x4000
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	1020(%rbx), %r14
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_6
# %bb.5:
	movq	8(%rsp), %rdi
	movl	$4096, %esi                     # imm = 0x1000
	callq	_Z35__device_stub__gpu_kernel_constantsPjj
.LBB7_6:
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	movl	$16384, %edx                    # imm = 0x4000
	movl	$2, %ecx
	callq	hipMemcpy
	leaq	48(%rsp), %rdi
	leaq	40(%rsp), %rsi
	leaq	36(%rsp), %r15
	movq	%r15, %rdx
	callq	_Z12stop_measurePP11ihipEvent_tS1_Rf
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$28, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	cvtss2sd	(%r15), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r15
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r15, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	16(%rsp), %r12
	xorl	%r15d, %r15d
.LBB7_7:                                # %.lr.ph.i
                                        # =>This Inner Loop Header: Depth=1
	movl	_ZL15const_data_host(,%r15,4), %edx
	movl	(%r12,%r15,4), %ecx
	movl	$.L.str, %edi
	movl	%r15d, %esi
	xorl	%eax, %eax
	callq	printf
	incq	%r15
	cmpq	$5, %r15
	jne	.LBB7_7
# %bb.8:                                # %_Z12display_dataPKjS0_j.exit
	callq	hipDeviceSynchronize
	leaq	64(%rsp), %rdi
	leaq	56(%rsp), %rsi
	callq	_Z13start_measurePP11ihipEvent_tS1_
	movq	8(%rsp), %rdi
	movq	24(%rsp), %rsi
	movl	$16384, %edx                    # imm = 0x4000
	movl	$1, %ecx
	callq	hipMemcpy
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_10
# %bb.9:
	movq	8(%rsp), %rdi
	movl	$4096, %esi                     # imm = 0x1000
	callq	_Z25__device_stub__gpu_kernelPjj
.LBB7_10:
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	movl	$16384, %edx                    # imm = 0x4000
	movl	$2, %ecx
	callq	hipMemcpy
	leaq	64(%rsp), %rdi
	leaq	56(%rsp), %rsi
	leaq	36(%rsp), %rbx
	movq	%rbx, %rdx
	callq	_Z12stop_measurePP11ihipEvent_tS1_Rf
	movl	$_ZSt4cout, %edi
	movl	$.L.str.2, %esi
	movl	$26, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbx), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	24(%rsp), %r14
	movq	16(%rsp), %r15
	xorl	%ebx, %ebx
.LBB7_11:                               # %.lr.ph.i14
                                        # =>This Inner Loop Header: Depth=1
	movl	(%r14,%rbx,4), %edx
	movl	(%r15,%rbx,4), %ecx
	movl	$.L.str, %edi
	movl	%ebx, %esi
	xorl	%eax, %eax
	callq	printf
	incq	%rbx
	cmpq	$5, %rbx
	jne	.LBB7_11
# %bb.12:                               # %_Z12display_dataPKjS0_j.exit18
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipHostFree
	movq	24(%rsp), %rdi
	callq	hipHostFree
	xorl	%eax, %eax
	addq	$72, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	main, .Lfunc_end7-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB8_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB8_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10gpu_kernelPjj, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z20gpu_kernel_constantsPjj, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$0, 8(%rsp)
	movl	$1, (%rsp)
	movl	$const_data_gpu, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movl	$16384, %r9d                    # imm = 0x4000
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	callq	__hipRegisterVar
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end8:
	.size	__hip_module_ctor, .Lfunc_end8-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB9_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB9_2:
	retq
.Lfunc_end9:
	.size	__hip_module_dtor, .Lfunc_end9-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	const_data_gpu,@object          # @const_data_gpu
	.local	const_data_gpu
	.comm	const_data_gpu,16384,16
	.type	_Z10gpu_kernelPjj,@object       # @_Z10gpu_kernelPjj
	.section	.rodata,"a",@progbits
	.globl	_Z10gpu_kernelPjj
	.p2align	3, 0x0
_Z10gpu_kernelPjj:
	.quad	_Z25__device_stub__gpu_kernelPjj
	.size	_Z10gpu_kernelPjj, 8

	.type	_Z20gpu_kernel_constantsPjj,@object # @_Z20gpu_kernel_constantsPjj
	.globl	_Z20gpu_kernel_constantsPjj
	.p2align	3, 0x0
_Z20gpu_kernel_constantsPjj:
	.quad	_Z35__device_stub__gpu_kernel_constantsPjj
	.size	_Z20gpu_kernel_constantsPjj, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"i=%i, input_data = %u, output_data = %u\n"
	.size	.L.str, 41

	.type	_ZL15const_data_host,@object    # @_ZL15const_data_host
	.local	_ZL15const_data_host
	.comm	_ZL15const_data_host,16384,16
	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Constant memory kernel took "
	.size	.L.str.1, 29

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Shared memory kernel took "
	.size	.L.str.2, 27

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z10gpu_kernelPjj"
	.size	.L__unnamed_1, 18

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z20gpu_kernel_constantsPjj"
	.size	.L__unnamed_2, 28

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"const_data_gpu"
	.size	.L__unnamed_3, 15

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z25__device_stub__gpu_kernelPjj
	.addrsig_sym _Z35__device_stub__gpu_kernel_constantsPjj
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym const_data_gpu
	.addrsig_sym _Z10gpu_kernelPjj
	.addrsig_sym _Z20gpu_kernel_constantsPjj
	.addrsig_sym _ZL15const_data_host
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z10gpu_kernelPjj       ; -- Begin function _Z10gpu_kernelPjj
	.globl	_Z10gpu_kernelPjj
	.p2align	8
	.type	_Z10gpu_kernelPjj,@function
_Z10gpu_kernelPjj:                      ; @_Z10gpu_kernelPjj
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x1c
	s_load_b32 s5, s[0:1], 0x10
	s_add_u32 s2, s0, 16
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_cmp_lt_u32 s15, s5
	s_cselect_b32 s6, 12, 18
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v1, s6
	global_load_u16 v1, v1, s[2:3]
	s_load_b64 s[2:3], s[0:1], 0x0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s6, v1
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_mul_i32 s4, s5, s6
	s_mov_b32 s5, exec_lo
	s_lshr_b32 s6, s4, 1
	v_lshlrev_b32_e32 v0, 2, v1
	v_cmpx_gt_u32_e64 s6, v1
	s_cbranch_execz .LBB0_2
; %bb.1:
	v_dual_mov_b32 v2, 0 :: v_dual_add_nc_u32 v3, s6, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v4, v2
	v_lshlrev_b64 v[5:6], 2, v[1:2]
	v_lshlrev_b64 v[2:3], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, s2, v5
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	s_clause 0x1
	global_load_b32 v4, v[4:5], off
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v2, v2, v4
	ds_store_b32 v0, v2
.LBB0_2:
	s_or_b32 exec_lo, exec_lo, s5
	s_cmpk_lt_u32 s4, 0x84
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB0_7
; %bb.3:                                ; %.lr.ph.i
	s_lshr_b32 s4, s4, 2
.LBB0_4:                                ; =>This Inner Loop Header: Depth=1
	s_mov_b32 s5, exec_lo
	v_cmpx_gt_u32_e64 s4, v1
	s_cbranch_execz .LBB0_6
; %bb.5:                                ;   in Loop: Header=BB0_4 Depth=1
	v_lshl_add_u32 v2, s4, 2, v0
	ds_load_b32 v2, v2
	ds_load_b32 v3, v0
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v2, v3, v2
	ds_store_b32 v0, v2
.LBB0_6:                                ;   in Loop: Header=BB0_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_lshr_b32 s5, s4, 1
	s_cmpk_lt_u32 s4, 0x42
	s_mov_b32 s4, s5
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB0_4
.LBB0_7:                                ; %._crit_edge.i
	s_mov_b32 s4, exec_lo
	v_cmpx_gt_u32_e32 32, v1
	s_cbranch_execz .LBB0_9
; %bb.8:
	ds_load_b32 v8, v0 offset:128
	ds_load_2addr_b32 v[2:3], v0 offset1:1
	ds_load_2addr_b32 v[4:5], v0 offset0:8 offset1:16
	ds_load_2addr_b32 v[6:7], v0 offset0:2 offset1:4
	s_waitcnt lgkmcnt(1)
	v_add3_u32 v2, v2, v8, v5
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v2, v2, v4, v7
	v_add3_u32 v2, v2, v6, v3
	ds_store_b32 v0, v2
.LBB0_9:                                ; %_Z22manipulate_shared_dataPjS_j.exit
	s_or_b32 exec_lo, exec_lo, s4
	s_load_b32 s0, s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmp_gt_u32_e32 vcc_lo, s0, v1
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB0_11
; %bb.10:
	ds_load_b32 v3, v0
	v_mov_b32_e32 v2, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_add_co_u32 v0, vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[0:1], v3, off
.LBB0_11:                               ; %_Z9copy_dataPKjPjjj.exit
	s_or_b32 exec_lo, exec_lo, s0
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10gpu_kernelPjj
		.amdhsa_group_segment_fixed_size 16384
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z10gpu_kernelPjj, .Lfunc_end0-_Z10gpu_kernelPjj
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 552
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 16384 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z20gpu_kernel_constantsPjj ; -- Begin function _Z20gpu_kernel_constantsPjj
	.globl	_Z20gpu_kernel_constantsPjj
	.p2align	8
	.type	_Z20gpu_kernel_constantsPjj,@function
_Z20gpu_kernel_constantsPjj:            ; @_Z20gpu_kernel_constantsPjj
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x1c
	s_load_b32 s5, s[0:1], 0x10
	s_add_u32 s2, s0, 16
	s_addc_u32 s3, s1, 0
	s_load_b64 s[0:1], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_cmp_lt_u32 s15, s5
	s_cselect_b32 s6, 12, 18
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v1, s6
	global_load_u16 v1, v1, s[2:3]
	s_mov_b32 s3, exec_lo
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s2, v1
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s2, s5, s2
	s_lshr_b32 s4, s2, 1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cmpx_gt_u32_e64 s4, v1
	s_cbranch_execz .LBB1_2
; %bb.1:
	v_dual_mov_b32 v2, 0 :: v_dual_add_nc_u32 v3, s4, v1
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, const_data_gpu@rel32@lo+4
	s_addc_u32 s5, s5, const_data_gpu@rel32@hi+12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v4, v2
	v_lshlrev_b64 v[5:6], 2, v[1:2]
	v_lshlrev_b64 v[2:3], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v7, vcc_lo, v5, s4
	v_add_co_ci_u32_e32 v8, vcc_lo, s5, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_clause 0x1
	global_load_b32 v0, v[7:8], off
	global_load_b32 v4, v[2:3], off
	v_add_co_u32 v2, vcc_lo, s0, v5
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v6, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v0, v4, v0
	global_store_b32 v[2:3], v0, off
.LBB1_2:
	s_or_b32 exec_lo, exec_lo, s3
	s_cmpk_lt_u32 s2, 0x84
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB1_7
; %bb.3:                                ; %.lr.ph.i
	v_mov_b32_e32 v3, 0
	s_lshr_b32 s2, s2, 2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v2, v3
	v_lshlrev_b64 v[4:5], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s0, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
.LBB1_4:                                ; =>This Inner Loop Header: Depth=1
	s_mov_b32 s3, exec_lo
	v_cmpx_gt_u32_e64 s2, v1
	s_cbranch_execz .LBB1_6
; %bb.5:                                ;   in Loop: Header=BB1_4 Depth=1
	v_add_nc_u32_e32 v2, s2, v1
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, const_data_gpu@rel32@lo+4
	s_addc_u32 s5, s5, const_data_gpu@rel32@hi+12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 2, v[2:3]
	v_add_co_u32 v6, vcc_lo, v6, s4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	global_load_b32 v0, v[6:7], off
	global_load_b32 v2, v[4:5], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v0, v2, v0
	global_store_b32 v[4:5], v0, off
.LBB1_6:                                ;   in Loop: Header=BB1_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_lshr_b32 s3, s2, 1
	s_cmpk_lt_u32 s2, 0x42
	s_mov_b32 s2, s3
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB1_4
.LBB1_7:                                ; %._crit_edge.i
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_u32_e32 32, v1
	s_cbranch_execz .LBB1_9
; %bb.8:
	v_mov_b32_e32 v4, 0
	v_or_b32_e32 v3, 32, v1
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, const_data_gpu@rel32@lo+4
	s_addc_u32 s5, s5, const_data_gpu@rel32@hi+12
	s_getpc_b64 s[6:7]
	s_add_u32 s6, s6, const_data_gpu@rel32@lo+68
	s_addc_u32 s7, s7, const_data_gpu@rel32@hi+76
	v_mov_b32_e32 v2, v4
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_add_co_u32 v2, vcc_lo, v3, s4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v4, vcc_lo
	v_add_co_u32 v4, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v1, vcc_lo
	v_add_co_u32 v6, vcc_lo, v0, s6
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v1, vcc_lo
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, const_data_gpu@rel32@lo+36
	s_addc_u32 s1, s1, const_data_gpu@rel32@hi+44
	global_load_b32 v8, v[2:3], off
	global_load_b32 v9, v[4:5], off
	global_load_b32 v10, v[6:7], off
	v_add_co_u32 v2, vcc_lo, v0, s0
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, const_data_gpu@rel32@lo+20
	s_addc_u32 s5, s5, const_data_gpu@rel32@hi+28
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
	v_add_co_u32 v6, vcc_lo, v0, s4
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, const_data_gpu@rel32@lo+8
	s_addc_u32 s1, s1, const_data_gpu@rel32@hi+16
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, v0, s0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_clause 0x2
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[6:7], off
	global_load_b64 v[0:1], v[0:1], off
	s_waitcnt vmcnt(3)
	v_add3_u32 v6, v9, v8, v10
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add3_u32 v2, v6, v2, v3
	s_waitcnt vmcnt(0)
	v_add3_u32 v0, v2, v1, v0
	global_store_b32 v[4:5], v0, off
.LBB1_9:                                ; %_Z24manipulate_constant_dataPjj.exit
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z20gpu_kernel_constantsPjj
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z20gpu_kernel_constantsPjj, .Lfunc_end1-_Z20gpu_kernel_constantsPjj
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 804
; NumSgprs: 18
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.protected	const_data_gpu          ; @const_data_gpu
	.type	const_data_gpu,@object
	.section	.bss,"aw",@nobits
	.globl	const_data_gpu
	.p2align	4, 0x0
const_data_gpu:
	.zero	16384
	.size	const_data_gpu, 16384

	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym const_data_gpu
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 16384
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10gpu_kernelPjj
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z10gpu_kernelPjj.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z20gpu_kernel_constantsPjj
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z20gpu_kernel_constantsPjj.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     11
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
