#define LENGTH_V  1024*1024
#define LENGTH_SHOW 10
#define BLOCK_SIZE 1024

#include <stdio.h>
#include <stdlib.h>
#include <limits.h>
#include <time.h>

// Kernel: naive scan
__global__ void scan_incl(int *g_odata, int *g_idata, int ndata) {
	int thid = threadIdx.x;
	extern __shared__ int temp[];
		// Double buffer dinamically reserved

	int pout = 0, pin = 1;
	temp[pout * ndata + thid] = g_idata[thid];
	__syncthreads();

	for (int offset = 1; offset < ndata; offset *= 2) {
		pout = 1 - pout; // swap double buffer indices
		pin = 1 - pout;

		temp[pout * ndata + thid] = temp[pin * ndata + thid];
		if (thid >= offset) {
			temp[pout * ndata + thid] += temp[pin * ndata + thid - offset];
		}
		__syncthreads();
	}
  g_odata[thid] = temp[pout * ndata + thid]; // write output

}
// Kernel: block scan
__global__ void scan_incl_blocks(int *g_odata, int *g_idata, int blockSize, int ndata) {

  int block = blockIdx.x;
  int thid = threadIdx.x;
  int posArray = block * blockSize + thid;
  int numElemts;

  if (block == (ceil( (double) ndata / (double) blockSize) - 1) &&  ndata % blockSize != 0) {
    numElemts = ndata % blockSize;
  } else {
    numElemts = blockSize;
  }

	extern __shared__ int temp[];
  // Double buffer dinamically reserved
  int pout = 0, pin = 1;
  temp[pout * numElemts + thid] = g_idata[posArray];
  __syncthreads();

  for (int offset = 1; offset < numElemts; offset *= 2) {
		pout = 1 - pout; // swap double buffer indices
		pin = 1 - pout;

		temp[pout * numElemts + thid] = temp[pin * numElemts + thid];
		if (thid >= offset) {
			temp[pout * numElemts + thid] += temp[pin * numElemts + thid - offset];
    }
		__syncthreads();
  }

  g_odata[posArray] = temp[pout * numElemts + thid];
}

__global__ void scan_getBlocksAux(int *g_block, int *g_idata, int blockSize, int ndata) {

  int block = blockIdx.x;
  int thid = threadIdx.x;
  int posArray = block * blockSize + thid;

  int numElemts;

  if (block == (ceil( (double) ndata / (double) blockSize) - 1) &&  ndata % blockSize != 0) {
    numElemts = ndata % blockSize;
  } else {
    numElemts = blockSize;
  }

  if (thid == (numElemts - 1)) {
    g_block[block] = g_idata[posArray];
  }
}

__global__ void addToBlocks(int *g_odata, int *g_block, int blockSize) {

  int block = blockIdx.x;
  int thid = threadIdx.x;
  int posArray = block * blockSize + thid;

  if (block != 0) {
    g_odata[posArray] += g_block[block - 1];
  }
}

void show_vector(char *myString, int lengthMyString, int *vector, int length) {
	int j;
  printf("\n%s\n",myString);
  for (j = 0; j < lengthMyString; j++)
    printf("-");
  printf("\n");
  if (LENGTH_SHOW * 2 < length) {
		for (j = 0; j < LENGTH_SHOW; j++)
			printf(" %d", vector[j]);
		printf(" ...");
		for (j = length-LENGTH_SHOW; j < length; j++)
			printf(" %d", vector[j]);
		printf("\n");
	} else {
		for (j=0 ; j<length; j++)
			printf(" %d", vector[j]);
		printf("\n");
	}
}

int main(void) {

	int h_VectorOriginal[LENGTH_V];
  int h_VectorScanGPU[LENGTH_V];

  int *d_VectorOriginal, *d_VectorScanGPUBlocks, *d_VectorScanGPUBlocksAux, *d_VectorScanGPUBlocks2;

	int j;
	clock_t start, end;
	double time_used;

  // -----------------------

  srand(time(NULL));
	for (j = 0; j < LENGTH_V; j++) {
    h_VectorOriginal[j] = (int)(rand() % 100) - 50;
  }

	char msg1[] = "Vector original";
	show_vector(msg1, strlen(msg1), h_VectorOriginal, LENGTH_V);

  // -----------------------
  // Vector scan blocks (GPU)
  // -----------------------

  cudaMalloc((void **)&d_VectorOriginal, sizeof(int) * LENGTH_V);
  cudaMalloc((void **)&d_VectorScanGPUBlocks, sizeof(int) * LENGTH_V);

  cudaMemcpy(d_VectorOriginal, h_VectorOriginal, sizeof(int) * LENGTH_V, cudaMemcpyHostToDevice);

  int numBlocks = ceil( (double) LENGTH_V / (double) BLOCK_SIZE);

  printf("\nNumero de bloques: %d\n", numBlocks);

  int numThreads = BLOCK_SIZE;
  printf("Numero de threads: %d\n", numThreads);

  cudaMalloc((void **)&d_VectorScanGPUBlocksAux, sizeof(int) * numBlocks);
  cudaMalloc((void **)&d_VectorScanGPUBlocks2, sizeof(int) * numBlocks);

  start = clock();

    scan_incl_blocks <<< numBlocks, numThreads, BLOCK_SIZE * 2 * sizeof(int) >>>(
      d_VectorScanGPUBlocks,
      d_VectorOriginal,
      BLOCK_SIZE,
      LENGTH_V);

    scan_getBlocksAux <<< numBlocks, numThreads >>>(
      d_VectorScanGPUBlocksAux,
      d_VectorScanGPUBlocks,
      BLOCK_SIZE,
      LENGTH_V
    );

    scan_incl <<< 1, numBlocks, numBlocks * 2 * sizeof(int) >>>(
      d_VectorScanGPUBlocks2,
      d_VectorScanGPUBlocksAux,
      numBlocks
    );

    addToBlocks <<< numBlocks, numThreads >>>(
      d_VectorScanGPUBlocks,
      d_VectorScanGPUBlocks2,
      BLOCK_SIZE
    );

  end = clock();

	cudaMemcpy(h_VectorScanGPU, d_VectorScanGPUBlocks, sizeof(int) * LENGTH_V, cudaMemcpyDeviceToHost);

  // -----------------------

	char msg3[] = "Vector scan blocks (GPU)";
	show_vector(msg3, strlen(msg3), h_VectorScanGPU, LENGTH_V);

  time_used = 1000.0 * ((double)(end - start)) / CLOCKS_PER_SEC;
	printf("GPU scan kernel processing time: %f millisec. (nº elements %d)\n",time_used, LENGTH_V);

	cudaFree(d_VectorOriginal);
  cudaFree(d_VectorScanGPUBlocks);
  cudaFree(d_VectorScanGPUBlocksAux);
}
	.file	"tmpxft_0031ca88_00000000-6_GPU.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"\n%s\n"
.LC1:
	.string	"-"
.LC2:
	.string	"\n"
.LC3:
	.string	" %d"
.LC4:
	.string	" ..."
	.text
	.globl	_Z11show_vectorPciPii
	.type	_Z11show_vectorPciPii, @function
_Z11show_vectorPciPii:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	xorl	%eax, %eax
	leaq	.LC1(%rip), %r14
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movl	%esi, %r12d
	leaq	.LC0(%rip), %rsi
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%rdx, %rbp
	movq	%rdi, %rdx
	movl	$2, %edi
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movslq	%ecx, %rbx
	call	__printf_chk@PLT
.L3:
	cmpl	%r12d, %r13d
	jge	.L15
	movq	%r14, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incl	%r13d
	call	__printf_chk@PLT
	jmp	.L3
.L15:
	leaq	.LC2(%rip), %r13
	movl	$2, %edi
	xorl	%eax, %eax
	xorl	%r12d, %r12d
	movq	%r13, %rsi
	leaq	.LC3(%rip), %r14
	call	__printf_chk@PLT
	cmpl	$20, %ebx
	jle	.L5
.L6:
	movl	0(%rbp,%r12,4), %edx
	movq	%r14, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%r12
	call	__printf_chk@PLT
	cmpq	$10, %r12
	jne	.L6
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	0(%rbp,%rbx,4), %rbp
	xorl	%ebx, %ebx
.L7:
	movl	-40(%rbp,%rbx,4), %edx
	movq	%r14, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%rbx
	call	__printf_chk@PLT
	cmpq	$10, %rbx
	jne	.L7
.L9:
	popq	%rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	movq	%r13, %rsi
	popq	%rbp
	.cfi_def_cfa_offset 32
	movl	$2, %edi
	popq	%r12
	.cfi_def_cfa_offset 24
	xorl	%eax, %eax
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	__printf_chk@PLT
.L5:
	.cfi_restore_state
	cmpl	%r12d, %ebx
	jle	.L9
	movl	0(%rbp,%r12,4), %edx
	movq	%r14, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%r12
	call	__printf_chk@PLT
	jmp	.L5
	.cfi_endproc
.LFE2027:
	.size	_Z11show_vectorPciPii, .-_Z11show_vectorPciPii
	.globl	_Z31__device_stub__Z9scan_inclPiS_iPiS_i
	.type	_Z31__device_stub__Z9scan_inclPiS_iPiS_i, @function
_Z31__device_stub__Z9scan_inclPiS_iPiS_i:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z9scan_inclPiS_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L16:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L18
	call	__stack_chk_fail@PLT
.L18:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z31__device_stub__Z9scan_inclPiS_iPiS_i, .-_Z31__device_stub__Z9scan_inclPiS_iPiS_i
	.globl	_Z9scan_inclPiS_i
	.type	_Z9scan_inclPiS_i, @function
_Z9scan_inclPiS_i:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z31__device_stub__Z9scan_inclPiS_iPiS_i
	.cfi_endproc
.LFE2054:
	.size	_Z9scan_inclPiS_i, .-_Z9scan_inclPiS_i
	.globl	_Z40__device_stub__Z16scan_incl_blocksPiS_iiPiS_ii
	.type	_Z40__device_stub__Z16scan_incl_blocksPiS_iiPiS_ii, @function
_Z40__device_stub__Z16scan_incl_blocksPiS_iiPiS_ii:
.LFB2055:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L21
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z16scan_incl_blocksPiS_ii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L21:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L23
	call	__stack_chk_fail@PLT
.L23:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2055:
	.size	_Z40__device_stub__Z16scan_incl_blocksPiS_iiPiS_ii, .-_Z40__device_stub__Z16scan_incl_blocksPiS_iiPiS_ii
	.globl	_Z16scan_incl_blocksPiS_ii
	.type	_Z16scan_incl_blocksPiS_ii, @function
_Z16scan_incl_blocksPiS_ii:
.LFB2056:
	.cfi_startproc
	endbr64
	jmp	_Z40__device_stub__Z16scan_incl_blocksPiS_iiPiS_ii
	.cfi_endproc
.LFE2056:
	.size	_Z16scan_incl_blocksPiS_ii, .-_Z16scan_incl_blocksPiS_ii
	.globl	_Z41__device_stub__Z17scan_getBlocksAuxPiS_iiPiS_ii
	.type	_Z41__device_stub__Z17scan_getBlocksAuxPiS_iiPiS_ii, @function
_Z41__device_stub__Z17scan_getBlocksAuxPiS_iiPiS_ii:
.LFB2057:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L26
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z17scan_getBlocksAuxPiS_ii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L26:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L28
	call	__stack_chk_fail@PLT
.L28:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2057:
	.size	_Z41__device_stub__Z17scan_getBlocksAuxPiS_iiPiS_ii, .-_Z41__device_stub__Z17scan_getBlocksAuxPiS_iiPiS_ii
	.globl	_Z17scan_getBlocksAuxPiS_ii
	.type	_Z17scan_getBlocksAuxPiS_ii, @function
_Z17scan_getBlocksAuxPiS_ii:
.LFB2058:
	.cfi_startproc
	endbr64
	jmp	_Z41__device_stub__Z17scan_getBlocksAuxPiS_iiPiS_ii
	.cfi_endproc
.LFE2058:
	.size	_Z17scan_getBlocksAuxPiS_ii, .-_Z17scan_getBlocksAuxPiS_ii
	.globl	_Z34__device_stub__Z11addToBlocksPiS_iPiS_i
	.type	_Z34__device_stub__Z11addToBlocksPiS_iPiS_i, @function
_Z34__device_stub__Z11addToBlocksPiS_iPiS_i:
.LFB2059:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L31
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z11addToBlocksPiS_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L31:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L33
	call	__stack_chk_fail@PLT
.L33:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2059:
	.size	_Z34__device_stub__Z11addToBlocksPiS_iPiS_i, .-_Z34__device_stub__Z11addToBlocksPiS_iPiS_i
	.globl	_Z11addToBlocksPiS_i
	.type	_Z11addToBlocksPiS_i, @function
_Z11addToBlocksPiS_i:
.LFB2060:
	.cfi_startproc
	endbr64
	jmp	_Z34__device_stub__Z11addToBlocksPiS_iPiS_i
	.cfi_endproc
.LFE2060:
	.size	_Z11addToBlocksPiS_i, .-_Z11addToBlocksPiS_i
	.section	.rodata.str1.1
.LC5:
	.string	"\nNumero de bloques: %d\n"
.LC6:
	.string	"Numero de threads: %d\n"
.LC9:
	.string	"GPU scan kernel processing time: %f millisec. (n\302\272 elements %d)\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	leaq	-8388608(%rsp), %r11
	.cfi_def_cfa 11, 8388648
.LPSRL0:
	subq	$4096, %rsp
	orq	$0, (%rsp)
	cmpq	%r11, %rsp
	jne	.LPSRL0
	.cfi_def_cfa_register 7
	subq	$120, %rsp
	.cfi_def_cfa_offset 8388768
	xorl	%edi, %edi
	xorl	%ebx, %ebx
	movl	$100, %r12d
	movq	%fs:40, %rax
	movq	%rax, 8388712(%rsp)
	xorl	%eax, %eax
	call	time@PLT
	movl	%eax, %edi
	call	srand@PLT
.L37:
	call	rand@PLT
	leaq	60(%rsp), %rbp
	cltd
	idivl	%r12d
	subl	$50, %edx
	movl	%edx, 0(%rbp,%rbx,4)
	incq	%rbx
	cmpq	$1048576, %rbx
	jne	.L37
	leaq	8388671(%rsp), %rbx
	movabsq	$30506424327432562, %rdx
	movabsq	$8007525960484349270, %rax
	movq	%rbx, %rdi
	movq	%rdx, 8388679(%rsp)
	movq	%rax, 8388671(%rsp)
	call	strlen@PLT
	movq	%rbp, %rdx
	movl	$1048576, %ecx
	movq	%rbx, %rdi
	movl	%eax, %esi
	call	_Z11show_vectorPciPii
	movq	%rsp, %rdi
	movl	$4194304, %esi
	call	cudaMalloc@PLT
	leaq	8(%rsp), %rdi
	movl	$4194304, %esi
	call	cudaMalloc@PLT
	movq	(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$4194304, %edx
	call	cudaMemcpy@PLT
	movl	$1024, %edx
	leaq	.LC5(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	$1024, %edx
	leaq	.LC6(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	leaq	16(%rsp), %rdi
	movl	$4096, %esi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$4096, %esi
	call	cudaMalloc@PLT
	call	clock@PLT
	movl	$4194305, %edi
	xorl	%r9d, %r9d
	movl	$8192, %r8d
	salq	$10, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movl	$1, 56(%rsp)
	movq	%rdi, %rdx
	movq	%rdi, 48(%rsp)
	movq	%rax, %rbp
	movq	%rdi, 36(%rsp)
	movl	$1, 44(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L38
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	movl	$1048576, %ecx
	movl	$1024, %edx
	call	_Z40__device_stub__Z16scan_incl_blocksPiS_iiPiS_ii
.L38:
	movl	$4194305, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	salq	$10, %rdi
	movl	$1, %esi
	movl	$1, 56(%rsp)
	movq	%rdi, %rdx
	movq	%rdi, 48(%rsp)
	movq	%rdi, 36(%rsp)
	movl	$1, 44(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L39
	movq	8(%rsp), %rsi
	movq	16(%rsp), %rdi
	movl	$1048576, %ecx
	movl	$1024, %edx
	call	_Z41__device_stub__Z17scan_getBlocksAuxPiS_iiPiS_ii
.L39:
	movl	$4194305, %edx
	xorl	%r9d, %r9d
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	salq	$10, %rdx
	movl	$8192, %r8d
	movl	$1, %esi
	movl	$1, 56(%rsp)
	movq	%rdx, 48(%rsp)
	movq	%rdi, 36(%rsp)
	movl	$1, 44(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L40
	movq	16(%rsp), %rsi
	movq	24(%rsp), %rdi
	movl	$1024, %edx
	call	_Z31__device_stub__Z9scan_inclPiS_iPiS_i
.L40:
	movl	$4194305, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	salq	$10, %rdi
	movl	$1, %esi
	movl	$1, 56(%rsp)
	movq	%rdi, %rdx
	movq	%rdi, 48(%rsp)
	movq	%rdi, 36(%rsp)
	movl	$1, 44(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L41
	movq	24(%rsp), %rsi
	movq	8(%rsp), %rdi
	movl	$1024, %edx
	call	_Z34__device_stub__Z11addToBlocksPiS_iPiS_i
.L41:
	call	clock@PLT
	leaq	4194364(%rsp), %r13
	movq	8(%rsp), %rsi
	movl	$2, %ecx
	movl	$4194304, %edx
	movq	%r13, %rdi
	movq	%rax, %rbx
	call	cudaMemcpy@PLT
	leaq	8388687(%rsp), %r12
	subq	%rbp, %rbx
	movabsq	$8295756336636061014, %rax
	movabsq	$7165064700876448099, %rdx
	movq	%rax, 8388687(%rsp)
	movq	%r12, %rdi
	movabsq	$7738151096046087777, %rax
	movq	%rdx, 8388695(%rsp)
	movabsq	$11634277324693619, %rdx
	movq	%rdx, 8388704(%rsp)
	movq	%rax, 8388696(%rsp)
	call	strlen@PLT
	movl	$1048576, %ecx
	movq	%r13, %rdx
	movq	%r12, %rdi
	movl	%eax, %esi
	call	_Z11show_vectorPciPii
	movl	$1048576, %edx
	movl	$2, %edi
	movb	$1, %al
	cvtsi2sdq	%rbx, %xmm0
	leaq	.LC9(%rip), %rsi
	mulsd	.LC7(%rip), %xmm0
	divsd	.LC8(%rip), %xmm0
	call	__printf_chk@PLT
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	8388712(%rsp), %rax
	subq	%fs:40, %rax
	je	.L42
	call	__stack_chk_fail@PLT
.L42:
	addq	$8388728, %rsp
	.cfi_def_cfa_offset 40
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	main, .-main
	.section	.rodata.str1.1
.LC10:
	.string	"_Z11addToBlocksPiS_i"
.LC11:
	.string	"_Z17scan_getBlocksAuxPiS_ii"
.LC12:
	.string	"_Z16scan_incl_blocksPiS_ii"
.LC13:
	.string	"_Z9scan_inclPiS_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2062:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC10(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z11addToBlocksPiS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC11(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z17scan_getBlocksAuxPiS_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC12(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z16scan_incl_blocksPiS_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC13(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z9scan_inclPiS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2062:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC7:
	.long	0
	.long	1083129856
	.align 8
.LC8:
	.long	0
	.long	1093567616
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#define LENGTH_V  1024*1024
#define LENGTH_SHOW 10
#define BLOCK_SIZE 1024


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <limits.h>
#include <time.h>

// Kernel: naive scan
__global__ void scan_incl(int *g_odata, int *g_idata, int ndata) {
	int thid = threadIdx.x;
	extern __shared__ int temp[];
		// Double buffer dinamically reserved

	int pout = 0, pin = 1;
	temp[pout * ndata + thid] = g_idata[thid];
	__syncthreads();

	for (int offset = 1; offset < ndata; offset *= 2) {
		pout = 1 - pout; // swap double buffer indices
		pin = 1 - pout;

		temp[pout * ndata + thid] = temp[pin * ndata + thid];
		if (thid >= offset) {
			temp[pout * ndata + thid] += temp[pin * ndata + thid - offset];
		}
		__syncthreads();
	}
  g_odata[thid] = temp[pout * ndata + thid]; // write output

}
// Kernel: block scan
__global__ void scan_incl_blocks(int *g_odata, int *g_idata, int blockSize, int ndata) {

  int block = blockIdx.x;
  int thid = threadIdx.x;
  int posArray = block * blockSize + thid;
  int numElemts;

  if (block == (ceil( (double) ndata / (double) blockSize) - 1) &&  ndata % blockSize != 0) {
    numElemts = ndata % blockSize;
  } else {
    numElemts = blockSize;
  }

	extern __shared__ int temp[];
  // Double buffer dinamically reserved
  int pout = 0, pin = 1;
  temp[pout * numElemts + thid] = g_idata[posArray];
  __syncthreads();

  for (int offset = 1; offset < numElemts; offset *= 2) {
		pout = 1 - pout; // swap double buffer indices
		pin = 1 - pout;

		temp[pout * numElemts + thid] = temp[pin * numElemts + thid];
		if (thid >= offset) {
			temp[pout * numElemts + thid] += temp[pin * numElemts + thid - offset];
    }
		__syncthreads();
  }

  g_odata[posArray] = temp[pout * numElemts + thid];
}

__global__ void scan_getBlocksAux(int *g_block, int *g_idata, int blockSize, int ndata) {

  int block = blockIdx.x;
  int thid = threadIdx.x;
  int posArray = block * blockSize + thid;

  int numElemts;

  if (block == (ceil( (double) ndata / (double) blockSize) - 1) &&  ndata % blockSize != 0) {
    numElemts = ndata % blockSize;
  } else {
    numElemts = blockSize;
  }

  if (thid == (numElemts - 1)) {
    g_block[block] = g_idata[posArray];
  }
}

__global__ void addToBlocks(int *g_odata, int *g_block, int blockSize) {

  int block = blockIdx.x;
  int thid = threadIdx.x;
  int posArray = block * blockSize + thid;

  if (block != 0) {
    g_odata[posArray] += g_block[block - 1];
  }
}

void show_vector(char *myString, int lengthMyString, int *vector, int length) {
	int j;
  printf("\n%s\n",myString);
  for (j = 0; j < lengthMyString; j++)
    printf("-");
  printf("\n");
  if (LENGTH_SHOW * 2 < length) {
		for (j = 0; j < LENGTH_SHOW; j++)
			printf(" %d", vector[j]);
		printf(" ...");
		for (j = length-LENGTH_SHOW; j < length; j++)
			printf(" %d", vector[j]);
		printf("\n");
	} else {
		for (j=0 ; j<length; j++)
			printf(" %d", vector[j]);
		printf("\n");
	}
}

int main(void) {

	int h_VectorOriginal[LENGTH_V];
  int h_VectorScanGPU[LENGTH_V];

  int *d_VectorOriginal, *d_VectorScanGPUBlocks, *d_VectorScanGPUBlocksAux, *d_VectorScanGPUBlocks2;

	int j;
	clock_t start, end;
	double time_used;

  // -----------------------

  srand(time(NULL));
	for (j = 0; j < LENGTH_V; j++) {
    h_VectorOriginal[j] = (int)(rand() % 100) - 50;
  }

	char msg1[] = "Vector original";
	show_vector(msg1, strlen(msg1), h_VectorOriginal, LENGTH_V);

  // -----------------------
  // Vector scan blocks (GPU)
  // -----------------------

  hipMalloc((void **)&d_VectorOriginal, sizeof(int) * LENGTH_V);
  hipMalloc((void **)&d_VectorScanGPUBlocks, sizeof(int) * LENGTH_V);

  hipMemcpy(d_VectorOriginal, h_VectorOriginal, sizeof(int) * LENGTH_V, hipMemcpyHostToDevice);

  int numBlocks = ceil( (double) LENGTH_V / (double) BLOCK_SIZE);

  printf("\nNumero de bloques: %d\n", numBlocks);

  int numThreads = BLOCK_SIZE;
  printf("Numero de threads: %d\n", numThreads);

  hipMalloc((void **)&d_VectorScanGPUBlocksAux, sizeof(int) * numBlocks);
  hipMalloc((void **)&d_VectorScanGPUBlocks2, sizeof(int) * numBlocks);

  start = clock();

    scan_incl_blocks <<< numBlocks, numThreads, BLOCK_SIZE * 2 * sizeof(int) >>>(
      d_VectorScanGPUBlocks,
      d_VectorOriginal,
      BLOCK_SIZE,
      LENGTH_V);

    scan_getBlocksAux <<< numBlocks, numThreads >>>(
      d_VectorScanGPUBlocksAux,
      d_VectorScanGPUBlocks,
      BLOCK_SIZE,
      LENGTH_V
    );

    scan_incl <<< 1, numBlocks, numBlocks * 2 * sizeof(int) >>>(
      d_VectorScanGPUBlocks2,
      d_VectorScanGPUBlocksAux,
      numBlocks
    );

    addToBlocks <<< numBlocks, numThreads >>>(
      d_VectorScanGPUBlocks,
      d_VectorScanGPUBlocks2,
      BLOCK_SIZE
    );

  end = clock();

	hipMemcpy(h_VectorScanGPU, d_VectorScanGPUBlocks, sizeof(int) * LENGTH_V, hipMemcpyDeviceToHost);

  // -----------------------

	char msg3[] = "Vector scan blocks (GPU)";
	show_vector(msg3, strlen(msg3), h_VectorScanGPU, LENGTH_V);

  time_used = 1000.0 * ((double)(end - start)) / CLOCKS_PER_SEC;
	printf("GPU scan kernel processing time: %f millisec. (nº elements %d)\n",time_used, LENGTH_V);

	hipFree(d_VectorOriginal);
  hipFree(d_VectorScanGPUBlocks);
  hipFree(d_VectorScanGPUBlocksAux);
}
	.text
	.file	"GPU.hip"
	.globl	_Z24__device_stub__scan_inclPiS_i # -- Begin function _Z24__device_stub__scan_inclPiS_i
	.type	_Z24__device_stub__scan_inclPiS_i,@function
_Z24__device_stub__scan_inclPiS_i:      # @_Z24__device_stub__scan_inclPiS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9scan_inclPiS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z24__device_stub__scan_inclPiS_i, .Lfunc_end0-_Z24__device_stub__scan_inclPiS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z31__device_stub__scan_incl_blocksPiS_ii # -- Begin function _Z31__device_stub__scan_incl_blocksPiS_ii
	.type	_Z31__device_stub__scan_incl_blocksPiS_ii,@function
_Z31__device_stub__scan_incl_blocksPiS_ii: # @_Z31__device_stub__scan_incl_blocksPiS_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16scan_incl_blocksPiS_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z31__device_stub__scan_incl_blocksPiS_ii, .Lfunc_end1-_Z31__device_stub__scan_incl_blocksPiS_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z32__device_stub__scan_getBlocksAuxPiS_ii # -- Begin function _Z32__device_stub__scan_getBlocksAuxPiS_ii
	.type	_Z32__device_stub__scan_getBlocksAuxPiS_ii,@function
_Z32__device_stub__scan_getBlocksAuxPiS_ii: # @_Z32__device_stub__scan_getBlocksAuxPiS_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17scan_getBlocksAuxPiS_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z32__device_stub__scan_getBlocksAuxPiS_ii, .Lfunc_end2-_Z32__device_stub__scan_getBlocksAuxPiS_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z26__device_stub__addToBlocksPiS_i # -- Begin function _Z26__device_stub__addToBlocksPiS_i
	.type	_Z26__device_stub__addToBlocksPiS_i,@function
_Z26__device_stub__addToBlocksPiS_i:    # @_Z26__device_stub__addToBlocksPiS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11addToBlocksPiS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z26__device_stub__addToBlocksPiS_i, .Lfunc_end3-_Z26__device_stub__addToBlocksPiS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z11show_vectorPciPii           # -- Begin function _Z11show_vectorPciPii
	.type	_Z11show_vectorPciPii,@function
_Z11show_vectorPciPii:                  # @_Z11show_vectorPciPii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%ecx, %ebp
	movq	%rdx, %rbx
	movl	%esi, %r14d
	movq	%rdi, %rsi
	movl	$.L.str, %edi
	xorl	%eax, %eax
	callq	printf
	testl	%r14d, %r14d
	jle	.LBB4_2
.LBB4_1:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	$45, %edi
	callq	putchar@PLT
	decl	%r14d
	jne	.LBB4_1
.LBB4_2:                                # %._crit_edge
	movl	$10, %edi
	callq	putchar@PLT
	cmpl	$21, %ebp
	jl	.LBB4_7
# %bb.3:                                # %.preheader.preheader
	xorl	%r14d, %r14d
.LBB4_4:                                # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	movl	(%rbx,%r14,4), %esi
	movl	$.L.str.3, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%r14
	cmpq	$10, %r14
	jne	.LBB4_4
# %bb.5:
	movl	$.L.str.4, %edi
	xorl	%eax, %eax
	callq	printf
	movslq	%ebp, %rax
	leaq	(%rbx,%rax,4), %rbx
	addq	$-40, %rbx
	xorl	%r14d, %r14d
.LBB4_6:                                # =>This Inner Loop Header: Depth=1
	movl	(%rbx,%r14,4), %esi
	movl	$.L.str.3, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%r14
	cmpl	$10, %r14d
	jne	.LBB4_6
	jmp	.LBB4_10
.LBB4_7:                                # %.preheader24
	testl	%ebp, %ebp
	jle	.LBB4_10
# %bb.8:                                # %.lr.ph27.preheader
	movl	%ebp, %r14d
	xorl	%r15d, %r15d
.LBB4_9:                                # %.lr.ph27
                                        # =>This Inner Loop Header: Depth=1
	movl	(%rbx,%r15,4), %esi
	movl	$.L.str.3, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%r15
	cmpq	%r15, %r14
	jne	.LBB4_9
.LBB4_10:                               # %._crit_edge28
	movl	$10, %edi
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	putchar@PLT                     # TAILCALL
.Lfunc_end4:
	.size	_Z11show_vectorPciPii, .Lfunc_end4-_Z11show_vectorPciPii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function main
.LCPI5_0:
	.byte	86                              # 0x56
	.byte	101                             # 0x65
	.byte	99                              # 0x63
	.byte	116                             # 0x74
	.byte	111                             # 0x6f
	.byte	114                             # 0x72
	.byte	32                              # 0x20
	.byte	111                             # 0x6f
	.byte	114                             # 0x72
	.byte	105                             # 0x69
	.byte	103                             # 0x67
	.byte	105                             # 0x69
	.byte	110                             # 0x6e
	.byte	97                              # 0x61
	.byte	108                             # 0x6c
	.byte	0                               # 0x0
.LCPI5_1:
	.byte	86                              # 0x56
	.byte	101                             # 0x65
	.byte	99                              # 0x63
	.byte	116                             # 0x74
	.byte	111                             # 0x6f
	.byte	114                             # 0x72
	.byte	32                              # 0x20
	.byte	115                             # 0x73
	.byte	99                              # 0x63
	.byte	97                              # 0x61
	.byte	110                             # 0x6e
	.byte	32                              # 0x20
	.byte	98                              # 0x62
	.byte	108                             # 0x6c
	.byte	111                             # 0x6f
	.byte	99                              # 0x63
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI5_2:
	.quad	0x408f400000000000              # double 1000
.LCPI5_3:
	.quad	0x412e848000000000              # double 1.0E+6
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$8388696, %rsp                  # imm = 0x800058
	.cfi_def_cfa_offset 8388736
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	xorl	%ebx, %ebx
	xorl	%edi, %edi
	callq	time
	movl	%eax, %edi
	callq	srand
.LBB5_1:                                # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$1374389535, %rax, %rcx         # imm = 0x51EB851F
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$37, %rcx
	addl	%edx, %ecx
	imull	$100, %ecx, %ecx
	negl	%ecx
	addl	%ecx, %eax
	addl	$-50, %eax
	movl	%eax, 80(%rsp,%rbx,4)
	incq	%rbx
	cmpq	$1048576, %rbx                  # imm = 0x100000
	jne	.LBB5_1
# %bb.2:
	movabsq	$4294968320, %rbx               # imm = 0x100000400
	movaps	.LCPI5_0(%rip), %xmm0           # xmm0 = [86,101,99,116,111,114,32,111,114,105,103,105,110,97,108,0]
	leaq	32(%rsp), %r14
	movaps	%xmm0, (%r14)
	movq	%r14, %rdi
	callq	strlen
	leaq	80(%rsp), %r15
	movq	%r14, %rdi
	movl	%eax, %esi
	movq	%r15, %rdx
	movl	$1048576, %ecx                  # imm = 0x100000
	callq	_Z11show_vectorPciPii
	leaq	24(%rsp), %r14
	movl	$4194304, %esi                  # imm = 0x400000
	movq	%r14, %rdi
	callq	hipMalloc
	movq	%rsp, %rdi
	movl	$4194304, %esi                  # imm = 0x400000
	callq	hipMalloc
	movq	(%r14), %rdi
	movl	$4194304, %edx                  # imm = 0x400000
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$.L.str.5, %edi
	movl	$1024, %esi                     # imm = 0x400
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.6, %edi
	movl	$1024, %esi                     # imm = 0x400
	xorl	%eax, %eax
	callq	printf
	leaq	8(%rsp), %rdi
	movl	$4096, %esi                     # imm = 0x1000
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movl	$4096, %esi                     # imm = 0x1000
	callq	hipMalloc
	callq	clock
	movq	%rax, %r14
	movl	$8192, %r8d                     # imm = 0x2000
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_4
# %bb.3:
	movq	(%rsp), %rdi
	movq	24(%rsp), %rsi
	movl	$1024, %edx                     # imm = 0x400
	movl	$1048576, %ecx                  # imm = 0x100000
	callq	_Z31__device_stub__scan_incl_blocksPiS_ii
.LBB5_4:
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_6
# %bb.5:
	movq	8(%rsp), %rdi
	movq	(%rsp), %rsi
	movl	$1024, %edx                     # imm = 0x400
	movl	$1048576, %ecx                  # imm = 0x100000
	callq	_Z32__device_stub__scan_getBlocksAuxPiS_ii
.LBB5_6:
	leaq	-1023(%rbx), %rdi
	movl	$8192, %r8d                     # imm = 0x2000
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_8
# %bb.7:
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	movl	$1024, %edx                     # imm = 0x400
	callq	_Z24__device_stub__scan_inclPiS_i
.LBB5_8:
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_10
# %bb.9:
	movq	(%rsp), %rdi
	movq	16(%rsp), %rsi
	movl	$1024, %edx                     # imm = 0x400
	callq	_Z26__device_stub__addToBlocksPiS_i
.LBB5_10:
	callq	clock
	movq	%rax, %rbx
	movq	(%rsp), %rsi
	leaq	4194384(%rsp), %r15
	movl	$4194304, %edx                  # imm = 0x400000
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movaps	.LCPI5_1(%rip), %xmm0           # xmm0 = [86,101,99,116,111,114,32,115,99,97,110,32,98,108,111,99]
	leaq	48(%rsp), %r12
	movaps	%xmm0, (%r12)
	movabsq	$2978374995121566571, %rax      # imm = 0x295550472820736B
	movq	%rax, 16(%r12)
	movb	$0, 24(%r12)
	movq	%r12, %rdi
	callq	strlen
	movq	%r12, %rdi
	movl	%eax, %esi
	movq	%r15, %rdx
	movl	$1048576, %ecx                  # imm = 0x100000
	callq	_Z11show_vectorPciPii
	subq	%r14, %rbx
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rbx, %xmm0
	mulsd	.LCPI5_2(%rip), %xmm0
	divsd	.LCPI5_3(%rip), %xmm0
	movl	$.L.str.7, %edi
	movl	$1048576, %esi                  # imm = 0x100000
	movb	$1, %al
	callq	printf
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$8388696, %rsp                  # imm = 0x800058
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	main, .Lfunc_end5-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB6_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB6_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9scan_inclPiS_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16scan_incl_blocksPiS_ii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17scan_getBlocksAuxPiS_ii, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11addToBlocksPiS_i, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end6:
	.size	__hip_module_ctor, .Lfunc_end6-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB7_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB7_2:
	retq
.Lfunc_end7:
	.size	__hip_module_dtor, .Lfunc_end7-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z9scan_inclPiS_i,@object       # @_Z9scan_inclPiS_i
	.section	.rodata,"a",@progbits
	.globl	_Z9scan_inclPiS_i
	.p2align	3, 0x0
_Z9scan_inclPiS_i:
	.quad	_Z24__device_stub__scan_inclPiS_i
	.size	_Z9scan_inclPiS_i, 8

	.type	_Z16scan_incl_blocksPiS_ii,@object # @_Z16scan_incl_blocksPiS_ii
	.globl	_Z16scan_incl_blocksPiS_ii
	.p2align	3, 0x0
_Z16scan_incl_blocksPiS_ii:
	.quad	_Z31__device_stub__scan_incl_blocksPiS_ii
	.size	_Z16scan_incl_blocksPiS_ii, 8

	.type	_Z17scan_getBlocksAuxPiS_ii,@object # @_Z17scan_getBlocksAuxPiS_ii
	.globl	_Z17scan_getBlocksAuxPiS_ii
	.p2align	3, 0x0
_Z17scan_getBlocksAuxPiS_ii:
	.quad	_Z32__device_stub__scan_getBlocksAuxPiS_ii
	.size	_Z17scan_getBlocksAuxPiS_ii, 8

	.type	_Z11addToBlocksPiS_i,@object    # @_Z11addToBlocksPiS_i
	.globl	_Z11addToBlocksPiS_i
	.p2align	3, 0x0
_Z11addToBlocksPiS_i:
	.quad	_Z26__device_stub__addToBlocksPiS_i
	.size	_Z11addToBlocksPiS_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"\n%s\n"
	.size	.L.str, 5

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	" %d"
	.size	.L.str.3, 4

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	" ..."
	.size	.L.str.4, 5

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"\nNumero de bloques: %d\n"
	.size	.L.str.5, 24

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Numero de threads: %d\n"
	.size	.L.str.6, 23

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"GPU scan kernel processing time: %f millisec. (n\302\272 elements %d)\n"
	.size	.L.str.7, 65

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z9scan_inclPiS_i"
	.size	.L__unnamed_1, 18

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z16scan_incl_blocksPiS_ii"
	.size	.L__unnamed_2, 27

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z17scan_getBlocksAuxPiS_ii"
	.size	.L__unnamed_3, 28

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z11addToBlocksPiS_i"
	.size	.L__unnamed_4, 21

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z24__device_stub__scan_inclPiS_i
	.addrsig_sym _Z31__device_stub__scan_incl_blocksPiS_ii
	.addrsig_sym _Z32__device_stub__scan_getBlocksAuxPiS_ii
	.addrsig_sym _Z26__device_stub__addToBlocksPiS_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z9scan_inclPiS_i
	.addrsig_sym _Z16scan_incl_blocksPiS_ii
	.addrsig_sym _Z17scan_getBlocksAuxPiS_ii
	.addrsig_sym _Z11addToBlocksPiS_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z9scan_inclPiS_i       ; -- Begin function _Z9scan_inclPiS_i
	.globl	_Z9scan_inclPiS_i
	.p2align	8
	.type	_Z9scan_inclPiS_i,@function
_Z9scan_inclPiS_i:                      ; @_Z9scan_inclPiS_i
; %bb.0:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_lshlrev_b32_e32 v1, 2, v0
	s_load_b32 s0, s[0:1], 0x10
	s_mov_b32 s1, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v2, 0, v1
	s_waitcnt lgkmcnt(0)
	global_load_b32 v3, v1, s[6:7]
	s_cmp_lt_i32 s0, 2
	s_waitcnt vmcnt(0)
	ds_store_b32 v2, v3
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB0_5
; %bb.1:                                ; %.lr.ph.preheader
	s_mov_b32 s2, 1
.LBB0_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_mul_i32 s3, s1, s0
	s_sub_i32 s1, 1, s1
	v_lshl_add_u32 v3, s3, 2, v2
	s_mul_i32 s6, s1, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	v_lshl_add_u32 v4, s6, 2, v2
	s_mov_b32 s6, exec_lo
	ds_load_b32 v3, v3
	s_waitcnt lgkmcnt(0)
	ds_store_b32 v4, v3
	v_cmpx_le_u32_e64 s2, v0
	s_cbranch_execz .LBB0_4
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	v_add_nc_u32_e32 v5, s3, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_subrev_nc_u32_e32 v5, s2, v5
	v_lshl_add_u32 v5, v5, 2, 0
	ds_load_b32 v5, v5
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v3, v5, v3
	ds_store_b32 v4, v3
.LBB0_4:                                ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_lshl_b32 s2, s2, 1
	s_waitcnt lgkmcnt(0)
	s_cmp_ge_i32 s2, s0
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB0_2
.LBB0_5:                                ; %Flow42
	s_mul_i32 s0, s1, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	v_lshl_add_u32 v0, s0, 2, v2
	ds_load_b32 v0, v0
	s_waitcnt lgkmcnt(0)
	global_store_b32 v1, v0, s[4:5]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9scan_inclPiS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 20
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 8
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z9scan_inclPiS_i, .Lfunc_end0-_Z9scan_inclPiS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 276
; NumSgprs: 8
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 8
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z16scan_incl_blocksPiS_ii ; -- Begin function _Z16scan_incl_blocksPiS_ii
	.globl	_Z16scan_incl_blocksPiS_ii
	.p2align	8
	.type	_Z16scan_incl_blocksPiS_ii,@function
_Z16scan_incl_blocksPiS_ii:             ; @_Z16scan_incl_blocksPiS_ii
; %bb.0:
	s_load_b64 s[4:5], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	v_cvt_f64_i32_e32 v[1:2], s5
	v_cvt_f64_i32_e32 v[3:4], s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f64 v[5:6], null, v[3:4], v[3:4], v[1:2]
	v_rcp_f64_e32 v[7:8], v[5:6]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[9:10], -v[5:6], v[7:8], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[7:8], v[7:8], v[9:10], v[7:8]
	v_fma_f64 v[9:10], -v[5:6], v[7:8], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[7:8], v[7:8], v[9:10], v[7:8]
	v_div_scale_f64 v[9:10], vcc_lo, v[1:2], v[3:4], v[1:2]
	v_mul_f64 v[11:12], v[9:10], v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[5:6], -v[5:6], v[11:12], v[9:10]
	v_div_fmas_f64 v[5:6], v[5:6], v[7:8], v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fixup_f64 v[1:2], v[5:6], v[3:4], v[1:2]
	v_cvt_f64_i32_e32 v[3:4], s15
	v_ceil_f64_e32 v[1:2], v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[1:2], v[1:2], -1.0
	v_cmp_neq_f64_e64 s2, v[1:2], v[3:4]
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB1_2
; %bb.1:
	s_ashr_i32 s2, s4, 31
	s_ashr_i32 s7, s5, 31
	s_add_i32 s3, s4, s2
	s_add_i32 s5, s5, s7
	s_xor_b32 s2, s3, s2
	s_xor_b32 s5, s5, s7
	v_cvt_f32_u32_e32 v1, s2
	s_sub_i32 s6, 0, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	v_cvt_u32_f32_e32 v1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s3, v1
	s_mul_i32 s6, s6, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s6, s3, s6
	s_add_i32 s3, s3, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s3, s5, s3
	s_mul_i32 s3, s3, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_sub_i32 s3, s5, s3
	s_sub_i32 s5, s3, s2
	s_cmp_ge_u32 s3, s2
	s_cselect_b32 s3, s5, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_sub_i32 s5, s3, s2
	s_cmp_ge_u32 s3, s2
	s_cselect_b32 s2, s5, s3
	s_xor_b32 s2, s2, s7
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_sub_i32 s5, s2, s7
	s_cmp_eq_u32 s5, 0
	s_cselect_b32 s2, -1, 0
	s_branch .LBB1_3
.LBB1_2:
                                        ; implicit-def: $sgpr5
.LBB1_3:                                ; %Flow60
	s_and_not1_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB1_5
; %bb.4:
	s_mov_b32 s5, s4
.LBB1_5:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	s_cmp_lt_i32 s5, 2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s2, v1
	v_add_co_ci_u32_e32 v4, vcc_lo, s3, v2, vcc_lo
	s_mov_b32 s2, 0
	global_load_b32 v4, v[3:4], off
	v_lshl_add_u32 v3, v0, 2, 0
	s_waitcnt vmcnt(0)
	ds_store_b32 v3, v4
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB1_10
; %bb.6:                                ; %.lr.ph.preheader
	s_mov_b32 s3, 1
.LBB1_7:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_mul_i32 s4, s2, s5
	s_sub_i32 s2, 1, s2
	v_lshl_add_u32 v4, s4, 2, v3
	s_mul_i32 s6, s2, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	v_lshl_add_u32 v5, s6, 2, v3
	s_mov_b32 s6, exec_lo
	ds_load_b32 v4, v4
	s_waitcnt lgkmcnt(0)
	ds_store_b32 v5, v4
	v_cmpx_le_u32_e64 s3, v0
	s_cbranch_execz .LBB1_9
; %bb.8:                                ;   in Loop: Header=BB1_7 Depth=1
	v_add_nc_u32_e32 v6, s4, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_subrev_nc_u32_e32 v6, s3, v6
	v_lshl_add_u32 v6, v6, 2, 0
	ds_load_b32 v6, v6
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v4, v6, v4
	ds_store_b32 v5, v4
.LBB1_9:                                ;   in Loop: Header=BB1_7 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_lshl_b32 s3, s3, 1
	s_waitcnt lgkmcnt(0)
	s_cmp_ge_i32 s3, s5
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB1_7
.LBB1_10:                               ; %Flow59
	s_mul_i32 s2, s2, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	v_lshl_add_u32 v0, s2, 2, v3
	ds_load_b32 v3, v0
	v_add_co_u32 v0, vcc_lo, s0, v1
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v2, vcc_lo
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[0:1], v3, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16scan_incl_blocksPiS_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 24
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 13
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z16scan_incl_blocksPiS_ii, .Lfunc_end1-_Z16scan_incl_blocksPiS_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 648
; NumSgprs: 18
; NumVgprs: 13
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 13
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z17scan_getBlocksAuxPiS_ii ; -- Begin function _Z17scan_getBlocksAuxPiS_ii
	.globl	_Z17scan_getBlocksAuxPiS_ii
	.p2align	8
	.type	_Z17scan_getBlocksAuxPiS_ii,@function
_Z17scan_getBlocksAuxPiS_ii:            ; @_Z17scan_getBlocksAuxPiS_ii
; %bb.0:
	s_load_b64 s[4:5], s[0:1], 0x10
	s_mov_b32 s2, s15
	s_waitcnt lgkmcnt(0)
	v_cvt_f64_i32_e32 v[1:2], s5
	v_cvt_f64_i32_e32 v[3:4], s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f64 v[5:6], null, v[3:4], v[3:4], v[1:2]
	v_rcp_f64_e32 v[7:8], v[5:6]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[9:10], -v[5:6], v[7:8], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[7:8], v[7:8], v[9:10], v[7:8]
	v_fma_f64 v[9:10], -v[5:6], v[7:8], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[7:8], v[7:8], v[9:10], v[7:8]
	v_div_scale_f64 v[9:10], vcc_lo, v[1:2], v[3:4], v[1:2]
	v_mul_f64 v[11:12], v[9:10], v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[5:6], -v[5:6], v[11:12], v[9:10]
	v_div_fmas_f64 v[5:6], v[5:6], v[7:8], v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fixup_f64 v[1:2], v[5:6], v[3:4], v[1:2]
	v_cvt_f64_i32_e32 v[3:4], s2
	v_ceil_f64_e32 v[1:2], v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[1:2], v[1:2], -1.0
	v_cmp_neq_f64_e64 s6, v[1:2], v[3:4]
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB2_2
; %bb.1:
	s_ashr_i32 s3, s4, 31
	s_ashr_i32 s8, s5, 31
	s_add_i32 s6, s4, s3
	s_add_i32 s5, s5, s8
	s_xor_b32 s3, s6, s3
	s_xor_b32 s5, s5, s8
	v_cvt_f32_u32_e32 v1, s3
	s_sub_i32 s7, 0, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	v_cvt_u32_f32_e32 v1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s6, v1
	s_mul_i32 s7, s7, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s7, s6, s7
	s_add_i32 s6, s6, s7
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s6, s5, s6
	s_mul_i32 s6, s6, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_sub_i32 s5, s5, s6
	s_sub_i32 s6, s5, s3
	s_cmp_ge_u32 s5, s3
	s_cselect_b32 s5, s6, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_sub_i32 s6, s5, s3
	s_cmp_ge_u32 s5, s3
	s_cselect_b32 s3, s6, s5
	s_xor_b32 s3, s3, s8
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_sub_i32 s3, s3, s8
	s_cmp_eq_u32 s3, 0
	s_cselect_b32 s6, -1, 0
	s_branch .LBB2_3
.LBB2_2:
                                        ; implicit-def: $sgpr3
.LBB2_3:                                ; %Flow
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB2_5
; %bb.4:
	s_mov_b32 s3, s4
.LBB2_5:
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s3, s3, -1
	v_cmp_eq_u32_e32 vcc_lo, s3, v0
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB2_7
; %bb.6:
	s_load_b128 s[8:11], s[0:1], 0x0
	v_mad_u64_u32 v[1:2], null, s2, s4, v[0:1]
	s_ashr_i32 s3, s2, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_lshl_b64 s[0:1], s[2:3], 2
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s10, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s11, v1, vcc_lo
	s_add_u32 s0, s8, s0
	s_addc_u32 s1, s9, s1
	global_load_b32 v0, v[0:1], off
	v_mov_b32_e32 v1, 0
	s_waitcnt vmcnt(0)
	global_store_b32 v1, v0, s[0:1]
.LBB2_7:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17scan_getBlocksAuxPiS_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 24
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 13
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z17scan_getBlocksAuxPiS_ii, .Lfunc_end2-_Z17scan_getBlocksAuxPiS_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 464
; NumSgprs: 18
; NumVgprs: 13
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 13
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z11addToBlocksPiS_i    ; -- Begin function _Z11addToBlocksPiS_i
	.globl	_Z11addToBlocksPiS_i
	.p2align	8
	.type	_Z11addToBlocksPiS_i,@function
_Z11addToBlocksPiS_i:                   ; @_Z11addToBlocksPiS_i
; %bb.0:
	s_cmp_eq_u32 s15, 0
	s_cbranch_scc1 .LBB3_2
; %bb.1:
	s_clause 0x1
	s_load_b32 s3, s[0:1], 0x10
	s_load_b128 s[4:7], s[0:1], 0x0
	s_mov_b32 s2, s15
	s_waitcnt lgkmcnt(0)
	v_mad_u64_u32 v[1:2], null, s2, s3, v[0:1]
	s_ashr_i32 s3, s15, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[2:3], 2
	s_add_u32 s0, s6, s0
	s_addc_u32 s1, s7, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	s_add_u32 s0, s0, -4
	s_addc_u32 s1, s1, -1
	s_load_b32 s0, s[0:1], 0x0
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	global_load_b32 v2, v[0:1], off
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v2, s0, v2
	global_store_b32 v[0:1], v2, off
.LBB3_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11addToBlocksPiS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 20
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 3
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z11addToBlocksPiS_i, .Lfunc_end3-_Z11addToBlocksPiS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 148
; NumSgprs: 18
; NumVgprs: 3
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 3
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 20
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9scan_inclPiS_i
    .private_segment_fixed_size: 0
    .sgpr_count:     8
    .sgpr_spill_count: 0
    .symbol:         _Z9scan_inclPiS_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 24
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z16scan_incl_blocksPiS_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z16scan_incl_blocksPiS_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     13
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 24
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z17scan_getBlocksAuxPiS_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z17scan_getBlocksAuxPiS_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     13
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 20
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11addToBlocksPiS_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z11addToBlocksPiS_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     3
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
