#include <iostream>
#include <math.h>

// Kernel function to add the elements of two arrays
//Good Reference: http://developer.download.nvidia.com/compute/cuda/3_2_prod/toolkit/docs/CUDA_C_Programming_Guide.pdf

//Resource for multiply: https://github.com/sashasyedin/matrix-multiplication-with-cuda
#include <cstdlib>
#include <iostream>
#include <time.h>
#include <cuda_runtime_api.h>
#include <stdio.h>

#include <stdlib.h>
#include <time.h>

double Afull[12][12] = {{0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.9988, -0.0009, 0.0493, 0.0000, 0.0000, 0.0000},
{0.0000, 0.0000, 0.0000, 3.3325, 0.0000, -67.5899, 0.0000, -0.9998, -0.0175, 0.0000, 0.0000, 0.0000},
{0.0000, 0.0000, 0.0000, 0.0000, 67.5899, 0.0000, 0.0493, 0.0175, -0.9986, 0.0000, 0.0000, 0.0000},
{0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 1.0000, -0.0009, 0.0494},
{0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.9998, 0.0175},
{0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, -0.0176, 1.0011},
{-0.0000, -0.0000, 0.0002, -1.7910, -28.7478, 0.0000, -0.0156, -0.0014, 0.0264, -1.0130, 1.1241, -0.4113},
{0.0000, 0.0000, 0.0001, 33.1424, -0.3921, -0.0000, 0.0079, -0.1015, 0.0165, -1.5512, -1.5106, -65.9068},
{-0.0000, -0.0000, -0.0033, -2.6711, 1.7629, -0.0000, -0.1352, 0.0043, -0.6177, 8.8359, 68.2588, 2.0707},
{0.0000, 0.0000, 0.0002, -0.7252, -0.6595, -0.0000, 0.0058, -0.0292, 0.0424, -7.1172, -1.6572, 0.1983},
{-0.0000, -0.0000, 0.0000, 0.0642, -0.7286, 0.0000, 0.0019, 0.0059, -0.0013, 0.0097, -1.5146, -0.0941},
{-0.0000, -0.0000, 0.0000, -0.8489, 0.0071, 0.0000, -0.0036, 0.0167, -0.0027, -0.1995, -0.0263, -0.6115}};

double Bfull[12][4] = {{0.0000, 0.0000, 0.0000, 0.0000},
{0.0000, 0.0000, 0.0000, 0.0000},
{0.0000, 0.0000, 0.0000, 0.0000},
{0.0000, 0.0000, 0.0000, 0.0000},
{0.0000, 0.0000, 0.0000, 0.0000},
{0.0000, 0.0000, 0.0000, 0.0000},
{-0.1577, -0.0046, 0.0529, 0.0601},
{0.0197, 0.0977, -0.0752, 0.0082},
{-0.1559, 0.0106, 0.0865, -0.8894},
{0.0307, 0.1185, -0.0356, 0.0067},
{0.0339, 0.0007, -0.0022, 0.0024},
{-0.0004, 0.0037, 0.0222, 0.0058}};

__global__
void add(int n, float *x, float *y)
{
  for (int i = 0; i < n; i++)
    y[i] = x[i] + y[i];
}

__global__
void fill1D(int length, double matrix[], double num) {
    for (int i = 0; i < length; i++) {
        matrix[i] = num;
    }
}

__global__
void fill2D(double* devPtr, size_t pitch, int width, int height) {
    for (int r = 0; r < height; ++r) {
        double * row = (double*)((char*)devPtr + r * pitch);
        for (int c = 0; c < width; ++c) {
            double element = row[c];
            // printf("%f", row[c]);
        }
    }
}

__global__
void fill2D_specific(double* devPtr, size_t pitch, int width, int height) {
    double Afull[12][12] = {{0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.9988, -0.0009, 0.0493, 0.0000, 0.0000, 0.0000},
    {0.0000, 0.0000, 0.0000, 3.3325, 0.0000, -67.5899, 0.0000, -0.9998, -0.0175, 0.0000, 0.0000, 0.0000},
    {0.0000, 0.0000, 0.0000, 0.0000, 67.5899, 0.0000, 0.0493, 0.0175, -0.9986, 0.0000, 0.0000, 0.0000},
    {0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 1.0000, -0.0009, 0.0494},
    {0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.9998, 0.0175},
    {0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, -0.0176, 1.0011},
    {-0.0000, -0.0000, 0.0002, -1.7910, -28.7478, 0.0000, -0.0156, -0.0014, 0.0264, -1.0130, 1.1241, -0.4113},
    {0.0000, 0.0000, 0.0001, 33.1424, -0.3921, -0.0000, 0.0079, -0.1015, 0.0165, -1.5512, -1.5106, -65.9068},
    {-0.0000, -0.0000, -0.0033, -2.6711, 1.7629, -0.0000, -0.1352, 0.0043, -0.6177, 8.8359, 68.2588, 2.0707},
    {0.0000, 0.0000, 0.0002, -0.7252, -0.6595, -0.0000, 0.0058, -0.0292, 0.0424, -7.1172, -1.6572, 0.1983},
    {-0.0000, -0.0000, 0.0000, 0.0642, -0.7286, 0.0000, 0.0019, 0.0059, -0.0013, 0.0097, -1.5146, -0.0941},
    {-0.0000, -0.0000, 0.0000, -0.8489, 0.0071, 0.0000, -0.0036, 0.0167, -0.0027, -0.1995, -0.0263, -0.6115}};

    double Bfull[12][4] = {{0.0000, 0.0000, 0.0000, 0.0000},
    {0.0000, 0.0000, 0.0000, 0.0000},
    {0.0000, 0.0000, 0.0000, 0.0000},
    {0.0000, 0.0000, 0.0000, 0.0000},
    {0.0000, 0.0000, 0.0000, 0.0000},
    {0.0000, 0.0000, 0.0000, 0.0000},
    {-0.1577, -0.0046, 0.0529, 0.0601},
    {0.0197, 0.0977, -0.0752, 0.0082},
    {-0.1559, 0.0106, 0.0865, -0.8894},
    {0.0307, 0.1185, -0.0356, 0.0067},
    {0.0339, 0.0007, -0.0022, 0.0024},
    {-0.0004, 0.0037, 0.0222, 0.0058}};

    if (width == 12) {
        for (int r = 0; r < height; ++r) {
            double * row = (double*)((char*)devPtr + r * pitch);
            for (int c = 0; c < width; ++c) {
                // double element = row[c];
                row[c] = Afull[r][c];
                // printf("%f", row[c]);
            }
        }
    } else {
        for (int r = 0; r < height; ++r) {
            double * row = (double*)((char*)devPtr + r * pitch);
            for (int c = 0; c < width; ++c) {
                // double element = row[c];
                row[c] = Bfull[r][c];
                // printf("%f", row[c]);
            }
        }
    }

}

__global__ void fill3D(cudaPitchedPtr devPitchedPtr, int width, int height, int depth) {
    char* devPtr = (char*)devPitchedPtr.ptr;
    size_t pitch = devPitchedPtr.pitch;
    size_t slicePitch = pitch * height;
    for (int z = 0; z < depth; ++z) {
        char* slice = devPtr + z * slicePitch;
        for (int y = 0; y < height; ++y) {
            double* row = (double*)(slice + y * pitch);
            for (int x = 0; x < width; ++x) {
                double element = row[x];
            }
        }
    }
}

__global__
void fill3Dto2D(cudaPitchedPtr devPitchedPtr, int width, int height, int depth, double* devPtr2, double factor) {
    char* devPtr = (char*)devPitchedPtr.ptr;
    size_t pitch = devPitchedPtr.pitch;
    size_t slicePitch = pitch * height;
    for (int z = 0; z < depth; ++z) {
        char* slice = devPtr + z * slicePitch;
        for (int y = 0; y < height; ++y) {
            double* row = (double*)(slice + y * pitch);
            double * row_devPtr2 = (double*)((char*)devPtr2 + y * pitch);
            for (int x = 0; x < width; ++x) {
                // double element = row[x];
                row_devPtr2[x] = factor * abs(row[x]);
            }
        }
    }
}

__global__
void func1(cudaPitchedPtr devPitchedPtr, int width, int height, int depth, double* delPtr, double* ddelPtr, double factor) {
    char* devPtr = (char*)devPitchedPtr.ptr;
    size_t pitch = devPitchedPtr.pitch;
    size_t slicePitch = pitch * height;
    for (int z = 0; z < depth; ++z) {
        char* slice = devPtr + z * slicePitch;
        for (int y = 0; y < height; ++y) {
            double* row = (double*)(slice + y * pitch);
            double * delPtr_row = (double*)((char*)delPtr + y * pitch);
            double * ddelPtr_row = (double*)((char*)ddelPtr + y * pitch);
            for (int x = 0; x < width; ++x) {
                // double element = row[x];
                // factor is the random number
                ddelPtr_row[x] = 2 * delPtr_row[x] * factor * row[x] - delPtr_row[x];
            }
        }
    }
}

__global__
void func2(cudaPitchedPtr devPitchedPtr, int width, int height, int depth, double* delPtr, double* ddelPtr, double factor) {
    char* devPtr = (char*)devPitchedPtr.ptr;
    size_t pitch = devPitchedPtr.pitch;
    size_t slicePitch = pitch * height;
    for (int z = 0; z < depth; ++z) {
        char* slice = devPtr + z * slicePitch;
        for (int y = 0; y < height; ++y) {
            double* row = (double*)(slice + y * pitch);
            double * delPtr_row = (double*)((char*)delPtr + y * pitch);
            double * ddelPtr_row = (double*)((char*)ddelPtr + y * pitch);
            for (int x = 0; x < width; ++x) {
                // double element = row[x];
                // factor is the random number
                delPtr_row[x] = row[x] + ddelPtr_row[x];
            }
        }
    }
}

// Matrix multiplication functions
// c = a * b
// a: m x n
// b: n x k
// c: m x k
__global__ void mmult_kernel(int m, int n, int k, const double * a, const double * b, double * c)
{
	int globx = blockIdx.x * blockDim.x + threadIdx.x;
	int globy = blockIdx.y * blockDim.y + threadIdx.y;

	__shared__ int l;

	for (l = 0; l < n; l++)
		c[globx * k + globy] += a[globx * n + l] * b[l * k + globy];
}

void mmult_gpu(int m, int n, int k, const double * a, const double * b, double * c)
{
	dim3 dim_Grid(m, k);
	// dim3 dim_Block(BLOCK_SIZE,BLOCK_SIZE);
	mmult_kernel<<<1, 13>>>(m, n, k, a, b, c);
}

// __device__
// void pvs_helper1(cudaPitchedPtr devPitchedPtr, int width, int height, int depth, double* Afull_ptr, double* Bfull_ptr, double* del_bi, double* del_pi, double* del_ci, int k, int l, int dt) {
//     char* devPtr = (char*)devPitchedPtr.ptr;
//     size_t pitch = devPitchedPtr.pitch;
//     size_t slicePitch = pitch * height;
//     for (int z = l; z < l + 1; ++z) {
//         char* slice = devPtr + z * slicePitch;
//         for (int y = 0; y < height; ++y) {
//             double* row = (double*)(slice + y * pitch);
//             for (int x = k; x < k + 1; ++x) {
//                 // double element = row[x];
//                 // states_p(:,k,l) = states_p(:,k-1,l) + dt*(Afull*states_p(:,k-1,l)+Bfull*0.5*([del_bi(1,k-1,l);del_ai(1,k-1,l);del_pi(1,k-1,l);del_ci(1,k-1,l)]+[del_bi(1,k,l);del_ai(1,k,l);del_pi(1,k,l);del_ci(1,k,l)]));
//
//                 // row[x] = row[x - 1] + dt *
//
//             }
//         }
//     }
// }

__global__
void predicted_vehicle_state(cudaPitchedPtr states_p, cudaPitchedPtr out_states_p, double* del_bi, double* del_ai, double* del_pi, double* del_ci, double dt, int j, double* Afull_ptr, double* Bfull_ptr, double trim_val[]) {
    double Afull[12][12] = {{0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.9988, -0.0009, 0.0493, 0.0000, 0.0000, 0.0000},
    {0.0000, 0.0000, 0.0000, 3.3325, 0.0000, -67.5899, 0.0000, -0.9998, -0.0175, 0.0000, 0.0000, 0.0000},
    {0.0000, 0.0000, 0.0000, 0.0000, 67.5899, 0.0000, 0.0493, 0.0175, -0.9986, 0.0000, 0.0000, 0.0000},
    {0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 1.0000, -0.0009, 0.0494},
    {0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.9998, 0.0175},
    {0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, -0.0176, 1.0011},
    {-0.0000, -0.0000, 0.0002, -1.7910, -28.7478, 0.0000, -0.0156, -0.0014, 0.0264, -1.0130, 1.1241, -0.4113},
    {0.0000, 0.0000, 0.0001, 33.1424, -0.3921, -0.0000, 0.0079, -0.1015, 0.0165, -1.5512, -1.5106, -65.9068},
    {-0.0000, -0.0000, -0.0033, -2.6711, 1.7629, -0.0000, -0.1352, 0.0043, -0.6177, 8.8359, 68.2588, 2.0707},
    {0.0000, 0.0000, 0.0002, -0.7252, -0.6595, -0.0000, 0.0058, -0.0292, 0.0424, -7.1172, -1.6572, 0.1983},
    {-0.0000, -0.0000, 0.0000, 0.0642, -0.7286, 0.0000, 0.0019, 0.0059, -0.0013, 0.0097, -1.5146, -0.0941},
    {-0.0000, -0.0000, 0.0000, -0.8489, 0.0071, 0.0000, -0.0036, 0.0167, -0.0027, -0.1995, -0.0263, -0.6115}};

    double Bfull[12][4] = {{0.0000, 0.0000, 0.0000, 0.0000},
    {0.0000, 0.0000, 0.0000, 0.0000},
    {0.0000, 0.0000, 0.0000, 0.0000},
    {0.0000, 0.0000, 0.0000, 0.0000},
    {0.0000, 0.0000, 0.0000, 0.0000},
    {0.0000, 0.0000, 0.0000, 0.0000},
    {-0.1577, -0.0046, 0.0529, 0.0601},
    {0.0197, 0.0977, -0.0752, 0.0082},
    {-0.1559, 0.0106, 0.0865, -0.8894},
    {0.0307, 0.1185, -0.0356, 0.0067},
    {0.0339, 0.0007, -0.0022, 0.0024},
    {-0.0004, 0.0037, 0.0222, 0.0058}};

    double u0 = trim_val[0];
    double v0 = trim_val[1];
    double w0 = trim_val[2];
    double phi0 = trim_val[3];
    double theta0 = trim_val[4];
    double psi0 = trim_val[5];

    char* states_p_ptr = (char*) states_p.ptr;
    size_t states_p_pitch = states_p.pitch;
    size_t states_p_slicePitch = states_p_pitch * 12;

    char* out_states_p_ptr = (char*) out_states_p.ptr;
    size_t out_states_p_pitch = out_states_p.pitch;
    size_t out_states_p_slicePitch = out_states_p_pitch * 6;

    //depth
    for (int l = 0; l < 100; ++l) {
        char* states_p_slice = states_p_ptr + l * states_p_slicePitch;
        char* out_states_p_slice = out_states_p_ptr + l * out_states_p_slicePitch;

        double* row1 = (double*)(states_p_slice + 0 * states_p_pitch);
        double* row2 = (double*)(states_p_slice + 1 * states_p_pitch);
        double* row3 = (double*)(states_p_slice + 2 * states_p_pitch);
        double* row4 = (double*)(states_p_slice + 3 * states_p_pitch);
        double* row5 = (double*)(states_p_slice + 4 * states_p_pitch);
        double* row6 = (double*)(states_p_slice + 5 * states_p_pitch);
        double* row7 = (double*)(states_p_slice + 6 * states_p_pitch);
        double* row8 = (double*)(states_p_slice + 7 * states_p_pitch);
        double* row9 = (double*)(states_p_slice + 8 * states_p_pitch);
        double* row10 = (double*)(states_p_slice + 9 * states_p_pitch);
        double* row11 = (double*)(states_p_slice + 10 * states_p_pitch);
        double* row12 = (double*)(states_p_slice + 11 * states_p_pitch);

        double* row_out1 = (double*)(out_states_p_slice + 0 * out_states_p_pitch);
        double* row_out2 = (double*)(out_states_p_slice + 1 * out_states_p_pitch);
        double* row_out3 = (double*)(out_states_p_slice + 2 * out_states_p_pitch);
        double* row_out4 = (double*)(out_states_p_slice + 3 * out_states_p_pitch);
        double* row_out5 = (double*)(out_states_p_slice + 4 * out_states_p_pitch);
        double* row_out6 = (double*)(out_states_p_slice + 5 * out_states_p_pitch);
        //height or row
        for (int m = 0; m < 12; ++m) {
            double* row = (double*)(states_p_slice + m * states_p_pitch);
            // double* row_out = (double*)(out_states_p_slice + m * out_states_p_pitch);
            double * row_del_bi = (double*)((char*)del_bi + 0 * states_p_pitch);
            double * row_del_ai = (double*)((char*)del_ai + 0 * states_p_pitch);
            double * row_del_pi = (double*)((char*)del_pi + 0 * states_p_pitch);
            double * row_del_ci = (double*)((char*)del_ci + 0 * states_p_pitch);

            //width or column
            for (int k = j - 1; k < 400; ++k) {
                //Afull * states_p[k -1]
                double temp1 = 0;
                for(int indx1 = 0; indx1 < 12; indx1++) {
                    temp1 += Afull[m][indx1] * row[k - 1];
                }

                double temp2 = 0;
                temp2 = Bfull[m][0] * 0.5 * (row_del_bi[k - 1] + row_del_bi[k])
                        + Bfull[m][1] * 0.5 * (row_del_ai[k - 1] + row_del_ai[k])
                        + Bfull[m][2] * 0.5 * (row_del_pi[k - 1] + row_del_pi[k])
                        + Bfull[m][3] * 0.5 * (row_del_ci[k - 1] + row_del_ci[k]);

                row[k] = row[k - 1] + dt * (temp1 + temp2);


                row_out1[k] = cos(theta0+row5[k])*cos(psi0+row6[k])*(u0+row7[k]) + (sin(phi0+row4[k])*sin(theta0+row5[k])*cos(psi0+row6[k])
                            - cos(phi0+row4[k])*sin(psi0+row6[k]))*(v0+row8[k]) + (cos(phi0+row4[k])*sin(theta0+row5[k])*cos(psi0+row6[k])
                            + sin(phi0+row4[k])*sin(psi0+row6[k]))*(w0+row9[k]);

                row_out2[k] = -(cos(theta0+row5[k])*sin(psi0+row6[k])*(u0+row7[k]) + (sin(phi0+row4[k])*sin(theta0+row5[k])*sin(psi0+row6[k])
                        + cos(phi0+row4[k])*cos(psi0+row6[k]))*(v0+row8[k]) + (cos(phi0+row4[k])*sin(theta0+row5[k])*sin(psi0+row6[k])
                        - sin(phi0+row4[k])*cos(psi0+row6[k]))*(w0+row9[k]));

                row_out3[k] = -(-sin(theta0+row5[k])*(u0+row7[k]) + sin(phi0+row4[k])*cos(theta0+row5[k])*(v0+row8[k])
                    + cos(phi0+row4[k])*cos(theta0+row5[k])*(w0+row9[k]));

                row_out4[k] = row1[k];
                row_out5[k] = row2[k];
                row_out6[k] = row3[k];
                // break;
            }
        }
    }


}


__global__
void helper1(cudaPitchedPtr Ji, cudaPitchedPtr out_states_p, double dt, int j, double* del_bi, double* del_ai,
    double* del_pi, double* del_ci, double* X_optdel, double* U_opt, double* V_opt, double* Y_opt, double* W_opt, double* Z_opt,
    int* n) {
    // int n = 0;  //Starts counter for trajectories with final position outside of specified band
    double U0_opt = 67.5;
    double V0_opt = 0;
    double W0_opt = 0;
    double X0_opt = -1100;
    double Y0_opt = 550;
    double Z0_opt = 100;
    char* out_states_p_ptr = (char*) out_states_p.ptr;
    size_t out_states_p_pitch = out_states_p.pitch;
    size_t out_states_p_slicePitch = out_states_p_pitch * 6;

    char* Ji_ptr = (char*) Ji.ptr;
    size_t Ji_pitch = Ji.pitch;
    size_t Ji_slicePitch = Ji_pitch * 6;

    double band_u = 3;
    double band_v = 3;
    double band_w = 3;
    double band_x = 5;
    double band_y = 5;
    double band_z = 5;

    double us0 = 33.49;
    //Calculates the performance index for each trajectory
    //These should be fixed by Malloc
    double pathcost[4][400][100];
    double us[400];
    double xeq[400];
    double xseq[400];
    double xs[400];
    double vs[400];
    double ys[400];
    double ws[400];
    double zs[400];
    double F[400];

    for (int l = 1; l < 100; l++) {
        double pc[4] = {};
        char* out_states_p_slice = out_states_p_ptr + l * out_states_p_slicePitch;
        double* row_out1 = (double*)(out_states_p_slice + 0 * out_states_p_pitch);
        double* row_out2 = (double*)(out_states_p_slice + 1 * out_states_p_pitch);
        double* row_out3 = (double*)(out_states_p_slice + 2 * out_states_p_pitch);
        double* row_out4 = (double*)(out_states_p_slice + 3 * out_states_p_pitch);
        double* row_out5 = (double*)(out_states_p_slice + 4 * out_states_p_pitch);
        double* row_out6 = (double*)(out_states_p_slice + 5 * out_states_p_pitch);

        double * row_del_bi = (double*)((char*)del_bi + 0 * out_states_p_pitch);
        double * row_del_ai = (double*)((char*)del_ai + 0 * out_states_p_pitch);
        double * row_del_pi = (double*)((char*)del_pi + 0 * out_states_p_pitch);
        double * row_del_ci = (double*)((char*)del_ci + 0 * out_states_p_pitch);

        char* Ji_slice = Ji_ptr + l * Ji_slicePitch;


        for (int k = j - 1; k < 400; k++) {
            // pc(1)=pc(1)+0.5*dt*(0.025*del_bi(1,k,l)^2+0.25*((out_states_p(1,j,l)-(U0_opt+U_opt(j)))^2)+(1e-06)*((out_states_p(4,j,l)-X_optdel(j))^2));   %Calculates path cost for each trajectory
            pc[0] = pc[0] + 0.5 * dt * (0.025 * row_del_bi[k] * row_del_bi[k] + 0.25 * ((row_out1[j - 1]) - (U0_opt + U_opt[j - 1])) * ((row_out1[j - 1]) - (U0_opt + U_opt[j - 1])) + (0.000001) *(row_out4[j - 1] - X_optdel[j - 1]) * (row_out4[j - 1] - X_optdel[j - 1]));
            // pc(2)=pc(2)+0.5*dt*(0.025*del_ai(1,k,l)^2+0.0167*((out_states_p(2,j,l)-(V0_opt+V_opt(j)))^2)+(2.5e-05)*((out_states_p(5,j,l)-Y_opt(j))^2));   %Calculates path cost for each trajectory
            pc[1] = pc[1] + 0.5 * dt * (0.025 * row_del_ai[k] * row_del_bi[k] + 0.0167 * ((row_out2[j - 1]) - (V0_opt + V_opt[j - 1])) * ((row_out1[j - 1]) - (V0_opt + V_opt[j - 1])) + (0.000025) *(row_out5[j - 1] - Y_opt[j - 1]) * (row_out5[j - 1] - Y_opt[j - 1]));
            // pc(3)=pc(3)+0.5*dt*(0.05*del_pi(1,k,l)^2);   %Calculates path cost for each trajectory
            pc[2] = pc[2] + 0.5 * dt * (0.05 * row_del_pi[k] * row_del_pi[k]) * (0.05 * row_del_pi[k] * row_del_pi[k]);
            // pc(4)=pc(4)+0.5*dt*(0.025*del_ci(1,k,l)^2+0.25*((out_states_p(4,j,l)-(W0_opt+W_opt(j)))^2)+0.0025*((out_states_p(6,j,l)-Z_opt(j))^2));   %Calculates path cost for each trajectory
            pc[3] = pc[3] + 0.5 * dt * (0.025 * row_del_ci[k] * row_del_ci[k] + 0.25 * ((row_out4[j - 1]) - (W0_opt + W_opt[j - 1])) * ((row_out4[j - 1]) - (W0_opt + W_opt[j - 1])) + (0.00025) *(row_out6[j - 1] - Z_opt[j - 1]) * (row_out5[j - 1] - Z_opt[j - 1]));
        }
        pathcost[0][j - 1][l] = pc[0];
        pathcost[1][j - 1][l] = pc[1];
        pathcost[2][j - 1][l] = pc[2];
        pathcost[3][j - 1][l] = pc[3];

        if (abs(row_out1[399]-(us0+us[399]))>band_u && abs(row_out4[399] + xeq[399]+X0_opt-(xseq[399]+xs[399]))>band_x &&
                abs(row_out2[399]-vs[399])>band_v && abs(row_out5[399]+Y0_opt-ys[399])>band_y &&
                abs(row_out3[399]-ws[j - 1])>band_w && abs(row_out6[399]+Z0_opt-zs[j - 1])>band_z) {
            for (int indx = 0; indx < 4; indx++) {
                double* row_Ji = (double*)(Ji_slice + indx * Ji_pitch);
                row_Ji[j - 1] = 0;
            }
            *n = *n + 1;
        } else {
            double* row_Ji1 = (double*)(Ji_slice + 0 * Ji_pitch);
            double* row_Ji2 = (double*)(Ji_slice + 1 * Ji_pitch);
            double* row_Ji3 = (double*)(Ji_slice + 2 * Ji_pitch);
            double* row_Ji4 = (double*)(Ji_slice + 3 * Ji_pitch);

            row_Ji1[j - 1] = pathcost[0][j - 1][l] + pathcost[1][j - 1][l] + pathcost[2][j - 1][l] + pathcost[3][j - 1][l] + F[j - 1] *
            ((row_out1[399] - (us0 + us[399])) * (row_out1[399] - (us0 + us[399]))
                + (row_out4[399] + xeq[399] + X0_opt - xseq[399] - xs[399]) * (row_out4[399] + xeq[399] + X0_opt - xseq[399] - xs[399]));

            row_Ji2[j - 1] = pathcost[0][j - 1][l] + pathcost[1][j - 1][l] + pathcost[2][j - 1][l] + pathcost[3][j - 1][l] + F[j - 1] *
                (row_out2[399] - vs[399]) * (row_out2[399] - vs[399]) +
                (row_out5[399] + Y0_opt - ys[399]) * (row_out5[399] + Y0_opt - ys[399]);

            row_Ji3[j - 1] = pathcost[0][j - 1][l] + pathcost[1][j - 1][l] + pathcost[2][j - 1][l] + pathcost[3][j - 1][l];
            row_Ji4[j - 1] = pathcost[0][j - 1][l] + pathcost[1][j - 1][l] + pathcost[2][j - 1][l] + pathcost[3][j - 1][l] + F[j - 1] *
                (row_out3[399] - ws[j - 1]) * (row_out3[399] - ws[j - 1]) +
                (row_out6[399] + Z0_opt - zs[j - 1]) * (row_out6[399] + Z0_opt - zs[j - 1]);
        }


    }
}




int main(void)
{
    clock_t begin = clock();

    //variables
    double rb_inc = 0.1;
    double ra_inc = 0.1;
    double rp_inc = 0.1;
    double rc_inc = 0.1;

    //some variables to add values
    double *rb, *ra, *rp, *rc;
    cudaMallocManaged(&rb, 400 * sizeof(double));
    cudaMallocManaged(&ra, 400 * sizeof(double));
    cudaMallocManaged(&rp, 400 * sizeof(double));
    cudaMallocManaged(&rc, 400 * sizeof(double));


    fill1D<<<1, 256>>>(400, rb, 0.1);
    cudaDeviceSynchronize();
    fill1D<<<1, 256>>>(400, ra, 0.1);
    cudaDeviceSynchronize();
    fill1D<<<1, 256>>>(400, rp, 0.1);
    cudaDeviceSynchronize();
    fill1D<<<1, 256>>>(400, rc, 0.1);
    cudaDeviceSynchronize();

    // Host code
    //width is columns and height is rows
    int height = 400, width = 100, depth = 4;

    //1D stuff
    double* X_optdel;
    size_t optdel_size = 400 * sizeof(double);
    cudaMalloc(&X_optdel, optdel_size);
    double* U_opt;
    cudaMalloc(&U_opt, optdel_size);
    double* V_opt;
    cudaMalloc(&V_opt, optdel_size);
    double* Y_opt;
    cudaMalloc(&Y_opt, optdel_size);
    double* W_opt;
    cudaMalloc(&W_opt, optdel_size);
    double* Z_opt;
    cudaMalloc(&Z_opt, optdel_size);

    double* cycles;
    cudaMalloc(&cycles, optdel_size);
    double* np;
    cudaMalloc(&np, optdel_size);


    //2D stuff
    size_t pitch;

    double* delbmax;
    cudaMallocPitch(&delbmax, &pitch, width * sizeof(double), height);
    // fill2D<<<100, 400000>>>(delbmax, pitch, width, height);

    double* delamax;
    cudaMallocPitch(&delamax, &pitch, width * sizeof(double), height);

    double* delpmax;
    cudaMallocPitch(&delpmax, &pitch, width * sizeof(double), height);

    double* delcmax;
    cudaMallocPitch(&delcmax, &pitch, width * sizeof(double), height);

    double* ddelb;
    cudaMallocPitch(&ddelb, &pitch, width * sizeof(double), height);

    double* ddela;
    cudaMallocPitch(&ddela, &pitch, width * sizeof(double), height);

    double* ddelp;
    cudaMallocPitch(&ddelp, &pitch, width * sizeof(double), height);

    double* ddelc;
    cudaMallocPitch(&ddelc, &pitch, width * sizeof(double), height);

    double* del_bi;
    cudaMallocPitch(&del_bi, &pitch, width * sizeof(double), height);

    double* del_ai;
    cudaMallocPitch(&del_ai, &pitch, width * sizeof(double), height);

    double* del_pi;
    cudaMallocPitch(&del_pi, &pitch, width * sizeof(double), height);

    double* del_ci;
    cudaMallocPitch(&del_ci, &pitch, width * sizeof(double), height);



    double* Afull_ptr;
    cudaMallocPitch(&Afull_ptr, &pitch, 12 * sizeof(double), 12);
    fill2D_specific<<<100, 40000>>>(Afull_ptr, pitch, 12, 12);

    double* Bfull_ptr;
    cudaMallocPitch(&Bfull_ptr, &pitch, 4 * sizeof(double), 12);
    fill2D_specific<<<100, 40000>>>(Bfull_ptr, pitch, 4, 12);

    //3D stuff
    cudaExtent extent = make_cudaExtent(400 * sizeof(double), 4, 100);
    cudaPitchedPtr del_con;
    cudaMalloc3D(&del_con, extent);
    fill3D<<<100, 40000>>>(del_con, 400, 4, 100);

    cudaExtent extent2 = make_cudaExtent(400 * sizeof(double), 12, 100);
    cudaPitchedPtr states_p;
    cudaMalloc3D(&states_p, extent2);
    fill3D<<<100, 40000>>>(states_p, 400, 12, 100);

    cudaExtent extent3 = make_cudaExtent(400 * sizeof(double), 6, 100);
    cudaPitchedPtr out_states_p;
    cudaMalloc3D(&out_states_p, extent3);
    fill3D<<<100, 40000>>>(out_states_p, 400, 6, 100);

    cudaExtent extent4 = make_cudaExtent(400 * sizeof(double), 4, 100);
    cudaPitchedPtr Ji;
    cudaMalloc3D(&Ji, extent4);
    fill3D<<<100, 40000>>>(Ji, 400, 4, 100);


    //other stuff
    double trim_val[] = {67.5077, -0.0585, 3.3319, -0.0175, 0.0493, 0};





    for (int j = 2; j <= 400; j++) {
        int n = 100; //Counter of trajectories with final x-position outside of specified band in relation to ship's landing position
        int m = 1;    //Counter for number of cycles in while loop


        while (n > 90 && m < 10) {
            fill3Dto2D<<<100, 40000>>>(del_con, width, height, 1, delbmax, rb[j - 1]);
            fill3Dto2D<<<100, 40000>>>(del_con, width, height, 2, delamax, ra[j - 1]);
            fill3Dto2D<<<100, 40000>>>(del_con, width, height, 3, delpmax, rp[j - 1]);
            fill3Dto2D<<<100, 40000>>>(del_con, width, height, 4, delcmax, rc[j - 1]);

            srand(time(0));
            func1<<<100, 40000>>>(del_con, width, height, 1, delbmax, ddelb, (double)rand() / 32767.0);
            srand(time(0));
            func1<<<100, 40000>>>(del_con, width, height, 2, delamax, ddela, (double)rand() / 32767.0);
            srand(time(0));
            func1<<<100, 40000>>>(del_con, width, height, 3, delpmax, ddelp, (double)rand() / 32767.0);
            srand(time(0));
            func1<<<100, 40000>>>(del_con, width, height, 4, delcmax, ddelc, (double)rand() / 32767.0);


            func2<<<100, 40000>>>(del_con, width, height, 4, del_bi, ddelb, 1.0);
            func2<<<100, 40000>>>(del_con, width, height, 4, del_ai, ddela, 1.0);
            func2<<<100, 40000>>>(del_con, width, height, 4, del_pi, ddelp, 1.0);
            func2<<<100, 40000>>>(del_con, width, height, 4, del_ci, ddelc, 1.0);

            //Predicted vehicle state -------------------
            // void predicted_vehicle_state(double* states_p, cudaPitchedPtr out_states_p, double* del_bi, double* del_ai, double* del_pi, double* del_ci, double dt, int j, double* Afull_ptr, double* Bfull_ptr, double trim_val[])
            double dt = 0.1;
            predicted_vehicle_state<<<100, 40000>>>(states_p, out_states_p, del_bi, del_ai, del_pi, del_ci, dt, j, Afull_ptr, Bfull_ptr, trim_val);

            helper1<<<100, 40000>>>(Ji, out_states_p, dt, j, del_bi, del_ai,
                del_pi, del_ci, X_optdel, U_opt, V_opt, Y_opt, W_opt, Z_opt,
                &n);

            rb[j - 1] = rb[j - 1] + rb_inc;
            ra[j - 1] = ra[j - 1] + ra_inc;
            rp[j - 1] = rp[j - 1] + rp_inc;
            rc[j - 1] = rc[j - 1] + rc_inc;
            m++;
            // break;


        }

        //Calculation of Cost is done here
        // cycles[j - 1] = m;
        // np[j - 1] = 100 - n;


    }

    cudaFree(U_opt);
    cudaFree(V_opt);
    cudaFree(W_opt);
    cudaFree(X_optdel);
    cudaFree(Y_opt);
    cudaFree(Z_opt);

    cudaFree(rb);
    cudaFree(ra);
    cudaFree(rp);
    cudaFree(rc);

    cudaFree(delbmax);
    cudaFree(delamax);
    cudaFree(delpmax);
    cudaFree(delcmax);

    cudaFree(ddelb);
    cudaFree(ddela);
    cudaFree(ddelp);
    cudaFree(ddelc);

    cudaFree(del_bi);
    cudaFree(del_ai);
    cudaFree(del_pi);
    cudaFree(del_ci);

    // cudaFree(del_con);

    clock_t end = clock();
    double time_spent = (double)(end - begin) / CLOCKS_PER_SEC;
    printf("Path Integral took: %f seconds \n", time_spent);
    return 0;
}

	.file	"tmpxft_00321003_00000000-6_pathIntegral.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3639:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3639:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.type	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0, @function
_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0:
.LFB4308:
	.cfi_startproc
	movl	$3200, %esi
	jmp	cudaMalloc@PLT
	.cfi_endproc
.LFE4308:
	.size	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0, .-_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	.type	_Z15cudaMallocPitchIdE9cudaErrorPPT_Pmmm.isra.0, @function
_Z15cudaMallocPitchIdE9cudaErrorPPT_Pmmm.isra.0:
.LFB4309:
	.cfi_startproc
	jmp	cudaMallocPitch@PLT
	.cfi_endproc
.LFE4309:
	.size	_Z15cudaMallocPitchIdE9cudaErrorPPT_Pmmm.isra.0, .-_Z15cudaMallocPitchIdE9cudaErrorPPT_Pmmm.isra.0
	.globl	_Z25__device_stub__Z3addiPfS_iPfS_
	.type	_Z25__device_stub__Z3addiPfS_iPfS_, @function
_Z25__device_stub__Z3addiPfS_iPfS_:
.LFB3661:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movl	%edi, 28(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L4
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z3addiPfS_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L4:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L6
	call	__stack_chk_fail@PLT
.L6:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3661:
	.size	_Z25__device_stub__Z3addiPfS_iPfS_, .-_Z25__device_stub__Z3addiPfS_iPfS_
	.globl	_Z3addiPfS_
	.type	_Z3addiPfS_, @function
_Z3addiPfS_:
.LFB3662:
	.cfi_startproc
	endbr64
	jmp	_Z25__device_stub__Z3addiPfS_iPfS_
	.cfi_endproc
.LFE3662:
	.size	_Z3addiPfS_, .-_Z3addiPfS_
	.globl	_Z27__device_stub__Z6fill1DiPddiPdd
	.type	_Z27__device_stub__Z6fill1DiPddiPdd, @function
_Z27__device_stub__Z6fill1DiPddiPdd:
.LFB3663:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movl	%edi, 28(%rsp)
	leaq	40(%rsp), %rcx
	leaq	32(%rsp), %rdx
	movq	%rsi, 16(%rsp)
	leaq	48(%rsp), %rdi
	leaq	60(%rsp), %rsi
	movsd	%xmm0, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L10
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z6fill1DiPdd(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L10:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L12
	call	__stack_chk_fail@PLT
.L12:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3663:
	.size	_Z27__device_stub__Z6fill1DiPddiPdd, .-_Z27__device_stub__Z6fill1DiPddiPdd
	.globl	_Z6fill1DiPdd
	.type	_Z6fill1DiPdd, @function
_Z6fill1DiPdd:
.LFB3664:
	.cfi_startproc
	endbr64
	jmp	_Z27__device_stub__Z6fill1DiPddiPdd
	.cfi_endproc
.LFE3664:
	.size	_Z6fill1DiPdd, .-_Z6fill1DiPdd
	.globl	_Z28__device_stub__Z6fill2DPdmiiPdmii
	.type	_Z28__device_stub__Z6fill2DPdmiiPdmii, @function
_Z28__device_stub__Z6fill2DPdmiiPdmii:
.LFB3665:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z6fill2DPdmii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L15:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L17
	call	__stack_chk_fail@PLT
.L17:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3665:
	.size	_Z28__device_stub__Z6fill2DPdmiiPdmii, .-_Z28__device_stub__Z6fill2DPdmiiPdmii
	.globl	_Z6fill2DPdmii
	.type	_Z6fill2DPdmii, @function
_Z6fill2DPdmii:
.LFB3666:
	.cfi_startproc
	endbr64
	jmp	_Z28__device_stub__Z6fill2DPdmiiPdmii
	.cfi_endproc
.LFE3666:
	.size	_Z6fill2DPdmii, .-_Z6fill2DPdmii
	.globl	_Z38__device_stub__Z15fill2D_specificPdmiiPdmii
	.type	_Z38__device_stub__Z15fill2D_specificPdmiiPdmii, @function
_Z38__device_stub__Z15fill2D_specificPdmiiPdmii:
.LFB3667:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L20
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z15fill2D_specificPdmii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L20:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L22
	call	__stack_chk_fail@PLT
.L22:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3667:
	.size	_Z38__device_stub__Z15fill2D_specificPdmiiPdmii, .-_Z38__device_stub__Z15fill2D_specificPdmiiPdmii
	.globl	_Z15fill2D_specificPdmii
	.type	_Z15fill2D_specificPdmii, @function
_Z15fill2D_specificPdmii:
.LFB3668:
	.cfi_startproc
	endbr64
	jmp	_Z38__device_stub__Z15fill2D_specificPdmiiPdmii
	.cfi_endproc
.LFE3668:
	.size	_Z15fill2D_specificPdmii, .-_Z15fill2D_specificPdmii
	.globl	_Z42__device_stub__Z6fill3D14cudaPitchedPtriiiR14cudaPitchedPtriii
	.type	_Z42__device_stub__Z6fill3D14cudaPitchedPtriiiR14cudaPitchedPtriii, @function
_Z42__device_stub__Z6fill3D14cudaPitchedPtriiiR14cudaPitchedPtriii:
.LFB3669:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movl	%esi, 12(%rsp)
	leaq	52(%rsp), %rsi
	movl	%edx, 8(%rsp)
	leaq	24(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	32(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	12(%rsp), %rax
	movq	%rdi, 88(%rsp)
	leaq	40(%rsp), %rdi
	movq	%rax, 96(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movl	$1, 48(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L25
	pushq	32(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z6fill3D14cudaPitchedPtriii(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 160
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L25:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L27
	call	__stack_chk_fail@PLT
.L27:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3669:
	.size	_Z42__device_stub__Z6fill3D14cudaPitchedPtriiiR14cudaPitchedPtriii, .-_Z42__device_stub__Z6fill3D14cudaPitchedPtriiiR14cudaPitchedPtriii
	.globl	_Z6fill3D14cudaPitchedPtriii
	.type	_Z6fill3D14cudaPitchedPtriii, @function
_Z6fill3D14cudaPitchedPtriii:
.LFB3670:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	movl	%edx, %ecx
	movl	%esi, %edx
	movl	%edi, %esi
	leaq	16(%rsp), %rdi
	call	_Z42__device_stub__Z6fill3D14cudaPitchedPtriiiR14cudaPitchedPtriii
	popq	%rdx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3670:
	.size	_Z6fill3D14cudaPitchedPtriii, .-_Z6fill3D14cudaPitchedPtriii
	.globl	_Z50__device_stub__Z10fill3Dto2D14cudaPitchedPtriiiPddR14cudaPitchedPtriiiPdd
	.type	_Z50__device_stub__Z10fill3Dto2D14cudaPitchedPtriiiPddR14cudaPitchedPtriiiPdd, @function
_Z50__device_stub__Z10fill3Dto2D14cudaPitchedPtriiiPddR14cudaPitchedPtriiiPdd:
.LFB3671:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movl	%esi, 28(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 24(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	48(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movsd	%xmm0, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movq	%rdi, 104(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rax, 112(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 136(%rsp)
	movq	%rsp, %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movl	$1, 64(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L31
	pushq	48(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z10fill3Dto2D14cudaPitchedPtriiiPdd(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 192
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L31:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L33
	call	__stack_chk_fail@PLT
.L33:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3671:
	.size	_Z50__device_stub__Z10fill3Dto2D14cudaPitchedPtriiiPddR14cudaPitchedPtriiiPdd, .-_Z50__device_stub__Z10fill3Dto2D14cudaPitchedPtriiiPddR14cudaPitchedPtriiiPdd
	.globl	_Z10fill3Dto2D14cudaPitchedPtriiiPdd
	.type	_Z10fill3Dto2D14cudaPitchedPtriiiPdd, @function
_Z10fill3Dto2D14cudaPitchedPtriiiPdd:
.LFB3672:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	%rcx, %r8
	movl	%edx, %ecx
	movl	%esi, %edx
	movl	%edi, %esi
	leaq	16(%rsp), %rdi
	call	_Z50__device_stub__Z10fill3Dto2D14cudaPitchedPtriiiPddR14cudaPitchedPtriiiPdd
	popq	%rdx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3672:
	.size	_Z10fill3Dto2D14cudaPitchedPtriiiPdd, .-_Z10fill3Dto2D14cudaPitchedPtriiiPdd
	.globl	_Z47__device_stub__Z5func114cudaPitchedPtriiiPdS0_dR14cudaPitchedPtriiiPdS1_d
	.type	_Z47__device_stub__Z5func114cudaPitchedPtriiiPdS0_dR14cudaPitchedPtriiiPdS1_d, @function
_Z47__device_stub__Z5func114cudaPitchedPtriiiPdS0_dR14cudaPitchedPtriiiPdS1_d:
.LFB3673:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movl	%esi, 44(%rsp)
	leaq	76(%rsp), %rsi
	movl	%edx, 40(%rsp)
	leaq	48(%rsp), %rdx
	movl	%ecx, 36(%rsp)
	leaq	56(%rsp), %rcx
	movq	%r8, 24(%rsp)
	movq	%r9, 16(%rsp)
	movsd	%xmm0, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	44(%rsp), %rax
	movq	%rdi, 112(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rax, 120(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	36(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movl	$1, 72(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L37
	pushq	56(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z5func114cudaPitchedPtriiiPdS0_d(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 208
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L37:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L39
	call	__stack_chk_fail@PLT
.L39:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3673:
	.size	_Z47__device_stub__Z5func114cudaPitchedPtriiiPdS0_dR14cudaPitchedPtriiiPdS1_d, .-_Z47__device_stub__Z5func114cudaPitchedPtriiiPdS0_dR14cudaPitchedPtriiiPdS1_d
	.globl	_Z5func114cudaPitchedPtriiiPdS0_d
	.type	_Z5func114cudaPitchedPtriiiPdS0_d, @function
_Z5func114cudaPitchedPtriiiPdS0_d:
.LFB3674:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	%r8, %r9
	movq	%rcx, %r8
	movl	%edx, %ecx
	movl	%esi, %edx
	movl	%edi, %esi
	leaq	16(%rsp), %rdi
	call	_Z47__device_stub__Z5func114cudaPitchedPtriiiPdS0_dR14cudaPitchedPtriiiPdS1_d
	popq	%rdx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3674:
	.size	_Z5func114cudaPitchedPtriiiPdS0_d, .-_Z5func114cudaPitchedPtriiiPdS0_d
	.globl	_Z47__device_stub__Z5func214cudaPitchedPtriiiPdS0_dR14cudaPitchedPtriiiPdS1_d
	.type	_Z47__device_stub__Z5func214cudaPitchedPtriiiPdS0_dR14cudaPitchedPtriiiPdS1_d, @function
_Z47__device_stub__Z5func214cudaPitchedPtriiiPdS0_dR14cudaPitchedPtriiiPdS1_d:
.LFB3675:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movl	%esi, 44(%rsp)
	leaq	76(%rsp), %rsi
	movl	%edx, 40(%rsp)
	leaq	48(%rsp), %rdx
	movl	%ecx, 36(%rsp)
	leaq	56(%rsp), %rcx
	movq	%r8, 24(%rsp)
	movq	%r9, 16(%rsp)
	movsd	%xmm0, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	44(%rsp), %rax
	movq	%rdi, 112(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rax, 120(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	36(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movl	$1, 72(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L43
	pushq	56(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z5func214cudaPitchedPtriiiPdS0_d(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 208
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L43:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L45
	call	__stack_chk_fail@PLT
.L45:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3675:
	.size	_Z47__device_stub__Z5func214cudaPitchedPtriiiPdS0_dR14cudaPitchedPtriiiPdS1_d, .-_Z47__device_stub__Z5func214cudaPitchedPtriiiPdS0_dR14cudaPitchedPtriiiPdS1_d
	.globl	_Z5func214cudaPitchedPtriiiPdS0_d
	.type	_Z5func214cudaPitchedPtriiiPdS0_d, @function
_Z5func214cudaPitchedPtriiiPdS0_d:
.LFB3676:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	%r8, %r9
	movq	%rcx, %r8
	movl	%edx, %ecx
	movl	%esi, %edx
	movl	%edi, %esi
	leaq	16(%rsp), %rdi
	call	_Z47__device_stub__Z5func214cudaPitchedPtriiiPdS0_dR14cudaPitchedPtriiiPdS1_d
	popq	%rdx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3676:
	.size	_Z5func214cudaPitchedPtriiiPdS0_d, .-_Z5func214cudaPitchedPtriiiPdS0_d
	.globl	_Z41__device_stub__Z12mmult_kerneliiiPKdS0_PdiiiPKdS0_Pd
	.type	_Z41__device_stub__Z12mmult_kerneliiiPKdS0_PdiiiPKdS0_Pd, @function
_Z41__device_stub__Z12mmult_kerneliiiPKdS0_PdiiiPKdS0_Pd:
.LFB3677:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movl	%edi, 44(%rsp)
	leaq	72(%rsp), %rdi
	movl	%esi, 40(%rsp)
	leaq	84(%rsp), %rsi
	movl	%edx, 36(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 24(%rsp)
	leaq	64(%rsp), %rcx
	movq	%r8, 16(%rsp)
	movq	%r9, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	44(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	36(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L49
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z12mmult_kerneliiiPKdS0_Pd(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L49:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L51
	call	__stack_chk_fail@PLT
.L51:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3677:
	.size	_Z41__device_stub__Z12mmult_kerneliiiPKdS0_PdiiiPKdS0_Pd, .-_Z41__device_stub__Z12mmult_kerneliiiPKdS0_PdiiiPKdS0_Pd
	.globl	_Z12mmult_kerneliiiPKdS0_Pd
	.type	_Z12mmult_kerneliiiPKdS0_Pd, @function
_Z12mmult_kerneliiiPKdS0_Pd:
.LFB3678:
	.cfi_startproc
	endbr64
	jmp	_Z41__device_stub__Z12mmult_kerneliiiPKdS0_PdiiiPKdS0_Pd
	.cfi_endproc
.LFE3678:
	.size	_Z12mmult_kerneliiiPKdS0_Pd, .-_Z12mmult_kerneliiiPKdS0_Pd
	.globl	_Z9mmult_gpuiiiPKdS0_Pd
	.type	_Z9mmult_gpuiiiPKdS0_Pd, @function
_Z9mmult_gpuiiiPKdS0_Pd:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%r9, %r15
	xorl	%r9d, %r9d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%r8, %r14
	xorl	%r8d, %r8d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rcx, %r13
	movl	$1, %ecx
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%edx, %r12d
	movabsq	$4294967309, %rdx
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%esi, %ebp
	movl	$1, %esi
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%edi, %ebx
	movabsq	$4294967297, %rdi
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L54
	addq	$40, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	movq	%r15, %r9
	movq	%r14, %r8
	movq	%r13, %rcx
	movl	%r12d, %edx
	movl	%ebp, %esi
	movl	%ebx, %edi
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z41__device_stub__Z12mmult_kerneliiiPKdS0_PdiiiPKdS0_Pd
.L54:
	.cfi_restore_state
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	_Z9mmult_gpuiiiPKdS0_Pd, .-_Z9mmult_gpuiiiPKdS0_Pd
	.globl	_Z81__device_stub__Z23predicted_vehicle_state14cudaPitchedPtrS_PdS0_S0_S0_diS0_S0_S0_R14cudaPitchedPtrS0_PdS1_S1_S1_diS1_S1_S1_
	.type	_Z81__device_stub__Z23predicted_vehicle_state14cudaPitchedPtrS_PdS0_S0_S0_diS0_S0_S0_R14cudaPitchedPtrS0_PdS1_S1_S1_diS1_S1_S1_, @function
_Z81__device_stub__Z23predicted_vehicle_state14cudaPitchedPtrS_PdS0_S0_S0_diS0_S0_S0_R14cudaPitchedPtrS0_PdS1_S1_S1_diS1_S1_S1_:
.LFB3679:
	.cfi_startproc
	endbr64
	subq	$232, %rsp
	.cfi_def_cfa_offset 240
	movq	248(%rsp), %rax
	movq	%rdx, 56(%rsp)
	leaq	64(%rsp), %rdx
	movq	%rcx, 48(%rsp)
	leaq	72(%rsp), %rcx
	movq	%rax, 16(%rsp)
	movq	256(%rsp), %rax
	movq	%r8, 40(%rsp)
	movq	%rax, 8(%rsp)
	movq	264(%rsp), %rax
	movq	%r9, 32(%rsp)
	movq	%rax, (%rsp)
	movsd	%xmm0, 24(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 216(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rax
	movq	%rdi, 128(%rsp)
	leaq	80(%rsp), %rdi
	movq	%rax, 144(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	240(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 200(%rsp)
	movq	%rsp, %rax
	movq	%rsi, 136(%rsp)
	leaq	92(%rsp), %rsi
	movq	%rax, 208(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 80(%rsp)
	movl	$1, 88(%rsp)
	movq	%rax, 92(%rsp)
	movl	$1, 100(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L57
	pushq	72(%rsp)
	.cfi_def_cfa_offset 248
	leaq	_Z23predicted_vehicle_state14cudaPitchedPtrS_PdS0_S0_S0_diS0_S0_S0_(%rip), %rdi
	pushq	72(%rsp)
	.cfi_def_cfa_offset 256
	movq	108(%rsp), %rcx
	movl	116(%rsp), %r8d
	movq	96(%rsp), %rsi
	movl	104(%rsp), %edx
	leaq	144(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 248
	popq	%rdx
	.cfi_def_cfa_offset 240
.L57:
	movq	216(%rsp), %rax
	subq	%fs:40, %rax
	je	.L59
	call	__stack_chk_fail@PLT
.L59:
	addq	$232, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3679:
	.size	_Z81__device_stub__Z23predicted_vehicle_state14cudaPitchedPtrS_PdS0_S0_S0_diS0_S0_S0_R14cudaPitchedPtrS0_PdS1_S1_S1_diS1_S1_S1_, .-_Z81__device_stub__Z23predicted_vehicle_state14cudaPitchedPtrS_PdS0_S0_S0_diS0_S0_S0_R14cudaPitchedPtrS0_PdS1_S1_S1_diS1_S1_S1_
	.globl	_Z23predicted_vehicle_state14cudaPitchedPtrS_PdS0_S0_S0_diS0_S0_S0_
	.type	_Z23predicted_vehicle_state14cudaPitchedPtrS_PdS0_S0_S0_diS0_S0_S0_, @function
_Z23predicted_vehicle_state14cudaPitchedPtrS_PdS0_S0_S0_diS0_S0_S0_:
.LFB3680:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	48(%rsp), %rax
	pushq	88(%rsp)
	.cfi_def_cfa_offset 24
	pushq	88(%rsp)
	.cfi_def_cfa_offset 32
	pushq	%r9
	.cfi_def_cfa_offset 40
	movq	%rcx, %r9
	movq	%rsi, %rcx
	movq	%rax, %rsi
	pushq	%r8
	.cfi_def_cfa_offset 48
	movq	%rdx, %r8
	movq	%rdi, %rdx
	leaq	48(%rsp), %rdi
	call	_Z81__device_stub__Z23predicted_vehicle_state14cudaPitchedPtrS_PdS0_S0_S0_diS0_S0_S0_R14cudaPitchedPtrS0_PdS1_S1_S1_diS1_S1_S1_
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3680:
	.size	_Z23predicted_vehicle_state14cudaPitchedPtrS_PdS0_S0_S0_diS0_S0_S0_, .-_Z23predicted_vehicle_state14cudaPitchedPtrS_PdS0_S0_S0_diS0_S0_S0_
	.globl	_Z75__device_stub__Z7helper114cudaPitchedPtrS_diPdS0_S0_S0_S0_S0_S0_S0_S0_S0_PiR14cudaPitchedPtrS0_diPdS1_S1_S1_S1_S1_S1_S1_S1_S1_Pi
	.type	_Z75__device_stub__Z7helper114cudaPitchedPtrS_diPdS0_S0_S0_S0_S0_S0_S0_S0_S0_PiR14cudaPitchedPtrS0_diPdS1_S1_S1_S1_S1_S1_S1_S1_S1_Pi, @function
_Z75__device_stub__Z7helper114cudaPitchedPtrS_diPdS0_S0_S0_S0_S0_S0_S0_S0_S0_PiR14cudaPitchedPtrS0_diPdS1_S1_S1_S1_S1_S1_S1_S1_S1_Pi:
.LFB3681:
	.cfi_startproc
	endbr64
	subq	$312, %rsp
	.cfi_def_cfa_offset 320
	movq	320(%rsp), %rax
	movl	%edx, 100(%rsp)
	leaq	112(%rsp), %rdx
	movq	%rcx, 88(%rsp)
	leaq	120(%rsp), %rcx
	movq	%rax, 64(%rsp)
	movq	328(%rsp), %rax
	movq	%r8, 80(%rsp)
	movq	%rax, 56(%rsp)
	movq	336(%rsp), %rax
	movq	%r9, 72(%rsp)
	movq	%rax, 48(%rsp)
	movq	344(%rsp), %rax
	movsd	%xmm0, 104(%rsp)
	movq	%rax, 40(%rsp)
	movq	352(%rsp), %rax
	movq	%rax, 32(%rsp)
	movq	360(%rsp), %rax
	movq	%rax, 24(%rsp)
	movq	368(%rsp), %rax
	movq	%rax, 16(%rsp)
	movq	376(%rsp), %rax
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 296(%rsp)
	xorl	%eax, %eax
	leaq	104(%rsp), %rax
	movq	%rdi, 176(%rsp)
	leaq	128(%rsp), %rdi
	movq	%rax, 192(%rsp)
	leaq	100(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	88(%rsp), %rax
	movq	%rax, 208(%rsp)
	leaq	80(%rsp), %rax
	movq	%rax, 216(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 224(%rsp)
	leaq	64(%rsp), %rax
	movq	%rsi, 184(%rsp)
	leaq	140(%rsp), %rsi
	movq	%rax, 232(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 240(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 248(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 256(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 264(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 272(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 280(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 288(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 128(%rsp)
	movl	$1, 136(%rsp)
	movq	%rax, 140(%rsp)
	movl	$1, 148(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L63
	pushq	120(%rsp)
	.cfi_def_cfa_offset 328
	leaq	_Z7helper114cudaPitchedPtrS_diPdS0_S0_S0_S0_S0_S0_S0_S0_S0_Pi(%rip), %rdi
	pushq	120(%rsp)
	.cfi_def_cfa_offset 336
	movq	156(%rsp), %rcx
	movl	164(%rsp), %r8d
	movq	144(%rsp), %rsi
	movl	152(%rsp), %edx
	leaq	192(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 328
	popq	%rdx
	.cfi_def_cfa_offset 320
.L63:
	movq	296(%rsp), %rax
	subq	%fs:40, %rax
	je	.L65
	call	__stack_chk_fail@PLT
.L65:
	addq	$312, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3681:
	.size	_Z75__device_stub__Z7helper114cudaPitchedPtrS_diPdS0_S0_S0_S0_S0_S0_S0_S0_S0_PiR14cudaPitchedPtrS0_diPdS1_S1_S1_S1_S1_S1_S1_S1_S1_Pi, .-_Z75__device_stub__Z7helper114cudaPitchedPtrS_diPdS0_S0_S0_S0_S0_S0_S0_S0_S0_PiR14cudaPitchedPtrS0_diPdS1_S1_S1_S1_S1_S1_S1_S1_S1_Pi
	.globl	_Z7helper114cudaPitchedPtrS_diPdS0_S0_S0_S0_S0_S0_S0_S0_S0_Pi
	.type	_Z7helper114cudaPitchedPtrS_diPdS0_S0_S0_S0_S0_S0_S0_S0_S0_Pi, @function
_Z7helper114cudaPitchedPtrS_diPdS0_S0_S0_S0_S0_S0_S0_S0_S0_Pi:
.LFB3682:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	48(%rsp), %rax
	pushq	120(%rsp)
	.cfi_def_cfa_offset 24
	pushq	120(%rsp)
	.cfi_def_cfa_offset 32
	pushq	120(%rsp)
	.cfi_def_cfa_offset 40
	pushq	120(%rsp)
	.cfi_def_cfa_offset 48
	pushq	120(%rsp)
	.cfi_def_cfa_offset 56
	pushq	120(%rsp)
	.cfi_def_cfa_offset 64
	pushq	%r9
	.cfi_def_cfa_offset 72
	movq	%rcx, %r9
	movq	%rsi, %rcx
	movq	%rax, %rsi
	pushq	%r8
	.cfi_def_cfa_offset 80
	movq	%rdx, %r8
	movl	%edi, %edx
	leaq	80(%rsp), %rdi
	call	_Z75__device_stub__Z7helper114cudaPitchedPtrS_diPdS0_S0_S0_S0_S0_S0_S0_S0_S0_PiR14cudaPitchedPtrS0_diPdS1_S1_S1_S1_S1_S1_S1_S1_S1_Pi
	addq	$72, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3682:
	.size	_Z7helper114cudaPitchedPtrS_diPdS0_S0_S0_S0_S0_S0_S0_S0_S0_Pi, .-_Z7helper114cudaPitchedPtrS_diPdS0_S0_S0_S0_S0_S0_S0_S0_S0_Pi
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC5:
	.string	"Path Integral took: %f seconds \n"
	.section	.rodata
	.align 32
.LC0:
	.long	673450872
	.long	1079042174
	.long	1168231105
	.long	-1079118922
	.long	804017878
	.long	1074440123
	.long	515396076
	.long	-1080956027
	.long	2137175726
	.long	1068056025
	.long	0
	.long	0
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3636:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	subq	$592, %rsp
	.cfi_def_cfa_offset 640
	movq	%fs:40, %rax
	movq	%rax, 584(%rsp)
	xorl	%eax, %eax
	call	clock@PLT
	leaq	8(%rsp), %rdi
	movl	$1, %edx
	movl	$3200, %esi
	movq	%rax, %r13
	call	cudaMallocManaged@PLT
	leaq	16(%rsp), %rdi
	movl	$1, %edx
	movl	$3200, %esi
	call	cudaMallocManaged@PLT
	leaq	24(%rsp), %rdi
	movl	$1, %edx
	movl	$3200, %esi
	call	cudaMallocManaged@PLT
	leaq	32(%rsp), %rdi
	movl	$1, %edx
	movl	$3200, %esi
	call	cudaMallocManaged@PLT
	movl	$16777217, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$8, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movq	%rdx, 504(%rsp)
	movl	$1, 512(%rsp)
	movq	%rdi, 472(%rsp)
	movl	$1, 480(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L70
	movsd	.LC1(%rip), %xmm0
	movq	8(%rsp), %rsi
	movl	$400, %edi
	call	_Z27__device_stub__Z6fill1DiPddiPdd
.L70:
	call	cudaDeviceSynchronize@PLT
	movl	$16777217, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$8, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movq	%rdx, 504(%rsp)
	movl	$1, 512(%rsp)
	movq	%rdi, 472(%rsp)
	movl	$1, 480(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L71
	movsd	.LC1(%rip), %xmm0
	movq	16(%rsp), %rsi
	movl	$400, %edi
	call	_Z27__device_stub__Z6fill1DiPddiPdd
.L71:
	call	cudaDeviceSynchronize@PLT
	movl	$16777217, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$8, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movq	%rdx, 504(%rsp)
	movl	$1, 512(%rsp)
	movq	%rdi, 472(%rsp)
	movl	$1, 480(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L72
	movsd	.LC1(%rip), %xmm0
	movq	24(%rsp), %rsi
	movl	$400, %edi
	call	_Z27__device_stub__Z6fill1DiPddiPdd
.L72:
	call	cudaDeviceSynchronize@PLT
	movl	$16777217, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$8, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movq	%rdx, 504(%rsp)
	movl	$1, 512(%rsp)
	movq	%rdi, 472(%rsp)
	movl	$1, 480(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L73
	movsd	.LC1(%rip), %xmm0
	movq	32(%rsp), %rsi
	movl	$400, %edi
	call	_Z27__device_stub__Z6fill1DiPddiPdd
.L73:
	call	cudaDeviceSynchronize@PLT
	leaq	40(%rsp), %rdi
	leaq	104(%rsp), %rbx
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	leaq	48(%rsp), %rdi
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	leaq	56(%rsp), %rdi
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	leaq	64(%rsp), %rdi
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	leaq	72(%rsp), %rdi
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	leaq	80(%rsp), %rdi
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	leaq	88(%rsp), %rdi
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	leaq	96(%rsp), %rdi
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.constprop.0.isra.0
	leaq	112(%rsp), %rdi
	movl	$400, %ecx
	movq	%rbx, %rsi
	movl	$800, %edx
	call	_Z15cudaMallocPitchIdE9cudaErrorPPT_Pmmm.isra.0
	leaq	120(%rsp), %rdi
	movl	$400, %ecx
	movq	%rbx, %rsi
	movl	$800, %edx
	call	_Z15cudaMallocPitchIdE9cudaErrorPPT_Pmmm.isra.0
	leaq	128(%rsp), %rdi
	movl	$400, %ecx
	movq	%rbx, %rsi
	movl	$800, %edx
	call	_Z15cudaMallocPitchIdE9cudaErrorPPT_Pmmm.isra.0
	leaq	136(%rsp), %rdi
	movl	$400, %ecx
	movq	%rbx, %rsi
	movl	$800, %edx
	call	_Z15cudaMallocPitchIdE9cudaErrorPPT_Pmmm.isra.0
	leaq	144(%rsp), %rdi
	movl	$400, %ecx
	movq	%rbx, %rsi
	movl	$800, %edx
	call	_Z15cudaMallocPitchIdE9cudaErrorPPT_Pmmm.isra.0
	leaq	152(%rsp), %rdi
	movl	$400, %ecx
	movq	%rbx, %rsi
	movl	$800, %edx
	call	_Z15cudaMallocPitchIdE9cudaErrorPPT_Pmmm.isra.0
	leaq	160(%rsp), %rdi
	movl	$400, %ecx
	movq	%rbx, %rsi
	movl	$800, %edx
	call	_Z15cudaMallocPitchIdE9cudaErrorPPT_Pmmm.isra.0
	leaq	168(%rsp), %rdi
	movl	$400, %ecx
	movq	%rbx, %rsi
	movl	$800, %edx
	call	_Z15cudaMallocPitchIdE9cudaErrorPPT_Pmmm.isra.0
	leaq	176(%rsp), %rdi
	movl	$400, %ecx
	movq	%rbx, %rsi
	movl	$800, %edx
	call	_Z15cudaMallocPitchIdE9cudaErrorPPT_Pmmm.isra.0
	leaq	184(%rsp), %rdi
	movl	$400, %ecx
	movq	%rbx, %rsi
	movl	$800, %edx
	call	_Z15cudaMallocPitchIdE9cudaErrorPPT_Pmmm.isra.0
	leaq	192(%rsp), %rdi
	movl	$400, %ecx
	movq	%rbx, %rsi
	movl	$800, %edx
	call	_Z15cudaMallocPitchIdE9cudaErrorPPT_Pmmm.isra.0
	leaq	200(%rsp), %rdi
	movl	$400, %ecx
	movq	%rbx, %rsi
	movl	$800, %edx
	call	_Z15cudaMallocPitchIdE9cudaErrorPPT_Pmmm.isra.0
	leaq	208(%rsp), %rdi
	movl	$12, %ecx
	movq	%rbx, %rsi
	movl	$96, %edx
	call	_Z15cudaMallocPitchIdE9cudaErrorPPT_Pmmm.isra.0
	movl	$67109489, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1073741849, %edi
	salq	$6, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	salq	$2, %rdi
	movq	%rdx, 504(%rsp)
	movl	$1, 512(%rsp)
	movq	%rdi, 472(%rsp)
	movl	$1, 480(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L74
	movq	104(%rsp), %rsi
	movl	$12, %ecx
	movl	$12, %edx
	movq	208(%rsp), %rdi
	call	_Z38__device_stub__Z15fill2D_specificPdmiiPdmii
.L74:
	leaq	216(%rsp), %rdi
	movl	$12, %ecx
	movl	$32, %edx
	movq	%rbx, %rsi
	call	_Z15cudaMallocPitchIdE9cudaErrorPPT_Pmmm.isra.0
	movl	$67109489, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1073741849, %edi
	salq	$6, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	salq	$2, %rdi
	movq	%rdx, 504(%rsp)
	movl	$1, 512(%rsp)
	movq	%rdi, 472(%rsp)
	movl	$1, 480(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L75
	movq	104(%rsp), %rsi
	movl	$12, %ecx
	movl	$4, %edx
	movq	216(%rsp), %rdi
	call	_Z38__device_stub__Z15fill2D_specificPdmiiPdmii
.L75:
	movq	$3200, 248(%rsp)
	leaq	344(%rsp), %rdi
	subq	$32, %rsp
	.cfi_def_cfa_offset 672
	movq	$4, 288(%rsp)
	movq	$100, 296(%rsp)
	movups	280(%rsp), %xmm1
	movq	$100, 16(%rsp)
	movups	%xmm1, (%rsp)
	call	cudaMalloc3D@PLT
	movl	$67109489, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1073741849, %edi
	salq	$6, %rdx
	movl	$1, 512(%rsp)
	movl	$1, %ecx
	salq	$2, %rdi
	movq	%rdx, 504(%rsp)
	movl	$1, %esi
	movq	%rdi, 472(%rsp)
	movl	$1, 480(%rsp)
	addq	$32, %rsp
	.cfi_def_cfa_offset 640
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L76
	movl	$100, %ecx
	movl	$4, %edx
	movl	$400, %esi
	movups	344(%rsp), %xmm2
	movups	360(%rsp), %xmm3
	leaq	504(%rsp), %rdi
	movups	%xmm2, 504(%rsp)
	movups	%xmm3, 520(%rsp)
	call	_Z42__device_stub__Z6fill3D14cudaPitchedPtriiiR14cudaPitchedPtriii
.L76:
	movq	$3200, 272(%rsp)
	leaq	376(%rsp), %rdi
	subq	$32, %rsp
	.cfi_def_cfa_offset 672
	movq	$12, 312(%rsp)
	movq	$100, 320(%rsp)
	movups	304(%rsp), %xmm4
	movq	$100, 16(%rsp)
	movups	%xmm4, (%rsp)
	call	cudaMalloc3D@PLT
	movl	$67109489, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1073741849, %edi
	salq	$6, %rdx
	movl	$1, 512(%rsp)
	movl	$1, %ecx
	salq	$2, %rdi
	movq	%rdx, 504(%rsp)
	movl	$1, %esi
	movq	%rdi, 472(%rsp)
	movl	$1, 480(%rsp)
	addq	$32, %rsp
	.cfi_def_cfa_offset 640
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L77
	movl	$100, %ecx
	movl	$12, %edx
	movl	$400, %esi
	movups	376(%rsp), %xmm5
	movups	392(%rsp), %xmm6
	leaq	504(%rsp), %rdi
	movups	%xmm5, 504(%rsp)
	movups	%xmm6, 520(%rsp)
	call	_Z42__device_stub__Z6fill3D14cudaPitchedPtriiiR14cudaPitchedPtriii
.L77:
	movq	$3200, 296(%rsp)
	leaq	408(%rsp), %rdi
	subq	$32, %rsp
	.cfi_def_cfa_offset 672
	movq	$6, 336(%rsp)
	movq	$100, 344(%rsp)
	movups	328(%rsp), %xmm7
	movq	$100, 16(%rsp)
	movups	%xmm7, (%rsp)
	call	cudaMalloc3D@PLT
	movl	$67109489, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1073741849, %edi
	salq	$6, %rdx
	movl	$1, 512(%rsp)
	movl	$1, %ecx
	salq	$2, %rdi
	movq	%rdx, 504(%rsp)
	movl	$1, %esi
	movq	%rdi, 472(%rsp)
	movl	$1, 480(%rsp)
	addq	$32, %rsp
	.cfi_def_cfa_offset 640
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L78
	movl	$100, %ecx
	movl	$6, %edx
	movl	$400, %esi
	movups	408(%rsp), %xmm1
	movups	424(%rsp), %xmm2
	leaq	504(%rsp), %rdi
	movups	%xmm1, 504(%rsp)
	movups	%xmm2, 520(%rsp)
	call	_Z42__device_stub__Z6fill3D14cudaPitchedPtriiiR14cudaPitchedPtriii
.L78:
	movq	$3200, 320(%rsp)
	leaq	440(%rsp), %rdi
	subq	$32, %rsp
	.cfi_def_cfa_offset 672
	movq	$4, 360(%rsp)
	movq	$100, 368(%rsp)
	movups	352(%rsp), %xmm3
	movq	$100, 16(%rsp)
	movups	%xmm3, (%rsp)
	call	cudaMalloc3D@PLT
	movl	$67109489, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1073741849, %edi
	salq	$6, %rdx
	movl	$1, 512(%rsp)
	movl	$1, %ecx
	salq	$2, %rdi
	movq	%rdx, 504(%rsp)
	movl	$1, %esi
	movq	%rdi, 268(%rsp)
	movl	$1, 276(%rsp)
	addq	$32, %rsp
	.cfi_def_cfa_offset 640
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L79
	movl	$100, %ecx
	movl	$4, %edx
	movl	$400, %esi
	movups	440(%rsp), %xmm4
	movups	456(%rsp), %xmm5
	leaq	504(%rsp), %rdi
	movups	%xmm4, 504(%rsp)
	movups	%xmm5, 520(%rsp)
	call	_Z42__device_stub__Z6fill3D14cudaPitchedPtriiiR14cudaPitchedPtriii
.L79:
	movl	$12, %ecx
	movl	$67109489, %ebx
	movl	$8, %ebp
	movl	$2, %r12d
	leaq	536(%rsp), %rdi
	leaq	.LC0(%rip), %rsi
	salq	$6, %rbx
	rep movsl
.L97:
	movl	$100, 4(%rsp)
	movl	$1, %r14d
.L80:
	cmpl	$90, 4(%rsp)
	jle	.L99
	cmpl	$10, %r14d
	je	.L99
	movl	$1073741849, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rbx, %rdx
	salq	$2, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rbx, 472(%rsp)
	movl	$1, 480(%rsp)
	movq	%rdi, 236(%rsp)
	movl	$1, 244(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L81
	movq	8(%rsp), %rax
	movq	112(%rsp), %r8
	leaq	504(%rsp), %rdi
	movl	$1, %ecx
	movups	344(%rsp), %xmm6
	movl	$400, %edx
	movl	$100, %esi
	movups	360(%rsp), %xmm7
	movsd	(%rax,%rbp), %xmm0
	movups	%xmm6, 504(%rsp)
	movups	%xmm7, 520(%rsp)
	call	_Z50__device_stub__Z10fill3Dto2D14cudaPitchedPtriiiPddR14cudaPitchedPtriiiPdd
.L81:
	movl	$1073741849, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rbx, %rdx
	salq	$2, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rbx, 472(%rsp)
	movl	$1, 480(%rsp)
	movq	%rdi, 236(%rsp)
	movl	$1, 244(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L82
	movq	16(%rsp), %rax
	movq	120(%rsp), %r8
	leaq	504(%rsp), %rdi
	movl	$2, %ecx
	movups	344(%rsp), %xmm1
	movl	$400, %edx
	movl	$100, %esi
	movups	360(%rsp), %xmm2
	movsd	(%rax,%rbp), %xmm0
	movups	%xmm1, 504(%rsp)
	movups	%xmm2, 520(%rsp)
	call	_Z50__device_stub__Z10fill3Dto2D14cudaPitchedPtriiiPddR14cudaPitchedPtriiiPdd
.L82:
	movl	$1073741849, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rbx, %rdx
	salq	$2, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rbx, 472(%rsp)
	movl	$1, 480(%rsp)
	movq	%rdi, 236(%rsp)
	movl	$1, 244(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L83
	movq	24(%rsp), %rax
	movups	344(%rsp), %xmm3
	leaq	504(%rsp), %rdi
	movl	$3, %ecx
	movups	360(%rsp), %xmm4
	movl	$400, %edx
	movl	$100, %esi
	movq	128(%rsp), %r8
	movsd	(%rax,%rbp), %xmm0
	movups	%xmm3, 504(%rsp)
	movups	%xmm4, 520(%rsp)
	call	_Z50__device_stub__Z10fill3Dto2D14cudaPitchedPtriiiPddR14cudaPitchedPtriiiPdd
.L83:
	movl	$1073741849, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rbx, %rdx
	salq	$2, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rbx, 472(%rsp)
	movl	$1, 480(%rsp)
	movq	%rdi, 236(%rsp)
	movl	$1, 244(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L84
	movq	32(%rsp), %rax
	movups	344(%rsp), %xmm5
	leaq	504(%rsp), %rdi
	movl	$4, %ecx
	movups	360(%rsp), %xmm6
	movl	$400, %edx
	movl	$100, %esi
	movq	136(%rsp), %r8
	movsd	(%rax,%rbp), %xmm0
	movups	%xmm5, 504(%rsp)
	movups	%xmm6, 520(%rsp)
	call	_Z50__device_stub__Z10fill3Dto2D14cudaPitchedPtriiiPddR14cudaPitchedPtriiiPdd
.L84:
	xorl	%edi, %edi
	call	time@PLT
	movl	%eax, %edi
	call	srand@PLT
	movl	$1073741849, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$2, %rdi
	movq	%rbx, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rbx, 472(%rsp)
	movl	$1, 480(%rsp)
	movq	%rdi, 236(%rsp)
	movl	$1, 244(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L85
	call	rand@PLT
	movq	112(%rsp), %r8
	movl	$1, %ecx
	movups	344(%rsp), %xmm7
	movups	360(%rsp), %xmm1
	movl	$400, %edx
	movl	$100, %esi
	movq	144(%rsp), %r9
	leaq	504(%rsp), %rdi
	movups	%xmm7, 504(%rsp)
	cvtsi2sdl	%eax, %xmm0
	movups	%xmm1, 520(%rsp)
	divsd	.LC2(%rip), %xmm0
	call	_Z47__device_stub__Z5func114cudaPitchedPtriiiPdS0_dR14cudaPitchedPtriiiPdS1_d
.L85:
	xorl	%edi, %edi
	call	time@PLT
	movl	%eax, %edi
	call	srand@PLT
	movl	$1073741849, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$2, %rdi
	movq	%rbx, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rbx, 472(%rsp)
	movl	$1, 480(%rsp)
	movq	%rdi, 236(%rsp)
	movl	$1, 244(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L86
	call	rand@PLT
	movq	120(%rsp), %r8
	movl	$2, %ecx
	movups	344(%rsp), %xmm2
	movups	360(%rsp), %xmm3
	movl	$400, %edx
	movl	$100, %esi
	movq	152(%rsp), %r9
	leaq	504(%rsp), %rdi
	movups	%xmm2, 504(%rsp)
	cvtsi2sdl	%eax, %xmm0
	movups	%xmm3, 520(%rsp)
	divsd	.LC2(%rip), %xmm0
	call	_Z47__device_stub__Z5func114cudaPitchedPtriiiPdS0_dR14cudaPitchedPtriiiPdS1_d
.L86:
	xorl	%edi, %edi
	call	time@PLT
	movl	%eax, %edi
	call	srand@PLT
	movl	$1073741849, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$2, %rdi
	movq	%rbx, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rbx, 472(%rsp)
	movl	$1, 480(%rsp)
	movq	%rdi, 236(%rsp)
	movl	$1, 244(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L87
	call	rand@PLT
	movups	344(%rsp), %xmm4
	movups	360(%rsp), %xmm5
	leaq	504(%rsp), %rdi
	movl	$3, %ecx
	movl	$400, %edx
	movl	$100, %esi
	movq	160(%rsp), %r9
	movq	128(%rsp), %r8
	cvtsi2sdl	%eax, %xmm0
	movups	%xmm4, 504(%rsp)
	divsd	.LC2(%rip), %xmm0
	movups	%xmm5, 520(%rsp)
	call	_Z47__device_stub__Z5func114cudaPitchedPtriiiPdS0_dR14cudaPitchedPtriiiPdS1_d
.L87:
	xorl	%edi, %edi
	call	time@PLT
	movl	%eax, %edi
	call	srand@PLT
	movl	$1073741849, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$2, %rdi
	movq	%rbx, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rbx, 472(%rsp)
	movl	$1, 480(%rsp)
	movq	%rdi, 236(%rsp)
	movl	$1, 244(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L88
	call	rand@PLT
	movups	344(%rsp), %xmm6
	movups	360(%rsp), %xmm7
	leaq	504(%rsp), %rdi
	movl	$4, %ecx
	movl	$400, %edx
	movl	$100, %esi
	movq	168(%rsp), %r9
	movq	136(%rsp), %r8
	cvtsi2sdl	%eax, %xmm0
	movups	%xmm6, 504(%rsp)
	divsd	.LC2(%rip), %xmm0
	movups	%xmm7, 520(%rsp)
	call	_Z47__device_stub__Z5func114cudaPitchedPtriiiPdS0_dR14cudaPitchedPtriiiPdS1_d
.L88:
	movl	$1073741849, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rbx, %rdx
	salq	$2, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rbx, 472(%rsp)
	movl	$1, 480(%rsp)
	movq	%rdi, 236(%rsp)
	movl	$1, 244(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L89
	movups	344(%rsp), %xmm1
	movups	360(%rsp), %xmm2
	leaq	504(%rsp), %rdi
	movl	$4, %ecx
	movsd	.LC3(%rip), %xmm0
	movl	$400, %edx
	movl	$100, %esi
	movq	144(%rsp), %r9
	movq	176(%rsp), %r8
	movups	%xmm1, 504(%rsp)
	movups	%xmm2, 520(%rsp)
	call	_Z47__device_stub__Z5func214cudaPitchedPtriiiPdS0_dR14cudaPitchedPtriiiPdS1_d
.L89:
	movl	$1073741849, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rbx, %rdx
	salq	$2, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rbx, 472(%rsp)
	movl	$1, 480(%rsp)
	movq	%rdi, 236(%rsp)
	movl	$1, 244(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L90
	movups	344(%rsp), %xmm3
	movups	360(%rsp), %xmm4
	leaq	504(%rsp), %rdi
	movl	$4, %ecx
	movsd	.LC3(%rip), %xmm0
	movl	$400, %edx
	movl	$100, %esi
	movq	152(%rsp), %r9
	movq	184(%rsp), %r8
	movups	%xmm3, 504(%rsp)
	movups	%xmm4, 520(%rsp)
	call	_Z47__device_stub__Z5func214cudaPitchedPtriiiPdS0_dR14cudaPitchedPtriiiPdS1_d
.L90:
	movl	$1073741849, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rbx, %rdx
	salq	$2, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rbx, 472(%rsp)
	movl	$1, 480(%rsp)
	movq	%rdi, 236(%rsp)
	movl	$1, 244(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L91
	movups	344(%rsp), %xmm5
	movups	360(%rsp), %xmm6
	leaq	504(%rsp), %rdi
	movl	$4, %ecx
	movsd	.LC3(%rip), %xmm0
	movl	$400, %edx
	movl	$100, %esi
	movq	160(%rsp), %r9
	movq	192(%rsp), %r8
	movups	%xmm5, 504(%rsp)
	movups	%xmm6, 520(%rsp)
	call	_Z47__device_stub__Z5func214cudaPitchedPtriiiPdS0_dR14cudaPitchedPtriiiPdS1_d
.L91:
	movl	$1073741849, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rbx, %rdx
	salq	$2, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rbx, 472(%rsp)
	movl	$1, 480(%rsp)
	movq	%rdi, 236(%rsp)
	movl	$1, 244(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L92
	movups	344(%rsp), %xmm7
	movups	360(%rsp), %xmm1
	leaq	504(%rsp), %rdi
	movl	$4, %ecx
	movsd	.LC3(%rip), %xmm0
	movl	$400, %edx
	movl	$100, %esi
	movq	168(%rsp), %r9
	movq	200(%rsp), %r8
	movups	%xmm7, 504(%rsp)
	movups	%xmm1, 520(%rsp)
	call	_Z47__device_stub__Z5func214cudaPitchedPtriiiPdS0_dR14cudaPitchedPtriiiPdS1_d
.L92:
	movl	$1073741849, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rbx, %rdx
	salq	$2, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rbx, 236(%rsp)
	movl	$1, 244(%rsp)
	movq	%rdi, 224(%rsp)
	movl	$1, 232(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L93
	movups	376(%rsp), %xmm2
	movups	392(%rsp), %xmm3
	leaq	536(%rsp), %rax
	leaq	504(%rsp), %rsi
	movups	408(%rsp), %xmm4
	movups	424(%rsp), %xmm5
	leaq	472(%rsp), %rdi
	movups	%xmm2, 472(%rsp)
	movsd	.LC1(%rip), %xmm0
	movups	%xmm3, 488(%rsp)
	movups	%xmm4, 504(%rsp)
	movups	%xmm5, 520(%rsp)
	pushq	%rax
	.cfi_def_cfa_offset 648
	pushq	224(%rsp)
	.cfi_def_cfa_offset 656
	pushq	224(%rsp)
	.cfi_def_cfa_offset 664
	pushq	%r12
	.cfi_def_cfa_offset 672
	movq	232(%rsp), %r9
	movq	224(%rsp), %r8
	movq	216(%rsp), %rcx
	movq	208(%rsp), %rdx
	call	_Z81__device_stub__Z23predicted_vehicle_state14cudaPitchedPtrS_PdS0_S0_S0_diS0_S0_S0_R14cudaPitchedPtrS0_PdS1_S1_S1_diS1_S1_S1_
	addq	$32, %rsp
	.cfi_def_cfa_offset 640
.L93:
	movl	$1073741849, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rbx, %rdx
	salq	$2, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rbx, 236(%rsp)
	movl	$1, 244(%rsp)
	movq	%rdi, 224(%rsp)
	movl	$1, 232(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L94
	movups	440(%rsp), %xmm6
	leaq	4(%rsp), %rax
	movl	%r12d, %edx
	movups	456(%rsp), %xmm7
	movups	408(%rsp), %xmm1
	movups	424(%rsp), %xmm2
	leaq	504(%rsp), %rsi
	leaq	472(%rsp), %rdi
	movups	%xmm6, 472(%rsp)
	movups	%xmm7, 488(%rsp)
	movups	%xmm1, 504(%rsp)
	movups	%xmm2, 520(%rsp)
	pushq	%rax
	.cfi_def_cfa_offset 648
	pushq	88(%rsp)
	.cfi_def_cfa_offset 656
	pushq	88(%rsp)
	.cfi_def_cfa_offset 664
	pushq	88(%rsp)
	.cfi_def_cfa_offset 672
	pushq	88(%rsp)
	.cfi_def_cfa_offset 680
	pushq	88(%rsp)
	.cfi_def_cfa_offset 688
	pushq	88(%rsp)
	.cfi_def_cfa_offset 696
	pushq	256(%rsp)
	.cfi_def_cfa_offset 704
	movq	256(%rsp), %r9
	movq	248(%rsp), %r8
	movq	240(%rsp), %rcx
	movsd	.LC1(%rip), %xmm0
	call	_Z75__device_stub__Z7helper114cudaPitchedPtrS_diPdS0_S0_S0_S0_S0_S0_S0_S0_S0_PiR14cudaPitchedPtrS0_diPdS1_S1_S1_S1_S1_S1_S1_S1_S1_Pi
	addq	$64, %rsp
	.cfi_def_cfa_offset 640
.L94:
	movq	8(%rsp), %rax
	movsd	.LC1(%rip), %xmm0
	incl	%r14d
	addq	%rbp, %rax
	addsd	(%rax), %xmm0
	movsd	%xmm0, (%rax)
	movq	16(%rsp), %rax
	movsd	.LC1(%rip), %xmm0
	addq	%rbp, %rax
	addsd	(%rax), %xmm0
	movsd	%xmm0, (%rax)
	movq	24(%rsp), %rax
	movsd	.LC1(%rip), %xmm0
	addq	%rbp, %rax
	addsd	(%rax), %xmm0
	movsd	%xmm0, (%rax)
	movq	32(%rsp), %rax
	movsd	.LC1(%rip), %xmm0
	addq	%rbp, %rax
	addsd	(%rax), %xmm0
	movsd	%xmm0, (%rax)
	jmp	.L80
.L99:
	incl	%r12d
	addq	$8, %rbp
	cmpl	$401, %r12d
	jne	.L97
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	movq	80(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	112(%rsp), %rdi
	call	cudaFree@PLT
	movq	120(%rsp), %rdi
	call	cudaFree@PLT
	movq	128(%rsp), %rdi
	call	cudaFree@PLT
	movq	136(%rsp), %rdi
	call	cudaFree@PLT
	movq	144(%rsp), %rdi
	call	cudaFree@PLT
	movq	152(%rsp), %rdi
	call	cudaFree@PLT
	movq	160(%rsp), %rdi
	call	cudaFree@PLT
	movq	168(%rsp), %rdi
	call	cudaFree@PLT
	movq	176(%rsp), %rdi
	call	cudaFree@PLT
	movq	184(%rsp), %rdi
	call	cudaFree@PLT
	movq	192(%rsp), %rdi
	call	cudaFree@PLT
	movq	200(%rsp), %rdi
	call	cudaFree@PLT
	call	clock@PLT
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	subq	%r13, %rax
	cvtsi2sdq	%rax, %xmm0
	movb	$1, %al
	divsd	.LC4(%rip), %xmm0
	call	__printf_chk@PLT
	movq	584(%rsp), %rax
	subq	%fs:40, %rax
	je	.L98
	call	__stack_chk_fail@PLT
.L98:
	addq	$592, %rsp
	.cfi_def_cfa_offset 48
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3636:
	.size	main, .-main
	.section	.rodata.str1.1
.LC7:
	.string	"_Z7helper114cudaPitchedPtrS_diPdS0_S0_S0_S0_S0_S0_S0_S0_S0_Pi"
.LC8:
	.string	"_Z23predicted_vehicle_state14cudaPitchedPtrS_PdS0_S0_S0_diS0_S0_S0_"
.LC9:
	.string	"_Z12mmult_kerneliiiPKdS0_Pd"
.LC10:
	.string	"_Z5func214cudaPitchedPtriiiPdS0_d"
.LC11:
	.string	"_Z5func114cudaPitchedPtriiiPdS0_d"
.LC12:
	.string	"_Z10fill3Dto2D14cudaPitchedPtriiiPdd"
.LC13:
	.string	"_Z6fill3D14cudaPitchedPtriii"
.LC14:
	.string	"_Z15fill2D_specificPdmii"
.LC15:
	.string	"_Z6fill2DPdmii"
.LC16:
	.string	"_Z6fill1DiPdd"
.LC17:
	.string	"_Z3addiPfS_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3684:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC7(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z7helper114cudaPitchedPtrS_diPdS0_S0_S0_S0_S0_S0_S0_S0_S0_Pi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC8(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z23predicted_vehicle_state14cudaPitchedPtrS_PdS0_S0_S0_diS0_S0_S0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC9(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z12mmult_kerneliiiPKdS0_Pd(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC10(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z5func214cudaPitchedPtriiiPdS0_d(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC11(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z5func114cudaPitchedPtriiiPdS0_d(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC12(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z10fill3Dto2D14cudaPitchedPtriiiPdd(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC13(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z6fill3D14cudaPitchedPtriii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC14(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z15fill2D_specificPdmii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	leaq	.LC15(%rip), %rdx
	pushq	$0
	.cfi_def_cfa_offset 24
	movq	%rdx, %rcx
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	_Z6fill2DPdmii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC16(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z6fill1DiPdd(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC17(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z3addiPfS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3684:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	Bfull
	.data
	.align 32
	.type	Bfull, @object
	.size	Bfull, 384
Bfull:
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	2068456250
	.long	-1077661821
	.long	419188808
	.long	-1082992781
	.long	1944761192
	.long	1068176821
	.long	1559932122
	.long	1068418413
	.long	-1628651599
	.long	1066675260
	.long	13743895
	.long	1069089502
	.long	-1532444331
	.long	-1078771634
	.long	1587419913
	.long	1065405225
	.long	-54975581
	.long	-1077676921
	.long	-357341279
	.long	1065727347
	.long	790273982
	.long	1068901597
	.long	-48103634
	.long	-1075022346
	.long	536011919
	.long	1067413458
	.long	412316860
	.long	1069438468
	.long	-948328779
	.long	-1079887319
	.long	-1910401453
	.long	1065054581
	.long	1051407994
	.long	1067539287
	.long	-1917273401
	.long	1061613574
	.long	27487791
	.long	-1084095044
	.long	810889825
	.long	1063495978
	.long	-350469331
	.long	-1086703902
	.long	1608035756
	.long	1064193910
	.long	-941456831
	.long	1066843032
	.long	-1525572384
	.long	1064812989
	.globl	Afull
	.align 32
	.type	Afull, @object
	.size	Afull, 1152
Afull:
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	1793578343
	.long	1072690731
	.long	1216334738
	.long	-1085440577
	.long	2137175726
	.long	1068056025
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	-1030792151
	.long	1074440437
	.long	0
	.long	0
	.long	-336725436
	.long	-1068440128
	.long	0
	.long	0
	.long	-1848553924
	.long	-1074790820
	.long	515396076
	.long	-1080956027
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	-336725436
	.long	1079043520
	.long	0
	.long	0
	.long	2137175726
	.long	1068056025
	.long	515396076
	.long	1066527621
	.long	-54975581
	.long	-1074793337
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	1072693248
	.long	1216334738
	.long	-1085440577
	.long	-254262064
	.long	1068059380
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	-1848553924
	.long	1072692828
	.long	515396076
	.long	1066527621
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	0
	.long	27487791
	.long	-1080949316
	.long	1862297820
	.long	1072694401
	.long	0
	.long	-2147483648
	.long	0
	.long	-2147483648
	.long	-350469331
	.long	1059731170
	.long	-1649267442
	.long	-1073960977
	.long	-769658139
	.long	-1069760657
	.long	0
	.long	0
	.long	-1903529506
	.long	-1081085212
	.long	-1917273401
	.long	-1084821498
	.long	41231686
	.long	1067124890
	.long	2095944040
	.long	-1074776769
	.long	1209462791
	.long	1072823376
	.long	1010176308
	.long	-1076211011
	.long	0
	.long	0
	.long	0
	.long	0
	.long	-350469331
	.long	1058682594
	.long	700938663
	.long	1077973562
	.long	-1724858866
	.long	-1076291542
	.long	0
	.long	-2147483648
	.long	219902326
	.long	1065364960
	.long	1821066134
	.long	-1078330393
	.long	1099511628
	.long	1066460512
	.long	391701017
	.long	-1074212425
	.long	-405444913
	.long	-1074254998
	.long	48103634
	.long	-1068467703
	.long	0
	.long	-2147483648
	.long	0
	.long	-2147483648
	.long	41231686
	.long	-1083504486
	.long	-1388133430
	.long	-1073389975
	.long	-1587419913
	.long	1073493206
	.long	0
	.long	-2147483648
	.long	-852121512
	.long	-1077850565
	.long	1979120930
	.long	1064410336
	.long	-900225145
	.long	-1075592142
	.long	364213227
	.long	1075948539
	.long	769658139
	.long	1079054480
	.long	694066715
	.long	1073778891
	.long	0
	.long	0
	.long	0
	.long	0
	.long	-350469331
	.long	1059731170
	.long	-1587419913
	.long	-1075366698
	.long	-1099511628
	.long	-1075504481
	.long	0
	.long	-2147483648
	.long	-1525572384
	.long	1064812989
	.long	-735298401
	.long	-1080170854
	.long	-357341279
	.long	1067824499
	.long	1188846948
	.long	-1071876093
	.long	632219186
	.long	-1074101276
	.long	-144310901
	.long	1070162404
	.long	0
	.long	-2147483648
	.long	0
	.long	-2147483648
	.long	0
	.long	0
	.long	1147615261
	.long	1068527465
	.long	-226774273
	.long	-1075359568
	.long	0
	.long	0
	.long	1999736773
	.long	1063199021
	.long	817761773
	.long	1064839833
	.long	1594291860
	.long	-1084928872
	.long	-164926744
	.long	1065606551
	.long	900225145
	.long	-1074250803
	.long	109951163
	.long	-1078454544
	.long	0
	.long	-2147483648
	.long	0
	.long	-2147483648
	.long	0
	.long	0
	.long	1429365116
	.long	-1075107280
	.long	-1126999418
	.long	1065161955
	.long	0
	.long	0
	.long	1216334738
	.long	-1083343425
	.long	123695058
	.long	1066473934
	.long	1985992878
	.long	-1083826609
	.long	1271310320
	.long	-1077311177
	.long	529139971
	.long	-1080365469
	.long	1924145349
	.long	-1075605144
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC1:
	.long	-1717986918
	.long	1069128089
	.align 8
.LC2:
	.long	0
	.long	1088421824
	.align 8
.LC3:
	.long	0
	.long	1072693248
	.align 8
.LC4:
	.long	0
	.long	1093567616
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <iostream>
#include <math.h>

// Kernel function to add the elements of two arrays
//Good Reference: http://developer.download.nvidia.com/compute/cuda/3_2_prod/toolkit/docs/CUDA_C_Programming_Guide.pdf

//Resource for multiply: https://github.com/sashasyedin/matrix-multiplication-with-cuda
#include <cstdlib>
#include <iostream>
#include <time.h>
#include <hip/hip_runtime_api.h>
#include <stdio.h>

#include <stdlib.h>
#include <time.h>

double Afull[12][12] = {{0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.9988, -0.0009, 0.0493, 0.0000, 0.0000, 0.0000},
{0.0000, 0.0000, 0.0000, 3.3325, 0.0000, -67.5899, 0.0000, -0.9998, -0.0175, 0.0000, 0.0000, 0.0000},
{0.0000, 0.0000, 0.0000, 0.0000, 67.5899, 0.0000, 0.0493, 0.0175, -0.9986, 0.0000, 0.0000, 0.0000},
{0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 1.0000, -0.0009, 0.0494},
{0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.9998, 0.0175},
{0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, -0.0176, 1.0011},
{-0.0000, -0.0000, 0.0002, -1.7910, -28.7478, 0.0000, -0.0156, -0.0014, 0.0264, -1.0130, 1.1241, -0.4113},
{0.0000, 0.0000, 0.0001, 33.1424, -0.3921, -0.0000, 0.0079, -0.1015, 0.0165, -1.5512, -1.5106, -65.9068},
{-0.0000, -0.0000, -0.0033, -2.6711, 1.7629, -0.0000, -0.1352, 0.0043, -0.6177, 8.8359, 68.2588, 2.0707},
{0.0000, 0.0000, 0.0002, -0.7252, -0.6595, -0.0000, 0.0058, -0.0292, 0.0424, -7.1172, -1.6572, 0.1983},
{-0.0000, -0.0000, 0.0000, 0.0642, -0.7286, 0.0000, 0.0019, 0.0059, -0.0013, 0.0097, -1.5146, -0.0941},
{-0.0000, -0.0000, 0.0000, -0.8489, 0.0071, 0.0000, -0.0036, 0.0167, -0.0027, -0.1995, -0.0263, -0.6115}};

double Bfull[12][4] = {{0.0000, 0.0000, 0.0000, 0.0000},
{0.0000, 0.0000, 0.0000, 0.0000},
{0.0000, 0.0000, 0.0000, 0.0000},
{0.0000, 0.0000, 0.0000, 0.0000},
{0.0000, 0.0000, 0.0000, 0.0000},
{0.0000, 0.0000, 0.0000, 0.0000},
{-0.1577, -0.0046, 0.0529, 0.0601},
{0.0197, 0.0977, -0.0752, 0.0082},
{-0.1559, 0.0106, 0.0865, -0.8894},
{0.0307, 0.1185, -0.0356, 0.0067},
{0.0339, 0.0007, -0.0022, 0.0024},
{-0.0004, 0.0037, 0.0222, 0.0058}};

__global__
void add(int n, float *x, float *y)
{
  for (int i = 0; i < n; i++)
    y[i] = x[i] + y[i];
}

__global__
void fill1D(int length, double matrix[], double num) {
    for (int i = 0; i < length; i++) {
        matrix[i] = num;
    }
}

__global__
void fill2D(double* devPtr, size_t pitch, int width, int height) {
    for (int r = 0; r < height; ++r) {
        double * row = (double*)((char*)devPtr + r * pitch);
        for (int c = 0; c < width; ++c) {
            double element = row[c];
            // printf("%f", row[c]);
        }
    }
}

__global__
void fill2D_specific(double* devPtr, size_t pitch, int width, int height) {
    double Afull[12][12] = {{0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.9988, -0.0009, 0.0493, 0.0000, 0.0000, 0.0000},
    {0.0000, 0.0000, 0.0000, 3.3325, 0.0000, -67.5899, 0.0000, -0.9998, -0.0175, 0.0000, 0.0000, 0.0000},
    {0.0000, 0.0000, 0.0000, 0.0000, 67.5899, 0.0000, 0.0493, 0.0175, -0.9986, 0.0000, 0.0000, 0.0000},
    {0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 1.0000, -0.0009, 0.0494},
    {0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.9998, 0.0175},
    {0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, -0.0176, 1.0011},
    {-0.0000, -0.0000, 0.0002, -1.7910, -28.7478, 0.0000, -0.0156, -0.0014, 0.0264, -1.0130, 1.1241, -0.4113},
    {0.0000, 0.0000, 0.0001, 33.1424, -0.3921, -0.0000, 0.0079, -0.1015, 0.0165, -1.5512, -1.5106, -65.9068},
    {-0.0000, -0.0000, -0.0033, -2.6711, 1.7629, -0.0000, -0.1352, 0.0043, -0.6177, 8.8359, 68.2588, 2.0707},
    {0.0000, 0.0000, 0.0002, -0.7252, -0.6595, -0.0000, 0.0058, -0.0292, 0.0424, -7.1172, -1.6572, 0.1983},
    {-0.0000, -0.0000, 0.0000, 0.0642, -0.7286, 0.0000, 0.0019, 0.0059, -0.0013, 0.0097, -1.5146, -0.0941},
    {-0.0000, -0.0000, 0.0000, -0.8489, 0.0071, 0.0000, -0.0036, 0.0167, -0.0027, -0.1995, -0.0263, -0.6115}};

    double Bfull[12][4] = {{0.0000, 0.0000, 0.0000, 0.0000},
    {0.0000, 0.0000, 0.0000, 0.0000},
    {0.0000, 0.0000, 0.0000, 0.0000},
    {0.0000, 0.0000, 0.0000, 0.0000},
    {0.0000, 0.0000, 0.0000, 0.0000},
    {0.0000, 0.0000, 0.0000, 0.0000},
    {-0.1577, -0.0046, 0.0529, 0.0601},
    {0.0197, 0.0977, -0.0752, 0.0082},
    {-0.1559, 0.0106, 0.0865, -0.8894},
    {0.0307, 0.1185, -0.0356, 0.0067},
    {0.0339, 0.0007, -0.0022, 0.0024},
    {-0.0004, 0.0037, 0.0222, 0.0058}};

    if (width == 12) {
        for (int r = 0; r < height; ++r) {
            double * row = (double*)((char*)devPtr + r * pitch);
            for (int c = 0; c < width; ++c) {
                // double element = row[c];
                row[c] = Afull[r][c];
                // printf("%f", row[c]);
            }
        }
    } else {
        for (int r = 0; r < height; ++r) {
            double * row = (double*)((char*)devPtr + r * pitch);
            for (int c = 0; c < width; ++c) {
                // double element = row[c];
                row[c] = Bfull[r][c];
                // printf("%f", row[c]);
            }
        }
    }

}

__global__ void fill3D(hipPitchedPtr devPitchedPtr, int width, int height, int depth) {
    char* devPtr = (char*)devPitchedPtr.ptr;
    size_t pitch = devPitchedPtr.pitch;
    size_t slicePitch = pitch * height;
    for (int z = 0; z < depth; ++z) {
        char* slice = devPtr + z * slicePitch;
        for (int y = 0; y < height; ++y) {
            double* row = (double*)(slice + y * pitch);
            for (int x = 0; x < width; ++x) {
                double element = row[x];
            }
        }
    }
}

__global__
void fill3Dto2D(hipPitchedPtr devPitchedPtr, int width, int height, int depth, double* devPtr2, double factor) {
    char* devPtr = (char*)devPitchedPtr.ptr;
    size_t pitch = devPitchedPtr.pitch;
    size_t slicePitch = pitch * height;
    for (int z = 0; z < depth; ++z) {
        char* slice = devPtr + z * slicePitch;
        for (int y = 0; y < height; ++y) {
            double* row = (double*)(slice + y * pitch);
            double * row_devPtr2 = (double*)((char*)devPtr2 + y * pitch);
            for (int x = 0; x < width; ++x) {
                // double element = row[x];
                row_devPtr2[x] = factor * abs(row[x]);
            }
        }
    }
}

__global__
void func1(hipPitchedPtr devPitchedPtr, int width, int height, int depth, double* delPtr, double* ddelPtr, double factor) {
    char* devPtr = (char*)devPitchedPtr.ptr;
    size_t pitch = devPitchedPtr.pitch;
    size_t slicePitch = pitch * height;
    for (int z = 0; z < depth; ++z) {
        char* slice = devPtr + z * slicePitch;
        for (int y = 0; y < height; ++y) {
            double* row = (double*)(slice + y * pitch);
            double * delPtr_row = (double*)((char*)delPtr + y * pitch);
            double * ddelPtr_row = (double*)((char*)ddelPtr + y * pitch);
            for (int x = 0; x < width; ++x) {
                // double element = row[x];
                // factor is the random number
                ddelPtr_row[x] = 2 * delPtr_row[x] * factor * row[x] - delPtr_row[x];
            }
        }
    }
}

__global__
void func2(hipPitchedPtr devPitchedPtr, int width, int height, int depth, double* delPtr, double* ddelPtr, double factor) {
    char* devPtr = (char*)devPitchedPtr.ptr;
    size_t pitch = devPitchedPtr.pitch;
    size_t slicePitch = pitch * height;
    for (int z = 0; z < depth; ++z) {
        char* slice = devPtr + z * slicePitch;
        for (int y = 0; y < height; ++y) {
            double* row = (double*)(slice + y * pitch);
            double * delPtr_row = (double*)((char*)delPtr + y * pitch);
            double * ddelPtr_row = (double*)((char*)ddelPtr + y * pitch);
            for (int x = 0; x < width; ++x) {
                // double element = row[x];
                // factor is the random number
                delPtr_row[x] = row[x] + ddelPtr_row[x];
            }
        }
    }
}

// Matrix multiplication functions
// c = a * b
// a: m x n
// b: n x k
// c: m x k
__global__ void mmult_kernel(int m, int n, int k, const double * a, const double * b, double * c)
{
	int globx = blockIdx.x * blockDim.x + threadIdx.x;
	int globy = blockIdx.y * blockDim.y + threadIdx.y;

	__shared__ int l;

	for (l = 0; l < n; l++)
		c[globx * k + globy] += a[globx * n + l] * b[l * k + globy];
}

void mmult_gpu(int m, int n, int k, const double * a, const double * b, double * c)
{
	dim3 dim_Grid(m, k);
	// dim3 dim_Block(BLOCK_SIZE,BLOCK_SIZE);
	mmult_kernel<<<1, 13>>>(m, n, k, a, b, c);
}

// __device__
// void pvs_helper1(cudaPitchedPtr devPitchedPtr, int width, int height, int depth, double* Afull_ptr, double* Bfull_ptr, double* del_bi, double* del_pi, double* del_ci, int k, int l, int dt) {
//     char* devPtr = (char*)devPitchedPtr.ptr;
//     size_t pitch = devPitchedPtr.pitch;
//     size_t slicePitch = pitch * height;
//     for (int z = l; z < l + 1; ++z) {
//         char* slice = devPtr + z * slicePitch;
//         for (int y = 0; y < height; ++y) {
//             double* row = (double*)(slice + y * pitch);
//             for (int x = k; x < k + 1; ++x) {
//                 // double element = row[x];
//                 // states_p(:,k,l) = states_p(:,k-1,l) + dt*(Afull*states_p(:,k-1,l)+Bfull*0.5*([del_bi(1,k-1,l);del_ai(1,k-1,l);del_pi(1,k-1,l);del_ci(1,k-1,l)]+[del_bi(1,k,l);del_ai(1,k,l);del_pi(1,k,l);del_ci(1,k,l)]));
//
//                 // row[x] = row[x - 1] + dt *
//
//             }
//         }
//     }
// }

__global__
void predicted_vehicle_state(hipPitchedPtr states_p, hipPitchedPtr out_states_p, double* del_bi, double* del_ai, double* del_pi, double* del_ci, double dt, int j, double* Afull_ptr, double* Bfull_ptr, double trim_val[]) {
    double Afull[12][12] = {{0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.9988, -0.0009, 0.0493, 0.0000, 0.0000, 0.0000},
    {0.0000, 0.0000, 0.0000, 3.3325, 0.0000, -67.5899, 0.0000, -0.9998, -0.0175, 0.0000, 0.0000, 0.0000},
    {0.0000, 0.0000, 0.0000, 0.0000, 67.5899, 0.0000, 0.0493, 0.0175, -0.9986, 0.0000, 0.0000, 0.0000},
    {0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 1.0000, -0.0009, 0.0494},
    {0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.9998, 0.0175},
    {0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, 0.0000, -0.0176, 1.0011},
    {-0.0000, -0.0000, 0.0002, -1.7910, -28.7478, 0.0000, -0.0156, -0.0014, 0.0264, -1.0130, 1.1241, -0.4113},
    {0.0000, 0.0000, 0.0001, 33.1424, -0.3921, -0.0000, 0.0079, -0.1015, 0.0165, -1.5512, -1.5106, -65.9068},
    {-0.0000, -0.0000, -0.0033, -2.6711, 1.7629, -0.0000, -0.1352, 0.0043, -0.6177, 8.8359, 68.2588, 2.0707},
    {0.0000, 0.0000, 0.0002, -0.7252, -0.6595, -0.0000, 0.0058, -0.0292, 0.0424, -7.1172, -1.6572, 0.1983},
    {-0.0000, -0.0000, 0.0000, 0.0642, -0.7286, 0.0000, 0.0019, 0.0059, -0.0013, 0.0097, -1.5146, -0.0941},
    {-0.0000, -0.0000, 0.0000, -0.8489, 0.0071, 0.0000, -0.0036, 0.0167, -0.0027, -0.1995, -0.0263, -0.6115}};

    double Bfull[12][4] = {{0.0000, 0.0000, 0.0000, 0.0000},
    {0.0000, 0.0000, 0.0000, 0.0000},
    {0.0000, 0.0000, 0.0000, 0.0000},
    {0.0000, 0.0000, 0.0000, 0.0000},
    {0.0000, 0.0000, 0.0000, 0.0000},
    {0.0000, 0.0000, 0.0000, 0.0000},
    {-0.1577, -0.0046, 0.0529, 0.0601},
    {0.0197, 0.0977, -0.0752, 0.0082},
    {-0.1559, 0.0106, 0.0865, -0.8894},
    {0.0307, 0.1185, -0.0356, 0.0067},
    {0.0339, 0.0007, -0.0022, 0.0024},
    {-0.0004, 0.0037, 0.0222, 0.0058}};

    double u0 = trim_val[0];
    double v0 = trim_val[1];
    double w0 = trim_val[2];
    double phi0 = trim_val[3];
    double theta0 = trim_val[4];
    double psi0 = trim_val[5];

    char* states_p_ptr = (char*) states_p.ptr;
    size_t states_p_pitch = states_p.pitch;
    size_t states_p_slicePitch = states_p_pitch * 12;

    char* out_states_p_ptr = (char*) out_states_p.ptr;
    size_t out_states_p_pitch = out_states_p.pitch;
    size_t out_states_p_slicePitch = out_states_p_pitch * 6;

    //depth
    for (int l = 0; l < 100; ++l) {
        char* states_p_slice = states_p_ptr + l * states_p_slicePitch;
        char* out_states_p_slice = out_states_p_ptr + l * out_states_p_slicePitch;

        double* row1 = (double*)(states_p_slice + 0 * states_p_pitch);
        double* row2 = (double*)(states_p_slice + 1 * states_p_pitch);
        double* row3 = (double*)(states_p_slice + 2 * states_p_pitch);
        double* row4 = (double*)(states_p_slice + 3 * states_p_pitch);
        double* row5 = (double*)(states_p_slice + 4 * states_p_pitch);
        double* row6 = (double*)(states_p_slice + 5 * states_p_pitch);
        double* row7 = (double*)(states_p_slice + 6 * states_p_pitch);
        double* row8 = (double*)(states_p_slice + 7 * states_p_pitch);
        double* row9 = (double*)(states_p_slice + 8 * states_p_pitch);
        double* row10 = (double*)(states_p_slice + 9 * states_p_pitch);
        double* row11 = (double*)(states_p_slice + 10 * states_p_pitch);
        double* row12 = (double*)(states_p_slice + 11 * states_p_pitch);

        double* row_out1 = (double*)(out_states_p_slice + 0 * out_states_p_pitch);
        double* row_out2 = (double*)(out_states_p_slice + 1 * out_states_p_pitch);
        double* row_out3 = (double*)(out_states_p_slice + 2 * out_states_p_pitch);
        double* row_out4 = (double*)(out_states_p_slice + 3 * out_states_p_pitch);
        double* row_out5 = (double*)(out_states_p_slice + 4 * out_states_p_pitch);
        double* row_out6 = (double*)(out_states_p_slice + 5 * out_states_p_pitch);
        //height or row
        for (int m = 0; m < 12; ++m) {
            double* row = (double*)(states_p_slice + m * states_p_pitch);
            // double* row_out = (double*)(out_states_p_slice + m * out_states_p_pitch);
            double * row_del_bi = (double*)((char*)del_bi + 0 * states_p_pitch);
            double * row_del_ai = (double*)((char*)del_ai + 0 * states_p_pitch);
            double * row_del_pi = (double*)((char*)del_pi + 0 * states_p_pitch);
            double * row_del_ci = (double*)((char*)del_ci + 0 * states_p_pitch);

            //width or column
            for (int k = j - 1; k < 400; ++k) {
                //Afull * states_p[k -1]
                double temp1 = 0;
                for(int indx1 = 0; indx1 < 12; indx1++) {
                    temp1 += Afull[m][indx1] * row[k - 1];
                }

                double temp2 = 0;
                temp2 = Bfull[m][0] * 0.5 * (row_del_bi[k - 1] + row_del_bi[k])
                        + Bfull[m][1] * 0.5 * (row_del_ai[k - 1] + row_del_ai[k])
                        + Bfull[m][2] * 0.5 * (row_del_pi[k - 1] + row_del_pi[k])
                        + Bfull[m][3] * 0.5 * (row_del_ci[k - 1] + row_del_ci[k]);

                row[k] = row[k - 1] + dt * (temp1 + temp2);


                row_out1[k] = cos(theta0+row5[k])*cos(psi0+row6[k])*(u0+row7[k]) + (sin(phi0+row4[k])*sin(theta0+row5[k])*cos(psi0+row6[k])
                            - cos(phi0+row4[k])*sin(psi0+row6[k]))*(v0+row8[k]) + (cos(phi0+row4[k])*sin(theta0+row5[k])*cos(psi0+row6[k])
                            + sin(phi0+row4[k])*sin(psi0+row6[k]))*(w0+row9[k]);

                row_out2[k] = -(cos(theta0+row5[k])*sin(psi0+row6[k])*(u0+row7[k]) + (sin(phi0+row4[k])*sin(theta0+row5[k])*sin(psi0+row6[k])
                        + cos(phi0+row4[k])*cos(psi0+row6[k]))*(v0+row8[k]) + (cos(phi0+row4[k])*sin(theta0+row5[k])*sin(psi0+row6[k])
                        - sin(phi0+row4[k])*cos(psi0+row6[k]))*(w0+row9[k]));

                row_out3[k] = -(-sin(theta0+row5[k])*(u0+row7[k]) + sin(phi0+row4[k])*cos(theta0+row5[k])*(v0+row8[k])
                    + cos(phi0+row4[k])*cos(theta0+row5[k])*(w0+row9[k]));

                row_out4[k] = row1[k];
                row_out5[k] = row2[k];
                row_out6[k] = row3[k];
                // break;
            }
        }
    }


}


__global__
void helper1(hipPitchedPtr Ji, hipPitchedPtr out_states_p, double dt, int j, double* del_bi, double* del_ai,
    double* del_pi, double* del_ci, double* X_optdel, double* U_opt, double* V_opt, double* Y_opt, double* W_opt, double* Z_opt,
    int* n) {
    // int n = 0;  //Starts counter for trajectories with final position outside of specified band
    double U0_opt = 67.5;
    double V0_opt = 0;
    double W0_opt = 0;
    double X0_opt = -1100;
    double Y0_opt = 550;
    double Z0_opt = 100;
    char* out_states_p_ptr = (char*) out_states_p.ptr;
    size_t out_states_p_pitch = out_states_p.pitch;
    size_t out_states_p_slicePitch = out_states_p_pitch * 6;

    char* Ji_ptr = (char*) Ji.ptr;
    size_t Ji_pitch = Ji.pitch;
    size_t Ji_slicePitch = Ji_pitch * 6;

    double band_u = 3;
    double band_v = 3;
    double band_w = 3;
    double band_x = 5;
    double band_y = 5;
    double band_z = 5;

    double us0 = 33.49;
    //Calculates the performance index for each trajectory
    //These should be fixed by Malloc
    double pathcost[4][400][100];
    double us[400];
    double xeq[400];
    double xseq[400];
    double xs[400];
    double vs[400];
    double ys[400];
    double ws[400];
    double zs[400];
    double F[400];

    for (int l = 1; l < 100; l++) {
        double pc[4] = {};
        char* out_states_p_slice = out_states_p_ptr + l * out_states_p_slicePitch;
        double* row_out1 = (double*)(out_states_p_slice + 0 * out_states_p_pitch);
        double* row_out2 = (double*)(out_states_p_slice + 1 * out_states_p_pitch);
        double* row_out3 = (double*)(out_states_p_slice + 2 * out_states_p_pitch);
        double* row_out4 = (double*)(out_states_p_slice + 3 * out_states_p_pitch);
        double* row_out5 = (double*)(out_states_p_slice + 4 * out_states_p_pitch);
        double* row_out6 = (double*)(out_states_p_slice + 5 * out_states_p_pitch);

        double * row_del_bi = (double*)((char*)del_bi + 0 * out_states_p_pitch);
        double * row_del_ai = (double*)((char*)del_ai + 0 * out_states_p_pitch);
        double * row_del_pi = (double*)((char*)del_pi + 0 * out_states_p_pitch);
        double * row_del_ci = (double*)((char*)del_ci + 0 * out_states_p_pitch);

        char* Ji_slice = Ji_ptr + l * Ji_slicePitch;


        for (int k = j - 1; k < 400; k++) {
            // pc(1)=pc(1)+0.5*dt*(0.025*del_bi(1,k,l)^2+0.25*((out_states_p(1,j,l)-(U0_opt+U_opt(j)))^2)+(1e-06)*((out_states_p(4,j,l)-X_optdel(j))^2));   %Calculates path cost for each trajectory
            pc[0] = pc[0] + 0.5 * dt * (0.025 * row_del_bi[k] * row_del_bi[k] + 0.25 * ((row_out1[j - 1]) - (U0_opt + U_opt[j - 1])) * ((row_out1[j - 1]) - (U0_opt + U_opt[j - 1])) + (0.000001) *(row_out4[j - 1] - X_optdel[j - 1]) * (row_out4[j - 1] - X_optdel[j - 1]));
            // pc(2)=pc(2)+0.5*dt*(0.025*del_ai(1,k,l)^2+0.0167*((out_states_p(2,j,l)-(V0_opt+V_opt(j)))^2)+(2.5e-05)*((out_states_p(5,j,l)-Y_opt(j))^2));   %Calculates path cost for each trajectory
            pc[1] = pc[1] + 0.5 * dt * (0.025 * row_del_ai[k] * row_del_bi[k] + 0.0167 * ((row_out2[j - 1]) - (V0_opt + V_opt[j - 1])) * ((row_out1[j - 1]) - (V0_opt + V_opt[j - 1])) + (0.000025) *(row_out5[j - 1] - Y_opt[j - 1]) * (row_out5[j - 1] - Y_opt[j - 1]));
            // pc(3)=pc(3)+0.5*dt*(0.05*del_pi(1,k,l)^2);   %Calculates path cost for each trajectory
            pc[2] = pc[2] + 0.5 * dt * (0.05 * row_del_pi[k] * row_del_pi[k]) * (0.05 * row_del_pi[k] * row_del_pi[k]);
            // pc(4)=pc(4)+0.5*dt*(0.025*del_ci(1,k,l)^2+0.25*((out_states_p(4,j,l)-(W0_opt+W_opt(j)))^2)+0.0025*((out_states_p(6,j,l)-Z_opt(j))^2));   %Calculates path cost for each trajectory
            pc[3] = pc[3] + 0.5 * dt * (0.025 * row_del_ci[k] * row_del_ci[k] + 0.25 * ((row_out4[j - 1]) - (W0_opt + W_opt[j - 1])) * ((row_out4[j - 1]) - (W0_opt + W_opt[j - 1])) + (0.00025) *(row_out6[j - 1] - Z_opt[j - 1]) * (row_out5[j - 1] - Z_opt[j - 1]));
        }
        pathcost[0][j - 1][l] = pc[0];
        pathcost[1][j - 1][l] = pc[1];
        pathcost[2][j - 1][l] = pc[2];
        pathcost[3][j - 1][l] = pc[3];

        if (abs(row_out1[399]-(us0+us[399]))>band_u && abs(row_out4[399] + xeq[399]+X0_opt-(xseq[399]+xs[399]))>band_x &&
                abs(row_out2[399]-vs[399])>band_v && abs(row_out5[399]+Y0_opt-ys[399])>band_y &&
                abs(row_out3[399]-ws[j - 1])>band_w && abs(row_out6[399]+Z0_opt-zs[j - 1])>band_z) {
            for (int indx = 0; indx < 4; indx++) {
                double* row_Ji = (double*)(Ji_slice + indx * Ji_pitch);
                row_Ji[j - 1] = 0;
            }
            *n = *n + 1;
        } else {
            double* row_Ji1 = (double*)(Ji_slice + 0 * Ji_pitch);
            double* row_Ji2 = (double*)(Ji_slice + 1 * Ji_pitch);
            double* row_Ji3 = (double*)(Ji_slice + 2 * Ji_pitch);
            double* row_Ji4 = (double*)(Ji_slice + 3 * Ji_pitch);

            row_Ji1[j - 1] = pathcost[0][j - 1][l] + pathcost[1][j - 1][l] + pathcost[2][j - 1][l] + pathcost[3][j - 1][l] + F[j - 1] *
            ((row_out1[399] - (us0 + us[399])) * (row_out1[399] - (us0 + us[399]))
                + (row_out4[399] + xeq[399] + X0_opt - xseq[399] - xs[399]) * (row_out4[399] + xeq[399] + X0_opt - xseq[399] - xs[399]));

            row_Ji2[j - 1] = pathcost[0][j - 1][l] + pathcost[1][j - 1][l] + pathcost[2][j - 1][l] + pathcost[3][j - 1][l] + F[j - 1] *
                (row_out2[399] - vs[399]) * (row_out2[399] - vs[399]) +
                (row_out5[399] + Y0_opt - ys[399]) * (row_out5[399] + Y0_opt - ys[399]);

            row_Ji3[j - 1] = pathcost[0][j - 1][l] + pathcost[1][j - 1][l] + pathcost[2][j - 1][l] + pathcost[3][j - 1][l];
            row_Ji4[j - 1] = pathcost[0][j - 1][l] + pathcost[1][j - 1][l] + pathcost[2][j - 1][l] + pathcost[3][j - 1][l] + F[j - 1] *
                (row_out3[399] - ws[j - 1]) * (row_out3[399] - ws[j - 1]) +
                (row_out6[399] + Z0_opt - zs[j - 1]) * (row_out6[399] + Z0_opt - zs[j - 1]);
        }


    }
}




int main(void)
{
    clock_t begin = clock();

    //variables
    double rb_inc = 0.1;
    double ra_inc = 0.1;
    double rp_inc = 0.1;
    double rc_inc = 0.1;

    //some variables to add values
    double *rb, *ra, *rp, *rc;
    hipMallocManaged(&rb, 400 * sizeof(double));
    hipMallocManaged(&ra, 400 * sizeof(double));
    hipMallocManaged(&rp, 400 * sizeof(double));
    hipMallocManaged(&rc, 400 * sizeof(double));


    fill1D<<<1, 256>>>(400, rb, 0.1);
    hipDeviceSynchronize();
    fill1D<<<1, 256>>>(400, ra, 0.1);
    hipDeviceSynchronize();
    fill1D<<<1, 256>>>(400, rp, 0.1);
    hipDeviceSynchronize();
    fill1D<<<1, 256>>>(400, rc, 0.1);
    hipDeviceSynchronize();

    // Host code
    //width is columns and height is rows
    int height = 400, width = 100, depth = 4;

    //1D stuff
    double* X_optdel;
    size_t optdel_size = 400 * sizeof(double);
    hipMalloc(&X_optdel, optdel_size);
    double* U_opt;
    hipMalloc(&U_opt, optdel_size);
    double* V_opt;
    hipMalloc(&V_opt, optdel_size);
    double* Y_opt;
    hipMalloc(&Y_opt, optdel_size);
    double* W_opt;
    hipMalloc(&W_opt, optdel_size);
    double* Z_opt;
    hipMalloc(&Z_opt, optdel_size);

    double* cycles;
    hipMalloc(&cycles, optdel_size);
    double* np;
    hipMalloc(&np, optdel_size);


    //2D stuff
    size_t pitch;

    double* delbmax;
    hipMallocPitch(&delbmax, &pitch, width * sizeof(double), height);
    // fill2D<<<100, 400000>>>(delbmax, pitch, width, height);

    double* delamax;
    hipMallocPitch(&delamax, &pitch, width * sizeof(double), height);

    double* delpmax;
    hipMallocPitch(&delpmax, &pitch, width * sizeof(double), height);

    double* delcmax;
    hipMallocPitch(&delcmax, &pitch, width * sizeof(double), height);

    double* ddelb;
    hipMallocPitch(&ddelb, &pitch, width * sizeof(double), height);

    double* ddela;
    hipMallocPitch(&ddela, &pitch, width * sizeof(double), height);

    double* ddelp;
    hipMallocPitch(&ddelp, &pitch, width * sizeof(double), height);

    double* ddelc;
    hipMallocPitch(&ddelc, &pitch, width * sizeof(double), height);

    double* del_bi;
    hipMallocPitch(&del_bi, &pitch, width * sizeof(double), height);

    double* del_ai;
    hipMallocPitch(&del_ai, &pitch, width * sizeof(double), height);

    double* del_pi;
    hipMallocPitch(&del_pi, &pitch, width * sizeof(double), height);

    double* del_ci;
    hipMallocPitch(&del_ci, &pitch, width * sizeof(double), height);



    double* Afull_ptr;
    hipMallocPitch(&Afull_ptr, &pitch, 12 * sizeof(double), 12);
    fill2D_specific<<<100, 40000>>>(Afull_ptr, pitch, 12, 12);

    double* Bfull_ptr;
    hipMallocPitch(&Bfull_ptr, &pitch, 4 * sizeof(double), 12);
    fill2D_specific<<<100, 40000>>>(Bfull_ptr, pitch, 4, 12);

    //3D stuff
    hipExtent extent = make_hipExtent(400 * sizeof(double), 4, 100);
    hipPitchedPtr del_con;
    hipMalloc3D(&del_con, extent);
    fill3D<<<100, 40000>>>(del_con, 400, 4, 100);

    hipExtent extent2 = make_hipExtent(400 * sizeof(double), 12, 100);
    hipPitchedPtr states_p;
    hipMalloc3D(&states_p, extent2);
    fill3D<<<100, 40000>>>(states_p, 400, 12, 100);

    hipExtent extent3 = make_hipExtent(400 * sizeof(double), 6, 100);
    hipPitchedPtr out_states_p;
    hipMalloc3D(&out_states_p, extent3);
    fill3D<<<100, 40000>>>(out_states_p, 400, 6, 100);

    hipExtent extent4 = make_hipExtent(400 * sizeof(double), 4, 100);
    hipPitchedPtr Ji;
    hipMalloc3D(&Ji, extent4);
    fill3D<<<100, 40000>>>(Ji, 400, 4, 100);


    //other stuff
    double trim_val[] = {67.5077, -0.0585, 3.3319, -0.0175, 0.0493, 0};





    for (int j = 2; j <= 400; j++) {
        int n = 100; //Counter of trajectories with final x-position outside of specified band in relation to ship's landing position
        int m = 1;    //Counter for number of cycles in while loop


        while (n > 90 && m < 10) {
            fill3Dto2D<<<100, 40000>>>(del_con, width, height, 1, delbmax, rb[j - 1]);
            fill3Dto2D<<<100, 40000>>>(del_con, width, height, 2, delamax, ra[j - 1]);
            fill3Dto2D<<<100, 40000>>>(del_con, width, height, 3, delpmax, rp[j - 1]);
            fill3Dto2D<<<100, 40000>>>(del_con, width, height, 4, delcmax, rc[j - 1]);

            srand(time(0));
            func1<<<100, 40000>>>(del_con, width, height, 1, delbmax, ddelb, (double)rand() / 32767.0);
            srand(time(0));
            func1<<<100, 40000>>>(del_con, width, height, 2, delamax, ddela, (double)rand() / 32767.0);
            srand(time(0));
            func1<<<100, 40000>>>(del_con, width, height, 3, delpmax, ddelp, (double)rand() / 32767.0);
            srand(time(0));
            func1<<<100, 40000>>>(del_con, width, height, 4, delcmax, ddelc, (double)rand() / 32767.0);


            func2<<<100, 40000>>>(del_con, width, height, 4, del_bi, ddelb, 1.0);
            func2<<<100, 40000>>>(del_con, width, height, 4, del_ai, ddela, 1.0);
            func2<<<100, 40000>>>(del_con, width, height, 4, del_pi, ddelp, 1.0);
            func2<<<100, 40000>>>(del_con, width, height, 4, del_ci, ddelc, 1.0);

            //Predicted vehicle state -------------------
            // void predicted_vehicle_state(double* states_p, cudaPitchedPtr out_states_p, double* del_bi, double* del_ai, double* del_pi, double* del_ci, double dt, int j, double* Afull_ptr, double* Bfull_ptr, double trim_val[])
            double dt = 0.1;
            predicted_vehicle_state<<<100, 40000>>>(states_p, out_states_p, del_bi, del_ai, del_pi, del_ci, dt, j, Afull_ptr, Bfull_ptr, trim_val);

            helper1<<<100, 40000>>>(Ji, out_states_p, dt, j, del_bi, del_ai,
                del_pi, del_ci, X_optdel, U_opt, V_opt, Y_opt, W_opt, Z_opt,
                &n);

            rb[j - 1] = rb[j - 1] + rb_inc;
            ra[j - 1] = ra[j - 1] + ra_inc;
            rp[j - 1] = rp[j - 1] + rp_inc;
            rc[j - 1] = rc[j - 1] + rc_inc;
            m++;
            // break;


        }

        //Calculation of Cost is done here
        // cycles[j - 1] = m;
        // np[j - 1] = 100 - n;


    }

    hipFree(U_opt);
    hipFree(V_opt);
    hipFree(W_opt);
    hipFree(X_optdel);
    hipFree(Y_opt);
    hipFree(Z_opt);

    hipFree(rb);
    hipFree(ra);
    hipFree(rp);
    hipFree(rc);

    hipFree(delbmax);
    hipFree(delamax);
    hipFree(delpmax);
    hipFree(delcmax);

    hipFree(ddelb);
    hipFree(ddela);
    hipFree(ddelp);
    hipFree(ddelc);

    hipFree(del_bi);
    hipFree(del_ai);
    hipFree(del_pi);
    hipFree(del_ci);

    // cudaFree(del_con);

    clock_t end = clock();
    double time_spent = (double)(end - begin) / CLOCKS_PER_SEC;
    printf("Path Integral took: %f seconds \n", time_spent);
    return 0;
}

	.text
	.file	"pathIntegral.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z18__device_stub__addiPfS_     # -- Begin function _Z18__device_stub__addiPfS_
	.type	_Z18__device_stub__addiPfS_,@function
_Z18__device_stub__addiPfS_:            # @_Z18__device_stub__addiPfS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	40(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	32(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z3addiPfS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z18__device_stub__addiPfS_, .Lfunc_end0-_Z18__device_stub__addiPfS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z21__device_stub__fill1DiPdd   # -- Begin function _Z21__device_stub__fill1DiPdd
	.type	_Z21__device_stub__fill1DiPdd,@function
_Z21__device_stub__fill1DiPdd:          # @_Z21__device_stub__fill1DiPdd
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	40(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	32(%rsp), %rdx
	movsd	%xmm0, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rdx, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6fill1DiPdd, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z21__device_stub__fill1DiPdd, .Lfunc_end1-_Z21__device_stub__fill1DiPdd
	.cfi_endproc
                                        # -- End function
	.globl	_Z21__device_stub__fill2DPdmii  # -- Begin function _Z21__device_stub__fill2DPdmii
	.type	_Z21__device_stub__fill2DPdmii,@function
_Z21__device_stub__fill2DPdmii:         # @_Z21__device_stub__fill2DPdmii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6fill2DPdmii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z21__device_stub__fill2DPdmii, .Lfunc_end2-_Z21__device_stub__fill2DPdmii
	.cfi_endproc
                                        # -- End function
	.globl	_Z30__device_stub__fill2D_specificPdmii # -- Begin function _Z30__device_stub__fill2D_specificPdmii
	.type	_Z30__device_stub__fill2D_specificPdmii,@function
_Z30__device_stub__fill2D_specificPdmii: # @_Z30__device_stub__fill2D_specificPdmii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15fill2D_specificPdmii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z30__device_stub__fill2D_specificPdmii, .Lfunc_end3-_Z30__device_stub__fill2D_specificPdmii
	.cfi_endproc
                                        # -- End function
	.globl	_Z21__device_stub__fill3D13hipPitchedPtriii # -- Begin function _Z21__device_stub__fill3D13hipPitchedPtriii
	.type	_Z21__device_stub__fill3D13hipPitchedPtriii,@function
_Z21__device_stub__fill3D13hipPitchedPtriii: # @_Z21__device_stub__fill3D13hipPitchedPtriii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$96, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	8(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	4(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	144(%rsp), %rdx
	leaq	64(%rsp), %rbx
	movq	%rdx, (%rbx)
	movq	%rax, 8(%rbx)
	movq	%rcx, 16(%rbx)
	movq	%rsi, 24(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6fill3D13hipPitchedPtriii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$112, %rsp
	.cfi_adjust_cfa_offset -112
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z21__device_stub__fill3D13hipPitchedPtriii, .Lfunc_end4-_Z21__device_stub__fill3D13hipPitchedPtriii
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__fill3Dto2D13hipPitchedPtriiiPdd # -- Begin function _Z25__device_stub__fill3Dto2D13hipPitchedPtriiiPdd
	.type	_Z25__device_stub__fill3Dto2D13hipPitchedPtriiiPdd,@function
_Z25__device_stub__fill3Dto2D13hipPitchedPtriiiPdd: # @_Z25__device_stub__fill3Dto2D13hipPitchedPtriiiPdd
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	8(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	4(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	32(%rsp), %rcx
	movsd	%xmm0, (%rcx)
	leaq	176(%rsp), %r8
	leaq	80(%rsp), %rbx
	movq	%r8, (%rbx)
	movq	%rax, 8(%rbx)
	movq	%rdi, 16(%rbx)
	movq	%rsi, 24(%rbx)
	movq	%rdx, 32(%rbx)
	movq	%rcx, 40(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10fill3Dto2D13hipPitchedPtriiiPdd, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z25__device_stub__fill3Dto2D13hipPitchedPtriiiPdd, .Lfunc_end5-_Z25__device_stub__fill3Dto2D13hipPitchedPtriiiPdd
	.cfi_endproc
                                        # -- End function
	.globl	_Z20__device_stub__func113hipPitchedPtriiiPdS0_d # -- Begin function _Z20__device_stub__func113hipPitchedPtriiiPdS0_d
	.type	_Z20__device_stub__func113hipPitchedPtriiiPdS0_d,@function
_Z20__device_stub__func113hipPitchedPtriiiPdS0_d: # @_Z20__device_stub__func113hipPitchedPtriiiPdS0_d
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	20(%rsp), %rax
	movl	%edi, (%rax)
	leaq	16(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	56(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	48(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	40(%rsp), %r8
	movsd	%xmm0, (%r8)
	leaq	208(%rsp), %r9
	leaq	96(%rsp), %rbx
	movq	%r9, (%rbx)
	movq	%rax, 8(%rbx)
	movq	%rdi, 16(%rbx)
	movq	%rsi, 24(%rbx)
	movq	%rdx, 32(%rbx)
	movq	%rcx, 40(%rbx)
	movq	%r8, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z5func113hipPitchedPtriiiPdS0_d, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z20__device_stub__func113hipPitchedPtriiiPdS0_d, .Lfunc_end6-_Z20__device_stub__func113hipPitchedPtriiiPdS0_d
	.cfi_endproc
                                        # -- End function
	.globl	_Z20__device_stub__func213hipPitchedPtriiiPdS0_d # -- Begin function _Z20__device_stub__func213hipPitchedPtriiiPdS0_d
	.type	_Z20__device_stub__func213hipPitchedPtriiiPdS0_d,@function
_Z20__device_stub__func213hipPitchedPtriiiPdS0_d: # @_Z20__device_stub__func213hipPitchedPtriiiPdS0_d
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	20(%rsp), %rax
	movl	%edi, (%rax)
	leaq	16(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	56(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	48(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	40(%rsp), %r8
	movsd	%xmm0, (%r8)
	leaq	208(%rsp), %r9
	leaq	96(%rsp), %rbx
	movq	%r9, (%rbx)
	movq	%rax, 8(%rbx)
	movq	%rdi, 16(%rbx)
	movq	%rsi, 24(%rbx)
	movq	%rdx, 32(%rbx)
	movq	%rcx, 40(%rbx)
	movq	%r8, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z5func213hipPitchedPtriiiPdS0_d, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	_Z20__device_stub__func213hipPitchedPtriiiPdS0_d, .Lfunc_end7-_Z20__device_stub__func213hipPitchedPtriiiPdS0_d
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__mmult_kerneliiiPKdS0_Pd # -- Begin function _Z27__device_stub__mmult_kerneliiiPKdS0_Pd
	.type	_Z27__device_stub__mmult_kerneliiiPKdS0_Pd,@function
_Z27__device_stub__mmult_kerneliiiPKdS0_Pd: # @_Z27__device_stub__mmult_kerneliiiPKdS0_Pd
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	20(%rsp), %rax
	movl	%edi, (%rax)
	leaq	16(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	56(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	48(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	40(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12mmult_kerneliiiPKdS0_Pd, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	_Z27__device_stub__mmult_kerneliiiPKdS0_Pd, .Lfunc_end8-_Z27__device_stub__mmult_kerneliiiPKdS0_Pd
	.cfi_endproc
                                        # -- End function
	.globl	_Z9mmult_gpuiiiPKdS0_Pd         # -- Begin function _Z9mmult_gpuiiiPKdS0_Pd
	.type	_Z9mmult_gpuiiiPKdS0_Pd,@function
_Z9mmult_gpuiiiPKdS0_Pd:                # @_Z9mmult_gpuiiiPKdS0_Pd
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %rbx
	movq	%r8, %r14
	movq	%rcx, %r15
	movl	%edx, %ebp
	movl	%esi, %r12d
	movl	%edi, %r13d
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	leaq	12(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	je	.LBB9_2
# %bb.1:
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB9_2:
	.cfi_def_cfa_offset 64
	movl	%r13d, %edi
	movl	%r12d, %esi
	movl	%ebp, %edx
	movq	%r15, %rcx
	movq	%r14, %r8
	movq	%rbx, %r9
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z27__device_stub__mmult_kerneliiiPKdS0_Pd # TAILCALL
.Lfunc_end9:
	.size	_Z9mmult_gpuiiiPKdS0_Pd, .Lfunc_end9-_Z9mmult_gpuiiiPKdS0_Pd
	.cfi_endproc
                                        # -- End function
	.globl	_Z38__device_stub__predicted_vehicle_state13hipPitchedPtrS_PdS0_S0_S0_diS0_S0_S0_ # -- Begin function _Z38__device_stub__predicted_vehicle_state13hipPitchedPtrS_PdS0_S0_S0_diS0_S0_S0_
	.type	_Z38__device_stub__predicted_vehicle_state13hipPitchedPtrS_PdS0_S0_S0_diS0_S0_S0_,@function
_Z38__device_stub__predicted_vehicle_state13hipPitchedPtrS_PdS0_S0_S0_diS0_S0_S0_: # @_Z38__device_stub__predicted_vehicle_state13hipPitchedPtrS_PdS0_S0_S0_diS0_S0_S0_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$208, %rsp
	.cfi_def_cfa_offset 256
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	72(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	64(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	56(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	48(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	40(%rsp), %rcx
	movsd	%xmm0, (%rcx)
	leaq	12(%rsp), %r10
	movl	%r8d, (%r10)
	leaq	32(%rsp), %r8
	movq	%r9, (%r8)
	leaq	256(%rsp), %r9
	leaq	112(%rsp), %rbx
	movq	%r9, (%rbx)
	leaq	288(%rsp), %r9
	movq	%r9, 8(%rbx)
	movq	%rax, 16(%rbx)
	movq	%rdi, 24(%rbx)
	movq	%rsi, 32(%rbx)
	movq	%rdx, 40(%rbx)
	movq	%rcx, 48(%rbx)
	movq	%r10, 56(%rbx)
	movq	%r8, 64(%rbx)
	leaq	320(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	328(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	96(%rsp), %r14
	leaq	80(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z23predicted_vehicle_state13hipPitchedPtrS_PdS0_S0_S0_diS0_S0_S0_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$224, %rsp
	.cfi_adjust_cfa_offset -224
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end10:
	.size	_Z38__device_stub__predicted_vehicle_state13hipPitchedPtrS_PdS0_S0_S0_diS0_S0_S0_, .Lfunc_end10-_Z38__device_stub__predicted_vehicle_state13hipPitchedPtrS_PdS0_S0_S0_diS0_S0_S0_
	.cfi_endproc
                                        # -- End function
	.globl	_Z22__device_stub__helper113hipPitchedPtrS_diPdS0_S0_S0_S0_S0_S0_S0_S0_S0_Pi # -- Begin function _Z22__device_stub__helper113hipPitchedPtrS_diPdS0_S0_S0_S0_S0_S0_S0_S0_S0_Pi
	.type	_Z22__device_stub__helper113hipPitchedPtrS_diPdS0_S0_S0_S0_S0_S0_S0_S0_S0_Pi,@function
_Z22__device_stub__helper113hipPitchedPtrS_diPdS0_S0_S0_S0_S0_S0_S0_S0_S0_Pi: # @_Z22__device_stub__helper113hipPitchedPtrS_diPdS0_S0_S0_S0_S0_S0_S0_S0_S0_Pi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$240, %rsp
	.cfi_def_cfa_offset 288
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	72(%rsp), %rax
	movsd	%xmm0, (%rax)
	leaq	12(%rsp), %r10
	movl	%edi, (%r10)
	leaq	64(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	56(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	48(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	40(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	32(%rsp), %r8
	movq	%r9, (%r8)
	leaq	288(%rsp), %r9
	leaq	112(%rsp), %rbx
	movq	%r9, (%rbx)
	leaq	320(%rsp), %r9
	movq	%r9, 8(%rbx)
	movq	%rax, 16(%rbx)
	movq	%r10, 24(%rbx)
	movq	%rdi, 32(%rbx)
	movq	%rsi, 40(%rbx)
	movq	%rdx, 48(%rbx)
	movq	%rcx, 56(%rbx)
	movq	%r8, 64(%rbx)
	leaq	352(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	360(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	368(%rsp), %rax
	movq	%rax, 88(%rbx)
	leaq	376(%rsp), %rax
	movq	%rax, 96(%rbx)
	leaq	384(%rsp), %rax
	movq	%rax, 104(%rbx)
	leaq	392(%rsp), %rax
	movq	%rax, 112(%rbx)
	leaq	96(%rsp), %r14
	leaq	80(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7helper113hipPitchedPtrS_diPdS0_S0_S0_S0_S0_S0_S0_S0_S0_Pi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$256, %rsp                      # imm = 0x100
	.cfi_adjust_cfa_offset -256
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end11:
	.size	_Z22__device_stub__helper113hipPitchedPtrS_diPdS0_S0_S0_S0_S0_S0_S0_S0_S0_Pi, .Lfunc_end11-_Z22__device_stub__helper113hipPitchedPtrS_diPdS0_S0_S0_S0_S0_S0_S0_S0_S0_Pi
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI12_0:
	.quad	0x3fb999999999999a              # double 0.10000000000000001
.LCPI12_1:
	.quad	0x40dfffc000000000              # double 32767
.LCPI12_2:
	.quad	0x3ff0000000000000              # double 1
.LCPI12_3:
	.quad	0x412e848000000000              # double 1.0E+6
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$760, %rsp                      # imm = 0x2F8
	.cfi_def_cfa_offset 816
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movabsq	$4294967396, %r14               # imm = 0x100000064
	callq	clock
	movq	%rax, 360(%rsp)                 # 8-byte Spill
	leaq	216(%rsp), %rdi
	movl	$3200, %esi                     # imm = 0xC80
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	208(%rsp), %rdi
	movl	$3200, %esi                     # imm = 0xC80
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	200(%rsp), %rdi
	movl	$3200, %esi                     # imm = 0xC80
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	192(%rsp), %rdi
	movl	$3200, %esi                     # imm = 0xC80
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	-99(%r14), %r12
	leaq	156(%r14), %r15
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB12_2
# %bb.1:
	movq	216(%rsp), %rsi
	movsd	.LCPI12_0(%rip), %xmm0          # xmm0 = mem[0],zero
	movl	$400, %edi                      # imm = 0x190
	callq	_Z21__device_stub__fill1DiPdd
.LBB12_2:
	callq	hipDeviceSynchronize
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB12_4
# %bb.3:
	movq	208(%rsp), %rsi
	movsd	.LCPI12_0(%rip), %xmm0          # xmm0 = mem[0],zero
	movl	$400, %edi                      # imm = 0x190
	callq	_Z21__device_stub__fill1DiPdd
.LBB12_4:
	callq	hipDeviceSynchronize
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB12_6
# %bb.5:
	movq	200(%rsp), %rsi
	movsd	.LCPI12_0(%rip), %xmm0          # xmm0 = mem[0],zero
	movl	$400, %edi                      # imm = 0x190
	callq	_Z21__device_stub__fill1DiPdd
.LBB12_6:
	callq	hipDeviceSynchronize
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB12_8
# %bb.7:
	movq	192(%rsp), %rsi
	movsd	.LCPI12_0(%rip), %xmm0          # xmm0 = mem[0],zero
	movl	$400, %edi                      # imm = 0x190
	callq	_Z21__device_stub__fill1DiPdd
.LBB12_8:
	callq	hipDeviceSynchronize
	leaq	352(%rsp), %rdi
	movl	$3200, %esi                     # imm = 0xC80
	callq	hipMalloc
	leaq	344(%rsp), %rdi
	movl	$3200, %esi                     # imm = 0xC80
	callq	hipMalloc
	leaq	336(%rsp), %rdi
	movl	$3200, %esi                     # imm = 0xC80
	callq	hipMalloc
	leaq	328(%rsp), %rdi
	movl	$3200, %esi                     # imm = 0xC80
	callq	hipMalloc
	leaq	320(%rsp), %rdi
	movl	$3200, %esi                     # imm = 0xC80
	callq	hipMalloc
	leaq	312(%rsp), %rdi
	movl	$3200, %esi                     # imm = 0xC80
	callq	hipMalloc
	leaq	696(%rsp), %rdi
	movl	$3200, %esi                     # imm = 0xC80
	callq	hipMalloc
	leaq	688(%rsp), %rdi
	movl	$3200, %esi                     # imm = 0xC80
	callq	hipMalloc
	leaq	280(%rsp), %rdi
	leaq	288(%rsp), %r15
	movl	$800, %edx                      # imm = 0x320
	movl	$400, %ecx                      # imm = 0x190
	movq	%r15, %rsi
	callq	hipMallocPitch
	leaq	272(%rsp), %rdi
	movl	$800, %edx                      # imm = 0x320
	movl	$400, %ecx                      # imm = 0x190
	movq	%r15, %rsi
	callq	hipMallocPitch
	leaq	264(%rsp), %rdi
	movl	$800, %edx                      # imm = 0x320
	movl	$400, %ecx                      # imm = 0x190
	movq	%r15, %rsi
	callq	hipMallocPitch
	leaq	256(%rsp), %rdi
	movl	$800, %edx                      # imm = 0x320
	movl	$400, %ecx                      # imm = 0x190
	movq	%r15, %rsi
	callq	hipMallocPitch
	leaq	248(%rsp), %rdi
	movl	$800, %edx                      # imm = 0x320
	movl	$400, %ecx                      # imm = 0x190
	movq	%r15, %rsi
	callq	hipMallocPitch
	leaq	240(%rsp), %rdi
	movl	$800, %edx                      # imm = 0x320
	movl	$400, %ecx                      # imm = 0x190
	movq	%r15, %rsi
	callq	hipMallocPitch
	leaq	232(%rsp), %rdi
	movl	$800, %edx                      # imm = 0x320
	movl	$400, %ecx                      # imm = 0x190
	movq	%r15, %rsi
	callq	hipMallocPitch
	leaq	224(%rsp), %rdi
	movl	$800, %edx                      # imm = 0x320
	movl	$400, %ecx                      # imm = 0x190
	movq	%r15, %rsi
	callq	hipMallocPitch
	leaq	184(%rsp), %rdi
	movl	$800, %edx                      # imm = 0x320
	movl	$400, %ecx                      # imm = 0x190
	movq	%r15, %rsi
	callq	hipMallocPitch
	leaq	176(%rsp), %rdi
	movl	$800, %edx                      # imm = 0x320
	movl	$400, %ecx                      # imm = 0x190
	movq	%r15, %rsi
	callq	hipMallocPitch
	leaq	168(%rsp), %rdi
	movl	$800, %edx                      # imm = 0x320
	movl	$400, %ecx                      # imm = 0x190
	movq	%r15, %rsi
	callq	hipMallocPitch
	leaq	160(%rsp), %rdi
	movl	$800, %edx                      # imm = 0x320
	movl	$400, %ecx                      # imm = 0x190
	movq	%r15, %rsi
	callq	hipMallocPitch
	leaq	304(%rsp), %rdi
	movl	$96, %edx
	movl	$12, %ecx
	movq	%r15, %rsi
	callq	hipMallocPitch
	leaq	39900(%r14), %r15
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB12_10
# %bb.9:
	movq	304(%rsp), %rdi
	movq	288(%rsp), %rsi
	movl	$12, %edx
	movl	$12, %ecx
	callq	_Z30__device_stub__fill2D_specificPdmii
.LBB12_10:
	leaq	296(%rsp), %rdi
	leaq	288(%rsp), %rsi
	movl	$32, %edx
	movl	$12, %ecx
	callq	hipMallocPitch
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB12_12
# %bb.11:
	movq	296(%rsp), %rdi
	movq	288(%rsp), %rsi
	movl	$4, %edx
	movl	$12, %ecx
	callq	_Z30__device_stub__fill2D_specificPdmii
.LBB12_12:
	movq	$3200, 472(%rsp)                # imm = 0xC80
	movq	$4, 480(%rsp)
	movl	$100, %ebx
	movq	%rbx, 488(%rsp)
	movq	%rbx, 16(%rsp)
	movups	472(%rsp), %xmm0
	movups	%xmm0, (%rsp)
	leaq	120(%rsp), %rdi
	callq	hipMalloc3D
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB12_14
# %bb.13:
	movups	120(%rsp), %xmm0
	movupd	136(%rsp), %xmm1
	movupd	%xmm1, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$400, %edi                      # imm = 0x190
	movl	$4, %esi
	movl	$100, %edx
	callq	_Z21__device_stub__fill3D13hipPitchedPtriii
.LBB12_14:
	movq	$3200, 448(%rsp)                # imm = 0xC80
	movq	$12, 456(%rsp)
	movq	%rbx, 464(%rsp)
	movq	%rbx, 16(%rsp)
	movups	448(%rsp), %xmm0
	movups	%xmm0, (%rsp)
	leaq	528(%rsp), %rdi
	callq	hipMalloc3D
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB12_16
# %bb.15:
	movups	528(%rsp), %xmm0
	movupd	544(%rsp), %xmm1
	movupd	%xmm1, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$400, %edi                      # imm = 0x190
	movl	$12, %esi
	movl	$100, %edx
	callq	_Z21__device_stub__fill3D13hipPitchedPtriii
.LBB12_16:
	movq	$3200, 424(%rsp)                # imm = 0xC80
	movq	$6, 432(%rsp)
	movl	$100, %ebx
	movq	%rbx, 440(%rsp)
	movq	%rbx, 16(%rsp)
	movups	424(%rsp), %xmm0
	movups	%xmm0, (%rsp)
	leaq	368(%rsp), %rdi
	callq	hipMalloc3D
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB12_18
# %bb.17:
	movups	368(%rsp), %xmm0
	movupd	384(%rsp), %xmm1
	movupd	%xmm1, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$400, %edi                      # imm = 0x190
	movl	$6, %esi
	movl	$100, %edx
	callq	_Z21__device_stub__fill3D13hipPitchedPtriii
.LBB12_18:
	movq	$3200, 400(%rsp)                # imm = 0xC80
	movq	$4, 408(%rsp)
	movq	%rbx, 416(%rsp)
	movq	%rbx, 16(%rsp)
	movupd	400(%rsp), %xmm0
	movupd	%xmm0, (%rsp)
	leaq	496(%rsp), %rdi
	callq	hipMalloc3D
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB12_20
# %bb.19:
	movupd	496(%rsp), %xmm0
	movupd	512(%rsp), %xmm1
	movupd	%xmm1, 16(%rsp)
	movupd	%xmm0, (%rsp)
	movl	$400, %edi                      # imm = 0x190
	movl	$4, %esi
	movl	$100, %edx
	callq	_Z21__device_stub__fill3D13hipPitchedPtriii
.LBB12_20:
	xorpd	%xmm0, %xmm0
	leaq	704(%rsp), %rcx
	movapd	%xmm0, 32(%rcx)
	movabsq	$4634450849008192376, %rax      # imm = 0x4050E07E28240B78
	movq	%rax, (%rcx)
	movabsq	$-4634780477316543807, %rax     # imm = 0xBFADF3B645A1CAC1
	movq	%rax, 8(%rcx)
	movabsq	$4614685190599235286, %rax      # imm = 0x400AA7BB2FEC56D6
	movq	%rax, 16(%rcx)
	movabsq	$-4642670783863696916, %rax     # imm = 0xBF91EB851EB851EC
	movq	%rax, 24(%rcx)
	movabsq	$4587265699807934126, %rax      # imm = 0x3FA93DD97F62B6AE
	movq	%rax, 32(%rcx)
	movl	$2, %r12d
.LBB12_21:                              # %.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB12_22 Depth 2
	movl	$100, 156(%rsp)
	movl	$1, %ebx
.LBB12_22:                              #   Parent Loop BB12_21 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB12_24
# %bb.23:                               #   in Loop: Header=BB12_22 Depth=2
	movq	280(%rsp), %rcx
	movq	216(%rsp), %rax
	movsd	-8(%rax,%r12,8), %xmm0          # xmm0 = mem[0],zero
	movupd	120(%rsp), %xmm1
	movups	136(%rsp), %xmm2
	movups	%xmm2, 16(%rsp)
	movupd	%xmm1, (%rsp)
	movl	$100, %edi
	movl	$400, %esi                      # imm = 0x190
	movl	$1, %edx
	callq	_Z25__device_stub__fill3Dto2D13hipPitchedPtriiiPdd
.LBB12_24:                              #   in Loop: Header=BB12_22 Depth=2
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB12_26
# %bb.25:                               #   in Loop: Header=BB12_22 Depth=2
	movq	272(%rsp), %rcx
	movq	208(%rsp), %rax
	movsd	-8(%rax,%r12,8), %xmm0          # xmm0 = mem[0],zero
	movupd	120(%rsp), %xmm1
	movups	136(%rsp), %xmm2
	movups	%xmm2, 16(%rsp)
	movupd	%xmm1, (%rsp)
	movl	$100, %edi
	movl	$400, %esi                      # imm = 0x190
	movl	$2, %edx
	callq	_Z25__device_stub__fill3Dto2D13hipPitchedPtriiiPdd
.LBB12_26:                              #   in Loop: Header=BB12_22 Depth=2
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB12_28
# %bb.27:                               #   in Loop: Header=BB12_22 Depth=2
	movq	264(%rsp), %rcx
	movq	200(%rsp), %rax
	movsd	-8(%rax,%r12,8), %xmm0          # xmm0 = mem[0],zero
	movupd	120(%rsp), %xmm1
	movups	136(%rsp), %xmm2
	movups	%xmm2, 16(%rsp)
	movupd	%xmm1, (%rsp)
	movl	$100, %edi
	movl	$400, %esi                      # imm = 0x190
	movl	$3, %edx
	callq	_Z25__device_stub__fill3Dto2D13hipPitchedPtriiiPdd
.LBB12_28:                              #   in Loop: Header=BB12_22 Depth=2
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB12_30
# %bb.29:                               #   in Loop: Header=BB12_22 Depth=2
	movq	256(%rsp), %rcx
	movq	192(%rsp), %rax
	movsd	-8(%rax,%r12,8), %xmm0          # xmm0 = mem[0],zero
	movupd	120(%rsp), %xmm1
	movups	136(%rsp), %xmm2
	movups	%xmm2, 16(%rsp)
	movupd	%xmm1, (%rsp)
	movl	$100, %edi
	movl	$400, %esi                      # imm = 0x190
	movl	$4, %edx
	callq	_Z25__device_stub__fill3Dto2D13hipPitchedPtriiiPdd
.LBB12_30:                              #   in Loop: Header=BB12_22 Depth=2
	xorl	%edi, %edi
	callq	time
	movl	%eax, %edi
	callq	srand
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB12_32
# %bb.31:                               #   in Loop: Header=BB12_22 Depth=2
	movups	120(%rsp), %xmm0
	movups	136(%rsp), %xmm1
	movaps	%xmm1, 672(%rsp)
	movaps	%xmm0, 656(%rsp)
	movq	280(%rsp), %r13
	movq	248(%rsp), %rbp
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2sd	%eax, %xmm0
	divsd	.LCPI12_1(%rip), %xmm0
	movapd	656(%rsp), %xmm1
	movaps	672(%rsp), %xmm2
	movups	%xmm2, 16(%rsp)
	movupd	%xmm1, (%rsp)
	movl	$100, %edi
	movl	$400, %esi                      # imm = 0x190
	movl	$1, %edx
	movq	%r13, %rcx
	movq	%rbp, %r8
	callq	_Z20__device_stub__func113hipPitchedPtriiiPdS0_d
.LBB12_32:                              #   in Loop: Header=BB12_22 Depth=2
	xorl	%edi, %edi
	callq	time
	movl	%eax, %edi
	callq	srand
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB12_34
# %bb.33:                               #   in Loop: Header=BB12_22 Depth=2
	movups	120(%rsp), %xmm0
	movups	136(%rsp), %xmm1
	movaps	%xmm1, 640(%rsp)
	movaps	%xmm0, 624(%rsp)
	movq	272(%rsp), %r13
	movq	240(%rsp), %rbp
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2sd	%eax, %xmm0
	divsd	.LCPI12_1(%rip), %xmm0
	movapd	624(%rsp), %xmm1
	movaps	640(%rsp), %xmm2
	movups	%xmm2, 16(%rsp)
	movupd	%xmm1, (%rsp)
	movl	$100, %edi
	movl	$400, %esi                      # imm = 0x190
	movl	$2, %edx
	movq	%r13, %rcx
	movq	%rbp, %r8
	callq	_Z20__device_stub__func113hipPitchedPtriiiPdS0_d
.LBB12_34:                              #   in Loop: Header=BB12_22 Depth=2
	xorl	%edi, %edi
	callq	time
	movl	%eax, %edi
	callq	srand
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB12_36
# %bb.35:                               #   in Loop: Header=BB12_22 Depth=2
	movups	120(%rsp), %xmm0
	movups	136(%rsp), %xmm1
	movaps	%xmm1, 608(%rsp)
	movaps	%xmm0, 592(%rsp)
	movq	264(%rsp), %r13
	movq	232(%rsp), %rbp
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2sd	%eax, %xmm0
	divsd	.LCPI12_1(%rip), %xmm0
	movapd	592(%rsp), %xmm1
	movaps	608(%rsp), %xmm2
	movups	%xmm2, 16(%rsp)
	movupd	%xmm1, (%rsp)
	movl	$100, %edi
	movl	$400, %esi                      # imm = 0x190
	movl	$3, %edx
	movq	%r13, %rcx
	movq	%rbp, %r8
	callq	_Z20__device_stub__func113hipPitchedPtriiiPdS0_d
.LBB12_36:                              #   in Loop: Header=BB12_22 Depth=2
	xorl	%edi, %edi
	callq	time
	movl	%eax, %edi
	callq	srand
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB12_38
# %bb.37:                               #   in Loop: Header=BB12_22 Depth=2
	movups	120(%rsp), %xmm0
	movups	136(%rsp), %xmm1
	movaps	%xmm1, 576(%rsp)
	movaps	%xmm0, 560(%rsp)
	movq	256(%rsp), %r13
	movq	224(%rsp), %rbp
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2sd	%eax, %xmm0
	divsd	.LCPI12_1(%rip), %xmm0
	movapd	560(%rsp), %xmm1
	movaps	576(%rsp), %xmm2
	movups	%xmm2, 16(%rsp)
	movupd	%xmm1, (%rsp)
	movl	$100, %edi
	movl	$400, %esi                      # imm = 0x190
	movl	$4, %edx
	movq	%r13, %rcx
	movq	%rbp, %r8
	callq	_Z20__device_stub__func113hipPitchedPtriiiPdS0_d
.LBB12_38:                              #   in Loop: Header=BB12_22 Depth=2
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB12_40
# %bb.39:                               #   in Loop: Header=BB12_22 Depth=2
	movq	184(%rsp), %rcx
	movq	248(%rsp), %r8
	movups	120(%rsp), %xmm0
	movupd	136(%rsp), %xmm1
	movupd	%xmm1, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$100, %edi
	movl	$400, %esi                      # imm = 0x190
	movl	$4, %edx
	movsd	.LCPI12_2(%rip), %xmm0          # xmm0 = mem[0],zero
	callq	_Z20__device_stub__func213hipPitchedPtriiiPdS0_d
.LBB12_40:                              #   in Loop: Header=BB12_22 Depth=2
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB12_42
# %bb.41:                               #   in Loop: Header=BB12_22 Depth=2
	movq	176(%rsp), %rcx
	movq	240(%rsp), %r8
	movups	120(%rsp), %xmm0
	movupd	136(%rsp), %xmm1
	movupd	%xmm1, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$100, %edi
	movl	$400, %esi                      # imm = 0x190
	movl	$4, %edx
	movsd	.LCPI12_2(%rip), %xmm0          # xmm0 = mem[0],zero
	callq	_Z20__device_stub__func213hipPitchedPtriiiPdS0_d
.LBB12_42:                              #   in Loop: Header=BB12_22 Depth=2
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB12_44
# %bb.43:                               #   in Loop: Header=BB12_22 Depth=2
	movq	168(%rsp), %rcx
	movq	232(%rsp), %r8
	movups	120(%rsp), %xmm0
	movupd	136(%rsp), %xmm1
	movupd	%xmm1, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$100, %edi
	movl	$400, %esi                      # imm = 0x190
	movl	$4, %edx
	movsd	.LCPI12_2(%rip), %xmm0          # xmm0 = mem[0],zero
	callq	_Z20__device_stub__func213hipPitchedPtriiiPdS0_d
.LBB12_44:                              #   in Loop: Header=BB12_22 Depth=2
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB12_46
# %bb.45:                               #   in Loop: Header=BB12_22 Depth=2
	movq	160(%rsp), %rcx
	movq	224(%rsp), %r8
	movups	120(%rsp), %xmm0
	movupd	136(%rsp), %xmm1
	movupd	%xmm1, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$100, %edi
	movl	$400, %esi                      # imm = 0x190
	movl	$4, %edx
	movsd	.LCPI12_2(%rip), %xmm0          # xmm0 = mem[0],zero
	callq	_Z20__device_stub__func213hipPitchedPtriiiPdS0_d
.LBB12_46:                              #   in Loop: Header=BB12_22 Depth=2
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB12_48
# %bb.47:                               #   in Loop: Header=BB12_22 Depth=2
	movq	184(%rsp), %rdi
	movq	176(%rsp), %rsi
	movq	168(%rsp), %rdx
	movq	160(%rsp), %rcx
	movq	304(%rsp), %r9
	movq	296(%rsp), %rax
	movups	368(%rsp), %xmm0
	movups	384(%rsp), %xmm1
	movups	%xmm1, 48(%rsp)
	movups	%xmm0, 32(%rsp)
	movups	528(%rsp), %xmm0
	movupd	544(%rsp), %xmm1
	movupd	%xmm1, 16(%rsp)
	movups	%xmm0, (%rsp)
	leaq	704(%rsp), %r8
	movq	%r8, 72(%rsp)
	movq	%rax, 64(%rsp)
	movsd	.LCPI12_0(%rip), %xmm0          # xmm0 = mem[0],zero
	movl	%r12d, %r8d
	callq	_Z38__device_stub__predicted_vehicle_state13hipPitchedPtrS_PdS0_S0_S0_diS0_S0_S0_
.LBB12_48:                              #   in Loop: Header=BB12_22 Depth=2
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB12_50
# %bb.49:                               #   in Loop: Header=BB12_22 Depth=2
	movq	184(%rsp), %rsi
	movq	176(%rsp), %rdx
	movq	168(%rsp), %rcx
	movq	160(%rsp), %r8
	movq	352(%rsp), %r9
	movq	344(%rsp), %rax
	movq	336(%rsp), %rdi
	movq	328(%rsp), %r10
	movq	320(%rsp), %r11
	movq	312(%rsp), %r13
	movups	368(%rsp), %xmm0
	movups	384(%rsp), %xmm1
	movups	%xmm1, 48(%rsp)
	movups	%xmm0, 32(%rsp)
	movups	496(%rsp), %xmm0
	movupd	512(%rsp), %xmm1
	movupd	%xmm1, 16(%rsp)
	movups	%xmm0, (%rsp)
	leaq	156(%rsp), %rbp
	movq	%rbp, 104(%rsp)
	movq	%r13, 96(%rsp)
	movq	%r11, 88(%rsp)
	movq	%r10, 80(%rsp)
	movq	%rdi, 72(%rsp)
	movq	%rax, 64(%rsp)
	movsd	.LCPI12_0(%rip), %xmm0          # xmm0 = mem[0],zero
	movl	%r12d, %edi
	callq	_Z22__device_stub__helper113hipPitchedPtrS_diPdS0_S0_S0_S0_S0_S0_S0_S0_S0_Pi
.LBB12_50:                              #   in Loop: Header=BB12_22 Depth=2
	movq	216(%rsp), %rax
	movsd	-8(%rax,%r12,8), %xmm0          # xmm0 = mem[0],zero
	movsd	.LCPI12_0(%rip), %xmm1          # xmm1 = mem[0],zero
	addsd	%xmm1, %xmm0
	movsd	%xmm0, -8(%rax,%r12,8)
	movq	208(%rsp), %rax
	movsd	-8(%rax,%r12,8), %xmm0          # xmm0 = mem[0],zero
	addsd	%xmm1, %xmm0
	movsd	%xmm0, -8(%rax,%r12,8)
	movq	200(%rsp), %rax
	movsd	-8(%rax,%r12,8), %xmm0          # xmm0 = mem[0],zero
	addsd	%xmm1, %xmm0
	movsd	%xmm0, -8(%rax,%r12,8)
	movq	192(%rsp), %rax
	movsd	-8(%rax,%r12,8), %xmm0          # xmm0 = mem[0],zero
	addsd	%xmm1, %xmm0
	movsd	%xmm0, -8(%rax,%r12,8)
	cmpl	$91, 156(%rsp)
	jl	.LBB12_52
# %bb.51:                               #   in Loop: Header=BB12_22 Depth=2
	leal	1(%rbx), %eax
	cmpl	$9, %ebx
	movl	%eax, %ebx
	jb	.LBB12_22
.LBB12_52:                              # %._crit_edge
                                        #   in Loop: Header=BB12_21 Depth=1
	incq	%r12
	cmpq	$401, %r12                      # imm = 0x191
	jne	.LBB12_21
# %bb.53:
	movq	344(%rsp), %rdi
	callq	hipFree
	movq	336(%rsp), %rdi
	callq	hipFree
	movq	320(%rsp), %rdi
	callq	hipFree
	movq	352(%rsp), %rdi
	callq	hipFree
	movq	328(%rsp), %rdi
	callq	hipFree
	movq	312(%rsp), %rdi
	callq	hipFree
	movq	216(%rsp), %rdi
	callq	hipFree
	movq	208(%rsp), %rdi
	callq	hipFree
	movq	200(%rsp), %rdi
	callq	hipFree
	movq	192(%rsp), %rdi
	callq	hipFree
	movq	280(%rsp), %rdi
	callq	hipFree
	movq	272(%rsp), %rdi
	callq	hipFree
	movq	264(%rsp), %rdi
	callq	hipFree
	movq	256(%rsp), %rdi
	callq	hipFree
	movq	248(%rsp), %rdi
	callq	hipFree
	movq	240(%rsp), %rdi
	callq	hipFree
	movq	232(%rsp), %rdi
	callq	hipFree
	movq	224(%rsp), %rdi
	callq	hipFree
	movq	184(%rsp), %rdi
	callq	hipFree
	movq	176(%rsp), %rdi
	callq	hipFree
	movq	168(%rsp), %rdi
	callq	hipFree
	movq	160(%rsp), %rdi
	callq	hipFree
	callq	clock
	subq	360(%rsp), %rax                 # 8-byte Folded Reload
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI12_3(%rip), %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	xorl	%eax, %eax
	addq	$760, %rsp                      # imm = 0x2F8
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end12:
	.size	main, .Lfunc_end12-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB13_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB13_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z3addiPfS_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6fill1DiPdd, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6fill2DPdmii, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15fill2D_specificPdmii, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6fill3D13hipPitchedPtriii, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10fill3Dto2D13hipPitchedPtriiiPdd, %esi
	movl	$.L__unnamed_6, %edx
	movl	$.L__unnamed_6, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z5func113hipPitchedPtriiiPdS0_d, %esi
	movl	$.L__unnamed_7, %edx
	movl	$.L__unnamed_7, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z5func213hipPitchedPtriiiPdS0_d, %esi
	movl	$.L__unnamed_8, %edx
	movl	$.L__unnamed_8, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12mmult_kerneliiiPKdS0_Pd, %esi
	movl	$.L__unnamed_9, %edx
	movl	$.L__unnamed_9, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z23predicted_vehicle_state13hipPitchedPtrS_PdS0_S0_S0_diS0_S0_S0_, %esi
	movl	$.L__unnamed_10, %edx
	movl	$.L__unnamed_10, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7helper113hipPitchedPtrS_diPdS0_S0_S0_S0_S0_S0_S0_S0_S0_Pi, %esi
	movl	$.L__unnamed_11, %edx
	movl	$.L__unnamed_11, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end13:
	.size	__hip_module_ctor, .Lfunc_end13-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB14_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB14_2:
	retq
.Lfunc_end14:
	.size	__hip_module_dtor, .Lfunc_end14-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	Afull,@object                   # @Afull
	.data
	.globl	Afull
	.p2align	4, 0x0
Afull:
	.quad	0x0000000000000000              # double 0
	.quad	0x0000000000000000              # double 0
	.quad	0x0000000000000000              # double 0
	.quad	0x0000000000000000              # double 0
	.quad	0x0000000000000000              # double 0
	.quad	0x0000000000000000              # double 0
	.quad	0x3feff62b6ae7d567              # double 0.99880000000000002
	.quad	0xbf4d7dbf487fcb92              # double -8.9999999999999998E-4
	.quad	0x3fa93dd97f62b6ae              # double 0.049299999999999997
	.quad	0x0000000000000000              # double 0
	.quad	0x0000000000000000              # double 0
	.quad	0x0000000000000000              # double 0
	.quad	0x0000000000000000              # double 0
	.quad	0x0000000000000000              # double 0
	.quad	0x0000000000000000              # double 0
	.quad	0x400aa8f5c28f5c29              # double 3.3325
	.quad	0x0000000000000000              # double 0
	.quad	0xc050e5c0ebedfa44              # double -67.5899
	.quad	0x0000000000000000              # double 0
	.quad	0xbfeffe5c91d14e3c              # double -0.99980000000000002
	.quad	0xbf91eb851eb851ec              # double -0.017500000000000002
	.quad	0x0000000000000000              # double 0
	.quad	0x0000000000000000              # double 0
	.quad	0x0000000000000000              # double 0
	.quad	0x0000000000000000              # double 0
	.quad	0x0000000000000000              # double 0
	.quad	0x0000000000000000              # double 0
	.quad	0x0000000000000000              # double 0
	.quad	0x4050e5c0ebedfa44              # double 67.5899
	.quad	0x0000000000000000              # double 0
	.quad	0x3fa93dd97f62b6ae              # double 0.049299999999999997
	.quad	0x3f91eb851eb851ec              # double 0.017500000000000002
	.quad	0xbfeff487fcb923a3              # double -0.99860000000000004
	.quad	0x0000000000000000              # double 0
	.quad	0x0000000000000000              # double 0
	.quad	0x0000000000000000              # double 0
	.quad	0x0000000000000000              # double 0
	.quad	0x0000000000000000              # double 0
	.quad	0x0000000000000000              # double 0
	.quad	0x0000000000000000              # double 0
	.quad	0x0000000000000000              # double 0
	.quad	0x0000000000000000              # double 0
	.quad	0x0000000000000000              # double 0
	.quad	0x0000000000000000              # double 0
	.quad	0x0000000000000000              # double 0
	.quad	0x3ff0000000000000              # double 1
	.quad	0xbf4d7dbf487fcb92              # double -8.9999999999999998E-4
	.quad	0x3fa94af4f0d844d0              # double 0.049399999999999999
	.quad	0x0000000000000000              # double 0
	.quad	0x0000000000000000              # double 0
	.quad	0x0000000000000000              # double 0
	.quad	0x0000000000000000              # double 0
	.quad	0x0000000000000000              # double 0
	.quad	0x0000000000000000              # double 0
	.quad	0x0000000000000000              # double 0
	.quad	0x0000000000000000              # double 0
	.quad	0x0000000000000000              # double 0
	.quad	0x0000000000000000              # double 0
	.quad	0x3feffe5c91d14e3c              # double 0.99980000000000002
	.quad	0x3f91eb851eb851ec              # double 0.017500000000000002
	.quad	0x0000000000000000              # double 0
	.quad	0x0000000000000000              # double 0
	.quad	0x0000000000000000              # double 0
	.quad	0x0000000000000000              # double 0
	.quad	0x0000000000000000              # double 0
	.quad	0x0000000000000000              # double 0
	.quad	0x0000000000000000              # double 0
	.quad	0x0000000000000000              # double 0
	.quad	0x0000000000000000              # double 0
	.quad	0x0000000000000000              # double 0
	.quad	0xbf9205bc01a36e2f              # double -0.017600000000000001
	.quad	0x3ff004816f0068dc              # double 1.0011000000000001
	.quad	0x8000000000000000              # double -0
	.quad	0x8000000000000000              # double -0
	.quad	0x3f2a36e2eb1c432d              # double 2.0000000000000001E-4
	.quad	0xbffca7ef9db22d0e              # double -1.7909999999999999
	.quad	0xc03cbf6fd21ff2e5              # double -28.747800000000002
	.quad	0x0000000000000000              # double 0
	.quad	0xbf8ff2e48e8a71de              # double -0.015599999999999999
	.quad	0xbf56f0068db8bac7              # double -0.0014
	.quad	0x3f9b089a02752546              # double 0.0264
	.quad	0xbff0353f7ced9168              # double -1.0129999999999999
	.quad	0x3ff1fc504816f007              # double 1.1241000000000001
	.quad	0xbfda52bd3c361134              # double -0.4113
	.quad	0x0000000000000000              # double 0
	.quad	0x0000000000000000              # double 0
	.quad	0x3f1a36e2eb1c432d              # double 1.0E-4
	.quad	0x4040923a29c779a7              # double 33.142400000000002
	.quad	0xbfd9182a9930be0e              # double -0.3921
	.quad	0x8000000000000000              # double -0
	.quad	0x3f802de00d1b7176              # double 0.0079000000000000008
	.quad	0xbfb9fbe76c8b4396              # double -0.10150000000000001
	.quad	0x3f90e5604189374c              # double 0.016500000000000001
	.quad	0xbff8d1b71758e219              # double -1.5511999999999999
	.quad	0xbff82b6ae7d566cf              # double -1.5105999999999999
	.quad	0xc0507a0902de00d2              # double -65.906800000000004
	.quad	0x8000000000000000              # double -0
	.quad	0x8000000000000000              # double -0
	.quad	0xbf6b089a02752546              # double -0.0033
	.quad	0xc0055e69ad42c3ca              # double -2.6711
	.quad	0x3ffc34d6a161e4f7              # double 1.7628999999999999
	.quad	0x8000000000000000              # double -0
	.quad	0xbfc14e3bcd35a858              # double -0.13519999999999999
	.quad	0x3f719ce075f6fd22              # double 0.0043
	.quad	0xbfe3c432ca57a787              # double -0.61770000000000003
	.quad	0x4021abfb15b573eb              # double 8.8359000000000005
	.quad	0x405110902de00d1b              # double 68.258799999999994
	.quad	0x400090cb295e9e1b              # double 2.0707
	.quad	0x0000000000000000              # double 0
	.quad	0x0000000000000000              # double 0
	.quad	0x3f2a36e2eb1c432d              # double 2.0000000000000001E-4
	.quad	0xbfe734d6a161e4f7              # double -0.72519999999999996
	.quad	0xbfe51a9fbe76c8b4              # double -0.65949999999999998
	.quad	0x8000000000000000              # double -0
	.quad	0x3f77c1bda5119ce0              # double 0.0057999999999999996
	.quad	0xbf9de69ad42c3c9f              # double -0.0292
	.quad	0x3fa5b573eab367a1              # double 0.0424
	.quad	0xc01c780346dc5d64              # double -7.1172000000000004
	.quad	0xbffa83e425aee632              # double -1.6572
	.quad	0x3fc961e4f765fd8b              # double 0.1983
	.quad	0x8000000000000000              # double -0
	.quad	0x8000000000000000              # double -0
	.quad	0x0000000000000000              # double 0
	.quad	0x3fb06f694467381d              # double 0.064199999999999993
	.quad	0xbfe750b0f27bb2ff              # double -0.72860000000000003
	.quad	0x0000000000000000              # double 0
	.quad	0x3f5f212d77318fc5              # double 0.0019
	.quad	0x3f782a9930be0ded              # double 0.0058999999999999999
	.quad	0xbf554c985f06f694              # double -0.0012999999999999999
	.quad	0x3f83dd97f62b6ae8              # double 0.0097000000000000002
	.quad	0xbff83bcd35a85879              # double -1.5145999999999999
	.quad	0xbfb816f0068db8bb              # double -0.094100000000000003
	.quad	0x8000000000000000              # double -0
	.quad	0x8000000000000000              # double -0
	.quad	0x0000000000000000              # double 0
	.quad	0xbfeb2a305532617c              # double -0.84889999999999998
	.quad	0x3f7d14e3bcd35a86              # double 0.0071000000000000004
	.quad	0x0000000000000000              # double 0
	.quad	0xbf6d7dbf487fcb92              # double -0.0035999999999999999
	.quad	0x3f9119ce075f6fd2              # double 0.0167
	.quad	0xbf661e4f765fd8ae              # double -0.0027000000000000001
	.quad	0xbfc989374bc6a7f0              # double -0.19950000000000001
	.quad	0xbf9aee631f8a0903              # double -0.0263
	.quad	0xbfe3916872b020c5              # double -0.61150000000000004
	.size	Afull, 1152

	.type	Bfull,@object                   # @Bfull
	.globl	Bfull
	.p2align	4, 0x0
Bfull:
	.zero	32
	.zero	32
	.zero	32
	.zero	32
	.zero	32
	.zero	32
	.quad	0xbfc42f837b4a233a              # double -0.15770000000000001
	.quad	0xbf72d77318fc5048              # double -0.0045999999999999999
	.quad	0x3fab15b573eab368              # double 0.052900000000000003
	.quad	0x3faec56d5cfaacda              # double 0.060100000000000001
	.quad	0x3f942c3c9eecbfb1              # double 0.019699999999999999
	.quad	0x3fb902de00d1b717              # double 0.097699999999999995
	.quad	0xbfb3404ea4a8c155              # double -0.075200000000000003
	.quad	0x3f80cb295e9e1b09              # double 0.0082000000000000006
	.quad	0xbfc3f487fcb923a3              # double -0.15590000000000001
	.quad	0x3f85b573eab367a1              # double 0.0106
	.quad	0x3fb624dd2f1a9fbe              # double 0.086499999999999993
	.quad	0xbfec75f6fd21ff2e              # double -0.88939999999999997
	.quad	0x3f9f6fd21ff2e48f              # double 0.030700000000000002
	.quad	0x3fbe5604189374bc              # double 0.11849999999999999
	.quad	0xbfa23a29c779a6b5              # double -0.0356
	.quad	0x3f7b71758e219653              # double 0.0067000000000000002
	.quad	0x3fa15b573eab367a              # double 0.0339
	.quad	0x3f46f0068db8bac7              # double 6.9999999999999999E-4
	.quad	0xbf6205bc01a36e2f              # double -0.0022000000000000001
	.quad	0x3f63a92a30553261              # double 0.0023999999999999998
	.quad	0xbf3a36e2eb1c432d              # double -4.0000000000000002E-4
	.quad	0x3f6e4f765fd8adac              # double 0.0037000000000000002
	.quad	0x3f96bb98c7e28241              # double 0.022200000000000001
	.quad	0x3f77c1bda5119ce0              # double 0.0057999999999999996
	.size	Bfull, 384

	.type	_Z3addiPfS_,@object             # @_Z3addiPfS_
	.section	.rodata,"a",@progbits
	.globl	_Z3addiPfS_
	.p2align	3, 0x0
_Z3addiPfS_:
	.quad	_Z18__device_stub__addiPfS_
	.size	_Z3addiPfS_, 8

	.type	_Z6fill1DiPdd,@object           # @_Z6fill1DiPdd
	.globl	_Z6fill1DiPdd
	.p2align	3, 0x0
_Z6fill1DiPdd:
	.quad	_Z21__device_stub__fill1DiPdd
	.size	_Z6fill1DiPdd, 8

	.type	_Z6fill2DPdmii,@object          # @_Z6fill2DPdmii
	.globl	_Z6fill2DPdmii
	.p2align	3, 0x0
_Z6fill2DPdmii:
	.quad	_Z21__device_stub__fill2DPdmii
	.size	_Z6fill2DPdmii, 8

	.type	_Z15fill2D_specificPdmii,@object # @_Z15fill2D_specificPdmii
	.globl	_Z15fill2D_specificPdmii
	.p2align	3, 0x0
_Z15fill2D_specificPdmii:
	.quad	_Z30__device_stub__fill2D_specificPdmii
	.size	_Z15fill2D_specificPdmii, 8

	.type	_Z6fill3D13hipPitchedPtriii,@object # @_Z6fill3D13hipPitchedPtriii
	.globl	_Z6fill3D13hipPitchedPtriii
	.p2align	3, 0x0
_Z6fill3D13hipPitchedPtriii:
	.quad	_Z21__device_stub__fill3D13hipPitchedPtriii
	.size	_Z6fill3D13hipPitchedPtriii, 8

	.type	_Z10fill3Dto2D13hipPitchedPtriiiPdd,@object # @_Z10fill3Dto2D13hipPitchedPtriiiPdd
	.globl	_Z10fill3Dto2D13hipPitchedPtriiiPdd
	.p2align	3, 0x0
_Z10fill3Dto2D13hipPitchedPtriiiPdd:
	.quad	_Z25__device_stub__fill3Dto2D13hipPitchedPtriiiPdd
	.size	_Z10fill3Dto2D13hipPitchedPtriiiPdd, 8

	.type	_Z5func113hipPitchedPtriiiPdS0_d,@object # @_Z5func113hipPitchedPtriiiPdS0_d
	.globl	_Z5func113hipPitchedPtriiiPdS0_d
	.p2align	3, 0x0
_Z5func113hipPitchedPtriiiPdS0_d:
	.quad	_Z20__device_stub__func113hipPitchedPtriiiPdS0_d
	.size	_Z5func113hipPitchedPtriiiPdS0_d, 8

	.type	_Z5func213hipPitchedPtriiiPdS0_d,@object # @_Z5func213hipPitchedPtriiiPdS0_d
	.globl	_Z5func213hipPitchedPtriiiPdS0_d
	.p2align	3, 0x0
_Z5func213hipPitchedPtriiiPdS0_d:
	.quad	_Z20__device_stub__func213hipPitchedPtriiiPdS0_d
	.size	_Z5func213hipPitchedPtriiiPdS0_d, 8

	.type	_Z12mmult_kerneliiiPKdS0_Pd,@object # @_Z12mmult_kerneliiiPKdS0_Pd
	.globl	_Z12mmult_kerneliiiPKdS0_Pd
	.p2align	3, 0x0
_Z12mmult_kerneliiiPKdS0_Pd:
	.quad	_Z27__device_stub__mmult_kerneliiiPKdS0_Pd
	.size	_Z12mmult_kerneliiiPKdS0_Pd, 8

	.type	_Z23predicted_vehicle_state13hipPitchedPtrS_PdS0_S0_S0_diS0_S0_S0_,@object # @_Z23predicted_vehicle_state13hipPitchedPtrS_PdS0_S0_S0_diS0_S0_S0_
	.globl	_Z23predicted_vehicle_state13hipPitchedPtrS_PdS0_S0_S0_diS0_S0_S0_
	.p2align	3, 0x0
_Z23predicted_vehicle_state13hipPitchedPtrS_PdS0_S0_S0_diS0_S0_S0_:
	.quad	_Z38__device_stub__predicted_vehicle_state13hipPitchedPtrS_PdS0_S0_S0_diS0_S0_S0_
	.size	_Z23predicted_vehicle_state13hipPitchedPtrS_PdS0_S0_S0_diS0_S0_S0_, 8

	.type	_Z7helper113hipPitchedPtrS_diPdS0_S0_S0_S0_S0_S0_S0_S0_S0_Pi,@object # @_Z7helper113hipPitchedPtrS_diPdS0_S0_S0_S0_S0_S0_S0_S0_S0_Pi
	.globl	_Z7helper113hipPitchedPtrS_diPdS0_S0_S0_S0_S0_S0_S0_S0_S0_Pi
	.p2align	3, 0x0
_Z7helper113hipPitchedPtrS_diPdS0_S0_S0_S0_S0_S0_S0_S0_S0_Pi:
	.quad	_Z22__device_stub__helper113hipPitchedPtrS_diPdS0_S0_S0_S0_S0_S0_S0_S0_S0_Pi
	.size	_Z7helper113hipPitchedPtrS_diPdS0_S0_S0_S0_S0_S0_S0_S0_S0_Pi, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Path Integral took: %f seconds \n"
	.size	.L.str, 33

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z3addiPfS_"
	.size	.L__unnamed_1, 12

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z6fill1DiPdd"
	.size	.L__unnamed_2, 14

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z6fill2DPdmii"
	.size	.L__unnamed_3, 15

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z15fill2D_specificPdmii"
	.size	.L__unnamed_4, 25

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"_Z6fill3D13hipPitchedPtriii"
	.size	.L__unnamed_5, 28

	.type	.L__unnamed_6,@object           # @5
.L__unnamed_6:
	.asciz	"_Z10fill3Dto2D13hipPitchedPtriiiPdd"
	.size	.L__unnamed_6, 36

	.type	.L__unnamed_7,@object           # @6
.L__unnamed_7:
	.asciz	"_Z5func113hipPitchedPtriiiPdS0_d"
	.size	.L__unnamed_7, 33

	.type	.L__unnamed_8,@object           # @7
.L__unnamed_8:
	.asciz	"_Z5func213hipPitchedPtriiiPdS0_d"
	.size	.L__unnamed_8, 33

	.type	.L__unnamed_9,@object           # @8
.L__unnamed_9:
	.asciz	"_Z12mmult_kerneliiiPKdS0_Pd"
	.size	.L__unnamed_9, 28

	.type	.L__unnamed_10,@object          # @9
.L__unnamed_10:
	.asciz	"_Z23predicted_vehicle_state13hipPitchedPtrS_PdS0_S0_S0_diS0_S0_S0_"
	.size	.L__unnamed_10, 67

	.type	.L__unnamed_11,@object          # @10
.L__unnamed_11:
	.asciz	"_Z7helper113hipPitchedPtrS_diPdS0_S0_S0_S0_S0_S0_S0_S0_S0_Pi"
	.size	.L__unnamed_11, 61

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z18__device_stub__addiPfS_
	.addrsig_sym _Z21__device_stub__fill1DiPdd
	.addrsig_sym _Z21__device_stub__fill2DPdmii
	.addrsig_sym _Z30__device_stub__fill2D_specificPdmii
	.addrsig_sym _Z21__device_stub__fill3D13hipPitchedPtriii
	.addrsig_sym _Z25__device_stub__fill3Dto2D13hipPitchedPtriiiPdd
	.addrsig_sym _Z20__device_stub__func113hipPitchedPtriiiPdS0_d
	.addrsig_sym _Z20__device_stub__func213hipPitchedPtriiiPdS0_d
	.addrsig_sym _Z27__device_stub__mmult_kerneliiiPKdS0_Pd
	.addrsig_sym _Z38__device_stub__predicted_vehicle_state13hipPitchedPtrS_PdS0_S0_S0_diS0_S0_S0_
	.addrsig_sym _Z22__device_stub__helper113hipPitchedPtrS_diPdS0_S0_S0_S0_S0_S0_S0_S0_S0_Pi
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z3addiPfS_
	.addrsig_sym _Z6fill1DiPdd
	.addrsig_sym _Z6fill2DPdmii
	.addrsig_sym _Z15fill2D_specificPdmii
	.addrsig_sym _Z6fill3D13hipPitchedPtriii
	.addrsig_sym _Z10fill3Dto2D13hipPitchedPtriiiPdd
	.addrsig_sym _Z5func113hipPitchedPtriiiPdS0_d
	.addrsig_sym _Z5func213hipPitchedPtriiiPdS0_d
	.addrsig_sym _Z12mmult_kerneliiiPKdS0_Pd
	.addrsig_sym _Z23predicted_vehicle_state13hipPitchedPtrS_PdS0_S0_S0_diS0_S0_S0_
	.addrsig_sym _Z7helper113hipPitchedPtrS_diPdS0_S0_S0_S0_S0_S0_S0_S0_S0_Pi
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z3addiPfS_             ; -- Begin function _Z3addiPfS_
	.globl	_Z3addiPfS_
	.p2align	8
	.type	_Z3addiPfS_,@function
_Z3addiPfS_:                            ; @_Z3addiPfS_
; %bb.0:
	s_load_b32 s4, s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s4, 1
	s_cbranch_scc1 .LBB0_3
; %bb.1:                                ; %.lr.ph.preheader
	s_load_b128 s[0:3], s[0:1], 0x8
	v_mov_b32_e32 v0, 0
.LBB0_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b32 v1, v0, s[0:1]
	global_load_b32 v2, v0, s[2:3]
	s_add_i32 s4, s4, -1
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v1, v1, v2
	global_store_b32 v0, v1, s[2:3]
	s_add_u32 s2, s2, 4
	s_addc_u32 s3, s3, 0
	s_cmp_eq_u32 s4, 0
	s_cbranch_scc0 .LBB0_2
.LBB0_3:                                ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z3addiPfS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 24
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 3
		.amdhsa_next_free_sgpr 5
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z3addiPfS_, .Lfunc_end0-_Z3addiPfS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 112
; NumSgprs: 5
; NumVgprs: 3
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 5
; NumVGPRsForWavesPerEU: 3
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z6fill1DiPdd           ; -- Begin function _Z6fill1DiPdd
	.globl	_Z6fill1DiPdd
	.p2align	8
	.type	_Z6fill1DiPdd,@function
_Z6fill1DiPdd:                          ; @_Z6fill1DiPdd
; %bb.0:
	s_load_b32 s4, s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s4, 1
	s_cbranch_scc1 .LBB1_3
; %bb.1:                                ; %.lr.ph.preheader
	s_load_b128 s[0:3], s[0:1], 0x8
	v_mov_b32_e32 v2, 0
	s_waitcnt lgkmcnt(0)
	v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
.LBB1_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_add_i32 s4, s4, -1
	global_store_b64 v2, v[0:1], s[0:1]
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_cmp_eq_u32 s4, 0
	s_cbranch_scc0 .LBB1_2
.LBB1_3:                                ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6fill1DiPdd
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 24
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 3
		.amdhsa_next_free_sgpr 5
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z6fill1DiPdd, .Lfunc_end1-_Z6fill1DiPdd
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 84
; NumSgprs: 5
; NumVgprs: 3
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 5
; NumVGPRsForWavesPerEU: 3
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z6fill2DPdmii          ; -- Begin function _Z6fill2DPdmii
	.globl	_Z6fill2DPdmii
	.p2align	8
	.type	_Z6fill2DPdmii,@function
_Z6fill2DPdmii:                         ; @_Z6fill2DPdmii
; %bb.0:                                ; %._crit_edge
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6fill2DPdmii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 24
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 1
		.amdhsa_next_free_sgpr 1
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z6fill2DPdmii, .Lfunc_end2-_Z6fill2DPdmii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 4
; NumSgprs: 0
; NumVgprs: 0
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 1
; NumVGPRsForWavesPerEU: 1
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z15fill2D_specificPdmii ; -- Begin function _Z15fill2D_specificPdmii
	.globl	_Z15fill2D_specificPdmii
	.p2align	8
	.type	_Z15fill2D_specificPdmii,@function
_Z15fill2D_specificPdmii:               ; @_Z15fill2D_specificPdmii
; %bb.0:
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x10
	s_load_b128 s[4:7], s[0:1], 0x0
	s_mov_b32 s0, -1
	s_waitcnt lgkmcnt(0)
	s_cmp_gt_i32 s3, 0
	s_cselect_b32 s1, -1, 0
	s_cmp_eq_u32 s2, 12
	s_cbranch_scc1 .LBB3_7
; %bb.1:                                ; %.preheader31
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB3_6
; %bb.2:                                ; %.lr.ph35
	s_getpc_b64 s[8:9]
	s_add_u32 s8, s8, __const._Z15fill2D_specificPdmii.Bfull@rel32@lo+4
	s_addc_u32 s9, s9, __const._Z15fill2D_specificPdmii.Bfull@rel32@hi+12
	s_cmp_gt_i32 s2, 0
	s_mov_b32 s16, 0
	s_cselect_b32 s0, -1, 0
	s_mov_b64 s[10:11], s[4:5]
	v_cndmask_b32_e64 v0, 0, 1, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e64 s0, 1, v0
	v_mov_b32_e32 v0, 0
.LBB3_3:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB3_4 Depth 2
	s_delay_alu instid0(VALU_DEP_2)
	s_and_b32 vcc_lo, exec_lo, s0
	s_mov_b64 s[12:13], s[10:11]
	s_mov_b64 s[14:15], s[8:9]
	s_mov_b32 s17, s2
	s_cbranch_vccnz .LBB3_5
.LBB3_4:                                ; %.lr.ph
                                        ;   Parent Loop BB3_3 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_load_b64 s[18:19], s[14:15], 0x0
	s_add_i32 s17, s17, -1
	s_add_u32 s14, s14, 8
	s_addc_u32 s15, s15, 0
	s_waitcnt lgkmcnt(0)
	v_dual_mov_b32 v1, s18 :: v_dual_mov_b32 v2, s19
	global_store_b64 v0, v[1:2], s[12:13]
	s_add_u32 s12, s12, 8
	s_addc_u32 s13, s13, 0
	s_cmp_eq_u32 s17, 0
	s_cbranch_scc0 .LBB3_4
.LBB3_5:                                ; %._crit_edge
                                        ;   in Loop: Header=BB3_3 Depth=1
	s_add_i32 s16, s16, 1
	s_add_u32 s8, s8, 32
	s_addc_u32 s9, s9, 0
	s_add_u32 s10, s10, s6
	s_addc_u32 s11, s11, s7
	s_cmp_eq_u32 s16, s3
	s_cbranch_scc0 .LBB3_3
.LBB3_6:                                ; %Flow74
	s_mov_b32 s0, 0
.LBB3_7:                                ; %Flow77
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB3_13
; %bb.8:                                ; %.preheader
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB3_13
; %bb.9:                                ; %.lr.ph38.preheader
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, 0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __const._Z15fill2D_specificPdmii.Afull@rel32@lo+4
	s_addc_u32 s1, s1, __const._Z15fill2D_specificPdmii.Afull@rel32@hi+12
.LBB3_10:                               ; %.lr.ph38
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB3_11 Depth 2
	s_mov_b64 s[8:9], 0
.LBB3_11:                               ;   Parent Loop BB3_10 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s10, s0, s8
	s_addc_u32 s11, s1, s9
	s_add_u32 s12, s4, s8
	s_load_b64 s[10:11], s[10:11], 0x0
	s_addc_u32 s13, s5, s9
	s_add_u32 s8, s8, 8
	s_addc_u32 s9, s9, 0
	s_cmpk_eq_i32 s8, 0x60
	s_waitcnt lgkmcnt(0)
	v_dual_mov_b32 v1, s10 :: v_dual_mov_b32 v2, s11
	global_store_b64 v0, v[1:2], s[12:13]
	s_cbranch_scc0 .LBB3_11
; %bb.12:                               ;   in Loop: Header=BB3_10 Depth=1
	s_add_i32 s2, s2, 1
	s_add_u32 s0, s0, 0x60
	s_addc_u32 s1, s1, 0
	s_add_u32 s4, s4, s6
	s_addc_u32 s5, s5, s7
	s_cmp_eq_u32 s2, s3
	s_cbranch_scc0 .LBB3_10
.LBB3_13:                               ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15fill2D_specificPdmii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 24
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 3
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z15fill2D_specificPdmii, .Lfunc_end3-_Z15fill2D_specificPdmii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 384
; NumSgprs: 22
; NumVgprs: 3
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 3
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z6fill3D13hipPitchedPtriii ; -- Begin function _Z6fill3D13hipPitchedPtriii
	.globl	_Z6fill3D13hipPitchedPtriii
	.p2align	8
	.type	_Z6fill3D13hipPitchedPtriii,@function
_Z6fill3D13hipPitchedPtriii:            ; @_Z6fill3D13hipPitchedPtriii
; %bb.0:                                ; %._crit_edge23
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6fill3D13hipPitchedPtriii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 44
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 1
		.amdhsa_next_free_sgpr 1
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end4:
	.size	_Z6fill3D13hipPitchedPtriii, .Lfunc_end4-_Z6fill3D13hipPitchedPtriii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 4
; NumSgprs: 0
; NumVgprs: 0
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 1
; NumVGPRsForWavesPerEU: 1
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z10fill3Dto2D13hipPitchedPtriiiPdd ; -- Begin function _Z10fill3Dto2D13hipPitchedPtriiiPdd
	.globl	_Z10fill3Dto2D13hipPitchedPtriiiPdd
	.p2align	8
	.type	_Z10fill3Dto2D13hipPitchedPtriiiPdd,@function
_Z10fill3Dto2D13hipPitchedPtriiiPdd:    ; @_Z10fill3Dto2D13hipPitchedPtriiiPdd
; %bb.0:
	s_load_b128 s[4:7], s[0:1], 0x20
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s6, 1
	s_cbranch_scc1 .LBB5_8
; %bb.1:                                ; %.lr.ph34
	s_clause 0x1
	s_load_b128 s[8:11], s[0:1], 0x0
	s_load_b128 s[12:15], s[0:1], 0x30
	s_ashr_i32 s2, s5, 31
	s_cmp_gt_i32 s5, 0
	v_mov_b32_e32 v0, 0
	s_cselect_b32 s0, -1, 0
	s_cmp_gt_i32 s4, 0
	v_cndmask_b32_e64 v1, 0, 1, s0
	s_cselect_b32 s0, -1, 0
	s_mov_b32 s7, s5
	v_cndmask_b32_e64 v2, 0, 1, s0
	s_mov_b32 s22, 0
	v_cmp_ne_u32_e64 s0, 1, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_ne_u32_e64 s1, 1, v2
	s_waitcnt lgkmcnt(0)
	s_mul_hi_u32 s3, s10, s5
	s_mul_i32 s2, s10, s2
	s_mul_i32 s16, s11, s5
	s_add_i32 s2, s3, s2
	s_mul_i32 s5, s10, s5
	s_add_i32 s23, s2, s16
.LBB5_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB5_4 Depth 2
                                        ;       Child Loop BB5_5 Depth 3
	s_and_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB5_7
; %bb.3:                                ; %.lr.ph30.preheader
                                        ;   in Loop: Header=BB5_2 Depth=1
	s_mov_b32 s24, 0
	s_mov_b64 s[2:3], s[12:13]
	s_mov_b64 s[16:17], s[8:9]
.LBB5_4:                                ; %.lr.ph30
                                        ;   Parent Loop BB5_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB5_5 Depth 3
	s_and_b32 vcc_lo, exec_lo, s1
	s_mov_b64 s[18:19], s[2:3]
	s_mov_b64 s[20:21], s[16:17]
	s_mov_b32 s25, s4
	s_cbranch_vccnz .LBB5_6
.LBB5_5:                                ; %.lr.ph
                                        ;   Parent Loop BB5_2 Depth=1
                                        ;     Parent Loop BB5_4 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	global_load_b64 v[1:2], v0, s[20:21]
	s_add_i32 s25, s25, -1
	s_add_u32 s20, s20, 8
	s_addc_u32 s21, s21, 0
	s_waitcnt vmcnt(0)
	v_mul_f64 v[1:2], |v[1:2]|, s[14:15]
	global_store_b64 v0, v[1:2], s[18:19]
	s_add_u32 s18, s18, 8
	s_addc_u32 s19, s19, 0
	s_cmp_eq_u32 s25, 0
	s_cbranch_scc0 .LBB5_5
.LBB5_6:                                ; %._crit_edge
                                        ;   in Loop: Header=BB5_4 Depth=2
	s_add_i32 s24, s24, 1
	s_add_u32 s16, s16, s10
	s_addc_u32 s17, s17, s11
	s_add_u32 s2, s2, s10
	s_addc_u32 s3, s3, s11
	s_cmp_eq_u32 s24, s7
	s_cbranch_scc0 .LBB5_4
.LBB5_7:                                ; %._crit_edge31
                                        ;   in Loop: Header=BB5_2 Depth=1
	s_add_i32 s22, s22, 1
	s_add_u32 s8, s8, s5
	s_addc_u32 s9, s9, s23
	s_cmp_eq_u32 s22, s6
	s_cbranch_scc0 .LBB5_2
.LBB5_8:                                ; %._crit_edge35
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10fill3Dto2D13hipPitchedPtriiiPdd
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 64
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 3
		.amdhsa_next_free_sgpr 26
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end5:
	.size	_Z10fill3Dto2D13hipPitchedPtriiiPdd, .Lfunc_end5-_Z10fill3Dto2D13hipPitchedPtriiiPdd
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 292
; NumSgprs: 28
; NumVgprs: 3
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 28
; NumVGPRsForWavesPerEU: 3
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z5func113hipPitchedPtriiiPdS0_d ; -- Begin function _Z5func113hipPitchedPtriiiPdS0_d
	.globl	_Z5func113hipPitchedPtriiiPdS0_d
	.p2align	8
	.type	_Z5func113hipPitchedPtriiiPdS0_d,@function
_Z5func113hipPitchedPtriiiPdS0_d:       ; @_Z5func113hipPitchedPtriiiPdS0_d
; %bb.0:
	s_load_b128 s[4:7], s[0:1], 0x20
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s6, 1
	s_cbranch_scc1 .LBB6_8
; %bb.1:                                ; %.lr.ph42
	s_clause 0x2
	s_load_b128 s[8:11], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x40
	s_load_b128 s[12:15], s[0:1], 0x30
	s_ashr_i32 s16, s5, 31
	s_cmp_gt_i32 s5, 0
	v_mov_b32_e32 v0, 0
	s_cselect_b32 s0, -1, 0
	s_cmp_gt_i32 s4, 0
	v_cndmask_b32_e64 v1, 0, 1, s0
	s_cselect_b32 s0, -1, 0
	s_mov_b32 s7, s5
	v_cndmask_b32_e64 v2, 0, 1, s0
	s_mov_b32 s28, 0
	v_cmp_ne_u32_e64 s0, 1, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_ne_u32_e64 s1, 1, v2
	s_waitcnt lgkmcnt(0)
	s_mul_hi_u32 s17, s10, s5
	s_mul_i32 s16, s10, s16
	s_mul_i32 s18, s11, s5
	s_add_i32 s16, s17, s16
	s_mul_i32 s5, s10, s5
	s_add_i32 s29, s16, s18
.LBB6_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB6_4 Depth 2
                                        ;       Child Loop BB6_5 Depth 3
	s_and_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB6_7
; %bb.3:                                ; %.lr.ph38.preheader
                                        ;   in Loop: Header=BB6_2 Depth=1
	s_mov_b32 s30, 0
	s_mov_b64 s[16:17], s[14:15]
	s_mov_b64 s[18:19], s[8:9]
	s_mov_b64 s[20:21], s[12:13]
.LBB6_4:                                ; %.lr.ph38
                                        ;   Parent Loop BB6_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB6_5 Depth 3
	s_and_b32 vcc_lo, exec_lo, s1
	s_mov_b64 s[22:23], s[16:17]
	s_mov_b64 s[24:25], s[18:19]
	s_mov_b64 s[26:27], s[20:21]
	s_mov_b32 s31, s4
	s_cbranch_vccnz .LBB6_6
.LBB6_5:                                ; %.lr.ph
                                        ;   Parent Loop BB6_2 Depth=1
                                        ;     Parent Loop BB6_4 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[26:27]
	global_load_b64 v[3:4], v0, s[24:25]
	s_add_i32 s31, s31, -1
	s_add_u32 s26, s26, 8
	s_addc_u32 s27, s27, 0
	s_add_u32 s24, s24, 8
	s_addc_u32 s25, s25, 0
	s_waitcnt vmcnt(1)
	v_add_f64 v[5:6], v[1:2], v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_f64 v[5:6], v[5:6], s[2:3]
	s_waitcnt vmcnt(0)
	v_fma_f64 v[1:2], v[3:4], v[5:6], -v[1:2]
	global_store_b64 v0, v[1:2], s[22:23]
	s_add_u32 s22, s22, 8
	s_addc_u32 s23, s23, 0
	s_cmp_eq_u32 s31, 0
	s_cbranch_scc0 .LBB6_5
.LBB6_6:                                ; %._crit_edge
                                        ;   in Loop: Header=BB6_4 Depth=2
	s_add_i32 s30, s30, 1
	s_add_u32 s20, s20, s10
	s_addc_u32 s21, s21, s11
	s_add_u32 s18, s18, s10
	s_addc_u32 s19, s19, s11
	s_add_u32 s16, s16, s10
	s_addc_u32 s17, s17, s11
	s_cmp_eq_u32 s30, s7
	s_cbranch_scc0 .LBB6_4
.LBB6_7:                                ; %._crit_edge39
                                        ;   in Loop: Header=BB6_2 Depth=1
	s_add_i32 s28, s28, 1
	s_add_u32 s8, s8, s5
	s_addc_u32 s9, s9, s29
	s_cmp_eq_u32 s28, s6
	s_cbranch_scc0 .LBB6_2
.LBB6_8:                                ; %._crit_edge43
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z5func113hipPitchedPtriiiPdS0_d
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 72
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 32
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end6:
	.size	_Z5func113hipPitchedPtriiiPdS0_d, .Lfunc_end6-_Z5func113hipPitchedPtriiiPdS0_d
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 360
; NumSgprs: 34
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 4
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 34
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z5func213hipPitchedPtriiiPdS0_d ; -- Begin function _Z5func213hipPitchedPtriiiPdS0_d
	.globl	_Z5func213hipPitchedPtriiiPdS0_d
	.p2align	8
	.type	_Z5func213hipPitchedPtriiiPdS0_d,@function
_Z5func213hipPitchedPtriiiPdS0_d:       ; @_Z5func213hipPitchedPtriiiPdS0_d
; %bb.0:
	s_load_b128 s[4:7], s[0:1], 0x20
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s6, 1
	s_cbranch_scc1 .LBB7_8
; %bb.1:                                ; %.lr.ph39
	s_clause 0x1
	s_load_b128 s[8:11], s[0:1], 0x0
	s_load_b128 s[12:15], s[0:1], 0x30
	s_ashr_i32 s2, s5, 31
	s_cmp_gt_i32 s5, 0
	v_mov_b32_e32 v0, 0
	s_cselect_b32 s0, -1, 0
	s_cmp_gt_i32 s4, 0
	v_cndmask_b32_e64 v1, 0, 1, s0
	s_cselect_b32 s0, -1, 0
	s_mov_b32 s7, s5
	v_cndmask_b32_e64 v2, 0, 1, s0
	s_mov_b32 s26, 0
	v_cmp_ne_u32_e64 s0, 1, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_ne_u32_e64 s1, 1, v2
	s_waitcnt lgkmcnt(0)
	s_mul_hi_u32 s3, s10, s5
	s_mul_i32 s2, s10, s2
	s_mul_i32 s16, s11, s5
	s_add_i32 s2, s3, s2
	s_mul_i32 s5, s10, s5
	s_add_i32 s27, s2, s16
.LBB7_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB7_4 Depth 2
                                        ;       Child Loop BB7_5 Depth 3
	s_and_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB7_7
; %bb.3:                                ; %.lr.ph35.preheader
                                        ;   in Loop: Header=BB7_2 Depth=1
	s_mov_b32 s28, 0
	s_mov_b64 s[2:3], s[12:13]
	s_mov_b64 s[16:17], s[14:15]
	s_mov_b64 s[18:19], s[8:9]
.LBB7_4:                                ; %.lr.ph35
                                        ;   Parent Loop BB7_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB7_5 Depth 3
	s_and_b32 vcc_lo, exec_lo, s1
	s_mov_b64 s[20:21], s[2:3]
	s_mov_b64 s[22:23], s[16:17]
	s_mov_b64 s[24:25], s[18:19]
	s_mov_b32 s29, s4
	s_cbranch_vccnz .LBB7_6
.LBB7_5:                                ; %.lr.ph
                                        ;   Parent Loop BB7_2 Depth=1
                                        ;     Parent Loop BB7_4 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[24:25]
	global_load_b64 v[3:4], v0, s[22:23]
	s_add_i32 s29, s29, -1
	s_add_u32 s24, s24, 8
	s_addc_u32 s25, s25, 0
	s_add_u32 s22, s22, 8
	s_addc_u32 s23, s23, 0
	s_waitcnt vmcnt(0)
	v_add_f64 v[1:2], v[1:2], v[3:4]
	global_store_b64 v0, v[1:2], s[20:21]
	s_add_u32 s20, s20, 8
	s_addc_u32 s21, s21, 0
	s_cmp_eq_u32 s29, 0
	s_cbranch_scc0 .LBB7_5
.LBB7_6:                                ; %._crit_edge
                                        ;   in Loop: Header=BB7_4 Depth=2
	s_add_i32 s28, s28, 1
	s_add_u32 s18, s18, s10
	s_addc_u32 s19, s19, s11
	s_add_u32 s16, s16, s10
	s_addc_u32 s17, s17, s11
	s_add_u32 s2, s2, s10
	s_addc_u32 s3, s3, s11
	s_cmp_eq_u32 s28, s7
	s_cbranch_scc0 .LBB7_4
.LBB7_7:                                ; %._crit_edge36
                                        ;   in Loop: Header=BB7_2 Depth=1
	s_add_i32 s26, s26, 1
	s_add_u32 s8, s8, s5
	s_addc_u32 s9, s9, s27
	s_cmp_eq_u32 s26, s6
	s_cbranch_scc0 .LBB7_2
.LBB7_8:                                ; %._crit_edge40
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z5func213hipPitchedPtriiiPdS0_d
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 72
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 30
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end7:
	.size	_Z5func213hipPitchedPtriiiPdS0_d, .Lfunc_end7-_Z5func213hipPitchedPtriiiPdS0_d
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 328
; NumSgprs: 32
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 32
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z12mmult_kerneliiiPKdS0_Pd ; -- Begin function _Z12mmult_kerneliiiPKdS0_Pd
	.globl	_Z12mmult_kerneliiiPKdS0_Pd
	.p2align	8
	.type	_Z12mmult_kerneliiiPKdS0_Pd,@function
_Z12mmult_kerneliiiPKdS0_Pd:            ; @_Z12mmult_kerneliiiPKdS0_Pd
; %bb.0:
	s_load_b64 s[4:5], s[0:1], 0x4
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s4, 1
	s_cbranch_scc1 .LBB8_3
; %bb.1:                                ; %.lr.ph
	s_load_b32 s2, s[0:1], 0x34
	v_bfe_u32 v2, v0, 10, 10
	v_and_b32_e32 v3, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[0:1], null, s15, s3, v[2:3]
	v_mad_u64_u32 v[1:2], null, s14, s2, v[3:4]
	s_load_b64 s[2:3], s[0:1], 0x20
	v_mad_u64_u32 v[2:3], null, v1, s5, v[0:1]
	v_mul_lo_u32 v6, v1, s4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v3, 31, v2
	v_ashrrev_i32_e32 v7, 31, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	v_lshlrev_b64 v[6:7], 3, v[6:7]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	s_load_b128 s[0:3], s[0:1], 0x10
	global_load_b64 v[4:5], v[2:3], off
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v6, vcc_lo, s0, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s1, v7, vcc_lo
.LBB8_2:                                ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v1, 31, v0
	s_add_i32 s4, s4, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s4, 0
	v_lshlrev_b64 v[8:9], 3, v[0:1]
	v_add_nc_u32_e32 v0, s5, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v8, vcc_lo, s2, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, s3, v9, vcc_lo
	global_load_b64 v[10:11], v[6:7], off
	global_load_b64 v[8:9], v[8:9], off
	v_add_co_u32 v6, vcc_lo, v6, 8
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo
	s_waitcnt vmcnt(0)
	v_fma_f64 v[4:5], v[10:11], v[8:9], v[4:5]
	global_store_b64 v[2:3], v[4:5], off
	s_cbranch_scc1 .LBB8_2
.LBB8_3:                                ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12mmult_kerneliiiPKdS0_Pd
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 12
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end8:
	.size	_Z12mmult_kerneliiiPKdS0_Pd, .Lfunc_end8-_Z12mmult_kerneliiiPKdS0_Pd
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 296
; NumSgprs: 18
; NumVgprs: 12
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 12
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z23predicted_vehicle_state13hipPitchedPtrS_PdS0_S0_S0_diS0_S0_S0_ ; -- Begin function _Z23predicted_vehicle_state13hipPitchedPtrS_PdS0_S0_S0_diS0_S0_S0_
	.globl	_Z23predicted_vehicle_state13hipPitchedPtrS_PdS0_S0_S0_diS0_S0_S0_
	.p2align	8
	.type	_Z23predicted_vehicle_state13hipPitchedPtrS_PdS0_S0_S0_diS0_S0_S0_,@function
_Z23predicted_vehicle_state13hipPitchedPtrS_PdS0_S0_S0_diS0_S0_S0_: ; @_Z23predicted_vehicle_state13hipPitchedPtrS_PdS0_S0_S0_diS0_S0_S0_
; %bb.0:
	s_clause 0x3
	s_load_b64 s[2:3], s[0:1], 0x80
	s_load_b128 s[28:31], s[0:1], 0x0
	s_load_b128 s[40:43], s[0:1], 0x20
	s_load_b64 s[4:5], s[0:1], 0x60
                                        ; implicit-def: $vgpr156 : SGPR spill to VGPR lane
                                        ; implicit-def: $vgpr155 : SGPR spill to VGPR lane
	v_mov_b32_e32 v124, 0
	s_mov_b32 s52, 0x54442d18
	s_mov_b32 s54, 0x6dc9c883
	s_mov_b32 s56, 0x33145c00
	s_mov_b32 s58, 0x252049c0
	s_mov_b32 s60, 0x9037ab78
	s_mov_b32 s62, 0x46cc5e42
	s_mov_b32 s64, 0xa17f65f6
	s_mov_b32 s66, 0x19f4ec90
	s_mov_b32 s68, 0x16c16967
	s_mov_b32 s70, 0x55555555
	s_mov_b32 s72, 0xb42fdfa7
	s_mov_b32 s74, 0xf9a43bb8
	s_mov_b32 s76, 0x796cde01
	s_mov_b32 s78, 0x19e83e5c
	s_mov_b32 s80, 0x11110bb3
	s_mov_b32 s50, 0
	s_waitcnt lgkmcnt(0)
	s_lshl_b64 s[6:7], s[30:31], 1
	s_lshl_b64 s[24:25], s[30:31], 2
	v_writelane_b32 v156, s4, 0
	s_mov_b32 s53, 0xbff921fb
	s_mov_b32 s55, 0x3fe45f30
	s_mov_b32 s57, 0xbc91a626
	s_mov_b32 s59, 0xb97b839a
	v_writelane_b32 v156, s5, 1
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x68
	s_load_b256 s[8:15], s[0:1], 0x40
	s_clause 0x1
	s_load_b256 s[16:23], s[2:3], 0x0
	s_load_b128 s[36:39], s[2:3], 0x20
	s_mul_i32 s2, s30, 12
	s_mul_i32 s5, s42, 6
	s_mul_i32 s0, s31, 12
	v_writelane_b32 v156, s2, 2
	s_mul_hi_u32 s1, s30, 12
	s_mul_i32 s2, s43, 6
	s_add_i32 s0, s1, s0
	s_mul_hi_u32 s3, s42, 6
	v_writelane_b32 v156, s5, 3
	s_mul_i32 s5, s31, 3
	s_mul_hi_u32 s1, s30, 6
	s_mov_b32 s61, 0x3e21eeb6
	s_mov_b32 s63, 0xbda907db
	v_writelane_b32 v156, s6, 4
	s_mov_b32 s65, 0xbe927e4f
	s_mov_b32 s67, 0x3efa01a0
	s_mov_b32 s69, 0xbf56c16c
	s_mov_b32 s71, 0x3fa55555
	v_writelane_b32 v156, s7, 5
	s_mul_i32 s7, s30, 3
	s_mul_hi_u32 s6, s30, 3
	s_mov_b32 s73, 0xbe5ae600
	s_mov_b32 s75, 0x3de5e0b2
	v_writelane_b32 v156, s7, 6
	s_mul_i32 s7, s31, 5
	s_mov_b32 s77, 0x3ec71de3
	s_mov_b32 s79, 0xbf2a01a0
	s_mov_b32 s81, 0x3f811111
	v_writelane_b32 v156, s24, 7
	s_mov_b32 s83, 0x3c91a626
	s_mov_b32 s84, 0x33145c07
	s_mov_b32 s87, 0xbfc55555
	v_writelane_b32 v156, s25, 8
	s_mul_hi_u32 s24, s30, 5
	v_writelane_b32 v156, s0, 9
	s_add_i32 s0, s3, s2
	s_mul_i32 s2, s30, 5
	v_writelane_b32 v156, s0, 10
	s_add_i32 s0, s6, s5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	v_writelane_b32 v156, s0, 11
	s_add_i32 s0, s24, s7
	s_mov_b32 s7, 0x3ff921fb
	v_writelane_b32 v156, s0, 12
	s_mul_i32 s0, s31, 6
	s_add_i32 s0, s1, s0
	s_mul_hi_u32 s1, s30, 7
	v_writelane_b32 v156, s2, 13
	s_mul_i32 s2, s30, 6
	v_writelane_b32 v156, s0, 14
	s_mul_i32 s0, s31, 7
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	s_add_i32 s0, s1, s0
	v_writelane_b32 v156, s2, 15
	s_lshl_b64 s[2:3], s[42:43], 1
	v_writelane_b32 v156, s0, 16
	s_mul_i32 s0, s30, 7
	v_writelane_b32 v156, s0, 17
	v_writelane_b32 v156, s28, 18
	s_lshl_b64 s[0:1], s[30:31], 3
	v_writelane_b32 v156, s29, 19
	v_writelane_b32 v156, s30, 20
	v_writelane_b32 v156, s31, 21
	v_writelane_b32 v156, s0, 22
	v_writelane_b32 v156, s1, 23
	s_mul_i32 s0, s43, 3
	s_mul_hi_u32 s1, s42, 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s0, s1, s0
	v_writelane_b32 v156, s2, 24
	s_mul_hi_u32 s1, s42, 5
	v_writelane_b32 v156, s3, 25
	s_lshl_b64 s[2:3], s[42:43], 2
	v_writelane_b32 v156, s0, 26
	s_mul_i32 s0, s42, 3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_writelane_b32 v156, s0, 27
	s_mul_i32 s0, s43, 5
	s_add_i32 s0, s1, s0
	v_writelane_b32 v156, s2, 28
	v_writelane_b32 v156, s3, 29
	s_mov_b32 s3, 0
	v_writelane_b32 v156, s0, 30
	v_writelane_b32 v156, s40, 31
	v_writelane_b32 v155, s41, 0
	s_mul_i32 s0, s42, 5
	v_writelane_b32 v155, s42, 1
	v_writelane_b32 v155, s43, 2
	v_writelane_b32 v155, s0, 3
	s_waitcnt lgkmcnt(0)
	s_add_i32 s0, s4, -1
	s_cmpk_lt_i32 s4, 0x191
	v_writelane_b32 v155, s0, 4
	s_cselect_b32 s0, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	v_writelane_b32 v155, s0, 5
.LBB9_1:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB9_2 Depth 2
                                        ;       Child Loop BB9_4 Depth 3
                                        ;         Child Loop BB9_5 Depth 4
	v_readlane_b32 s0, v156, 9
	v_readlane_b32 s2, v156, 2
	v_readlane_b32 s24, v156, 18
	v_writelane_b32 v155, s3, 6
	v_readlane_b32 s25, v156, 19
	s_mul_i32 s0, s0, s3
	s_mul_hi_u32 s1, s2, s3
	s_mul_i32 s2, s2, s3
	s_add_i32 s1, s1, s0
	s_add_u32 s45, s24, s2
	v_readlane_b32 s0, v156, 10
	v_readlane_b32 s2, v156, 3
	v_readlane_b32 s28, v156, 31
	v_readlane_b32 s29, v155, 0
	v_readlane_b32 s26, v156, 20
	s_addc_u32 s46, s25, s1
	s_mul_i32 s0, s0, s3
	s_mul_hi_u32 s1, s2, s3
	s_mul_i32 s2, s2, s3
	s_add_i32 s1, s1, s0
	s_add_u32 s47, s28, s2
	s_addc_u32 s48, s29, s1
	v_readlane_b32 s27, v156, 21
	s_add_u32 s0, s45, s26
	v_readlane_b32 s30, v155, 1
	v_readlane_b32 s31, v155, 2
	v_writelane_b32 v155, s0, 7
	s_addc_u32 s0, s46, s27
	s_mov_b32 s4, s50
	v_writelane_b32 v155, s0, 8
	v_readlane_b32 s0, v156, 4
	v_readlane_b32 s1, v156, 5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_u32 s0, s45, s0
	v_writelane_b32 v155, s0, 9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_addc_u32 s0, s46, s1
	v_writelane_b32 v155, s0, 10
	v_readlane_b32 s0, v156, 6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_u32 s0, s45, s0
	v_writelane_b32 v155, s0, 11
	v_readlane_b32 s0, v156, 11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_addc_u32 s0, s46, s0
	v_writelane_b32 v155, s0, 12
	v_readlane_b32 s0, v156, 7
	v_readlane_b32 s1, v156, 8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_u32 s0, s45, s0
	v_writelane_b32 v155, s0, 13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_addc_u32 s0, s46, s1
	v_writelane_b32 v155, s0, 14
	v_readlane_b32 s0, v156, 13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_u32 s0, s45, s0
	v_writelane_b32 v155, s0, 15
	v_readlane_b32 s0, v156, 12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_addc_u32 s0, s46, s0
	v_writelane_b32 v155, s0, 16
	v_readlane_b32 s0, v156, 15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_u32 s0, s45, s0
	v_writelane_b32 v155, s0, 17
	v_readlane_b32 s0, v156, 14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_addc_u32 s0, s46, s0
	v_writelane_b32 v155, s0, 18
	v_readlane_b32 s0, v156, 17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_add_u32 s34, s45, s0
	v_readlane_b32 s0, v156, 16
	s_addc_u32 s35, s46, s0
	v_readlane_b32 s0, v156, 22
	v_readlane_b32 s1, v156, 23
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_add_u32 s90, s45, s0
	s_addc_u32 s91, s46, s1
	v_readlane_b32 s0, v156, 24
	s_add_u32 s49, s47, s30
	s_addc_u32 s28, s48, s31
	v_readlane_b32 s1, v156, 25
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	s_add_u32 s29, s47, s0
	v_readlane_b32 s0, v156, 27
	s_addc_u32 s30, s48, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_add_u32 s31, s47, s0
	v_readlane_b32 s0, v156, 26
	s_addc_u32 s44, s48, s0
	v_readlane_b32 s0, v156, 28
	v_readlane_b32 s1, v156, 29
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	s_add_u32 s33, s47, s0
	v_readlane_b32 s0, v155, 3
	s_addc_u32 s24, s48, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_add_u32 s25, s47, s0
	v_readlane_b32 s0, v156, 30
	s_addc_u32 s26, s48, s0
	s_getpc_b64 s[88:89]
	s_add_u32 s88, s88, __const._Z23predicted_vehicle_state13hipPitchedPtrS_PdS0_S0_S0_diS0_S0_S0_.Afull@rel32@lo+4
	s_addc_u32 s89, s89, __const._Z23predicted_vehicle_state13hipPitchedPtrS_PdS0_S0_S0_diS0_S0_S0_.Afull@rel32@hi+12
.LBB9_2:                                ;   Parent Loop BB9_1 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB9_4 Depth 3
                                        ;         Child Loop BB9_5 Depth 4
	v_readlane_b32 s0, v155, 5
	s_delay_alu instid0(VALU_DEP_1)
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB9_153
; %bb.3:                                ; %.preheader.lr.ph
                                        ;   in Loop: Header=BB9_2 Depth=2
	v_readlane_b32 s0, v156, 18
	v_readlane_b32 s2, v156, 20
	v_readlane_b32 s3, v156, 21
	v_readlane_b32 s1, v156, 19
	s_mov_b32 s5, s50
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_mul_hi_u32 s1, s2, s4
	s_mul_i32 s0, s3, s4
	s_mul_i32 s2, s2, s4
	s_add_i32 s1, s1, s0
	s_add_u32 s27, s45, s2
	s_mov_b32 s2, s4
	s_addc_u32 s104, s46, s1
	v_writelane_b32 v155, s2, 19
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __const._Z23predicted_vehicle_state13hipPitchedPtrS_PdS0_S0_S0_diS0_S0_S0_.Bfull@rel32@lo+4
	s_addc_u32 s1, s1, __const._Z23predicted_vehicle_state13hipPitchedPtrS_PdS0_S0_S0_diS0_S0_S0_.Bfull@rel32@hi+12
	v_writelane_b32 v155, s3, 20
	s_lshl_b64 s[2:3], s[4:5], 5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s2, s0
	s_addc_u32 s1, s3, s1
	s_load_b256 s[92:99], s[0:1], 0x0
	v_readlane_b32 s0, v155, 4
	s_waitcnt lgkmcnt(0)
	v_mul_f64 v[0:1], s[92:93], 0.5
	v_mul_f64 v[2:3], s[94:95], 0.5
	v_mul_f64 v[4:5], s[96:97], 0.5
	v_mul_f64 v[6:7], s[98:99], 0.5
.LBB9_4:                                ; %.preheader
                                        ;   Parent Loop BB9_1 Depth=1
                                        ;     Parent Loop BB9_2 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB9_5 Depth 4
	s_ashr_i32 s93, s0, 31
	s_mov_b32 s92, s0
	v_mov_b32_e32 v10, 0
	s_lshl_b64 s[94:95], s[92:93], 3
	v_mov_b32_e32 v11, 0
	s_add_u32 s0, s27, s94
	s_addc_u32 s1, s104, s95
	s_mov_b64 s[2:3], 0
	global_load_b64 v[8:9], v124, s[0:1] offset:-8
.LBB9_5:                                ;   Parent Loop BB9_1 Depth=1
                                        ;     Parent Loop BB9_2 Depth=2
                                        ;       Parent Loop BB9_4 Depth=3
                                        ; =>      This Inner Loop Header: Depth=4
	s_add_u32 s4, s88, s2
	s_addc_u32 s5, s89, s3
	s_add_u32 s2, s2, 8
	s_load_b64 s[4:5], s[4:5], 0x0
	s_addc_u32 s3, s3, 0
	s_cmpk_eq_i32 s2, 0x60
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[10:11], s[4:5], v[8:9], v[10:11]
	s_cbranch_scc0 .LBB9_5
; %bb.6:                                ;   in Loop: Header=BB9_4 Depth=3
	s_add_u32 s2, s8, s94
	s_addc_u32 s3, s9, s95
	global_load_b128 v[12:15], v124, s[2:3] offset:-8
	s_add_u32 s2, s10, s94
	s_addc_u32 s3, s11, s95
	global_load_b128 v[16:19], v124, s[2:3] offset:-8
	s_add_u32 s2, s12, s94
	s_addc_u32 s3, s13, s95
	s_add_u32 s4, s14, s94
	s_addc_u32 s5, s15, s95
	s_waitcnt vmcnt(1)
	v_add_f64 v[20:21], v[12:13], v[14:15]
	s_waitcnt vmcnt(0)
	v_add_f64 v[22:23], v[16:17], v[18:19]
	s_clause 0x1
	global_load_b128 v[12:15], v124, s[2:3] offset:-8
	global_load_b128 v[16:19], v124, s[4:5] offset:-8
	v_readlane_b32 s2, v156, 0
	v_readlane_b32 s3, v156, 1
	s_waitcnt vmcnt(1)
	v_add_f64 v[12:13], v[12:13], v[14:15]
	v_mul_f64 v[14:15], v[2:3], v[22:23]
	s_waitcnt vmcnt(0)
	v_add_f64 v[16:17], v[16:17], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[14:15], v[0:1], v[20:21], v[14:15]
	v_fma_f64 v[12:13], v[4:5], v[12:13], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[12:13], v[6:7], v[16:17], v[12:13]
	v_add_f64 v[10:11], v[10:11], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], v[10:11], s[2:3], v[8:9]
	v_readlane_b32 s2, v155, 13
	s_add_u32 s96, s2, s94
	v_readlane_b32 s2, v155, 14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	s_addc_u32 s97, s2, s95
	global_store_b64 v124, v[8:9], s[0:1]
	global_load_b64 v[8:9], v124, s[96:97]
	s_waitcnt vmcnt(0)
	v_add_f64 v[8:9], s[36:37], v[8:9]
	v_cmp_ngt_f64_e64 s0, 0x41d00000, |v[8:9]|
	v_trig_preop_f64 v[60:61], |v[8:9]|, 0
	v_cmp_le_f64_e64 s2, 0x7b000000, |v[8:9]|
	v_trig_preop_f64 v[50:51], |v[8:9]|, 1
	v_ldexp_f64 v[62:63], |v[8:9]|, 0xffffff80
	v_trig_preop_f64 v[52:53], |v[8:9]|, 2
	v_and_b32_e32 v74, 0x7fffffff, v9
	s_and_b32 s3, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 vcc_lo, s3
	s_cbranch_vccz .LBB9_8
; %bb.7:                                ;   in Loop: Header=BB9_4 Depth=3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v11, v74, v63, s2
	v_cndmask_b32_e64 v10, v8, v62, s2
	s_mov_b32 s6, s52
	s_mov_b32 s85, s83
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[12:13], v[60:61], v[10:11]
	v_mul_f64 v[14:15], v[50:51], v[10:11]
	v_fma_f64 v[16:17], v[60:61], v[10:11], -v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[18:19], v[14:15], v[16:17]
	v_add_f64 v[20:21], v[12:13], v[18:19]
	v_add_f64 v[22:23], v[18:19], -v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[12:13], v[20:21], -v[12:13]
	v_add_f64 v[16:17], v[16:17], -v[22:23]
	v_add_f64 v[22:23], v[18:19], -v[22:23]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[12:13], v[18:19], -v[12:13]
	v_ldexp_f64 v[18:19], v[20:21], -2
	v_fract_f64_e32 v[20:21], v[18:19]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[18:19]|
	v_add_f64 v[18:19], v[14:15], -v[22:23]
	v_fma_f64 v[14:15], v[50:51], v[10:11], -v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_f64 v[16:17], v[16:17], v[18:19]
	v_dual_cndmask_b32 v19, 0, v21 :: v_dual_cndmask_b32 v18, 0, v20
	v_mul_f64 v[20:21], v[52:53], v[10:11]
	v_ldexp_f64 v[18:19], v[18:19], 2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[22:23], v[20:21], v[14:15]
	v_fma_f64 v[10:11], v[52:53], v[10:11], -v[20:21]
	v_add_f64 v[26:27], v[22:23], v[16:17]
	v_add_f64 v[24:25], v[22:23], -v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[28:29], v[26:27], -v[22:23]
	v_add_f64 v[14:15], v[14:15], -v[24:25]
	v_add_f64 v[24:25], v[22:23], -v[24:25]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[16:17], v[16:17], -v[28:29]
	v_add_f64 v[28:29], v[26:27], -v[28:29]
	v_add_f64 v[24:25], v[20:21], -v[24:25]
	v_add_f64 v[20:21], v[12:13], v[26:27]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[22:23], v[22:23], -v[28:29]
	v_add_f64 v[14:15], v[14:15], v[24:25]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[20:21], -v[12:13]
	v_add_f64 v[16:17], v[16:17], v[22:23]
	v_add_f64 v[22:23], v[20:21], v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[26:27], -v[12:13]
	v_add_f64 v[14:15], v[14:15], v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e32 vcc_lo, 0, v[22:23]
	v_add_f64 v[10:11], v[10:11], v[14:15]
	s_and_b32 s0, vcc_lo, exec_lo
	s_cselect_b32 s51, 0x40100000, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[14:15], v[18:19], s[50:51]
	v_add_f64 v[10:11], v[12:13], v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[16:17], v[20:21], v[14:15]
	v_cvt_i32_f64_e32 v18, v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f64_i32_e32 v[16:17], v18
	v_add_f64 v[14:15], v[14:15], -v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[12:13], v[20:21], v[14:15]
	v_add_f64 v[14:15], v[12:13], -v[14:15]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[12:13]
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f64 v[14:15], v[20:21], -v[14:15]
	s_and_b32 s0, vcc_lo, exec_lo
	s_cselect_b32 s51, 0x3ff00000, 0
	v_add_co_ci_u32_e64 v96, s0, 0, v18, vcc_lo
	v_add_f64 v[12:13], v[12:13], -s[50:51]
	s_mov_b32 s0, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[10:11], v[10:11], v[14:15]
	v_add_f64 v[14:15], v[12:13], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[12:13], v[14:15], -v[12:13]
	v_mul_f64 v[16:17], v[14:15], s[6:7]
	v_add_f64 v[10:11], v[10:11], -v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[12:13], v[14:15], s[6:7], -v[16:17]
	v_fma_f64 v[12:13], v[14:15], s[84:85], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[12:13], v[10:11], s[6:7], v[12:13]
	v_add_f64 v[10:11], v[16:17], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[14:15], v[10:11], -v[16:17]
	v_add_f64 v[18:19], v[12:13], -v[14:15]
	s_branch .LBB9_9
.LBB9_8:                                ;   in Loop: Header=BB9_4 Depth=3
	s_mov_b32 s0, -1
                                        ; implicit-def: $vgpr96
                                        ; implicit-def: $vgpr10_vgpr11
                                        ; implicit-def: $vgpr18_vgpr19
.LBB9_9:                                ; %Flow450
                                        ;   in Loop: Header=BB9_4 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB9_11
; %bb.10:                               ;   in Loop: Header=BB9_4 Depth=3
	v_mul_f64 v[10:11], |v[8:9]|, s[54:55]
	s_mov_b32 s82, s56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[12:13], v[10:11]
	v_fma_f64 v[10:11], v[12:13], s[52:53], |v[8:9]|
	v_mul_f64 v[14:15], v[12:13], s[56:57]
	v_cvt_i32_f64_e32 v96, v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[18:19], v[12:13], s[56:57], v[10:11]
	v_add_f64 v[16:17], v[10:11], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[10:11], v[10:11], -v[16:17]
	v_add_f64 v[16:17], v[16:17], -v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[10:11], v[14:15]
	v_fma_f64 v[14:15], v[12:13], s[82:83], v[14:15]
	v_add_f64 v[10:11], v[16:17], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[10:11], v[10:11], -v[14:15]
	v_fma_f64 v[14:15], v[12:13], s[58:59], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[10:11], v[18:19], v[14:15]
	v_add_f64 v[16:17], v[10:11], -v[18:19]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[18:19], v[14:15], -v[16:17]
.LBB9_11:                               ; %_ZL3cosd.exit
                                        ;   in Loop: Header=BB9_4 Depth=3
	v_readlane_b32 s0, v155, 15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_add_u32 s42, s0, s94
	v_readlane_b32 s0, v155, 16
	s_addc_u32 s43, s0, s95
	global_load_b64 v[12:13], v124, s[42:43]
	s_waitcnt vmcnt(0)
	v_add_f64 v[12:13], s[38:39], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cmp_ngt_f64_e64 s0, 0x41d00000, |v[12:13]|
	v_readfirstlane_b32 s40, v12
	v_readfirstlane_b32 s41, v13
	v_ldexp_f64 v[40:41], |s[40:41]|, 0xffffff80
	v_trig_preop_f64 v[38:39], |s[40:41]|, 0
	v_trig_preop_f64 v[34:35], |s[40:41]|, 1
	v_trig_preop_f64 v[28:29], |s[40:41]|, 2
	s_and_b32 s1, exec_lo, s0
	v_cmp_le_f64_e64 s0, 0x7b000000, |s[40:41]|
	s_mov_b32 vcc_lo, s1
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v30, s40, v40, s0
	s_cbranch_vccz .LBB9_13
; %bb.12:                               ;   in Loop: Header=BB9_4 Depth=3
	s_and_b32 s4, s41, 0x7fffffff
	s_mov_b32 s6, s52
	v_cndmask_b32_e64 v31, s4, v41, s0
	s_mov_b32 s85, s83
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[12:13], v[38:39], v[30:31]
	v_mul_f64 v[14:15], v[34:35], v[30:31]
	v_fma_f64 v[16:17], v[38:39], v[30:31], -v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[20:21], v[14:15], v[16:17]
	v_add_f64 v[22:23], v[12:13], v[20:21]
	v_add_f64 v[24:25], v[20:21], -v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[12:13], v[22:23], -v[12:13]
	v_add_f64 v[16:17], v[16:17], -v[24:25]
	v_add_f64 v[24:25], v[20:21], -v[24:25]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[12:13], v[20:21], -v[12:13]
	v_ldexp_f64 v[20:21], v[22:23], -2
	v_fract_f64_e32 v[22:23], v[20:21]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[20:21]|
	v_add_f64 v[20:21], v[14:15], -v[24:25]
	v_fma_f64 v[14:15], v[34:35], v[30:31], -v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_f64 v[16:17], v[16:17], v[20:21]
	v_dual_cndmask_b32 v21, 0, v23 :: v_dual_cndmask_b32 v20, 0, v22
	v_mul_f64 v[22:23], v[28:29], v[30:31]
	v_ldexp_f64 v[20:21], v[20:21], 2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[24:25], v[22:23], v[14:15]
	v_add_f64 v[26:27], v[24:25], -v[22:23]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[14:15], v[14:15], -v[26:27]
	v_add_f64 v[26:27], v[24:25], -v[26:27]
	v_add_f64 v[26:27], v[22:23], -v[26:27]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[14:15], v[14:15], v[26:27]
	v_add_f64 v[26:27], v[24:25], v[16:17]
	v_add_f64 v[32:33], v[26:27], -v[24:25]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[16:17], v[16:17], -v[32:33]
	v_add_f64 v[32:33], v[26:27], -v[32:33]
	v_add_f64 v[24:25], v[24:25], -v[32:33]
	v_add_f64 v[32:33], v[12:13], v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[16:17], v[16:17], v[24:25]
	v_add_f64 v[36:37], v[32:33], v[20:21]
	v_add_f64 v[12:13], v[32:33], -v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[14:15], v[14:15], v[16:17]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[36:37]
	v_fma_f64 v[16:17], v[28:29], v[30:31], -v[22:23]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_f64 v[12:13], v[26:27], -v[12:13]
	s_and_b32 s4, vcc_lo, exec_lo
	s_cselect_b32 s51, 0x40100000, 0
	v_add_f64 v[14:15], v[16:17], v[14:15]
	v_add_f64 v[20:21], v[20:21], s[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[12:13], v[12:13], v[14:15]
	v_add_f64 v[16:17], v[32:33], v[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_i32_f64_e32 v22, v[16:17]
	v_cvt_f64_i32_e32 v[16:17], v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[16:17], v[20:21], -v[16:17]
	v_add_f64 v[14:15], v[32:33], v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[16:17], v[14:15], -v[16:17]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[14:15]
	v_add_f64 v[16:17], v[32:33], -v[16:17]
	s_and_b32 s4, vcc_lo, exec_lo
	s_cselect_b32 s51, 0x3ff00000, 0
	v_add_co_ci_u32_e64 v97, s4, 0, v22, vcc_lo
	v_add_f64 v[14:15], v[14:15], -s[50:51]
	s_mov_b32 s4, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[12:13], v[12:13], v[16:17]
	v_add_f64 v[16:17], v[14:15], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[14:15], v[16:17], -v[14:15]
	v_mul_f64 v[20:21], v[16:17], s[6:7]
	v_add_f64 v[12:13], v[12:13], -v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[14:15], v[16:17], s[6:7], -v[20:21]
	v_fma_f64 v[14:15], v[16:17], s[84:85], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[12:13], v[12:13], s[6:7], v[14:15]
	v_add_f64 v[14:15], v[20:21], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[16:17], v[14:15], -v[20:21]
	v_add_f64 v[20:21], v[12:13], -v[16:17]
	s_branch .LBB9_14
.LBB9_13:                               ;   in Loop: Header=BB9_4 Depth=3
	s_mov_b32 s4, -1
                                        ; implicit-def: $vgpr97
                                        ; implicit-def: $vgpr14_vgpr15
                                        ; implicit-def: $vgpr20_vgpr21
.LBB9_14:                               ; %Flow449
                                        ;   in Loop: Header=BB9_4 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s4
	s_cbranch_vccnz .LBB9_16
; %bb.15:                               ;   in Loop: Header=BB9_4 Depth=3
	v_mul_f64 v[12:13], |s[40:41]|, s[54:55]
	s_mov_b32 s82, s56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[12:13], v[12:13]
	v_fma_f64 v[14:15], v[12:13], s[52:53], |s[40:41]|
	v_mul_f64 v[16:17], v[12:13], s[56:57]
	v_cvt_i32_f64_e32 v97, v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[22:23], v[12:13], s[56:57], v[14:15]
	v_add_f64 v[20:21], v[14:15], v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[14:15], v[14:15], -v[20:21]
	v_add_f64 v[20:21], v[20:21], -v[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[14:15], v[14:15], v[16:17]
	v_fma_f64 v[16:17], v[12:13], s[82:83], v[16:17]
	v_add_f64 v[14:15], v[20:21], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[14:15], v[14:15], -v[16:17]
	v_fma_f64 v[16:17], v[12:13], s[58:59], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[14:15], v[22:23], v[16:17]
	v_add_f64 v[20:21], v[14:15], -v[22:23]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[20:21], v[16:17], -v[20:21]
.LBB9_16:                               ; %_ZL3cosd.exit251
                                        ;   in Loop: Header=BB9_4 Depth=3
	v_readlane_b32 s4, v155, 17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_add_u32 s98, s4, s94
	v_readlane_b32 s4, v155, 18
	s_addc_u32 s99, s4, s95
	v_readlane_b32 s4, v155, 11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_add_u32 s100, s4, s94
	v_readlane_b32 s4, v155, 12
	s_addc_u32 s101, s4, s95
	s_clause 0x1
	global_load_b64 v[16:17], v124, s[100:101]
	global_load_b64 v[12:13], v124, s[98:99]
	s_waitcnt vmcnt(1)
	v_add_f64 v[16:17], s[22:23], v[16:17]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ngt_f64_e64 s5, 0x41d00000, |v[16:17]|
	v_trig_preop_f64 v[64:65], |v[16:17]|, 0
	v_trig_preop_f64 v[56:57], |v[16:17]|, 1
	v_cmp_le_f64_e64 s4, 0x7b000000, |v[16:17]|
	v_ldexp_f64 v[66:67], |v[16:17]|, 0xffffff80
	v_trig_preop_f64 v[58:59], |v[16:17]|, 2
	v_and_b32_e32 v40, 0x7fffffff, v17
	s_and_b32 s5, exec_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 vcc_lo, s5
	s_cbranch_vccz .LBB9_18
; %bb.17:                               ;   in Loop: Header=BB9_4 Depth=3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v23, v40, v67, s4
	v_cndmask_b32_e64 v22, v16, v66, s4
	s_mov_b32 s85, s83
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[24:25], v[64:65], v[22:23]
	v_mul_f64 v[26:27], v[56:57], v[22:23]
	v_fma_f64 v[31:32], v[64:65], v[22:23], -v[24:25]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[36:37], v[26:27], v[31:32]
	v_add_f64 v[42:43], v[24:25], v[36:37]
	v_add_f64 v[44:45], v[36:37], -v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[24:25], v[42:43], -v[24:25]
	v_add_f64 v[31:32], v[31:32], -v[44:45]
	v_add_f64 v[44:45], v[36:37], -v[44:45]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[24:25], v[36:37], -v[24:25]
	v_ldexp_f64 v[36:37], v[42:43], -2
	v_fract_f64_e32 v[42:43], v[36:37]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[36:37]|
	v_add_f64 v[36:37], v[26:27], -v[44:45]
	v_fma_f64 v[26:27], v[56:57], v[22:23], -v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_f64 v[31:32], v[31:32], v[36:37]
	v_dual_cndmask_b32 v37, 0, v43 :: v_dual_cndmask_b32 v36, 0, v42
	v_mul_f64 v[42:43], v[58:59], v[22:23]
	v_ldexp_f64 v[36:37], v[36:37], 2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[44:45], v[42:43], v[26:27]
	v_fma_f64 v[22:23], v[58:59], v[22:23], -v[42:43]
	v_add_f64 v[48:49], v[44:45], v[31:32]
	v_add_f64 v[46:47], v[44:45], -v[42:43]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[54:55], v[48:49], -v[44:45]
	v_add_f64 v[26:27], v[26:27], -v[46:47]
	v_add_f64 v[46:47], v[44:45], -v[46:47]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[31:32], v[31:32], -v[54:55]
	v_add_f64 v[54:55], v[48:49], -v[54:55]
	v_add_f64 v[46:47], v[42:43], -v[46:47]
	v_add_f64 v[42:43], v[24:25], v[48:49]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[44:45], v[44:45], -v[54:55]
	v_add_f64 v[26:27], v[26:27], v[46:47]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[24:25], v[42:43], -v[24:25]
	v_add_f64 v[31:32], v[31:32], v[44:45]
	v_add_f64 v[44:45], v[42:43], v[36:37]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[24:25], v[48:49], -v[24:25]
	v_add_f64 v[26:27], v[26:27], v[31:32]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e32 vcc_lo, 0, v[44:45]
	v_add_f64 v[22:23], v[22:23], v[26:27]
	s_and_b32 s6, vcc_lo, exec_lo
	s_cselect_b32 s51, 0x40100000, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[26:27], v[36:37], s[50:51]
	v_add_f64 v[22:23], v[24:25], v[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[31:32], v[42:43], v[26:27]
	v_cvt_i32_f64_e32 v33, v[31:32]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f64_i32_e32 v[31:32], v33
	v_add_f64 v[26:27], v[26:27], -v[31:32]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[24:25], v[42:43], v[26:27]
	v_add_f64 v[26:27], v[24:25], -v[26:27]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[24:25]
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f64 v[26:27], v[42:43], -v[26:27]
	s_and_b32 s6, vcc_lo, exec_lo
	s_cselect_b32 s51, 0x3ff00000, 0
	v_add_co_ci_u32_e64 v98, s6, 0, v33, vcc_lo
	v_add_f64 v[24:25], v[24:25], -s[50:51]
	s_mov_b32 s6, s52
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[22:23], v[22:23], v[26:27]
	v_add_f64 v[26:27], v[24:25], v[22:23]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[24:25], v[26:27], -v[24:25]
	v_mul_f64 v[31:32], v[26:27], s[6:7]
	v_add_f64 v[22:23], v[22:23], -v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[24:25], v[26:27], s[6:7], -v[31:32]
	v_fma_f64 v[24:25], v[26:27], s[84:85], v[24:25]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[24:25], v[22:23], s[6:7], v[24:25]
	s_mov_b32 s6, 0
	v_add_f64 v[22:23], v[31:32], v[24:25]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[26:27], v[22:23], -v[31:32]
	v_add_f64 v[26:27], v[24:25], -v[26:27]
	s_branch .LBB9_19
.LBB9_18:                               ;   in Loop: Header=BB9_4 Depth=3
	s_mov_b32 s6, -1
                                        ; implicit-def: $vgpr98
                                        ; implicit-def: $vgpr22_vgpr23
                                        ; implicit-def: $vgpr26_vgpr27
.LBB9_19:                               ; %Flow448
                                        ;   in Loop: Header=BB9_4 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB9_21
; %bb.20:                               ;   in Loop: Header=BB9_4 Depth=3
	v_mul_f64 v[22:23], |v[16:17]|, s[54:55]
	s_mov_b32 s82, s56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[24:25], v[22:23]
	v_fma_f64 v[22:23], v[24:25], s[52:53], |v[16:17]|
	v_mul_f64 v[26:27], v[24:25], s[56:57]
	v_cvt_i32_f64_e32 v98, v[24:25]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[36:37], v[24:25], s[56:57], v[22:23]
	v_add_f64 v[31:32], v[22:23], v[26:27]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[22:23], v[22:23], -v[31:32]
	v_add_f64 v[31:32], v[31:32], -v[36:37]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[22:23], v[22:23], v[26:27]
	v_fma_f64 v[26:27], v[24:25], s[82:83], v[26:27]
	v_add_f64 v[22:23], v[31:32], v[22:23]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[22:23], v[22:23], -v[26:27]
	v_fma_f64 v[26:27], v[24:25], s[58:59], v[22:23]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[22:23], v[36:37], v[26:27]
	v_add_f64 v[31:32], v[22:23], -v[36:37]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[26:27], v[26:27], -v[31:32]
.LBB9_21:                               ; %_ZL3sind.exit
                                        ;   in Loop: Header=BB9_4 Depth=3
	s_mov_b32 vcc_lo, s3
	s_cbranch_vccz .LBB9_23
; %bb.22:                               ;   in Loop: Header=BB9_4 Depth=3
	v_cndmask_b32_e64 v25, v74, v63, s2
	v_cndmask_b32_e64 v24, v8, v62, s2
	s_mov_b32 s85, s83
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[31:32], v[60:61], v[24:25]
	v_mul_f64 v[36:37], v[50:51], v[24:25]
	v_fma_f64 v[42:43], v[60:61], v[24:25], -v[31:32]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[44:45], v[36:37], v[42:43]
	v_add_f64 v[46:47], v[31:32], v[44:45]
	v_add_f64 v[48:49], v[44:45], -v[36:37]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[31:32], v[46:47], -v[31:32]
	v_add_f64 v[42:43], v[42:43], -v[48:49]
	v_add_f64 v[48:49], v[44:45], -v[48:49]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[31:32], v[44:45], -v[31:32]
	v_ldexp_f64 v[44:45], v[46:47], -2
	v_fract_f64_e32 v[46:47], v[44:45]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[44:45]|
	v_add_f64 v[44:45], v[36:37], -v[48:49]
	v_fma_f64 v[36:37], v[50:51], v[24:25], -v[36:37]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_f64 v[42:43], v[42:43], v[44:45]
	v_dual_cndmask_b32 v45, 0, v47 :: v_dual_cndmask_b32 v44, 0, v46
	v_mul_f64 v[46:47], v[52:53], v[24:25]
	v_ldexp_f64 v[44:45], v[44:45], 2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[48:49], v[46:47], v[36:37]
	v_fma_f64 v[24:25], v[52:53], v[24:25], -v[46:47]
	v_add_f64 v[68:69], v[48:49], v[42:43]
	v_add_f64 v[54:55], v[48:49], -v[46:47]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[70:71], v[68:69], -v[48:49]
	v_add_f64 v[36:37], v[36:37], -v[54:55]
	v_add_f64 v[54:55], v[48:49], -v[54:55]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[42:43], v[42:43], -v[70:71]
	v_add_f64 v[70:71], v[68:69], -v[70:71]
	v_add_f64 v[54:55], v[46:47], -v[54:55]
	v_add_f64 v[46:47], v[31:32], v[68:69]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[48:49], v[48:49], -v[70:71]
	v_add_f64 v[36:37], v[36:37], v[54:55]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[31:32], v[46:47], -v[31:32]
	v_add_f64 v[42:43], v[42:43], v[48:49]
	v_add_f64 v[48:49], v[46:47], v[44:45]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[31:32], v[68:69], -v[31:32]
	v_add_f64 v[36:37], v[36:37], v[42:43]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e32 vcc_lo, 0, v[48:49]
	v_add_f64 v[24:25], v[24:25], v[36:37]
	s_and_b32 s6, vcc_lo, exec_lo
	s_cselect_b32 s51, 0x40100000, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[36:37], v[44:45], s[50:51]
	v_add_f64 v[24:25], v[31:32], v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[42:43], v[46:47], v[36:37]
	v_cvt_i32_f64_e32 v33, v[42:43]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f64_i32_e32 v[42:43], v33
	v_add_f64 v[36:37], v[36:37], -v[42:43]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[31:32], v[46:47], v[36:37]
	v_add_f64 v[36:37], v[31:32], -v[36:37]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[31:32]
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f64 v[36:37], v[46:47], -v[36:37]
	s_and_b32 s6, vcc_lo, exec_lo
	s_cselect_b32 s51, 0x3ff00000, 0
	v_add_co_ci_u32_e64 v99, s6, 0, v33, vcc_lo
	v_add_f64 v[31:32], v[31:32], -s[50:51]
	s_mov_b32 s6, s52
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[24:25], v[24:25], v[36:37]
	v_add_f64 v[36:37], v[31:32], v[24:25]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[31:32], v[36:37], -v[31:32]
	v_mul_f64 v[42:43], v[36:37], s[6:7]
	v_add_f64 v[24:25], v[24:25], -v[31:32]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[31:32], v[36:37], s[6:7], -v[42:43]
	v_fma_f64 v[31:32], v[36:37], s[84:85], v[31:32]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[31:32], v[24:25], s[6:7], v[31:32]
	s_mov_b32 s6, 0
	v_add_f64 v[24:25], v[42:43], v[31:32]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[36:37], v[24:25], -v[42:43]
	v_add_f64 v[36:37], v[31:32], -v[36:37]
	s_branch .LBB9_24
.LBB9_23:                               ;   in Loop: Header=BB9_4 Depth=3
	s_mov_b32 s6, -1
                                        ; implicit-def: $vgpr99
                                        ; implicit-def: $vgpr24_vgpr25
                                        ; implicit-def: $vgpr36_vgpr37
.LBB9_24:                               ; %Flow447
                                        ;   in Loop: Header=BB9_4 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB9_26
; %bb.25:                               ;   in Loop: Header=BB9_4 Depth=3
	v_mul_f64 v[24:25], |v[8:9]|, s[54:55]
	s_mov_b32 s82, s56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[31:32], v[24:25]
	v_fma_f64 v[24:25], v[31:32], s[52:53], |v[8:9]|
	v_mul_f64 v[36:37], v[31:32], s[56:57]
	v_cvt_i32_f64_e32 v99, v[31:32]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[44:45], v[31:32], s[56:57], v[24:25]
	v_add_f64 v[42:43], v[24:25], v[36:37]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[24:25], v[24:25], -v[42:43]
	v_add_f64 v[42:43], v[42:43], -v[44:45]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[24:25], v[24:25], v[36:37]
	v_fma_f64 v[36:37], v[31:32], s[82:83], v[36:37]
	v_add_f64 v[24:25], v[42:43], v[24:25]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[24:25], v[24:25], -v[36:37]
	v_fma_f64 v[36:37], v[31:32], s[58:59], v[24:25]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[24:25], v[44:45], v[36:37]
	v_add_f64 v[42:43], v[24:25], -v[44:45]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[36:37], v[36:37], -v[42:43]
.LBB9_26:                               ; %_ZL3sind.exit260
                                        ;   in Loop: Header=BB9_4 Depth=3
	s_mov_b32 vcc_lo, s1
	s_cbranch_vccz .LBB9_28
; %bb.27:                               ;   in Loop: Header=BB9_4 Depth=3
	s_and_b32 s6, s41, 0x7fffffff
	s_mov_b32 s85, s83
	v_cndmask_b32_e64 v31, s6, v41, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[32:33], v[38:39], v[30:31]
	v_mul_f64 v[42:43], v[34:35], v[30:31]
	v_fma_f64 v[44:45], v[38:39], v[30:31], -v[32:33]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[46:47], v[42:43], v[44:45]
	v_add_f64 v[48:49], v[32:33], v[46:47]
	v_add_f64 v[54:55], v[46:47], -v[42:43]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[32:33], v[48:49], -v[32:33]
	v_add_f64 v[44:45], v[44:45], -v[54:55]
	v_add_f64 v[54:55], v[46:47], -v[54:55]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[32:33], v[46:47], -v[32:33]
	v_ldexp_f64 v[46:47], v[48:49], -2
	v_fract_f64_e32 v[48:49], v[46:47]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[46:47]|
	v_add_f64 v[46:47], v[42:43], -v[54:55]
	v_fma_f64 v[42:43], v[34:35], v[30:31], -v[42:43]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_f64 v[44:45], v[44:45], v[46:47]
	v_dual_cndmask_b32 v47, 0, v49 :: v_dual_cndmask_b32 v46, 0, v48
	v_mul_f64 v[48:49], v[28:29], v[30:31]
	v_ldexp_f64 v[46:47], v[46:47], 2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[54:55], v[48:49], v[42:43]
	v_add_f64 v[68:69], v[54:55], -v[48:49]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[42:43], v[42:43], -v[68:69]
	v_add_f64 v[68:69], v[54:55], -v[68:69]
	v_add_f64 v[68:69], v[48:49], -v[68:69]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[42:43], v[42:43], v[68:69]
	v_add_f64 v[68:69], v[54:55], v[44:45]
	v_add_f64 v[70:71], v[68:69], -v[54:55]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[44:45], v[44:45], -v[70:71]
	v_add_f64 v[70:71], v[68:69], -v[70:71]
	v_add_f64 v[54:55], v[54:55], -v[70:71]
	v_add_f64 v[70:71], v[32:33], v[68:69]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[44:45], v[44:45], v[54:55]
	v_add_f64 v[72:73], v[70:71], v[46:47]
	v_add_f64 v[32:33], v[70:71], -v[32:33]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[42:43], v[42:43], v[44:45]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[72:73]
	v_fma_f64 v[44:45], v[28:29], v[30:31], -v[48:49]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_f64 v[32:33], v[68:69], -v[32:33]
	s_and_b32 s6, vcc_lo, exec_lo
	s_cselect_b32 s51, 0x40100000, 0
	v_add_f64 v[42:43], v[44:45], v[42:43]
	v_add_f64 v[46:47], v[46:47], s[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[31:32], v[32:33], v[42:43]
	v_add_f64 v[44:45], v[70:71], v[46:47]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_i32_f64_e32 v48, v[44:45]
	v_cvt_f64_i32_e32 v[44:45], v48
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[44:45], v[46:47], -v[44:45]
	v_add_f64 v[42:43], v[70:71], v[44:45]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[44:45], v[42:43], -v[44:45]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[42:43]
	v_add_f64 v[44:45], v[70:71], -v[44:45]
	s_and_b32 s6, vcc_lo, exec_lo
	s_cselect_b32 s51, 0x3ff00000, 0
	v_add_co_ci_u32_e64 v100, s6, 0, v48, vcc_lo
	v_add_f64 v[42:43], v[42:43], -s[50:51]
	s_mov_b32 s6, s52
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[31:32], v[31:32], v[44:45]
	v_add_f64 v[44:45], v[42:43], v[31:32]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[42:43], v[44:45], -v[42:43]
	v_mul_f64 v[46:47], v[44:45], s[6:7]
	v_add_f64 v[31:32], v[31:32], -v[42:43]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[42:43], v[44:45], s[6:7], -v[46:47]
	v_fma_f64 v[42:43], v[44:45], s[84:85], v[42:43]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[42:43], v[31:32], s[6:7], v[42:43]
	s_mov_b32 s6, 0
	v_add_f64 v[32:33], v[46:47], v[42:43]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[44:45], v[32:33], -v[46:47]
	v_add_f64 v[46:47], v[42:43], -v[44:45]
	s_branch .LBB9_29
.LBB9_28:                               ;   in Loop: Header=BB9_4 Depth=3
	s_mov_b32 s6, -1
                                        ; implicit-def: $vgpr100
                                        ; implicit-def: $vgpr32_vgpr33
                                        ; implicit-def: $vgpr46_vgpr47
.LBB9_29:                               ; %Flow446
                                        ;   in Loop: Header=BB9_4 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB9_31
; %bb.30:                               ;   in Loop: Header=BB9_4 Depth=3
	v_mul_f64 v[31:32], |s[40:41]|, s[54:55]
	s_mov_b32 s82, s56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[42:43], v[31:32]
	v_fma_f64 v[31:32], v[42:43], s[52:53], |s[40:41]|
	v_mul_f64 v[44:45], v[42:43], s[56:57]
	v_cvt_i32_f64_e32 v100, v[42:43]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[48:49], v[42:43], s[56:57], v[31:32]
	v_add_f64 v[46:47], v[31:32], v[44:45]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[31:32], v[31:32], -v[46:47]
	v_add_f64 v[46:47], v[46:47], -v[48:49]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[31:32], v[31:32], v[44:45]
	v_fma_f64 v[44:45], v[42:43], s[82:83], v[44:45]
	v_add_f64 v[31:32], v[46:47], v[31:32]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[31:32], v[31:32], -v[44:45]
	v_fma_f64 v[44:45], v[42:43], s[58:59], v[31:32]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[32:33], v[48:49], v[44:45]
	v_add_f64 v[46:47], v[32:33], -v[48:49]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[46:47], v[44:45], -v[46:47]
.LBB9_31:                               ; %_ZL3cosd.exit265
                                        ;   in Loop: Header=BB9_4 Depth=3
	s_mov_b32 vcc_lo, s5
	s_cbranch_vccz .LBB9_33
; %bb.32:                               ;   in Loop: Header=BB9_4 Depth=3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v43, v40, v67, s4
	v_cndmask_b32_e64 v42, v16, v66, s4
	s_mov_b32 s85, s83
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[44:45], v[64:65], v[42:43]
	v_mul_f64 v[48:49], v[56:57], v[42:43]
	v_fma_f64 v[54:55], v[64:65], v[42:43], -v[44:45]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[68:69], v[48:49], v[54:55]
	v_add_f64 v[70:71], v[44:45], v[68:69]
	v_add_f64 v[72:73], v[68:69], -v[48:49]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[44:45], v[70:71], -v[44:45]
	v_add_f64 v[54:55], v[54:55], -v[72:73]
	v_add_f64 v[72:73], v[68:69], -v[72:73]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[44:45], v[68:69], -v[44:45]
	v_ldexp_f64 v[68:69], v[70:71], -2
	v_fract_f64_e32 v[70:71], v[68:69]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[68:69]|
	v_add_f64 v[68:69], v[48:49], -v[72:73]
	v_fma_f64 v[48:49], v[56:57], v[42:43], -v[48:49]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_f64 v[54:55], v[54:55], v[68:69]
	v_dual_cndmask_b32 v69, 0, v71 :: v_dual_cndmask_b32 v68, 0, v70
	v_mul_f64 v[70:71], v[58:59], v[42:43]
	v_ldexp_f64 v[68:69], v[68:69], 2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[72:73], v[70:71], v[48:49]
	v_fma_f64 v[42:43], v[58:59], v[42:43], -v[70:71]
	v_add_f64 v[77:78], v[72:73], v[54:55]
	v_add_f64 v[75:76], v[72:73], -v[70:71]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[79:80], v[77:78], -v[72:73]
	v_add_f64 v[48:49], v[48:49], -v[75:76]
	v_add_f64 v[75:76], v[72:73], -v[75:76]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[54:55], v[54:55], -v[79:80]
	v_add_f64 v[79:80], v[77:78], -v[79:80]
	v_add_f64 v[75:76], v[70:71], -v[75:76]
	v_add_f64 v[70:71], v[44:45], v[77:78]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[72:73], v[72:73], -v[79:80]
	v_add_f64 v[48:49], v[48:49], v[75:76]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[44:45], v[70:71], -v[44:45]
	v_add_f64 v[54:55], v[54:55], v[72:73]
	v_add_f64 v[72:73], v[70:71], v[68:69]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[44:45], v[77:78], -v[44:45]
	v_add_f64 v[48:49], v[48:49], v[54:55]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e32 vcc_lo, 0, v[72:73]
	v_add_f64 v[42:43], v[42:43], v[48:49]
	s_and_b32 s6, vcc_lo, exec_lo
	s_cselect_b32 s51, 0x40100000, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[48:49], v[68:69], s[50:51]
	v_add_f64 v[42:43], v[44:45], v[42:43]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[54:55], v[70:71], v[48:49]
	v_cvt_i32_f64_e32 v31, v[54:55]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f64_i32_e32 v[54:55], v31
	v_add_f64 v[48:49], v[48:49], -v[54:55]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[44:45], v[70:71], v[48:49]
	v_add_f64 v[48:49], v[44:45], -v[48:49]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[44:45]
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f64 v[48:49], v[70:71], -v[48:49]
	s_and_b32 s6, vcc_lo, exec_lo
	s_cselect_b32 s51, 0x3ff00000, 0
	v_add_co_ci_u32_e64 v101, s6, 0, v31, vcc_lo
	v_add_f64 v[44:45], v[44:45], -s[50:51]
	s_mov_b32 s6, s52
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[42:43], v[42:43], v[48:49]
	v_add_f64 v[48:49], v[44:45], v[42:43]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[44:45], v[48:49], -v[44:45]
	v_mul_f64 v[54:55], v[48:49], s[6:7]
	v_add_f64 v[42:43], v[42:43], -v[44:45]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[44:45], v[48:49], s[6:7], -v[54:55]
	v_fma_f64 v[44:45], v[48:49], s[84:85], v[44:45]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[44:45], v[42:43], s[6:7], v[44:45]
	s_mov_b32 s6, 0
	v_add_f64 v[42:43], v[54:55], v[44:45]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[48:49], v[42:43], -v[54:55]
	v_add_f64 v[68:69], v[44:45], -v[48:49]
	s_branch .LBB9_34
.LBB9_33:                               ;   in Loop: Header=BB9_4 Depth=3
	s_mov_b32 s6, -1
                                        ; implicit-def: $vgpr101
                                        ; implicit-def: $vgpr42_vgpr43
                                        ; implicit-def: $vgpr68_vgpr69
.LBB9_34:                               ; %Flow445
                                        ;   in Loop: Header=BB9_4 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB9_36
; %bb.35:                               ;   in Loop: Header=BB9_4 Depth=3
	v_mul_f64 v[42:43], |v[16:17]|, s[54:55]
	s_mov_b32 s82, s56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[44:45], v[42:43]
	v_fma_f64 v[42:43], v[44:45], s[52:53], |v[16:17]|
	v_mul_f64 v[48:49], v[44:45], s[56:57]
	v_cvt_i32_f64_e32 v101, v[44:45]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[68:69], v[44:45], s[56:57], v[42:43]
	v_add_f64 v[54:55], v[42:43], v[48:49]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[42:43], v[42:43], -v[54:55]
	v_add_f64 v[54:55], v[54:55], -v[68:69]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[42:43], v[42:43], v[48:49]
	v_fma_f64 v[48:49], v[44:45], s[82:83], v[48:49]
	v_add_f64 v[42:43], v[54:55], v[42:43]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[42:43], v[42:43], -v[48:49]
	v_fma_f64 v[48:49], v[44:45], s[58:59], v[42:43]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[42:43], v[68:69], v[48:49]
	v_add_f64 v[54:55], v[42:43], -v[68:69]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[68:69], v[48:49], -v[54:55]
.LBB9_36:                               ; %_ZL3cosd.exit270
                                        ;   in Loop: Header=BB9_4 Depth=3
	s_mov_b32 vcc_lo, s1
	s_cbranch_vccz .LBB9_38
; %bb.37:                               ;   in Loop: Header=BB9_4 Depth=3
	s_and_b32 s6, s41, 0x7fffffff
	s_mov_b32 s85, s83
	v_cndmask_b32_e64 v31, s6, v41, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[44:45], v[38:39], v[30:31]
	v_mul_f64 v[48:49], v[34:35], v[30:31]
	v_fma_f64 v[54:55], v[38:39], v[30:31], -v[44:45]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[70:71], v[48:49], v[54:55]
	v_add_f64 v[72:73], v[44:45], v[70:71]
	v_add_f64 v[75:76], v[70:71], -v[48:49]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[44:45], v[72:73], -v[44:45]
	v_add_f64 v[54:55], v[54:55], -v[75:76]
	v_add_f64 v[75:76], v[70:71], -v[75:76]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[44:45], v[70:71], -v[44:45]
	v_ldexp_f64 v[70:71], v[72:73], -2
	v_fract_f64_e32 v[72:73], v[70:71]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[70:71]|
	v_add_f64 v[70:71], v[48:49], -v[75:76]
	v_fma_f64 v[48:49], v[34:35], v[30:31], -v[48:49]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_f64 v[54:55], v[54:55], v[70:71]
	v_dual_cndmask_b32 v71, 0, v73 :: v_dual_cndmask_b32 v70, 0, v72
	v_mul_f64 v[72:73], v[28:29], v[30:31]
	v_ldexp_f64 v[70:71], v[70:71], 2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[75:76], v[72:73], v[48:49]
	v_add_f64 v[77:78], v[75:76], -v[72:73]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[48:49], v[48:49], -v[77:78]
	v_add_f64 v[77:78], v[75:76], -v[77:78]
	v_add_f64 v[77:78], v[72:73], -v[77:78]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[48:49], v[48:49], v[77:78]
	v_add_f64 v[77:78], v[75:76], v[54:55]
	v_add_f64 v[79:80], v[77:78], -v[75:76]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[54:55], v[54:55], -v[79:80]
	v_add_f64 v[79:80], v[77:78], -v[79:80]
	v_add_f64 v[75:76], v[75:76], -v[79:80]
	v_add_f64 v[79:80], v[44:45], v[77:78]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[54:55], v[54:55], v[75:76]
	v_add_f64 v[81:82], v[79:80], v[70:71]
	v_add_f64 v[44:45], v[79:80], -v[44:45]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[48:49], v[48:49], v[54:55]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[81:82]
	v_fma_f64 v[54:55], v[28:29], v[30:31], -v[72:73]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_f64 v[44:45], v[77:78], -v[44:45]
	s_and_b32 s6, vcc_lo, exec_lo
	s_cselect_b32 s51, 0x40100000, 0
	v_add_f64 v[48:49], v[54:55], v[48:49]
	v_add_f64 v[70:71], v[70:71], s[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[44:45], v[44:45], v[48:49]
	v_add_f64 v[54:55], v[79:80], v[70:71]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_i32_f64_e32 v31, v[54:55]
	v_cvt_f64_i32_e32 v[54:55], v31
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[54:55], v[70:71], -v[54:55]
	v_add_f64 v[48:49], v[79:80], v[54:55]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[54:55], v[48:49], -v[54:55]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[48:49]
	v_add_f64 v[54:55], v[79:80], -v[54:55]
	s_and_b32 s6, vcc_lo, exec_lo
	s_cselect_b32 s51, 0x3ff00000, 0
	v_add_co_ci_u32_e64 v102, s6, 0, v31, vcc_lo
	v_add_f64 v[48:49], v[48:49], -s[50:51]
	s_mov_b32 s6, s52
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[44:45], v[44:45], v[54:55]
	v_add_f64 v[54:55], v[48:49], v[44:45]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[48:49], v[54:55], -v[48:49]
	v_mul_f64 v[70:71], v[54:55], s[6:7]
	v_add_f64 v[44:45], v[44:45], -v[48:49]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[48:49], v[54:55], s[6:7], -v[70:71]
	v_fma_f64 v[48:49], v[54:55], s[84:85], v[48:49]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[44:45], v[44:45], s[6:7], v[48:49]
	s_mov_b32 s6, 0
	v_add_f64 v[48:49], v[70:71], v[44:45]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[54:55], v[48:49], -v[70:71]
	v_add_f64 v[70:71], v[44:45], -v[54:55]
	s_branch .LBB9_39
.LBB9_38:                               ;   in Loop: Header=BB9_4 Depth=3
	s_mov_b32 s6, -1
                                        ; implicit-def: $vgpr102
                                        ; implicit-def: $vgpr48_vgpr49
                                        ; implicit-def: $vgpr70_vgpr71
.LBB9_39:                               ; %Flow444
                                        ;   in Loop: Header=BB9_4 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB9_41
; %bb.40:                               ;   in Loop: Header=BB9_4 Depth=3
	v_mul_f64 v[44:45], |s[40:41]|, s[54:55]
	s_mov_b32 s82, s56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[44:45], v[44:45]
	v_fma_f64 v[48:49], v[44:45], s[52:53], |s[40:41]|
	v_mul_f64 v[54:55], v[44:45], s[56:57]
	v_cvt_i32_f64_e32 v102, v[44:45]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[72:73], v[44:45], s[56:57], v[48:49]
	v_add_f64 v[70:71], v[48:49], v[54:55]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[48:49], v[48:49], -v[70:71]
	v_add_f64 v[70:71], v[70:71], -v[72:73]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[48:49], v[48:49], v[54:55]
	v_fma_f64 v[54:55], v[44:45], s[82:83], v[54:55]
	v_add_f64 v[48:49], v[70:71], v[48:49]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[48:49], v[48:49], -v[54:55]
	v_fma_f64 v[54:55], v[44:45], s[58:59], v[48:49]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[48:49], v[72:73], v[54:55]
	v_add_f64 v[70:71], v[48:49], -v[72:73]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[70:71], v[54:55], -v[70:71]
.LBB9_41:                               ; %_ZL3sind.exit275
                                        ;   in Loop: Header=BB9_4 Depth=3
	s_add_u32 s102, s34, s94
	s_addc_u32 s103, s35, s95
	s_mov_b32 vcc_lo, s5
	global_load_b64 v[44:45], v124, s[102:103]
	s_cbranch_vccz .LBB9_43
; %bb.42:                               ;   in Loop: Header=BB9_4 Depth=3
	v_cndmask_b32_e64 v55, v40, v67, s4
	v_cndmask_b32_e64 v54, v16, v66, s4
	s_mov_b32 s85, s83
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[72:73], v[64:65], v[54:55]
	v_mul_f64 v[75:76], v[56:57], v[54:55]
	v_fma_f64 v[77:78], v[64:65], v[54:55], -v[72:73]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[79:80], v[75:76], v[77:78]
	v_add_f64 v[81:82], v[72:73], v[79:80]
	v_add_f64 v[83:84], v[79:80], -v[75:76]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[72:73], v[81:82], -v[72:73]
	v_add_f64 v[77:78], v[77:78], -v[83:84]
	v_add_f64 v[83:84], v[79:80], -v[83:84]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[72:73], v[79:80], -v[72:73]
	v_ldexp_f64 v[79:80], v[81:82], -2
	v_fract_f64_e32 v[81:82], v[79:80]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[79:80]|
	v_add_f64 v[79:80], v[75:76], -v[83:84]
	v_fma_f64 v[75:76], v[56:57], v[54:55], -v[75:76]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_f64 v[77:78], v[77:78], v[79:80]
	v_dual_cndmask_b32 v80, 0, v82 :: v_dual_cndmask_b32 v79, 0, v81
	v_mul_f64 v[81:82], v[58:59], v[54:55]
	v_ldexp_f64 v[79:80], v[79:80], 2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[83:84], v[81:82], v[75:76]
	v_fma_f64 v[54:55], v[58:59], v[54:55], -v[81:82]
	v_add_f64 v[87:88], v[83:84], v[77:78]
	v_add_f64 v[85:86], v[83:84], -v[81:82]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[89:90], v[87:88], -v[83:84]
	v_add_f64 v[75:76], v[75:76], -v[85:86]
	v_add_f64 v[85:86], v[83:84], -v[85:86]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[77:78], v[77:78], -v[89:90]
	v_add_f64 v[89:90], v[87:88], -v[89:90]
	v_add_f64 v[85:86], v[81:82], -v[85:86]
	v_add_f64 v[81:82], v[72:73], v[87:88]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[83:84], v[83:84], -v[89:90]
	v_add_f64 v[75:76], v[75:76], v[85:86]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[72:73], v[81:82], -v[72:73]
	v_add_f64 v[77:78], v[77:78], v[83:84]
	v_add_f64 v[83:84], v[81:82], v[79:80]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[72:73], v[87:88], -v[72:73]
	v_add_f64 v[75:76], v[75:76], v[77:78]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e32 vcc_lo, 0, v[83:84]
	v_add_f64 v[54:55], v[54:55], v[75:76]
	s_and_b32 s6, vcc_lo, exec_lo
	s_cselect_b32 s51, 0x40100000, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[75:76], v[79:80], s[50:51]
	v_add_f64 v[54:55], v[72:73], v[54:55]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[77:78], v[81:82], v[75:76]
	v_cvt_i32_f64_e32 v31, v[77:78]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f64_i32_e32 v[77:78], v31
	v_add_f64 v[75:76], v[75:76], -v[77:78]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[72:73], v[81:82], v[75:76]
	v_add_f64 v[75:76], v[72:73], -v[75:76]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[72:73]
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f64 v[75:76], v[81:82], -v[75:76]
	s_and_b32 s6, vcc_lo, exec_lo
	s_cselect_b32 s51, 0x3ff00000, 0
	v_add_co_ci_u32_e64 v103, s6, 0, v31, vcc_lo
	v_add_f64 v[72:73], v[72:73], -s[50:51]
	s_mov_b32 s6, s52
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[54:55], v[54:55], v[75:76]
	v_add_f64 v[75:76], v[72:73], v[54:55]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[72:73], v[75:76], -v[72:73]
	v_mul_f64 v[77:78], v[75:76], s[6:7]
	v_add_f64 v[54:55], v[54:55], -v[72:73]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[72:73], v[75:76], s[6:7], -v[77:78]
	v_fma_f64 v[72:73], v[75:76], s[84:85], v[72:73]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[72:73], v[54:55], s[6:7], v[72:73]
	s_mov_b32 s6, 0
	v_add_f64 v[54:55], v[77:78], v[72:73]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[75:76], v[54:55], -v[77:78]
	v_add_f64 v[72:73], v[72:73], -v[75:76]
	s_branch .LBB9_44
.LBB9_43:                               ;   in Loop: Header=BB9_4 Depth=3
	s_mov_b32 s6, -1
                                        ; implicit-def: $vgpr103
                                        ; implicit-def: $vgpr54_vgpr55
                                        ; implicit-def: $vgpr72_vgpr73
.LBB9_44:                               ; %Flow443
                                        ;   in Loop: Header=BB9_4 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB9_46
; %bb.45:                               ;   in Loop: Header=BB9_4 Depth=3
	v_mul_f64 v[54:55], |v[16:17]|, s[54:55]
	s_mov_b32 s82, s56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[75:76], v[54:55]
	v_fma_f64 v[54:55], v[75:76], s[52:53], |v[16:17]|
	v_mul_f64 v[72:73], v[75:76], s[56:57]
	v_cvt_i32_f64_e32 v103, v[75:76]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[79:80], v[75:76], s[56:57], v[54:55]
	v_add_f64 v[77:78], v[54:55], v[72:73]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[54:55], v[54:55], -v[77:78]
	v_add_f64 v[77:78], v[77:78], -v[79:80]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[54:55], v[54:55], v[72:73]
	v_fma_f64 v[72:73], v[75:76], s[82:83], v[72:73]
	v_add_f64 v[54:55], v[77:78], v[54:55]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[54:55], v[54:55], -v[72:73]
	v_fma_f64 v[72:73], v[75:76], s[58:59], v[54:55]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[54:55], v[79:80], v[72:73]
	v_add_f64 v[77:78], v[54:55], -v[79:80]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[72:73], v[72:73], -v[77:78]
.LBB9_46:                               ; %_ZL3cosd.exit280
                                        ;   in Loop: Header=BB9_4 Depth=3
	s_mov_b32 vcc_lo, s3
	s_cbranch_vccz .LBB9_48
; %bb.47:                               ;   in Loop: Header=BB9_4 Depth=3
	v_cndmask_b32_e64 v63, v74, v63, s2
	v_cndmask_b32_e64 v62, v8, v62, s2
	s_mov_b32 s6, s52
	s_mov_b32 s85, s83
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[74:75], v[60:61], v[62:63]
	v_mul_f64 v[76:77], v[50:51], v[62:63]
	v_mul_f64 v[80:81], v[52:53], v[62:63]
	v_fma_f64 v[60:61], v[60:61], v[62:63], -v[74:75]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[50:51], v[50:51], v[62:63], -v[76:77]
	v_fma_f64 v[52:53], v[52:53], v[62:63], -v[80:81]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[78:79], v[76:77], v[60:61]
	v_add_f64 v[82:83], v[78:79], -v[76:77]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_f64 v[60:61], v[60:61], -v[82:83]
	v_add_f64 v[62:63], v[78:79], -v[82:83]
	v_add_f64 v[82:83], v[74:75], v[78:79]
	v_add_f64 v[62:63], v[76:77], -v[62:63]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[76:77], v[82:83], -2
	v_add_f64 v[74:75], v[82:83], -v[74:75]
	v_add_f64 v[82:83], v[80:81], v[50:51]
	v_add_f64 v[60:61], v[60:61], v[62:63]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fract_f64_e32 v[62:63], v[76:77]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[76:77]|
	v_add_f64 v[76:77], v[82:83], -v[80:81]
	v_add_f64 v[74:75], v[78:79], -v[74:75]
	v_add_f64 v[78:79], v[82:83], v[60:61]
	v_dual_cndmask_b32 v63, 0, v63 :: v_dual_cndmask_b32 v62, 0, v62
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[50:51], v[50:51], -v[76:77]
	v_add_f64 v[76:77], v[82:83], -v[76:77]
	v_ldexp_f64 v[62:63], v[62:63], 2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[76:77], v[80:81], -v[76:77]
	v_add_f64 v[80:81], v[74:75], v[78:79]
	v_add_f64 v[50:51], v[50:51], v[76:77]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[76:77], v[80:81], v[62:63]
	v_add_f64 v[74:75], v[80:81], -v[74:75]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[76:77]
	v_add_f64 v[76:77], v[78:79], -v[82:83]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_f64 v[74:75], v[78:79], -v[74:75]
	s_and_b32 s2, vcc_lo, exec_lo
	s_cselect_b32 s51, 0x40100000, 0
	v_add_f64 v[60:61], v[60:61], -v[76:77]
	v_add_f64 v[76:77], v[78:79], -v[76:77]
	v_add_f64 v[62:63], v[62:63], s[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[76:77], v[82:83], -v[76:77]
	v_add_f64 v[82:83], v[80:81], v[62:63]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[60:61], v[60:61], v[76:77]
	v_cvt_i32_f64_e32 v31, v[82:83]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[50:51], v[50:51], v[60:61]
	v_cvt_f64_i32_e32 v[76:77], v31
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[50:51], v[52:53], v[50:51]
	v_add_f64 v[62:63], v[62:63], -v[76:77]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[50:51], v[74:75], v[50:51]
	v_add_f64 v[60:61], v[80:81], v[62:63]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[52:53], v[60:61], -v[62:63]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[60:61]
	v_add_f64 v[52:53], v[80:81], -v[52:53]
	s_and_b32 s2, vcc_lo, exec_lo
	s_cselect_b32 s51, 0x3ff00000, 0
	v_add_co_ci_u32_e64 v104, s2, 0, v31, vcc_lo
	s_mov_b32 s2, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[50:51], v[50:51], v[52:53]
	v_add_f64 v[52:53], v[60:61], -s[50:51]
	v_add_f64 v[60:61], v[52:53], v[50:51]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[62:63], v[60:61], s[6:7]
	v_add_f64 v[52:53], v[60:61], -v[52:53]
	v_fma_f64 v[74:75], v[60:61], s[6:7], -v[62:63]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[50:51], v[50:51], -v[52:53]
	v_fma_f64 v[52:53], v[60:61], s[84:85], v[74:75]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[52:53], v[50:51], s[6:7], v[52:53]
	v_add_f64 v[50:51], v[62:63], v[52:53]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], v[50:51], -v[62:63]
	v_add_f64 v[60:61], v[52:53], -v[60:61]
	s_branch .LBB9_49
.LBB9_48:                               ;   in Loop: Header=BB9_4 Depth=3
	s_mov_b32 s2, -1
                                        ; implicit-def: $vgpr104
                                        ; implicit-def: $vgpr50_vgpr51
                                        ; implicit-def: $vgpr60_vgpr61
.LBB9_49:                               ; %Flow442
                                        ;   in Loop: Header=BB9_4 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB9_51
; %bb.50:                               ;   in Loop: Header=BB9_4 Depth=3
	v_mul_f64 v[50:51], |v[8:9]|, s[54:55]
	s_mov_b32 s82, s56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[52:53], v[50:51]
	v_fma_f64 v[50:51], v[52:53], s[52:53], |v[8:9]|
	v_mul_f64 v[60:61], v[52:53], s[56:57]
	v_cvt_i32_f64_e32 v104, v[52:53]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[74:75], v[52:53], s[56:57], v[50:51]
	v_add_f64 v[62:63], v[50:51], v[60:61]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[50:51], v[50:51], -v[62:63]
	v_add_f64 v[62:63], v[62:63], -v[74:75]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[50:51], v[50:51], v[60:61]
	v_fma_f64 v[60:61], v[52:53], s[82:83], v[60:61]
	v_add_f64 v[50:51], v[62:63], v[50:51]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[50:51], v[50:51], -v[60:61]
	v_fma_f64 v[60:61], v[52:53], s[58:59], v[50:51]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[50:51], v[74:75], v[60:61]
	v_add_f64 v[62:63], v[50:51], -v[74:75]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[60:61], v[60:61], -v[62:63]
.LBB9_51:                               ; %_ZL3sind.exit285
                                        ;   in Loop: Header=BB9_4 Depth=3
	s_mov_b32 vcc_lo, s1
	s_cbranch_vccz .LBB9_53
; %bb.52:                               ;   in Loop: Header=BB9_4 Depth=3
	s_and_b32 s2, s41, 0x7fffffff
	s_mov_b32 s6, s52
	v_cndmask_b32_e64 v31, s2, v41, s0
	s_mov_b32 s85, s83
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[52:53], v[38:39], v[30:31]
	v_mul_f64 v[62:63], v[34:35], v[30:31]
	v_fma_f64 v[74:75], v[38:39], v[30:31], -v[52:53]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[76:77], v[62:63], v[74:75]
	v_add_f64 v[78:79], v[52:53], v[76:77]
	v_add_f64 v[80:81], v[76:77], -v[62:63]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[52:53], v[78:79], -v[52:53]
	v_add_f64 v[74:75], v[74:75], -v[80:81]
	v_add_f64 v[80:81], v[76:77], -v[80:81]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[52:53], v[76:77], -v[52:53]
	v_ldexp_f64 v[76:77], v[78:79], -2
	v_fract_f64_e32 v[78:79], v[76:77]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[76:77]|
	v_add_f64 v[76:77], v[62:63], -v[80:81]
	v_fma_f64 v[62:63], v[34:35], v[30:31], -v[62:63]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_f64 v[74:75], v[74:75], v[76:77]
	v_dual_cndmask_b32 v77, 0, v79 :: v_dual_cndmask_b32 v76, 0, v78
	v_mul_f64 v[78:79], v[28:29], v[30:31]
	v_ldexp_f64 v[76:77], v[76:77], 2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[80:81], v[78:79], v[62:63]
	v_add_f64 v[82:83], v[80:81], -v[78:79]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[62:63], v[62:63], -v[82:83]
	v_add_f64 v[82:83], v[80:81], -v[82:83]
	v_add_f64 v[82:83], v[78:79], -v[82:83]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[62:63], v[62:63], v[82:83]
	v_add_f64 v[82:83], v[80:81], v[74:75]
	v_add_f64 v[84:85], v[82:83], -v[80:81]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[74:75], v[74:75], -v[84:85]
	v_add_f64 v[84:85], v[82:83], -v[84:85]
	v_add_f64 v[80:81], v[80:81], -v[84:85]
	v_add_f64 v[84:85], v[52:53], v[82:83]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[74:75], v[74:75], v[80:81]
	v_add_f64 v[86:87], v[84:85], v[76:77]
	v_add_f64 v[52:53], v[84:85], -v[52:53]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[62:63], v[62:63], v[74:75]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[86:87]
	v_fma_f64 v[74:75], v[28:29], v[30:31], -v[78:79]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_f64 v[52:53], v[82:83], -v[52:53]
	s_and_b32 s2, vcc_lo, exec_lo
	s_cselect_b32 s51, 0x40100000, 0
	v_add_f64 v[62:63], v[74:75], v[62:63]
	v_add_f64 v[76:77], v[76:77], s[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[52:53], v[52:53], v[62:63]
	v_add_f64 v[74:75], v[84:85], v[76:77]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_i32_f64_e32 v31, v[74:75]
	v_cvt_f64_i32_e32 v[74:75], v31
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[74:75], v[76:77], -v[74:75]
	v_add_f64 v[62:63], v[84:85], v[74:75]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[74:75], v[62:63], -v[74:75]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[62:63]
	v_add_f64 v[74:75], v[84:85], -v[74:75]
	s_and_b32 s2, vcc_lo, exec_lo
	s_cselect_b32 s51, 0x3ff00000, 0
	v_add_co_ci_u32_e64 v105, s2, 0, v31, vcc_lo
	v_add_f64 v[62:63], v[62:63], -s[50:51]
	s_mov_b32 s2, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[52:53], v[52:53], v[74:75]
	v_add_f64 v[74:75], v[62:63], v[52:53]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[62:63], v[74:75], -v[62:63]
	v_mul_f64 v[76:77], v[74:75], s[6:7]
	v_add_f64 v[52:53], v[52:53], -v[62:63]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], v[74:75], s[6:7], -v[76:77]
	v_fma_f64 v[62:63], v[74:75], s[84:85], v[62:63]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], v[52:53], s[6:7], v[62:63]
	v_add_f64 v[52:53], v[76:77], v[62:63]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[74:75], v[52:53], -v[76:77]
	v_add_f64 v[62:63], v[62:63], -v[74:75]
	s_branch .LBB9_54
.LBB9_53:                               ;   in Loop: Header=BB9_4 Depth=3
	s_mov_b32 s2, -1
                                        ; implicit-def: $vgpr105
                                        ; implicit-def: $vgpr52_vgpr53
                                        ; implicit-def: $vgpr62_vgpr63
.LBB9_54:                               ; %Flow440
                                        ;   in Loop: Header=BB9_4 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB9_56
; %bb.55:                               ;   in Loop: Header=BB9_4 Depth=3
	v_mul_f64 v[52:53], |s[40:41]|, s[54:55]
	s_mov_b32 s82, s56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[74:75], v[52:53]
	v_fma_f64 v[52:53], v[74:75], s[52:53], |s[40:41]|
	v_mul_f64 v[62:63], v[74:75], s[56:57]
	v_cvt_i32_f64_e32 v105, v[74:75]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[78:79], v[74:75], s[56:57], v[52:53]
	v_add_f64 v[76:77], v[52:53], v[62:63]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[52:53], v[52:53], -v[76:77]
	v_add_f64 v[76:77], v[76:77], -v[78:79]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[52:53], v[52:53], v[62:63]
	v_fma_f64 v[62:63], v[74:75], s[82:83], v[62:63]
	v_add_f64 v[52:53], v[76:77], v[52:53]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[52:53], v[52:53], -v[62:63]
	v_fma_f64 v[62:63], v[74:75], s[58:59], v[52:53]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[52:53], v[78:79], v[62:63]
	v_add_f64 v[76:77], v[52:53], -v[78:79]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[62:63], v[62:63], -v[76:77]
.LBB9_56:                               ; %_ZL3cosd.exit290
                                        ;   in Loop: Header=BB9_4 Depth=3
	s_mov_b32 vcc_lo, s5
	s_cbranch_vccz .LBB9_58
; %bb.57:                               ;   in Loop: Header=BB9_4 Depth=3
	v_cndmask_b32_e64 v67, v40, v67, s4
	v_cndmask_b32_e64 v66, v16, v66, s4
	s_mov_b32 s6, s52
	s_mov_b32 s85, s83
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[74:75], v[64:65], v[66:67]
	v_mul_f64 v[76:77], v[56:57], v[66:67]
	v_mul_f64 v[80:81], v[58:59], v[66:67]
	v_fma_f64 v[64:65], v[64:65], v[66:67], -v[74:75]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[56:57], v[56:57], v[66:67], -v[76:77]
	v_fma_f64 v[58:59], v[58:59], v[66:67], -v[80:81]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[78:79], v[76:77], v[64:65]
	v_add_f64 v[82:83], v[78:79], -v[76:77]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_f64 v[64:65], v[64:65], -v[82:83]
	v_add_f64 v[66:67], v[78:79], -v[82:83]
	v_add_f64 v[82:83], v[74:75], v[78:79]
	v_add_f64 v[66:67], v[76:77], -v[66:67]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[76:77], v[82:83], -2
	v_add_f64 v[74:75], v[82:83], -v[74:75]
	v_add_f64 v[82:83], v[80:81], v[56:57]
	v_add_f64 v[64:65], v[64:65], v[66:67]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fract_f64_e32 v[66:67], v[76:77]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[76:77]|
	v_add_f64 v[76:77], v[82:83], -v[80:81]
	v_add_f64 v[74:75], v[78:79], -v[74:75]
	v_add_f64 v[78:79], v[82:83], v[64:65]
	v_dual_cndmask_b32 v67, 0, v67 :: v_dual_cndmask_b32 v66, 0, v66
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[56:57], v[56:57], -v[76:77]
	v_add_f64 v[76:77], v[82:83], -v[76:77]
	v_ldexp_f64 v[66:67], v[66:67], 2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[76:77], v[80:81], -v[76:77]
	v_add_f64 v[80:81], v[74:75], v[78:79]
	v_add_f64 v[56:57], v[56:57], v[76:77]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[76:77], v[80:81], v[66:67]
	v_add_f64 v[74:75], v[80:81], -v[74:75]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[76:77]
	v_add_f64 v[76:77], v[78:79], -v[82:83]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_f64 v[74:75], v[78:79], -v[74:75]
	s_and_b32 s2, vcc_lo, exec_lo
	s_cselect_b32 s51, 0x40100000, 0
	v_add_f64 v[64:65], v[64:65], -v[76:77]
	v_add_f64 v[76:77], v[78:79], -v[76:77]
	v_add_f64 v[66:67], v[66:67], s[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[76:77], v[82:83], -v[76:77]
	v_add_f64 v[82:83], v[80:81], v[66:67]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[64:65], v[64:65], v[76:77]
	v_cvt_i32_f64_e32 v31, v[82:83]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[56:57], v[56:57], v[64:65]
	v_cvt_f64_i32_e32 v[76:77], v31
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[56:57], v[58:59], v[56:57]
	v_add_f64 v[66:67], v[66:67], -v[76:77]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[56:57], v[74:75], v[56:57]
	v_add_f64 v[64:65], v[80:81], v[66:67]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[58:59], v[64:65], -v[66:67]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[64:65]
	v_add_f64 v[58:59], v[80:81], -v[58:59]
	s_and_b32 s2, vcc_lo, exec_lo
	s_cselect_b32 s51, 0x3ff00000, 0
	v_add_co_ci_u32_e64 v106, s2, 0, v31, vcc_lo
	s_mov_b32 s2, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[56:57], v[56:57], v[58:59]
	v_add_f64 v[58:59], v[64:65], -s[50:51]
	v_add_f64 v[64:65], v[58:59], v[56:57]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[66:67], v[64:65], s[6:7]
	v_add_f64 v[58:59], v[64:65], -v[58:59]
	v_fma_f64 v[74:75], v[64:65], s[6:7], -v[66:67]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[56:57], v[56:57], -v[58:59]
	v_fma_f64 v[58:59], v[64:65], s[84:85], v[74:75]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[58:59], v[56:57], s[6:7], v[58:59]
	v_add_f64 v[56:57], v[66:67], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[64:65], v[56:57], -v[66:67]
	v_add_f64 v[66:67], v[58:59], -v[64:65]
	s_branch .LBB9_59
.LBB9_58:                               ;   in Loop: Header=BB9_4 Depth=3
	s_mov_b32 s2, -1
                                        ; implicit-def: $vgpr106
                                        ; implicit-def: $vgpr56_vgpr57
                                        ; implicit-def: $vgpr66_vgpr67
.LBB9_59:                               ; %Flow439
                                        ;   in Loop: Header=BB9_4 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB9_61
; %bb.60:                               ;   in Loop: Header=BB9_4 Depth=3
	v_mul_f64 v[56:57], |v[16:17]|, s[54:55]
	s_mov_b32 s82, s56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[58:59], v[56:57]
	v_fma_f64 v[56:57], v[58:59], s[52:53], |v[16:17]|
	v_mul_f64 v[64:65], v[58:59], s[56:57]
	v_cvt_i32_f64_e32 v106, v[58:59]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[74:75], v[58:59], s[56:57], v[56:57]
	v_add_f64 v[66:67], v[56:57], v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[56:57], v[56:57], -v[66:67]
	v_add_f64 v[66:67], v[66:67], -v[74:75]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[56:57], v[56:57], v[64:65]
	v_fma_f64 v[64:65], v[58:59], s[82:83], v[64:65]
	v_add_f64 v[56:57], v[66:67], v[56:57]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[56:57], v[56:57], -v[64:65]
	v_fma_f64 v[64:65], v[58:59], s[58:59], v[56:57]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[56:57], v[74:75], v[64:65]
	v_add_f64 v[66:67], v[56:57], -v[74:75]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[66:67], v[64:65], -v[66:67]
.LBB9_61:                               ; %_ZL3sind.exit295
                                        ;   in Loop: Header=BB9_4 Depth=3
	s_mov_b32 vcc_lo, s1
	s_cbranch_vccz .LBB9_63
; %bb.62:                               ;   in Loop: Header=BB9_4 Depth=3
	s_and_b32 s1, s41, 0x7fffffff
	s_mov_b32 s6, s52
	v_cndmask_b32_e64 v31, s1, v41, s0
	s_mov_b32 s85, s83
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[40:41], v[38:39], v[30:31]
	v_mul_f64 v[58:59], v[34:35], v[30:31]
	v_fma_f64 v[38:39], v[38:39], v[30:31], -v[40:41]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[34:35], v[34:35], v[30:31], -v[58:59]
	v_add_f64 v[64:65], v[58:59], v[38:39]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[74:75], v[64:65], -v[58:59]
	v_add_f64 v[76:77], v[40:41], v[64:65]
	v_add_f64 v[78:79], v[64:65], -v[74:75]
	v_add_f64 v[38:39], v[38:39], -v[74:75]
	v_mul_f64 v[74:75], v[28:29], v[30:31]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[40:41], v[76:77], -v[40:41]
	v_add_f64 v[58:59], v[58:59], -v[78:79]
	v_ldexp_f64 v[78:79], v[76:77], -2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[76:77], v[74:75], v[34:35]
	v_add_f64 v[40:41], v[64:65], -v[40:41]
	v_fma_f64 v[28:29], v[28:29], v[30:31], -v[74:75]
	v_add_f64 v[38:39], v[38:39], v[58:59]
	v_fract_f64_e32 v[58:59], v[78:79]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[78:79]|
	v_add_f64 v[78:79], v[76:77], -v[74:75]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v59, 0, v59 :: v_dual_cndmask_b32 v58, 0, v58
	v_add_f64 v[34:35], v[34:35], -v[78:79]
	v_add_f64 v[78:79], v[76:77], -v[78:79]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[58:59], v[58:59], 2
	v_add_f64 v[64:65], v[74:75], -v[78:79]
	v_add_f64 v[78:79], v[76:77], v[38:39]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[34:35], v[34:35], v[64:65]
	v_add_f64 v[64:65], v[40:41], v[78:79]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[80:81], v[64:65], v[58:59]
	v_add_f64 v[30:31], v[64:65], -v[40:41]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[80:81]
	v_add_f64 v[80:81], v[78:79], -v[76:77]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[30:31], v[78:79], -v[30:31]
	s_and_b32 s0, vcc_lo, exec_lo
	v_add_f64 v[38:39], v[38:39], -v[80:81]
	v_add_f64 v[80:81], v[78:79], -v[80:81]
	s_cselect_b32 s51, 0x40100000, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[58:59], v[58:59], s[50:51]
	v_add_f64 v[76:77], v[76:77], -v[80:81]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[38:39], v[38:39], v[76:77]
	v_add_f64 v[76:77], v[64:65], v[58:59]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[34:35], v[34:35], v[38:39]
	v_cvt_i32_f64_e32 v80, v[76:77]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[28:29], v[28:29], v[34:35]
	v_cvt_f64_i32_e32 v[76:77], v80
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[28:29], v[30:31], v[28:29]
	v_add_f64 v[58:59], v[58:59], -v[76:77]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[38:39], v[64:65], v[58:59]
	v_add_f64 v[34:35], v[38:39], -v[58:59]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[38:39]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_add_f64 v[30:31], v[64:65], -v[34:35]
	s_and_b32 s0, vcc_lo, exec_lo
	s_cselect_b32 s51, 0x3ff00000, 0
	v_add_co_ci_u32_e64 v107, s0, 0, v80, vcc_lo
	s_mov_b32 s0, 0
	v_add_f64 v[28:29], v[28:29], v[30:31]
	v_add_f64 v[30:31], v[38:39], -s[50:51]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[34:35], v[30:31], v[28:29]
	v_mul_f64 v[38:39], v[34:35], s[6:7]
	v_add_f64 v[30:31], v[34:35], -v[30:31]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[40:41], v[34:35], s[6:7], -v[38:39]
	v_add_f64 v[28:29], v[28:29], -v[30:31]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[30:31], v[34:35], s[84:85], v[40:41]
	v_fma_f64 v[30:31], v[28:29], s[6:7], v[30:31]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[28:29], v[38:39], v[30:31]
	v_add_f64 v[34:35], v[28:29], -v[38:39]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[34:35], v[30:31], -v[34:35]
	s_branch .LBB9_64
.LBB9_63:                               ;   in Loop: Header=BB9_4 Depth=3
	s_mov_b32 s0, -1
                                        ; implicit-def: $vgpr107
                                        ; implicit-def: $vgpr28_vgpr29
                                        ; implicit-def: $vgpr34_vgpr35
.LBB9_64:                               ; %Flow437
                                        ;   in Loop: Header=BB9_4 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB9_66
; %bb.65:                               ;   in Loop: Header=BB9_4 Depth=3
	v_mul_f64 v[28:29], |s[40:41]|, s[54:55]
	s_mov_b32 s82, s56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[30:31], v[28:29]
	v_fma_f64 v[28:29], v[30:31], s[52:53], |s[40:41]|
	v_mul_f64 v[34:35], v[30:31], s[56:57]
	v_cvt_i32_f64_e32 v107, v[30:31]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[40:41], v[30:31], s[56:57], v[28:29]
	v_add_f64 v[38:39], v[28:29], v[34:35]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[28:29], v[28:29], -v[38:39]
	v_add_f64 v[38:39], v[38:39], -v[40:41]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[28:29], v[28:29], v[34:35]
	v_fma_f64 v[34:35], v[30:31], s[82:83], v[34:35]
	v_add_f64 v[28:29], v[38:39], v[28:29]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[28:29], v[28:29], -v[34:35]
	v_fma_f64 v[34:35], v[30:31], s[58:59], v[28:29]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[28:29], v[40:41], v[34:35]
	v_add_f64 v[38:39], v[28:29], -v[40:41]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[34:35], v[34:35], -v[38:39]
.LBB9_66:                               ; %_ZL3sind.exit300
                                        ;   in Loop: Header=BB9_4 Depth=3
	v_mul_f64 v[38:39], v[56:57], v[56:57]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_mul_f64 v[74:75], v[66:67], 0.5
	v_mul_f64 v[76:77], v[54:55], v[54:55]
	v_mul_f64 v[80:81], v[72:73], 0.5
	v_mul_f64 v[86:87], v[60:61], 0.5
	v_mul_f64 v[88:89], v[52:53], v[52:53]
	v_mul_f64 v[92:93], v[62:63], 0.5
	v_mul_f64 v[94:95], v[42:43], v[42:43]
	v_mul_f64 v[110:111], v[68:69], 0.5
	v_mul_f64 v[131:132], v[10:11], v[10:11]
	v_mul_f64 v[135:136], v[18:19], 0.5
	v_mul_f64 v[145:146], v[20:21], 0.5
	s_mov_b32 s86, s70
	v_mul_f64 v[151:152], v[34:35], 0.5
	v_cmp_class_f64_e64 s1, v[16:17], 0x1f8
	v_cmp_class_f64_e64 s0, v[8:9], 0x1f8
	v_lshlrev_b32_e32 v16, 30, v101
	s_waitcnt vmcnt(1)
	v_add_f64 v[12:13], s[16:17], v[12:13]
	s_delay_alu instid0(VALU_DEP_2)
	v_and_b32_e32 v16, 0x80000000, v16
	v_mul_f64 v[40:41], v[38:39], 0.5
	v_mul_f64 v[64:65], v[38:39], v[38:39]
	v_mul_f64 v[78:79], v[76:77], v[76:77]
	v_mul_f64 v[90:91], v[88:89], v[88:89]
	v_mul_f64 v[108:109], v[94:95], v[94:95]
	v_mul_f64 v[133:134], v[131:132], v[131:132]
	v_add_f64 v[30:31], -v[40:41], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[58:59], -v[30:31], 1.0
	v_add_f64 v[40:41], v[58:59], -v[40:41]
	v_fma_f64 v[58:59], v[38:39], s[62:63], s[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[40:41], v[56:57], -v[66:67], v[40:41]
	v_fma_f64 v[58:59], v[38:39], v[58:59], s[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[58:59], v[38:39], v[58:59], s[66:67]
	v_fma_f64 v[58:59], v[38:39], v[58:59], s[68:69]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[58:59], v[38:39], v[58:59], s[70:71]
	v_fma_f64 v[58:59], v[64:65], v[58:59], v[40:41]
	v_fma_f64 v[40:41], v[38:39], s[74:75], s[72:73]
	v_mul_f64 v[64:65], v[56:57], -v[38:39]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[30:31], v[30:31], v[58:59]
	v_fma_f64 v[40:41], v[38:39], v[40:41], s[76:77]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[40:41], v[38:39], v[40:41], s[78:79]
	v_fma_f64 v[40:41], v[38:39], v[40:41], s[80:81]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[40:41], v[64:65], v[40:41], v[74:75]
	v_fma_f64 v[74:75], v[38:39], v[40:41], -v[66:67]
	v_mul_f64 v[40:41], v[76:77], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[38:39], -v[40:41], 1.0
	v_add_f64 v[66:67], -v[38:39], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[40:41], v[66:67], -v[40:41]
	v_fma_f64 v[66:67], v[76:77], s[62:63], s[60:61]
	v_fma_f64 v[40:41], v[54:55], -v[72:73], v[40:41]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[66:67], v[76:77], v[66:67], s[64:65]
	v_fma_f64 v[66:67], v[76:77], v[66:67], s[66:67]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[66:67], v[76:77], v[66:67], s[68:69]
	v_fma_f64 v[66:67], v[76:77], v[66:67], s[70:71]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[40:41], v[78:79], v[66:67], v[40:41]
	v_fma_f64 v[66:67], v[76:77], s[74:75], s[72:73]
	v_fma_f64 v[66:67], v[76:77], v[66:67], s[76:77]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[66:67], v[76:77], v[66:67], s[78:79]
	v_fma_f64 v[78:79], v[76:77], v[66:67], s[80:81]
	v_mul_f64 v[66:67], v[54:55], -v[76:77]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[78:79], v[66:67], v[78:79], v[80:81]
	v_fma_f64 v[76:77], v[76:77], v[78:79], -v[72:73]
	v_mul_f64 v[72:73], v[50:51], v[50:51]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[78:79], v[72:73], 0.5
	v_mul_f64 v[84:85], v[72:73], v[72:73]
	v_add_f64 v[80:81], -v[78:79], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[82:83], -v[80:81], 1.0
	v_add_f64 v[78:79], v[82:83], -v[78:79]
	v_fma_f64 v[82:83], v[72:73], s[62:63], s[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[78:79], v[50:51], -v[60:61], v[78:79]
	v_fma_f64 v[82:83], v[72:73], v[82:83], s[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[82:83], v[72:73], v[82:83], s[66:67]
	v_fma_f64 v[82:83], v[72:73], v[82:83], s[68:69]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[82:83], v[72:73], v[82:83], s[70:71]
	v_fma_f64 v[82:83], v[84:85], v[82:83], v[78:79]
	v_fma_f64 v[78:79], v[72:73], s[74:75], s[72:73]
	v_mul_f64 v[84:85], v[50:51], -v[72:73]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[78:79], v[72:73], v[78:79], s[76:77]
	v_fma_f64 v[78:79], v[72:73], v[78:79], s[78:79]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[78:79], v[72:73], v[78:79], s[80:81]
	v_fma_f64 v[78:79], v[84:85], v[78:79], v[86:87]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[86:87], v[72:73], v[78:79], -v[60:61]
	v_mul_f64 v[72:73], v[88:89], 0.5
	v_add_f64 v[60:61], -v[72:73], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[78:79], -v[60:61], 1.0
	v_add_f64 v[72:73], v[78:79], -v[72:73]
	v_fma_f64 v[78:79], v[88:89], s[62:63], s[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[72:73], v[52:53], -v[62:63], v[72:73]
	v_fma_f64 v[78:79], v[88:89], v[78:79], s[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[78:79], v[88:89], v[78:79], s[66:67]
	v_fma_f64 v[78:79], v[88:89], v[78:79], s[68:69]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[78:79], v[88:89], v[78:79], s[70:71]
	v_fma_f64 v[72:73], v[90:91], v[78:79], v[72:73]
	v_fma_f64 v[78:79], v[88:89], s[74:75], s[72:73]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[78:79], v[88:89], v[78:79], s[76:77]
	v_fma_f64 v[78:79], v[88:89], v[78:79], s[78:79]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[90:91], v[88:89], v[78:79], s[80:81]
	v_mul_f64 v[78:79], v[52:53], -v[88:89]
	v_fma_f64 v[90:91], v[78:79], v[90:91], v[92:93]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], v[88:89], v[90:91], -v[62:63]
	v_mul_f64 v[90:91], v[94:95], 0.5
	v_add_f64 v[88:89], -v[90:91], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[92:93], -v[88:89], 1.0
	v_add_f64 v[90:91], v[92:93], -v[90:91]
	v_fma_f64 v[92:93], v[94:95], s[62:63], s[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[90:91], v[42:43], -v[68:69], v[90:91]
	v_fma_f64 v[92:93], v[94:95], v[92:93], s[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[92:93], v[94:95], v[92:93], s[66:67]
	v_fma_f64 v[92:93], v[94:95], v[92:93], s[68:69]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[92:93], v[94:95], v[92:93], s[70:71]
	v_fma_f64 v[90:91], v[108:109], v[92:93], v[90:91]
	v_fma_f64 v[92:93], v[94:95], s[74:75], s[72:73]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[92:93], v[94:95], v[92:93], s[76:77]
	v_fma_f64 v[92:93], v[94:95], v[92:93], s[78:79]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[108:109], v[94:95], v[92:93], s[80:81]
	v_mul_f64 v[92:93], v[42:43], -v[94:95]
	v_fma_f64 v[108:109], v[92:93], v[108:109], v[110:111]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[68:69], v[94:95], v[108:109], -v[68:69]
	v_mul_f64 v[108:109], v[22:23], v[22:23]
	v_mul_f64 v[110:111], v[108:109], 0.5
	v_mul_f64 v[114:115], v[108:109], v[108:109]
	v_mul_f64 v[116:117], v[22:23], -v[108:109]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[94:95], -v[110:111], 1.0
	v_add_f64 v[112:113], -v[94:95], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[110:111], v[112:113], -v[110:111]
	v_fma_f64 v[112:113], v[108:109], s[62:63], s[60:61]
	v_fma_f64 v[110:111], v[22:23], -v[26:27], v[110:111]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[112:113], v[108:109], v[112:113], s[64:65]
	v_fma_f64 v[112:113], v[108:109], v[112:113], s[66:67]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[112:113], v[108:109], v[112:113], s[68:69]
	v_fma_f64 v[112:113], v[108:109], v[112:113], s[70:71]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[110:111], v[114:115], v[112:113], v[110:111]
	v_fma_f64 v[112:113], v[108:109], s[74:75], s[72:73]
	v_mul_f64 v[114:115], v[26:27], 0.5
	v_add_f64 v[94:95], v[94:95], v[110:111]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[112:113], v[108:109], v[112:113], s[76:77]
	v_fma_f64 v[112:113], v[108:109], v[112:113], s[78:79]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[112:113], v[108:109], v[112:113], s[80:81]
	v_fma_f64 v[112:113], v[116:117], v[112:113], v[114:115]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[108:109], v[108:109], v[112:113], -v[26:27]
	v_mul_f64 v[26:27], v[24:25], v[24:25]
	v_fma_f64 v[108:109], v[116:117], s[86:87], v[108:109]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_mul_f64 v[112:113], v[26:27], 0.5
	v_mul_f64 v[120:121], v[26:27], v[26:27]
	v_mul_f64 v[122:123], v[24:25], -v[26:27]
	v_add_f64 v[22:23], v[22:23], -v[108:109]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[114:115], -v[112:113], 1.0
	v_and_b32_e32 v108, 1, v98
	v_cmp_eq_u32_e32 vcc_lo, 0, v108
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v109, v95, v23, vcc_lo
	v_add_f64 v[118:119], -v[114:115], 1.0
	v_cndmask_b32_e32 v108, v94, v22, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[112:113], v[118:119], -v[112:113]
	v_fma_f64 v[118:119], v[26:27], s[62:63], s[60:61]
	v_fma_f64 v[112:113], v[24:25], -v[36:37], v[112:113]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[118:119], v[26:27], v[118:119], s[64:65]
	v_fma_f64 v[118:119], v[26:27], v[118:119], s[66:67]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[118:119], v[26:27], v[118:119], s[68:69]
	v_fma_f64 v[118:119], v[26:27], v[118:119], s[70:71]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[112:113], v[120:121], v[118:119], v[112:113]
	v_fma_f64 v[118:119], v[26:27], s[74:75], s[72:73]
	v_mul_f64 v[120:121], v[36:37], 0.5
	v_add_f64 v[94:95], v[114:115], v[112:113]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[118:119], v[26:27], v[118:119], s[76:77]
	v_fma_f64 v[118:119], v[26:27], v[118:119], s[78:79]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[118:119], v[26:27], v[118:119], s[80:81]
	v_fma_f64 v[118:119], v[122:123], v[118:119], v[120:121]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[118:119], v[26:27], v[118:119], -v[36:37]
	v_mul_f64 v[26:27], v[32:33], v[32:33]
	v_fma_f64 v[22:23], v[122:123], s[86:87], v[118:119]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_mul_f64 v[36:37], v[26:27], 0.5
	v_mul_f64 v[127:128], v[26:27], v[26:27]
	v_mul_f64 v[129:130], v[32:33], -v[26:27]
	v_add_f64 v[22:23], v[24:25], -v[22:23]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[120:121], -v[36:37], 1.0
	v_and_b32_e32 v24, 1, v99
	v_cmp_eq_u32_e32 vcc_lo, 0, v24
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v95, v95, v23, vcc_lo
	v_add_f64 v[125:126], -v[120:121], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[36:37], v[125:126], -v[36:37]
	v_fma_f64 v[125:126], v[26:27], s[62:63], s[60:61]
	v_fma_f64 v[36:37], v[32:33], -v[46:47], v[36:37]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[125:126], v[26:27], v[125:126], s[64:65]
	v_fma_f64 v[125:126], v[26:27], v[125:126], s[66:67]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[125:126], v[26:27], v[125:126], s[68:69]
	v_fma_f64 v[125:126], v[26:27], v[125:126], s[70:71]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[125:126], v[127:128], v[125:126], v[36:37]
	v_fma_f64 v[36:37], v[26:27], s[74:75], s[72:73]
	v_mul_f64 v[127:128], v[46:47], 0.5
	v_fma_f64 v[36:37], v[26:27], v[36:37], s[76:77]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[36:37], v[26:27], v[36:37], s[78:79]
	v_fma_f64 v[36:37], v[26:27], v[36:37], s[80:81]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[36:37], v[129:130], v[36:37], v[127:128]
	v_fma_f64 v[127:128], v[26:27], v[36:37], -v[46:47]
	v_mul_f64 v[36:37], v[131:132], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[26:27], -v[36:37], 1.0
	v_add_f64 v[46:47], -v[26:27], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[36:37], v[46:47], -v[36:37]
	v_fma_f64 v[46:47], v[131:132], s[62:63], s[60:61]
	v_fma_f64 v[36:37], v[10:11], -v[18:19], v[36:37]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[46:47], v[131:132], v[46:47], s[64:65]
	v_fma_f64 v[46:47], v[131:132], v[46:47], s[66:67]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[46:47], v[131:132], v[46:47], s[68:69]
	v_fma_f64 v[46:47], v[131:132], v[46:47], s[70:71]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[36:37], v[133:134], v[46:47], v[36:37]
	v_fma_f64 v[46:47], v[131:132], s[74:75], s[72:73]
	v_fma_f64 v[46:47], v[131:132], v[46:47], s[76:77]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[46:47], v[131:132], v[46:47], s[78:79]
	v_fma_f64 v[133:134], v[131:132], v[46:47], s[80:81]
	v_mul_f64 v[46:47], v[10:11], -v[131:132]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[133:134], v[46:47], v[133:134], v[135:136]
	v_fma_f64 v[18:19], v[131:132], v[133:134], -v[18:19]
	v_mul_f64 v[131:132], v[48:49], v[48:49]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[18:19], v[46:47], s[86:87], v[18:19]
	v_mul_f64 v[133:134], v[131:132], 0.5
	v_mul_f64 v[139:140], v[131:132], v[131:132]
	v_mul_f64 v[141:142], v[48:49], -v[131:132]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[10:11], v[10:11], -v[18:19]
	v_add_f64 v[135:136], -v[133:134], 1.0
	v_add_f64 v[18:19], v[26:27], v[36:37]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v11, 0x80000000, v11
	v_add_f64 v[137:138], -v[135:136], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[133:134], v[137:138], -v[133:134]
	v_fma_f64 v[137:138], v[131:132], s[62:63], s[60:61]
	v_fma_f64 v[133:134], v[48:49], -v[70:71], v[133:134]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[137:138], v[131:132], v[137:138], s[64:65]
	v_fma_f64 v[137:138], v[131:132], v[137:138], s[66:67]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[137:138], v[131:132], v[137:138], s[68:69]
	v_fma_f64 v[137:138], v[131:132], v[137:138], s[70:71]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[133:134], v[139:140], v[137:138], v[133:134]
	v_fma_f64 v[137:138], v[131:132], s[74:75], s[72:73]
	v_mul_f64 v[139:140], v[70:71], 0.5
	v_add_f64 v[24:25], v[135:136], v[133:134]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[137:138], v[131:132], v[137:138], s[76:77]
	v_cndmask_b32_e32 v94, v94, v22, vcc_lo
	v_fma_f64 v[137:138], v[131:132], v[137:138], s[78:79]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[137:138], v[131:132], v[137:138], s[80:81]
	v_fma_f64 v[137:138], v[141:142], v[137:138], v[139:140]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[131:132], v[131:132], v[137:138], -v[70:71]
	v_mul_f64 v[137:138], v[14:15], v[14:15]
	v_fma_f64 v[22:23], v[141:142], s[86:87], v[131:132]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_f64 v[139:140], v[137:138], 0.5
	v_mul_f64 v[147:148], v[14:15], -v[137:138]
	v_add_f64 v[22:23], v[48:49], -v[22:23]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[70:71], -v[139:140], 1.0
	v_and_b32_e32 v48, 1, v102
	v_cmp_eq_u32_e32 vcc_lo, 0, v48
	v_add_f64 v[48:49], v[120:121], v[125:126]
	v_cndmask_b32_e32 v110, v24, v22, vcc_lo
	v_add_f64 v[143:144], -v[70:71], 1.0
	v_cndmask_b32_e32 v111, v25, v23, vcc_lo
	v_fma_f64 v[22:23], v[92:93], s[86:87], v[68:69]
	v_fma_f64 v[24:25], v[129:130], s[86:87], v[127:128]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[139:140], v[143:144], -v[139:140]
	v_fma_f64 v[143:144], v[137:138], s[74:75], s[72:73]
	v_add_f64 v[22:23], v[42:43], -v[22:23]
	v_add_f64 v[42:43], v[88:89], v[90:91]
	v_add_f64 v[24:25], v[32:33], -v[24:25]
	v_and_b32_e32 v32, 1, v101
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v32
	v_cndmask_b32_e64 v32, 0, v94, s0
	v_fma_f64 v[139:140], v[14:15], -v[20:21], v[139:140]
	v_fma_f64 v[143:144], v[137:138], v[143:144], s[76:77]
	v_xor_b32_e32 v23, 0x80000000, v23
	v_dual_cndmask_b32 v42, v22, v42 :: v_dual_cndmask_b32 v43, v23, v43
	v_cmp_class_f64_e64 vcc_lo, s[40:41], 0x1f8
	v_lshlrev_b32_e32 v22, 30, v98
	v_lshlrev_b32_e32 v8, 30, v102
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v42, 0, v42, s1
	v_xor_b32_e32 v16, v43, v16
	s_add_u32 s40, s90, s94
	v_xor_b32_e32 v22, v22, v17
	v_xor_b32_e32 v8, s41, v8
	v_cndmask_b32_e64 v43, 0x7ff80000, v16, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_and_b32_e32 v22, 0x80000000, v22
	v_and_b32_e32 v8, 0x80000000, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v23, v109, v22
	v_lshlrev_b32_e32 v22, 30, v99
	v_xor_b32_e32 v8, v111, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v23, 0x7ff80000, v23, s1
	v_xor_b32_e32 v22, v22, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_and_b32_e32 v22, 0x80000000, v22
	v_fma_f64 v[143:144], v[137:138], v[143:144], s[78:79]
	v_xor_b32_e32 v33, v95, v22
	v_cndmask_b32_e64 v22, 0, v108, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v33, 0x7ff80000, v33, s0
	v_mul_f64 v[22:23], v[22:23], v[32:33]
	v_cndmask_b32_e32 v32, 0, v110, vcc_lo
	v_cndmask_b32_e32 v33, 0x7ff80000, v8, vcc_lo
	v_and_b32_e32 v8, 1, v100
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[32:33], v[42:43], v[32:33]
	v_cmp_eq_u32_e64 s2, 0, v8
	v_xor_b32_e32 v8, 0x80000000, v25
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v16, v24, v48, s2
	v_lshlrev_b32_e32 v24, 30, v100
	v_cndmask_b32_e64 v8, v8, v49, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v24, 0x80000000, v24
	v_xor_b32_e32 v8, v8, v24
	v_cndmask_b32_e32 v24, 0, v16, vcc_lo
	v_fma_f64 v[143:144], v[137:138], v[143:144], s[80:81]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v25, 0x7ff80000, v8 :: v_dual_and_b32 v8, 1, v106
	v_cmp_eq_u32_e64 s2, 0, v8
	v_and_b32_e32 v8, 1, v104
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[22:23], v[22:23], v[24:25], -v[32:33]
	v_fma_f64 v[24:25], v[64:65], s[86:87], v[74:75]
	v_fma_f64 v[143:144], v[147:148], v[143:144], v[145:146]
	v_add_f64 v[24:25], v[56:57], -v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[20:21], v[137:138], v[143:144], -v[20:21]
	v_fma_f64 v[143:144], v[137:138], s[62:63], s[60:61]
	v_cndmask_b32_e64 v32, v30, v24, s2
	s_delay_alu instid0(VALU_DEP_4)
	v_cndmask_b32_e64 v33, v31, v25, s2
	v_fma_f64 v[24:25], v[84:85], s[86:87], v[86:87]
	v_add_f64 v[30:31], v[80:81], v[82:83]
	v_cmp_eq_u32_e64 s2, 0, v8
	v_and_b32_e32 v8, 1, v107
	v_fma_f64 v[20:21], v[147:148], s[86:87], v[20:21]
	v_fma_f64 v[143:144], v[137:138], v[143:144], s[64:65]
	v_add_f64 v[24:25], v[50:51], -v[24:25]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[14:15], v[14:15], -v[20:21]
	v_fma_f64 v[143:144], v[137:138], v[143:144], s[66:67]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v42, v30, v24, s2
	v_cndmask_b32_e64 v43, v31, v25, s2
	v_cmp_eq_u32_e64 s2, 0, v8
	v_lshlrev_b32_e32 v8, 30, v106
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v26, v8, v17
	v_lshlrev_b32_e32 v8, 30, v104
	v_xor_b32_e32 v27, v8, v9
	v_add_f64 v[8:9], v[60:61], v[72:73]
	v_fma_f64 v[143:144], v[137:138], v[143:144], s[68:69]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[143:144], v[137:138], v[143:144], s[70:71]
	v_mul_f64 v[137:138], v[137:138], v[137:138]
	v_fma_f64 v[137:138], v[137:138], v[143:144], v[139:140]
	v_mul_f64 v[139:140], v[28:29], v[28:29]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[16:17], v[70:71], v[137:138]
	v_mul_f64 v[143:144], v[139:140], 0.5
	v_mul_f64 v[153:154], v[28:29], -v[139:140]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[145:146], -v[143:144], 1.0
	v_add_f64 v[149:150], -v[145:146], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[143:144], v[149:150], -v[143:144]
	v_fma_f64 v[149:150], v[139:140], s[74:75], s[72:73]
	v_fma_f64 v[143:144], v[28:29], -v[34:35], v[143:144]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[149:150], v[139:140], v[149:150], s[76:77]
	v_fma_f64 v[149:150], v[139:140], v[149:150], s[78:79]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[149:150], v[139:140], v[149:150], s[80:81]
	v_fma_f64 v[149:150], v[153:154], v[149:150], v[151:152]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[34:35], v[139:140], v[149:150], -v[34:35]
	v_fma_f64 v[149:150], v[139:140], s[62:63], s[60:61]
	v_fma_f64 v[24:25], v[153:154], s[86:87], v[34:35]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[149:150], v[139:140], v[149:150], s[64:65]
	v_add_f64 v[24:25], v[28:29], -v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[149:150], v[139:140], v[149:150], s[66:67]
	v_fma_f64 v[28:29], v[78:79], s[86:87], v[62:63]
	v_fma_f64 v[149:150], v[139:140], v[149:150], s[68:69]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[20:21], v[52:53], -v[28:29]
	v_and_b32_e32 v28, 1, v103
	v_fma_f64 v[149:150], v[139:140], v[149:150], s[70:71]
	v_mul_f64 v[139:140], v[139:140], v[139:140]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v21, 0x80000000, v21
	v_fma_f64 v[139:140], v[139:140], v[149:150], v[143:144]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[30:31], v[145:146], v[139:140]
	v_cndmask_b32_e64 v34, v30, v24, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v35, v31, v25, s2
	v_fma_f64 v[24:25], v[66:67], s[86:87], v[76:77]
	v_add_f64 v[30:31], v[38:39], v[40:41]
	v_cmp_eq_u32_e64 s2, 0, v28
	v_and_b32_e32 v28, 1, v96
	v_add_f64 v[24:25], v[54:55], -v[24:25]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v25, 0x80000000, v25
	v_cndmask_b32_e64 v24, v24, v30, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v25, v25, v31, s2
	v_cmp_eq_u32_e64 s2, 0, v28
	v_cndmask_b32_e64 v18, v10, v18, s2
	v_and_b32_e32 v10, 1, v97
	v_cndmask_b32_e64 v19, v11, v19, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_eq_u32_e64 s2, 0, v10
	v_xor_b32_e32 v10, 0x80000000, v15
	v_cndmask_b32_e64 v28, v14, v16, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v29, v10, v17, s2
	v_and_b32_e32 v10, 0x80000000, v26
	v_cndmask_b32_e32 v14, 0, v34, vcc_lo
	v_cndmask_b32_e64 v16, 0, v24, s1
	v_xor_b32_e32 v11, v33, v10
	v_lshlrev_b32_e32 v10, 30, v107
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v11, 0x7ff80000, v11, s1
	v_xor_b32_e32 v10, s41, v10
	s_addc_u32 s41, s91, s95
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v10, 0x80000000, v10
	v_xor_b32_e32 v15, v35, v10
	v_cndmask_b32_e64 v10, 0, v32, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v15, 0x7ff80000, v15, vcc_lo
	v_mul_f64 v[10:11], v[10:11], v[14:15]
	v_and_b32_e32 v14, 0x80000000, v27
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v15, v43, v14
	v_lshlrev_b32_e32 v14, 30, v103
	v_cndmask_b32_e64 v15, 0x7ff80000, v15, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v14, 0x80000000, v14
	v_xor_b32_e32 v17, v25, v14
	v_cndmask_b32_e64 v14, 0, v42, s0
	s_waitcnt vmcnt(0)
	v_add_f64 v[24:25], s[18:19], v[44:45]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v17, 0x7ff80000, v17, s1
	v_mul_f64 v[14:15], v[16:17], v[14:15]
	v_lshlrev_b32_e32 v16, 30, v96
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v16, 0x80000000, v16
	v_xor_b32_e32 v17, v19, v16
	v_lshlrev_b32_e32 v16, 30, v97
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v17, 0x7ff80000, v17, s0
	v_and_b32_e32 v16, 0x80000000, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v19, v29, v16
	v_cndmask_b32_e64 v16, 0, v18, s0
	v_cndmask_b32_e32 v18, 0, v28, vcc_lo
	v_cndmask_b32_e32 v19, 0x7ff80000, v19, vcc_lo
	v_mul_f64 v[22:23], v[24:25], v[22:23]
	v_and_b32_e32 v24, 1, v105
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_mul_f64 v[16:17], v[16:17], v[18:19]
	global_load_b64 v[18:19], v124, s[40:41]
	v_lshlrev_b32_e32 v25, 30, v105
	v_cmp_eq_u32_e64 s0, 0, v24
	v_and_b32_e32 v24, 0x80000000, v25
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v9, v21, v9, s0
	v_cndmask_b32_e64 v8, v20, v8, s0
	s_add_u32 s0, s47, s94
	s_addc_u32 s1, s48, s95
	v_xor_b32_e32 v9, v9, v24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v8, 0, v8, vcc_lo
	v_cndmask_b32_e32 v9, 0x7ff80000, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], v[14:15], v[8:9], v[10:11]
	v_fma_f64 v[10:11], v[12:13], v[16:17], v[22:23]
	s_waitcnt vmcnt(0)
	v_add_f64 v[18:19], s[20:21], v[18:19]
	v_fma_f64 v[8:9], v[18:19], v[8:9], v[10:11]
	global_store_b64 v124, v[8:9], s[0:1]
	global_load_b64 v[8:9], v124, s[96:97]
	s_waitcnt vmcnt(0)
	v_add_f64 v[8:9], s[36:37], v[8:9]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ngt_f64_e64 s0, 0x41d00000, |v[8:9]|
	v_trig_preop_f64 v[62:63], |v[8:9]|, 0
	v_trig_preop_f64 v[54:55], |v[8:9]|, 1
	v_cmp_le_f64_e64 s2, 0x7b000000, |v[8:9]|
	v_ldexp_f64 v[64:65], |v[8:9]|, 0xffffff80
	v_trig_preop_f64 v[56:57], |v[8:9]|, 2
	v_and_b32_e32 v74, 0x7fffffff, v9
	s_and_b32 s3, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 vcc_lo, s3
	s_cbranch_vccz .LBB9_68
; %bb.67:                               ;   in Loop: Header=BB9_4 Depth=3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v11, v74, v65, s2
	v_cndmask_b32_e64 v10, v8, v64, s2
	s_mov_b32 s6, s52
	s_mov_b32 s85, s83
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[12:13], v[62:63], v[10:11]
	v_mul_f64 v[14:15], v[54:55], v[10:11]
	v_fma_f64 v[16:17], v[62:63], v[10:11], -v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[18:19], v[14:15], v[16:17]
	v_add_f64 v[20:21], v[12:13], v[18:19]
	v_add_f64 v[22:23], v[18:19], -v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[12:13], v[20:21], -v[12:13]
	v_add_f64 v[16:17], v[16:17], -v[22:23]
	v_add_f64 v[22:23], v[18:19], -v[22:23]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[12:13], v[18:19], -v[12:13]
	v_ldexp_f64 v[18:19], v[20:21], -2
	v_fract_f64_e32 v[20:21], v[18:19]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[18:19]|
	v_add_f64 v[18:19], v[14:15], -v[22:23]
	v_fma_f64 v[14:15], v[54:55], v[10:11], -v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_f64 v[16:17], v[16:17], v[18:19]
	v_dual_cndmask_b32 v19, 0, v21 :: v_dual_cndmask_b32 v18, 0, v20
	v_mul_f64 v[20:21], v[56:57], v[10:11]
	v_ldexp_f64 v[18:19], v[18:19], 2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[22:23], v[20:21], v[14:15]
	v_fma_f64 v[10:11], v[56:57], v[10:11], -v[20:21]
	v_add_f64 v[26:27], v[22:23], v[16:17]
	v_add_f64 v[24:25], v[22:23], -v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[28:29], v[26:27], -v[22:23]
	v_add_f64 v[14:15], v[14:15], -v[24:25]
	v_add_f64 v[24:25], v[22:23], -v[24:25]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[16:17], v[16:17], -v[28:29]
	v_add_f64 v[28:29], v[26:27], -v[28:29]
	v_add_f64 v[24:25], v[20:21], -v[24:25]
	v_add_f64 v[20:21], v[12:13], v[26:27]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[22:23], v[22:23], -v[28:29]
	v_add_f64 v[14:15], v[14:15], v[24:25]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[20:21], -v[12:13]
	v_add_f64 v[16:17], v[16:17], v[22:23]
	v_add_f64 v[22:23], v[20:21], v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[26:27], -v[12:13]
	v_add_f64 v[14:15], v[14:15], v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e32 vcc_lo, 0, v[22:23]
	v_add_f64 v[10:11], v[10:11], v[14:15]
	s_and_b32 s0, vcc_lo, exec_lo
	s_cselect_b32 s51, 0x40100000, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[14:15], v[18:19], s[50:51]
	v_add_f64 v[10:11], v[12:13], v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[16:17], v[20:21], v[14:15]
	v_cvt_i32_f64_e32 v18, v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f64_i32_e32 v[16:17], v18
	v_add_f64 v[14:15], v[14:15], -v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[12:13], v[20:21], v[14:15]
	v_add_f64 v[14:15], v[12:13], -v[14:15]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[12:13]
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f64 v[14:15], v[20:21], -v[14:15]
	s_and_b32 s0, vcc_lo, exec_lo
	s_cselect_b32 s51, 0x3ff00000, 0
	v_add_co_ci_u32_e64 v125, s0, 0, v18, vcc_lo
	v_add_f64 v[12:13], v[12:13], -s[50:51]
	s_mov_b32 s0, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[10:11], v[10:11], v[14:15]
	v_add_f64 v[14:15], v[12:13], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[12:13], v[14:15], -v[12:13]
	v_mul_f64 v[16:17], v[14:15], s[6:7]
	v_add_f64 v[10:11], v[10:11], -v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[12:13], v[14:15], s[6:7], -v[16:17]
	v_fma_f64 v[12:13], v[14:15], s[84:85], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[12:13], v[10:11], s[6:7], v[12:13]
	v_add_f64 v[10:11], v[16:17], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[14:15], v[10:11], -v[16:17]
	v_add_f64 v[18:19], v[12:13], -v[14:15]
	s_branch .LBB9_69
.LBB9_68:                               ;   in Loop: Header=BB9_4 Depth=3
	s_mov_b32 s0, -1
                                        ; implicit-def: $vgpr125
                                        ; implicit-def: $vgpr10_vgpr11
                                        ; implicit-def: $vgpr18_vgpr19
.LBB9_69:                               ; %Flow436
                                        ;   in Loop: Header=BB9_4 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB9_71
; %bb.70:                               ;   in Loop: Header=BB9_4 Depth=3
	v_mul_f64 v[10:11], |v[8:9]|, s[54:55]
	s_mov_b32 s82, s56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[12:13], v[10:11]
	v_fma_f64 v[10:11], v[12:13], s[52:53], |v[8:9]|
	v_mul_f64 v[14:15], v[12:13], s[56:57]
	v_cvt_i32_f64_e32 v125, v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[18:19], v[12:13], s[56:57], v[10:11]
	v_add_f64 v[16:17], v[10:11], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[10:11], v[10:11], -v[16:17]
	v_add_f64 v[16:17], v[16:17], -v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[10:11], v[14:15]
	v_fma_f64 v[14:15], v[12:13], s[82:83], v[14:15]
	v_add_f64 v[10:11], v[16:17], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[10:11], v[10:11], -v[14:15]
	v_fma_f64 v[14:15], v[12:13], s[58:59], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[10:11], v[18:19], v[14:15]
	v_add_f64 v[16:17], v[10:11], -v[18:19]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[18:19], v[14:15], -v[16:17]
.LBB9_71:                               ; %_ZL3cosd.exit305
                                        ;   in Loop: Header=BB9_4 Depth=3
	global_load_b64 v[12:13], v124, s[42:43]
	s_waitcnt vmcnt(0)
	v_add_f64 v[12:13], s[38:39], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cmp_ngt_f64_e64 s0, 0x41d00000, |v[12:13]|
	v_readfirstlane_b32 s42, v12
	v_readfirstlane_b32 s43, v13
	v_ldexp_f64 v[44:45], |s[42:43]|, 0xffffff80
	v_trig_preop_f64 v[42:43], |s[42:43]|, 0
	v_trig_preop_f64 v[36:37], |s[42:43]|, 1
	v_trig_preop_f64 v[30:31], |s[42:43]|, 2
	s_and_b32 s1, exec_lo, s0
	v_cmp_le_f64_e64 s0, 0x7b000000, |s[42:43]|
	s_mov_b32 vcc_lo, s1
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v32, s42, v44, s0
	s_cbranch_vccz .LBB9_73
; %bb.72:                               ;   in Loop: Header=BB9_4 Depth=3
	s_and_b32 s4, s43, 0x7fffffff
	s_mov_b32 s6, s52
	v_cndmask_b32_e64 v33, s4, v45, s0
	s_mov_b32 s85, s83
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[12:13], v[42:43], v[32:33]
	v_mul_f64 v[14:15], v[36:37], v[32:33]
	v_fma_f64 v[16:17], v[42:43], v[32:33], -v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[20:21], v[14:15], v[16:17]
	v_add_f64 v[22:23], v[12:13], v[20:21]
	v_add_f64 v[24:25], v[20:21], -v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[12:13], v[22:23], -v[12:13]
	v_add_f64 v[16:17], v[16:17], -v[24:25]
	v_add_f64 v[24:25], v[20:21], -v[24:25]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[12:13], v[20:21], -v[12:13]
	v_ldexp_f64 v[20:21], v[22:23], -2
	v_fract_f64_e32 v[22:23], v[20:21]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[20:21]|
	v_add_f64 v[20:21], v[14:15], -v[24:25]
	v_fma_f64 v[14:15], v[36:37], v[32:33], -v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_f64 v[16:17], v[16:17], v[20:21]
	v_dual_cndmask_b32 v21, 0, v23 :: v_dual_cndmask_b32 v20, 0, v22
	v_mul_f64 v[22:23], v[30:31], v[32:33]
	v_ldexp_f64 v[20:21], v[20:21], 2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[24:25], v[22:23], v[14:15]
	v_add_f64 v[26:27], v[24:25], -v[22:23]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[14:15], v[14:15], -v[26:27]
	v_add_f64 v[26:27], v[24:25], -v[26:27]
	v_add_f64 v[26:27], v[22:23], -v[26:27]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[14:15], v[14:15], v[26:27]
	v_add_f64 v[26:27], v[24:25], v[16:17]
	v_add_f64 v[28:29], v[26:27], -v[24:25]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[16:17], v[16:17], -v[28:29]
	v_add_f64 v[28:29], v[26:27], -v[28:29]
	v_add_f64 v[24:25], v[24:25], -v[28:29]
	v_add_f64 v[28:29], v[12:13], v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[16:17], v[16:17], v[24:25]
	v_add_f64 v[34:35], v[28:29], v[20:21]
	v_add_f64 v[12:13], v[28:29], -v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[14:15], v[14:15], v[16:17]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[34:35]
	v_fma_f64 v[16:17], v[30:31], v[32:33], -v[22:23]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_f64 v[12:13], v[26:27], -v[12:13]
	s_and_b32 s4, vcc_lo, exec_lo
	s_cselect_b32 s51, 0x40100000, 0
	v_add_f64 v[14:15], v[16:17], v[14:15]
	v_add_f64 v[20:21], v[20:21], s[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[12:13], v[12:13], v[14:15]
	v_add_f64 v[16:17], v[28:29], v[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_i32_f64_e32 v22, v[16:17]
	v_cvt_f64_i32_e32 v[16:17], v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[16:17], v[20:21], -v[16:17]
	v_add_f64 v[14:15], v[28:29], v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[16:17], v[14:15], -v[16:17]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[14:15]
	v_add_f64 v[16:17], v[28:29], -v[16:17]
	s_and_b32 s4, vcc_lo, exec_lo
	s_cselect_b32 s51, 0x3ff00000, 0
	v_add_co_ci_u32_e64 v126, s4, 0, v22, vcc_lo
	v_add_f64 v[14:15], v[14:15], -s[50:51]
	s_mov_b32 s4, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[12:13], v[12:13], v[16:17]
	v_add_f64 v[16:17], v[14:15], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[14:15], v[16:17], -v[14:15]
	v_mul_f64 v[20:21], v[16:17], s[6:7]
	v_add_f64 v[12:13], v[12:13], -v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[14:15], v[16:17], s[6:7], -v[20:21]
	v_fma_f64 v[14:15], v[16:17], s[84:85], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[12:13], v[12:13], s[6:7], v[14:15]
	v_add_f64 v[14:15], v[20:21], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[16:17], v[14:15], -v[20:21]
	v_add_f64 v[22:23], v[12:13], -v[16:17]
	s_branch .LBB9_74
.LBB9_73:                               ;   in Loop: Header=BB9_4 Depth=3
	s_mov_b32 s4, -1
                                        ; implicit-def: $vgpr126
                                        ; implicit-def: $vgpr14_vgpr15
                                        ; implicit-def: $vgpr22_vgpr23
.LBB9_74:                               ; %Flow435
                                        ;   in Loop: Header=BB9_4 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s4
	s_cbranch_vccnz .LBB9_76
; %bb.75:                               ;   in Loop: Header=BB9_4 Depth=3
	v_mul_f64 v[12:13], |s[42:43]|, s[54:55]
	s_mov_b32 s82, s56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[12:13], v[12:13]
	v_fma_f64 v[14:15], v[12:13], s[52:53], |s[42:43]|
	v_mul_f64 v[16:17], v[12:13], s[56:57]
	v_cvt_i32_f64_e32 v126, v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[22:23], v[12:13], s[56:57], v[14:15]
	v_add_f64 v[20:21], v[14:15], v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[14:15], v[14:15], -v[20:21]
	v_add_f64 v[20:21], v[20:21], -v[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[14:15], v[14:15], v[16:17]
	v_fma_f64 v[16:17], v[12:13], s[82:83], v[16:17]
	v_add_f64 v[14:15], v[20:21], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[14:15], v[14:15], -v[16:17]
	v_fma_f64 v[16:17], v[12:13], s[58:59], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[14:15], v[22:23], v[16:17]
	v_add_f64 v[20:21], v[14:15], -v[22:23]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[22:23], v[16:17], -v[20:21]
.LBB9_76:                               ; %_ZL3sind.exit310
                                        ;   in Loop: Header=BB9_4 Depth=3
	s_clause 0x1
	global_load_b64 v[16:17], v124, s[100:101]
	global_load_b64 v[12:13], v124, s[98:99]
	s_waitcnt vmcnt(1)
	v_add_f64 v[16:17], s[22:23], v[16:17]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ngt_f64_e64 s5, 0x41d00000, |v[16:17]|
	v_trig_preop_f64 v[66:67], |v[16:17]|, 0
	v_trig_preop_f64 v[58:59], |v[16:17]|, 1
	v_cmp_le_f64_e64 s4, 0x7b000000, |v[16:17]|
	v_ldexp_f64 v[68:69], |v[16:17]|, 0xffffff80
	v_trig_preop_f64 v[60:61], |v[16:17]|, 2
	v_and_b32_e32 v44, 0x7fffffff, v17
	s_and_b32 s5, exec_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 vcc_lo, s5
	s_cbranch_vccz .LBB9_78
; %bb.77:                               ;   in Loop: Header=BB9_4 Depth=3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v21, v44, v69, s4
	v_cndmask_b32_e64 v20, v16, v68, s4
	s_mov_b32 s85, s83
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[24:25], v[66:67], v[20:21]
	v_mul_f64 v[26:27], v[58:59], v[20:21]
	v_fma_f64 v[28:29], v[66:67], v[20:21], -v[24:25]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[33:34], v[26:27], v[28:29]
	v_add_f64 v[38:39], v[24:25], v[33:34]
	v_add_f64 v[40:41], v[33:34], -v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[24:25], v[38:39], -v[24:25]
	v_add_f64 v[28:29], v[28:29], -v[40:41]
	v_add_f64 v[40:41], v[33:34], -v[40:41]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[24:25], v[33:34], -v[24:25]
	v_ldexp_f64 v[33:34], v[38:39], -2
	v_fract_f64_e32 v[38:39], v[33:34]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[33:34]|
	v_add_f64 v[33:34], v[26:27], -v[40:41]
	v_fma_f64 v[26:27], v[58:59], v[20:21], -v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_f64 v[28:29], v[28:29], v[33:34]
	v_dual_cndmask_b32 v34, 0, v39 :: v_dual_cndmask_b32 v33, 0, v38
	v_mul_f64 v[38:39], v[60:61], v[20:21]
	v_ldexp_f64 v[33:34], v[33:34], 2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[40:41], v[38:39], v[26:27]
	v_fma_f64 v[20:21], v[60:61], v[20:21], -v[38:39]
	v_add_f64 v[48:49], v[40:41], v[28:29]
	v_add_f64 v[46:47], v[40:41], -v[38:39]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[50:51], v[48:49], -v[40:41]
	v_add_f64 v[26:27], v[26:27], -v[46:47]
	v_add_f64 v[46:47], v[40:41], -v[46:47]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[28:29], v[28:29], -v[50:51]
	v_add_f64 v[50:51], v[48:49], -v[50:51]
	v_add_f64 v[46:47], v[38:39], -v[46:47]
	v_add_f64 v[38:39], v[24:25], v[48:49]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[40:41], v[40:41], -v[50:51]
	v_add_f64 v[26:27], v[26:27], v[46:47]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[24:25], v[38:39], -v[24:25]
	v_add_f64 v[28:29], v[28:29], v[40:41]
	v_add_f64 v[40:41], v[38:39], v[33:34]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[24:25], v[48:49], -v[24:25]
	v_add_f64 v[26:27], v[26:27], v[28:29]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e32 vcc_lo, 0, v[40:41]
	v_add_f64 v[20:21], v[20:21], v[26:27]
	s_and_b32 s6, vcc_lo, exec_lo
	s_cselect_b32 s51, 0x40100000, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[26:27], v[33:34], s[50:51]
	v_add_f64 v[20:21], v[24:25], v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[28:29], v[38:39], v[26:27]
	v_cvt_i32_f64_e32 v33, v[28:29]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f64_i32_e32 v[28:29], v33
	v_add_f64 v[26:27], v[26:27], -v[28:29]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[24:25], v[38:39], v[26:27]
	v_add_f64 v[26:27], v[24:25], -v[26:27]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[24:25]
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f64 v[26:27], v[38:39], -v[26:27]
	s_and_b32 s6, vcc_lo, exec_lo
	s_cselect_b32 s51, 0x3ff00000, 0
	v_add_co_ci_u32_e64 v127, s6, 0, v33, vcc_lo
	v_add_f64 v[24:25], v[24:25], -s[50:51]
	s_mov_b32 s6, s52
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[20:21], v[20:21], v[26:27]
	v_add_f64 v[26:27], v[24:25], v[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[24:25], v[26:27], -v[24:25]
	v_mul_f64 v[28:29], v[26:27], s[6:7]
	v_add_f64 v[20:21], v[20:21], -v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[24:25], v[26:27], s[6:7], -v[28:29]
	v_fma_f64 v[24:25], v[26:27], s[84:85], v[24:25]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[24:25], v[20:21], s[6:7], v[24:25]
	s_mov_b32 s6, 0
	v_add_f64 v[20:21], v[28:29], v[24:25]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[26:27], v[20:21], -v[28:29]
	v_add_f64 v[28:29], v[24:25], -v[26:27]
	s_branch .LBB9_79
.LBB9_78:                               ;   in Loop: Header=BB9_4 Depth=3
	s_mov_b32 s6, -1
                                        ; implicit-def: $vgpr127
                                        ; implicit-def: $vgpr20_vgpr21
                                        ; implicit-def: $vgpr28_vgpr29
.LBB9_79:                               ; %Flow434
                                        ;   in Loop: Header=BB9_4 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB9_81
; %bb.80:                               ;   in Loop: Header=BB9_4 Depth=3
	v_mul_f64 v[20:21], |v[16:17]|, s[54:55]
	s_mov_b32 s82, s56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[24:25], v[20:21]
	v_fma_f64 v[20:21], v[24:25], s[52:53], |v[16:17]|
	v_mul_f64 v[26:27], v[24:25], s[56:57]
	v_cvt_i32_f64_e32 v127, v[24:25]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[33:34], v[24:25], s[56:57], v[20:21]
	v_add_f64 v[28:29], v[20:21], v[26:27]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[20:21], v[20:21], -v[28:29]
	v_add_f64 v[28:29], v[28:29], -v[33:34]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[20:21], v[20:21], v[26:27]
	v_fma_f64 v[26:27], v[24:25], s[82:83], v[26:27]
	v_add_f64 v[20:21], v[28:29], v[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[20:21], v[20:21], -v[26:27]
	v_fma_f64 v[26:27], v[24:25], s[58:59], v[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[20:21], v[33:34], v[26:27]
	v_add_f64 v[28:29], v[20:21], -v[33:34]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[28:29], v[26:27], -v[28:29]
.LBB9_81:                               ; %_ZL3sind.exit315
                                        ;   in Loop: Header=BB9_4 Depth=3
	s_mov_b32 vcc_lo, s3
	s_cbranch_vccz .LBB9_83
; %bb.82:                               ;   in Loop: Header=BB9_4 Depth=3
	v_cndmask_b32_e64 v25, v74, v65, s2
	v_cndmask_b32_e64 v24, v8, v64, s2
	s_mov_b32 s85, s83
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[26:27], v[62:63], v[24:25]
	v_mul_f64 v[33:34], v[54:55], v[24:25]
	v_fma_f64 v[38:39], v[62:63], v[24:25], -v[26:27]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[40:41], v[33:34], v[38:39]
	v_add_f64 v[46:47], v[26:27], v[40:41]
	v_add_f64 v[48:49], v[40:41], -v[33:34]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[26:27], v[46:47], -v[26:27]
	v_add_f64 v[38:39], v[38:39], -v[48:49]
	v_add_f64 v[48:49], v[40:41], -v[48:49]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[26:27], v[40:41], -v[26:27]
	v_ldexp_f64 v[40:41], v[46:47], -2
	v_fract_f64_e32 v[46:47], v[40:41]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[40:41]|
	v_add_f64 v[40:41], v[33:34], -v[48:49]
	v_fma_f64 v[33:34], v[54:55], v[24:25], -v[33:34]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_f64 v[38:39], v[38:39], v[40:41]
	v_dual_cndmask_b32 v41, 0, v47 :: v_dual_cndmask_b32 v40, 0, v46
	v_mul_f64 v[46:47], v[56:57], v[24:25]
	v_ldexp_f64 v[40:41], v[40:41], 2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[48:49], v[46:47], v[33:34]
	v_fma_f64 v[24:25], v[56:57], v[24:25], -v[46:47]
	v_add_f64 v[52:53], v[48:49], v[38:39]
	v_add_f64 v[50:51], v[48:49], -v[46:47]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[70:71], v[52:53], -v[48:49]
	v_add_f64 v[33:34], v[33:34], -v[50:51]
	v_add_f64 v[50:51], v[48:49], -v[50:51]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[38:39], v[38:39], -v[70:71]
	v_add_f64 v[70:71], v[52:53], -v[70:71]
	v_add_f64 v[50:51], v[46:47], -v[50:51]
	v_add_f64 v[46:47], v[26:27], v[52:53]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[48:49], v[48:49], -v[70:71]
	v_add_f64 v[33:34], v[33:34], v[50:51]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[26:27], v[46:47], -v[26:27]
	v_add_f64 v[38:39], v[38:39], v[48:49]
	v_add_f64 v[48:49], v[46:47], v[40:41]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[26:27], v[52:53], -v[26:27]
	v_add_f64 v[33:34], v[33:34], v[38:39]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e32 vcc_lo, 0, v[48:49]
	v_add_f64 v[24:25], v[24:25], v[33:34]
	s_and_b32 s6, vcc_lo, exec_lo
	s_cselect_b32 s51, 0x40100000, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[33:34], v[40:41], s[50:51]
	v_add_f64 v[24:25], v[26:27], v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[38:39], v[46:47], v[33:34]
	v_cvt_i32_f64_e32 v35, v[38:39]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f64_i32_e32 v[38:39], v35
	v_add_f64 v[33:34], v[33:34], -v[38:39]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[26:27], v[46:47], v[33:34]
	v_add_f64 v[33:34], v[26:27], -v[33:34]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[26:27]
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f64 v[33:34], v[46:47], -v[33:34]
	s_and_b32 s6, vcc_lo, exec_lo
	s_cselect_b32 s51, 0x3ff00000, 0
	v_add_co_ci_u32_e64 v128, s6, 0, v35, vcc_lo
	v_add_f64 v[26:27], v[26:27], -s[50:51]
	s_mov_b32 s6, s52
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[24:25], v[24:25], v[33:34]
	v_add_f64 v[33:34], v[26:27], v[24:25]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[26:27], v[33:34], -v[26:27]
	v_mul_f64 v[38:39], v[33:34], s[6:7]
	v_add_f64 v[24:25], v[24:25], -v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[26:27], v[33:34], s[6:7], -v[38:39]
	v_fma_f64 v[26:27], v[33:34], s[84:85], v[26:27]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[26:27], v[24:25], s[6:7], v[26:27]
	s_mov_b32 s6, 0
	v_add_f64 v[24:25], v[38:39], v[26:27]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[33:34], v[24:25], -v[38:39]
	v_add_f64 v[38:39], v[26:27], -v[33:34]
	s_branch .LBB9_84
.LBB9_83:                               ;   in Loop: Header=BB9_4 Depth=3
	s_mov_b32 s6, -1
                                        ; implicit-def: $vgpr128
                                        ; implicit-def: $vgpr24_vgpr25
                                        ; implicit-def: $vgpr38_vgpr39
.LBB9_84:                               ; %Flow433
                                        ;   in Loop: Header=BB9_4 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB9_86
; %bb.85:                               ;   in Loop: Header=BB9_4 Depth=3
	v_mul_f64 v[24:25], |v[8:9]|, s[54:55]
	s_mov_b32 s82, s56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[26:27], v[24:25]
	v_fma_f64 v[24:25], v[26:27], s[52:53], |v[8:9]|
	v_mul_f64 v[33:34], v[26:27], s[56:57]
	v_cvt_i32_f64_e32 v128, v[26:27]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[40:41], v[26:27], s[56:57], v[24:25]
	v_add_f64 v[38:39], v[24:25], v[33:34]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[24:25], v[24:25], -v[38:39]
	v_add_f64 v[38:39], v[38:39], -v[40:41]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[24:25], v[24:25], v[33:34]
	v_fma_f64 v[33:34], v[26:27], s[82:83], v[33:34]
	v_add_f64 v[24:25], v[38:39], v[24:25]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[24:25], v[24:25], -v[33:34]
	v_fma_f64 v[33:34], v[26:27], s[58:59], v[24:25]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[24:25], v[40:41], v[33:34]
	v_add_f64 v[38:39], v[24:25], -v[40:41]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[38:39], v[33:34], -v[38:39]
.LBB9_86:                               ; %_ZL3sind.exit320
                                        ;   in Loop: Header=BB9_4 Depth=3
	s_mov_b32 vcc_lo, s1
	s_cbranch_vccz .LBB9_88
; %bb.87:                               ;   in Loop: Header=BB9_4 Depth=3
	s_and_b32 s6, s43, 0x7fffffff
	s_mov_b32 s85, s83
	v_cndmask_b32_e64 v33, s6, v45, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[26:27], v[42:43], v[32:33]
	v_mul_f64 v[34:35], v[36:37], v[32:33]
	v_fma_f64 v[40:41], v[42:43], v[32:33], -v[26:27]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[46:47], v[34:35], v[40:41]
	v_add_f64 v[48:49], v[26:27], v[46:47]
	v_add_f64 v[50:51], v[46:47], -v[34:35]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[26:27], v[48:49], -v[26:27]
	v_add_f64 v[40:41], v[40:41], -v[50:51]
	v_add_f64 v[50:51], v[46:47], -v[50:51]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[26:27], v[46:47], -v[26:27]
	v_ldexp_f64 v[46:47], v[48:49], -2
	v_fract_f64_e32 v[48:49], v[46:47]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[46:47]|
	v_add_f64 v[46:47], v[34:35], -v[50:51]
	v_fma_f64 v[34:35], v[36:37], v[32:33], -v[34:35]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_f64 v[40:41], v[40:41], v[46:47]
	v_dual_cndmask_b32 v47, 0, v49 :: v_dual_cndmask_b32 v46, 0, v48
	v_mul_f64 v[48:49], v[30:31], v[32:33]
	v_ldexp_f64 v[46:47], v[46:47], 2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[50:51], v[48:49], v[34:35]
	v_add_f64 v[52:53], v[50:51], -v[48:49]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[34:35], v[34:35], -v[52:53]
	v_add_f64 v[52:53], v[50:51], -v[52:53]
	v_add_f64 v[52:53], v[48:49], -v[52:53]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[34:35], v[34:35], v[52:53]
	v_add_f64 v[52:53], v[50:51], v[40:41]
	v_add_f64 v[70:71], v[52:53], -v[50:51]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[40:41], v[40:41], -v[70:71]
	v_add_f64 v[70:71], v[52:53], -v[70:71]
	v_add_f64 v[50:51], v[50:51], -v[70:71]
	v_add_f64 v[70:71], v[26:27], v[52:53]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[40:41], v[40:41], v[50:51]
	v_add_f64 v[72:73], v[70:71], v[46:47]
	v_add_f64 v[26:27], v[70:71], -v[26:27]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[34:35], v[34:35], v[40:41]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[72:73]
	v_fma_f64 v[40:41], v[30:31], v[32:33], -v[48:49]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_f64 v[26:27], v[52:53], -v[26:27]
	s_and_b32 s6, vcc_lo, exec_lo
	s_cselect_b32 s51, 0x40100000, 0
	v_add_f64 v[33:34], v[40:41], v[34:35]
	v_add_f64 v[46:47], v[46:47], s[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[26:27], v[26:27], v[33:34]
	v_add_f64 v[40:41], v[70:71], v[46:47]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_i32_f64_e32 v35, v[40:41]
	v_cvt_f64_i32_e32 v[40:41], v35
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[40:41], v[46:47], -v[40:41]
	v_add_f64 v[33:34], v[70:71], v[40:41]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[40:41], v[33:34], -v[40:41]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[33:34]
	v_add_f64 v[40:41], v[70:71], -v[40:41]
	s_and_b32 s6, vcc_lo, exec_lo
	s_cselect_b32 s51, 0x3ff00000, 0
	v_add_co_ci_u32_e64 v129, s6, 0, v35, vcc_lo
	v_add_f64 v[33:34], v[33:34], -s[50:51]
	s_mov_b32 s6, s52
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[26:27], v[26:27], v[40:41]
	v_add_f64 v[40:41], v[33:34], v[26:27]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[33:34], v[40:41], -v[33:34]
	v_mul_f64 v[46:47], v[40:41], s[6:7]
	v_add_f64 v[26:27], v[26:27], -v[33:34]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[33:34], v[40:41], s[6:7], -v[46:47]
	v_fma_f64 v[33:34], v[40:41], s[84:85], v[33:34]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[33:34], v[26:27], s[6:7], v[33:34]
	s_mov_b32 s6, 0
	v_add_f64 v[26:27], v[46:47], v[33:34]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[40:41], v[26:27], -v[46:47]
	v_add_f64 v[46:47], v[33:34], -v[40:41]
	s_branch .LBB9_89
.LBB9_88:                               ;   in Loop: Header=BB9_4 Depth=3
	s_mov_b32 s6, -1
                                        ; implicit-def: $vgpr129
                                        ; implicit-def: $vgpr26_vgpr27
                                        ; implicit-def: $vgpr46_vgpr47
.LBB9_89:                               ; %Flow432
                                        ;   in Loop: Header=BB9_4 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB9_91
; %bb.90:                               ;   in Loop: Header=BB9_4 Depth=3
	v_mul_f64 v[26:27], |s[42:43]|, s[54:55]
	s_mov_b32 s82, s56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[33:34], v[26:27]
	v_fma_f64 v[26:27], v[33:34], s[52:53], |s[42:43]|
	v_mul_f64 v[40:41], v[33:34], s[56:57]
	v_cvt_i32_f64_e32 v129, v[33:34]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[48:49], v[33:34], s[56:57], v[26:27]
	v_add_f64 v[46:47], v[26:27], v[40:41]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[26:27], v[26:27], -v[46:47]
	v_add_f64 v[46:47], v[46:47], -v[48:49]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[26:27], v[26:27], v[40:41]
	v_fma_f64 v[40:41], v[33:34], s[82:83], v[40:41]
	v_add_f64 v[26:27], v[46:47], v[26:27]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[26:27], v[26:27], -v[40:41]
	v_fma_f64 v[40:41], v[33:34], s[58:59], v[26:27]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[26:27], v[48:49], v[40:41]
	v_add_f64 v[46:47], v[26:27], -v[48:49]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[46:47], v[40:41], -v[46:47]
.LBB9_91:                               ; %_ZL3sind.exit325
                                        ;   in Loop: Header=BB9_4 Depth=3
	s_mov_b32 vcc_lo, s5
	s_cbranch_vccz .LBB9_93
; %bb.92:                               ;   in Loop: Header=BB9_4 Depth=3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v34, v44, v69, s4
	v_cndmask_b32_e64 v33, v16, v68, s4
	s_mov_b32 s85, s83
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[40:41], v[66:67], v[33:34]
	v_mul_f64 v[48:49], v[58:59], v[33:34]
	v_fma_f64 v[50:51], v[66:67], v[33:34], -v[40:41]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[52:53], v[48:49], v[50:51]
	v_add_f64 v[70:71], v[40:41], v[52:53]
	v_add_f64 v[72:73], v[52:53], -v[48:49]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[40:41], v[70:71], -v[40:41]
	v_add_f64 v[50:51], v[50:51], -v[72:73]
	v_add_f64 v[72:73], v[52:53], -v[72:73]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[40:41], v[52:53], -v[40:41]
	v_ldexp_f64 v[52:53], v[70:71], -2
	v_fract_f64_e32 v[70:71], v[52:53]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[52:53]|
	v_add_f64 v[52:53], v[48:49], -v[72:73]
	v_fma_f64 v[48:49], v[58:59], v[33:34], -v[48:49]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_f64 v[50:51], v[50:51], v[52:53]
	v_dual_cndmask_b32 v53, 0, v71 :: v_dual_cndmask_b32 v52, 0, v70
	v_mul_f64 v[70:71], v[60:61], v[33:34]
	v_ldexp_f64 v[52:53], v[52:53], 2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[72:73], v[70:71], v[48:49]
	v_fma_f64 v[33:34], v[60:61], v[33:34], -v[70:71]
	v_add_f64 v[77:78], v[72:73], v[50:51]
	v_add_f64 v[75:76], v[72:73], -v[70:71]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[79:80], v[77:78], -v[72:73]
	v_add_f64 v[48:49], v[48:49], -v[75:76]
	v_add_f64 v[75:76], v[72:73], -v[75:76]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[50:51], v[50:51], -v[79:80]
	v_add_f64 v[79:80], v[77:78], -v[79:80]
	v_add_f64 v[75:76], v[70:71], -v[75:76]
	v_add_f64 v[70:71], v[40:41], v[77:78]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[72:73], v[72:73], -v[79:80]
	v_add_f64 v[48:49], v[48:49], v[75:76]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[40:41], v[70:71], -v[40:41]
	v_add_f64 v[50:51], v[50:51], v[72:73]
	v_add_f64 v[72:73], v[70:71], v[52:53]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[40:41], v[77:78], -v[40:41]
	v_add_f64 v[48:49], v[48:49], v[50:51]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e32 vcc_lo, 0, v[72:73]
	v_add_f64 v[33:34], v[33:34], v[48:49]
	s_and_b32 s6, vcc_lo, exec_lo
	s_cselect_b32 s51, 0x40100000, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[48:49], v[52:53], s[50:51]
	v_add_f64 v[33:34], v[40:41], v[33:34]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[50:51], v[70:71], v[48:49]
	v_cvt_i32_f64_e32 v35, v[50:51]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f64_i32_e32 v[50:51], v35
	v_add_f64 v[48:49], v[48:49], -v[50:51]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[40:41], v[70:71], v[48:49]
	v_add_f64 v[48:49], v[40:41], -v[48:49]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[40:41]
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f64 v[48:49], v[70:71], -v[48:49]
	s_and_b32 s6, vcc_lo, exec_lo
	s_cselect_b32 s51, 0x3ff00000, 0
	v_add_co_ci_u32_e64 v130, s6, 0, v35, vcc_lo
	v_add_f64 v[40:41], v[40:41], -s[50:51]
	s_mov_b32 s6, s52
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[33:34], v[33:34], v[48:49]
	v_add_f64 v[48:49], v[40:41], v[33:34]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[40:41], v[48:49], -v[40:41]
	v_mul_f64 v[50:51], v[48:49], s[6:7]
	v_add_f64 v[33:34], v[33:34], -v[40:41]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[40:41], v[48:49], s[6:7], -v[50:51]
	v_fma_f64 v[40:41], v[48:49], s[84:85], v[40:41]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[40:41], v[33:34], s[6:7], v[40:41]
	s_mov_b32 s6, 0
	v_add_f64 v[34:35], v[50:51], v[40:41]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[48:49], v[34:35], -v[50:51]
	v_add_f64 v[70:71], v[40:41], -v[48:49]
	s_branch .LBB9_94
.LBB9_93:                               ;   in Loop: Header=BB9_4 Depth=3
	s_mov_b32 s6, -1
                                        ; implicit-def: $vgpr130
                                        ; implicit-def: $vgpr34_vgpr35
                                        ; implicit-def: $vgpr70_vgpr71
.LBB9_94:                               ; %Flow431
                                        ;   in Loop: Header=BB9_4 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB9_96
; %bb.95:                               ;   in Loop: Header=BB9_4 Depth=3
	v_mul_f64 v[33:34], |v[16:17]|, s[54:55]
	s_mov_b32 s82, s56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[40:41], v[33:34]
	v_fma_f64 v[33:34], v[40:41], s[52:53], |v[16:17]|
	v_mul_f64 v[48:49], v[40:41], s[56:57]
	v_cvt_i32_f64_e32 v130, v[40:41]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[52:53], v[40:41], s[56:57], v[33:34]
	v_add_f64 v[50:51], v[33:34], v[48:49]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[33:34], v[33:34], -v[50:51]
	v_add_f64 v[50:51], v[50:51], -v[52:53]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[33:34], v[33:34], v[48:49]
	v_fma_f64 v[48:49], v[40:41], s[82:83], v[48:49]
	v_add_f64 v[33:34], v[50:51], v[33:34]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[33:34], v[33:34], -v[48:49]
	v_fma_f64 v[48:49], v[40:41], s[58:59], v[33:34]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[34:35], v[52:53], v[48:49]
	v_add_f64 v[50:51], v[34:35], -v[52:53]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[70:71], v[48:49], -v[50:51]
.LBB9_96:                               ; %_ZL3cosd.exit330
                                        ;   in Loop: Header=BB9_4 Depth=3
	s_mov_b32 vcc_lo, s1
	s_cbranch_vccz .LBB9_98
; %bb.97:                               ;   in Loop: Header=BB9_4 Depth=3
	s_and_b32 s6, s43, 0x7fffffff
	s_mov_b32 s85, s83
	v_cndmask_b32_e64 v33, s6, v45, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[40:41], v[42:43], v[32:33]
	v_mul_f64 v[48:49], v[36:37], v[32:33]
	v_fma_f64 v[50:51], v[42:43], v[32:33], -v[40:41]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[52:53], v[48:49], v[50:51]
	v_add_f64 v[72:73], v[40:41], v[52:53]
	v_add_f64 v[75:76], v[52:53], -v[48:49]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[40:41], v[72:73], -v[40:41]
	v_add_f64 v[50:51], v[50:51], -v[75:76]
	v_add_f64 v[75:76], v[52:53], -v[75:76]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[40:41], v[52:53], -v[40:41]
	v_ldexp_f64 v[52:53], v[72:73], -2
	v_fract_f64_e32 v[72:73], v[52:53]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[52:53]|
	v_add_f64 v[52:53], v[48:49], -v[75:76]
	v_fma_f64 v[48:49], v[36:37], v[32:33], -v[48:49]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_f64 v[50:51], v[50:51], v[52:53]
	v_dual_cndmask_b32 v53, 0, v73 :: v_dual_cndmask_b32 v52, 0, v72
	v_mul_f64 v[72:73], v[30:31], v[32:33]
	v_ldexp_f64 v[52:53], v[52:53], 2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[75:76], v[72:73], v[48:49]
	v_add_f64 v[77:78], v[75:76], -v[72:73]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[48:49], v[48:49], -v[77:78]
	v_add_f64 v[77:78], v[75:76], -v[77:78]
	v_add_f64 v[77:78], v[72:73], -v[77:78]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[48:49], v[48:49], v[77:78]
	v_add_f64 v[77:78], v[75:76], v[50:51]
	v_add_f64 v[79:80], v[77:78], -v[75:76]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[50:51], v[50:51], -v[79:80]
	v_add_f64 v[79:80], v[77:78], -v[79:80]
	v_add_f64 v[75:76], v[75:76], -v[79:80]
	v_add_f64 v[79:80], v[40:41], v[77:78]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[50:51], v[50:51], v[75:76]
	v_add_f64 v[81:82], v[79:80], v[52:53]
	v_add_f64 v[40:41], v[79:80], -v[40:41]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[48:49], v[48:49], v[50:51]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[81:82]
	v_fma_f64 v[50:51], v[30:31], v[32:33], -v[72:73]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_f64 v[40:41], v[77:78], -v[40:41]
	s_and_b32 s6, vcc_lo, exec_lo
	s_cselect_b32 s51, 0x40100000, 0
	v_add_f64 v[48:49], v[50:51], v[48:49]
	v_add_f64 v[52:53], v[52:53], s[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[40:41], v[40:41], v[48:49]
	v_add_f64 v[50:51], v[79:80], v[52:53]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_i32_f64_e32 v33, v[50:51]
	v_cvt_f64_i32_e32 v[50:51], v33
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[50:51], v[52:53], -v[50:51]
	v_add_f64 v[48:49], v[79:80], v[50:51]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[50:51], v[48:49], -v[50:51]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[48:49]
	v_add_f64 v[50:51], v[79:80], -v[50:51]
	s_and_b32 s6, vcc_lo, exec_lo
	s_cselect_b32 s51, 0x3ff00000, 0
	v_add_co_ci_u32_e64 v131, s6, 0, v33, vcc_lo
	v_add_f64 v[48:49], v[48:49], -s[50:51]
	s_mov_b32 s6, s52
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[40:41], v[40:41], v[50:51]
	v_add_f64 v[50:51], v[48:49], v[40:41]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[48:49], v[50:51], -v[48:49]
	v_mul_f64 v[52:53], v[50:51], s[6:7]
	v_add_f64 v[40:41], v[40:41], -v[48:49]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[48:49], v[50:51], s[6:7], -v[52:53]
	v_fma_f64 v[48:49], v[50:51], s[84:85], v[48:49]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[40:41], v[40:41], s[6:7], v[48:49]
	s_mov_b32 s6, 0
	v_add_f64 v[48:49], v[52:53], v[40:41]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[50:51], v[48:49], -v[52:53]
	v_add_f64 v[52:53], v[40:41], -v[50:51]
	s_branch .LBB9_99
.LBB9_98:                               ;   in Loop: Header=BB9_4 Depth=3
	s_mov_b32 s6, -1
                                        ; implicit-def: $vgpr131
                                        ; implicit-def: $vgpr48_vgpr49
                                        ; implicit-def: $vgpr52_vgpr53
.LBB9_99:                               ; %Flow430
                                        ;   in Loop: Header=BB9_4 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB9_101
; %bb.100:                              ;   in Loop: Header=BB9_4 Depth=3
	v_mul_f64 v[40:41], |s[42:43]|, s[54:55]
	s_mov_b32 s82, s56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[40:41], v[40:41]
	v_fma_f64 v[48:49], v[40:41], s[52:53], |s[42:43]|
	v_mul_f64 v[50:51], v[40:41], s[56:57]
	v_cvt_i32_f64_e32 v131, v[40:41]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[72:73], v[40:41], s[56:57], v[48:49]
	v_add_f64 v[52:53], v[48:49], v[50:51]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[48:49], v[48:49], -v[52:53]
	v_add_f64 v[52:53], v[52:53], -v[72:73]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[48:49], v[48:49], v[50:51]
	v_fma_f64 v[50:51], v[40:41], s[82:83], v[50:51]
	v_add_f64 v[48:49], v[52:53], v[48:49]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[48:49], v[48:49], -v[50:51]
	v_fma_f64 v[50:51], v[40:41], s[58:59], v[48:49]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[48:49], v[72:73], v[50:51]
	v_add_f64 v[52:53], v[48:49], -v[72:73]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[52:53], v[50:51], -v[52:53]
.LBB9_101:                              ; %_ZL3cosd.exit335
                                        ;   in Loop: Header=BB9_4 Depth=3
	global_load_b64 v[40:41], v124, s[102:103]
	s_mov_b32 vcc_lo, s5
	s_cbranch_vccz .LBB9_103
; %bb.102:                              ;   in Loop: Header=BB9_4 Depth=3
	v_cndmask_b32_e64 v51, v44, v69, s4
	v_cndmask_b32_e64 v50, v16, v68, s4
	s_mov_b32 s85, s83
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[72:73], v[66:67], v[50:51]
	v_mul_f64 v[75:76], v[58:59], v[50:51]
	v_fma_f64 v[77:78], v[66:67], v[50:51], -v[72:73]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[79:80], v[75:76], v[77:78]
	v_add_f64 v[81:82], v[72:73], v[79:80]
	v_add_f64 v[83:84], v[79:80], -v[75:76]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[72:73], v[81:82], -v[72:73]
	v_add_f64 v[77:78], v[77:78], -v[83:84]
	v_add_f64 v[83:84], v[79:80], -v[83:84]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[72:73], v[79:80], -v[72:73]
	v_ldexp_f64 v[79:80], v[81:82], -2
	v_fract_f64_e32 v[81:82], v[79:80]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[79:80]|
	v_add_f64 v[79:80], v[75:76], -v[83:84]
	v_fma_f64 v[75:76], v[58:59], v[50:51], -v[75:76]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_f64 v[77:78], v[77:78], v[79:80]
	v_dual_cndmask_b32 v80, 0, v82 :: v_dual_cndmask_b32 v79, 0, v81
	v_mul_f64 v[81:82], v[60:61], v[50:51]
	v_ldexp_f64 v[79:80], v[79:80], 2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[83:84], v[81:82], v[75:76]
	v_fma_f64 v[50:51], v[60:61], v[50:51], -v[81:82]
	v_add_f64 v[87:88], v[83:84], v[77:78]
	v_add_f64 v[85:86], v[83:84], -v[81:82]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[89:90], v[87:88], -v[83:84]
	v_add_f64 v[75:76], v[75:76], -v[85:86]
	v_add_f64 v[85:86], v[83:84], -v[85:86]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[77:78], v[77:78], -v[89:90]
	v_add_f64 v[89:90], v[87:88], -v[89:90]
	v_add_f64 v[85:86], v[81:82], -v[85:86]
	v_add_f64 v[81:82], v[72:73], v[87:88]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[83:84], v[83:84], -v[89:90]
	v_add_f64 v[75:76], v[75:76], v[85:86]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[72:73], v[81:82], -v[72:73]
	v_add_f64 v[77:78], v[77:78], v[83:84]
	v_add_f64 v[83:84], v[81:82], v[79:80]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[72:73], v[87:88], -v[72:73]
	v_add_f64 v[75:76], v[75:76], v[77:78]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e32 vcc_lo, 0, v[83:84]
	v_add_f64 v[50:51], v[50:51], v[75:76]
	s_and_b32 s6, vcc_lo, exec_lo
	s_cselect_b32 s51, 0x40100000, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[75:76], v[79:80], s[50:51]
	v_add_f64 v[50:51], v[72:73], v[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[77:78], v[81:82], v[75:76]
	v_cvt_i32_f64_e32 v33, v[77:78]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f64_i32_e32 v[77:78], v33
	v_add_f64 v[75:76], v[75:76], -v[77:78]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[72:73], v[81:82], v[75:76]
	v_add_f64 v[75:76], v[72:73], -v[75:76]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[72:73]
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f64 v[75:76], v[81:82], -v[75:76]
	s_and_b32 s6, vcc_lo, exec_lo
	s_cselect_b32 s51, 0x3ff00000, 0
	v_add_co_ci_u32_e64 v132, s6, 0, v33, vcc_lo
	v_add_f64 v[72:73], v[72:73], -s[50:51]
	s_mov_b32 s6, s52
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[50:51], v[50:51], v[75:76]
	v_add_f64 v[75:76], v[72:73], v[50:51]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[72:73], v[75:76], -v[72:73]
	v_mul_f64 v[77:78], v[75:76], s[6:7]
	v_add_f64 v[50:51], v[50:51], -v[72:73]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[72:73], v[75:76], s[6:7], -v[77:78]
	v_fma_f64 v[72:73], v[75:76], s[84:85], v[72:73]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[72:73], v[50:51], s[6:7], v[72:73]
	s_mov_b32 s6, 0
	v_add_f64 v[50:51], v[77:78], v[72:73]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[75:76], v[50:51], -v[77:78]
	v_add_f64 v[72:73], v[72:73], -v[75:76]
	s_branch .LBB9_104
.LBB9_103:                              ;   in Loop: Header=BB9_4 Depth=3
	s_mov_b32 s6, -1
                                        ; implicit-def: $vgpr132
                                        ; implicit-def: $vgpr50_vgpr51
                                        ; implicit-def: $vgpr72_vgpr73
.LBB9_104:                              ; %Flow429
                                        ;   in Loop: Header=BB9_4 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB9_106
; %bb.105:                              ;   in Loop: Header=BB9_4 Depth=3
	v_mul_f64 v[50:51], |v[16:17]|, s[54:55]
	s_mov_b32 s82, s56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[75:76], v[50:51]
	v_fma_f64 v[50:51], v[75:76], s[52:53], |v[16:17]|
	v_mul_f64 v[72:73], v[75:76], s[56:57]
	v_cvt_i32_f64_e32 v132, v[75:76]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[79:80], v[75:76], s[56:57], v[50:51]
	v_add_f64 v[77:78], v[50:51], v[72:73]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[50:51], v[50:51], -v[77:78]
	v_add_f64 v[77:78], v[77:78], -v[79:80]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[50:51], v[50:51], v[72:73]
	v_fma_f64 v[72:73], v[75:76], s[82:83], v[72:73]
	v_add_f64 v[50:51], v[77:78], v[50:51]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[50:51], v[50:51], -v[72:73]
	v_fma_f64 v[72:73], v[75:76], s[58:59], v[50:51]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[50:51], v[79:80], v[72:73]
	v_add_f64 v[77:78], v[50:51], -v[79:80]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[72:73], v[72:73], -v[77:78]
.LBB9_106:                              ; %_ZL3cosd.exit340
                                        ;   in Loop: Header=BB9_4 Depth=3
	s_mov_b32 vcc_lo, s3
	s_cbranch_vccz .LBB9_108
; %bb.107:                              ;   in Loop: Header=BB9_4 Depth=3
	v_cndmask_b32_e64 v65, v74, v65, s2
	v_cndmask_b32_e64 v64, v8, v64, s2
	s_mov_b32 s6, s52
	s_mov_b32 s85, s83
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[74:75], v[62:63], v[64:65]
	v_mul_f64 v[76:77], v[54:55], v[64:65]
	v_mul_f64 v[80:81], v[56:57], v[64:65]
	v_fma_f64 v[62:63], v[62:63], v[64:65], -v[74:75]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[54:55], v[54:55], v[64:65], -v[76:77]
	v_fma_f64 v[56:57], v[56:57], v[64:65], -v[80:81]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[78:79], v[76:77], v[62:63]
	v_add_f64 v[82:83], v[78:79], -v[76:77]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_f64 v[62:63], v[62:63], -v[82:83]
	v_add_f64 v[64:65], v[78:79], -v[82:83]
	v_add_f64 v[82:83], v[74:75], v[78:79]
	v_add_f64 v[64:65], v[76:77], -v[64:65]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[76:77], v[82:83], -2
	v_add_f64 v[74:75], v[82:83], -v[74:75]
	v_add_f64 v[82:83], v[80:81], v[54:55]
	v_add_f64 v[62:63], v[62:63], v[64:65]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fract_f64_e32 v[64:65], v[76:77]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[76:77]|
	v_add_f64 v[76:77], v[82:83], -v[80:81]
	v_add_f64 v[74:75], v[78:79], -v[74:75]
	v_add_f64 v[78:79], v[82:83], v[62:63]
	v_dual_cndmask_b32 v65, 0, v65 :: v_dual_cndmask_b32 v64, 0, v64
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[54:55], v[54:55], -v[76:77]
	v_add_f64 v[76:77], v[82:83], -v[76:77]
	v_ldexp_f64 v[64:65], v[64:65], 2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[76:77], v[80:81], -v[76:77]
	v_add_f64 v[80:81], v[74:75], v[78:79]
	v_add_f64 v[54:55], v[54:55], v[76:77]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[76:77], v[80:81], v[64:65]
	v_add_f64 v[74:75], v[80:81], -v[74:75]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[76:77]
	v_add_f64 v[76:77], v[78:79], -v[82:83]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_f64 v[74:75], v[78:79], -v[74:75]
	s_and_b32 s2, vcc_lo, exec_lo
	s_cselect_b32 s51, 0x40100000, 0
	v_add_f64 v[62:63], v[62:63], -v[76:77]
	v_add_f64 v[76:77], v[78:79], -v[76:77]
	v_add_f64 v[64:65], v[64:65], s[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[76:77], v[82:83], -v[76:77]
	v_add_f64 v[82:83], v[80:81], v[64:65]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[62:63], v[62:63], v[76:77]
	v_cvt_i32_f64_e32 v33, v[82:83]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[54:55], v[54:55], v[62:63]
	v_cvt_f64_i32_e32 v[76:77], v33
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[54:55], v[56:57], v[54:55]
	v_add_f64 v[64:65], v[64:65], -v[76:77]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[54:55], v[74:75], v[54:55]
	v_add_f64 v[62:63], v[80:81], v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[56:57], v[62:63], -v[64:65]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[62:63]
	v_add_f64 v[56:57], v[80:81], -v[56:57]
	s_and_b32 s2, vcc_lo, exec_lo
	s_cselect_b32 s51, 0x3ff00000, 0
	v_add_co_ci_u32_e64 v133, s2, 0, v33, vcc_lo
	s_mov_b32 s2, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[54:55], v[54:55], v[56:57]
	v_add_f64 v[56:57], v[62:63], -s[50:51]
	v_add_f64 v[62:63], v[56:57], v[54:55]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[64:65], v[62:63], s[6:7]
	v_add_f64 v[56:57], v[62:63], -v[56:57]
	v_fma_f64 v[74:75], v[62:63], s[6:7], -v[64:65]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[54:55], v[54:55], -v[56:57]
	v_fma_f64 v[56:57], v[62:63], s[84:85], v[74:75]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[56:57], v[54:55], s[6:7], v[56:57]
	v_add_f64 v[54:55], v[64:65], v[56:57]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[62:63], v[54:55], -v[64:65]
	v_add_f64 v[74:75], v[56:57], -v[62:63]
	s_branch .LBB9_109
.LBB9_108:                              ;   in Loop: Header=BB9_4 Depth=3
	s_mov_b32 s2, -1
                                        ; implicit-def: $vgpr133
                                        ; implicit-def: $vgpr54_vgpr55
                                        ; implicit-def: $vgpr74_vgpr75
.LBB9_109:                              ; %Flow428
                                        ;   in Loop: Header=BB9_4 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB9_111
; %bb.110:                              ;   in Loop: Header=BB9_4 Depth=3
	v_mul_f64 v[54:55], |v[8:9]|, s[54:55]
	s_mov_b32 s82, s56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[56:57], v[54:55]
	v_fma_f64 v[54:55], v[56:57], s[52:53], |v[8:9]|
	v_mul_f64 v[62:63], v[56:57], s[56:57]
	v_cvt_i32_f64_e32 v133, v[56:57]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[74:75], v[56:57], s[56:57], v[54:55]
	v_add_f64 v[64:65], v[54:55], v[62:63]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[54:55], v[54:55], -v[64:65]
	v_add_f64 v[64:65], v[64:65], -v[74:75]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[54:55], v[54:55], v[62:63]
	v_fma_f64 v[62:63], v[56:57], s[82:83], v[62:63]
	v_add_f64 v[54:55], v[64:65], v[54:55]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[54:55], v[54:55], -v[62:63]
	v_fma_f64 v[62:63], v[56:57], s[58:59], v[54:55]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[54:55], v[74:75], v[62:63]
	v_add_f64 v[64:65], v[54:55], -v[74:75]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[74:75], v[62:63], -v[64:65]
.LBB9_111:                              ; %_ZL3sind.exit345
                                        ;   in Loop: Header=BB9_4 Depth=3
	s_mov_b32 vcc_lo, s1
	s_cbranch_vccz .LBB9_113
; %bb.112:                              ;   in Loop: Header=BB9_4 Depth=3
	s_and_b32 s2, s43, 0x7fffffff
	s_mov_b32 s6, s52
	v_cndmask_b32_e64 v33, s2, v45, s0
	s_mov_b32 s85, s83
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[56:57], v[42:43], v[32:33]
	v_mul_f64 v[62:63], v[36:37], v[32:33]
	v_fma_f64 v[64:65], v[42:43], v[32:33], -v[56:57]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[76:77], v[62:63], v[64:65]
	v_add_f64 v[78:79], v[56:57], v[76:77]
	v_add_f64 v[80:81], v[76:77], -v[62:63]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[56:57], v[78:79], -v[56:57]
	v_add_f64 v[64:65], v[64:65], -v[80:81]
	v_add_f64 v[80:81], v[76:77], -v[80:81]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[56:57], v[76:77], -v[56:57]
	v_ldexp_f64 v[76:77], v[78:79], -2
	v_fract_f64_e32 v[78:79], v[76:77]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[76:77]|
	v_add_f64 v[76:77], v[62:63], -v[80:81]
	v_fma_f64 v[62:63], v[36:37], v[32:33], -v[62:63]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_f64 v[64:65], v[64:65], v[76:77]
	v_dual_cndmask_b32 v77, 0, v79 :: v_dual_cndmask_b32 v76, 0, v78
	v_mul_f64 v[78:79], v[30:31], v[32:33]
	v_ldexp_f64 v[76:77], v[76:77], 2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[80:81], v[78:79], v[62:63]
	v_add_f64 v[82:83], v[80:81], -v[78:79]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[62:63], v[62:63], -v[82:83]
	v_add_f64 v[82:83], v[80:81], -v[82:83]
	v_add_f64 v[82:83], v[78:79], -v[82:83]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[62:63], v[62:63], v[82:83]
	v_add_f64 v[82:83], v[80:81], v[64:65]
	v_add_f64 v[84:85], v[82:83], -v[80:81]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[64:65], v[64:65], -v[84:85]
	v_add_f64 v[84:85], v[82:83], -v[84:85]
	v_add_f64 v[80:81], v[80:81], -v[84:85]
	v_add_f64 v[84:85], v[56:57], v[82:83]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[64:65], v[64:65], v[80:81]
	v_add_f64 v[86:87], v[84:85], v[76:77]
	v_add_f64 v[56:57], v[84:85], -v[56:57]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[62:63], v[62:63], v[64:65]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[86:87]
	v_fma_f64 v[64:65], v[30:31], v[32:33], -v[78:79]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_f64 v[56:57], v[82:83], -v[56:57]
	s_and_b32 s2, vcc_lo, exec_lo
	s_cselect_b32 s51, 0x40100000, 0
	v_add_f64 v[62:63], v[64:65], v[62:63]
	v_add_f64 v[76:77], v[76:77], s[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[56:57], v[56:57], v[62:63]
	v_add_f64 v[64:65], v[84:85], v[76:77]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_i32_f64_e32 v33, v[64:65]
	v_cvt_f64_i32_e32 v[64:65], v33
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[64:65], v[76:77], -v[64:65]
	v_add_f64 v[62:63], v[84:85], v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[64:65], v[62:63], -v[64:65]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[62:63]
	v_add_f64 v[64:65], v[84:85], -v[64:65]
	s_and_b32 s2, vcc_lo, exec_lo
	s_cselect_b32 s51, 0x3ff00000, 0
	v_add_co_ci_u32_e64 v134, s2, 0, v33, vcc_lo
	v_add_f64 v[62:63], v[62:63], -s[50:51]
	s_mov_b32 s2, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[56:57], v[56:57], v[64:65]
	v_add_f64 v[64:65], v[62:63], v[56:57]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[62:63], v[64:65], -v[62:63]
	v_mul_f64 v[76:77], v[64:65], s[6:7]
	v_add_f64 v[56:57], v[56:57], -v[62:63]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], v[64:65], s[6:7], -v[76:77]
	v_fma_f64 v[62:63], v[64:65], s[84:85], v[62:63]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[62:63], v[56:57], s[6:7], v[62:63]
	v_add_f64 v[56:57], v[76:77], v[62:63]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[64:65], v[56:57], -v[76:77]
	v_add_f64 v[86:87], v[62:63], -v[64:65]
	s_branch .LBB9_114
.LBB9_113:                              ;   in Loop: Header=BB9_4 Depth=3
	s_mov_b32 s2, -1
                                        ; implicit-def: $vgpr134
                                        ; implicit-def: $vgpr56_vgpr57
                                        ; implicit-def: $vgpr86_vgpr87
.LBB9_114:                              ; %Flow426
                                        ;   in Loop: Header=BB9_4 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB9_116
; %bb.115:                              ;   in Loop: Header=BB9_4 Depth=3
	v_mul_f64 v[56:57], |s[42:43]|, s[54:55]
	s_mov_b32 s82, s56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[62:63], v[56:57]
	v_fma_f64 v[56:57], v[62:63], s[52:53], |s[42:43]|
	v_mul_f64 v[64:65], v[62:63], s[56:57]
	v_cvt_i32_f64_e32 v134, v[62:63]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[78:79], v[62:63], s[56:57], v[56:57]
	v_add_f64 v[76:77], v[56:57], v[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[56:57], v[56:57], -v[76:77]
	v_add_f64 v[76:77], v[76:77], -v[78:79]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[56:57], v[56:57], v[64:65]
	v_fma_f64 v[64:65], v[62:63], s[82:83], v[64:65]
	v_add_f64 v[56:57], v[76:77], v[56:57]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[56:57], v[56:57], -v[64:65]
	v_fma_f64 v[64:65], v[62:63], s[58:59], v[56:57]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[56:57], v[78:79], v[64:65]
	v_add_f64 v[76:77], v[56:57], -v[78:79]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[86:87], v[64:65], -v[76:77]
.LBB9_116:                              ; %_ZL3sind.exit350
                                        ;   in Loop: Header=BB9_4 Depth=3
	s_mov_b32 vcc_lo, s5
	s_cbranch_vccz .LBB9_118
; %bb.117:                              ;   in Loop: Header=BB9_4 Depth=3
	v_cndmask_b32_e64 v63, v44, v69, s4
	v_cndmask_b32_e64 v62, v16, v68, s4
	s_mov_b32 s6, s52
	s_mov_b32 s85, s83
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[64:65], v[66:67], v[62:63]
	v_mul_f64 v[68:69], v[58:59], v[62:63]
	v_mul_f64 v[78:79], v[60:61], v[62:63]
	v_fma_f64 v[66:67], v[66:67], v[62:63], -v[64:65]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[58:59], v[58:59], v[62:63], -v[68:69]
	v_fma_f64 v[60:61], v[60:61], v[62:63], -v[78:79]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[76:77], v[68:69], v[66:67]
	v_add_f64 v[80:81], v[76:77], -v[68:69]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_f64 v[62:63], v[66:67], -v[80:81]
	v_add_f64 v[66:67], v[76:77], -v[80:81]
	v_add_f64 v[80:81], v[64:65], v[76:77]
	v_add_f64 v[66:67], v[68:69], -v[66:67]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[68:69], v[80:81], -2
	v_add_f64 v[64:65], v[80:81], -v[64:65]
	v_add_f64 v[80:81], v[78:79], v[58:59]
	v_add_f64 v[62:63], v[62:63], v[66:67]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fract_f64_e32 v[66:67], v[68:69]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[68:69]|
	v_add_f64 v[68:69], v[80:81], -v[78:79]
	v_add_f64 v[64:65], v[76:77], -v[64:65]
	v_add_f64 v[76:77], v[80:81], v[62:63]
	v_dual_cndmask_b32 v67, 0, v67 :: v_dual_cndmask_b32 v66, 0, v66
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[58:59], v[58:59], -v[68:69]
	v_add_f64 v[68:69], v[80:81], -v[68:69]
	v_ldexp_f64 v[66:67], v[66:67], 2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[68:69], v[78:79], -v[68:69]
	v_add_f64 v[78:79], v[64:65], v[76:77]
	v_add_f64 v[58:59], v[58:59], v[68:69]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[68:69], v[78:79], v[66:67]
	v_add_f64 v[64:65], v[78:79], -v[64:65]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[68:69]
	v_add_f64 v[68:69], v[76:77], -v[80:81]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_f64 v[64:65], v[76:77], -v[64:65]
	s_and_b32 s2, vcc_lo, exec_lo
	s_cselect_b32 s51, 0x40100000, 0
	v_add_f64 v[62:63], v[62:63], -v[68:69]
	v_add_f64 v[68:69], v[76:77], -v[68:69]
	v_add_f64 v[66:67], v[66:67], s[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[68:69], v[80:81], -v[68:69]
	v_add_f64 v[80:81], v[78:79], v[66:67]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[62:63], v[62:63], v[68:69]
	v_cvt_i32_f64_e32 v33, v[80:81]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[58:59], v[58:59], v[62:63]
	v_cvt_f64_i32_e32 v[68:69], v33
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[58:59], v[60:61], v[58:59]
	v_add_f64 v[66:67], v[66:67], -v[68:69]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[58:59], v[64:65], v[58:59]
	v_add_f64 v[62:63], v[78:79], v[66:67]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[60:61], v[62:63], -v[66:67]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[62:63]
	v_add_f64 v[60:61], v[78:79], -v[60:61]
	s_and_b32 s2, vcc_lo, exec_lo
	s_cselect_b32 s51, 0x3ff00000, 0
	v_add_co_ci_u32_e64 v135, s2, 0, v33, vcc_lo
	s_mov_b32 s2, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[58:59], v[58:59], v[60:61]
	v_add_f64 v[60:61], v[62:63], -s[50:51]
	v_add_f64 v[62:63], v[60:61], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[64:65], v[62:63], s[6:7]
	v_add_f64 v[60:61], v[62:63], -v[60:61]
	v_fma_f64 v[66:67], v[62:63], s[6:7], -v[64:65]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[58:59], v[58:59], -v[60:61]
	v_fma_f64 v[60:61], v[62:63], s[84:85], v[66:67]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[60:61], v[58:59], s[6:7], v[60:61]
	v_add_f64 v[58:59], v[64:65], v[60:61]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[62:63], v[58:59], -v[64:65]
	v_add_f64 v[66:67], v[60:61], -v[62:63]
	s_branch .LBB9_119
.LBB9_118:                              ;   in Loop: Header=BB9_4 Depth=3
	s_mov_b32 s2, -1
                                        ; implicit-def: $vgpr135
                                        ; implicit-def: $vgpr58_vgpr59
                                        ; implicit-def: $vgpr66_vgpr67
.LBB9_119:                              ; %Flow425
                                        ;   in Loop: Header=BB9_4 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB9_121
; %bb.120:                              ;   in Loop: Header=BB9_4 Depth=3
	v_mul_f64 v[58:59], |v[16:17]|, s[54:55]
	s_mov_b32 s82, s56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[60:61], v[58:59]
	v_fma_f64 v[58:59], v[60:61], s[52:53], |v[16:17]|
	v_mul_f64 v[62:63], v[60:61], s[56:57]
	v_cvt_i32_f64_e32 v135, v[60:61]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[66:67], v[60:61], s[56:57], v[58:59]
	v_add_f64 v[64:65], v[58:59], v[62:63]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[58:59], v[58:59], -v[64:65]
	v_add_f64 v[64:65], v[64:65], -v[66:67]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[58:59], v[58:59], v[62:63]
	v_fma_f64 v[62:63], v[60:61], s[82:83], v[62:63]
	v_add_f64 v[58:59], v[64:65], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[58:59], v[58:59], -v[62:63]
	v_fma_f64 v[62:63], v[60:61], s[58:59], v[58:59]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[58:59], v[66:67], v[62:63]
	v_add_f64 v[64:65], v[58:59], -v[66:67]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[66:67], v[62:63], -v[64:65]
.LBB9_121:                              ; %_ZL3sind.exit355
                                        ;   in Loop: Header=BB9_4 Depth=3
	s_mov_b32 vcc_lo, s1
	s_cbranch_vccz .LBB9_123
; %bb.122:                              ;   in Loop: Header=BB9_4 Depth=3
	s_and_b32 s1, s43, 0x7fffffff
	s_mov_b32 s6, s52
	v_cndmask_b32_e64 v33, s1, v45, s0
	s_mov_b32 s85, s83
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[44:45], v[42:43], v[32:33]
	v_mul_f64 v[60:61], v[36:37], v[32:33]
	v_fma_f64 v[42:43], v[42:43], v[32:33], -v[44:45]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[36:37], v[36:37], v[32:33], -v[60:61]
	v_add_f64 v[62:63], v[60:61], v[42:43]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[64:65], v[62:63], -v[60:61]
	v_add_f64 v[68:69], v[44:45], v[62:63]
	v_add_f64 v[76:77], v[62:63], -v[64:65]
	v_add_f64 v[42:43], v[42:43], -v[64:65]
	v_mul_f64 v[64:65], v[30:31], v[32:33]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[44:45], v[68:69], -v[44:45]
	v_add_f64 v[60:61], v[60:61], -v[76:77]
	v_ldexp_f64 v[76:77], v[68:69], -2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[68:69], v[64:65], v[36:37]
	v_add_f64 v[44:45], v[62:63], -v[44:45]
	v_fma_f64 v[30:31], v[30:31], v[32:33], -v[64:65]
	v_add_f64 v[42:43], v[42:43], v[60:61]
	v_fract_f64_e32 v[60:61], v[76:77]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[76:77]|
	v_add_f64 v[76:77], v[68:69], -v[64:65]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v61, 0, v61 :: v_dual_cndmask_b32 v60, 0, v60
	v_add_f64 v[36:37], v[36:37], -v[76:77]
	v_add_f64 v[76:77], v[68:69], -v[76:77]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[60:61], v[60:61], 2
	v_add_f64 v[62:63], v[64:65], -v[76:77]
	v_add_f64 v[76:77], v[68:69], v[42:43]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[36:37], v[36:37], v[62:63]
	v_add_f64 v[62:63], v[44:45], v[76:77]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[78:79], v[62:63], v[60:61]
	v_add_f64 v[32:33], v[62:63], -v[44:45]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[78:79]
	v_add_f64 v[78:79], v[76:77], -v[68:69]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[32:33], v[76:77], -v[32:33]
	s_and_b32 s0, vcc_lo, exec_lo
	v_add_f64 v[42:43], v[42:43], -v[78:79]
	v_add_f64 v[78:79], v[76:77], -v[78:79]
	s_cselect_b32 s51, 0x40100000, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[60:61], v[60:61], s[50:51]
	v_add_f64 v[68:69], v[68:69], -v[78:79]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[42:43], v[42:43], v[68:69]
	v_add_f64 v[68:69], v[62:63], v[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[36:37], v[36:37], v[42:43]
	v_cvt_i32_f64_e32 v78, v[68:69]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[30:31], v[30:31], v[36:37]
	v_cvt_f64_i32_e32 v[68:69], v78
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[30:31], v[32:33], v[30:31]
	v_add_f64 v[60:61], v[60:61], -v[68:69]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[42:43], v[62:63], v[60:61]
	v_add_f64 v[36:37], v[42:43], -v[60:61]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[42:43]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_add_f64 v[32:33], v[62:63], -v[36:37]
	s_and_b32 s0, vcc_lo, exec_lo
	s_cselect_b32 s51, 0x3ff00000, 0
	v_add_co_ci_u32_e64 v136, s0, 0, v78, vcc_lo
	s_mov_b32 s0, 0
	v_add_f64 v[30:31], v[30:31], v[32:33]
	v_add_f64 v[32:33], v[42:43], -s[50:51]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[36:37], v[32:33], v[30:31]
	v_mul_f64 v[42:43], v[36:37], s[6:7]
	v_add_f64 v[32:33], v[36:37], -v[32:33]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[44:45], v[36:37], s[6:7], -v[42:43]
	v_add_f64 v[30:31], v[30:31], -v[32:33]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[32:33], v[36:37], s[84:85], v[44:45]
	v_fma_f64 v[32:33], v[30:31], s[6:7], v[32:33]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[30:31], v[42:43], v[32:33]
	v_add_f64 v[36:37], v[30:31], -v[42:43]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[68:69], v[32:33], -v[36:37]
	s_branch .LBB9_124
.LBB9_123:                              ;   in Loop: Header=BB9_4 Depth=3
	s_mov_b32 s0, -1
                                        ; implicit-def: $vgpr136
                                        ; implicit-def: $vgpr30_vgpr31
                                        ; implicit-def: $vgpr68_vgpr69
.LBB9_124:                              ; %Flow423
                                        ;   in Loop: Header=BB9_4 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB9_126
; %bb.125:                              ;   in Loop: Header=BB9_4 Depth=3
	v_mul_f64 v[30:31], |s[42:43]|, s[54:55]
	s_mov_b32 s82, s56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[32:33], v[30:31]
	v_fma_f64 v[30:31], v[32:33], s[52:53], |s[42:43]|
	v_mul_f64 v[36:37], v[32:33], s[56:57]
	v_cvt_i32_f64_e32 v136, v[32:33]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[44:45], v[32:33], s[56:57], v[30:31]
	v_add_f64 v[42:43], v[30:31], v[36:37]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[30:31], v[30:31], -v[42:43]
	v_add_f64 v[42:43], v[42:43], -v[44:45]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[30:31], v[30:31], v[36:37]
	v_fma_f64 v[36:37], v[32:33], s[82:83], v[36:37]
	v_add_f64 v[30:31], v[42:43], v[30:31]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[30:31], v[30:31], -v[36:37]
	v_fma_f64 v[36:37], v[32:33], s[58:59], v[30:31]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[30:31], v[44:45], v[36:37]
	v_add_f64 v[42:43], v[30:31], -v[44:45]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[68:69], v[36:37], -v[42:43]
.LBB9_126:                              ; %_ZL3cosd.exit360
                                        ;   in Loop: Header=BB9_4 Depth=3
	v_mul_f64 v[32:33], v[58:59], v[58:59]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[78:79], v[72:73], 0.5
	v_mul_f64 v[84:85], v[74:75], 0.5
	v_mul_f64 v[88:89], v[56:57], v[56:57]
	v_mul_f64 v[92:93], v[86:87], 0.5
	v_mul_f64 v[94:95], v[34:35], v[34:35]
	v_mul_f64 v[98:99], v[70:71], 0.5
	v_mul_f64 v[100:101], v[20:21], v[20:21]
	v_mul_f64 v[104:105], v[28:29], 0.5
	v_mul_f64 v[106:107], v[24:25], v[24:25]
	v_mul_f64 v[110:111], v[38:39], 0.5
	v_mul_f64 v[116:117], v[46:47], 0.5
	v_mul_f64 v[118:119], v[10:11], v[10:11]
	v_mul_f64 v[122:123], v[18:19], 0.5
	v_mul_f64 v[137:138], v[14:15], v[14:15]
	v_mul_f64 v[141:142], v[22:23], 0.5
	s_mov_b32 s86, s70
	v_cmp_class_f64_e64 s0, v[8:9], 0x1f8
	v_cmp_class_f64_e64 s1, s[42:43], 0x1f8
	v_mul_f64 v[153:154], v[68:69], 0.5
	s_waitcnt vmcnt(1)
	v_add_f64 v[12:13], s[16:17], v[12:13]
	v_mul_f64 v[36:37], v[32:33], 0.5
	v_mul_f64 v[44:45], v[32:33], v[32:33]
	v_mul_f64 v[64:65], v[58:59], -v[32:33]
	v_mul_f64 v[90:91], v[88:89], v[88:89]
	v_mul_f64 v[96:97], v[94:95], v[94:95]
	v_mul_f64 v[102:103], v[100:101], v[100:101]
	v_mul_f64 v[108:109], v[106:107], v[106:107]
	v_mul_f64 v[120:121], v[118:119], v[118:119]
	v_mul_f64 v[139:140], v[137:138], v[137:138]
	v_add_f64 v[60:61], -v[36:37], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[42:43], -v[60:61], 1.0
	v_add_f64 v[36:37], v[42:43], -v[36:37]
	v_fma_f64 v[42:43], v[32:33], s[62:63], s[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[36:37], v[58:59], -v[66:67], v[36:37]
	v_fma_f64 v[42:43], v[32:33], v[42:43], s[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[42:43], v[32:33], v[42:43], s[66:67]
	v_fma_f64 v[42:43], v[32:33], v[42:43], s[68:69]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[42:43], v[32:33], v[42:43], s[70:71]
	v_fma_f64 v[62:63], v[44:45], v[42:43], v[36:37]
	v_fma_f64 v[36:37], v[32:33], s[74:75], s[72:73]
	v_mul_f64 v[42:43], v[66:67], 0.5
	v_mul_f64 v[44:45], v[50:51], v[50:51]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[36:37], v[32:33], v[36:37], s[76:77]
	v_mul_f64 v[76:77], v[44:45], v[44:45]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[36:37], v[32:33], v[36:37], s[78:79]
	v_fma_f64 v[36:37], v[32:33], v[36:37], s[80:81]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[36:37], v[64:65], v[36:37], v[42:43]
	v_fma_f64 v[66:67], v[32:33], v[36:37], -v[66:67]
	v_mul_f64 v[36:37], v[44:45], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[32:33], -v[36:37], 1.0
	v_add_f64 v[42:43], -v[32:33], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[36:37], v[42:43], -v[36:37]
	v_fma_f64 v[42:43], v[44:45], s[62:63], s[60:61]
	v_fma_f64 v[36:37], v[50:51], -v[72:73], v[36:37]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[42:43], v[44:45], v[42:43], s[64:65]
	v_fma_f64 v[42:43], v[44:45], v[42:43], s[66:67]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[42:43], v[44:45], v[42:43], s[68:69]
	v_fma_f64 v[42:43], v[44:45], v[42:43], s[70:71]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[36:37], v[76:77], v[42:43], v[36:37]
	v_fma_f64 v[42:43], v[44:45], s[74:75], s[72:73]
	v_fma_f64 v[42:43], v[44:45], v[42:43], s[76:77]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[42:43], v[44:45], v[42:43], s[78:79]
	v_fma_f64 v[76:77], v[44:45], v[42:43], s[80:81]
	v_mul_f64 v[42:43], v[50:51], -v[44:45]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[76:77], v[42:43], v[76:77], v[78:79]
	v_fma_f64 v[44:45], v[44:45], v[76:77], -v[72:73]
	v_mul_f64 v[72:73], v[54:55], v[54:55]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[78:79], v[72:73], 0.5
	v_mul_f64 v[82:83], v[72:73], v[72:73]
	v_add_f64 v[76:77], -v[78:79], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[80:81], -v[76:77], 1.0
	v_add_f64 v[78:79], v[80:81], -v[78:79]
	v_fma_f64 v[80:81], v[72:73], s[62:63], s[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[78:79], v[54:55], -v[74:75], v[78:79]
	v_fma_f64 v[80:81], v[72:73], v[80:81], s[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[80:81], v[72:73], v[80:81], s[66:67]
	v_fma_f64 v[80:81], v[72:73], v[80:81], s[68:69]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[80:81], v[72:73], v[80:81], s[70:71]
	v_fma_f64 v[78:79], v[82:83], v[80:81], v[78:79]
	v_fma_f64 v[80:81], v[72:73], s[74:75], s[72:73]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[80:81], v[72:73], v[80:81], s[76:77]
	v_fma_f64 v[80:81], v[72:73], v[80:81], s[78:79]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[82:83], v[72:73], v[80:81], s[80:81]
	v_mul_f64 v[80:81], v[54:55], -v[72:73]
	v_fma_f64 v[82:83], v[80:81], v[82:83], v[84:85]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[82:83], v[72:73], v[82:83], -v[74:75]
	v_mul_f64 v[74:75], v[88:89], 0.5
	v_add_f64 v[72:73], -v[74:75], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[84:85], -v[72:73], 1.0
	v_add_f64 v[74:75], v[84:85], -v[74:75]
	v_fma_f64 v[84:85], v[88:89], s[62:63], s[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[74:75], v[56:57], -v[86:87], v[74:75]
	v_fma_f64 v[84:85], v[88:89], v[84:85], s[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[84:85], v[88:89], v[84:85], s[66:67]
	v_fma_f64 v[84:85], v[88:89], v[84:85], s[68:69]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[84:85], v[88:89], v[84:85], s[70:71]
	v_fma_f64 v[74:75], v[90:91], v[84:85], v[74:75]
	v_fma_f64 v[84:85], v[88:89], s[74:75], s[72:73]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[84:85], v[88:89], v[84:85], s[76:77]
	v_fma_f64 v[84:85], v[88:89], v[84:85], s[78:79]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[90:91], v[88:89], v[84:85], s[80:81]
	v_mul_f64 v[84:85], v[56:57], -v[88:89]
	v_fma_f64 v[90:91], v[84:85], v[90:91], v[92:93]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[86:87], v[88:89], v[90:91], -v[86:87]
	v_mul_f64 v[90:91], v[94:95], 0.5
	v_add_f64 v[88:89], -v[90:91], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[92:93], -v[88:89], 1.0
	v_add_f64 v[90:91], v[92:93], -v[90:91]
	v_fma_f64 v[92:93], v[94:95], s[62:63], s[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[90:91], v[34:35], -v[70:71], v[90:91]
	v_fma_f64 v[92:93], v[94:95], v[92:93], s[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[92:93], v[94:95], v[92:93], s[66:67]
	v_fma_f64 v[92:93], v[94:95], v[92:93], s[68:69]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[92:93], v[94:95], v[92:93], s[70:71]
	v_fma_f64 v[90:91], v[96:97], v[92:93], v[90:91]
	v_fma_f64 v[92:93], v[94:95], s[74:75], s[72:73]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[92:93], v[94:95], v[92:93], s[76:77]
	v_fma_f64 v[92:93], v[94:95], v[92:93], s[78:79]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[96:97], v[94:95], v[92:93], s[80:81]
	v_mul_f64 v[92:93], v[34:35], -v[94:95]
	v_fma_f64 v[96:97], v[92:93], v[96:97], v[98:99]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[70:71], v[94:95], v[96:97], -v[70:71]
	v_mul_f64 v[96:97], v[100:101], 0.5
	v_add_f64 v[94:95], -v[96:97], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[98:99], -v[94:95], 1.0
	v_add_f64 v[96:97], v[98:99], -v[96:97]
	v_fma_f64 v[98:99], v[100:101], s[62:63], s[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[96:97], v[20:21], -v[28:29], v[96:97]
	v_fma_f64 v[98:99], v[100:101], v[98:99], s[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[98:99], v[100:101], v[98:99], s[66:67]
	v_fma_f64 v[98:99], v[100:101], v[98:99], s[68:69]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[98:99], v[100:101], v[98:99], s[70:71]
	v_fma_f64 v[96:97], v[102:103], v[98:99], v[96:97]
	v_fma_f64 v[98:99], v[100:101], s[74:75], s[72:73]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[94:95], v[94:95], v[96:97]
	v_fma_f64 v[98:99], v[100:101], v[98:99], s[76:77]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[98:99], v[100:101], v[98:99], s[78:79]
	v_fma_f64 v[102:103], v[100:101], v[98:99], s[80:81]
	v_mul_f64 v[98:99], v[20:21], -v[100:101]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[102:103], v[98:99], v[102:103], v[104:105]
	v_fma_f64 v[28:29], v[100:101], v[102:103], -v[28:29]
	v_mul_f64 v[102:103], v[106:107], 0.5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[28:29], v[98:99], s[86:87], v[28:29]
	v_add_f64 v[100:101], -v[102:103], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[20:21], v[20:21], -v[28:29]
	v_add_f64 v[104:105], -v[100:101], 1.0
	v_and_b32_e32 v28, 1, v127
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_eq_u32_e32 vcc_lo, 0, v28
	v_cndmask_b32_e32 v95, v95, v21, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[102:103], v[104:105], -v[102:103]
	v_fma_f64 v[104:105], v[106:107], s[62:63], s[60:61]
	v_fma_f64 v[102:103], v[24:25], -v[38:39], v[102:103]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[104:105], v[106:107], v[104:105], s[64:65]
	v_fma_f64 v[104:105], v[106:107], v[104:105], s[66:67]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[104:105], v[106:107], v[104:105], s[68:69]
	v_fma_f64 v[104:105], v[106:107], v[104:105], s[70:71]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[102:103], v[108:109], v[104:105], v[102:103]
	v_fma_f64 v[104:105], v[106:107], s[74:75], s[72:73]
	v_add_f64 v[28:29], v[100:101], v[102:103]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[104:105], v[106:107], v[104:105], s[76:77]
	v_cndmask_b32_e32 v94, v94, v20, vcc_lo
	v_fma_f64 v[104:105], v[106:107], v[104:105], s[78:79]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[108:109], v[106:107], v[104:105], s[80:81]
	v_mul_f64 v[104:105], v[24:25], -v[106:107]
	v_fma_f64 v[108:109], v[104:105], v[108:109], v[110:111]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[106:107], v[106:107], v[108:109], -v[38:39]
	v_mul_f64 v[38:39], v[26:27], v[26:27]
	v_fma_f64 v[20:21], v[104:105], s[86:87], v[106:107]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_f64 v[108:109], v[38:39], 0.5
	v_mul_f64 v[114:115], v[38:39], v[38:39]
	v_add_f64 v[20:21], v[24:25], -v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[110:111], -v[108:109], 1.0
	v_and_b32_e32 v24, 1, v128
	v_cmp_eq_u32_e32 vcc_lo, 0, v24
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v96, v28, v20, vcc_lo
	v_add_f64 v[112:113], -v[110:111], 1.0
	v_cndmask_b32_e32 v97, v29, v21, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[108:109], v[112:113], -v[108:109]
	v_fma_f64 v[112:113], v[38:39], s[62:63], s[60:61]
	v_fma_f64 v[108:109], v[26:27], -v[46:47], v[108:109]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[112:113], v[38:39], v[112:113], s[64:65]
	v_fma_f64 v[112:113], v[38:39], v[112:113], s[66:67]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[112:113], v[38:39], v[112:113], s[68:69]
	v_fma_f64 v[112:113], v[38:39], v[112:113], s[70:71]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[112:113], v[114:115], v[112:113], v[108:109]
	v_fma_f64 v[108:109], v[38:39], s[74:75], s[72:73]
	v_mul_f64 v[114:115], v[26:27], -v[38:39]
	v_add_f64 v[24:25], v[110:111], v[112:113]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[108:109], v[38:39], v[108:109], s[76:77]
	v_fma_f64 v[108:109], v[38:39], v[108:109], s[78:79]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[108:109], v[38:39], v[108:109], s[80:81]
	v_fma_f64 v[108:109], v[114:115], v[108:109], v[116:117]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[116:117], v[38:39], v[108:109], -v[46:47]
	v_mul_f64 v[46:47], v[118:119], 0.5
	v_fma_f64 v[20:21], v[114:115], s[86:87], v[116:117]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[38:39], -v[46:47], 1.0
	v_add_f64 v[20:21], v[26:27], -v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[108:109], -v[38:39], 1.0
	v_and_b32_e32 v26, 1, v129
	v_cmp_eq_u32_e32 vcc_lo, 0, v26
	v_add_f64 v[26:27], v[88:89], v[90:91]
	v_cndmask_b32_e32 v98, v24, v20, vcc_lo
	v_add_f64 v[46:47], v[108:109], -v[46:47]
	v_fma_f64 v[108:109], v[118:119], s[62:63], s[60:61]
	v_cndmask_b32_e32 v99, v25, v21, vcc_lo
	v_fma_f64 v[20:21], v[92:93], s[86:87], v[70:71]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[46:47], v[10:11], -v[18:19], v[46:47]
	v_fma_f64 v[108:109], v[118:119], v[108:109], s[64:65]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[20:21], v[34:35], -v[20:21]
	v_fma_f64 v[108:109], v[118:119], v[108:109], s[66:67]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v21, 0x80000000, v21
	v_fma_f64 v[108:109], v[118:119], v[108:109], s[68:69]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[108:109], v[118:119], v[108:109], s[70:71]
	v_fma_f64 v[46:47], v[120:121], v[108:109], v[46:47]
	v_fma_f64 v[108:109], v[118:119], s[74:75], s[72:73]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[108:109], v[118:119], v[108:109], s[76:77]
	v_fma_f64 v[108:109], v[118:119], v[108:109], s[78:79]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[120:121], v[118:119], v[108:109], s[80:81]
	v_mul_f64 v[108:109], v[10:11], -v[118:119]
	v_fma_f64 v[120:121], v[108:109], v[120:121], v[122:123]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[18:19], v[118:119], v[120:121], -v[18:19]
	v_mul_f64 v[120:121], v[137:138], 0.5
	v_fma_f64 v[18:19], v[108:109], s[86:87], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[118:119], -v[120:121], 1.0
	v_add_f64 v[10:11], v[10:11], -v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[122:123], -v[118:119], 1.0
	v_xor_b32_e32 v11, 0x80000000, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[120:121], v[122:123], -v[120:121]
	v_fma_f64 v[122:123], v[137:138], s[62:63], s[60:61]
	v_fma_f64 v[120:121], v[14:15], -v[22:23], v[120:121]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[122:123], v[137:138], v[122:123], s[64:65]
	v_fma_f64 v[122:123], v[137:138], v[122:123], s[66:67]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[122:123], v[137:138], v[122:123], s[68:69]
	v_fma_f64 v[122:123], v[137:138], v[122:123], s[70:71]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[120:121], v[139:140], v[122:123], v[120:121]
	v_fma_f64 v[122:123], v[137:138], s[74:75], s[72:73]
	v_fma_f64 v[122:123], v[137:138], v[122:123], s[76:77]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[122:123], v[137:138], v[122:123], s[78:79]
	v_fma_f64 v[139:140], v[137:138], v[122:123], s[80:81]
	v_mul_f64 v[122:123], v[14:15], -v[137:138]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[139:140], v[122:123], v[139:140], v[141:142]
	v_fma_f64 v[22:23], v[137:138], v[139:140], -v[22:23]
	v_mul_f64 v[137:138], v[48:49], v[48:49]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[22:23], v[122:123], s[86:87], v[22:23]
	v_mul_f64 v[139:140], v[137:138], 0.5
	v_mul_f64 v[145:146], v[137:138], v[137:138]
	v_mul_f64 v[147:148], v[48:49], -v[137:138]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[14:15], v[14:15], -v[22:23]
	v_add_f64 v[141:142], -v[139:140], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[143:144], -v[141:142], 1.0
	v_add_f64 v[139:140], v[143:144], -v[139:140]
	v_fma_f64 v[143:144], v[137:138], s[62:63], s[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[139:140], v[48:49], -v[52:53], v[139:140]
	v_fma_f64 v[143:144], v[137:138], v[143:144], s[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[143:144], v[137:138], v[143:144], s[66:67]
	v_fma_f64 v[143:144], v[137:138], v[143:144], s[68:69]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[143:144], v[137:138], v[143:144], s[70:71]
	v_fma_f64 v[139:140], v[145:146], v[143:144], v[139:140]
	v_fma_f64 v[143:144], v[137:138], s[74:75], s[72:73]
	v_mul_f64 v[145:146], v[52:53], 0.5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[28:29], v[141:142], v[139:140]
	v_fma_f64 v[143:144], v[137:138], v[143:144], s[76:77]
	v_and_b32_e32 v34, 1, v130
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_cmp_eq_u32_e32 vcc_lo, 0, v34
	v_cndmask_b32_e32 v26, v20, v26, vcc_lo
	v_and_b32_e32 v20, 1, v131
	v_cndmask_b32_e32 v27, v21, v27, vcc_lo
	v_cmp_eq_u32_e32 vcc_lo, 0, v20
	v_fma_f64 v[143:144], v[137:138], v[143:144], s[78:79]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[143:144], v[137:138], v[143:144], s[80:81]
	v_fma_f64 v[143:144], v[147:148], v[143:144], v[145:146]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[52:53], v[137:138], v[143:144], -v[52:53]
	v_mul_f64 v[137:138], v[30:31], v[30:31]
	v_fma_f64 v[24:25], v[147:148], s[86:87], v[52:53]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_f64 v[143:144], v[137:138], 0.5
	v_mul_f64 v[151:152], v[137:138], v[137:138]
	v_add_f64 v[24:25], v[48:49], -v[24:25]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[145:146], -v[143:144], 1.0
	v_xor_b32_e32 v20, 0x80000000, v25
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[149:150], -v[145:146], 1.0
	v_cndmask_b32_e32 v28, v24, v28, vcc_lo
	v_cndmask_b32_e64 v24, 0, v96, s0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v29, v20, v29, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[16:17], 0x1f8
	v_lshlrev_b32_e32 v20, 30, v127
	v_lshlrev_b32_e32 v8, 30, v130
	v_lshlrev_b32_e32 v16, 30, v131
	v_xor_b32_e32 v20, v20, v17
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_and_b32_e32 v8, 0x80000000, v8
	v_and_b32_e32 v16, 0x80000000, v16
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_and_b32_e32 v20, 0x80000000, v20
	v_xor_b32_e32 v8, v27, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v16, v29, v16
	v_xor_b32_e32 v21, v95, v20
	v_lshlrev_b32_e32 v20, 30, v128
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v27, 0x7ff80000, v16, s1
	v_xor_b32_e32 v20, v20, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v20, 0x80000000, v20
	v_xor_b32_e32 v25, v97, v20
	v_add_f64 v[143:144], v[149:150], -v[143:144]
	v_fma_f64 v[149:150], v[137:138], s[62:63], s[60:61]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v25, 0x7ff80000, v25, s0
	v_cndmask_b32_e32 v20, 0, v94, vcc_lo
	v_cndmask_b32_e32 v21, 0x7ff80000, v21, vcc_lo
	v_mul_f64 v[20:21], v[20:21], v[24:25]
	v_cndmask_b32_e32 v24, 0, v26, vcc_lo
	v_cndmask_b32_e32 v25, 0x7ff80000, v8, vcc_lo
	v_cndmask_b32_e64 v26, 0, v28, s1
	v_lshlrev_b32_e32 v8, 30, v129
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[24:25], v[24:25], v[26:27]
	v_xor_b32_e32 v8, s43, v8
	v_cndmask_b32_e64 v26, 0, v98, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v8, 0x80000000, v8
	v_xor_b32_e32 v8, v99, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v27, 0x7ff80000, v8, s1
	v_and_b32_e32 v8, 1, v135
	v_fma_f64 v[143:144], v[30:31], -v[68:69], v[143:144]
	v_fma_f64 v[149:150], v[137:138], v[149:150], s[64:65]
	v_cmp_eq_u32_e64 s2, 0, v8
	v_and_b32_e32 v8, 1, v133
	v_fma_f64 v[20:21], v[20:21], v[26:27], v[24:25]
	v_fma_f64 v[24:25], v[64:65], s[86:87], v[66:67]
	v_add_f64 v[26:27], v[60:61], v[62:63]
	v_fma_f64 v[149:150], v[137:138], v[149:150], s[66:67]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[24:25], v[58:59], -v[24:25]
	v_fma_f64 v[149:150], v[137:138], v[149:150], s[68:69]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v34, v26, v24, s2
	v_cndmask_b32_e64 v35, v27, v25, s2
	v_fma_f64 v[24:25], v[80:81], s[86:87], v[82:83]
	v_add_f64 v[26:27], v[76:77], v[78:79]
	v_cmp_eq_u32_e64 s2, 0, v8
	v_and_b32_e32 v8, 1, v126
	v_fma_f64 v[149:150], v[137:138], v[149:150], s[70:71]
	v_add_f64 v[24:25], v[54:55], -v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f64 v[143:144], v[151:152], v[149:150], v[143:144]
	v_fma_f64 v[149:150], v[137:138], s[74:75], s[72:73]
	v_mul_f64 v[151:152], v[30:31], -v[137:138]
	v_cndmask_b32_e64 v48, v26, v24, s2
	v_cndmask_b32_e64 v49, v27, v25, s2
	v_add_f64 v[24:25], v[118:119], v[120:121]
	v_cmp_eq_u32_e64 s2, 0, v8
	v_add_f64 v[26:27], v[32:33], v[36:37]
	v_lshlrev_b32_e32 v8, 30, v135
	v_add_f64 v[28:29], v[145:146], v[143:144]
	v_fma_f64 v[149:150], v[137:138], v[149:150], s[76:77]
	v_cndmask_b32_e64 v52, v24, v14, s2
	v_cndmask_b32_e64 v53, v25, v15, s2
	v_fma_f64 v[14:15], v[42:43], s[86:87], v[44:45]
	v_fma_f64 v[24:25], v[84:85], s[86:87], v[86:87]
	v_fma_f64 v[149:150], v[137:138], v[149:150], s[78:79]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[14:15], v[50:51], -v[14:15]
	v_add_f64 v[18:19], v[56:57], -v[24:25]
	v_and_b32_e32 v24, 1, v132
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_cmp_eq_u32_e64 s2, 0, v24
	v_and_b32_e32 v24, 1, v136
	v_fma_f64 v[149:150], v[137:138], v[149:150], s[80:81]
	v_xor_b32_e32 v15, 0x80000000, v15
	v_cndmask_b32_e64 v14, v14, v26, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v15, v15, v27, s2
	v_cmp_eq_u32_e64 s2, 0, v24
	v_and_b32_e32 v24, 1, v125
	v_cndmask_b32_e32 v14, 0, v14, vcc_lo
	v_fma_f64 v[149:150], v[151:152], v[149:150], v[153:154]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[68:69], v[137:138], v[149:150], -v[68:69]
	v_fma_f64 v[22:23], v[151:152], s[86:87], v[68:69]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_f64 v[22:23], v[30:31], -v[22:23]
	v_xor_b32_e32 v30, v8, v17
	v_add_f64 v[16:17], v[38:39], v[46:47]
	v_lshlrev_b32_e32 v8, 30, v133
	v_xor_b32_e32 v31, v8, v9
	v_add_f64 v[8:9], v[72:73], v[74:75]
	v_xor_b32_e32 v23, 0x80000000, v23
	v_cndmask_b32_e64 v22, v22, v28, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v23, v23, v29, s2
	v_cmp_eq_u32_e64 s2, 0, v24
	v_cndmask_b32_e64 v24, v10, v16, s2
	v_and_b32_e32 v10, 0x80000000, v31
	v_cndmask_b32_e64 v25, v11, v17, s2
	v_cndmask_b32_e64 v16, 0, v22, s1
	v_cndmask_b32_e64 v22, 0, v52, s1
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v11, v49, v10
	v_lshlrev_b32_e32 v10, 30, v132
	v_cndmask_b32_e64 v11, 0x7ff80000, v11, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v10, 0x80000000, v10
	v_xor_b32_e32 v15, v15, v10
	v_cndmask_b32_e64 v10, 0, v48, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v15, 0x7ff80000, v15, vcc_lo
	v_mul_f64 v[10:11], v[14:15], v[10:11]
	v_and_b32_e32 v14, 0x80000000, v30
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v15, v35, v14
	v_dual_cndmask_b32 v15, 0x7ff80000, v15 :: v_dual_lshlrev_b32 v14, 30, v136
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v14, 0x80000000, v14
	v_xor_b32_e32 v17, v23, v14
	v_cndmask_b32_e32 v14, 0, v34, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v17, 0x7ff80000, v17, s1
	v_mul_f64 v[14:15], v[14:15], v[16:17]
	v_lshlrev_b32_e32 v16, 30, v125
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v16, 0x80000000, v16
	v_xor_b32_e32 v17, v25, v16
	v_lshlrev_b32_e32 v16, 30, v126
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v17, 0x7ff80000, v17, s0
	v_xor_b32_e32 v16, s43, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v16, 0x80000000, v16
	v_xor_b32_e32 v23, v53, v16
	v_cndmask_b32_e64 v16, 0, v24, s0
	s_waitcnt vmcnt(0)
	v_add_f64 v[24:25], s[18:19], v[40:41]
	s_add_u32 s0, s49, s94
	v_cndmask_b32_e64 v23, 0x7ff80000, v23, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_mul_f64 v[16:17], v[16:17], v[22:23]
	global_load_b64 v[22:23], v124, s[40:41]
	v_mul_f64 v[20:21], v[24:25], v[20:21]
	v_lshlrev_b32_e32 v24, 30, v134
	v_and_b32_e32 v25, 1, v134
	v_xor_b32_e32 v24, s43, v24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_eq_u32_e32 vcc_lo, 0, v25
	v_dual_cndmask_b32 v9, v9, v19 :: v_dual_and_b32 v24, 0x80000000, v24
	v_cndmask_b32_e32 v8, v8, v18, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v9, v9, v24
	v_cndmask_b32_e64 v8, 0, v8, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v9, 0x7ff80000, v9, s1
	s_addc_u32 s1, s28, s95
	v_fma_f64 v[8:9], v[10:11], v[8:9], -v[14:15]
	v_fma_f64 v[10:11], v[12:13], v[16:17], v[20:21]
	s_waitcnt vmcnt(0)
	v_add_f64 v[18:19], s[20:21], v[22:23]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], v[18:19], v[8:9], v[10:11]
	v_xor_b32_e32 v9, 0x80000000, v9
	global_store_b64 v124, v[8:9], s[0:1]
	global_load_b64 v[8:9], v124, s[96:97]
	s_waitcnt vmcnt(0)
	v_add_f64 v[8:9], s[36:37], v[8:9]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ngt_f64_e64 s1, 0x41d00000, |v[8:9]|
	v_trig_preop_f64 v[24:25], |v[8:9]|, 0
	v_trig_preop_f64 v[20:21], |v[8:9]|, 1
	v_cmp_le_f64_e64 s0, 0x7b000000, |v[8:9]|
	v_ldexp_f64 v[26:27], |v[8:9]|, 0xffffff80
	v_trig_preop_f64 v[22:23], |v[8:9]|, 2
	v_and_b32_e32 v46, 0x7fffffff, v9
	s_and_b32 s1, exec_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 vcc_lo, s1
	s_cbranch_vccz .LBB9_128
; %bb.127:                              ;   in Loop: Header=BB9_4 Depth=3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v11, v46, v27, s0
	v_cndmask_b32_e64 v10, v8, v26, s0
	s_mov_b32 s6, s52
	s_mov_b32 s85, s83
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[12:13], v[24:25], v[10:11]
	v_mul_f64 v[14:15], v[20:21], v[10:11]
	v_fma_f64 v[16:17], v[24:25], v[10:11], -v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[18:19], v[14:15], v[16:17]
	v_add_f64 v[28:29], v[12:13], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[12:13], v[28:29], -v[12:13]
	v_ldexp_f64 v[28:29], v[28:29], -2
	v_add_f64 v[12:13], v[18:19], -v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_fract_f64_e32 v[30:31], v[28:29]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[28:29]|
	v_add_f64 v[28:29], v[18:19], -v[14:15]
	v_add_f64 v[16:17], v[16:17], -v[28:29]
	v_add_f64 v[28:29], v[18:19], -v[28:29]
	v_dual_cndmask_b32 v19, 0, v31 :: v_dual_cndmask_b32 v18, 0, v30
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[18:19], v[18:19], 2
	v_add_f64 v[28:29], v[14:15], -v[28:29]
	v_fma_f64 v[14:15], v[20:21], v[10:11], -v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[16:17], v[16:17], v[28:29]
	v_mul_f64 v[28:29], v[22:23], v[10:11]
	v_add_f64 v[30:31], v[28:29], v[14:15]
	v_fma_f64 v[10:11], v[22:23], v[10:11], -v[28:29]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[34:35], v[30:31], v[16:17]
	v_add_f64 v[32:33], v[30:31], -v[28:29]
	v_add_f64 v[36:37], v[34:35], -v[30:31]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[14:15], v[14:15], -v[32:33]
	v_add_f64 v[32:33], v[30:31], -v[32:33]
	v_add_f64 v[16:17], v[16:17], -v[36:37]
	v_add_f64 v[36:37], v[34:35], -v[36:37]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[32:33], v[28:29], -v[32:33]
	v_add_f64 v[28:29], v[12:13], v[34:35]
	v_add_f64 v[30:31], v[30:31], -v[36:37]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[14:15], v[14:15], v[32:33]
	v_add_f64 v[12:13], v[28:29], -v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[16:17], v[16:17], v[30:31]
	v_add_f64 v[30:31], v[28:29], v[18:19]
	v_add_f64 v[12:13], v[34:35], -v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[14:15], v[14:15], v[16:17]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[30:31]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_add_f64 v[10:11], v[10:11], v[14:15]
	s_and_b32 s2, vcc_lo, exec_lo
	s_cselect_b32 s51, 0x40100000, 0
	v_add_f64 v[14:15], v[18:19], s[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[12:13], v[10:11]
	v_add_f64 v[16:17], v[28:29], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_i32_f64_e32 v18, v[16:17]
	v_cvt_f64_i32_e32 v[16:17], v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[14:15], v[14:15], -v[16:17]
	v_add_f64 v[12:13], v[28:29], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[14:15], v[12:13], -v[14:15]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[12:13]
	v_add_f64 v[14:15], v[28:29], -v[14:15]
	s_and_b32 s2, vcc_lo, exec_lo
	s_cselect_b32 s51, 0x3ff00000, 0
	v_add_co_ci_u32_e64 v44, s2, 0, v18, vcc_lo
	v_add_f64 v[12:13], v[12:13], -s[50:51]
	s_mov_b32 s2, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[10:11], v[10:11], v[14:15]
	v_add_f64 v[14:15], v[12:13], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[12:13], v[14:15], -v[12:13]
	v_mul_f64 v[16:17], v[14:15], s[6:7]
	v_add_f64 v[10:11], v[10:11], -v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[12:13], v[14:15], s[6:7], -v[16:17]
	v_fma_f64 v[12:13], v[14:15], s[84:85], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[10:11], v[10:11], s[6:7], v[12:13]
	v_add_f64 v[12:13], v[16:17], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[14:15], v[12:13], -v[16:17]
	v_add_f64 v[16:17], v[10:11], -v[14:15]
	s_branch .LBB9_129
.LBB9_128:                              ;   in Loop: Header=BB9_4 Depth=3
	s_mov_b32 s2, -1
                                        ; implicit-def: $vgpr44
                                        ; implicit-def: $vgpr12_vgpr13
                                        ; implicit-def: $vgpr16_vgpr17
.LBB9_129:                              ; %Flow422
                                        ;   in Loop: Header=BB9_4 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB9_131
; %bb.130:                              ;   in Loop: Header=BB9_4 Depth=3
	v_mul_f64 v[10:11], |v[8:9]|, s[54:55]
	s_mov_b32 s82, s56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[10:11], v[10:11]
	v_fma_f64 v[12:13], v[10:11], s[52:53], |v[8:9]|
	v_mul_f64 v[14:15], v[10:11], s[56:57]
	v_cvt_i32_f64_e32 v44, v[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[18:19], v[10:11], s[56:57], v[12:13]
	v_add_f64 v[16:17], v[12:13], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[12:13], -v[16:17]
	v_add_f64 v[16:17], v[16:17], -v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[12:13], v[12:13], v[14:15]
	v_fma_f64 v[14:15], v[10:11], s[82:83], v[14:15]
	v_add_f64 v[12:13], v[16:17], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[12:13], v[12:13], -v[14:15]
	v_fma_f64 v[14:15], v[10:11], s[58:59], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[12:13], v[18:19], v[14:15]
	v_add_f64 v[16:17], v[12:13], -v[18:19]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[16:17], v[14:15], -v[16:17]
.LBB9_131:                              ; %_ZL3sind.exit365
                                        ;   in Loop: Header=BB9_4 Depth=3
	s_clause 0x1
	global_load_b64 v[14:15], v124, s[100:101]
	global_load_b64 v[10:11], v124, s[98:99]
	s_waitcnt vmcnt(1)
	v_add_f64 v[14:15], s[22:23], v[14:15]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ngt_f64_e64 s3, 0x41d00000, |v[14:15]|
	v_trig_preop_f64 v[40:41], |v[14:15]|, 0
	v_trig_preop_f64 v[36:37], |v[14:15]|, 1
	v_cmp_le_f64_e64 s2, 0x7b000000, |v[14:15]|
	v_ldexp_f64 v[42:43], |v[14:15]|, 0xffffff80
	v_trig_preop_f64 v[38:39], |v[14:15]|, 2
	v_and_b32_e32 v48, 0x7fffffff, v15
	s_and_b32 s3, exec_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 vcc_lo, s3
	s_cbranch_vccz .LBB9_133
; %bb.132:                              ;   in Loop: Header=BB9_4 Depth=3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v19, v48, v43, s2
	v_cndmask_b32_e64 v18, v14, v42, s2
	s_mov_b32 s6, s52
	s_mov_b32 s85, s83
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[28:29], v[40:41], v[18:19]
	v_mul_f64 v[30:31], v[36:37], v[18:19]
	v_fma_f64 v[32:33], v[40:41], v[18:19], -v[28:29]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[34:35], v[30:31], v[32:33]
	v_add_f64 v[49:50], v[28:29], v[34:35]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[28:29], v[49:50], -v[28:29]
	v_ldexp_f64 v[49:50], v[49:50], -2
	v_add_f64 v[28:29], v[34:35], -v[28:29]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_fract_f64_e32 v[51:52], v[49:50]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[49:50]|
	v_add_f64 v[49:50], v[34:35], -v[30:31]
	v_add_f64 v[32:33], v[32:33], -v[49:50]
	v_add_f64 v[49:50], v[34:35], -v[49:50]
	v_dual_cndmask_b32 v35, 0, v52 :: v_dual_cndmask_b32 v34, 0, v51
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[34:35], v[34:35], 2
	v_add_f64 v[49:50], v[30:31], -v[49:50]
	v_fma_f64 v[30:31], v[36:37], v[18:19], -v[30:31]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[32:33], v[32:33], v[49:50]
	v_mul_f64 v[49:50], v[38:39], v[18:19]
	v_add_f64 v[51:52], v[49:50], v[30:31]
	v_fma_f64 v[18:19], v[38:39], v[18:19], -v[49:50]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[55:56], v[51:52], v[32:33]
	v_add_f64 v[53:54], v[51:52], -v[49:50]
	v_add_f64 v[57:58], v[55:56], -v[51:52]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[30:31], v[30:31], -v[53:54]
	v_add_f64 v[53:54], v[51:52], -v[53:54]
	v_add_f64 v[32:33], v[32:33], -v[57:58]
	v_add_f64 v[57:58], v[55:56], -v[57:58]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[53:54], v[49:50], -v[53:54]
	v_add_f64 v[49:50], v[28:29], v[55:56]
	v_add_f64 v[51:52], v[51:52], -v[57:58]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[30:31], v[30:31], v[53:54]
	v_add_f64 v[28:29], v[49:50], -v[28:29]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[32:33], v[32:33], v[51:52]
	v_add_f64 v[51:52], v[49:50], v[34:35]
	v_add_f64 v[28:29], v[55:56], -v[28:29]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[30:31], v[30:31], v[32:33]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[51:52]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_add_f64 v[18:19], v[18:19], v[30:31]
	s_and_b32 s4, vcc_lo, exec_lo
	s_cselect_b32 s51, 0x40100000, 0
	v_add_f64 v[30:31], v[34:35], s[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[18:19], v[28:29], v[18:19]
	v_add_f64 v[32:33], v[49:50], v[30:31]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_i32_f64_e32 v34, v[32:33]
	v_cvt_f64_i32_e32 v[32:33], v34
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[30:31], v[30:31], -v[32:33]
	v_add_f64 v[28:29], v[49:50], v[30:31]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[30:31], v[28:29], -v[30:31]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[28:29]
	v_add_f64 v[30:31], v[49:50], -v[30:31]
	s_and_b32 s4, vcc_lo, exec_lo
	s_cselect_b32 s51, 0x3ff00000, 0
	v_add_co_ci_u32_e64 v45, s4, 0, v34, vcc_lo
	v_add_f64 v[28:29], v[28:29], -s[50:51]
	s_mov_b32 s4, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[18:19], v[18:19], v[30:31]
	v_add_f64 v[30:31], v[28:29], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[28:29], v[30:31], -v[28:29]
	v_mul_f64 v[32:33], v[30:31], s[6:7]
	v_add_f64 v[18:19], v[18:19], -v[28:29]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[28:29], v[30:31], s[6:7], -v[32:33]
	v_fma_f64 v[28:29], v[30:31], s[84:85], v[28:29]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[28:29], v[18:19], s[6:7], v[28:29]
	v_add_f64 v[18:19], v[32:33], v[28:29]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[30:31], v[18:19], -v[32:33]
	v_add_f64 v[32:33], v[28:29], -v[30:31]
	s_branch .LBB9_134
.LBB9_133:                              ;   in Loop: Header=BB9_4 Depth=3
	s_mov_b32 s4, -1
                                        ; implicit-def: $vgpr45
                                        ; implicit-def: $vgpr18_vgpr19
                                        ; implicit-def: $vgpr32_vgpr33
.LBB9_134:                              ; %Flow421
                                        ;   in Loop: Header=BB9_4 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s4
	s_cbranch_vccnz .LBB9_136
; %bb.135:                              ;   in Loop: Header=BB9_4 Depth=3
	v_mul_f64 v[18:19], |v[14:15]|, s[54:55]
	s_mov_b32 s82, s56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[28:29], v[18:19]
	v_fma_f64 v[18:19], v[28:29], s[52:53], |v[14:15]|
	v_mul_f64 v[30:31], v[28:29], s[56:57]
	v_cvt_i32_f64_e32 v45, v[28:29]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[34:35], v[28:29], s[56:57], v[18:19]
	v_add_f64 v[32:33], v[18:19], v[30:31]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[18:19], v[18:19], -v[32:33]
	v_add_f64 v[32:33], v[32:33], -v[34:35]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[18:19], v[18:19], v[30:31]
	v_fma_f64 v[30:31], v[28:29], s[82:83], v[30:31]
	v_add_f64 v[18:19], v[32:33], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[18:19], v[18:19], -v[30:31]
	v_fma_f64 v[30:31], v[28:29], s[58:59], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[18:19], v[34:35], v[30:31]
	v_add_f64 v[32:33], v[18:19], -v[34:35]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[32:33], v[30:31], -v[32:33]
.LBB9_136:                              ; %_ZL3sind.exit370
                                        ;   in Loop: Header=BB9_4 Depth=3
	s_mov_b32 vcc_lo, s1
	s_cbranch_vccz .LBB9_138
; %bb.137:                              ;   in Loop: Header=BB9_4 Depth=3
	v_cndmask_b32_e64 v29, v46, v27, s0
	v_cndmask_b32_e64 v28, v8, v26, s0
	s_mov_b32 s6, s52
	s_mov_b32 s85, s83
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[30:31], v[24:25], v[28:29]
	v_mul_f64 v[34:35], v[20:21], v[28:29]
	v_fma_f64 v[49:50], v[24:25], v[28:29], -v[30:31]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[51:52], v[34:35], v[49:50]
	v_add_f64 v[53:54], v[30:31], v[51:52]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[30:31], v[53:54], -v[30:31]
	v_ldexp_f64 v[53:54], v[53:54], -2
	v_add_f64 v[30:31], v[51:52], -v[30:31]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_fract_f64_e32 v[55:56], v[53:54]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[53:54]|
	v_add_f64 v[53:54], v[51:52], -v[34:35]
	v_add_f64 v[49:50], v[49:50], -v[53:54]
	v_add_f64 v[53:54], v[51:52], -v[53:54]
	v_dual_cndmask_b32 v52, 0, v56 :: v_dual_cndmask_b32 v51, 0, v55
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[51:52], v[51:52], 2
	v_add_f64 v[53:54], v[34:35], -v[53:54]
	v_fma_f64 v[34:35], v[20:21], v[28:29], -v[34:35]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[49:50], v[49:50], v[53:54]
	v_mul_f64 v[53:54], v[22:23], v[28:29]
	v_add_f64 v[55:56], v[53:54], v[34:35]
	v_fma_f64 v[28:29], v[22:23], v[28:29], -v[53:54]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[59:60], v[55:56], v[49:50]
	v_add_f64 v[57:58], v[55:56], -v[53:54]
	v_add_f64 v[61:62], v[59:60], -v[55:56]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[34:35], v[34:35], -v[57:58]
	v_add_f64 v[57:58], v[55:56], -v[57:58]
	v_add_f64 v[49:50], v[49:50], -v[61:62]
	v_add_f64 v[61:62], v[59:60], -v[61:62]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[57:58], v[53:54], -v[57:58]
	v_add_f64 v[53:54], v[30:31], v[59:60]
	v_add_f64 v[55:56], v[55:56], -v[61:62]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[34:35], v[34:35], v[57:58]
	v_add_f64 v[30:31], v[53:54], -v[30:31]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[49:50], v[49:50], v[55:56]
	v_add_f64 v[55:56], v[53:54], v[51:52]
	v_add_f64 v[30:31], v[59:60], -v[30:31]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[34:35], v[34:35], v[49:50]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[55:56]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_add_f64 v[28:29], v[28:29], v[34:35]
	s_and_b32 s4, vcc_lo, exec_lo
	s_cselect_b32 s51, 0x40100000, 0
	v_add_f64 v[34:35], v[51:52], s[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[28:29], v[30:31], v[28:29]
	v_add_f64 v[49:50], v[53:54], v[34:35]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_i32_f64_e32 v47, v[49:50]
	v_cvt_f64_i32_e32 v[49:50], v47
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[34:35], v[34:35], -v[49:50]
	v_add_f64 v[30:31], v[53:54], v[34:35]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[34:35], v[30:31], -v[34:35]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[30:31]
	v_add_f64 v[34:35], v[53:54], -v[34:35]
	s_and_b32 s4, vcc_lo, exec_lo
	s_cselect_b32 s51, 0x3ff00000, 0
	v_add_co_ci_u32_e64 v47, s4, 0, v47, vcc_lo
	v_add_f64 v[30:31], v[30:31], -s[50:51]
	s_mov_b32 s4, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[28:29], v[28:29], v[34:35]
	v_add_f64 v[34:35], v[30:31], v[28:29]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[30:31], v[34:35], -v[30:31]
	v_mul_f64 v[49:50], v[34:35], s[6:7]
	v_add_f64 v[28:29], v[28:29], -v[30:31]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[30:31], v[34:35], s[6:7], -v[49:50]
	v_fma_f64 v[30:31], v[34:35], s[84:85], v[30:31]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[28:29], v[28:29], s[6:7], v[30:31]
	v_add_f64 v[30:31], v[49:50], v[28:29]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[34:35], v[30:31], -v[49:50]
	v_add_f64 v[34:35], v[28:29], -v[34:35]
	s_branch .LBB9_139
.LBB9_138:                              ;   in Loop: Header=BB9_4 Depth=3
	s_mov_b32 s4, -1
                                        ; implicit-def: $vgpr47
                                        ; implicit-def: $vgpr30_vgpr31
                                        ; implicit-def: $vgpr34_vgpr35
.LBB9_139:                              ; %Flow420
                                        ;   in Loop: Header=BB9_4 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s4
	s_cbranch_vccnz .LBB9_141
; %bb.140:                              ;   in Loop: Header=BB9_4 Depth=3
	v_mul_f64 v[28:29], |v[8:9]|, s[54:55]
	s_mov_b32 s82, s56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[28:29], v[28:29]
	v_fma_f64 v[30:31], v[28:29], s[52:53], |v[8:9]|
	v_mul_f64 v[34:35], v[28:29], s[56:57]
	v_cvt_i32_f64_e32 v47, v[28:29]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[51:52], v[28:29], s[56:57], v[30:31]
	v_add_f64 v[49:50], v[30:31], v[34:35]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[30:31], v[30:31], -v[49:50]
	v_add_f64 v[49:50], v[49:50], -v[51:52]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[30:31], v[30:31], v[34:35]
	v_fma_f64 v[34:35], v[28:29], s[82:83], v[34:35]
	v_add_f64 v[30:31], v[49:50], v[30:31]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[30:31], v[30:31], -v[34:35]
	v_fma_f64 v[34:35], v[28:29], s[58:59], v[30:31]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[30:31], v[51:52], v[34:35]
	v_add_f64 v[49:50], v[30:31], -v[51:52]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[34:35], v[34:35], -v[49:50]
.LBB9_141:                              ; %_ZL3cosd.exit375
                                        ;   in Loop: Header=BB9_4 Depth=3
	global_load_b64 v[28:29], v124, s[102:103]
	s_mov_b32 vcc_lo, s3
	s_cbranch_vccz .LBB9_143
; %bb.142:                              ;   in Loop: Header=BB9_4 Depth=3
	v_cndmask_b32_e64 v43, v48, v43, s2
	v_cndmask_b32_e64 v42, v14, v42, s2
	s_mov_b32 s6, s52
	s_mov_b32 s85, s83
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[48:49], v[40:41], v[42:43]
	v_mul_f64 v[50:51], v[36:37], v[42:43]
	v_mul_f64 v[54:55], v[38:39], v[42:43]
	v_fma_f64 v[40:41], v[40:41], v[42:43], -v[48:49]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[36:37], v[36:37], v[42:43], -v[50:51]
	v_fma_f64 v[38:39], v[38:39], v[42:43], -v[54:55]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[52:53], v[50:51], v[40:41]
	v_add_f64 v[56:57], v[52:53], -v[50:51]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_f64 v[40:41], v[40:41], -v[56:57]
	v_add_f64 v[42:43], v[52:53], -v[56:57]
	v_add_f64 v[56:57], v[48:49], v[52:53]
	v_add_f64 v[42:43], v[50:51], -v[42:43]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[50:51], v[56:57], -2
	v_add_f64 v[48:49], v[56:57], -v[48:49]
	v_add_f64 v[56:57], v[54:55], v[36:37]
	v_add_f64 v[40:41], v[40:41], v[42:43]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fract_f64_e32 v[42:43], v[50:51]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[50:51]|
	v_add_f64 v[50:51], v[56:57], -v[54:55]
	v_add_f64 v[48:49], v[52:53], -v[48:49]
	v_add_f64 v[52:53], v[56:57], v[40:41]
	v_dual_cndmask_b32 v43, 0, v43 :: v_dual_cndmask_b32 v42, 0, v42
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[36:37], v[36:37], -v[50:51]
	v_add_f64 v[50:51], v[56:57], -v[50:51]
	v_ldexp_f64 v[42:43], v[42:43], 2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[50:51], v[54:55], -v[50:51]
	v_add_f64 v[54:55], v[48:49], v[52:53]
	v_add_f64 v[36:37], v[36:37], v[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[50:51], v[54:55], v[42:43]
	v_add_f64 v[48:49], v[54:55], -v[48:49]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[50:51]
	v_add_f64 v[50:51], v[52:53], -v[56:57]
	s_and_b32 s2, vcc_lo, exec_lo
	s_cselect_b32 s51, 0x40100000, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_f64 v[40:41], v[40:41], -v[50:51]
	v_add_f64 v[50:51], v[52:53], -v[50:51]
	v_add_f64 v[42:43], v[42:43], s[50:51]
	v_add_f64 v[50:51], v[56:57], -v[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[56:57], v[54:55], v[42:43]
	v_add_f64 v[40:41], v[40:41], v[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_i32_f64_e32 v56, v[56:57]
	v_add_f64 v[36:37], v[36:37], v[40:41]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cvt_f64_i32_e32 v[50:51], v56
	v_add_f64 v[40:41], v[52:53], -v[48:49]
	v_add_f64 v[36:37], v[38:39], v[36:37]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[42:43], v[42:43], -v[50:51]
	v_add_f64 v[36:37], v[40:41], v[36:37]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[50:51], v[54:55], v[42:43]
	v_add_f64 v[38:39], v[50:51], -v[42:43]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_add_f64 v[38:39], v[54:55], -v[38:39]
	s_and_b32 s2, vcc_lo, exec_lo
	s_cselect_b32 s51, 0x3ff00000, 0
	v_add_co_ci_u32_e64 v40, s2, 0, v56, vcc_lo
	s_mov_b32 s2, 0
	v_add_f64 v[36:37], v[36:37], v[38:39]
	v_add_f64 v[38:39], v[50:51], -s[50:51]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[41:42], v[38:39], v[36:37]
	v_mul_f64 v[48:49], v[41:42], s[6:7]
	v_add_f64 v[38:39], v[41:42], -v[38:39]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[50:51], v[41:42], s[6:7], -v[48:49]
	v_add_f64 v[36:37], v[36:37], -v[38:39]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[38:39], v[41:42], s[84:85], v[50:51]
	v_fma_f64 v[38:39], v[36:37], s[6:7], v[38:39]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[36:37], v[48:49], v[38:39]
	v_add_f64 v[41:42], v[36:37], -v[48:49]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[38:39], v[38:39], -v[41:42]
	s_branch .LBB9_144
.LBB9_143:                              ;   in Loop: Header=BB9_4 Depth=3
	s_mov_b32 s2, -1
                                        ; implicit-def: $vgpr40
                                        ; implicit-def: $vgpr36_vgpr37
                                        ; implicit-def: $vgpr38_vgpr39
.LBB9_144:                              ; %Flow419
                                        ;   in Loop: Header=BB9_4 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s2
	s_cbranch_vccnz .LBB9_146
; %bb.145:                              ;   in Loop: Header=BB9_4 Depth=3
	v_mul_f64 v[36:37], |v[14:15]|, s[54:55]
	s_mov_b32 s82, s56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[40:41], v[36:37]
	v_fma_f64 v[36:37], v[40:41], s[52:53], |v[14:15]|
	v_mul_f64 v[38:39], v[40:41], s[56:57]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[48:49], v[40:41], s[56:57], v[36:37]
	v_add_f64 v[42:43], v[36:37], v[38:39]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[36:37], v[36:37], -v[42:43]
	v_add_f64 v[42:43], v[42:43], -v[48:49]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[36:37], v[36:37], v[38:39]
	v_fma_f64 v[38:39], v[40:41], s[82:83], v[38:39]
	v_add_f64 v[36:37], v[42:43], v[36:37]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[36:37], v[36:37], -v[38:39]
	v_fma_f64 v[38:39], v[40:41], s[58:59], v[36:37]
	v_cvt_i32_f64_e32 v40, v[40:41]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[36:37], v[48:49], v[38:39]
	v_add_f64 v[42:43], v[36:37], -v[48:49]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[38:39], v[38:39], -v[42:43]
.LBB9_146:                              ; %_ZL3cosd.exit380
                                        ;   in Loop: Header=BB9_4 Depth=3
	s_mov_b32 vcc_lo, s1
	s_cbranch_vccz .LBB9_148
; %bb.147:                              ;   in Loop: Header=BB9_4 Depth=3
	v_cndmask_b32_e64 v27, v46, v27, s0
	v_cndmask_b32_e64 v26, v8, v26, s0
	s_mov_b32 s6, s52
	s_mov_b32 s85, s83
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[41:42], v[24:25], v[26:27]
	v_mul_f64 v[48:49], v[20:21], v[26:27]
	v_mul_f64 v[52:53], v[22:23], v[26:27]
	v_fma_f64 v[24:25], v[24:25], v[26:27], -v[41:42]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[20:21], v[20:21], v[26:27], -v[48:49]
	v_fma_f64 v[22:23], v[22:23], v[26:27], -v[52:53]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[50:51], v[48:49], v[24:25]
	v_add_f64 v[54:55], v[50:51], -v[48:49]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_f64 v[24:25], v[24:25], -v[54:55]
	v_add_f64 v[26:27], v[50:51], -v[54:55]
	v_add_f64 v[54:55], v[41:42], v[50:51]
	v_add_f64 v[26:27], v[48:49], -v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[48:49], v[54:55], -2
	v_add_f64 v[41:42], v[54:55], -v[41:42]
	v_add_f64 v[54:55], v[52:53], v[20:21]
	v_add_f64 v[24:25], v[24:25], v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fract_f64_e32 v[26:27], v[48:49]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[48:49]|
	v_add_f64 v[48:49], v[54:55], -v[52:53]
	v_add_f64 v[41:42], v[50:51], -v[41:42]
	v_add_f64 v[50:51], v[54:55], v[24:25]
	v_dual_cndmask_b32 v27, 0, v27 :: v_dual_cndmask_b32 v26, 0, v26
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[20:21], v[20:21], -v[48:49]
	v_add_f64 v[48:49], v[54:55], -v[48:49]
	v_ldexp_f64 v[26:27], v[26:27], 2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[48:49], v[52:53], -v[48:49]
	v_add_f64 v[52:53], v[41:42], v[50:51]
	v_add_f64 v[20:21], v[20:21], v[48:49]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[48:49], v[52:53], v[26:27]
	v_add_f64 v[41:42], v[52:53], -v[41:42]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[48:49]
	v_add_f64 v[48:49], v[50:51], -v[54:55]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_f64 v[41:42], v[50:51], -v[41:42]
	s_and_b32 s0, vcc_lo, exec_lo
	s_cselect_b32 s51, 0x40100000, 0
	v_add_f64 v[24:25], v[24:25], -v[48:49]
	v_add_f64 v[48:49], v[50:51], -v[48:49]
	v_add_f64 v[26:27], v[26:27], s[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[48:49], v[54:55], -v[48:49]
	v_add_f64 v[54:55], v[52:53], v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[24:25], v[24:25], v[48:49]
	v_cvt_i32_f64_e32 v43, v[54:55]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[20:21], v[20:21], v[24:25]
	v_cvt_f64_i32_e32 v[48:49], v43
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[20:21], v[22:23], v[20:21]
	v_add_f64 v[26:27], v[26:27], -v[48:49]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[20:21], v[41:42], v[20:21]
	v_add_f64 v[24:25], v[52:53], v[26:27]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[22:23], v[24:25], -v[26:27]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[24:25]
	v_add_f64 v[22:23], v[52:53], -v[22:23]
	s_and_b32 s0, vcc_lo, exec_lo
	s_cselect_b32 s51, 0x3ff00000, 0
	v_add_co_ci_u32_e64 v41, s0, 0, v43, vcc_lo
	s_mov_b32 s0, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[20:21], v[20:21], v[22:23]
	v_add_f64 v[22:23], v[24:25], -s[50:51]
	v_add_f64 v[24:25], v[22:23], v[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[26:27], v[24:25], s[6:7]
	v_add_f64 v[22:23], v[24:25], -v[22:23]
	v_fma_f64 v[42:43], v[24:25], s[6:7], -v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[20:21], v[20:21], -v[22:23]
	v_fma_f64 v[22:23], v[24:25], s[84:85], v[42:43]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[22:23], v[20:21], s[6:7], v[22:23]
	v_add_f64 v[20:21], v[26:27], v[22:23]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[24:25], v[20:21], -v[26:27]
	v_add_f64 v[22:23], v[22:23], -v[24:25]
	s_branch .LBB9_149
.LBB9_148:                              ;   in Loop: Header=BB9_4 Depth=3
	s_mov_b32 s0, -1
                                        ; implicit-def: $vgpr41
                                        ; implicit-def: $vgpr20_vgpr21
                                        ; implicit-def: $vgpr22_vgpr23
.LBB9_149:                              ; %Flow
                                        ;   in Loop: Header=BB9_4 Depth=3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB9_151
; %bb.150:                              ;   in Loop: Header=BB9_4 Depth=3
	v_mul_f64 v[20:21], |v[8:9]|, s[54:55]
	s_mov_b32 s82, s56
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[24:25], v[20:21]
	v_fma_f64 v[20:21], v[24:25], s[52:53], |v[8:9]|
	v_mul_f64 v[22:23], v[24:25], s[56:57]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[41:42], v[24:25], s[56:57], v[20:21]
	v_add_f64 v[26:27], v[20:21], v[22:23]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[20:21], v[20:21], -v[26:27]
	v_add_f64 v[26:27], v[26:27], -v[41:42]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[20:21], v[20:21], v[22:23]
	v_fma_f64 v[22:23], v[24:25], s[82:83], v[22:23]
	v_add_f64 v[20:21], v[26:27], v[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[20:21], v[20:21], -v[22:23]
	v_fma_f64 v[22:23], v[24:25], s[58:59], v[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[20:21], v[41:42], v[22:23]
	v_add_f64 v[26:27], v[20:21], -v[41:42]
	v_cvt_i32_f64_e32 v41, v[24:25]
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f64 v[22:23], v[22:23], -v[26:27]
.LBB9_151:                              ; %_ZL3cosd.exit385
                                        ;   in Loop: Header=BB9_4 Depth=3
	v_mul_f64 v[42:43], v[36:37], v[36:37]
	s_mov_b32 s86, s70
	s_waitcnt vmcnt(1)
	v_add_f64 v[10:11], s[16:17], v[10:11]
	v_cmp_class_f64_e64 s0, v[14:15], 0x1f8
	v_and_b32_e32 v14, 1, v47
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_cmp_eq_u32_e64 s1, 0, v14
	v_mul_f64 v[26:27], v[42:43], 0.5
	v_mul_f64 v[50:51], v[42:43], v[42:43]
	v_mul_f64 v[52:53], v[36:37], -v[42:43]
	v_add_f64 v[24:25], -v[26:27], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[48:49], -v[24:25], 1.0
	v_add_f64 v[26:27], v[48:49], -v[26:27]
	v_fma_f64 v[48:49], v[42:43], s[62:63], s[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[26:27], v[36:37], -v[38:39], v[26:27]
	v_fma_f64 v[48:49], v[42:43], v[48:49], s[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[48:49], v[42:43], v[48:49], s[66:67]
	v_fma_f64 v[48:49], v[42:43], v[48:49], s[68:69]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[48:49], v[42:43], v[48:49], s[70:71]
	v_fma_f64 v[26:27], v[50:51], v[48:49], v[26:27]
	v_fma_f64 v[48:49], v[42:43], s[74:75], s[72:73]
	v_mul_f64 v[50:51], v[38:39], 0.5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[48:49], v[42:43], v[48:49], s[76:77]
	v_fma_f64 v[48:49], v[42:43], v[48:49], s[78:79]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[48:49], v[42:43], v[48:49], s[80:81]
	v_fma_f64 v[48:49], v[52:53], v[48:49], v[50:51]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[38:39], v[42:43], v[48:49], -v[38:39]
	v_mul_f64 v[42:43], v[18:19], v[18:19]
	v_mul_f64 v[48:49], v[42:43], 0.5
	v_mul_f64 v[56:57], v[42:43], v[42:43]
	v_mul_f64 v[58:59], v[18:19], -v[42:43]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[50:51], -v[48:49], 1.0
	v_add_f64 v[54:55], -v[50:51], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[48:49], v[54:55], -v[48:49]
	v_fma_f64 v[54:55], v[42:43], s[62:63], s[60:61]
	v_fma_f64 v[48:49], v[18:19], -v[32:33], v[48:49]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[54:55], v[42:43], v[54:55], s[64:65]
	v_fma_f64 v[54:55], v[42:43], v[54:55], s[66:67]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[54:55], v[42:43], v[54:55], s[68:69]
	v_fma_f64 v[54:55], v[42:43], v[54:55], s[70:71]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[48:49], v[56:57], v[54:55], v[48:49]
	v_fma_f64 v[54:55], v[42:43], s[74:75], s[72:73]
	v_mul_f64 v[56:57], v[32:33], 0.5
	v_fma_f64 v[54:55], v[42:43], v[54:55], s[76:77]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[54:55], v[42:43], v[54:55], s[78:79]
	v_fma_f64 v[54:55], v[42:43], v[54:55], s[80:81]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[54:55], v[58:59], v[54:55], v[56:57]
	v_fma_f64 v[32:33], v[42:43], v[54:55], -v[32:33]
	v_mul_f64 v[42:43], v[12:13], v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[32:33], v[58:59], s[86:87], v[32:33]
	v_mul_f64 v[54:55], v[42:43], 0.5
	v_mul_f64 v[62:63], v[42:43], v[42:43]
	v_mul_f64 v[64:65], v[12:13], -v[42:43]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[18:19], v[18:19], -v[32:33]
	v_add_f64 v[56:57], -v[54:55], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[60:61], -v[56:57], 1.0
	v_add_f64 v[54:55], v[60:61], -v[54:55]
	v_fma_f64 v[60:61], v[42:43], s[62:63], s[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[54:55], v[12:13], -v[16:17], v[54:55]
	v_fma_f64 v[60:61], v[42:43], v[60:61], s[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[60:61], v[42:43], v[60:61], s[66:67]
	v_fma_f64 v[60:61], v[42:43], v[60:61], s[68:69]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[60:61], v[42:43], v[60:61], s[70:71]
	v_fma_f64 v[54:55], v[62:63], v[60:61], v[54:55]
	v_fma_f64 v[60:61], v[42:43], s[74:75], s[72:73]
	v_mul_f64 v[62:63], v[16:17], 0.5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[60:61], v[42:43], v[60:61], s[76:77]
	v_fma_f64 v[60:61], v[42:43], v[60:61], s[78:79]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[60:61], v[42:43], v[60:61], s[80:81]
	v_fma_f64 v[60:61], v[64:65], v[60:61], v[62:63]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[16:17], v[42:43], v[60:61], -v[16:17]
	v_mul_f64 v[42:43], v[30:31], v[30:31]
	v_fma_f64 v[16:17], v[64:65], s[86:87], v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_mul_f64 v[60:61], v[42:43], 0.5
	v_mul_f64 v[68:69], v[42:43], v[42:43]
	v_mul_f64 v[70:71], v[30:31], -v[42:43]
	v_add_f64 v[12:13], v[12:13], -v[16:17]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[62:63], -v[60:61], 1.0
	v_and_b32_e32 v16, 1, v44
	v_add_f64 v[66:67], -v[62:63], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[60:61], v[66:67], -v[60:61]
	v_fma_f64 v[66:67], v[42:43], s[62:63], s[60:61]
	v_fma_f64 v[60:61], v[30:31], -v[34:35], v[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[66:67], v[42:43], v[66:67], s[64:65]
	v_fma_f64 v[66:67], v[42:43], v[66:67], s[66:67]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[66:67], v[42:43], v[66:67], s[68:69]
	v_fma_f64 v[66:67], v[42:43], v[66:67], s[70:71]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[60:61], v[68:69], v[66:67], v[60:61]
	v_fma_f64 v[66:67], v[42:43], s[74:75], s[72:73]
	v_mul_f64 v[68:69], v[34:35], 0.5
	v_fma_f64 v[66:67], v[42:43], v[66:67], s[76:77]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[66:67], v[42:43], v[66:67], s[78:79]
	v_fma_f64 v[66:67], v[42:43], v[66:67], s[80:81]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[66:67], v[70:71], v[66:67], v[68:69]
	v_fma_f64 v[34:35], v[42:43], v[66:67], -v[34:35]
	v_mul_f64 v[42:43], v[20:21], v[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[66:67], v[42:43], 0.5
	v_mul_f64 v[74:75], v[42:43], v[42:43]
	v_mul_f64 v[76:77], v[20:21], -v[42:43]
	v_add_f64 v[68:69], -v[66:67], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[72:73], -v[68:69], 1.0
	v_add_f64 v[66:67], v[72:73], -v[66:67]
	v_fma_f64 v[72:73], v[42:43], s[62:63], s[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[66:67], v[20:21], -v[22:23], v[66:67]
	v_fma_f64 v[72:73], v[42:43], v[72:73], s[64:65]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[72:73], v[42:43], v[72:73], s[66:67]
	v_fma_f64 v[72:73], v[42:43], v[72:73], s[68:69]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[72:73], v[42:43], v[72:73], s[70:71]
	v_fma_f64 v[66:67], v[74:75], v[72:73], v[66:67]
	v_fma_f64 v[72:73], v[42:43], s[74:75], s[72:73]
	v_mul_f64 v[74:75], v[22:23], 0.5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[72:73], v[42:43], v[72:73], s[76:77]
	v_fma_f64 v[72:73], v[42:43], v[72:73], s[78:79]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[72:73], v[42:43], v[72:73], s[80:81]
	v_fma_f64 v[72:73], v[76:77], v[72:73], v[74:75]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_fma_f64 v[22:23], v[42:43], v[72:73], -v[22:23]
	v_add_f64 v[42:43], v[50:51], v[48:49]
	v_and_b32_e32 v32, 1, v45
	v_cmp_eq_u32_e32 vcc_lo, 0, v32
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_dual_cndmask_b32 v33, v43, v19 :: v_dual_cndmask_b32 v32, v42, v18
	v_add_f64 v[18:19], v[56:57], v[54:55]
	v_cmp_eq_u32_e32 vcc_lo, 0, v16
	v_fma_f64 v[16:17], v[52:53], s[86:87], v[38:39]
	v_dual_cndmask_b32 v43, v19, v13 :: v_dual_cndmask_b32 v42, v18, v12
	v_fma_f64 v[12:13], v[70:71], s[86:87], v[34:35]
	v_fma_f64 v[18:19], v[76:77], s[86:87], v[22:23]
	v_add_f64 v[22:23], v[62:63], v[60:61]
	v_cmp_class_f64_e64 vcc_lo, v[8:9], 0x1f8
	v_add_f64 v[16:17], v[36:37], -v[16:17]
	v_add_f64 v[12:13], v[30:31], -v[12:13]
	v_lshlrev_b32_e32 v30, 30, v44
	v_add_f64 v[18:19], v[20:21], -v[18:19]
	v_lshlrev_b32_e32 v20, 30, v45
	v_xor_b32_e32 v17, 0x80000000, v17
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v30, v30, v9
	v_add_f64 v[8:9], v[24:25], v[26:27]
	v_xor_b32_e32 v20, v20, v15
	v_add_f64 v[24:25], v[68:69], v[66:67]
	v_xor_b32_e32 v13, 0x80000000, v13
	v_cndmask_b32_e64 v14, v12, v22, s1
	v_and_b32_e32 v12, 0x80000000, v30
	v_and_b32_e32 v22, 1, v40
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v15, v13, v23, s1
	v_lshlrev_b32_e32 v23, 30, v41
	v_xor_b32_e32 v13, v43, v12
	v_cndmask_b32_e32 v12, 0, v42, vcc_lo
	v_cndmask_b32_e32 v14, 0, v14, vcc_lo
	v_cmp_eq_u32_e64 s1, 0, v22
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v13, 0x7ff80000, v13 :: v_dual_lshlrev_b32 v22, 30, v40
	v_cndmask_b32_e64 v8, v16, v8, s1
	v_and_b32_e32 v16, 1, v41
	s_delay_alu instid0(VALU_DEP_3)
	v_mul_f64 v[10:11], v[10:11], v[12:13]
	v_and_b32_e32 v12, 0x80000000, v20
	s_waitcnt vmcnt(0)
	v_add_f64 v[20:21], s[18:19], v[28:29]
	v_cndmask_b32_e64 v9, v17, v9, s1
	v_cmp_eq_u32_e64 s2, 0, v16
	v_xor_b32_e32 v16, 0x80000000, v19
	v_xor_b32_e32 v13, v33, v12
	v_lshlrev_b32_e32 v12, 30, v47
	v_cndmask_b32_e64 v8, 0, v8, s0
	v_cndmask_b32_e64 v17, v18, v24, s2
	v_and_b32_e32 v19, 0x80000000, v22
	v_cndmask_b32_e64 v13, 0x7ff80000, v13, s0
	v_and_b32_e32 v12, 0x80000000, v12
	v_and_b32_e32 v22, 0x80000000, v23
	v_cndmask_b32_e64 v16, v16, v25, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v15, v15, v12
	v_cndmask_b32_e64 v12, 0, v32, s0
	v_xor_b32_e32 v18, v16, v22
	v_cndmask_b32_e32 v16, 0, v17, vcc_lo
	v_xor_b32_e32 v9, v9, v19
	v_cndmask_b32_e32 v15, 0x7ff80000, v15, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v17, 0x7ff80000, v18, vcc_lo
	v_cndmask_b32_e64 v9, 0x7ff80000, v9, s0
	s_delay_alu instid0(VALU_DEP_3)
	v_mul_f64 v[12:13], v[12:13], v[14:15]
	global_load_b64 v[14:15], v124, s[40:41]
	s_add_u32 s0, s29, s94
	s_addc_u32 s1, s30, s95
	v_mul_f64 v[8:9], v[8:9], v[16:17]
	s_add_u32 s2, s45, s94
	s_addc_u32 s3, s46, s95
	v_fma_f64 v[10:11], v[20:21], v[12:13], -v[10:11]
	s_waitcnt vmcnt(0)
	v_add_f64 v[12:13], s[20:21], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], v[12:13], v[8:9], v[10:11]
	v_xor_b32_e32 v9, 0x80000000, v9
	global_store_b64 v124, v[8:9], s[0:1]
	global_load_b64 v[8:9], v124, s[2:3]
	v_readlane_b32 s2, v155, 7
	v_readlane_b32 s3, v155, 8
	s_add_u32 s0, s31, s94
	s_addc_u32 s1, s44, s95
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_add_u32 s2, s2, s94
	s_addc_u32 s3, s3, s95
	s_waitcnt vmcnt(0)
	global_store_b64 v124, v[8:9], s[0:1]
	global_load_b64 v[8:9], v124, s[2:3]
	v_readlane_b32 s2, v155, 9
	v_readlane_b32 s3, v155, 10
	s_add_u32 s0, s33, s94
	s_addc_u32 s1, s24, s95
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_add_u32 s2, s2, s94
	s_addc_u32 s3, s3, s95
	s_waitcnt vmcnt(0)
	global_store_b64 v124, v[8:9], s[0:1]
	global_load_b64 v[8:9], v124, s[2:3]
	s_add_u32 s2, s25, s94
	s_addc_u32 s3, s26, s95
	s_add_i32 s0, s92, 1
	s_cmpk_gt_i32 s92, 0x18e
	s_waitcnt vmcnt(0)
	global_store_b64 v124, v[8:9], s[2:3]
	s_cbranch_scc0 .LBB9_4
; %bb.152:                              ; %Flow451
                                        ;   in Loop: Header=BB9_2 Depth=2
	v_readlane_b32 s4, v155, 19
	v_readlane_b32 s5, v155, 20
.LBB9_153:                              ; %._crit_edge
                                        ;   in Loop: Header=BB9_2 Depth=2
	s_delay_alu instid0(VALU_DEP_2)
	s_add_i32 s4, s4, 1
	s_add_u32 s88, s88, 0x60
	s_addc_u32 s89, s89, 0
	s_cmp_eq_u32 s4, 12
	s_cbranch_scc0 .LBB9_2
; %bb.154:                              ;   in Loop: Header=BB9_1 Depth=1
	v_readlane_b32 s3, v155, 6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s3, s3, 1
	s_cmpk_eq_i32 s3, 0x64
	s_cbranch_scc0 .LBB9_1
; %bb.155:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z23predicted_vehicle_state13hipPitchedPtrS_PdS0_S0_S0_diS0_S0_S0_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 136
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 157
		.amdhsa_next_free_sgpr 105
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end9:
	.size	_Z23predicted_vehicle_state13hipPitchedPtrS_PdS0_S0_S0_diS0_S0_S0_, .Lfunc_end9-_Z23predicted_vehicle_state13hipPitchedPtrS_PdS0_S0_S0_diS0_S0_S0_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 35688
; NumSgprs: 107
; NumVgprs: 157
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 13
; VGPRBlocks: 19
; NumSGPRsForWavesPerEU: 107
; NumVGPRsForWavesPerEU: 157
; Occupancy: 9
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z7helper113hipPitchedPtrS_diPdS0_S0_S0_S0_S0_S0_S0_S0_S0_Pi ; -- Begin function _Z7helper113hipPitchedPtrS_diPdS0_S0_S0_S0_S0_S0_S0_S0_S0_Pi
	.globl	_Z7helper113hipPitchedPtrS_diPdS0_S0_S0_S0_S0_S0_S0_S0_S0_Pi
	.p2align	8
	.type	_Z7helper113hipPitchedPtrS_diPdS0_S0_S0_S0_S0_S0_S0_S0_S0_Pi,@function
_Z7helper113hipPitchedPtrS_diPdS0_S0_S0_S0_S0_S0_S0_S0_S0_Pi: ; @_Z7helper113hipPitchedPtrS_diPdS0_S0_S0_S0_S0_S0_S0_S0_S0_Pi
; %bb.0:
	s_clause 0x5
	s_load_b32 s38, s[0:1], 0x48
	s_load_b128 s[20:23], s[0:1], 0x20
	s_load_b128 s[24:27], s[0:1], 0x0
	s_load_b64 s[36:37], s[0:1], 0x40
	s_load_b512 s[4:19], s[0:1], 0x50
	s_load_b128 s[0:3], s[0:1], 0x90
	v_mov_b32_e32 v22, 0
	s_mov_b32 s44, 0xd2f1a9fc
	s_mov_b32 s46, 0x9999999a
	s_mov_b32 s65, 1
	s_mov_b32 s45, 0x3f30624d
	s_mov_b32 s47, 0x3f999999
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s39, s38, 31
	s_mul_i32 s30, s23, 6
	s_mul_i32 s34, s27, 6
	v_mul_f64 v[0:1], s[36:37], 0.5
	s_mul_hi_u32 s35, s26, 6
	s_mul_hi_u32 s31, s22, 6
	s_add_i32 s62, s35, s34
	s_mul_i32 s34, s27, 3
	s_mul_hi_u32 s35, s26, 3
	s_mul_i32 s40, s23, 3
	s_mul_hi_u32 s41, s22, 3
	s_mul_i32 s42, s23, 5
	s_mul_hi_u32 s43, s22, 5
	s_add_i32 s66, s35, s34
	s_lshl_b64 s[34:35], s[38:39], 3
	s_lshl_b64 s[28:29], s[22:23], 2
	s_add_i32 s61, s31, s30
	s_add_i32 s63, s41, s40
	s_add_i32 s64, s43, s42
	s_add_i32 s40, s38, -1
	s_lshl_b64 s[30:31], s[26:27], 1
	s_add_u32 s14, s14, s34
	s_addc_u32 s15, s15, s35
	s_add_u32 s12, s12, s34
	s_addc_u32 s13, s13, s35
	s_add_u32 s16, s16, s34
	s_addc_u32 s17, s17, s35
	s_add_u32 s18, s18, s34
	s_addc_u32 s19, s19, s35
	s_add_u32 s0, s0, s34
	s_addc_u32 s1, s1, s35
	s_add_u32 s2, s2, s34
	s_addc_u32 s3, s3, s35
	s_ashr_i32 s41, s40, 31
	s_add_i32 s68, s38, -2
	s_lshl_b64 s[48:49], s[40:41], 3
	v_cmp_gt_i64_e64 s69, 0x191, s[38:39]
	s_add_u32 s4, s4, s48
	s_addc_u32 s5, s5, s49
	s_add_u32 s6, s6, s48
	s_addc_u32 s7, s7, s49
	s_add_u32 s8, s8, s48
	s_addc_u32 s9, s9, s49
	s_mov_b32 s36, 0
	s_mov_b32 s38, 0xa0b5ed8d
	s_mov_b32 s40, 0x75f6fd2
	s_mov_b32 s42, 0xeb1c432d
	s_add_u32 s10, s10, s48
	s_mul_i32 s33, s22, 6
	s_mul_i32 s58, s26, 6
	s_mul_i32 s59, s22, 3
	s_mul_i32 s60, s22, 5
	s_mul_i32 s67, s26, 3
	s_mov_b32 s37, 0x7ff80000
	s_mov_b32 s39, 0x3eb0c6f7
	s_mov_b32 s41, 0x3f9119ce
	s_mov_b32 s43, 0x3efa36e2
	s_addc_u32 s11, s11, s49
	s_mov_b32 s49, 0x3fa99999
.LBB10_1:                               ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB10_3 Depth 2
	v_mov_b32_e32 v2, 0
	v_mov_b32_e32 v3, 0
	s_and_not1_b32 vcc_lo, exec_lo, s69
	s_cbranch_vccnz .LBB10_5
; %bb.2:                                ; %.lr.ph
                                        ;   in Loop: Header=BB10_1 Depth=1
	s_clause 0x3
	global_load_b64 v[2:3], v22, s[14:15] offset:-8
	global_load_b64 v[4:5], v22, s[16:17] offset:-8
	global_load_b64 v[6:7], v22, s[0:1] offset:-8
	global_load_b64 v[8:9], v22, s[12:13] offset:-8
	s_mul_i32 s48, s61, s65
	s_mul_hi_u32 s50, s33, s65
	s_mul_i32 s51, s33, s65
	s_add_i32 s50, s50, s48
	s_add_u32 s48, s20, s51
	s_addc_u32 s51, s21, s50
	s_add_u32 s50, s48, s34
	s_addc_u32 s51, s51, s35
	s_add_u32 s52, s50, s59
	s_addc_u32 s53, s51, s63
	s_add_u32 s54, s50, s22
	s_addc_u32 s55, s51, s23
	s_clause 0x1
	global_load_b64 v[10:11], v22, s[18:19] offset:-8
	global_load_b64 v[12:13], v22, s[52:53] offset:-8
	s_add_u32 s52, s50, s28
	s_addc_u32 s53, s51, s29
	s_add_u32 s56, s50, s60
	s_addc_u32 s57, s51, s64
	s_clause 0x4
	global_load_b64 v[14:15], v22, s[54:55] offset:-8
	global_load_b64 v[16:17], v22, s[52:53] offset:-8
	global_load_b64 v[18:19], v22, s[50:51] offset:-8
	global_load_b64 v[20:21], v22, s[2:3] offset:-8
	global_load_b64 v[23:24], v22, s[56:57] offset:-8
	s_mov_b64 s[50:51], s[10:11]
	s_mov_b64 s[52:53], s[8:9]
	s_mov_b64 s[54:55], s[6:7]
	s_mov_b64 s[56:57], s[4:5]
	s_mov_b32 s70, s68
	s_waitcnt vmcnt(10)
	v_add_f64 v[2:3], 0x4050e000, v[2:3]
	s_waitcnt vmcnt(9)
	v_add_f64 v[4:5], v[4:5], 0
	s_waitcnt vmcnt(8)
	v_add_f64 v[6:7], v[6:7], 0
	s_waitcnt vmcnt(5)
	v_add_f64 v[8:9], v[12:13], -v[8:9]
	s_waitcnt vmcnt(3)
	v_add_f64 v[10:11], v[16:17], -v[10:11]
	s_waitcnt vmcnt(2)
	v_add_f64 v[25:26], v[18:19], -v[2:3]
	v_add_f64 v[2:3], v[14:15], -v[4:5]
	v_add_f64 v[12:13], v[12:13], -v[6:7]
	s_waitcnt vmcnt(0)
	v_add_f64 v[6:7], v[23:24], -v[20:21]
	v_add_f64 v[14:15], v[16:17], -v[20:21]
	v_add_f64 v[16:17], v[18:19], -v[4:5]
	v_mul_f64 v[4:5], v[8:9], s[38:39]
	v_mul_f64 v[18:19], v[10:11], s[42:43]
	v_ldexp_f64 v[20:21], v[25:26], -2
	v_mul_f64 v[23:24], v[2:3], s[40:41]
	v_ldexp_f64 v[27:28], v[12:13], -2
	v_mul_f64 v[29:30], v[6:7], s[44:45]
	v_mul_f64 v[2:3], v[8:9], v[4:5]
	v_mul_f64 v[4:5], v[10:11], v[18:19]
	v_mov_b32_e32 v18, 0
	v_mov_b32_e32 v19, 0
	v_mul_f64 v[6:7], v[25:26], v[20:21]
	v_mov_b32_e32 v20, 0
	v_mul_f64 v[8:9], v[16:17], v[23:24]
	v_mul_f64 v[10:11], v[12:13], v[27:28]
	v_mul_f64 v[14:15], v[14:15], v[29:30]
	v_mov_b32_e32 v12, 0
	v_dual_mov_b32 v13, 0 :: v_dual_mov_b32 v16, 0
	v_mov_b32_e32 v17, 0
	v_mov_b32_e32 v21, 0
.LBB10_3:                               ;   Parent Loop BB10_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_clause 0x3
	global_load_b64 v[23:24], v22, s[56:57]
	global_load_b64 v[25:26], v22, s[54:55]
	global_load_b64 v[27:28], v22, s[52:53]
	global_load_b64 v[29:30], v22, s[50:51]
	s_mov_b32 s48, s46
	s_add_i32 s70, s70, 1
	s_add_u32 s56, s56, 8
	s_addc_u32 s57, s57, 0
	s_add_u32 s54, s54, 8
	s_addc_u32 s55, s55, 0
	s_add_u32 s52, s52, 8
	s_addc_u32 s53, s53, 0
	s_add_u32 s50, s50, 8
	s_addc_u32 s51, s51, 0
	s_cmpk_gt_i32 s70, 0x18e
	s_waitcnt vmcnt(3)
	v_mul_f64 v[31:32], v[23:24], s[46:47]
	s_waitcnt vmcnt(2)
	v_mul_f64 v[25:26], v[25:26], s[46:47]
	s_waitcnt vmcnt(1)
	v_mul_f64 v[33:34], v[27:28], s[48:49]
	s_waitcnt vmcnt(0)
	v_mul_f64 v[35:36], v[29:30], s[46:47]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[31:32], v[23:24], v[31:32], v[6:7]
	v_fma_f64 v[23:24], v[23:24], v[25:26], v[8:9]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[25:26], v[27:28], v[33:34]
	v_fma_f64 v[27:28], v[29:30], v[35:36], v[10:11]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[29:30], v[31:32], v[2:3]
	v_add_f64 v[23:24], v[23:24], v[4:5]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[31:32], v[0:1], v[25:26]
	v_add_f64 v[27:28], v[27:28], v[14:15]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[12:13], v[0:1], v[29:30], v[12:13]
	v_fma_f64 v[16:17], v[0:1], v[23:24], v[16:17]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[18:19], v[25:26], v[31:32], v[18:19]
	v_fma_f64 v[20:21], v[0:1], v[27:28], v[20:21]
	s_cbranch_scc0 .LBB10_3
; %bb.4:                                ; %._crit_edge.loopexit
                                        ;   in Loop: Header=BB10_1 Depth=1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], v[16:17], v[12:13]
	v_add_f64 v[2:3], v[18:19], v[2:3]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[2:3], v[20:21], v[2:3]
.LBB10_5:                               ; %._crit_edge
                                        ;   in Loop: Header=BB10_1 Depth=1
	s_mul_i32 s48, s62, s65
	s_mul_hi_u32 s50, s58, s65
	s_mul_i32 s51, s58, s65
	s_add_i32 s50, s50, s48
	s_add_u32 s48, s24, s51
	s_addc_u32 s51, s25, s50
	s_add_u32 s50, s48, s34
	v_dual_mov_b32 v4, s36 :: v_dual_mov_b32 v5, s37
	s_addc_u32 s51, s51, s35
	s_add_u32 s52, s50, s26
	s_addc_u32 s53, s51, s27
	s_add_u32 s54, s50, s30
	s_addc_u32 s55, s51, s31
	global_store_b64 v22, v[4:5], s[50:51] offset:-8
	s_add_u32 s50, s50, s67
	s_addc_u32 s51, s51, s66
	s_add_i32 s65, s65, 1
	global_store_b64 v22, v[4:5], s[52:53] offset:-8
	s_cmpk_eq_i32 s65, 0x64
	s_clause 0x1
	global_store_b64 v22, v[2:3], s[54:55] offset:-8
	global_store_b64 v22, v[4:5], s[50:51] offset:-8
	s_cbranch_scc0 .LBB10_1
; %bb.6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7helper113hipPitchedPtrS_diPdS0_S0_S0_S0_S0_S0_S0_S0_S0_Pi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 168
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 37
		.amdhsa_next_free_sgpr 71
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end10:
	.size	_Z7helper113hipPitchedPtrS_diPdS0_S0_S0_S0_S0_S0_S0_S0_S0_Pi, .Lfunc_end10-_Z7helper113hipPitchedPtrS_diPdS0_S0_S0_S0_S0_S0_S0_S0_S0_Pi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1232
; NumSgprs: 73
; NumVgprs: 37
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 9
; VGPRBlocks: 4
; NumSGPRsForWavesPerEU: 73
; NumVGPRsForWavesPerEU: 37
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__const._Z15fill2D_specificPdmii.Afull,@object ; @__const._Z15fill2D_specificPdmii.Afull
	.section	.rodata,"a",@progbits
	.p2align	4, 0x0
__const._Z15fill2D_specificPdmii.Afull:
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x3feff62b6ae7d567              ; double 0.99880000000000002
	.quad	0xbf4d7dbf487fcb92              ; double -8.9999999999999998E-4
	.quad	0x3fa93dd97f62b6ae              ; double 0.049299999999999997
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x400aa8f5c28f5c29              ; double 3.3325
	.quad	0x0000000000000000              ; double 0
	.quad	0xc050e5c0ebedfa44              ; double -67.5899
	.quad	0x0000000000000000              ; double 0
	.quad	0xbfeffe5c91d14e3c              ; double -0.99980000000000002
	.quad	0xbf91eb851eb851ec              ; double -0.017500000000000002
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x4050e5c0ebedfa44              ; double 67.5899
	.quad	0x0000000000000000              ; double 0
	.quad	0x3fa93dd97f62b6ae              ; double 0.049299999999999997
	.quad	0x3f91eb851eb851ec              ; double 0.017500000000000002
	.quad	0xbfeff487fcb923a3              ; double -0.99860000000000004
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x3ff0000000000000              ; double 1
	.quad	0xbf4d7dbf487fcb92              ; double -8.9999999999999998E-4
	.quad	0x3fa94af4f0d844d0              ; double 0.049399999999999999
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x3feffe5c91d14e3c              ; double 0.99980000000000002
	.quad	0x3f91eb851eb851ec              ; double 0.017500000000000002
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0xbf9205bc01a36e2f              ; double -0.017600000000000001
	.quad	0x3ff004816f0068dc              ; double 1.0011000000000001
	.quad	0x8000000000000000              ; double -0
	.quad	0x8000000000000000              ; double -0
	.quad	0x3f2a36e2eb1c432d              ; double 2.0000000000000001E-4
	.quad	0xbffca7ef9db22d0e              ; double -1.7909999999999999
	.quad	0xc03cbf6fd21ff2e5              ; double -28.747800000000002
	.quad	0x0000000000000000              ; double 0
	.quad	0xbf8ff2e48e8a71de              ; double -0.015599999999999999
	.quad	0xbf56f0068db8bac7              ; double -0.0014
	.quad	0x3f9b089a02752546              ; double 0.0264
	.quad	0xbff0353f7ced9168              ; double -1.0129999999999999
	.quad	0x3ff1fc504816f007              ; double 1.1241000000000001
	.quad	0xbfda52bd3c361134              ; double -0.4113
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x3f1a36e2eb1c432d              ; double 1.0E-4
	.quad	0x4040923a29c779a7              ; double 33.142400000000002
	.quad	0xbfd9182a9930be0e              ; double -0.3921
	.quad	0x8000000000000000              ; double -0
	.quad	0x3f802de00d1b7176              ; double 0.0079000000000000008
	.quad	0xbfb9fbe76c8b4396              ; double -0.10150000000000001
	.quad	0x3f90e5604189374c              ; double 0.016500000000000001
	.quad	0xbff8d1b71758e219              ; double -1.5511999999999999
	.quad	0xbff82b6ae7d566cf              ; double -1.5105999999999999
	.quad	0xc0507a0902de00d2              ; double -65.906800000000004
	.quad	0x8000000000000000              ; double -0
	.quad	0x8000000000000000              ; double -0
	.quad	0xbf6b089a02752546              ; double -0.0033
	.quad	0xc0055e69ad42c3ca              ; double -2.6711
	.quad	0x3ffc34d6a161e4f7              ; double 1.7628999999999999
	.quad	0x8000000000000000              ; double -0
	.quad	0xbfc14e3bcd35a858              ; double -0.13519999999999999
	.quad	0x3f719ce075f6fd22              ; double 0.0043
	.quad	0xbfe3c432ca57a787              ; double -0.61770000000000003
	.quad	0x4021abfb15b573eb              ; double 8.8359000000000005
	.quad	0x405110902de00d1b              ; double 68.258799999999994
	.quad	0x400090cb295e9e1b              ; double 2.0707
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x3f2a36e2eb1c432d              ; double 2.0000000000000001E-4
	.quad	0xbfe734d6a161e4f7              ; double -0.72519999999999996
	.quad	0xbfe51a9fbe76c8b4              ; double -0.65949999999999998
	.quad	0x8000000000000000              ; double -0
	.quad	0x3f77c1bda5119ce0              ; double 0.0057999999999999996
	.quad	0xbf9de69ad42c3c9f              ; double -0.0292
	.quad	0x3fa5b573eab367a1              ; double 0.0424
	.quad	0xc01c780346dc5d64              ; double -7.1172000000000004
	.quad	0xbffa83e425aee632              ; double -1.6572
	.quad	0x3fc961e4f765fd8b              ; double 0.1983
	.quad	0x8000000000000000              ; double -0
	.quad	0x8000000000000000              ; double -0
	.quad	0x0000000000000000              ; double 0
	.quad	0x3fb06f694467381d              ; double 0.064199999999999993
	.quad	0xbfe750b0f27bb2ff              ; double -0.72860000000000003
	.quad	0x0000000000000000              ; double 0
	.quad	0x3f5f212d77318fc5              ; double 0.0019
	.quad	0x3f782a9930be0ded              ; double 0.0058999999999999999
	.quad	0xbf554c985f06f694              ; double -0.0012999999999999999
	.quad	0x3f83dd97f62b6ae8              ; double 0.0097000000000000002
	.quad	0xbff83bcd35a85879              ; double -1.5145999999999999
	.quad	0xbfb816f0068db8bb              ; double -0.094100000000000003
	.quad	0x8000000000000000              ; double -0
	.quad	0x8000000000000000              ; double -0
	.quad	0x0000000000000000              ; double 0
	.quad	0xbfeb2a305532617c              ; double -0.84889999999999998
	.quad	0x3f7d14e3bcd35a86              ; double 0.0071000000000000004
	.quad	0x0000000000000000              ; double 0
	.quad	0xbf6d7dbf487fcb92              ; double -0.0035999999999999999
	.quad	0x3f9119ce075f6fd2              ; double 0.0167
	.quad	0xbf661e4f765fd8ae              ; double -0.0027000000000000001
	.quad	0xbfc989374bc6a7f0              ; double -0.19950000000000001
	.quad	0xbf9aee631f8a0903              ; double -0.0263
	.quad	0xbfe3916872b020c5              ; double -0.61150000000000004
	.size	__const._Z15fill2D_specificPdmii.Afull, 1152

	.type	__const._Z15fill2D_specificPdmii.Bfull,@object ; @__const._Z15fill2D_specificPdmii.Bfull
	.p2align	4, 0x0
__const._Z15fill2D_specificPdmii.Bfull:
	.zero	32
	.zero	32
	.zero	32
	.zero	32
	.zero	32
	.zero	32
	.quad	0xbfc42f837b4a233a              ; double -0.15770000000000001
	.quad	0xbf72d77318fc5048              ; double -0.0045999999999999999
	.quad	0x3fab15b573eab368              ; double 0.052900000000000003
	.quad	0x3faec56d5cfaacda              ; double 0.060100000000000001
	.quad	0x3f942c3c9eecbfb1              ; double 0.019699999999999999
	.quad	0x3fb902de00d1b717              ; double 0.097699999999999995
	.quad	0xbfb3404ea4a8c155              ; double -0.075200000000000003
	.quad	0x3f80cb295e9e1b09              ; double 0.0082000000000000006
	.quad	0xbfc3f487fcb923a3              ; double -0.15590000000000001
	.quad	0x3f85b573eab367a1              ; double 0.0106
	.quad	0x3fb624dd2f1a9fbe              ; double 0.086499999999999993
	.quad	0xbfec75f6fd21ff2e              ; double -0.88939999999999997
	.quad	0x3f9f6fd21ff2e48f              ; double 0.030700000000000002
	.quad	0x3fbe5604189374bc              ; double 0.11849999999999999
	.quad	0xbfa23a29c779a6b5              ; double -0.0356
	.quad	0x3f7b71758e219653              ; double 0.0067000000000000002
	.quad	0x3fa15b573eab367a              ; double 0.0339
	.quad	0x3f46f0068db8bac7              ; double 6.9999999999999999E-4
	.quad	0xbf6205bc01a36e2f              ; double -0.0022000000000000001
	.quad	0x3f63a92a30553261              ; double 0.0023999999999999998
	.quad	0xbf3a36e2eb1c432d              ; double -4.0000000000000002E-4
	.quad	0x3f6e4f765fd8adac              ; double 0.0037000000000000002
	.quad	0x3f96bb98c7e28241              ; double 0.022200000000000001
	.quad	0x3f77c1bda5119ce0              ; double 0.0057999999999999996
	.size	__const._Z15fill2D_specificPdmii.Bfull, 384

	.type	__const._Z23predicted_vehicle_state13hipPitchedPtrS_PdS0_S0_S0_diS0_S0_S0_.Afull,@object ; @__const._Z23predicted_vehicle_state13hipPitchedPtrS_PdS0_S0_S0_diS0_S0_S0_.Afull
	.p2align	4, 0x0
__const._Z23predicted_vehicle_state13hipPitchedPtrS_PdS0_S0_S0_diS0_S0_S0_.Afull:
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x3feff62b6ae7d567              ; double 0.99880000000000002
	.quad	0xbf4d7dbf487fcb92              ; double -8.9999999999999998E-4
	.quad	0x3fa93dd97f62b6ae              ; double 0.049299999999999997
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x400aa8f5c28f5c29              ; double 3.3325
	.quad	0x0000000000000000              ; double 0
	.quad	0xc050e5c0ebedfa44              ; double -67.5899
	.quad	0x0000000000000000              ; double 0
	.quad	0xbfeffe5c91d14e3c              ; double -0.99980000000000002
	.quad	0xbf91eb851eb851ec              ; double -0.017500000000000002
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x4050e5c0ebedfa44              ; double 67.5899
	.quad	0x0000000000000000              ; double 0
	.quad	0x3fa93dd97f62b6ae              ; double 0.049299999999999997
	.quad	0x3f91eb851eb851ec              ; double 0.017500000000000002
	.quad	0xbfeff487fcb923a3              ; double -0.99860000000000004
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x3ff0000000000000              ; double 1
	.quad	0xbf4d7dbf487fcb92              ; double -8.9999999999999998E-4
	.quad	0x3fa94af4f0d844d0              ; double 0.049399999999999999
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x3feffe5c91d14e3c              ; double 0.99980000000000002
	.quad	0x3f91eb851eb851ec              ; double 0.017500000000000002
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0xbf9205bc01a36e2f              ; double -0.017600000000000001
	.quad	0x3ff004816f0068dc              ; double 1.0011000000000001
	.quad	0x8000000000000000              ; double -0
	.quad	0x8000000000000000              ; double -0
	.quad	0x3f2a36e2eb1c432d              ; double 2.0000000000000001E-4
	.quad	0xbffca7ef9db22d0e              ; double -1.7909999999999999
	.quad	0xc03cbf6fd21ff2e5              ; double -28.747800000000002
	.quad	0x0000000000000000              ; double 0
	.quad	0xbf8ff2e48e8a71de              ; double -0.015599999999999999
	.quad	0xbf56f0068db8bac7              ; double -0.0014
	.quad	0x3f9b089a02752546              ; double 0.0264
	.quad	0xbff0353f7ced9168              ; double -1.0129999999999999
	.quad	0x3ff1fc504816f007              ; double 1.1241000000000001
	.quad	0xbfda52bd3c361134              ; double -0.4113
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x3f1a36e2eb1c432d              ; double 1.0E-4
	.quad	0x4040923a29c779a7              ; double 33.142400000000002
	.quad	0xbfd9182a9930be0e              ; double -0.3921
	.quad	0x8000000000000000              ; double -0
	.quad	0x3f802de00d1b7176              ; double 0.0079000000000000008
	.quad	0xbfb9fbe76c8b4396              ; double -0.10150000000000001
	.quad	0x3f90e5604189374c              ; double 0.016500000000000001
	.quad	0xbff8d1b71758e219              ; double -1.5511999999999999
	.quad	0xbff82b6ae7d566cf              ; double -1.5105999999999999
	.quad	0xc0507a0902de00d2              ; double -65.906800000000004
	.quad	0x8000000000000000              ; double -0
	.quad	0x8000000000000000              ; double -0
	.quad	0xbf6b089a02752546              ; double -0.0033
	.quad	0xc0055e69ad42c3ca              ; double -2.6711
	.quad	0x3ffc34d6a161e4f7              ; double 1.7628999999999999
	.quad	0x8000000000000000              ; double -0
	.quad	0xbfc14e3bcd35a858              ; double -0.13519999999999999
	.quad	0x3f719ce075f6fd22              ; double 0.0043
	.quad	0xbfe3c432ca57a787              ; double -0.61770000000000003
	.quad	0x4021abfb15b573eb              ; double 8.8359000000000005
	.quad	0x405110902de00d1b              ; double 68.258799999999994
	.quad	0x400090cb295e9e1b              ; double 2.0707
	.quad	0x0000000000000000              ; double 0
	.quad	0x0000000000000000              ; double 0
	.quad	0x3f2a36e2eb1c432d              ; double 2.0000000000000001E-4
	.quad	0xbfe734d6a161e4f7              ; double -0.72519999999999996
	.quad	0xbfe51a9fbe76c8b4              ; double -0.65949999999999998
	.quad	0x8000000000000000              ; double -0
	.quad	0x3f77c1bda5119ce0              ; double 0.0057999999999999996
	.quad	0xbf9de69ad42c3c9f              ; double -0.0292
	.quad	0x3fa5b573eab367a1              ; double 0.0424
	.quad	0xc01c780346dc5d64              ; double -7.1172000000000004
	.quad	0xbffa83e425aee632              ; double -1.6572
	.quad	0x3fc961e4f765fd8b              ; double 0.1983
	.quad	0x8000000000000000              ; double -0
	.quad	0x8000000000000000              ; double -0
	.quad	0x0000000000000000              ; double 0
	.quad	0x3fb06f694467381d              ; double 0.064199999999999993
	.quad	0xbfe750b0f27bb2ff              ; double -0.72860000000000003
	.quad	0x0000000000000000              ; double 0
	.quad	0x3f5f212d77318fc5              ; double 0.0019
	.quad	0x3f782a9930be0ded              ; double 0.0058999999999999999
	.quad	0xbf554c985f06f694              ; double -0.0012999999999999999
	.quad	0x3f83dd97f62b6ae8              ; double 0.0097000000000000002
	.quad	0xbff83bcd35a85879              ; double -1.5145999999999999
	.quad	0xbfb816f0068db8bb              ; double -0.094100000000000003
	.quad	0x8000000000000000              ; double -0
	.quad	0x8000000000000000              ; double -0
	.quad	0x0000000000000000              ; double 0
	.quad	0xbfeb2a305532617c              ; double -0.84889999999999998
	.quad	0x3f7d14e3bcd35a86              ; double 0.0071000000000000004
	.quad	0x0000000000000000              ; double 0
	.quad	0xbf6d7dbf487fcb92              ; double -0.0035999999999999999
	.quad	0x3f9119ce075f6fd2              ; double 0.0167
	.quad	0xbf661e4f765fd8ae              ; double -0.0027000000000000001
	.quad	0xbfc989374bc6a7f0              ; double -0.19950000000000001
	.quad	0xbf9aee631f8a0903              ; double -0.0263
	.quad	0xbfe3916872b020c5              ; double -0.61150000000000004
	.size	__const._Z23predicted_vehicle_state13hipPitchedPtrS_PdS0_S0_S0_diS0_S0_S0_.Afull, 1152

	.type	__const._Z23predicted_vehicle_state13hipPitchedPtrS_PdS0_S0_S0_diS0_S0_S0_.Bfull,@object ; @__const._Z23predicted_vehicle_state13hipPitchedPtrS_PdS0_S0_S0_diS0_S0_S0_.Bfull
	.p2align	4, 0x0
__const._Z23predicted_vehicle_state13hipPitchedPtrS_PdS0_S0_S0_diS0_S0_S0_.Bfull:
	.zero	32
	.zero	32
	.zero	32
	.zero	32
	.zero	32
	.zero	32
	.quad	0xbfc42f837b4a233a              ; double -0.15770000000000001
	.quad	0xbf72d77318fc5048              ; double -0.0045999999999999999
	.quad	0x3fab15b573eab368              ; double 0.052900000000000003
	.quad	0x3faec56d5cfaacda              ; double 0.060100000000000001
	.quad	0x3f942c3c9eecbfb1              ; double 0.019699999999999999
	.quad	0x3fb902de00d1b717              ; double 0.097699999999999995
	.quad	0xbfb3404ea4a8c155              ; double -0.075200000000000003
	.quad	0x3f80cb295e9e1b09              ; double 0.0082000000000000006
	.quad	0xbfc3f487fcb923a3              ; double -0.15590000000000001
	.quad	0x3f85b573eab367a1              ; double 0.0106
	.quad	0x3fb624dd2f1a9fbe              ; double 0.086499999999999993
	.quad	0xbfec75f6fd21ff2e              ; double -0.88939999999999997
	.quad	0x3f9f6fd21ff2e48f              ; double 0.030700000000000002
	.quad	0x3fbe5604189374bc              ; double 0.11849999999999999
	.quad	0xbfa23a29c779a6b5              ; double -0.0356
	.quad	0x3f7b71758e219653              ; double 0.0067000000000000002
	.quad	0x3fa15b573eab367a              ; double 0.0339
	.quad	0x3f46f0068db8bac7              ; double 6.9999999999999999E-4
	.quad	0xbf6205bc01a36e2f              ; double -0.0022000000000000001
	.quad	0x3f63a92a30553261              ; double 0.0023999999999999998
	.quad	0xbf3a36e2eb1c432d              ; double -4.0000000000000002E-4
	.quad	0x3f6e4f765fd8adac              ; double 0.0037000000000000002
	.quad	0x3f96bb98c7e28241              ; double 0.022200000000000001
	.quad	0x3f77c1bda5119ce0              ; double 0.0057999999999999996
	.size	__const._Z23predicted_vehicle_state13hipPitchedPtrS_PdS0_S0_S0_diS0_S0_S0_.Bfull, 384

	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 24
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z3addiPfS_
    .private_segment_fixed_size: 0
    .sgpr_count:     5
    .sgpr_spill_count: 0
    .symbol:         _Z3addiPfS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     3
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           8
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 24
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6fill1DiPdd
    .private_segment_fixed_size: 0
    .sgpr_count:     5
    .sgpr_spill_count: 0
    .symbol:         _Z6fill1DiPdd.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     3
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           8
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 24
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6fill2DPdmii
    .private_segment_fixed_size: 0
    .sgpr_count:     0
    .sgpr_spill_count: 0
    .symbol:         _Z6fill2DPdmii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     0
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           8
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 24
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15fill2D_specificPdmii
    .private_segment_fixed_size: 0
    .sgpr_count:     22
    .sgpr_spill_count: 0
    .symbol:         _Z15fill2D_specificPdmii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     3
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           32
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 44
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6fill3D13hipPitchedPtriii
    .private_segment_fixed_size: 0
    .sgpr_count:     0
    .sgpr_spill_count: 0
    .symbol:         _Z6fill3D13hipPitchedPtriii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     0
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           32
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .offset:         56
        .size:           8
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 64
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10fill3Dto2D13hipPitchedPtriiiPdd
    .private_segment_fixed_size: 0
    .sgpr_count:     28
    .sgpr_spill_count: 0
    .symbol:         _Z10fill3Dto2D13hipPitchedPtriiiPdd.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     3
    .vgpr_spill_count: 0
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amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
