#include <stdio.h>
#include <iostream>
#include <stdlib.h>

using namespace std;

__global__ void MM(int m, int k, int n, int *A, int *B, int *C)
{

	int Row = blockIdx.y * blockDim.y + threadIdx.y;
	int Col = blockIdx.x * blockDim.x + threadIdx.x;

	if((Row < m) && (Col < k))
	{
		int Cvalue = 0;
		for(int i = 0; i < n; i++)
			Cvalue += A[Row*n+i] * B[Col +i*k];

		C[Row*k+Col] = Cvalue; 
	}
}






int main(int argc, char* argv[])
{
	
  char file1[100], file2[100], file3[100];
  strcpy(file3,argv[1]);
  strcpy(file1,argv[2]);
  strcpy(file2,argv[3]);

  FILE *handle1 = fopen(file1, "r");
  FILE *handle2 = fopen(file2, "r");
  FILE *handle3 = fopen(file3,"r");

  int m,n,k;

  fscanf(handle1, "%d", &m);
  fscanf(handle1, "%d", &k);
  fscanf(handle2, "%d", &k);
  fscanf(handle2, "%d", &n);
  fscanf(handle3, "%d", &m);  
  fscanf(handle3, "%d", &n);

  //cout<<m<<" "<<n<<" "<<k<<endl;

  int (*pA), (*pB), (*pC);

  int i,j;
  int a[500*500], b[500*500], c[500*500], c_ans[500*500];

  for(i=0;i<m;i++)
  	for(j=0;j<k;j++)
  	{
  		fscanf(handle1, "%d", &a[i*k + j]);
  	}

  for(i=0;i<k;i++)
  	for(j=0;j<n;j++)
  	{
  		fscanf(handle2, "%d", &b[i*n + j]);
  	}

  for(i=0;i<m;i++)
  	for(j=0;j<n;j++)
  	{
  		fscanf(handle3, "%d", &c_ans[i*n + j]);
  	}


  	cudaMalloc((void**)&pA, (m*k)*sizeof(int));
	cudaMalloc((void**)&pB, (k*n)*sizeof(int));
	cudaMalloc((void**)&pC, (m*n)*sizeof(int));

	cudaMemcpy(pA, a, (m*k)*sizeof(int), cudaMemcpyHostToDevice);
	cudaMemcpy(pB, b, (k*n)*sizeof(int), cudaMemcpyHostToDevice);
	cudaMemcpy(pC, c, (m*n)*sizeof(int), cudaMemcpyHostToDevice);


  	dim3 dimBlock(32, 32);
    dim3 dimGrid(max(m,max(n,k))/dimBlock.x+1, max(m,max(k,n))/dimBlock.y+1);
    //cout<<dimGrid.x<<" "<<dimGrid.y<<endl;
	
	MM<<<dimGrid,dimBlock>>>(m,n,k,pA,pB,pC);  

	cudaMemcpy(c, pC, (m*n)*sizeof(int), cudaMemcpyDeviceToHost);

	cout<<"Verifying results: \n";

	int flag = 1;
	for(i=0;i<m;i++)
		{
			for(j=0;j<n;j++)
		{
			if(c[i*n + j] != c_ans[i*n+ j])
			{
				flag = 0;
				cout<<"Wrong answer\n" << c[i*n + j]<<" "<<c_ans[i*n + j]<<endl<<i<<" "<<j<<endl;
				break;
			}
		}
		//if(!flag)
			//break;
	}

	if(flag)
		cout<<"Answer verified\n";


	cudaFree(pA); 
	cudaFree(pB); 
	cudaFree(pC);



  
}
	.file	"tmpxft_00223ad2_00000000-6_q4.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3638:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3638:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z28__device_stub__Z2MMiiiPiS_S_iiiPiS_S_
	.type	_Z28__device_stub__Z2MMiiiPiS_S_iiiPiS_S_, @function
_Z28__device_stub__Z2MMiiiPiS_S_iiiPiS_S_:
.LFB3660:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movl	%edi, 44(%rsp)
	leaq	72(%rsp), %rdi
	movl	%esi, 40(%rsp)
	leaq	84(%rsp), %rsi
	movl	%edx, 36(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 24(%rsp)
	leaq	64(%rsp), %rcx
	movq	%r8, 16(%rsp)
	movq	%r9, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	44(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	36(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z2MMiiiPiS_S_(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L2:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3660:
	.size	_Z28__device_stub__Z2MMiiiPiS_S_iiiPiS_S_, .-_Z28__device_stub__Z2MMiiiPiS_S_iiiPiS_S_
	.globl	_Z2MMiiiPiS_S_
	.type	_Z2MMiiiPiS_S_, @function
_Z2MMiiiPiS_S_:
.LFB3661:
	.cfi_startproc
	endbr64
	jmp	_Z28__device_stub__Z2MMiiiPiS_S_iiiPiS_S_
	.cfi_endproc
.LFE3661:
	.size	_Z2MMiiiPiS_S_, .-_Z2MMiiiPiS_S_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"r"
.LC1:
	.string	"%d"
.LC2:
	.string	"Verifying results: \n"
.LC3:
	.string	"Wrong answer\n"
.LC4:
	.string	" "
.LC5:
	.string	"Answer verified\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	leaq	-3997696(%rsp), %r11
	.cfi_def_cfa 11, 3997752
.LPSRL0:
	subq	$4096, %rsp
	orq	$0, (%rsp)
	cmpq	%r11, %rsp
	jne	.LPSRL0
	.cfi_def_cfa_register 7
	subq	$2696, %rsp
	.cfi_def_cfa_offset 4000448
	movl	$100, %edx
	movq	%fs:40, %rax
	movq	%rax, 4000376(%rsp)
	xorl	%eax, %eax
	movq	%rsi, %rbx
	movq	8(%rsi), %rsi
	leaq	12(%rsp), %r15
	leaq	4000276(%rsp), %rbp
	leaq	4000076(%rsp), %r13
	movq	%rbp, %rdi
	leaq	4000176(%rsp), %r12
	leaq	20(%rsp), %r14
	call	__strcpy_chk@PLT
	movq	16(%rbx), %rsi
	movq	%r13, %rdi
	movl	$100, %edx
	call	__strcpy_chk@PLT
	movq	24(%rbx), %rsi
	movl	$100, %edx
	movq	%r12, %rdi
	leaq	.LC0(%rip), %rbx
	call	__strcpy_chk@PLT
	movq	%rbx, %rsi
	movq	%r13, %rdi
	call	fopen@PLT
	movq	%rbx, %rsi
	movq	%r12, %rdi
	movq	%rax, %r13
	call	fopen@PLT
	movq	%rbx, %rsi
	movq	%rbp, %rdi
	leaq	76(%rsp), %rbx
	movq	%rax, %r12
	call	fopen@PLT
	movq	%r15, %rdx
	leaq	.LC1(%rip), %rsi
	movq	%r13, %rdi
	movq	%rax, %rbp
	xorl	%eax, %eax
	call	__isoc23_fscanf@PLT
	movq	%r14, %rdx
	movq	%r13, %rdi
	xorl	%eax, %eax
	leaq	.LC1(%rip), %rsi
	call	__isoc23_fscanf@PLT
	movq	%r14, %rdx
	movq	%r12, %rdi
	leaq	16(%rsp), %r14
	leaq	.LC1(%rip), %rsi
	xorl	%eax, %eax
	call	__isoc23_fscanf@PLT
	movq	%r14, %rdx
	movq	%r12, %rdi
	xorl	%eax, %eax
	leaq	.LC1(%rip), %rsi
	call	__isoc23_fscanf@PLT
	movq	%r15, %rdx
	movq	%rbp, %rdi
	xorl	%eax, %eax
	leaq	.LC1(%rip), %rsi
	call	__isoc23_fscanf@PLT
	movq	%r14, %rdx
	movq	%rbp, %rdi
	xorl	%eax, %eax
	leaq	.LC1(%rip), %rsi
	xorl	%r14d, %r14d
	call	__isoc23_fscanf@PLT
.L9:
	cmpl	%r14d, 12(%rsp)
	jle	.L34
	xorl	%r15d, %r15d
.L11:
	movl	20(%rsp), %eax
	cmpl	%r15d, %eax
	jle	.L35
	imull	%r14d, %eax
	leaq	.LC1(%rip), %rsi
	movq	%r13, %rdi
	addl	%r15d, %eax
	incl	%r15d
	cltq
	leaq	(%rbx,%rax,4), %rdx
	xorl	%eax, %eax
	call	__isoc23_fscanf@PLT
	jmp	.L11
.L35:
	incl	%r14d
	jmp	.L9
.L34:
	xorl	%r13d, %r13d
	leaq	1000076(%rsp), %r15
.L12:
	cmpl	%r13d, 20(%rsp)
	jle	.L36
	xorl	%r14d, %r14d
.L14:
	movl	16(%rsp), %eax
	cmpl	%r14d, %eax
	jle	.L37
	imull	%r13d, %eax
	leaq	.LC1(%rip), %rsi
	movq	%r12, %rdi
	addl	%r14d, %eax
	incl	%r14d
	cltq
	leaq	(%r15,%rax,4), %rdx
	xorl	%eax, %eax
	call	__isoc23_fscanf@PLT
	jmp	.L14
.L37:
	incl	%r13d
	jmp	.L12
.L36:
	xorl	%r12d, %r12d
	leaq	3000076(%rsp), %r14
.L15:
	movl	12(%rsp), %esi
	cmpl	%r12d, %esi
	jle	.L38
	xorl	%r13d, %r13d
.L17:
	movl	16(%rsp), %eax
	cmpl	%r13d, %eax
	jle	.L39
	imull	%r12d, %eax
	leaq	.LC1(%rip), %rsi
	movq	%rbp, %rdi
	addl	%r13d, %eax
	incl	%r13d
	cltq
	leaq	(%r14,%rax,4), %rdx
	xorl	%eax, %eax
	call	__isoc23_fscanf@PLT
	jmp	.L17
.L39:
	incl	%r12d
	jmp	.L15
.L38:
	imull	20(%rsp), %esi
	leaq	24(%rsp), %rdi
	leaq	2000076(%rsp), %rbx
	movslq	%esi, %rsi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movl	20(%rsp), %esi
	imull	16(%rsp), %esi
	leaq	32(%rsp), %rdi
	movslq	%esi, %rsi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movl	12(%rsp), %esi
	imull	16(%rsp), %esi
	leaq	40(%rsp), %rdi
	movslq	%esi, %rsi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movl	12(%rsp), %edx
	imull	20(%rsp), %edx
	leaq	76(%rsp), %rsi
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movslq	%edx, %rdx
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movl	20(%rsp), %edx
	imull	16(%rsp), %edx
	leaq	1000076(%rsp), %rsi
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movslq	%edx, %rdx
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movl	12(%rsp), %edx
	imull	16(%rsp), %edx
	movq	%rbx, %rsi
	movq	40(%rsp), %rdi
	movl	$1, %ecx
	movslq	%edx, %rdx
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movl	20(%rsp), %edx
	movl	16(%rsp), %eax
	movl	$1, %ecx
	movl	$1, %esi
	movl	$1, 72(%rsp)
	cmpl	%edx, %eax
	movl	$1, 60(%rsp)
	cmovl	%edx, %eax
	movl	12(%rsp), %edx
	cmpl	%edx, %eax
	cmovl	%edx, %eax
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$137438953504, %rdx
	movq	%rdx, 52(%rsp)
	shrl	$5, %eax
	incl	%eax
	movl	%eax, 64(%rsp)
	movl	%eax, 68(%rsp)
	movq	64(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L18
	movq	40(%rsp), %r9
	movq	32(%rsp), %r8
	movq	24(%rsp), %rcx
	movl	20(%rsp), %edx
	movl	16(%rsp), %esi
	movl	12(%rsp), %edi
	call	_Z28__device_stub__Z2MMiiiPiS_S_iiiPiS_S_
.L18:
	movl	12(%rsp), %edx
	imull	16(%rsp), %edx
	movl	$2, %ecx
	xorl	%ebp, %ebp
	movq	40(%rsp), %rsi
	movq	%rbx, %rdi
	leaq	_ZSt4cout(%rip), %r12
	leaq	.LC3(%rip), %r13
	movslq	%edx, %rdx
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	leaq	.LC2(%rip), %rsi
	movq	%r12, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$1, %edx
.L19:
	cmpl	%ebp, 12(%rsp)
	jle	.L23
	movl	16(%rsp), %ecx
	xorl	%r14d, %r14d
	leaq	3000072(%rsp), %rsi
	movl	%ecx, %eax
	imull	%ebp, %eax
	cltq
	salq	$2, %rax
.L24:
	cmpl	%r14d, %ecx
	jle	.L21
	movl	(%rbx,%rax), %edi
	addq	$4, %rax
	cmpl	(%rsi,%rax), %edi
	je	.L20
	movq	%r13, %rsi
	movq	%r12, %rdi
	leaq	.LC4(%rip), %r15
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	16(%rsp), %edx
	movq	%rax, %rdi
	imull	%ebp, %edx
	addl	%r14d, %edx
	movslq	%edx, %rdx
	movl	2000076(%rsp,%rdx,4), %esi
	call	_ZNSolsEi@PLT
	movq	%r15, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	16(%rsp), %edx
	movq	%rax, %rdi
	imull	%ebp, %edx
	addl	%r14d, %edx
	movslq	%edx, %rdx
	movl	3000076(%rsp,%rdx,4), %esi
	call	_ZNSolsEi@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E@PLT
	movl	%ebp, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movq	%r15, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%r14d, %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E@PLT
	xorl	%edx, %edx
	jmp	.L21
.L20:
	incl	%r14d
	jmp	.L24
.L21:
	incl	%ebp
	jmp	.L19
.L23:
	testl	%edx, %edx
	je	.L25
	leaq	.LC5(%rip), %rsi
	movq	%r12, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
.L25:
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	4000376(%rsp), %rax
	subq	%fs:40, %rax
	je	.L26
	call	__stack_chk_fail@PLT
.L26:
	addq	$4000392, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	main, .-main
	.section	.rodata.str1.1
.LC6:
	.string	"_Z2MMiiiPiS_S_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3663:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC6(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z2MMiiiPiS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3663:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <iostream>
#include <stdlib.h>

using namespace std;

__global__ void MM(int m, int k, int n, int *A, int *B, int *C)
{

	int Row = blockIdx.y * blockDim.y + threadIdx.y;
	int Col = blockIdx.x * blockDim.x + threadIdx.x;

	if((Row < m) && (Col < k))
	{
		int Cvalue = 0;
		for(int i = 0; i < n; i++)
			Cvalue += A[Row*n+i] * B[Col +i*k];

		C[Row*k+Col] = Cvalue; 
	}
}






int main(int argc, char* argv[])
{
	
  char file1[100], file2[100], file3[100];
  strcpy(file3,argv[1]);
  strcpy(file1,argv[2]);
  strcpy(file2,argv[3]);

  FILE *handle1 = fopen(file1, "r");
  FILE *handle2 = fopen(file2, "r");
  FILE *handle3 = fopen(file3,"r");

  int m,n,k;

  fscanf(handle1, "%d", &m);
  fscanf(handle1, "%d", &k);
  fscanf(handle2, "%d", &k);
  fscanf(handle2, "%d", &n);
  fscanf(handle3, "%d", &m);  
  fscanf(handle3, "%d", &n);

  //cout<<m<<" "<<n<<" "<<k<<endl;

  int (*pA), (*pB), (*pC);

  int i,j;
  int a[500*500], b[500*500], c[500*500], c_ans[500*500];

  for(i=0;i<m;i++)
  	for(j=0;j<k;j++)
  	{
  		fscanf(handle1, "%d", &a[i*k + j]);
  	}

  for(i=0;i<k;i++)
  	for(j=0;j<n;j++)
  	{
  		fscanf(handle2, "%d", &b[i*n + j]);
  	}

  for(i=0;i<m;i++)
  	for(j=0;j<n;j++)
  	{
  		fscanf(handle3, "%d", &c_ans[i*n + j]);
  	}


  	hipMalloc((void**)&pA, (m*k)*sizeof(int));
	hipMalloc((void**)&pB, (k*n)*sizeof(int));
	hipMalloc((void**)&pC, (m*n)*sizeof(int));

	hipMemcpy(pA, a, (m*k)*sizeof(int), hipMemcpyHostToDevice);
	hipMemcpy(pB, b, (k*n)*sizeof(int), hipMemcpyHostToDevice);
	hipMemcpy(pC, c, (m*n)*sizeof(int), hipMemcpyHostToDevice);


  	dim3 dimBlock(32, 32);
    dim3 dimGrid(max(m,max(n,k))/dimBlock.x+1, max(m,max(k,n))/dimBlock.y+1);
    //cout<<dimGrid.x<<" "<<dimGrid.y<<endl;
	
	MM<<<dimGrid,dimBlock>>>(m,n,k,pA,pB,pC);  

	hipMemcpy(c, pC, (m*n)*sizeof(int), hipMemcpyDeviceToHost);

	cout<<"Verifying results: \n";

	int flag = 1;
	for(i=0;i<m;i++)
		{
			for(j=0;j<n;j++)
		{
			if(c[i*n + j] != c_ans[i*n+ j])
			{
				flag = 0;
				cout<<"Wrong answer\n" << c[i*n + j]<<" "<<c_ans[i*n + j]<<endl<<i<<" "<<j<<endl;
				break;
			}
		}
		//if(!flag)
			//break;
	}

	if(flag)
		cout<<"Answer verified\n";


	hipFree(pA); 
	hipFree(pB); 
	hipFree(pC);



  
}
	.text
	.file	"q4.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z17__device_stub__MMiiiPiS_S_  # -- Begin function _Z17__device_stub__MMiiiPiS_S_
	.type	_Z17__device_stub__MMiiiPiS_S_,@function
_Z17__device_stub__MMiiiPiS_S_:         # @_Z17__device_stub__MMiiiPiS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	20(%rsp), %rax
	movl	%edi, (%rax)
	leaq	16(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	56(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	48(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	40(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z2MMiiiPiS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z17__device_stub__MMiiiPiS_S_, .Lfunc_end0-_Z17__device_stub__MMiiiPiS_S_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$4000392, %rsp                  # imm = 0x3D0A88
	.cfi_def_cfa_offset 4000448
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %r14
	movq	8(%rsi), %rsi
	leaq	48(%rsp), %rbx
	movq	%rbx, %rdi
	callq	strcpy
	movq	16(%r14), %rsi
	leaq	272(%rsp), %r15
	movq	%r15, %rdi
	callq	strcpy
	movq	24(%r14), %rsi
	leaq	160(%rsp), %r14
	movq	%r14, %rdi
	callq	strcpy
	movl	$.L.str, %esi
	movq	%r15, %rdi
	callq	fopen
	movq	%rax, %r15
	movl	$.L.str, %esi
	movq	%r14, %rdi
	callq	fopen
	movq	%rax, %r14
	movl	$.L.str, %esi
	movq	%rbx, %rdi
	callq	fopen
	movq	%rax, %rbx
	leaq	16(%rsp), %r12
	movl	$.L.str.1, %esi
	movq	%r15, %rdi
	movq	%r12, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	leaq	20(%rsp), %r13
	movl	$.L.str.1, %esi
	movq	%r15, %rdi
	movq	%r13, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movl	$.L.str.1, %esi
	movq	%r14, %rdi
	movq	%r13, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	leaq	12(%rsp), %rbp
	movl	$.L.str.1, %esi
	movq	%r14, %rdi
	movq	%rbp, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movl	$.L.str.1, %esi
	movq	%rbx, %rdi
	movq	%r12, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movl	$.L.str.1, %esi
	movq	%rbx, %rdi
	movq	%rbp, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movl	(%r12), %ecx
	movl	(%r13), %eax
	testl	%ecx, %ecx
	jle	.LBB1_7
# %bb.1:                                # %.preheader70.preheader
	xorl	%ebp, %ebp
.LBB1_2:                                # %.preheader70
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_4 Depth 2
	testl	%eax, %eax
	jle	.LBB1_6
# %bb.3:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB1_2 Depth=1
	xorl	%r12d, %r12d
.LBB1_4:                                # %.lr.ph
                                        #   Parent Loop BB1_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	imull	%ebp, %eax
	cltq
	addq	%r12, %rax
	leaq	(%rsp,%rax,4), %rdx
	addq	$3000384, %rdx                  # imm = 0x2DC840
	movl	$.L.str.1, %esi
	movq	%r15, %rdi
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movl	20(%rsp), %eax
	incq	%r12
	cmpl	%eax, %r12d
	jl	.LBB1_4
# %bb.5:                                # %._crit_edge.loopexit
                                        #   in Loop: Header=BB1_2 Depth=1
	movl	16(%rsp), %ecx
.LBB1_6:                                # %._crit_edge
                                        #   in Loop: Header=BB1_2 Depth=1
	incl	%ebp
	cmpl	%ecx, %ebp
	jl	.LBB1_2
.LBB1_7:                                # %.preheader69
	testl	%eax, %eax
	jle	.LBB1_15
# %bb.8:                                # %.preheader68.preheader
	movl	12(%rsp), %ecx
	xorl	%ebp, %ebp
.LBB1_9:                                # %.preheader68
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_11 Depth 2
	testl	%ecx, %ecx
	jle	.LBB1_13
# %bb.10:                               # %.lr.ph75.preheader
                                        #   in Loop: Header=BB1_9 Depth=1
	xorl	%r15d, %r15d
.LBB1_11:                               # %.lr.ph75
                                        #   Parent Loop BB1_9 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	imull	%ebp, %ecx
	movslq	%ecx, %rax
	addq	%r15, %rax
	leaq	(%rsp,%rax,4), %rdx
	addq	$2000384, %rdx                  # imm = 0x1E8600
	movl	$.L.str.1, %esi
	movq	%r14, %rdi
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movl	12(%rsp), %ecx
	incq	%r15
	cmpl	%ecx, %r15d
	jl	.LBB1_11
# %bb.12:                               # %._crit_edge76.loopexit
                                        #   in Loop: Header=BB1_9 Depth=1
	movl	20(%rsp), %eax
.LBB1_13:                               # %._crit_edge76
                                        #   in Loop: Header=BB1_9 Depth=1
	incl	%ebp
	cmpl	%eax, %ebp
	jl	.LBB1_9
# %bb.14:                               # %.preheader67.loopexit
	movl	16(%rsp), %ecx
.LBB1_15:                               # %.preheader67
	testl	%ecx, %ecx
	jle	.LBB1_23
# %bb.16:                               # %.preheader66.preheader
	movl	12(%rsp), %eax
	xorl	%ebp, %ebp
.LBB1_17:                               # %.preheader66
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_19 Depth 2
	testl	%eax, %eax
	jle	.LBB1_21
# %bb.18:                               # %.lr.ph79.preheader
                                        #   in Loop: Header=BB1_17 Depth=1
	xorl	%r14d, %r14d
.LBB1_19:                               # %.lr.ph79
                                        #   Parent Loop BB1_17 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	imull	%ebp, %eax
	cltq
	addq	%r14, %rax
	leaq	(%rsp,%rax,4), %rdx
	addq	$1000384, %rdx                  # imm = 0xF43C0
	movl	$.L.str.1, %esi
	movq	%rbx, %rdi
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movl	12(%rsp), %eax
	incq	%r14
	cmpl	%eax, %r14d
	jl	.LBB1_19
# %bb.20:                               # %._crit_edge80.loopexit
                                        #   in Loop: Header=BB1_17 Depth=1
	movl	16(%rsp), %ecx
.LBB1_21:                               # %._crit_edge80
                                        #   in Loop: Header=BB1_17 Depth=1
	incl	%ebp
	cmpl	%ecx, %ebp
	jl	.LBB1_17
# %bb.22:                               # %._crit_edge82.loopexit
	movl	20(%rsp), %eax
.LBB1_23:                               # %._crit_edge82
	imull	%ecx, %eax
	movslq	%eax, %rsi
	shlq	$2, %rsi
	leaq	40(%rsp), %r15
	movq	%r15, %rdi
	callq	hipMalloc
	movslq	20(%rsp), %rax
	movslq	12(%rsp), %rsi
	imulq	%rax, %rsi
	shlq	$2, %rsi
	leaq	32(%rsp), %r14
	movq	%r14, %rdi
	callq	hipMalloc
	movslq	16(%rsp), %rax
	movslq	12(%rsp), %rsi
	imulq	%rax, %rsi
	shlq	$2, %rsi
	leaq	24(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipMalloc
	movq	(%r15), %rdi
	movslq	16(%rsp), %rax
	movslq	20(%rsp), %rdx
	imulq	%rax, %rdx
	shlq	$2, %rdx
	leaq	3000384(%rsp), %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r14), %rdi
	movslq	20(%rsp), %rax
	movslq	12(%rsp), %rdx
	imulq	%rax, %rdx
	shlq	$2, %rdx
	leaq	2000384(%rsp), %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbx), %rdi
	movslq	16(%rsp), %rax
	movslq	12(%rsp), %rdx
	imulq	%rax, %rdx
	shlq	$2, %rdx
	leaq	384(%rsp), %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	12(%rsp), %eax
	movl	20(%rsp), %ecx
	cmpl	%ecx, %eax
	cmovgl	%eax, %ecx
	movl	16(%rsp), %eax
	cmpl	%ecx, %eax
	cmovgl	%eax, %ecx
	shrl	$5, %ecx
	leaq	1(%rcx), %rax
	shlq	$32, %rax
	leaq	(%rcx,%rax), %rdi
	incq	%rdi
	movabsq	$137438953504, %rdx             # imm = 0x2000000020
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_25
# %bb.24:
	movl	16(%rsp), %edi
	movl	12(%rsp), %esi
	movl	20(%rsp), %edx
	movq	40(%rsp), %rcx
	movq	32(%rsp), %r8
	movq	24(%rsp), %r9
	callq	_Z17__device_stub__MMiiiPiS_S_
.LBB1_25:
	movq	24(%rsp), %rsi
	movslq	16(%rsp), %rax
	movslq	12(%rsp), %rdx
	imulq	%rax, %rdx
	shlq	$2, %rdx
	leaq	384(%rsp), %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$_ZSt4cout, %edi
	movl	$.L.str.2, %esi
	movl	$20, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	16(%rsp), %eax
	testl	%eax, %eax
	jle	.LBB1_34
# %bb.26:                               # %.preheader.outer.preheader
	xorl	%ecx, %ecx
	xorl	%ebx, %ebx
.LBB1_27:                               # %.preheader.outer
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_28 Depth 2
                                        #       Child Loop BB1_30 Depth 3
	movl	12(%rsp), %edx
	movl	%ebx, %esi
	imull	%edx, %esi
	movq	%rdx, %rdi
	negq	%rdi
.LBB1_28:                               # %.preheader
                                        #   Parent Loop BB1_27 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB1_30 Depth 3
	movl	%esi, %esi
	testl	%edx, %edx
	jle	.LBB1_32
# %bb.29:                               # %.lr.ph84
                                        #   in Loop: Header=BB1_28 Depth=2
	movq	%rsi, %r8
	xorl	%r15d, %r15d
.LBB1_30:                               #   Parent Loop BB1_27 Depth=1
                                        #     Parent Loop BB1_28 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movl	384(%rsp,%r8,4), %r9d
	cmpl	1000384(%rsp,%r8,4), %r9d
	jne	.LBB1_36
# %bb.31:                               #   in Loop: Header=BB1_30 Depth=3
	decq	%r15
	incq	%r8
	cmpq	%r15, %rdi
	jne	.LBB1_30
.LBB1_32:                               # %.loopexit
                                        #   in Loop: Header=BB1_28 Depth=2
	incl	%ebx
	addl	%edx, %esi
	cmpl	%eax, %ebx
	jl	.LBB1_28
	jmp	.LBB1_33
.LBB1_36:                               # %.loopexit.thread
                                        #   in Loop: Header=BB1_27 Depth=1
	movl	%r15d, %ebp
	negl	%ebp
	movl	$_ZSt4cout, %edi
	movl	$.L.str.3, %esi
	movl	$13, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movslq	12(%rsp), %rax
	movslq	%ebx, %rbx
	imulq	%rbx, %rax
	subq	%r15, %rax
	movl	384(%rsp,%rax,4), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSolsEi
	movq	%rax, %r14
	movl	$.L.str.4, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movslq	12(%rsp), %rax
	imulq	%rbx, %rax
	subq	%r15, %rax
	movl	1000384(%rsp,%rax,4), %esi
	movq	%r14, %rdi
	callq	_ZNSolsEi
	movq	%rax, %r14
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r14, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	%rax, %rdi
	movl	%ebx, %esi
	callq	_ZNSolsEi
	movq	%rax, %r14
	movl	$.L.str.4, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%r14, %rdi
	movl	%ebp, %esi
	callq	_ZNSolsEi
	movq	%rax, %r14
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r14, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	16(%rsp), %eax
	incl	%ebx
	movb	$1, %cl
	cmpl	%eax, %ebx
	jl	.LBB1_27
	jmp	.LBB1_35
.LBB1_33:                               # %._crit_edge88
	testb	$1, %cl
	jne	.LBB1_35
.LBB1_34:                               # %._crit_edge88.thread
	movl	$_ZSt4cout, %edi
	movl	$.L.str.5, %esi
	movl	$16, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.LBB1_35:                               # %._crit_edge88.thread104
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$4000392, %rsp                  # imm = 0x3D0A88
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z2MMiiiPiS_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z2MMiiiPiS_S_,@object          # @_Z2MMiiiPiS_S_
	.section	.rodata,"a",@progbits
	.globl	_Z2MMiiiPiS_S_
	.p2align	3, 0x0
_Z2MMiiiPiS_S_:
	.quad	_Z17__device_stub__MMiiiPiS_S_
	.size	_Z2MMiiiPiS_S_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"r"
	.size	.L.str, 2

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"%d"
	.size	.L.str.1, 3

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Verifying results: \n"
	.size	.L.str.2, 21

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Wrong answer\n"
	.size	.L.str.3, 14

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	" "
	.size	.L.str.4, 2

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Answer verified\n"
	.size	.L.str.5, 17

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z2MMiiiPiS_S_"
	.size	.L__unnamed_1, 15

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z17__device_stub__MMiiiPiS_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z2MMiiiPiS_S_
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z2MMiiiPiS_S_          ; -- Begin function _Z2MMiiiPiS_S_
	.globl	_Z2MMiiiPiS_S_
	.p2align	8
	.type	_Z2MMiiiPiS_S_,@function
_Z2MMiiiPiS_S_:                         ; @_Z2MMiiiPiS_S_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x34
	s_load_b128 s[4:7], s[0:1], 0x0
	v_bfe_u32 v2, v0, 10, 10
	v_and_b32_e32 v3, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[0:1], null, s15, s3, v[2:3]
	v_mad_u64_u32 v[1:2], null, s14, s2, v[3:4]
	v_cmp_gt_i32_e32 vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s2, s5, v1
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_6
; %bb.1:                                ; %.preheader
	s_clause 0x1
	s_load_b128 s[8:11], s[0:1], 0x10
	s_load_b64 s[0:1], s[0:1], 0x20
	s_cmp_lt_i32 s6, 1
	s_cbranch_scc1 .LBB0_4
; %bb.2:                                ; %.lr.ph
	v_mul_lo_u32 v2, v0, s6
	v_mov_b32_e32 v5, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[3:4], 2, v[2:3]
	v_mov_b32_e32 v2, 0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v3, vcc_lo, s8, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s9, v4, vcc_lo
.LBB0_3:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_ashrrev_i32_e32 v6, 31, v5
	s_add_i32 s6, s6, -1
	s_cmp_eq_u32 s6, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 2, v[5:6]
	v_add_co_u32 v6, vcc_lo, s10, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, s11, v7, vcc_lo
	global_load_b32 v8, v[3:4], off
	global_load_b32 v9, v[6:7], off
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[6:7], null, v9, v8, v[2:3]
	v_add_co_u32 v3, vcc_lo, v3, 4
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_dual_mov_b32 v2, v6 :: v_dual_add_nc_u32 v5, s5, v5
	s_cbranch_scc0 .LBB0_3
	s_branch .LBB0_5
.LBB0_4:
	v_mov_b32_e32 v2, 0
.LBB0_5:                                ; %Flow54
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, v0, s5, v[1:2]
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB0_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z2MMiiiPiS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z2MMiiiPiS_S_, .Lfunc_end0-_Z2MMiiiPiS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 360
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .offset:         4
        .size:           4
        .value_kind:     by_value
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z2MMiiiPiS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z2MMiiiPiS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
