/*Ex. 5
1. implement matrix transpose in cuda with shared memory
  (use block algorithm/FAST TRANSPOSE).
2. MATRIX SIZE = 8192X8192 and register the time of solution compared with
  naive one for 64,512, 1024 threads/block.
3. Try to reach mem band = 100 Gb/s.
*/
#include <stdio.h>
// kernels transpose a tile of TILE_DIM x TILE_DIM elements
// using a TILE_DIM x BLOCK_ROWS thread block, so that each thread
// transposes TILE_DIM/BLOCK_ROWS elements. TILE_DIM is an
// integral multiple of BLOCK_ROWS
#define TILE_DIM 32
//#define BLOCK_ROWS 2 //64 threads/block
//#define BLOCK_ROWS 16 //512 threads/block
#define BLOCK_ROWS 32 //1024 threads/block
// Number of repetitions used for timing.
#define NUM_REPS 100

// routine to print the matrix on the host
__host__ void printMatrix(const float* const data, const size_t size_x, const size_t size_y, const size_t a, const size_t b){
  for(size_t i=0; i<a; i++){
  	printf("%5.2f ", data[i]);
  }
  printf("\n");
}

// routine to check results
__host__ int compareRes(const float* const odata, const float* const gold, const size_t msize){
  int res = 0;
  for(size_t i = 0; i<msize; i++){
    if (odata[i] != gold[i]) ++res;
  }
  return res;
}

// naive transpose 
__global__ void transposeNaive(float *odata, const float* const idata,
    const int width, const int height) {
  int xIndex = blockIdx.x*TILE_DIM + threadIdx.x;
  int yIndex = blockIdx.y*TILE_DIM + threadIdx.y;
  int index_in = xIndex + width * yIndex;
  int index_out = yIndex + height * xIndex;

    for (int i=0; i<TILE_DIM; i+=BLOCK_ROWS) {
        odata[index_out+i] = idata[index_in+i*width];
    }
}

// naive transpose on host to check results
__host__ void computeTransposeHost(float* odata, const float* const h_idata,
    const int size_x, const int size_y){
  for (size_t i = 0; i < size_x; i++) {
    for (size_t j = 0; j < size_y; j++) {
      odata[j+i*size_x] = h_idata[i + j*size_y];
    }
  }
}

// transpose with coalesced memory and padding
__global__ void transposeCoalesced(float *odata, const float *const idata, const int width,
    const int height){
  __shared__ float tile[TILE_DIM][TILE_DIM+1]; //padding so different threads access different shared memory banks and no bottleneck

  int xIndex = blockIdx.x*TILE_DIM + threadIdx.x;
  int yIndex = blockIdx.y*TILE_DIM + threadIdx.y;
  int index_in = xIndex + (yIndex)*width;

  xIndex = blockIdx.y * TILE_DIM + threadIdx.x;
  yIndex = blockIdx.x * TILE_DIM + threadIdx.y;
  int index_out = xIndex + (yIndex)*height;

  // each thread copy more than one memory location. The overhead of index calculation is amortized over threads

  for (int i=0; i<TILE_DIM; i+=BLOCK_ROWS) { // use a tile like a buffer to transpose blocks
      tile[threadIdx.y+i][threadIdx.x] = idata[index_in+i*width];
  }

  __syncthreads(); // to ensure threads have finished to copy from idata to tile

  // access shared memory noncontiguously to access odata contiguously
  for (int i=0; i<TILE_DIM; i+=BLOCK_ROWS) {
      odata[index_out+i*height] = tile[threadIdx.x][threadIdx.y+i];
  }
}

int main( int argc, char** argv) {
  
// set matrix size
  const int size_x = 8192;
  const int size_y = 8192;

// execution configuration parameters
  dim3 grid(size_x/TILE_DIM, size_y/TILE_DIM), threads(TILE_DIM,BLOCK_ROWS);
  
// CUDA events for timing
  cudaEvent_t start, stop;
  
// size of memory required to store the matrix
  const int mem_size = sizeof(float) * size_x*size_y;
  
// allocate host memory
  float *h_idata = (float*) malloc(mem_size);
  float *h_odata = (float*) malloc(mem_size);
  float *transposeHost = (float *) malloc(mem_size);
  
// allocate device memory
  float *d_idata, *d_odata;
  cudaMalloc( (void**) &d_idata, mem_size);
  cudaMalloc( (void**) &d_odata, mem_size);
  
// initalize host data
  for(int i = 0; i < (size_x*size_y); ++i) 
	  h_idata[i] = (float) i;
  printf("Initial matrix:\n");
  printMatrix(h_idata, size_x, size_y, 10, 10);
 
// copy host data to device
  cudaMemcpy(d_idata, h_idata, mem_size, cudaMemcpyHostToDevice );

// Compute reference transpose solution
  computeTransposeHost(transposeHost, h_idata, size_x, size_y);
  printf("Reference solution:\n");
  printMatrix(transposeHost, size_x, size_y, 10, 10);


  printf("\nMatrix size: %dx%d, tile: %dx%d, block: %dx%d\n\n",
  	size_x, size_y, TILE_DIM, TILE_DIM, TILE_DIM, BLOCK_ROWS);
  printf("Kernel\t\t\tLoop over kernel\n");
  printf("------\t\t\t----------------\n");

  
// initialize events, EC parameters
  cudaEventCreate(&start);
  cudaEventCreate(&stop);

//*********************************time transposeNaive*************************************
  cudaEventRecord(start, 0);
  for (int i=0; i < NUM_REPS; i++) { // repeate timing to obtain a more precise bandwidth
    transposeNaive<<<grid, threads>>>(d_odata, d_idata,size_x,size_y);
  }
  cudaEventRecord(stop, 0);
  cudaEventSynchronize(stop);
  float outerTime;
  cudaEventElapsedTime(&outerTime, start, stop);

  cudaMemcpy(h_odata,d_odata, mem_size, cudaMemcpyDeviceToHost);
  
//check correctness of solution
  int res = compareRes(transposeHost, h_odata, size_x*size_y);
  if (res != 0) printf("*** transposeNaive kernel FAILED ***\n");
  else printf("***transposeNaive kernel OK***\n");
// report effective bandwidths
  float outerBandwidth = 2.*1000*mem_size/(1024*1024*1024)/(outerTime/NUM_REPS);
  
  printf("transposeNaive\t\t%5.2f GB/s\n", outerBandwidth);
  //printf("transposeNaive:\n");
  //printMatrix(h_odata, size_x, size_y, 10, 10);

//*********************************time transposeCoalesced************************************
  cudaEventRecord(start, 0);
  for (int i=0; i < NUM_REPS; i++) {
      transposeCoalesced<<<grid, threads>>>(d_odata, d_idata,size_x,size_y);
  }
  cudaEventRecord(stop, 0);
  cudaEventSynchronize(stop);
  //float outerTime1;
  cudaEventElapsedTime(&outerTime, start, stop);
  cudaMemcpy(h_odata,d_odata, mem_size, cudaMemcpyDeviceToHost);
  
//check corrctness of result
  res = compareRes(transposeHost, h_odata, size_x*size_y);
  if (res != 0) printf("*** transposeCoalasced kernel FAILED ***\n");
  else printf("***transposeCoalasced kernel OK***\n");
// report effective bandwidths
  outerBandwidth = 2.*1000*mem_size/(1024*1024*1024)/(outerTime/NUM_REPS);
    
  printf("transposeCoalesced\t%5.2f GB/s\n", outerBandwidth);
  //printf("transposeCoalesced\n");
  //printMatrix(h_odata, size_x, size_y, 10, 10);
  
// cleanup memory
  free(h_idata); free(h_odata); free(transposeHost);
  cudaFree(d_idata); cudaFree(d_odata);
  cudaEventDestroy(start); cudaEventDestroy(stop);

  return 0;
}

	.file	"tmpxft_0027c140_00000000-6_fast-transpose.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2033:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2033:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"%5.2f "
.LC1:
	.string	"\n"
	.text
	.globl	_Z11printMatrixPKfmmmm
	.type	_Z11printMatrixPKfmmmm, @function
_Z11printMatrixPKfmmmm:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	leaq	.LC0(%rip), %r13
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rcx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	xorl	%ebx, %ebx
	pushq	%rsi
	.cfi_def_cfa_offset 48
.L3:
	cmpq	%rbp, %rbx
	je	.L7
	movq	%r13, %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	(%r12,%rbx,4), %xmm0
	call	__printf_chk@PLT
	incq	%rbx
	jmp	.L3
.L7:
	popq	%rdx
	.cfi_def_cfa_offset 40
	leaq	.LC1(%rip), %rsi
	popq	%rbx
	.cfi_def_cfa_offset 32
	movl	$2, %edi
	popq	%rbp
	.cfi_def_cfa_offset 24
	xorl	%eax, %eax
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	__printf_chk@PLT
	.cfi_endproc
.LFE2027:
	.size	_Z11printMatrixPKfmmmm, .-_Z11printMatrixPKfmmmm
	.globl	_Z10compareResPKfS0_m
	.type	_Z10compareResPKfS0_m, @function
_Z10compareResPKfS0_m:
.LFB2028:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
	xorl	%ecx, %ecx
.L9:
	cmpq	%rdx, %rax
	je	.L14
	movss	(%rdi,%rax,4), %xmm0
	ucomiss	(%rsi,%rax,4), %xmm0
	jp	.L13
	je	.L10
.L13:
	incl	%ecx
.L10:
	incq	%rax
	jmp	.L9
.L14:
	movl	%ecx, %eax
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z10compareResPKfS0_m, .-_Z10compareResPKfS0_m
	.globl	_Z20computeTransposeHostPfPKfii
	.type	_Z20computeTransposeHostPfPKfii, @function
_Z20computeTransposeHostPfPKfii:
.LFB2029:
	.cfi_startproc
	endbr64
	movslq	%ecx, %rcx
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %r8
	movslq	%edx, %rdx
	leaq	0(,%rcx,4), %rbx
	xorl	%r9d, %r9d
	xorl	%edi, %edi
.L16:
	cmpq	%rdx, %rdi
	jnb	.L15
	leaq	(%rsi,%rdi,4), %r10
	leaq	(%r8,%r9,4), %r11
	xorl	%eax, %eax
.L19:
	cmpq	%rcx, %rax
	jnb	.L21
	movss	(%r10), %xmm0
	addq	%rbx, %r10
	movss	%xmm0, (%r11,%rax,4)
	incq	%rax
	jmp	.L19
.L21:
	incq	%rdi
	addq	%rdx, %r9
	jmp	.L16
.L15:
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z20computeTransposeHostPfPKfii, .-_Z20computeTransposeHostPfPKfii
	.globl	_Z39__device_stub__Z14transposeNaivePfPKfiiPfPKfii
	.type	_Z39__device_stub__Z14transposeNaivePfPKfiiPfPKfii, @function
_Z39__device_stub__Z14transposeNaivePfPKfiiPfPKfii:
.LFB2055:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L22
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z14transposeNaivePfPKfii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L22:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L24
	call	__stack_chk_fail@PLT
.L24:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2055:
	.size	_Z39__device_stub__Z14transposeNaivePfPKfiiPfPKfii, .-_Z39__device_stub__Z14transposeNaivePfPKfiiPfPKfii
	.globl	_Z14transposeNaivePfPKfii
	.type	_Z14transposeNaivePfPKfii, @function
_Z14transposeNaivePfPKfii:
.LFB2056:
	.cfi_startproc
	endbr64
	jmp	_Z39__device_stub__Z14transposeNaivePfPKfiiPfPKfii
	.cfi_endproc
.LFE2056:
	.size	_Z14transposeNaivePfPKfii, .-_Z14transposeNaivePfPKfii
	.globl	_Z43__device_stub__Z18transposeCoalescedPfPKfiiPfPKfii
	.type	_Z43__device_stub__Z18transposeCoalescedPfPKfiiPfPKfii, @function
_Z43__device_stub__Z18transposeCoalescedPfPKfiiPfPKfii:
.LFB2057:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L27
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z18transposeCoalescedPfPKfii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L27:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L29
	call	__stack_chk_fail@PLT
.L29:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2057:
	.size	_Z43__device_stub__Z18transposeCoalescedPfPKfiiPfPKfii, .-_Z43__device_stub__Z18transposeCoalescedPfPKfiiPfPKfii
	.globl	_Z18transposeCoalescedPfPKfii
	.type	_Z18transposeCoalescedPfPKfii, @function
_Z18transposeCoalescedPfPKfii:
.LFB2058:
	.cfi_startproc
	endbr64
	jmp	_Z43__device_stub__Z18transposeCoalescedPfPKfiiPfPKfii
	.cfi_endproc
.LFE2058:
	.size	_Z18transposeCoalescedPfPKfii, .-_Z18transposeCoalescedPfPKfii
	.section	.rodata.str1.1
.LC2:
	.string	"Initial matrix:\n"
.LC3:
	.string	"Reference solution:\n"
.LC4:
	.string	"\nMatrix size: %dx%d, tile: %dx%d, block: %dx%d\n\n"
.LC5:
	.string	"Kernel\t\t\tLoop over kernel\n"
.LC6:
	.string	"------\t\t\t----------------\n"
.LC7:
	.string	"*** transposeNaive kernel FAILED ***\n"
.LC8:
	.string	"***transposeNaive kernel OK***\n"
.LC11:
	.string	"transposeNaive\t\t%5.2f GB/s\n"
.LC12:
	.string	"*** transposeCoalasced kernel FAILED ***\n"
.LC13:
	.string	"***transposeCoalasced kernel OK***\n"
.LC14:
	.string	"transposeCoalesced\t%5.2f GB/s\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	$268435456, %edi
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	movabsq	$1099511628032, %rax
	movl	$1, 56(%rsp)
	movl	$1, 68(%rsp)
	movq	%rax, 48(%rsp)
	movabsq	$137438953504, %rax
	movq	%rax, 60(%rsp)
	call	malloc@PLT
	movl	$268435456, %edi
	movq	%rax, %r12
	call	malloc@PLT
	movl	$268435456, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	leaq	32(%rsp), %rdi
	movl	$268435456, %esi
	movq	%rax, %rbx
	call	cudaMalloc@PLT
	leaq	40(%rsp), %rdi
	movl	$268435456, %esi
	call	cudaMalloc@PLT
	xorl	%eax, %eax
.L33:
	cvtsi2ssl	%eax, %xmm0
	movss	%xmm0, (%r12,%rax,4)
	incq	%rax
	cmpq	$67108864, %rax
	jne	.L33
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	movl	$100, %r13d
	call	__printf_chk@PLT
	movl	$10, %r8d
	movl	$10, %ecx
	movq	%r12, %rdi
	movl	$8192, %edx
	movl	$8192, %esi
	call	_Z11printMatrixPKfmmmm
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$268435456, %edx
	call	cudaMemcpy@PLT
	movl	$8192, %ecx
	movq	%r12, %rsi
	movq	%rbx, %rdi
	movl	$8192, %edx
	call	_Z20computeTransposeHostPfPKfii
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$10, %r8d
	movl	$10, %ecx
	movq	%rbx, %rdi
	movl	$8192, %edx
	movl	$8192, %esi
	call	_Z11printMatrixPKfmmmm
	pushq	$32
	.cfi_def_cfa_offset 136
	movl	$32, %r9d
	xorl	%eax, %eax
	pushq	$32
	.cfi_def_cfa_offset 144
	movl	$32, %r8d
	movl	$8192, %ecx
	movl	$8192, %edx
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	movl	$2, %edi
	popq	%rdx
	.cfi_def_cfa_offset 128
	leaq	.LC5(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	16(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	24(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
.L35:
	movl	68(%rsp), %ecx
	movq	60(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	48(%rsp), %rdi
	movl	56(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L34
	movq	32(%rsp), %rsi
	movq	40(%rsp), %rdi
	movl	$8192, %ecx
	movl	$8192, %edx
	call	_Z39__device_stub__Z14transposeNaivePfPKfiiPfPKfii
.L34:
	decl	%r13d
	jne	.L35
	movq	24(%rsp), %rdi
	xorl	%esi, %esi
	leaq	12(%rsp), %r14
	call	cudaEventRecord@PLT
	movq	24(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movq	%r14, %rdi
	call	cudaEventElapsedTime@PLT
	movq	40(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbp, %rdi
	movl	$268435456, %edx
	call	cudaMemcpy@PLT
	movq	%rbp, %rsi
	movl	$67108864, %edx
	movq	%rbx, %rdi
	call	_Z10compareResPKfS0_m
	leaq	.LC7(%rip), %rsi
	testl	%eax, %eax
	jne	.L47
	leaq	.LC8(%rip), %rsi
.L47:
	movl	$2, %edi
	xorl	%eax, %eax
	movl	$100, %r13d
	call	__printf_chk@PLT
	movss	.LC10(%rip), %xmm0
	movss	12(%rsp), %xmm1
	movb	$1, %al
	divss	.LC9(%rip), %xmm1
	leaq	.LC11(%rip), %rsi
	movl	$2, %edi
	divss	%xmm1, %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
.L39:
	movl	68(%rsp), %ecx
	movq	60(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	48(%rsp), %rdi
	movl	56(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L38
	movq	32(%rsp), %rsi
	movq	40(%rsp), %rdi
	movl	$8192, %ecx
	movl	$8192, %edx
	call	_Z43__device_stub__Z18transposeCoalescedPfPKfiiPfPKfii
.L38:
	decl	%r13d
	jne	.L39
	movq	24(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	24(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movq	%r14, %rdi
	call	cudaEventElapsedTime@PLT
	movq	40(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbp, %rdi
	movl	$268435456, %edx
	call	cudaMemcpy@PLT
	movq	%rbp, %rsi
	movl	$67108864, %edx
	movq	%rbx, %rdi
	call	_Z10compareResPKfS0_m
	leaq	.LC12(%rip), %rsi
	testl	%eax, %eax
	jne	.L48
	leaq	.LC13(%rip), %rsi
.L48:
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movss	.LC10(%rip), %xmm0
	movss	12(%rsp), %xmm1
	movb	$1, %al
	divss	.LC9(%rip), %xmm1
	leaq	.LC14(%rip), %rsi
	movl	$2, %edi
	divss	%xmm1, %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	24(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L42
	call	__stack_chk_fail@PLT
.L42:
	addq	$80, %rsp
	.cfi_def_cfa_offset 48
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2030:
	.size	main, .-main
	.section	.rodata.str1.1
.LC15:
	.string	"_Z18transposeCoalescedPfPKfii"
.LC16:
	.string	"_Z14transposeNaivePfPKfii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2060:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC15(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z18transposeCoalescedPfPKfii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC16(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z14transposeNaivePfPKfii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2060:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC9:
	.long	1120403456
	.align 4
.LC10:
	.long	1140457472
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/*Ex. 5
1. implement matrix transpose in cuda with shared memory
  (use block algorithm/FAST TRANSPOSE).
2. MATRIX SIZE = 8192X8192 and register the time of solution compared with
  naive one for 64,512, 1024 threads/block.
3. Try to reach mem band = 100 Gb/s.
*/

#include <hip/hip_runtime.h>
#include <stdio.h>
// kernels transpose a tile of TILE_DIM x TILE_DIM elements
// using a TILE_DIM x BLOCK_ROWS thread block, so that each thread
// transposes TILE_DIM/BLOCK_ROWS elements. TILE_DIM is an
// integral multiple of BLOCK_ROWS
#define TILE_DIM 32
//#define BLOCK_ROWS 2 //64 threads/block
//#define BLOCK_ROWS 16 //512 threads/block
#define BLOCK_ROWS 32 //1024 threads/block
// Number of repetitions used for timing.
#define NUM_REPS 100

// routine to print the matrix on the host
__host__ void printMatrix(const float* const data, const size_t size_x, const size_t size_y, const size_t a, const size_t b){
  for(size_t i=0; i<a; i++){
  	printf("%5.2f ", data[i]);
  }
  printf("\n");
}

// routine to check results
__host__ int compareRes(const float* const odata, const float* const gold, const size_t msize){
  int res = 0;
  for(size_t i = 0; i<msize; i++){
    if (odata[i] != gold[i]) ++res;
  }
  return res;
}

// naive transpose 
__global__ void transposeNaive(float *odata, const float* const idata,
    const int width, const int height) {
  int xIndex = blockIdx.x*TILE_DIM + threadIdx.x;
  int yIndex = blockIdx.y*TILE_DIM + threadIdx.y;
  int index_in = xIndex + width * yIndex;
  int index_out = yIndex + height * xIndex;

    for (int i=0; i<TILE_DIM; i+=BLOCK_ROWS) {
        odata[index_out+i] = idata[index_in+i*width];
    }
}

// naive transpose on host to check results
__host__ void computeTransposeHost(float* odata, const float* const h_idata,
    const int size_x, const int size_y){
  for (size_t i = 0; i < size_x; i++) {
    for (size_t j = 0; j < size_y; j++) {
      odata[j+i*size_x] = h_idata[i + j*size_y];
    }
  }
}

// transpose with coalesced memory and padding
__global__ void transposeCoalesced(float *odata, const float *const idata, const int width,
    const int height){
  __shared__ float tile[TILE_DIM][TILE_DIM+1]; //padding so different threads access different shared memory banks and no bottleneck

  int xIndex = blockIdx.x*TILE_DIM + threadIdx.x;
  int yIndex = blockIdx.y*TILE_DIM + threadIdx.y;
  int index_in = xIndex + (yIndex)*width;

  xIndex = blockIdx.y * TILE_DIM + threadIdx.x;
  yIndex = blockIdx.x * TILE_DIM + threadIdx.y;
  int index_out = xIndex + (yIndex)*height;

  // each thread copy more than one memory location. The overhead of index calculation is amortized over threads

  for (int i=0; i<TILE_DIM; i+=BLOCK_ROWS) { // use a tile like a buffer to transpose blocks
      tile[threadIdx.y+i][threadIdx.x] = idata[index_in+i*width];
  }

  __syncthreads(); // to ensure threads have finished to copy from idata to tile

  // access shared memory noncontiguously to access odata contiguously
  for (int i=0; i<TILE_DIM; i+=BLOCK_ROWS) {
      odata[index_out+i*height] = tile[threadIdx.x][threadIdx.y+i];
  }
}

int main( int argc, char** argv) {
  
// set matrix size
  const int size_x = 8192;
  const int size_y = 8192;

// execution configuration parameters
  dim3 grid(size_x/TILE_DIM, size_y/TILE_DIM), threads(TILE_DIM,BLOCK_ROWS);
  
// CUDA events for timing
  hipEvent_t start, stop;
  
// size of memory required to store the matrix
  const int mem_size = sizeof(float) * size_x*size_y;
  
// allocate host memory
  float *h_idata = (float*) malloc(mem_size);
  float *h_odata = (float*) malloc(mem_size);
  float *transposeHost = (float *) malloc(mem_size);
  
// allocate device memory
  float *d_idata, *d_odata;
  hipMalloc( (void**) &d_idata, mem_size);
  hipMalloc( (void**) &d_odata, mem_size);
  
// initalize host data
  for(int i = 0; i < (size_x*size_y); ++i) 
	  h_idata[i] = (float) i;
  printf("Initial matrix:\n");
  printMatrix(h_idata, size_x, size_y, 10, 10);
 
// copy host data to device
  hipMemcpy(d_idata, h_idata, mem_size, hipMemcpyHostToDevice );

// Compute reference transpose solution
  computeTransposeHost(transposeHost, h_idata, size_x, size_y);
  printf("Reference solution:\n");
  printMatrix(transposeHost, size_x, size_y, 10, 10);


  printf("\nMatrix size: %dx%d, tile: %dx%d, block: %dx%d\n\n",
  	size_x, size_y, TILE_DIM, TILE_DIM, TILE_DIM, BLOCK_ROWS);
  printf("Kernel\t\t\tLoop over kernel\n");
  printf("------\t\t\t----------------\n");

  
// initialize events, EC parameters
  hipEventCreate(&start);
  hipEventCreate(&stop);

//*********************************time transposeNaive*************************************
  hipEventRecord(start, 0);
  for (int i=0; i < NUM_REPS; i++) { // repeate timing to obtain a more precise bandwidth
    transposeNaive<<<grid, threads>>>(d_odata, d_idata,size_x,size_y);
  }
  hipEventRecord(stop, 0);
  hipEventSynchronize(stop);
  float outerTime;
  hipEventElapsedTime(&outerTime, start, stop);

  hipMemcpy(h_odata,d_odata, mem_size, hipMemcpyDeviceToHost);
  
//check correctness of solution
  int res = compareRes(transposeHost, h_odata, size_x*size_y);
  if (res != 0) printf("*** transposeNaive kernel FAILED ***\n");
  else printf("***transposeNaive kernel OK***\n");
// report effective bandwidths
  float outerBandwidth = 2.*1000*mem_size/(1024*1024*1024)/(outerTime/NUM_REPS);
  
  printf("transposeNaive\t\t%5.2f GB/s\n", outerBandwidth);
  //printf("transposeNaive:\n");
  //printMatrix(h_odata, size_x, size_y, 10, 10);

//*********************************time transposeCoalesced************************************
  hipEventRecord(start, 0);
  for (int i=0; i < NUM_REPS; i++) {
      transposeCoalesced<<<grid, threads>>>(d_odata, d_idata,size_x,size_y);
  }
  hipEventRecord(stop, 0);
  hipEventSynchronize(stop);
  //float outerTime1;
  hipEventElapsedTime(&outerTime, start, stop);
  hipMemcpy(h_odata,d_odata, mem_size, hipMemcpyDeviceToHost);
  
//check corrctness of result
  res = compareRes(transposeHost, h_odata, size_x*size_y);
  if (res != 0) printf("*** transposeCoalasced kernel FAILED ***\n");
  else printf("***transposeCoalasced kernel OK***\n");
// report effective bandwidths
  outerBandwidth = 2.*1000*mem_size/(1024*1024*1024)/(outerTime/NUM_REPS);
    
  printf("transposeCoalesced\t%5.2f GB/s\n", outerBandwidth);
  //printf("transposeCoalesced\n");
  //printMatrix(h_odata, size_x, size_y, 10, 10);
  
// cleanup memory
  free(h_idata); free(h_odata); free(transposeHost);
  hipFree(d_idata); hipFree(d_odata);
  hipEventDestroy(start); hipEventDestroy(stop);

  return 0;
}

	.text
	.file	"fast-transpose.hip"
	.globl	_Z11printMatrixPKfmmmm          # -- Begin function _Z11printMatrixPKfmmmm
	.type	_Z11printMatrixPKfmmmm,@function
_Z11printMatrixPKfmmmm:                 # @_Z11printMatrixPKfmmmm
	.cfi_startproc
# %bb.0:
	testq	%rcx, %rcx
	je	.LBB0_4
# %bb.1:                                # %.lr.ph.preheader
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rcx, %rbx
	movq	%rdi, %r14
	xorl	%r15d, %r15d
.LBB0_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r14,%r15,4), %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	incq	%r15
	cmpq	%r15, %rbx
	jne	.LBB0_2
# %bb.3:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
	.cfi_restore %r15
.LBB0_4:                                # %._crit_edge
	movl	$10, %edi
	jmp	putchar@PLT                     # TAILCALL
.Lfunc_end0:
	.size	_Z11printMatrixPKfmmmm, .Lfunc_end0-_Z11printMatrixPKfmmmm
	.cfi_endproc
                                        # -- End function
	.globl	_Z10compareResPKfS0_m           # -- Begin function _Z10compareResPKfS0_m
	.type	_Z10compareResPKfS0_m,@function
_Z10compareResPKfS0_m:                  # @_Z10compareResPKfS0_m
	.cfi_startproc
# %bb.0:
	testq	%rdx, %rdx
	je	.LBB1_1
# %bb.3:                                # %.lr.ph.preheader
	xorl	%ecx, %ecx
	xorl	%eax, %eax
.LBB1_4:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movss	(%rsi,%rcx,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	cmpneqss	(%rdi,%rcx,4), %xmm0
	movd	%xmm0, %r8d
	subl	%r8d, %eax
	incq	%rcx
	cmpq	%rcx, %rdx
	jne	.LBB1_4
# %bb.2:                                # %._crit_edge
	retq
.LBB1_1:
	xorl	%eax, %eax
	retq
.Lfunc_end1:
	.size	_Z10compareResPKfS0_m, .Lfunc_end1-_Z10compareResPKfS0_m
	.cfi_endproc
                                        # -- End function
	.globl	_Z29__device_stub__transposeNaivePfPKfii # -- Begin function _Z29__device_stub__transposeNaivePfPKfii
	.type	_Z29__device_stub__transposeNaivePfPKfii,@function
_Z29__device_stub__transposeNaivePfPKfii: # @_Z29__device_stub__transposeNaivePfPKfii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14transposeNaivePfPKfii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z29__device_stub__transposeNaivePfPKfii, .Lfunc_end2-_Z29__device_stub__transposeNaivePfPKfii
	.cfi_endproc
                                        # -- End function
	.globl	_Z20computeTransposeHostPfPKfii # -- Begin function _Z20computeTransposeHostPfPKfii
	.type	_Z20computeTransposeHostPfPKfii,@function
_Z20computeTransposeHostPfPKfii:        # @_Z20computeTransposeHostPfPKfii
	.cfi_startproc
# %bb.0:
	testl	%edx, %edx
	je	.LBB3_7
# %bb.1:                                # %.preheader.lr.ph
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movslq	%edx, %rax
	movslq	%ecx, %rdx
	leaq	(,%rax,4), %r8
	leaq	(,%rdx,4), %r9
	xorl	%r10d, %r10d
.LBB3_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_4 Depth 2
	testl	%ecx, %ecx
	je	.LBB3_5
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB3_2 Depth=1
	movq	%rsi, %r11
	xorl	%ebx, %ebx
.LBB3_4:                                #   Parent Loop BB3_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	(%r11), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, (%rdi,%rbx,4)
	incq	%rbx
	addq	%r9, %r11
	cmpq	%rbx, %rdx
	jne	.LBB3_4
.LBB3_5:                                # %._crit_edge
                                        #   in Loop: Header=BB3_2 Depth=1
	incq	%r10
	addq	%r8, %rdi
	addq	$4, %rsi
	cmpq	%rax, %r10
	jne	.LBB3_2
# %bb.6:
	popq	%rbx
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
.LBB3_7:                                # %._crit_edge18
	retq
.Lfunc_end3:
	.size	_Z20computeTransposeHostPfPKfii, .Lfunc_end3-_Z20computeTransposeHostPfPKfii
	.cfi_endproc
                                        # -- End function
	.globl	_Z33__device_stub__transposeCoalescedPfPKfii # -- Begin function _Z33__device_stub__transposeCoalescedPfPKfii
	.type	_Z33__device_stub__transposeCoalescedPfPKfii,@function
_Z33__device_stub__transposeCoalescedPfPKfii: # @_Z33__device_stub__transposeCoalescedPfPKfii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z18transposeCoalescedPfPKfii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z33__device_stub__transposeCoalescedPfPKfii, .Lfunc_end4-_Z33__device_stub__transposeCoalescedPfPKfii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI5_0:
	.long	0x42c80000                      # float 100
.LCPI5_1:
	.long	0x43fa0000                      # float 500
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$268435456, %edi                # imm = 0x10000000
	callq	malloc
	movq	%rax, %rbx
	movl	$268435456, %edi                # imm = 0x10000000
	callq	malloc
	movq	%rax, %r14
	movl	$268435456, %edi                # imm = 0x10000000
	callq	malloc
	movq	%rax, %r15
	leaq	40(%rsp), %rdi
	movl	$268435456, %esi                # imm = 0x10000000
	callq	hipMalloc
	leaq	32(%rsp), %rdi
	movl	$268435456, %esi                # imm = 0x10000000
	callq	hipMalloc
	xorl	%eax, %eax
.LBB5_1:                                # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	%xmm0, (%rbx,%rax,4)
	incq	%rax
	cmpq	$67108864, %rax                 # imm = 0x4000000
	jne	.LBB5_1
# %bb.2:
	movl	$.Lstr, %edi
	callq	puts@PLT
	xorl	%r12d, %r12d
.LBB5_3:                                # %.lr.ph.i
                                        # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbx,%r12,4), %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	incq	%r12
	cmpq	$10, %r12
	jne	.LBB5_3
# %bb.4:                                # %_Z11printMatrixPKfmmmm.exit
	movl	$10, %edi
	callq	putchar@PLT
	movq	40(%rsp), %rdi
	movl	$268435456, %edx                # imm = 0x10000000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	xorl	%eax, %eax
	movq	%r15, %rcx
	movq	%rbx, %rdx
.LBB5_5:                                # %.preheader.i
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB5_6 Depth 2
	movq	%rdx, %rsi
	xorl	%edi, %edi
.LBB5_6:                                #   Parent Loop BB5_5 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	(%rsi), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, (%rcx,%rdi,4)
	incq	%rdi
	addq	$32768, %rsi                    # imm = 0x8000
	cmpq	$8192, %rdi                     # imm = 0x2000
	jne	.LBB5_6
# %bb.7:                                # %._crit_edge.i
                                        #   in Loop: Header=BB5_5 Depth=1
	incq	%rax
	addq	$4, %rdx
	addq	$32768, %rcx                    # imm = 0x8000
	cmpq	$8192, %rax                     # imm = 0x2000
	jne	.LBB5_5
# %bb.8:                                # %_Z20computeTransposeHostPfPKfii.exit
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	xorl	%r12d, %r12d
.LBB5_9:                                # %.lr.ph.i54
                                        # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r15,%r12,4), %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	incq	%r12
	cmpq	$10, %r12
	jne	.LBB5_9
# %bb.10:                               # %_Z11printMatrixPKfmmmm.exit59
	movabsq	$1099511628032, %r12            # imm = 0x10000000100
	movabsq	$137438953504, %r13             # imm = 0x2000000020
	movl	$10, %edi
	callq	putchar@PLT
	movl	$32, (%rsp)
	movl	$.L.str.4, %edi
	movl	$8192, %esi                     # imm = 0x2000
	movl	$8192, %edx                     # imm = 0x2000
	movl	$32, %ecx
	movl	$32, %r8d
	movl	$32, %r9d
	xorl	%eax, %eax
	callq	printf
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	movl	$.Lstr.3, %edi
	callq	puts@PLT
	leaq	48(%rsp), %rbp
	movq	%rbp, %rdi
	callq	hipEventCreate
	leaq	16(%rsp), %rdi
	callq	hipEventCreate
	movq	(%rbp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movl	$100, %ebp
.LBB5_11:                               # =>This Inner Loop Header: Depth=1
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_13
# %bb.12:                               #   in Loop: Header=BB5_11 Depth=1
	movq	32(%rsp), %rdi
	movq	40(%rsp), %rsi
	movl	$8192, %edx                     # imm = 0x2000
	movl	$8192, %ecx                     # imm = 0x2000
	callq	_Z29__device_stub__transposeNaivePfPKfii
.LBB5_13:                               #   in Loop: Header=BB5_11 Depth=1
	decl	%ebp
	jne	.LBB5_11
# %bb.14:
	movq	16(%rsp), %rdi
	xorl	%ebp, %ebp
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	16(%rsp), %rdi
	callq	hipEventSynchronize
	movq	48(%rsp), %rsi
	movq	16(%rsp), %rdx
	leaq	28(%rsp), %rdi
	callq	hipEventElapsedTime
	movq	32(%rsp), %rsi
	movl	$268435456, %edx                # imm = 0x10000000
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	xorl	%eax, %eax
.LBB5_15:                               # %.lr.ph.i60
                                        # =>This Inner Loop Header: Depth=1
	movss	(%r14,%rbp,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	cmpneqss	(%r15,%rbp,4), %xmm0
	movd	%xmm0, %ecx
	subl	%ecx, %eax
	incq	%rbp
	cmpq	$67108864, %rbp                 # imm = 0x4000000
	jne	.LBB5_15
# %bb.16:                               # %_Z10compareResPKfS0_m.exit
	testl	%eax, %eax
	movl	$.Lstr.4, %eax
	movl	$.Lstr.5, %edi
	cmoveq	%rax, %rdi
	callq	puts@PLT
	movss	28(%rsp), %xmm0                 # xmm0 = mem[0],zero,zero,zero
	divss	.LCPI5_0(%rip), %xmm0
	movss	.LCPI5_1(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	divss	%xmm0, %xmm1
	xorps	%xmm0, %xmm0
	cvtss2sd	%xmm1, %xmm0
	movl	$.L.str.9, %edi
	movb	$1, %al
	callq	printf
	movq	48(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movl	$100, %ebp
.LBB5_17:                               # =>This Inner Loop Header: Depth=1
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_19
# %bb.18:                               #   in Loop: Header=BB5_17 Depth=1
	movq	32(%rsp), %rdi
	movq	40(%rsp), %rsi
	movl	$8192, %edx                     # imm = 0x2000
	movl	$8192, %ecx                     # imm = 0x2000
	callq	_Z33__device_stub__transposeCoalescedPfPKfii
.LBB5_19:                               #   in Loop: Header=BB5_17 Depth=1
	decl	%ebp
	jne	.LBB5_17
# %bb.20:
	movq	16(%rsp), %rdi
	xorl	%r12d, %r12d
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	16(%rsp), %rdi
	callq	hipEventSynchronize
	movq	48(%rsp), %rsi
	movq	16(%rsp), %rdx
	leaq	28(%rsp), %rdi
	callq	hipEventElapsedTime
	movq	32(%rsp), %rsi
	movl	$268435456, %edx                # imm = 0x10000000
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	xorl	%eax, %eax
.LBB5_21:                               # %.lr.ph.i63
                                        # =>This Inner Loop Header: Depth=1
	movss	(%r14,%r12,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	cmpneqss	(%r15,%r12,4), %xmm0
	movd	%xmm0, %ecx
	subl	%ecx, %eax
	incq	%r12
	cmpq	$67108864, %r12                 # imm = 0x4000000
	jne	.LBB5_21
# %bb.22:                               # %_Z10compareResPKfS0_m.exit69
	testl	%eax, %eax
	movl	$.Lstr.6, %eax
	movl	$.Lstr.7, %edi
	cmoveq	%rax, %rdi
	callq	puts@PLT
	movss	28(%rsp), %xmm0                 # xmm0 = mem[0],zero,zero,zero
	divss	.LCPI5_0(%rip), %xmm0
	movss	.LCPI5_1(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	divss	%xmm0, %xmm1
	xorps	%xmm0, %xmm0
	cvtss2sd	%xmm1, %xmm0
	movl	$.L.str.12, %edi
	movb	$1, %al
	callq	printf
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	48(%rsp), %rdi
	callq	hipEventDestroy
	movq	16(%rsp), %rdi
	callq	hipEventDestroy
	xorl	%eax, %eax
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	main, .Lfunc_end5-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB6_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB6_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14transposeNaivePfPKfii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z18transposeCoalescedPfPKfii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end6:
	.size	__hip_module_ctor, .Lfunc_end6-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB7_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB7_2:
	retq
.Lfunc_end7:
	.size	__hip_module_dtor, .Lfunc_end7-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"%5.2f "
	.size	.L.str, 7

	.type	_Z14transposeNaivePfPKfii,@object # @_Z14transposeNaivePfPKfii
	.section	.rodata,"a",@progbits
	.globl	_Z14transposeNaivePfPKfii
	.p2align	3, 0x0
_Z14transposeNaivePfPKfii:
	.quad	_Z29__device_stub__transposeNaivePfPKfii
	.size	_Z14transposeNaivePfPKfii, 8

	.type	_Z18transposeCoalescedPfPKfii,@object # @_Z18transposeCoalescedPfPKfii
	.globl	_Z18transposeCoalescedPfPKfii
	.p2align	3, 0x0
_Z18transposeCoalescedPfPKfii:
	.quad	_Z33__device_stub__transposeCoalescedPfPKfii
	.size	_Z18transposeCoalescedPfPKfii, 8

	.type	.L.str.4,@object                # @.str.4
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.4:
	.asciz	"\nMatrix size: %dx%d, tile: %dx%d, block: %dx%d\n\n"
	.size	.L.str.4, 49

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"transposeNaive\t\t%5.2f GB/s\n"
	.size	.L.str.9, 28

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"transposeCoalesced\t%5.2f GB/s\n"
	.size	.L.str.12, 31

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z14transposeNaivePfPKfii"
	.size	.L__unnamed_1, 26

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z18transposeCoalescedPfPKfii"
	.size	.L__unnamed_2, 30

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Initial matrix:"
	.size	.Lstr, 16

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"Reference solution:"
	.size	.Lstr.1, 20

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"Kernel\t\t\tLoop over kernel"
	.size	.Lstr.2, 26

	.type	.Lstr.3,@object                 # @str.3
.Lstr.3:
	.asciz	"------\t\t\t----------------"
	.size	.Lstr.3, 26

	.type	.Lstr.4,@object                 # @str.4
.Lstr.4:
	.asciz	"***transposeNaive kernel OK***"
	.size	.Lstr.4, 31

	.type	.Lstr.5,@object                 # @str.5
.Lstr.5:
	.asciz	"*** transposeNaive kernel FAILED ***"
	.size	.Lstr.5, 37

	.type	.Lstr.6,@object                 # @str.6
.Lstr.6:
	.asciz	"***transposeCoalasced kernel OK***"
	.size	.Lstr.6, 35

	.type	.Lstr.7,@object                 # @str.7
.Lstr.7:
	.asciz	"*** transposeCoalasced kernel FAILED ***"
	.size	.Lstr.7, 41

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z29__device_stub__transposeNaivePfPKfii
	.addrsig_sym _Z33__device_stub__transposeCoalescedPfPKfii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z14transposeNaivePfPKfii
	.addrsig_sym _Z18transposeCoalescedPfPKfii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z14transposeNaivePfPKfii ; -- Begin function _Z14transposeNaivePfPKfii
	.globl	_Z14transposeNaivePfPKfii
	.p2align	8
	.type	_Z14transposeNaivePfPKfii,@function
_Z14transposeNaivePfPKfii:              ; @_Z14transposeNaivePfPKfii
; %bb.0:                                ; %.critedge
	s_load_b64 s[4:5], s[0:1], 0x10
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v2, v0, 10, 10
	s_load_b128 s[0:3], s[0:1], 0x0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshl_add_u32 v0, s14, 5, v1
	v_lshl_add_u32 v1, s15, 5, v2
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v1, s4, v[0:1]
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_add_co_u32 v2, vcc_lo, s2, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v3, vcc_lo
	global_load_b32 v4, v[2:3], off
	v_mad_u64_u32 v[2:3], null, v0, s5, v[1:2]
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v4, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14transposeNaivePfPKfii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 24
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z14transposeNaivePfPKfii, .Lfunc_end0-_Z14transposeNaivePfPKfii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 172
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z18transposeCoalescedPfPKfii ; -- Begin function _Z18transposeCoalescedPfPKfii
	.globl	_Z18transposeCoalescedPfPKfii
	.p2align	8
	.type	_Z18transposeCoalescedPfPKfii,@function
_Z18transposeCoalescedPfPKfii:          ; @_Z18transposeCoalescedPfPKfii
; %bb.0:                                ; %.critedge
	s_load_b64 s[4:5], s[0:1], 0x10
	v_bfe_u32 v2, v0, 10, 10
	s_lshl_b32 s6, s15, 5
	v_and_b32_e32 v3, 0x3ff, v0
	s_load_b128 s[0:3], s[0:1], 0x0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v1, s6, v2
	v_lshlrev_b32_e32 v5, 2, v2
	v_lshlrev_b32_e32 v4, 2, v3
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_3)
	v_mul_lo_u32 v1, v1, s4
	s_lshl_b32 s4, s14, 5
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_add3_u32 v0, s4, v3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_load_b32 v1, v[0:1], off
	v_add_nc_u32_e32 v0, s4, v2
	v_mad_u32_u24 v2, 0x84, v2, v4
	v_mad_u32_u24 v4, 0x84, v3, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v0, v0, s5
	v_add3_u32 v0, s6, v3, v0
	s_waitcnt vmcnt(0)
	ds_store_b32 v2, v1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v2, v4
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z18transposeCoalescedPfPKfii
		.amdhsa_group_segment_fixed_size 4224
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 24
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z18transposeCoalescedPfPKfii, .Lfunc_end1-_Z18transposeCoalescedPfPKfii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 264
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 4224 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 24
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z14transposeNaivePfPKfii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z14transposeNaivePfPKfii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 4224
    .kernarg_segment_align: 8
    .kernarg_segment_size: 24
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z18transposeCoalescedPfPKfii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z18transposeCoalescedPfPKfii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
