/**
* Vector addition: C = A + B.
* nvcc 
*/

#include <stdio.h>
#include <cuda.h>
// For the CUDA runtime routines (prefixed with "cuda_")
//#include <cuda_runtime.h>

// #include <iostream>
// using namespace std;
// #define mycout cout<<"["<<__FILE__<<":"<<__LINE__<<"]<<endl"
#define myprint printf("[%s:%d] ",__FILE__,__LINE__)
#define nums_thread_pre_block 256

static void HandleError(cudaError_t err,
                         const char *file,
                         int line )
{
    // Error code to check return values for CUDA calls
    // cudaError_t err = cudaSuccess;
    if (err != cudaSuccess)
    {
        fprintf(stderr, "%s in %s at line %d\n", cudaGetErrorString(err),file, line);
        exit(EXIT_FAILURE);
    }
}

/**检测*/
#define checkError(err) (HandleError( err, __FILE__, __LINE__ ))

template<typename T>
__device__ void add1(const T &a,const T &b,T &c)
{
    c=a+b;
}
// or
template<typename T>
__device__ T add2(const T &a,const T &b)
{
    T c=a+b;
    return c;
}

template<typename T>
__global__ void vectorAdd(const T *A,const T *B, T *C, const int numElements)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;

    if (i < numElements)
    {
        // C[i] = A[i] + B[i];
        // add1<T>(A[i],B[i],C[i]);
        C[i]=add2<T>(A[i],B[i]);
    }
}

// 使用shared memory
template<typename T>
__global__ void shared_vectorAdd(const T *A,const T *B, T *C, const int numElements)
{
    extern __shared__ T sdatas[]; //共享内存声明
    int idx = blockDim.x * blockIdx.x + threadIdx.x;
    int tid = threadIdx.x;
    if(idx>=numElements) return;
    // global memory-->shared memory
    // sdatas[tid]=add2<T>(A[idx],B[idx]);
    sdatas[tid]=A[idx]+B[idx];
    __syncthreads(); // 必须线程同步，保证所有global内存变量都拷贝到共享内存

    // shared momery-->global momery
    C[idx]=sdatas[tid];
}

/**cpu数据传入，调用GPU运行*/
template<typename T>
int addInference(
    const T *h_a,
    const T *h_b,
    T *h_c,
    const int n // 数据总长度
    )
{
    size_t size=n*sizeof(T); // int size=n*sizeof(T);
    // 创建GPU变量并分配GPU内存
    T *d_a=NULL,*d_b=NULL,*d_c=NULL;
    checkError(cudaMalloc((void **)&d_a, size));
    checkError(cudaMalloc((void **)&d_b, size));
    checkError(cudaMalloc((void **)&d_c, size));

    // cpu-->GPU
    checkError(cudaMemcpy(d_a,h_a,size,cudaMemcpyHostToDevice));
    checkError(cudaMemcpy(d_b,h_b,size,cudaMemcpyHostToDevice));

    // 启动GPU计算
    dim3 block(nums_thread_pre_block,1,1);
    dim3 grid((n+nums_thread_pre_block-1)/nums_thread_pre_block,1,1);
    cudaStream_t stream; // 创建流，如果不使用就是使用默认流
    checkError(cudaStreamCreate(&stream));

    // vectorAdd<<<grid,block,0,stream>>>(d_a,d_b,d_c,n); // global memory
    shared_vectorAdd<<<grid,block,nums_thread_pre_block*sizeof(T),stream>>>(d_a,d_b,d_c,n); // shared memory
    checkError(cudaGetLastError());// launch vectorAdd kernel

    // checkError(cudaDeviceSynchronize());//CPU等待GPU，使用多流时需使用

    // GPU-->CPU
    checkError(cudaMemcpy(h_c,d_c,size,cudaMemcpyDeviceToHost));

    // free GPU
    checkError(cudaFree(d_a));
    checkError(cudaFree(d_b));
    checkError(cudaFree(d_c));

    // 销毁流
    checkError(cudaStreamDestroy(stream));

    return 0;
}

int main()
{
    myprint;
    const int N=50000;
    size_t size=N*sizeof(float);
    // CPU 
    float *h_a=NULL,*h_b=NULL,*h_c=NULL;
    // 分配内存 cudaMallocHost 比 malloc效率高
    checkError(cudaMallocHost((void**)&h_a,size));
    checkError(cudaMallocHost((void**)&h_b,size));
    checkError(cudaMallocHost((void**)&h_c,size));

    // 赋值
    // Initialize the host input vectors
    for (int i = 0; i < N; ++i)
    {
        h_a[i] = rand()/(float)RAND_MAX;
        h_b[i] = rand()/(float)RAND_MAX;
    }

    // 调用函数执行
    addInference<float>(h_a,h_b,h_c,N);

    // 验证结果
    // Verify that the result vector is correct
    for (int i = 0; i < N; ++i)
    {
        if (fabs(h_a[i] + h_b[i] - h_c[i]) > 1e-5)
        {
            fprintf(stderr, "Result verification failed at element %d!\n", i);
            exit(EXIT_FAILURE);
        }
    }
    printf("Test PASSED\n");

    // free CPU
    // free(h_a); // 针对malloc分配空间时
    checkError(cudaFreeHost(h_a));
    checkError(cudaFreeHost(h_b));
    checkError(cudaFreeHost(h_c));

    return 0;
}
	.file	"tmpxft_002f78bb_00000000-6_vectorAdd2.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2038:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2038:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/wucng/Study/master/cuda/cuda-samples/0_Simple/vectorAdd/vectorAdd2.cu"
.LC1:
	.string	"%s in %s at line %d\n"
	.text
	.type	_ZL11HandleError9cudaErrorPKci.constprop.0, @function
_ZL11HandleError9cudaErrorPKci.constprop.0:
.LFB2182:
	.cfi_startproc
	testl	%edi, %edi
	je	.L2
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	%esi, 12(%rsp)
	call	cudaGetErrorString@PLT
	movl	12(%rsp), %r9d
	movq	stderr(%rip), %rdi
	leaq	.LC0(%rip), %r8
	movq	%rax, %rcx
	leaq	.LC1(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L2:
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2182:
	.size	_ZL11HandleError9cudaErrorPKci.constprop.0, .-_ZL11HandleError9cudaErrorPKci.constprop.0
	.type	_ZL50__device_stub__Z16shared_vectorAddIfEvPKT_S2_PS0_iPKfS0_Pfi, @function
_ZL50__device_stub__Z16shared_vectorAddIfEvPKT_S2_PS0_iPKfS0_Pfi:
.LFB2060:
	.cfi_startproc
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z16shared_vectorAddIfEvPKT_S2_PS0_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L8:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2060:
	.size	_ZL50__device_stub__Z16shared_vectorAddIfEvPKT_S2_PS0_iPKfS0_Pfi, .-_ZL50__device_stub__Z16shared_vectorAddIfEvPKT_S2_PS0_iPKfS0_Pfi
	.section	.text._Z16shared_vectorAddIfEvPKT_S2_PS0_i,"axG",@progbits,_Z16shared_vectorAddIfEvPKT_S2_PS0_i,comdat
	.weak	_Z16shared_vectorAddIfEvPKT_S2_PS0_i
	.type	_Z16shared_vectorAddIfEvPKT_S2_PS0_i, @function
_Z16shared_vectorAddIfEvPKT_S2_PS0_i:
.LFB2110:
	.cfi_startproc
	endbr64
	jmp	_ZL50__device_stub__Z16shared_vectorAddIfEvPKT_S2_PS0_iPKfS0_Pfi
	.cfi_endproc
.LFE2110:
	.size	_Z16shared_vectorAddIfEvPKT_S2_PS0_i, .-_Z16shared_vectorAddIfEvPKT_S2_PS0_i
	.section	.rodata.str1.1
.LC2:
	.string	"[%s:%d] "
.LC6:
	.string	"Result verification failed at element %d!\n"
.LC7:
	.string	"Test PASSED\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2035:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	$124, %ecx
	leaq	.LC0(%rip), %rdx
	leaq	.LC2(%rip), %rsi
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movl	$2, %edi
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	xorl	%ebx, %ebx
	subq	$96, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	call	__printf_chk@PLT
	xorl	%edx, %edx
	leaq	8(%rsp), %rdi
	movl	$200000, %esi
	movq	%rdx, 8(%rsp)
	movq	%rdx, 16(%rsp)
	movq	%rdx, 24(%rsp)
	call	cudaMallocHost@PLT
	movl	$130, %esi
	movl	%eax, %edi
	call	_ZL11HandleError9cudaErrorPKci.constprop.0
	leaq	16(%rsp), %rdi
	movl	$200000, %esi
	call	cudaMallocHost@PLT
	movl	$131, %esi
	movl	%eax, %edi
	call	_ZL11HandleError9cudaErrorPKci.constprop.0
	leaq	24(%rsp), %rdi
	movl	$200000, %esi
	call	cudaMallocHost@PLT
	movl	$132, %esi
	movl	%eax, %edi
	call	_ZL11HandleError9cudaErrorPKci.constprop.0
.L14:
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC3(%rip), %xmm0
	movq	8(%rsp), %rax
	movss	%xmm0, (%rax,%rbx)
	call	rand@PLT
	movq	16(%rsp), %r12
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC3(%rip), %xmm0
	movss	%xmm0, (%r12,%rbx)
	addq	$4, %rbx
	cmpq	$200000, %rbx
	jne	.L14
	xorl	%eax, %eax
	leaq	32(%rsp), %rdi
	movl	$200000, %esi
	movq	8(%rsp), %rbp
	movq	%rax, 32(%rsp)
	movq	24(%rsp), %rbx
	movq	%rax, 40(%rsp)
	movq	%rax, 48(%rsp)
	call	cudaMalloc@PLT
	movl	$88, %esi
	movl	%eax, %edi
	call	_ZL11HandleError9cudaErrorPKci.constprop.0
	leaq	40(%rsp), %rdi
	movl	$200000, %esi
	call	cudaMalloc@PLT
	movl	$89, %esi
	movl	%eax, %edi
	call	_ZL11HandleError9cudaErrorPKci.constprop.0
	leaq	48(%rsp), %rdi
	movl	$200000, %esi
	call	cudaMalloc@PLT
	movl	$90, %esi
	movl	%eax, %edi
	call	_ZL11HandleError9cudaErrorPKci.constprop.0
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$200000, %edx
	call	cudaMemcpy@PLT
	movl	$93, %esi
	movl	%eax, %edi
	call	_ZL11HandleError9cudaErrorPKci.constprop.0
	movq	40(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$200000, %edx
	call	cudaMemcpy@PLT
	movl	$94, %esi
	movl	%eax, %edi
	call	_ZL11HandleError9cudaErrorPKci.constprop.0
	movl	$16777217, %eax
	leaq	56(%rsp), %rdi
	movl	$1, 72(%rsp)
	salq	$8, %rax
	movl	$1, 84(%rsp)
	movq	%rax, 64(%rsp)
	subq	$60, %rax
	movq	%rax, 76(%rsp)
	call	cudaStreamCreate@PLT
	movl	$100, %esi
	movl	%eax, %edi
	call	_ZL11HandleError9cudaErrorPKci.constprop.0
	movl	72(%rsp), %ecx
	movq	56(%rsp), %r9
	movl	$1024, %r8d
	movq	64(%rsp), %rdx
	movq	76(%rsp), %rdi
	movl	84(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	movq	48(%rsp), %rdx
	movq	40(%rsp), %rsi
	movl	$50000, %ecx
	movq	32(%rsp), %rdi
	call	_ZL50__device_stub__Z16shared_vectorAddIfEvPKT_S2_PS0_iPKfS0_Pfi
.L15:
	call	cudaGetLastError@PLT
	movl	$104, %esi
	movl	%eax, %edi
	call	_ZL11HandleError9cudaErrorPKci.constprop.0
	movq	48(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	movl	$200000, %edx
	call	cudaMemcpy@PLT
	movl	$109, %esi
	movl	%eax, %edi
	call	_ZL11HandleError9cudaErrorPKci.constprop.0
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movl	$112, %esi
	movl	%eax, %edi
	call	_ZL11HandleError9cudaErrorPKci.constprop.0
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movl	$113, %esi
	movl	%eax, %edi
	call	_ZL11HandleError9cudaErrorPKci.constprop.0
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movl	$114, %esi
	movl	%eax, %edi
	call	_ZL11HandleError9cudaErrorPKci.constprop.0
	movq	56(%rsp), %rdi
	call	cudaStreamDestroy@PLT
	movl	$117, %esi
	movl	%eax, %edi
	call	_ZL11HandleError9cudaErrorPKci.constprop.0
	movq	8(%rsp), %rax
	xorl	%ecx, %ecx
	movq	16(%rsp), %rdx
	movq	24(%rsp), %rsi
	movsd	.LC5(%rip), %xmm2
	movss	.LC4(%rip), %xmm1
.L18:
	movss	(%rax,%rcx,4), %xmm0
	addss	(%rdx,%rcx,4), %xmm0
	subss	(%rsi,%rcx,4), %xmm0
	andps	%xmm1, %xmm0
	cvtss2sd	%xmm0, %xmm0
	comisd	%xmm2, %xmm0
	jbe	.L23
	movq	stderr(%rip), %rdi
	leaq	.LC6(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L23:
	incq	%rcx
	cmpq	$50000, %rcx
	jne	.L18
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	8(%rsp), %rdi
	call	cudaFreeHost@PLT
	movl	$159, %esi
	movl	%eax, %edi
	call	_ZL11HandleError9cudaErrorPKci.constprop.0
	movq	16(%rsp), %rdi
	call	cudaFreeHost@PLT
	movl	$160, %esi
	movl	%eax, %edi
	call	_ZL11HandleError9cudaErrorPKci.constprop.0
	movq	24(%rsp), %rdi
	call	cudaFreeHost@PLT
	movl	$161, %esi
	movl	%eax, %edi
	call	_ZL11HandleError9cudaErrorPKci.constprop.0
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L19
	call	__stack_chk_fail@PLT
.L19:
	addq	$96, %rsp
	.cfi_def_cfa_offset 32
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2035:
	.size	main, .-main
	.section	.rodata.str1.1
.LC8:
	.string	"_Z16shared_vectorAddIfEvPKT_S2_PS0_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2063:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC8(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z16shared_vectorAddIfEvPKT_S2_PS0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2063:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC3:
	.long	805306368
	.section	.rodata.cst16,"aM",@progbits,16
	.align 16
.LC4:
	.long	2147483647
	.long	0
	.long	0
	.long	0
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC5:
	.long	-1998362383
	.long	1055193269
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/**
* Vector addition: C = A + B.
* nvcc 
*/

#include <stdio.h>
#include <hip/hip_runtime.h>
// For the CUDA runtime routines (prefixed with "cuda_")
//#include <cuda_runtime.h>

// #include <iostream>
// using namespace std;
// #define mycout cout<<"["<<__FILE__<<":"<<__LINE__<<"]<<endl"
#define myprint printf("[%s:%d] ",__FILE__,__LINE__)
#define nums_thread_pre_block 256

static void HandleError(hipError_t err,
                         const char *file,
                         int line )
{
    // Error code to check return values for CUDA calls
    // cudaError_t err = cudaSuccess;
    if (err != hipSuccess)
    {
        fprintf(stderr, "%s in %s at line %d\n", hipGetErrorString(err),file, line);
        exit(EXIT_FAILURE);
    }
}

/**检测*/
#define checkError(err) (HandleError( err, __FILE__, __LINE__ ))

template<typename T>
__device__ void add1(const T &a,const T &b,T &c)
{
    c=a+b;
}
// or
template<typename T>
__device__ T add2(const T &a,const T &b)
{
    T c=a+b;
    return c;
}

template<typename T>
__global__ void vectorAdd(const T *A,const T *B, T *C, const int numElements)
{
    int i = blockDim.x * blockIdx.x + threadIdx.x;

    if (i < numElements)
    {
        // C[i] = A[i] + B[i];
        // add1<T>(A[i],B[i],C[i]);
        C[i]=add2<T>(A[i],B[i]);
    }
}

// 使用shared memory
template<typename T>
__global__ void shared_vectorAdd(const T *A,const T *B, T *C, const int numElements)
{
    extern __shared__ T sdatas[]; //共享内存声明
    int idx = blockDim.x * blockIdx.x + threadIdx.x;
    int tid = threadIdx.x;
    if(idx>=numElements) return;
    // global memory-->shared memory
    // sdatas[tid]=add2<T>(A[idx],B[idx]);
    sdatas[tid]=A[idx]+B[idx];
    __syncthreads(); // 必须线程同步，保证所有global内存变量都拷贝到共享内存

    // shared momery-->global momery
    C[idx]=sdatas[tid];
}

/**cpu数据传入，调用GPU运行*/
template<typename T>
int addInference(
    const T *h_a,
    const T *h_b,
    T *h_c,
    const int n // 数据总长度
    )
{
    size_t size=n*sizeof(T); // int size=n*sizeof(T);
    // 创建GPU变量并分配GPU内存
    T *d_a=NULL,*d_b=NULL,*d_c=NULL;
    checkError(hipMalloc((void **)&d_a, size));
    checkError(hipMalloc((void **)&d_b, size));
    checkError(hipMalloc((void **)&d_c, size));

    // cpu-->GPU
    checkError(hipMemcpy(d_a,h_a,size,hipMemcpyHostToDevice));
    checkError(hipMemcpy(d_b,h_b,size,hipMemcpyHostToDevice));

    // 启动GPU计算
    dim3 block(nums_thread_pre_block,1,1);
    dim3 grid((n+nums_thread_pre_block-1)/nums_thread_pre_block,1,1);
    hipStream_t stream; // 创建流，如果不使用就是使用默认流
    checkError(hipStreamCreate(&stream));

    // vectorAdd<<<grid,block,0,stream>>>(d_a,d_b,d_c,n); // global memory
    shared_vectorAdd<<<grid,block,nums_thread_pre_block*sizeof(T),stream>>>(d_a,d_b,d_c,n); // shared memory
    checkError(hipGetLastError());// launch vectorAdd kernel

    // checkError(cudaDeviceSynchronize());//CPU等待GPU，使用多流时需使用

    // GPU-->CPU
    checkError(hipMemcpy(h_c,d_c,size,hipMemcpyDeviceToHost));

    // free GPU
    checkError(hipFree(d_a));
    checkError(hipFree(d_b));
    checkError(hipFree(d_c));

    // 销毁流
    checkError(hipStreamDestroy(stream));

    return 0;
}

int main()
{
    myprint;
    const int N=50000;
    size_t size=N*sizeof(float);
    // CPU 
    float *h_a=NULL,*h_b=NULL,*h_c=NULL;
    // 分配内存 cudaMallocHost 比 malloc效率高
    checkError(hipHostMalloc((void**)&h_a,size, hipHostMallocDefault));
    checkError(hipHostMalloc((void**)&h_b,size, hipHostMallocDefault));
    checkError(hipHostMalloc((void**)&h_c,size, hipHostMallocDefault));

    // 赋值
    // Initialize the host input vectors
    for (int i = 0; i < N; ++i)
    {
        h_a[i] = rand()/(float)RAND_MAX;
        h_b[i] = rand()/(float)RAND_MAX;
    }

    // 调用函数执行
    addInference<float>(h_a,h_b,h_c,N);

    // 验证结果
    // Verify that the result vector is correct
    for (int i = 0; i < N; ++i)
    {
        if (fabs(h_a[i] + h_b[i] - h_c[i]) > 1e-5)
        {
            fprintf(stderr, "Result verification failed at element %d!\n", i);
            exit(EXIT_FAILURE);
        }
    }
    printf("Test PASSED\n");

    // free CPU
    // free(h_a); // 针对malloc分配空间时
    checkError(hipHostFree(h_a));
    checkError(hipHostFree(h_b));
    checkError(hipHostFree(h_c));

    return 0;
}
	.text
	.file	"vectorAdd2.hip"
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI0_0:
	.long	0x30000000                      # float 4.65661287E-10
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0
.LCPI0_1:
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI0_2:
	.quad	0x3ee4f8b588e368f1              # double 1.0000000000000001E-5
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	xorl	%r15d, %r15d
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$124, %edx
	xorl	%eax, %eax
	callq	printf
	leaq	8(%rsp), %rdi
	movq	%r15, (%rdi)
	leaq	24(%rsp), %r14
	movq	%r15, (%r14)
	leaq	16(%rsp), %rbx
	movq	%r15, (%rbx)
	movl	$200000, %esi                   # imm = 0x30D40
	xorl	%edx, %edx
	callq	hipHostMalloc
	movl	%eax, %edi
	movl	$130, %esi
	callq	_ZL11HandleError10hipError_tPKci
	movl	$200000, %esi                   # imm = 0x30D40
	movq	%r14, %rdi
	xorl	%edx, %edx
	callq	hipHostMalloc
	movl	%eax, %edi
	movl	$131, %esi
	callq	_ZL11HandleError10hipError_tPKci
	movl	$200000, %esi                   # imm = 0x30D40
	movq	%rbx, %rdi
	xorl	%edx, %edx
	callq	hipHostMalloc
	movl	%eax, %edi
	movl	$132, %esi
	callq	_ZL11HandleError10hipError_tPKci
.LBB0_1:                                # =>This Inner Loop Header: Depth=1
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	.LCPI0_0(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	mulss	%xmm1, %xmm0
	movq	8(%rsp), %rax
	movss	%xmm0, (%rax,%r15,4)
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI0_0(%rip), %xmm0
	movq	24(%rsp), %rsi
	movss	%xmm0, (%rsi,%r15,4)
	incq	%r15
	cmpq	$50000, %r15                    # imm = 0xC350
	jne	.LBB0_1
# %bb.2:
	movq	8(%rsp), %rdi
	movq	16(%rsp), %rdx
	movl	$50000, %ecx                    # imm = 0xC350
	callq	_Z12addInferenceIfEiPKT_S2_PS0_i
	movq	8(%rsp), %rax
	movq	24(%rsp), %rcx
	xorl	%edx, %edx
	movq	16(%rsp), %rsi
	movaps	.LCPI0_1(%rip), %xmm0           # xmm0 = [NaN,NaN,NaN,NaN]
	movsd	.LCPI0_2(%rip), %xmm1           # xmm1 = mem[0],zero
.LBB0_3:                                # =>This Inner Loop Header: Depth=1
	movss	(%rax,%rdx,4), %xmm2            # xmm2 = mem[0],zero,zero,zero
	addss	(%rcx,%rdx,4), %xmm2
	subss	(%rsi,%rdx,4), %xmm2
	andps	%xmm0, %xmm2
	cvtss2sd	%xmm2, %xmm2
	ucomisd	%xmm1, %xmm2
	ja	.LBB0_6
# %bb.4:                                #   in Loop: Header=BB0_3 Depth=1
	incq	%rdx
	cmpq	$50000, %rdx                    # imm = 0xC350
	jne	.LBB0_3
# %bb.5:
	movl	$.Lstr, %edi
	callq	puts@PLT
	movq	8(%rsp), %rdi
	callq	hipHostFree
	movl	%eax, %edi
	movl	$159, %esi
	callq	_ZL11HandleError10hipError_tPKci
	movq	24(%rsp), %rdi
	callq	hipHostFree
	movl	%eax, %edi
	movl	$160, %esi
	callq	_ZL11HandleError10hipError_tPKci
	movq	16(%rsp), %rdi
	callq	hipHostFree
	movl	%eax, %edi
	movl	$161, %esi
	callq	_ZL11HandleError10hipError_tPKci
	xorl	%eax, %eax
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB0_6:
	.cfi_def_cfa_offset 64
	movq	stderr(%rip), %rdi
	movl	$.L.str.2, %esi
                                        # kill: def $edx killed $edx killed $rdx
	xorl	%eax, %eax
	callq	fprintf
	movl	$1, %edi
	callq	exit
.Lfunc_end0:
	.size	main, .Lfunc_end0-main
	.cfi_endproc
                                        # -- End function
	.type	_ZL11HandleError10hipError_tPKci,@function # -- Begin function _ZL11HandleError10hipError_tPKci
_ZL11HandleError10hipError_tPKci:       # @_ZL11HandleError10hipError_tPKci
	.cfi_startproc
# %bb.0:
	testl	%edi, %edi
	jne	.LBB1_2
# %bb.1:
	retq
.LBB1_2:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movl	%esi, %ebx
	movq	stderr(%rip), %r14
	callq	hipGetErrorString
	movl	$.L.str.4, %esi
	movl	$.L.str.1, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	%ebx, %r8d
	xorl	%eax, %eax
	callq	fprintf
	movl	$1, %edi
	callq	exit
.Lfunc_end1:
	.size	_ZL11HandleError10hipError_tPKci, .Lfunc_end1-_ZL11HandleError10hipError_tPKci
	.cfi_endproc
                                        # -- End function
	.section	.text._Z12addInferenceIfEiPKT_S2_PS0_i,"axG",@progbits,_Z12addInferenceIfEiPKT_S2_PS0_i,comdat
	.weak	_Z12addInferenceIfEiPKT_S2_PS0_i # -- Begin function _Z12addInferenceIfEiPKT_S2_PS0_i
	.type	_Z12addInferenceIfEiPKT_S2_PS0_i,@function
_Z12addInferenceIfEiPKT_S2_PS0_i:       # @_Z12addInferenceIfEiPKT_S2_PS0_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, 40(%rsp)                  # 8-byte Spill
	movq	%rsi, 32(%rsp)                  # 8-byte Spill
	movq	%rdi, %rbx
	movl	%ecx, 12(%rsp)                  # 4-byte Spill
	movslq	%ecx, %r15
	leaq	(,%r15,4), %r14
	xorl	%eax, %eax
	leaq	24(%rsp), %rbp
	movq	%rax, (%rbp)
	leaq	16(%rsp), %r13
	movq	%rax, (%r13)
	movq	%rsp, %r12
	movq	%rax, (%r12)
	movq	%rbp, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movl	%eax, %edi
	movl	$88, %esi
	callq	_ZL11HandleError10hipError_tPKci
	movq	%r13, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movl	%eax, %edi
	movl	$89, %esi
	callq	_ZL11HandleError10hipError_tPKci
	movq	%r12, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movl	%eax, %edi
	movl	$90, %esi
	callq	_ZL11HandleError10hipError_tPKci
	movq	(%rbp), %rdi
	movq	%rbx, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	%eax, %edi
	movl	$93, %esi
	callq	_ZL11HandleError10hipError_tPKci
	movq	(%r13), %rdi
	movq	32(%rsp), %rsi                  # 8-byte Reload
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	%eax, %edi
	movl	$94, %esi
	callq	_ZL11HandleError10hipError_tPKci
	leal	255(%r15), %eax
	addl	$510, %r15d                     # imm = 0x1FE
	testl	%eax, %eax
	cmovnsl	%eax, %r15d
	sarl	$8, %r15d
	btsq	$32, %r15
	leaq	48(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipStreamCreate
	movl	%eax, %edi
	movl	$100, %esi
	callq	_ZL11HandleError10hipError_tPKci
	movq	(%rbx), %r9
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$256, %rdx                      # imm = 0x100
	movl	$1024, %r8d                     # imm = 0x400
	movq	%r15, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_2
# %bb.1:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	(%rsp), %rdx
	movl	12(%rsp), %ecx                  # 4-byte Reload
	callq	_Z31__device_stub__shared_vectorAddIfEvPKT_S2_PS0_i
.LBB2_2:
	callq	hipGetLastError
	movl	%eax, %edi
	movl	$104, %esi
	callq	_ZL11HandleError10hipError_tPKci
	movq	(%rsp), %rsi
	movq	40(%rsp), %rdi                  # 8-byte Reload
	movq	%r14, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movl	%eax, %edi
	movl	$109, %esi
	callq	_ZL11HandleError10hipError_tPKci
	movq	24(%rsp), %rdi
	callq	hipFree
	movl	%eax, %edi
	movl	$112, %esi
	callq	_ZL11HandleError10hipError_tPKci
	movq	16(%rsp), %rdi
	callq	hipFree
	movl	%eax, %edi
	movl	$113, %esi
	callq	_ZL11HandleError10hipError_tPKci
	movq	(%rsp), %rdi
	callq	hipFree
	movl	%eax, %edi
	movl	$114, %esi
	callq	_ZL11HandleError10hipError_tPKci
	movq	48(%rsp), %rdi
	callq	hipStreamDestroy
	movl	%eax, %edi
	movl	$117, %esi
	callq	_ZL11HandleError10hipError_tPKci
	xorl	%eax, %eax
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z12addInferenceIfEiPKT_S2_PS0_i, .Lfunc_end2-_Z12addInferenceIfEiPKT_S2_PS0_i
	.cfi_endproc
                                        # -- End function
	.section	.text._Z31__device_stub__shared_vectorAddIfEvPKT_S2_PS0_i,"axG",@progbits,_Z31__device_stub__shared_vectorAddIfEvPKT_S2_PS0_i,comdat
	.weak	_Z31__device_stub__shared_vectorAddIfEvPKT_S2_PS0_i # -- Begin function _Z31__device_stub__shared_vectorAddIfEvPKT_S2_PS0_i
	.type	_Z31__device_stub__shared_vectorAddIfEvPKT_S2_PS0_i,@function
_Z31__device_stub__shared_vectorAddIfEvPKT_S2_PS0_i: # @_Z31__device_stub__shared_vectorAddIfEvPKT_S2_PS0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16shared_vectorAddIfEvPKT_S2_PS0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z31__device_stub__shared_vectorAddIfEvPKT_S2_PS0_i, .Lfunc_end3-_Z31__device_stub__shared_vectorAddIfEvPKT_S2_PS0_i
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16shared_vectorAddIfEvPKT_S2_PS0_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"[%s:%d] "
	.size	.L.str, 9

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/wucng/Study/master/cuda/cuda-samples/0_Simple/vectorAdd/vectorAdd2.hip"
	.size	.L.str.1, 133

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Result verification failed at element %d!\n"
	.size	.L.str.2, 43

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"%s in %s at line %d\n"
	.size	.L.str.4, 21

	.type	_Z16shared_vectorAddIfEvPKT_S2_PS0_i,@object # @_Z16shared_vectorAddIfEvPKT_S2_PS0_i
	.section	.rodata._Z16shared_vectorAddIfEvPKT_S2_PS0_i,"aG",@progbits,_Z16shared_vectorAddIfEvPKT_S2_PS0_i,comdat
	.weak	_Z16shared_vectorAddIfEvPKT_S2_PS0_i
	.p2align	3, 0x0
_Z16shared_vectorAddIfEvPKT_S2_PS0_i:
	.quad	_Z31__device_stub__shared_vectorAddIfEvPKT_S2_PS0_i
	.size	_Z16shared_vectorAddIfEvPKT_S2_PS0_i, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z16shared_vectorAddIfEvPKT_S2_PS0_i"
	.size	.L__unnamed_1, 37

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Test PASSED"
	.size	.Lstr, 12

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z31__device_stub__shared_vectorAddIfEvPKT_S2_PS0_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z16shared_vectorAddIfEvPKT_S2_PS0_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.section	.text._Z16shared_vectorAddIfEvPKT_S2_PS0_i,"axG",@progbits,_Z16shared_vectorAddIfEvPKT_S2_PS0_i,comdat
	.protected	_Z16shared_vectorAddIfEvPKT_S2_PS0_i ; -- Begin function _Z16shared_vectorAddIfEvPKT_S2_PS0_i
	.globl	_Z16shared_vectorAddIfEvPKT_S2_PS0_i
	.p2align	8
	.type	_Z16shared_vectorAddIfEvPKT_S2_PS0_i,@function
_Z16shared_vectorAddIfEvPKT_S2_PS0_i:   ; @_Z16shared_vectorAddIfEvPKT_S2_PS0_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[0:1], s[0:1], 0x10
	v_lshl_add_u32 v0, v0, 2, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v3, vcc_lo, s4, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v2, vcc_lo
	v_add_co_u32 v5, vcc_lo, s6, v1
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v2, vcc_lo
	global_load_b32 v3, v[3:4], off
	global_load_b32 v4, v[5:6], off
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v3, v3, v4
	ds_store_b32 v0, v3
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v3, v0
	v_add_co_u32 v0, vcc_lo, s0, v1
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v2, vcc_lo
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[0:1], v3, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16shared_vectorAddIfEvPKT_S2_PS0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z16shared_vectorAddIfEvPKT_S2_PS0_i,"axG",@progbits,_Z16shared_vectorAddIfEvPKT_S2_PS0_i,comdat
.Lfunc_end0:
	.size	_Z16shared_vectorAddIfEvPKT_S2_PS0_i, .Lfunc_end0-_Z16shared_vectorAddIfEvPKT_S2_PS0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 224
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         152
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z16shared_vectorAddIfEvPKT_S2_PS0_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z16shared_vectorAddIfEvPKT_S2_PS0_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
