#include <stdlib.h>
#include <stdio.h>
#include <time.h>

#define THREADS 16
#define BLOCKS 32
#define WIDTH (THREADS * BLOCKS)

int size = WIDTH * WIDTH * sizeof(float);
float *M, *N, *P;
float *gpuM, *gpuN, *gpuP;
time_t seed;

void initGPU(int devNum){
  cudaSetDevice(devNum);

  cudaMalloc((void**)&gpuM, size);
  cudaMalloc((void**)&gpuN, size);
  cudaMalloc((void**)&gpuP, size);
}

void randomInit(float* data, int size){
  for (int i=0; i<size; i++)
    data[i] = drand48();
}

void cpuMatrixMul(const float* M, const float* N, float* P){
  int i, j, k;
  float sum;

  for (i=0; i<WIDTH; i++)
    for (j=0; j<WIDTH; j++){
      sum = 0.0f;
      for (k=0; k<WIDTH; k++)
	sum += M[i * WIDTH + k] * N[k * WIDTH + j];
      P[i * WIDTH + j] = sum;
    }
}

__global__ void
matrixMultKernel(float* M, float* N, float* P){
  int tx = blockIdx.x * THREADS + threadIdx.x;
  int ty = blockIdx.y * THREADS + threadIdx.y;
  float tmp = 0.0f;

  for (int k=0; k<WIDTH; k++)
    tmp += M[ty * WIDTH + k] * N[k * WIDTH + tx];
  P[ty * WIDTH + tx] = tmp;
}

int main(void){
  float msecTotal;
  cudaEvent_t start;
  cudaEvent_t stop;

  initGPU(0);
  time(&seed);
  srand48(seed);
  M = (float*)malloc(size);
  N = (float*)malloc(size);
  P = (float*)malloc(size);
  randomInit(M, WIDTH*WIDTH);
  randomInit(N, WIDTH*WIDTH);
  cudaEventCreate(&start);
  cudaEventCreate(&stop);

  cudaEventRecord(start, NULL);
  cpuMatrixMul(M, N, P);
  cudaEventRecord(stop, NULL);
  cudaEventSynchronize(stop);
  cudaEventElapsedTime(&msecTotal, start, stop);
  printf("cpu time: %.3f ms\n", msecTotal);

  cudaEventRecord(start, NULL);
  cudaMemcpy(gpuM, M, size, cudaMemcpyHostToDevice);
  cudaMemcpy(gpuN, N, size, cudaMemcpyHostToDevice);
  dim3 numThread(THREADS, THREADS);
  dim3 numBlock(BLOCKS, BLOCKS);
  matrixMultKernel<<<numBlock, numThread>>>(gpuM, gpuN, gpuP);
  cudaDeviceSynchronize();
  cudaMemcpy(P, gpuP, size, cudaMemcpyDeviceToHost);
  cudaEventRecord(stop, NULL);
  cudaEventSynchronize(stop);
  cudaEventElapsedTime(&msecTotal, start, stop);
  printf("gpu time: %.3f ms\n",msecTotal);

  free(M);
  free(N);
  free(P);
  cudaFree(gpuM);
  cudaFree(gpuN);
  cudaFree(gpuP);
  return 0;
}

	.file	"tmpxft_00356f76_00000000-6_simpleMatMult.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2033:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2033:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z7initGPUi
	.type	_Z7initGPUi, @function
_Z7initGPUi:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	cudaSetDevice@PLT
	movslq	size(%rip), %rsi
	leaq	gpuM(%rip), %rdi
	call	cudaMalloc@PLT
	movslq	size(%rip), %rsi
	leaq	gpuN(%rip), %rdi
	call	cudaMalloc@PLT
	movslq	size(%rip), %rsi
	popq	%rdx
	.cfi_def_cfa_offset 8
	leaq	gpuP(%rip), %rdi
	jmp	cudaMalloc@PLT
	.cfi_endproc
.LFE2027:
	.size	_Z7initGPUi, .-_Z7initGPUi
	.globl	_Z10randomInitPfi
	.type	_Z10randomInitPfi, @function
_Z10randomInitPfi:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movl	%esi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	xorl	%ebx, %ebx
.L5:
	cmpl	%ebx, %ebp
	jle	.L9
	call	drand48@PLT
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%r12,%rbx,4)
	incq	%rbx
	jmp	.L5
.L9:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z10randomInitPfi, .-_Z10randomInitPfi
	.globl	_Z12cpuMatrixMulPKfS0_Pf
	.type	_Z12cpuMatrixMulPKfS0_Pf, @function
_Z12cpuMatrixMulPKfS0_Pf:
.LFB2029:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
.L11:
	xorl	%ecx, %ecx
	leaq	(%rdi,%rax), %r11
	leaq	(%rdx,%rax), %r10
.L15:
	leaq	(%rsi,%rcx,4), %r9
	xorl	%r8d, %r8d
	xorps	%xmm0, %xmm0
.L12:
	movss	(%r11,%r8,4), %xmm1
	mulss	(%r9), %xmm1
	incq	%r8
	addq	$2048, %r9
	addss	%xmm1, %xmm0
	cmpq	$512, %r8
	jne	.L12
	movss	%xmm0, (%r10,%rcx,4)
	incq	%rcx
	cmpq	$512, %rcx
	jne	.L15
	addq	$2048, %rax
	cmpq	$1048576, %rax
	jne	.L11
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z12cpuMatrixMulPKfS0_Pf, .-_Z12cpuMatrixMulPKfS0_Pf
	.globl	_Z40__device_stub__Z16matrixMultKernelPfS_S_PfS_S_
	.type	_Z40__device_stub__Z16matrixMultKernelPfS_S_PfS_S_, @function
_Z40__device_stub__Z16matrixMultKernelPfS_S_PfS_S_:
.LFB2055:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L17
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z16matrixMultKernelPfS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L17:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L19
	call	__stack_chk_fail@PLT
.L19:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2055:
	.size	_Z40__device_stub__Z16matrixMultKernelPfS_S_PfS_S_, .-_Z40__device_stub__Z16matrixMultKernelPfS_S_PfS_S_
	.globl	_Z16matrixMultKernelPfS_S_
	.type	_Z16matrixMultKernelPfS_S_, @function
_Z16matrixMultKernelPfS_S_:
.LFB2056:
	.cfi_startproc
	endbr64
	jmp	_Z40__device_stub__Z16matrixMultKernelPfS_S_PfS_S_
	.cfi_endproc
.LFE2056:
	.size	_Z16matrixMultKernelPfS_S_, .-_Z16matrixMultKernelPfS_S_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"cpu time: %.3f ms\n"
.LC2:
	.string	"gpu time: %.3f ms\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	xorl	%edi, %edi
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	subq	$72, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	_Z7initGPUi
	leaq	seed(%rip), %rdi
	call	time@PLT
	movq	seed(%rip), %rdi
	call	srand48@PLT
	movslq	size(%rip), %rbp
	movq	%rbp, %rdi
	call	malloc@PLT
	movq	%rbp, %rdi
	movq	%rax, %rbx
	movq	%rax, M(%rip)
	call	malloc@PLT
	movq	%rbp, %rdi
	movq	%rax, N(%rip)
	call	malloc@PLT
	movq	%rbx, %rdi
	movl	$262144, %esi
	leaq	12(%rsp), %rbx
	movq	%rax, P(%rip)
	call	_Z10randomInitPfi
	movq	N(%rip), %rdi
	movl	$262144, %esi
	call	_Z10randomInitPfi
	leaq	16(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	24(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	P(%rip), %rdx
	movq	N(%rip), %rsi
	movq	M(%rip), %rdi
	call	_Z12cpuMatrixMulPKfS0_Pf
	movq	24(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	24(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movq	%rbx, %rdi
	call	cudaEventElapsedTime@PLT
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	12(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movslq	size(%rip), %rdx
	movl	$1, %ecx
	movq	M(%rip), %rsi
	movq	gpuM(%rip), %rdi
	call	cudaMemcpy@PLT
	movslq	size(%rip), %rdx
	movl	$1, %ecx
	movq	N(%rip), %rsi
	movq	gpuN(%rip), %rdi
	call	cudaMemcpy@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movabsq	$68719476752, %rdx
	movl	$1, %esi
	movabsq	$137438953504, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L23
	movq	gpuP(%rip), %rdx
	movq	gpuN(%rip), %rsi
	movq	gpuM(%rip), %rdi
	call	_Z40__device_stub__Z16matrixMultKernelPfS_S_PfS_S_
.L23:
	call	cudaDeviceSynchronize@PLT
	movslq	size(%rip), %rdx
	movl	$2, %ecx
	movq	gpuP(%rip), %rsi
	movq	P(%rip), %rdi
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	24(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movq	%rbx, %rdi
	call	cudaEventElapsedTime@PLT
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	12(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	M(%rip), %rdi
	call	free@PLT
	movq	N(%rip), %rdi
	call	free@PLT
	movq	P(%rip), %rdi
	call	free@PLT
	movq	gpuM(%rip), %rdi
	call	cudaFree@PLT
	movq	gpuN(%rip), %rdi
	call	cudaFree@PLT
	movq	gpuP(%rip), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L24
	call	__stack_chk_fail@PLT
.L24:
	addq	$72, %rsp
	.cfi_def_cfa_offset 24
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2030:
	.size	main, .-main
	.section	.rodata.str1.1
.LC3:
	.string	"_Z16matrixMultKernelPfS_S_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2058:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z16matrixMultKernelPfS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2058:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	seed
	.bss
	.align 8
	.type	seed, @object
	.size	seed, 8
seed:
	.zero	8
	.globl	gpuP
	.align 8
	.type	gpuP, @object
	.size	gpuP, 8
gpuP:
	.zero	8
	.globl	gpuN
	.align 8
	.type	gpuN, @object
	.size	gpuN, 8
gpuN:
	.zero	8
	.globl	gpuM
	.align 8
	.type	gpuM, @object
	.size	gpuM, 8
gpuM:
	.zero	8
	.globl	P
	.align 8
	.type	P, @object
	.size	P, 8
P:
	.zero	8
	.globl	N
	.align 8
	.type	N, @object
	.size	N, 8
N:
	.zero	8
	.globl	M
	.align 8
	.type	M, @object
	.size	M, 8
M:
	.zero	8
	.globl	size
	.data
	.align 4
	.type	size, @object
	.size	size, 4
size:
	.long	1048576
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdlib.h>
#include <stdio.h>
#include <time.h>

#define THREADS 16
#define BLOCKS 32
#define WIDTH (THREADS * BLOCKS)

int size = WIDTH * WIDTH * sizeof(float);
float *M, *N, *P;
float *gpuM, *gpuN, *gpuP;
time_t seed;

void initGPU(int devNum){
  hipSetDevice(devNum);

  hipMalloc((void**)&gpuM, size);
  hipMalloc((void**)&gpuN, size);
  hipMalloc((void**)&gpuP, size);
}

void randomInit(float* data, int size){
  for (int i=0; i<size; i++)
    data[i] = drand48();
}

void cpuMatrixMul(const float* M, const float* N, float* P){
  int i, j, k;
  float sum;

  for (i=0; i<WIDTH; i++)
    for (j=0; j<WIDTH; j++){
      sum = 0.0f;
      for (k=0; k<WIDTH; k++)
	sum += M[i * WIDTH + k] * N[k * WIDTH + j];
      P[i * WIDTH + j] = sum;
    }
}

__global__ void
matrixMultKernel(float* M, float* N, float* P){
  int tx = blockIdx.x * THREADS + threadIdx.x;
  int ty = blockIdx.y * THREADS + threadIdx.y;
  float tmp = 0.0f;

  for (int k=0; k<WIDTH; k++)
    tmp += M[ty * WIDTH + k] * N[k * WIDTH + tx];
  P[ty * WIDTH + tx] = tmp;
}

int main(void){
  float msecTotal;
  hipEvent_t start;
  hipEvent_t stop;

  initGPU(0);
  time(&seed);
  srand48(seed);
  M = (float*)malloc(size);
  N = (float*)malloc(size);
  P = (float*)malloc(size);
  randomInit(M, WIDTH*WIDTH);
  randomInit(N, WIDTH*WIDTH);
  hipEventCreate(&start);
  hipEventCreate(&stop);

  hipEventRecord(start, NULL);
  cpuMatrixMul(M, N, P);
  hipEventRecord(stop, NULL);
  hipEventSynchronize(stop);
  hipEventElapsedTime(&msecTotal, start, stop);
  printf("cpu time: %.3f ms\n", msecTotal);

  hipEventRecord(start, NULL);
  hipMemcpy(gpuM, M, size, hipMemcpyHostToDevice);
  hipMemcpy(gpuN, N, size, hipMemcpyHostToDevice);
  dim3 numThread(THREADS, THREADS);
  dim3 numBlock(BLOCKS, BLOCKS);
  matrixMultKernel<<<numBlock, numThread>>>(gpuM, gpuN, gpuP);
  hipDeviceSynchronize();
  hipMemcpy(P, gpuP, size, hipMemcpyDeviceToHost);
  hipEventRecord(stop, NULL);
  hipEventSynchronize(stop);
  hipEventElapsedTime(&msecTotal, start, stop);
  printf("gpu time: %.3f ms\n",msecTotal);

  free(M);
  free(N);
  free(P);
  hipFree(gpuM);
  hipFree(gpuN);
  hipFree(gpuP);
  return 0;
}

	.text
	.file	"simpleMatMult.hip"
	.globl	_Z7initGPUi                     # -- Begin function _Z7initGPUi
	.type	_Z7initGPUi,@function
_Z7initGPUi:                            # @_Z7initGPUi
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	hipSetDevice
	movslq	size(%rip), %rsi
	movl	$gpuM, %edi
	callq	hipMalloc
	movslq	size(%rip), %rsi
	movl	$gpuN, %edi
	callq	hipMalloc
	movslq	size(%rip), %rsi
	movl	$gpuP, %edi
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	hipMalloc                       # TAILCALL
.Lfunc_end0:
	.size	_Z7initGPUi, .Lfunc_end0-_Z7initGPUi
	.cfi_endproc
                                        # -- End function
	.globl	_Z10randomInitPfi               # -- Begin function _Z10randomInitPfi
	.type	_Z10randomInitPfi,@function
_Z10randomInitPfi:                      # @_Z10randomInitPfi
	.cfi_startproc
# %bb.0:
	testl	%esi, %esi
	jle	.LBB1_4
# %bb.1:                                # %.lr.ph.preheader
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %rbx
	movl	%esi, %r14d
	xorl	%r15d, %r15d
.LBB1_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	callq	drand48
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%rbx,%r15,4)
	incq	%r15
	cmpq	%r15, %r14
	jne	.LBB1_2
# %bb.3:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
	.cfi_restore %r15
.LBB1_4:                                # %._crit_edge
	retq
.Lfunc_end1:
	.size	_Z10randomInitPfi, .Lfunc_end1-_Z10randomInitPfi
	.cfi_endproc
                                        # -- End function
	.globl	_Z12cpuMatrixMulPKfS0_Pf        # -- Begin function _Z12cpuMatrixMulPKfS0_Pf
	.type	_Z12cpuMatrixMulPKfS0_Pf,@function
_Z12cpuMatrixMulPKfS0_Pf:               # @_Z12cpuMatrixMulPKfS0_Pf
	.cfi_startproc
# %bb.0:
	xorl	%eax, %eax
.LBB2_1:                                # %.preheader19
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_2 Depth 2
                                        #       Child Loop BB2_3 Depth 3
	movq	%rax, %rcx
	shlq	$11, %rcx
	addq	%rdx, %rcx
	movq	%rsi, %r8
	xorl	%r9d, %r9d
.LBB2_2:                                # %.preheader
                                        #   Parent Loop BB2_1 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB2_3 Depth 3
	xorps	%xmm0, %xmm0
	movq	%r8, %r10
	xorl	%r11d, %r11d
.LBB2_3:                                #   Parent Loop BB2_1 Depth=1
                                        #     Parent Loop BB2_2 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movss	(%rdi,%r11,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	mulss	(%r10), %xmm1
	addss	%xmm1, %xmm0
	incq	%r11
	addq	$2048, %r10                     # imm = 0x800
	cmpq	$512, %r11                      # imm = 0x200
	jne	.LBB2_3
# %bb.4:                                #   in Loop: Header=BB2_2 Depth=2
	movss	%xmm0, (%rcx,%r9,4)
	incq	%r9
	addq	$4, %r8
	cmpq	$512, %r9                       # imm = 0x200
	jne	.LBB2_2
# %bb.5:                                #   in Loop: Header=BB2_1 Depth=1
	incq	%rax
	addq	$2048, %rdi                     # imm = 0x800
	cmpq	$512, %rax                      # imm = 0x200
	jne	.LBB2_1
# %bb.6:
	retq
.Lfunc_end2:
	.size	_Z12cpuMatrixMulPKfS0_Pf, .Lfunc_end2-_Z12cpuMatrixMulPKfS0_Pf
	.cfi_endproc
                                        # -- End function
	.globl	_Z31__device_stub__matrixMultKernelPfS_S_ # -- Begin function _Z31__device_stub__matrixMultKernelPfS_S_
	.type	_Z31__device_stub__matrixMultKernelPfS_S_,@function
_Z31__device_stub__matrixMultKernelPfS_S_: # @_Z31__device_stub__matrixMultKernelPfS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16matrixMultKernelPfS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z31__device_stub__matrixMultKernelPfS_S_, .Lfunc_end3-_Z31__device_stub__matrixMultKernelPfS_S_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	xorl	%r15d, %r15d
	xorl	%edi, %edi
	callq	_Z7initGPUi
	movl	$seed, %edi
	callq	time
	movq	seed(%rip), %rdi
	callq	srand48
	movslq	size(%rip), %r14
	movq	%r14, %rdi
	callq	malloc
	movq	%rax, %rbx
	movq	%rax, M(%rip)
	movq	%r14, %rdi
	callq	malloc
	movq	%rax, N(%rip)
	movq	%r14, %rdi
	callq	malloc
	movq	%rax, P(%rip)
.LBB4_1:                                # %.lr.ph.i
                                        # =>This Inner Loop Header: Depth=1
	callq	drand48
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%rbx,%r15,4)
	incq	%r15
	cmpq	$262144, %r15                   # imm = 0x40000
	jne	.LBB4_1
# %bb.2:                                # %_Z10randomInitPfi.exit
	movq	N(%rip), %rbx
	xorl	%r14d, %r14d
.LBB4_3:                                # %.lr.ph.i7
                                        # =>This Inner Loop Header: Depth=1
	callq	drand48
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%rbx,%r14,4)
	incq	%r14
	cmpq	$262144, %r14                   # imm = 0x40000
	jne	.LBB4_3
# %bb.4:                                # %_Z10randomInitPfi.exit11
	leaq	16(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventCreate
	leaq	8(%rsp), %rdi
	callq	hipEventCreate
	movq	(%rbx), %rdi
	xorl	%ebx, %ebx
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	M(%rip), %rax
	movq	N(%rip), %rcx
	movq	P(%rip), %rdx
.LBB4_5:                                # %.preheader19.i
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_6 Depth 2
                                        #       Child Loop BB4_7 Depth 3
	movq	%rbx, %rsi
	shlq	$11, %rsi
	addq	%rdx, %rsi
	movq	%rcx, %rdi
	xorl	%r8d, %r8d
.LBB4_6:                                # %.preheader.i
                                        #   Parent Loop BB4_5 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB4_7 Depth 3
	xorps	%xmm0, %xmm0
	movq	%rdi, %r9
	xorl	%r10d, %r10d
.LBB4_7:                                #   Parent Loop BB4_5 Depth=1
                                        #     Parent Loop BB4_6 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movss	(%rax,%r10,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	mulss	(%r9), %xmm1
	addss	%xmm1, %xmm0
	incq	%r10
	addq	$2048, %r9                      # imm = 0x800
	cmpq	$512, %r10                      # imm = 0x200
	jne	.LBB4_7
# %bb.8:                                #   in Loop: Header=BB4_6 Depth=2
	movss	%xmm0, (%rsi,%r8,4)
	incq	%r8
	addq	$4, %rdi
	cmpq	$512, %r8                       # imm = 0x200
	jne	.LBB4_6
# %bb.9:                                #   in Loop: Header=BB4_5 Depth=1
	incq	%rbx
	addq	$2048, %rax                     # imm = 0x800
	cmpq	$512, %rbx                      # imm = 0x200
	jne	.LBB4_5
# %bb.10:                               # %_Z12cpuMatrixMulPKfS0_Pf.exit
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	8(%rsp), %rdi
	callq	hipEventSynchronize
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	leaq	28(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbx), %xmm0
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	gpuM(%rip), %rdi
	movq	M(%rip), %rsi
	movslq	size(%rip), %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	gpuN(%rip), %rdi
	movq	N(%rip), %rsi
	movslq	size(%rip), %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$137438953504, %rdi             # imm = 0x2000000020
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_12
# %bb.11:
	movq	gpuM(%rip), %rdi
	movq	gpuN(%rip), %rsi
	movq	gpuP(%rip), %rdx
	callq	_Z31__device_stub__matrixMultKernelPfS_S_
.LBB4_12:
	callq	hipDeviceSynchronize
	movq	P(%rip), %rdi
	movq	gpuP(%rip), %rsi
	movslq	size(%rip), %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	8(%rsp), %rdi
	callq	hipEventSynchronize
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	leaq	28(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbx), %xmm0
	movl	$.L.str.1, %edi
	movb	$1, %al
	callq	printf
	movq	M(%rip), %rdi
	callq	free
	movq	N(%rip), %rdi
	callq	free
	movq	P(%rip), %rdi
	callq	free
	movq	gpuM(%rip), %rdi
	callq	hipFree
	movq	gpuN(%rip), %rdi
	callq	hipFree
	movq	gpuP(%rip), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	main, .Lfunc_end4-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16matrixMultKernelPfS_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	size,@object                    # @size
	.data
	.globl	size
	.p2align	2, 0x0
size:
	.long	1048576                         # 0x100000
	.size	size, 4

	.type	M,@object                       # @M
	.bss
	.globl	M
	.p2align	3, 0x0
M:
	.quad	0
	.size	M, 8

	.type	N,@object                       # @N
	.globl	N
	.p2align	3, 0x0
N:
	.quad	0
	.size	N, 8

	.type	P,@object                       # @P
	.globl	P
	.p2align	3, 0x0
P:
	.quad	0
	.size	P, 8

	.type	gpuM,@object                    # @gpuM
	.globl	gpuM
	.p2align	3, 0x0
gpuM:
	.quad	0
	.size	gpuM, 8

	.type	gpuN,@object                    # @gpuN
	.globl	gpuN
	.p2align	3, 0x0
gpuN:
	.quad	0
	.size	gpuN, 8

	.type	gpuP,@object                    # @gpuP
	.globl	gpuP
	.p2align	3, 0x0
gpuP:
	.quad	0
	.size	gpuP, 8

	.type	seed,@object                    # @seed
	.globl	seed
	.p2align	3, 0x0
seed:
	.quad	0                               # 0x0
	.size	seed, 8

	.type	_Z16matrixMultKernelPfS_S_,@object # @_Z16matrixMultKernelPfS_S_
	.section	.rodata,"a",@progbits
	.globl	_Z16matrixMultKernelPfS_S_
	.p2align	3, 0x0
_Z16matrixMultKernelPfS_S_:
	.quad	_Z31__device_stub__matrixMultKernelPfS_S_
	.size	_Z16matrixMultKernelPfS_S_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"cpu time: %.3f ms\n"
	.size	.L.str, 19

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"gpu time: %.3f ms\n"
	.size	.L.str.1, 19

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z16matrixMultKernelPfS_S_"
	.size	.L__unnamed_1, 27

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z31__device_stub__matrixMultKernelPfS_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym gpuM
	.addrsig_sym gpuN
	.addrsig_sym gpuP
	.addrsig_sym seed
	.addrsig_sym _Z16matrixMultKernelPfS_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z16matrixMultKernelPfS_S_ ; -- Begin function _Z16matrixMultKernelPfS_S_
	.globl	_Z16matrixMultKernelPfS_S_
	.p2align	8
	.type	_Z16matrixMultKernelPfS_S_,@function
_Z16matrixMultKernelPfS_S_:             ; @_Z16matrixMultKernelPfS_S_
; %bb.0:
	v_lshrrev_b32_e32 v1, 1, v0
	s_load_b128 s[4:7], s[0:1], 0x0
	v_and_b32_e32 v4, 0x3ff, v0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_mov_b64 s[2:3], 0
	v_dual_mov_b32 v0, 0 :: v_dual_and_b32 v1, 0x7fe00, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshl_add_u32 v4, s14, 4, v4
	v_lshl_add_u32 v1, s15, 13, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v3, vcc_lo
	v_mov_b32_e32 v2, v4
.LBB0_1:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ashrrev_i32_e32 v3, 31, v2
	v_add_co_u32 v7, vcc_lo, v5, s2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v8, vcc_lo, s3, v6, vcc_lo
	v_lshlrev_b64 v[9:10], 2, v[2:3]
	v_add_nc_u32_e32 v2, 0x200, v2
	s_add_u32 s2, s2, 4
	s_addc_u32 s3, s3, 0
	s_cmpk_eq_i32 s2, 0x800
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v9, vcc_lo, s6, v9
	v_add_co_ci_u32_e32 v10, vcc_lo, s7, v10, vcc_lo
	global_load_b32 v3, v[7:8], off
	global_load_b32 v7, v[9:10], off
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v0, v3, v7
	s_cbranch_scc0 .LBB0_1
; %bb.2:
	v_add_nc_u32_e32 v1, v1, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s0, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	global_store_b32 v[1:2], v0, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16matrixMultKernelPfS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 24
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z16matrixMultKernelPfS_S_, .Lfunc_end0-_Z16matrixMultKernelPfS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 256
; NumSgprs: 18
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 24
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z16matrixMultKernelPfS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z16matrixMultKernelPfS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     11
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
