#include<cstdlib>
#include<time.h>
#include<cuda.h>
#include<iostream>
#include<math.h> //Included just to use the Power function

#define BLOCK_SIZE 32
#define TILE_SIZE 32
#define MAX_MASK_WIDTH 10
__constant__ float M[MAX_MASK_WIDTH];

using namespace std;

//====== Function made to print vector =========================================
void printVector(float *A, int length)
{
  for (int i=0; i<length; i++)
  {
    cout<<A[i]<<" | ";
  }
  cout<<endl;
}

//====== Function made to fill the vector with some given value ================
void fillVector(float *A, float value, int length)
{
  for (int i=0; i<length; i++)
  {
    A[i] = value;
  }
}

//====== Compare results =======================================================
void compareVector (float *A, float *B,int n)
{
  for (int i=0; i<n; i++ )
  {
    if (A[i]!=B[i])
    {
      cout<<"## Secuential and Parallel results are NOT equal ##"<<endl;
    }
  }
  cout<<"== Secuential and Parallel results are equal =="<<endl;
}

//====== Serial Convolution ====================================================
void serialConvolution(float *input, float *output, float *mask, int mask_length, int length)
{
  int start = 0;
  float temp = 0.0;
  for (int i = 0; i < length; i++)
  {
    for (int j = 0; j < mask_length; j++)
    {
      start = i - (mask_length / 2);
      if (start + j >= 0 && start + j < length)
        temp += input[start + j] * mask[j];
    }
    output[i] = temp;
    temp = 0.0;
  }
}


//====== Basic convolution kernel ==============================================
__global__ void convolutionBasicKernel(float *N, float *M, float *P,
 int Mask_Width, int Width)
 {
   int i = blockIdx.x*blockDim.x + threadIdx.x;
   float Pvalue = 0;
   int N_start_point = i - (Mask_Width/2);
   for (int j = 0; j < Mask_Width; j++)
   {
     if (N_start_point + j >= 0 && N_start_point + j < Width)
     {
       Pvalue += N[N_start_point + j]*M[j];
     }
   }
   P[i] = Pvalue;
}

//====== Convolution kernel using constant memory and caching ==================
__global__ void convolutionKernelConstant(float *N, float *P, int Mask_Width,
 int Width)
 {
   int i = blockIdx.x*blockDim.x + threadIdx.x;
   float Pvalue = 0;
   int N_start_point = i - (Mask_Width/2);
   for (int j = 0; j < Mask_Width; j++)
   {
     if (N_start_point + j >= 0 && N_start_point + j < Width)
     {
       Pvalue += N[N_start_point + j]*M[j];
     }
   }
   P[i] = Pvalue;
}

//===== Tiled Convolution kernel using shared memory ===========================
__global__ void convolutionKernelShared(float *N, float *P, int Mask_Width,
 int Width)
 {
   int i = blockIdx.x*blockDim.x + threadIdx.x;
   __shared__ float N_ds[TILE_SIZE + MAX_MASK_WIDTH - 1];
   int n = Mask_Width/2;
   int halo_index_left = (blockIdx.x - 1)*blockDim.x + threadIdx.x;
   if (threadIdx.x >= blockDim.x - n)
   {
     N_ds[threadIdx.x - (blockDim.x - n)] =
     (halo_index_left < 0) ? 0 : N[halo_index_left];
   }
   N_ds[n + threadIdx.x] = N[blockIdx.x*blockDim.x + threadIdx.x];
   int halo_index_right = (blockIdx.x + 1)*blockDim.x + threadIdx.x;
   if (threadIdx.x < n)
   {
     N_ds[n + blockDim.x + threadIdx.x] =
     (halo_index_right >= Width) ? 0 : N[halo_index_right];
   }
   __syncthreads();
   float Pvalue = 0;
   for(int j = 0; j < Mask_Width; j++)
   {
     Pvalue += N_ds[threadIdx.x + j]*M[j];
   }
   P[i] = Pvalue;
}

//====== A simplier tiled convolution kernel using shared memory and general cahching
__global__ void convolutionKernelSharedSimplier(float *N, float *P, int Mask_Width,
 int Width)
{
 int i = blockIdx.x*blockDim.x + threadIdx.x;
 __shared__ float N_ds[TILE_SIZE];
 N_ds[threadIdx.x] = N[i];
 __syncthreads();
 int This_tile_start_point = blockIdx.x * blockDim.x;
 int Next_tile_start_point = (blockIdx.x + 1) * blockDim.x;
 int N_start_point = i - (Mask_Width/2);
 float Pvalue = 0;
 for (int j = 0; j < Mask_Width; j ++)
 {
   int N_index = N_start_point + j;
   if (N_index >= 0 && N_index < Width)
   {
     if ((N_index >= This_tile_start_point)
     && (N_index < Next_tile_start_point))
     {
       Pvalue += N_ds[threadIdx.x+j-(Mask_Width/2)]*M[j];
     } else
     {
       Pvalue += N[N_index] * M[j];
     }
   }
 }
 P[i] = Pvalue;
}


//===== Convolution kernel call ================================================
void convolutionCall (float *input, float *output, float *mask, int mask_length, int length)
{
  float *d_input;
  float *d_mask;
  float *d_output;
  float block_size = BLOCK_SIZE;//The compiler doesn't let me cast the variable

  cudaMalloc(&d_input, length * sizeof(float));
  cudaMalloc(&d_mask, mask_length * sizeof(float));
  cudaMalloc(&d_output, length * sizeof(float));

  cudaMemcpy (d_input, input, length * sizeof (float), cudaMemcpyHostToDevice);
  cudaMemcpy (d_mask, mask, mask_length * sizeof (float), cudaMemcpyHostToDevice);

  dim3 dimGrid (ceil (length / block_size), 1, 1);
  dim3 dimBlock (block_size, 1, 1);

  convolutionBasicKernel<<<dimGrid, dimBlock>>> (d_input, d_mask, d_output, mask_length, length);
  cudaDeviceSynchronize();

  cudaMemcpy (output, d_output, length * sizeof (float), cudaMemcpyDeviceToHost);
  cudaFree (d_input);
  cudaFree (d_mask);
  cudaFree (d_output);
}

//==============================================================================
void convolutionCallConstant (float *input, float *output, float *mask, int mask_length, int length)
{
  float *d_input;
  float *d_output;
  float block_size = BLOCK_SIZE;//The compiler doesn't let me cast the variable

  cudaMalloc(&d_input, length * sizeof(float));
  cudaMalloc(&d_output, length * sizeof(float));

  cudaMemcpy (d_input, input, length * sizeof (float), cudaMemcpyHostToDevice);
  cudaMemcpyToSymbol (M, mask, mask_length * sizeof (float));

  dim3 dimGrid (ceil (length / block_size), 1, 1);
  dim3 dimBlock (block_size, 1, 1);

  convolutionKernelConstant<<<dimGrid, dimBlock>>> (d_input,d_output, mask_length, length);
  cudaDeviceSynchronize();

  cudaMemcpy (output, d_output, length * sizeof (float), cudaMemcpyDeviceToHost);
  cudaFree (d_input);
  cudaFree (d_output);
}

//==============================================================================
void convolutionCallWithTilesComplex (float *input, float *output, float *mask, int mask_length, int length)
{
  float *d_input;
  float *d_output;
  float block_size = BLOCK_SIZE;//The compiler doesn't let me cast the variable

  cudaMalloc(&d_input, length * sizeof(float));
  cudaMalloc(&d_output, length * sizeof(float));

  cudaMemcpy (d_input, input, length * sizeof (float), cudaMemcpyHostToDevice);
  cudaMemcpyToSymbol (M, mask, mask_length * sizeof (float));

  dim3 dimGrid (ceil (length / block_size), 1, 1);
  dim3 dimBlock (block_size, 1, 1);

  convolutionKernelShared<<<dimGrid, dimBlock>>> (d_input,d_output, mask_length, length);
  cudaDeviceSynchronize();

  cudaMemcpy (output, d_output, length * sizeof (float), cudaMemcpyDeviceToHost);
  cudaFree (d_input);
  cudaFree (d_output);
}

//====== Convolution kernel call tiled version (the simplified one) ============
void convolutionCallWithTiles (float *input, float *output, float *mask, int mask_length, int length)
{
  float *d_input;
  float *d_output;
  float block_size = BLOCK_SIZE;//The compiler doesn't let me cast the variable

  cudaMalloc(&d_input, length * sizeof(float));
  cudaMalloc(&d_output, length * sizeof(float));

  cudaMemcpy (d_input, input, length * sizeof (float), cudaMemcpyHostToDevice);
  cudaMemcpyToSymbol (M, mask, mask_length * sizeof (float));

  dim3 dimGrid (ceil (length / block_size), 1, 1);
  dim3 dimBlock (block_size, 1, 1);

  convolutionKernelSharedSimplier<<<dimGrid, dimBlock>>> (d_input,d_output, mask_length, length);
  cudaDeviceSynchronize();

  cudaMemcpy (output, d_output, length * sizeof (float), cudaMemcpyDeviceToHost);
  cudaFree (d_input);
  cudaFree (d_output);
}

//================= MAIN =======================================================
int main ()
{
  for(int i=5; i<=20;i++)//to execute the program many times just to get all the test values
  {
    cout<<"=> EXECUTION #"<<i-5<<endl;
    unsigned int length = pow(2,i);
    int mask_length = 5;
    int op = 1; //To select which parallel version we want to execute
    //1 Paralelo Basico - 2 Paralelo con memoria constante
    //3 paralelo con memoria compartida y tiling 
    clock_t start, finish; //Clock variables
    double elapsedSecuential, elapsedParallel, elapsedParallelConstant,
    elapsedParallelSharedComplex,elapsedParallelSharedTiles, optimization;

    float *A = (float *) malloc(length * sizeof(float));
    float *mask = (float *) malloc(mask_length * sizeof(float));
    float *Cserial = (float *) malloc(length * sizeof(float));
    float *Cparallel = (float *) malloc(length * sizeof(float));
    float *CparallelWithTiles = (float *) malloc(length * sizeof(float));
    float *CparallelConstant = (float *) malloc (length * sizeof(float));
    float *CparallelWithTilesComplex = (float *) malloc(length * sizeof(float));

    fillVector(A,1.0,length);
    fillVector(mask,2.0,mask_length);
    fillVector(Cserial,0.0,length);
    fillVector(Cparallel,0.0,length);
    fillVector(CparallelWithTiles,0.0,length);
    fillVector(CparallelConstant,0.0,length);
    fillVector(CparallelWithTilesComplex,0.0,length);

    //============================================================================
    cout<<"Serial result"<<endl;
    start = clock();
    serialConvolution(A,Cserial,mask,mask_length,length);
    finish = clock();
    elapsedSecuential = (((double) (finish - start)) / CLOCKS_PER_SEC );
    cout<< "The Secuential process took: " << elapsedSecuential << " seconds to execute "<< endl;
    //printVector(Cserial,length);
    cout<<endl;

    //============================================================================
    switch (op)
    {
      case 1:
              cout<<"==============================================================="<<endl;
              cout<<"Paralelo basico"<<endl;
              start = clock();
              convolutionCall(A,Cparallel,mask,mask_length,length);
              finish = clock();
              elapsedParallel = (((double) (finish - start)) / CLOCKS_PER_SEC );
              cout<< "The parallel process took: " << elapsedParallel << " seconds to execute "<< endl;
              optimization = elapsedSecuential/elapsedParallel;
              cout<< "The acceleration we've got: " << optimization <<endl;
              //printVector(Cparallel,length);
              compareVector(Cserial,Cparallel,length);
              cout<<endl;
              break;

      case 2:
              cout<<"==============================================================="<<endl;
              cout<<"Paralelo con memoria constante"<<endl;
              start = clock();
              convolutionCallConstant(A,CparallelConstant,mask,mask_length,length);
              finish = clock();
              elapsedParallelConstant = (((double) (finish - start)) / CLOCKS_PER_SEC );
              cout<< "The parallel process took: " << elapsedParallelConstant << " seconds to execute "<< endl;
              optimization = elapsedSecuential/elapsedParallelConstant;
              cout<< "The acceleration we've got: " << optimization <<endl;
              //printVector(CparallelConstant,length);
              compareVector(Cserial,CparallelConstant,length);
              cout<<endl;
              break;

      case 3:
              cout<<"==============================================================="<<endl;
              cout<<"Paralelo con memoria compartida y Tiling"<<endl;
              start = clock();
              convolutionCallWithTilesComplex(A,CparallelWithTilesComplex,mask,mask_length,length);
              finish = clock();
              elapsedParallelSharedComplex = (((double) (finish - start)) / CLOCKS_PER_SEC );
              cout<< "The parallel process took: " << elapsedParallelSharedComplex << " seconds to execute "<< endl;
              optimization = elapsedSecuential/elapsedParallelSharedComplex;
              cout<< "The acceleration we've got: " << optimization <<endl;
              //printVector(CparallelWithTilesComplex,length);
              compareVector(Cserial,CparallelWithTilesComplex,length);
              cout<<endl;
              break;
      case 4:
              cout<<"==============================================================="<<endl;
              cout<<"Parallel with shared memory result simplified"<<endl;
              start = clock();
              convolutionCallWithTiles(A,CparallelWithTiles,mask,mask_length,length);
              finish = clock();
              elapsedParallelSharedTiles = (((double) (finish - start)) / CLOCKS_PER_SEC );
              cout<< "The parallel process took: " << elapsedParallelSharedTiles << " seconds to execute "<< endl;
              optimization = elapsedSecuential/elapsedParallelSharedTiles;
              cout<< "The acceleration we've got: " << optimization <<endl;
              //printVector(CparallelWithTiles,length);
              compareVector(Cserial,CparallelWithTiles,length);
              cout<<endl;
              break;
    }


    free(A);
    free(mask);
    free(Cserial);
    free(Cparallel);
    free(CparallelWithTiles);
    free(CparallelConstant);
    free(CparallelWithTilesComplex);
  }
}

 
	.file	"tmpxft_00395d70_00000000-6_convolution1d.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3646:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3646:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.type	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0, @function
_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0:
.LFB4311:
	.cfi_startproc
	jmp	cudaMalloc@PLT
	.cfi_endproc
.LFE4311:
	.size	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0, .-_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	.align 2
	.type	_ZNSolsEPFRSoS_E.isra.0, @function
_ZNSolsEPFRSoS_E.isra.0:
.LFB4312:
	.cfi_startproc
	jmp	*%rsi
	.cfi_endproc
.LFE4312:
	.size	_ZNSolsEPFRSoS_E.isra.0, .-_ZNSolsEPFRSoS_E.isra.0
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	" | "
	.text
	.globl	_Z11printVectorPfi
	.type	_Z11printVectorPfi, @function
_Z11printVectorPfi:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	leaq	_ZSt4cout(%rip), %r13
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movl	%esi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	xorl	%ebx, %ebx
	pushq	%rdx
	.cfi_def_cfa_offset 48
.L5:
	cmpl	%ebx, %ebp
	jle	.L9
	movq	%r13, %rdi
	cvtss2sd	(%r12,%rbx,4), %xmm0
	incq	%rbx
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC0(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	jmp	.L5
.L9:
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%r13, %rdi
	popq	%rax
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	_ZNSolsEPFRSoS_E.isra.0
	.cfi_endproc
.LFE3635:
	.size	_Z11printVectorPfi, .-_Z11printVectorPfi
	.globl	_Z10fillVectorPffi
	.type	_Z10fillVectorPffi, @function
_Z10fillVectorPffi:
.LFB3636:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
.L11:
	cmpl	%eax, %esi
	jle	.L13
	movss	%xmm0, (%rdi,%rax,4)
	incq	%rax
	jmp	.L11
.L13:
	ret
	.cfi_endproc
.LFE3636:
	.size	_Z10fillVectorPffi, .-_Z10fillVectorPffi
	.section	.rodata.str1.1
.LC1:
	.string	"## Secuential and Parallel results are NOT equal ##"
.LC2:
	.string	"== Secuential and Parallel results are equal =="
	.text
	.globl	_Z13compareVectorPfS_i
	.type	_Z13compareVectorPfS_i, @function
_Z13compareVectorPfS_i:
.LFB3637:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	leaq	.LC1(%rip), %r14
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movq	%rsi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movl	%edx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	xorl	%ebx, %ebx
.L15:
	cmpl	%ebx, %ebp
	jle	.L21
	movss	(%r12,%rbx,4), %xmm0
	ucomiss	0(%r13,%rbx,4), %xmm0
	jp	.L19
	je	.L16
.L19:
	movq	%r14, %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
.L16:
	incq	%rbx
	jmp	.L15
.L21:
	leaq	.LC2(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	popq	%rbx
	.cfi_def_cfa_offset 40
	movq	%rax, %rdi
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	_ZNSolsEPFRSoS_E.isra.0
	.cfi_endproc
.LFE3637:
	.size	_Z13compareVectorPfS_i, .-_Z13compareVectorPfS_i
	.globl	_Z17serialConvolutionPfS_S_ii
	.type	_Z17serialConvolutionPfS_S_ii, @function
_Z17serialConvolutionPfS_S_ii:
.LFB3638:
	.cfi_startproc
	endbr64
	movl	%ecx, %eax
	movq	%rsi, %r9
	movq	%rdx, %r10
	movl	$2, %esi
	cltd
	idivl	%esi
	xorl	%esi, %esi
	negl	%eax
	cmpl	%esi, %r8d
	jg	.L35
	ret
.L35:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
.L33:
	movslq	%eax, %rdx
	xorps	%xmm0, %xmm0
	leaq	(%rdi,%rdx,4), %r11
	xorl	%edx, %edx
.L27:
	cmpl	%edx, %ecx
	jle	.L36
	movl	%eax, %ebx
	addl	%edx, %ebx
	js	.L24
	cmpl	%ebx, %r8d
	jle	.L24
	movss	(%r11,%rdx,4), %xmm1
	mulss	(%r10,%rdx,4), %xmm1
	addss	%xmm1, %xmm0
.L24:
	incq	%rdx
	jmp	.L27
.L36:
	movss	%xmm0, (%r9,%rsi,4)
	incq	%rsi
	incl	%eax
	cmpl	%esi, %r8d
	jg	.L33
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3638:
	.size	_Z17serialConvolutionPfS_S_ii, .-_Z17serialConvolutionPfS_S_ii
	.globl	_Z48__device_stub__Z22convolutionBasicKernelPfS_S_iiPfS_S_ii
	.type	_Z48__device_stub__Z22convolutionBasicKernelPfS_S_iiPfS_S_ii, @function
_Z48__device_stub__Z22convolutionBasicKernelPfS_S_iiPfS_S_ii:
.LFB3668:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L37
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z22convolutionBasicKernelPfS_S_ii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L37:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L39
	call	__stack_chk_fail@PLT
.L39:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3668:
	.size	_Z48__device_stub__Z22convolutionBasicKernelPfS_S_iiPfS_S_ii, .-_Z48__device_stub__Z22convolutionBasicKernelPfS_S_iiPfS_S_ii
	.globl	_Z22convolutionBasicKernelPfS_S_ii
	.type	_Z22convolutionBasicKernelPfS_S_ii, @function
_Z22convolutionBasicKernelPfS_S_ii:
.LFB3669:
	.cfi_startproc
	endbr64
	jmp	_Z48__device_stub__Z22convolutionBasicKernelPfS_S_iiPfS_S_ii
	.cfi_endproc
.LFE3669:
	.size	_Z22convolutionBasicKernelPfS_S_ii, .-_Z22convolutionBasicKernelPfS_S_ii
	.globl	_Z15convolutionCallPfS_S_ii
	.type	_Z15convolutionCallPfS_S_ii, @function
_Z15convolutionCallPfS_S_ii:
.LFB3639:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rdi, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rdx, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rsi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movslq	%ecx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%r12, %rbp
	salq	$2, %r12
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%r8d, %ebx
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	movslq	%r8d, %rax
	leaq	24(%rsp), %rdi
	salq	$2, %rax
	movq	%rax, %rsi
	movq	%rax, 8(%rsp)
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	leaq	32(%rsp), %rdi
	movq	%r12, %rsi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	movq	8(%rsp), %rsi
	leaq	40(%rsp), %rdi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	movq	8(%rsp), %rdx
	movq	24(%rsp), %rdi
	movq	%r15, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	32(%rsp), %rdi
	movq	%r12, %rdx
	movq	%r14, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	cvtsi2ssl	%ebx, %xmm0
	mulss	.LC4(%rip), %xmm0
	call	ceilf@PLT
	movl	$134217729, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	cvttss2siq	%xmm0, %rax
	salq	$5, %rdx
	movl	$1, %ecx
	movl	%eax, 48(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 52(%rsp)
	movq	48(%rsp), %rdi
	movl	56(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L43
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	movl	%ebx, %r8d
	movl	%ebp, %ecx
	movq	24(%rsp), %rdi
	call	_Z48__device_stub__Z22convolutionBasicKernelPfS_S_iiPfS_S_ii
.L43:
	call	cudaDeviceSynchronize@PLT
	movq	8(%rsp), %rdx
	movq	40(%rsp), %rsi
	movq	%r13, %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L44
	call	__stack_chk_fail@PLT
.L44:
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3639:
	.size	_Z15convolutionCallPfS_S_ii, .-_Z15convolutionCallPfS_S_ii
	.section	.rodata.str1.1
.LC5:
	.string	"=> EXECUTION #"
.LC9:
	.string	"Serial result"
.LC11:
	.string	"The Secuential process took: "
.LC12:
	.string	" seconds to execute "
.LC13:
	.string	"==============================================================="
.LC14:
	.string	"Paralelo basico"
.LC15:
	.string	"The parallel process took: "
.LC16:
	.string	"The acceleration we've got: "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3643:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leaq	.LC5(%rip), %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	$5, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
.L47:
	movq	%r15, %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leal	-5(%r13), %esi
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	cvtsi2sdl	%r13d, %xmm1
	movsd	.LC6(%rip), %xmm0
	call	pow@PLT
	cvttsd2siq	%xmm0, %r14
	movl	%r14d, %ebp
	salq	$2, %rbp
	movq	%rbp, %rdi
	call	malloc@PLT
	movl	$20, %edi
	movq	%rax, 8(%rsp)
	call	malloc@PLT
	movq	%rbp, %rdi
	movq	%rax, 16(%rsp)
	call	malloc@PLT
	movq	%rbp, %rdi
	movq	%rax, 24(%rsp)
	call	malloc@PLT
	movq	%rbp, %rdi
	movq	%rax, 32(%rsp)
	call	malloc@PLT
	movq	%rbp, %rdi
	movq	%rax, 56(%rsp)
	call	malloc@PLT
	movq	%rbp, %rdi
	movq	%rax, 64(%rsp)
	call	malloc@PLT
	movss	.LC7(%rip), %xmm0
	movq	8(%rsp), %rdi
	movl	%r14d, %esi
	movq	%rax, 72(%rsp)
	call	_Z10fillVectorPffi
	movq	16(%rsp), %rdi
	movl	$5, %esi
	movss	.LC8(%rip), %xmm0
	call	_Z10fillVectorPffi
	movq	24(%rsp), %rdi
	xorps	%xmm0, %xmm0
	movl	%r14d, %esi
	call	_Z10fillVectorPffi
	movq	32(%rsp), %rdi
	call	_Z10fillVectorPffi
	movq	56(%rsp), %rdi
	call	_Z10fillVectorPffi
	movq	64(%rsp), %rdi
	call	_Z10fillVectorPffi
	movq	72(%rsp), %rdi
	call	_Z10fillVectorPffi
	leaq	.LC9(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	call	clock@PLT
	movq	16(%rsp), %rdx
	movq	24(%rsp), %rsi
	movl	%r14d, %r8d
	movq	8(%rsp), %rdi
	movl	$5, %ecx
	movq	%rax, %rbp
	call	_Z17serialConvolutionPfS_S_ii
	call	clock@PLT
	leaq	.LC11(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	subq	%rbp, %rax
	leaq	.LC12(%rip), %rbp
	cvtsi2sdq	%rax, %xmm0
	divsd	.LC10(%rip), %xmm0
	movsd	%xmm0, 40(%rsp)
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	40(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC13(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC14(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	incl	%r13d
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	call	clock@PLT
	movq	16(%rsp), %rdx
	movq	32(%rsp), %rsi
	movl	%r14d, %r8d
	movq	8(%rsp), %rdi
	movl	$5, %ecx
	movq	%rax, %rbx
	call	_Z15convolutionCallPfS_S_ii
	call	clock@PLT
	leaq	.LC15(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	subq	%rbx, %rax
	cvtsi2sdq	%rax, %xmm0
	divsd	.LC10(%rip), %xmm0
	movsd	%xmm0, 48(%rsp)
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	48(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rbp, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC16(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	movsd	40(%rsp), %xmm0
	divsd	48(%rsp), %xmm0
	movsd	%xmm0, 40(%rsp)
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	40(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdi
	movl	%r14d, %edx
	call	_Z13compareVectorPfS_i
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	8(%rsp), %rdi
	call	free@PLT
	movq	16(%rsp), %rdi
	call	free@PLT
	movq	24(%rsp), %rdi
	call	free@PLT
	movq	32(%rsp), %rdi
	call	free@PLT
	movq	56(%rsp), %rdi
	call	free@PLT
	movq	64(%rsp), %rdi
	call	free@PLT
	movq	72(%rsp), %rdi
	call	free@PLT
	cmpl	$21, %r13d
	jne	.L47
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3643:
	.size	main, .-main
	.text
	.globl	_Z49__device_stub__Z25convolutionKernelConstantPfS_iiPfS_ii
	.type	_Z49__device_stub__Z25convolutionKernelConstantPfS_iiPfS_ii, @function
_Z49__device_stub__Z25convolutionKernelConstantPfS_iiPfS_ii:
.LFB3670:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L50
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z25convolutionKernelConstantPfS_ii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L50:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L52
	call	__stack_chk_fail@PLT
.L52:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3670:
	.size	_Z49__device_stub__Z25convolutionKernelConstantPfS_iiPfS_ii, .-_Z49__device_stub__Z25convolutionKernelConstantPfS_iiPfS_ii
	.globl	_Z25convolutionKernelConstantPfS_ii
	.type	_Z25convolutionKernelConstantPfS_ii, @function
_Z25convolutionKernelConstantPfS_ii:
.LFB3671:
	.cfi_startproc
	endbr64
	jmp	_Z49__device_stub__Z25convolutionKernelConstantPfS_iiPfS_ii
	.cfi_endproc
.LFE3671:
	.size	_Z25convolutionKernelConstantPfS_ii, .-_Z25convolutionKernelConstantPfS_ii
	.globl	_Z23convolutionCallConstantPfS_S_ii
	.type	_Z23convolutionCallConstantPfS_S_ii, @function
_Z23convolutionCallConstantPfS_S_ii:
.LFB3640:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rdi, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rdx, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rsi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%ecx, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movslq	%r8d, %rbx
	movq	%rbx, %rbp
	salq	$2, %rbx
	movq	%rbx, %rsi
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %rdi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	leaq	8(%rsp), %rdi
	movq	%rbx, %rsi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	movq	(%rsp), %rdi
	movq	%rbx, %rdx
	movq	%r15, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movslq	%r12d, %rdx
	xorl	%ecx, %ecx
	movl	$1, %r8d
	salq	$2, %rdx
	movq	%r14, %rsi
	leaq	_ZL1M(%rip), %rdi
	call	cudaMemcpyToSymbol@PLT
	cvtsi2ssl	%ebp, %xmm0
	mulss	.LC4(%rip), %xmm0
	call	ceilf@PLT
	movl	$134217729, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	cvttss2siq	%xmm0, %rax
	salq	$5, %rdx
	movl	$1, %ecx
	movl	%eax, 16(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 20(%rsp)
	movq	16(%rsp), %rdi
	movl	24(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L56
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	movl	%ebp, %ecx
	movl	%r12d, %edx
	call	_Z49__device_stub__Z25convolutionKernelConstantPfS_iiPfS_ii
.L56:
	call	cudaDeviceSynchronize@PLT
	movq	8(%rsp), %rsi
	movq	%rbx, %rdx
	movq	%r13, %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L57
	call	__stack_chk_fail@PLT
.L57:
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3640:
	.size	_Z23convolutionCallConstantPfS_S_ii, .-_Z23convolutionCallConstantPfS_S_ii
	.globl	_Z47__device_stub__Z23convolutionKernelSharedPfS_iiPfS_ii
	.type	_Z47__device_stub__Z23convolutionKernelSharedPfS_iiPfS_ii, @function
_Z47__device_stub__Z23convolutionKernelSharedPfS_iiPfS_ii:
.LFB3672:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L59
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z23convolutionKernelSharedPfS_ii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L59:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L61
	call	__stack_chk_fail@PLT
.L61:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3672:
	.size	_Z47__device_stub__Z23convolutionKernelSharedPfS_iiPfS_ii, .-_Z47__device_stub__Z23convolutionKernelSharedPfS_iiPfS_ii
	.globl	_Z23convolutionKernelSharedPfS_ii
	.type	_Z23convolutionKernelSharedPfS_ii, @function
_Z23convolutionKernelSharedPfS_ii:
.LFB3673:
	.cfi_startproc
	endbr64
	jmp	_Z47__device_stub__Z23convolutionKernelSharedPfS_iiPfS_ii
	.cfi_endproc
.LFE3673:
	.size	_Z23convolutionKernelSharedPfS_ii, .-_Z23convolutionKernelSharedPfS_ii
	.globl	_Z31convolutionCallWithTilesComplexPfS_S_ii
	.type	_Z31convolutionCallWithTilesComplexPfS_S_ii, @function
_Z31convolutionCallWithTilesComplexPfS_S_ii:
.LFB3641:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rdi, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rdx, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rsi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%ecx, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movslq	%r8d, %rbx
	movq	%rbx, %rbp
	salq	$2, %rbx
	movq	%rbx, %rsi
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %rdi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	leaq	8(%rsp), %rdi
	movq	%rbx, %rsi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	movq	(%rsp), %rdi
	movq	%rbx, %rdx
	movq	%r15, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movslq	%r12d, %rdx
	xorl	%ecx, %ecx
	movl	$1, %r8d
	salq	$2, %rdx
	movq	%r14, %rsi
	leaq	_ZL1M(%rip), %rdi
	call	cudaMemcpyToSymbol@PLT
	cvtsi2ssl	%ebp, %xmm0
	mulss	.LC4(%rip), %xmm0
	call	ceilf@PLT
	movl	$134217729, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	cvttss2siq	%xmm0, %rax
	salq	$5, %rdx
	movl	$1, %ecx
	movl	%eax, 16(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 20(%rsp)
	movq	16(%rsp), %rdi
	movl	24(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L65
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	movl	%ebp, %ecx
	movl	%r12d, %edx
	call	_Z47__device_stub__Z23convolutionKernelSharedPfS_iiPfS_ii
.L65:
	call	cudaDeviceSynchronize@PLT
	movq	8(%rsp), %rsi
	movq	%rbx, %rdx
	movq	%r13, %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L66
	call	__stack_chk_fail@PLT
.L66:
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3641:
	.size	_Z31convolutionCallWithTilesComplexPfS_S_ii, .-_Z31convolutionCallWithTilesComplexPfS_S_ii
	.globl	_Z55__device_stub__Z31convolutionKernelSharedSimplierPfS_iiPfS_ii
	.type	_Z55__device_stub__Z31convolutionKernelSharedSimplierPfS_iiPfS_ii, @function
_Z55__device_stub__Z31convolutionKernelSharedSimplierPfS_iiPfS_ii:
.LFB3674:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L68
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z31convolutionKernelSharedSimplierPfS_ii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L68:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L70
	call	__stack_chk_fail@PLT
.L70:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3674:
	.size	_Z55__device_stub__Z31convolutionKernelSharedSimplierPfS_iiPfS_ii, .-_Z55__device_stub__Z31convolutionKernelSharedSimplierPfS_iiPfS_ii
	.globl	_Z31convolutionKernelSharedSimplierPfS_ii
	.type	_Z31convolutionKernelSharedSimplierPfS_ii, @function
_Z31convolutionKernelSharedSimplierPfS_ii:
.LFB3675:
	.cfi_startproc
	endbr64
	jmp	_Z55__device_stub__Z31convolutionKernelSharedSimplierPfS_iiPfS_ii
	.cfi_endproc
.LFE3675:
	.size	_Z31convolutionKernelSharedSimplierPfS_ii, .-_Z31convolutionKernelSharedSimplierPfS_ii
	.globl	_Z24convolutionCallWithTilesPfS_S_ii
	.type	_Z24convolutionCallWithTilesPfS_S_ii, @function
_Z24convolutionCallWithTilesPfS_S_ii:
.LFB3642:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rdi, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rdx, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rsi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%ecx, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movslq	%r8d, %rbx
	movq	%rbx, %rbp
	salq	$2, %rbx
	movq	%rbx, %rsi
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %rdi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	leaq	8(%rsp), %rdi
	movq	%rbx, %rsi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	movq	(%rsp), %rdi
	movq	%rbx, %rdx
	movq	%r15, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movslq	%r12d, %rdx
	xorl	%ecx, %ecx
	movl	$1, %r8d
	salq	$2, %rdx
	movq	%r14, %rsi
	leaq	_ZL1M(%rip), %rdi
	call	cudaMemcpyToSymbol@PLT
	cvtsi2ssl	%ebp, %xmm0
	mulss	.LC4(%rip), %xmm0
	call	ceilf@PLT
	movl	$134217729, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	cvttss2siq	%xmm0, %rax
	salq	$5, %rdx
	movl	$1, %ecx
	movl	%eax, 16(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 20(%rsp)
	movq	16(%rsp), %rdi
	movl	24(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L74
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	movl	%ebp, %ecx
	movl	%r12d, %edx
	call	_Z55__device_stub__Z31convolutionKernelSharedSimplierPfS_iiPfS_ii
.L74:
	call	cudaDeviceSynchronize@PLT
	movq	8(%rsp), %rsi
	movq	%rbx, %rdx
	movq	%r13, %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L75
	call	__stack_chk_fail@PLT
.L75:
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3642:
	.size	_Z24convolutionCallWithTilesPfS_S_ii, .-_Z24convolutionCallWithTilesPfS_S_ii
	.section	.rodata.str1.1
.LC17:
	.string	"_Z31convolutionKernelSharedSimplierPfS_ii"
.LC18:
	.string	"_Z23convolutionKernelSharedPfS_ii"
.LC19:
	.string	"_Z25convolutionKernelConstantPfS_ii"
.LC20:
	.string	"_Z22convolutionBasicKernelPfS_S_ii"
.LC21:
	.string	"M"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3677:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC17(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z31convolutionKernelSharedSimplierPfS_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC18(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z23convolutionKernelSharedPfS_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC19(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z25convolutionKernelConstantPfS_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC20(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z22convolutionBasicKernelPfS_S_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC21(%rip), %rdx
	movl	$40, %r9d
	leaq	_ZL1M(%rip), %rsi
	pushq	$1
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3677:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZL1M
	.comm	_ZL1M,40,32
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC4:
	.long	1023410176
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC6:
	.long	0
	.long	1073741824
	.section	.rodata.cst4
	.align 4
.LC7:
	.long	1065353216
	.set	.LC8,.LC6+4
	.section	.rodata.cst8
	.align 8
.LC10:
	.long	0
	.long	1093567616
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include<cstdlib>
#include<time.h>
#include<hip/hip_runtime.h>
#include<iostream>
#include<math.h> //Included just to use the Power function

#define BLOCK_SIZE 32
#define TILE_SIZE 32
#define MAX_MASK_WIDTH 10
__constant__ float M[MAX_MASK_WIDTH];

using namespace std;

//====== Function made to print vector =========================================
void printVector(float *A, int length)
{
  for (int i=0; i<length; i++)
  {
    cout<<A[i]<<" | ";
  }
  cout<<endl;
}

//====== Function made to fill the vector with some given value ================
void fillVector(float *A, float value, int length)
{
  for (int i=0; i<length; i++)
  {
    A[i] = value;
  }
}

//====== Compare results =======================================================
void compareVector (float *A, float *B,int n)
{
  for (int i=0; i<n; i++ )
  {
    if (A[i]!=B[i])
    {
      cout<<"## Secuential and Parallel results are NOT equal ##"<<endl;
    }
  }
  cout<<"== Secuential and Parallel results are equal =="<<endl;
}

//====== Serial Convolution ====================================================
void serialConvolution(float *input, float *output, float *mask, int mask_length, int length)
{
  int start = 0;
  float temp = 0.0;
  for (int i = 0; i < length; i++)
  {
    for (int j = 0; j < mask_length; j++)
    {
      start = i - (mask_length / 2);
      if (start + j >= 0 && start + j < length)
        temp += input[start + j] * mask[j];
    }
    output[i] = temp;
    temp = 0.0;
  }
}


//====== Basic convolution kernel ==============================================
__global__ void convolutionBasicKernel(float *N, float *M, float *P,
 int Mask_Width, int Width)
 {
   int i = blockIdx.x*blockDim.x + threadIdx.x;
   float Pvalue = 0;
   int N_start_point = i - (Mask_Width/2);
   for (int j = 0; j < Mask_Width; j++)
   {
     if (N_start_point + j >= 0 && N_start_point + j < Width)
     {
       Pvalue += N[N_start_point + j]*M[j];
     }
   }
   P[i] = Pvalue;
}

//====== Convolution kernel using constant memory and caching ==================
__global__ void convolutionKernelConstant(float *N, float *P, int Mask_Width,
 int Width)
 {
   int i = blockIdx.x*blockDim.x + threadIdx.x;
   float Pvalue = 0;
   int N_start_point = i - (Mask_Width/2);
   for (int j = 0; j < Mask_Width; j++)
   {
     if (N_start_point + j >= 0 && N_start_point + j < Width)
     {
       Pvalue += N[N_start_point + j]*M[j];
     }
   }
   P[i] = Pvalue;
}

//===== Tiled Convolution kernel using shared memory ===========================
__global__ void convolutionKernelShared(float *N, float *P, int Mask_Width,
 int Width)
 {
   int i = blockIdx.x*blockDim.x + threadIdx.x;
   __shared__ float N_ds[TILE_SIZE + MAX_MASK_WIDTH - 1];
   int n = Mask_Width/2;
   int halo_index_left = (blockIdx.x - 1)*blockDim.x + threadIdx.x;
   if (threadIdx.x >= blockDim.x - n)
   {
     N_ds[threadIdx.x - (blockDim.x - n)] =
     (halo_index_left < 0) ? 0 : N[halo_index_left];
   }
   N_ds[n + threadIdx.x] = N[blockIdx.x*blockDim.x + threadIdx.x];
   int halo_index_right = (blockIdx.x + 1)*blockDim.x + threadIdx.x;
   if (threadIdx.x < n)
   {
     N_ds[n + blockDim.x + threadIdx.x] =
     (halo_index_right >= Width) ? 0 : N[halo_index_right];
   }
   __syncthreads();
   float Pvalue = 0;
   for(int j = 0; j < Mask_Width; j++)
   {
     Pvalue += N_ds[threadIdx.x + j]*M[j];
   }
   P[i] = Pvalue;
}

//====== A simplier tiled convolution kernel using shared memory and general cahching
__global__ void convolutionKernelSharedSimplier(float *N, float *P, int Mask_Width,
 int Width)
{
 int i = blockIdx.x*blockDim.x + threadIdx.x;
 __shared__ float N_ds[TILE_SIZE];
 N_ds[threadIdx.x] = N[i];
 __syncthreads();
 int This_tile_start_point = blockIdx.x * blockDim.x;
 int Next_tile_start_point = (blockIdx.x + 1) * blockDim.x;
 int N_start_point = i - (Mask_Width/2);
 float Pvalue = 0;
 for (int j = 0; j < Mask_Width; j ++)
 {
   int N_index = N_start_point + j;
   if (N_index >= 0 && N_index < Width)
   {
     if ((N_index >= This_tile_start_point)
     && (N_index < Next_tile_start_point))
     {
       Pvalue += N_ds[threadIdx.x+j-(Mask_Width/2)]*M[j];
     } else
     {
       Pvalue += N[N_index] * M[j];
     }
   }
 }
 P[i] = Pvalue;
}


//===== Convolution kernel call ================================================
void convolutionCall (float *input, float *output, float *mask, int mask_length, int length)
{
  float *d_input;
  float *d_mask;
  float *d_output;
  float block_size = BLOCK_SIZE;//The compiler doesn't let me cast the variable

  hipMalloc(&d_input, length * sizeof(float));
  hipMalloc(&d_mask, mask_length * sizeof(float));
  hipMalloc(&d_output, length * sizeof(float));

  hipMemcpy (d_input, input, length * sizeof (float), hipMemcpyHostToDevice);
  hipMemcpy (d_mask, mask, mask_length * sizeof (float), hipMemcpyHostToDevice);

  dim3 dimGrid (ceil (length / block_size), 1, 1);
  dim3 dimBlock (block_size, 1, 1);

  convolutionBasicKernel<<<dimGrid, dimBlock>>> (d_input, d_mask, d_output, mask_length, length);
  hipDeviceSynchronize();

  hipMemcpy (output, d_output, length * sizeof (float), hipMemcpyDeviceToHost);
  hipFree (d_input);
  hipFree (d_mask);
  hipFree (d_output);
}

//==============================================================================
void convolutionCallConstant (float *input, float *output, float *mask, int mask_length, int length)
{
  float *d_input;
  float *d_output;
  float block_size = BLOCK_SIZE;//The compiler doesn't let me cast the variable

  hipMalloc(&d_input, length * sizeof(float));
  hipMalloc(&d_output, length * sizeof(float));

  hipMemcpy (d_input, input, length * sizeof (float), hipMemcpyHostToDevice);
  hipMemcpyToSymbol (HIP_SYMBOL(M), mask, mask_length * sizeof (float));

  dim3 dimGrid (ceil (length / block_size), 1, 1);
  dim3 dimBlock (block_size, 1, 1);

  convolutionKernelConstant<<<dimGrid, dimBlock>>> (d_input,d_output, mask_length, length);
  hipDeviceSynchronize();

  hipMemcpy (output, d_output, length * sizeof (float), hipMemcpyDeviceToHost);
  hipFree (d_input);
  hipFree (d_output);
}

//==============================================================================
void convolutionCallWithTilesComplex (float *input, float *output, float *mask, int mask_length, int length)
{
  float *d_input;
  float *d_output;
  float block_size = BLOCK_SIZE;//The compiler doesn't let me cast the variable

  hipMalloc(&d_input, length * sizeof(float));
  hipMalloc(&d_output, length * sizeof(float));

  hipMemcpy (d_input, input, length * sizeof (float), hipMemcpyHostToDevice);
  hipMemcpyToSymbol (HIP_SYMBOL(M), mask, mask_length * sizeof (float));

  dim3 dimGrid (ceil (length / block_size), 1, 1);
  dim3 dimBlock (block_size, 1, 1);

  convolutionKernelShared<<<dimGrid, dimBlock>>> (d_input,d_output, mask_length, length);
  hipDeviceSynchronize();

  hipMemcpy (output, d_output, length * sizeof (float), hipMemcpyDeviceToHost);
  hipFree (d_input);
  hipFree (d_output);
}

//====== Convolution kernel call tiled version (the simplified one) ============
void convolutionCallWithTiles (float *input, float *output, float *mask, int mask_length, int length)
{
  float *d_input;
  float *d_output;
  float block_size = BLOCK_SIZE;//The compiler doesn't let me cast the variable

  hipMalloc(&d_input, length * sizeof(float));
  hipMalloc(&d_output, length * sizeof(float));

  hipMemcpy (d_input, input, length * sizeof (float), hipMemcpyHostToDevice);
  hipMemcpyToSymbol (HIP_SYMBOL(M), mask, mask_length * sizeof (float));

  dim3 dimGrid (ceil (length / block_size), 1, 1);
  dim3 dimBlock (block_size, 1, 1);

  convolutionKernelSharedSimplier<<<dimGrid, dimBlock>>> (d_input,d_output, mask_length, length);
  hipDeviceSynchronize();

  hipMemcpy (output, d_output, length * sizeof (float), hipMemcpyDeviceToHost);
  hipFree (d_input);
  hipFree (d_output);
}

//================= MAIN =======================================================
int main ()
{
  for(int i=5; i<=20;i++)//to execute the program many times just to get all the test values
  {
    cout<<"=> EXECUTION #"<<i-5<<endl;
    unsigned int length = pow(2,i);
    int mask_length = 5;
    int op = 1; //To select which parallel version we want to execute
    //1 Paralelo Basico - 2 Paralelo con memoria constante
    //3 paralelo con memoria compartida y tiling 
    clock_t start, finish; //Clock variables
    double elapsedSecuential, elapsedParallel, elapsedParallelConstant,
    elapsedParallelSharedComplex,elapsedParallelSharedTiles, optimization;

    float *A = (float *) malloc(length * sizeof(float));
    float *mask = (float *) malloc(mask_length * sizeof(float));
    float *Cserial = (float *) malloc(length * sizeof(float));
    float *Cparallel = (float *) malloc(length * sizeof(float));
    float *CparallelWithTiles = (float *) malloc(length * sizeof(float));
    float *CparallelConstant = (float *) malloc (length * sizeof(float));
    float *CparallelWithTilesComplex = (float *) malloc(length * sizeof(float));

    fillVector(A,1.0,length);
    fillVector(mask,2.0,mask_length);
    fillVector(Cserial,0.0,length);
    fillVector(Cparallel,0.0,length);
    fillVector(CparallelWithTiles,0.0,length);
    fillVector(CparallelConstant,0.0,length);
    fillVector(CparallelWithTilesComplex,0.0,length);

    //============================================================================
    cout<<"Serial result"<<endl;
    start = clock();
    serialConvolution(A,Cserial,mask,mask_length,length);
    finish = clock();
    elapsedSecuential = (((double) (finish - start)) / CLOCKS_PER_SEC );
    cout<< "The Secuential process took: " << elapsedSecuential << " seconds to execute "<< endl;
    //printVector(Cserial,length);
    cout<<endl;

    //============================================================================
    switch (op)
    {
      case 1:
              cout<<"==============================================================="<<endl;
              cout<<"Paralelo basico"<<endl;
              start = clock();
              convolutionCall(A,Cparallel,mask,mask_length,length);
              finish = clock();
              elapsedParallel = (((double) (finish - start)) / CLOCKS_PER_SEC );
              cout<< "The parallel process took: " << elapsedParallel << " seconds to execute "<< endl;
              optimization = elapsedSecuential/elapsedParallel;
              cout<< "The acceleration we've got: " << optimization <<endl;
              //printVector(Cparallel,length);
              compareVector(Cserial,Cparallel,length);
              cout<<endl;
              break;

      case 2:
              cout<<"==============================================================="<<endl;
              cout<<"Paralelo con memoria constante"<<endl;
              start = clock();
              convolutionCallConstant(A,CparallelConstant,mask,mask_length,length);
              finish = clock();
              elapsedParallelConstant = (((double) (finish - start)) / CLOCKS_PER_SEC );
              cout<< "The parallel process took: " << elapsedParallelConstant << " seconds to execute "<< endl;
              optimization = elapsedSecuential/elapsedParallelConstant;
              cout<< "The acceleration we've got: " << optimization <<endl;
              //printVector(CparallelConstant,length);
              compareVector(Cserial,CparallelConstant,length);
              cout<<endl;
              break;

      case 3:
              cout<<"==============================================================="<<endl;
              cout<<"Paralelo con memoria compartida y Tiling"<<endl;
              start = clock();
              convolutionCallWithTilesComplex(A,CparallelWithTilesComplex,mask,mask_length,length);
              finish = clock();
              elapsedParallelSharedComplex = (((double) (finish - start)) / CLOCKS_PER_SEC );
              cout<< "The parallel process took: " << elapsedParallelSharedComplex << " seconds to execute "<< endl;
              optimization = elapsedSecuential/elapsedParallelSharedComplex;
              cout<< "The acceleration we've got: " << optimization <<endl;
              //printVector(CparallelWithTilesComplex,length);
              compareVector(Cserial,CparallelWithTilesComplex,length);
              cout<<endl;
              break;
      case 4:
              cout<<"==============================================================="<<endl;
              cout<<"Parallel with shared memory result simplified"<<endl;
              start = clock();
              convolutionCallWithTiles(A,CparallelWithTiles,mask,mask_length,length);
              finish = clock();
              elapsedParallelSharedTiles = (((double) (finish - start)) / CLOCKS_PER_SEC );
              cout<< "The parallel process took: " << elapsedParallelSharedTiles << " seconds to execute "<< endl;
              optimization = elapsedSecuential/elapsedParallelSharedTiles;
              cout<< "The acceleration we've got: " << optimization <<endl;
              //printVector(CparallelWithTiles,length);
              compareVector(Cserial,CparallelWithTiles,length);
              cout<<endl;
              break;
    }


    free(A);
    free(mask);
    free(Cserial);
    free(Cparallel);
    free(CparallelWithTiles);
    free(CparallelConstant);
    free(CparallelWithTilesComplex);
  }
}

 
	.text
	.file	"convolution1d.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z11printVectorPfi              # -- Begin function _Z11printVectorPfi
	.type	_Z11printVectorPfi,@function
_Z11printVectorPfi:                     # @_Z11printVectorPfi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	testl	%esi, %esi
	jle	.LBB0_3
# %bb.1:                                # %.lr.ph.preheader
	movq	%rdi, %rbx
	movl	%esi, %r14d
	xorl	%r15d, %r15d
.LBB0_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbx,%r15,4), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	incq	%r15
	cmpq	%r15, %r14
	jne	.LBB0_2
.LBB0_3:                                # %._crit_edge
	movq	_ZSt4cout(%rip), %rax
	movl	$_ZSt4cout, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_ZNSo5flushEv                   # TAILCALL
.Lfunc_end0:
	.size	_Z11printVectorPfi, .Lfunc_end0-_Z11printVectorPfi
	.cfi_endproc
                                        # -- End function
	.globl	_Z10fillVectorPffi              # -- Begin function _Z10fillVectorPffi
	.type	_Z10fillVectorPffi,@function
_Z10fillVectorPffi:                     # @_Z10fillVectorPffi
	.cfi_startproc
# %bb.0:
	testl	%esi, %esi
	jle	.LBB1_3
# %bb.1:                                # %.lr.ph.preheader
	movl	%esi, %eax
	xorl	%ecx, %ecx
.LBB1_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movss	%xmm0, (%rdi,%rcx,4)
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB1_2
.LBB1_3:                                # %._crit_edge
	retq
.Lfunc_end1:
	.size	_Z10fillVectorPffi, .Lfunc_end1-_Z10fillVectorPffi
	.cfi_endproc
                                        # -- End function
	.globl	_Z13compareVectorPfS_i          # -- Begin function _Z13compareVectorPfS_i
	.type	_Z13compareVectorPfS_i,@function
_Z13compareVectorPfS_i:                 # @_Z13compareVectorPfS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	testl	%edx, %edx
	jle	.LBB2_5
# %bb.1:                                # %.lr.ph.preheader
	movq	%rsi, %rbx
	movq	%rdi, %r14
	movl	%edx, %r15d
	xorl	%r12d, %r12d
	movl	$_ZSt4cout, %r13d
.LBB2_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movss	(%r14,%r12,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	ucomiss	(%rbx,%r12,4), %xmm0
	jne	.LBB2_3
	jnp	.LBB2_4
.LBB2_3:                                #   in Loop: Header=BB2_2 Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$51, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%r13, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.LBB2_4:                                #   in Loop: Header=BB2_2 Depth=1
	incq	%r12
	cmpq	%r12, %r15
	jne	.LBB2_2
.LBB2_5:                                # %._crit_edge
	movl	$_ZSt4cout, %ebx
	movl	$_ZSt4cout, %edi
	movl	$.L.str.2, %esi
	movl	$47, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_ZNSo5flushEv                   # TAILCALL
.Lfunc_end2:
	.size	_Z13compareVectorPfS_i, .Lfunc_end2-_Z13compareVectorPfS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z17serialConvolutionPfS_S_ii   # -- Begin function _Z17serialConvolutionPfS_S_ii
	.type	_Z17serialConvolutionPfS_S_ii,@function
_Z17serialConvolutionPfS_S_ii:          # @_Z17serialConvolutionPfS_S_ii
	.cfi_startproc
# %bb.0:
	testl	%r8d, %r8d
	jle	.LBB3_6
# %bb.1:                                # %.preheader.lr.ph
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	movl	%ecx, %eax
	shrl	$31, %eax
	addl	%ecx, %eax
	sarl	%eax
	negl	%eax
	movl	%r8d, %r9d
	movl	%ecx, %r10d
	xorl	%r11d, %r11d
.LBB3_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_8 Depth 2
	testl	%ecx, %ecx
	jle	.LBB3_3
# %bb.7:                                # %.lr.ph
                                        #   in Loop: Header=BB3_2 Depth=1
	movslq	%eax, %rbx
	leaq	(%rdi,%rbx,4), %rbx
	xorps	%xmm0, %xmm0
	xorl	%r14d, %r14d
.LBB3_8:                                #   Parent Loop BB3_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	leal	(%rax,%r14), %ebp
	cmpl	%r8d, %ebp
	jae	.LBB3_10
# %bb.9:                                #   in Loop: Header=BB3_8 Depth=2
	movss	(%rbx,%r14,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	mulss	(%rdx,%r14,4), %xmm1
	addss	%xmm1, %xmm0
.LBB3_10:                               #   in Loop: Header=BB3_8 Depth=2
	incq	%r14
	cmpq	%r14, %r10
	jne	.LBB3_8
	jmp	.LBB3_4
.LBB3_3:                                #   in Loop: Header=BB3_2 Depth=1
	xorps	%xmm0, %xmm0
.LBB3_4:                                # %._crit_edge
                                        #   in Loop: Header=BB3_2 Depth=1
	movss	%xmm0, (%rsi,%r11,4)
	incq	%r11
	incq	%rax
	cmpq	%r9, %r11
	jne	.LBB3_2
# %bb.5:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
	.cfi_restore %rbp
.LBB3_6:                                # %._crit_edge29
	retq
.Lfunc_end3:
	.size	_Z17serialConvolutionPfS_S_ii, .Lfunc_end3-_Z17serialConvolutionPfS_S_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z37__device_stub__convolutionBasicKernelPfS_S_ii # -- Begin function _Z37__device_stub__convolutionBasicKernelPfS_S_ii
	.type	_Z37__device_stub__convolutionBasicKernelPfS_S_ii,@function
_Z37__device_stub__convolutionBasicKernelPfS_S_ii: # @_Z37__device_stub__convolutionBasicKernelPfS_S_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	movq	%rsp, %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z22convolutionBasicKernelPfS_S_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z37__device_stub__convolutionBasicKernelPfS_S_ii, .Lfunc_end4-_Z37__device_stub__convolutionBasicKernelPfS_S_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z40__device_stub__convolutionKernelConstantPfS_ii # -- Begin function _Z40__device_stub__convolutionKernelConstantPfS_ii
	.type	_Z40__device_stub__convolutionKernelConstantPfS_ii,@function
_Z40__device_stub__convolutionKernelConstantPfS_ii: # @_Z40__device_stub__convolutionKernelConstantPfS_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z25convolutionKernelConstantPfS_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z40__device_stub__convolutionKernelConstantPfS_ii, .Lfunc_end5-_Z40__device_stub__convolutionKernelConstantPfS_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z38__device_stub__convolutionKernelSharedPfS_ii # -- Begin function _Z38__device_stub__convolutionKernelSharedPfS_ii
	.type	_Z38__device_stub__convolutionKernelSharedPfS_ii,@function
_Z38__device_stub__convolutionKernelSharedPfS_ii: # @_Z38__device_stub__convolutionKernelSharedPfS_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z23convolutionKernelSharedPfS_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z38__device_stub__convolutionKernelSharedPfS_ii, .Lfunc_end6-_Z38__device_stub__convolutionKernelSharedPfS_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z46__device_stub__convolutionKernelSharedSimplierPfS_ii # -- Begin function _Z46__device_stub__convolutionKernelSharedSimplierPfS_ii
	.type	_Z46__device_stub__convolutionKernelSharedSimplierPfS_ii,@function
_Z46__device_stub__convolutionKernelSharedSimplierPfS_ii: # @_Z46__device_stub__convolutionKernelSharedSimplierPfS_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z31convolutionKernelSharedSimplierPfS_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	_Z46__device_stub__convolutionKernelSharedSimplierPfS_ii, .Lfunc_end7-_Z46__device_stub__convolutionKernelSharedSimplierPfS_ii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z15convolutionCallPfS_S_ii
.LCPI8_0:
	.long	0x3d000000                      # float 0.03125
	.text
	.globl	_Z15convolutionCallPfS_S_ii
	.type	_Z15convolutionCallPfS_S_ii,@function
_Z15convolutionCallPfS_S_ii:            # @_Z15convolutionCallPfS_S_ii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%ecx, %ebp
	movq	%rdx, 40(%rsp)                  # 8-byte Spill
	movq	%rsi, 48(%rsp)                  # 8-byte Spill
	movq	%rdi, %r13
	movl	%r8d, 20(%rsp)                  # 4-byte Spill
	movslq	%r8d, %r12
	leaq	(,%r12,4), %r14
	leaq	32(%rsp), %rbx
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movl	%ebp, 16(%rsp)                  # 4-byte Spill
	movslq	%ebp, %rbp
	shlq	$2, %rbp
	leaq	24(%rsp), %r15
	movq	%r15, %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movq	(%rbx), %rdi
	movq	%r13, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r15), %rdi
	movq	40(%rsp), %rsi                  # 8-byte Reload
	movq	%rbp, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	cvtsi2ss	%r12d, %xmm0
	mulss	.LCPI8_0(%rip), %xmm0
	callq	ceilf@PLT
	cvttss2si	%xmm0, %rax
	movl	%eax, %edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB8_2
# %bb.1:
	movq	32(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	8(%rsp), %rdx
	movl	16(%rsp), %ecx                  # 4-byte Reload
	movl	20(%rsp), %r8d                  # 4-byte Reload
	callq	_Z37__device_stub__convolutionBasicKernelPfS_S_ii
.LBB8_2:
	callq	hipDeviceSynchronize
	movq	8(%rsp), %rsi
	movq	48(%rsp), %rdi                  # 8-byte Reload
	movq	%r14, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	_Z15convolutionCallPfS_S_ii, .Lfunc_end8-_Z15convolutionCallPfS_S_ii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z23convolutionCallConstantPfS_S_ii
.LCPI9_0:
	.long	0x3d000000                      # float 0.03125
	.text
	.globl	_Z23convolutionCallConstantPfS_S_ii
	.type	_Z23convolutionCallConstantPfS_S_ii,@function
_Z23convolutionCallConstantPfS_S_ii:    # @_Z23convolutionCallConstantPfS_S_ii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%ecx, %r15d
	movq	%rdx, %r12
	movq	%rsi, 32(%rsp)                  # 8-byte Spill
	movq	%rdi, %r13
	movl	%r8d, 20(%rsp)                  # 4-byte Spill
	movslq	%r8d, %rbp
	leaq	(,%rbp,4), %r14
	leaq	24(%rsp), %rbx
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movq	(%rbx), %rdi
	movq	%r13, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movslq	%r15d, %rdx
	shlq	$2, %rdx
	movl	$M, %edi
	movq	%r12, %rsi
	xorl	%ecx, %ecx
	movl	$1, %r8d
	callq	hipMemcpyToSymbol
	cvtsi2ss	%ebp, %xmm0
	mulss	.LCPI9_0(%rip), %xmm0
	callq	ceilf@PLT
	cvttss2si	%xmm0, %rax
	movl	%eax, %edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB9_2
# %bb.1:
	movq	24(%rsp), %rdi
	movq	8(%rsp), %rsi
	movl	%r15d, %edx
	movl	20(%rsp), %ecx                  # 4-byte Reload
	callq	_Z40__device_stub__convolutionKernelConstantPfS_ii
.LBB9_2:
	callq	hipDeviceSynchronize
	movq	8(%rsp), %rsi
	movq	32(%rsp), %rdi                  # 8-byte Reload
	movq	%r14, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end9:
	.size	_Z23convolutionCallConstantPfS_S_ii, .Lfunc_end9-_Z23convolutionCallConstantPfS_S_ii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z31convolutionCallWithTilesComplexPfS_S_ii
.LCPI10_0:
	.long	0x3d000000                      # float 0.03125
	.text
	.globl	_Z31convolutionCallWithTilesComplexPfS_S_ii
	.type	_Z31convolutionCallWithTilesComplexPfS_S_ii,@function
_Z31convolutionCallWithTilesComplexPfS_S_ii: # @_Z31convolutionCallWithTilesComplexPfS_S_ii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%ecx, %r15d
	movq	%rdx, %r12
	movq	%rsi, 32(%rsp)                  # 8-byte Spill
	movq	%rdi, %r13
	movl	%r8d, 20(%rsp)                  # 4-byte Spill
	movslq	%r8d, %rbp
	leaq	(,%rbp,4), %r14
	leaq	24(%rsp), %rbx
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movq	(%rbx), %rdi
	movq	%r13, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movslq	%r15d, %rdx
	shlq	$2, %rdx
	movl	$M, %edi
	movq	%r12, %rsi
	xorl	%ecx, %ecx
	movl	$1, %r8d
	callq	hipMemcpyToSymbol
	cvtsi2ss	%ebp, %xmm0
	mulss	.LCPI10_0(%rip), %xmm0
	callq	ceilf@PLT
	cvttss2si	%xmm0, %rax
	movl	%eax, %edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB10_2
# %bb.1:
	movq	24(%rsp), %rdi
	movq	8(%rsp), %rsi
	movl	%r15d, %edx
	movl	20(%rsp), %ecx                  # 4-byte Reload
	callq	_Z38__device_stub__convolutionKernelSharedPfS_ii
.LBB10_2:
	callq	hipDeviceSynchronize
	movq	8(%rsp), %rsi
	movq	32(%rsp), %rdi                  # 8-byte Reload
	movq	%r14, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end10:
	.size	_Z31convolutionCallWithTilesComplexPfS_S_ii, .Lfunc_end10-_Z31convolutionCallWithTilesComplexPfS_S_ii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z24convolutionCallWithTilesPfS_S_ii
.LCPI11_0:
	.long	0x3d000000                      # float 0.03125
	.text
	.globl	_Z24convolutionCallWithTilesPfS_S_ii
	.type	_Z24convolutionCallWithTilesPfS_S_ii,@function
_Z24convolutionCallWithTilesPfS_S_ii:   # @_Z24convolutionCallWithTilesPfS_S_ii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%ecx, %r15d
	movq	%rdx, %r12
	movq	%rsi, 32(%rsp)                  # 8-byte Spill
	movq	%rdi, %r13
	movl	%r8d, 20(%rsp)                  # 4-byte Spill
	movslq	%r8d, %rbp
	leaq	(,%rbp,4), %r14
	leaq	24(%rsp), %rbx
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movq	(%rbx), %rdi
	movq	%r13, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movslq	%r15d, %rdx
	shlq	$2, %rdx
	movl	$M, %edi
	movq	%r12, %rsi
	xorl	%ecx, %ecx
	movl	$1, %r8d
	callq	hipMemcpyToSymbol
	cvtsi2ss	%ebp, %xmm0
	mulss	.LCPI11_0(%rip), %xmm0
	callq	ceilf@PLT
	cvttss2si	%xmm0, %rax
	movl	%eax, %edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB11_2
# %bb.1:
	movq	24(%rsp), %rdi
	movq	8(%rsp), %rsi
	movl	%r15d, %edx
	movl	20(%rsp), %ecx                  # 4-byte Reload
	callq	_Z46__device_stub__convolutionKernelSharedSimplierPfS_ii
.LBB11_2:
	callq	hipDeviceSynchronize
	movq	8(%rsp), %rsi
	movq	32(%rsp), %rdi                  # 8-byte Reload
	movq	%r14, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end11:
	.size	_Z24convolutionCallWithTilesPfS_S_ii, .Lfunc_end11-_Z24convolutionCallWithTilesPfS_S_ii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI12_0:
	.quad	0x3ff0000000000000              # double 1
.LCPI12_1:
	.quad	0x412e848000000000              # double 1.0E+6
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$5, %ebx
.LBB12_1:                               # =>This Loop Header: Depth=1
                                        #     Child Loop BB12_3 Depth 2
                                        #     Child Loop BB12_5 Depth 2
                                        #     Child Loop BB12_10 Depth 2
                                        #       Child Loop BB12_11 Depth 3
	movl	$_ZSt4cout, %edi
	movl	$.L.str.3, %esi
	movl	$14, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	leal	-5(%rbx), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSolsEi
	movq	%rax, %r14
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r14, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movsd	.LCPI12_0(%rip), %xmm0          # xmm0 = mem[0],zero
	movq	%rbx, 32(%rsp)                  # 8-byte Spill
	movl	%ebx, %edi
	callq	ldexp@PLT
	cvttsd2si	%xmm0, %rbx
	movl	%ebx, %ebp
	leaq	(,%rbp,4), %r13
	movq	%r13, %rdi
	callq	malloc
	movq	%rax, %r14
	movl	$20, %edi
	callq	malloc
	movq	%rax, %r15
	movq	%r13, %rdi
	callq	malloc
	movq	%rax, %r12
	movq	%r13, %rdi
	callq	malloc
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	testl	%ebx, %ebx
	jle	.LBB12_4
# %bb.2:                                # %.lr.ph.i.preheader
                                        #   in Loop: Header=BB12_1 Depth=1
	xorl	%eax, %eax
.LBB12_3:                               # %.lr.ph.i
                                        #   Parent Loop BB12_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	$1065353216, (%r14,%rax,4)      # imm = 0x3F800000
	incq	%rax
	cmpq	%rax, %rbp
	jne	.LBB12_3
.LBB12_4:                               # %.lr.ph.i98.preheader
                                        #   in Loop: Header=BB12_1 Depth=1
	xorl	%eax, %eax
.LBB12_5:                               # %.lr.ph.i98
                                        #   Parent Loop BB12_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	$1073741824, (%r15,%rax,4)      # imm = 0x40000000
	incq	%rax
	cmpq	$5, %rax
	jne	.LBB12_5
# %bb.6:                                # %_Z10fillVectorPffi.exit102
                                        #   in Loop: Header=BB12_1 Depth=1
	testl	%ebp, %ebp
	jle	.LBB12_8
# %bb.7:                                # %.lr.ph.i105.preheader
                                        #   in Loop: Header=BB12_1 Depth=1
	movq	%r12, %rdi
	xorl	%esi, %esi
	movq	%r13, %rdx
	callq	memset@PLT
	movq	16(%rsp), %rdi                  # 8-byte Reload
	xorl	%esi, %esi
	movq	%r13, %rdx
	callq	memset@PLT
.LBB12_8:                               # %_Z10fillVectorPffi.exit137
                                        #   in Loop: Header=BB12_1 Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.4, %esi
	movl	$13, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	movl	$_ZSt4cout, %eax
	addq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	callq	clock
	movq	%rax, %r13
	testl	%ebp, %ebp
	jle	.LBB12_15
# %bb.9:                                # %.preheader.i.preheader
                                        #   in Loop: Header=BB12_1 Depth=1
	movq	%r14, %rax
	xorl	%ecx, %ecx
.LBB12_10:                              # %.preheader.i
                                        #   Parent Loop BB12_1 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB12_11 Depth 3
	xorpd	%xmm0, %xmm0
	movq	$-2, %rdx
.LBB12_11:                              #   Parent Loop BB12_1 Depth=1
                                        #     Parent Loop BB12_10 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	leal	(%rcx,%rdx), %esi
	cmpl	%ebp, %esi
	jae	.LBB12_13
# %bb.12:                               #   in Loop: Header=BB12_11 Depth=3
	movss	(%rax,%rdx,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	mulss	8(%r15,%rdx,4), %xmm1
	addss	%xmm1, %xmm0
.LBB12_13:                              #   in Loop: Header=BB12_11 Depth=3
	incq	%rdx
	cmpq	$3, %rdx
	jne	.LBB12_11
# %bb.14:                               # %._crit_edge.i
                                        #   in Loop: Header=BB12_10 Depth=2
	movss	%xmm0, (%r12,%rcx,4)
	incq	%rcx
	addq	$4, %rax
	cmpq	%rbp, %rcx
	jne	.LBB12_10
.LBB12_15:                              # %_Z17serialConvolutionPfS_S_ii.exit
                                        #   in Loop: Header=BB12_1 Depth=1
	callq	clock
	subq	%r13, %rax
	xorps	%xmm1, %xmm1
	cvtsi2sd	%rax, %xmm1
	movsd	.LCPI12_1(%rip), %xmm0          # xmm0 = mem[0],zero
	divsd	%xmm0, %xmm1
	movsd	%xmm1, 8(%rsp)                  # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.5, %esi
	movl	$29, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movsd	8(%rsp), %xmm0                  # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r13
	movl	$.L.str.6, %esi
	movl	$20, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%r13), %rax
	movq	-24(%rax), %rdi
	addq	%r13, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r13, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	movl	$_ZSt4cout, %eax
	addq	%rax, %rdi
	movl	$_ZSt4cout, %ebx
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$_ZSt4cout, %edi
	movl	$.L.str.7, %esi
	movl	$63, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$_ZSt4cout, %ebx
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movl	$_ZSt4cout, %edi
	movl	$.L.str.8, %esi
	movl	$15, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	callq	clock
	movq	%rax, %r13
	movq	%r14, %rdi
	movq	16(%rsp), %rbx                  # 8-byte Reload
	movq	%rbx, %rsi
	movq	%r15, %rdx
	movl	$5, %ecx
	movl	%ebp, %r8d
	callq	_Z15convolutionCallPfS_S_ii
	callq	clock
	subq	%r13, %rax
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI12_1(%rip), %xmm0
	movsd	%xmm0, 24(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.9, %esi
	movl	$27, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movsd	24(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r13
	movl	$.L.str.6, %esi
	movl	$20, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%r13), %rax
	movq	-24(%rax), %rdi
	addq	%r13, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r13, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movsd	8(%rsp), %xmm0                  # 8-byte Reload
                                        # xmm0 = mem[0],zero
	divsd	24(%rsp), %xmm0                 # 8-byte Folded Reload
	movsd	%xmm0, 8(%rsp)                  # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.10, %esi
	movl	$28, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movsd	8(%rsp), %xmm0                  # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r13
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r13, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r13, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	%r12, %rdi
	movq	%rbx, %rsi
	movl	%ebp, %edx
	callq	_Z13compareVectorPfS_i
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	movl	$_ZSt4cout, %eax
	addq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	movq	%r12, %rdi
	callq	free
	movq	%rbx, %rdi
	callq	free
	movq	32(%rsp), %rbx                  # 8-byte Reload
	incl	%ebx
	cmpl	$21, %ebx
	jne	.LBB12_1
# %bb.16:
	xorl	%eax, %eax
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end12:
	.size	main, .Lfunc_end12-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB13_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB13_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z22convolutionBasicKernelPfS_S_ii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z25convolutionKernelConstantPfS_ii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z23convolutionKernelSharedPfS_ii, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z31convolutionKernelSharedSimplierPfS_ii, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$0, 8(%rsp)
	movl	$1, (%rsp)
	movl	$M, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movl	$40, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	callq	__hipRegisterVar
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end13:
	.size	__hip_module_ctor, .Lfunc_end13-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB14_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB14_2:
	retq
.Lfunc_end14:
	.size	__hip_module_dtor, .Lfunc_end14-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	M,@object                       # @M
	.local	M
	.comm	M,40,16
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	" | "
	.size	.L.str, 4

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"## Secuential and Parallel results are NOT equal ##"
	.size	.L.str.1, 52

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"== Secuential and Parallel results are equal =="
	.size	.L.str.2, 48

	.type	_Z22convolutionBasicKernelPfS_S_ii,@object # @_Z22convolutionBasicKernelPfS_S_ii
	.section	.rodata,"a",@progbits
	.globl	_Z22convolutionBasicKernelPfS_S_ii
	.p2align	3, 0x0
_Z22convolutionBasicKernelPfS_S_ii:
	.quad	_Z37__device_stub__convolutionBasicKernelPfS_S_ii
	.size	_Z22convolutionBasicKernelPfS_S_ii, 8

	.type	_Z25convolutionKernelConstantPfS_ii,@object # @_Z25convolutionKernelConstantPfS_ii
	.globl	_Z25convolutionKernelConstantPfS_ii
	.p2align	3, 0x0
_Z25convolutionKernelConstantPfS_ii:
	.quad	_Z40__device_stub__convolutionKernelConstantPfS_ii
	.size	_Z25convolutionKernelConstantPfS_ii, 8

	.type	_Z23convolutionKernelSharedPfS_ii,@object # @_Z23convolutionKernelSharedPfS_ii
	.globl	_Z23convolutionKernelSharedPfS_ii
	.p2align	3, 0x0
_Z23convolutionKernelSharedPfS_ii:
	.quad	_Z38__device_stub__convolutionKernelSharedPfS_ii
	.size	_Z23convolutionKernelSharedPfS_ii, 8

	.type	_Z31convolutionKernelSharedSimplierPfS_ii,@object # @_Z31convolutionKernelSharedSimplierPfS_ii
	.globl	_Z31convolutionKernelSharedSimplierPfS_ii
	.p2align	3, 0x0
_Z31convolutionKernelSharedSimplierPfS_ii:
	.quad	_Z46__device_stub__convolutionKernelSharedSimplierPfS_ii
	.size	_Z31convolutionKernelSharedSimplierPfS_ii, 8

	.type	.L.str.3,@object                # @.str.3
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.3:
	.asciz	"=> EXECUTION #"
	.size	.L.str.3, 15

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Serial result"
	.size	.L.str.4, 14

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"The Secuential process took: "
	.size	.L.str.5, 30

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	" seconds to execute "
	.size	.L.str.6, 21

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"==============================================================="
	.size	.L.str.7, 64

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"Paralelo basico"
	.size	.L.str.8, 16

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"The parallel process took: "
	.size	.L.str.9, 28

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"The acceleration we've got: "
	.size	.L.str.10, 29

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z22convolutionBasicKernelPfS_S_ii"
	.size	.L__unnamed_1, 35

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z25convolutionKernelConstantPfS_ii"
	.size	.L__unnamed_2, 36

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z23convolutionKernelSharedPfS_ii"
	.size	.L__unnamed_3, 34

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z31convolutionKernelSharedSimplierPfS_ii"
	.size	.L__unnamed_4, 42

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"M"
	.size	.L__unnamed_5, 2

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z37__device_stub__convolutionBasicKernelPfS_S_ii
	.addrsig_sym _Z40__device_stub__convolutionKernelConstantPfS_ii
	.addrsig_sym _Z38__device_stub__convolutionKernelSharedPfS_ii
	.addrsig_sym _Z46__device_stub__convolutionKernelSharedSimplierPfS_ii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym M
	.addrsig_sym _ZSt4cout
	.addrsig_sym _Z22convolutionBasicKernelPfS_S_ii
	.addrsig_sym _Z25convolutionKernelConstantPfS_ii
	.addrsig_sym _Z23convolutionKernelSharedPfS_ii
	.addrsig_sym _Z31convolutionKernelSharedSimplierPfS_ii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z22convolutionBasicKernelPfS_S_ii ; -- Begin function _Z22convolutionBasicKernelPfS_S_ii
	.globl	_Z22convolutionBasicKernelPfS_S_ii
	.p2align	8
	.type	_Z22convolutionBasicKernelPfS_S_ii,@function
_Z22convolutionBasicKernelPfS_S_ii:     ; @_Z22convolutionBasicKernelPfS_S_ii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b256 s[4:11], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s0, s2, 0xffff
	s_cmp_lt_i32 s10, 1
	v_mad_u64_u32 v[1:2], null, s15, s0, v[0:1]
	s_cbranch_scc1 .LBB0_5
; %bb.1:                                ; %.lr.ph.preheader
	s_lshr_b32 s0, s10, 31
	v_mov_b32_e32 v3, 0
	s_add_i32 s0, s10, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_ashr_i32 s0, s0, 1
	v_mov_b32_e32 v0, v3
	s_delay_alu instid0(VALU_DEP_3)
	v_subrev_nc_u32_e32 v2, s0, v1
.LBB0_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_lt_i32_e32 vcc_lo, -1, v2
	v_cmp_gt_i32_e64 s0, s11, v2
	s_and_b32 s1, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB0_4
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	v_lshlrev_b64 v[4:5], 2, v[2:3]
	s_load_b32 s1, s[6:7], 0x0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s4, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
	global_load_b32 v4, v[4:5], off
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_fmac_f32_e32 v0, s1, v4
.LBB0_4:                                ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_add_i32 s10, s10, -1
	v_add_nc_u32_e32 v2, 1, v2
	s_add_u32 s6, s6, 4
	s_addc_u32 s7, s7, 0
	s_cmp_eq_u32 s10, 0
	s_cbranch_scc0 .LBB0_2
	s_branch .LBB0_6
.LBB0_5:
	v_mov_b32_e32 v0, 0
.LBB0_6:                                ; %Flow42
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s8, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s9, v2, vcc_lo
	global_store_b32 v[1:2], v0, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z22convolutionBasicKernelPfS_S_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z22convolutionBasicKernelPfS_S_ii, .Lfunc_end0-_Z22convolutionBasicKernelPfS_S_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 248
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z25convolutionKernelConstantPfS_ii ; -- Begin function _Z25convolutionKernelConstantPfS_ii
	.globl	_Z25convolutionKernelConstantPfS_ii
	.p2align	8
	.type	_Z25convolutionKernelConstantPfS_ii,@function
_Z25convolutionKernelConstantPfS_ii:    ; @_Z25convolutionKernelConstantPfS_ii
; %bb.0:
	s_clause 0x2
	s_load_b32 s8, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x10
	s_load_b128 s[4:7], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s0, s8, 0xffff
	s_cmp_lt_i32 s2, 1
	v_mad_u64_u32 v[1:2], null, s15, s0, v[0:1]
	s_cbranch_scc1 .LBB1_5
; %bb.1:                                ; %.lr.ph.preheader
	s_lshr_b32 s0, s2, 31
	v_mov_b32_e32 v3, 0
	s_add_i32 s0, s2, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_ashr_i32 s0, s0, 1
	s_getpc_b64 s[8:9]
	s_add_u32 s8, s8, M@rel32@lo+4
	s_addc_u32 s9, s9, M@rel32@hi+12
	v_subrev_nc_u32_e32 v2, s0, v1
	v_mov_b32_e32 v0, v3
.LBB1_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_lt_i32_e32 vcc_lo, -1, v2
	v_cmp_gt_i32_e64 s0, s3, v2
	s_and_b32 s1, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB1_4
; %bb.3:                                ;   in Loop: Header=BB1_2 Depth=1
	v_lshlrev_b64 v[4:5], 2, v[2:3]
	s_load_b32 s1, s[8:9], 0x0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s4, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
	global_load_b32 v4, v[4:5], off
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_fmac_f32_e32 v0, s1, v4
.LBB1_4:                                ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_add_i32 s2, s2, -1
	v_add_nc_u32_e32 v2, 1, v2
	s_add_u32 s8, s8, 4
	s_addc_u32 s9, s9, 0
	s_cmp_eq_u32 s2, 0
	s_cbranch_scc0 .LBB1_2
	s_branch .LBB1_6
.LBB1_5:
	v_mov_b32_e32 v0, 0
.LBB1_6:                                ; %Flow37
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s6, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s7, v2, vcc_lo
	global_store_b32 v[1:2], v0, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z25convolutionKernelConstantPfS_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z25convolutionKernelConstantPfS_ii, .Lfunc_end1-_Z25convolutionKernelConstantPfS_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 272
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z23convolutionKernelSharedPfS_ii ; -- Begin function _Z23convolutionKernelSharedPfS_ii
	.globl	_Z23convolutionKernelSharedPfS_ii
	.p2align	8
	.type	_Z23convolutionKernelSharedPfS_ii,@function
_Z23convolutionKernelSharedPfS_ii:      ; @_Z23convolutionKernelSharedPfS_ii
; %bb.0:
	s_clause 0x2
	s_load_b64 s[4:5], s[0:1], 0x10
	s_load_b32 s6, s[0:1], 0x24
	s_load_b128 s[0:3], s[0:1], 0x0
                                        ; implicit-def: $vgpr3
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s7, s4, 31
	s_and_b32 s6, s6, 0xffff
	s_add_i32 s7, s4, s7
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s7, s7, 1
	s_sub_i32 s8, s6, s7
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_le_u32_e32 vcc_lo, s8, v0
	s_and_saveexec_b32 s8, vcc_lo
	s_xor_b32 s8, exec_lo, s8
	s_cbranch_execz .LBB2_4
; %bb.1:
	s_add_i32 s9, s15, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[1:2], null, s9, s6, v[0:1]
	v_mov_b32_e32 v2, 0
	s_mov_b32 s9, exec_lo
	v_cmpx_lt_i32_e32 -1, v1
	s_cbranch_execz .LBB2_3
; %bb.2:
	v_mov_b32_e32 v2, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, vcc_lo, s0, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	global_load_b32 v2, v[1:2], off
.LBB2_3:
	s_or_b32 exec_lo, exec_lo, s9
	v_add_nc_u32_e32 v3, s7, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_subrev_nc_u32_e32 v1, s6, v3
	v_lshlrev_b32_e32 v1, 2, v1
	s_waitcnt vmcnt(0)
	ds_store_b32 v1, v2
.LBB2_4:                                ; %Flow50
	s_and_not1_saveexec_b32 s8, s8
; %bb.5:                                ; %._crit_edge32
	v_add_nc_u32_e32 v3, s7, v0
; %bb.6:
	s_or_b32 exec_lo, exec_lo, s8
	v_mad_u64_u32 v[1:2], null, s15, s6, v[0:1]
	v_mov_b32_e32 v2, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[1:2]
	v_add_co_u32 v4, vcc_lo, s0, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
	v_cmp_gt_u32_e32 vcc_lo, s7, v0
	global_load_b32 v4, v[4:5], off
	v_lshlrev_b32_e32 v5, 2, v3
	s_waitcnt vmcnt(0)
	ds_store_b32 v5, v4
	s_and_saveexec_b32 s7, vcc_lo
	s_cbranch_execz .LBB2_10
; %bb.7:
	v_add_nc_u32_e32 v3, s6, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_i32_e32 vcc_lo, s5, v3
	s_and_saveexec_b32 s5, vcc_lo
	s_cbranch_execz .LBB2_9
; %bb.8:
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[3:4]
	v_add_co_u32 v2, vcc_lo, s0, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	global_load_b32 v2, v[2:3], off
.LBB2_9:
	s_or_b32 exec_lo, exec_lo, s5
	v_lshl_add_u32 v3, s6, 2, v5
	s_waitcnt vmcnt(0)
	ds_store_b32 v3, v2
.LBB2_10:                               ; %Flow49
	s_or_b32 exec_lo, exec_lo, s7
	s_cmp_lt_i32 s4, 1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB2_13
; %bb.11:                               ; %.lr.ph.preheader
	v_lshlrev_b32_e32 v2, 2, v0
	v_mov_b32_e32 v0, 0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, M@rel32@lo+4
	s_addc_u32 s1, s1, M@rel32@hi+12
.LBB2_12:                               ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	ds_load_b32 v3, v2
	s_load_b32 s5, s[0:1], 0x0
	s_add_i32 s4, s4, -1
	v_add_nc_u32_e32 v2, 4, v2
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmp_eq_u32 s4, 0
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v0, s5, v3
	s_cbranch_scc0 .LBB2_12
	s_branch .LBB2_14
.LBB2_13:
	v_mov_b32_e32 v0, 0
.LBB2_14:                               ; %Flow48
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, vcc_lo, s2, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
	global_store_b32 v[1:2], v0, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z23convolutionKernelSharedPfS_ii
		.amdhsa_group_segment_fixed_size 164
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z23convolutionKernelSharedPfS_ii, .Lfunc_end2-_Z23convolutionKernelSharedPfS_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 520
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 164 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z31convolutionKernelSharedSimplierPfS_ii ; -- Begin function _Z31convolutionKernelSharedSimplierPfS_ii
	.globl	_Z31convolutionKernelSharedSimplierPfS_ii
	.p2align	8
	.type	_Z31convolutionKernelSharedSimplierPfS_ii,@function
_Z31convolutionKernelSharedSimplierPfS_ii: ; @_Z31convolutionKernelSharedSimplierPfS_ii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b128 s[4:7], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s11, s2, 0xffff
	s_load_b64 s[2:3], s[0:1], 0x10
	s_mul_i32 s10, s15, s11
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, s10, v0
	v_lshlrev_b32_e32 v0, 2, v0
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[3:4]
	v_add_co_u32 v4, vcc_lo, s4, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v2, vcc_lo
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s2, 1
	global_load_b32 v4, v[4:5], off
	s_waitcnt vmcnt(0)
	ds_store_b32 v0, v4
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB3_9
; %bb.1:                                ; %.lr.ph
	s_lshr_b32 s0, s2, 31
	v_mov_b32_e32 v4, 0
	s_add_i32 s0, s2, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_ashr_i32 s0, s0, 1
	s_getpc_b64 s[8:9]
	s_add_u32 s8, s8, M@rel32@lo+4
	s_addc_u32 s9, s9, M@rel32@hi+12
	s_lshl_b32 s1, s0, 2
	v_subrev_nc_u32_e32 v3, s0, v3
	v_subrev_nc_u32_e32 v5, s1, v0
	v_mov_b32_e32 v0, v4
	s_add_i32 s1, s10, s11
.LBB3_2:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_lt_i32_e32 vcc_lo, -1, v3
	v_cmp_gt_i32_e64 s0, s3, v3
	s_and_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s11, s0
	s_cbranch_execz .LBB3_8
; %bb.3:                                ;   in Loop: Header=BB3_2 Depth=1
	s_waitcnt lgkmcnt(0)
	s_load_b32 s12, s[8:9], 0x0
	v_cmp_gt_i32_e32 vcc_lo, s10, v3
	v_cmp_le_i32_e64 s0, s1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s0, vcc_lo, s0
	s_and_saveexec_b32 s13, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s0, exec_lo, s13
	s_cbranch_execz .LBB3_5
; %bb.4:                                ;   in Loop: Header=BB3_2 Depth=1
	v_lshlrev_b64 v[6:7], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, s4, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	global_load_b32 v6, v[6:7], off
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_fmac_f32_e32 v0, s12, v6
.LBB3_5:                                ; %Flow
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_and_not1_saveexec_b32 s0, s0
	s_cbranch_execz .LBB3_7
; %bb.6:                                ;   in Loop: Header=BB3_2 Depth=1
	ds_load_b32 v6, v5
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v0, s12, v6
.LBB3_7:                                ; %Flow50
                                        ;   in Loop: Header=BB3_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
.LBB3_8:                                ;   in Loop: Header=BB3_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s11
	s_add_i32 s2, s2, -1
	v_add_nc_u32_e32 v3, 1, v3
	v_add_nc_u32_e32 v5, 4, v5
	s_add_u32 s8, s8, 4
	s_addc_u32 s9, s9, 0
	s_cmp_eq_u32 s2, 0
	s_cbranch_scc0 .LBB3_2
	s_branch .LBB3_10
.LBB3_9:
	v_mov_b32_e32 v0, 0
.LBB3_10:                               ; %Flow52
	v_add_co_u32 v1, vcc_lo, s6, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s7, v2, vcc_lo
	global_store_b32 v[1:2], v0, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z31convolutionKernelSharedSimplierPfS_ii
		.amdhsa_group_segment_fixed_size 128
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z31convolutionKernelSharedSimplierPfS_ii, .Lfunc_end3-_Z31convolutionKernelSharedSimplierPfS_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 420
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 128 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.protected	M                       ; @M
	.type	M,@object
	.section	.bss,"aw",@nobits
	.globl	M
	.p2align	4, 0x0
M:
	.zero	40
	.size	M, 40

	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym M
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z22convolutionBasicKernelPfS_S_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z22convolutionBasicKernelPfS_S_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z25convolutionKernelConstantPfS_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z25convolutionKernelConstantPfS_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 164
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z23convolutionKernelSharedPfS_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z23convolutionKernelSharedPfS_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 128
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z31convolutionKernelSharedSimplierPfS_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z31convolutionKernelSharedSimplierPfS_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
