#include <iostream>
#include <cstdlib>
#include <sys/time.h>
using namespace std;

const int BLOCKSIZE = 32;

// Global variables to calculate sizes
int *sizes_gpu, *subtotals_gpu, *total_gpu;  // For finding sums

// Stopwatch class
class Stopwatch {
  private:
    timeval initialTime;

  public:
    Stopwatch() {
      reset();
    }

    void reset() {
      gettimeofday(&initialTime, 0);
    }

    float elapsed() const {
      timeval currentTime;
      gettimeofday(&currentTime, 0);

      return (float) (currentTime.tv_sec - initialTime.tv_sec) + ((float) (currentTime.tv_usec - initialTime.tv_usec))/1000000;
    }
};

// Create an TownSet of size n with all false entries
void createTownSet(char *current, int n) {
  char temp[n];
  for (int i=0; i<n; i++)
    temp[i] = 0;
  cudaMemcpy(&current, &temp, n, cudaMemcpyHostToDevice);
}

// Take a union of current_gpu and with specified townset and store it in current_gpu
__global__ void unionTownSet_gpu(char *current, char *townSets, int i, int n) {
  int threadId = blockIdx.x*blockDim.x + threadIdx.x;
  current[threadId] += townSets[i*n+threadId];
}

void unionTownSet(char *current, char *townSets, int i, int n) {
  unionTownSet_gpu<<<n/BLOCKSIZE, BLOCKSIZE>>>(current, townSets, i, n);
}

// Find the total population in all of the town sets
__global__ void sizeTownSet_gpu(char *current, int *pops, int n, int *sizes) {
  int threadId = blockIdx.x*blockDim.x + threadIdx.x;
  if (current[threadId] == 1)
    sizes[threadId] = pops[threadId];
  else
    sizes[threadId] = 0;
}

__global__ void totals_gpu(int *output, int *input) {
  __shared__ int temp[BLOCKSIZE];
  int threadId = blockIdx.x*blockDim.x + threadIdx.x;
  temp[threadIdx.x] = input[threadId];
  __syncthreads();

  for (int s=blockDim.x/2; s>0; s>>=1) {
    if (threadIdx.x < s)
      temp[threadIdx.x] += temp[threadIdx.x+s];
    __syncthreads();
  }

  if (threadIdx.x == 0)
    output[blockIdx.x] = temp[0];
}

int sizeTownSet(char *current, int *pops, int n) {
  sizeTownSet_gpu<<<n/BLOCKSIZE, BLOCKSIZE>>>(current, pops, n, sizes_gpu);
  totals_gpu<<<n/BLOCKSIZE, BLOCKSIZE>>>(subtotals_gpu, sizes_gpu);  // Calculate subtotals
  totals_gpu<<<n/BLOCKSIZE, BLOCKSIZE>>>(total_gpu, subtotals_gpu);  // Calculate subtotals
  int result;
  cudaMemcpy(total_gpu, &result, sizeof(int), cudaMemcpyDeviceToHost);
  return result;
}

// Count number of towns in a set
__global__ void countTownSet_gpu(char *current, int n, int *sizes) {
  int threadId = blockIdx.x*blockDim.x + threadIdx.x;
  if (current[threadId] == 1)
    sizes[threadId] = 1;
  else
    sizes[threadId] = 0;
}

int countTownSet(char *current, int n) {
  countTownSet_gpu<<<n/BLOCKSIZE, BLOCKSIZE>>>(current, n, sizes_gpu);
  totals_gpu<<<n/BLOCKSIZE, BLOCKSIZE>>>(subtotals_gpu, sizes_gpu);  // Calculate subtotals
  totals_gpu<<<n/BLOCKSIZE, BLOCKSIZE>>>(total_gpu, subtotals_gpu);  // Calculate subtotals
  int result;
  cudaMemcpy(total_gpu, &result, sizeof(int), cudaMemcpyDeviceToHost);
  return result;
}

int main(int argc, char **argv) {
  if (argc != 4) {
    cout << "Usage: " << argv[0] << " mode size reps" << endl;
    cout << "  Mode is one of the following:" << endl;
    cout << "    a  test full algorithm" << endl;
    cout << "    u  test taking unions" << endl;
    cout << "    s  test calculating sizes" << endl;
    exit(0);
  }
  int size = atoi(argv[2]);
  int reps = atoi(argv[3]);
  char mode = argv[1][0];

  // Initialize data
  char townSets[size*size];
  for (int i=0; i<size; i++) {
    for (int j=0; j<size; j++) {
      if (rand() < .1*RAND_MAX)
        townSets[i*size+j] = 1;
      else
        townSets[i*size+j] = 0;
    }
    townSets[i*size+i] = 1;
  }
  int pops[size];
  int totalPop = 0;
  for (int i=0; i<size; i++) {
    pops[i] = rand() % 256;
    totalPop += pops[i];
  }

  // Perform the tests
  int rounds, totalRounds;
  Stopwatch timer;

  // Copy the data to the GPU
  char *townSets_gpu;
  int *pops_gpu;
  char *current_gpu;  // Stores working townset
  cudaMalloc((void**) &townSets_gpu, size*size);
  cudaMemcpy(townSets_gpu, townSets, size*size, cudaMemcpyHostToDevice);
  cudaMalloc((void**) &pops_gpu, size*sizeof(int));
  cudaMemcpy(pops_gpu, pops, size*sizeof(int), cudaMemcpyHostToDevice);
  cudaMalloc((void**) &current_gpu, size);
  cudaMalloc((void**) &sizes_gpu, size);
  cudaMalloc((void**) &subtotals_gpu, size/BLOCKSIZE);
  cudaMalloc((void**) &total_gpu, 1);

  // Do the simulation
  switch (mode) {
    case 'a':
      totalRounds=0;
      for (int r=0; r<reps; r++) {
        createTownSet(current_gpu, size);
        rounds = 0;
        while (sizeTownSet(current_gpu, pops_gpu, size) <= totalPop/2) {
          unionTownSet(current_gpu, townSets_gpu, rand()%size, size);
          rounds++;
        }
        totalRounds += rounds;
      }
      cout << "Average number of rounds = " << ((float) totalRounds/reps) << endl;
      break;
    case 'u':
      createTownSet(current_gpu, size);
      for (int r=0; r<reps; r++)
        unionTownSet(current_gpu, townSets_gpu, rand()%size, size);
      break;
    case 's':
      int s;
      for (int r=0; r<reps; r++)
        s = sizeTownSet(current_gpu, pops_gpu, size);
      break;
  }
  cout << "Elapsed time " << timer.elapsed() << endl;
}

	.file	"tmpxft_0034ea4b_00000000-6_TownSet_cuda.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3647:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3647:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.align 2
	.type	_ZNSolsEPFRSoS_E.isra.0, @function
_ZNSolsEPFRSoS_E.isra.0:
.LFB4308:
	.cfi_startproc
	jmp	*%rsi
	.cfi_endproc
.LFE4308:
	.size	_ZNSolsEPFRSoS_E.isra.0, .-_ZNSolsEPFRSoS_E.isra.0
	.globl	_Z13createTownSetPci
	.type	_Z13createTownSetPci, @function
_Z13createTownSetPci:
.LFB3640:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movslq	%esi, %r8
	leaq	15(%r8), %rdx
	movq	%rsp, %rbp
	.cfi_def_cfa_register 6
	subq	$32, %rsp
	movq	%rdi, -24(%rbp)
	movq	%rsp, %rcx
	movq	%fs:40, %rax
	movq	%rax, -8(%rbp)
	xorl	%eax, %eax
	movq	%rdx, %rax
	andq	$-4096, %rdx
	andq	$-16, %rax
	subq	%rdx, %rcx
.L4:
	cmpq	%rcx, %rsp
	je	.L5
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L4
.L5:
	andl	$4095, %eax
	subq	%rax, %rsp
	testq	%rax, %rax
	je	.L6
	orq	$0, -8(%rsp,%rax)
.L6:
	movq	%rsp, %r9
	xorl	%eax, %eax
.L7:
	cmpl	%eax, %esi
	jle	.L15
	movb	$0, (%r9,%rax)
	incq	%rax
	jmp	.L7
.L15:
	leaq	-24(%rbp), %rdi
	movl	$1, %ecx
	movq	%r8, %rdx
	movq	%r9, %rsi
	call	cudaMemcpy@PLT
	movq	-8(%rbp), %rax
	subq	%fs:40, %rax
	je	.L9
	call	__stack_chk_fail@PLT
.L9:
	leave
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE3640:
	.size	_Z13createTownSetPci, .-_Z13createTownSetPci
	.globl	_Z40__device_stub__Z16unionTownSet_gpuPcS_iiPcS_ii
	.type	_Z40__device_stub__Z16unionTownSet_gpuPcS_iiPcS_ii, @function
_Z40__device_stub__Z16unionTownSet_gpuPcS_iiPcS_ii:
.LFB3669:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z16unionTownSet_gpuPcS_ii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L16:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L18
	call	__stack_chk_fail@PLT
.L18:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3669:
	.size	_Z40__device_stub__Z16unionTownSet_gpuPcS_iiPcS_ii, .-_Z40__device_stub__Z16unionTownSet_gpuPcS_iiPcS_ii
	.globl	_Z16unionTownSet_gpuPcS_ii
	.type	_Z16unionTownSet_gpuPcS_ii, @function
_Z16unionTownSet_gpuPcS_ii:
.LFB3670:
	.cfi_startproc
	endbr64
	jmp	_Z40__device_stub__Z16unionTownSet_gpuPcS_iiPcS_ii
	.cfi_endproc
.LFE3670:
	.size	_Z16unionTownSet_gpuPcS_ii, .-_Z16unionTownSet_gpuPcS_ii
	.globl	_Z12unionTownSetPcS_ii
	.type	_Z12unionTownSetPcS_ii, @function
_Z12unionTownSetPcS_ii:
.LFB3641:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	%edx, %r13d
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rsi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movl	%ecx, %ebx
	movl	$32, %ecx
	movl	%ebx, %eax
	cltd
	idivl	%ecx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movl	$134217729, %edx
	movl	$1, %ecx
	salq	$5, %rdx
	movl	%eax, 8(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 12(%rsp)
	movq	8(%rsp), %rdi
	movl	16(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L21
	addq	$40, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 40
	movl	%ebx, %ecx
	movl	%r13d, %edx
	movq	%r12, %rsi
	popq	%rbx
	.cfi_def_cfa_offset 32
	movq	%rbp, %rdi
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	_Z40__device_stub__Z16unionTownSet_gpuPcS_iiPcS_ii
.L21:
	.cfi_restore_state
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3641:
	.size	_Z12unionTownSetPcS_ii, .-_Z12unionTownSetPcS_ii
	.globl	_Z41__device_stub__Z15sizeTownSet_gpuPcPiiS0_PcPiiS0_
	.type	_Z41__device_stub__Z15sizeTownSet_gpuPcPiiS0_PcPiiS0_, @function
_Z41__device_stub__Z15sizeTownSet_gpuPcPiiS0_PcPiiS0_:
.LFB3671:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L24
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z15sizeTownSet_gpuPcPiiS0_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L24:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L26
	call	__stack_chk_fail@PLT
.L26:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3671:
	.size	_Z41__device_stub__Z15sizeTownSet_gpuPcPiiS0_PcPiiS0_, .-_Z41__device_stub__Z15sizeTownSet_gpuPcPiiS0_PcPiiS0_
	.globl	_Z15sizeTownSet_gpuPcPiiS0_
	.type	_Z15sizeTownSet_gpuPcPiiS0_, @function
_Z15sizeTownSet_gpuPcPiiS0_:
.LFB3672:
	.cfi_startproc
	endbr64
	jmp	_Z41__device_stub__Z15sizeTownSet_gpuPcPiiS0_PcPiiS0_
	.cfi_endproc
.LFE3672:
	.size	_Z15sizeTownSet_gpuPcPiiS0_, .-_Z15sizeTownSet_gpuPcPiiS0_
	.globl	_Z32__device_stub__Z10totals_gpuPiS_PiS_
	.type	_Z32__device_stub__Z10totals_gpuPiS_PiS_, @function
_Z32__device_stub__Z10totals_gpuPiS_PiS_:
.LFB3673:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L29
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z10totals_gpuPiS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L29:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L31
	call	__stack_chk_fail@PLT
.L31:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3673:
	.size	_Z32__device_stub__Z10totals_gpuPiS_PiS_, .-_Z32__device_stub__Z10totals_gpuPiS_PiS_
	.globl	_Z10totals_gpuPiS_
	.type	_Z10totals_gpuPiS_, @function
_Z10totals_gpuPiS_:
.LFB3674:
	.cfi_startproc
	endbr64
	jmp	_Z32__device_stub__Z10totals_gpuPiS_PiS_
	.cfi_endproc
.LFE3674:
	.size	_Z10totals_gpuPiS_, .-_Z10totals_gpuPiS_
	.globl	_Z11sizeTownSetPcPii
	.type	_Z11sizeTownSetPcPii, @function
_Z11sizeTownSetPcPii:
.LFB3642:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movq	%rsi, %r13
	movl	$32, %esi
	movl	$134217729, %ecx
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	salq	$5, %rcx
	movq	%rdi, %r12
	xorl	%r9d, %r9d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	xorl	%r8d, %r8d
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movl	%edx, %ebx
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	movq	%fs:40, %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	movl	%edx, %eax
	movq	%rcx, 12(%rsp)
	cltd
	movl	$1, 20(%rsp)
	idivl	%esi
	movq	%rcx, %rdx
	movl	$1, %ecx
	movl	%eax, (%rsp)
	movl	%eax, %ebp
	movabsq	$4294967297, %rax
	movq	%rax, 4(%rsp)
	movq	(%rsp), %rdi
	movl	8(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L35
	movq	sizes_gpu(%rip), %rcx
	movl	%ebx, %edx
	movq	%r13, %rsi
	movq	%r12, %rdi
	call	_Z41__device_stub__Z15sizeTownSet_gpuPcPiiS0_PcPiiS0_
.L35:
	movl	%ebp, (%rsp)
	movl	$134217729, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	salq	$5, %rdx
	movl	$1, %ecx
	movl	$1, 20(%rsp)
	movq	%rax, 4(%rsp)
	movq	(%rsp), %rdi
	movl	8(%rsp), %esi
	movq	%rdx, 12(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L36
	movq	sizes_gpu(%rip), %rsi
	movq	subtotals_gpu(%rip), %rdi
	call	_Z32__device_stub__Z10totals_gpuPiS_PiS_
.L36:
	movl	%ebp, (%rsp)
	movl	$134217729, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	salq	$5, %rdx
	movl	$1, %ecx
	movl	$1, 20(%rsp)
	movq	%rax, 4(%rsp)
	movq	(%rsp), %rdi
	movl	8(%rsp), %esi
	movq	%rdx, 12(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L37
	movq	subtotals_gpu(%rip), %rsi
	movq	total_gpu(%rip), %rdi
	call	_Z32__device_stub__Z10totals_gpuPiS_PiS_
.L37:
	leaq	12(%rsp), %rsi
	movl	$2, %ecx
	movl	$4, %edx
	movq	total_gpu(%rip), %rdi
	call	cudaMemcpy@PLT
	movl	12(%rsp), %eax
	movq	24(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L38
	call	__stack_chk_fail@PLT
.L38:
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3642:
	.size	_Z11sizeTownSetPcPii, .-_Z11sizeTownSetPcPii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Usage: "
.LC1:
	.string	" mode size reps"
.LC2:
	.string	"  Mode is one of the following:"
.LC3:
	.string	"    a  test full algorithm"
.LC4:
	.string	"    u  test taking unions"
.LC5:
	.string	"    s  test calculating sizes"
.LC6:
	.string	"Average number of rounds = "
.LC7:
	.string	"Elapsed time "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3644:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register 6
	pushq	%r15
	pushq	%r14
	pushq	%r13
	.cfi_offset 15, -24
	.cfi_offset 14, -32
	.cfi_offset 13, -40
	movq	%rsi, %r13
	pushq	%r12
	pushq	%rbx
	subq	$136, %rsp
	.cfi_offset 12, -48
	.cfi_offset 3, -56
	movq	%fs:40, %rax
	movq	%rax, -56(%rbp)
	xorl	%eax, %eax
	cmpl	$4, %edi
	je	.L41
	leaq	_ZSt4cout(%rip), %rbx
	leaq	.LC0(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	0(%r13), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC1(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC2(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC3(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC4(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	leaq	.LC5(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	xorl	%edi, %edi
	call	exit@PLT
.L41:
	movq	16(%rsi), %rdi
	call	atoi@PLT
	movq	24(%r13), %rdi
	movl	%eax, %ebx
	call	atoi@PLT
	movq	%rsp, %rcx
	movl	%eax, %r12d
	movq	8(%r13), %rax
	movb	(%rax), %r15b
	movl	%ebx, %eax
	imull	%ebx, %eax
	cltq
	leaq	15(%rax), %rdx
	movq	%rax, -120(%rbp)
	movq	%rdx, %rax
	andq	$-4096, %rdx
	andq	$-16, %rax
	subq	%rdx, %rcx
.L42:
	cmpq	%rcx, %rsp
	je	.L43
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L42
.L43:
	andl	$4095, %eax
	subq	%rax, %rsp
	testq	%rax, %rax
	je	.L44
	orq	$0, -8(%rsp,%rax)
.L44:
	movq	%rsp, -136(%rbp)
	movslq	%ebx, %r13
	movq	%rsp, %rsi
	xorl	%edi, %edi
	leaq	1(%r13), %r8
	xorl	%ecx, %ecx
	leaq	(%rsp,%r13), %r9
.L45:
	cmpl	%ebx, %ecx
	jge	.L74
	movq	-136(%rbp), %rax
	movslq	%edi, %r14
	leaq	(%rax,%r14), %rdx
	addq	%r9, %r14
.L46:
	movq	%r9, -168(%rbp)
	movl	%edi, -128(%rbp)
	movq	%r8, -160(%rbp)
	movq	%rsi, -152(%rbp)
	movq	%rdx, -144(%rbp)
	movl	%ecx, -124(%rbp)
	call	rand@PLT
	movq	-144(%rbp), %rdx
	movl	-124(%rbp), %ecx
	cmpl	$214748364, %eax
	movq	-152(%rbp), %rsi
	movl	-128(%rbp), %edi
	setle	(%rdx)
	incq	%rdx
	movq	-160(%rbp), %r8
	movq	-168(%rbp), %r9
	cmpq	%r14, %rdx
	jne	.L46
	movb	$1, (%rsi)
	incl	%ecx
	addq	%r8, %rsi
	addl	%ebx, %edi
	jmp	.L45
.L74:
	leaq	0(,%r13,4), %r14
	movq	%rsp, %rcx
	leaq	15(%r14), %rdx
	movq	%rdx, %rax
	andq	$-4096, %rdx
	andq	$-16, %rax
	subq	%rdx, %rcx
.L48:
	cmpq	%rcx, %rsp
	je	.L49
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L48
.L49:
	andl	$4095, %eax
	subq	%rax, %rsp
	testq	%rax, %rax
	je	.L50
	orq	$0, -8(%rsp,%rax)
.L50:
	xorl	%eax, %eax
	movq	%rsp, -144(%rbp)
	xorl	%ecx, %ecx
	movl	%eax, -124(%rbp)
.L51:
	cmpl	%ecx, %ebx
	jle	.L75
	movq	%rcx, -152(%rbp)
	call	rand@PLT
	movl	$256, %ecx
	cltd
	idivl	%ecx
	movq	-152(%rbp), %rcx
	movq	-144(%rbp), %rax
	addl	%edx, -124(%rbp)
	movl	%edx, (%rax,%rcx,4)
	incq	%rcx
	jmp	.L51
.L75:
	xorl	%esi, %esi
	leaq	-88(%rbp), %rdi
	call	gettimeofday@PLT
	movq	-120(%rbp), %rsi
	leaq	-112(%rbp), %rdi
	call	cudaMalloc@PLT
	movq	-120(%rbp), %rdx
	movq	-112(%rbp), %rdi
	movl	$1, %ecx
	movq	-136(%rbp), %rsi
	call	cudaMemcpy@PLT
	leaq	-104(%rbp), %rdi
	movq	%r14, %rsi
	call	cudaMalloc@PLT
	movq	-144(%rbp), %rsi
	movq	-104(%rbp), %rdi
	movq	%r14, %rdx
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	leaq	-96(%rbp), %rdi
	movq	%r13, %rsi
	call	cudaMalloc@PLT
	movq	%r13, %rsi
	leaq	sizes_gpu(%rip), %rdi
	call	cudaMalloc@PLT
	movl	%ebx, %eax
	movl	$32, %ecx
	leaq	subtotals_gpu(%rip), %rdi
	cltd
	idivl	%ecx
	movslq	%eax, %rsi
	call	cudaMalloc@PLT
	movl	$1, %esi
	leaq	total_gpu(%rip), %rdi
	call	cudaMalloc@PLT
	cmpb	$115, %r15b
	je	.L65
	cmpb	$117, %r15b
	je	.L54
	cmpb	$97, %r15b
	jne	.L55
	movl	-124(%rbp), %eax
	movl	$2, %ecx
	xorl	%r14d, %r14d
	xorl	%r13d, %r13d
	cltd
	idivl	%ecx
	movl	%eax, -120(%rbp)
.L56:
	cmpl	%r12d, %r14d
	jge	.L76
	movq	-96(%rbp), %rdi
	movl	%ebx, %esi
	xorl	%r15d, %r15d
	call	_Z13createTownSetPci
.L57:
	movq	-104(%rbp), %rsi
	movq	-96(%rbp), %rdi
	movl	%ebx, %edx
	call	_Z11sizeTownSetPcPii
	cmpl	%eax, -120(%rbp)
	jl	.L77
	call	rand@PLT
	movq	-112(%rbp), %rsi
	movq	-96(%rbp), %rdi
	movl	%ebx, %ecx
	cltd
	incl	%r15d
	idivl	%ebx
	call	_Z12unionTownSetPcS_ii
	jmp	.L57
.L77:
	addl	%r15d, %r13d
	incl	%r14d
	jmp	.L56
.L76:
	leaq	.LC6(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtsi2ssl	%r12d, %xmm1
	cvtsi2ssl	%r13d, %xmm0
	movq	%rax, %rdi
	divss	%xmm1, %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	jmp	.L55
.L54:
	movq	-96(%rbp), %rdi
	movl	%ebx, %esi
	xorl	%r13d, %r13d
	call	_Z13createTownSetPci
.L60:
	cmpl	%r12d, %r13d
	jge	.L55
	call	rand@PLT
	movq	-112(%rbp), %rsi
	movq	-96(%rbp), %rdi
	movl	%ebx, %ecx
	cltd
	incl	%r13d
	idivl	%ebx
	call	_Z12unionTownSetPcS_ii
	jmp	.L60
.L65:
	xorl	%r13d, %r13d
.L53:
	cmpl	%r12d, %r13d
	jge	.L55
	movq	-104(%rbp), %rsi
	movq	-96(%rbp), %rdi
	movl	%ebx, %edx
	incl	%r13d
	call	_Z11sizeTownSetPcPii
	jmp	.L53
.L55:
	leaq	.LC7(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	xorl	%esi, %esi
	leaq	-72(%rbp), %rdi
	movq	%rax, %rbx
	call	gettimeofday@PLT
	movq	-64(%rbp), %rax
	subq	-80(%rbp), %rax
	movq	%rbx, %rdi
	cvtsi2ssq	%rax, %xmm0
	movq	-72(%rbp), %rax
	subq	-88(%rbp), %rax
	divss	.LC8(%rip), %xmm0
	cvtsi2ssq	%rax, %xmm1
	addss	%xmm1, %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	je	.L64
	call	__stack_chk_fail@PLT
.L64:
	leaq	-40(%rbp), %rsp
	xorl	%eax, %eax
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE3644:
	.size	main, .-main
	.text
	.globl	_Z39__device_stub__Z16countTownSet_gpuPciPiPciPi
	.type	_Z39__device_stub__Z16countTownSet_gpuPciPiPciPi, @function
_Z39__device_stub__Z16countTownSet_gpuPciPiPciPi:
.LFB3675:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movl	%esi, 20(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L78
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z16countTownSet_gpuPciPi(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L78:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L80
	call	__stack_chk_fail@PLT
.L80:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3675:
	.size	_Z39__device_stub__Z16countTownSet_gpuPciPiPciPi, .-_Z39__device_stub__Z16countTownSet_gpuPciPiPciPi
	.globl	_Z16countTownSet_gpuPciPi
	.type	_Z16countTownSet_gpuPciPi, @function
_Z16countTownSet_gpuPciPi:
.LFB3676:
	.cfi_startproc
	endbr64
	jmp	_Z39__device_stub__Z16countTownSet_gpuPciPiPciPi
	.cfi_endproc
.LFE3676:
	.size	_Z16countTownSet_gpuPciPi, .-_Z16countTownSet_gpuPciPi
	.globl	_Z12countTownSetPci
	.type	_Z12countTownSetPci, @function
_Z12countTownSetPci:
.LFB3643:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	$134217729, %ecx
	movq	%rdi, %r12
	xorl	%r9d, %r9d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	salq	$5, %rcx
	xorl	%r8d, %r8d
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movl	%esi, %ebx
	movl	$32, %esi
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	movq	%fs:40, %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	movl	%ebx, %eax
	movq	%rcx, 12(%rsp)
	cltd
	movl	$1, 20(%rsp)
	idivl	%esi
	movq	%rcx, %rdx
	movl	$1, %ecx
	movl	%eax, (%rsp)
	movl	%eax, %ebp
	movabsq	$4294967297, %rax
	movq	%rax, 4(%rsp)
	movq	(%rsp), %rdi
	movl	8(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L84
	movq	sizes_gpu(%rip), %rdx
	movl	%ebx, %esi
	movq	%r12, %rdi
	call	_Z39__device_stub__Z16countTownSet_gpuPciPiPciPi
.L84:
	movl	%ebp, (%rsp)
	movl	$134217729, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	salq	$5, %rdx
	movl	$1, %ecx
	movl	$1, 20(%rsp)
	movq	%rax, 4(%rsp)
	movq	(%rsp), %rdi
	movl	8(%rsp), %esi
	movq	%rdx, 12(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L85
	movq	sizes_gpu(%rip), %rsi
	movq	subtotals_gpu(%rip), %rdi
	call	_Z32__device_stub__Z10totals_gpuPiS_PiS_
.L85:
	movl	%ebp, (%rsp)
	movl	$134217729, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	salq	$5, %rdx
	movl	$1, %ecx
	movl	$1, 20(%rsp)
	movq	%rax, 4(%rsp)
	movq	(%rsp), %rdi
	movl	8(%rsp), %esi
	movq	%rdx, 12(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L86
	movq	subtotals_gpu(%rip), %rsi
	movq	total_gpu(%rip), %rdi
	call	_Z32__device_stub__Z10totals_gpuPiS_PiS_
.L86:
	leaq	12(%rsp), %rsi
	movl	$2, %ecx
	movl	$4, %edx
	movq	total_gpu(%rip), %rdi
	call	cudaMemcpy@PLT
	movl	12(%rsp), %eax
	movq	24(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L87
	call	__stack_chk_fail@PLT
.L87:
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3643:
	.size	_Z12countTownSetPci, .-_Z12countTownSetPci
	.section	.rodata.str1.1
.LC9:
	.string	"_Z16countTownSet_gpuPciPi"
.LC10:
	.string	"_Z10totals_gpuPiS_"
.LC11:
	.string	"_Z15sizeTownSet_gpuPcPiiS0_"
.LC12:
	.string	"_Z16unionTownSet_gpuPcS_ii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3678:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC9(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z16countTownSet_gpuPciPi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC10(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z10totals_gpuPiS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC11(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z15sizeTownSet_gpuPcPiiS0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC12(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z16unionTownSet_gpuPcS_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3678:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	total_gpu
	.bss
	.align 8
	.type	total_gpu, @object
	.size	total_gpu, 8
total_gpu:
	.zero	8
	.globl	subtotals_gpu
	.align 8
	.type	subtotals_gpu, @object
	.size	subtotals_gpu, 8
subtotals_gpu:
	.zero	8
	.globl	sizes_gpu
	.align 8
	.type	sizes_gpu, @object
	.size	sizes_gpu, 8
sizes_gpu:
	.zero	8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC8:
	.long	1232348160
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <iostream>
#include <cstdlib>
#include <sys/time.h>
using namespace std;

const int BLOCKSIZE = 32;

// Global variables to calculate sizes
int *sizes_gpu, *subtotals_gpu, *total_gpu;  // For finding sums

// Stopwatch class
class Stopwatch {
  private:
    timeval initialTime;

  public:
    Stopwatch() {
      reset();
    }

    void reset() {
      gettimeofday(&initialTime, 0);
    }

    float elapsed() const {
      timeval currentTime;
      gettimeofday(&currentTime, 0);

      return (float) (currentTime.tv_sec - initialTime.tv_sec) + ((float) (currentTime.tv_usec - initialTime.tv_usec))/1000000;
    }
};

// Create an TownSet of size n with all false entries
void createTownSet(char *current, int n) {
  char temp[n];
  for (int i=0; i<n; i++)
    temp[i] = 0;
  hipMemcpy(&current, &temp, n, hipMemcpyHostToDevice);
}

// Take a union of current_gpu and with specified townset and store it in current_gpu
__global__ void unionTownSet_gpu(char *current, char *townSets, int i, int n) {
  int threadId = blockIdx.x*blockDim.x + threadIdx.x;
  current[threadId] += townSets[i*n+threadId];
}

void unionTownSet(char *current, char *townSets, int i, int n) {
  unionTownSet_gpu<<<n/BLOCKSIZE, BLOCKSIZE>>>(current, townSets, i, n);
}

// Find the total population in all of the town sets
__global__ void sizeTownSet_gpu(char *current, int *pops, int n, int *sizes) {
  int threadId = blockIdx.x*blockDim.x + threadIdx.x;
  if (current[threadId] == 1)
    sizes[threadId] = pops[threadId];
  else
    sizes[threadId] = 0;
}

__global__ void totals_gpu(int *output, int *input) {
  __shared__ int temp[BLOCKSIZE];
  int threadId = blockIdx.x*blockDim.x + threadIdx.x;
  temp[threadIdx.x] = input[threadId];
  __syncthreads();

  for (int s=blockDim.x/2; s>0; s>>=1) {
    if (threadIdx.x < s)
      temp[threadIdx.x] += temp[threadIdx.x+s];
    __syncthreads();
  }

  if (threadIdx.x == 0)
    output[blockIdx.x] = temp[0];
}

int sizeTownSet(char *current, int *pops, int n) {
  sizeTownSet_gpu<<<n/BLOCKSIZE, BLOCKSIZE>>>(current, pops, n, sizes_gpu);
  totals_gpu<<<n/BLOCKSIZE, BLOCKSIZE>>>(subtotals_gpu, sizes_gpu);  // Calculate subtotals
  totals_gpu<<<n/BLOCKSIZE, BLOCKSIZE>>>(total_gpu, subtotals_gpu);  // Calculate subtotals
  int result;
  hipMemcpy(total_gpu, &result, sizeof(int), hipMemcpyDeviceToHost);
  return result;
}

// Count number of towns in a set
__global__ void countTownSet_gpu(char *current, int n, int *sizes) {
  int threadId = blockIdx.x*blockDim.x + threadIdx.x;
  if (current[threadId] == 1)
    sizes[threadId] = 1;
  else
    sizes[threadId] = 0;
}

int countTownSet(char *current, int n) {
  countTownSet_gpu<<<n/BLOCKSIZE, BLOCKSIZE>>>(current, n, sizes_gpu);
  totals_gpu<<<n/BLOCKSIZE, BLOCKSIZE>>>(subtotals_gpu, sizes_gpu);  // Calculate subtotals
  totals_gpu<<<n/BLOCKSIZE, BLOCKSIZE>>>(total_gpu, subtotals_gpu);  // Calculate subtotals
  int result;
  hipMemcpy(total_gpu, &result, sizeof(int), hipMemcpyDeviceToHost);
  return result;
}

int main(int argc, char **argv) {
  if (argc != 4) {
    cout << "Usage: " << argv[0] << " mode size reps" << endl;
    cout << "  Mode is one of the following:" << endl;
    cout << "    a  test full algorithm" << endl;
    cout << "    u  test taking unions" << endl;
    cout << "    s  test calculating sizes" << endl;
    exit(0);
  }
  int size = atoi(argv[2]);
  int reps = atoi(argv[3]);
  char mode = argv[1][0];

  // Initialize data
  char townSets[size*size];
  for (int i=0; i<size; i++) {
    for (int j=0; j<size; j++) {
      if (rand() < .1*RAND_MAX)
        townSets[i*size+j] = 1;
      else
        townSets[i*size+j] = 0;
    }
    townSets[i*size+i] = 1;
  }
  int pops[size];
  int totalPop = 0;
  for (int i=0; i<size; i++) {
    pops[i] = rand() % 256;
    totalPop += pops[i];
  }

  // Perform the tests
  int rounds, totalRounds;
  Stopwatch timer;

  // Copy the data to the GPU
  char *townSets_gpu;
  int *pops_gpu;
  char *current_gpu;  // Stores working townset
  hipMalloc((void**) &townSets_gpu, size*size);
  hipMemcpy(townSets_gpu, townSets, size*size, hipMemcpyHostToDevice);
  hipMalloc((void**) &pops_gpu, size*sizeof(int));
  hipMemcpy(pops_gpu, pops, size*sizeof(int), hipMemcpyHostToDevice);
  hipMalloc((void**) &current_gpu, size);
  hipMalloc((void**) &sizes_gpu, size);
  hipMalloc((void**) &subtotals_gpu, size/BLOCKSIZE);
  hipMalloc((void**) &total_gpu, 1);

  // Do the simulation
  switch (mode) {
    case 'a':
      totalRounds=0;
      for (int r=0; r<reps; r++) {
        createTownSet(current_gpu, size);
        rounds = 0;
        while (sizeTownSet(current_gpu, pops_gpu, size) <= totalPop/2) {
          unionTownSet(current_gpu, townSets_gpu, rand()%size, size);
          rounds++;
        }
        totalRounds += rounds;
      }
      cout << "Average number of rounds = " << ((float) totalRounds/reps) << endl;
      break;
    case 'u':
      createTownSet(current_gpu, size);
      for (int r=0; r<reps; r++)
        unionTownSet(current_gpu, townSets_gpu, rand()%size, size);
      break;
    case 's':
      int s;
      for (int r=0; r<reps; r++)
        s = sizeTownSet(current_gpu, pops_gpu, size);
      break;
  }
  cout << "Elapsed time " << timer.elapsed() << endl;
}

	.text
	.file	"TownSet_cuda.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z13createTownSetPci            # -- Begin function _Z13createTownSetPci
	.type	_Z13createTownSetPci,@function
_Z13createTownSetPci:                   # @_Z13createTownSetPci
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r14
	pushq	%rbx
	subq	$16, %rsp
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	movl	%esi, %ebx
	movq	%rdi, -24(%rbp)
	movl	%esi, %edx
	movq	%rsp, %r14
	leaq	15(%rdx), %rax
	andq	$-16, %rax
	subq	%rax, %r14
	movq	%r14, %rsp
	testl	%esi, %esi
	jle	.LBB0_2
# %bb.1:                                # %.lr.ph.preheader
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
.LBB0_2:                                # %._crit_edge
	movslq	%ebx, %rdx
	leaq	-24(%rbp), %rdi
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	-16(%rbp), %rsp
	popq	%rbx
	popq	%r14
	popq	%rbp
	.cfi_def_cfa %rsp, 8
	retq
.Lfunc_end0:
	.size	_Z13createTownSetPci, .Lfunc_end0-_Z13createTownSetPci
	.cfi_endproc
                                        # -- End function
	.globl	_Z31__device_stub__unionTownSet_gpuPcS_ii # -- Begin function _Z31__device_stub__unionTownSet_gpuPcS_ii
	.type	_Z31__device_stub__unionTownSet_gpuPcS_ii,@function
_Z31__device_stub__unionTownSet_gpuPcS_ii: # @_Z31__device_stub__unionTownSet_gpuPcS_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16unionTownSet_gpuPcS_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z31__device_stub__unionTownSet_gpuPcS_ii, .Lfunc_end1-_Z31__device_stub__unionTownSet_gpuPcS_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z12unionTownSetPcS_ii          # -- Begin function _Z12unionTownSetPcS_ii
	.type	_Z12unionTownSetPcS_ii,@function
_Z12unionTownSetPcS_ii:                 # @_Z12unionTownSetPcS_ii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%ecx, %ebx
	movl	%edx, %ebp
	movq	%rsi, %r14
	movq	%rdi, %r15
	leal	31(%rbx), %edi
	testl	%ecx, %ecx
	cmovnsl	%ecx, %edi
	sarl	$5, %edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	je	.LBB2_2
# %bb.1:
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB2_2:
	.cfi_def_cfa_offset 48
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebp, %edx
	movl	%ebx, %ecx
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z31__device_stub__unionTownSet_gpuPcS_ii # TAILCALL
.Lfunc_end2:
	.size	_Z12unionTownSetPcS_ii, .Lfunc_end2-_Z12unionTownSetPcS_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z30__device_stub__sizeTownSet_gpuPcPiiS0_ # -- Begin function _Z30__device_stub__sizeTownSet_gpuPcPiiS0_
	.type	_Z30__device_stub__sizeTownSet_gpuPcPiiS0_,@function
_Z30__device_stub__sizeTownSet_gpuPcPiiS0_: # @_Z30__device_stub__sizeTownSet_gpuPcPiiS0_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	4(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	24(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15sizeTownSet_gpuPcPiiS0_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z30__device_stub__sizeTownSet_gpuPcPiiS0_, .Lfunc_end3-_Z30__device_stub__sizeTownSet_gpuPcPiiS0_
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__totals_gpuPiS_ # -- Begin function _Z25__device_stub__totals_gpuPiS_
	.type	_Z25__device_stub__totals_gpuPiS_,@function
_Z25__device_stub__totals_gpuPiS_:      # @_Z25__device_stub__totals_gpuPiS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10totals_gpuPiS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z25__device_stub__totals_gpuPiS_, .Lfunc_end4-_Z25__device_stub__totals_gpuPiS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z11sizeTownSetPcPii            # -- Begin function _Z11sizeTownSetPcPii
	.type	_Z11sizeTownSetPcPii,@function
_Z11sizeTownSetPcPii:                   # @_Z11sizeTownSetPcPii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$16, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%edx, %r15d
	movq	%rsi, %r12
	movq	%rdi, %r13
	movabsq	$4294967328, %rbx               # imm = 0x100000020
	leal	31(%r15), %eax
	testl	%edx, %edx
	cmovnsl	%edx, %eax
	sarl	$5, %eax
	leaq	(%rax,%rbx), %r14
	addq	$-32, %r14
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_2
# %bb.1:
	movq	sizes_gpu(%rip), %rcx
	movq	%r13, %rdi
	movq	%r12, %rsi
	movl	%r15d, %edx
	callq	_Z30__device_stub__sizeTownSet_gpuPcPiiS0_
.LBB5_2:
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_4
# %bb.3:
	movq	subtotals_gpu(%rip), %rdi
	movq	sizes_gpu(%rip), %rsi
	callq	_Z25__device_stub__totals_gpuPiS_
.LBB5_4:
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_6
# %bb.5:
	movq	total_gpu(%rip), %rdi
	movq	subtotals_gpu(%rip), %rsi
	callq	_Z25__device_stub__totals_gpuPiS_
.LBB5_6:
	movq	total_gpu(%rip), %rdi
	leaq	12(%rsp), %rbx
	movl	$4, %edx
	movq	%rbx, %rsi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	(%rbx), %eax
	addq	$16, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z11sizeTownSetPcPii, .Lfunc_end5-_Z11sizeTownSetPcPii
	.cfi_endproc
                                        # -- End function
	.globl	_Z31__device_stub__countTownSet_gpuPciPi # -- Begin function _Z31__device_stub__countTownSet_gpuPciPi
	.type	_Z31__device_stub__countTownSet_gpuPciPi,@function
_Z31__device_stub__countTownSet_gpuPciPi: # @_Z31__device_stub__countTownSet_gpuPciPi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	12(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	32(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16countTownSet_gpuPciPi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z31__device_stub__countTownSet_gpuPciPi, .Lfunc_end6-_Z31__device_stub__countTownSet_gpuPciPi
	.cfi_endproc
                                        # -- End function
	.globl	_Z12countTownSetPci             # -- Begin function _Z12countTownSetPci
	.type	_Z12countTownSetPci,@function
_Z12countTownSetPci:                    # @_Z12countTownSetPci
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%esi, %r15d
	movq	%rdi, %r12
	movabsq	$4294967328, %rbx               # imm = 0x100000020
	leal	31(%r15), %eax
	testl	%esi, %esi
	cmovnsl	%esi, %eax
	sarl	$5, %eax
	leaq	(%rax,%rbx), %r14
	addq	$-32, %r14
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_2
# %bb.1:
	movq	sizes_gpu(%rip), %rdx
	movq	%r12, %rdi
	movl	%r15d, %esi
	callq	_Z31__device_stub__countTownSet_gpuPciPi
.LBB7_2:
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_4
# %bb.3:
	movq	subtotals_gpu(%rip), %rdi
	movq	sizes_gpu(%rip), %rsi
	callq	_Z25__device_stub__totals_gpuPiS_
.LBB7_4:
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_6
# %bb.5:
	movq	total_gpu(%rip), %rdi
	movq	subtotals_gpu(%rip), %rsi
	callq	_Z25__device_stub__totals_gpuPiS_
.LBB7_6:
	movq	total_gpu(%rip), %rdi
	leaq	4(%rsp), %rbx
	movl	$4, %edx
	movq	%rbx, %rsi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	(%rbx), %eax
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	_Z12countTownSetPci, .Lfunc_end7-_Z12countTownSetPci
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI8_0:
	.long	0x49742400                      # float 1.0E+6
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$104, %rsp
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %r15
	cmpl	$4, %edi
	jne	.LBB8_30
# %bb.1:
	movq	16(%r15), %rdi
	callq	atoi
	movl	%eax, %r14d
	movq	24(%r15), %rdi
	callq	atoi
	movl	%eax, %ebx
	movq	8(%r15), %rax
	movzbl	(%rax), %eax
	movl	%eax, -92(%rbp)                 # 4-byte Spill
	movl	%r14d, %r12d
	imull	%r12d, %r12d
	movq	%rsp, %rcx
	movl	%r12d, %eax
	addl	$15, %eax
	andl	$-16, %eax
	subq	%rax, %rcx
	movq	%rcx, %rsp
	testl	%r14d, %r14d
	movq	%rcx, -48(%rbp)                 # 8-byte Spill
	jle	.LBB8_2
# %bb.3:                                # %.preheader77.lr.ph
	movq	%r12, -104(%rbp)                # 8-byte Spill
	movl	%ebx, -52(%rbp)                 # 4-byte Spill
	leal	1(%r14), %eax
	movl	%eax, -68(%rbp)                 # 4-byte Spill
	movl	%r14d, %r13d
	xorl	%r15d, %r15d
	xorl	%r12d, %r12d
	movq	%r14, -112(%rbp)                # 8-byte Spill
.LBB8_4:                                # %.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB8_5 Depth 2
	movl	%r15d, %ebx
	addq	%rcx, %rbx
	xorl	%r14d, %r14d
.LBB8_5:                                #   Parent Loop BB8_4 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	cmpl	$214748365, %eax                # imm = 0xCCCCCCD
	setl	(%rbx,%r14)
	incq	%r14
	cmpq	%r14, %r13
	jne	.LBB8_5
# %bb.6:                                # %._crit_edge
                                        #   in Loop: Header=BB8_4 Depth=1
	movl	-68(%rbp), %eax                 # 4-byte Reload
	imull	%r12d, %eax
	cltq
	movq	-48(%rbp), %rcx                 # 8-byte Reload
	movb	$1, (%rcx,%rax)
	incq	%r12
	movq	-112(%rbp), %r14                # 8-byte Reload
	addl	%r14d, %r15d
	cmpq	%r13, %r12
	jne	.LBB8_4
# %bb.7:                                # %._crit_edge80
	movq	%rsp, %r15
	leaq	15(,%r13,4), %rax
	andq	$-16, %rax
	subq	%rax, %r15
	movq	%r15, %rsp
	testl	%r14d, %r14d
	jle	.LBB8_8
# %bb.18:                               # %.lr.ph84.preheader
	xorl	%r12d, %r12d
	xorl	%ebx, %ebx
.LBB8_19:                               # %.lr.ph84
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
                                        # kill: def $eax killed $eax def $rax
	leal	255(%rax), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	andl	$-256, %ecx
	subl	%ecx, %eax
	movl	%eax, (%r15,%r12,4)
	addl	%eax, %ebx
	incq	%r12
	cmpq	%r12, %r13
	jne	.LBB8_19
# %bb.9:                                # %._crit_edge85.loopexit
	movl	%ebx, %r13d
	shrl	$31, %r13d
	addl	%ebx, %r13d
	sarl	%r13d
	movl	-52(%rbp), %ebx                 # 4-byte Reload
	movq	-112(%rbp), %r14                # 8-byte Reload
	jmp	.LBB8_10
.LBB8_2:                                # %._crit_edge80.thread
	movl	%r14d, %eax
	movq	%rsp, %r15
	leaq	15(,%rax,4), %rax
	andq	$-16, %rax
	subq	%rax, %r15
	movq	%r15, %rsp
	xorl	%r13d, %r13d
	jmp	.LBB8_11
.LBB8_8:
	xorl	%r13d, %r13d
	movl	-52(%rbp), %ebx                 # 4-byte Reload
.LBB8_10:                               # %._crit_edge85
	movq	-104(%rbp), %r12                # 8-byte Reload
.LBB8_11:                               # %._crit_edge85
	leaq	-128(%rbp), %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	leaq	-88(%rbp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	leaq	-88(%rbp), %rax
	movq	(%rax), %rdi
	movq	-48(%rbp), %rsi                 # 8-byte Reload
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movslq	%r14d, %rax
	movq	%rax, -48(%rbp)                 # 8-byte Spill
	leaq	(,%rax,4), %r12
	leaq	-80(%rbp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	leaq	-80(%rbp), %rax
	movq	(%rax), %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	-64(%rbp), %rdi
	movq	-48(%rbp), %r15                 # 8-byte Reload
	movq	%r15, %rsi
	callq	hipMalloc
	movl	$sizes_gpu, %edi
	movq	%r15, %rsi
	callq	hipMalloc
	leal	31(%r14), %eax
	testl	%r14d, %r14d
	cmovnsl	%r14d, %eax
	sarl	$5, %eax
	movslq	%eax, %rsi
	movl	$subtotals_gpu, %edi
	callq	hipMalloc
	movl	$total_gpu, %edi
	movl	$1, %esi
	callq	hipMalloc
	movl	-92(%rbp), %eax                 # 4-byte Reload
	cmpl	$97, %eax
	je	.LBB8_16
# %bb.12:                               # %._crit_edge85
	cmpl	$117, %eax
	je	.LBB8_27
# %bb.13:                               # %._crit_edge85
	cmpl	$115, %eax
	jne	.LBB8_29
# %bb.14:                               # %.preheader75
	testl	%ebx, %ebx
	jle	.LBB8_29
.LBB8_15:                               # %.lr.ph87
                                        # =>This Inner Loop Header: Depth=1
	movq	-64(%rbp), %rdi
	movq	-80(%rbp), %rsi
	movl	%r14d, %edx
	callq	_Z11sizeTownSetPcPii
	decl	%ebx
	jne	.LBB8_15
	jmp	.LBB8_29
.LBB8_27:
	movq	-64(%rbp), %rdi
	movl	%r14d, %esi
	callq	_Z13createTownSetPci
	testl	%ebx, %ebx
	jle	.LBB8_29
.LBB8_28:                               # %.lr.ph90
                                        # =>This Inner Loop Header: Depth=1
	movq	-64(%rbp), %r15
	movq	-88(%rbp), %r12
	callq	rand
	cltd
	idivl	%r14d
	movq	%r15, %rdi
	movq	%r12, %rsi
	movl	%r14d, %ecx
	callq	_Z12unionTownSetPcS_ii
	decl	%ebx
	jne	.LBB8_28
	jmp	.LBB8_29
.LBB8_16:                               # %.preheader
	testl	%ebx, %ebx
	jle	.LBB8_17
# %bb.22:                               # %.lr.ph99.preheader
	xorl	%eax, %eax
	xorl	%ecx, %ecx
	movl	%ebx, -52(%rbp)                 # 4-byte Spill
.LBB8_23:                               # %.lr.ph99
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB8_25 Depth 2
	movl	%ecx, -68(%rbp)                 # 4-byte Spill
	movl	%eax, -48(%rbp)                 # 4-byte Spill
	movq	-64(%rbp), %rdi
	movl	%r14d, %esi
	callq	_Z13createTownSetPci
	movq	-64(%rbp), %rdi
	movq	-80(%rbp), %rsi
	movl	%r14d, %edx
	callq	_Z11sizeTownSetPcPii
	movl	$0, %ebx
	cmpl	%r13d, %eax
	jg	.LBB8_26
# %bb.24:                               # %.lr.ph94.preheader
                                        #   in Loop: Header=BB8_23 Depth=1
	xorl	%ebx, %ebx
.LBB8_25:                               # %.lr.ph94
                                        #   Parent Loop BB8_23 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	-64(%rbp), %r15
	movq	-88(%rbp), %r12
	callq	rand
	cltd
	idivl	%r14d
	movq	%r15, %rdi
	movq	%r12, %rsi
	movl	%r14d, %ecx
	callq	_Z12unionTownSetPcS_ii
	incl	%ebx
	movq	-64(%rbp), %rdi
	movq	-80(%rbp), %rsi
	movl	%r14d, %edx
	callq	_Z11sizeTownSetPcPii
	cmpl	%r13d, %eax
	jle	.LBB8_25
.LBB8_26:                               # %._crit_edge95
                                        #   in Loop: Header=BB8_23 Depth=1
	movl	-68(%rbp), %ecx                 # 4-byte Reload
	addl	%ebx, %ecx
	movl	-48(%rbp), %eax                 # 4-byte Reload
	incl	%eax
	movl	-52(%rbp), %ebx                 # 4-byte Reload
	cmpl	%ebx, %eax
	jne	.LBB8_23
# %bb.20:                               # %._crit_edge100.loopexit
	cvtsi2ss	%ecx, %xmm0
	jmp	.LBB8_21
.LBB8_17:
	xorps	%xmm0, %xmm0
.LBB8_21:                               # %._crit_edge100
	movss	%xmm0, -48(%rbp)                # 4-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.6, %esi
	movl	$27, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	cvtsi2ss	%ebx, %xmm0
	movss	-48(%rbp), %xmm1                # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	divss	%xmm0, %xmm1
	xorps	%xmm0, %xmm0
	cvtss2sd	%xmm1, %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.LBB8_29:                               # %.loopexit
	movl	$_ZSt4cout, %edi
	movl	$.L.str.7, %esi
	movl	$13, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	leaq	-144(%rbp), %rbx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	(%rbx), %rax
	subq	-128(%rbp), %rax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%rax, %xmm0
	movq	8(%rbx), %rax
	subq	-120(%rbp), %rax
	xorps	%xmm1, %xmm1
	cvtsi2ss	%rax, %xmm1
	divss	.LCPI8_0(%rip), %xmm1
	addss	%xmm0, %xmm1
	xorps	%xmm0, %xmm0
	cvtss2sd	%xmm1, %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	xorl	%eax, %eax
	leaq	-40(%rbp), %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa %rsp, 8
	retq
.LBB8_30:
	.cfi_def_cfa %rbp, 16
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	(%r15), %rsi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movl	$.L.str.1, %esi
	movq	%rax, %rdi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
	movl	$_ZSt4cout, %edi
	movl	$.L.str.2, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
	movl	$_ZSt4cout, %edi
	movl	$.L.str.3, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
	movl	$_ZSt4cout, %edi
	movl	$.L.str.4, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
	movl	$_ZSt4cout, %edi
	movl	$.L.str.5, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
	xorl	%edi, %edi
	callq	exit
.Lfunc_end8:
	.size	main, .Lfunc_end8-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB9_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB9_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16unionTownSet_gpuPcS_ii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15sizeTownSet_gpuPcPiiS0_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10totals_gpuPiS_, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16countTownSet_gpuPciPi, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end9:
	.size	__hip_module_ctor, .Lfunc_end9-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB10_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB10_2:
	retq
.Lfunc_end10:
	.size	__hip_module_dtor, .Lfunc_end10-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	sizes_gpu,@object               # @sizes_gpu
	.bss
	.globl	sizes_gpu
	.p2align	3, 0x0
sizes_gpu:
	.quad	0
	.size	sizes_gpu, 8

	.type	subtotals_gpu,@object           # @subtotals_gpu
	.globl	subtotals_gpu
	.p2align	3, 0x0
subtotals_gpu:
	.quad	0
	.size	subtotals_gpu, 8

	.type	total_gpu,@object               # @total_gpu
	.globl	total_gpu
	.p2align	3, 0x0
total_gpu:
	.quad	0
	.size	total_gpu, 8

	.type	_Z16unionTownSet_gpuPcS_ii,@object # @_Z16unionTownSet_gpuPcS_ii
	.section	.rodata,"a",@progbits
	.globl	_Z16unionTownSet_gpuPcS_ii
	.p2align	3, 0x0
_Z16unionTownSet_gpuPcS_ii:
	.quad	_Z31__device_stub__unionTownSet_gpuPcS_ii
	.size	_Z16unionTownSet_gpuPcS_ii, 8

	.type	_Z15sizeTownSet_gpuPcPiiS0_,@object # @_Z15sizeTownSet_gpuPcPiiS0_
	.globl	_Z15sizeTownSet_gpuPcPiiS0_
	.p2align	3, 0x0
_Z15sizeTownSet_gpuPcPiiS0_:
	.quad	_Z30__device_stub__sizeTownSet_gpuPcPiiS0_
	.size	_Z15sizeTownSet_gpuPcPiiS0_, 8

	.type	_Z10totals_gpuPiS_,@object      # @_Z10totals_gpuPiS_
	.globl	_Z10totals_gpuPiS_
	.p2align	3, 0x0
_Z10totals_gpuPiS_:
	.quad	_Z25__device_stub__totals_gpuPiS_
	.size	_Z10totals_gpuPiS_, 8

	.type	_Z16countTownSet_gpuPciPi,@object # @_Z16countTownSet_gpuPciPi
	.globl	_Z16countTownSet_gpuPciPi
	.p2align	3, 0x0
_Z16countTownSet_gpuPciPi:
	.quad	_Z31__device_stub__countTownSet_gpuPciPi
	.size	_Z16countTownSet_gpuPciPi, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Usage: "
	.size	.L.str, 8

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	" mode size reps"
	.size	.L.str.1, 16

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"  Mode is one of the following:"
	.size	.L.str.2, 32

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"    a  test full algorithm"
	.size	.L.str.3, 27

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"    u  test taking unions"
	.size	.L.str.4, 26

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"    s  test calculating sizes"
	.size	.L.str.5, 30

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Average number of rounds = "
	.size	.L.str.6, 28

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"Elapsed time "
	.size	.L.str.7, 14

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z16unionTownSet_gpuPcS_ii"
	.size	.L__unnamed_1, 27

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z15sizeTownSet_gpuPcPiiS0_"
	.size	.L__unnamed_2, 28

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z10totals_gpuPiS_"
	.size	.L__unnamed_3, 19

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z16countTownSet_gpuPciPi"
	.size	.L__unnamed_4, 26

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z31__device_stub__unionTownSet_gpuPcS_ii
	.addrsig_sym _Z30__device_stub__sizeTownSet_gpuPcPiiS0_
	.addrsig_sym _Z25__device_stub__totals_gpuPiS_
	.addrsig_sym _Z31__device_stub__countTownSet_gpuPciPi
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym sizes_gpu
	.addrsig_sym subtotals_gpu
	.addrsig_sym total_gpu
	.addrsig_sym _Z16unionTownSet_gpuPcS_ii
	.addrsig_sym _Z15sizeTownSet_gpuPcPiiS0_
	.addrsig_sym _Z10totals_gpuPiS_
	.addrsig_sym _Z16countTownSet_gpuPciPi
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z16unionTownSet_gpuPcS_ii ; -- Begin function _Z16unionTownSet_gpuPcS_ii
	.globl	_Z16unionTownSet_gpuPcS_ii
	.p2align	8
	.type	_Z16unionTownSet_gpuPcS_ii,@function
_Z16unionTownSet_gpuPcS_ii:             ; @_Z16unionTownSet_gpuPcS_ii
; %bb.0:
	s_clause 0x2
	s_load_b32 s6, s[0:1], 0x24
	s_load_b64 s[4:5], s[0:1], 0x10
	s_load_b128 s[0:3], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s6, s6, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s6, v[0:1]
	v_mad_u64_u32 v[2:3], null, s5, s4, v[1:2]
	v_ashrrev_i32_e32 v4, 31, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v0, 31, v2
	v_add_co_u32 v2, vcc_lo, s2, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v0, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v1
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v4, vcc_lo
	global_load_u8 v2, v[2:3], off
	global_load_u8 v3, v[0:1], off
	s_waitcnt vmcnt(0)
	v_add_nc_u16 v2, v3, v2
	global_store_b8 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16unionTownSet_gpuPcS_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z16unionTownSet_gpuPcS_ii, .Lfunc_end0-_Z16unionTownSet_gpuPcS_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 144
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z15sizeTownSet_gpuPcPiiS0_ ; -- Begin function _Z15sizeTownSet_gpuPcPiiS0_
	.globl	_Z15sizeTownSet_gpuPcPiiS0_
	.p2align	8
	.type	_Z15sizeTownSet_gpuPcPiiS0_,@function
_Z15sizeTownSet_gpuPcPiiS0_:            ; @_Z15sizeTownSet_gpuPcPiiS0_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b128 s[4:7], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_ashrrev_i32_e32 v2, 31, v1
	v_add_co_u32 v3, vcc_lo, s4, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v2, vcc_lo
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_mov_b32_e32 v2, 0
	global_load_u8 v3, v[3:4], off
	s_waitcnt vmcnt(0)
	v_cmpx_eq_u16_e32 1, v3
	s_cbranch_execz .LBB1_2
; %bb.1:
	v_add_co_u32 v2, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
.LBB1_2:
	s_or_b32 exec_lo, exec_lo, s2
	s_load_b64 s[0:1], s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15sizeTownSet_gpuPcPiiS0_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z15sizeTownSet_gpuPcPiiS0_, .Lfunc_end1-_Z15sizeTownSet_gpuPcPiiS0_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 172
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z10totals_gpuPiS_      ; -- Begin function _Z10totals_gpuPiS_
	.globl	_Z10totals_gpuPiS_
	.p2align	8
	.type	_Z10totals_gpuPiS_,@function
_Z10totals_gpuPiS_:                     ; @_Z10totals_gpuPiS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s5, s[0:1], 0x1c
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mov_b32 s4, s15
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s5, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s4, s5, v[0:1]
	s_cmp_lt_u32 s5, 2
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, vcc_lo, s2, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
	global_load_b32 v2, v[1:2], off
	v_lshlrev_b32_e32 v1, 2, v0
	s_waitcnt vmcnt(0)
	ds_store_b32 v1, v2
	s_waitcnt lgkmcnt(0)
	s_barrier
.LBB2_1:                                ; =>This Inner Loop Header: Depth=1
	buffer_gl0_inv
	s_cbranch_scc1 .LBB2_5
; %bb.2:                                ; %.lr.ph
                                        ;   in Loop: Header=BB2_1 Depth=1
	s_lshr_b32 s2, s5, 1
	s_mov_b32 s3, exec_lo
	v_cmpx_gt_u32_e64 s2, v0
	s_cbranch_execz .LBB2_4
; %bb.3:                                ;   in Loop: Header=BB2_1 Depth=1
	v_lshl_add_u32 v2, s2, 2, v1
	ds_load_b32 v2, v2
	ds_load_b32 v3, v1
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v2, v3, v2
	ds_store_b32 v1, v2
.LBB2_4:                                ;   in Loop: Header=BB2_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt lgkmcnt(0)
	s_barrier
	s_cmp_lt_u32 s5, 4
	s_mov_b32 s5, s2
	s_branch .LBB2_1
.LBB2_5:                                ; %._crit_edge
	s_mov_b32 s5, 0
	s_mov_b32 s2, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB2_7
; %bb.6:
	v_mov_b32_e32 v0, 0
	s_lshl_b64 s[2:3], s[4:5], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s0, s2
	s_addc_u32 s1, s1, s3
	ds_load_b32 v1, v0
	s_waitcnt lgkmcnt(0)
	global_store_b32 v0, v1, s[0:1]
.LBB2_7:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10totals_gpuPiS_
		.amdhsa_group_segment_fixed_size 128
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z10totals_gpuPiS_, .Lfunc_end2-_Z10totals_gpuPiS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 280
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 128 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z16countTownSet_gpuPciPi ; -- Begin function _Z16countTownSet_gpuPciPi
	.globl	_Z16countTownSet_gpuPciPi
	.p2align	8
	.type	_Z16countTownSet_gpuPciPi,@function
_Z16countTownSet_gpuPciPi:              ; @_Z16countTownSet_gpuPciPi
; %bb.0:
	s_clause 0x2
	s_load_b32 s4, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_ashrrev_i32_e32 v2, 31, v1
	v_add_co_u32 v3, vcc_lo, s2, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s3, v2, vcc_lo
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	global_load_u8 v3, v[3:4], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u16_e32 vcc_lo, 1, v3
	v_cndmask_b32_e64 v2, 0, 1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16countTownSet_gpuPciPi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z16countTownSet_gpuPciPi, .Lfunc_end3-_Z16countTownSet_gpuPciPi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 136
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z16unionTownSet_gpuPcS_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z16unionTownSet_gpuPcS_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15sizeTownSet_gpuPcPiiS0_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z15sizeTownSet_gpuPcPiiS0_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 128
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10totals_gpuPiS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z10totals_gpuPiS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     4
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z16countTownSet_gpuPciPi
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z16countTownSet_gpuPciPi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
