#include <cstdio>

#define ASSERT_NO_CUDA_ERROR() {                              \
  cudaThreadSynchronize();                                    \
  cudaError_t err = cudaGetLastError();                       \
  if (err != cudaSuccess) {                                   \
    printf("Cuda error (%s/%d) in file '%s' in line %i\n",    \
           cudaGetErrorString(err), err, __FILE__, __LINE__); \
    exit(1);                                                  \
  }                                                           \
} while(0);

#define TRACE() {                                             \
  trace[(lid*x*y*8)+((loop)*8)+0] = A[0][0];                  \
  trace[(lid*x*y*8)+((loop)*8)+1] = A[0][1];                  \
  trace[(lid*x*y*8)+((loop)*8)+2] = A[0][2];                  \
  trace[(lid*x*y*8)+((loop)*8)+3] = A[0][3];                  \
  trace[(lid*x*y*8)+((loop)*8)+4] = A[1][0];                  \
  trace[(lid*x*y*8)+((loop)*8)+5] = A[1][1];                  \
  trace[(lid*x*y*8)+((loop)*8)+6] = A[1][2];                  \
  trace[(lid*x*y*8)+((loop)*8)+7] = A[1][3];                  \
  loop++;                                                     \
} while(0);

//set x and y through xyvals
__global__ void k2(int *xyvals, int *trace, int*final) {
  __shared__ int A[2][4];
  int buf, x, y, i, j;
  int lid = threadIdx.x;

  //initialize A
  if (lid == 0) {
    A[0][0] =  0; A[0][1] =  1; A[0][2] =  2; A[0][3] =  3;
    A[1][0] = -1; A[1][1] = -1; A[1][2] = -1; A[1][3] = -1;
  }
  __syncthreads();

  x = (lid == 0 ? xyvals[0] : xyvals[1]);
  y = (lid == 0 ? xyvals[1] : xyvals[0]);
  buf = i = 0;
  int loop = 0;
  while (i < x) {
    j = 0;
    while (j < y) {
      __syncthreads();
      TRACE();
      A[1-buf][lid] = A[buf][(lid+1)%4];
      buf = 1 - buf;
      j++;
    }
    i++;
  }

  __syncthreads();
  if (lid == 0) {
    final[0] = A[0][0]; final[1] = A[0][1];
    final[2] = A[0][2]; final[3] = A[0][3];
    final[4] = A[1][0]; final[5] = A[1][1];
    final[6] = A[1][2]; final[7] = A[1][3];
  }
}

#define GROUPSIZE 4

int main(int argc, char **argv) {

  // thread0 runs outer xyvals[0] times
  //              inner xyvals[1] times
  // other threads do opposite
  int xyvals[2];
  if (argc == 3) {
    xyvals[0] = atoi(argv[1]);
    xyvals[1] = atoi(argv[2]);
  } else {
    xyvals[0] = 4;
    xyvals[1] = 1;
  }
  int *d_xyvals;
  size_t d_xyvals_size = sizeof(int)*2;
  cudaMalloc((void **)&d_xyvals, d_xyvals_size);
  cudaMemcpy(d_xyvals, xyvals, d_xyvals_size, cudaMemcpyHostToDevice);

  // trace shared array A[] after each __syncthreads, for each thread
  // number of trace items :=
  //   8 values in A[]
  //   __syncthreads() hit (xyvals[0]*xyvals[1]) times
  //   by GROUPSIZE threads
  int ntrace = 8 * (xyvals[0]*xyvals[1]) * GROUPSIZE;
  int *trace = new int[ntrace];
  for (int i=0; i<ntrace; i++) {
    trace[i] = 99;
  }
  int *d_trace;
  size_t d_trace_size = sizeof(int)*ntrace;
  cudaMalloc((void **)&d_trace, d_trace_size);
  cudaMemcpy(d_trace, trace, d_trace_size, cudaMemcpyHostToDevice);

  // also record the final state of A
  int final[8];
  for (int i=0; i<8; i++) {
    final[i] = 99;
  }
  int *d_final;
  size_t d_final_size = sizeof(int)*8;
  cudaMalloc((void **)&d_final, d_final_size);
  cudaMemcpy(d_final, final, d_final_size, cudaMemcpyHostToDevice);

  // run kernel
  printf("Set x and y through xyvals[%d,%d]...", xyvals[0], xyvals[1]);
  ASSERT_NO_CUDA_ERROR();
  k2<<</*gridDim=*/1, GROUPSIZE>>>(d_xyvals, d_trace, d_final);
  ASSERT_NO_CUDA_ERROR();
  printf("[done]\n");

  // print out trace
  cudaMemcpy(trace, d_trace, d_trace_size, cudaMemcpyDeviceToHost);
  int stride = 8 * (xyvals[0]*xyvals[1]);
  for (int lid=0; lid<GROUPSIZE; lid++) {
    printf("lid = %d\n", lid);
    for (int xy=0; xy<(xyvals[0]*xyvals[1]); xy++) {
      printf("(%d) A = {{%d,%d,%d,%d}, {%d,%d,%d,%d}}\n",
        xy,
        trace[(lid*stride)+(xy*8)+0], trace[(lid*stride)+(xy*8)+1],
        trace[(lid*stride)+(xy*8)+2], trace[(lid*stride)+(xy*8)+3],
        trace[(lid*stride)+(xy*8)+4], trace[(lid*stride)+(xy*8)+5],
        trace[(lid*stride)+(xy*8)+6], trace[(lid*stride)+(xy*8)+7]
      );
    }
    printf("---\n");
  }

  // print out final state
  cudaMemcpy(final, d_final, d_final_size, cudaMemcpyDeviceToHost);
  printf("final state\n");
  printf("    A = {{%d,%d,%d,%d}, {%d,%d,%d,%d}}\n",
    final[0],final[1],final[2],final[3],
    final[4],final[5],final[6],final[7]);

  cudaFree(d_xyvals);
  cudaFree(d_trace);
  cudaFree(d_final);
  delete[] trace;
  return 0;

}


	.file	"tmpxft_002c8bc3_00000000-6_nested.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z25__device_stub__Z2k2PiS_S_PiS_S_
	.type	_Z25__device_stub__Z2k2PiS_S_PiS_S_, @function
_Z25__device_stub__Z2k2PiS_S_PiS_S_:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z2k2PiS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L2:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z25__device_stub__Z2k2PiS_S_PiS_S_, .-_Z25__device_stub__Z2k2PiS_S_PiS_S_
	.globl	_Z2k2PiS_S_
	.type	_Z2k2PiS_S_, @function
_Z2k2PiS_S_:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z25__device_stub__Z2k2PiS_S_PiS_S_
	.cfi_endproc
.LFE2053:
	.size	_Z2k2PiS_S_, .-_Z2k2PiS_S_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Set x and y through xyvals[%d,%d]..."
.LC1:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/nchong/litmus/master/tests/nested/cuda/nested.cu"
.LC2:
	.string	"Cuda error (%s/%d) in file '%s' in line %i\n"
.LC3:
	.string	"[done]\n"
.LC4:
	.string	"lid = %d\n"
.LC5:
	.string	"(%d) A = {{%d,%d,%d,%d}, {%d,%d,%d,%d}}\n"
.LC6:
	.string	"---\n"
.LC7:
	.string	"final state\n"
.LC8:
	.string	"    A = {{%d,%d,%d,%d}, {%d,%d,%d,%d}}\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	cmpl	$3, %edi
	jne	.L9
	movq	8(%rsi), %rdi
	movq	%rsi, %rbx
	call	atoi@PLT
	movq	16(%rbx), %rdi
	movl	%eax, 64(%rsp)
	call	atoi@PLT
	jmp	.L10
.L9:
	movl	$4, 64(%rsp)
	movl	$1, %eax
.L10:
	leaq	16(%rsp), %rdi
	movl	$8, %esi
	movl	%eax, 68(%rsp)
	call	cudaMalloc@PLT
	movq	16(%rsp), %rdi
	leaq	64(%rsp), %rsi
	movl	$1, %ecx
	movl	$8, %edx
	call	cudaMemcpy@PLT
	movl	64(%rsp), %ebx
	imull	68(%rsp), %ebx
	movabsq	$2305843009213693950, %rax
	sall	$5, %ebx
	movslq	%ebx, %r12
	cmpq	%r12, %rax
	jb	.L11
	salq	$2, %r12
	movq	%r12, %rdi
	call	_Znam@PLT
	movq	%rax, %rbp
	xorl	%eax, %eax
	jmp	.L12
.L11:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L24
	call	__cxa_throw_bad_array_new_length@PLT
.L12:
	cmpl	%eax, %ebx
	jle	.L26
	movl	$99, 0(%rbp,%rax,4)
	incq	%rax
	jmp	.L12
.L26:
	leaq	24(%rsp), %rdi
	movq	%r12, %rsi
	call	cudaMalloc@PLT
	movq	24(%rsp), %rdi
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	leaq	32(%rsp), %rdi
	movl	$32, %esi
	movabsq	$425201762403, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 80(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rax, 96(%rsp)
	call	cudaMalloc@PLT
	leaq	72(%rsp), %rax
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movl	$32, %edx
	movq	%rax, %rsi
	movq	%rax, 8(%rsp)
	call	cudaMemcpy@PLT
	movl	68(%rsp), %ecx
	movl	64(%rsp), %edx
	xorl	%eax, %eax
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	call	cudaThreadSynchronize@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L15
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	movl	$110, %r9d
	movq	%rax, %rdx
	jmp	.L25
.L15:
	movl	$1073741825, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	salq	$2, %rdx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	movq	32(%rsp), %rdx
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	call	_Z25__device_stub__Z2k2PiS_S_PiS_S_
.L16:
	call	cudaThreadSynchronize@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L17
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	movl	$112, %r9d
	movq	%rax, %rdx
.L25:
	movl	$2, %edi
	leaq	.LC1(%rip), %r8
	movl	%ebx, %ecx
	xorl	%eax, %eax
	leaq	.LC2(%rip), %rsi
	call	__printf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L17:
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	24(%rsp), %rsi
	movq	%r12, %rdx
	movq	%rbp, %rdi
	movl	$2, %ecx
	xorl	%r12d, %r12d
	call	cudaMemcpy@PLT
	movl	64(%rsp), %r13d
	imull	68(%rsp), %r13d
.L20:
	movl	%r12d, %edx
	leaq	.LC4(%rip), %rsi
	xorl	%eax, %eax
	xorl	%r14d, %r14d
	movl	$2, %edi
	call	__printf_chk@PLT
	leal	0(,%rbx,8), %eax
	cltq
	leaq	0(%rbp,%rax,4), %r15
.L18:
	movl	64(%rsp), %eax
	imull	68(%rsp), %eax
	cmpl	%r14d, %eax
	jle	.L27
	pushq	%rax
	.cfi_def_cfa_offset 184
	movl	28(%r15), %eax
	movl	%r14d, %edx
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	incl	%r14d
	addq	$32, %r15
	pushq	%rax
	.cfi_def_cfa_offset 192
	movl	-8(%r15), %eax
	pushq	%rax
	.cfi_def_cfa_offset 200
	movl	-12(%r15), %eax
	pushq	%rax
	.cfi_def_cfa_offset 208
	movl	-16(%r15), %eax
	pushq	%rax
	.cfi_def_cfa_offset 216
	movl	-20(%r15), %eax
	pushq	%rax
	.cfi_def_cfa_offset 224
	movl	-24(%r15), %r9d
	xorl	%eax, %eax
	movl	-28(%r15), %r8d
	movl	-32(%r15), %ecx
	call	__printf_chk@PLT
	addq	$48, %rsp
	.cfi_def_cfa_offset 176
	jmp	.L18
.L27:
	leaq	.LC6(%rip), %rsi
	xorl	%eax, %eax
	incl	%r12d
	addl	%r13d, %ebx
	movl	$2, %edi
	call	__printf_chk@PLT
	cmpl	$4, %r12d
	jne	.L20
	movq	32(%rsp), %rsi
	movq	8(%rsp), %rdi
	movl	$2, %ecx
	movl	$32, %edx
	call	cudaMemcpy@PLT
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	100(%rsp), %eax
	movl	$2, %edi
	leaq	.LC8(%rip), %rsi
	pushq	%rax
	.cfi_def_cfa_offset 184
	movl	104(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 192
	movl	108(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 200
	movl	112(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 208
	movl	116(%rsp), %r9d
	xorl	%eax, %eax
	movl	112(%rsp), %r8d
	movl	108(%rsp), %ecx
	movl	104(%rsp), %edx
	call	__printf_chk@PLT
	movq	48(%rsp), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 176
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	%rbp, %rdi
	call	_ZdaPv@PLT
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L21
.L24:
	call	__stack_chk_fail@PLT
.L21:
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC9:
	.string	"_Z2k2PiS_S_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC9(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z2k2PiS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <cstdio>

#define ASSERT_NO_CUDA_ERROR() {                              \
  hipDeviceSynchronize();                                    \
  hipError_t err = hipGetLastError();                       \
  if (err != hipSuccess) {                                   \
    printf("Cuda error (%s/%d) in file '%s' in line %i\n",    \
           hipGetErrorString(err), err, __FILE__, __LINE__); \
    exit(1);                                                  \
  }                                                           \
} while(0);

#define TRACE() {                                             \
  trace[(lid*x*y*8)+((loop)*8)+0] = A[0][0];                  \
  trace[(lid*x*y*8)+((loop)*8)+1] = A[0][1];                  \
  trace[(lid*x*y*8)+((loop)*8)+2] = A[0][2];                  \
  trace[(lid*x*y*8)+((loop)*8)+3] = A[0][3];                  \
  trace[(lid*x*y*8)+((loop)*8)+4] = A[1][0];                  \
  trace[(lid*x*y*8)+((loop)*8)+5] = A[1][1];                  \
  trace[(lid*x*y*8)+((loop)*8)+6] = A[1][2];                  \
  trace[(lid*x*y*8)+((loop)*8)+7] = A[1][3];                  \
  loop++;                                                     \
} while(0);

//set x and y through xyvals
__global__ void k2(int *xyvals, int *trace, int*final) {
  __shared__ int A[2][4];
  int buf, x, y, i, j;
  int lid = threadIdx.x;

  //initialize A
  if (lid == 0) {
    A[0][0] =  0; A[0][1] =  1; A[0][2] =  2; A[0][3] =  3;
    A[1][0] = -1; A[1][1] = -1; A[1][2] = -1; A[1][3] = -1;
  }
  __syncthreads();

  x = (lid == 0 ? xyvals[0] : xyvals[1]);
  y = (lid == 0 ? xyvals[1] : xyvals[0]);
  buf = i = 0;
  int loop = 0;
  while (i < x) {
    j = 0;
    while (j < y) {
      __syncthreads();
      TRACE();
      A[1-buf][lid] = A[buf][(lid+1)%4];
      buf = 1 - buf;
      j++;
    }
    i++;
  }

  __syncthreads();
  if (lid == 0) {
    final[0] = A[0][0]; final[1] = A[0][1];
    final[2] = A[0][2]; final[3] = A[0][3];
    final[4] = A[1][0]; final[5] = A[1][1];
    final[6] = A[1][2]; final[7] = A[1][3];
  }
}

#define GROUPSIZE 4

int main(int argc, char **argv) {

  // thread0 runs outer xyvals[0] times
  //              inner xyvals[1] times
  // other threads do opposite
  int xyvals[2];
  if (argc == 3) {
    xyvals[0] = atoi(argv[1]);
    xyvals[1] = atoi(argv[2]);
  } else {
    xyvals[0] = 4;
    xyvals[1] = 1;
  }
  int *d_xyvals;
  size_t d_xyvals_size = sizeof(int)*2;
  hipMalloc((void **)&d_xyvals, d_xyvals_size);
  hipMemcpy(d_xyvals, xyvals, d_xyvals_size, hipMemcpyHostToDevice);

  // trace shared array A[] after each __syncthreads, for each thread
  // number of trace items :=
  //   8 values in A[]
  //   __syncthreads() hit (xyvals[0]*xyvals[1]) times
  //   by GROUPSIZE threads
  int ntrace = 8 * (xyvals[0]*xyvals[1]) * GROUPSIZE;
  int *trace = new int[ntrace];
  for (int i=0; i<ntrace; i++) {
    trace[i] = 99;
  }
  int *d_trace;
  size_t d_trace_size = sizeof(int)*ntrace;
  hipMalloc((void **)&d_trace, d_trace_size);
  hipMemcpy(d_trace, trace, d_trace_size, hipMemcpyHostToDevice);

  // also record the final state of A
  int final[8];
  for (int i=0; i<8; i++) {
    final[i] = 99;
  }
  int *d_final;
  size_t d_final_size = sizeof(int)*8;
  hipMalloc((void **)&d_final, d_final_size);
  hipMemcpy(d_final, final, d_final_size, hipMemcpyHostToDevice);

  // run kernel
  printf("Set x and y through xyvals[%d,%d]...", xyvals[0], xyvals[1]);
  ASSERT_NO_CUDA_ERROR();
  k2<<</*gridDim=*/1, GROUPSIZE>>>(d_xyvals, d_trace, d_final);
  ASSERT_NO_CUDA_ERROR();
  printf("[done]\n");

  // print out trace
  hipMemcpy(trace, d_trace, d_trace_size, hipMemcpyDeviceToHost);
  int stride = 8 * (xyvals[0]*xyvals[1]);
  for (int lid=0; lid<GROUPSIZE; lid++) {
    printf("lid = %d\n", lid);
    for (int xy=0; xy<(xyvals[0]*xyvals[1]); xy++) {
      printf("(%d) A = {{%d,%d,%d,%d}, {%d,%d,%d,%d}}\n",
        xy,
        trace[(lid*stride)+(xy*8)+0], trace[(lid*stride)+(xy*8)+1],
        trace[(lid*stride)+(xy*8)+2], trace[(lid*stride)+(xy*8)+3],
        trace[(lid*stride)+(xy*8)+4], trace[(lid*stride)+(xy*8)+5],
        trace[(lid*stride)+(xy*8)+6], trace[(lid*stride)+(xy*8)+7]
      );
    }
    printf("---\n");
  }

  // print out final state
  hipMemcpy(final, d_final, d_final_size, hipMemcpyDeviceToHost);
  printf("final state\n");
  printf("    A = {{%d,%d,%d,%d}, {%d,%d,%d,%d}}\n",
    final[0],final[1],final[2],final[3],
    final[4],final[5],final[6],final[7]);

  hipFree(d_xyvals);
  hipFree(d_trace);
  hipFree(d_final);
  delete[] trace;
  return 0;

}


	.text
	.file	"nested.hip"
	.globl	_Z17__device_stub__k2PiS_S_     # -- Begin function _Z17__device_stub__k2PiS_S_
	.type	_Z17__device_stub__k2PiS_S_,@function
_Z17__device_stub__k2PiS_S_:            # @_Z17__device_stub__k2PiS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z2k2PiS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z17__device_stub__k2PiS_S_, .Lfunc_end0-_Z17__device_stub__k2PiS_S_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	cmpl	$3, %edi
	jne	.LBB1_1
# %bb.2:
	movq	%rsi, %r14
	movq	8(%rsi), %rdi
	callq	atoi
	movl	%eax, %ebx
	movq	16(%r14), %rdi
	callq	atoi
	jmp	.LBB1_3
.LBB1_1:
	movl	$1, %eax
	movl	$4, %ebx
.LBB1_3:
	movq	%rsp, %r14
	movl	%ebx, (%r14)
	movl	%eax, 4(%r14)
	leaq	24(%rsp), %rbx
	movl	$8, %esi
	movq	%rbx, %rdi
	callq	hipMalloc
	movq	(%rbx), %rdi
	movl	$1, %r15d
	movl	$8, %edx
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	4(%r14), %r12d
	imull	(%r14), %r12d
	movl	%r12d, %ebp
	shll	$5, %ebp
	movslq	%ebp, %r14
	shlq	$2, %r14
	testl	%r12d, %r12d
	movq	$-1, %rdi
	cmovnsq	%r14, %rdi
	callq	_Znam
	movq	%rax, %rbx
	testl	%r12d, %r12d
	jle	.LBB1_6
# %bb.4:                                # %.lr.ph.preheader
	cmpl	$2, %ebp
	cmovgel	%ebp, %r15d
	xorl	%eax, %eax
.LBB1_5:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	$99, (%rbx,%rax,4)
	incq	%rax
	cmpq	%rax, %r15
	jne	.LBB1_5
.LBB1_6:                                # %._crit_edge
	leaq	16(%rsp), %r15
	movq	%r15, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movq	(%r15), %rdi
	movq	%rbx, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	xorl	%eax, %eax
.LBB1_7:                                # =>This Inner Loop Header: Depth=1
	movl	$99, 48(%rsp,%rax,4)
	incq	%rax
	cmpq	$8, %rax
	jne	.LBB1_7
# %bb.8:
	leaq	8(%rsp), %r15
	movl	$32, %esi
	movq	%r15, %rdi
	callq	hipMalloc
	movq	(%r15), %rdi
	leaq	48(%rsp), %rsi
	movl	$32, %edx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	(%rsp), %esi
	movl	4(%rsp), %edx
	movl	$.L.str, %edi
	xorl	%eax, %eax
	callq	printf
	callq	hipDeviceSynchronize
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB1_9
# %bb.11:
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	leaq	3(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_13
# %bb.12:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	callq	_Z17__device_stub__k2PiS_S_
.LBB1_13:
	callq	hipDeviceSynchronize
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB1_14
# %bb.15:
	movl	$.Lstr, %edi
	callq	puts@PLT
	movq	16(%rsp), %rsi
	movq	%rbx, %rdi
	movq	%r14, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movl	(%rsp), %eax
	imull	4(%rsp), %eax
	shll	$3, %eax
	cltq
	movq	%rbx, 32(%rsp)                  # 8-byte Spill
	movq	%rbx, %r13
	addq	$28, %r13
	shlq	$2, %rax
	movq	%rax, 40(%rsp)                  # 8-byte Spill
	xorl	%r14d, %r14d
.LBB1_16:                               # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_18 Depth 2
	movl	$.L.str.4, %edi
	movl	%r14d, %esi
	xorl	%eax, %eax
	callq	printf
	movl	4(%rsp), %eax
	imull	(%rsp), %eax
	testl	%eax, %eax
	jle	.LBB1_19
# %bb.17:                               # %.lr.ph86
                                        #   in Loop: Header=BB1_16 Depth=1
	movq	%r13, %rbp
	xorl	%r15d, %r15d
.LBB1_18:                               #   Parent Loop BB1_16 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	-28(%rbp), %edx
	movl	-24(%rbp), %ecx
	movl	-20(%rbp), %r8d
	movl	-16(%rbp), %r9d
	movl	-12(%rbp), %r10d
	movl	-8(%rbp), %r11d
	movl	-4(%rbp), %ebx
	movl	(%rbp), %r12d
	movl	$.L.str.5, %edi
	movl	%r15d, %esi
	xorl	%eax, %eax
	pushq	%r12
	.cfi_adjust_cfa_offset 8
	pushq	%rbx
	.cfi_adjust_cfa_offset 8
	pushq	%r11
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	callq	printf
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	incq	%r15
	movslq	(%rsp), %rax
	movslq	4(%rsp), %rcx
	imulq	%rax, %rcx
	addq	$32, %rbp
	cmpq	%rcx, %r15
	jl	.LBB1_18
.LBB1_19:                               # %._crit_edge87
                                        #   in Loop: Header=BB1_16 Depth=1
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	incq	%r14
	addq	40(%rsp), %r13                  # 8-byte Folded Reload
	cmpq	$4, %r14
	jne	.LBB1_16
# %bb.20:
	movq	8(%rsp), %rsi
	leaq	48(%rsp), %r14
	movl	$32, %edx
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	movl	(%r14), %esi
	movl	4(%r14), %edx
	movl	8(%r14), %ecx
	movl	12(%r14), %r8d
	movl	16(%r14), %r9d
	movl	20(%r14), %r10d
	movl	24(%r14), %r11d
	movl	28(%r14), %r14d
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movl	$.L.str.8, %edi
	xorl	%eax, %eax
	pushq	%r14
	.cfi_adjust_cfa_offset 8
	pushq	%r11
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	callq	printf
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi                  # 8-byte Reload
	callq	_ZdaPv
	xorl	%eax, %eax
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB1_9:
	.cfi_def_cfa_offset 144
	movl	%eax, %ebp
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %ecx
	movq	%rax, %rsi
	movl	%ebp, %edx
	movl	$112, %r8d
	jmp	.LBB1_10
.LBB1_14:
	movl	%eax, %ebp
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %ecx
	movq	%rax, %rsi
	movl	%ebp, %edx
	movl	$114, %r8d
.LBB1_10:
	xorl	%eax, %eax
	callq	printf
	movl	$1, %edi
	callq	exit
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z2k2PiS_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z2k2PiS_S_,@object             # @_Z2k2PiS_S_
	.section	.rodata,"a",@progbits
	.globl	_Z2k2PiS_S_
	.p2align	3, 0x0
_Z2k2PiS_S_:
	.quad	_Z17__device_stub__k2PiS_S_
	.size	_Z2k2PiS_S_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Set x and y through xyvals[%d,%d]..."
	.size	.L.str, 37

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Cuda error (%s/%d) in file '%s' in line %i\n"
	.size	.L.str.1, 44

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/nchong/litmus/master/tests/nested/cuda/nested.hip"
	.size	.L.str.2, 112

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"lid = %d\n"
	.size	.L.str.4, 10

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"(%d) A = {{%d,%d,%d,%d}, {%d,%d,%d,%d}}\n"
	.size	.L.str.5, 41

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"    A = {{%d,%d,%d,%d}, {%d,%d,%d,%d}}\n"
	.size	.L.str.8, 40

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z2k2PiS_S_"
	.size	.L__unnamed_1, 12

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"[done]"
	.size	.Lstr, 7

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"final state"
	.size	.Lstr.1, 12

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"---"
	.size	.Lstr.2, 4

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z17__device_stub__k2PiS_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z2k2PiS_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z2k2PiS_S_             ; -- Begin function _Z2k2PiS_S_
	.globl	_Z2k2PiS_S_
	.p2align	8
	.type	_Z2k2PiS_S_,@function
_Z2k2PiS_S_:                            ; @_Z2k2PiS_S_
; %bb.0:
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB0_2
; %bb.1:
	v_dual_mov_b32 v1, -1 :: v_dual_mov_b32 v6, 1
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v8, 3
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_mov_b32 v7, 2 :: v_dual_mov_b32 v2, v1
	v_mov_b32_e32 v3, v1
	v_mov_b32_e32 v4, v1
	ds_store_b128 v5, v[5:8]
	ds_store_b128 v5, v[1:4] offset:16
.LBB0_2:
	s_or_b32 exec_lo, exec_lo, s2
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[8:9], s[0:1], 0x10
	v_cndmask_b32_e64 v1, 4, 0, vcc_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_mov_b32 s3, exec_lo
	v_add_co_u32 v1, s0, s4, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v2, null, s5, 0, s0
	global_load_b32 v2, v[1:2], off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e32 0, v2
	s_cbranch_execz .LBB0_9
; %bb.3:                                ; %.preheader.lr.ph
	v_cndmask_b32_e64 v1, 0, 4, vcc_lo
	v_add_nc_u32_e32 v7, 1, v0
	v_dual_mov_b32 v5, 0 :: v_dual_lshlrev_b32 v6, 2, v0
	v_mov_b32_e32 v10, 0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v3, s0, s4, v1
	v_add_co_ci_u32_e64 v4, null, s5, 0, s0
	v_mul_lo_u32 v1, v0, v2
	s_mov_b32 s4, 0
	s_mov_b32 s5, 0
	global_load_b32 v3, v[3:4], off
	v_dual_mov_b32 v4, 0 :: v_dual_and_b32 v7, 3, v7
	s_waitcnt vmcnt(0)
	v_mul_lo_u32 v1, v1, v3
	v_max_i32_e32 v8, 0, v3
	v_cmp_lt_i32_e64 s0, 0, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_lshlrev_b32_e32 v8, 3, v8
	v_lshlrev_b32_e32 v9, 3, v1
.LBB0_4:                                ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_6 Depth 2
	s_delay_alu instid0(VALU_DEP_3)
	s_and_saveexec_b32 s10, s0
	s_cbranch_execz .LBB0_8
; %bb.5:                                ; %.lr.ph.preheader
                                        ;   in Loop: Header=BB0_4 Depth=1
	v_add_nc_u32_e32 v4, v3, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_mov_b32 v0, v9 :: v_dual_mov_b32 v11, v3
	s_mov_b32 s11, 0
.LBB0_6:                                ; %.lr.ph
                                        ;   Parent Loop BB0_4 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_lshlrev_b32_e32 v22, 4, v10
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_add_nc_u32_e32 v11, -1, v11
	v_lshl_or_b32 v1, v7, 2, v22
	v_sub_nc_u32_e32 v10, 1, v10
	ds_load_b128 v[12:15], v5
	ds_load_b128 v[16:19], v5 offset:16
	ds_load_b32 v23, v1
	v_ashrrev_i32_e32 v1, 31, v0
	v_cmp_eq_u32_e64 s1, 0, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[20:21], 2, v[0:1]
	v_sub_nc_u32_e32 v1, v6, v22
	v_add_nc_u32_e32 v0, 8, v0
	s_or_b32 s11, s1, s11
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v20, s2, s6, v20
	v_add_co_ci_u32_e64 v21, s2, s7, v21, s2
	s_waitcnt lgkmcnt(2)
	global_store_b128 v[20:21], v[12:15], off
	s_waitcnt lgkmcnt(1)
	global_store_b128 v[20:21], v[16:19], off offset:16
	s_waitcnt lgkmcnt(0)
	ds_store_b32 v1, v23 offset:16
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB0_6
; %bb.7:                                ; %Flow
                                        ;   in Loop: Header=BB0_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s11
.LBB0_8:                                ; %Flow102
                                        ;   in Loop: Header=BB0_4 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s10
	s_add_i32 s5, s5, 1
	v_add_nc_u32_e32 v9, v9, v8
	v_cmp_eq_u32_e64 s1, s5, v2
	s_or_b32 s4, s1, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s4
	s_cbranch_execnz .LBB0_4
.LBB0_9:                                ; %Flow104
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB0_11
; %bb.10:
	v_mov_b32_e32 v8, 0
	ds_load_b128 v[0:3], v8
	ds_load_b128 v[4:7], v8 offset:16
	s_waitcnt lgkmcnt(1)
	global_store_b128 v8, v[0:3], s[8:9]
	s_waitcnt lgkmcnt(0)
	global_store_b128 v8, v[4:7], s[8:9] offset:16
.LBB0_11:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z2k2PiS_S_
		.amdhsa_group_segment_fixed_size 32
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 24
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 24
		.amdhsa_next_free_sgpr 12
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z2k2PiS_S_, .Lfunc_end0-_Z2k2PiS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 596
; NumSgprs: 14
; NumVgprs: 24
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 32 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 14
; NumVGPRsForWavesPerEU: 24
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 32
    .kernarg_segment_align: 8
    .kernarg_segment_size: 24
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z2k2PiS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     14
    .sgpr_spill_count: 0
    .symbol:         _Z2k2PiS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     24
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
