/*
 *  file name: matrix.cu
 *
 *  CPE810A: Homework 1, matrix * matrix by using shared memory
 *  
 *  Yupeng Cao, 10454637
 *  
 */

#include <stdio.h>
#include <stdlib.h>
#include <assert.h>

#define BLOCK_SIZE 16
#define TILE_SIZE 16


/*
*********************************************************************
function name: gpu_matrix_mult

parameters: 
            &a GPU device pointer to a m X n matrix (A)
            &b GPU device pointer to a n X k matrix (B)
            &c GPU device output purpose pointer to a m X k matrix (C) 
            to store the result

*********************************************************************
*/
__global__ void gpu_matrix_mult(float *a, float *b, float *c, int m, int n, int k)
{ 
    int row = blockIdx.y * blockDim.y + threadIdx.y; 
    int col = blockIdx.x * blockDim.x + threadIdx.x;
    float sum = 0;
    if( col < k && row < m) 
    {
        for(int i = 0; i < n; i++) 
        {
            sum += a[row * n + i] * b[i * k + col];
        }
        c[row * k + col] = sum;
    }
} 

/*
*********************************************************************
function name: shared_matrix_mult

parameters: 
            &a GPU device pointer to a m X n matrix (A)
            &b GPU device pointer to a n X k matrix (B)
            &c GPU device output purpose pointer to a m X k matrix (C) 
            to store the result

Using Shared Memory

*********************************************************************
*/
__global__ void shared_matrix_mult(float* A, float* B, float* C, int m, int n, int k)
{
    __shared__ float As[TILE_SIZE][TILE_SIZE];
    __shared__ float Bs[TILE_SIZE][TILE_SIZE];

    int row = blockIdx.y * blockDim.y + threadIdx.y;
    int col = blockIdx.x * blockDim.x + threadIdx.x;
    float CValue = 0.0;

    for (int t = 0; t * TILE_SIZE < n; ++t) 
    {
        if (row < m && t * TILE_SIZE + threadIdx.x < n)
            As[threadIdx.y][threadIdx.x] = A[row * n + t * TILE_SIZE + threadIdx.x];
        else
            As[threadIdx.y][threadIdx.x] = 0;

        if (col < k && t * TILE_SIZE + threadIdx.y < n)
            Bs[threadIdx.y][threadIdx.x] = B[(t * TILE_SIZE + threadIdx.y) * k + col];
        else
            Bs[threadIdx.y][threadIdx.x] = 0;
        __syncthreads();

        for (int i = 0; i < TILE_SIZE; ++i) 
        {
            CValue += As[threadIdx.y][i] * Bs[i][threadIdx.x];
        }
        __syncthreads();
    }

    if (row < m && col < k)
        C[row * k + col] = CValue;
}


/*
*********************************************************************
function name: cpu_matrix_mult

description: dot product of two matrix in CPU, 
             for validating GPU results

*********************************************************************
*/
void cpu_matrix_mult(float *h_a, float *h_b, float *h_result, int m, int n, int k) {
    for (int i = 0; i < m; ++i) 
    {
        for (int j = 0; j < k; ++j) 
        {
            float tmp = 0.0;
            for (int h = 0; h < n; ++h) 
            {
                tmp += h_a[i * n + h] * h_b[h * k + j];
            }
            h_result[i * k + j] = tmp;
        }
    }
}

/*
*********************************************************************
function name: printMatrix

description: Print calculation results
             for visualize GPU results

Note:  if the matrix size larger than 10,
       this function will not execute

*********************************************************************
*/
void printMatrix(float* result_matrix, int row, int col) {
    if (row > 10 || col > 10) return;
    printf("\n");
    for (int i = 0; i < row; i++) {
        for (int j = 0; j < col; j++) {
            printf("%f\t", result_matrix[i*col + j]);
        }
        printf("\n");
    }
    return;
}

/*
*********************************************************************
function name: main

description: test and compare

*********************************************************************
*/
int main(int argc, char *argv[])
{   

    // input check
    if ( argc != 4)
    {
        printf("Error input Parameter \n");
        printf("Please input matrix size \n");
        printf("Matrix A: m by n; Matrix B: n by k \n");
        return 0;
    }

    /* 
        Matrix A: m * n
        Matrix B: n * k
    */
    int m = atoi(argv[1]);
    int n = atoi(argv[2]);
    int k = atoi(argv[3]);
    srand(1000);
    //printf("please type in m n and k\n");
    //scanf("%d %d %d", &m, &n, &k);

    // allocate memory in host, h_cc is used to store CPU result
    float *h_a, *h_b, *h_c, *h_cc;
    cudaMallocHost((void **) &h_a, sizeof(int)*m*n);
    cudaMallocHost((void **) &h_b, sizeof(int)*n*k);
    cudaMallocHost((void **) &h_c, sizeof(int)*m*k);
    cudaMallocHost((void **) &h_cc, sizeof(int)*m*k);

    // random initialize matrix A
    for (int i = 0; i < m; ++i) {
        for (int j = 0; j < n; ++j) {
            h_a[i * n + j] = rand() % 1024;
        }
    }

    // random initialize matrix B
    for (int i = 0; i < n; ++i) {
        for (int j = 0; j < k; ++j) {
            h_b[i * k + j] = rand() % 1024;
        }
    }

    // Allocate memory space on the device 
    float *d_a, *d_b, *d_c;
    cudaMalloc((void **) &d_a, sizeof(int)*m*n);
    cudaMalloc((void **) &d_b, sizeof(int)*n*k);
    cudaMalloc((void **) &d_c, sizeof(int)*m*k);

    // copy matrix A and B from host to device memory
    cudaMemcpy(d_a, h_a, sizeof(int)*m*n, cudaMemcpyHostToDevice);
    cudaMemcpy(d_b, h_b, sizeof(int)*n*k, cudaMemcpyHostToDevice);

    // assign Grid and Block size
    unsigned int grid_rows = (m + BLOCK_SIZE - 1) / BLOCK_SIZE;
    unsigned int grid_cols = (k + BLOCK_SIZE - 1) / BLOCK_SIZE;
    dim3 dimGrid(grid_cols, grid_rows);
    dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);

    // count the execution time
    float shared_gpu_time_ms, gpu_elapsed_time_ms, cpu_elapsed_time_ms;
    cudaEvent_t start, stop;
    cudaEventCreate(&start);
    cudaEventCreate(&stop);


    // start to count execution time of GPU without using Shared Memory version
    cudaEventRecord(start, 0);
    // Launch kernel 
    gpu_matrix_mult<<<dimGrid, dimBlock>>>(d_a, d_b, d_c, m, n, k);    
    // time counting terminate
    cudaEventRecord(stop, 0);
    cudaEventSynchronize(stop);
    // compute time elapse on GPU computing
    cudaEventElapsedTime(&gpu_elapsed_time_ms, start, stop);
    printf("Time elapsed on matrix multiplication of %dx%d . %dx%d on GPU without shared memory: %f ms.\n\n", m, n, n, k, gpu_elapsed_time_ms);


    // start to count execution time of GPU with using Shared Memory version
    cudaEventRecord(start, 0);
    // Launch kernel
    shared_matrix_mult<<<dimGrid, dimBlock>>>(d_a, d_b, d_c, m, n, k);
    // time counting terminate
    cudaEventRecord(stop, 0);
    cudaEventSynchronize(stop);
    // compute time elapse on GPU computing
    cudaEventElapsedTime(&shared_gpu_time_ms, start, stop);    
    printf("Time elapsed on matrix multiplication of %dx%d . %dx%d on GPU with shared memory: %f ms.\n\n", m, n, n, k, shared_gpu_time_ms);


    // Transefr results from device to host 
    cudaMemcpy(h_c, d_c, sizeof(int)*m*k, cudaMemcpyDeviceToHost);


    // start the CPU version
    cudaEventRecord(start, 0);
    cpu_matrix_mult(h_a, h_b, h_cc, m, n, k);
    cudaEventRecord(stop, 0);
    cudaEventSynchronize(stop);
    cudaEventElapsedTime(&cpu_elapsed_time_ms, start, stop);
    printf("Time elapsed on matrix multiplication of %dx%d . %dx%d on CPU: %f ms.\n\n", m, n, n, k, cpu_elapsed_time_ms);


    // validate results computed by GPU with shared memory
    int all_ok = 1;
    for (int i = 0; i < m; ++i)
    {
        for (int j = 0; j < k; ++j)
        {
            if(h_cc[i*k + j] != h_c[i*k + j])
            {
                all_ok = 0;
            }
        }
    }

    // compute speedup ratio
    // cpu time / shared_memory time
    if(all_ok)
    {
        printf("all results are correct!, speedup = %f\n", cpu_elapsed_time_ms / shared_gpu_time_ms);
    }
    else
    {
        printf("incorrect results\n");
    }

    printMatrix(h_c, m, k);

    // free memory
    cudaFree(d_a);
    cudaFree(d_b);
    cudaFree(d_c);
    cudaFreeHost(h_a);
    cudaFreeHost(h_b);
    cudaFreeHost(h_c);
    cudaFreeHost(h_cc);
    return 0;
}

	.file	"tmpxft_002976aa_00000000-6_TiledMatrixMul.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2032:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2032:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z15cpu_matrix_multPfS_S_iii
	.type	_Z15cpu_matrix_multPfS_S_iii, @function
_Z15cpu_matrix_multPfS_S_iii:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	xorl	%r10d, %r10d
	xorl	%r11d, %r11d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%ecx, %r12d
	xorl	%ecx, %ecx
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rsi, %rbp
	movq	%rdx, %rsi
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movslq	%r9d, %rbx
	salq	$2, %rbx
.L3:
	cmpl	%r12d, %r11d
	jge	.L2
	movslq	%r10d, %rax
	leaq	(%rsi,%rax,4), %r15
	movslq	%ecx, %rax
	leaq	(%rdi,%rax,4), %r14
	xorl	%eax, %eax
.L8:
	cmpl	%eax, %r9d
	jle	.L5
	leaq	0(%rbp,%rax,4), %r13
	xorl	%edx, %edx
	xorps	%xmm0, %xmm0
.L6:
	cmpl	%edx, %r8d
	jle	.L11
	movss	(%r14,%rdx,4), %xmm1
	mulss	0(%r13), %xmm1
	incq	%rdx
	addq	%rbx, %r13
	addss	%xmm1, %xmm0
	jmp	.L6
.L11:
	movss	%xmm0, (%r15,%rax,4)
	incq	%rax
	jmp	.L8
.L5:
	incl	%r11d
	addl	%r9d, %r10d
	addl	%r8d, %ecx
	jmp	.L3
.L2:
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z15cpu_matrix_multPfS_S_iii, .-_Z15cpu_matrix_multPfS_S_iii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"\n"
.LC2:
	.string	"%f\t"
	.text
	.globl	_Z11printMatrixPfii
	.type	_Z11printMatrixPfii, @function
_Z11printMatrixPfii:
.LFB2028:
	.cfi_startproc
	endbr64
	cmpl	$10, %esi
	jg	.L18
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%edx, %ebx
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	cmpl	$10, %edx
	jg	.L12
	movq	%rdi, %r12
	movl	%esi, %ebp
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC1(%rip), %rsi
	xorl	%r13d, %r13d
	xorl	%r14d, %r14d
	call	__printf_chk@PLT
.L14:
	cmpl	%r14d, %ebp
	jle	.L12
	movslq	%r13d, %rax
	xorl	%r15d, %r15d
	leaq	(%r12,%rax,4), %rcx
.L16:
	cmpl	%r15d, %ebx
	jle	.L21
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	(%rcx,%r15,4), %xmm0
	movq	%rcx, 8(%rsp)
	incq	%r15
	call	__printf_chk@PLT
	movq	8(%rsp), %rcx
	jmp	.L16
.L21:
	leaq	.LC1(%rip), %rsi
	xorl	%eax, %eax
	incl	%r14d
	addl	%ebx, %r13d
	movl	$2, %edi
	call	__printf_chk@PLT
	jmp	.L14
.L12:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
.L18:
	.cfi_restore 3
	.cfi_restore 6
	.cfi_restore 12
	.cfi_restore 13
	.cfi_restore 14
	.cfi_restore 15
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z11printMatrixPfii, .-_Z11printMatrixPfii
	.globl	_Z42__device_stub__Z15gpu_matrix_multPfS_S_iiiPfS_S_iii
	.type	_Z42__device_stub__Z15gpu_matrix_multPfS_S_iiiPfS_S_iii, @function
_Z42__device_stub__Z15gpu_matrix_multPfS_S_iiiPfS_S_iii:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L22
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z15gpu_matrix_multPfS_S_iii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L22:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L24
	call	__stack_chk_fail@PLT
.L24:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z42__device_stub__Z15gpu_matrix_multPfS_S_iiiPfS_S_iii, .-_Z42__device_stub__Z15gpu_matrix_multPfS_S_iiiPfS_S_iii
	.globl	_Z15gpu_matrix_multPfS_S_iii
	.type	_Z15gpu_matrix_multPfS_S_iii, @function
_Z15gpu_matrix_multPfS_S_iii:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z42__device_stub__Z15gpu_matrix_multPfS_S_iiiPfS_S_iii
	.cfi_endproc
.LFE2055:
	.size	_Z15gpu_matrix_multPfS_S_iii, .-_Z15gpu_matrix_multPfS_S_iii
	.globl	_Z45__device_stub__Z18shared_matrix_multPfS_S_iiiPfS_S_iii
	.type	_Z45__device_stub__Z18shared_matrix_multPfS_S_iiiPfS_S_iii, @function
_Z45__device_stub__Z18shared_matrix_multPfS_S_iiiPfS_S_iii:
.LFB2056:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L27
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z18shared_matrix_multPfS_S_iii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L27:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L29
	call	__stack_chk_fail@PLT
.L29:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2056:
	.size	_Z45__device_stub__Z18shared_matrix_multPfS_S_iiiPfS_S_iii, .-_Z45__device_stub__Z18shared_matrix_multPfS_S_iiiPfS_S_iii
	.globl	_Z18shared_matrix_multPfS_S_iii
	.type	_Z18shared_matrix_multPfS_S_iii, @function
_Z18shared_matrix_multPfS_S_iii:
.LFB2057:
	.cfi_startproc
	endbr64
	jmp	_Z45__device_stub__Z18shared_matrix_multPfS_S_iiiPfS_S_iii
	.cfi_endproc
.LFE2057:
	.size	_Z18shared_matrix_multPfS_S_iii, .-_Z18shared_matrix_multPfS_S_iii
	.section	.rodata.str1.1
.LC3:
	.string	"Error input Parameter \n"
.LC4:
	.string	"Please input matrix size \n"
.LC5:
	.string	"Matrix A: m by n; Matrix B: n by k \n"
.LC6:
	.string	"Time elapsed on matrix multiplication of %dx%d . %dx%d on GPU without shared memory: %f ms.\n\n"
.LC7:
	.string	"Time elapsed on matrix multiplication of %dx%d . %dx%d on GPU with shared memory: %f ms.\n\n"
.LC8:
	.string	"Time elapsed on matrix multiplication of %dx%d . %dx%d on CPU: %f ms.\n\n"
.LC9:
	.string	"all results are correct!, speedup = %f\n"
.LC10:
	.string	"incorrect results\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$168, %rsp
	.cfi_def_cfa_offset 224
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	cmpl	$4, %edi
	je	.L33
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L34
.L33:
	movq	8(%rsi), %rdi
	movq	%rsi, %rbx
	call	atoi@PLT
	movq	16(%rbx), %rdi
	movslq	%eax, %r15
	call	atoi@PLT
	movq	%r15, %r14
	movq	24(%rbx), %rdi
	movq	%r15, %r12
	movslq	%eax, %r13
	call	atoi@PLT
	imulq	%r13, %r14
	movl	$1000, %edi
	movq	%r13, %rbp
	movl	%eax, %ebx
	call	srand@PLT
	leaq	56(%rsp), %rdi
	leaq	0(,%r14,4), %rax
	movslq	%ebx, %r14
	imulq	%r14, %r13
	movq	%rax, %rsi
	movq	%rax, 8(%rsp)
	call	cudaMallocHost@PLT
	imulq	%r14, %r15
	leaq	64(%rsp), %rdi
	leaq	0(,%r13,4), %rax
	movq	%rax, %rsi
	movq	%rax, 16(%rsp)
	call	cudaMallocHost@PLT
	leaq	0(,%r15,4), %rax
	leaq	72(%rsp), %rdi
	xorl	%r15d, %r15d
	movq	%rax, %rsi
	movq	%rax, (%rsp)
	call	cudaMallocHost@PLT
	movq	(%rsp), %rsi
	leaq	80(%rsp), %rdi
	call	cudaMallocHost@PLT
	xorl	%r8d, %r8d
.L35:
	cmpl	%r12d, %r8d
	jge	.L37
	movslq	%r15d, %rcx
	xorl	%r13d, %r13d
	leaq	0(,%rcx,4), %r14
.L38:
	cmpl	%ebp, %r13d
	jge	.L56
	movl	%r8d, 28(%rsp)
	incl	%r13d
	call	rand@PLT
	movl	$1024, %ecx
	movl	28(%rsp), %r8d
	cltd
	idivl	%ecx
	movq	56(%rsp), %rax
	cvtsi2ssl	%edx, %xmm0
	movss	%xmm0, (%rax,%r14)
	addq	$4, %r14
	jmp	.L38
.L56:
	incl	%r8d
	addl	%ebp, %r15d
	jmp	.L35
.L37:
	xorl	%r15d, %r15d
	xorl	%r8d, %r8d
.L39:
	cmpl	%ebp, %r8d
	jge	.L41
	movslq	%r15d, %rcx
	xorl	%r13d, %r13d
	leaq	0(,%rcx,4), %r14
.L42:
	cmpl	%ebx, %r13d
	jge	.L57
	movl	%r8d, 28(%rsp)
	incl	%r13d
	call	rand@PLT
	movl	$1024, %ecx
	movl	28(%rsp), %r8d
	cltd
	idivl	%ecx
	movq	64(%rsp), %rax
	cvtsi2ssl	%edx, %xmm0
	movss	%xmm0, (%rax,%r14)
	addq	$4, %r14
	jmp	.L42
.L57:
	incl	%r8d
	addl	%ebx, %r15d
	jmp	.L39
.L41:
	movq	8(%rsp), %rsi
	leaq	88(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	16(%rsp), %rsi
	leaq	96(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	(%rsp), %rsi
	leaq	104(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdx
	movq	56(%rsp), %rsi
	movl	$1, %ecx
	movq	88(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	64(%rsp), %rsi
	movq	16(%rsp), %rdx
	movl	$1, %ecx
	movq	96(%rsp), %rdi
	call	cudaMemcpy@PLT
	leal	15(%rbx), %eax
	movl	$16, %ecx
	leaq	112(%rsp), %rdi
	movl	$1, 136(%rsp)
	cltd
	idivl	%ecx
	movl	$1, 148(%rsp)
	movl	%eax, 128(%rsp)
	leal	15(%r12), %eax
	cltd
	idivl	%ecx
	movl	%eax, 132(%rsp)
	movabsq	$68719476752, %rax
	movq	%rax, 140(%rsp)
	call	cudaEventCreate@PLT
	leaq	120(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	112(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	148(%rsp), %ecx
	xorl	%r9d, %r9d
	movq	140(%rsp), %rdx
	movq	128(%rsp), %rdi
	movl	136(%rsp), %esi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L43
	movq	104(%rsp), %rdx
	movq	96(%rsp), %rsi
	movl	%ebx, %r9d
	movl	%ebp, %r8d
	movq	88(%rsp), %rdi
	movl	%r12d, %ecx
	call	_Z42__device_stub__Z15gpu_matrix_multPfS_S_iiiPfS_S_iii
.L43:
	movq	120(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	120(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	120(%rsp), %rdx
	movq	112(%rsp), %rsi
	leaq	48(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movl	%ebx, %r9d
	movl	%ebp, %r8d
	movl	%ebp, %ecx
	movl	%r12d, %edx
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	48(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	112(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	148(%rsp), %ecx
	xorl	%r9d, %r9d
	movq	140(%rsp), %rdx
	movq	128(%rsp), %rdi
	movl	136(%rsp), %esi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L44
	movq	104(%rsp), %rdx
	movq	96(%rsp), %rsi
	movl	%ebx, %r9d
	movl	%ebp, %r8d
	movq	88(%rsp), %rdi
	movl	%r12d, %ecx
	call	_Z45__device_stub__Z18shared_matrix_multPfS_S_iiiPfS_S_iii
.L44:
	movq	120(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	120(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	120(%rsp), %rdx
	movq	112(%rsp), %rsi
	leaq	44(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movl	%ebx, %r9d
	movl	%ebp, %r8d
	movl	%ebp, %ecx
	movl	%r12d, %edx
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	44(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	(%rsp), %rdx
	movq	104(%rsp), %rsi
	movq	72(%rsp), %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movq	112(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	80(%rsp), %rdx
	movl	%ebx, %r9d
	movl	%ebp, %r8d
	movq	64(%rsp), %rsi
	movq	56(%rsp), %rdi
	movl	%r12d, %ecx
	call	_Z15cpu_matrix_multPfS_S_iii
	movq	120(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	120(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	120(%rsp), %rdx
	movq	112(%rsp), %rsi
	leaq	52(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movl	%ebx, %r9d
	movl	%ebp, %r8d
	movl	%ebp, %ecx
	movl	$2, %edi
	leaq	.LC8(%rip), %rsi
	movl	%r12d, %edx
	movb	$1, %al
	cvtss2sd	52(%rsp), %xmm0
	call	__printf_chk@PLT
	xorl	%ecx, %ecx
	xorl	%esi, %esi
	movq	80(%rsp), %r8
	movq	72(%rsp), %r9
	movl	$1, %edi
.L45:
	cmpl	%r12d, %esi
	jge	.L49
	movslq	%ecx, %rax
	xorl	%edx, %edx
	salq	$2, %rax
.L50:
	cmpl	%ebx, %edx
	jge	.L58
	movss	(%r8,%rax), %xmm0
	ucomiss	(%r9,%rax), %xmm0
	jp	.L54
	je	.L46
.L54:
	xorl	%edi, %edi
.L46:
	incl	%edx
	addq	$4, %rax
	jmp	.L50
.L58:
	incl	%esi
	addl	%ebx, %ecx
	jmp	.L45
.L49:
	testl	%edi, %edi
	je	.L51
	leaq	.LC9(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	movss	52(%rsp), %xmm0
	divss	44(%rsp), %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	jmp	.L52
.L51:
	leaq	.LC10(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L52:
	movq	72(%rsp), %rdi
	movl	%ebx, %edx
	movl	%r12d, %esi
	call	_Z11printMatrixPfii
	movq	88(%rsp), %rdi
	call	cudaFree@PLT
	movq	96(%rsp), %rdi
	call	cudaFree@PLT
	movq	104(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	64(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	72(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	80(%rsp), %rdi
	call	cudaFreeHost@PLT
.L34:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L53
	call	__stack_chk_fail@PLT
.L53:
	addq	$168, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	main, .-main
	.section	.rodata.str1.1
.LC11:
	.string	"_Z18shared_matrix_multPfS_S_iii"
.LC12:
	.string	"_Z15gpu_matrix_multPfS_S_iii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2059:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC11(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z18shared_matrix_multPfS_S_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC12(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z15gpu_matrix_multPfS_S_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2059:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/*
 *  file name: matrix.cu
 *
 *  CPE810A: Homework 1, matrix * matrix by using shared memory
 *  
 *  Yupeng Cao, 10454637
 *  
 */


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <assert.h>

#define BLOCK_SIZE 16
#define TILE_SIZE 16


/*
*********************************************************************
function name: gpu_matrix_mult

parameters: 
            &a GPU device pointer to a m X n matrix (A)
            &b GPU device pointer to a n X k matrix (B)
            &c GPU device output purpose pointer to a m X k matrix (C) 
            to store the result

*********************************************************************
*/
__global__ void gpu_matrix_mult(float *a, float *b, float *c, int m, int n, int k)
{ 
    int row = blockIdx.y * blockDim.y + threadIdx.y; 
    int col = blockIdx.x * blockDim.x + threadIdx.x;
    float sum = 0;
    if( col < k && row < m) 
    {
        for(int i = 0; i < n; i++) 
        {
            sum += a[row * n + i] * b[i * k + col];
        }
        c[row * k + col] = sum;
    }
} 

/*
*********************************************************************
function name: shared_matrix_mult

parameters: 
            &a GPU device pointer to a m X n matrix (A)
            &b GPU device pointer to a n X k matrix (B)
            &c GPU device output purpose pointer to a m X k matrix (C) 
            to store the result

Using Shared Memory

*********************************************************************
*/
__global__ void shared_matrix_mult(float* A, float* B, float* C, int m, int n, int k)
{
    __shared__ float As[TILE_SIZE][TILE_SIZE];
    __shared__ float Bs[TILE_SIZE][TILE_SIZE];

    int row = blockIdx.y * blockDim.y + threadIdx.y;
    int col = blockIdx.x * blockDim.x + threadIdx.x;
    float CValue = 0.0;

    for (int t = 0; t * TILE_SIZE < n; ++t) 
    {
        if (row < m && t * TILE_SIZE + threadIdx.x < n)
            As[threadIdx.y][threadIdx.x] = A[row * n + t * TILE_SIZE + threadIdx.x];
        else
            As[threadIdx.y][threadIdx.x] = 0;

        if (col < k && t * TILE_SIZE + threadIdx.y < n)
            Bs[threadIdx.y][threadIdx.x] = B[(t * TILE_SIZE + threadIdx.y) * k + col];
        else
            Bs[threadIdx.y][threadIdx.x] = 0;
        __syncthreads();

        for (int i = 0; i < TILE_SIZE; ++i) 
        {
            CValue += As[threadIdx.y][i] * Bs[i][threadIdx.x];
        }
        __syncthreads();
    }

    if (row < m && col < k)
        C[row * k + col] = CValue;
}


/*
*********************************************************************
function name: cpu_matrix_mult

description: dot product of two matrix in CPU, 
             for validating GPU results

*********************************************************************
*/
void cpu_matrix_mult(float *h_a, float *h_b, float *h_result, int m, int n, int k) {
    for (int i = 0; i < m; ++i) 
    {
        for (int j = 0; j < k; ++j) 
        {
            float tmp = 0.0;
            for (int h = 0; h < n; ++h) 
            {
                tmp += h_a[i * n + h] * h_b[h * k + j];
            }
            h_result[i * k + j] = tmp;
        }
    }
}

/*
*********************************************************************
function name: printMatrix

description: Print calculation results
             for visualize GPU results

Note:  if the matrix size larger than 10,
       this function will not execute

*********************************************************************
*/
void printMatrix(float* result_matrix, int row, int col) {
    if (row > 10 || col > 10) return;
    printf("\n");
    for (int i = 0; i < row; i++) {
        for (int j = 0; j < col; j++) {
            printf("%f\t", result_matrix[i*col + j]);
        }
        printf("\n");
    }
    return;
}

/*
*********************************************************************
function name: main

description: test and compare

*********************************************************************
*/
int main(int argc, char *argv[])
{   

    // input check
    if ( argc != 4)
    {
        printf("Error input Parameter \n");
        printf("Please input matrix size \n");
        printf("Matrix A: m by n; Matrix B: n by k \n");
        return 0;
    }

    /* 
        Matrix A: m * n
        Matrix B: n * k
    */
    int m = atoi(argv[1]);
    int n = atoi(argv[2]);
    int k = atoi(argv[3]);
    srand(1000);
    //printf("please type in m n and k\n");
    //scanf("%d %d %d", &m, &n, &k);

    // allocate memory in host, h_cc is used to store CPU result
    float *h_a, *h_b, *h_c, *h_cc;
    hipHostMalloc((void **) &h_a, sizeof(int)*m*n, hipHostMallocDefault);
    hipHostMalloc((void **) &h_b, sizeof(int)*n*k, hipHostMallocDefault);
    hipHostMalloc((void **) &h_c, sizeof(int)*m*k, hipHostMallocDefault);
    hipHostMalloc((void **) &h_cc, sizeof(int)*m*k, hipHostMallocDefault);

    // random initialize matrix A
    for (int i = 0; i < m; ++i) {
        for (int j = 0; j < n; ++j) {
            h_a[i * n + j] = rand() % 1024;
        }
    }

    // random initialize matrix B
    for (int i = 0; i < n; ++i) {
        for (int j = 0; j < k; ++j) {
            h_b[i * k + j] = rand() % 1024;
        }
    }

    // Allocate memory space on the device 
    float *d_a, *d_b, *d_c;
    hipMalloc((void **) &d_a, sizeof(int)*m*n);
    hipMalloc((void **) &d_b, sizeof(int)*n*k);
    hipMalloc((void **) &d_c, sizeof(int)*m*k);

    // copy matrix A and B from host to device memory
    hipMemcpy(d_a, h_a, sizeof(int)*m*n, hipMemcpyHostToDevice);
    hipMemcpy(d_b, h_b, sizeof(int)*n*k, hipMemcpyHostToDevice);

    // assign Grid and Block size
    unsigned int grid_rows = (m + BLOCK_SIZE - 1) / BLOCK_SIZE;
    unsigned int grid_cols = (k + BLOCK_SIZE - 1) / BLOCK_SIZE;
    dim3 dimGrid(grid_cols, grid_rows);
    dim3 dimBlock(BLOCK_SIZE, BLOCK_SIZE);

    // count the execution time
    float shared_gpu_time_ms, gpu_elapsed_time_ms, cpu_elapsed_time_ms;
    hipEvent_t start, stop;
    hipEventCreate(&start);
    hipEventCreate(&stop);


    // start to count execution time of GPU without using Shared Memory version
    hipEventRecord(start, 0);
    // Launch kernel 
    gpu_matrix_mult<<<dimGrid, dimBlock>>>(d_a, d_b, d_c, m, n, k);    
    // time counting terminate
    hipEventRecord(stop, 0);
    hipEventSynchronize(stop);
    // compute time elapse on GPU computing
    hipEventElapsedTime(&gpu_elapsed_time_ms, start, stop);
    printf("Time elapsed on matrix multiplication of %dx%d . %dx%d on GPU without shared memory: %f ms.\n\n", m, n, n, k, gpu_elapsed_time_ms);


    // start to count execution time of GPU with using Shared Memory version
    hipEventRecord(start, 0);
    // Launch kernel
    shared_matrix_mult<<<dimGrid, dimBlock>>>(d_a, d_b, d_c, m, n, k);
    // time counting terminate
    hipEventRecord(stop, 0);
    hipEventSynchronize(stop);
    // compute time elapse on GPU computing
    hipEventElapsedTime(&shared_gpu_time_ms, start, stop);    
    printf("Time elapsed on matrix multiplication of %dx%d . %dx%d on GPU with shared memory: %f ms.\n\n", m, n, n, k, shared_gpu_time_ms);


    // Transefr results from device to host 
    hipMemcpy(h_c, d_c, sizeof(int)*m*k, hipMemcpyDeviceToHost);


    // start the CPU version
    hipEventRecord(start, 0);
    cpu_matrix_mult(h_a, h_b, h_cc, m, n, k);
    hipEventRecord(stop, 0);
    hipEventSynchronize(stop);
    hipEventElapsedTime(&cpu_elapsed_time_ms, start, stop);
    printf("Time elapsed on matrix multiplication of %dx%d . %dx%d on CPU: %f ms.\n\n", m, n, n, k, cpu_elapsed_time_ms);


    // validate results computed by GPU with shared memory
    int all_ok = 1;
    for (int i = 0; i < m; ++i)
    {
        for (int j = 0; j < k; ++j)
        {
            if(h_cc[i*k + j] != h_c[i*k + j])
            {
                all_ok = 0;
            }
        }
    }

    // compute speedup ratio
    // cpu time / shared_memory time
    if(all_ok)
    {
        printf("all results are correct!, speedup = %f\n", cpu_elapsed_time_ms / shared_gpu_time_ms);
    }
    else
    {
        printf("incorrect results\n");
    }

    printMatrix(h_c, m, k);

    // free memory
    hipFree(d_a);
    hipFree(d_b);
    hipFree(d_c);
    hipHostFree(h_a);
    hipHostFree(h_b);
    hipHostFree(h_c);
    hipHostFree(h_cc);
    return 0;
}

	.text
	.file	"TiledMatrixMul.hip"
	.globl	_Z30__device_stub__gpu_matrix_multPfS_S_iii # -- Begin function _Z30__device_stub__gpu_matrix_multPfS_S_iii
	.type	_Z30__device_stub__gpu_matrix_multPfS_S_iii,@function
_Z30__device_stub__gpu_matrix_multPfS_S_iii: # @_Z30__device_stub__gpu_matrix_multPfS_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z15gpu_matrix_multPfS_S_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z30__device_stub__gpu_matrix_multPfS_S_iii, .Lfunc_end0-_Z30__device_stub__gpu_matrix_multPfS_S_iii
	.cfi_endproc
                                        # -- End function
	.globl	_Z33__device_stub__shared_matrix_multPfS_S_iii # -- Begin function _Z33__device_stub__shared_matrix_multPfS_S_iii
	.type	_Z33__device_stub__shared_matrix_multPfS_S_iii,@function
_Z33__device_stub__shared_matrix_multPfS_S_iii: # @_Z33__device_stub__shared_matrix_multPfS_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z18shared_matrix_multPfS_S_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z33__device_stub__shared_matrix_multPfS_S_iii, .Lfunc_end1-_Z33__device_stub__shared_matrix_multPfS_S_iii
	.cfi_endproc
                                        # -- End function
	.globl	_Z15cpu_matrix_multPfS_S_iii    # -- Begin function _Z15cpu_matrix_multPfS_S_iii
	.type	_Z15cpu_matrix_multPfS_S_iii,@function
_Z15cpu_matrix_multPfS_S_iii:           # @_Z15cpu_matrix_multPfS_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, -8(%rsp)                  # 8-byte Spill
	movq	%rsi, -16(%rsp)                 # 8-byte Spill
	movq	%rdi, -24(%rsp)                 # 8-byte Spill
	testl	%ecx, %ecx
	jle	.LBB2_9
# %bb.1:                                # %.preheader27.lr.ph
	movslq	%r9d, %rdi
	movl	%ecx, %ecx
	movl	%edi, %r10d
	movl	%r8d, %r11d
	leaq	(,%rdi,4), %rbx
	xorl	%r14d, %r14d
	xorl	%r15d, %r15d
.LBB2_2:                                # %.preheader27
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_4 Depth 2
                                        #       Child Loop BB2_6 Depth 3
	testl	%r9d, %r9d
	jle	.LBB2_8
# %bb.3:                                # %.preheader.lr.ph
                                        #   in Loop: Header=BB2_2 Depth=1
	movl	%r14d, %eax
	movq	-24(%rsp), %rdx                 # 8-byte Reload
	leaq	(%rdx,%rax,4), %r12
	movq	%r15, %rax
	imulq	%rdi, %rax
	movq	-8(%rsp), %rdx                  # 8-byte Reload
	leaq	(%rdx,%rax,4), %r13
	movq	-16(%rsp), %rsi                 # 8-byte Reload
	xorl	%eax, %eax
.LBB2_4:                                # %.preheader
                                        #   Parent Loop BB2_2 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB2_6 Depth 3
	xorps	%xmm0, %xmm0
	testl	%r8d, %r8d
	jle	.LBB2_7
# %bb.5:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB2_4 Depth=2
	movq	%rsi, %rbp
	xorl	%edx, %edx
.LBB2_6:                                # %.lr.ph
                                        #   Parent Loop BB2_2 Depth=1
                                        #     Parent Loop BB2_4 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movss	(%r12,%rdx,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	mulss	(%rbp), %xmm1
	addss	%xmm1, %xmm0
	incq	%rdx
	addq	%rbx, %rbp
	cmpq	%rdx, %r11
	jne	.LBB2_6
.LBB2_7:                                # %._crit_edge
                                        #   in Loop: Header=BB2_4 Depth=2
	movss	%xmm0, (%r13,%rax,4)
	incq	%rax
	addq	$4, %rsi
	cmpq	%r10, %rax
	jne	.LBB2_4
.LBB2_8:                                # %._crit_edge31
                                        #   in Loop: Header=BB2_2 Depth=1
	incq	%r15
	addl	%r8d, %r14d
	cmpq	%rcx, %r15
	jne	.LBB2_2
.LBB2_9:                                # %._crit_edge33
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z15cpu_matrix_multPfS_S_iii, .Lfunc_end2-_Z15cpu_matrix_multPfS_S_iii
	.cfi_endproc
                                        # -- End function
	.globl	_Z11printMatrixPfii             # -- Begin function _Z11printMatrixPfii
	.type	_Z11printMatrixPfii,@function
_Z11printMatrixPfii:                    # @_Z11printMatrixPfii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdi, 8(%rsp)                   # 8-byte Spill
	cmpl	$10, %esi
	jg	.LBB3_8
# %bb.1:
	movl	%edx, %ebx
	cmpl	$10, %edx
	jg	.LBB3_8
# %bb.2:
	movl	%esi, %ebp
	movl	$10, %edi
	callq	putchar@PLT
	testl	%ebp, %ebp
	jle	.LBB3_8
# %bb.3:                                # %.preheader.lr.ph
	movl	%ebp, %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	%ebx, %r12d
	xorl	%r13d, %r13d
	xorl	%ebp, %ebp
.LBB3_4:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_6 Depth 2
	testl	%ebx, %ebx
	jle	.LBB3_7
# %bb.5:                                # %.lr.ph
                                        #   in Loop: Header=BB3_4 Depth=1
	movl	%r13d, %eax
	movq	8(%rsp), %rcx                   # 8-byte Reload
	leaq	(%rcx,%rax,4), %r14
	xorl	%r15d, %r15d
.LBB3_6:                                #   Parent Loop BB3_4 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r14,%r15,4), %xmm0
	movl	$.L.str.1, %edi
	movb	$1, %al
	callq	printf
	incq	%r15
	cmpq	%r15, %r12
	jne	.LBB3_6
.LBB3_7:                                # %._crit_edge
                                        #   in Loop: Header=BB3_4 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%rbp
	addl	%ebx, %r13d
	cmpq	16(%rsp), %rbp                  # 8-byte Folded Reload
	jne	.LBB3_4
.LBB3_8:                                # %.loopexit
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z11printMatrixPfii, .Lfunc_end3-_Z11printMatrixPfii
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$152, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	cmpl	$4, %edi
	jne	.LBB4_1
# %bb.2:
	movq	%rsi, %r14
	movq	8(%rsi), %rdi
	callq	atoi
	movl	%eax, %r12d
	movq	16(%r14), %rdi
	callq	atoi
	movq	24(%r14), %rdi
	movl	%eax, %r14d
	callq	atoi
	movl	%eax, %ebx
	movl	$1000, %edi                     # imm = 0x3E8
	callq	srand
	movslq	%r12d, %r13
	shlq	$2, %r13
	movslq	%r14d, %rbp
	movq	%r13, %rsi
	imulq	%rbp, %rsi
	leaq	64(%rsp), %rdi
	xorl	%r15d, %r15d
	movq	%rsi, 120(%rsp)                 # 8-byte Spill
	xorl	%edx, %edx
	callq	hipHostMalloc
	movq	%rbx, 32(%rsp)                  # 8-byte Spill
	movslq	%ebx, %rbx
	imulq	%rbx, %rbp
	shlq	$2, %rbp
	leaq	56(%rsp), %rdi
	movq	%rbp, 128(%rsp)                 # 8-byte Spill
	movq	%rbp, %rsi
	xorl	%edx, %edx
	callq	hipHostMalloc
	imulq	%rbx, %r13
	leaq	48(%rsp), %rdi
	movq	%r13, %rsi
	xorl	%edx, %edx
	callq	hipHostMalloc
	leaq	88(%rsp), %rdi
	movq	%r13, 104(%rsp)                 # 8-byte Spill
	movq	%r13, %rsi
	xorl	%edx, %edx
	callq	hipHostMalloc
	movl	%r12d, %eax
	movq	%rax, 112(%rsp)                 # 8-byte Spill
	movl	%r14d, %ebx
	movq	%r12, 136(%rsp)                 # 8-byte Spill
	testl	%r12d, %r12d
	jle	.LBB4_6
# %bb.3:                                # %.preheader122.lr.ph
	xorl	%r12d, %r12d
.LBB4_4:                                # %.preheader122
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_25 Depth 2
	movl	%r15d, %r15d
	movq	%rbx, %r13
	movq	%r15, %rbp
	testl	%r14d, %r14d
	jle	.LBB4_5
.LBB4_25:                               #   Parent Loop BB4_4 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
                                        # kill: def $eax killed $eax def $rax
	leal	1023(%rax), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	andl	$-1024, %ecx                    # imm = 0xFC00
	subl	%ecx, %eax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movq	64(%rsp), %rax
	movss	%xmm0, (%rax,%rbp,4)
	incq	%rbp
	decq	%r13
	jne	.LBB4_25
.LBB4_5:                                # %._crit_edge
                                        #   in Loop: Header=BB4_4 Depth=1
	incq	%r12
	addl	%r14d, %r15d
	cmpq	112(%rsp), %r12                 # 8-byte Folded Reload
	jne	.LBB4_4
.LBB4_6:                                # %.preheader121
	movq	32(%rsp), %rax                  # 8-byte Reload
	movl	%eax, %ebp
	movl	%r14d, 28(%rsp)                 # 4-byte Spill
	testl	%r14d, %r14d
	jle	.LBB4_10
# %bb.7:                                # %.preheader120.lr.ph
	xorl	%r14d, %r14d
	xorl	%r13d, %r13d
.LBB4_8:                                # %.preheader120
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_26 Depth 2
	movl	%r14d, %r14d
	movq	%rbp, %r15
	movq	%r14, %r12
	testl	%eax, %eax
	jle	.LBB4_9
.LBB4_26:                               #   Parent Loop BB4_8 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
                                        # kill: def $eax killed $eax def $rax
	leal	1023(%rax), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	andl	$-1024, %ecx                    # imm = 0xFC00
	subl	%ecx, %eax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movq	56(%rsp), %rax
	movss	%xmm0, (%rax,%r12,4)
	incq	%r12
	decq	%r15
	jne	.LBB4_26
.LBB4_9:                                # %._crit_edge127
                                        #   in Loop: Header=BB4_8 Depth=1
	incq	%r13
	movq	32(%rsp), %rax                  # 8-byte Reload
	addl	%eax, %r14d
	cmpq	%rbx, %r13
	jne	.LBB4_8
.LBB4_10:                               # %._crit_edge129
	leaq	80(%rsp), %rbx
	movq	%rbx, %rdi
	movq	120(%rsp), %r12                 # 8-byte Reload
	movq	%r12, %rsi
	movq	%rax, %r15
	callq	hipMalloc
	leaq	72(%rsp), %r13
	movq	%r13, %rdi
	movq	128(%rsp), %r14                 # 8-byte Reload
	movq	%r14, %rsi
	callq	hipMalloc
	leaq	40(%rsp), %rdi
	movq	104(%rsp), %rsi                 # 8-byte Reload
	callq	hipMalloc
	movq	(%rbx), %rdi
	movq	64(%rsp), %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r13), %rdi
	movq	56(%rsp), %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	136(%rsp), %r14                 # 8-byte Reload
	leal	15(%r14), %eax
	leal	30(%r14), %r12d
	testl	%eax, %eax
	cmovnsl	%eax, %r12d
	sarl	$4, %r12d
	leal	15(%r15), %eax
	leal	30(%r15), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	sarl	$4, %ecx
	shlq	$32, %r12
	orq	%rcx, %r12
	leaq	16(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventCreate
	leaq	8(%rsp), %rdi
	callq	hipEventCreate
	movq	(%rbx), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	%r12, %rdi
	movl	$1, %esi
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_12
# %bb.11:
	movq	80(%rsp), %rdi
	movq	72(%rsp), %rsi
	movq	40(%rsp), %rdx
	movl	%r14d, %ecx
	movl	28(%rsp), %r8d                  # 4-byte Reload
	movl	%r15d, %r9d
	callq	_Z30__device_stub__gpu_matrix_multPfS_S_iii
.LBB4_12:
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	8(%rsp), %rdi
	callq	hipEventSynchronize
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	leaq	148(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	cvtss2sd	(%rbx), %xmm0
	movl	$.L.str.5, %edi
	movl	%r14d, %esi
	movl	28(%rsp), %r13d                 # 4-byte Reload
	movl	%r13d, %edx
	movl	%r13d, %ecx
	movl	%r15d, %r8d
	movb	$1, %al
	callq	printf
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	%r12, %rdi
	movl	$1, %esi
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_14
# %bb.13:
	movq	80(%rsp), %rdi
	movq	72(%rsp), %rsi
	movq	40(%rsp), %rdx
	movl	%r14d, %ecx
	movl	%r13d, %r8d
	movl	%r15d, %r9d
	callq	_Z33__device_stub__shared_matrix_multPfS_S_iii
.LBB4_14:
	movq	8(%rsp), %rdi
	xorl	%r12d, %r12d
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	8(%rsp), %rdi
	callq	hipEventSynchronize
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	leaq	100(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbx), %xmm0
	movl	$.L.str.6, %edi
	movl	%r14d, %esi
	movl	%r13d, %edx
	movl	%r13d, %ecx
	movl	%r15d, %r8d
	movb	$1, %al
	callq	printf
	movq	48(%rsp), %rdi
	movq	40(%rsp), %rsi
	movq	104(%rsp), %rdx                 # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	64(%rsp), %rdi
	movq	56(%rsp), %rsi
	movq	88(%rsp), %rdx
	movl	%r14d, %ecx
	movl	%r13d, %r8d
	movl	%r15d, %r9d
	callq	_Z15cpu_matrix_multPfS_S_iii
	movq	8(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	8(%rsp), %rdi
	callq	hipEventSynchronize
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	leaq	96(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbx), %xmm0
	movl	$.L.str.7, %edi
	movl	%r14d, %esi
	movl	%r13d, %edx
	movl	%r13d, %ecx
	movl	%r15d, %r8d
	movb	$1, %al
	callq	printf
	testl	%r14d, %r14d
	jle	.LBB4_21
# %bb.15:                               # %.preheader.lr.ph
	movq	88(%rsp), %rax
	movq	48(%rsp), %rcx
	movl	$1, %edx
	xorl	%esi, %esi
	xorl	%edi, %edi
	movq	32(%rsp), %r11                  # 8-byte Reload
.LBB4_16:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_18 Depth 2
	testl	%r11d, %r11d
	jle	.LBB4_19
# %bb.17:                               # %.lr.ph132
                                        #   in Loop: Header=BB4_16 Depth=1
	movl	%esi, %r9d
	leaq	(%rcx,%r9,4), %r8
	leaq	(%rax,%r9,4), %r9
	xorl	%r10d, %r10d
.LBB4_18:                               #   Parent Loop BB4_16 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	(%r9,%r10,4), %xmm0             # xmm0 = mem[0],zero,zero,zero
	ucomiss	(%r8,%r10,4), %xmm0
	cmovnel	%r12d, %edx
	cmovpl	%r12d, %edx
	incq	%r10
	cmpq	%r10, %rbp
	jne	.LBB4_18
.LBB4_19:                               # %._crit_edge133
                                        #   in Loop: Header=BB4_16 Depth=1
	incq	%rdi
	addl	%r11d, %esi
	cmpq	112(%rsp), %rdi                 # 8-byte Folded Reload
	jne	.LBB4_16
# %bb.20:                               # %._crit_edge136
	testl	%edx, %edx
	je	.LBB4_22
.LBB4_21:                               # %._crit_edge136.thread
	movss	96(%rsp), %xmm0                 # xmm0 = mem[0],zero,zero,zero
	divss	100(%rsp), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.8, %edi
	movb	$1, %al
	callq	printf
	jmp	.LBB4_23
.LBB4_1:
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	movl	$.Lstr.3, %edi
	callq	puts@PLT
	jmp	.LBB4_24
.LBB4_22:
	movl	$.Lstr, %edi
	callq	puts@PLT
.LBB4_23:
	movq	48(%rsp), %rdi
	movl	%r14d, %esi
	movq	32(%rsp), %rdx                  # 8-byte Reload
                                        # kill: def $edx killed $edx killed $rdx
	callq	_Z11printMatrixPfii
	movq	80(%rsp), %rdi
	callq	hipFree
	movq	72(%rsp), %rdi
	callq	hipFree
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	64(%rsp), %rdi
	callq	hipHostFree
	movq	56(%rsp), %rdi
	callq	hipHostFree
	movq	48(%rsp), %rdi
	callq	hipHostFree
	movq	88(%rsp), %rdi
	callq	hipHostFree
.LBB4_24:
	xorl	%eax, %eax
	addq	$152, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	main, .Lfunc_end4-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z15gpu_matrix_multPfS_S_iii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z18shared_matrix_multPfS_S_iii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z15gpu_matrix_multPfS_S_iii,@object # @_Z15gpu_matrix_multPfS_S_iii
	.section	.rodata,"a",@progbits
	.globl	_Z15gpu_matrix_multPfS_S_iii
	.p2align	3, 0x0
_Z15gpu_matrix_multPfS_S_iii:
	.quad	_Z30__device_stub__gpu_matrix_multPfS_S_iii
	.size	_Z15gpu_matrix_multPfS_S_iii, 8

	.type	_Z18shared_matrix_multPfS_S_iii,@object # @_Z18shared_matrix_multPfS_S_iii
	.globl	_Z18shared_matrix_multPfS_S_iii
	.p2align	3, 0x0
_Z18shared_matrix_multPfS_S_iii:
	.quad	_Z33__device_stub__shared_matrix_multPfS_S_iii
	.size	_Z18shared_matrix_multPfS_S_iii, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"%f\t"
	.size	.L.str.1, 4

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Time elapsed on matrix multiplication of %dx%d . %dx%d on GPU without shared memory: %f ms.\n\n"
	.size	.L.str.5, 94

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Time elapsed on matrix multiplication of %dx%d . %dx%d on GPU with shared memory: %f ms.\n\n"
	.size	.L.str.6, 91

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"Time elapsed on matrix multiplication of %dx%d . %dx%d on CPU: %f ms.\n\n"
	.size	.L.str.7, 72

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"all results are correct!, speedup = %f\n"
	.size	.L.str.8, 40

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z15gpu_matrix_multPfS_S_iii"
	.size	.L__unnamed_1, 29

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z18shared_matrix_multPfS_S_iii"
	.size	.L__unnamed_2, 32

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"incorrect results"
	.size	.Lstr, 18

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"Error input Parameter "
	.size	.Lstr.1, 23

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"Please input matrix size "
	.size	.Lstr.2, 26

	.type	.Lstr.3,@object                 # @str.3
.Lstr.3:
	.asciz	"Matrix A: m by n; Matrix B: n by k "
	.size	.Lstr.3, 36

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z30__device_stub__gpu_matrix_multPfS_S_iii
	.addrsig_sym _Z33__device_stub__shared_matrix_multPfS_S_iii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z15gpu_matrix_multPfS_S_iii
	.addrsig_sym _Z18shared_matrix_multPfS_S_iii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z15gpu_matrix_multPfS_S_iii ; -- Begin function _Z15gpu_matrix_multPfS_S_iii
	.globl	_Z15gpu_matrix_multPfS_S_iii
	.p2align	8
	.type	_Z15gpu_matrix_multPfS_S_iii,@function
_Z15gpu_matrix_multPfS_S_iii:           ; @_Z15gpu_matrix_multPfS_S_iii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x34
	s_load_b128 s[4:7], s[0:1], 0x18
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s6, v0
	v_cmp_gt_i32_e64 s2, s4, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, vcc_lo
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_6
; %bb.1:                                ; %.preheader
	s_clause 0x1
	s_load_b128 s[8:11], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_cmp_lt_i32 s5, 1
	s_cbranch_scc1 .LBB0_4
; %bb.2:                                ; %.lr.ph
	v_mul_lo_u32 v2, v1, s5
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v4, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s8, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s9, v3, vcc_lo
.LBB0_3:                                ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v5, 31, v4
	s_add_i32 s5, s5, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_eq_u32 s5, 0
	v_lshlrev_b64 v[7:8], 2, v[4:5]
	v_add_nc_u32_e32 v4, s6, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v7, vcc_lo, s10, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s11, v8, vcc_lo
	global_load_b32 v5, v[2:3], off
	global_load_b32 v7, v[7:8], off
	v_add_co_u32 v2, vcc_lo, v2, 4
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v6, v5, v7
	s_cbranch_scc0 .LBB0_3
	s_branch .LBB0_5
.LBB0_4:
	v_mov_b32_e32 v6, 0
.LBB0_5:                                ; %Flow54
	v_mad_u64_u32 v[2:3], null, v1, s6, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v6, off
.LBB0_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z15gpu_matrix_multPfS_S_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z15gpu_matrix_multPfS_S_iii, .Lfunc_end0-_Z15gpu_matrix_multPfS_S_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 340
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z18shared_matrix_multPfS_S_iii ; -- Begin function _Z18shared_matrix_multPfS_S_iii
	.globl	_Z18shared_matrix_multPfS_S_iii
	.p2align	8
	.type	_Z18shared_matrix_multPfS_S_iii,@function
_Z18shared_matrix_multPfS_S_iii:        ; @_Z18shared_matrix_multPfS_S_iii
; %bb.0:
	s_clause 0x3
	s_load_b32 s12, s[0:1], 0x34
	s_load_b128 s[4:7], s[0:1], 0x18
	s_load_b128 s[8:11], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x10
	v_bfe_u32 v3, v0, 10, 10
	v_and_b32_e32 v4, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s0, s12, 16
	s_and_b32 s1, s12, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[0:1], null, s15, s0, v[3:4]
	v_mad_u64_u32 v[1:2], null, s14, s1, v[4:5]
	s_cmp_lt_i32 s5, 1
	v_cmp_gt_i32_e32 vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_cmp_gt_i32_e64 s0, s6, v1
	s_cbranch_scc1 .LBB1_11
; %bb.1:                                ; %.lr.ph
	v_lshlrev_b32_e32 v2, 2, v4
	v_dual_mov_b32 v6, 0 :: v_dual_lshlrev_b32 v7, 6, v3
	v_mul_lo_u32 v9, v0, s5
	s_mov_b32 s12, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v8, 0x400, v2
	v_add_nc_u32_e32 v10, v7, v2
	s_mov_b32 s7, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_mov_b32 v2, 0 :: v_dual_add_nc_u32 v11, v8, v7
.LBB1_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_9 Depth 2
	v_dual_mov_b32 v12, 0 :: v_dual_add_nc_u32 v5, s12, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_u32_e64 s1, s5, v5
	s_and_b32 s1, vcc_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s13, s1
	s_cbranch_execz .LBB1_4
; %bb.3:                                ;   in Loop: Header=BB1_2 Depth=1
	v_add_nc_u32_e32 v5, v5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[12:13], 2, v[5:6]
	v_add_co_u32 v12, s1, s8, v12
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v13, s1, s9, v13, s1
	global_load_b32 v12, v[12:13], off
.LBB1_4:                                ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
	v_mov_b32_e32 v5, 0
	s_waitcnt vmcnt(0)
	ds_store_b32 v10, v12
	s_and_saveexec_b32 s13, s0
	s_cbranch_execz .LBB1_8
; %bb.5:                                ;   in Loop: Header=BB1_2 Depth=1
	v_dual_mov_b32 v5, 0 :: v_dual_add_nc_u32 v12, s12, v3
	s_mov_b32 s12, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e64 s5, v12
	s_cbranch_execz .LBB1_7
; %bb.6:                                ;   in Loop: Header=BB1_2 Depth=1
	v_mad_u64_u32 v[13:14], null, v12, s6, v[1:2]
	v_mov_b32_e32 v14, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[12:13], 2, v[13:14]
	v_add_co_u32 v12, s1, s10, v12
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v13, s1, s11, v13, s1
	global_load_b32 v5, v[12:13], off
.LBB1_7:                                ; %Flow
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s12
.LBB1_8:                                ;   in Loop: Header=BB1_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s13
	s_waitcnt vmcnt(0)
	ds_store_b32 v11, v5
	v_mov_b32_e32 v5, v8
	s_mov_b32 s1, 0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB1_9:                                ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_nc_u32_e32 v12, s1, v7
	s_add_i32 s1, s1, 4
	ds_load_b32 v13, v5
	ds_load_b32 v12, v12
	v_add_nc_u32_e32 v5, 64, v5
	s_cmp_eq_u32 s1, 64
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v2, v12, v13
	s_cbranch_scc0 .LBB1_9
; %bb.10:                               ;   in Loop: Header=BB1_2 Depth=1
	s_add_i32 s7, s7, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b32 s12, s7, 4
	s_barrier
	s_cmp_ge_i32 s12, s5
	buffer_gl0_inv
	s_cbranch_scc0 .LBB1_2
	s_branch .LBB1_12
.LBB1_11:
	v_mov_b32_e32 v2, 0
.LBB1_12:                               ; %Flow77
	v_cmp_gt_i32_e32 vcc_lo, s4, v0
	v_cmp_gt_i32_e64 s0, s6, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s0
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_14
; %bb.13:
	v_mad_u64_u32 v[3:4], null, v0, s6, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[0:1], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB1_14:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z18shared_matrix_multPfS_S_iii
		.amdhsa_group_segment_fixed_size 2048
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 15
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z18shared_matrix_multPfS_S_iii, .Lfunc_end1-_Z18shared_matrix_multPfS_S_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 576
; NumSgprs: 18
; NumVgprs: 15
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 2048 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 15
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z15gpu_matrix_multPfS_S_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z15gpu_matrix_multPfS_S_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 2048
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z18shared_matrix_multPfS_S_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z18shared_matrix_multPfS_S_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     15
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
