#include <fstream>
#include <sstream>
#include <iostream>
#include <cuda.h>

#include <cmath>
#include <vector>

using namespace std;
const int T_P_B = 256;
const float PI = 3.14159265358979f;
/*
module purge
module load gcc/4.9.0
module load cmake/3.9.1
module load cuda

qsub -I -q coc-ice -l nodes=1:ppn=2:gpus=1,walltime=12:00:00,pmem=2gb

./p3 forward Tower256.txt out256.txt
*/

class gComplex {
public:
    __device__ __host__ gComplex() : real(0.0f), imag(0.0f) {}
    __device__ __host__ gComplex(float r, float i) : real(r), imag(i) {}
    __device__ __host__ gComplex(float r) : real(r), imag(0.0f) {}
    __device__ __host__ gComplex operator+(const gComplex& b) const {
        gComplex res;
        res.real = this->real + b.real;
        res.imag = this->imag + b.imag;

        return res;
    }
    __device__ __host__ gComplex operator-(const gComplex& b) const {
        gComplex res;
        res.real = this->real - b.real;
        res.imag = this->imag - b.imag;

        return res;
    }
    __device__ __host__ gComplex operator*(const gComplex& b) const {
        gComplex res;
        res.real = this->real * b.real - this->imag * b.imag;
        res.imag = this->real * b.imag + this->imag * b.real;

        return res;
    }

    __device__ __host__ gComplex mag() const {
        gComplex res;

        res.real = sqrt((this->real * this->real) + (this->imag * this->imag));
        res.imag = 0;

        return res;
    }
    __device__ __host__ gComplex angle() const {
        gComplex res;

        // (0, 0)
        if (this->real == 0 && this->imag == 0) {
            res.real = 0;
            res.imag = 0;
            return res;
        }

        float temp = this->imag / this->real;
        res.real = atan(temp);

        if (this->real < 0 && this->imag >= 0) { // 2nd quadrant
            res.real = res.real + PI;
        } else if (this->real < 0 && this->imag < 0) { // 3rd quadrant
            res.real = res.real - PI;
        } else if (this->real > 0 && this->imag < 0) { // 4th quadrant
            res.real = -1 * res.real;
        }
        res.imag = 0;

        return res;
    }
    __device__ __host__ gComplex conj() const {
        gComplex res;

        res.real = this->real;
        res.imag = -1 * this->imag;

        return res;
    }

    float real;
    float imag;
};

std::ostream& operator<<(std::ostream& os, const gComplex& rhs) {
    gComplex c(rhs);
    if(fabsf(rhs.imag) < 1e-10) c.imag = 0.0f;
    if(fabsf(rhs.real) < 1e-10) c.real = 0.0f;

    if(c.imag == 0) {
        os << c.real;
    }
    else {
        os << "(" << c.real << "," << c.imag << ")";
    }
    return os;
}

class InputImage {
public:

    InputImage(const char* filename) {
        std::ifstream ifs(filename);
        if(!ifs) {
            std::cout << "Can't open image file " << filename << std::endl;
            exit(1);
        }

        ifs >> w >> h;
        data = new gComplex[w * h];
        for(int r = 0; r < h; ++r) {
            for(int c = 0; c < w; ++c) {
                float real;
                ifs >> real;
                data[r * w + c] = gComplex(real);
            }
        }
    }
    int get_width() const {
        return w;
    }
    int get_height() const {
        return h;
    }

    //returns a pointer to the image data.  Note the return is a 1D
    //array which represents a 2D image.  The data for row 1 is
    //immediately following the data for row 0 in the 1D array
    gComplex* get_image_data() const {
        return data;
    }

    //use this to save output from forward DFT
    void save_image_data(const char* filename, gComplex* d, int w, int h) {
        std::ofstream ofs(filename);
        if(!ofs) {
            std::cout << "Can't create output image " << filename << std::endl;
            return;
        }

        ofs << w << " " << h << std::endl;

        for(int r = 0; r < h; ++r) {
            for(int c = 0; c < w; ++c) {
                ofs << d[r * w + c] << " ";
            }
            ofs << std::endl;
        }
    }
    //use this to save output from reverse DFT
    void save_image_data_real(const char* filename, gComplex* d, int w, int h) {
        std::ofstream ofs(filename);
        if(!ofs) {
            std::cout << "Can't create output image " << filename << std::endl;
            return;
        }

        ofs << w << " " << h << std::endl;

        for (int r = 0; r < h; ++r) {
            for (int c = 0; c < w; ++c) {
                ofs << d[r * w + c].real << " ";
            }
            ofs << std::endl;
        }
    }

private:
    int w;
    int h;
    gComplex* data;
};



void transpose(gComplex* arr, int size) {
    int n = sqrt(size);
    for(int i = 0; i < n; i++) {
        for(int j = i + 1; j < n; j++) {
            swap(arr[n * i + j], arr[n * j + i]);
        }
    }
}


__global__ void cudaDFT1D(gComplex* H, gComplex* h, int N) {
    int idx = threadIdx.x + blockIdx.x * blockDim.x;
    int col = idx % N;
    int row = idx / N;

    int start = row * N;

    for (int k = 0; k < N; k++) {
        gComplex W(cos(2 * PI * col * k / float(N)), -sin(2 * PI * col * k / float(N)));
        H[idx] = H[idx] + W * h[start + k];
    }
}

__global__ void cudaDFT1DCol(gComplex* H, gComplex* h, int N) {
    int idx = threadIdx.x + blockIdx.x * blockDim.x;
    int col = idx % N;
    int row = idx / N;

    int start = col;

    for (int k = 0; k < N; k++) {
        gComplex W(cos(2 * PI * row * k / float(N)), -sin(2 * PI * row * k / float(N)));
        H[idx] = H[idx] + W * h[start + N*k];
    }
}

void cudaDFT2D(InputImage inputImage, gComplex* h, int width, int height, string outputName) {

    int size = width * height;
    gComplex* d_H;
    gComplex* d_h;

    cudaMalloc((void **) &d_h, size * sizeof(gComplex));
    cudaMalloc((void **) &d_H, size * sizeof(gComplex));

    cudaMemcpy(d_h, h, size * sizeof(gComplex), cudaMemcpyHostToDevice);

    cudaDFT1D<<<size / T_P_B, T_P_B>>>(d_H, d_h, width);
    cudaDeviceSynchronize();

    gComplex* d_H2;
    cudaMalloc((void **) &d_H2, size * sizeof(gComplex));

    cudaDFT1DCol<<<size / T_P_B, T_P_B>>>(d_H2, d_H, height);
    cudaDeviceSynchronize();

    cudaMemcpy(h, d_H2, size * sizeof(gComplex), cudaMemcpyDeviceToHost);

    inputImage.save_image_data(outputName.c_str(), h, width, height);

    cudaFree(d_h);
    cudaFree(d_H);
    cudaFree(d_H2);
}


int main(int argc, char** argv) {

    string forward = argv[1];
    string inputName = argv[2];
    string outputName = argv[3];

    InputImage inputImage(inputName.c_str());

    int width = inputImage.get_width(); // N
    int height = inputImage.get_height();

    gComplex* h = inputImage.get_image_data();

    cudaDFT2D(inputImage, h, width, height, outputName);

    return 0;
}

	.file	"tmpxft_00290d39_00000000-6_main_cuda.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4216:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4216:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC3:
	.string	"("
.LC4:
	.string	","
.LC5:
	.string	")"
	.text
	.globl	_ZlsRSoRK8gComplex
	.type	_ZlsRSoRK8gComplex, @function
_ZlsRSoRK8gComplex:
.LFB4201:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	subq	$16, %rsp
	.cfi_def_cfa_offset 32
	movss	4(%rsi), %xmm1
	movsd	.LC2(%rip), %xmm4
	movss	.LC1(%rip), %xmm2
	movss	(%rsi), %xmm0
	movaps	%xmm1, %xmm3
	andps	%xmm2, %xmm3
	cvtss2sd	%xmm3, %xmm3
	comisd	%xmm3, %xmm4
	jbe	.L3
	xorps	%xmm1, %xmm1
.L3:
	andps	%xmm0, %xmm2
	cvtss2sd	%xmm2, %xmm2
	comisd	%xmm2, %xmm4
	jbe	.L4
	xorps	%xmm0, %xmm0
.L4:
	xorps	%xmm2, %xmm2
	cvtss2sd	%xmm0, %xmm0
	ucomiss	%xmm2, %xmm1
	jp	.L5
	jne	.L5
	movq	%rbx, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	jmp	.L7
.L5:
	leaq	.LC3(%rip), %rsi
	movq	%rbx, %rdi
	movss	%xmm1, 4(%rsp)
	movsd	%xmm0, 8(%rsp)
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	8(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC4(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movss	4(%rsp), %xmm1
	movq	%rax, %rdi
	cvtss2sd	%xmm1, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC5(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
.L7:
	addq	$16, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rax
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4201:
	.size	_ZlsRSoRK8gComplex, .-_ZlsRSoRK8gComplex
	.globl	_Z9transposeP8gComplexi
	.type	_Z9transposeP8gComplexi, @function
_Z9transposeP8gComplexi:
.LFB4210:
	.cfi_startproc
	endbr64
	cvtsi2sdl	%esi, %xmm0
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movq	%rdi, %rbx
	pushq	%rdx
	.cfi_def_cfa_offset 32
	call	sqrt@PLT
	xorl	%r8d, %r8d
	cvttsd2sil	%xmm0, %esi
	movslq	%esi, %rax
	leaq	8(,%rax,8), %r10
	xorl	%eax, %eax
	leaq	-8(%r10), %r11
	leaq	(%rbx,%r11), %rdi
.L14:
	cmpl	%eax, %esi
	jle	.L19
	movslq	%r8d, %rdx
	leal	1(%rax), %r9d
	movq	%rdi, %rcx
	addq	%rax, %rdx
	leaq	(%rbx,%rdx,8), %rdx
.L15:
	addq	$8, %rdx
	cmpl	%esi, %r9d
	je	.L20
	movq	(%rcx), %r14
	movss	(%rdx), %xmm1
	incl	%r9d
	movss	4(%rdx), %xmm0
	movq	%r14, (%rdx)
	movss	%xmm1, (%rcx)
	movss	%xmm0, 4(%rcx)
	addq	%r11, %rcx
	jmp	.L15
.L20:
	incq	%rax
	addq	%r10, %rdi
	addl	%esi, %r8d
	jmp	.L14
.L19:
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4210:
	.size	_Z9transposeP8gComplexi, .-_Z9transposeP8gComplexi
	.globl	_Z40__device_stub__Z9cudaDFT1DP8gComplexS0_iP8gComplexS0_i
	.type	_Z40__device_stub__Z9cudaDFT1DP8gComplexS0_iP8gComplexS0_i, @function
_Z40__device_stub__Z9cudaDFT1DP8gComplexS0_iP8gComplexS0_i:
.LFB4238:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L21
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z9cudaDFT1DP8gComplexS0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L21:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L23
	call	__stack_chk_fail@PLT
.L23:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4238:
	.size	_Z40__device_stub__Z9cudaDFT1DP8gComplexS0_iP8gComplexS0_i, .-_Z40__device_stub__Z9cudaDFT1DP8gComplexS0_iP8gComplexS0_i
	.globl	_Z9cudaDFT1DP8gComplexS0_i
	.type	_Z9cudaDFT1DP8gComplexS0_i, @function
_Z9cudaDFT1DP8gComplexS0_i:
.LFB4239:
	.cfi_startproc
	endbr64
	jmp	_Z40__device_stub__Z9cudaDFT1DP8gComplexS0_iP8gComplexS0_i
	.cfi_endproc
.LFE4239:
	.size	_Z9cudaDFT1DP8gComplexS0_i, .-_Z9cudaDFT1DP8gComplexS0_i
	.globl	_Z44__device_stub__Z12cudaDFT1DColP8gComplexS0_iP8gComplexS0_i
	.type	_Z44__device_stub__Z12cudaDFT1DColP8gComplexS0_iP8gComplexS0_i, @function
_Z44__device_stub__Z12cudaDFT1DColP8gComplexS0_iP8gComplexS0_i:
.LFB4240:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L26
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z12cudaDFT1DColP8gComplexS0_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L26:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L28
	call	__stack_chk_fail@PLT
.L28:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4240:
	.size	_Z44__device_stub__Z12cudaDFT1DColP8gComplexS0_iP8gComplexS0_i, .-_Z44__device_stub__Z12cudaDFT1DColP8gComplexS0_iP8gComplexS0_i
	.globl	_Z12cudaDFT1DColP8gComplexS0_i
	.type	_Z12cudaDFT1DColP8gComplexS0_i, @function
_Z12cudaDFT1DColP8gComplexS0_i:
.LFB4241:
	.cfi_startproc
	endbr64
	jmp	_Z44__device_stub__Z12cudaDFT1DColP8gComplexS0_iP8gComplexS0_i
	.cfi_endproc
.LFE4241:
	.size	_Z12cudaDFT1DColP8gComplexS0_i, .-_Z12cudaDFT1DColP8gComplexS0_i
	.section	.rodata.str1.1
.LC6:
	.string	"_Z12cudaDFT1DColP8gComplexS0_i"
.LC7:
	.string	"_Z9cudaDFT1DP8gComplexS0_i"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4243:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC6(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z12cudaDFT1DColP8gComplexS0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC7(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z9cudaDFT1DP8gComplexS0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4243:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.rodata._ZN10InputImageC2EPKc.str1.1,"aMS",@progbits,1
.LC8:
	.string	"Can't open image file "
	.section	.text._ZN10InputImageC2EPKc,"axG",@progbits,_ZN10InputImageC5EPKc,comdat
	.align 2
	.weak	_ZN10InputImageC2EPKc
	.type	_ZN10InputImageC2EPKc, @function
_ZN10InputImageC2EPKc:
.LFB4203:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA4203
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	$8, %edx
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%rsi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movq	%rdi, %rbx
	subq	$544, %rsp
	.cfi_def_cfa_offset 592
	movq	%fs:40, %rax
	movq	%rax, 536(%rsp)
	xorl	%eax, %eax
	leaq	16(%rsp), %r12
	movq	%r12, %rdi
.LEHB0:
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEEC1EPKcSt13_Ios_Openmode@PLT
.LEHE0:
	testb	$5, 304(%rsp)
	je	.L34
	leaq	.LC8(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
.LEHB1:
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	movq	%rbp, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	movl	$1, %edi
	call	exit@PLT
.L34:
	movq	%rbx, %rsi
	movq	%r12, %rdi
	call	_ZNSirsERi@PLT
	movq	%rax, %rdi
	leaq	4(%rbx), %rsi
	call	_ZNSirsERi@PLT
	movabsq	$1152921504606846975, %rax
	movl	(%rbx), %ebp
	imull	4(%rbx), %ebp
	movslq	%ebp, %rbp
	cmpq	%rbp, %rax
	jb	.L35
	salq	$3, %rbp
	movq	%rbp, %rdi
	call	_Znam@PLT
	addq	%rax, %rbp
	movq	%rax, %rdx
	jmp	.L38
.L35:
	movq	536(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L48
	call	__cxa_throw_bad_array_new_length@PLT
.L38:
	cmpq	%rbp, %rdx
	je	.L51
	movl	$0x00000000, (%rdx)
	addq	$8, %rdx
	movl	$0x00000000, -4(%rdx)
	jmp	.L38
.L51:
	movq	%rax, 8(%rbx)
	xorl	%ebp, %ebp
	leaq	12(%rsp), %r14
.L40:
	cmpl	%ebp, 4(%rbx)
	jle	.L52
	xorl	%r13d, %r13d
.L42:
	cmpl	%r13d, (%rbx)
	jle	.L53
	movq	%r14, %rsi
	movq	%r12, %rdi
	call	_ZNSi10_M_extractIfEERSiRT_@PLT
.LEHE1:
	movl	(%rbx), %eax
	movq	8(%rbx), %rdx
	movss	12(%rsp), %xmm0
	imull	%ebp, %eax
	addl	%r13d, %eax
	incl	%r13d
	cltq
	leaq	(%rdx,%rax,8), %rax
	movl	$0x00000000, 4(%rax)
	movss	%xmm0, (%rax)
	jmp	.L42
.L53:
	incl	%ebp
	jmp	.L40
.L52:
	movq	%r12, %rdi
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev@PLT
	movq	536(%rsp), %rax
	subq	%fs:40, %rax
	je	.L45
	jmp	.L48
.L47:
	endbr64
	movq	%rax, %rbx
.L43:
	movq	%r12, %rdi
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev@PLT
	movq	536(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L48
	movq	%rbx, %rdi
.LEHB2:
	call	_Unwind_Resume@PLT
.LEHE2:
.L48:
	call	__stack_chk_fail@PLT
.L45:
	addq	$544, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4203:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table._ZN10InputImageC2EPKc,"aG",@progbits,_ZN10InputImageC5EPKc,comdat
.LLSDA4203:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE4203-.LLSDACSB4203
.LLSDACSB4203:
	.uleb128 .LEHB0-.LFB4203
	.uleb128 .LEHE0-.LEHB0
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB1-.LFB4203
	.uleb128 .LEHE1-.LEHB1
	.uleb128 .L47-.LFB4203
	.uleb128 0
	.uleb128 .LEHB2-.LFB4203
	.uleb128 .LEHE2-.LEHB2
	.uleb128 0
	.uleb128 0
.LLSDACSE4203:
	.section	.text._ZN10InputImageC2EPKc,"axG",@progbits,_ZN10InputImageC5EPKc,comdat
	.size	_ZN10InputImageC2EPKc, .-_ZN10InputImageC2EPKc
	.weak	_ZN10InputImageC1EPKc
	.set	_ZN10InputImageC1EPKc,_ZN10InputImageC2EPKc
	.section	.rodata.str1.1
.LC9:
	.string	"Can't create output image "
.LC10:
	.string	" "
	.text
	.globl	_Z9cudaDFT2D10InputImageP8gComplexiiNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
	.type	_Z9cudaDFT2D10InputImageP8gComplexiiNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE, @function
_Z9cudaDFT2D10InputImageP8gComplexiiNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE:
.LFB4212:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA4212
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%r9, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%ecx, %r14d
	imull	%r8d, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rdx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%r8d, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movslq	%r14d, %r13
	movl	%ecx, %ebx
	salq	$3, %r13
	movq	%r13, %rsi
	subq	$600, %rsp
	.cfi_def_cfa_offset 656
	movq	%fs:40, %rax
	movq	%rax, 584(%rsp)
	xorl	%eax, %eax
	leaq	32(%rsp), %rdi
.LEHB3:
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movq	%r13, %rsi
	call	cudaMalloc@PLT
	movq	32(%rsp), %rdi
	movq	%r13, %rdx
	movq	%r12, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	%r14d, %eax
	movl	$256, %esi
	xorl	%r9d, %r9d
	cltd
	movl	$16777217, %ecx
	xorl	%r8d, %r8d
	movl	$1, 68(%rsp)
	idivl	%esi
	salq	$8, %rcx
	movq	%rcx, 60(%rsp)
	movq	%rcx, %rdx
	movl	$1, %ecx
	movl	%eax, 48(%rsp)
	movl	%eax, %r14d
	movabsq	$4294967297, %rax
	movq	%rax, 52(%rsp)
	movq	48(%rsp), %rdi
	movl	56(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L55
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdi
	movl	%ebx, %edx
	call	_Z40__device_stub__Z9cudaDFT1DP8gComplexS0_iP8gComplexS0_i
.L55:
	call	cudaDeviceSynchronize@PLT
	leaq	40(%rsp), %rdi
	movq	%r13, %rsi
	call	cudaMalloc@PLT
	movl	%r14d, 48(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	movl	$16777217, %edx
	movl	$1, %ecx
	movl	$1, 68(%rsp)
	movq	%rax, 52(%rsp)
	movq	48(%rsp), %rdi
	salq	$8, %rdx
	movl	56(%rsp), %esi
	movq	%rdx, 60(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L56
	movq	24(%rsp), %rsi
	movq	40(%rsp), %rdi
	movl	%ebp, %edx
	call	_Z44__device_stub__Z12cudaDFT1DColP8gComplexS0_iP8gComplexS0_i
.L56:
	call	cudaDeviceSynchronize@PLT
	movq	40(%rsp), %rsi
	movq	%r13, %rdx
	movq	%r12, %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movq	(%r15), %r13
	leaq	72(%rsp), %rax
	movl	$16, %edx
	movq	%rax, %rdi
	movq	%rax, (%rsp)
	movq	%r13, %rsi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1EPKcSt13_Ios_Openmode@PLT
.LEHE3:
	testb	$5, 352(%rsp)
	je	.L57
	leaq	.LC9(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
.LEHB4:
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	movq	%r13, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
.LEHE4:
.L60:
	movq	(%rsp), %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@PLT
	movq	32(%rsp), %rdi
.LEHB5:
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
.LEHE5:
	movq	584(%rsp), %rax
	subq	%fs:40, %rax
	je	.L64
	jmp	.L66
.L57:
	movq	(%rsp), %rdi
	movl	%ebx, %esi
.LEHB6:
	call	_ZNSolsEi@PLT
	movq	%rax, %rdi
	leaq	.LC10(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	movl	%ebp, %esi
	call	_ZNSolsEi@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	xorl	%r15d, %r15d
	xorl	%r14d, %r14d
.L58:
	cmpl	%r15d, %ebp
	jle	.L60
	movslq	%r14d, %rax
	xorl	%r13d, %r13d
	leaq	(%r12,%rax,8), %rax
	movq	%rax, 8(%rsp)
.L61:
	cmpl	%r13d, %ebx
	jle	.L68
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	call	_ZlsRSoRK8gComplex
	movq	%rax, %rdi
	leaq	.LC10(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	addq	$8, 8(%rsp)
	incl	%r13d
	jmp	.L61
.L68:
	movq	(%rsp), %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
.LEHE6:
	incl	%r15d
	addl	%ebx, %r14d
	jmp	.L58
.L65:
	endbr64
	movq	%rax, %rbx
.L62:
	movq	(%rsp), %rdi
	call	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev@PLT
	movq	584(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L66
	movq	%rbx, %rdi
.LEHB7:
	call	_Unwind_Resume@PLT
.LEHE7:
.L66:
	call	__stack_chk_fail@PLT
.L64:
	addq	$600, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4212:
	.section	.gcc_except_table,"a",@progbits
.LLSDA4212:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE4212-.LLSDACSB4212
.LLSDACSB4212:
	.uleb128 .LEHB3-.LFB4212
	.uleb128 .LEHE3-.LEHB3
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB4-.LFB4212
	.uleb128 .LEHE4-.LEHB4
	.uleb128 .L65-.LFB4212
	.uleb128 0
	.uleb128 .LEHB5-.LFB4212
	.uleb128 .LEHE5-.LEHB5
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB6-.LFB4212
	.uleb128 .LEHE6-.LEHB6
	.uleb128 .L65-.LFB4212
	.uleb128 0
	.uleb128 .LEHB7-.LFB4212
	.uleb128 .LEHE7-.LEHB7
	.uleb128 0
	.uleb128 0
.LLSDACSE4212:
	.text
	.size	_Z9cudaDFT2D10InputImageP8gComplexiiNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE, .-_Z9cudaDFT2D10InputImageP8gComplexiiNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
	.section	.rodata._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_.str1.1,"aMS",@progbits,1
.LC11:
	.string	"basic_string: construction from null is not valid"
	.section	.text._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_,"axG",@progbits,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC5IS3_EEPKcRKS3_,comdat
	.align 2
	.weak	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
	.type	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_, @function
_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_:
.LFB4582:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	movq	%fs:40, %rax
	movq	%rax, 8(%rsp)
	xorl	%eax, %eax
	leaq	16(%rdi), %rax
	movq	%rax, (%rdi)
	testq	%rsi, %rsi
	jne	.L70
	movq	8(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L75
	leaq	.LC11(%rip), %rdi
	call	_ZSt19__throw_logic_errorPKc@PLT
.L70:
	movq	%rdi, %rbx
	movq	%rsi, %rdi
	movq	%rsi, %rbp
	call	strlen@PLT
	movq	%rax, (%rsp)
	leaq	0(%rbp,%rax), %r12
	cmpq	$15, %rax
	jbe	.L72
	movq	%rsp, %rsi
	xorl	%edx, %edx
	movq	%rbx, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_createERmm@PLT
	movq	%rax, (%rbx)
	movq	(%rsp), %rax
	movq	%rax, 16(%rbx)
.L72:
	movq	(%rbx), %rdi
	movq	%r12, %rdx
	movq	%rbp, %rsi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE13_S_copy_charsEPcPKcS7_@PLT
	movq	(%rsp), %rax
	movq	(%rbx), %rdx
	movq	%rax, 8(%rbx)
	movb	$0, (%rdx,%rax)
	movq	8(%rsp), %rax
	subq	%fs:40, %rax
	je	.L73
.L75:
	call	__stack_chk_fail@PLT
.L73:
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4582:
	.size	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_, .-_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
	.weak	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_
	.set	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB4213:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA4213
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rsi, %rbx
	subq	$184, %rsp
	.cfi_def_cfa_offset 240
	movq	8(%rsi), %rsi
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rbp
	leaq	40(%rsp), %rax
	movq	%rbp, %rdx
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
	leaq	72(%rsp), %r12
.LEHB8:
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_
.LEHE8:
	movq	16(%rbx), %rsi
	movq	%rbp, %rdx
	movq	%r12, %rdi
.LEHB9:
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_
.LEHE9:
	movq	24(%rbx), %rsi
	leaq	104(%rsp), %rbx
	movq	%rbp, %rdx
	movq	%rbx, %rdi
.LEHB10:
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_
.LEHE10:
	movq	72(%rsp), %rsi
	movq	%rbp, %rdi
.LEHB11:
	call	_ZN10InputImageC1EPKc
	leaq	136(%rsp), %rbp
	movq	%rbx, %rsi
	movl	24(%rsp), %r14d
	movl	28(%rsp), %r15d
	movq	%rbp, %rdi
	movq	32(%rsp), %r13
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1ERKS4_@PLT
.LEHE11:
	movq	24(%rsp), %rdi
	movq	32(%rsp), %rsi
	movq	%rbp, %r9
	movl	%r15d, %r8d
	movl	%r14d, %ecx
	movq	%r13, %rdx
.LEHB12:
	call	_Z9cudaDFT2D10InputImageP8gComplexiiNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
.LEHE12:
	movq	%rbp, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	%rbx, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	%r12, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	8(%rsp), %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L82
	jmp	.L87
.L86:
	endbr64
	movq	%rax, %r13
.L77:
	movq	%rbp, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	jmp	.L78
.L85:
	endbr64
	movq	%rax, %r13
.L78:
	movq	%rbx, %rdi
	movq	%r13, %rbx
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	jmp	.L79
.L84:
	endbr64
	movq	%rax, %rbx
.L79:
	movq	%r12, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	jmp	.L80
.L83:
	endbr64
	movq	%rax, %rbx
.L80:
	movq	8(%rsp), %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L87
	movq	%rbx, %rdi
.LEHB13:
	call	_Unwind_Resume@PLT
.LEHE13:
.L87:
	call	__stack_chk_fail@PLT
.L82:
	addq	$184, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4213:
	.section	.gcc_except_table
.LLSDA4213:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE4213-.LLSDACSB4213
.LLSDACSB4213:
	.uleb128 .LEHB8-.LFB4213
	.uleb128 .LEHE8-.LEHB8
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB9-.LFB4213
	.uleb128 .LEHE9-.LEHB9
	.uleb128 .L83-.LFB4213
	.uleb128 0
	.uleb128 .LEHB10-.LFB4213
	.uleb128 .LEHE10-.LEHB10
	.uleb128 .L84-.LFB4213
	.uleb128 0
	.uleb128 .LEHB11-.LFB4213
	.uleb128 .LEHE11-.LEHB11
	.uleb128 .L85-.LFB4213
	.uleb128 0
	.uleb128 .LEHB12-.LFB4213
	.uleb128 .LEHE12-.LEHB12
	.uleb128 .L86-.LFB4213
	.uleb128 0
	.uleb128 .LEHB13-.LFB4213
	.uleb128 .LEHE13-.LEHB13
	.uleb128 0
	.uleb128 0
.LLSDACSE4213:
	.section	.text.startup
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst16,"aM",@progbits,16
	.align 16
.LC1:
	.long	2147483647
	.long	0
	.long	0
	.long	0
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC2:
	.long	-640172613
	.long	1037794527
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <fstream>
#include <sstream>
#include <iostream>
#include <hip/hip_runtime.h>

#include <cmath>
#include <vector>

using namespace std;
const int T_P_B = 256;
const float PI = 3.14159265358979f;
/*
module purge
module load gcc/4.9.0
module load cmake/3.9.1
module load cuda

qsub -I -q coc-ice -l nodes=1:ppn=2:gpus=1,walltime=12:00:00,pmem=2gb

./p3 forward Tower256.txt out256.txt
*/

class gComplex {
public:
    __device__ __host__ gComplex() : real(0.0f), imag(0.0f) {}
    __device__ __host__ gComplex(float r, float i) : real(r), imag(i) {}
    __device__ __host__ gComplex(float r) : real(r), imag(0.0f) {}
    __device__ __host__ gComplex operator+(const gComplex& b) const {
        gComplex res;
        res.real = this->real + b.real;
        res.imag = this->imag + b.imag;

        return res;
    }
    __device__ __host__ gComplex operator-(const gComplex& b) const {
        gComplex res;
        res.real = this->real - b.real;
        res.imag = this->imag - b.imag;

        return res;
    }
    __device__ __host__ gComplex operator*(const gComplex& b) const {
        gComplex res;
        res.real = this->real * b.real - this->imag * b.imag;
        res.imag = this->real * b.imag + this->imag * b.real;

        return res;
    }

    __device__ __host__ gComplex mag() const {
        gComplex res;

        res.real = sqrt((this->real * this->real) + (this->imag * this->imag));
        res.imag = 0;

        return res;
    }
    __device__ __host__ gComplex angle() const {
        gComplex res;

        // (0, 0)
        if (this->real == 0 && this->imag == 0) {
            res.real = 0;
            res.imag = 0;
            return res;
        }

        float temp = this->imag / this->real;
        res.real = atan(temp);

        if (this->real < 0 && this->imag >= 0) { // 2nd quadrant
            res.real = res.real + PI;
        } else if (this->real < 0 && this->imag < 0) { // 3rd quadrant
            res.real = res.real - PI;
        } else if (this->real > 0 && this->imag < 0) { // 4th quadrant
            res.real = -1 * res.real;
        }
        res.imag = 0;

        return res;
    }
    __device__ __host__ gComplex conj() const {
        gComplex res;

        res.real = this->real;
        res.imag = -1 * this->imag;

        return res;
    }

    float real;
    float imag;
};

std::ostream& operator<<(std::ostream& os, const gComplex& rhs) {
    gComplex c(rhs);
    if(fabsf(rhs.imag) < 1e-10) c.imag = 0.0f;
    if(fabsf(rhs.real) < 1e-10) c.real = 0.0f;

    if(c.imag == 0) {
        os << c.real;
    }
    else {
        os << "(" << c.real << "," << c.imag << ")";
    }
    return os;
}

class InputImage {
public:

    InputImage(const char* filename) {
        std::ifstream ifs(filename);
        if(!ifs) {
            std::cout << "Can't open image file " << filename << std::endl;
            exit(1);
        }

        ifs >> w >> h;
        data = new gComplex[w * h];
        for(int r = 0; r < h; ++r) {
            for(int c = 0; c < w; ++c) {
                float real;
                ifs >> real;
                data[r * w + c] = gComplex(real);
            }
        }
    }
    int get_width() const {
        return w;
    }
    int get_height() const {
        return h;
    }

    //returns a pointer to the image data.  Note the return is a 1D
    //array which represents a 2D image.  The data for row 1 is
    //immediately following the data for row 0 in the 1D array
    gComplex* get_image_data() const {
        return data;
    }

    //use this to save output from forward DFT
    void save_image_data(const char* filename, gComplex* d, int w, int h) {
        std::ofstream ofs(filename);
        if(!ofs) {
            std::cout << "Can't create output image " << filename << std::endl;
            return;
        }

        ofs << w << " " << h << std::endl;

        for(int r = 0; r < h; ++r) {
            for(int c = 0; c < w; ++c) {
                ofs << d[r * w + c] << " ";
            }
            ofs << std::endl;
        }
    }
    //use this to save output from reverse DFT
    void save_image_data_real(const char* filename, gComplex* d, int w, int h) {
        std::ofstream ofs(filename);
        if(!ofs) {
            std::cout << "Can't create output image " << filename << std::endl;
            return;
        }

        ofs << w << " " << h << std::endl;

        for (int r = 0; r < h; ++r) {
            for (int c = 0; c < w; ++c) {
                ofs << d[r * w + c].real << " ";
            }
            ofs << std::endl;
        }
    }

private:
    int w;
    int h;
    gComplex* data;
};



void transpose(gComplex* arr, int size) {
    int n = sqrt(size);
    for(int i = 0; i < n; i++) {
        for(int j = i + 1; j < n; j++) {
            swap(arr[n * i + j], arr[n * j + i]);
        }
    }
}


__global__ void cudaDFT1D(gComplex* H, gComplex* h, int N) {
    int idx = threadIdx.x + blockIdx.x * blockDim.x;
    int col = idx % N;
    int row = idx / N;

    int start = row * N;

    for (int k = 0; k < N; k++) {
        gComplex W(cos(2 * PI * col * k / float(N)), -sin(2 * PI * col * k / float(N)));
        H[idx] = H[idx] + W * h[start + k];
    }
}

__global__ void cudaDFT1DCol(gComplex* H, gComplex* h, int N) {
    int idx = threadIdx.x + blockIdx.x * blockDim.x;
    int col = idx % N;
    int row = idx / N;

    int start = col;

    for (int k = 0; k < N; k++) {
        gComplex W(cos(2 * PI * row * k / float(N)), -sin(2 * PI * row * k / float(N)));
        H[idx] = H[idx] + W * h[start + N*k];
    }
}

void cudaDFT2D(InputImage inputImage, gComplex* h, int width, int height, string outputName) {

    int size = width * height;
    gComplex* d_H;
    gComplex* d_h;

    hipMalloc((void **) &d_h, size * sizeof(gComplex));
    hipMalloc((void **) &d_H, size * sizeof(gComplex));

    hipMemcpy(d_h, h, size * sizeof(gComplex), hipMemcpyHostToDevice);

    cudaDFT1D<<<size / T_P_B, T_P_B>>>(d_H, d_h, width);
    hipDeviceSynchronize();

    gComplex* d_H2;
    hipMalloc((void **) &d_H2, size * sizeof(gComplex));

    cudaDFT1DCol<<<size / T_P_B, T_P_B>>>(d_H2, d_H, height);
    hipDeviceSynchronize();

    hipMemcpy(h, d_H2, size * sizeof(gComplex), hipMemcpyDeviceToHost);

    inputImage.save_image_data(outputName.c_str(), h, width, height);

    hipFree(d_h);
    hipFree(d_H);
    hipFree(d_H2);
}


int main(int argc, char** argv) {

    string forward = argv[1];
    string inputName = argv[2];
    string outputName = argv[3];

    InputImage inputImage(inputName.c_str());

    int width = inputImage.get_width(); // N
    int height = inputImage.get_height();

    gComplex* h = inputImage.get_image_data();

    cudaDFT2D(inputImage, h, width, height, outputName);

    return 0;
}

	.text
	.file	"main_cuda.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function _ZlsRSoRK8gComplex
.LCPI0_0:
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.long	0x7fffffff                      # float NaN
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI0_1:
	.quad	0x3ddb7cdfd9d7bdbb              # double 1.0E-10
	.text
	.globl	_ZlsRSoRK8gComplex
	.type	_ZlsRSoRK8gComplex,@function
_ZlsRSoRK8gComplex:                     # @_ZlsRSoRK8gComplex
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movq	%rdi, %rbx
	movss	(%rsi), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	movss	4(%rsi), %xmm4                  # xmm4 = mem[0],zero,zero,zero
	movaps	.LCPI0_0(%rip), %xmm2           # xmm2 = [NaN,NaN,NaN,NaN]
	movaps	%xmm4, %xmm1
	andps	%xmm2, %xmm1
	cvtss2sd	%xmm1, %xmm1
	movsd	.LCPI0_1(%rip), %xmm3           # xmm3 = mem[0],zero
	ucomisd	%xmm1, %xmm3
	xorps	%xmm1, %xmm1
	xorps	%xmm5, %xmm5
	ja	.LBB0_2
# %bb.1:
	movaps	%xmm4, %xmm5
.LBB0_2:
	andps	%xmm0, %xmm2
	cvtss2sd	%xmm2, %xmm2
	ucomisd	%xmm2, %xmm3
	xorps	%xmm2, %xmm2
	ja	.LBB0_4
# %bb.3:
	movaps	%xmm0, %xmm2
.LBB0_4:
	ucomiss	%xmm1, %xmm5
	jne	.LBB0_6
	jp	.LBB0_6
# %bb.5:
	xorps	%xmm0, %xmm0
	cvtss2sd	%xmm2, %xmm0
	movq	%rbx, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	jmp	.LBB0_7
.LBB0_6:
	movl	$.L.str, %esi
	movl	$1, %edx
	movq	%rbx, %rdi
	movss	%xmm5, 4(%rsp)                  # 4-byte Spill
	movss	%xmm2, (%rsp)                   # 4-byte Spill
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rsp), %xmm0                   # 4-byte Folded Reload
	movq	%rbx, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r14
	movl	$.L.str.1, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	cvtss2sd	4(%rsp), %xmm0                  # 4-byte Folded Reload
	movq	%r14, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.2, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.LBB0_7:
	movq	%rbx, %rax
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_ZlsRSoRK8gComplex, .Lfunc_end0-_ZlsRSoRK8gComplex
	.cfi_endproc
                                        # -- End function
	.globl	_Z9transposeP8gComplexi         # -- Begin function _Z9transposeP8gComplexi
	.type	_Z9transposeP8gComplexi,@function
_Z9transposeP8gComplexi:                # @_Z9transposeP8gComplexi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	cvtsi2sd	%esi, %xmm0
	movq	%rdi, %rbx
	xorpd	%xmm1, %xmm1
	ucomisd	%xmm1, %xmm0
	jb	.LBB1_2
# %bb.1:
	sqrtsd	%xmm0, %xmm0
	jmp	.LBB1_3
.LBB1_2:                                # %call.sqrt
	callq	sqrt
.LBB1_3:                                # %.split
	cvttsd2si	%xmm0, %eax
	testl	%eax, %eax
	jle	.LBB1_9
# %bb.4:                                # %.lr.ph19.preheader
	movl	%eax, %ecx
	leaq	(,%rcx,8), %rdx
	leaq	(%rbx,%rcx,8), %rsi
	leaq	8(,%rcx,8), %rdi
	xorl	%r8d, %r8d
	movq	%rcx, %r9
	xorl	%r10d, %r10d
.LBB1_6:                                # %.lr.ph19
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_8 Depth 2
	incq	%r10
	cmpq	%rcx, %r10
	jae	.LBB1_5
# %bb.7:                                # %.lr.ph
                                        #   in Loop: Header=BB1_6 Depth=1
	movl	%r8d, %r11d
	leaq	(%rbx,%r11,8), %r11
	movl	$1, %r14d
	movq	%rsi, %r15
.LBB1_8:                                #   Parent Loop BB1_6 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	(%r11,%r14,8), %r12
	movq	(%r15), %r13
	movq	%r13, (%r11,%r14,8)
	movq	%r12, (%r15)
	incq	%r14
	addq	%rdx, %r15
	cmpq	%r14, %r9
	jne	.LBB1_8
.LBB1_5:                                # %.loopexit
                                        #   in Loop: Header=BB1_6 Depth=1
	addq	$8, %rbx
	addl	%eax, %r8d
	addq	%rdi, %rsi
	decq	%r9
	cmpq	%rcx, %r10
	jne	.LBB1_6
.LBB1_9:                                # %._crit_edge
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z9transposeP8gComplexi, .Lfunc_end1-_Z9transposeP8gComplexi
	.cfi_endproc
                                        # -- End function
	.globl	_Z24__device_stub__cudaDFT1DP8gComplexS0_i # -- Begin function _Z24__device_stub__cudaDFT1DP8gComplexS0_i
	.type	_Z24__device_stub__cudaDFT1DP8gComplexS0_i,@function
_Z24__device_stub__cudaDFT1DP8gComplexS0_i: # @_Z24__device_stub__cudaDFT1DP8gComplexS0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9cudaDFT1DP8gComplexS0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z24__device_stub__cudaDFT1DP8gComplexS0_i, .Lfunc_end2-_Z24__device_stub__cudaDFT1DP8gComplexS0_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__cudaDFT1DColP8gComplexS0_i # -- Begin function _Z27__device_stub__cudaDFT1DColP8gComplexS0_i
	.type	_Z27__device_stub__cudaDFT1DColP8gComplexS0_i,@function
_Z27__device_stub__cudaDFT1DColP8gComplexS0_i: # @_Z27__device_stub__cudaDFT1DColP8gComplexS0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12cudaDFT1DColP8gComplexS0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z27__device_stub__cudaDFT1DColP8gComplexS0_i, .Lfunc_end3-_Z27__device_stub__cudaDFT1DColP8gComplexS0_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z9cudaDFT2D10InputImageP8gComplexiiNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE # -- Begin function _Z9cudaDFT2D10InputImageP8gComplexiiNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
	.type	_Z9cudaDFT2D10InputImageP8gComplexiiNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE,@function
_Z9cudaDFT2D10InputImageP8gComplexiiNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE: # @_Z9cudaDFT2D10InputImageP8gComplexiiNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 32(%rsp)                   # 8-byte Spill
	movl	%r8d, %ebx
	movl	%ecx, %ebp
	movq	%rdx, %r14
	movq	%rdi, 40(%rsp)
	movq	%rsi, 48(%rsp)
	movl	%r8d, %eax
	imull	%ecx, %eax
	movslq	%eax, %r13
	leaq	(,%r13,8), %r12
	leaq	24(%rsp), %r15
	movq	%r15, %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	movq	(%r15), %rdi
	movq	%r14, %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leal	255(%r13), %eax
	testl	%r13d, %r13d
	cmovnsl	%r13d, %eax
	movabsq	$4294967552, %r13               # imm = 0x100000100
	sarl	$8, %eax
	leaq	(%rax,%r13), %r15
	addq	$-256, %r15
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_2
# %bb.1:
	movq	16(%rsp), %rdi
	movq	24(%rsp), %rsi
	movl	%ebp, %edx
	callq	_Z24__device_stub__cudaDFT1DP8gComplexS0_i
.LBB4_2:
	callq	hipDeviceSynchronize
	leaq	8(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_4
# %bb.3:
	movq	8(%rsp), %rdi
	movq	16(%rsp), %rsi
	movl	%ebx, %edx
	callq	_Z27__device_stub__cudaDFT1DColP8gComplexS0_i
.LBB4_4:
	callq	hipDeviceSynchronize
	movq	8(%rsp), %rsi
	movq	%r14, %rdi
	movq	%r12, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	32(%rsp), %rax                  # 8-byte Reload
	movq	(%rax), %rsi
	leaq	40(%rsp), %rdi
	movq	%r14, %rdx
	movl	%ebp, %ecx
	movl	%ebx, %r8d
	callq	_ZN10InputImage15save_image_dataEPKcP8gComplexii
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z9cudaDFT2D10InputImageP8gComplexiiNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE, .Lfunc_end4-_Z9cudaDFT2D10InputImageP8gComplexiiNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN10InputImage15save_image_dataEPKcP8gComplexii,"axG",@progbits,_ZN10InputImage15save_image_dataEPKcP8gComplexii,comdat
	.weak	_ZN10InputImage15save_image_dataEPKcP8gComplexii # -- Begin function _ZN10InputImage15save_image_dataEPKcP8gComplexii
	.p2align	1, 0x90
	.type	_ZN10InputImage15save_image_dataEPKcP8gComplexii,@function
_ZN10InputImage15save_image_dataEPKcP8gComplexii: # @_ZN10InputImage15save_image_dataEPKcP8gComplexii
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$536, %rsp                      # imm = 0x218
	.cfi_def_cfa_offset 592
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r8d, %ebp
	movl	%ecx, %ebx
	movq	%rdx, %r14
	movq	%rsi, %r15
	leaq	24(%rsp), %r12
	movq	%r12, %rdi
	movl	$16, %edx
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEEC1EPKcSt13_Ios_Openmode
	movq	(%r12), %rax
	movq	-24(%rax), %rax
	testb	$5, 56(%rsp,%rax)
	je	.LBB5_8
# %bb.1:
.Ltmp0:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.3, %esi
	movl	$26, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp1:
# %bb.2:                                # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
	testq	%r15, %r15
	je	.LBB5_3
# %bb.4:
	movq	%r15, %rdi
	callq	strlen
.Ltmp2:
	movl	$_ZSt4cout, %edi
	movq	%r15, %rsi
	movq	%rax, %rdx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp3:
	jmp	.LBB5_5
.LBB5_8:
.Ltmp12:
	movq	%r14, 8(%rsp)                   # 8-byte Spill
	leaq	24(%rsp), %r15
	movq	%r15, %rdi
	movl	%ebx, %esi
	callq	_ZNSolsEi
.Ltmp13:
# %bb.9:
.Ltmp14:
	movq	%rax, %r12
	movl	$.L.str.4, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp15:
# %bb.10:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit28
.Ltmp16:
	movq	%r12, %rdi
	movl	%ebp, %esi
	callq	_ZNSolsEi
.Ltmp17:
# %bb.11:
	movq	%rax, %r12
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%r12, %rdi
.Ltmp18:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp19:
# %bb.12:                               # %.noexc38
.Ltmp20:
	movsbl	%al, %esi
	movq	%r12, %rdi
	callq	_ZNSo3putEc
.Ltmp21:
# %bb.13:                               # %.noexc39
.Ltmp22:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp23:
# %bb.14:                               # %_ZNSolsEPFRSoS_E.exit30.preheader
	testl	%ebp, %ebp
	jle	.LBB5_25
# %bb.15:                               # %.preheader.lr.ph
	movl	%ebp, %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	%ebx, %eax
	movq	%rax, (%rsp)                    # 8-byte Spill
	xorl	%r14d, %r14d
	xorl	%ebp, %ebp
.LBB5_16:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB5_18 Depth 2
	testl	%ebx, %ebx
	jle	.LBB5_21
# %bb.17:                               #   in Loop: Header=BB5_16 Depth=1
	movl	%r14d, %eax
	movq	8(%rsp), %rcx                   # 8-byte Reload
	leaq	(%rcx,%rax,8), %r12
	movq	(%rsp), %r13                    # 8-byte Reload
.LBB5_18:                               #   Parent Loop BB5_16 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
.Ltmp25:
	movq	%r15, %rdi
	movq	%r12, %rsi
	callq	_ZlsRSoRK8gComplex
.Ltmp26:
# %bb.19:                               #   in Loop: Header=BB5_18 Depth=2
.Ltmp27:
	movl	$.L.str.4, %esi
	movl	$1, %edx
	movq	%r15, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp28:
# %bb.20:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit34
                                        #   in Loop: Header=BB5_18 Depth=2
	addq	$8, %r12
	decq	%r13
	jne	.LBB5_18
.LBB5_21:                               # %._crit_edge
                                        #   in Loop: Header=BB5_16 Depth=1
	movq	24(%rsp), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
.Ltmp30:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp31:
# %bb.22:                               # %.noexc42
                                        #   in Loop: Header=BB5_16 Depth=1
.Ltmp32:
	movsbl	%al, %esi
	movq	%r15, %rdi
	callq	_ZNSo3putEc
.Ltmp33:
# %bb.23:                               # %.noexc43
                                        #   in Loop: Header=BB5_16 Depth=1
.Ltmp34:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp35:
# %bb.24:                               # %_ZNSolsEPFRSoS_E.exit32
                                        #   in Loop: Header=BB5_16 Depth=1
	incq	%rbp
	addl	%ebx, %r14d
	cmpq	16(%rsp), %rbp                  # 8-byte Folded Reload
	jne	.LBB5_16
	jmp	.LBB5_25
.LBB5_3:
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rax
	leaq	_ZSt4cout(%rax), %rdi
	movl	32(%rdi), %esi
	orl	$1, %esi
.Ltmp4:
	callq	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.Ltmp5:
.LBB5_5:                                # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit25
	movq	_ZSt4cout(%rip), %rax
	movl	$_ZSt4cout, %edi
	addq	-24(%rax), %rdi
.Ltmp6:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp7:
# %bb.6:                                # %.noexc35
.Ltmp8:
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
.Ltmp9:
# %bb.7:                                # %.noexc36
.Ltmp10:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp11:
.LBB5_25:                               # %_ZNSolsEPFRSoS_E.exit
	movq	_ZTTSt14basic_ofstreamIcSt11char_traitsIcEE(%rip), %rax
	leaq	32(%rsp), %rdi
	movq	%rax, -8(%rdi)
	movq	_ZTTSt14basic_ofstreamIcSt11char_traitsIcEE+24(%rip), %rcx
	movq	-24(%rax), %rax
	movq	%rcx, 24(%rsp,%rax)
	callq	_ZNSt13basic_filebufIcSt11char_traitsIcEED2Ev
	leaq	272(%rsp), %rdi
	callq	_ZNSt8ios_baseD2Ev
	addq	$536, %rsp                      # imm = 0x218
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB5_26:
	.cfi_def_cfa_offset 592
.Ltmp24:
	jmp	.LBB5_27
.LBB5_29:
.Ltmp36:
	jmp	.LBB5_27
.LBB5_28:
.Ltmp29:
.LBB5_27:
	movq	%rax, %rbx
	leaq	24(%rsp), %rdi
	callq	_ZNSt14basic_ofstreamIcSt11char_traitsIcEED1Ev
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end5:
	.size	_ZN10InputImage15save_image_dataEPKcP8gComplexii, .Lfunc_end5-_ZN10InputImage15save_image_dataEPKcP8gComplexii
	.cfi_endproc
	.section	.gcc_except_table._ZN10InputImage15save_image_dataEPKcP8gComplexii,"aG",@progbits,_ZN10InputImage15save_image_dataEPKcP8gComplexii,comdat
	.p2align	2, 0x0
GCC_except_table5:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Lfunc_begin0-.Lfunc_begin0    # >> Call Site 1 <<
	.uleb128 .Ltmp0-.Lfunc_begin0           #   Call between .Lfunc_begin0 and .Ltmp0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 2 <<
	.uleb128 .Ltmp23-.Ltmp0                 #   Call between .Ltmp0 and .Ltmp23
	.uleb128 .Ltmp24-.Lfunc_begin0          #     jumps to .Ltmp24
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp25-.Lfunc_begin0          # >> Call Site 3 <<
	.uleb128 .Ltmp28-.Ltmp25                #   Call between .Ltmp25 and .Ltmp28
	.uleb128 .Ltmp29-.Lfunc_begin0          #     jumps to .Ltmp29
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp30-.Lfunc_begin0          # >> Call Site 4 <<
	.uleb128 .Ltmp35-.Ltmp30                #   Call between .Ltmp30 and .Ltmp35
	.uleb128 .Ltmp36-.Lfunc_begin0          #     jumps to .Ltmp36
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp4-.Lfunc_begin0           # >> Call Site 5 <<
	.uleb128 .Ltmp11-.Ltmp4                 #   Call between .Ltmp4 and .Ltmp11
	.uleb128 .Ltmp24-.Lfunc_begin0          #     jumps to .Ltmp24
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp11-.Lfunc_begin0          # >> Call Site 6 <<
	.uleb128 .Lfunc_end5-.Ltmp11            #   Call between .Ltmp11 and .Lfunc_end5
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.p2align	2, 0x0
                                        # -- End function
	.text
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
.Lfunc_begin1:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception1
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %rbx
	movq	8(%rsi), %rsi
	leaq	112(%rsp), %rdi
	leaq	80(%rsp), %rdx
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
	movq	16(%rbx), %rsi
.Ltmp37:
	leaq	80(%rsp), %rdi
	leaq	16(%rsp), %rdx
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
.Ltmp38:
# %bb.1:
	movq	24(%rbx), %rsi
.Ltmp40:
	leaq	16(%rsp), %rdi
	movq	%rsp, %rdx
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
.Ltmp41:
# %bb.2:
	movq	80(%rsp), %rsi
.Ltmp43:
	movq	%rsp, %rdi
	callq	_ZN10InputImageC2EPKc
.Ltmp44:
# %bb.3:
	movl	(%rsp), %ebx
	movl	4(%rsp), %ebp
	movq	8(%rsp), %r14
	movq	(%rsp), %r15
	leaq	64(%rsp), %r12
	movq	%r12, -16(%r12)
	movq	16(%rsp), %rsi
	movq	24(%rsp), %rdx
	addq	%rsi, %rdx
.Ltmp46:
	leaq	48(%rsp), %rdi
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag
.Ltmp47:
# %bb.4:                                # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2ERKS4_.exit
.Ltmp49:
	leaq	48(%rsp), %r9
	movq	%r15, %rdi
	movq	%r14, %rsi
	movq	%r14, %rdx
	movl	%ebx, %ecx
	movl	%ebp, %r8d
	callq	_Z9cudaDFT2D10InputImageP8gComplexiiNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
.Ltmp50:
# %bb.5:
	movq	48(%rsp), %rdi
	cmpq	%r12, %rdi
	je	.LBB6_7
# %bb.6:                                # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i
	callq	_ZdlPv
.LBB6_7:                                # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit
	leaq	32(%rsp), %rax
	movq	-16(%rax), %rdi
	cmpq	%rax, %rdi
	je	.LBB6_9
# %bb.8:                                # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i18
	callq	_ZdlPv
.LBB6_9:                                # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit20
	leaq	96(%rsp), %rax
	movq	-16(%rax), %rdi
	cmpq	%rax, %rdi
	je	.LBB6_11
# %bb.10:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i21
	callq	_ZdlPv
.LBB6_11:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit23
	leaq	128(%rsp), %rax
	movq	-16(%rax), %rdi
	cmpq	%rax, %rdi
	je	.LBB6_13
# %bb.12:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i24
	callq	_ZdlPv
.LBB6_13:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit26
	xorl	%eax, %eax
	addq	$144, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB6_14:
	.cfi_def_cfa_offset 192
.Ltmp51:
	movq	%rax, %rbx
	movq	48(%rsp), %rdi
	cmpq	%r12, %rdi
	je	.LBB6_19
# %bb.15:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i27
	callq	_ZdlPv
	jmp	.LBB6_19
.LBB6_16:
.Ltmp48:
	jmp	.LBB6_18
.LBB6_17:
.Ltmp45:
.LBB6_18:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit29
	movq	%rax, %rbx
.LBB6_19:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit29
	leaq	32(%rsp), %rax
	movq	-16(%rax), %rdi
	cmpq	%rax, %rdi
	je	.LBB6_22
# %bb.20:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i30
	callq	_ZdlPv
	jmp	.LBB6_22
.LBB6_21:
.Ltmp42:
	movq	%rax, %rbx
.LBB6_22:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit32
	leaq	96(%rsp), %rax
	movq	-16(%rax), %rdi
	cmpq	%rax, %rdi
	je	.LBB6_25
# %bb.23:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i33
	callq	_ZdlPv
	jmp	.LBB6_25
.LBB6_24:
.Ltmp39:
	movq	%rax, %rbx
.LBB6_25:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit35
	leaq	128(%rsp), %rax
	movq	-16(%rax), %rdi
	cmpq	%rax, %rdi
	je	.LBB6_27
# %bb.26:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i36
	callq	_ZdlPv
.LBB6_27:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit38
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end6:
	.size	main, .Lfunc_end6-main
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table6:
.Lexception1:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end1-.Lcst_begin1
.Lcst_begin1:
	.uleb128 .Lfunc_begin1-.Lfunc_begin1    # >> Call Site 1 <<
	.uleb128 .Ltmp37-.Lfunc_begin1          #   Call between .Lfunc_begin1 and .Ltmp37
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp37-.Lfunc_begin1          # >> Call Site 2 <<
	.uleb128 .Ltmp38-.Ltmp37                #   Call between .Ltmp37 and .Ltmp38
	.uleb128 .Ltmp39-.Lfunc_begin1          #     jumps to .Ltmp39
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp40-.Lfunc_begin1          # >> Call Site 3 <<
	.uleb128 .Ltmp41-.Ltmp40                #   Call between .Ltmp40 and .Ltmp41
	.uleb128 .Ltmp42-.Lfunc_begin1          #     jumps to .Ltmp42
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp43-.Lfunc_begin1          # >> Call Site 4 <<
	.uleb128 .Ltmp44-.Ltmp43                #   Call between .Ltmp43 and .Ltmp44
	.uleb128 .Ltmp45-.Lfunc_begin1          #     jumps to .Ltmp45
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp46-.Lfunc_begin1          # >> Call Site 5 <<
	.uleb128 .Ltmp47-.Ltmp46                #   Call between .Ltmp46 and .Ltmp47
	.uleb128 .Ltmp48-.Lfunc_begin1          #     jumps to .Ltmp48
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp49-.Lfunc_begin1          # >> Call Site 6 <<
	.uleb128 .Ltmp50-.Ltmp49                #   Call between .Ltmp49 and .Ltmp50
	.uleb128 .Ltmp51-.Lfunc_begin1          #     jumps to .Ltmp51
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp50-.Lfunc_begin1          # >> Call Site 7 <<
	.uleb128 .Lfunc_end6-.Ltmp50            #   Call between .Ltmp50 and .Lfunc_end6
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end1:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_,"axG",@progbits,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_,comdat
	.weak	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_ # -- Begin function _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
	.p2align	1, 0x90
	.type	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_,@function
_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_: # @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	leaq	16(%rdi), %rax
	movq	%rax, (%rdi)
	testq	%rsi, %rsi
	je	.LBB7_1
# %bb.2:
	movq	%rsi, %rbx
	movq	%rdi, %r14
	movq	%rsi, %rdi
	callq	strlen
	leaq	(%rax,%rbx), %rdx
	movq	%r14, %rdi
	movq	%rbx, %rsi
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag # TAILCALL
.LBB7_1:
	.cfi_def_cfa_offset 32
	movl	$.L.str.6, %edi
	callq	_ZSt19__throw_logic_errorPKc
.Lfunc_end7:
	.size	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_, .Lfunc_end7-_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN10InputImageC2EPKc,"axG",@progbits,_ZN10InputImageC2EPKc,comdat
	.weak	_ZN10InputImageC2EPKc           # -- Begin function _ZN10InputImageC2EPKc
	.p2align	1, 0x90
	.type	_ZN10InputImageC2EPKc,@function
_ZN10InputImageC2EPKc:                  # @_ZN10InputImageC2EPKc
.Lfunc_begin2:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception2
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$552, %rsp                      # imm = 0x228
	.cfi_def_cfa_offset 608
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %r14
	movq	%rdi, %rbx
	leaq	32(%rsp), %r15
	movq	%r15, %rdi
	movl	$8, %edx
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEEC1EPKcSt13_Ios_Openmode
	movq	(%r15), %rax
	movq	-24(%rax), %rax
	testb	$5, 64(%rsp,%rax)
	jne	.LBB8_1
# %bb.6:
.Ltmp58:
	leaq	32(%rsp), %rdi
	movq	%rbx, %rsi
	callq	_ZNSirsERi
.Ltmp59:
# %bb.7:
	leaq	4(%rbx), %rsi
.Ltmp60:
	movq	%rax, %rdi
	movq	%rsi, 16(%rsp)                  # 8-byte Spill
	callq	_ZNSirsERi
.Ltmp61:
# %bb.8:
	movl	(%rbx), %ebp
	movl	4(%rbx), %r13d
	movl	%r13d, %r14d
	imull	%ebp, %r14d
	movslq	%r14d, %rax
	leaq	(,%rax,8), %r15
	testl	%eax, %eax
	movq	$-1, %rdi
	cmovnsq	%r15, %rdi
.Ltmp62:
	callq	_Znam
.Ltmp63:
# %bb.9:
	movq	%rax, %r12
	testl	%r14d, %r14d
	je	.LBB8_11
# %bb.10:                               # %.loopexit.loopexit
	movq	%r12, %rdi
	xorl	%esi, %esi
	movq	%r15, %rdx
	callq	memset@PLT
.LBB8_11:                               # %.loopexit
	movq	%r12, 8(%rbx)
	testl	%r13d, %r13d
	jle	.LBB8_19
# %bb.12:                               # %.preheader.preheader
	xorl	%eax, %eax
	leaq	32(%rsp), %r15
	leaq	12(%rsp), %r12
.LBB8_13:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB8_15 Depth 2
	testl	%ebp, %ebp
	jle	.LBB8_18
# %bb.14:                               # %.lr.ph.preheader
                                        #   in Loop: Header=BB8_13 Depth=1
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	movslq	%eax, %r13
	xorl	%r14d, %r14d
.LBB8_15:                               # %.lr.ph
                                        #   Parent Loop BB8_13 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
.Ltmp65:
	movq	%r15, %rdi
	movq	%r12, %rsi
	callq	_ZNSi10_M_extractIfEERSiRT_
.Ltmp66:
# %bb.16:                               # %_ZNSirsERf.exit
                                        #   in Loop: Header=BB8_15 Depth=2
	movl	12(%rsp), %eax
	movq	8(%rbx), %rcx
	movslq	(%rbx), %rdx
	imulq	%r13, %rdx
	addq	%r14, %rdx
	movl	%eax, (%rcx,%rdx,8)
	movl	$0, 4(%rcx,%rdx,8)
	movl	(%rbx), %ebp
	incq	%r14
	cmpl	%ebp, %r14d
	jl	.LBB8_15
# %bb.17:                               # %._crit_edge.loopexit
                                        #   in Loop: Header=BB8_13 Depth=1
	movq	16(%rsp), %rax                  # 8-byte Reload
	movl	(%rax), %r13d
	movq	24(%rsp), %rax                  # 8-byte Reload
.LBB8_18:                               # %._crit_edge
                                        #   in Loop: Header=BB8_13 Depth=1
	incl	%eax
	cmpl	%r13d, %eax
	jl	.LBB8_13
.LBB8_19:                               # %._crit_edge18
	leaq	32(%rsp), %rdi
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev
	addq	$552, %rsp                      # imm = 0x228
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB8_1:
	.cfi_def_cfa_offset 608
.Ltmp52:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.5, %esi
	movl	$22, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp53:
# %bb.2:                                # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
.Ltmp54:
	movl	$_ZSt4cout, %edi
	movq	%r14, %rsi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
.Ltmp55:
# %bb.3:
.Ltmp56:
	movq	%rax, %rdi
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
.Ltmp57:
# %bb.4:                                # %_ZNSolsEPFRSoS_E.exit
	movl	$1, %edi
	callq	exit
.LBB8_5:
.Ltmp64:
	jmp	.LBB8_21
.LBB8_20:
.Ltmp67:
.LBB8_21:
	movq	%rax, %rbx
	leaq	32(%rsp), %rdi
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end8:
	.size	_ZN10InputImageC2EPKc, .Lfunc_end8-_ZN10InputImageC2EPKc
	.cfi_endproc
	.section	.gcc_except_table._ZN10InputImageC2EPKc,"aG",@progbits,_ZN10InputImageC2EPKc,comdat
	.p2align	2, 0x0
GCC_except_table8:
.Lexception2:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end2-.Lcst_begin2
.Lcst_begin2:
	.uleb128 .Lfunc_begin2-.Lfunc_begin2    # >> Call Site 1 <<
	.uleb128 .Ltmp58-.Lfunc_begin2          #   Call between .Lfunc_begin2 and .Ltmp58
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp58-.Lfunc_begin2          # >> Call Site 2 <<
	.uleb128 .Ltmp63-.Ltmp58                #   Call between .Ltmp58 and .Ltmp63
	.uleb128 .Ltmp64-.Lfunc_begin2          #     jumps to .Ltmp64
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp63-.Lfunc_begin2          # >> Call Site 3 <<
	.uleb128 .Ltmp65-.Ltmp63                #   Call between .Ltmp63 and .Ltmp65
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp65-.Lfunc_begin2          # >> Call Site 4 <<
	.uleb128 .Ltmp66-.Ltmp65                #   Call between .Ltmp65 and .Ltmp66
	.uleb128 .Ltmp67-.Lfunc_begin2          #     jumps to .Ltmp67
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp52-.Lfunc_begin2          # >> Call Site 5 <<
	.uleb128 .Ltmp57-.Ltmp52                #   Call between .Ltmp52 and .Ltmp57
	.uleb128 .Ltmp64-.Lfunc_begin2          #     jumps to .Ltmp64
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp57-.Lfunc_begin2          # >> Call Site 6 <<
	.uleb128 .Lfunc_end8-.Ltmp57            #   Call between .Ltmp57 and .Lfunc_end8
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end2:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag,"axG",@progbits,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag,comdat
	.weak	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag # -- Begin function _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
	.p2align	1, 0x90
	.type	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag,@function
_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag: # @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdx, %r14
	movq	%rsi, %r15
	movq	%rdi, %rbx
	subq	%rsi, %r14
	movq	%r14, (%rsp)
	cmpq	$15, %r14
	jbe	.LBB9_1
# %bb.2:
	movq	%rsp, %r12
	movq	%rbx, %rdi
	movq	%r12, %rsi
	xorl	%edx, %edx
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_createERmm
	movq	%rax, (%rbx)
	movq	(%r12), %rcx
	movq	%rcx, 16(%rbx)
	jmp	.LBB9_3
.LBB9_1:                                # %._crit_edge
	movq	(%rbx), %rax
.LBB9_3:
	testq	%r14, %r14
	je	.LBB9_7
# %bb.4:
	cmpq	$1, %r14
	jne	.LBB9_6
# %bb.5:
	movb	(%r15), %cl
	movb	%cl, (%rax)
	jmp	.LBB9_7
.LBB9_6:
	movq	%rax, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	callq	memcpy@PLT
.LBB9_7:                                # %_ZZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tagEN6_GuardD2Ev.exit
	movq	(%rsp), %rax
	movq	%rax, 8(%rbx)
	movq	(%rbx), %rcx
	movb	$0, (%rcx,%rax)
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end9:
	.size	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag, .Lfunc_end9-_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag,"axG",@progbits,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag,comdat
	.weak	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag # -- Begin function _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag
	.p2align	1, 0x90
	.type	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag,@function
_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag: # @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdx, %r14
	movq	%rsi, %r15
	movq	%rdi, %rbx
	subq	%rsi, %r14
	movq	%r14, (%rsp)
	cmpq	$15, %r14
	jbe	.LBB10_1
# %bb.2:
	movq	%rsp, %r12
	movq	%rbx, %rdi
	movq	%r12, %rsi
	xorl	%edx, %edx
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_createERmm
	movq	%rax, (%rbx)
	movq	(%r12), %rcx
	movq	%rcx, 16(%rbx)
	jmp	.LBB10_3
.LBB10_1:                               # %._crit_edge
	movq	(%rbx), %rax
.LBB10_3:
	testq	%r14, %r14
	je	.LBB10_7
# %bb.4:
	cmpq	$1, %r14
	jne	.LBB10_6
# %bb.5:
	movb	(%r15), %cl
	movb	%cl, (%rax)
	jmp	.LBB10_7
.LBB10_6:
	movq	%rax, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	callq	memcpy@PLT
.LBB10_7:                               # %_ZZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tagEN6_GuardD2Ev.exit
	movq	(%rsp), %rax
	movq	%rax, 8(%rbx)
	movq	(%rbx), %rcx
	movb	$0, (%rcx,%rax)
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end10:
	.size	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag, .Lfunc_end10-_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPcEEvT_S7_St20forward_iterator_tag
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB11_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB11_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9cudaDFT1DP8gComplexS0_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12cudaDFT1DColP8gComplexS0_i, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end11:
	.size	__hip_module_ctor, .Lfunc_end11-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB12_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB12_2:
	retq
.Lfunc_end12:
	.size	__hip_module_dtor, .Lfunc_end12-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"("
	.size	.L.str, 2

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	","
	.size	.L.str.1, 2

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	")"
	.size	.L.str.2, 2

	.type	_Z9cudaDFT1DP8gComplexS0_i,@object # @_Z9cudaDFT1DP8gComplexS0_i
	.section	.rodata,"a",@progbits
	.globl	_Z9cudaDFT1DP8gComplexS0_i
	.p2align	3, 0x0
_Z9cudaDFT1DP8gComplexS0_i:
	.quad	_Z24__device_stub__cudaDFT1DP8gComplexS0_i
	.size	_Z9cudaDFT1DP8gComplexS0_i, 8

	.type	_Z12cudaDFT1DColP8gComplexS0_i,@object # @_Z12cudaDFT1DColP8gComplexS0_i
	.globl	_Z12cudaDFT1DColP8gComplexS0_i
	.p2align	3, 0x0
_Z12cudaDFT1DColP8gComplexS0_i:
	.quad	_Z27__device_stub__cudaDFT1DColP8gComplexS0_i
	.size	_Z12cudaDFT1DColP8gComplexS0_i, 8

	.type	.L.str.3,@object                # @.str.3
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.3:
	.asciz	"Can't create output image "
	.size	.L.str.3, 27

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	" "
	.size	.L.str.4, 2

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Can't open image file "
	.size	.L.str.5, 23

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"basic_string: construction from null is not valid"
	.size	.L.str.6, 50

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z9cudaDFT1DP8gComplexS0_i"
	.size	.L__unnamed_1, 27

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z12cudaDFT1DColP8gComplexS0_i"
	.size	.L__unnamed_2, 31

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z24__device_stub__cudaDFT1DP8gComplexS0_i
	.addrsig_sym _Z27__device_stub__cudaDFT1DColP8gComplexS0_i
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym _Z9cudaDFT1DP8gComplexS0_i
	.addrsig_sym _Z12cudaDFT1DColP8gComplexS0_i
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z9cudaDFT1DP8gComplexS0_i ; -- Begin function _Z9cudaDFT1DP8gComplexS0_i
	.globl	_Z9cudaDFT1DP8gComplexS0_i
	.p2align	8
	.type	_Z9cudaDFT1DP8gComplexS0_i,@function
_Z9cudaDFT1DP8gComplexS0_i:             ; @_Z9cudaDFT1DP8gComplexS0_i
; %bb.0:
	s_load_b32 s4, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s4, 1
	s_cbranch_scc1 .LBB0_11
; %bb.1:                                ; %.lr.ph
	s_clause 0x1
	s_load_b32 s5, s[0:1], 0x24
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mov_b32 s6, 0x7fffff
	s_mov_b32 s7, 0xb94c1982
	s_mov_b32 s8, 0x37d75334
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s5, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, s15, s5, v[0:1]
	s_mov_b32 s5, 0
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[4:5]
	v_add_nc_u32_e32 v8, v4, v5
	v_xor_b32_e32 v8, v8, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_ashr_i32 s0, s4, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_add_i32 s1, s4, s0
	global_load_b64 v[2:3], v[0:1], off
	s_xor_b32 s0, s1, s0
	v_cvt_f32_u32_e32 v6, s0
	s_sub_i32 s1, 0, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v6, v6
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v6, 0x4f7ffffe, v6
	v_cvt_u32_f32_e32 v6, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v7, s1, v6
	v_mul_hi_u32 v7, v6, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v6, v6, v7
	v_mul_hi_u32 v6, v8, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v6, v6, s0
	v_sub_nc_u32_e32 v6, v8, v6
	v_cvt_f32_i32_e32 v8, s4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v7, s0, v6
	v_cmp_le_u32_e32 vcc_lo, s0, v6
	v_cndmask_b32_e32 v6, v6, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v7, s0, v6
	v_cmp_le_u32_e32 vcc_lo, s0, v6
	v_cndmask_b32_e32 v6, v6, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v6, v6, v5
	v_sub_nc_u32_e32 v5, v6, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cvt_f32_i32_e32 v7, v5
	v_sub_nc_u32_e32 v6, v4, v5
	v_mov_b32_e32 v5, 0
	v_mul_f32_e32 v7, 0x40c90fdb, v7
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	v_cvt_f32_i32_e32 v4, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v4, v7, v4
	v_div_scale_f32 v9, null, v8, v8, v4
	v_div_scale_f32 v12, vcc_lo, v4, v8, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v10, v9
	s_waitcnt_depctr 0xfff
	v_fma_f32 v11, -v9, v10, 1.0
	v_fmac_f32_e32 v10, v11, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v11, v12, v10
	v_fma_f32 v13, -v9, v11, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, v13, v10
	v_fma_f32 v9, -v9, v11, v12
                                        ; implicit-def: $vgpr12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v9, v9, v10, v11
                                        ; implicit-def: $vgpr11
	v_div_fixup_f32 v9, v9, v8, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v10, 0x7fffffff, v9
	v_cmp_ngt_f32_e64 s9, 0x48000000, |v9|
	s_and_saveexec_b32 s0, s9
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s10, exec_lo, s0
	s_cbranch_execz .LBB0_4
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	v_and_or_b32 v19, v10, s6, 0x800000
	v_lshrrev_b32_e32 v16, 23, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[11:12], null, 0xfe5163ab, v19, 0
	v_add_nc_u32_e32 v17, 0xffffff88, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_lt_u32_e32 vcc_lo, 63, v17
	v_mov_b32_e32 v4, v12
	v_cndmask_b32_e64 v18, 0, 0xffffffc0, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[12:13], null, 0x3c439041, v19, v[4:5]
	v_add_nc_u32_e32 v18, v18, v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v4, v13
	v_cmp_lt_u32_e64 s0, 31, v18
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[13:14], null, 0xdb629599, v19, v[4:5]
	v_cndmask_b32_e64 v20, 0, 0xffffffe0, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v20, v20, v18
	v_dual_mov_b32 v4, v14 :: v_dual_cndmask_b32 v11, v13, v11
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_lt_u32_e64 s1, 31, v20
	v_mad_u64_u32 v[14:15], null, 0xf534ddc0, v19, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v4, v15
	v_cndmask_b32_e32 v12, v14, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[15:16], null, 0xfc2757d1, v19, v[4:5]
	v_cndmask_b32_e64 v11, v12, v11, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v4, v16
	v_mad_u64_u32 v[16:17], null, 0x4e441529, v19, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v4, v17
	v_mad_u64_u32 v[17:18], null, 0xa2f9836e, v19, v[4:5]
	v_cndmask_b32_e64 v4, 0, 0xffffffe0, s1
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v19, v16, v14, vcc_lo
	v_dual_cndmask_b32 v17, v17, v15 :: v_dual_add_nc_u32 v4, v4, v20
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v16, v18, v16 :: v_dual_cndmask_b32 v15, v15, v13
	v_sub_nc_u32_e32 v18, 32, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v14, v17, v19, s0
	v_cndmask_b32_e64 v16, v16, v17, s0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v17, v19, v15, s0
	v_cndmask_b32_e64 v15, v15, v12, s0
	v_cmp_eq_u32_e32 vcc_lo, 0, v4
	v_cndmask_b32_e64 v16, v16, v14, s1
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v14, v14, v17, s1
	v_cndmask_b32_e64 v17, v17, v15, s1
	v_cndmask_b32_e64 v11, v15, v11, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_alignbit_b32 v19, v16, v14, v18
	v_alignbit_b32 v13, v14, v17, v18
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v4, v19, v16, vcc_lo
	v_cndmask_b32_e32 v12, v13, v14, vcc_lo
	v_alignbit_b32 v16, v17, v11, v18
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_bfe_u32 v13, v4, 29, 1
	v_alignbit_b32 v14, v4, v12, 30
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v16, v16, v17, vcc_lo
	v_sub_nc_u32_e32 v15, 0, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_alignbit_b32 v12, v12, v16, 30
	v_alignbit_b32 v11, v16, v11, 30
	v_xor_b32_e32 v14, v14, v15
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v12, v12, v15
	v_xor_b32_e32 v11, v11, v15
	v_lshrrev_b32_e32 v15, 29, v4
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_clz_i32_u32_e32 v17, v14
	v_lshrrev_b32_e32 v4, 30, v4
	v_lshlrev_b32_e32 v15, 31, v15
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_min_u32_e32 v17, 32, v17
	v_or_b32_e32 v18, 0.5, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v19, 23, v17
	v_sub_nc_u32_e32 v16, 31, v17
	v_sub_nc_u32_e32 v18, v18, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_alignbit_b32 v14, v14, v12, v16
	v_alignbit_b32 v11, v12, v11, v16
	v_alignbit_b32 v12, v14, v11, 9
	v_lshrrev_b32_e32 v14, 9, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_clz_i32_u32_e32 v16, v12
	v_min_u32_e32 v16, 32, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v20, 31, v16
	v_alignbit_b32 v11, v12, v11, v20
	v_or_b32_e32 v12, v14, v18
	v_add_lshl_u32 v14, v16, v17, 23
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshrrev_b32_e32 v11, 9, v11
	v_mul_f32_e32 v16, 0x3fc90fda, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v11, v11, v14
	v_fma_f32 v14, 0x3fc90fda, v12, -v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v11, 0x33000000, v11
	v_fmac_f32_e32 v14, 0x33a22168, v12
	v_add_nc_u32_e32 v12, v13, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or_b32_e32 v11, v11, v15
	v_fmac_f32_e32 v14, 0x3fc90fda, v11
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v11, v16, v14
.LBB0_4:                                ; %Flow54
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_and_not1_saveexec_b32 s0, s10
; %bb.5:                                ;   in Loop: Header=BB0_2 Depth=1
	v_mul_f32_e64 v4, 0x3f22f983, |v9|
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f32_e32 v4, v4
	v_fma_f32 v11, 0xbfc90fda, v4, |v9|
	v_cvt_i32_f32_e32 v12, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, 0xb3a22168, v4
	v_fmac_f32_e32 v11, 0xa7c234c4, v4
; %bb.6:                                ; %_ZL3cosf.exit
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr13
                                        ; implicit-def: $vgpr4
	s_and_saveexec_b32 s0, s9
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s9, exec_lo, s0
	s_cbranch_execz .LBB0_8
; %bb.7:                                ;   in Loop: Header=BB0_2 Depth=1
	v_and_or_b32 v21, v10, s6, 0x800000
	v_lshrrev_b32_e32 v18, 23, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[13:14], null, 0xfe5163ab, v21, 0
	v_add_nc_u32_e32 v19, 0xffffff88, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_lt_u32_e32 vcc_lo, 63, v19
	v_mov_b32_e32 v4, v14
	v_cndmask_b32_e64 v20, 0, 0xffffffc0, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[14:15], null, 0x3c439041, v21, v[4:5]
	v_add_nc_u32_e32 v20, v20, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v4, v15
	v_cmp_lt_u32_e64 s0, 31, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[15:16], null, 0xdb629599, v21, v[4:5]
	v_cndmask_b32_e64 v22, 0, 0xffffffe0, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v22, v22, v20
	v_dual_mov_b32 v4, v16 :: v_dual_cndmask_b32 v13, v15, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_lt_u32_e64 s1, 31, v22
	v_mad_u64_u32 v[16:17], null, 0xf534ddc0, v21, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v4, v17
	v_cndmask_b32_e32 v14, v16, v14, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[17:18], null, 0xfc2757d1, v21, v[4:5]
	v_cndmask_b32_e64 v13, v14, v13, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v4, v18
	v_mad_u64_u32 v[18:19], null, 0x4e441529, v21, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v4, v19
	v_mad_u64_u32 v[19:20], null, 0xa2f9836e, v21, v[4:5]
	v_cndmask_b32_e64 v4, 0, 0xffffffe0, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_cndmask_b32 v21, v18, v16 :: v_dual_add_nc_u32 v4, v4, v22
	v_dual_cndmask_b32 v19, v19, v17 :: v_dual_cndmask_b32 v18, v20, v18
	v_cndmask_b32_e32 v17, v17, v15, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_sub_nc_u32_e32 v20, 32, v4
	v_cndmask_b32_e64 v16, v19, v21, s0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v18, v18, v19, s0
	v_cndmask_b32_e64 v19, v21, v17, s0
	v_cndmask_b32_e64 v17, v17, v14, s0
	v_cmp_eq_u32_e32 vcc_lo, 0, v4
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v18, v18, v16, s1
	v_cndmask_b32_e64 v16, v16, v19, s1
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v19, v19, v17, s1
	v_cndmask_b32_e64 v13, v17, v13, s1
	v_alignbit_b32 v21, v18, v16, v20
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_alignbit_b32 v15, v16, v19, v20
	v_cndmask_b32_e32 v4, v21, v18, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v14, v15, v16, vcc_lo
	v_alignbit_b32 v18, v19, v13, v20
	v_bfe_u32 v15, v4, 29, 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_alignbit_b32 v16, v4, v14, 30
	v_cndmask_b32_e32 v18, v18, v19, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v17, 0, v15
	v_alignbit_b32 v14, v14, v18, 30
	v_alignbit_b32 v13, v18, v13, 30
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v16, v16, v17
	v_xor_b32_e32 v14, v14, v17
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v13, v13, v17
	v_lshrrev_b32_e32 v17, 29, v4
	v_clz_i32_u32_e32 v19, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v17, 31, v17
	v_min_u32_e32 v19, 32, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v20, 0.5, v17
	v_sub_nc_u32_e32 v18, 31, v19
	v_lshlrev_b32_e32 v21, 23, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_alignbit_b32 v16, v16, v14, v18
	v_alignbit_b32 v13, v14, v13, v18
	v_sub_nc_u32_e32 v20, v20, v21
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_alignbit_b32 v14, v16, v13, 9
	v_lshrrev_b32_e32 v16, 9, v16
	v_clz_i32_u32_e32 v18, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_u32_e32 v18, 32, v18
	v_sub_nc_u32_e32 v22, 31, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_alignbit_b32 v13, v14, v13, v22
	v_or_b32_e32 v14, v16, v20
	v_add_lshl_u32 v16, v18, v19, 23
	v_lshrrev_b32_e32 v13, 9, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v18, 0x3fc90fda, v14
	v_sub_nc_u32_e32 v13, v13, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v16, 0x3fc90fda, v14, -v18
	v_add_nc_u32_e32 v13, 0x33000000, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v16, 0x33a22168, v14
	v_or_b32_e32 v13, v13, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v16, 0x3fc90fda, v13
	v_lshrrev_b32_e32 v13, 30, v4
	v_dual_add_f32 v4, v18, v16 :: v_dual_add_nc_u32 v13, v15, v13
.LBB0_8:                                ; %Flow
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_and_not1_saveexec_b32 s0, s9
; %bb.9:                                ;   in Loop: Header=BB0_2 Depth=1
	v_mul_f32_e64 v4, 0x3f22f983, |v9|
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f32_e32 v13, v4
	v_fma_f32 v4, 0xbfc90fda, v13, |v9|
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v4, 0xb3a22168, v13
	v_fmac_f32_e32 v4, 0xa7c234c4, v13
	v_cvt_i32_f32_e32 v13, v13
; %bb.10:                               ; %_ZL3sinf.exit
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_dual_mul_f32 v16, v11, v11 :: v_dual_and_b32 v17, 1, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_dual_mul_f32 v18, v4, v4 :: v_dual_and_b32 v19, 1, v13
	v_lshlrev_b32_e32 v12, 30, v12
	v_dual_fmaak_f32 v20, s7, v16, 0x3c0881c4 :: v_dual_lshlrev_b32 v13, 30, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fmaak_f32 v23, s8, v18, 0xbab64f3b
	v_xor_b32_e32 v10, v10, v9
	v_and_b32_e32 v12, 0x80000000, v12
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmaak_f32 v20, v16, v20, 0xbe2aaa9d
	v_dual_fmaak_f32 v23, v18, v23, 0x3d2aabf7 :: v_dual_mul_f32 v20, v16, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmaak_f32 v22, s7, v18, 0x3c0881c4 :: v_dual_fmac_f32 v11, v11, v20
	v_fmaak_f32 v22, v18, v22, 0xbe2aaa9d
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmaak_f32 v21, s8, v16, 0xbab64f3b :: v_dual_mul_f32 v22, v18, v22
	v_dual_fmaak_f32 v21, v16, v21, 0x3d2aabf7 :: v_dual_add_nc_u32 v14, s5, v6
	v_fmaak_f32 v23, v18, v23, 0xbf000004
	s_add_i32 s5, s5, 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v4, v4, v22
	v_ashrrev_i32_e32 v15, 31, v14
	s_cmp_eq_u32 s4, s5
	v_fma_f32 v18, v18, v23, 1.0
	v_fmaak_f32 v21, v16, v21, 0xbf000004
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[14:15], 3, v[14:15]
	v_fma_f32 v16, v16, v21, 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v14, vcc_lo, s2, v14
	v_add_co_ci_u32_e32 v15, vcc_lo, s3, v15, vcc_lo
	v_cmp_eq_u32_e32 vcc_lo, 0, v17
	global_load_b64 v[14:15], v[14:15], off
	v_and_b32_e32 v13, 0x80000000, v13
	v_cndmask_b32_e64 v11, -v11, v16, vcc_lo
	v_cmp_eq_u32_e32 vcc_lo, 0, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v11, v12, v11
	v_cndmask_b32_e32 v4, v18, v4, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v9, 0x1f8
	v_xor3_b32 v4, v10, v13, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v4, 0x7fc00000, v4, vcc_lo
	s_waitcnt vmcnt(0)
	v_dual_cndmask_b32 v9, 0x7fc00000, v11 :: v_dual_mul_f32 v10, v15, v4
	v_mul_f32_e32 v4, v14, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v10, v9, v14
	v_fma_f32 v4, v9, v15, -v4
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_add_f32 v2, v2, v10 :: v_dual_add_f32 v3, v3, v4
	global_store_b64 v[0:1], v[2:3], off
	s_cbranch_scc0 .LBB0_2
.LBB0_11:                               ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9cudaDFT1DP8gComplexS0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 24
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z9cudaDFT1DP8gComplexS0_i, .Lfunc_end0-_Z9cudaDFT1DP8gComplexS0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2320
; NumSgprs: 18
; NumVgprs: 24
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 24
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z12cudaDFT1DColP8gComplexS0_i ; -- Begin function _Z12cudaDFT1DColP8gComplexS0_i
	.globl	_Z12cudaDFT1DColP8gComplexS0_i
	.p2align	8
	.type	_Z12cudaDFT1DColP8gComplexS0_i,@function
_Z12cudaDFT1DColP8gComplexS0_i:         ; @_Z12cudaDFT1DColP8gComplexS0_i
; %bb.0:
	s_load_b32 s4, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s4, 1
	s_cbranch_scc1 .LBB1_11
; %bb.1:                                ; %.lr.ph
	s_clause 0x1
	s_load_b32 s5, s[0:1], 0x24
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mov_b32 s6, 0x7fffff
	s_mov_b32 s7, 0xb94c1982
	s_mov_b32 s8, 0x37d75334
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s5, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, s15, s5, v[0:1]
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[4:5]
	v_add_nc_u32_e32 v8, v4, v5
	v_xor_b32_e32 v8, v8, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_ashr_i32 s0, s4, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s1, s4, s0
	global_load_b64 v[2:3], v[0:1], off
	s_xor_b32 s1, s1, s0
	v_xor_b32_e32 v5, s0, v5
	v_cvt_f32_u32_e32 v6, s1
	s_sub_i32 s5, 0, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v6, v6
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v6, 0x4f7ffffe, v6
	v_cvt_u32_f32_e32 v6, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v7, s5, v6
	s_mov_b32 s5, 0
	v_mul_hi_u32 v7, v6, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v6, v6, v7
	v_mul_hi_u32 v6, v8, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v7, v6, s1
	v_sub_nc_u32_e32 v7, v8, v7
	v_add_nc_u32_e32 v8, 1, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v9, s1, v7
	v_cmp_le_u32_e32 vcc_lo, s1, v7
	v_dual_cndmask_b32 v6, v6, v8 :: v_dual_cndmask_b32 v7, v7, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v8, 1, v6
	v_cmp_le_u32_e32 vcc_lo, s1, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v6, v6, v8, vcc_lo
	v_cvt_f32_i32_e32 v8, s4
	v_xor_b32_e32 v6, v6, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v5, v6, v5
	v_mul_lo_u32 v6, v5, s4
	v_cvt_f32_i32_e32 v5, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v7, 0x40c90fdb, v5
	v_sub_nc_u32_e32 v4, v4, v6
	v_mov_b32_e32 v6, 0
.LBB1_2:                                ; =>This Inner Loop Header: Depth=1
	v_cvt_f32_i32_e32 v5, s5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v5, v7, v5
	v_div_scale_f32 v9, null, v8, v8, v5
	v_div_scale_f32 v12, vcc_lo, v5, v8, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v10, v9
	s_waitcnt_depctr 0xfff
	v_fma_f32 v11, -v9, v10, 1.0
	v_fmac_f32_e32 v10, v11, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v11, v12, v10
	v_fma_f32 v13, -v9, v11, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, v13, v10
	v_fma_f32 v9, -v9, v11, v12
                                        ; implicit-def: $vgpr12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v9, v9, v10, v11
                                        ; implicit-def: $vgpr11
	v_div_fixup_f32 v9, v9, v8, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v10, 0x7fffffff, v9
	v_cmp_ngt_f32_e64 s9, 0x48000000, |v9|
	s_and_saveexec_b32 s0, s9
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s10, exec_lo, s0
	s_cbranch_execz .LBB1_4
; %bb.3:                                ;   in Loop: Header=BB1_2 Depth=1
	v_lshrrev_b32_e32 v16, 23, v10
	v_and_or_b32 v19, v10, s6, 0x800000
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v17, 0xffffff88, v16
	v_mad_u64_u32 v[11:12], null, 0xfe5163ab, v19, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_lt_u32_e32 vcc_lo, 63, v17
	v_cndmask_b32_e64 v18, 0, 0xffffffc0, vcc_lo
	v_dual_mov_b32 v5, v12 :: v_dual_add_nc_u32 v18, v18, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[12:13], null, 0x3c439041, v19, v[5:6]
	v_cmp_lt_u32_e64 s0, 31, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v20, 0, 0xffffffe0, s0
	v_dual_mov_b32 v5, v13 :: v_dual_add_nc_u32 v20, v20, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[13:14], null, 0xdb629599, v19, v[5:6]
	v_cmp_lt_u32_e64 s1, 31, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mov_b32_e32 v5, v14
	v_cndmask_b32_e32 v11, v13, v11, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[14:15], null, 0xf534ddc0, v19, v[5:6]
	v_dual_mov_b32 v5, v15 :: v_dual_cndmask_b32 v12, v14, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[15:16], null, 0xfc2757d1, v19, v[5:6]
	v_cndmask_b32_e64 v11, v12, v11, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v5, v16
	v_mad_u64_u32 v[16:17], null, 0x4e441529, v19, v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v5, v17
	v_mad_u64_u32 v[17:18], null, 0xa2f9836e, v19, v[5:6]
	v_cndmask_b32_e64 v5, 0, 0xffffffe0, s1
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v19, v16, v14, vcc_lo
	v_add_nc_u32_e32 v5, v5, v20
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_dual_cndmask_b32 v17, v17, v15 :: v_dual_cndmask_b32 v16, v18, v16
	v_cndmask_b32_e32 v15, v15, v13, vcc_lo
	v_sub_nc_u32_e32 v18, 32, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v14, v17, v19, s0
	v_cndmask_b32_e64 v16, v16, v17, s0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v17, v19, v15, s0
	v_cndmask_b32_e64 v15, v15, v12, s0
	v_cmp_eq_u32_e32 vcc_lo, 0, v5
	v_cndmask_b32_e64 v16, v16, v14, s1
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v14, v14, v17, s1
	v_cndmask_b32_e64 v17, v17, v15, s1
	v_cndmask_b32_e64 v11, v15, v11, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_alignbit_b32 v19, v16, v14, v18
	v_alignbit_b32 v13, v14, v17, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_dual_cndmask_b32 v5, v19, v16 :: v_dual_cndmask_b32 v12, v13, v14
	v_alignbit_b32 v16, v17, v11, v18
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_bfe_u32 v13, v5, 29, 1
	v_alignbit_b32 v14, v5, v12, 30
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v16, v16, v17, vcc_lo
	v_sub_nc_u32_e32 v15, 0, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_alignbit_b32 v12, v12, v16, 30
	v_alignbit_b32 v11, v16, v11, 30
	v_xor_b32_e32 v14, v14, v15
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v12, v12, v15
	v_xor_b32_e32 v11, v11, v15
	v_lshrrev_b32_e32 v15, 29, v5
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_clz_i32_u32_e32 v17, v14
	v_lshrrev_b32_e32 v5, 30, v5
	v_lshlrev_b32_e32 v15, 31, v15
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_min_u32_e32 v17, 32, v17
	v_or_b32_e32 v18, 0.5, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v16, 31, v17
	v_lshlrev_b32_e32 v19, 23, v17
	v_alignbit_b32 v14, v14, v12, v16
	v_alignbit_b32 v11, v12, v11, v16
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v18, v18, v19
	v_alignbit_b32 v12, v14, v11, 9
	v_lshrrev_b32_e32 v14, 9, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_clz_i32_u32_e32 v16, v12
	v_min_u32_e32 v16, 32, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v20, 31, v16
	v_alignbit_b32 v11, v12, v11, v20
	v_or_b32_e32 v12, v14, v18
	v_add_lshl_u32 v14, v16, v17, 23
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshrrev_b32_e32 v11, 9, v11
	v_mul_f32_e32 v16, 0x3fc90fda, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v11, v11, v14
	v_fma_f32 v14, 0x3fc90fda, v12, -v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v11, 0x33000000, v11
	v_fmac_f32_e32 v14, 0x33a22168, v12
	v_add_nc_u32_e32 v12, v13, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or_b32_e32 v11, v11, v15
	v_fmac_f32_e32 v14, 0x3fc90fda, v11
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v11, v16, v14
.LBB1_4:                                ; %Flow54
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_and_not1_saveexec_b32 s0, s10
; %bb.5:                                ;   in Loop: Header=BB1_2 Depth=1
	v_mul_f32_e64 v5, 0x3f22f983, |v9|
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f32_e32 v5, v5
	v_fma_f32 v11, 0xbfc90fda, v5, |v9|
	v_cvt_i32_f32_e32 v12, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v11, 0xb3a22168, v5
	v_fmac_f32_e32 v11, 0xa7c234c4, v5
; %bb.6:                                ; %_ZL3cosf.exit
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr14
                                        ; implicit-def: $vgpr13
	s_and_saveexec_b32 s0, s9
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s9, exec_lo, s0
	s_cbranch_execz .LBB1_8
; %bb.7:                                ;   in Loop: Header=BB1_2 Depth=1
	v_lshrrev_b32_e32 v18, 23, v10
	v_and_or_b32 v21, v10, s6, 0x800000
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v19, 0xffffff88, v18
	v_mad_u64_u32 v[13:14], null, 0xfe5163ab, v21, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_lt_u32_e32 vcc_lo, 63, v19
	v_cndmask_b32_e64 v20, 0, 0xffffffc0, vcc_lo
	v_dual_mov_b32 v5, v14 :: v_dual_add_nc_u32 v20, v20, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[14:15], null, 0x3c439041, v21, v[5:6]
	v_cmp_lt_u32_e64 s0, 31, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v22, 0, 0xffffffe0, s0
	v_dual_mov_b32 v5, v15 :: v_dual_add_nc_u32 v22, v22, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[15:16], null, 0xdb629599, v21, v[5:6]
	v_cmp_lt_u32_e64 s1, 31, v22
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mov_b32_e32 v5, v16
	v_cndmask_b32_e32 v13, v15, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[16:17], null, 0xf534ddc0, v21, v[5:6]
	v_dual_mov_b32 v5, v17 :: v_dual_cndmask_b32 v14, v16, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[17:18], null, 0xfc2757d1, v21, v[5:6]
	v_cndmask_b32_e64 v13, v14, v13, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v5, v18
	v_mad_u64_u32 v[18:19], null, 0x4e441529, v21, v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_e32 v5, v19
	v_mad_u64_u32 v[19:20], null, 0xa2f9836e, v21, v[5:6]
	v_cndmask_b32_e64 v5, 0, 0xffffffe0, s1
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v21, v18, v16, vcc_lo
	v_add_nc_u32_e32 v5, v5, v22
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_dual_cndmask_b32 v19, v19, v17 :: v_dual_cndmask_b32 v18, v20, v18
	v_cndmask_b32_e32 v17, v17, v15, vcc_lo
	v_sub_nc_u32_e32 v20, 32, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v16, v19, v21, s0
	v_cndmask_b32_e64 v18, v18, v19, s0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v19, v21, v17, s0
	v_cndmask_b32_e64 v17, v17, v14, s0
	v_cmp_eq_u32_e32 vcc_lo, 0, v5
	v_cndmask_b32_e64 v18, v18, v16, s1
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v16, v16, v19, s1
	v_cndmask_b32_e64 v19, v19, v17, s1
	v_cndmask_b32_e64 v13, v17, v13, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_alignbit_b32 v21, v18, v16, v20
	v_alignbit_b32 v15, v16, v19, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_dual_cndmask_b32 v5, v21, v18 :: v_dual_cndmask_b32 v14, v15, v16
	v_alignbit_b32 v18, v19, v13, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_bfe_u32 v15, v5, 29, 1
	v_alignbit_b32 v16, v5, v14, 30
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v18, v18, v19, vcc_lo
	v_sub_nc_u32_e32 v17, 0, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_alignbit_b32 v14, v14, v18, 30
	v_alignbit_b32 v13, v18, v13, 30
	v_xor_b32_e32 v16, v16, v17
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v14, v14, v17
	v_xor_b32_e32 v13, v13, v17
	v_lshrrev_b32_e32 v17, 29, v5
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_clz_i32_u32_e32 v19, v16
	v_lshrrev_b32_e32 v5, 30, v5
	v_lshlrev_b32_e32 v17, 31, v17
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_min_u32_e32 v19, 32, v19
	v_or_b32_e32 v20, 0.5, v17
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v18, 31, v19
	v_lshlrev_b32_e32 v21, 23, v19
	v_alignbit_b32 v16, v16, v14, v18
	v_alignbit_b32 v13, v14, v13, v18
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v20, v20, v21
	v_alignbit_b32 v14, v16, v13, 9
	v_lshrrev_b32_e32 v16, 9, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_clz_i32_u32_e32 v18, v14
	v_min_u32_e32 v18, 32, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v22, 31, v18
	v_alignbit_b32 v13, v14, v13, v22
	v_or_b32_e32 v14, v16, v20
	v_add_lshl_u32 v16, v18, v19, 23
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshrrev_b32_e32 v13, 9, v13
	v_mul_f32_e32 v18, 0x3fc90fda, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v13, v13, v16
	v_fma_f32 v16, 0x3fc90fda, v14, -v18
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v13, 0x33000000, v13
	v_fmac_f32_e32 v16, 0x33a22168, v14
	v_add_nc_u32_e32 v14, v15, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or_b32_e32 v13, v13, v17
	v_fmac_f32_e32 v16, 0x3fc90fda, v13
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v13, v18, v16
.LBB1_8:                                ; %Flow
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_and_not1_saveexec_b32 s0, s9
; %bb.9:                                ;   in Loop: Header=BB1_2 Depth=1
	v_mul_f32_e64 v5, 0x3f22f983, |v9|
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f32_e32 v5, v5
	v_fma_f32 v13, 0xbfc90fda, v5, |v9|
	v_cvt_i32_f32_e32 v14, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v13, 0xb3a22168, v5
	v_fmac_f32_e32 v13, 0xa7c234c4, v5
; %bb.10:                               ; %_ZL3sinf.exit
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_ashrrev_i32_e32 v5, 31, v4
	v_xor_b32_e32 v10, v10, v9
	s_add_i32 s5, s5, 1
	v_mul_f32_e32 v18, v13, v13
	s_cmp_eq_u32 s4, s5
	v_lshlrev_b64 v[15:16], 3, v[4:5]
	v_mul_f32_e32 v5, v11, v11
	v_and_b32_e32 v17, 1, v12
	v_lshlrev_b32_e32 v12, 30, v12
	v_add_nc_u32_e32 v4, s4, v4
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_fmaak_f32 v21, s8, v5, 0xbab64f3b
	v_add_co_u32 v15, vcc_lo, s2, v15
	v_add_co_ci_u32_e32 v16, vcc_lo, s3, v16, vcc_lo
	v_dual_fmaak_f32 v20, s7, v5, 0x3c0881c4 :: v_dual_and_b32 v19, 1, v14
	v_dual_fmaak_f32 v21, v5, v21, 0x3d2aabf7 :: v_dual_lshlrev_b32 v14, 30, v14
	global_load_b64 v[15:16], v[15:16], off
	v_fmaak_f32 v20, v5, v20, 0xbe2aaa9d
	v_fmaak_f32 v23, s8, v18, 0xbab64f3b
	v_cmp_eq_u32_e32 vcc_lo, 0, v17
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_mul_f32_e32 v20, v5, v20
	v_fmaak_f32 v22, s7, v18, 0x3c0881c4
	v_fmaak_f32 v23, v18, v23, 0x3d2aabf7
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_dual_fmac_f32 v11, v11, v20 :: v_dual_fmaak_f32 v22, v18, v22, 0xbe2aaa9d
	v_fmaak_f32 v21, v5, v21, 0xbf000004
	v_fmaak_f32 v23, v18, v23, 0xbf000004
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v22, v18, v22
	v_fma_f32 v5, v5, v21, 1.0
	v_and_b32_e32 v12, 0x80000000, v12
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f32 v18, v18, v23, 1.0
	v_fmac_f32_e32 v13, v13, v22
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v5, -v11, v5, vcc_lo
	v_cmp_eq_u32_e32 vcc_lo, 0, v19
	v_and_b32_e32 v14, 0x80000000, v14
	v_xor_b32_e32 v5, v12, v5
	v_cndmask_b32_e32 v11, v18, v13, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v9, 0x1f8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_xor3_b32 v10, v10, v14, v11
	v_cndmask_b32_e32 v5, 0x7fc00000, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v9, 0x7fc00000, v10, vcc_lo
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v10, v16, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v10, v5, v15 :: v_dual_mul_f32 v9, v15, v9
	v_add_f32_e32 v2, v2, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v5, v5, v16, -v9
	v_add_f32_e32 v3, v3, v5
	global_store_b64 v[0:1], v[2:3], off
	s_cbranch_scc0 .LBB1_2
.LBB1_11:                               ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12cudaDFT1DColP8gComplexS0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 24
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z12cudaDFT1DColP8gComplexS0_i, .Lfunc_end1-_Z12cudaDFT1DColP8gComplexS0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2332
; NumSgprs: 18
; NumVgprs: 24
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 24
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9cudaDFT1DP8gComplexS0_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z9cudaDFT1DP8gComplexS0_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     24
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12cudaDFT1DColP8gComplexS0_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z12cudaDFT1DColP8gComplexS0_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     24
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
