#include <cuda.h>
#include <stdio.h>
#include <stdlib.h>
#include <time.h>
#include <string.h>
#include <math.h>


#define TILE_WIDTH 16

// Compute C = A * B
__global__ void matrixMultiply(float * A, float * B, float * C,
  	int numARows, int numAColumns,
	int numBRows, int numBColumns,
	int numCRows, int numCColumns) {
     //@@ Insert code to implement matrix multiplication here
    	__shared__ float ds_M[TILE_WIDTH][TILE_WIDTH];
   	 __shared__ float ds_N[TILE_WIDTH][TILE_WIDTH];
    	int bx = blockIdx.x, by = blockIdx.y,
      	 tx = threadIdx.x, ty = threadIdx.y,
     	  Row = by * TILE_WIDTH + ty,
     	  Col = bx * TILE_WIDTH + tx;
   	float Pvalue = 0;

  	 for (int m = 0; m < (numAColumns-1)/TILE_WIDTH+1; ++m) {
			//load data to shared memory
     	  if (Row < numARows && m*TILE_WIDTH+tx < numAColumns)
      	    	ds_M[ty][tx] = A[Row*numAColumns + m*TILE_WIDTH+tx];
     	  else
        	  	ds_M[ty][tx] = 0;
     	  if (Col < numBColumns && m*TILE_WIDTH+ty < numBRows)
      	    ds_N[ty][tx] = B[(m*TILE_WIDTH+ty)*numBColumns+Col];
     	  else
          	ds_N[ty][tx] = 0;

     	  __syncthreads();
     	  for (int k = 0; k < TILE_WIDTH; ++k)
          Pvalue += ds_M[ty][k] * ds_N[k][tx];
     	  __syncthreads();
   	 }
    	 if (Row < numCRows && Col < numCColumns)
       	C[Row*numCColumns+Col] = Pvalue;
}

void initialize_K(float **K,int n)
{	//checked
	int i,j,idx;
	double h ;
	//h = 1/(m+1);

	//debugprintf("initialize_K\n");
	for (i = 0; i < n; i++)
	{
     	 for  (j = 0; j < n; j++)
	  	{

			K[i][j] = j;
      	//printf("K[i][j] is%f\n",K[i][j] );
      	//printf("i is%d,j is %d\n",i,j);
      	}
      	//printf("\n");
	}

}


void load_value(int n,float **host_K,float *K)
{	printf("input matrix\n");
	int i,j;
	for (i = 0; i < n; i++)
	{
    		for(j = 0; j < n; j++)
		{

			K[i*n+j]=host_K[i][j];
			printf("%f ",K[i*n+j] );

		}
printf("\n");
  }
}


int main(int argc, char ** argv) {
  	int n=4;
    	float ** hostA; // The A matrix
    	float ** hostB; // The B matrix
    	float * hostA2; // The A matrix
    	float * hostB2; // The B matrix
    	float * hostC; // The output C matrix
    	float * deviceA;
    	float * deviceB;
    	float * deviceC;
    	int numARows=n; // number of rows in the matrix A
    	int numAColumns=n; // number of columns in the matrix A
    	int numBRows=n; // number of rows in the matrix B
    	int numBColumns=n; // number of columns in the matrix B
    	int numCRows=n; // number of rows in the matrix C (you have to set this)
    	int numCColumns=n; // number of columns in the matrix C (you have to set this)
    	hostA=(float **)malloc(sizeof(float *) * n);
    	for (int i = 0; i < n; i++) {
    		hostA[i]=(float *)malloc( sizeof(float) * n);
      }

    	hostB=(float **)malloc(sizeof(float *) * n);
    	for (int i = 0; i < n; i++) {
        hostB[i]=(float *)malloc( sizeof(float) * n);
      }
   	deviceB=(float *)malloc( sizeof(float) * n*n);
   	deviceA=(float *)malloc( sizeof(float) * n*n);
	hostB2=(float *)malloc( sizeof(float) * n*n);
   	hostA2=(float *)malloc( sizeof(float) * n*n);
   	initialize_K(hostA, n);
   	initialize_K(hostB, n);
   	printf("reached here\n");
    	//@@ Set numCRows and numCColumns
    	load_value(n,hostB,hostB2);
    	load_value(n,hostA,hostA2);
    	//printf("reached here\n");
    	numCRows = numARows;
    	numCColumns = numBColumns;
    	//@@ Allocate the hostC matrix
    	hostC = (float *)malloc(sizeof(float) * numCRows * numCColumns);

    	//@@ Allocate GPU memory here
    	cudaMalloc(&deviceA, sizeof(float) * numARows * numAColumns);
    	cudaMalloc(&deviceB, sizeof(float) * numBRows * numBColumns);
    	cudaMalloc(&deviceC, sizeof(float) * numCRows * numCColumns);


    	//@@ Copy memory to the GPU here
    	cudaMemcpy(deviceA, hostA2, sizeof(float) * numARows * numAColumns, cudaMemcpyHostToDevice);
    	cudaMemcpy(deviceB, hostB2, sizeof(float) * numBRows * numBColumns, cudaMemcpyHostToDevice);


    	//@@ Initialize the grid and block dimensions here
    	dim3 dimGrid((numCColumns-1)/TILE_WIDTH+1, (numCRows-1)/TILE_WIDTH+1, 1);
    	dim3 dimBlock(TILE_WIDTH, TILE_WIDTH, 1);


    	//@@ Launch the GPU Kernel here
    	matrixMultiply<<<dimGrid, dimBlock>>>(deviceA, deviceB, deviceC,
                                          numARows, numAColumns,
                                          numBRows, numBColumns,
                                          numCRows, numCColumns);

    	cudaThreadSynchronize();

    	//@@ Copy the GPU memory back to the CPU here
    	cudaMemcpy(hostC, deviceC, sizeof(float) * numCRows * numCColumns, cudaMemcpyDeviceToHost);

	printf("output matrix\n");
	 for(int i = 0; i < n*n; i++) {
    			//printf("K[i][j] result is%f  ",hostC[i]);
			printf("%f  ",hostC[i]);
			if((i+1)%n==0)
				printf("\n");
      }
    	//@@ Free the GPU memory here
    	cudaFree(deviceA);
    	cudaFree(deviceB);
    	cudaFree(deviceC);



    	free(hostA);
    	free(hostB);
    	free(hostC);

    	return 0;
}

	.file	"tmpxft_002d446a_00000000-6_shared_memory_multi.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2032:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2032:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z12initialize_KPPfi
	.type	_Z12initialize_KPPfi, @function
_Z12initialize_KPPfi:
.LFB2027:
	.cfi_startproc
	endbr64
	xorl	%edx, %edx
.L3:
	cmpl	%edx, %esi
	jle	.L8
	movq	(%rdi,%rdx,8), %rcx
	xorl	%eax, %eax
.L4:
	cvtsi2ssl	%eax, %xmm0
	movss	%xmm0, (%rcx,%rax,4)
	incq	%rax
	cmpl	%eax, %esi
	jg	.L4
	incq	%rdx
	jmp	.L3
.L8:
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z12initialize_KPPfi, .-_Z12initialize_KPPfi
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"input matrix\n"
.LC1:
	.string	"%f "
.LC2:
	.string	"\n"
	.text
	.globl	_Z10load_valueiPPfS_
	.type	_Z10load_valueiPPfS_, @function
_Z10load_valueiPPfS_:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	xorl	%eax, %eax
	xorl	%r15d, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rsi, %r14
	leaq	.LC0(%rip), %rsi
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movslq	%edi, %r13
	movl	$2, %edi
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%r13, %r12
	salq	$2, %r13
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdx, %rbx
	pushq	%rcx
	.cfi_def_cfa_offset 64
	call	__printf_chk@PLT
.L10:
	cmpl	%r15d, %r12d
	jle	.L15
	xorl	%ebp, %ebp
.L11:
	movq	(%r14,%r15,8), %rax
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	movss	(%rax,%rbp), %xmm0
	movb	$1, %al
	movss	%xmm0, (%rbx,%rbp)
	addq	$4, %rbp
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	cmpq	%r13, %rbp
	jne	.L11
	leaq	.LC2(%rip), %rsi
	xorl	%eax, %eax
	incq	%r15
	addq	%r13, %rbx
	movl	$2, %edi
	call	__printf_chk@PLT
	jmp	.L10
.L15:
	popq	%rax
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z10load_valueiPPfS_, .-_Z10load_valueiPPfS_
	.globl	_Z44__device_stub__Z14matrixMultiplyPfS_S_iiiiiiPfS_S_iiiiii
	.type	_Z44__device_stub__Z14matrixMultiplyPfS_S_iiiiiiPfS_S_iiiiii, @function
_Z44__device_stub__Z14matrixMultiplyPfS_S_iiiiiiPfS_S_iiiiii:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	216(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	224(%rsp), %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	pushq	56(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_Z14matrixMultiplyPfS_S_iiiiii(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 224
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L16:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L18
	call	__stack_chk_fail@PLT
.L18:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z44__device_stub__Z14matrixMultiplyPfS_S_iiiiiiPfS_S_iiiiii, .-_Z44__device_stub__Z14matrixMultiplyPfS_S_iiiiiiPfS_S_iiiiii
	.globl	_Z14matrixMultiplyPfS_S_iiiiii
	.type	_Z14matrixMultiplyPfS_S_iiiiii, @function
_Z14matrixMultiplyPfS_S_iiiiii:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z44__device_stub__Z14matrixMultiplyPfS_S_iiiiiiPfS_S_iiiiii
	.cfi_endproc
.LFE2055:
	.size	_Z14matrixMultiplyPfS_S_iiiiii, .-_Z14matrixMultiplyPfS_S_iiiiii
	.section	.rodata.str1.1
.LC3:
	.string	"reached here\n"
.LC4:
	.string	"output matrix\n"
.LC5:
	.string	"%f  "
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	$32, %edi
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	xorl	%ebx, %ebx
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movq	%rax, %rbp
.L22:
	movl	$16, %edi
	call	malloc@PLT
	movq	%rax, 0(%rbp,%rbx,8)
	incq	%rbx
	cmpq	$4, %rbx
	jne	.L22
	movl	$32, %edi
	xorl	%r12d, %r12d
	call	malloc@PLT
	movq	%rax, %rbx
.L23:
	movl	$16, %edi
	call	malloc@PLT
	movq	%rax, (%rbx,%r12,8)
	incq	%r12
	cmpq	$4, %r12
	jne	.L23
	movl	$64, %edi
	call	malloc@PLT
	movl	$64, %edi
	movq	%rax, 16(%rsp)
	call	malloc@PLT
	movl	$64, %edi
	movq	%rax, 8(%rsp)
	call	malloc@PLT
	movl	$64, %edi
	movq	%rax, %r13
	call	malloc@PLT
	movl	$4, %esi
	movq	%rbp, %rdi
	movq	%rax, %r14
	call	_Z12initialize_KPPfi
	movq	%rbx, %rdi
	call	_Z12initialize_KPPfi
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%r13, %rdx
	movq	%rbx, %rsi
	movl	$4, %edi
	call	_Z10load_valueiPPfS_
	movq	%r14, %rdx
	movq	%rbp, %rsi
	movl	$4, %edi
	call	_Z10load_valueiPPfS_
	movl	$64, %edi
	call	malloc@PLT
	leaq	8(%rsp), %rdi
	movl	$64, %esi
	movq	%rax, %r12
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$64, %esi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$64, %esi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%r14, %rsi
	movl	$64, %edx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%r13, %rsi
	movl	$64, %edx
	call	cudaMemcpy@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movabsq	$68719476752, %rdx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L24
	pushq	%rax
	.cfi_def_cfa_offset 120
	movl	$4, %r9d
	movl	$4, %r8d
	movl	$4, %ecx
	pushq	$4
	.cfi_def_cfa_offset 128
	pushq	$4
	.cfi_def_cfa_offset 136
	pushq	$4
	.cfi_def_cfa_offset 144
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rsi
	movq	40(%rsp), %rdi
	call	_Z44__device_stub__Z14matrixMultiplyPfS_S_iiiiiiPfS_S_iiiiii
	addq	$32, %rsp
	.cfi_def_cfa_offset 112
.L24:
	call	cudaThreadSynchronize@PLT
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movl	$64, %edx
	movq	%r12, %rdi
	movl	$1, %r13d
	leaq	.LC5(%rip), %r14
	call	cudaMemcpy@PLT
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L26:
	movq	%r14, %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	-4(%r12,%r13,4), %xmm0
	call	__printf_chk@PLT
	testl	$3, %r13d
	jne	.L25
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L25:
	incq	%r13
	cmpq	$17, %r13
	jne	.L26
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L27
	call	__stack_chk_fail@PLT
.L27:
	addq	$64, %rsp
	.cfi_def_cfa_offset 48
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	main, .-main
	.section	.rodata.str1.1
.LC6:
	.string	"_Z14matrixMultiplyPfS_S_iiiiii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2057:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC6(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z14matrixMultiplyPfS_S_iiiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2057:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <time.h>
#include <string.h>
#include <math.h>


#define TILE_WIDTH 16

// Compute C = A * B
__global__ void matrixMultiply(float * A, float * B, float * C,
  	int numARows, int numAColumns,
	int numBRows, int numBColumns,
	int numCRows, int numCColumns) {
     //@@ Insert code to implement matrix multiplication here
    	__shared__ float ds_M[TILE_WIDTH][TILE_WIDTH];
   	 __shared__ float ds_N[TILE_WIDTH][TILE_WIDTH];
    	int bx = blockIdx.x, by = blockIdx.y,
      	 tx = threadIdx.x, ty = threadIdx.y,
     	  Row = by * TILE_WIDTH + ty,
     	  Col = bx * TILE_WIDTH + tx;
   	float Pvalue = 0;

  	 for (int m = 0; m < (numAColumns-1)/TILE_WIDTH+1; ++m) {
			//load data to shared memory
     	  if (Row < numARows && m*TILE_WIDTH+tx < numAColumns)
      	    	ds_M[ty][tx] = A[Row*numAColumns + m*TILE_WIDTH+tx];
     	  else
        	  	ds_M[ty][tx] = 0;
     	  if (Col < numBColumns && m*TILE_WIDTH+ty < numBRows)
      	    ds_N[ty][tx] = B[(m*TILE_WIDTH+ty)*numBColumns+Col];
     	  else
          	ds_N[ty][tx] = 0;

     	  __syncthreads();
     	  for (int k = 0; k < TILE_WIDTH; ++k)
          Pvalue += ds_M[ty][k] * ds_N[k][tx];
     	  __syncthreads();
   	 }
    	 if (Row < numCRows && Col < numCColumns)
       	C[Row*numCColumns+Col] = Pvalue;
}

void initialize_K(float **K,int n)
{	//checked
	int i,j,idx;
	double h ;
	//h = 1/(m+1);

	//debugprintf("initialize_K\n");
	for (i = 0; i < n; i++)
	{
     	 for  (j = 0; j < n; j++)
	  	{

			K[i][j] = j;
      	//printf("K[i][j] is%f\n",K[i][j] );
      	//printf("i is%d,j is %d\n",i,j);
      	}
      	//printf("\n");
	}

}


void load_value(int n,float **host_K,float *K)
{	printf("input matrix\n");
	int i,j;
	for (i = 0; i < n; i++)
	{
    		for(j = 0; j < n; j++)
		{

			K[i*n+j]=host_K[i][j];
			printf("%f ",K[i*n+j] );

		}
printf("\n");
  }
}


int main(int argc, char ** argv) {
  	int n=4;
    	float ** hostA; // The A matrix
    	float ** hostB; // The B matrix
    	float * hostA2; // The A matrix
    	float * hostB2; // The B matrix
    	float * hostC; // The output C matrix
    	float * deviceA;
    	float * deviceB;
    	float * deviceC;
    	int numARows=n; // number of rows in the matrix A
    	int numAColumns=n; // number of columns in the matrix A
    	int numBRows=n; // number of rows in the matrix B
    	int numBColumns=n; // number of columns in the matrix B
    	int numCRows=n; // number of rows in the matrix C (you have to set this)
    	int numCColumns=n; // number of columns in the matrix C (you have to set this)
    	hostA=(float **)malloc(sizeof(float *) * n);
    	for (int i = 0; i < n; i++) {
    		hostA[i]=(float *)malloc( sizeof(float) * n);
      }

    	hostB=(float **)malloc(sizeof(float *) * n);
    	for (int i = 0; i < n; i++) {
        hostB[i]=(float *)malloc( sizeof(float) * n);
      }
   	deviceB=(float *)malloc( sizeof(float) * n*n);
   	deviceA=(float *)malloc( sizeof(float) * n*n);
	hostB2=(float *)malloc( sizeof(float) * n*n);
   	hostA2=(float *)malloc( sizeof(float) * n*n);
   	initialize_K(hostA, n);
   	initialize_K(hostB, n);
   	printf("reached here\n");
    	//@@ Set numCRows and numCColumns
    	load_value(n,hostB,hostB2);
    	load_value(n,hostA,hostA2);
    	//printf("reached here\n");
    	numCRows = numARows;
    	numCColumns = numBColumns;
    	//@@ Allocate the hostC matrix
    	hostC = (float *)malloc(sizeof(float) * numCRows * numCColumns);

    	//@@ Allocate GPU memory here
    	hipMalloc(&deviceA, sizeof(float) * numARows * numAColumns);
    	hipMalloc(&deviceB, sizeof(float) * numBRows * numBColumns);
    	hipMalloc(&deviceC, sizeof(float) * numCRows * numCColumns);


    	//@@ Copy memory to the GPU here
    	hipMemcpy(deviceA, hostA2, sizeof(float) * numARows * numAColumns, hipMemcpyHostToDevice);
    	hipMemcpy(deviceB, hostB2, sizeof(float) * numBRows * numBColumns, hipMemcpyHostToDevice);


    	//@@ Initialize the grid and block dimensions here
    	dim3 dimGrid((numCColumns-1)/TILE_WIDTH+1, (numCRows-1)/TILE_WIDTH+1, 1);
    	dim3 dimBlock(TILE_WIDTH, TILE_WIDTH, 1);


    	//@@ Launch the GPU Kernel here
    	matrixMultiply<<<dimGrid, dimBlock>>>(deviceA, deviceB, deviceC,
                                          numARows, numAColumns,
                                          numBRows, numBColumns,
                                          numCRows, numCColumns);

    	hipDeviceSynchronize();

    	//@@ Copy the GPU memory back to the CPU here
    	hipMemcpy(hostC, deviceC, sizeof(float) * numCRows * numCColumns, hipMemcpyDeviceToHost);

	printf("output matrix\n");
	 for(int i = 0; i < n*n; i++) {
    			//printf("K[i][j] result is%f  ",hostC[i]);
			printf("%f  ",hostC[i]);
			if((i+1)%n==0)
				printf("\n");
      }
    	//@@ Free the GPU memory here
    	hipFree(deviceA);
    	hipFree(deviceB);
    	hipFree(deviceC);



    	free(hostA);
    	free(hostB);
    	free(hostC);

    	return 0;
}

	.text
	.file	"shared_memory_multi.hip"
	.globl	_Z29__device_stub__matrixMultiplyPfS_S_iiiiii # -- Begin function _Z29__device_stub__matrixMultiplyPfS_S_iiiiii
	.type	_Z29__device_stub__matrixMultiplyPfS_S_iiiiii,@function
_Z29__device_stub__matrixMultiplyPfS_S_iiiiii: # @_Z29__device_stub__matrixMultiplyPfS_S_iiiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	232(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14matrixMultiplyPfS_S_iiiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$192, %rsp
	.cfi_adjust_cfa_offset -192
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z29__device_stub__matrixMultiplyPfS_S_iiiiii, .Lfunc_end0-_Z29__device_stub__matrixMultiplyPfS_S_iiiiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z12initialize_KPPfi            # -- Begin function _Z12initialize_KPPfi
	.type	_Z12initialize_KPPfi,@function
_Z12initialize_KPPfi:                   # @_Z12initialize_KPPfi
	.cfi_startproc
# %bb.0:
	testl	%esi, %esi
	jle	.LBB1_5
# %bb.1:                                # %.preheader.lr.ph
	movl	%esi, %eax
	xorl	%ecx, %ecx
.LBB1_2:                                # %.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_3 Depth 2
	movq	(%rdi,%rcx,8), %rdx
	xorl	%esi, %esi
.LBB1_3:                                #   Parent Loop BB1_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtsi2ss	%esi, %xmm0
	movss	%xmm0, (%rdx,%rsi,4)
	incq	%rsi
	cmpq	%rsi, %rax
	jne	.LBB1_3
# %bb.4:                                # %._crit_edge
                                        #   in Loop: Header=BB1_2 Depth=1
	incq	%rcx
	cmpq	%rax, %rcx
	jne	.LBB1_2
.LBB1_5:                                # %._crit_edge13
	retq
.Lfunc_end1:
	.size	_Z12initialize_KPPfi, .Lfunc_end1-_Z12initialize_KPPfi
	.cfi_endproc
                                        # -- End function
	.globl	_Z10load_valueiPPfS_            # -- Begin function _Z10load_valueiPPfS_
	.type	_Z10load_valueiPPfS_,@function
_Z10load_valueiPPfS_:                   # @_Z10load_valueiPPfS_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, 16(%rsp)                  # 8-byte Spill
	movq	%rsi, %r14
	movl	%edi, %ebx
	movl	$.Lstr, %edi
	callq	puts@PLT
	movl	%ebx, 12(%rsp)                  # 4-byte Spill
	testl	%ebx, %ebx
	jle	.LBB2_5
# %bb.1:                                # %.preheader.lr.ph
	movl	12(%rsp), %r15d                 # 4-byte Reload
	xorl	%r12d, %r12d
	xorl	%r13d, %r13d
.LBB2_2:                                # %.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_3 Depth 2
	movl	%r12d, %eax
	movq	16(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%rax,4), %rbx
	xorl	%ebp, %ebp
.LBB2_3:                                #   Parent Loop BB2_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	(%r14,%r13,8), %rax
	movss	(%rax,%rbp,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, (%rbx,%rbp,4)
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.1, %edi
	movb	$1, %al
	callq	printf
	incq	%rbp
	cmpq	%rbp, %r15
	jne	.LBB2_3
# %bb.4:                                # %._crit_edge
                                        #   in Loop: Header=BB2_2 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%r13
	addl	12(%rsp), %r12d                 # 4-byte Folded Reload
	cmpq	%r15, %r13
	jne	.LBB2_2
.LBB2_5:                                # %._crit_edge20
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z10load_valueiPPfS_, .Lfunc_end2-_Z10load_valueiPPfS_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$32, %edi
	callq	malloc
	movq	%rax, %rbx
	xorl	%r14d, %r14d
.LBB3_1:                                # =>This Inner Loop Header: Depth=1
	movl	$16, %edi
	callq	malloc
	movq	%rax, (%rbx,%r14,8)
	incq	%r14
	cmpq	$4, %r14
	jne	.LBB3_1
# %bb.2:
	movl	$32, %edi
	callq	malloc
	movq	%rax, %r14
	xorl	%r15d, %r15d
.LBB3_3:                                # =>This Inner Loop Header: Depth=1
	movl	$16, %edi
	callq	malloc
	movq	%rax, (%r14,%r15,8)
	incq	%r15
	cmpq	$4, %r15
	jne	.LBB3_3
# %bb.4:
	movl	$64, %edi
	callq	malloc
	movq	%rax, 16(%rsp)
	movl	$64, %edi
	callq	malloc
	movq	%rax, 24(%rsp)
	movl	$64, %edi
	callq	malloc
	movq	%rax, %r15
	movl	$64, %edi
	callq	malloc
	movq	%rax, %r12
	xorl	%eax, %eax
.LBB3_5:                                # %.lr.ph.i
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_6 Depth 2
	movq	(%rbx,%rax,8), %rcx
	xorl	%edx, %edx
.LBB3_6:                                #   Parent Loop BB3_5 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtsi2ss	%edx, %xmm0
	movss	%xmm0, (%rcx,%rdx,4)
	incq	%rdx
	cmpq	$4, %rdx
	jne	.LBB3_6
# %bb.7:                                # %._crit_edge.i
                                        #   in Loop: Header=BB3_5 Depth=1
	incq	%rax
	cmpq	$4, %rax
	jne	.LBB3_5
# %bb.8:                                # %.lr.ph.i84.preheader
	xorl	%eax, %eax
.LBB3_9:                                # %.lr.ph.i84
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_10 Depth 2
	movq	(%r14,%rax,8), %rcx
	xorl	%edx, %edx
.LBB3_10:                               #   Parent Loop BB3_9 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtsi2ss	%edx, %xmm0
	movss	%xmm0, (%rcx,%rdx,4)
	incq	%rdx
	cmpq	$4, %rdx
	jne	.LBB3_10
# %bb.11:                               # %._crit_edge.i89
                                        #   in Loop: Header=BB3_9 Depth=1
	incq	%rax
	cmpq	$4, %rax
	jne	.LBB3_9
# %bb.12:                               # %_Z12initialize_KPPfi.exit92
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	movl	$4, %edi
	movq	%r14, %rsi
	movq	%r15, %rdx
	callq	_Z10load_valueiPPfS_
	movl	$4, %edi
	movq	%rbx, %rsi
	movq	%r12, %rdx
	callq	_Z10load_valueiPPfS_
	movl	$64, %edi
	callq	malloc
	movq	%r15, 32(%rsp)                  # 8-byte Spill
	movq	%rax, %r15
	leaq	24(%rsp), %rbp
	movl	$64, %esi
	movq	%rbp, %rdi
	callq	hipMalloc
	leaq	16(%rsp), %r13
	movl	$64, %esi
	movq	%r13, %rdi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movl	$64, %esi
	callq	hipMalloc
	movq	(%rbp), %rdi
	movl	$64, %edx
	movq	%r12, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r13), %rdi
	movl	$64, %edx
	movq	32(%rsp), %rsi                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_14
# %bb.13:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movl	$4, %ecx
	movl	$4, %r8d
	movl	$4, %r9d
	movl	$4, %eax
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	callq	_Z29__device_stub__matrixMultiplyPfS_S_iiiiii
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
.LBB3_14:
	callq	hipDeviceSynchronize
	movq	8(%rsp), %rsi
	movl	$64, %edx
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	movl	$1, %r12d
.LBB3_15:                               # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtss2sd	-4(%r15,%r12,4), %xmm0
	movl	$.L.str.5, %edi
	movb	$1, %al
	callq	printf
	testb	$3, %r12b
	jne	.LBB3_17
# %bb.16:                               #   in Loop: Header=BB3_15 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
.LBB3_17:                               #   in Loop: Header=BB3_15 Depth=1
	incq	%r12
	cmpq	$17, %r12
	jne	.LBB3_15
# %bb.18:
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	xorl	%eax, %eax
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14matrixMultiplyPfS_S_iiiiii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z14matrixMultiplyPfS_S_iiiiii,@object # @_Z14matrixMultiplyPfS_S_iiiiii
	.section	.rodata,"a",@progbits
	.globl	_Z14matrixMultiplyPfS_S_iiiiii
	.p2align	3, 0x0
_Z14matrixMultiplyPfS_S_iiiiii:
	.quad	_Z29__device_stub__matrixMultiplyPfS_S_iiiiii
	.size	_Z14matrixMultiplyPfS_S_iiiiii, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"%f "
	.size	.L.str.1, 4

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"%f  "
	.size	.L.str.5, 5

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z14matrixMultiplyPfS_S_iiiiii"
	.size	.L__unnamed_1, 31

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"input matrix"
	.size	.Lstr, 13

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"reached here"
	.size	.Lstr.1, 13

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"output matrix"
	.size	.Lstr.2, 14

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z29__device_stub__matrixMultiplyPfS_S_iiiiii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z14matrixMultiplyPfS_S_iiiiii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z14matrixMultiplyPfS_S_iiiiii ; -- Begin function _Z14matrixMultiplyPfS_S_iiiiii
	.globl	_Z14matrixMultiplyPfS_S_iiiiii
	.p2align	8
	.type	_Z14matrixMultiplyPfS_S_iiiiii,@function
_Z14matrixMultiplyPfS_S_iiiiii:         ; @_Z14matrixMultiplyPfS_S_iiiiii
; %bb.0:
	s_clause 0x3
	s_load_b128 s[4:7], s[0:1], 0x18
	s_load_b128 s[8:11], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x10
	s_load_b64 s[12:13], s[0:1], 0x28
	v_bfe_u32 v2, v0, 10, 10
	v_dual_mov_b32 v4, 0 :: v_dual_and_b32 v3, 0x3ff, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshl_add_u32 v1, s15, 4, v2
	v_lshl_add_u32 v0, s14, 4, v3
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s5, -14
	s_cbranch_scc1 .LBB0_14
; %bb.1:                                ; %.lr.ph
	v_lshlrev_b32_e32 v4, 2, v3
	s_add_i32 s0, s5, -1
	v_lshlrev_b32_e32 v5, 6, v2
	s_ashr_i32 s1, s0, 31
	v_mul_lo_u32 v8, v1, s5
	v_add_nc_u32_e32 v6, 0x400, v4
	s_lshr_b32 s1, s1, 28
	v_cmp_gt_i32_e32 vcc_lo, s4, v1
	s_add_i32 s1, s0, s1
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v7, v5, v4
	v_cmp_gt_i32_e64 s0, s7, v0
	v_add_nc_u32_e32 v9, v6, v5
	s_ashr_i32 s4, s1, 4
	s_mov_b32 s14, 0
.LBB0_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_11 Depth 2
	v_mov_b32_e32 v10, 0
	s_and_saveexec_b32 s15, vcc_lo
	s_cbranch_execz .LBB0_6
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	v_lshl_add_u32 v11, s14, 4, v3
	v_mov_b32_e32 v10, 0
	s_mov_b32 s16, exec_lo
	s_delay_alu instid0(VALU_DEP_2)
	v_cmpx_gt_i32_e64 s5, v11
	s_cbranch_execz .LBB0_5
; %bb.4:                                ;   in Loop: Header=BB0_2 Depth=1
	v_add_nc_u32_e32 v10, v11, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v11, 31, v10
	v_lshlrev_b64 v[10:11], 2, v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v10, s1, s8, v10
	v_add_co_ci_u32_e64 v11, s1, s9, v11, s1
	global_load_b32 v10, v[10:11], off
.LBB0_5:                                ; %Flow101
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s16
.LBB0_6:                                ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s15
	v_mov_b32_e32 v11, 0
	s_waitcnt vmcnt(0)
	ds_store_b32 v7, v10
	s_and_saveexec_b32 s15, s0
	s_cbranch_execz .LBB0_10
; %bb.7:                                ;   in Loop: Header=BB0_2 Depth=1
	v_lshl_add_u32 v10, s14, 4, v2
	v_mov_b32_e32 v11, 0
	s_mov_b32 s16, exec_lo
	s_delay_alu instid0(VALU_DEP_2)
	v_cmpx_gt_i32_e64 s6, v10
	s_cbranch_execz .LBB0_9
; %bb.8:                                ;   in Loop: Header=BB0_2 Depth=1
	v_mad_u64_u32 v[11:12], null, v10, s7, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v12, 31, v11
	v_lshlrev_b64 v[10:11], 2, v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v10, s1, s10, v10
	v_add_co_ci_u32_e64 v11, s1, s11, v11, s1
	global_load_b32 v11, v[10:11], off
.LBB0_9:                                ; %Flow
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s16
.LBB0_10:                               ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s15
	v_mov_b32_e32 v10, v6
	s_mov_b32 s1, 0
	s_waitcnt vmcnt(0)
	ds_store_b32 v9, v11
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB0_11:                               ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_add_nc_u32_e32 v11, s1, v5
	s_add_i32 s1, s1, 4
	ds_load_b32 v12, v10
	ds_load_b32 v11, v11
	v_add_nc_u32_e32 v10, 64, v10
	s_cmp_eq_u32 s1, 64
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v4, v11, v12
	s_cbranch_scc0 .LBB0_11
; %bb.12:                               ;   in Loop: Header=BB0_2 Depth=1
	s_add_i32 s1, s14, 1
	s_cmp_eq_u32 s14, s4
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB0_14
; %bb.13:                               ;   in Loop: Header=BB0_2 Depth=1
	s_mov_b32 s14, s1
	s_branch .LBB0_2
.LBB0_14:                               ; %Flow103
	v_cmp_gt_i32_e32 vcc_lo, s12, v1
	v_cmp_gt_i32_e64 s0, s13, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, vcc_lo, s0
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_16
; %bb.15:
	v_mad_u64_u32 v[2:3], null, v1, s13, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_store_b32 v[0:1], v4, off
.LBB0_16:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14matrixMultiplyPfS_S_iiiiii
		.amdhsa_group_segment_fixed_size 2048
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 48
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 13
		.amdhsa_next_free_sgpr 17
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z14matrixMultiplyPfS_S_iiiiii, .Lfunc_end0-_Z14matrixMultiplyPfS_S_iiiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 584
; NumSgprs: 19
; NumVgprs: 13
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 2048 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 19
; NumVGPRsForWavesPerEU: 13
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     by_value
      - .offset:         44
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 2048
    .kernarg_segment_align: 8
    .kernarg_segment_size: 48
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z14matrixMultiplyPfS_S_iiiiii
    .private_segment_fixed_size: 0
    .sgpr_count:     19
    .sgpr_spill_count: 0
    .symbol:         _Z14matrixMultiplyPfS_S_iiiiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     13
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
