#include <stdio.h>
#include <stdlib.h>
#include <assert.h>
#include <cuda.h>
#include <cuda_runtime.h>
void f(int *A, int *B) {
    for(int i = 0; i < 5; i++) A[i] = 10;
}


__global__  void fCuKernel(int *A, int *B) {
    for(int i = 0; i < 5; i++) A[threadIdx.x] = 10;
}

#define CHECK(r) {_check((r), __LINE__);}

void _check(cudaError_t r, int line) {
    if (r != cudaSuccess) {
        printf("CUDA error on line %d: %s\n", line, cudaGetErrorString(r));
        exit(0);
    }
}

void print_arr(int *A) {
    for(int i = 0; i < 5; i++)
        printf("%d := %d\n", i, A[i]);
}
int main() {
    int *A = NULL; int *B = NULL;

    const int ManagedMemory = 1;
    printf("*** ManagedMemory: %d\n", ManagedMemory);

    if (ManagedMemory) {
        printf("CudaMallocManaged-allocating A & B...\n");
        CHECK(cudaMallocManaged(&A, sizeof(int) * 5, cudaMemAttachGlobal));
        printf("A allocated...\n");
        CHECK(cudaMallocManaged(&B, sizeof(int) * 5, cudaMemAttachGlobal));
        printf("B allocated...\n");
    }  else {
        A = (int *)malloc(sizeof(int) * 5);
        B = (int *)malloc(sizeof(int) * 5);
    }

    assert(A != NULL);
    assert(B != NULL);

    for(int i = 0; i < 5; i++) { B[i] = i + 1; A[i] = -42; }


    printf("launching kernel...\n");
    // f(A, B);
    fCuKernel<<<1,5>>>(A, B);
    cudaDeviceSynchronize();

    printf("printing A...\n");
    print_arr(A);
    return 0;
}

	.file	"tmpxft_0031e119_00000000-6_program.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2033:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2033:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z1fPiS_
	.type	_Z1fPiS_, @function
_Z1fPiS_:
.LFB2027:
	.cfi_startproc
	endbr64
	movabsq	$42949672970, %rax
	movl	$10, 16(%rdi)
	movq	%rax, (%rdi)
	movq	%rax, 8(%rdi)
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z1fPiS_, .-_Z1fPiS_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"CUDA error on line %d: %s\n"
	.text
	.globl	_Z6_check9cudaErrori
	.type	_Z6_check9cudaErrori, @function
_Z6_check9cudaErrori:
.LFB2028:
	.cfi_startproc
	endbr64
	testl	%edi, %edi
	je	.L3
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movl	%esi, %ebx
	call	cudaGetErrorString@PLT
	movl	$2, %edi
	movl	%ebx, %edx
	leaq	.LC0(%rip), %rsi
	movq	%rax, %rcx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	xorl	%edi, %edi
	call	exit@PLT
.L3:
	.cfi_def_cfa_offset 8
	.cfi_restore 3
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z6_check9cudaErrori, .-_Z6_check9cudaErrori
	.section	.rodata.str1.1
.LC1:
	.string	"%d := %d\n"
	.text
	.globl	_Z9print_arrPi
	.type	_Z9print_arrPi, @function
_Z9print_arrPi:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	leaq	.LC1(%rip), %r12
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	xorl	%ebx, %ebx
.L10:
	movl	0(%rbp,%rbx,4), %ecx
	movl	%ebx, %edx
	movq	%r12, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%rbx
	call	__printf_chk@PLT
	cmpq	$5, %rbx
	jne	.L10
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z9print_arrPi, .-_Z9print_arrPi
	.globl	_Z30__device_stub__Z9fCuKernelPiS_PiS_
	.type	_Z30__device_stub__Z9fCuKernelPiS_PiS_, @function
_Z30__device_stub__Z9fCuKernelPiS_PiS_:
.LFB2055:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L13
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z9fCuKernelPiS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L13:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L15
	call	__stack_chk_fail@PLT
.L15:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2055:
	.size	_Z30__device_stub__Z9fCuKernelPiS_PiS_, .-_Z30__device_stub__Z9fCuKernelPiS_PiS_
	.globl	_Z9fCuKernelPiS_
	.type	_Z9fCuKernelPiS_, @function
_Z9fCuKernelPiS_:
.LFB2056:
	.cfi_startproc
	endbr64
	jmp	_Z30__device_stub__Z9fCuKernelPiS_PiS_
	.cfi_endproc
.LFE2056:
	.size	_Z9fCuKernelPiS_, .-_Z9fCuKernelPiS_
	.section	.rodata.str1.1
.LC2:
	.string	"*** ManagedMemory: %d\n"
.LC3:
	.string	"CudaMallocManaged-allocating A & B...\n"
.LC4:
	.string	"A allocated...\n"
.LC5:
	.string	"B allocated...\n"
.LC6:
	.string	"launching kernel...\n"
.LC7:
	.string	"printing A...\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2030:
	.cfi_startproc
	endbr64
	subq	$56, %rsp
	.cfi_def_cfa_offset 64
	xorl	%edx, %edx
	movl	$2, %edi
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	leaq	.LC2(%rip), %rsi
	movq	%rdx, (%rsp)
	movq	%rdx, 8(%rsp)
	movl	$1, %edx
	call	__printf_chk@PLT
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %edx
	movq	%rsp, %rdi
	movl	$20, %esi
	call	cudaMallocManaged@PLT
	movl	$36, %esi
	movl	%eax, %edi
	call	_Z6_check9cudaErrori
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %edx
	leaq	8(%rsp), %rdi
	movl	$20, %esi
	call	cudaMallocManaged@PLT
	movl	$38, %esi
	movl	%eax, %edi
	call	_Z6_check9cudaErrori
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	8(%rsp), %rcx
	movq	(%rsp), %rdx
	movl	$1, %eax
.L19:
	movl	%eax, -4(%rcx,%rax,4)
	movl	$-42, -4(%rdx,%rax,4)
	incq	%rax
	cmpq	$6, %rax
	jne	.L19
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movabsq	$4294967301, %rdx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L20
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	call	_Z30__device_stub__Z9fCuKernelPiS_PiS_
.L20:
	call	cudaDeviceSynchronize@PLT
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC7(%rip), %rsi
	call	__printf_chk@PLT
	movq	(%rsp), %rdi
	call	_Z9print_arrPi
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L21
	call	__stack_chk_fail@PLT
.L21:
	xorl	%eax, %eax
	addq	$56, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2030:
	.size	main, .-main
	.section	.rodata.str1.1
.LC8:
	.string	"_Z9fCuKernelPiS_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2058:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC8(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z9fCuKernelPiS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2058:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include <stdlib.h>
#include <assert.h>
#include <hip/hip_runtime.h>

void f(int *A, int *B) {
    for(int i = 0; i < 5; i++) A[i] = 10;
}


__global__  void fCuKernel(int *A, int *B) {
    for(int i = 0; i < 5; i++) A[threadIdx.x] = 10;
}

#define CHECK(r) {_check((r), __LINE__);}

void _check(hipError_t r, int line) {
    if (r != hipSuccess) {
        printf("CUDA error on line %d: %s\n", line, hipGetErrorString(r));
        exit(0);
    }
}

void print_arr(int *A) {
    for(int i = 0; i < 5; i++)
        printf("%d := %d\n", i, A[i]);
}
int main() {
    int *A = NULL; int *B = NULL;

    const int ManagedMemory = 1;
    printf("*** ManagedMemory: %d\n", ManagedMemory);

    if (ManagedMemory) {
        printf("CudaMallocManaged-allocating A & B...\n");
        CHECK(hipMallocManaged(&A, sizeof(int) * 5, hipMemAttachGlobal));
        printf("A allocated...\n");
        CHECK(hipMallocManaged(&B, sizeof(int) * 5, hipMemAttachGlobal));
        printf("B allocated...\n");
    }  else {
        A = (int *)malloc(sizeof(int) * 5);
        B = (int *)malloc(sizeof(int) * 5);
    }

    assert(A != NULL);
    assert(B != NULL);

    for(int i = 0; i < 5; i++) { B[i] = i + 1; A[i] = -42; }


    printf("launching kernel...\n");
    // f(A, B);
    fCuKernel<<<1,5>>>(A, B);
    hipDeviceSynchronize();

    printf("printing A...\n");
    print_arr(A);
    return 0;
}

	.text
	.file	"program.hip"
	.globl	_Z1fPiS_                        # -- Begin function _Z1fPiS_
	.type	_Z1fPiS_,@function
_Z1fPiS_:                               # @_Z1fPiS_
	.cfi_startproc
# %bb.0:
	xorl	%eax, %eax
.LBB0_1:                                # =>This Inner Loop Header: Depth=1
	movl	$10, (%rdi,%rax,4)
	incq	%rax
	cmpq	$5, %rax
	jne	.LBB0_1
# %bb.2:
	retq
.Lfunc_end0:
	.size	_Z1fPiS_, .Lfunc_end0-_Z1fPiS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z24__device_stub__fCuKernelPiS_ # -- Begin function _Z24__device_stub__fCuKernelPiS_
	.type	_Z24__device_stub__fCuKernelPiS_,@function
_Z24__device_stub__fCuKernelPiS_:       # @_Z24__device_stub__fCuKernelPiS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9fCuKernelPiS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z24__device_stub__fCuKernelPiS_, .Lfunc_end1-_Z24__device_stub__fCuKernelPiS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z6_check10hipError_ti          # -- Begin function _Z6_check10hipError_ti
	.type	_Z6_check10hipError_ti,@function
_Z6_check10hipError_ti:                 # @_Z6_check10hipError_ti
	.cfi_startproc
# %bb.0:
	testl	%edi, %edi
	jne	.LBB2_2
# %bb.1:
	retq
.LBB2_2:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movl	%esi, %ebx
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movl	%ebx, %esi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	printf
	xorl	%edi, %edi
	callq	exit
.Lfunc_end2:
	.size	_Z6_check10hipError_ti, .Lfunc_end2-_Z6_check10hipError_ti
	.cfi_endproc
                                        # -- End function
	.globl	_Z9print_arrPi                  # -- Begin function _Z9print_arrPi
	.type	_Z9print_arrPi,@function
_Z9print_arrPi:                         # @_Z9print_arrPi
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movq	%rdi, %rbx
	xorl	%r14d, %r14d
.LBB3_1:                                # =>This Inner Loop Header: Depth=1
	movl	(%rbx,%r14,4), %edx
	movl	$.L.str.1, %edi
	movl	%r14d, %esi
	xorl	%eax, %eax
	callq	printf
	incq	%r14
	cmpq	$5, %r14
	jne	.LBB3_1
# %bb.2:
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z9print_arrPi, .Lfunc_end3-_Z9print_arrPi
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	xorl	%r15d, %r15d
	movq	%rsp, %rbx
	movq	%r15, (%rbx)
	leaq	8(%rsp), %r14
	movq	%r15, (%r14)
	movl	$.L.str.2, %edi
	movl	$1, %esi
	xorl	%eax, %eax
	callq	printf
	movl	$.Lstr, %edi
	callq	puts@PLT
	movl	$20, %esi
	movq	%rbx, %rdi
	movl	$1, %edx
	callq	hipMallocManaged
	movl	%eax, %edi
	movl	$36, %esi
	callq	_Z6_check10hipError_ti
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	movl	$20, %esi
	movq	%r14, %rdi
	movl	$1, %edx
	callq	hipMallocManaged
	movl	%eax, %edi
	movl	$38, %esi
	callq	_Z6_check10hipError_ti
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	movq	(%r14), %rax
	movq	(%rbx), %rcx
.LBB4_1:                                # =>This Inner Loop Header: Depth=1
	leaq	1(%r15), %rdx
	movl	%edx, (%rax,%r15,4)
	movl	$-42, (%rcx,%r15,4)
	movq	%rdx, %r15
	cmpq	$5, %rdx
	jne	.LBB4_1
# %bb.2:
	movl	$.Lstr.3, %edi
	callq	puts@PLT
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	leaq	4(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_4
# %bb.3:
	movq	(%rsp), %rdi
	movq	8(%rsp), %rsi
	callq	_Z24__device_stub__fCuKernelPiS_
.LBB4_4:
	callq	hipDeviceSynchronize
	movl	$.Lstr.4, %edi
	callq	puts@PLT
	movq	(%rsp), %r14
	xorl	%ebx, %ebx
.LBB4_5:                                # =>This Inner Loop Header: Depth=1
	movl	(%r14,%rbx,4), %edx
	movl	$.L.str.1, %edi
	movl	%ebx, %esi
	xorl	%eax, %eax
	callq	printf
	incq	%rbx
	cmpq	$5, %rbx
	jne	.LBB4_5
# %bb.6:                                # %_Z9print_arrPi.exit
	xorl	%eax, %eax
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	main, .Lfunc_end4-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9fCuKernelPiS_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z9fCuKernelPiS_,@object        # @_Z9fCuKernelPiS_
	.section	.rodata,"a",@progbits
	.globl	_Z9fCuKernelPiS_
	.p2align	3, 0x0
_Z9fCuKernelPiS_:
	.quad	_Z24__device_stub__fCuKernelPiS_
	.size	_Z9fCuKernelPiS_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"CUDA error on line %d: %s\n"
	.size	.L.str, 27

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"%d := %d\n"
	.size	.L.str.1, 10

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"*** ManagedMemory: %d\n"
	.size	.L.str.2, 23

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z9fCuKernelPiS_"
	.size	.L__unnamed_1, 17

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"CudaMallocManaged-allocating A & B..."
	.size	.Lstr, 38

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"A allocated..."
	.size	.Lstr.1, 15

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"B allocated..."
	.size	.Lstr.2, 15

	.type	.Lstr.3,@object                 # @str.3
.Lstr.3:
	.asciz	"launching kernel..."
	.size	.Lstr.3, 20

	.type	.Lstr.4,@object                 # @str.4
.Lstr.4:
	.asciz	"printing A..."
	.size	.Lstr.4, 14

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z24__device_stub__fCuKernelPiS_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z9fCuKernelPiS_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z9fCuKernelPiS_        ; -- Begin function _Z9fCuKernelPiS_
	.globl	_Z9fCuKernelPiS_
	.p2align	8
	.type	_Z9fCuKernelPiS_,@function
_Z9fCuKernelPiS_:                       ; @_Z9fCuKernelPiS_
; %bb.0:
	s_load_b64 s[0:1], s[0:1], 0x0
	v_dual_mov_b32 v1, 10 :: v_dual_lshlrev_b32 v0, 2, v0
	s_waitcnt lgkmcnt(0)
	global_store_b32 v0, v1, s[0:1]
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9fCuKernelPiS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 16
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 2
		.amdhsa_next_free_sgpr 2
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z9fCuKernelPiS_, .Lfunc_end0-_Z9fCuKernelPiS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 40
; NumSgprs: 2
; NumVgprs: 2
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 2
; NumVGPRsForWavesPerEU: 2
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 16
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9fCuKernelPiS_
    .private_segment_fixed_size: 0
    .sgpr_count:     2
    .sgpr_spill_count: 0
    .symbol:         _Z9fCuKernelPiS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     2
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
