#include <stdio.h>
#include <assert.h>
#include <math.h>
#include <vector>
#include <queue>
#include <ctime>

// CUDA runtime
#include <cuda_runtime.h>

using namespace std;

// Thread block size
#define TBS 512

// Warp size
#define WS 32

class Node {
private:
	int value;
	int* children;
	int numChildren;
	int explored;

public:
	Node();
	Node(int);
	__host__ __device__ int getValue();
	void addChild(Node*);
	__host__ __device__ int* getChildren();
	__host__ __device__ int getNumChildren();
	void printNode();
	void initializeChildren(int);
	__host__ __device__ int getExplored();
	void setExplored(int);
	__device__ int parallelSetExplored(int);
};

__global__ void parentListBackwardsWave(int *d_waveMask, int *d_nextWaveMask, int *d_parent, int *d_parentPtr, int *d_cost, int *d_size) {
	int idx = blockIdx.x * TBS + threadIdx.x;

	if (idx < *d_size && d_waveMask[idx] == 0) {
		// Loop through all children
		for (int i = d_parentPtr[idx]; i < d_parentPtr[idx + 1]; i++) {
			if (d_waveMask[d_parent[i]] == 1) {
				atomicCAS(&d_nextWaveMask[idx], 0, 1);
				d_cost[idx] = d_cost[d_parent[i]] + 1;
				break;
			}
		}
	}
	if(idx < *d_size && d_waveMask[idx] == 2){
		d_nextWaveMask[idx] = 2;
	}
}

__global__ void backwardsWave(int *d_waveMask, int *d_nextWaveMask, int *d_children, int *d_numChildren, int *d_cost, int *d_size, int *d_maxChildren) {
	int idx = blockIdx.x * TBS + threadIdx.x;

	if (idx < *d_size && d_waveMask[idx] == 0) {
		// Loop through all children
		for (int i = 0; i < *d_size * *d_maxChildren; i++) {
			if (d_children[i] == idx) {
				int parent = i / *d_maxChildren;
				if (d_waveMask[parent] == 1) {
					atomicCAS(&d_nextWaveMask[idx], 0, 1);
					d_cost[idx] = d_cost[parent] + 1;
					break;
				}
			}
		}
	}
	if(idx < *d_size && d_waveMask[idx] == 2){
		d_nextWaveMask[idx] = 2;
	}
}

__global__ void childListExploreWave(int *d_waveMask, int *d_nextWaveMask, int *d_children, int *d_numChildren, int *d_cost, int *d_size, int *d_maxChildren) {
	int idx = blockIdx.x * TBS + threadIdx.x;

	if (idx < *d_size && d_waveMask[idx] == 1) {
		int numChildren = d_numChildren[idx];
		
		for (int i = 0; i < numChildren; i++) {
			int child = d_children[idx * *d_maxChildren + i];
			
			atomicCAS(&d_nextWaveMask[child],0,1);
					
			if (d_waveMask[child] == 0) {
				d_cost[child] = d_cost[idx] + 1;
			}
		}
	}
	if(idx < *d_size && d_waveMask[idx] == 2){
		d_nextWaveMask[idx] = 2;
	}
}

__global__ void exploreWave(int *d_waveMask, int *d_nextWaveMask, Node *d_graph, int *d_children, int *d_cost, int *d_size, int *d_maxChildren) {
	int idx = blockIdx.x * TBS + threadIdx.x;

	if (idx < *d_size && d_waveMask[idx] == 1) {
		Node currentNode = d_graph[idx];
		int numChildren = currentNode.getNumChildren();
		
		for (int i = 0; i < numChildren; i++) {
			int child = d_children[idx * *d_maxChildren + i];
			
			atomicCAS(&d_nextWaveMask[child],0,1);
					
			if (d_waveMask[child] == 0) {
				d_cost[child] = d_cost[idx] + 1;
			}
		}
	}
	if(idx < *d_size && d_waveMask[idx] == 2){
		d_nextWaveMask[idx] = 2;
	}
}

__global__ void setPreviousExplored(int *d_waveMask, int *d_nextWaveMask, int *d_size){
	int idx = blockIdx.x * TBS + threadIdx.x;

	if(idx < *d_size){
		if(d_waveMask[idx] == 1){
			d_nextWaveMask[idx] = 2;
		}
	}
}

int* generateChildren(Node *nodes, int nNodes, int maxEdgesPerNode) {
	int* children = new int[nNodes * maxEdgesPerNode];

	for (int i = 0; i < nNodes; i++) {
		int numEdges = (rand() % maxEdgesPerNode) + 1;
		nodes[i].initializeChildren(numEdges);
		for (int j = 0; j < numEdges; j++) {
			int child = rand() % nNodes;
			bool isChild = false;
			for (int k = 0; k < nodes[i].getNumChildren(); k++){
				if (child == nodes[i].getChildren()[k]){
					isChild = true;
					break;
				}
			}
			if (!isChild && child != nodes[i].getValue()){
				children[i * maxEdgesPerNode + nodes[i].getNumChildren()] = child;
				nodes[i].addChild(&nodes[child]);
			}
		}
	}
	/*for (int i = 0; i < nNodes; i++) {
		nodes[i].printNode();
	}*/

	return children;
}

Node* generateGraph(int nNodes) {
	srand((unsigned)time(0)); 
	Node* nodes = new Node[nNodes];
	
	for (int i = 0; i < nNodes; i++) {
		Node* tmp = new Node(i);
		nodes[i] = *tmp;
	}

	return nodes; 
}

void exploreChild(Node* child, vector< vector<Node*> >* path, int depth, Node* nodes) {
	int numChildren = child->getNumChildren();
	if (numChildren > 0) {
		bool *toExplore = new bool[numChildren];
		vector<Node*> newPath;
		if (path->size() <= depth) {
			path->push_back(newPath);
		}
		vector<Node*>* currentPath = &(path->at(depth));
		
		for (int i = 0; i < numChildren; i++) {
			Node* newChild = &nodes[child->getChildren()[i]];
			if (newChild->getExplored() == 0) {
				currentPath->push_back(newChild);
				newChild->setExplored(1);
				toExplore[i] = true;
			} else {
				toExplore[i] = false;
			}
		}

		// Explore loop after push loop so it is actually BFS
		for (int i = 0; i < numChildren; i++) {
			Node* newChild = &nodes[child->getChildren()[i]];
			if (toExplore[i]) {
				exploreChild(newChild, path, depth + 1, nodes);	
			}
		}
	}

	child->setExplored(2);
	return;
}

int* bfs(Node* nodes, int size) {
	int* cost = new int[size];
	for (int i = 0; i < size; i++) {
		cost[i] = -1;
	}

	Node* currentNode = &nodes[0];
	queue<Node*> wave;
	wave.push(currentNode);
	cost[0] = 0;

	int depth = 0;
	while (!wave.empty()) {
		depth = cost[wave.front()->getValue()];
		while (!wave.empty() && depth == cost[wave.front()->getValue()]) {
			currentNode = wave.front();
			wave.pop();
			currentNode->setExplored(1);
			if (currentNode->getNumChildren() > 0) {
				int *children = currentNode->getChildren();
				for (int i = 0; i < currentNode->getNumChildren(); i++) {
					if (nodes[children[i]].getExplored() == 0) {
						nodes[children[i]].setExplored(1);
						cost[children[i]] = depth + 1;
						wave.push(&nodes[children[i]]);
					}
				}
			}
		}
	}

	return cost;
}

int* transformBfs(vector< vector<Node*> > path, int size) {
	int *result = new int[size];
	for (int i = 0; i < size; i++) {
		result[i] = -1;
	}
	for (int i = 0; i < path.size(); i++) {
		//printf("%i - ", i);
		for (int j = 0; j < path[i].size(); j++) {
			//printf(" %i ", path[i][j]->getValue());
			result[path[i][j]->getValue()] = i;
		}
		//printf("\n");
	}
	return result;
}

int* transformNumChildren(Node* nodes, int size) {
	int *result = new int[size];
	for (int i = 0; i < size; i++) {
		result[i] = nodes[i].getNumChildren();
	}
	return result;
}

int* transformParentPtr(Node* nodes, int size) {
	int *result = new int[size + 1];
	for (int i = 0; i < size; i++) {
		result[i] = 0;
	}

	for (int i = 0; i < size; i++) {
		Node *node = &nodes[i];
		if (node->getNumChildren() > 0) {
			int *children = node->getChildren();
			for (int j = 0; j < node->getNumChildren(); j++) {
				int child = children[j];
				result[child + 1] += 1;
			}
		}
	}
	
	for (int i = 1; i < size + 1; i++) {
		result[i] = result[i] + result[i - 1];
	}
	return result;
}

int* transformParents(Node* nodes, int size, int* parentPtr) {
	int numEdges = parentPtr[size];
	int *result = new int[numEdges];
	int *curIdx = new int[size];
	for (int i = 0; i < size; i++) {
		curIdx[i] = parentPtr[i];
	}

	for (int i = 0; i < size; i++) {
		Node *node = &nodes[i];
		if (node->getNumChildren() > 0) {
			int *children = node->getChildren();
			for (int j = 0; j < node->getNumChildren(); j++) {
				int child = children[j];
				result[curIdx[child]] = i;
				curIdx[child] = curIdx[child] + 1;
			}
		}
	}

	return result;
}

void callFlipFlopParent(int *d_size, int *d_children, int *d_numChildren, int *d_maxChildren, int *d_parent, int *d_parentPtr, int size, int maxChildren, int *synchResult) {
	cudaEvent_t start;
	cudaEventCreate(&start);
    cudaEvent_t stop;
    cudaEventCreate(&stop);

    int *d_cost, *d_waveMask, *d_nextWaveMask;

	// Allocate space for device copies
	cudaMalloc((void **)&d_cost, size * sizeof(int));
	cudaMalloc((void **)&d_waveMask, size * sizeof(int));
	cudaMalloc((void **)&d_nextWaveMask, size * sizeof(int));


    int gridSz = ceil(((float) size) / TBS);

    int *waveMask = new int[size];
    int *nextWaveMask = new int[size]; 

    int *cost = new int[size];
    cost[0] = 0;
    for (int i = 1; i < size; i++) {
    	cost[i] = -1;
    	waveMask[i] = 0;
		nextWaveMask[i] = 0;
    }

    waveMask[0] = 1;

    cudaMemcpy(d_cost, cost, size * sizeof(int), cudaMemcpyHostToDevice);
	cudaMemcpy(d_waveMask, waveMask, size * sizeof(int), cudaMemcpyHostToDevice);
	cudaMemcpy(d_nextWaveMask, nextWaveMask, size * sizeof(int), cudaMemcpyHostToDevice);

	// Record the start event
    cudaEventRecord(start, NULL);
    
    bool complete = false;
    int completed = 0;
    while(!complete) {
    	// Launch kernel on GPU
    	if (completed < (maxChildren * maxChildren - 1) / (maxChildren * maxChildren) * size) {
    		childListExploreWave<<<gridSz, TBS>>>(d_waveMask, d_nextWaveMask, d_children, d_numChildren, d_cost, d_size, d_maxChildren);
    	} else {
    		parentListBackwardsWave<<<gridSz, TBS>>>(d_waveMask, d_nextWaveMask, d_parent, d_parentPtr, d_cost, d_size);
    	}
		
		cudaDeviceSynchronize();
		setPreviousExplored<<<gridSz, TBS>>>(d_waveMask, d_nextWaveMask, d_size);		
		cudaDeviceSynchronize();
		cudaMemcpy(d_waveMask, d_nextWaveMask, size * sizeof(int), cudaMemcpyDeviceToDevice);
		cudaMemcpy(d_nextWaveMask, nextWaveMask, size * sizeof(int), cudaMemcpyHostToDevice);

		complete = true;
		cudaMemcpy(waveMask, d_waveMask, size * sizeof(int), cudaMemcpyDeviceToHost);
		for(int i = 0 ; i < size; i++) {
			if(waveMask[i] == 1) {
				complete = false;
			} else if (waveMask[i] == 2) {
				completed += 1;
			}
		}
    }

	
	
	// Make sure result is finished
	cudaDeviceSynchronize();

	// Record end event
	cudaEventRecord(stop, NULL);
	cudaEventSynchronize(stop);
	float msecTotal = 0.0f;
    cudaEventElapsedTime(&msecTotal, start, stop);

    printf("GPU Parent Flip Flop Explore Time= %.3f msec\n", msecTotal);

	// Copy result back to host
	int *gpu_result = (int *) malloc(size * sizeof(int));
	cudaMemcpy(gpu_result, d_cost, size * sizeof(int), cudaMemcpyDeviceToHost);

	bool isCorrect = true;

	for (int i = 0; i < size; i++) {
		if (synchResult[i] != gpu_result[i]) {
			isCorrect = false;
			printf("%i CPU: %i GPU:%i\n", i, synchResult[i], gpu_result[i]);
		}
	}

	if (!isCorrect) {
		printf("The results do not match\n");
	} else {
		printf("The results match\n");
	}
}


void callFlipFlopWaveExplore(int *d_size, int *d_children, int *d_numChildren, int size, int *d_maxChildren, int maxChildren, int *synchResult) {
	cudaEvent_t start;
	cudaEventCreate(&start);
    cudaEvent_t stop;
    cudaEventCreate(&stop);

    int *d_cost, *d_waveMask, *d_nextWaveMask;

	// Allocate space for device copies
	cudaMalloc((void **)&d_cost, size * sizeof(int));
	cudaMalloc((void **)&d_waveMask, size * sizeof(int));
	cudaMalloc((void **)&d_nextWaveMask, size * sizeof(int));


    int gridSz = ceil(((float) size) / TBS);

    int *waveMask = new int[size];
    int *nextWaveMask = new int[size]; 

    int *cost = new int[size];
    cost[0] = 0;
    for (int i = 1; i < size; i++) {
    	cost[i] = -1;
    	waveMask[i] = 0;
		nextWaveMask[i] = 0;
    }

    waveMask[0] = 1;

    cudaMemcpy(d_cost, cost, size * sizeof(int), cudaMemcpyHostToDevice);
	cudaMemcpy(d_waveMask, waveMask, size * sizeof(int), cudaMemcpyHostToDevice);
	cudaMemcpy(d_nextWaveMask, nextWaveMask, size * sizeof(int), cudaMemcpyHostToDevice);

	// Record the start event
    cudaEventRecord(start, NULL);
    
    bool complete = false;
    int completed = 0;
    while(!complete) {
    	// Launch kernel on GPU
    	if (completed < (maxChildren * maxChildren - 1) / (maxChildren * maxChildren) * size) {
    		childListExploreWave<<<gridSz, TBS>>>(d_waveMask, d_nextWaveMask, d_children, d_numChildren, d_cost, d_size, d_maxChildren);
    	} else {
    		backwardsWave<<<gridSz, TBS>>>(d_waveMask, d_nextWaveMask, d_children, d_numChildren, d_cost, d_size, d_maxChildren);
    	}
		
		cudaDeviceSynchronize();
		setPreviousExplored<<<gridSz, TBS>>>(d_waveMask, d_nextWaveMask, d_size);		
		cudaDeviceSynchronize();
		cudaMemcpy(d_waveMask, d_nextWaveMask, size * sizeof(int), cudaMemcpyDeviceToDevice);
		cudaMemcpy(d_nextWaveMask, nextWaveMask, size * sizeof(int), cudaMemcpyHostToDevice);

		complete = true;
		cudaMemcpy(waveMask, d_waveMask, size * sizeof(int), cudaMemcpyDeviceToHost);
		for(int i = 0 ; i < size; i++) {
			if(waveMask[i] == 1) {
				complete = false;
			} else if (waveMask[i] == 2) {
				completed += 1;
			}
		}
    }

	
	
	// Make sure result is finished
	cudaDeviceSynchronize();

	// Record end event
	cudaEventRecord(stop, NULL);
	cudaEventSynchronize(stop);
	float msecTotal = 0.0f;
    cudaEventElapsedTime(&msecTotal, start, stop);

    printf("GPU Flip Flop Explore Time= %.3f msec\n", msecTotal);

	// Copy result back to host
	int *gpu_result = (int *) malloc(size * sizeof(int));
	cudaMemcpy(gpu_result, d_cost, size * sizeof(int), cudaMemcpyDeviceToHost);

	bool isCorrect = true;

	for (int i = 0; i < size; i++) {
		if (synchResult[i] != gpu_result[i]) {
			isCorrect = false;
			printf("%i CPU: %i GPU:%i\n", i, synchResult[i], gpu_result[i]);
		}
	}

	if (!isCorrect) {
		printf("The results do not match\n");
	} else {
		printf("The results match\n");
	}
}

void callChildListExploreWave(int *d_size, int *d_children, int *d_numChildren, int size, int *d_maxChildren, int *synchResult) {
	cudaEvent_t start;
	cudaEventCreate(&start);
    cudaEvent_t stop;
    cudaEventCreate(&stop);

    int *d_cost, *d_waveMask, *d_nextWaveMask;

	// Allocate space for device copies
	cudaMalloc((void **)&d_cost, size * sizeof(int));
	cudaMalloc((void **)&d_waveMask, size * sizeof(int));
	cudaMalloc((void **)&d_nextWaveMask, size * sizeof(int));


    int gridSz = ceil(((float) size) / TBS);

    int *waveMask = new int[size];
    int *nextWaveMask = new int[size]; 

    int *cost = new int[size];
    cost[0] = 0;
    for (int i = 1; i < size; i++) {
    	cost[i] = -1;
    	waveMask[i] = 0;
		nextWaveMask[i] = 0;
    }

    waveMask[0] = 1;

    cudaMemcpy(d_cost, cost, size * sizeof(int), cudaMemcpyHostToDevice);
	cudaMemcpy(d_waveMask, waveMask, size * sizeof(int), cudaMemcpyHostToDevice);
	cudaMemcpy(d_nextWaveMask, nextWaveMask, size * sizeof(int), cudaMemcpyHostToDevice);
    
	// Record the start event
    cudaEventRecord(start, NULL);

    bool complete = false;
    while(!complete) {

    	// Launch kernel on GPU
		childListExploreWave<<<gridSz, TBS>>>(d_waveMask, d_nextWaveMask, d_children, d_numChildren, d_cost, d_size, d_maxChildren);
		cudaDeviceSynchronize();
		setPreviousExplored<<<gridSz, TBS>>>(d_waveMask, d_nextWaveMask, d_size);		
		cudaDeviceSynchronize();
		cudaMemcpy(d_waveMask, d_nextWaveMask, size * sizeof(int), cudaMemcpyDeviceToDevice);
		cudaMemcpy(d_nextWaveMask, nextWaveMask, size * sizeof(int), cudaMemcpyHostToDevice);

		complete = true;
		cudaMemcpy(waveMask, d_waveMask, size * sizeof(int), cudaMemcpyDeviceToHost);
		for(int i = 0 ; i < size; i++){
			if(waveMask[i] == 1){
				complete = false;
			}
		}
    }

	
	
	// Make sure result is finished
	cudaDeviceSynchronize();

	// Record end event
	cudaEventRecord(stop, NULL);
	cudaEventSynchronize(stop);
	float msecTotal = 0.0f;
    cudaEventElapsedTime(&msecTotal, start, stop);

    printf("GPU Child List Explore Time= %.3f msec\n", msecTotal);

	// Copy result back to host
	int *gpu_result = (int *) malloc(size * sizeof(int));
	cudaMemcpy(gpu_result, d_cost, size * sizeof(int), cudaMemcpyDeviceToHost);

	bool isCorrect = true;

	for (int i = 0; i < size; i++) {
		if (synchResult[i] != gpu_result[i]) {
			isCorrect = false;
			printf("%i CPU: %i GPU:%i\n", i, synchResult[i], gpu_result[i]);
		}
	}

	if (!isCorrect) {
		printf("The results do not match\n");
	} else {
		printf("The results match\n");
	}
}

void callDeviceCachedVisitBFS(Node *d_graph, int *d_size, int *d_children, int size, int *d_maxChildren, int *synchResult) {
	cudaEvent_t start;
	cudaEventCreate(&start);
    cudaEvent_t stop;
    cudaEventCreate(&stop);

    int *d_cost, *d_waveMask, *d_nextWaveMask;

	// Allocate space for device copies
	cudaMalloc((void **)&d_cost, size * sizeof(int));
	cudaMalloc((void **)&d_waveMask, size * sizeof(int));
	cudaMalloc((void **)&d_nextWaveMask, size * sizeof(int));


    int gridSz = ceil(((float) size) / TBS);

    int *waveMask = new int[size];
    int *nextWaveMask = new int[size]; 

    int *cost = new int[size];
    cost[0] = 0;
    for (int i = 1; i < size; i++) {
    	cost[i] = -1;
    	waveMask[i] = 0;
	nextWaveMask[i] = 0;
    }

    waveMask[0] = 1;

    cudaMemcpy(d_cost, cost, size * sizeof(int), cudaMemcpyHostToDevice);
	cudaMemcpy(d_waveMask, waveMask, size * sizeof(int), cudaMemcpyHostToDevice);
	cudaMemcpy(d_nextWaveMask, nextWaveMask, size * sizeof(int), cudaMemcpyHostToDevice);
    
	// Record the start event
    cudaEventRecord(start, NULL);

    bool complete = false;
    while(!complete) {

    	// Launch kernel on GPU
		exploreWave<<<gridSz, TBS>>>(d_waveMask, d_nextWaveMask, d_graph, d_children, d_cost, d_size, d_maxChildren);
		cudaDeviceSynchronize();
		setPreviousExplored<<<gridSz, TBS>>>(d_waveMask, d_nextWaveMask, d_size);		
		cudaDeviceSynchronize();
		cudaMemcpy(d_waveMask, d_nextWaveMask, size * sizeof(int), cudaMemcpyDeviceToDevice);
		cudaMemcpy(d_nextWaveMask, nextWaveMask, size * sizeof(int), cudaMemcpyHostToDevice);

		//exploreWave<<<gridSz, TBS>>>(d_waveMask, d_nextWaveMask, d_graph, d_children, d_cost, d_size, d_maxChildren);
		complete = true;
		cudaMemcpy(waveMask, d_waveMask, size * sizeof(int), cudaMemcpyDeviceToHost);
		for(int i = 0 ; i < size; i++){
			if(waveMask[i] == 1){
				complete = false;
			}
		}
    }

	
	
	// Make sure result is finished
	cudaDeviceSynchronize();

	// Record end event
	cudaEventRecord(stop, NULL);
	cudaEventSynchronize(stop);
	float msecTotal = 0.0f;
    cudaEventElapsedTime(&msecTotal, start, stop);

    printf("GPU Wave Time= %.3f msec\n", msecTotal);

	// Copy result back to host
	int *gpu_result = (int *) malloc(size * sizeof(int));
	cudaMemcpy(gpu_result, d_cost, size * sizeof(int), cudaMemcpyDeviceToHost);

	bool isCorrect = true;

	for (int i = 0; i < size; i++) {
		if (synchResult[i] != gpu_result[i]) {
			isCorrect = false;
			printf("%i CPU: %i GPU:%i\n", i, synchResult[i], gpu_result[i]);
		}
	}

	if (!isCorrect) {
		printf("The results do not match\n");
	} else {
		printf("The results match\n");
	}
}

int main (int argc, char **argv) {
	if (argc !=3) {
		printf("\nToo few arguments!\n");
		abort();
	}

	// Get command line argument
	int size = atoi(argv[1]);
	int maxEdgesPerNode = atoi(argv[2]);

	Node* nodes = generateGraph(size);
	int* children = generateChildren(nodes, size, maxEdgesPerNode);
	int* numChildren = transformNumChildren(nodes, size);
	int* parentPtr = transformParentPtr(nodes, size);
	int numEdges = parentPtr[size];
	int* parent = transformParents(nodes, size, parentPtr);

	/*for (int i = 0; i < size + 1; i++) {
		printf("%i parentPtr: %i\n", i, parentPtr[i]);
	}
	
	for (int i = 0; i < size; i++) {
		for (int j = parentPtr[i]; j < parentPtr[i + 1]; j++) {
			printf("%i child: %i parent: %i\n", j, i, parent[j]);
		}
	}*/

	Node* d_graph;
	int *d_children, *d_size, *d_maxChildren, *d_numChildren, *d_parent, *d_parentPtr;

	// Allocate space for device copies
	cudaMalloc((void **)&d_graph, size * sizeof(Node));
	cudaMalloc((void **)&d_size, sizeof(int));
	cudaMalloc((void **)&d_maxChildren, sizeof(int));
	cudaMalloc((void **)&d_children, size * maxEdgesPerNode * sizeof(int));
	cudaMalloc((void **)&d_numChildren, size * sizeof(int));
	cudaMalloc((void **)&d_parentPtr, (size + 1) * sizeof(int));
	cudaMalloc((void **)&d_parent, numEdges * sizeof(int));

	// Copy inputs to device
	cudaMemcpy(d_graph, nodes, size * sizeof(Node), cudaMemcpyHostToDevice);
	cudaMemcpy(d_size, &size, sizeof(int), cudaMemcpyHostToDevice);
	cudaMemcpy(d_maxChildren, &maxEdgesPerNode, sizeof(int), cudaMemcpyHostToDevice);
	cudaMemcpy(d_children, children, size * maxEdgesPerNode * sizeof(int), cudaMemcpyHostToDevice);
	cudaMemcpy(d_numChildren, numChildren, size * sizeof(int), cudaMemcpyHostToDevice);
	cudaMemcpy(d_parentPtr, parentPtr, (size + 1) * sizeof(int), cudaMemcpyHostToDevice);
	cudaMemcpy(d_parent, parent, numEdges * sizeof(int), cudaMemcpyHostToDevice);

	//Synchronouse bfs
	//vector< vector<Node*> > path = bfs(nodes, size);
	clock_t start;
	clock_t end;
	start = clock();
	int *synchResult = bfs(nodes, size);
	end = clock();

	printf("CPU Time= %.3f msec\n", (end - start) / (double) (CLOCKS_PER_SEC / 1000));

	callDeviceCachedVisitBFS(d_graph, d_size, d_children, size, d_maxChildren, synchResult);

	callChildListExploreWave(d_size, d_children, d_numChildren, size, d_maxChildren, synchResult);

	//callFlipFlopWaveExplore(d_size, d_children, d_numChildren, size, d_maxChildren, maxEdgesPerNode, synchResult);

	callFlipFlopParent(d_size, d_children, d_numChildren, d_maxChildren, d_parent, d_parentPtr, size, maxEdgesPerNode, synchResult);

	// Cleanup
	cudaFree(d_graph); 
	cudaFree(d_size);
	cudaFree(d_children);
	cudaFree(d_numChildren);
	cudaFree(d_maxChildren);

	return 0;
}

Node::Node(int newValue) {
	value = newValue;
	explored = 0;
}

Node::Node() {
}

__host__ __device__ int Node::getValue() {
	return value;
}

__host__ __device__ int* Node::getChildren() {
	return children;
}

__host__ __device__ int Node::getNumChildren() {
	return numChildren;
}

void Node::addChild(Node* child) {
	children[numChildren] = child->getValue();
	numChildren++;

	return;
}

void Node::printNode() {
	printf("Value: %i Children: [", value);
	for (int i = 0; i < numChildren; i++) {
		printf("%i", children[i]);
		if (i != numChildren - 1) {
			printf(", ");
		}
	}
	printf("]\n");
	return;
}

void Node::initializeChildren(int numEdges) {
	children = new int[numEdges];
}

__host__ __device__ int Node::getExplored() {
	return explored;
}

__device__ int Node::parallelSetExplored(int newExplored) {
	return atomicExch(&explored, newExplored);
}

void Node::setExplored(int newExplored) {
	explored = newExplored;
	return;
}




	.file	"tmpxft_00288a24_00000000-6_bfs.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3204:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3204:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.align 2
	.type	_ZNSt15__new_allocatorIP4NodeE8allocateEmPKv.part.0, @function
_ZNSt15__new_allocatorIP4NodeE8allocateEmPKv.part.0:
.LFB3633:
	.cfi_startproc
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	pushq	%rax
	.cfi_def_cfa_offset 16
	movabsq	$2305843009213693951, %rax
	cmpq	%rdi, %rax
	jnb	.L3
	call	_ZSt28__throw_bad_array_new_lengthv@PLT
.L3:
	call	_ZSt17__throw_bad_allocv@PLT
	.cfi_endproc
.LFE3633:
	.size	_ZNSt15__new_allocatorIP4NodeE8allocateEmPKv.part.0, .-_ZNSt15__new_allocatorIP4NodeE8allocateEmPKv.part.0
	.set	_ZNSt15__new_allocatorIPP4NodeE8allocateEmPKv.part.0,_ZNSt15__new_allocatorIP4NodeE8allocateEmPKv.part.0
	.globl	_Z13generateGraphi
	.type	_Z13generateGraphi, @function
_Z13generateGraphi:
.LFB3160:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	%edi, %r12d
	xorl	%edi, %edi
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	call	time@PLT
	movl	%eax, %edi
	call	srand@PLT
	movslq	%r12d, %rdi
	movabsq	$384307168202282325, %rax
	cmpq	%rdi, %rax
	jb	.L7
	imulq	$24, %rdi, %rdi
	xorl	%ebp, %ebp
	call	_Znam@PLT
	movq	%rax, %rbx
	jmp	.L8
.L7:
	call	__cxa_throw_bad_array_new_length@PLT
.L8:
	cmpl	%ebp, %r12d
	jle	.L11
	movl	$24, %edi
	call	_Znwm@PLT
	xorl	%edx, %edx
	movl	%edx, 20(%rax)
	imulq	$24, %rbp, %rdx
	movl	%ebp, (%rax)
	movups	(%rax), %xmm0
	incq	%rbp
	movq	16(%rax), %rax
	movups	%xmm0, (%rbx,%rdx)
	movq	%rax, 16(%rbx,%rdx)
	jmp	.L8
.L11:
	movq	%rbx, %rax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3160:
	.size	_Z13generateGraphi, .-_Z13generateGraphi
	.globl	_Z12transformBfsSt6vectorIS_IP4NodeSaIS1_EESaIS3_EEi
	.type	_Z12transformBfsSt6vectorIS_IP4NodeSaIS1_EESaIS3_EEi, @function
_Z12transformBfsSt6vectorIS_IP4NodeSaIS1_EESaIS3_EEi:
.LFB3178:
	.cfi_startproc
	endbr64
	movabsq	$2305843009213693950, %rax
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movq	%rdi, %rbx
	movslq	%esi, %rdi
	pushq	%rcx
	.cfi_def_cfa_offset 32
	cmpq	%rdi, %rax
	jb	.L13
	movq	%rdi, %rbp
	salq	$2, %rdi
	call	_Znam@PLT
	movq	%rax, %rdx
	xorl	%eax, %eax
	jmp	.L14
.L13:
	call	__cxa_throw_bad_array_new_length@PLT
.L14:
	cmpl	%eax, %ebp
	jle	.L21
	movl	$-1, (%rdx,%rax,4)
	incq	%rax
	jmp	.L14
.L21:
	movq	(%rbx), %rsi
	movq	8(%rbx), %rax
	xorl	%r8d, %r8d
	subq	%rsi, %rax
	sarq	$3, %rax
	imull	$-1431655765, %eax, %eax
.L16:
	cmpl	%eax, %r8d
	je	.L12
	movq	(%rsi), %r9
	movq	8(%rsi), %rcx
	xorl	%edi, %edi
	subq	%r9, %rcx
	sarq	$3, %rcx
.L19:
	cmpq	%rdi, %rcx
	je	.L22
	movq	(%r9,%rdi,8), %r10
	incq	%rdi
	movslq	(%r10), %r10
	movl	%r8d, (%rdx,%r10,4)
	jmp	.L19
.L22:
	incl	%r8d
	addq	$24, %rsi
	jmp	.L16
.L12:
	movq	%rdx, %rax
	popq	%rdx
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3178:
	.size	_Z12transformBfsSt6vectorIS_IP4NodeSaIS1_EESaIS3_EEi, .-_Z12transformBfsSt6vectorIS_IP4NodeSaIS1_EESaIS3_EEi
	.globl	_Z20transformNumChildrenP4Nodei
	.type	_Z20transformNumChildrenP4Nodei, @function
_Z20transformNumChildrenP4Nodei:
.LFB3179:
	.cfi_startproc
	endbr64
	movabsq	$2305843009213693950, %rax
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rdi, %rbp
	movslq	%esi, %rdi
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	pushq	%rcx
	.cfi_def_cfa_offset 32
	cmpq	%rdi, %rax
	jb	.L24
	movq	%rdi, %rbx
	salq	$2, %rdi
	call	_Znam@PLT
	xorl	%edx, %edx
	jmp	.L25
.L24:
	call	__cxa_throw_bad_array_new_length@PLT
.L25:
	cmpl	%edx, %ebx
	jle	.L28
	imulq	$24, %rdx, %rcx
	movl	16(%rbp,%rcx), %ecx
	movl	%ecx, (%rax,%rdx,4)
	incq	%rdx
	jmp	.L25
.L28:
	popq	%rdx
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3179:
	.size	_Z20transformNumChildrenP4Nodei, .-_Z20transformNumChildrenP4Nodei
	.globl	_Z18transformParentPtrP4Nodei
	.type	_Z18transformParentPtrP4Nodei, @function
_Z18transformParentPtrP4Nodei:
.LFB3180:
	.cfi_startproc
	endbr64
	movabsq	$2305843009213693950, %rax
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rdi, %rbp
	leal	1(%rsi), %edi
	movslq	%edi, %rdi
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	pushq	%r8
	.cfi_def_cfa_offset 32
	cmpq	%rdi, %rax
	jb	.L30
	salq	$2, %rdi
	movl	%esi, %ebx
	call	_Znam@PLT
	xorl	%edx, %edx
	jmp	.L31
.L30:
	call	__cxa_throw_bad_array_new_length@PLT
.L31:
	cmpl	%edx, %ebx
	jle	.L41
	xorl	%ecx, %ecx
	movl	%ecx, (%rax,%rdx,4)
	incq	%rdx
	jmp	.L31
.L41:
	leaq	8(%rbp), %rdx
	xorl	%esi, %esi
.L33:
	cmpl	%ebx, %esi
	jge	.L42
	movl	8(%rdx), %edi
	testl	%edi, %edi
	jle	.L34
	movq	(%rdx), %r9
	xorl	%ecx, %ecx
.L35:
	movslq	(%r9,%rcx,4), %r8
	incq	%rcx
	incl	4(%rax,%r8,4)
	cmpl	%ecx, %edi
	jg	.L35
.L34:
	incl	%esi
	addq	$24, %rdx
	jmp	.L33
.L42:
	xorl	%edx, %edx
.L37:
	incq	%rdx
	cmpl	%edx, %ebx
	jl	.L43
	movl	-4(%rax,%rdx,4), %ecx
	addl	%ecx, (%rax,%rdx,4)
	jmp	.L37
.L43:
	popq	%rdx
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3180:
	.size	_Z18transformParentPtrP4Nodei, .-_Z18transformParentPtrP4Nodei
	.globl	_Z16transformParentsP4NodeiPi
	.type	_Z16transformParentsP4NodeiPi, @function
_Z16transformParentsP4NodeiPi:
.LFB3181:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movslq	%esi, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	leaq	0(,%r15,4), %rax
	movabsq	$2305843009213693950, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdi, %rbx
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	movslq	(%rdx,%r15,4), %rdi
	movq	%rax, 8(%rsp)
	cmpq	%rdi, %r14
	jb	.L45
	salq	$2, %rdi
	movq	%rdx, %r13
	call	_Znam@PLT
	movq	%rax, %r12
	cmpq	%r15, %r14
	jnb	.L46
.L45:
	call	__cxa_throw_bad_array_new_length@PLT
.L46:
	movq	8(%rsp), %rdi
	movq	%r15, %rbp
	call	_Znam@PLT
	movq	%rax, %rcx
	xorl	%eax, %eax
.L47:
	cmpl	%eax, %ebp
	jle	.L55
	movl	0(%r13,%rax,4), %edx
	movl	%edx, (%rcx,%rax,4)
	incq	%rax
	jmp	.L47
.L55:
	leaq	8(%rbx), %rax
	xorl	%edx, %edx
.L49:
	cmpl	%ebp, %edx
	jge	.L56
	movl	8(%rax), %r8d
	testl	%r8d, %r8d
	jle	.L50
	movq	(%rax), %r11
	xorl	%esi, %esi
.L51:
	movslq	(%r11,%rsi,4), %rdi
	incq	%rsi
	leaq	(%rcx,%rdi,4), %r9
	movslq	(%r9), %r10
	movq	%r10, %rdi
	movl	%edx, (%r12,%r10,4)
	incl	%edi
	movl	%edi, (%r9)
	cmpl	%esi, %r8d
	jg	.L51
.L50:
	incl	%edx
	addq	$24, %rax
	jmp	.L49
.L56:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	movq	%r12, %rax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3181:
	.size	_Z16transformParentsP4NodeiPi, .-_Z16transformParentsP4NodeiPi
	.align 2
	.globl	_ZN4NodeC2Ei
	.type	_ZN4NodeC2Ei, @function
_ZN4NodeC2Ei:
.LFB3188:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
	movl	%esi, (%rdi)
	movl	%eax, 20(%rdi)
	ret
	.cfi_endproc
.LFE3188:
	.size	_ZN4NodeC2Ei, .-_ZN4NodeC2Ei
	.globl	_ZN4NodeC1Ei
	.set	_ZN4NodeC1Ei,_ZN4NodeC2Ei
	.align 2
	.globl	_ZN4NodeC2Ev
	.type	_ZN4NodeC2Ev, @function
_ZN4NodeC2Ev:
.LFB3191:
	.cfi_startproc
	endbr64
	ret
	.cfi_endproc
.LFE3191:
	.size	_ZN4NodeC2Ev, .-_ZN4NodeC2Ev
	.globl	_ZN4NodeC1Ev
	.set	_ZN4NodeC1Ev,_ZN4NodeC2Ev
	.align 2
	.globl	_ZN4Node8getValueEv
	.type	_ZN4Node8getValueEv, @function
_ZN4Node8getValueEv:
.LFB3193:
	.cfi_startproc
	endbr64
	movl	(%rdi), %eax
	ret
	.cfi_endproc
.LFE3193:
	.size	_ZN4Node8getValueEv, .-_ZN4Node8getValueEv
	.align 2
	.globl	_ZN4Node11getChildrenEv
	.type	_ZN4Node11getChildrenEv, @function
_ZN4Node11getChildrenEv:
.LFB3194:
	.cfi_startproc
	endbr64
	movq	8(%rdi), %rax
	ret
	.cfi_endproc
.LFE3194:
	.size	_ZN4Node11getChildrenEv, .-_ZN4Node11getChildrenEv
	.align 2
	.globl	_ZN4Node14getNumChildrenEv
	.type	_ZN4Node14getNumChildrenEv, @function
_ZN4Node14getNumChildrenEv:
.LFB3195:
	.cfi_startproc
	endbr64
	movl	16(%rdi), %eax
	ret
	.cfi_endproc
.LFE3195:
	.size	_ZN4Node14getNumChildrenEv, .-_ZN4Node14getNumChildrenEv
	.align 2
	.globl	_ZN4Node8addChildEPS_
	.type	_ZN4Node8addChildEPS_, @function
_ZN4Node8addChildEPS_:
.LFB3196:
	.cfi_startproc
	endbr64
	movl	(%rsi), %ecx
	movslq	16(%rdi), %rdx
	movq	8(%rdi), %rax
	movl	%ecx, (%rax,%rdx,4)
	incl	16(%rdi)
	ret
	.cfi_endproc
.LFE3196:
	.size	_ZN4Node8addChildEPS_, .-_ZN4Node8addChildEPS_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Value: %i Children: ["
.LC1:
	.string	"%i"
.LC2:
	.string	", "
.LC3:
	.string	"]\n"
	.text
	.align 2
	.globl	_ZN4Node9printNodeEv
	.type	_ZN4Node9printNodeEv, @function
_ZN4Node9printNodeEv:
.LFB3197:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	leaq	.LC0(%rip), %rsi
	xorl	%eax, %eax
	leaq	.LC1(%rip), %r12
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movl	(%rdi), %edx
	movq	%rdi, %rbx
	movl	$2, %edi
	call	__printf_chk@PLT
.L64:
	cmpl	%ebp, 16(%rbx)
	jle	.L68
	movq	8(%rbx), %rax
	movq	%r12, %rsi
	movl	$2, %edi
	movl	(%rax,%rbp,4), %edx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	16(%rbx), %eax
	decl	%eax
	cmpl	%ebp, %eax
	je	.L65
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L65:
	incq	%rbp
	jmp	.L64
.L68:
	popq	%rbx
	.cfi_def_cfa_offset 24
	leaq	.LC3(%rip), %rsi
	popq	%rbp
	.cfi_def_cfa_offset 16
	movl	$2, %edi
	xorl	%eax, %eax
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	__printf_chk@PLT
	.cfi_endproc
.LFE3197:
	.size	_ZN4Node9printNodeEv, .-_ZN4Node9printNodeEv
	.align 2
	.globl	_ZN4Node18initializeChildrenEi
	.type	_ZN4Node18initializeChildrenEi, @function
_ZN4Node18initializeChildrenEi:
.LFB3198:
	.cfi_startproc
	endbr64
	movabsq	$2305843009213693950, %rax
	movslq	%esi, %rsi
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	cmpq	%rsi, %rax
	jb	.L70
	movq	%rdi, %rbx
	leaq	0(,%rsi,4), %rdi
	call	_Znam@PLT
	movq	%rax, 8(%rbx)
	popq	%rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 8
	ret
.L70:
	.cfi_restore_state
	call	__cxa_throw_bad_array_new_length@PLT
	.cfi_endproc
.LFE3198:
	.size	_ZN4Node18initializeChildrenEi, .-_ZN4Node18initializeChildrenEi
	.globl	_Z16generateChildrenP4Nodeii
	.type	_Z16generateChildrenP4Nodeii, @function
_Z16generateChildrenP4Nodeii:
.LFB3159:
	.cfi_startproc
	endbr64
	movabsq	$2305843009213693950, %rax
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rdi, %r13
	movl	%esi, %edi
	imull	%edx, %edi
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movslq	%edi, %rdi
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	cmpq	%rdi, %rax
	jb	.L74
	salq	$2, %rdi
	movl	%esi, %ebp
	movl	%edx, %r12d
	movq	%r13, %rbx
	call	_Znam@PLT
	xorl	%r15d, %r15d
	movq	%rax, 8(%rsp)
	xorl	%eax, %eax
	movl	%eax, (%rsp)
	jmp	.L75
.L74:
	call	__cxa_throw_bad_array_new_length@PLT
.L88:
	incl	(%rsp)
	addq	$24, %rbx
	addl	%r12d, %r15d
.L75:
	cmpl	%ebp, (%rsp)
	jge	.L87
	call	rand@PLT
	movq	%rbx, %rdi
	xorl	%r14d, %r14d
	cltd
	idivl	%r12d
	leal	1(%rdx), %eax
	movl	%eax, %esi
	movl	%eax, 4(%rsp)
	call	_ZN4Node18initializeChildrenEi
.L76:
	movl	4(%rsp), %eax
	cmpl	%eax, %r14d
	jge	.L88
	call	rand@PLT
	xorl	%ecx, %ecx
	cltd
	idivl	%ebp
	movl	16(%rbx), %eax
.L77:
	cmpl	%ecx, %eax
	jle	.L89
	movq	8(%rbx), %rsi
	movl	(%rsi,%rcx,4), %esi
	incq	%rcx
	cmpl	%edx, %esi
	jne	.L77
	jmp	.L78
.L89:
	cmpl	(%rbx), %edx
	je	.L78
	movq	8(%rsp), %rcx
	addl	%r15d, %eax
	movslq	%edx, %rsi
	movq	%rbx, %rdi
	imulq	$24, %rsi, %rsi
	cltq
	movl	%edx, (%rcx,%rax,4)
	addq	%r13, %rsi
	call	_ZN4Node8addChildEPS_
.L78:
	incl	%r14d
	jmp	.L76
.L87:
	movq	8(%rsp), %rax
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3159:
	.size	_Z16generateChildrenP4Nodeii, .-_Z16generateChildrenP4Nodeii
	.align 2
	.globl	_ZN4Node11getExploredEv
	.type	_ZN4Node11getExploredEv, @function
_ZN4Node11getExploredEv:
.LFB3199:
	.cfi_startproc
	endbr64
	movl	20(%rdi), %eax
	ret
	.cfi_endproc
.LFE3199:
	.size	_ZN4Node11getExploredEv, .-_ZN4Node11getExploredEv
	.align 2
	.globl	_ZN4Node19parallelSetExploredEi
	.type	_ZN4Node19parallelSetExploredEi, @function
_ZN4Node19parallelSetExploredEi:
.LFB3200:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE3200:
	.size	_ZN4Node19parallelSetExploredEi, .-_ZN4Node19parallelSetExploredEi
	.align 2
	.globl	_ZN4Node11setExploredEi
	.type	_ZN4Node11setExploredEi, @function
_ZN4Node11setExploredEi:
.LFB3201:
	.cfi_startproc
	endbr64
	movl	%esi, 20(%rdi)
	ret
	.cfi_endproc
.LFE3201:
	.size	_ZN4Node11setExploredEi, .-_ZN4Node11setExploredEi
	.globl	_Z53__device_stub__Z23parentListBackwardsWavePiS_S_S_S_S_PiS_S_S_S_S_
	.type	_Z53__device_stub__Z23parentListBackwardsWavePiS_S_S_S_S_PiS_S_S_S_S_, @function
_Z53__device_stub__Z23parentListBackwardsWavePiS_S_S_S_S_PiS_S_S_S_S_:
.LFB3226:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movq	%r9, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	movq	%rsp, %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L94
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z23parentListBackwardsWavePiS_S_S_S_S_(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L94:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L96
	call	__stack_chk_fail@PLT
.L96:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3226:
	.size	_Z53__device_stub__Z23parentListBackwardsWavePiS_S_S_S_S_PiS_S_S_S_S_, .-_Z53__device_stub__Z23parentListBackwardsWavePiS_S_S_S_S_PiS_S_S_S_S_
	.globl	_Z23parentListBackwardsWavePiS_S_S_S_S_
	.type	_Z23parentListBackwardsWavePiS_S_S_S_S_, @function
_Z23parentListBackwardsWavePiS_S_S_S_S_:
.LFB3227:
	.cfi_startproc
	endbr64
	jmp	_Z53__device_stub__Z23parentListBackwardsWavePiS_S_S_S_S_PiS_S_S_S_S_
	.cfi_endproc
.LFE3227:
	.size	_Z23parentListBackwardsWavePiS_S_S_S_S_, .-_Z23parentListBackwardsWavePiS_S_S_S_S_
	.globl	_Z45__device_stub__Z13backwardsWavePiS_S_S_S_S_S_PiS_S_S_S_S_S_
	.type	_Z45__device_stub__Z13backwardsWavePiS_S_S_S_S_S_PiS_S_S_S_S_S_, @function
_Z45__device_stub__Z13backwardsWavePiS_S_S_S_S_S_PiS_S_S_S_S_S_:
.LFB3228:
	.cfi_startproc
	endbr64
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movq	208(%rsp), %rax
	movq	%rdi, 56(%rsp)
	leaq	80(%rsp), %rdi
	movq	%rsi, 48(%rsp)
	leaq	92(%rsp), %rsi
	movq	%rdx, 40(%rsp)
	leaq	64(%rsp), %rdx
	movq	%rcx, 32(%rsp)
	leaq	72(%rsp), %rcx
	movq	%r8, 24(%rsp)
	movq	%r9, 16(%rsp)
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rax
	movl	$1, 88(%rsp)
	movq	%rax, 128(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 80(%rsp)
	movq	%rax, 92(%rsp)
	movl	$1, 100(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L99
	pushq	72(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_Z13backwardsWavePiS_S_S_S_S_S_(%rip), %rdi
	pushq	72(%rsp)
	.cfi_def_cfa_offset 224
	movq	108(%rsp), %rcx
	movl	116(%rsp), %r8d
	movq	96(%rsp), %rsi
	movl	104(%rsp), %edx
	leaq	144(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L99:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L101
	call	__stack_chk_fail@PLT
.L101:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3228:
	.size	_Z45__device_stub__Z13backwardsWavePiS_S_S_S_S_S_PiS_S_S_S_S_S_, .-_Z45__device_stub__Z13backwardsWavePiS_S_S_S_S_S_PiS_S_S_S_S_S_
	.globl	_Z13backwardsWavePiS_S_S_S_S_S_
	.type	_Z13backwardsWavePiS_S_S_S_S_S_, @function
_Z13backwardsWavePiS_S_S_S_S_S_:
.LFB3229:
	.cfi_startproc
	endbr64
	jmp	_Z45__device_stub__Z13backwardsWavePiS_S_S_S_S_S_PiS_S_S_S_S_S_
	.cfi_endproc
.LFE3229:
	.size	_Z13backwardsWavePiS_S_S_S_S_S_, .-_Z13backwardsWavePiS_S_S_S_S_S_
	.globl	_Z52__device_stub__Z20childListExploreWavePiS_S_S_S_S_S_PiS_S_S_S_S_S_
	.type	_Z52__device_stub__Z20childListExploreWavePiS_S_S_S_S_S_PiS_S_S_S_S_S_, @function
_Z52__device_stub__Z20childListExploreWavePiS_S_S_S_S_S_PiS_S_S_S_S_S_:
.LFB3230:
	.cfi_startproc
	endbr64
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movq	208(%rsp), %rax
	movq	%rdi, 56(%rsp)
	leaq	80(%rsp), %rdi
	movq	%rsi, 48(%rsp)
	leaq	92(%rsp), %rsi
	movq	%rdx, 40(%rsp)
	leaq	64(%rsp), %rdx
	movq	%rcx, 32(%rsp)
	leaq	72(%rsp), %rcx
	movq	%r8, 24(%rsp)
	movq	%r9, 16(%rsp)
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rax
	movl	$1, 88(%rsp)
	movq	%rax, 128(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 80(%rsp)
	movq	%rax, 92(%rsp)
	movl	$1, 100(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L104
	pushq	72(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_Z20childListExploreWavePiS_S_S_S_S_S_(%rip), %rdi
	pushq	72(%rsp)
	.cfi_def_cfa_offset 224
	movq	108(%rsp), %rcx
	movl	116(%rsp), %r8d
	movq	96(%rsp), %rsi
	movl	104(%rsp), %edx
	leaq	144(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L104:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L106
	call	__stack_chk_fail@PLT
.L106:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3230:
	.size	_Z52__device_stub__Z20childListExploreWavePiS_S_S_S_S_S_PiS_S_S_S_S_S_, .-_Z52__device_stub__Z20childListExploreWavePiS_S_S_S_S_S_PiS_S_S_S_S_S_
	.globl	_Z20childListExploreWavePiS_S_S_S_S_S_
	.type	_Z20childListExploreWavePiS_S_S_S_S_S_, @function
_Z20childListExploreWavePiS_S_S_S_S_S_:
.LFB3231:
	.cfi_startproc
	endbr64
	jmp	_Z52__device_stub__Z20childListExploreWavePiS_S_S_S_S_S_PiS_S_S_S_S_S_
	.cfi_endproc
.LFE3231:
	.size	_Z20childListExploreWavePiS_S_S_S_S_S_, .-_Z20childListExploreWavePiS_S_S_S_S_S_
	.globl	_Z47__device_stub__Z11exploreWavePiS_P4NodeS_S_S_S_PiS_P4NodeS_S_S_S_
	.type	_Z47__device_stub__Z11exploreWavePiS_P4NodeS_S_S_S_PiS_P4NodeS_S_S_S_, @function
_Z47__device_stub__Z11exploreWavePiS_P4NodeS_S_S_S_PiS_P4NodeS_S_S_S_:
.LFB3232:
	.cfi_startproc
	endbr64
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movq	208(%rsp), %rax
	movq	%rdi, 56(%rsp)
	leaq	80(%rsp), %rdi
	movq	%rsi, 48(%rsp)
	leaq	92(%rsp), %rsi
	movq	%rdx, 40(%rsp)
	leaq	64(%rsp), %rdx
	movq	%rcx, 32(%rsp)
	leaq	72(%rsp), %rcx
	movq	%r8, 24(%rsp)
	movq	%r9, 16(%rsp)
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rax
	movl	$1, 88(%rsp)
	movq	%rax, 128(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 80(%rsp)
	movq	%rax, 92(%rsp)
	movl	$1, 100(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L109
	pushq	72(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_Z11exploreWavePiS_P4NodeS_S_S_S_(%rip), %rdi
	pushq	72(%rsp)
	.cfi_def_cfa_offset 224
	movq	108(%rsp), %rcx
	movl	116(%rsp), %r8d
	movq	96(%rsp), %rsi
	movl	104(%rsp), %edx
	leaq	144(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L109:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L111
	call	__stack_chk_fail@PLT
.L111:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3232:
	.size	_Z47__device_stub__Z11exploreWavePiS_P4NodeS_S_S_S_PiS_P4NodeS_S_S_S_, .-_Z47__device_stub__Z11exploreWavePiS_P4NodeS_S_S_S_PiS_P4NodeS_S_S_S_
	.globl	_Z11exploreWavePiS_P4NodeS_S_S_S_
	.type	_Z11exploreWavePiS_P4NodeS_S_S_S_, @function
_Z11exploreWavePiS_P4NodeS_S_S_S_:
.LFB3233:
	.cfi_startproc
	endbr64
	jmp	_Z47__device_stub__Z11exploreWavePiS_P4NodeS_S_S_S_PiS_P4NodeS_S_S_S_
	.cfi_endproc
.LFE3233:
	.size	_Z11exploreWavePiS_P4NodeS_S_S_S_, .-_Z11exploreWavePiS_P4NodeS_S_S_S_
	.globl	_Z43__device_stub__Z19setPreviousExploredPiS_S_PiS_S_
	.type	_Z43__device_stub__Z19setPreviousExploredPiS_S_PiS_S_, @function
_Z43__device_stub__Z19setPreviousExploredPiS_S_PiS_S_:
.LFB3234:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L114
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z19setPreviousExploredPiS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L114:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L116
	call	__stack_chk_fail@PLT
.L116:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3234:
	.size	_Z43__device_stub__Z19setPreviousExploredPiS_S_PiS_S_, .-_Z43__device_stub__Z19setPreviousExploredPiS_S_PiS_S_
	.globl	_Z19setPreviousExploredPiS_S_
	.type	_Z19setPreviousExploredPiS_S_, @function
_Z19setPreviousExploredPiS_S_:
.LFB3235:
	.cfi_startproc
	endbr64
	jmp	_Z43__device_stub__Z19setPreviousExploredPiS_S_PiS_S_
	.cfi_endproc
.LFE3235:
	.size	_Z19setPreviousExploredPiS_S_, .-_Z19setPreviousExploredPiS_S_
	.section	.rodata.str1.1
.LC6:
	.string	"GPU Parent Flip Flop Explore Time= %.3f msec\n"
.LC7:
	.string	"%i CPU: %i GPU:%i\n"
.LC8:
	.string	"The results do not match\n"
.LC9:
	.string	"The results match\n"
	.text
	.globl	_Z18callFlipFlopParentPiS_S_S_S_S_iiS_
	.type	_Z18callFlipFlopParentPiS_S_S_S_S_iiS_, @function
_Z18callFlipFlopParentPiS_S_S_S_S_iiS_:
.LFB3182:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$168, %rsp
	.cfi_def_cfa_offset 224
	movq	240(%rsp), %rax
	movq	%rdx, 40(%rsp)
	movq	%rcx, 48(%rsp)
	movslq	224(%rsp), %rbx
	movq	%r8, 56(%rsp)
	movl	232(%rsp), %r12d
	movq	%r9, 64(%rsp)
	movq	%rsi, 32(%rsp)
	movq	%rdi, 16(%rsp)
	leaq	88(%rsp), %rdi
	movq	%rax, 72(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	call	cudaEventCreate@PLT
	leaq	96(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	0(,%rbx,4), %rax
	leaq	104(%rsp), %rdi
	movq	%rax, %rsi
	movq	%rax, (%rsp)
	call	cudaMalloc@PLT
	movq	(%rsp), %rsi
	leaq	112(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	(%rsp), %rsi
	leaq	120(%rsp), %rdi
	call	cudaMalloc@PLT
	cvtsi2ssl	%ebx, %xmm0
	mulss	.LC4(%rip), %xmm0
	call	ceilf@PLT
	movabsq	$2305843009213693950, %rax
	cmpq	%rbx, %rax
	jb	.L120
	movq	(%rsp), %rdi
	cvttss2sil	%xmm0, %r14d
	movq	%rbx, %rbp
	call	_Znam@PLT
	movq	(%rsp), %rdi
	movq	%rax, %rbx
	call	_Znam@PLT
	movq	(%rsp), %rdi
	movq	%rax, 8(%rsp)
	call	_Znam@PLT
	xorl	%r9d, %r9d
	xorl	%edx, %edx
	movl	%r9d, (%rax)
	movq	%rax, %rsi
	jmp	.L121
.L120:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L144
	call	__cxa_throw_bad_array_new_length@PLT
.L121:
	incq	%rdx
	cmpl	%edx, %ebp
	jle	.L145
	movq	8(%rsp), %rax
	xorl	%edi, %edi
	xorl	%r8d, %r8d
	movl	$-1, (%rsi,%rdx,4)
	movl	%edi, (%rbx,%rdx,4)
	movl	%r8d, (%rax,%rdx,4)
	jmp	.L121
.L145:
	movq	(%rsp), %rdx
	movq	104(%rsp), %rdi
	imull	%r12d, %r12d
	xorl	%r13d, %r13d
	movl	$1, (%rbx)
	movl	$1, %ecx
	movabsq	$4294967297, %r15
	call	cudaMemcpy@PLT
	movq	(%rsp), %rdx
	movq	112(%rsp), %rdi
	movq	%rbx, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	(%rsp), %rdx
	movq	8(%rsp), %rsi
	movl	$1, %ecx
	movq	120(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	88(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	leal	-1(%r12), %eax
	cltd
	idivl	%r12d
	movabsq	$4294967808, %r12
	imull	%ebp, %eax
	movl	%eax, 28(%rsp)
.L132:
	movl	28(%rsp), %eax
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r12, %rdx
	movq	%r15, 132(%rsp)
	movl	$1, %ecx
	movl	136(%rsp), %esi
	movl	%r14d, 128(%rsp)
	movq	128(%rsp), %rdi
	movq	%r12, 140(%rsp)
	movl	$1, 148(%rsp)
	cmpl	%eax, %r13d
	jge	.L124
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L126
	pushq	%rax
	.cfi_def_cfa_offset 232
	pushq	56(%rsp)
	.cfi_def_cfa_offset 240
	movq	32(%rsp), %r9
	movq	120(%rsp), %r8
	movq	56(%rsp), %rcx
	movq	48(%rsp), %rdx
	movq	136(%rsp), %rsi
	movq	128(%rsp), %rdi
	call	_Z52__device_stub__Z20childListExploreWavePiS_S_S_S_S_S_PiS_S_S_S_S_S_
	popq	%rdx
	.cfi_def_cfa_offset 232
	popq	%rcx
	.cfi_def_cfa_offset 224
	jmp	.L126
.L124:
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L126
	movq	16(%rsp), %r9
	movq	104(%rsp), %r8
	movq	64(%rsp), %rcx
	movq	56(%rsp), %rdx
	movq	120(%rsp), %rsi
	movq	112(%rsp), %rdi
	call	_Z53__device_stub__Z23parentListBackwardsWavePiS_S_S_S_S_PiS_S_S_S_S_
.L126:
	call	cudaDeviceSynchronize@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r12, %rdx
	movq	%r15, 132(%rsp)
	movl	136(%rsp), %esi
	movl	$1, %ecx
	movl	%r14d, 128(%rsp)
	movq	128(%rsp), %rdi
	movq	%r12, 140(%rsp)
	movl	$1, 148(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L128
	movq	16(%rsp), %rdx
	movq	120(%rsp), %rsi
	movq	112(%rsp), %rdi
	call	_Z43__device_stub__Z19setPreviousExploredPiS_S_PiS_S_
.L128:
	call	cudaDeviceSynchronize@PLT
	movq	(%rsp), %rdx
	movq	120(%rsp), %rsi
	movl	$3, %ecx
	movq	112(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	(%rsp), %rdx
	movq	8(%rsp), %rsi
	movl	$1, %ecx
	movq	120(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	(%rsp), %rdx
	movq	112(%rsp), %rsi
	movq	%rbx, %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	xorl	%eax, %eax
	movb	$1, %r9b
.L129:
	cmpl	%eax, %ebp
	jle	.L146
	movl	(%rbx,%rax,4), %edx
	cmpl	$1, %edx
	je	.L139
	cmpl	$2, %edx
	jne	.L130
	incl	%r13d
	jmp	.L130
.L139:
	xorl	%r9d, %r9d
.L130:
	incq	%rax
	jmp	.L129
.L146:
	testb	%r9b, %r9b
	je	.L132
	movb	%r9b, 8(%rsp)
	xorl	%ebx, %ebx
	leaq	.LC7(%rip), %r13
	call	cudaDeviceSynchronize@PLT
	movq	96(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	96(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	96(%rsp), %rdx
	movq	88(%rsp), %rsi
	leaq	140(%rsp), %rdi
	movl	$0x00000000, 140(%rsp)
	call	cudaEventElapsedTime@PLT
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	140(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	(%rsp), %rdi
	call	malloc@PLT
	movq	(%rsp), %rdx
	movq	104(%rsp), %rsi
	movl	$2, %ecx
	movq	%rax, %rdi
	movq	%rax, %r12
	call	cudaMemcpy@PLT
	movb	8(%rsp), %r9b
.L133:
	cmpl	%ebx, %ebp
	jle	.L147
	movq	72(%rsp), %rax
	movl	(%r12,%rbx,4), %r8d
	movl	(%rax,%rbx,4), %ecx
	cmpl	%r8d, %ecx
	je	.L134
	movl	%ebx, %edx
	movq	%r13, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	xorl	%r9d, %r9d
.L134:
	incq	%rbx
	jmp	.L133
.L147:
	leaq	.LC8(%rip), %rsi
	testb	%r9b, %r9b
	je	.L143
	leaq	.LC9(%rip), %rsi
.L143:
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L138
.L144:
	call	__stack_chk_fail@PLT
.L138:
	addq	$168, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3182:
	.size	_Z18callFlipFlopParentPiS_S_S_S_S_iiS_, .-_Z18callFlipFlopParentPiS_S_S_S_S_iiS_
	.section	.rodata.str1.1
.LC10:
	.string	"GPU Flip Flop Explore Time= %.3f msec\n"
	.text
	.globl	_Z23callFlipFlopWaveExplorePiS_S_iS_iS_
	.type	_Z23callFlipFlopWaveExplorePiS_S_iS_iS_, @function
_Z23callFlipFlopWaveExplorePiS_S_iS_iS_:
.LFB3183:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%r8, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%r9d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movslq	%ecx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$152, %rsp
	.cfi_def_cfa_offset 208
	movq	208(%rsp), %rax
	movq	%rdx, 40(%rsp)
	movq	%rsi, 32(%rsp)
	movq	%rdi, 24(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rax, 56(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	call	cudaEventCreate@PLT
	leaq	80(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	0(,%rbp,4), %rax
	leaq	88(%rsp), %rdi
	movq	%rax, %rsi
	movq	%rax, 8(%rsp)
	call	cudaMalloc@PLT
	movq	8(%rsp), %rsi
	leaq	96(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rsi
	leaq	104(%rsp), %rdi
	call	cudaMalloc@PLT
	cvtsi2ssl	%ebp, %xmm0
	mulss	.LC4(%rip), %xmm0
	call	ceilf@PLT
	movabsq	$2305843009213693950, %rax
	cmpq	%rbp, %rax
	jb	.L149
	movq	8(%rsp), %rdi
	cvttss2sil	%xmm0, %r14d
	movq	%rbp, %rbx
	call	_Znam@PLT
	movq	8(%rsp), %rdi
	movq	%rax, %rbp
	call	_Znam@PLT
	movq	8(%rsp), %rdi
	movq	%rax, 16(%rsp)
	call	_Znam@PLT
	xorl	%r10d, %r10d
	xorl	%edx, %edx
	movl	%r10d, (%rax)
	movq	%rax, %rsi
	jmp	.L150
.L149:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L174
	call	__cxa_throw_bad_array_new_length@PLT
.L150:
	incq	%rdx
	cmpl	%edx, %ebx
	jle	.L175
	movq	16(%rsp), %rax
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	movl	$-1, (%rsi,%rdx,4)
	movl	%r8d, 0(%rbp,%rdx,4)
	movl	%r9d, (%rax,%rdx,4)
	jmp	.L150
.L175:
	movl	$1, 0(%rbp)
	movq	8(%rsp), %rdx
	movl	$1, %ecx
	imull	%r12d, %r12d
	movabsq	$4294967297, %r15
	movq	88(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdx
	movq	96(%rsp), %rdi
	movq	%rbp, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdx
	movq	16(%rsp), %rsi
	movl	$1, %ecx
	movq	104(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	72(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	leal	-1(%r12), %eax
	xorl	%edi, %edi
	cltd
	movl	%edi, 48(%rsp)
	idivl	%r12d
	movabsq	$4294967808, %r12
	imull	%ebx, %eax
	movl	%eax, 52(%rsp)
.L161:
	movl	52(%rsp), %ecx
	cmpl	%ecx, 48(%rsp)
	movq	%r15, 116(%rsp)
	movl	$0, %r9d
	movl	%r14d, 112(%rsp)
	movl	120(%rsp), %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	movq	%r12, 124(%rsp)
	movq	112(%rsp), %rdi
	movl	$0, %r8d
	movl	$1, 132(%rsp)
	jge	.L153
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L155
	pushq	%rsi
	.cfi_remember_state
	.cfi_def_cfa_offset 216
	pushq	%r13
	.cfi_def_cfa_offset 224
	movq	40(%rsp), %r9
	movq	104(%rsp), %r8
	movq	56(%rsp), %rcx
	movq	48(%rsp), %rdx
	movq	120(%rsp), %rsi
	movq	112(%rsp), %rdi
	call	_Z52__device_stub__Z20childListExploreWavePiS_S_S_S_S_S_PiS_S_S_S_S_S_
	jmp	.L172
.L153:
	.cfi_restore_state
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L155
	pushq	%rcx
	.cfi_def_cfa_offset 216
	pushq	%r13
	.cfi_def_cfa_offset 224
	movq	40(%rsp), %r9
	movq	104(%rsp), %r8
	movq	56(%rsp), %rcx
	movq	48(%rsp), %rdx
	movq	120(%rsp), %rsi
	movq	112(%rsp), %rdi
	call	_Z45__device_stub__Z13backwardsWavePiS_S_S_S_S_S_PiS_S_S_S_S_S_
.L172:
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L155:
	call	cudaDeviceSynchronize@PLT
	movq	%r15, 116(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	%r14d, 112(%rsp)
	movl	120(%rsp), %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	movq	112(%rsp), %rdi
	movq	%r12, 124(%rsp)
	movl	$1, 132(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L157
	movq	24(%rsp), %rdx
	movq	104(%rsp), %rsi
	movq	96(%rsp), %rdi
	call	_Z43__device_stub__Z19setPreviousExploredPiS_S_PiS_S_
.L157:
	call	cudaDeviceSynchronize@PLT
	movq	8(%rsp), %rdx
	movq	104(%rsp), %rsi
	movl	$3, %ecx
	movq	96(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdx
	movq	16(%rsp), %rsi
	movl	$1, %ecx
	movq	104(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdx
	movq	96(%rsp), %rsi
	movq	%rbp, %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	xorl	%eax, %eax
	movb	$1, %r9b
.L158:
	cmpl	%eax, %ebx
	jle	.L176
	movl	0(%rbp,%rax,4), %edx
	cmpl	$1, %edx
	je	.L168
	cmpl	$2, %edx
	jne	.L159
	incl	48(%rsp)
	jmp	.L159
.L168:
	xorl	%r9d, %r9d
.L159:
	incq	%rax
	jmp	.L158
.L176:
	testb	%r9b, %r9b
	je	.L161
	movb	%r9b, 16(%rsp)
	xorl	%ebp, %ebp
	leaq	.LC7(%rip), %r13
	call	cudaDeviceSynchronize@PLT
	movq	80(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	80(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	80(%rsp), %rdx
	movq	72(%rsp), %rsi
	leaq	124(%rsp), %rdi
	movl	$0x00000000, 124(%rsp)
	call	cudaEventElapsedTime@PLT
	leaq	.LC10(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	124(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	8(%rsp), %rdi
	call	malloc@PLT
	movq	8(%rsp), %rdx
	movq	88(%rsp), %rsi
	movl	$2, %ecx
	movq	%rax, %rdi
	movq	%rax, %r12
	call	cudaMemcpy@PLT
	movb	16(%rsp), %r9b
.L162:
	cmpl	%ebp, %ebx
	jle	.L177
	movq	56(%rsp), %rax
	movl	(%r12,%rbp,4), %r8d
	movl	(%rax,%rbp,4), %ecx
	cmpl	%r8d, %ecx
	je	.L163
	movl	%ebp, %edx
	movq	%r13, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	xorl	%r9d, %r9d
.L163:
	incq	%rbp
	jmp	.L162
.L177:
	leaq	.LC8(%rip), %rsi
	testb	%r9b, %r9b
	je	.L173
	leaq	.LC9(%rip), %rsi
.L173:
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L167
.L174:
	call	__stack_chk_fail@PLT
.L167:
	addq	$152, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3183:
	.size	_Z23callFlipFlopWaveExplorePiS_S_iS_iS_, .-_Z23callFlipFlopWaveExplorePiS_S_iS_iS_
	.section	.rodata.str1.1
.LC11:
	.string	"GPU Child List Explore Time= %.3f msec\n"
	.text
	.globl	_Z24callChildListExploreWavePiS_S_iS_S_
	.type	_Z24callChildListExploreWavePiS_S_iS_S_, @function
_Z24callChildListExploreWavePiS_S_iS_S_:
.LFB3184:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%r8, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movslq	%ecx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$136, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdx, 32(%rsp)
	movq	%r9, 40(%rsp)
	movq	%rsi, 24(%rsp)
	movq	%rdi, 16(%rsp)
	leaq	56(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	call	cudaEventCreate@PLT
	leaq	64(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	0(,%rbp,4), %rax
	leaq	72(%rsp), %rdi
	movq	%rax, %rsi
	movq	%rax, (%rsp)
	call	cudaMalloc@PLT
	movq	(%rsp), %rsi
	leaq	80(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	(%rsp), %rsi
	leaq	88(%rsp), %rdi
	call	cudaMalloc@PLT
	cvtsi2ssl	%ebp, %xmm0
	mulss	.LC4(%rip), %xmm0
	call	ceilf@PLT
	movabsq	$2305843009213693950, %rax
	cmpq	%rbp, %rax
	jb	.L179
	movq	(%rsp), %rdi
	cvttss2sil	%xmm0, %r14d
	movq	%rbp, %rbx
	call	_Znam@PLT
	movq	(%rsp), %rdi
	movq	%rax, %rbp
	call	_Znam@PLT
	movq	(%rsp), %rdi
	movq	%rax, 8(%rsp)
	call	_Znam@PLT
	xorl	%r9d, %r9d
	xorl	%edx, %edx
	movl	%r9d, (%rax)
	movq	%rax, %rsi
	jmp	.L180
.L179:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L200
	call	__cxa_throw_bad_array_new_length@PLT
.L180:
	incq	%rdx
	cmpl	%edx, %ebx
	jle	.L201
	movq	8(%rsp), %rax
	xorl	%edi, %edi
	xorl	%r8d, %r8d
	movl	$-1, (%rsi,%rdx,4)
	movl	%edi, 0(%rbp,%rdx,4)
	movl	%r8d, (%rax,%rdx,4)
	jmp	.L180
.L201:
	movl	$1, 0(%rbp)
	movq	(%rsp), %rdx
	movl	$1, %ecx
	movabsq	$4294967808, %r12
	movabsq	$4294967297, %r15
	movq	72(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	(%rsp), %rdx
	movq	80(%rsp), %rdi
	movq	%rbp, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	(%rsp), %rdx
	movq	8(%rsp), %rsi
	movl	$1, %ecx
	movq	88(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	56(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
.L188:
	movq	%r15, 100(%rsp)
	movl	104(%rsp), %esi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	%r14d, 96(%rsp)
	movq	96(%rsp), %rdi
	movq	%r12, %rdx
	movl	$1, %ecx
	movq	%r12, 108(%rsp)
	movl	$1, 116(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L183
	pushq	%rax
	.cfi_def_cfa_offset 200
	pushq	%r13
	.cfi_def_cfa_offset 208
	movq	32(%rsp), %r9
	movq	88(%rsp), %r8
	movq	48(%rsp), %rcx
	movq	40(%rsp), %rdx
	movq	104(%rsp), %rsi
	movq	96(%rsp), %rdi
	call	_Z52__device_stub__Z20childListExploreWavePiS_S_S_S_S_S_PiS_S_S_S_S_S_
	popq	%rdx
	.cfi_def_cfa_offset 200
	popq	%rcx
	.cfi_def_cfa_offset 192
.L183:
	call	cudaDeviceSynchronize@PLT
	movq	%r15, 100(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	%r14d, 96(%rsp)
	movl	104(%rsp), %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	movq	96(%rsp), %rdi
	movq	%r12, 108(%rsp)
	movl	$1, 116(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L184
	movq	16(%rsp), %rdx
	movq	88(%rsp), %rsi
	movq	80(%rsp), %rdi
	call	_Z43__device_stub__Z19setPreviousExploredPiS_S_PiS_S_
.L184:
	call	cudaDeviceSynchronize@PLT
	movq	(%rsp), %rdx
	movq	88(%rsp), %rsi
	movl	$3, %ecx
	movq	80(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	(%rsp), %rdx
	movq	8(%rsp), %rsi
	movl	$1, %ecx
	movq	88(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	(%rsp), %rdx
	movq	80(%rsp), %rsi
	movq	%rbp, %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	xorl	%eax, %eax
	movb	$1, %r9b
	xorl	%edx, %edx
.L185:
	cmpl	%eax, %ebx
	jle	.L202
	cmpl	$1, 0(%rbp,%rax,4)
	cmove	%edx, %r9d
	incq	%rax
	jmp	.L185
.L202:
	testb	%r9b, %r9b
	je	.L188
	movb	%r9b, 8(%rsp)
	xorl	%ebp, %ebp
	leaq	.LC7(%rip), %r13
	call	cudaDeviceSynchronize@PLT
	movq	64(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	64(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	64(%rsp), %rdx
	movq	56(%rsp), %rsi
	leaq	108(%rsp), %rdi
	movl	$0x00000000, 108(%rsp)
	call	cudaEventElapsedTime@PLT
	leaq	.LC11(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	108(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	(%rsp), %rdi
	call	malloc@PLT
	movq	(%rsp), %rdx
	movq	72(%rsp), %rsi
	movl	$2, %ecx
	movq	%rax, %rdi
	movq	%rax, %r12
	call	cudaMemcpy@PLT
	movb	8(%rsp), %r9b
.L189:
	cmpl	%ebp, %ebx
	jle	.L203
	movq	40(%rsp), %rax
	movl	(%r12,%rbp,4), %r8d
	movl	(%rax,%rbp,4), %ecx
	cmpl	%r8d, %ecx
	je	.L190
	movl	%ebp, %edx
	movq	%r13, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	xorl	%r9d, %r9d
.L190:
	incq	%rbp
	jmp	.L189
.L203:
	leaq	.LC8(%rip), %rsi
	testb	%r9b, %r9b
	je	.L199
	leaq	.LC9(%rip), %rsi
.L199:
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L194
.L200:
	call	__stack_chk_fail@PLT
.L194:
	addq	$136, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3184:
	.size	_Z24callChildListExploreWavePiS_S_iS_S_, .-_Z24callChildListExploreWavePiS_S_iS_S_
	.section	.rodata.str1.1
.LC12:
	.string	"GPU Wave Time= %.3f msec\n"
	.text
	.globl	_Z24callDeviceCachedVisitBFSP4NodePiS1_iS1_S1_
	.type	_Z24callDeviceCachedVisitBFSP4NodePiS1_iS1_S1_, @function
_Z24callDeviceCachedVisitBFSP4NodePiS1_iS1_S1_:
.LFB3185:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%r8, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movslq	%ecx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$136, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdx, 32(%rsp)
	movq	%r9, 40(%rsp)
	movq	%rsi, 16(%rsp)
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	call	cudaEventCreate@PLT
	leaq	64(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	0(,%rbp,4), %rax
	leaq	72(%rsp), %rdi
	movq	%rax, %rsi
	movq	%rax, (%rsp)
	call	cudaMalloc@PLT
	movq	(%rsp), %rsi
	leaq	80(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	(%rsp), %rsi
	leaq	88(%rsp), %rdi
	call	cudaMalloc@PLT
	cvtsi2ssl	%ebp, %xmm0
	mulss	.LC4(%rip), %xmm0
	call	ceilf@PLT
	movabsq	$2305843009213693950, %rax
	cmpq	%rbp, %rax
	jb	.L205
	movq	(%rsp), %rdi
	cvttss2sil	%xmm0, %r14d
	movq	%rbp, %rbx
	call	_Znam@PLT
	movq	(%rsp), %rdi
	movq	%rax, %rbp
	call	_Znam@PLT
	movq	(%rsp), %rdi
	movq	%rax, 8(%rsp)
	call	_Znam@PLT
	xorl	%r9d, %r9d
	xorl	%edx, %edx
	movl	%r9d, (%rax)
	movq	%rax, %rsi
	jmp	.L206
.L205:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L226
	call	__cxa_throw_bad_array_new_length@PLT
.L206:
	incq	%rdx
	cmpl	%edx, %ebx
	jle	.L227
	movq	8(%rsp), %rax
	xorl	%edi, %edi
	xorl	%r8d, %r8d
	movl	$-1, (%rsi,%rdx,4)
	movl	%edi, 0(%rbp,%rdx,4)
	movl	%r8d, (%rax,%rdx,4)
	jmp	.L206
.L227:
	movl	$1, 0(%rbp)
	movq	(%rsp), %rdx
	movl	$1, %ecx
	movabsq	$4294967808, %r12
	movabsq	$4294967297, %r15
	movq	72(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	(%rsp), %rdx
	movq	80(%rsp), %rdi
	movq	%rbp, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	(%rsp), %rdx
	movq	8(%rsp), %rsi
	movl	$1, %ecx
	movq	88(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	56(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
.L214:
	movq	%r15, 100(%rsp)
	movl	104(%rsp), %esi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	%r14d, 96(%rsp)
	movq	96(%rsp), %rdi
	movq	%r12, %rdx
	movl	$1, %ecx
	movq	%r12, 108(%rsp)
	movl	$1, 116(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L209
	pushq	%rax
	.cfi_def_cfa_offset 200
	pushq	%r13
	.cfi_def_cfa_offset 208
	movq	32(%rsp), %r9
	movq	88(%rsp), %r8
	movq	48(%rsp), %rcx
	movq	40(%rsp), %rdx
	movq	104(%rsp), %rsi
	movq	96(%rsp), %rdi
	call	_Z47__device_stub__Z11exploreWavePiS_P4NodeS_S_S_S_PiS_P4NodeS_S_S_S_
	popq	%rdx
	.cfi_def_cfa_offset 200
	popq	%rcx
	.cfi_def_cfa_offset 192
.L209:
	call	cudaDeviceSynchronize@PLT
	movq	%r15, 100(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	%r14d, 96(%rsp)
	movl	104(%rsp), %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	movq	96(%rsp), %rdi
	movq	%r12, 108(%rsp)
	movl	$1, 116(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L210
	movq	16(%rsp), %rdx
	movq	88(%rsp), %rsi
	movq	80(%rsp), %rdi
	call	_Z43__device_stub__Z19setPreviousExploredPiS_S_PiS_S_
.L210:
	call	cudaDeviceSynchronize@PLT
	movq	(%rsp), %rdx
	movq	88(%rsp), %rsi
	movl	$3, %ecx
	movq	80(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	(%rsp), %rdx
	movq	8(%rsp), %rsi
	movl	$1, %ecx
	movq	88(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	(%rsp), %rdx
	movq	80(%rsp), %rsi
	movq	%rbp, %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	xorl	%eax, %eax
	movb	$1, %r9b
	xorl	%edx, %edx
.L211:
	cmpl	%eax, %ebx
	jle	.L228
	cmpl	$1, 0(%rbp,%rax,4)
	cmove	%edx, %r9d
	incq	%rax
	jmp	.L211
.L228:
	testb	%r9b, %r9b
	je	.L214
	movb	%r9b, 8(%rsp)
	xorl	%ebp, %ebp
	leaq	.LC7(%rip), %r13
	call	cudaDeviceSynchronize@PLT
	movq	64(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	64(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	64(%rsp), %rdx
	movq	56(%rsp), %rsi
	leaq	108(%rsp), %rdi
	movl	$0x00000000, 108(%rsp)
	call	cudaEventElapsedTime@PLT
	leaq	.LC12(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	108(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	(%rsp), %rdi
	call	malloc@PLT
	movq	(%rsp), %rdx
	movq	72(%rsp), %rsi
	movl	$2, %ecx
	movq	%rax, %rdi
	movq	%rax, %r12
	call	cudaMemcpy@PLT
	movb	8(%rsp), %r9b
.L215:
	cmpl	%ebp, %ebx
	jle	.L229
	movq	40(%rsp), %rax
	movl	(%r12,%rbp,4), %r8d
	movl	(%rax,%rbp,4), %ecx
	cmpl	%r8d, %ecx
	je	.L216
	movl	%ebp, %edx
	movq	%r13, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	xorl	%r9d, %r9d
.L216:
	incq	%rbp
	jmp	.L215
.L229:
	leaq	.LC8(%rip), %rsi
	testb	%r9b, %r9b
	je	.L225
	leaq	.LC9(%rip), %rsi
.L225:
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L220
.L226:
	call	__stack_chk_fail@PLT
.L220:
	addq	$136, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3185:
	.size	_Z24callDeviceCachedVisitBFSP4NodePiS1_iS1_S1_, .-_Z24callDeviceCachedVisitBFSP4NodePiS1_iS1_S1_
	.section	.rodata.str1.1
.LC13:
	.string	"_Z19setPreviousExploredPiS_S_"
.LC14:
	.string	"_Z11exploreWavePiS_P4NodeS_S_S_S_"
.LC15:
	.string	"_Z20childListExploreWavePiS_S_S_S_S_S_"
.LC16:
	.string	"_Z13backwardsWavePiS_S_S_S_S_S_"
.LC17:
	.string	"_Z23parentListBackwardsWavePiS_S_S_S_S_"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3237:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC13(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z19setPreviousExploredPiS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC14(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z11exploreWavePiS_P4NodeS_S_S_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC15(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z20childListExploreWavePiS_S_S_S_S_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC16(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z13backwardsWavePiS_S_S_S_S_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC17(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z23parentListBackwardsWavePiS_S_S_S_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3237:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.text._ZNSt6vectorIP4NodeSaIS1_EED2Ev,"axG",@progbits,_ZNSt6vectorIP4NodeSaIS1_EED5Ev,comdat
	.align 2
	.weak	_ZNSt6vectorIP4NodeSaIS1_EED2Ev
	.type	_ZNSt6vectorIP4NodeSaIS1_EED2Ev, @function
_ZNSt6vectorIP4NodeSaIS1_EED2Ev:
.LFB3295:
	.cfi_startproc
	endbr64
	movq	(%rdi), %rax
	testq	%rax, %rax
	je	.L232
	movq	16(%rdi), %rsi
	movq	%rax, %rdi
	subq	%rax, %rsi
	jmp	_ZdlPvm@PLT
.L232:
	ret
	.cfi_endproc
.LFE3295:
	.size	_ZNSt6vectorIP4NodeSaIS1_EED2Ev, .-_ZNSt6vectorIP4NodeSaIS1_EED2Ev
	.weak	_ZNSt6vectorIP4NodeSaIS1_EED1Ev
	.set	_ZNSt6vectorIP4NodeSaIS1_EED1Ev,_ZNSt6vectorIP4NodeSaIS1_EED2Ev
	.section	.rodata._ZNSt6vectorIP4NodeSaIS1_EE17_M_realloc_insertIJRKS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_.str1.1,"aMS",@progbits,1
.LC18:
	.string	"vector::_M_realloc_insert"
	.section	.text._ZNSt6vectorIP4NodeSaIS1_EE17_M_realloc_insertIJRKS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_,"axG",@progbits,_ZNSt6vectorIP4NodeSaIS1_EE17_M_realloc_insertIJRKS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_,comdat
	.align 2
	.weak	_ZNSt6vectorIP4NodeSaIS1_EE17_M_realloc_insertIJRKS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_
	.type	_ZNSt6vectorIP4NodeSaIS1_EE17_M_realloc_insertIJRKS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_, @function
_ZNSt6vectorIP4NodeSaIS1_EE17_M_realloc_insertIJRKS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_:
.LFB3380:
	.cfi_startproc
	endbr64
	movabsq	$1152921504606846975, %rcx
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	movq	8(%rdi), %rax
	movq	(%rdi), %r14
	movq	%rax, %rbx
	movq	%rax, (%rsp)
	subq	%r14, %rbx
	sarq	$3, %rbx
	cmpq	%rcx, %rbx
	jne	.L235
	leaq	.LC18(%rip), %rdi
	call	_ZSt20__throw_length_errorPKc@PLT
.L235:
	cmpq	%r14, (%rsp)
	movl	$1, %eax
	movq	%rsi, %r15
	movq	%rdi, %r13
	cmovne	%rbx, %rax
	movq	%rsi, %rbp
	addq	%rax, %rbx
	setc	%al
	subq	%r14, %r15
	movzbl	%al, %eax
	testq	%rax, %rax
	jne	.L245
	xorl	%r12d, %r12d
	testq	%rbx, %rbx
	je	.L240
	movabsq	$1152921504606846975, %rax
	cmpq	%rax, %rbx
	cmova	%rax, %rbx
	jmp	.L239
.L245:
	movq	%rcx, %rbx
.L239:
	leaq	0(,%rbx,8), %rdi
	movq	%rdx, 8(%rsp)
	call	_Znwm@PLT
	movq	8(%rsp), %rdx
	movq	%rax, %r12
.L240:
	movq	(%rdx), %rax
	movq	%rax, (%r12,%r15)
	testq	%r15, %r15
	jle	.L241
	movq	%r15, %rdx
	movq	%r14, %rsi
	movq	%r12, %rdi
	call	memmove@PLT
.L241:
	movq	(%rsp), %rax
	leaq	8(%r12,%r15), %rdx
	subq	%rbp, %rax
	testq	%rax, %rax
	jle	.L242
	movq	%rdx, %rdi
	movq	%rbp, %rsi
	movq	%rax, %rcx
	rep movsb
.L242:
	leaq	(%rdx,%rax), %rbp
	testq	%r14, %r14
	je	.L243
	movq	16(%r13), %rsi
	movq	%r14, %rdi
	subq	%r14, %rsi
	call	_ZdlPvm@PLT
.L243:
	leaq	(%r12,%rbx,8), %rax
	movq	%r12, 0(%r13)
	movq	%rbp, 8(%r13)
	movq	%rax, 16(%r13)
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3380:
	.size	_ZNSt6vectorIP4NodeSaIS1_EE17_M_realloc_insertIJRKS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_, .-_ZNSt6vectorIP4NodeSaIS1_EE17_M_realloc_insertIJRKS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_
	.section	.text._ZNSt11_Deque_baseIP4NodeSaIS1_EED2Ev,"axG",@progbits,_ZNSt11_Deque_baseIP4NodeSaIS1_EED5Ev,comdat
	.align 2
	.weak	_ZNSt11_Deque_baseIP4NodeSaIS1_EED2Ev
	.type	_ZNSt11_Deque_baseIP4NodeSaIS1_EED2Ev, @function
_ZNSt11_Deque_baseIP4NodeSaIS1_EED2Ev:
.LFB3391:
	.cfi_startproc
	endbr64
	cmpq	$0, (%rdi)
	je	.L252
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	72(%rdi), %rax
	movq	%rdi, %rbx
	movq	40(%rdi), %rbp
	leaq	8(%rax), %r12
.L254:
	cmpq	%r12, %rbp
	jnb	.L259
	movq	0(%rbp), %rdi
	movl	$512, %esi
	addq	$8, %rbp
	call	_ZdlPvm@PLT
	jmp	.L254
.L259:
	movq	8(%rbx), %rax
	movq	(%rbx), %rdi
	popq	%rbx
	.cfi_restore 3
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_restore 6
	.cfi_def_cfa_offset 16
	leaq	0(,%rax,8), %rsi
	popq	%r12
	.cfi_restore 12
	.cfi_def_cfa_offset 8
	jmp	_ZdlPvm@PLT
.L252:
	ret
	.cfi_endproc
.LFE3391:
	.size	_ZNSt11_Deque_baseIP4NodeSaIS1_EED2Ev, .-_ZNSt11_Deque_baseIP4NodeSaIS1_EED2Ev
	.weak	_ZNSt11_Deque_baseIP4NodeSaIS1_EED1Ev
	.set	_ZNSt11_Deque_baseIP4NodeSaIS1_EED1Ev,_ZNSt11_Deque_baseIP4NodeSaIS1_EED2Ev
	.section	.text._ZNSt6vectorIP4NodeSaIS1_EEC2ERKS3_,"axG",@progbits,_ZNSt6vectorIP4NodeSaIS1_EEC5ERKS3_,comdat
	.align 2
	.weak	_ZNSt6vectorIP4NodeSaIS1_EEC2ERKS3_
	.type	_ZNSt6vectorIP4NodeSaIS1_EEC2ERKS3_, @function
_ZNSt6vectorIP4NodeSaIS1_EEC2ERKS3_:
.LFB3484:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%eax, %eax
	movq	%rsi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	8(%rsi), %rbp
	movq	%rdi, %rbx
	subq	(%rsi), %rbp
	movq	%rax, (%rdi)
	movq	%rax, 8(%rdi)
	movq	%rax, 16(%rdi)
	movq	%rbp, %rdi
	sarq	$3, %rdi
	je	.L265
	movabsq	$9223372036854775800, %rax
	cmpq	%rbp, %rax
	jnb	.L262
	call	_ZNSt15__new_allocatorIP4NodeE8allocateEmPKv.part.0
.L262:
	movq	%rbp, %rdi
	call	_Znwm@PLT
	movq	%rax, %rcx
	jmp	.L261
.L265:
	xorl	%ecx, %ecx
.L261:
	addq	%rcx, %rbp
	movq	%rcx, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rbp, 16(%rbx)
	movq	(%r12), %rsi
	movq	8(%r12), %rbp
	subq	%rsi, %rbp
	cmpq	$8, %rbp
	jle	.L263
	movq	%rcx, %rdi
	movq	%rbp, %rdx
	call	memmove@PLT
	movq	%rax, %rcx
	jmp	.L264
.L263:
	jne	.L264
	movq	(%rsi), %rax
	movq	%rax, (%rcx)
.L264:
	addq	%rbp, %rcx
	movq	%rcx, 8(%rbx)
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3484:
	.size	_ZNSt6vectorIP4NodeSaIS1_EEC2ERKS3_, .-_ZNSt6vectorIP4NodeSaIS1_EEC2ERKS3_
	.weak	_ZNSt6vectorIP4NodeSaIS1_EEC1ERKS3_
	.set	_ZNSt6vectorIP4NodeSaIS1_EEC1ERKS3_,_ZNSt6vectorIP4NodeSaIS1_EEC2ERKS3_
	.section	.text._ZNSt6vectorIS_IP4NodeSaIS1_EESaIS3_EE17_M_realloc_insertIJRKS3_EEEvN9__gnu_cxx17__normal_iteratorIPS3_S5_EEDpOT_,"axG",@progbits,_ZNSt6vectorIS_IP4NodeSaIS1_EESaIS3_EE17_M_realloc_insertIJRKS3_EEEvN9__gnu_cxx17__normal_iteratorIPS3_S5_EEDpOT_,comdat
	.align 2
	.weak	_ZNSt6vectorIS_IP4NodeSaIS1_EESaIS3_EE17_M_realloc_insertIJRKS3_EEEvN9__gnu_cxx17__normal_iteratorIPS3_S5_EEDpOT_
	.type	_ZNSt6vectorIS_IP4NodeSaIS1_EESaIS3_EE17_M_realloc_insertIJRKS3_EEEvN9__gnu_cxx17__normal_iteratorIPS3_S5_EEDpOT_, @function
_ZNSt6vectorIS_IP4NodeSaIS1_EESaIS3_EE17_M_realloc_insertIJRKS3_EEEvN9__gnu_cxx17__normal_iteratorIPS3_S5_EEDpOT_:
.LFB3373:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA3373
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rdx, %r14
	movabsq	$384307168202282325, %rdx
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	movq	8(%rdi), %rax
	movq	(%rdi), %r13
	movq	%rsi, 8(%rsp)
	movq	%rax, %rbx
	movq	%rax, (%rsp)
	movabsq	$-6148914691236517205, %rax
	subq	%r13, %rbx
	sarq	$3, %rbx
	imulq	%rax, %rbx
	cmpq	%rdx, %rbx
	jne	.L268
	leaq	.LC18(%rip), %rdi
.LEHB0:
	call	_ZSt20__throw_length_errorPKc@PLT
.L268:
	cmpq	%r13, (%rsp)
	movl	$1, %eax
	movq	8(%rsp), %r15
	movq	%rdi, %r12
	cmovne	%rbx, %rax
	addq	%rax, %rbx
	setc	%al
	subq	%r13, %r15
	movzbl	%al, %eax
	testq	%rax, %rax
	jne	.L284
	xorl	%ebp, %ebp
	testq	%rbx, %rbx
	je	.L273
	movabsq	$384307168202282325, %rax
	cmpq	%rax, %rbx
	cmova	%rax, %rbx
	jmp	.L272
.L284:
	movq	%rdx, %rbx
.L272:
	imulq	$24, %rbx, %rdi
	call	_Znwm@PLT
.LEHE0:
	movq	%rax, %rbp
.L273:
	leaq	0(%rbp,%r15), %rax
	movq	%r14, %rsi
	movq	%rax, %rdi
	movq	%rax, %r15
.LEHB1:
	call	_ZNSt6vectorIP4NodeSaIS1_EEC1ERKS3_
.LEHE1:
	movq	%rbp, %r14
	movq	%r13, %r15
.L274:
	addq	$24, %r14
	cmpq	%r15, 8(%rsp)
	je	.L276
	movq	(%r15), %rcx
	xorl	%edx, %edx
	movq	%r15, %rdi
	addq	$24, %r15
	movq	%rdx, -24(%r15)
	movq	%rcx, -24(%r14)
	movq	-16(%r15), %rcx
	movq	%rdx, -16(%r15)
	movq	%rcx, -16(%r14)
	movq	-8(%r15), %rcx
	movq	%rdx, -8(%r15)
	movq	%rcx, -8(%r14)
	call	_ZNSt6vectorIP4NodeSaIS1_EED1Ev
	jmp	.L274
.L276:
	cmpq	%r15, (%rsp)
	je	.L296
	movq	(%r15), %rcx
	xorl	%eax, %eax
	movq	%r15, %rdi
	addq	$24, %r14
	movq	%rax, (%r15)
	addq	$24, %r15
	movq	%rcx, -24(%r14)
	movq	-16(%r15), %rcx
	movq	%rax, -16(%r15)
	movq	%rcx, -16(%r14)
	movq	-8(%r15), %rcx
	movq	%rax, -8(%r15)
	movq	%rcx, -8(%r14)
	call	_ZNSt6vectorIP4NodeSaIS1_EED1Ev
	jmp	.L276
.L296:
	testq	%r13, %r13
	je	.L278
	movq	16(%r12), %rsi
	movq	%r13, %rdi
	subq	%r13, %rsi
	call	_ZdlPvm@PLT
.L278:
	imulq	$24, %rbx, %rbx
	movq	%rbp, (%r12)
	movq	%r14, 8(%r12)
	addq	%rbp, %rbx
	movq	%rbx, 16(%r12)
	addq	$24, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
.L287:
	.cfi_restore_state
	endbr64
	movq	%rax, %rdi
.L279:
	call	__cxa_begin_catch@PLT
	testq	%rbp, %rbp
	jne	.L280
	movq	%r15, %rdi
	call	_ZNSt6vectorIP4NodeSaIS1_EED1Ev
.L282:
.LEHB2:
	call	__cxa_rethrow@PLT
.LEHE2:
.L288:
	endbr64
	movq	%rax, %rbx
.L281:
	call	__cxa_end_catch@PLT
	movq	%rbx, %rdi
.LEHB3:
	call	_Unwind_Resume@PLT
.LEHE3:
.L280:
	imulq	$24, %rbx, %rsi
	movq	%rbp, %rdi
	call	_ZdlPvm@PLT
	jmp	.L282
	.cfi_endproc
.LFE3373:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table._ZNSt6vectorIS_IP4NodeSaIS1_EESaIS3_EE17_M_realloc_insertIJRKS3_EEEvN9__gnu_cxx17__normal_iteratorIPS3_S5_EEDpOT_,"aG",@progbits,_ZNSt6vectorIS_IP4NodeSaIS1_EESaIS3_EE17_M_realloc_insertIJRKS3_EEEvN9__gnu_cxx17__normal_iteratorIPS3_S5_EEDpOT_,comdat
	.align 4
.LLSDA3373:
	.byte	0xff
	.byte	0x9b
	.uleb128 .LLSDATT3373-.LLSDATTD3373
.LLSDATTD3373:
	.byte	0x1
	.uleb128 .LLSDACSE3373-.LLSDACSB3373
.LLSDACSB3373:
	.uleb128 .LEHB0-.LFB3373
	.uleb128 .LEHE0-.LEHB0
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB1-.LFB3373
	.uleb128 .LEHE1-.LEHB1
	.uleb128 .L287-.LFB3373
	.uleb128 0x1
	.uleb128 .LEHB2-.LFB3373
	.uleb128 .LEHE2-.LEHB2
	.uleb128 .L288-.LFB3373
	.uleb128 0
	.uleb128 .LEHB3-.LFB3373
	.uleb128 .LEHE3-.LEHB3
	.uleb128 0
	.uleb128 0
.LLSDACSE3373:
	.byte	0x1
	.byte	0
	.align 4
	.long	0

.LLSDATT3373:
	.section	.text._ZNSt6vectorIS_IP4NodeSaIS1_EESaIS3_EE17_M_realloc_insertIJRKS3_EEEvN9__gnu_cxx17__normal_iteratorIPS3_S5_EEDpOT_,"axG",@progbits,_ZNSt6vectorIS_IP4NodeSaIS1_EESaIS3_EE17_M_realloc_insertIJRKS3_EEEvN9__gnu_cxx17__normal_iteratorIPS3_S5_EEDpOT_,comdat
	.size	_ZNSt6vectorIS_IP4NodeSaIS1_EESaIS3_EE17_M_realloc_insertIJRKS3_EEEvN9__gnu_cxx17__normal_iteratorIPS3_S5_EEDpOT_, .-_ZNSt6vectorIS_IP4NodeSaIS1_EESaIS3_EE17_M_realloc_insertIJRKS3_EEEvN9__gnu_cxx17__normal_iteratorIPS3_S5_EEDpOT_
	.section	.rodata.str1.1
.LC19:
	.string	"vector::_M_range_check: __n (which is %zu) >= this->size() (which is %zu)"
	.text
	.globl	_Z12exploreChildP4NodePSt6vectorIS1_IS0_SaIS0_EESaIS3_EEiS0_
	.type	_Z12exploreChildP4NodePSt6vectorIS1_IS0_SaIS0_EESaIS3_EEiS0_, @function
_Z12exploreChildP4NodePSt6vectorIS1_IS0_SaIS0_EESaIS3_EEiS0_:
.LFB3161:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA3161
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rdi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	movl	16(%rdi), %r15d
	movl	%edx, 28(%rsp)
	movq	%rcx, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	testl	%r15d, %r15d
	jle	.L298
	movq	%rsi, %rbx
	movslq	%r15d, %rdi
.LEHB4:
	call	_Znam@PLT
.LEHE4:
	movq	8(%rbx), %rdi
	movslq	28(%rsp), %rbp
	movabsq	$-6148914691236517205, %rdx
	movq	%rax, 16(%rsp)
	xorl	%eax, %eax
	movq	%rax, 48(%rsp)
	movq	%rax, 56(%rsp)
	movq	%rax, 64(%rsp)
	movq	%rdi, %rax
	subq	(%rbx), %rax
	sarq	$3, %rax
	imulq	%rdx, %rax
	cmpq	%rax, %rbp
	jb	.L300
	cmpq	16(%rbx), %rdi
	leaq	48(%rsp), %rdx
	je	.L301
	movq	%rdx, %rsi
.LEHB5:
	call	_ZNSt6vectorIP4NodeSaIS1_EEC1ERKS3_
	addq	$24, 8(%rbx)
	jmp	.L300
.L301:
	movq	%rdi, %rsi
	movq	%rbx, %rdi
	call	_ZNSt6vectorIS_IP4NodeSaIS1_EESaIS3_EE17_M_realloc_insertIJRKS3_EEEvN9__gnu_cxx17__normal_iteratorIPS3_S5_EEDpOT_
.L300:
	movq	(%rbx), %r12
	movq	8(%rbx), %rdx
	movabsq	$-6148914691236517205, %rax
	subq	%r12, %rdx
	sarq	$3, %rdx
	imulq	%rax, %rdx
	cmpq	%rdx, %rbp
	jb	.L303
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L321
	movq	%rbp, %rsi
	leaq	.LC19(%rip), %rdi
	xorl	%eax, %eax
	call	_ZSt24__throw_out_of_range_fmtPKcz@PLT
.L303:
	imulq	$24, %rbp, %rbp
	xorl	%r14d, %r14d
	addq	%rbp, %r12
.L308:
	movq	8(%r13), %rax
	movslq	(%rax,%r14,4), %rbp
	movq	8(%rsp), %rax
	imulq	$24, %rbp, %rbp
	addq	%rax, %rbp
	xorl	%eax, %eax
	cmpl	$0, 20(%rbp)
	movq	%rbp, 40(%rsp)
	jne	.L305
	movq	8(%r12), %rsi
	cmpq	16(%r12), %rsi
	je	.L306
	movq	%rbp, (%rsi)
	addq	$8, %rsi
	movq	%rsi, 8(%r12)
	jmp	.L307
.L306:
	leaq	40(%rsp), %rdx
	movq	%r12, %rdi
	call	_ZNSt6vectorIP4NodeSaIS1_EE17_M_realloc_insertIJRKS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_
.L307:
	movl	$1, 20(%rbp)
	movb	$1, %al
.L305:
	movq	16(%rsp), %rcx
	movb	%al, (%rcx,%r14)
	incq	%r14
	cmpl	%r14d, %r15d
	jg	.L308
	movl	28(%rsp), %r12d
	xorl	%ebp, %ebp
	incl	%r12d
.L310:
	movq	8(%r13), %rax
	movslq	(%rax,%rbp,4), %rdi
	movq	16(%rsp), %rax
	cmpb	$0, (%rax,%rbp)
	jne	.L309
.L312:
	incq	%rbp
	cmpl	%ebp, %r15d
	jg	.L310
	leaq	48(%rsp), %rdi
	call	_ZNSt6vectorIP4NodeSaIS1_EED1Ev
	jmp	.L298
.L309:
	imulq	$24, %rdi, %rdi
	movq	8(%rsp), %rax
	movl	%r12d, %edx
	movq	%rbx, %rsi
	movq	%rax, %rcx
	addq	%rax, %rdi
	call	_Z12exploreChildP4NodePSt6vectorIS1_IS0_SaIS0_EESaIS3_EEiS0_
.LEHE5:
	jmp	.L312
.L298:
	movl	$2, 20(%r13)
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L315
	jmp	.L321
.L317:
	endbr64
	movq	%rax, %rbx
.L313:
	leaq	48(%rsp), %rdi
	call	_ZNSt6vectorIP4NodeSaIS1_EED1Ev
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L321
	movq	%rbx, %rdi
.LEHB6:
	call	_Unwind_Resume@PLT
.LEHE6:
.L321:
	call	__stack_chk_fail@PLT
.L315:
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3161:
	.section	.gcc_except_table,"a",@progbits
.LLSDA3161:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE3161-.LLSDACSB3161
.LLSDACSB3161:
	.uleb128 .LEHB4-.LFB3161
	.uleb128 .LEHE4-.LEHB4
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB5-.LFB3161
	.uleb128 .LEHE5-.LEHB5
	.uleb128 .L317-.LFB3161
	.uleb128 0
	.uleb128 .LEHB6-.LFB3161
	.uleb128 .LEHE6-.LEHB6
	.uleb128 0
	.uleb128 0
.LLSDACSE3161:
	.text
	.size	_Z12exploreChildP4NodePSt6vectorIS1_IS0_SaIS0_EESaIS3_EEiS0_, .-_Z12exploreChildP4NodePSt6vectorIS1_IS0_SaIS0_EESaIS3_EEiS0_
	.section	.text._ZStmiRKSt15_Deque_iteratorIP4NodeRS1_PS1_ES6_,"axG",@progbits,_ZStmiRKSt15_Deque_iteratorIP4NodeRS1_PS1_ES6_,comdat
	.weak	_ZStmiRKSt15_Deque_iteratorIP4NodeRS1_PS1_ES6_
	.type	_ZStmiRKSt15_Deque_iteratorIP4NodeRS1_PS1_ES6_, @function
_ZStmiRKSt15_Deque_iteratorIP4NodeRS1_PS1_ES6_:
.LFB3551:
	.cfi_startproc
	endbr64
	movq	24(%rdi), %rdx
	movq	%rdx, %rax
	subq	24(%rsi), %rax
	sarq	$3, %rax
	cmpq	$1, %rdx
	movq	(%rdi), %rdx
	adcq	$-1, %rax
	subq	8(%rdi), %rdx
	sarq	$3, %rdx
	salq	$6, %rax
	addq	%rdx, %rax
	movq	16(%rsi), %rdx
	subq	(%rsi), %rdx
	sarq	$3, %rdx
	addq	%rdx, %rax
	ret
	.cfi_endproc
.LFE3551:
	.size	_ZStmiRKSt15_Deque_iteratorIP4NodeRS1_PS1_ES6_, .-_ZStmiRKSt15_Deque_iteratorIP4NodeRS1_PS1_ES6_
	.section	.text._ZNSt5dequeIP4NodeSaIS1_EE17_M_reallocate_mapEmb,"axG",@progbits,_ZNSt5dequeIP4NodeSaIS1_EE17_M_reallocate_mapEmb,comdat
	.align 2
	.weak	_ZNSt5dequeIP4NodeSaIS1_EE17_M_reallocate_mapEmb
	.type	_ZNSt5dequeIP4NodeSaIS1_EE17_M_reallocate_mapEmb, @function
_ZNSt5dequeIP4NodeSaIS1_EE17_M_reallocate_mapEmb:
.LFB3553:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	%edx, %ecx
	movq	%rsi, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	movq	72(%rdi), %rdx
	movq	40(%rdi), %rsi
	movq	%rdx, %r12
	subq	%rsi, %r12
	movq	%r12, %rax
	sarq	$3, %rax
	leaq	1(%r15,%rax), %r8
	movq	8(%rdi), %rax
	leaq	(%r8,%r8), %rdi
	cmpq	%rax, %rdi
	jnb	.L326
	subq	%r8, %rax
	movq	0(%rbp), %rbx
	xorl	%edi, %edi
	shrq	%rax
	salq	$3, %rax
	testb	%cl, %cl
	je	.L327
	leaq	0(,%r15,8), %rdi
.L327:
	addq	%rdi, %rax
	addq	$8, %rdx
	addq	%rax, %rbx
	subq	%rsi, %rdx
	cmpq	%rsi, %rbx
	jnb	.L328
	movq	%rbx, %rdi
	cmpq	$8, %rdx
	jg	.L341
	jne	.L332
	movq	(%rsi), %rax
	movq	%rax, (%rbx)
	jmp	.L332
.L328:
	leaq	8(%rbx,%r12), %rdi
	cmpq	$8, %rdx
	jle	.L333
	subq	%rdx, %rdi
.L341:
	call	memmove@PLT
	jmp	.L332
.L333:
	jne	.L332
	movq	(%rsi), %rax
	movq	%rax, -8(%rdi)
	jmp	.L332
.L326:
	cmpq	%r15, %rax
	movq	%r15, %rdx
	cmovnb	%rax, %rdx
	leaq	2(%rax,%rdx), %r13
	movabsq	$1152921504606846975, %rax
	cmpq	%r13, %rax
	jnb	.L334
	movq	%r13, %rdi
	call	_ZNSt15__new_allocatorIPP4NodeE8allocateEmPKv.part.0
.L334:
	leaq	0(,%r13,8), %rdi
	movl	%ecx, 12(%rsp)
	movq	%r13, %rbx
	movq	%r8, (%rsp)
	call	_Znwm@PLT
	movq	(%rsp), %r8
	movl	12(%rsp), %ecx
	movq	%rax, %r14
	xorl	%eax, %eax
	subq	%r8, %rbx
	shrq	%rbx
	salq	$3, %rbx
	testb	%cl, %cl
	je	.L335
	leaq	0(,%r15,8), %rax
.L335:
	addq	%rax, %rbx
	movq	72(%rbp), %rax
	movq	40(%rbp), %rsi
	addq	%r14, %rbx
	leaq	8(%rax), %rdx
	subq	%rsi, %rdx
	cmpq	$8, %rdx
	jle	.L336
	movq	%rbx, %rdi
	call	memmove@PLT
	jmp	.L337
.L336:
	jne	.L337
	movq	(%rsi), %rax
	movq	%rax, (%rbx)
.L337:
	movq	8(%rbp), %rax
	movq	0(%rbp), %rdi
	leaq	0(,%rax,8), %rsi
	call	_ZdlPvm@PLT
	movq	%r14, 0(%rbp)
	movq	%r13, 8(%rbp)
.L332:
	movq	(%rbx), %rax
	movq	%rbx, 40(%rbp)
	addq	%r12, %rbx
	movq	%rbx, 72(%rbp)
	movq	%rax, 24(%rbp)
	addq	$512, %rax
	movq	%rax, 32(%rbp)
	movq	(%rbx), %rax
	movq	%rax, 56(%rbp)
	addq	$512, %rax
	movq	%rax, 64(%rbp)
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3553:
	.size	_ZNSt5dequeIP4NodeSaIS1_EE17_M_reallocate_mapEmb, .-_ZNSt5dequeIP4NodeSaIS1_EE17_M_reallocate_mapEmb
	.section	.text._ZNSt5dequeIP4NodeSaIS1_EE22_M_reserve_map_at_backEm,"axG",@progbits,_ZNSt5dequeIP4NodeSaIS1_EE22_M_reserve_map_at_backEm,comdat
	.align 2
	.weak	_ZNSt5dequeIP4NodeSaIS1_EE22_M_reserve_map_at_backEm
	.type	_ZNSt5dequeIP4NodeSaIS1_EE22_M_reserve_map_at_backEm, @function
_ZNSt5dequeIP4NodeSaIS1_EE22_M_reserve_map_at_backEm:
.LFB3512:
	.cfi_startproc
	endbr64
	movq	72(%rdi), %rax
	movq	8(%rdi), %rdx
	leaq	1(%rsi), %rcx
	subq	(%rdi), %rax
	sarq	$3, %rax
	subq	%rax, %rdx
	cmpq	%rcx, %rdx
	jnb	.L342
	xorl	%edx, %edx
	jmp	_ZNSt5dequeIP4NodeSaIS1_EE17_M_reallocate_mapEmb
.L342:
	ret
	.cfi_endproc
.LFE3512:
	.size	_ZNSt5dequeIP4NodeSaIS1_EE22_M_reserve_map_at_backEm, .-_ZNSt5dequeIP4NodeSaIS1_EE22_M_reserve_map_at_backEm
	.section	.rodata.str1.1
.LC20:
	.string	"cannot create std::deque larger than max_size()"
	.text
	.globl	_Z3bfsP4Nodei
	.type	_Z3bfsP4Nodei, @function
_Z3bfsP4Nodei:
.LFB3173:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA3173
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rdi, %r12
	movslq	%esi, %rdi
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$136, %rsp
	.cfi_def_cfa_offset 192
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	movabsq	$2305843009213693950, %rax
	cmpq	%rdi, %rax
	jb	.L345
	movq	%rdi, %rbp
	salq	$2, %rdi
.LEHB7:
	call	_Znam@PLT
	movq	%rax, %rbx
	xorl	%eax, %eax
	jmp	.L346
.L345:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L378
	call	__cxa_throw_bad_array_new_length@PLT
.L346:
	cmpl	%eax, %ebp
	jle	.L382
	movl	$-1, (%rbx,%rax,4)
	incq	%rax
	jmp	.L346
.L382:
	movq	$8, 48(%rsp)
	xorl	%edx, %edx
	movl	$64, %edi
	movq	%rdx, 56(%rsp)
	movq	%rdx, 64(%rsp)
	movq	%rdx, 72(%rsp)
	movq	%rdx, 80(%rsp)
	movq	%rdx, 88(%rsp)
	movq	%rdx, 96(%rsp)
	movq	%rdx, 104(%rsp)
	movq	%rdx, 112(%rsp)
	call	_Znwm@PLT
.LEHE7:
	movl	$512, %edi
	movq	%rax, 40(%rsp)
	movq	%rax, %rbp
	leaq	24(%rax), %r13
.LEHB8:
	call	_Znwm@PLT
.LEHE8:
	movq	%r12, (%rax)
	leaq	512(%rax), %rdx
	movq	%rax, 24(%rbp)
	movq	%rax, 64(%rsp)
	movq	%rax, 96(%rsp)
	movq	%rax, 56(%rsp)
	addq	$8, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	movq	%r13, 80(%rsp)
	movq	%rdx, 72(%rsp)
	movq	%r13, 112(%rsp)
	movq	%rdx, 104(%rsp)
	movl	%eax, (%rbx)
	jmp	.L363
.L374:
	endbr64
	movq	%rax, %rdi
.L350:
	call	__cxa_begin_catch@PLT
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L378
.LEHB9:
	call	__cxa_rethrow@PLT
.LEHE9:
.L375:
	endbr64
	movq	%rax, %rbx
.L352:
	call	__cxa_end_catch@PLT
	movq	%rbx, %rdi
	call	__cxa_begin_catch@PLT
	movl	$64, %esi
	movq	%rbp, %rdi
	call	_ZdlPvm@PLT
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L378
.LEHB10:
	call	__cxa_rethrow@PLT
.LEHE10:
.L373:
	endbr64
	movq	%rax, %rbx
.L354:
	call	__cxa_end_catch@PLT
	jmp	.L381
.L383:
	movq	(%rax), %r13
	movq	64(%rsp), %rdi
	movq	72(%rsp), %rdx
	movq	80(%rsp), %rbp
	movslq	0(%r13), %rcx
	cmpl	%r15d, (%rbx,%rcx,4)
	jne	.L363
	subq	$8, %rdx
	cmpq	%rdx, %rax
	je	.L364
	addq	$8, %rax
.L365:
	cmpl	$0, 16(%r13)
	movq	%rax, 56(%rsp)
	movl	$1, 20(%r13)
	jle	.L367
	leal	1(%r15), %eax
	movq	8(%r13), %r14
	xorl	%ebp, %ebp
	movl	%eax, 28(%rsp)
.L357:
	movq	88(%rsp), %rdx
	cmpl	%ebp, 16(%r13)
	jg	.L362
.L367:
	movq	56(%rsp), %rax
	cmpq	%rax, 88(%rsp)
	jne	.L383
.L363:
	movq	56(%rsp), %rax
	cmpq	%rax, 88(%rsp)
	je	.L384
	movq	(%rax), %rax
	movslq	(%rax), %rax
	movl	(%rbx,%rax,4), %r15d
	jmp	.L367
.L364:
	movl	$512, %esi
	call	_ZdlPvm@PLT
	leaq	8(%rbp), %rax
	movq	%rax, 80(%rsp)
	movq	8(%rbp), %rax
	leaq	512(%rax), %rdx
	movq	%rax, 64(%rsp)
	movq	%rdx, 72(%rsp)
	jmp	.L365
.L362:
	movslq	(%r14,%rbp,4), %rax
	imulq	$24, %rax, %rax
	addq	%r12, %rax
	cmpl	$0, 20(%rax)
	jne	.L358
	movl	$1, 20(%rax)
	movl	28(%rsp), %ecx
	movslq	(%r14,%rbp,4), %rax
	movl	%ecx, (%rbx,%rax,4)
	movslq	(%r14,%rbp,4), %rax
	imulq	$24, %rax, %rax
	addq	%r12, %rax
	movq	%rax, (%rsp)
	movq	104(%rsp), %rax
	subq	$8, %rax
	cmpq	%rax, %rdx
	je	.L359
	movq	(%rsp), %rax
	addq	$8, %rdx
	movq	%rax, -8(%rdx)
	movq	%rdx, 88(%rsp)
	jmp	.L358
.L359:
	leaq	40(%rsp), %rax
	leaq	56(%rsp), %rsi
	leaq	88(%rsp), %rdi
	movq	%rax, 16(%rsp)
	call	_ZStmiRKSt15_Deque_iteratorIP4NodeRS1_PS1_ES6_
	movq	%rax, %rdx
	movabsq	$1152921504606846975, %rax
	cmpq	%rax, %rdx
	jne	.L360
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L378
	leaq	.LC20(%rip), %rdi
.LEHB11:
	call	_ZSt20__throw_length_errorPKc@PLT
.L360:
	movq	16(%rsp), %rdi
	movl	$1, %esi
	call	_ZNSt5dequeIP4NodeSaIS1_EE22_M_reserve_map_at_backEm
	movq	112(%rsp), %rax
	movl	$512, %edi
	movq	%rax, 8(%rsp)
	call	_Znwm@PLT
.LEHE11:
	movq	8(%rsp), %rcx
	movq	88(%rsp), %rdx
	movq	%rax, 96(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rax, 8(%rcx)
	movq	(%rsp), %rcx
	movq	%rcx, (%rdx)
	movq	8(%rsp), %rcx
	leaq	8(%rcx), %rdx
	movq	%rdx, 112(%rsp)
	leaq	512(%rax), %rdx
	movq	%rdx, 104(%rsp)
.L358:
	incq	%rbp
	jmp	.L357
.L384:
	leaq	40(%rsp), %rdi
	call	_ZNSt11_Deque_baseIP4NodeSaIS1_EED2Ev
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L371
	jmp	.L378
.L372:
	endbr64
	movq	%rax, %rbx
.L369:
	movq	16(%rsp), %rdi
	call	_ZNSt11_Deque_baseIP4NodeSaIS1_EED2Ev
.L381:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L378
	movq	%rbx, %rdi
.LEHB12:
	call	_Unwind_Resume@PLT
.LEHE12:
.L378:
	call	__stack_chk_fail@PLT
.L371:
	addq	$136, %rsp
	.cfi_def_cfa_offset 56
	movq	%rbx, %rax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3173:
	.section	.gcc_except_table
	.align 4
.LLSDA3173:
	.byte	0xff
	.byte	0x9b
	.uleb128 .LLSDATT3173-.LLSDATTD3173
.LLSDATTD3173:
	.byte	0x1
	.uleb128 .LLSDACSE3173-.LLSDACSB3173
.LLSDACSB3173:
	.uleb128 .LEHB7-.LFB3173
	.uleb128 .LEHE7-.LEHB7
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB8-.LFB3173
	.uleb128 .LEHE8-.LEHB8
	.uleb128 .L374-.LFB3173
	.uleb128 0x1
	.uleb128 .LEHB9-.LFB3173
	.uleb128 .LEHE9-.LEHB9
	.uleb128 .L375-.LFB3173
	.uleb128 0x3
	.uleb128 .LEHB10-.LFB3173
	.uleb128 .LEHE10-.LEHB10
	.uleb128 .L373-.LFB3173
	.uleb128 0
	.uleb128 .LEHB11-.LFB3173
	.uleb128 .LEHE11-.LEHB11
	.uleb128 .L372-.LFB3173
	.uleb128 0
	.uleb128 .LEHB12-.LFB3173
	.uleb128 .LEHE12-.LEHB12
	.uleb128 0
	.uleb128 0
.LLSDACSE3173:
	.byte	0x1
	.byte	0
	.byte	0
	.byte	0x7d
	.align 4
	.long	0

.LLSDATT3173:
	.text
	.size	_Z3bfsP4Nodei, .-_Z3bfsP4Nodei
	.section	.rodata.str1.1
.LC21:
	.string	"\nToo few arguments!\n"
.LC23:
	.string	"CPU Time= %.3f msec\n"
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB3186:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	cmpl	$3, %edi
	je	.L386
	leaq	.LC21(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	call	abort@PLT
.L386:
	movq	8(%rsi), %rdi
	movq	%rsi, %rbp
	call	atoi@PLT
	movq	16(%rbp), %rdi
	movl	%eax, %ebx
	movl	%eax, 8(%rsp)
	call	atoi@PLT
	movl	%ebx, %edi
	movl	%eax, 12(%rsp)
	call	_Z13generateGraphi
	movl	12(%rsp), %edx
	movl	8(%rsp), %esi
	movq	%rax, %rdi
	movq	%rax, %rbx
	call	_Z16generateChildrenP4Nodeii
	movl	8(%rsp), %esi
	movq	%rbx, %rdi
	movq	%rax, %r14
	call	_Z20transformNumChildrenP4Nodei
	movl	8(%rsp), %esi
	movq	%rbx, %rdi
	movq	%rax, %r13
	call	_Z18transformParentPtrP4Nodei
	movq	%rbx, %rdi
	movq	%rax, %r15
	movslq	8(%rsp), %rax
	movq	%r15, %rdx
	movq	%rax, %rsi
	movslq	(%r15,%rax,4), %rbp
	call	_Z16transformParentsP4NodeiPi
	movslq	8(%rsp), %rsi
	leaq	16(%rsp), %rdi
	movq	%rax, %r12
	salq	$2, %rbp
	imulq	$24, %rsi, %rsi
	call	cudaMalloc@PLT
	leaq	32(%rsp), %rdi
	movl	$4, %esi
	call	cudaMalloc@PLT
	leaq	40(%rsp), %rdi
	movl	$4, %esi
	call	cudaMalloc@PLT
	movl	8(%rsp), %esi
	imull	12(%rsp), %esi
	leaq	24(%rsp), %rdi
	movslq	%esi, %rsi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movslq	8(%rsp), %rsi
	leaq	48(%rsp), %rdi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movl	8(%rsp), %eax
	leaq	64(%rsp), %rdi
	leal	1(%rax), %esi
	movslq	%esi, %rsi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	leaq	56(%rsp), %rdi
	movq	%rbp, %rsi
	call	cudaMalloc@PLT
	movslq	8(%rsp), %rdx
	movq	16(%rsp), %rdi
	movq	%rbx, %rsi
	movl	$1, %ecx
	imulq	$24, %rdx, %rdx
	call	cudaMemcpy@PLT
	movq	32(%rsp), %rdi
	leaq	8(%rsp), %rsi
	movl	$1, %ecx
	movl	$4, %edx
	call	cudaMemcpy@PLT
	movq	40(%rsp), %rdi
	leaq	12(%rsp), %rsi
	movl	$1, %ecx
	movl	$4, %edx
	call	cudaMemcpy@PLT
	movl	8(%rsp), %edx
	imull	12(%rsp), %edx
	movq	%r14, %rsi
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movslq	%edx, %rdx
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movslq	8(%rsp), %rdx
	movq	48(%rsp), %rdi
	movq	%r13, %rsi
	movl	$1, %ecx
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movl	8(%rsp), %eax
	movq	64(%rsp), %rdi
	movq	%r15, %rsi
	movl	$1, %ecx
	leal	1(%rax), %edx
	movslq	%edx, %rdx
	salq	$2, %rdx
	call	cudaMemcpy@PLT
	movq	56(%rsp), %rdi
	movq	%rbp, %rdx
	movq	%r12, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	call	clock@PLT
	movl	8(%rsp), %esi
	movq	%rbx, %rdi
	movq	%rax, %rbp
	call	_Z3bfsP4Nodei
	movq	%rax, %rbx
	call	clock@PLT
	leaq	.LC23(%rip), %rsi
	movl	$2, %edi
	subq	%rbp, %rax
	cvtsi2sdq	%rax, %xmm0
	movb	$1, %al
	divsd	.LC22(%rip), %xmm0
	call	__printf_chk@PLT
	movq	40(%rsp), %r8
	movl	8(%rsp), %ecx
	movq	%rbx, %r9
	movq	24(%rsp), %rdx
	movq	32(%rsp), %rsi
	movq	16(%rsp), %rdi
	call	_Z24callDeviceCachedVisitBFSP4NodePiS1_iS1_S1_
	movq	40(%rsp), %r8
	movl	8(%rsp), %ecx
	movq	%rbx, %r9
	movq	48(%rsp), %rdx
	movq	24(%rsp), %rsi
	movq	32(%rsp), %rdi
	call	_Z24callChildListExploreWavePiS_S_iS_S_
	pushq	%rax
	.cfi_def_cfa_offset 152
	pushq	%rbx
	.cfi_def_cfa_offset 160
	movl	28(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 168
	movl	32(%rsp), %eax
	pushq	%rax
	.cfi_def_cfa_offset 176
	movq	96(%rsp), %r9
	movq	88(%rsp), %r8
	movq	72(%rsp), %rcx
	movq	80(%rsp), %rdx
	movq	56(%rsp), %rsi
	movq	64(%rsp), %rdi
	call	_Z18callFlipFlopParentPiS_S_S_S_S_iiS_
	movq	48(%rsp), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 144
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L387
	call	__stack_chk_fail@PLT
.L387:
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3186:
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC4:
	.long	989855744
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC22:
	.long	0
	.long	1083129856
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include <assert.h>
#include <math.h>
#include <vector>
#include <queue>
#include <ctime>

// CUDA runtime
#include <hip/hip_runtime.h>

using namespace std;

// Thread block size
#define TBS 512

// Warp size
#define WS 32

class Node {
private:
	int value;
	int* children;
	int numChildren;
	int explored;

public:
	Node();
	Node(int);
	__host__ __device__ int getValue();
	void addChild(Node*);
	__host__ __device__ int* getChildren();
	__host__ __device__ int getNumChildren();
	void printNode();
	void initializeChildren(int);
	__host__ __device__ int getExplored();
	void setExplored(int);
	__device__ int parallelSetExplored(int);
};

__global__ void parentListBackwardsWave(int *d_waveMask, int *d_nextWaveMask, int *d_parent, int *d_parentPtr, int *d_cost, int *d_size) {
	int idx = blockIdx.x * TBS + threadIdx.x;

	if (idx < *d_size && d_waveMask[idx] == 0) {
		// Loop through all children
		for (int i = d_parentPtr[idx]; i < d_parentPtr[idx + 1]; i++) {
			if (d_waveMask[d_parent[i]] == 1) {
				atomicCAS(&d_nextWaveMask[idx], 0, 1);
				d_cost[idx] = d_cost[d_parent[i]] + 1;
				break;
			}
		}
	}
	if(idx < *d_size && d_waveMask[idx] == 2){
		d_nextWaveMask[idx] = 2;
	}
}

__global__ void backwardsWave(int *d_waveMask, int *d_nextWaveMask, int *d_children, int *d_numChildren, int *d_cost, int *d_size, int *d_maxChildren) {
	int idx = blockIdx.x * TBS + threadIdx.x;

	if (idx < *d_size && d_waveMask[idx] == 0) {
		// Loop through all children
		for (int i = 0; i < *d_size * *d_maxChildren; i++) {
			if (d_children[i] == idx) {
				int parent = i / *d_maxChildren;
				if (d_waveMask[parent] == 1) {
					atomicCAS(&d_nextWaveMask[idx], 0, 1);
					d_cost[idx] = d_cost[parent] + 1;
					break;
				}
			}
		}
	}
	if(idx < *d_size && d_waveMask[idx] == 2){
		d_nextWaveMask[idx] = 2;
	}
}

__global__ void childListExploreWave(int *d_waveMask, int *d_nextWaveMask, int *d_children, int *d_numChildren, int *d_cost, int *d_size, int *d_maxChildren) {
	int idx = blockIdx.x * TBS + threadIdx.x;

	if (idx < *d_size && d_waveMask[idx] == 1) {
		int numChildren = d_numChildren[idx];
		
		for (int i = 0; i < numChildren; i++) {
			int child = d_children[idx * *d_maxChildren + i];
			
			atomicCAS(&d_nextWaveMask[child],0,1);
					
			if (d_waveMask[child] == 0) {
				d_cost[child] = d_cost[idx] + 1;
			}
		}
	}
	if(idx < *d_size && d_waveMask[idx] == 2){
		d_nextWaveMask[idx] = 2;
	}
}

__global__ void exploreWave(int *d_waveMask, int *d_nextWaveMask, Node *d_graph, int *d_children, int *d_cost, int *d_size, int *d_maxChildren) {
	int idx = blockIdx.x * TBS + threadIdx.x;

	if (idx < *d_size && d_waveMask[idx] == 1) {
		Node currentNode = d_graph[idx];
		int numChildren = currentNode.getNumChildren();
		
		for (int i = 0; i < numChildren; i++) {
			int child = d_children[idx * *d_maxChildren + i];
			
			atomicCAS(&d_nextWaveMask[child],0,1);
					
			if (d_waveMask[child] == 0) {
				d_cost[child] = d_cost[idx] + 1;
			}
		}
	}
	if(idx < *d_size && d_waveMask[idx] == 2){
		d_nextWaveMask[idx] = 2;
	}
}

__global__ void setPreviousExplored(int *d_waveMask, int *d_nextWaveMask, int *d_size){
	int idx = blockIdx.x * TBS + threadIdx.x;

	if(idx < *d_size){
		if(d_waveMask[idx] == 1){
			d_nextWaveMask[idx] = 2;
		}
	}
}

int* generateChildren(Node *nodes, int nNodes, int maxEdgesPerNode) {
	int* children = new int[nNodes * maxEdgesPerNode];

	for (int i = 0; i < nNodes; i++) {
		int numEdges = (rand() % maxEdgesPerNode) + 1;
		nodes[i].initializeChildren(numEdges);
		for (int j = 0; j < numEdges; j++) {
			int child = rand() % nNodes;
			bool isChild = false;
			for (int k = 0; k < nodes[i].getNumChildren(); k++){
				if (child == nodes[i].getChildren()[k]){
					isChild = true;
					break;
				}
			}
			if (!isChild && child != nodes[i].getValue()){
				children[i * maxEdgesPerNode + nodes[i].getNumChildren()] = child;
				nodes[i].addChild(&nodes[child]);
			}
		}
	}
	/*for (int i = 0; i < nNodes; i++) {
		nodes[i].printNode();
	}*/

	return children;
}

Node* generateGraph(int nNodes) {
	srand((unsigned)time(0)); 
	Node* nodes = new Node[nNodes];
	
	for (int i = 0; i < nNodes; i++) {
		Node* tmp = new Node(i);
		nodes[i] = *tmp;
	}

	return nodes; 
}

void exploreChild(Node* child, vector< vector<Node*> >* path, int depth, Node* nodes) {
	int numChildren = child->getNumChildren();
	if (numChildren > 0) {
		bool *toExplore = new bool[numChildren];
		vector<Node*> newPath;
		if (path->size() <= depth) {
			path->push_back(newPath);
		}
		vector<Node*>* currentPath = &(path->at(depth));
		
		for (int i = 0; i < numChildren; i++) {
			Node* newChild = &nodes[child->getChildren()[i]];
			if (newChild->getExplored() == 0) {
				currentPath->push_back(newChild);
				newChild->setExplored(1);
				toExplore[i] = true;
			} else {
				toExplore[i] = false;
			}
		}

		// Explore loop after push loop so it is actually BFS
		for (int i = 0; i < numChildren; i++) {
			Node* newChild = &nodes[child->getChildren()[i]];
			if (toExplore[i]) {
				exploreChild(newChild, path, depth + 1, nodes);	
			}
		}
	}

	child->setExplored(2);
	return;
}

int* bfs(Node* nodes, int size) {
	int* cost = new int[size];
	for (int i = 0; i < size; i++) {
		cost[i] = -1;
	}

	Node* currentNode = &nodes[0];
	queue<Node*> wave;
	wave.push(currentNode);
	cost[0] = 0;

	int depth = 0;
	while (!wave.empty()) {
		depth = cost[wave.front()->getValue()];
		while (!wave.empty() && depth == cost[wave.front()->getValue()]) {
			currentNode = wave.front();
			wave.pop();
			currentNode->setExplored(1);
			if (currentNode->getNumChildren() > 0) {
				int *children = currentNode->getChildren();
				for (int i = 0; i < currentNode->getNumChildren(); i++) {
					if (nodes[children[i]].getExplored() == 0) {
						nodes[children[i]].setExplored(1);
						cost[children[i]] = depth + 1;
						wave.push(&nodes[children[i]]);
					}
				}
			}
		}
	}

	return cost;
}

int* transformBfs(vector< vector<Node*> > path, int size) {
	int *result = new int[size];
	for (int i = 0; i < size; i++) {
		result[i] = -1;
	}
	for (int i = 0; i < path.size(); i++) {
		//printf("%i - ", i);
		for (int j = 0; j < path[i].size(); j++) {
			//printf(" %i ", path[i][j]->getValue());
			result[path[i][j]->getValue()] = i;
		}
		//printf("\n");
	}
	return result;
}

int* transformNumChildren(Node* nodes, int size) {
	int *result = new int[size];
	for (int i = 0; i < size; i++) {
		result[i] = nodes[i].getNumChildren();
	}
	return result;
}

int* transformParentPtr(Node* nodes, int size) {
	int *result = new int[size + 1];
	for (int i = 0; i < size; i++) {
		result[i] = 0;
	}

	for (int i = 0; i < size; i++) {
		Node *node = &nodes[i];
		if (node->getNumChildren() > 0) {
			int *children = node->getChildren();
			for (int j = 0; j < node->getNumChildren(); j++) {
				int child = children[j];
				result[child + 1] += 1;
			}
		}
	}
	
	for (int i = 1; i < size + 1; i++) {
		result[i] = result[i] + result[i - 1];
	}
	return result;
}

int* transformParents(Node* nodes, int size, int* parentPtr) {
	int numEdges = parentPtr[size];
	int *result = new int[numEdges];
	int *curIdx = new int[size];
	for (int i = 0; i < size; i++) {
		curIdx[i] = parentPtr[i];
	}

	for (int i = 0; i < size; i++) {
		Node *node = &nodes[i];
		if (node->getNumChildren() > 0) {
			int *children = node->getChildren();
			for (int j = 0; j < node->getNumChildren(); j++) {
				int child = children[j];
				result[curIdx[child]] = i;
				curIdx[child] = curIdx[child] + 1;
			}
		}
	}

	return result;
}

void callFlipFlopParent(int *d_size, int *d_children, int *d_numChildren, int *d_maxChildren, int *d_parent, int *d_parentPtr, int size, int maxChildren, int *synchResult) {
	hipEvent_t start;
	hipEventCreate(&start);
    hipEvent_t stop;
    hipEventCreate(&stop);

    int *d_cost, *d_waveMask, *d_nextWaveMask;

	// Allocate space for device copies
	hipMalloc((void **)&d_cost, size * sizeof(int));
	hipMalloc((void **)&d_waveMask, size * sizeof(int));
	hipMalloc((void **)&d_nextWaveMask, size * sizeof(int));


    int gridSz = ceil(((float) size) / TBS);

    int *waveMask = new int[size];
    int *nextWaveMask = new int[size]; 

    int *cost = new int[size];
    cost[0] = 0;
    for (int i = 1; i < size; i++) {
    	cost[i] = -1;
    	waveMask[i] = 0;
		nextWaveMask[i] = 0;
    }

    waveMask[0] = 1;

    hipMemcpy(d_cost, cost, size * sizeof(int), hipMemcpyHostToDevice);
	hipMemcpy(d_waveMask, waveMask, size * sizeof(int), hipMemcpyHostToDevice);
	hipMemcpy(d_nextWaveMask, nextWaveMask, size * sizeof(int), hipMemcpyHostToDevice);

	// Record the start event
    hipEventRecord(start, NULL);
    
    bool complete = false;
    int completed = 0;
    while(!complete) {
    	// Launch kernel on GPU
    	if (completed < (maxChildren * maxChildren - 1) / (maxChildren * maxChildren) * size) {
    		childListExploreWave<<<gridSz, TBS>>>(d_waveMask, d_nextWaveMask, d_children, d_numChildren, d_cost, d_size, d_maxChildren);
    	} else {
    		parentListBackwardsWave<<<gridSz, TBS>>>(d_waveMask, d_nextWaveMask, d_parent, d_parentPtr, d_cost, d_size);
    	}
		
		hipDeviceSynchronize();
		setPreviousExplored<<<gridSz, TBS>>>(d_waveMask, d_nextWaveMask, d_size);		
		hipDeviceSynchronize();
		hipMemcpy(d_waveMask, d_nextWaveMask, size * sizeof(int), hipMemcpyDeviceToDevice);
		hipMemcpy(d_nextWaveMask, nextWaveMask, size * sizeof(int), hipMemcpyHostToDevice);

		complete = true;
		hipMemcpy(waveMask, d_waveMask, size * sizeof(int), hipMemcpyDeviceToHost);
		for(int i = 0 ; i < size; i++) {
			if(waveMask[i] == 1) {
				complete = false;
			} else if (waveMask[i] == 2) {
				completed += 1;
			}
		}
    }

	
	
	// Make sure result is finished
	hipDeviceSynchronize();

	// Record end event
	hipEventRecord(stop, NULL);
	hipEventSynchronize(stop);
	float msecTotal = 0.0f;
    hipEventElapsedTime(&msecTotal, start, stop);

    printf("GPU Parent Flip Flop Explore Time= %.3f msec\n", msecTotal);

	// Copy result back to host
	int *gpu_result = (int *) malloc(size * sizeof(int));
	hipMemcpy(gpu_result, d_cost, size * sizeof(int), hipMemcpyDeviceToHost);

	bool isCorrect = true;

	for (int i = 0; i < size; i++) {
		if (synchResult[i] != gpu_result[i]) {
			isCorrect = false;
			printf("%i CPU: %i GPU:%i\n", i, synchResult[i], gpu_result[i]);
		}
	}

	if (!isCorrect) {
		printf("The results do not match\n");
	} else {
		printf("The results match\n");
	}
}


void callFlipFlopWaveExplore(int *d_size, int *d_children, int *d_numChildren, int size, int *d_maxChildren, int maxChildren, int *synchResult) {
	hipEvent_t start;
	hipEventCreate(&start);
    hipEvent_t stop;
    hipEventCreate(&stop);

    int *d_cost, *d_waveMask, *d_nextWaveMask;

	// Allocate space for device copies
	hipMalloc((void **)&d_cost, size * sizeof(int));
	hipMalloc((void **)&d_waveMask, size * sizeof(int));
	hipMalloc((void **)&d_nextWaveMask, size * sizeof(int));


    int gridSz = ceil(((float) size) / TBS);

    int *waveMask = new int[size];
    int *nextWaveMask = new int[size]; 

    int *cost = new int[size];
    cost[0] = 0;
    for (int i = 1; i < size; i++) {
    	cost[i] = -1;
    	waveMask[i] = 0;
		nextWaveMask[i] = 0;
    }

    waveMask[0] = 1;

    hipMemcpy(d_cost, cost, size * sizeof(int), hipMemcpyHostToDevice);
	hipMemcpy(d_waveMask, waveMask, size * sizeof(int), hipMemcpyHostToDevice);
	hipMemcpy(d_nextWaveMask, nextWaveMask, size * sizeof(int), hipMemcpyHostToDevice);

	// Record the start event
    hipEventRecord(start, NULL);
    
    bool complete = false;
    int completed = 0;
    while(!complete) {
    	// Launch kernel on GPU
    	if (completed < (maxChildren * maxChildren - 1) / (maxChildren * maxChildren) * size) {
    		childListExploreWave<<<gridSz, TBS>>>(d_waveMask, d_nextWaveMask, d_children, d_numChildren, d_cost, d_size, d_maxChildren);
    	} else {
    		backwardsWave<<<gridSz, TBS>>>(d_waveMask, d_nextWaveMask, d_children, d_numChildren, d_cost, d_size, d_maxChildren);
    	}
		
		hipDeviceSynchronize();
		setPreviousExplored<<<gridSz, TBS>>>(d_waveMask, d_nextWaveMask, d_size);		
		hipDeviceSynchronize();
		hipMemcpy(d_waveMask, d_nextWaveMask, size * sizeof(int), hipMemcpyDeviceToDevice);
		hipMemcpy(d_nextWaveMask, nextWaveMask, size * sizeof(int), hipMemcpyHostToDevice);

		complete = true;
		hipMemcpy(waveMask, d_waveMask, size * sizeof(int), hipMemcpyDeviceToHost);
		for(int i = 0 ; i < size; i++) {
			if(waveMask[i] == 1) {
				complete = false;
			} else if (waveMask[i] == 2) {
				completed += 1;
			}
		}
    }

	
	
	// Make sure result is finished
	hipDeviceSynchronize();

	// Record end event
	hipEventRecord(stop, NULL);
	hipEventSynchronize(stop);
	float msecTotal = 0.0f;
    hipEventElapsedTime(&msecTotal, start, stop);

    printf("GPU Flip Flop Explore Time= %.3f msec\n", msecTotal);

	// Copy result back to host
	int *gpu_result = (int *) malloc(size * sizeof(int));
	hipMemcpy(gpu_result, d_cost, size * sizeof(int), hipMemcpyDeviceToHost);

	bool isCorrect = true;

	for (int i = 0; i < size; i++) {
		if (synchResult[i] != gpu_result[i]) {
			isCorrect = false;
			printf("%i CPU: %i GPU:%i\n", i, synchResult[i], gpu_result[i]);
		}
	}

	if (!isCorrect) {
		printf("The results do not match\n");
	} else {
		printf("The results match\n");
	}
}

void callChildListExploreWave(int *d_size, int *d_children, int *d_numChildren, int size, int *d_maxChildren, int *synchResult) {
	hipEvent_t start;
	hipEventCreate(&start);
    hipEvent_t stop;
    hipEventCreate(&stop);

    int *d_cost, *d_waveMask, *d_nextWaveMask;

	// Allocate space for device copies
	hipMalloc((void **)&d_cost, size * sizeof(int));
	hipMalloc((void **)&d_waveMask, size * sizeof(int));
	hipMalloc((void **)&d_nextWaveMask, size * sizeof(int));


    int gridSz = ceil(((float) size) / TBS);

    int *waveMask = new int[size];
    int *nextWaveMask = new int[size]; 

    int *cost = new int[size];
    cost[0] = 0;
    for (int i = 1; i < size; i++) {
    	cost[i] = -1;
    	waveMask[i] = 0;
		nextWaveMask[i] = 0;
    }

    waveMask[0] = 1;

    hipMemcpy(d_cost, cost, size * sizeof(int), hipMemcpyHostToDevice);
	hipMemcpy(d_waveMask, waveMask, size * sizeof(int), hipMemcpyHostToDevice);
	hipMemcpy(d_nextWaveMask, nextWaveMask, size * sizeof(int), hipMemcpyHostToDevice);
    
	// Record the start event
    hipEventRecord(start, NULL);

    bool complete = false;
    while(!complete) {

    	// Launch kernel on GPU
		childListExploreWave<<<gridSz, TBS>>>(d_waveMask, d_nextWaveMask, d_children, d_numChildren, d_cost, d_size, d_maxChildren);
		hipDeviceSynchronize();
		setPreviousExplored<<<gridSz, TBS>>>(d_waveMask, d_nextWaveMask, d_size);		
		hipDeviceSynchronize();
		hipMemcpy(d_waveMask, d_nextWaveMask, size * sizeof(int), hipMemcpyDeviceToDevice);
		hipMemcpy(d_nextWaveMask, nextWaveMask, size * sizeof(int), hipMemcpyHostToDevice);

		complete = true;
		hipMemcpy(waveMask, d_waveMask, size * sizeof(int), hipMemcpyDeviceToHost);
		for(int i = 0 ; i < size; i++){
			if(waveMask[i] == 1){
				complete = false;
			}
		}
    }

	
	
	// Make sure result is finished
	hipDeviceSynchronize();

	// Record end event
	hipEventRecord(stop, NULL);
	hipEventSynchronize(stop);
	float msecTotal = 0.0f;
    hipEventElapsedTime(&msecTotal, start, stop);

    printf("GPU Child List Explore Time= %.3f msec\n", msecTotal);

	// Copy result back to host
	int *gpu_result = (int *) malloc(size * sizeof(int));
	hipMemcpy(gpu_result, d_cost, size * sizeof(int), hipMemcpyDeviceToHost);

	bool isCorrect = true;

	for (int i = 0; i < size; i++) {
		if (synchResult[i] != gpu_result[i]) {
			isCorrect = false;
			printf("%i CPU: %i GPU:%i\n", i, synchResult[i], gpu_result[i]);
		}
	}

	if (!isCorrect) {
		printf("The results do not match\n");
	} else {
		printf("The results match\n");
	}
}

void callDeviceCachedVisitBFS(Node *d_graph, int *d_size, int *d_children, int size, int *d_maxChildren, int *synchResult) {
	hipEvent_t start;
	hipEventCreate(&start);
    hipEvent_t stop;
    hipEventCreate(&stop);

    int *d_cost, *d_waveMask, *d_nextWaveMask;

	// Allocate space for device copies
	hipMalloc((void **)&d_cost, size * sizeof(int));
	hipMalloc((void **)&d_waveMask, size * sizeof(int));
	hipMalloc((void **)&d_nextWaveMask, size * sizeof(int));


    int gridSz = ceil(((float) size) / TBS);

    int *waveMask = new int[size];
    int *nextWaveMask = new int[size]; 

    int *cost = new int[size];
    cost[0] = 0;
    for (int i = 1; i < size; i++) {
    	cost[i] = -1;
    	waveMask[i] = 0;
	nextWaveMask[i] = 0;
    }

    waveMask[0] = 1;

    hipMemcpy(d_cost, cost, size * sizeof(int), hipMemcpyHostToDevice);
	hipMemcpy(d_waveMask, waveMask, size * sizeof(int), hipMemcpyHostToDevice);
	hipMemcpy(d_nextWaveMask, nextWaveMask, size * sizeof(int), hipMemcpyHostToDevice);
    
	// Record the start event
    hipEventRecord(start, NULL);

    bool complete = false;
    while(!complete) {

    	// Launch kernel on GPU
		exploreWave<<<gridSz, TBS>>>(d_waveMask, d_nextWaveMask, d_graph, d_children, d_cost, d_size, d_maxChildren);
		hipDeviceSynchronize();
		setPreviousExplored<<<gridSz, TBS>>>(d_waveMask, d_nextWaveMask, d_size);		
		hipDeviceSynchronize();
		hipMemcpy(d_waveMask, d_nextWaveMask, size * sizeof(int), hipMemcpyDeviceToDevice);
		hipMemcpy(d_nextWaveMask, nextWaveMask, size * sizeof(int), hipMemcpyHostToDevice);

		//exploreWave<<<gridSz, TBS>>>(d_waveMask, d_nextWaveMask, d_graph, d_children, d_cost, d_size, d_maxChildren);
		complete = true;
		hipMemcpy(waveMask, d_waveMask, size * sizeof(int), hipMemcpyDeviceToHost);
		for(int i = 0 ; i < size; i++){
			if(waveMask[i] == 1){
				complete = false;
			}
		}
    }

	
	
	// Make sure result is finished
	hipDeviceSynchronize();

	// Record end event
	hipEventRecord(stop, NULL);
	hipEventSynchronize(stop);
	float msecTotal = 0.0f;
    hipEventElapsedTime(&msecTotal, start, stop);

    printf("GPU Wave Time= %.3f msec\n", msecTotal);

	// Copy result back to host
	int *gpu_result = (int *) malloc(size * sizeof(int));
	hipMemcpy(gpu_result, d_cost, size * sizeof(int), hipMemcpyDeviceToHost);

	bool isCorrect = true;

	for (int i = 0; i < size; i++) {
		if (synchResult[i] != gpu_result[i]) {
			isCorrect = false;
			printf("%i CPU: %i GPU:%i\n", i, synchResult[i], gpu_result[i]);
		}
	}

	if (!isCorrect) {
		printf("The results do not match\n");
	} else {
		printf("The results match\n");
	}
}

int main (int argc, char **argv) {
	if (argc !=3) {
		printf("\nToo few arguments!\n");
		abort();
	}

	// Get command line argument
	int size = atoi(argv[1]);
	int maxEdgesPerNode = atoi(argv[2]);

	Node* nodes = generateGraph(size);
	int* children = generateChildren(nodes, size, maxEdgesPerNode);
	int* numChildren = transformNumChildren(nodes, size);
	int* parentPtr = transformParentPtr(nodes, size);
	int numEdges = parentPtr[size];
	int* parent = transformParents(nodes, size, parentPtr);

	/*for (int i = 0; i < size + 1; i++) {
		printf("%i parentPtr: %i\n", i, parentPtr[i]);
	}
	
	for (int i = 0; i < size; i++) {
		for (int j = parentPtr[i]; j < parentPtr[i + 1]; j++) {
			printf("%i child: %i parent: %i\n", j, i, parent[j]);
		}
	}*/

	Node* d_graph;
	int *d_children, *d_size, *d_maxChildren, *d_numChildren, *d_parent, *d_parentPtr;

	// Allocate space for device copies
	hipMalloc((void **)&d_graph, size * sizeof(Node));
	hipMalloc((void **)&d_size, sizeof(int));
	hipMalloc((void **)&d_maxChildren, sizeof(int));
	hipMalloc((void **)&d_children, size * maxEdgesPerNode * sizeof(int));
	hipMalloc((void **)&d_numChildren, size * sizeof(int));
	hipMalloc((void **)&d_parentPtr, (size + 1) * sizeof(int));
	hipMalloc((void **)&d_parent, numEdges * sizeof(int));

	// Copy inputs to device
	hipMemcpy(d_graph, nodes, size * sizeof(Node), hipMemcpyHostToDevice);
	hipMemcpy(d_size, &size, sizeof(int), hipMemcpyHostToDevice);
	hipMemcpy(d_maxChildren, &maxEdgesPerNode, sizeof(int), hipMemcpyHostToDevice);
	hipMemcpy(d_children, children, size * maxEdgesPerNode * sizeof(int), hipMemcpyHostToDevice);
	hipMemcpy(d_numChildren, numChildren, size * sizeof(int), hipMemcpyHostToDevice);
	hipMemcpy(d_parentPtr, parentPtr, (size + 1) * sizeof(int), hipMemcpyHostToDevice);
	hipMemcpy(d_parent, parent, numEdges * sizeof(int), hipMemcpyHostToDevice);

	//Synchronouse bfs
	//vector< vector<Node*> > path = bfs(nodes, size);
	clock_t start;
	clock_t end;
	start = clock();
	int *synchResult = bfs(nodes, size);
	end = clock();

	printf("CPU Time= %.3f msec\n", (end - start) / (double) (CLOCKS_PER_SEC / 1000));

	callDeviceCachedVisitBFS(d_graph, d_size, d_children, size, d_maxChildren, synchResult);

	callChildListExploreWave(d_size, d_children, d_numChildren, size, d_maxChildren, synchResult);

	//callFlipFlopWaveExplore(d_size, d_children, d_numChildren, size, d_maxChildren, maxEdgesPerNode, synchResult);

	callFlipFlopParent(d_size, d_children, d_numChildren, d_maxChildren, d_parent, d_parentPtr, size, maxEdgesPerNode, synchResult);

	// Cleanup
	hipFree(d_graph); 
	hipFree(d_size);
	hipFree(d_children);
	hipFree(d_numChildren);
	hipFree(d_maxChildren);

	return 0;
}

Node::Node(int newValue) {
	value = newValue;
	explored = 0;
}

Node::Node() {
}

__host__ __device__ int Node::getValue() {
	return value;
}

__host__ __device__ int* Node::getChildren() {
	return children;
}

__host__ __device__ int Node::getNumChildren() {
	return numChildren;
}

void Node::addChild(Node* child) {
	children[numChildren] = child->getValue();
	numChildren++;

	return;
}

void Node::printNode() {
	printf("Value: %i Children: [", value);
	for (int i = 0; i < numChildren; i++) {
		printf("%i", children[i]);
		if (i != numChildren - 1) {
			printf(", ");
		}
	}
	printf("]\n");
	return;
}

void Node::initializeChildren(int numEdges) {
	children = new int[numEdges];
}

__host__ __device__ int Node::getExplored() {
	return explored;
}

__device__ int Node::parallelSetExplored(int newExplored) {
	return atomicExch(&explored, newExplored);
}

void Node::setExplored(int newExplored) {
	explored = newExplored;
	return;
}




	.text
	.file	"bfs.hip"
	.globl	_Z38__device_stub__parentListBackwardsWavePiS_S_S_S_S_ # -- Begin function _Z38__device_stub__parentListBackwardsWavePiS_S_S_S_S_
	.type	_Z38__device_stub__parentListBackwardsWavePiS_S_S_S_S_,@function
_Z38__device_stub__parentListBackwardsWavePiS_S_S_S_S_: # @_Z38__device_stub__parentListBackwardsWavePiS_S_S_S_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	16(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z23parentListBackwardsWavePiS_S_S_S_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z38__device_stub__parentListBackwardsWavePiS_S_S_S_S_, .Lfunc_end0-_Z38__device_stub__parentListBackwardsWavePiS_S_S_S_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z28__device_stub__backwardsWavePiS_S_S_S_S_S_ # -- Begin function _Z28__device_stub__backwardsWavePiS_S_S_S_S_S_
	.type	_Z28__device_stub__backwardsWavePiS_S_S_S_S_S_,@function
_Z28__device_stub__backwardsWavePiS_S_S_S_S_S_: # @_Z28__device_stub__backwardsWavePiS_S_S_S_S_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	16(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13backwardsWavePiS_S_S_S_S_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z28__device_stub__backwardsWavePiS_S_S_S_S_S_, .Lfunc_end1-_Z28__device_stub__backwardsWavePiS_S_S_S_S_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z35__device_stub__childListExploreWavePiS_S_S_S_S_S_ # -- Begin function _Z35__device_stub__childListExploreWavePiS_S_S_S_S_S_
	.type	_Z35__device_stub__childListExploreWavePiS_S_S_S_S_S_,@function
_Z35__device_stub__childListExploreWavePiS_S_S_S_S_S_: # @_Z35__device_stub__childListExploreWavePiS_S_S_S_S_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	16(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z20childListExploreWavePiS_S_S_S_S_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z35__device_stub__childListExploreWavePiS_S_S_S_S_S_, .Lfunc_end2-_Z35__device_stub__childListExploreWavePiS_S_S_S_S_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z26__device_stub__exploreWavePiS_P4NodeS_S_S_S_ # -- Begin function _Z26__device_stub__exploreWavePiS_P4NodeS_S_S_S_
	.type	_Z26__device_stub__exploreWavePiS_P4NodeS_S_S_S_,@function
_Z26__device_stub__exploreWavePiS_P4NodeS_S_S_S_: # @_Z26__device_stub__exploreWavePiS_P4NodeS_S_S_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	16(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11exploreWavePiS_P4NodeS_S_S_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z26__device_stub__exploreWavePiS_P4NodeS_S_S_S_, .Lfunc_end3-_Z26__device_stub__exploreWavePiS_P4NodeS_S_S_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z34__device_stub__setPreviousExploredPiS_S_ # -- Begin function _Z34__device_stub__setPreviousExploredPiS_S_
	.type	_Z34__device_stub__setPreviousExploredPiS_S_,@function
_Z34__device_stub__setPreviousExploredPiS_S_: # @_Z34__device_stub__setPreviousExploredPiS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z19setPreviousExploredPiS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z34__device_stub__setPreviousExploredPiS_S_, .Lfunc_end4-_Z34__device_stub__setPreviousExploredPiS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z16generateChildrenP4Nodeii    # -- Begin function _Z16generateChildrenP4Nodeii
	.type	_Z16generateChildrenP4Nodeii,@function
_Z16generateChildrenP4Nodeii:           # @_Z16generateChildrenP4Nodeii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%esi, %ebp
	movq	%rdi, 8(%rsp)                   # 8-byte Spill
	movl	%edx, 4(%rsp)                   # 4-byte Spill
	movl	%edx, %eax
	imull	%esi, %eax
	leaq	(,%rax,4), %rdi
	testl	%eax, %eax
	movq	$-1, %rax
	cmovsq	%rax, %rdi
	callq	_Znam
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	testl	%ebp, %ebp
	jle	.LBB5_7
# %bb.1:                                # %.lr.ph51.preheader
	movslq	4(%rsp), %rax                   # 4-byte Folded Reload
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	movl	%ebp, %eax
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	xorl	%r15d, %r15d
.LBB5_2:                                # %.lr.ph51
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB5_4 Depth 2
                                        #       Child Loop BB5_9 Depth 3
	callq	rand
	cltd
	idivl	4(%rsp)                         # 4-byte Folded Reload
	movl	%edx, %r12d
	leal	1(%r12), %edi
	leaq	(%r15,%r15,2), %rbx
	shlq	$2, %rdi
	cmpl	$-1, %edx
	movq	$-1, %rax
	cmovlq	%rax, %rdi
	callq	_Znam
	movq	8(%rsp), %rcx                   # 8-byte Reload
	movq	%rax, 8(%rcx,%rbx,8)
	testl	%r12d, %r12d
	js	.LBB5_6
# %bb.3:                                # %.lr.ph48
                                        #   in Loop: Header=BB5_2 Depth=1
	movq	8(%rsp), %rax                   # 8-byte Reload
	leaq	(%rax,%rbx,8), %rbx
	movq	%r15, %rax
	imulq	24(%rsp), %rax                  # 8-byte Folded Reload
	movq	16(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%rax,4), %r13
	xorl	%r14d, %r14d
.LBB5_4:                                #   Parent Loop BB5_2 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB5_9 Depth 3
	callq	rand
	cltd
	idivl	%ebp
	movl	16(%rbx), %eax
	testl	%eax, %eax
	jle	.LBB5_10
# %bb.5:                                # %.lr.ph
                                        #   in Loop: Header=BB5_4 Depth=2
	movq	8(%rbx), %rcx
	xorl	%esi, %esi
.LBB5_9:                                #   Parent Loop BB5_2 Depth=1
                                        #     Parent Loop BB5_4 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	cmpl	(%rcx,%rsi,4), %edx
	je	.LBB5_12
# %bb.8:                                #   in Loop: Header=BB5_9 Depth=3
	incq	%rsi
	cmpq	%rsi, %rax
	jne	.LBB5_9
.LBB5_10:                               # %.critedge
                                        #   in Loop: Header=BB5_4 Depth=2
	cmpl	(%rbx), %edx
	je	.LBB5_12
# %bb.11:                               #   in Loop: Header=BB5_4 Depth=2
	cltq
	movl	%edx, (%r13,%rax,4)
	movslq	%edx, %rcx
	leaq	(%rcx,%rcx,2), %rcx
	movq	8(%rsp), %rdx                   # 8-byte Reload
	movl	(%rdx,%rcx,8), %ecx
	movq	8(%rbx), %rdx
	movl	%ecx, (%rdx,%rax,4)
	incl	16(%rbx)
.LBB5_12:                               # %.loopexit
                                        #   in Loop: Header=BB5_4 Depth=2
	leal	1(%r14), %eax
	cmpl	%r12d, %r14d
	movl	%eax, %r14d
	jne	.LBB5_4
.LBB5_6:                                # %._crit_edge
                                        #   in Loop: Header=BB5_2 Depth=1
	incq	%r15
	cmpq	32(%rsp), %r15                  # 8-byte Folded Reload
	jne	.LBB5_2
.LBB5_7:                                # %._crit_edge52
	movq	16(%rsp), %rax                  # 8-byte Reload
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z16generateChildrenP4Nodeii, .Lfunc_end5-_Z16generateChildrenP4Nodeii
	.cfi_endproc
                                        # -- End function
	.globl	_ZN4Node18initializeChildrenEi  # -- Begin function _ZN4Node18initializeChildrenEi
	.p2align	1, 0x90
	.type	_ZN4Node18initializeChildrenEi,@function
_ZN4Node18initializeChildrenEi:         # @_ZN4Node18initializeChildrenEi
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rdi, %rbx
	movl	%esi, %eax
	shlq	$2, %rax
	testl	%esi, %esi
	movq	$-1, %rdi
	cmovnsq	%rax, %rdi
	callq	_Znam
	movq	%rax, 8(%rbx)
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_ZN4Node18initializeChildrenEi, .Lfunc_end6-_ZN4Node18initializeChildrenEi
	.cfi_endproc
                                        # -- End function
	.globl	_ZN4Node14getNumChildrenEv      # -- Begin function _ZN4Node14getNumChildrenEv
	.p2align	1, 0x90
	.type	_ZN4Node14getNumChildrenEv,@function
_ZN4Node14getNumChildrenEv:             # @_ZN4Node14getNumChildrenEv
	.cfi_startproc
# %bb.0:
	movl	16(%rdi), %eax
	retq
.Lfunc_end7:
	.size	_ZN4Node14getNumChildrenEv, .Lfunc_end7-_ZN4Node14getNumChildrenEv
	.cfi_endproc
                                        # -- End function
	.globl	_ZN4Node11getChildrenEv         # -- Begin function _ZN4Node11getChildrenEv
	.p2align	1, 0x90
	.type	_ZN4Node11getChildrenEv,@function
_ZN4Node11getChildrenEv:                # @_ZN4Node11getChildrenEv
	.cfi_startproc
# %bb.0:
	movq	8(%rdi), %rax
	retq
.Lfunc_end8:
	.size	_ZN4Node11getChildrenEv, .Lfunc_end8-_ZN4Node11getChildrenEv
	.cfi_endproc
                                        # -- End function
	.globl	_ZN4Node8getValueEv             # -- Begin function _ZN4Node8getValueEv
	.p2align	1, 0x90
	.type	_ZN4Node8getValueEv,@function
_ZN4Node8getValueEv:                    # @_ZN4Node8getValueEv
	.cfi_startproc
# %bb.0:
	movl	(%rdi), %eax
	retq
.Lfunc_end9:
	.size	_ZN4Node8getValueEv, .Lfunc_end9-_ZN4Node8getValueEv
	.cfi_endproc
                                        # -- End function
	.globl	_ZN4Node8addChildEPS_           # -- Begin function _ZN4Node8addChildEPS_
	.p2align	1, 0x90
	.type	_ZN4Node8addChildEPS_,@function
_ZN4Node8addChildEPS_:                  # @_ZN4Node8addChildEPS_
	.cfi_startproc
# %bb.0:
	movl	(%rsi), %eax
	movq	8(%rdi), %rcx
	movslq	16(%rdi), %rdx
	movl	%eax, (%rcx,%rdx,4)
	incl	16(%rdi)
	retq
.Lfunc_end10:
	.size	_ZN4Node8addChildEPS_, .Lfunc_end10-_ZN4Node8addChildEPS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z13generateGraphi              # -- Begin function _Z13generateGraphi
	.type	_Z13generateGraphi,@function
_Z13generateGraphi:                     # @_Z13generateGraphi
	.cfi_startproc
# %bb.0:                                # %.loopexit
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%edi, %ebp
	xorl	%edi, %edi
	callq	time
	movl	%eax, %edi
	callq	srand
	movslq	%ebp, %r14
	movl	$24, %ecx
	movq	%r14, %rax
	mulq	%rcx
	movq	$-1, %rdi
	cmovnoq	%rax, %rdi
	callq	_Znam
	movq	%rax, %rbx
	testl	%r14d, %r14d
	jle	.LBB11_3
# %bb.1:                                # %.lr.ph.preheader
	movl	%ebp, %r14d
	xorl	%r15d, %r15d
	movq	%rbx, %r12
.LBB11_2:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	$24, %edi
	callq	_Znwm
	movl	%r15d, (%rax)
	movl	$0, 20(%rax)
	movl	(%rax), %ecx
	movl	%ecx, (%r12)
	movq	4(%rax), %rcx
	movq	%rcx, 4(%r12)
	movl	12(%rax), %ecx
	movl	%ecx, 12(%r12)
	movq	16(%rax), %rax
	movq	%rax, 16(%r12)
	incq	%r15
	addq	$24, %r12
	cmpq	%r15, %r14
	jne	.LBB11_2
.LBB11_3:                               # %._crit_edge
	movq	%rbx, %rax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end11:
	.size	_Z13generateGraphi, .Lfunc_end11-_Z13generateGraphi
	.cfi_endproc
                                        # -- End function
	.globl	_Z12exploreChildP4NodePSt6vectorIS1_IS0_SaIS0_EESaIS3_EEiS0_ # -- Begin function _Z12exploreChildP4NodePSt6vectorIS1_IS0_SaIS0_EESaIS3_EEiS0_
	.type	_Z12exploreChildP4NodePSt6vectorIS1_IS0_SaIS0_EESaIS3_EEiS0_,@function
_Z12exploreChildP4NodePSt6vectorIS1_IS0_SaIS0_EESaIS3_EEiS0_: # @_Z12exploreChildP4NodePSt6vectorIS1_IS0_SaIS0_EESaIS3_EEiS0_
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdi, %rbx
	movl	16(%rdi), %r13d
	testl	%r13d, %r13d
	jle	.LBB12_22
# %bb.1:
	movq	%rcx, %r14
	movl	%edx, %ebp
	movq	%rsi, %r15
	movq	%r13, %rdi
	callq	_Znam
	movq	%rax, %r12
	xorps	%xmm0, %xmm0
	movaps	%xmm0, 32(%rsp)
	movq	$0, 48(%rsp)
	movq	(%r15), %rax
	movq	%r15, 16(%rsp)                  # 8-byte Spill
	movq	8(%r15), %rdx
	subq	%rax, %rdx
	sarq	$3, %rdx
	movabsq	$-6148914691236517205, %rcx     # imm = 0xAAAAAAAAAAAAAAAB
	imulq	%rcx, %rdx
	movl	%ebp, 12(%rsp)                  # 4-byte Spill
	movslq	%ebp, %rbp
	cmpq	%rbp, %rdx
	ja	.LBB12_4
# %bb.2:
.Ltmp0:
	leaq	32(%rsp), %rsi
	movq	16(%rsp), %r15                  # 8-byte Reload
	movq	%r15, %rdi
	callq	_ZNSt6vectorIS_IP4NodeSaIS1_EESaIS3_EE9push_backERKS3_
.Ltmp1:
# %bb.3:                                # %._crit_edge54
	movq	(%r15), %rax
	movq	8(%r15), %rdx
	subq	%rax, %rdx
	sarq	$3, %rdx
	movabsq	$-6148914691236517205, %rcx     # imm = 0xAAAAAAAAAAAAAAAB
	imulq	%rcx, %rdx
.LBB12_4:
	cmpq	%rbp, %rdx
	jbe	.LBB12_5
# %bb.8:                                # %.lr.ph
	leaq	(,%rbp,2), %rcx
	addq	%rbp, %rcx
	leaq	(%rax,%rcx,8), %rbp
	xorl	%r15d, %r15d
.LBB12_9:                               # =>This Inner Loop Header: Depth=1
	movq	8(%rbx), %rax
	movslq	(%rax,%r15,4), %rax
	leaq	(%rax,%rax,2), %rax
	leaq	(%r14,%rax,8), %rax
	movq	%rax, 24(%rsp)
	cmpl	$0, 20(%rax)
	je	.LBB12_11
# %bb.10:                               #   in Loop: Header=BB12_9 Depth=1
	xorl	%eax, %eax
	jmp	.LBB12_15
.LBB12_11:                              #   in Loop: Header=BB12_9 Depth=1
	movq	8(%rbp), %rsi
	cmpq	16(%rbp), %rsi
	je	.LBB12_13
# %bb.12:                               #   in Loop: Header=BB12_9 Depth=1
	movq	%rax, (%rsi)
	addq	$8, 8(%rbp)
	jmp	.LBB12_14
.LBB12_13:                              #   in Loop: Header=BB12_9 Depth=1
.Ltmp6:
	movq	%rbp, %rdi
	leaq	24(%rsp), %rdx
	callq	_ZNSt6vectorIP4NodeSaIS1_EE17_M_realloc_insertIJRKS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_
.Ltmp7:
.LBB12_14:                              # %_ZNSt6vectorIP4NodeSaIS1_EE9push_backERKS1_.exit
                                        #   in Loop: Header=BB12_9 Depth=1
	movq	24(%rsp), %rax
	movl	$1, 20(%rax)
	movb	$1, %al
.LBB12_15:                              #   in Loop: Header=BB12_9 Depth=1
	movb	%al, (%r12,%r15)
	incq	%r15
	cmpq	%r15, %r13
	jne	.LBB12_9
# %bb.16:                               # %.lr.ph46
	movl	12(%rsp), %ebp                  # 4-byte Reload
	incl	%ebp
	cmpl	$2, %r13d
	movl	$1, %r15d
	cmovgel	%r13d, %r15d
	xorl	%r13d, %r13d
.LBB12_17:                              # =>This Inner Loop Header: Depth=1
	cmpb	$0, (%r12,%r13)
	je	.LBB12_19
# %bb.18:                               #   in Loop: Header=BB12_17 Depth=1
	movq	8(%rbx), %rax
	movslq	(%rax,%r13,4), %rax
	leaq	(%rax,%rax,2), %rax
	leaq	(%r14,%rax,8), %rdi
.Ltmp9:
	movq	16(%rsp), %rsi                  # 8-byte Reload
	movl	%ebp, %edx
	movq	%r14, %rcx
	callq	_Z12exploreChildP4NodePSt6vectorIS1_IS0_SaIS0_EESaIS3_EEiS0_
.Ltmp10:
.LBB12_19:                              #   in Loop: Header=BB12_17 Depth=1
	incq	%r13
	cmpq	%r13, %r15
	jne	.LBB12_17
# %bb.20:                               # %._crit_edge
	movq	32(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB12_22
# %bb.21:
	callq	_ZdlPv
.LBB12_22:
	movl	$2, 20(%rbx)
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB12_5:
	.cfi_def_cfa_offset 112
.Ltmp3:
	movl	$.L.str.14, %edi
	movq	%rbp, %rsi
	xorl	%eax, %eax
	callq	_ZSt24__throw_out_of_range_fmtPKcz
.Ltmp4:
# %bb.6:                                # %.noexc
.LBB12_24:
.Ltmp2:
	jmp	.LBB12_25
.LBB12_7:
.Ltmp5:
	jmp	.LBB12_25
.LBB12_28:
.Ltmp8:
	jmp	.LBB12_25
.LBB12_23:
.Ltmp11:
.LBB12_25:
	movq	%rax, %rbx
	movq	32(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB12_27
# %bb.26:
	callq	_ZdlPv
.LBB12_27:                              # %_ZNSt6vectorIP4NodeSaIS1_EED2Ev.exit43
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end12:
	.size	_Z12exploreChildP4NodePSt6vectorIS1_IS0_SaIS0_EESaIS3_EEiS0_, .Lfunc_end12-_Z12exploreChildP4NodePSt6vectorIS1_IS0_SaIS0_EESaIS3_EEiS0_
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table12:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Lfunc_begin0-.Lfunc_begin0    # >> Call Site 1 <<
	.uleb128 .Ltmp0-.Lfunc_begin0           #   Call between .Lfunc_begin0 and .Ltmp0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 2 <<
	.uleb128 .Ltmp1-.Ltmp0                  #   Call between .Ltmp0 and .Ltmp1
	.uleb128 .Ltmp2-.Lfunc_begin0           #     jumps to .Ltmp2
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp6-.Lfunc_begin0           # >> Call Site 3 <<
	.uleb128 .Ltmp7-.Ltmp6                  #   Call between .Ltmp6 and .Ltmp7
	.uleb128 .Ltmp8-.Lfunc_begin0           #     jumps to .Ltmp8
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp9-.Lfunc_begin0           # >> Call Site 4 <<
	.uleb128 .Ltmp10-.Ltmp9                 #   Call between .Ltmp9 and .Ltmp10
	.uleb128 .Ltmp11-.Lfunc_begin0          #     jumps to .Ltmp11
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp3-.Lfunc_begin0           # >> Call Site 5 <<
	.uleb128 .Ltmp4-.Ltmp3                  #   Call between .Ltmp3 and .Ltmp4
	.uleb128 .Ltmp5-.Lfunc_begin0           #     jumps to .Ltmp5
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp4-.Lfunc_begin0           # >> Call Site 6 <<
	.uleb128 .Lfunc_end12-.Ltmp4            #   Call between .Ltmp4 and .Lfunc_end12
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZNSt6vectorIS_IP4NodeSaIS1_EESaIS3_EE9push_backERKS3_,"axG",@progbits,_ZNSt6vectorIS_IP4NodeSaIS1_EESaIS3_EE9push_backERKS3_,comdat
	.weak	_ZNSt6vectorIS_IP4NodeSaIS1_EESaIS3_EE9push_backERKS3_ # -- Begin function _ZNSt6vectorIS_IP4NodeSaIS1_EESaIS3_EE9push_backERKS3_
	.p2align	1, 0x90
	.type	_ZNSt6vectorIS_IP4NodeSaIS1_EESaIS3_EE9push_backERKS3_,@function
_ZNSt6vectorIS_IP4NodeSaIS1_EESaIS3_EE9push_backERKS3_: # @_ZNSt6vectorIS_IP4NodeSaIS1_EESaIS3_EE9push_backERKS3_
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rsi, %rdx
	movq	%rdi, %rbx
	movq	8(%rdi), %rsi
	cmpq	16(%rdi), %rsi
	je	.LBB13_2
# %bb.1:
	movq	%rsi, %rdi
	movq	%rdx, %rsi
	callq	_ZNSt6vectorIP4NodeSaIS1_EEC2ERKS3_
	addq	$24, 8(%rbx)
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.LBB13_2:
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	_ZNSt6vectorIS_IP4NodeSaIS1_EESaIS3_EE17_M_realloc_insertIJRKS3_EEEvN9__gnu_cxx17__normal_iteratorIPS3_S5_EEDpOT_ # TAILCALL
.Lfunc_end13:
	.size	_ZNSt6vectorIS_IP4NodeSaIS1_EESaIS3_EE9push_backERKS3_, .Lfunc_end13-_ZNSt6vectorIS_IP4NodeSaIS1_EESaIS3_EE9push_backERKS3_
	.cfi_endproc
                                        # -- End function
	.text
	.globl	_ZN4Node11getExploredEv         # -- Begin function _ZN4Node11getExploredEv
	.p2align	1, 0x90
	.type	_ZN4Node11getExploredEv,@function
_ZN4Node11getExploredEv:                # @_ZN4Node11getExploredEv
	.cfi_startproc
# %bb.0:
	movl	20(%rdi), %eax
	retq
.Lfunc_end14:
	.size	_ZN4Node11getExploredEv, .Lfunc_end14-_ZN4Node11getExploredEv
	.cfi_endproc
                                        # -- End function
	.globl	_ZN4Node11setExploredEi         # -- Begin function _ZN4Node11setExploredEi
	.p2align	1, 0x90
	.type	_ZN4Node11setExploredEi,@function
_ZN4Node11setExploredEi:                # @_ZN4Node11setExploredEi
	.cfi_startproc
# %bb.0:
	movl	%esi, 20(%rdi)
	retq
.Lfunc_end15:
	.size	_ZN4Node11setExploredEi, .Lfunc_end15-_ZN4Node11setExploredEi
	.cfi_endproc
                                        # -- End function
	.globl	_Z3bfsP4Nodei                   # -- Begin function _Z3bfsP4Nodei
	.type	_Z3bfsP4Nodei,@function
_Z3bfsP4Nodei:                          # @_Z3bfsP4Nodei
.Lfunc_begin1:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception1
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%esi, %ebp
	movq	%rdi, %rbx
	movl	%esi, %r15d
	shlq	$2, %r15
	testl	%esi, %esi
	movq	$-1, %rdi
	cmovnsq	%r15, %rdi
	callq	_Znam
	movq	%rax, %r14
	testl	%ebp, %ebp
	jle	.LBB16_2
# %bb.1:                                # %.lr.ph.preheader
	movq	%r14, %rdi
	movl	$255, %esi
	movq	%r15, %rdx
	callq	memset@PLT
.LBB16_2:                               # %._crit_edge
	movq	%rbx, 8(%rsp)
	xorps	%xmm0, %xmm0
	leaq	32(%rsp), %r15
	movaps	%xmm0, 64(%r15)
	movaps	%xmm0, 48(%r15)
	movaps	%xmm0, 32(%r15)
	movaps	%xmm0, 16(%r15)
	movaps	%xmm0, (%r15)
	movq	%r15, %rdi
	xorl	%esi, %esi
	callq	_ZNSt11_Deque_baseIP4NodeSaIS1_EE17_M_initialize_mapEm
	movq	48(%r15), %rax
	movq	64(%r15), %rcx
	addq	$-8, %rcx
	cmpq	%rcx, %rax
	je	.LBB16_4
# %bb.3:
	movq	%rbx, (%rax)
	movq	80(%rsp), %rdx
	addq	$8, %rdx
	movq	%rdx, 80(%rsp)
	jmp	.LBB16_6
.LBB16_4:
.Ltmp12:
	leaq	32(%rsp), %rdi
	leaq	8(%rsp), %rsi
	callq	_ZNSt5dequeIP4NodeSaIS1_EE16_M_push_back_auxIJRKS1_EEEvDpOT_
.Ltmp13:
# %bb.5:                                # %._ZNSt5queueIP4NodeSt5dequeIS1_SaIS1_EEE4pushERKS1_.exit_crit_edge
	movq	80(%rsp), %rdx
.LBB16_6:                               # %_ZNSt5queueIP4NodeSt5dequeIS1_SaIS1_EEE4pushERKS1_.exit
	movl	$0, (%r14)
	movq	48(%rsp), %rax
	cmpq	%rax, %rdx
	je	.LBB16_24
# %bb.7:                                # %.lr.ph41
	leaq	24(%rsp), %r12
.LBB16_8:                               # =>This Loop Header: Depth=1
                                        #     Child Loop BB16_12 Depth 2
                                        #       Child Loop BB16_17 Depth 3
	cmpq	%rax, %rdx
	je	.LBB16_24
# %bb.9:                                # %.lr.ph39
                                        #   in Loop: Header=BB16_8 Depth=1
	movq	(%rax), %rcx
	movslq	(%rcx), %rcx
	movl	(%r14,%rcx,4), %r15d
	movq	(%rax), %rcx
	movslq	(%rcx), %rsi
	cmpl	(%r14,%rsi,4), %r15d
	jne	.LBB16_23
# %bb.10:                               #   in Loop: Header=BB16_8 Depth=1
	leal	1(%r15), %ebp
	movq	%r15, 16(%rsp)                  # 8-byte Spill
.LBB16_12:                              # %.lr.ph
                                        #   Parent Loop BB16_8 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB16_17 Depth 3
	movq	%rcx, 8(%rsp)
	movq	64(%rsp), %rdx
	addq	$-8, %rdx
	cmpq	%rdx, %rax
	je	.LBB16_14
# %bb.13:                               #   in Loop: Header=BB16_12 Depth=2
	addq	$8, %rax
	jmp	.LBB16_15
.LBB16_14:                              #   in Loop: Header=BB16_12 Depth=2
	movq	56(%rsp), %rdi
	callq	_ZdlPv
	movq	72(%rsp), %rax
	leaq	8(%rax), %rcx
	movq	%rcx, 72(%rsp)
	movq	8(%rax), %rax
	movq	%rax, 56(%rsp)
	leaq	512(%rax), %rcx
	movq	%rcx, 64(%rsp)
	movq	8(%rsp), %rcx
.LBB16_15:                              # %_ZNSt5dequeIP4NodeSaIS1_EE9pop_frontEv.exit
                                        #   in Loop: Header=BB16_12 Depth=2
	movq	%rax, 48(%rsp)
	movl	$1, 20(%rcx)
	cmpl	$0, 16(%rcx)
	jle	.LBB16_22
# %bb.16:                               # %.lr.ph37.preheader
                                        #   in Loop: Header=BB16_12 Depth=2
	movq	8(%rcx), %r13
	xorl	%r15d, %r15d
.LBB16_17:                              # %.lr.ph37
                                        #   Parent Loop BB16_8 Depth=1
                                        #     Parent Loop BB16_12 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movslq	(%r13,%r15,4), %rax
	leaq	(%rax,%rax,2), %rax
	cmpl	$0, 20(%rbx,%rax,8)
	jne	.LBB16_20
# %bb.18:                               #   in Loop: Header=BB16_17 Depth=3
	leaq	(%rbx,%rax,8), %rax
	addq	$20, %rax
	movl	$1, (%rax)
	movslq	(%r13,%r15,4), %rax
	movl	%ebp, (%r14,%rax,4)
	leaq	(%rax,%rax,2), %rax
	leaq	(%rbx,%rax,8), %rax
	movq	%rax, 24(%rsp)
.Ltmp15:
	leaq	32(%rsp), %rdi
	movq	%r12, %rsi
	callq	_ZNSt5dequeIP4NodeSaIS1_EE12emplace_backIJS1_EEERS1_DpOT_
.Ltmp16:
# %bb.19:                               # %_ZNSt5queueIP4NodeSt5dequeIS1_SaIS1_EEE4pushEOS1_.exit
                                        #   in Loop: Header=BB16_17 Depth=3
	movq	8(%rsp), %rcx
.LBB16_20:                              #   in Loop: Header=BB16_17 Depth=3
	incq	%r15
	movslq	16(%rcx), %rax
	cmpq	%rax, %r15
	jl	.LBB16_17
# %bb.21:                               # %.loopexit.loopexit
                                        #   in Loop: Header=BB16_12 Depth=2
	movq	48(%rsp), %rax
	movq	16(%rsp), %r15                  # 8-byte Reload
.LBB16_22:                              # %.loopexit
                                        #   in Loop: Header=BB16_12 Depth=2
	movq	80(%rsp), %rdx
	cmpq	%rax, %rdx
	je	.LBB16_24
# %bb.11:                               #   in Loop: Header=BB16_12 Depth=2
	movq	(%rax), %rcx
	movslq	(%rcx), %rsi
	cmpl	(%r14,%rsi,4), %r15d
	je	.LBB16_12
.LBB16_23:                              # %.critedge
                                        #   in Loop: Header=BB16_8 Depth=1
	cmpq	%rax, %rdx
	jne	.LBB16_8
.LBB16_24:                              # %._crit_edge42
	leaq	32(%rsp), %rdi
	callq	_ZNSt11_Deque_baseIP4NodeSaIS1_EED2Ev
	movq	%r14, %rax
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB16_25:
	.cfi_def_cfa_offset 176
.Ltmp14:
	jmp	.LBB16_26
.LBB16_27:
.Ltmp17:
.LBB16_26:
	movq	%rax, %rbx
	leaq	32(%rsp), %rdi
	callq	_ZNSt11_Deque_baseIP4NodeSaIS1_EED2Ev
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end16:
	.size	_Z3bfsP4Nodei, .Lfunc_end16-_Z3bfsP4Nodei
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table16:
.Lexception1:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end1-.Lcst_begin1
.Lcst_begin1:
	.uleb128 .Lfunc_begin1-.Lfunc_begin1    # >> Call Site 1 <<
	.uleb128 .Ltmp12-.Lfunc_begin1          #   Call between .Lfunc_begin1 and .Ltmp12
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp12-.Lfunc_begin1          # >> Call Site 2 <<
	.uleb128 .Ltmp13-.Ltmp12                #   Call between .Ltmp12 and .Ltmp13
	.uleb128 .Ltmp14-.Lfunc_begin1          #     jumps to .Ltmp14
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp15-.Lfunc_begin1          # >> Call Site 3 <<
	.uleb128 .Ltmp16-.Ltmp15                #   Call between .Ltmp15 and .Ltmp16
	.uleb128 .Ltmp17-.Lfunc_begin1          #     jumps to .Ltmp17
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp16-.Lfunc_begin1          # >> Call Site 4 <<
	.uleb128 .Lfunc_end16-.Ltmp16           #   Call between .Ltmp16 and .Lfunc_end16
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end1:
	.p2align	2, 0x0
                                        # -- End function
	.text
	.globl	_Z12transformBfsSt6vectorIS_IP4NodeSaIS1_EESaIS3_EEi # -- Begin function _Z12transformBfsSt6vectorIS_IP4NodeSaIS1_EESaIS3_EEi
	.type	_Z12transformBfsSt6vectorIS_IP4NodeSaIS1_EESaIS3_EEi,@function
_Z12transformBfsSt6vectorIS_IP4NodeSaIS1_EESaIS3_EEi: # @_Z12transformBfsSt6vectorIS_IP4NodeSaIS1_EESaIS3_EEi
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%esi, %ebp
	movq	%rdi, %r14
	movl	%esi, %r15d
	shlq	$2, %r15
	testl	%esi, %esi
	movq	$-1, %rdi
	cmovnsq	%r15, %rdi
	callq	_Znam
	movq	%rax, %rbx
	testl	%ebp, %ebp
	jle	.LBB17_2
# %bb.1:                                # %.lr.ph.preheader
	movq	%rbx, %rdi
	movl	$255, %esi
	movq	%r15, %rdx
	callq	memset@PLT
.LBB17_2:                               # %.preheader19
	movq	(%r14), %rax
	movq	8(%r14), %rdx
	subq	%rax, %rdx
	je	.LBB17_8
# %bb.3:                                # %.preheader.preheader
	sarq	$3, %rdx
	movabsq	$-6148914691236517205, %rcx     # imm = 0xAAAAAAAAAAAAAAAB
	imulq	%rdx, %rcx
	cmpq	$1, %rcx
	adcq	$0, %rcx
	xorl	%edx, %edx
.LBB17_4:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB17_6 Depth 2
	leaq	(%rdx,%rdx,2), %rdi
	movq	(%rax,%rdi,8), %rsi
	movq	8(%rax,%rdi,8), %rdi
	subq	%rsi, %rdi
	je	.LBB17_7
# %bb.5:                                # %.lr.ph22.preheader
                                        #   in Loop: Header=BB17_4 Depth=1
	sarq	$3, %rdi
	cmpq	$1, %rdi
	adcq	$0, %rdi
	xorl	%r8d, %r8d
.LBB17_6:                               # %.lr.ph22
                                        #   Parent Loop BB17_4 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	(%rsi,%r8,8), %r9
	movslq	(%r9), %r9
	movl	%edx, (%rbx,%r9,4)
	incq	%r8
	cmpq	%r8, %rdi
	jne	.LBB17_6
.LBB17_7:                               # %._crit_edge
                                        #   in Loop: Header=BB17_4 Depth=1
	incq	%rdx
	cmpq	%rcx, %rdx
	jne	.LBB17_4
.LBB17_8:                               # %._crit_edge24
	movq	%rbx, %rax
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end17:
	.size	_Z12transformBfsSt6vectorIS_IP4NodeSaIS1_EESaIS3_EEi, .Lfunc_end17-_Z12transformBfsSt6vectorIS_IP4NodeSaIS1_EESaIS3_EEi
	.cfi_endproc
                                        # -- End function
	.globl	_Z20transformNumChildrenP4Nodei # -- Begin function _Z20transformNumChildrenP4Nodei
	.type	_Z20transformNumChildrenP4Nodei,@function
_Z20transformNumChildrenP4Nodei:        # @_Z20transformNumChildrenP4Nodei
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	movl	%esi, %ebp
	movq	%rdi, %rbx
	movl	%esi, %r14d
	leaq	(,%r14,4), %rax
	testl	%esi, %esi
	movq	$-1, %rdi
	cmovnsq	%rax, %rdi
	callq	_Znam
	testl	%ebp, %ebp
	jle	.LBB18_3
# %bb.1:                                # %.lr.ph.preheader
	addq	$16, %rbx
	xorl	%ecx, %ecx
.LBB18_2:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	(%rbx), %edx
	movl	%edx, (%rax,%rcx,4)
	incq	%rcx
	addq	$24, %rbx
	cmpq	%rcx, %r14
	jne	.LBB18_2
.LBB18_3:                               # %._crit_edge
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end18:
	.size	_Z20transformNumChildrenP4Nodei, .Lfunc_end18-_Z20transformNumChildrenP4Nodei
	.cfi_endproc
                                        # -- End function
	.globl	_Z18transformParentPtrP4Nodei   # -- Begin function _Z18transformParentPtrP4Nodei
	.type	_Z18transformParentPtrP4Nodei,@function
_Z18transformParentPtrP4Nodei:          # @_Z18transformParentPtrP4Nodei
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%esi, %r15d
	movq	%rdi, %r14
	leal	1(%r15), %r12d
	leaq	(,%r12,4), %rax
	cmpl	$-1, %esi
	movq	$-1, %rdi
	cmovgeq	%rax, %rdi
	callq	_Znam
	movq	%rax, %rbx
	testl	%r15d, %r15d
	jle	.LBB19_8
# %bb.1:                                # %.lr.ph37
	movl	%r15d, %r15d
	leaq	(,%r15,4), %rdx
	xorl	%r13d, %r13d
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
.LBB19_2:                               # =>This Loop Header: Depth=1
                                        #     Child Loop BB19_4 Depth 2
	leaq	(,%r13,2), %rcx
	addq	%r13, %rcx
	movl	16(%r14,%rcx,8), %eax
	testl	%eax, %eax
	jle	.LBB19_5
# %bb.3:                                #   in Loop: Header=BB19_2 Depth=1
	movq	8(%r14,%rcx,8), %rcx
	xorl	%edx, %edx
.LBB19_4:                               #   Parent Loop BB19_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movslq	(%rcx,%rdx,4), %rsi
	incl	4(%rbx,%rsi,4)
	incq	%rdx
	cmpq	%rdx, %rax
	jne	.LBB19_4
.LBB19_5:                               # %.loopexit
                                        #   in Loop: Header=BB19_2 Depth=1
	incq	%r13
	cmpq	%r15, %r13
	jne	.LBB19_2
# %bb.6:                                # %.preheader
	movl	(%rbx), %eax
	movl	$1, %ecx
.LBB19_7:                               # %.lr.ph40
                                        # =>This Inner Loop Header: Depth=1
	addl	(%rbx,%rcx,4), %eax
	movl	%eax, (%rbx,%rcx,4)
	incq	%rcx
	cmpq	%rcx, %r12
	jne	.LBB19_7
.LBB19_8:                               # %._crit_edge
	movq	%rbx, %rax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end19:
	.size	_Z18transformParentPtrP4Nodei, .Lfunc_end19-_Z18transformParentPtrP4Nodei
	.cfi_endproc
                                        # -- End function
	.globl	_Z16transformParentsP4NodeiPi   # -- Begin function _Z16transformParentsP4NodeiPi
	.type	_Z16transformParentsP4NodeiPi,@function
_Z16transformParentsP4NodeiPi:          # @_Z16transformParentsP4NodeiPi
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, %r12
	movl	%esi, %ebp
	movq	%rdi, %rbx
	movslq	%esi, %r13
	movslq	(%rdx,%r13,4), %rax
	leaq	(,%rax,4), %rdi
	testq	%rax, %rax
	movq	$-1, %r15
	cmovsq	%r15, %rdi
	callq	_Znam
	movq	%rax, %r14
	leaq	(,%r13,4), %rdi
	testl	%r13d, %r13d
	cmovsq	%r15, %rdi
	callq	_Znam
	testl	%r13d, %r13d
	jle	.LBB20_6
# %bb.1:                                # %.lr.ph37.preheader
	movq	%rax, %r15
	movl	%ebp, %r13d
	leaq	(,%r13,4), %rdx
	movq	%rax, %rdi
	movq	%r12, %rsi
	callq	memcpy@PLT
	xorl	%eax, %eax
.LBB20_2:                               # %.lr.ph37
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB20_4 Depth 2
	leaq	(%rax,%rax,2), %rdx
	movl	16(%rbx,%rdx,8), %ecx
	testl	%ecx, %ecx
	jle	.LBB20_5
# %bb.3:                                #   in Loop: Header=BB20_2 Depth=1
	movq	8(%rbx,%rdx,8), %rdx
	xorl	%esi, %esi
.LBB20_4:                               #   Parent Loop BB20_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movslq	(%rdx,%rsi,4), %rdi
	movslq	(%r15,%rdi,4), %r8
	movl	%eax, (%r14,%r8,4)
	incl	%r8d
	movl	%r8d, (%r15,%rdi,4)
	incq	%rsi
	cmpq	%rsi, %rcx
	jne	.LBB20_4
.LBB20_5:                               # %.loopexit
                                        #   in Loop: Header=BB20_2 Depth=1
	incq	%rax
	cmpq	%r13, %rax
	jne	.LBB20_2
.LBB20_6:                               # %._crit_edge
	movq	%r14, %rax
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end20:
	.size	_Z16transformParentsP4NodeiPi, .Lfunc_end20-_Z16transformParentsP4NodeiPi
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z18callFlipFlopParentPiS_S_S_S_S_iiS_
.LCPI21_0:
	.long	0x3b000000                      # float 0.001953125
	.text
	.globl	_Z18callFlipFlopParentPiS_S_S_S_S_iiS_
	.type	_Z18callFlipFlopParentPiS_S_S_S_S_iiS_,@function
_Z18callFlipFlopParentPiS_S_S_S_S_iiS_: # @_Z18callFlipFlopParentPiS_S_S_S_S_iiS_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 104(%rsp)                  # 8-byte Spill
	movq	%r8, 96(%rsp)                   # 8-byte Spill
	movq	%rcx, 88(%rsp)                  # 8-byte Spill
	movq	%rdx, 80(%rsp)                  # 8-byte Spill
	movq	%rsi, 72(%rsp)                  # 8-byte Spill
	movq	%rdi, 40(%rsp)                  # 8-byte Spill
	movslq	176(%rsp), %rbp
	movl	184(%rsp), %r12d
	leaq	64(%rsp), %rdi
	callq	hipEventCreate
	leaq	56(%rsp), %rdi
	callq	hipEventCreate
	leaq	(,%rbp,4), %rbx
	leaq	32(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	leaq	24(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	cvtsi2ss	%ebp, %xmm0
	mulss	.LCPI21_0(%rip), %xmm0
	callq	ceilf@PLT
	movss	%xmm0, 8(%rsp)                  # 4-byte Spill
	testq	%rbp, %rbp
	movq	$-1, %r14
	cmovnsq	%rbx, %r14
	movq	%r14, %rdi
	callq	_Znam
	movq	%rax, %r15
	movq	%r14, %rdi
	callq	_Znam
	movq	%rax, %r13
	movq	%r14, %rdi
	callq	_Znam
	movq	%rax, %r14
	cvttss2si	8(%rsp), %eax           # 4-byte Folded Reload
	movl	%eax, 8(%rsp)                   # 4-byte Spill
	movl	$0, (%r14)
	cmpq	$2, %rbp
	movq	%r13, 48(%rsp)                  # 8-byte Spill
	jl	.LBB21_2
# %bb.1:                                # %.lr.ph.preheader
	movq	%r14, %rdi
	addq	$4, %rdi
	leal	-1(%rbp), %r13d
	shlq	$2, %r13
	movl	$255, %esi
	movq	%r13, %rdx
	callq	memset@PLT
	movq	%r15, %rdi
	addq	$4, %rdi
	xorl	%esi, %esi
	movq	%r13, %rdx
	callq	memset@PLT
	movq	48(%rsp), %rdi                  # 8-byte Reload
	addq	$4, %rdi
	xorl	%esi, %esi
	movq	%r13, %rdx
	movq	48(%rsp), %r13                  # 8-byte Reload
	callq	memset@PLT
.LBB21_2:                               # %._crit_edge
	movl	$1, (%r15)
	movq	32(%rsp), %rdi
	movq	%r14, %rsi
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rdi
	movq	%r15, %rsi
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rdi
	movq	%r13, %rsi
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	64(%rsp), %rdi
	xorl	%r13d, %r13d
	xorl	%esi, %esi
	callq	hipEventRecord
	imull	%r12d, %r12d
	leal	-1(%r12), %eax
	cltd
	idivl	%r12d
	movq	%rbp, %rcx
	movl	%eax, %ebp
	imull	%ecx, %ebp
	movl	8(%rsp), %eax                   # 4-byte Reload
	movabsq	$4294967808, %rdx               # imm = 0x100000200
	leaq	(%rax,%rdx), %r14
	addq	$-512, %r14                     # imm = 0xFE00
	movq	%rcx, 8(%rsp)                   # 8-byte Spill
	movl	%ecx, %r12d
.LBB21_4:                               # =>This Loop Header: Depth=1
                                        #     Child Loop BB21_13 Depth 2
	movq	%r14, %rdi
	movl	$1, %esi
	movabsq	$4294967808, %rdx               # imm = 0x100000200
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	cmpl	%ebp, %r13d
	jge	.LBB21_7
# %bb.5:                                #   in Loop: Header=BB21_4 Depth=1
	testl	%eax, %eax
	jne	.LBB21_9
# %bb.6:                                #   in Loop: Header=BB21_4 Depth=1
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	32(%rsp), %r8
	movq	88(%rsp), %rax                  # 8-byte Reload
	movq	%rax, (%rsp)
	movq	72(%rsp), %rdx                  # 8-byte Reload
	movq	80(%rsp), %rcx                  # 8-byte Reload
	movq	40(%rsp), %r9                   # 8-byte Reload
	callq	_Z35__device_stub__childListExploreWavePiS_S_S_S_S_S_
	jmp	.LBB21_9
.LBB21_7:                               #   in Loop: Header=BB21_4 Depth=1
	testl	%eax, %eax
	jne	.LBB21_9
# %bb.8:                                #   in Loop: Header=BB21_4 Depth=1
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	32(%rsp), %r8
	movq	96(%rsp), %rdx                  # 8-byte Reload
	movq	104(%rsp), %rcx                 # 8-byte Reload
	movq	40(%rsp), %r9                   # 8-byte Reload
	callq	_Z38__device_stub__parentListBackwardsWavePiS_S_S_S_S_
.LBB21_9:                               #   in Loop: Header=BB21_4 Depth=1
	callq	hipDeviceSynchronize
	movq	%r14, %rdi
	movl	$1, %esi
	movabsq	$4294967808, %rdx               # imm = 0x100000200
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB21_11
# %bb.10:                               #   in Loop: Header=BB21_4 Depth=1
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	40(%rsp), %rdx                  # 8-byte Reload
	callq	_Z34__device_stub__setPreviousExploredPiS_S_
.LBB21_11:                              #   in Loop: Header=BB21_4 Depth=1
	callq	hipDeviceSynchronize
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	%rbx, %rdx
	movl	$3, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rdi
	movq	48(%rsp), %rsi                  # 8-byte Reload
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rsi
	movq	%r15, %rdi
	movq	%rbx, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	cmpl	$0, 8(%rsp)                     # 4-byte Folded Reload
	jle	.LBB21_18
# %bb.12:                               # %.lr.ph118.preheader
                                        #   in Loop: Header=BB21_4 Depth=1
	movb	$1, %al
	xorl	%ecx, %ecx
.LBB21_13:                              # %.lr.ph118
                                        #   Parent Loop BB21_4 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%r15,%rcx,4), %edx
	cmpl	$1, %edx
	je	.LBB21_14
# %bb.15:                               # %.lr.ph118
                                        #   in Loop: Header=BB21_13 Depth=2
	cmpl	$2, %edx
	jne	.LBB21_17
# %bb.16:                               #   in Loop: Header=BB21_13 Depth=2
	incl	%r13d
	jmp	.LBB21_17
.LBB21_14:                              #   in Loop: Header=BB21_13 Depth=2
	xorl	%eax, %eax
.LBB21_17:                              #   in Loop: Header=BB21_13 Depth=2
	incq	%rcx
	cmpq	%rcx, %r12
	jne	.LBB21_13
# %bb.3:                                # %.loopexit
                                        #   in Loop: Header=BB21_4 Depth=1
	testb	$1, %al
	je	.LBB21_4
.LBB21_18:                              # %.loopexit.thread
	callq	hipDeviceSynchronize
	movq	56(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	56(%rsp), %rdi
	callq	hipEventSynchronize
	leaq	116(%rsp), %r14
	movl	$0, (%r14)
	movq	64(%rsp), %rsi
	movq	56(%rsp), %rdx
	movq	%r14, %rdi
	callq	hipEventElapsedTime
	cvtss2sd	(%r14), %xmm0
	movb	$1, %bpl
	movl	$.L.str, %edi
	movb	$1, %al
	callq	printf
	movq	%rbx, %rdi
	callq	malloc
	movq	%rax, %r14
	movq	32(%rsp), %rsi
	movq	%rax, %rdi
	movq	%rbx, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	cmpl	$0, 8(%rsp)                     # 4-byte Folded Reload
	jle	.LBB21_24
# %bb.19:                               # %.lr.ph124.preheader
	xorl	%ebx, %ebx
	movq	192(%rsp), %r15
.LBB21_20:                              # %.lr.ph124
                                        # =>This Inner Loop Header: Depth=1
	movl	(%r15,%rbx,4), %edx
	movl	(%r14,%rbx,4), %ecx
	cmpl	%ecx, %edx
	je	.LBB21_22
# %bb.21:                               #   in Loop: Header=BB21_20 Depth=1
	xorl	%ebp, %ebp
	movl	$.L.str.1, %edi
	movl	%ebx, %esi
	xorl	%eax, %eax
	callq	printf
.LBB21_22:                              #   in Loop: Header=BB21_20 Depth=1
	incq	%rbx
	cmpq	%rbx, %r12
	jne	.LBB21_20
# %bb.23:                               # %._crit_edge125
	movl	$.Lstr.6, %edi
	testb	$1, %bpl
	je	.LBB21_25
.LBB21_24:                              # %._crit_edge125.thread
	movl	$.Lstr.7, %edi
.LBB21_25:
	callq	puts@PLT
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end21:
	.size	_Z18callFlipFlopParentPiS_S_S_S_S_iiS_, .Lfunc_end21-_Z18callFlipFlopParentPiS_S_S_S_S_iiS_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z23callFlipFlopWaveExplorePiS_S_iS_iS_
.LCPI22_0:
	.long	0x3b000000                      # float 0.001953125
	.text
	.globl	_Z23callFlipFlopWaveExplorePiS_S_iS_iS_
	.type	_Z23callFlipFlopWaveExplorePiS_S_iS_iS_,@function
_Z23callFlipFlopWaveExplorePiS_S_iS_iS_: # @_Z23callFlipFlopWaveExplorePiS_S_iS_iS_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
                                        # kill: def $r9d killed $r9d def $r9
	movq	%r9, 96(%rsp)                   # 8-byte Spill
	movq	%r8, 80(%rsp)                   # 8-byte Spill
	movl	%ecx, %ebx
	movq	%rbx, 40(%rsp)                  # 8-byte Spill
	movq	%rdx, 72(%rsp)                  # 8-byte Spill
	movq	%rsi, 64(%rsp)                  # 8-byte Spill
	movq	%rdi, 32(%rsp)                  # 8-byte Spill
	leaq	88(%rsp), %rdi
	callq	hipEventCreate
	leaq	48(%rsp), %rdi
	callq	hipEventCreate
	movslq	%ebx, %r12
	leaq	(,%r12,4), %r14
	leaq	24(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	cvtsi2ss	%r12d, %xmm0
	mulss	.LCPI22_0(%rip), %xmm0
	callq	ceilf@PLT
	cvttss2si	%xmm0, %eax
	movl	%eax, 60(%rsp)                  # 4-byte Spill
	testl	%r12d, %r12d
	movq	$-1, %r13
	cmovnsq	%r14, %r13
	movq	%r13, %rdi
	callq	_Znam
	movq	%rax, %r15
	movq	%r13, %rdi
	callq	_Znam
	movq	%rax, %rbx
	movq	%r13, %rdi
	callq	_Znam
	movq	%rax, %rbp
	movl	$0, (%rax)
	cmpl	$2, %r12d
	movq	40(%rsp), %r12                  # 8-byte Reload
	jl	.LBB22_2
# %bb.1:                                # %.lr.ph.preheader
	movq	%rbp, %rdi
	addq	$4, %rdi
	leal	-1(%r12), %r13d
	shlq	$2, %r13
	movl	$255, %esi
	movq	%r13, %rdx
	callq	memset@PLT
	movq	%r15, %rdi
	addq	$4, %rdi
	xorl	%esi, %esi
	movq	%r13, %rdx
	callq	memset@PLT
	movq	%rbx, %rdi
	addq	$4, %rdi
	xorl	%esi, %esi
	movq	%r13, %rdx
	callq	memset@PLT
.LBB22_2:                               # %._crit_edge
	movl	$1, (%r15)
	movq	24(%rsp), %rdi
	movq	%rbp, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	movq	%rbx, 104(%rsp)                 # 8-byte Spill
	movq	%rbx, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	88(%rsp), %rdi
	xorl	%r13d, %r13d
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	96(%rsp), %rcx                  # 8-byte Reload
	imull	%ecx, %ecx
	leal	-1(%rcx), %eax
	cltd
	idivl	%ecx
	movl	%eax, %ebp
	imull	%r12d, %ebp
	movl	60(%rsp), %eax                  # 4-byte Reload
	movabsq	$4294967808, %rcx               # imm = 0x100000200
	leaq	(%rax,%rcx), %rbx
	addq	$-512, %rbx                     # imm = 0xFE00
	movl	%r12d, %r12d
.LBB22_4:                               # =>This Loop Header: Depth=1
                                        #     Child Loop BB22_13 Depth 2
	movq	%rbx, %rdi
	movl	$1, %esi
	movabsq	$4294967808, %rdx               # imm = 0x100000200
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	cmpl	%ebp, %r13d
	jge	.LBB22_7
# %bb.5:                                #   in Loop: Header=BB22_4 Depth=1
	testl	%eax, %eax
	jne	.LBB22_9
# %bb.6:                                #   in Loop: Header=BB22_4 Depth=1
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	movq	24(%rsp), %r8
	movq	80(%rsp), %rax                  # 8-byte Reload
	movq	%rax, (%rsp)
	movq	64(%rsp), %rdx                  # 8-byte Reload
	movq	72(%rsp), %rcx                  # 8-byte Reload
	movq	32(%rsp), %r9                   # 8-byte Reload
	callq	_Z35__device_stub__childListExploreWavePiS_S_S_S_S_S_
	jmp	.LBB22_9
.LBB22_7:                               #   in Loop: Header=BB22_4 Depth=1
	testl	%eax, %eax
	jne	.LBB22_9
# %bb.8:                                #   in Loop: Header=BB22_4 Depth=1
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	movq	24(%rsp), %r8
	movq	80(%rsp), %rax                  # 8-byte Reload
	movq	%rax, (%rsp)
	movq	64(%rsp), %rdx                  # 8-byte Reload
	movq	72(%rsp), %rcx                  # 8-byte Reload
	movq	32(%rsp), %r9                   # 8-byte Reload
	callq	_Z28__device_stub__backwardsWavePiS_S_S_S_S_S_
.LBB22_9:                               #   in Loop: Header=BB22_4 Depth=1
	callq	hipDeviceSynchronize
	movq	%rbx, %rdi
	movl	$1, %esi
	movabsq	$4294967808, %rdx               # imm = 0x100000200
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB22_11
# %bb.10:                               #   in Loop: Header=BB22_4 Depth=1
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	movq	32(%rsp), %rdx                  # 8-byte Reload
	callq	_Z34__device_stub__setPreviousExploredPiS_S_
.LBB22_11:                              #   in Loop: Header=BB22_4 Depth=1
	callq	hipDeviceSynchronize
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	movq	%r14, %rdx
	movl	$3, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	movq	104(%rsp), %rsi                 # 8-byte Reload
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rsi
	movq	%r15, %rdi
	movq	%r14, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	cmpl	$0, 40(%rsp)                    # 4-byte Folded Reload
	jle	.LBB22_18
# %bb.12:                               # %.lr.ph119.preheader
                                        #   in Loop: Header=BB22_4 Depth=1
	movb	$1, %al
	xorl	%ecx, %ecx
.LBB22_13:                              # %.lr.ph119
                                        #   Parent Loop BB22_4 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%r15,%rcx,4), %edx
	cmpl	$1, %edx
	je	.LBB22_14
# %bb.15:                               # %.lr.ph119
                                        #   in Loop: Header=BB22_13 Depth=2
	cmpl	$2, %edx
	jne	.LBB22_17
# %bb.16:                               #   in Loop: Header=BB22_13 Depth=2
	incl	%r13d
	jmp	.LBB22_17
.LBB22_14:                              #   in Loop: Header=BB22_13 Depth=2
	xorl	%eax, %eax
.LBB22_17:                              #   in Loop: Header=BB22_13 Depth=2
	incq	%rcx
	cmpq	%rcx, %r12
	jne	.LBB22_13
# %bb.3:                                # %.loopexit
                                        #   in Loop: Header=BB22_4 Depth=1
	testb	$1, %al
	je	.LBB22_4
.LBB22_18:                              # %.loopexit.thread
	callq	hipDeviceSynchronize
	movq	48(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	48(%rsp), %rdi
	callq	hipEventSynchronize
	leaq	116(%rsp), %rbx
	movl	$0, (%rbx)
	movq	88(%rsp), %rsi
	movq	48(%rsp), %rdx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	cvtss2sd	(%rbx), %xmm0
	movb	$1, %bpl
	movl	$.L.str.4, %edi
	movb	$1, %al
	callq	printf
	movq	%r14, %rdi
	callq	malloc
	movq	%rax, %rbx
	movq	24(%rsp), %rsi
	movq	%rax, %rdi
	movq	%r14, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	cmpl	$0, 40(%rsp)                    # 4-byte Folded Reload
	jle	.LBB22_24
# %bb.19:                               # %.lr.ph125.preheader
	xorl	%r14d, %r14d
	movq	176(%rsp), %r15
.LBB22_20:                              # %.lr.ph125
                                        # =>This Inner Loop Header: Depth=1
	movl	(%r15,%r14,4), %edx
	movl	(%rbx,%r14,4), %ecx
	cmpl	%ecx, %edx
	je	.LBB22_22
# %bb.21:                               #   in Loop: Header=BB22_20 Depth=1
	xorl	%ebp, %ebp
	movl	$.L.str.1, %edi
	movl	%r14d, %esi
	xorl	%eax, %eax
	callq	printf
.LBB22_22:                              #   in Loop: Header=BB22_20 Depth=1
	incq	%r14
	cmpq	%r14, %r12
	jne	.LBB22_20
# %bb.23:                               # %._crit_edge126
	movl	$.Lstr.6, %edi
	testb	$1, %bpl
	je	.LBB22_25
.LBB22_24:                              # %._crit_edge126.thread
	movl	$.Lstr.7, %edi
.LBB22_25:
	callq	puts@PLT
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end22:
	.size	_Z23callFlipFlopWaveExplorePiS_S_iS_iS_, .Lfunc_end22-_Z23callFlipFlopWaveExplorePiS_S_iS_iS_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z24callChildListExploreWavePiS_S_iS_S_
.LCPI23_0:
	.long	0x3b000000                      # float 0.001953125
	.text
	.globl	_Z24callChildListExploreWavePiS_S_iS_S_
	.type	_Z24callChildListExploreWavePiS_S_iS_S_,@function
_Z24callChildListExploreWavePiS_S_iS_S_: # @_Z24callChildListExploreWavePiS_S_iS_S_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$136, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 80(%rsp)                   # 8-byte Spill
	movq	%r8, 104(%rsp)                  # 8-byte Spill
	movl	%ecx, %ebx
	movq	%rdx, 96(%rsp)                  # 8-byte Spill
	movq	%rsi, 88(%rsp)                  # 8-byte Spill
	movq	%rdi, 64(%rsp)                  # 8-byte Spill
	leaq	72(%rsp), %rdi
	callq	hipEventCreate
	leaq	56(%rsp), %rdi
	callq	hipEventCreate
	movq	%rbx, 32(%rsp)                  # 8-byte Spill
	movslq	%ebx, %r14
	leaq	(,%r14,4), %r15
	leaq	48(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	leaq	24(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	cvtsi2ss	%r14d, %xmm0
	mulss	.LCPI23_0(%rip), %xmm0
	callq	ceilf@PLT
	cvttss2si	%xmm0, %ebp
	testl	%r14d, %r14d
	movq	$-1, %rbx
	movq	%r15, 40(%rsp)                  # 8-byte Spill
	cmovnsq	%r15, %rbx
	movq	%rbx, %rdi
	callq	_Znam
	movq	%rax, %r13
	movq	%rbx, %rdi
	callq	_Znam
	movq	%rax, %r12
	movq	%rbx, %rdi
	callq	_Znam
	movq	%rax, %rbx
	movl	$0, (%rax)
	cmpl	$2, %r14d
	movq	%r12, %r14
	jl	.LBB23_2
# %bb.1:                                # %.lr.ph.preheader
	movq	%rbx, %rdi
	addq	$4, %rdi
	movq	32(%rsp), %rax                  # 8-byte Reload
	leal	-1(%rax), %r12d
	shlq	$2, %r12
	movl	$255, %esi
	movq	%r12, %rdx
	callq	memset@PLT
	movq	%r13, %rdi
	addq	$4, %rdi
	xorl	%esi, %esi
	movq	%r12, %rdx
	callq	memset@PLT
	movq	%r14, %rdi
	addq	$4, %rdi
	xorl	%esi, %esi
	movq	%r12, %rdx
	callq	memset@PLT
.LBB23_2:                               # %._crit_edge
	movabsq	$4294967808, %r15               # imm = 0x100000200
	movl	$1, (%r13)
	movq	48(%rsp), %rdi
	movq	%rbx, %rsi
	movq	40(%rsp), %rbx                  # 8-byte Reload
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rdi
	movq	%r13, %rsi
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rdi
	movq	%r14, 120(%rsp)                 # 8-byte Spill
	movq	%r14, %rsi
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	72(%rsp), %rdi
	xorl	%r14d, %r14d
	xorl	%esi, %esi
	callq	hipEventRecord
	movl	%ebp, %eax
	leaq	(%rax,%r15), %rdx
	addq	$-512, %rdx                     # imm = 0xFE00
	movq	32(%rsp), %r12                  # 8-byte Reload
	movl	%r12d, %ebp
	movq	%rdx, 112(%rsp)                 # 8-byte Spill
.LBB23_4:                               # =>This Loop Header: Depth=1
                                        #     Child Loop BB23_10 Depth 2
	movq	%rdx, %r12
	movq	%rdx, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB23_6
# %bb.5:                                #   in Loop: Header=BB23_4 Depth=1
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	48(%rsp), %r8
	movq	104(%rsp), %rax                 # 8-byte Reload
	movq	%rax, (%rsp)
	movq	88(%rsp), %rdx                  # 8-byte Reload
	movq	96(%rsp), %rcx                  # 8-byte Reload
	movq	64(%rsp), %r9                   # 8-byte Reload
	callq	_Z35__device_stub__childListExploreWavePiS_S_S_S_S_S_
.LBB23_6:                               #   in Loop: Header=BB23_4 Depth=1
	callq	hipDeviceSynchronize
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r15, %rbx
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB23_8
# %bb.7:                                #   in Loop: Header=BB23_4 Depth=1
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	64(%rsp), %rdx                  # 8-byte Reload
	callq	_Z34__device_stub__setPreviousExploredPiS_S_
.LBB23_8:                               #   in Loop: Header=BB23_4 Depth=1
	callq	hipDeviceSynchronize
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	40(%rsp), %r15                  # 8-byte Reload
	movq	%r15, %rdx
	movl	$3, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rdi
	movq	120(%rsp), %rsi                 # 8-byte Reload
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rsi
	movq	%r13, %rdi
	movq	%r15, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	32(%rsp), %rsi                  # 8-byte Reload
	testl	%esi, %esi
	movq	112(%rsp), %rdx                 # 8-byte Reload
	jle	.LBB23_11
# %bb.9:                                # %.lr.ph89.preheader
                                        #   in Loop: Header=BB23_4 Depth=1
	movq	%rbx, %r15
	movb	$1, %al
	xorl	%ecx, %ecx
.LBB23_10:                              # %.lr.ph89
                                        #   Parent Loop BB23_4 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	cmpl	$1, (%r13,%rcx,4)
	movzbl	%al, %eax
	cmovel	%r14d, %eax
	incq	%rcx
	cmpq	%rcx, %rbp
	jne	.LBB23_10
# %bb.3:                                # %.loopexit
                                        #   in Loop: Header=BB23_4 Depth=1
	testb	$1, %al
	je	.LBB23_4
.LBB23_11:                              # %.loopexit.thread
	movq	%rsi, %r14
	callq	hipDeviceSynchronize
	movq	56(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	56(%rsp), %rdi
	callq	hipEventSynchronize
	leaq	132(%rsp), %rbx
	movl	$0, (%rbx)
	movq	72(%rsp), %rsi
	movq	56(%rsp), %rdx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	cvtss2sd	(%rbx), %xmm0
	movb	$1, %r12b
	movl	$.L.str.5, %edi
	movb	$1, %al
	callq	printf
	movq	40(%rsp), %r15                  # 8-byte Reload
	movq	%r15, %rdi
	callq	malloc
	movq	%rax, %rbx
	movq	48(%rsp), %rsi
	movq	%rax, %rdi
	movq	%r15, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%r14d, %r14d
	jle	.LBB23_17
# %bb.12:                               # %.lr.ph93.preheader
	xorl	%r14d, %r14d
	movq	80(%rsp), %r15                  # 8-byte Reload
.LBB23_13:                              # %.lr.ph93
                                        # =>This Inner Loop Header: Depth=1
	movl	(%r15,%r14,4), %edx
	movl	(%rbx,%r14,4), %ecx
	cmpl	%ecx, %edx
	je	.LBB23_15
# %bb.14:                               #   in Loop: Header=BB23_13 Depth=1
	xorl	%r12d, %r12d
	movl	$.L.str.1, %edi
	movl	%r14d, %esi
	xorl	%eax, %eax
	callq	printf
.LBB23_15:                              #   in Loop: Header=BB23_13 Depth=1
	incq	%r14
	cmpq	%r14, %rbp
	jne	.LBB23_13
# %bb.16:                               # %._crit_edge94
	movl	$.Lstr.6, %edi
	testb	$1, %r12b
	je	.LBB23_18
.LBB23_17:                              # %._crit_edge94.thread
	movl	$.Lstr.7, %edi
.LBB23_18:
	callq	puts@PLT
	addq	$136, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end23:
	.size	_Z24callChildListExploreWavePiS_S_iS_S_, .Lfunc_end23-_Z24callChildListExploreWavePiS_S_iS_S_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z24callDeviceCachedVisitBFSP4NodePiS1_iS1_S1_
.LCPI24_0:
	.long	0x3b000000                      # float 0.001953125
	.text
	.globl	_Z24callDeviceCachedVisitBFSP4NodePiS1_iS1_S1_
	.type	_Z24callDeviceCachedVisitBFSP4NodePiS1_iS1_S1_,@function
_Z24callDeviceCachedVisitBFSP4NodePiS1_iS1_S1_: # @_Z24callDeviceCachedVisitBFSP4NodePiS1_iS1_S1_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$136, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 80(%rsp)                   # 8-byte Spill
	movq	%r8, 104(%rsp)                  # 8-byte Spill
	movl	%ecx, %ebx
	movq	%rdx, 96(%rsp)                  # 8-byte Spill
	movq	%rsi, 64(%rsp)                  # 8-byte Spill
	movq	%rdi, 88(%rsp)                  # 8-byte Spill
	leaq	72(%rsp), %rdi
	callq	hipEventCreate
	leaq	56(%rsp), %rdi
	callq	hipEventCreate
	movq	%rbx, 32(%rsp)                  # 8-byte Spill
	movslq	%ebx, %r14
	leaq	(,%r14,4), %r15
	leaq	48(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	leaq	24(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	cvtsi2ss	%r14d, %xmm0
	mulss	.LCPI24_0(%rip), %xmm0
	callq	ceilf@PLT
	cvttss2si	%xmm0, %r12d
	testl	%r14d, %r14d
	movq	$-1, %rbx
	movq	%r15, 40(%rsp)                  # 8-byte Spill
	cmovnsq	%r15, %rbx
	movq	%rbx, %rdi
	callq	_Znam
	movq	%rax, %r13
	movq	%rbx, %rdi
	callq	_Znam
	movq	%rax, %rbp
	movq	%rbx, %rdi
	callq	_Znam
	movq	%rax, %rbx
	movl	$0, (%rax)
	cmpl	$2, %r14d
	movq	%rbp, %r14
	jl	.LBB24_2
# %bb.1:                                # %.lr.ph.preheader
	movq	%rbx, %rdi
	addq	$4, %rdi
	movq	32(%rsp), %rax                  # 8-byte Reload
	leal	-1(%rax), %ebp
	shlq	$2, %rbp
	movl	$255, %esi
	movq	%rbp, %rdx
	callq	memset@PLT
	movq	%r13, %rdi
	addq	$4, %rdi
	xorl	%esi, %esi
	movq	%rbp, %rdx
	callq	memset@PLT
	movq	%r14, %rdi
	addq	$4, %rdi
	xorl	%esi, %esi
	movq	%rbp, %rdx
	callq	memset@PLT
.LBB24_2:                               # %._crit_edge
	movabsq	$4294967808, %r15               # imm = 0x100000200
	movl	$1, (%r13)
	movq	48(%rsp), %rdi
	movq	%rbx, %rsi
	movq	40(%rsp), %rbx                  # 8-byte Reload
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rdi
	movq	%r13, %rsi
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rdi
	movq	%r14, 120(%rsp)                 # 8-byte Spill
	movq	%r14, %rsi
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	72(%rsp), %rdi
	xorl	%r14d, %r14d
	xorl	%esi, %esi
	callq	hipEventRecord
	movl	%r12d, %eax
	leaq	(%rax,%r15), %rdx
	addq	$-512, %rdx                     # imm = 0xFE00
	movq	32(%rsp), %rbp                  # 8-byte Reload
	movl	%ebp, %r12d
	movq	%rdx, 112(%rsp)                 # 8-byte Spill
.LBB24_4:                               # =>This Loop Header: Depth=1
                                        #     Child Loop BB24_10 Depth 2
	movq	%rdx, %rbp
	movq	%rdx, %rdi
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB24_6
# %bb.5:                                #   in Loop: Header=BB24_4 Depth=1
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	48(%rsp), %r8
	movq	104(%rsp), %rax                 # 8-byte Reload
	movq	%rax, (%rsp)
	movq	88(%rsp), %rdx                  # 8-byte Reload
	movq	96(%rsp), %rcx                  # 8-byte Reload
	movq	64(%rsp), %r9                   # 8-byte Reload
	callq	_Z26__device_stub__exploreWavePiS_P4NodeS_S_S_S_
.LBB24_6:                               #   in Loop: Header=BB24_4 Depth=1
	callq	hipDeviceSynchronize
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%r15, %rbx
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB24_8
# %bb.7:                                #   in Loop: Header=BB24_4 Depth=1
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	64(%rsp), %rdx                  # 8-byte Reload
	callq	_Z34__device_stub__setPreviousExploredPiS_S_
.LBB24_8:                               #   in Loop: Header=BB24_4 Depth=1
	callq	hipDeviceSynchronize
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	40(%rsp), %r15                  # 8-byte Reload
	movq	%r15, %rdx
	movl	$3, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rdi
	movq	120(%rsp), %rsi                 # 8-byte Reload
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rsi
	movq	%r13, %rdi
	movq	%r15, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	32(%rsp), %rsi                  # 8-byte Reload
	testl	%esi, %esi
	movq	112(%rsp), %rdx                 # 8-byte Reload
	jle	.LBB24_11
# %bb.9:                                # %.lr.ph89.preheader
                                        #   in Loop: Header=BB24_4 Depth=1
	movq	%rbx, %r15
	movb	$1, %al
	xorl	%ecx, %ecx
.LBB24_10:                              # %.lr.ph89
                                        #   Parent Loop BB24_4 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	cmpl	$1, (%r13,%rcx,4)
	movzbl	%al, %eax
	cmovel	%r14d, %eax
	incq	%rcx
	cmpq	%rcx, %r12
	jne	.LBB24_10
# %bb.3:                                # %.loopexit
                                        #   in Loop: Header=BB24_4 Depth=1
	testb	$1, %al
	je	.LBB24_4
.LBB24_11:                              # %.loopexit.thread
	movq	%rsi, %r14
	callq	hipDeviceSynchronize
	movq	56(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	56(%rsp), %rdi
	callq	hipEventSynchronize
	leaq	132(%rsp), %rbx
	movl	$0, (%rbx)
	movq	72(%rsp), %rsi
	movq	56(%rsp), %rdx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	cvtss2sd	(%rbx), %xmm0
	movb	$1, %bpl
	movl	$.L.str.6, %edi
	movb	$1, %al
	callq	printf
	movq	40(%rsp), %r15                  # 8-byte Reload
	movq	%r15, %rdi
	callq	malloc
	movq	%rax, %rbx
	movq	48(%rsp), %rsi
	movq	%rax, %rdi
	movq	%r15, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%r14d, %r14d
	jle	.LBB24_17
# %bb.12:                               # %.lr.ph93.preheader
	xorl	%r14d, %r14d
	movq	80(%rsp), %r15                  # 8-byte Reload
.LBB24_13:                              # %.lr.ph93
                                        # =>This Inner Loop Header: Depth=1
	movl	(%r15,%r14,4), %edx
	movl	(%rbx,%r14,4), %ecx
	cmpl	%ecx, %edx
	je	.LBB24_15
# %bb.14:                               #   in Loop: Header=BB24_13 Depth=1
	xorl	%ebp, %ebp
	movl	$.L.str.1, %edi
	movl	%r14d, %esi
	xorl	%eax, %eax
	callq	printf
.LBB24_15:                              #   in Loop: Header=BB24_13 Depth=1
	incq	%r14
	cmpq	%r14, %r12
	jne	.LBB24_13
# %bb.16:                               # %._crit_edge94
	movl	$.Lstr.6, %edi
	testb	$1, %bpl
	je	.LBB24_18
.LBB24_17:                              # %._crit_edge94.thread
	movl	$.Lstr.7, %edi
.LBB24_18:
	callq	puts@PLT
	addq	$136, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end24:
	.size	_Z24callDeviceCachedVisitBFSP4NodePiS1_iS1_S1_, .Lfunc_end24-_Z24callDeviceCachedVisitBFSP4NodePiS1_iS1_S1_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI25_0:
	.quad	0x408f400000000000              # double 1000
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	cmpl	$3, %edi
	jne	.LBB25_2
# %bb.1:
	movq	%rsi, %r14
	movq	8(%rsi), %rdi
	callq	atoi
	movl	%eax, %ebx
	leaq	28(%rsp), %rax
	movl	%ebx, (%rax)
	movq	16(%r14), %rdi
	callq	atoi
	movl	%eax, %ebp
	leaq	12(%rsp), %rax
	movl	%ebp, (%rax)
	movl	%ebx, %edi
	callq	_Z13generateGraphi
	movq	%rax, %r12
	movq	%rax, %rdi
	movl	%ebx, %esi
	movl	%ebp, %edx
	callq	_Z16generateChildrenP4Nodeii
	movq	%rax, 72(%rsp)                  # 8-byte Spill
	movq	%r12, %rdi
	movl	%ebx, %esi
	callq	_Z20transformNumChildrenP4Nodei
	movq	%rax, 80(%rsp)                  # 8-byte Spill
	movq	%r12, %rdi
	movl	%ebx, %esi
	callq	_Z18transformParentPtrP4Nodei
	movq	%rax, %r15
	movslq	%ebx, %rbx
	movslq	(%rax,%rbx,4), %r14
	movq	%r12, %rdi
	movl	%ebx, %esi
	movq	%rax, %rdx
	callq	_Z16transformParentsP4NodeiPi
	movq	%rax, 88(%rsp)                  # 8-byte Spill
	leaq	(,%rbx,8), %rax
	leaq	(%rax,%rax,2), %r13
	leaq	16(%rsp), %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	leaq	56(%rsp), %rdi
	movl	$4, %esi
	callq	hipMalloc
	leaq	48(%rsp), %rdi
	movl	$4, %esi
	callq	hipMalloc
	imull	%ebx, %ebp
	movslq	%ebp, %rsi
	shlq	$2, %rsi
	leaq	64(%rsp), %rdi
	callq	hipMalloc
	leaq	(,%rbx,4), %rsi
	leaq	96(%rsp), %rdi
	callq	hipMalloc
	leaq	4(,%rbx,4), %rsi
	leaq	32(%rsp), %rdi
	callq	hipMalloc
	shlq	$2, %r14
	leaq	40(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	leaq	16(%rsp), %rax
	movq	(%rax), %rdi
	movq	%r12, %rsi
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	56(%rsp), %rax
	movq	(%rax), %rdi
	movl	$4, %edx
	leaq	28(%rsp), %rbx
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	48(%rsp), %rax
	movq	(%rax), %rdi
	movl	$4, %edx
	leaq	12(%rsp), %rbp
	movq	%rbp, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	64(%rsp), %rax
	movq	(%rax), %rdi
	movslq	(%rbx), %rax
	movq	%rbx, %r13
	movslq	(%rbp), %rdx
	imulq	%rax, %rdx
	shlq	$2, %rdx
	movq	72(%rsp), %rsi                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	96(%rsp), %rbp
	movq	(%rbp), %rdi
	movslq	(%rbx), %rdx
	shlq	$2, %rdx
	movq	80(%rsp), %rsi                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	32(%rsp), %rax
	movq	(%rax), %rdi
	movslq	(%rbx), %rax
	leaq	4(,%rax,4), %rdx
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	40(%rsp), %rax
	movq	(%rax), %rdi
	movq	88(%rsp), %rsi                  # 8-byte Reload
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	callq	clock
	movq	%rax, %rbx
	movl	(%r13), %esi
	movq	%r12, %rdi
	callq	_Z3bfsP4Nodei
	movq	%rax, %r14
	callq	clock
	subq	%rbx, %rax
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI25_0(%rip), %xmm0
	movl	$.L.str.8, %edi
	movb	$1, %al
	callq	printf
	leaq	16(%rsp), %rax
	movq	(%rax), %rdi
	leaq	56(%rsp), %r15
	movq	(%r15), %rsi
	leaq	64(%rsp), %r12
	movq	(%r12), %rdx
	movl	(%r13), %ecx
	leaq	48(%rsp), %rbx
	movq	(%rbx), %r8
	movq	%r14, %r9
	callq	_Z24callDeviceCachedVisitBFSP4NodePiS1_iS1_S1_
	movq	(%r15), %rdi
	movq	(%r12), %rsi
	movq	(%rbp), %rdx
	movl	(%r13), %ecx
	movq	(%rbx), %r8
	movq	%r14, %r9
	callq	_Z24callChildListExploreWavePiS_S_iS_S_
	movq	(%r15), %rdi
	movq	(%r12), %rsi
	movq	(%rbp), %rdx
	movq	(%rbx), %rcx
	leaq	40(%rsp), %rax
	movq	(%rax), %r8
	leaq	32(%rsp), %rax
	movq	(%rax), %r9
	movl	(%r13), %eax
	leaq	12(%rsp), %r10
	movl	(%r10), %r10d
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	pushq	%r14
	.cfi_adjust_cfa_offset 8
	pushq	%r10
	.cfi_adjust_cfa_offset 8
	pushq	%rax
	.cfi_adjust_cfa_offset 8
	callq	_Z18callFlipFlopParentPiS_S_S_S_S_iiS_
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
	leaq	16(%rsp), %rax
	movq	(%rax), %rdi
	callq	hipFree
	movq	(%r15), %rdi
	callq	hipFree
	movq	(%r12), %rdi
	callq	hipFree
	movq	(%rbp), %rdi
	callq	hipFree
	movq	(%rbx), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB25_2:
	.cfi_def_cfa_offset 160
	movl	$.Lstr.8, %edi
	callq	puts@PLT
	callq	abort
.Lfunc_end25:
	.size	main, .Lfunc_end25-main
	.cfi_endproc
                                        # -- End function
	.globl	_ZN4NodeC2Ei                    # -- Begin function _ZN4NodeC2Ei
	.p2align	1, 0x90
	.type	_ZN4NodeC2Ei,@function
_ZN4NodeC2Ei:                           # @_ZN4NodeC2Ei
	.cfi_startproc
# %bb.0:
	movl	%esi, (%rdi)
	movl	$0, 20(%rdi)
	retq
.Lfunc_end26:
	.size	_ZN4NodeC2Ei, .Lfunc_end26-_ZN4NodeC2Ei
	.cfi_endproc
                                        # -- End function
	.globl	_ZN4NodeC2Ev                    # -- Begin function _ZN4NodeC2Ev
	.p2align	1, 0x90
	.type	_ZN4NodeC2Ev,@function
_ZN4NodeC2Ev:                           # @_ZN4NodeC2Ev
	.cfi_startproc
# %bb.0:
	retq
.Lfunc_end27:
	.size	_ZN4NodeC2Ev, .Lfunc_end27-_ZN4NodeC2Ev
	.cfi_endproc
                                        # -- End function
	.globl	_ZN4Node9printNodeEv            # -- Begin function _ZN4Node9printNodeEv
	.p2align	1, 0x90
	.type	_ZN4Node9printNodeEv,@function
_ZN4Node9printNodeEv:                   # @_ZN4Node9printNodeEv
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movq	%rdi, %rbx
	movl	(%rdi), %esi
	movl	$.L.str.9, %edi
	xorl	%eax, %eax
	callq	printf
	cmpl	$0, 16(%rbx)
	jle	.LBB28_5
# %bb.1:                                # %.lr.ph
	xorl	%r14d, %r14d
.LBB28_2:                               # =>This Inner Loop Header: Depth=1
	movq	8(%rbx), %rax
	movl	(%rax,%r14,4), %esi
	movl	$.L.str.10, %edi
	xorl	%eax, %eax
	callq	printf
	movl	16(%rbx), %eax
	leal	-1(%rax), %ecx
	cmpq	%rcx, %r14
	je	.LBB28_4
# %bb.3:                                #   in Loop: Header=BB28_2 Depth=1
	movl	$.L.str.11, %edi
	xorl	%eax, %eax
	callq	printf
	movl	16(%rbx), %eax
.LBB28_4:                               #   in Loop: Header=BB28_2 Depth=1
	incq	%r14
	cltq
	cmpq	%rax, %r14
	jl	.LBB28_2
.LBB28_5:                               # %._crit_edge
	movl	$.Lstr.9, %edi
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	puts@PLT                        # TAILCALL
.Lfunc_end28:
	.size	_ZN4Node9printNodeEv, .Lfunc_end28-_ZN4Node9printNodeEv
	.cfi_endproc
                                        # -- End function
	.section	.text.__clang_call_terminate,"axG",@progbits,__clang_call_terminate,comdat
	.hidden	__clang_call_terminate          # -- Begin function __clang_call_terminate
	.weak	__clang_call_terminate
	.type	__clang_call_terminate,@function
__clang_call_terminate:                 # @__clang_call_terminate
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__cxa_begin_catch
	callq	_ZSt9terminatev
.Lfunc_end29:
	.size	__clang_call_terminate, .Lfunc_end29-__clang_call_terminate
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt11_Deque_baseIP4NodeSaIS1_EED2Ev,"axG",@progbits,_ZNSt11_Deque_baseIP4NodeSaIS1_EED2Ev,comdat
	.weak	_ZNSt11_Deque_baseIP4NodeSaIS1_EED2Ev # -- Begin function _ZNSt11_Deque_baseIP4NodeSaIS1_EED2Ev
	.p2align	1, 0x90
	.type	_ZNSt11_Deque_baseIP4NodeSaIS1_EED2Ev,@function
_ZNSt11_Deque_baseIP4NodeSaIS1_EED2Ev:  # @_ZNSt11_Deque_baseIP4NodeSaIS1_EED2Ev
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %rbx
	movq	(%rdi), %rdi
	testq	%rdi, %rdi
	je	.LBB30_6
# %bb.1:
	movq	40(%rbx), %r14
	movq	72(%rbx), %r15
	leaq	8(%r15), %rax
	cmpq	%rax, %r14
	jae	.LBB30_5
# %bb.2:                                # %.lr.ph.i.preheader
	addq	$-8, %r14
.LBB30_3:                               # %.lr.ph.i
                                        # =>This Inner Loop Header: Depth=1
	movq	8(%r14), %rdi
	addq	$8, %r14
	callq	_ZdlPv
	cmpq	%r15, %r14
	jb	.LBB30_3
# %bb.4:                                # %_ZNSt11_Deque_baseIP4NodeSaIS1_EE16_M_destroy_nodesEPPS1_S5_.exit.loopexit
	movq	(%rbx), %rdi
.LBB30_5:                               # %_ZNSt11_Deque_baseIP4NodeSaIS1_EE16_M_destroy_nodesEPPS1_S5_.exit
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_ZdlPv                          # TAILCALL
.LBB30_6:
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end30:
	.size	_ZNSt11_Deque_baseIP4NodeSaIS1_EED2Ev, .Lfunc_end30-_ZNSt11_Deque_baseIP4NodeSaIS1_EED2Ev
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt6vectorIS_IP4NodeSaIS1_EESaIS3_EE17_M_realloc_insertIJRKS3_EEEvN9__gnu_cxx17__normal_iteratorIPS3_S5_EEDpOT_,"axG",@progbits,_ZNSt6vectorIS_IP4NodeSaIS1_EESaIS3_EE17_M_realloc_insertIJRKS3_EEEvN9__gnu_cxx17__normal_iteratorIPS3_S5_EEDpOT_,comdat
	.weak	_ZNSt6vectorIS_IP4NodeSaIS1_EESaIS3_EE17_M_realloc_insertIJRKS3_EEEvN9__gnu_cxx17__normal_iteratorIPS3_S5_EEDpOT_ # -- Begin function _ZNSt6vectorIS_IP4NodeSaIS1_EESaIS3_EE17_M_realloc_insertIJRKS3_EEEvN9__gnu_cxx17__normal_iteratorIPS3_S5_EEDpOT_
	.p2align	1, 0x90
	.type	_ZNSt6vectorIS_IP4NodeSaIS1_EESaIS3_EE17_M_realloc_insertIJRKS3_EEEvN9__gnu_cxx17__normal_iteratorIPS3_S5_EEDpOT_,@function
_ZNSt6vectorIS_IP4NodeSaIS1_EESaIS3_EE17_M_realloc_insertIJRKS3_EEEvN9__gnu_cxx17__normal_iteratorIPS3_S5_EEDpOT_: # @_ZNSt6vectorIS_IP4NodeSaIS1_EESaIS3_EE17_M_realloc_insertIJRKS3_EEEvN9__gnu_cxx17__normal_iteratorIPS3_S5_EEDpOT_
.Lfunc_begin2:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception2
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, 16(%rsp)                  # 8-byte Spill
	movq	%rsi, %r13
	movq	%rdi, %rbx
	movl	$1, %esi
	movl	$.L.str.13, %edx
	callq	_ZNKSt6vectorIS_IP4NodeSaIS1_EESaIS3_EE12_M_check_lenEmPKc
	movq	%rax, %rsi
	movq	(%rbx), %r12
	movq	8(%rbx), %rbp
	movq	%r13, %rax
	subq	%r12, %rax
	sarq	$3, %rax
	movabsq	$-6148914691236517205, %r14     # imm = 0xAAAAAAAAAAAAAAAB
	imulq	%rax, %r14
	testq	%rsi, %rsi
	movq	%rsi, 8(%rsp)                   # 8-byte Spill
	je	.LBB31_1
# %bb.2:
	movq	%rbx, %rdi
	xorl	%edx, %edx
	callq	_ZNSt15__new_allocatorISt6vectorIP4NodeSaIS2_EEE8allocateEmPKv
	movq	%rax, %r15
	jmp	.LBB31_3
.LBB31_1:
	xorl	%r15d, %r15d
.LBB31_3:                               # %_ZNSt12_Vector_baseISt6vectorIP4NodeSaIS2_EESaIS4_EE11_M_allocateEm.exit
	leaq	(%r14,%r14,2), %rax
	leaq	(%r15,%rax,8), %r14
.Ltmp18:
	movq	%r14, %rdi
	movq	16(%rsp), %rsi                  # 8-byte Reload
	callq	_ZNSt6vectorIP4NodeSaIS1_EEC2ERKS3_
.Ltmp19:
# %bb.4:                                # %_ZNSt16allocator_traitsISaISt6vectorIP4NodeSaIS2_EEEE9constructIS4_JRKS4_EEEvRS5_PT_DpOT0_.exit
	movq	%r15, %r14
	cmpq	%r13, %r12
	je	.LBB31_7
# %bb.5:                                # %.lr.ph.i.i.i.preheader
	xorps	%xmm0, %xmm0
	movq	%r15, %r14
	movq	%r12, %rax
.LBB31_6:                               # %.lr.ph.i.i.i
                                        # =>This Inner Loop Header: Depth=1
	movq	(%rax), %rcx
	movq	%rcx, (%r14)
	movq	8(%rax), %rcx
	movq	%rcx, 8(%r14)
	movq	16(%rax), %rcx
	movq	%rcx, 16(%r14)
	movups	%xmm0, (%rax)
	movq	$0, 16(%rax)
	addq	$24, %r14
	addq	$24, %rax
	cmpq	%r13, %rax
	jne	.LBB31_6
.LBB31_7:                               # %_ZNSt6vectorIS_IP4NodeSaIS1_EESaIS3_EE11_S_relocateEPS3_S6_S6_RS4_.exit
	addq	$24, %r14
	cmpq	%r13, %rbp
	je	.LBB31_10
# %bb.8:                                # %.lr.ph.i.i.i27.preheader
	xorps	%xmm0, %xmm0
.LBB31_9:                               # %.lr.ph.i.i.i27
                                        # =>This Inner Loop Header: Depth=1
	movq	(%r13), %rax
	movq	%rax, (%r14)
	movq	8(%r13), %rax
	movq	%rax, 8(%r14)
	movq	16(%r13), %rax
	movq	%rax, 16(%r14)
	movups	%xmm0, (%r13)
	movq	$0, 16(%r13)
	addq	$24, %r14
	addq	$24, %r13
	cmpq	%rbp, %r13
	jne	.LBB31_9
.LBB31_10:                              # %_ZNSt6vectorIS_IP4NodeSaIS1_EESaIS3_EE11_S_relocateEPS3_S6_S6_RS4_.exit32
	testq	%r12, %r12
	je	.LBB31_12
# %bb.11:
	movq	%r12, %rdi
	callq	_ZdlPv
.LBB31_12:                              # %_ZNSt12_Vector_baseISt6vectorIP4NodeSaIS2_EESaIS4_EE13_M_deallocateEPS4_m.exit
	movq	%r15, (%rbx)
	movq	%r14, 8(%rbx)
	movq	8(%rsp), %rax                   # 8-byte Reload
	leaq	(%rax,%rax,2), %rax
	leaq	(%r15,%rax,8), %rax
	movq	%rax, 16(%rbx)
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB31_13:
	.cfi_def_cfa_offset 80
.Ltmp20:
	movq	%rax, %rdi
	callq	__cxa_begin_catch
	testq	%r15, %r15
	jne	.LBB31_15
# %bb.14:
	movq	(%r14), %r15
	testq	%r15, %r15
	je	.LBB31_16
.LBB31_15:                              # %_ZNSt12_Vector_baseISt6vectorIP4NodeSaIS2_EESaIS4_EE13_M_deallocateEPS4_m.exit35.sink.split
	movq	%r15, %rdi
	callq	_ZdlPv
.LBB31_16:                              # %_ZNSt12_Vector_baseISt6vectorIP4NodeSaIS2_EESaIS4_EE13_M_deallocateEPS4_m.exit35
.Ltmp21:
	callq	__cxa_rethrow
.Ltmp22:
# %bb.20:
.LBB31_17:
.Ltmp23:
	movq	%rax, %rbx
.Ltmp24:
	callq	__cxa_end_catch
.Ltmp25:
# %bb.18:
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.LBB31_19:
.Ltmp26:
	movq	%rax, %rdi
	callq	__clang_call_terminate
.Lfunc_end31:
	.size	_ZNSt6vectorIS_IP4NodeSaIS1_EESaIS3_EE17_M_realloc_insertIJRKS3_EEEvN9__gnu_cxx17__normal_iteratorIPS3_S5_EEDpOT_, .Lfunc_end31-_ZNSt6vectorIS_IP4NodeSaIS1_EESaIS3_EE17_M_realloc_insertIJRKS3_EEEvN9__gnu_cxx17__normal_iteratorIPS3_S5_EEDpOT_
	.cfi_endproc
	.section	.gcc_except_table._ZNSt6vectorIS_IP4NodeSaIS1_EESaIS3_EE17_M_realloc_insertIJRKS3_EEEvN9__gnu_cxx17__normal_iteratorIPS3_S5_EEDpOT_,"aG",@progbits,_ZNSt6vectorIS_IP4NodeSaIS1_EESaIS3_EE17_M_realloc_insertIJRKS3_EEEvN9__gnu_cxx17__normal_iteratorIPS3_S5_EEDpOT_,comdat
	.p2align	2, 0x0
GCC_except_table31:
.Lexception2:
	.byte	255                             # @LPStart Encoding = omit
	.byte	3                               # @TType Encoding = udata4
	.uleb128 .Lttbase0-.Lttbaseref0
.Lttbaseref0:
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end2-.Lcst_begin2
.Lcst_begin2:
	.uleb128 .Lfunc_begin2-.Lfunc_begin2    # >> Call Site 1 <<
	.uleb128 .Ltmp18-.Lfunc_begin2          #   Call between .Lfunc_begin2 and .Ltmp18
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp18-.Lfunc_begin2          # >> Call Site 2 <<
	.uleb128 .Ltmp19-.Ltmp18                #   Call between .Ltmp18 and .Ltmp19
	.uleb128 .Ltmp20-.Lfunc_begin2          #     jumps to .Ltmp20
	.byte	1                               #   On action: 1
	.uleb128 .Ltmp19-.Lfunc_begin2          # >> Call Site 3 <<
	.uleb128 .Ltmp21-.Ltmp19                #   Call between .Ltmp19 and .Ltmp21
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp21-.Lfunc_begin2          # >> Call Site 4 <<
	.uleb128 .Ltmp22-.Ltmp21                #   Call between .Ltmp21 and .Ltmp22
	.uleb128 .Ltmp23-.Lfunc_begin2          #     jumps to .Ltmp23
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp24-.Lfunc_begin2          # >> Call Site 5 <<
	.uleb128 .Ltmp25-.Ltmp24                #   Call between .Ltmp24 and .Ltmp25
	.uleb128 .Ltmp26-.Lfunc_begin2          #     jumps to .Ltmp26
	.byte	1                               #   On action: 1
	.uleb128 .Ltmp25-.Lfunc_begin2          # >> Call Site 6 <<
	.uleb128 .Lfunc_end31-.Ltmp25           #   Call between .Ltmp25 and .Lfunc_end31
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end2:
	.byte	1                               # >> Action Record 1 <<
                                        #   Catch TypeInfo 1
	.byte	0                               #   No further actions
	.p2align	2, 0x0
                                        # >> Catch TypeInfos <<
	.long	0                               # TypeInfo 1
.Lttbase0:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZNSt6vectorIP4NodeSaIS1_EEC2ERKS3_,"axG",@progbits,_ZNSt6vectorIP4NodeSaIS1_EEC2ERKS3_,comdat
	.weak	_ZNSt6vectorIP4NodeSaIS1_EEC2ERKS3_ # -- Begin function _ZNSt6vectorIP4NodeSaIS1_EEC2ERKS3_
	.p2align	1, 0x90
	.type	_ZNSt6vectorIP4NodeSaIS1_EEC2ERKS3_,@function
_ZNSt6vectorIP4NodeSaIS1_EEC2ERKS3_:    # @_ZNSt6vectorIP4NodeSaIS1_EEC2ERKS3_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rsi, %r14
	movq	%rdi, %rbx
	movq	8(%rsi), %rax
	movq	(%rsi), %rcx
	movq	%rax, %r12
	subq	%rcx, %r12
	sarq	$3, %r12
	xorps	%xmm0, %xmm0
	movups	%xmm0, (%rdi)
	movq	$0, 16(%rdi)
	cmpq	%rcx, %rax
	je	.LBB32_1
# %bb.2:
	movq	%rbx, %rdi
	movq	%r12, %rsi
	xorl	%edx, %edx
	callq	_ZNSt15__new_allocatorIP4NodeE8allocateEmPKv
	movq	%rax, %r15
	jmp	.LBB32_3
.LBB32_1:
	xorl	%r15d, %r15d
.LBB32_3:
	movq	%r15, (%rbx)
	movq	%r15, 8(%rbx)
	leaq	(%r15,%r12,8), %rax
	movq	%rax, 16(%rbx)
	movq	(%r14), %rsi
	movq	8(%r14), %r14
	subq	%rsi, %r14
	cmpq	$9, %r14
	jl	.LBB32_5
# %bb.4:
	movq	%r15, %rdi
	movq	%r14, %rdx
	callq	memmove@PLT
.LBB32_7:
	addq	%r14, %r15
	movq	%r15, 8(%rbx)
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB32_5:
	.cfi_def_cfa_offset 48
	cmpq	$8, %r14
	jne	.LBB32_7
# %bb.6:
	movq	(%rsi), %rax
	movq	%rax, (%r15)
	jmp	.LBB32_7
.Lfunc_end32:
	.size	_ZNSt6vectorIP4NodeSaIS1_EEC2ERKS3_, .Lfunc_end32-_ZNSt6vectorIP4NodeSaIS1_EEC2ERKS3_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt15__new_allocatorIP4NodeE8allocateEmPKv,"axG",@progbits,_ZNSt15__new_allocatorIP4NodeE8allocateEmPKv,comdat
	.weak	_ZNSt15__new_allocatorIP4NodeE8allocateEmPKv # -- Begin function _ZNSt15__new_allocatorIP4NodeE8allocateEmPKv
	.p2align	1, 0x90
	.type	_ZNSt15__new_allocatorIP4NodeE8allocateEmPKv,@function
_ZNSt15__new_allocatorIP4NodeE8allocateEmPKv: # @_ZNSt15__new_allocatorIP4NodeE8allocateEmPKv
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	%rsi, %rax
	shrq	$60, %rax
	jne	.LBB33_1
# %bb.3:
	shlq	$3, %rsi
	movq	%rsi, %rdi
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	_Znwm                           # TAILCALL
.LBB33_1:
	.cfi_def_cfa_offset 16
	shrq	$61, %rsi
	je	.LBB33_2
# %bb.4:
	callq	_ZSt28__throw_bad_array_new_lengthv
.LBB33_2:
	callq	_ZSt17__throw_bad_allocv
.Lfunc_end33:
	.size	_ZNSt15__new_allocatorIP4NodeE8allocateEmPKv, .Lfunc_end33-_ZNSt15__new_allocatorIP4NodeE8allocateEmPKv
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNKSt6vectorIS_IP4NodeSaIS1_EESaIS3_EE12_M_check_lenEmPKc,"axG",@progbits,_ZNKSt6vectorIS_IP4NodeSaIS1_EESaIS3_EE12_M_check_lenEmPKc,comdat
	.weak	_ZNKSt6vectorIS_IP4NodeSaIS1_EESaIS3_EE12_M_check_lenEmPKc # -- Begin function _ZNKSt6vectorIS_IP4NodeSaIS1_EESaIS3_EE12_M_check_lenEmPKc
	.p2align	1, 0x90
	.type	_ZNKSt6vectorIS_IP4NodeSaIS1_EESaIS3_EE12_M_check_lenEmPKc,@function
_ZNKSt6vectorIS_IP4NodeSaIS1_EESaIS3_EE12_M_check_lenEmPKc: # @_ZNKSt6vectorIS_IP4NodeSaIS1_EESaIS3_EE12_M_check_lenEmPKc
	.cfi_startproc
# %bb.0:
	movabsq	$384307168202282325, %rcx       # imm = 0x555555555555555
	movq	8(%rdi), %rax
	subq	(%rdi), %rax
	sarq	$3, %rax
	movabsq	$-6148914691236517205, %rdi     # imm = 0xAAAAAAAAAAAAAAAB
	imulq	%rax, %rdi
	movq	%rcx, %rax
	subq	%rdi, %rax
	cmpq	%rsi, %rax
	jb	.LBB34_2
# %bb.1:
	cmpq	%rsi, %rdi
	cmovaq	%rdi, %rsi
	leaq	(%rsi,%rdi), %rax
	cmpq	%rcx, %rax
	cmovaeq	%rcx, %rax
	addq	%rdi, %rsi
	cmovbq	%rcx, %rax
	retq
.LBB34_2:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	%rdx, %rdi
	callq	_ZSt20__throw_length_errorPKc
.Lfunc_end34:
	.size	_ZNKSt6vectorIS_IP4NodeSaIS1_EESaIS3_EE12_M_check_lenEmPKc, .Lfunc_end34-_ZNKSt6vectorIS_IP4NodeSaIS1_EESaIS3_EE12_M_check_lenEmPKc
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt15__new_allocatorISt6vectorIP4NodeSaIS2_EEE8allocateEmPKv,"axG",@progbits,_ZNSt15__new_allocatorISt6vectorIP4NodeSaIS2_EEE8allocateEmPKv,comdat
	.weak	_ZNSt15__new_allocatorISt6vectorIP4NodeSaIS2_EEE8allocateEmPKv # -- Begin function _ZNSt15__new_allocatorISt6vectorIP4NodeSaIS2_EEE8allocateEmPKv
	.p2align	1, 0x90
	.type	_ZNSt15__new_allocatorISt6vectorIP4NodeSaIS2_EEE8allocateEmPKv,@function
_ZNSt15__new_allocatorISt6vectorIP4NodeSaIS2_EEE8allocateEmPKv: # @_ZNSt15__new_allocatorISt6vectorIP4NodeSaIS2_EEE8allocateEmPKv
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movabsq	$384307168202282326, %rax       # imm = 0x555555555555556
	cmpq	%rax, %rsi
	jae	.LBB35_1
# %bb.3:
	shlq	$3, %rsi
	leaq	(%rsi,%rsi,2), %rdi
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	_Znwm                           # TAILCALL
.LBB35_1:
	.cfi_def_cfa_offset 16
	movabsq	$768614336404564651, %rax       # imm = 0xAAAAAAAAAAAAAAB
	cmpq	%rax, %rsi
	jb	.LBB35_2
# %bb.4:
	callq	_ZSt28__throw_bad_array_new_lengthv
.LBB35_2:
	callq	_ZSt17__throw_bad_allocv
.Lfunc_end35:
	.size	_ZNSt15__new_allocatorISt6vectorIP4NodeSaIS2_EEE8allocateEmPKv, .Lfunc_end35-_ZNSt15__new_allocatorISt6vectorIP4NodeSaIS2_EEE8allocateEmPKv
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt6vectorIP4NodeSaIS1_EE17_M_realloc_insertIJRKS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_,"axG",@progbits,_ZNSt6vectorIP4NodeSaIS1_EE17_M_realloc_insertIJRKS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_,comdat
	.weak	_ZNSt6vectorIP4NodeSaIS1_EE17_M_realloc_insertIJRKS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_ # -- Begin function _ZNSt6vectorIP4NodeSaIS1_EE17_M_realloc_insertIJRKS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_
	.p2align	1, 0x90
	.type	_ZNSt6vectorIP4NodeSaIS1_EE17_M_realloc_insertIJRKS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_,@function
_ZNSt6vectorIP4NodeSaIS1_EE17_M_realloc_insertIJRKS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_: # @_ZNSt6vectorIP4NodeSaIS1_EE17_M_realloc_insertIJRKS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, (%rsp)                    # 8-byte Spill
	movq	%rsi, %r12
	movq	%rdi, %rbx
	movl	$1, %esi
	movl	$.L.str.13, %edx
	callq	_ZNKSt6vectorIP4NodeSaIS1_EE12_M_check_lenEmPKc
	movq	(%rbx), %r13
	movq	8(%rbx), %r15
	movq	%r12, 8(%rsp)                   # 8-byte Spill
	subq	%r13, %r12
	movq	%r12, %r14
	sarq	$3, %r14
	testq	%rax, %rax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	je	.LBB36_1
# %bb.2:
	movq	%rbx, %rdi
	movq	%rax, %rsi
	xorl	%edx, %edx
	callq	_ZNSt15__new_allocatorIP4NodeE8allocateEmPKv
	movq	%rax, %rbp
	jmp	.LBB36_3
.LBB36_1:
	xorl	%ebp, %ebp
.LBB36_3:                               # %_ZNSt12_Vector_baseIP4NodeSaIS1_EE11_M_allocateEm.exit
	movq	(%rsp), %rax                    # 8-byte Reload
	movq	(%rax), %rax
	movq	%rax, (%rbp,%r14,8)
	testq	%r12, %r12
	jle	.LBB36_5
# %bb.4:
	movq	%rbp, %rdi
	movq	%r13, %rsi
	movq	%r12, %rdx
	callq	memmove@PLT
.LBB36_5:                               # %_ZNSt6vectorIP4NodeSaIS1_EE11_S_relocateEPS1_S4_S4_RS2_.exit
	addq	%rbp, %r12
	addq	$8, %r12
	movq	8(%rsp), %rsi                   # 8-byte Reload
	subq	%rsi, %r15
	testq	%r15, %r15
	jle	.LBB36_7
# %bb.6:
	movq	%r12, %rdi
	movq	%r15, %rdx
	callq	memmove@PLT
.LBB36_7:                               # %_ZNSt6vectorIP4NodeSaIS1_EE11_S_relocateEPS1_S4_S4_RS2_.exit16
	testq	%r13, %r13
	je	.LBB36_9
# %bb.8:
	movq	%r13, %rdi
	callq	_ZdlPv
.LBB36_9:                               # %_ZNSt12_Vector_baseIP4NodeSaIS1_EE13_M_deallocateEPS1_m.exit
	addq	%r15, %r12
	movq	%rbp, (%rbx)
	movq	%r12, 8(%rbx)
	movq	16(%rsp), %rax                  # 8-byte Reload
	leaq	(,%rax,8), %rax
	addq	%rbp, %rax
	movq	%rax, 16(%rbx)
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end36:
	.size	_ZNSt6vectorIP4NodeSaIS1_EE17_M_realloc_insertIJRKS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_, .Lfunc_end36-_ZNSt6vectorIP4NodeSaIS1_EE17_M_realloc_insertIJRKS1_EEEvN9__gnu_cxx17__normal_iteratorIPS1_S3_EEDpOT_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNKSt6vectorIP4NodeSaIS1_EE12_M_check_lenEmPKc,"axG",@progbits,_ZNKSt6vectorIP4NodeSaIS1_EE12_M_check_lenEmPKc,comdat
	.weak	_ZNKSt6vectorIP4NodeSaIS1_EE12_M_check_lenEmPKc # -- Begin function _ZNKSt6vectorIP4NodeSaIS1_EE12_M_check_lenEmPKc
	.p2align	1, 0x90
	.type	_ZNKSt6vectorIP4NodeSaIS1_EE12_M_check_lenEmPKc,@function
_ZNKSt6vectorIP4NodeSaIS1_EE12_M_check_lenEmPKc: # @_ZNKSt6vectorIP4NodeSaIS1_EE12_M_check_lenEmPKc
	.cfi_startproc
# %bb.0:
	movabsq	$1152921504606846975, %rcx      # imm = 0xFFFFFFFFFFFFFFF
	movq	8(%rdi), %r8
	subq	(%rdi), %r8
	sarq	$3, %r8
	movq	%rcx, %rax
	subq	%r8, %rax
	cmpq	%rsi, %rax
	jb	.LBB37_2
# %bb.1:
	cmpq	%rsi, %r8
	cmovaq	%r8, %rsi
	leaq	(%rsi,%r8), %rax
	cmpq	%rcx, %rax
	cmovaeq	%rcx, %rax
	addq	%r8, %rsi
	cmovbq	%rcx, %rax
	retq
.LBB37_2:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	%rdx, %rdi
	callq	_ZSt20__throw_length_errorPKc
.Lfunc_end37:
	.size	_ZNKSt6vectorIP4NodeSaIS1_EE12_M_check_lenEmPKc, .Lfunc_end37-_ZNKSt6vectorIP4NodeSaIS1_EE12_M_check_lenEmPKc
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt11_Deque_baseIP4NodeSaIS1_EE17_M_initialize_mapEm,"axG",@progbits,_ZNSt11_Deque_baseIP4NodeSaIS1_EE17_M_initialize_mapEm,comdat
	.weak	_ZNSt11_Deque_baseIP4NodeSaIS1_EE17_M_initialize_mapEm # -- Begin function _ZNSt11_Deque_baseIP4NodeSaIS1_EE17_M_initialize_mapEm
	.p2align	1, 0x90
	.type	_ZNSt11_Deque_baseIP4NodeSaIS1_EE17_M_initialize_mapEm,@function
_ZNSt11_Deque_baseIP4NodeSaIS1_EE17_M_initialize_mapEm: # @_ZNSt11_Deque_baseIP4NodeSaIS1_EE17_M_initialize_mapEm
.Lfunc_begin3:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception3
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rsi, %r14
	movq	%rdi, %rbx
	movq	%rsi, %r12
	shrq	$6, %r12
	leaq	1(%r12), %r15
	cmpq	$6, %r12
	movl	$5, %esi
	cmovaeq	%r12, %rsi
	addq	$3, %rsi
	movq	%rsi, 8(%rdi)
	leaq	7(%rsp), %rdi
	xorl	%edx, %edx
	callq	_ZNSt15__new_allocatorIPP4NodeE8allocateEmPKv
	movq	%rax, (%rbx)
	movq	8(%rbx), %rcx
	subq	%r15, %rcx
	andq	$-2, %rcx
	leaq	(%rax,%rcx,4), %r15
	leaq	(%r15,%r12,8), %rdx
	addq	$8, %rdx
.Ltmp27:
	movq	%rbx, %rdi
	movq	%r15, %rsi
	callq	_ZNSt11_Deque_baseIP4NodeSaIS1_EE15_M_create_nodesEPPS1_S5_
.Ltmp28:
# %bb.1:
	movq	%r15, 40(%rbx)
	movq	(%r15), %rax
	movq	%rax, 24(%rbx)
	movl	$512, %ecx                      # imm = 0x200
	leaq	(%rax,%rcx), %rdx
	movq	%rdx, 32(%rbx)
	leaq	(%r15,%r12,8), %rdx
	movq	%rdx, 72(%rbx)
	movq	(%rdx), %rdx
	movq	%rdx, 56(%rbx)
	addq	%rdx, %rcx
	movq	%rcx, 64(%rbx)
	movq	%rax, 16(%rbx)
	andl	$63, %r14d
	leaq	(%rdx,%r14,8), %rax
	movq	%rax, 48(%rbx)
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB38_5:
	.cfi_def_cfa_offset 48
.Ltmp29:
	movq	%rax, %rdi
	callq	__cxa_begin_catch
	movq	(%rbx), %rdi
	callq	_ZdlPv
	xorps	%xmm0, %xmm0
	movups	%xmm0, (%rbx)
.Ltmp30:
	callq	__cxa_rethrow
.Ltmp31:
# %bb.6:
.LBB38_2:
.Ltmp32:
	movq	%rax, %rbx
.Ltmp33:
	callq	__cxa_end_catch
.Ltmp34:
# %bb.3:
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.LBB38_4:
.Ltmp35:
	movq	%rax, %rdi
	callq	__clang_call_terminate
.Lfunc_end38:
	.size	_ZNSt11_Deque_baseIP4NodeSaIS1_EE17_M_initialize_mapEm, .Lfunc_end38-_ZNSt11_Deque_baseIP4NodeSaIS1_EE17_M_initialize_mapEm
	.cfi_endproc
	.section	.gcc_except_table._ZNSt11_Deque_baseIP4NodeSaIS1_EE17_M_initialize_mapEm,"aG",@progbits,_ZNSt11_Deque_baseIP4NodeSaIS1_EE17_M_initialize_mapEm,comdat
	.p2align	2, 0x0
GCC_except_table38:
.Lexception3:
	.byte	255                             # @LPStart Encoding = omit
	.byte	3                               # @TType Encoding = udata4
	.uleb128 .Lttbase1-.Lttbaseref1
.Lttbaseref1:
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end3-.Lcst_begin3
.Lcst_begin3:
	.uleb128 .Lfunc_begin3-.Lfunc_begin3    # >> Call Site 1 <<
	.uleb128 .Ltmp27-.Lfunc_begin3          #   Call between .Lfunc_begin3 and .Ltmp27
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp27-.Lfunc_begin3          # >> Call Site 2 <<
	.uleb128 .Ltmp28-.Ltmp27                #   Call between .Ltmp27 and .Ltmp28
	.uleb128 .Ltmp29-.Lfunc_begin3          #     jumps to .Ltmp29
	.byte	1                               #   On action: 1
	.uleb128 .Ltmp28-.Lfunc_begin3          # >> Call Site 3 <<
	.uleb128 .Ltmp30-.Ltmp28                #   Call between .Ltmp28 and .Ltmp30
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp30-.Lfunc_begin3          # >> Call Site 4 <<
	.uleb128 .Ltmp31-.Ltmp30                #   Call between .Ltmp30 and .Ltmp31
	.uleb128 .Ltmp32-.Lfunc_begin3          #     jumps to .Ltmp32
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp33-.Lfunc_begin3          # >> Call Site 5 <<
	.uleb128 .Ltmp34-.Ltmp33                #   Call between .Ltmp33 and .Ltmp34
	.uleb128 .Ltmp35-.Lfunc_begin3          #     jumps to .Ltmp35
	.byte	1                               #   On action: 1
	.uleb128 .Ltmp34-.Lfunc_begin3          # >> Call Site 6 <<
	.uleb128 .Lfunc_end38-.Ltmp34           #   Call between .Ltmp34 and .Lfunc_end38
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end3:
	.byte	1                               # >> Action Record 1 <<
                                        #   Catch TypeInfo 1
	.byte	0                               #   No further actions
	.p2align	2, 0x0
                                        # >> Catch TypeInfos <<
	.long	0                               # TypeInfo 1
.Lttbase1:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZNSt11_Deque_baseIP4NodeSaIS1_EE15_M_create_nodesEPPS1_S5_,"axG",@progbits,_ZNSt11_Deque_baseIP4NodeSaIS1_EE15_M_create_nodesEPPS1_S5_,comdat
	.weak	_ZNSt11_Deque_baseIP4NodeSaIS1_EE15_M_create_nodesEPPS1_S5_ # -- Begin function _ZNSt11_Deque_baseIP4NodeSaIS1_EE15_M_create_nodesEPPS1_S5_
	.p2align	1, 0x90
	.type	_ZNSt11_Deque_baseIP4NodeSaIS1_EE15_M_create_nodesEPPS1_S5_,@function
_ZNSt11_Deque_baseIP4NodeSaIS1_EE15_M_create_nodesEPPS1_S5_: # @_ZNSt11_Deque_baseIP4NodeSaIS1_EE15_M_create_nodesEPPS1_S5_
.Lfunc_begin4:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception4
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	cmpq	%rdx, %rsi
	jae	.LBB39_4
# %bb.1:                                # %.lr.ph.preheader
	movq	%rdx, %r14
	movq	%rsi, %rbx
	movq	%rsi, %r15
.LBB39_2:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
.Ltmp36:
	movl	$512, %edi                      # imm = 0x200
	callq	_Znwm
.Ltmp37:
# %bb.3:                                # %_ZNSt11_Deque_baseIP4NodeSaIS1_EE16_M_allocate_nodeEv.exit
                                        #   in Loop: Header=BB39_2 Depth=1
	movq	%rax, (%r15)
	addq	$8, %r15
	cmpq	%r14, %r15
	jb	.LBB39_2
.LBB39_4:                               # %._crit_edge
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB39_5:
	.cfi_def_cfa_offset 32
.Ltmp38:
	movq	%rax, %rdi
	callq	__cxa_begin_catch
	cmpq	%rbx, %r15
	jbe	.LBB39_7
.LBB39_6:                               # %.lr.ph.i
                                        # =>This Inner Loop Header: Depth=1
	movq	(%rbx), %rdi
	callq	_ZdlPv
	addq	$8, %rbx
	cmpq	%r15, %rbx
	jb	.LBB39_6
.LBB39_7:                               # %_ZNSt11_Deque_baseIP4NodeSaIS1_EE16_M_destroy_nodesEPPS1_S5_.exit
.Ltmp39:
	callq	__cxa_rethrow
.Ltmp40:
# %bb.11:
.LBB39_8:
.Ltmp41:
	movq	%rax, %rbx
.Ltmp42:
	callq	__cxa_end_catch
.Ltmp43:
# %bb.9:
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.LBB39_10:
.Ltmp44:
	movq	%rax, %rdi
	callq	__clang_call_terminate
.Lfunc_end39:
	.size	_ZNSt11_Deque_baseIP4NodeSaIS1_EE15_M_create_nodesEPPS1_S5_, .Lfunc_end39-_ZNSt11_Deque_baseIP4NodeSaIS1_EE15_M_create_nodesEPPS1_S5_
	.cfi_endproc
	.section	.gcc_except_table._ZNSt11_Deque_baseIP4NodeSaIS1_EE15_M_create_nodesEPPS1_S5_,"aG",@progbits,_ZNSt11_Deque_baseIP4NodeSaIS1_EE15_M_create_nodesEPPS1_S5_,comdat
	.p2align	2, 0x0
GCC_except_table39:
.Lexception4:
	.byte	255                             # @LPStart Encoding = omit
	.byte	3                               # @TType Encoding = udata4
	.uleb128 .Lttbase2-.Lttbaseref2
.Lttbaseref2:
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end4-.Lcst_begin4
.Lcst_begin4:
	.uleb128 .Ltmp36-.Lfunc_begin4          # >> Call Site 1 <<
	.uleb128 .Ltmp37-.Ltmp36                #   Call between .Ltmp36 and .Ltmp37
	.uleb128 .Ltmp38-.Lfunc_begin4          #     jumps to .Ltmp38
	.byte	1                               #   On action: 1
	.uleb128 .Ltmp37-.Lfunc_begin4          # >> Call Site 2 <<
	.uleb128 .Ltmp39-.Ltmp37                #   Call between .Ltmp37 and .Ltmp39
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp39-.Lfunc_begin4          # >> Call Site 3 <<
	.uleb128 .Ltmp40-.Ltmp39                #   Call between .Ltmp39 and .Ltmp40
	.uleb128 .Ltmp41-.Lfunc_begin4          #     jumps to .Ltmp41
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp42-.Lfunc_begin4          # >> Call Site 4 <<
	.uleb128 .Ltmp43-.Ltmp42                #   Call between .Ltmp42 and .Ltmp43
	.uleb128 .Ltmp44-.Lfunc_begin4          #     jumps to .Ltmp44
	.byte	1                               #   On action: 1
	.uleb128 .Ltmp43-.Lfunc_begin4          # >> Call Site 5 <<
	.uleb128 .Lfunc_end39-.Ltmp43           #   Call between .Ltmp43 and .Lfunc_end39
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end4:
	.byte	1                               # >> Action Record 1 <<
                                        #   Catch TypeInfo 1
	.byte	0                               #   No further actions
	.p2align	2, 0x0
                                        # >> Catch TypeInfos <<
	.long	0                               # TypeInfo 1
.Lttbase2:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZNSt15__new_allocatorIPP4NodeE8allocateEmPKv,"axG",@progbits,_ZNSt15__new_allocatorIPP4NodeE8allocateEmPKv,comdat
	.weak	_ZNSt15__new_allocatorIPP4NodeE8allocateEmPKv # -- Begin function _ZNSt15__new_allocatorIPP4NodeE8allocateEmPKv
	.p2align	1, 0x90
	.type	_ZNSt15__new_allocatorIPP4NodeE8allocateEmPKv,@function
_ZNSt15__new_allocatorIPP4NodeE8allocateEmPKv: # @_ZNSt15__new_allocatorIPP4NodeE8allocateEmPKv
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	%rsi, %rax
	shrq	$60, %rax
	jne	.LBB40_1
# %bb.3:
	shlq	$3, %rsi
	movq	%rsi, %rdi
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	_Znwm                           # TAILCALL
.LBB40_1:
	.cfi_def_cfa_offset 16
	shrq	$61, %rsi
	je	.LBB40_2
# %bb.4:
	callq	_ZSt28__throw_bad_array_new_lengthv
.LBB40_2:
	callq	_ZSt17__throw_bad_allocv
.Lfunc_end40:
	.size	_ZNSt15__new_allocatorIPP4NodeE8allocateEmPKv, .Lfunc_end40-_ZNSt15__new_allocatorIPP4NodeE8allocateEmPKv
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt5dequeIP4NodeSaIS1_EE16_M_push_back_auxIJRKS1_EEEvDpOT_,"axG",@progbits,_ZNSt5dequeIP4NodeSaIS1_EE16_M_push_back_auxIJRKS1_EEEvDpOT_,comdat
	.weak	_ZNSt5dequeIP4NodeSaIS1_EE16_M_push_back_auxIJRKS1_EEEvDpOT_ # -- Begin function _ZNSt5dequeIP4NodeSaIS1_EE16_M_push_back_auxIJRKS1_EEEvDpOT_
	.p2align	1, 0x90
	.type	_ZNSt5dequeIP4NodeSaIS1_EE16_M_push_back_auxIJRKS1_EEEvDpOT_,@function
_ZNSt5dequeIP4NodeSaIS1_EE16_M_push_back_auxIJRKS1_EEEvDpOT_: # @_ZNSt5dequeIP4NodeSaIS1_EE16_M_push_back_auxIJRKS1_EEEvDpOT_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	72(%rdi), %r15
	movq	%r15, %rax
	subq	40(%rdi), %rax
	shrq	$3, %rax
	cmpq	$1, %r15
	adcq	$-1, %rax
	shlq	$6, %rax
	movq	32(%rdi), %rcx
	movq	48(%rdi), %rdx
	subq	56(%rdi), %rdx
	sarq	$3, %rdx
	subq	16(%rdi), %rcx
	sarq	$3, %rcx
	addq	%rdx, %rcx
	addq	%rax, %rcx
	movabsq	$1152921504606846975, %rax      # imm = 0xFFFFFFFFFFFFFFF
	cmpq	%rax, %rcx
	je	.LBB41_4
# %bb.1:
	movq	%rsi, %r14
	movq	%rdi, %rbx
	movq	%r15, %rax
	subq	(%rdi), %rax
	movq	8(%rdi), %rcx
	sarq	$3, %rax
	subq	%rax, %rcx
	cmpq	$1, %rcx
	ja	.LBB41_3
# %bb.2:
	movl	$1, %esi
	movq	%rbx, %rdi
	xorl	%edx, %edx
	callq	_ZNSt5dequeIP4NodeSaIS1_EE17_M_reallocate_mapEmb
	movq	72(%rbx), %r15
.LBB41_3:                               # %_ZNSt5dequeIP4NodeSaIS1_EE22_M_reserve_map_at_backEm.exit
	movl	$512, %edi                      # imm = 0x200
	callq	_Znwm
	movq	%rax, 8(%r15)
	movq	48(%rbx), %rax
	movq	(%r14), %rcx
	movq	%rcx, (%rax)
	movq	72(%rbx), %rax
	leaq	8(%rax), %rcx
	movq	%rcx, 72(%rbx)
	movq	8(%rax), %rax
	movq	%rax, 56(%rbx)
	leaq	512(%rax), %rcx
	movq	%rcx, 64(%rbx)
	movq	%rax, 48(%rbx)
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB41_4:
	.cfi_def_cfa_offset 32
	movl	$.L.str.15, %edi
	callq	_ZSt20__throw_length_errorPKc
.Lfunc_end41:
	.size	_ZNSt5dequeIP4NodeSaIS1_EE16_M_push_back_auxIJRKS1_EEEvDpOT_, .Lfunc_end41-_ZNSt5dequeIP4NodeSaIS1_EE16_M_push_back_auxIJRKS1_EEEvDpOT_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt5dequeIP4NodeSaIS1_EE17_M_reallocate_mapEmb,"axG",@progbits,_ZNSt5dequeIP4NodeSaIS1_EE17_M_reallocate_mapEmb,comdat
	.weak	_ZNSt5dequeIP4NodeSaIS1_EE17_M_reallocate_mapEmb # -- Begin function _ZNSt5dequeIP4NodeSaIS1_EE17_M_reallocate_mapEmb
	.p2align	1, 0x90
	.type	_ZNSt5dequeIP4NodeSaIS1_EE17_M_reallocate_mapEmb,@function
_ZNSt5dequeIP4NodeSaIS1_EE17_M_reallocate_mapEmb: # @_ZNSt5dequeIP4NodeSaIS1_EE17_M_reallocate_mapEmb
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%edx, %r8d
	movq	%rsi, %r14
	movq	%rdi, %rbx
	movq	72(%rdi), %rax
	movq	8(%rdi), %rcx
	movq	40(%rdi), %rsi
	subq	%rsi, %rax
	movq	%rax, %r13
	sarq	$3, %r13
	leaq	(%r14,%r13), %r12
	incq	%r12
	incq	%r13
	leaq	(%r12,%r12), %rdx
	cmpq	%rdx, %rcx
	jbe	.LBB42_4
# %bb.1:
	subq	%r12, %rcx
	andq	$-2, %rcx
	shlq	$2, %rcx
	addq	(%rbx), %rcx
	xorl	%edx, %edx
	testb	%r8b, %r8b
	cmovneq	%r14, %rdx
	leaq	(%rcx,%rdx,8), %r14
	leaq	8(%rax), %rdx
	cmpq	%rsi, %r14
	jae	.LBB42_7
# %bb.2:
	cmpq	$9, %rdx
	jl	.LBB42_13
# %bb.3:
	movq	%r14, %rdi
	jmp	.LBB42_9
.LBB42_4:
	cmpq	%r14, %rcx
	movq	%r14, %rax
	cmovaq	%rcx, %rax
	leaq	(%rcx,%rax), %rbp
	addq	$2, %rbp
	xorl	%r15d, %r15d
	leaq	11(%rsp), %rdi
	movq	%rbp, %rsi
	xorl	%edx, %edx
	movl	%r8d, 12(%rsp)                  # 4-byte Spill
	callq	_ZNSt15__new_allocatorIPP4NodeE8allocateEmPKv
	movq	%rbp, 16(%rsp)                  # 8-byte Spill
	subq	%r12, %rbp
	movq	%rax, %r12
	andq	$-2, %rbp
	leaq	(%rax,%rbp,4), %rax
	cmpb	$0, 12(%rsp)                    # 1-byte Folded Reload
	cmovneq	%r14, %r15
	leaq	(%rax,%r15,8), %r14
	movq	40(%rbx), %rsi
	movq	72(%rbx), %rdx
	subq	%rsi, %rdx
	addq	$8, %rdx
	cmpq	$9, %rdx
	jl	.LBB42_11
# %bb.5:
	movq	%r14, %rdi
	callq	memmove@PLT
.LBB42_6:                               # %_ZSt4copyIPPP4NodeS3_ET0_T_S5_S4_.exit24
	movq	(%rbx), %rdi
	callq	_ZdlPv
	movq	%r12, (%rbx)
	movq	16(%rsp), %rax                  # 8-byte Reload
	movq	%rax, 8(%rbx)
	jmp	.LBB42_10
.LBB42_7:
	movq	%rdx, %rcx
	sarq	$3, %rcx
	cmpq	$2, %rcx
	jl	.LBB42_15
# %bb.8:
	leaq	(%r14,%r13,8), %rdi
	shlq	$3, %rcx
	subq	%rcx, %rdi
.LBB42_9:                               # %_ZSt4copyIPPP4NodeS3_ET0_T_S5_S4_.exit
	callq	memmove@PLT
.LBB42_10:                              # %_ZSt4copyIPPP4NodeS3_ET0_T_S5_S4_.exit
	movq	%r14, 40(%rbx)
	movq	(%r14), %rax
	movq	%rax, 24(%rbx)
	movl	$512, %ecx                      # imm = 0x200
	addq	%rcx, %rax
	movq	%rax, 32(%rbx)
	leaq	(%r14,%r13,8), %rax
	addq	$-8, %rax
	movq	%rax, 72(%rbx)
	movq	(%rax), %rax
	movq	%rax, 56(%rbx)
	addq	%rcx, %rax
	movq	%rax, 64(%rbx)
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB42_11:
	.cfi_def_cfa_offset 80
	cmpq	$8, %rdx
	jne	.LBB42_6
# %bb.12:
	movq	(%rsi), %rax
	movq	%rax, (%r14)
	jmp	.LBB42_6
.LBB42_13:
	cmpq	$8, %rdx
	jne	.LBB42_10
# %bb.14:
	movq	(%rsi), %rax
	movq	%rax, (%r14)
	jmp	.LBB42_10
.LBB42_15:
	cmpq	$8, %rdx
	jne	.LBB42_10
# %bb.16:
	movq	(%rsi), %rcx
	movq	%rcx, (%r14,%rax)
	jmp	.LBB42_10
.Lfunc_end42:
	.size	_ZNSt5dequeIP4NodeSaIS1_EE17_M_reallocate_mapEmb, .Lfunc_end42-_ZNSt5dequeIP4NodeSaIS1_EE17_M_reallocate_mapEmb
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt5dequeIP4NodeSaIS1_EE12emplace_backIJS1_EEERS1_DpOT_,"axG",@progbits,_ZNSt5dequeIP4NodeSaIS1_EE12emplace_backIJS1_EEERS1_DpOT_,comdat
	.weak	_ZNSt5dequeIP4NodeSaIS1_EE12emplace_backIJS1_EEERS1_DpOT_ # -- Begin function _ZNSt5dequeIP4NodeSaIS1_EE12emplace_backIJS1_EEERS1_DpOT_
	.p2align	1, 0x90
	.type	_ZNSt5dequeIP4NodeSaIS1_EE12emplace_backIJS1_EEERS1_DpOT_,@function
_ZNSt5dequeIP4NodeSaIS1_EE12emplace_backIJS1_EEERS1_DpOT_: # @_ZNSt5dequeIP4NodeSaIS1_EE12emplace_backIJS1_EEERS1_DpOT_
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rdi, %rbx
	movq	48(%rdi), %rax
	movq	64(%rdi), %rcx
	addq	$-8, %rcx
	cmpq	%rcx, %rax
	je	.LBB43_2
# %bb.1:
	movq	(%rsi), %rcx
	movq	%rcx, (%rax)
	movq	48(%rbx), %rax
	addq	$8, %rax
	movq	%rax, 48(%rbx)
	jmp	.LBB43_3
.LBB43_2:
	movq	%rbx, %rdi
	callq	_ZNSt5dequeIP4NodeSaIS1_EE16_M_push_back_auxIJS1_EEEvDpOT_
	movq	48(%rbx), %rax
.LBB43_3:
	cmpq	56(%rbx), %rax
	jne	.LBB43_5
# %bb.4:
	movq	72(%rbx), %rcx
	movl	$512, %eax                      # imm = 0x200
	addq	-8(%rcx), %rax
.LBB43_5:                               # %_ZNSt5dequeIP4NodeSaIS1_EE4backEv.exit
	addq	$-8, %rax
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end43:
	.size	_ZNSt5dequeIP4NodeSaIS1_EE12emplace_backIJS1_EEERS1_DpOT_, .Lfunc_end43-_ZNSt5dequeIP4NodeSaIS1_EE12emplace_backIJS1_EEERS1_DpOT_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt5dequeIP4NodeSaIS1_EE16_M_push_back_auxIJS1_EEEvDpOT_,"axG",@progbits,_ZNSt5dequeIP4NodeSaIS1_EE16_M_push_back_auxIJS1_EEEvDpOT_,comdat
	.weak	_ZNSt5dequeIP4NodeSaIS1_EE16_M_push_back_auxIJS1_EEEvDpOT_ # -- Begin function _ZNSt5dequeIP4NodeSaIS1_EE16_M_push_back_auxIJS1_EEEvDpOT_
	.p2align	1, 0x90
	.type	_ZNSt5dequeIP4NodeSaIS1_EE16_M_push_back_auxIJS1_EEEvDpOT_,@function
_ZNSt5dequeIP4NodeSaIS1_EE16_M_push_back_auxIJS1_EEEvDpOT_: # @_ZNSt5dequeIP4NodeSaIS1_EE16_M_push_back_auxIJS1_EEEvDpOT_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	72(%rdi), %r15
	movq	%r15, %rax
	subq	40(%rdi), %rax
	shrq	$3, %rax
	cmpq	$1, %r15
	adcq	$-1, %rax
	shlq	$6, %rax
	movq	32(%rdi), %rcx
	movq	48(%rdi), %rdx
	subq	56(%rdi), %rdx
	sarq	$3, %rdx
	subq	16(%rdi), %rcx
	sarq	$3, %rcx
	addq	%rdx, %rcx
	addq	%rax, %rcx
	movabsq	$1152921504606846975, %rax      # imm = 0xFFFFFFFFFFFFFFF
	cmpq	%rax, %rcx
	je	.LBB44_4
# %bb.1:
	movq	%rsi, %r14
	movq	%rdi, %rbx
	movq	%r15, %rax
	subq	(%rdi), %rax
	movq	8(%rdi), %rcx
	sarq	$3, %rax
	subq	%rax, %rcx
	cmpq	$1, %rcx
	ja	.LBB44_3
# %bb.2:
	movl	$1, %esi
	movq	%rbx, %rdi
	xorl	%edx, %edx
	callq	_ZNSt5dequeIP4NodeSaIS1_EE17_M_reallocate_mapEmb
	movq	72(%rbx), %r15
.LBB44_3:                               # %_ZNSt5dequeIP4NodeSaIS1_EE22_M_reserve_map_at_backEm.exit
	movl	$512, %edi                      # imm = 0x200
	callq	_Znwm
	movq	%rax, 8(%r15)
	movq	48(%rbx), %rax
	movq	(%r14), %rcx
	movq	%rcx, (%rax)
	movq	72(%rbx), %rax
	leaq	8(%rax), %rcx
	movq	%rcx, 72(%rbx)
	movq	8(%rax), %rax
	movq	%rax, 56(%rbx)
	leaq	512(%rax), %rcx
	movq	%rcx, 64(%rbx)
	movq	%rax, 48(%rbx)
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB44_4:
	.cfi_def_cfa_offset 32
	movl	$.L.str.15, %edi
	callq	_ZSt20__throw_length_errorPKc
.Lfunc_end44:
	.size	_ZNSt5dequeIP4NodeSaIS1_EE16_M_push_back_auxIJS1_EEEvDpOT_, .Lfunc_end44-_ZNSt5dequeIP4NodeSaIS1_EE16_M_push_back_auxIJS1_EEEvDpOT_
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB45_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB45_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z23parentListBackwardsWavePiS_S_S_S_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13backwardsWavePiS_S_S_S_S_S_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z20childListExploreWavePiS_S_S_S_S_S_, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11exploreWavePiS_P4NodeS_S_S_S_, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z19setPreviousExploredPiS_S_, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end45:
	.size	__hip_module_ctor, .Lfunc_end45-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB46_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB46_2:
	retq
.Lfunc_end46:
	.size	__hip_module_dtor, .Lfunc_end46-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z23parentListBackwardsWavePiS_S_S_S_S_,@object # @_Z23parentListBackwardsWavePiS_S_S_S_S_
	.section	.rodata,"a",@progbits
	.globl	_Z23parentListBackwardsWavePiS_S_S_S_S_
	.p2align	3, 0x0
_Z23parentListBackwardsWavePiS_S_S_S_S_:
	.quad	_Z38__device_stub__parentListBackwardsWavePiS_S_S_S_S_
	.size	_Z23parentListBackwardsWavePiS_S_S_S_S_, 8

	.type	_Z13backwardsWavePiS_S_S_S_S_S_,@object # @_Z13backwardsWavePiS_S_S_S_S_S_
	.globl	_Z13backwardsWavePiS_S_S_S_S_S_
	.p2align	3, 0x0
_Z13backwardsWavePiS_S_S_S_S_S_:
	.quad	_Z28__device_stub__backwardsWavePiS_S_S_S_S_S_
	.size	_Z13backwardsWavePiS_S_S_S_S_S_, 8

	.type	_Z20childListExploreWavePiS_S_S_S_S_S_,@object # @_Z20childListExploreWavePiS_S_S_S_S_S_
	.globl	_Z20childListExploreWavePiS_S_S_S_S_S_
	.p2align	3, 0x0
_Z20childListExploreWavePiS_S_S_S_S_S_:
	.quad	_Z35__device_stub__childListExploreWavePiS_S_S_S_S_S_
	.size	_Z20childListExploreWavePiS_S_S_S_S_S_, 8

	.type	_Z11exploreWavePiS_P4NodeS_S_S_S_,@object # @_Z11exploreWavePiS_P4NodeS_S_S_S_
	.globl	_Z11exploreWavePiS_P4NodeS_S_S_S_
	.p2align	3, 0x0
_Z11exploreWavePiS_P4NodeS_S_S_S_:
	.quad	_Z26__device_stub__exploreWavePiS_P4NodeS_S_S_S_
	.size	_Z11exploreWavePiS_P4NodeS_S_S_S_, 8

	.type	_Z19setPreviousExploredPiS_S_,@object # @_Z19setPreviousExploredPiS_S_
	.globl	_Z19setPreviousExploredPiS_S_
	.p2align	3, 0x0
_Z19setPreviousExploredPiS_S_:
	.quad	_Z34__device_stub__setPreviousExploredPiS_S_
	.size	_Z19setPreviousExploredPiS_S_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"GPU Parent Flip Flop Explore Time= %.3f msec\n"
	.size	.L.str, 46

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"%i CPU: %i GPU:%i\n"
	.size	.L.str.1, 19

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"GPU Flip Flop Explore Time= %.3f msec\n"
	.size	.L.str.4, 39

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"GPU Child List Explore Time= %.3f msec\n"
	.size	.L.str.5, 40

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"GPU Wave Time= %.3f msec\n"
	.size	.L.str.6, 26

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"CPU Time= %.3f msec\n"
	.size	.L.str.8, 21

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"Value: %i Children: ["
	.size	.L.str.9, 22

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"%i"
	.size	.L.str.10, 3

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	", "
	.size	.L.str.11, 3

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	"vector::_M_realloc_insert"
	.size	.L.str.13, 26

	.type	.L.str.14,@object               # @.str.14
.L.str.14:
	.asciz	"vector::_M_range_check: __n (which is %zu) >= this->size() (which is %zu)"
	.size	.L.str.14, 74

	.type	.L.str.15,@object               # @.str.15
.L.str.15:
	.asciz	"cannot create std::deque larger than max_size()"
	.size	.L.str.15, 48

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z23parentListBackwardsWavePiS_S_S_S_S_"
	.size	.L__unnamed_1, 40

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z13backwardsWavePiS_S_S_S_S_S_"
	.size	.L__unnamed_2, 32

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z20childListExploreWavePiS_S_S_S_S_S_"
	.size	.L__unnamed_3, 39

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z11exploreWavePiS_P4NodeS_S_S_S_"
	.size	.L__unnamed_4, 34

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"_Z19setPreviousExploredPiS_S_"
	.size	.L__unnamed_5, 30

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr.6,@object                 # @str.6
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr.6:
	.asciz	"The results do not match"
	.size	.Lstr.6, 25

	.type	.Lstr.7,@object                 # @str.7
.Lstr.7:
	.asciz	"The results match"
	.size	.Lstr.7, 18

	.type	.Lstr.8,@object                 # @str.8
.Lstr.8:
	.asciz	"\nToo few arguments!"
	.size	.Lstr.8, 20

	.type	.Lstr.9,@object                 # @str.9
.Lstr.9:
	.asciz	"]"
	.size	.Lstr.9, 2

	.globl	_ZN4NodeC1Ei
	.type	_ZN4NodeC1Ei,@function
.set _ZN4NodeC1Ei, _ZN4NodeC2Ei
	.globl	_ZN4NodeC1Ev
	.type	_ZN4NodeC1Ev,@function
.set _ZN4NodeC1Ev, _ZN4NodeC2Ev
	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z38__device_stub__parentListBackwardsWavePiS_S_S_S_S_
	.addrsig_sym _Z28__device_stub__backwardsWavePiS_S_S_S_S_S_
	.addrsig_sym _Z35__device_stub__childListExploreWavePiS_S_S_S_S_S_
	.addrsig_sym _Z26__device_stub__exploreWavePiS_P4NodeS_S_S_S_
	.addrsig_sym _Z34__device_stub__setPreviousExploredPiS_S_
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym _Z23parentListBackwardsWavePiS_S_S_S_S_
	.addrsig_sym _Z13backwardsWavePiS_S_S_S_S_S_
	.addrsig_sym _Z20childListExploreWavePiS_S_S_S_S_S_
	.addrsig_sym _Z11exploreWavePiS_P4NodeS_S_S_S_
	.addrsig_sym _Z19setPreviousExploredPiS_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z23parentListBackwardsWavePiS_S_S_S_S_ ; -- Begin function _Z23parentListBackwardsWavePiS_S_S_S_S_
	.globl	_Z23parentListBackwardsWavePiS_S_S_S_S_
	.p2align	8
	.type	_Z23parentListBackwardsWavePiS_S_S_S_S_,@function
_Z23parentListBackwardsWavePiS_S_S_S_S_: ; @_Z23parentListBackwardsWavePiS_S_S_S_S_
; %bb.0:
	s_load_b128 s[16:19], s[0:1], 0x20
	v_lshl_add_u32 v0, s15, 9, v0
	s_waitcnt lgkmcnt(0)
	s_load_b32 s12, s[18:19], 0x0
	s_load_b256 s[4:11], s[0:1], 0x0
	s_delay_alu instid0(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	s_mov_b32 s1, exec_lo
	s_waitcnt lgkmcnt(0)
	v_mov_b32_e32 v10, s12
	v_cmpx_gt_i32_e64 s12, v0
	s_cbranch_execz .LBB0_12
; %bb.1:
	v_lshlrev_b64 v[2:3], 2, v[0:1]
	v_mov_b32_e32 v10, s12
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
	global_load_b32 v4, v[4:5], off
	s_waitcnt vmcnt(0)
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB0_11
; %bb.2:
	v_add_co_u32 v4, vcc_lo, s10, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s11, v3, vcc_lo
	v_mov_b32_e32 v10, s12
	s_mov_b32 s3, exec_lo
	global_load_b64 v[4:5], v[4:5], off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e64 v4, v5
	s_cbranch_execz .LBB0_10
; %bb.3:                                ; %.lr.ph.preheader
	v_ashrrev_i32_e32 v7, 31, v4
	v_mov_b32_e32 v6, v4
                                        ; implicit-def: $sgpr11
                                        ; implicit-def: $sgpr10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	v_add_co_u32 v8, vcc_lo, s8, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v7, vcc_lo
	s_mov_b32 s8, 0
                                        ; implicit-def: $sgpr9
.LBB0_4:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v6, v8 :: v_dual_mov_b32 v7, v9
	global_load_b32 v8, v[8:9], off
	s_or_b32 s10, s10, exec_lo
	s_or_b32 s11, s11, exec_lo
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v9, 31, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[8:9], 2, v[8:9]
	v_add_co_u32 v8, vcc_lo, s4, v8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, s5, v9, vcc_lo
	global_load_b32 v8, v[8:9], off
	s_waitcnt vmcnt(0)
	v_cmp_ne_u32_e32 vcc_lo, 1, v8
                                        ; implicit-def: $vgpr8_vgpr9
	s_and_saveexec_b32 s13, vcc_lo
; %bb.5:                                ;   in Loop: Header=BB0_4 Depth=1
	v_add_nc_u32_e32 v4, 1, v4
	v_add_co_u32 v8, s0, v6, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v9, s0, 0, v7, s0
	v_cmp_ge_i32_e32 vcc_lo, v4, v5
	s_and_not1_b32 s0, s11, exec_lo
	s_and_not1_b32 s10, s10, exec_lo
	s_and_b32 s11, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s11, s0, s11
; %bb.6:                                ; %Flow59
                                        ;   in Loop: Header=BB0_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, exec_lo, s11
	v_mov_b32_e32 v10, s12
	s_or_b32 s8, s0, s8
	s_and_not1_b32 s0, s9, exec_lo
	s_and_b32 s9, s10, exec_lo
	s_or_b32 s9, s0, s9
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB0_4
; %bb.7:                                ; %loop.exit.guard
	s_or_b32 exec_lo, exec_lo, s8
	s_and_saveexec_b32 s0, s9
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s0, exec_lo, s0
	s_cbranch_execz .LBB0_9
; %bb.8:
	v_add_co_u32 v4, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v3, vcc_lo
	v_dual_mov_b32 v8, 1 :: v_dual_mov_b32 v9, 0
	global_atomic_cmpswap_b32 v[4:5], v[8:9], off
	global_load_b32 v4, v[6:7], off
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_add_co_u32 v4, vcc_lo, s16, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s17, v5, vcc_lo
	v_add_co_u32 v2, vcc_lo, s16, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s17, v3, vcc_lo
	global_load_b32 v4, v[4:5], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v4, 1, v4
	global_store_b32 v[2:3], v4, off
	global_load_b32 v10, v9, s[18:19]
.LBB0_9:                                ; %Flow57
	s_or_b32 exec_lo, exec_lo, s0
.LBB0_10:                               ; %Flow60
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s3
.LBB0_11:                               ; %Flow61
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB0_12:                               ; %.loopexit
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_mov_b32 s0, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e64 v0, v10
	s_cbranch_execz .LBB0_15
; %bb.13:
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, 2, v2
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_15
; %bb.14:
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_mov_b32_e32 v2, 2
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB0_15:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z23parentListBackwardsWavePiS_S_S_S_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 48
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z23parentListBackwardsWavePiS_S_S_S_S_, .Lfunc_end0-_Z23parentListBackwardsWavePiS_S_S_S_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 644
; NumSgprs: 22
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z13backwardsWavePiS_S_S_S_S_S_ ; -- Begin function _Z13backwardsWavePiS_S_S_S_S_S_
	.globl	_Z13backwardsWavePiS_S_S_S_S_S_
	.p2align	8
	.type	_Z13backwardsWavePiS_S_S_S_S_S_,@function
_Z13backwardsWavePiS_S_S_S_S_S_:        ; @_Z13backwardsWavePiS_S_S_S_S_S_
; %bb.0:
	s_load_b128 s[8:11], s[0:1], 0x20
	v_lshl_add_u32 v0, s15, 9, v0
	s_mov_b32 s12, exec_lo
	s_waitcnt lgkmcnt(0)
	s_load_b32 s14, s[10:11], 0x0
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v1, 31, v0
	s_waitcnt lgkmcnt(0)
	v_mov_b32_e32 v6, s14
	v_cmpx_gt_i32_e64 s14, v0
	s_cbranch_execz .LBB1_13
; %bb.1:
	v_lshlrev_b64 v[2:3], 2, v[0:1]
	v_mov_b32_e32 v6, s14
	s_mov_b32 s13, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
	global_load_b32 v4, v[4:5], off
	s_waitcnt vmcnt(0)
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB1_12
; %bb.2:                                ; %.preheader
	s_load_b64 s[2:3], s[0:1], 0x30
	v_mov_b32_e32 v6, s14
	s_waitcnt lgkmcnt(0)
	s_load_b32 s2, s[2:3], 0x0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s15, s2, s14
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lt_i32 s15, 1
	s_cbranch_scc1 .LBB1_12
; %bb.3:                                ; %.lr.ph.preheader
	s_ashr_i32 s16, s2, 31
	s_load_b64 s[0:1], s[0:1], 0x10
	s_add_i32 s2, s2, s16
	s_mov_b32 s18, 0
	s_xor_b32 s17, s2, s16
	s_mov_b32 s21, 0
	v_cvt_f32_u32_e32 v4, s17
	s_sub_i32 s3, 0, s17
                                        ; implicit-def: $sgpr20
                                        ; implicit-def: $sgpr22
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v4, v4
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v4, 0x4f7ffffe, v4
	v_cvt_u32_f32_e32 v4, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s2, v4
	s_mul_i32 s3, s3, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s3, s2, s3
	s_add_i32 s19, s2, s3
.LBB1_4:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_waitcnt lgkmcnt(0)
	s_load_b32 s2, s[0:1], 0x0
                                        ; implicit-def: $sgpr25
	s_waitcnt lgkmcnt(0)
	v_cmp_ne_u32_e64 s23, s2, v0
	v_cmp_eq_u32_e32 vcc_lo, s2, v0
                                        ; implicit-def: $sgpr2_sgpr3
	s_and_saveexec_b32 s24, vcc_lo
	s_cbranch_execz .LBB1_6
; %bb.5:                                ;   in Loop: Header=BB1_4 Depth=1
	s_mul_hi_u32 s2, s21, s19
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_mul_i32 s3, s2, s17
	s_add_i32 s25, s2, 1
	s_sub_i32 s3, s21, s3
	s_sub_i32 s26, s3, s17
	s_cmp_ge_u32 s3, s17
	s_cselect_b32 s2, s25, s2
	s_cselect_b32 s3, s26, s3
	s_add_i32 s25, s2, 1
	s_cmp_ge_u32 s3, s17
	s_cselect_b32 s2, s25, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s2, s2, s16
	s_sub_i32 s2, s2, s16
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s3, s2, 31
	s_lshl_b64 s[26:27], s[2:3], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s26, s4, s26
	s_addc_u32 s27, s5, s27
	s_load_b32 s25, s[26:27], 0x0
	s_waitcnt lgkmcnt(0)
	s_cmp_lg_u32 s25, 1
	s_cselect_b32 s25, -1, 0
	s_and_not1_b32 s23, s23, exec_lo
	s_and_b32 s26, s25, exec_lo
	s_mov_b32 s25, -1
	s_or_b32 s23, s23, s26
.LBB1_6:                                ; %Flow57
                                        ;   in Loop: Header=BB1_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s24
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 s22, s22, exec_lo
	s_and_b32 s25, s25, exec_lo
	s_mov_b32 s24, -1
	s_or_b32 s22, s22, s25
	s_and_saveexec_b32 s25, s23
; %bb.7:                                ; %.critedge
                                        ;   in Loop: Header=BB1_4 Depth=1
	s_add_i32 s21, s21, 1
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmp_eq_u32 s15, s21
	s_cselect_b32 s23, -1, 0
	s_and_not1_b32 s22, s22, exec_lo
	s_or_not1_b32 s24, s23, exec_lo
; %bb.8:                                ; %Flow58
                                        ;   in Loop: Header=BB1_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s25
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s23, exec_lo, s24
	v_dual_mov_b32 v6, s14 :: v_dual_mov_b32 v5, s3
	s_or_b32 s18, s23, s18
	v_mov_b32_e32 v4, s2
	s_and_not1_b32 s2, s20, exec_lo
	s_and_b32 s3, s22, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s20, s2, s3
	s_and_not1_b32 exec_lo, exec_lo, s18
	s_cbranch_execnz .LBB1_4
; %bb.9:                                ; %loop.exit.guard
	s_or_b32 exec_lo, exec_lo, s18
	s_and_saveexec_b32 s0, s20
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s0, exec_lo, s0
	s_cbranch_execz .LBB1_11
; %bb.10:
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	v_add_co_u32 v6, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v3, vcc_lo
	v_dual_mov_b32 v8, 1 :: v_dual_mov_b32 v9, 0
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v4, vcc_lo, s8, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s9, v5, vcc_lo
	global_atomic_cmpswap_b32 v[6:7], v[8:9], off
	v_add_co_u32 v2, vcc_lo, s8, v2
	global_load_b32 v4, v[4:5], off
	v_add_co_ci_u32_e32 v3, vcc_lo, s9, v3, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v4, 1, v4
	global_store_b32 v[2:3], v4, off
	global_load_b32 v6, v9, s[10:11]
.LBB1_11:                               ; %Flow56
	s_or_b32 exec_lo, exec_lo, s0
.LBB1_12:                               ; %Flow60
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s13
.LBB1_13:                               ; %.loopexit
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s12
	s_mov_b32 s0, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e64 v0, v6
	s_cbranch_execz .LBB1_16
; %bb.14:
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, 2, v2
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_16
; %bb.15:
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_mov_b32_e32 v2, 2
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB1_16:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13backwardsWavePiS_S_S_S_S_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 56
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 28
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z13backwardsWavePiS_S_S_S_S_S_, .Lfunc_end1-_Z13backwardsWavePiS_S_S_S_S_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 748
; NumSgprs: 30
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 30
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z20childListExploreWavePiS_S_S_S_S_S_ ; -- Begin function _Z20childListExploreWavePiS_S_S_S_S_S_
	.globl	_Z20childListExploreWavePiS_S_S_S_S_S_
	.p2align	8
	.type	_Z20childListExploreWavePiS_S_S_S_S_S_,@function
_Z20childListExploreWavePiS_S_S_S_S_S_: ; @_Z20childListExploreWavePiS_S_S_S_S_S_
; %bb.0:
	s_load_b128 s[16:19], s[0:1], 0x20
	v_lshl_add_u32 v0, s15, 9, v0
	s_mov_b32 s12, exec_lo
	s_waitcnt lgkmcnt(0)
	s_load_b32 s14, s[18:19], 0x0
	s_load_b256 s[4:11], s[0:1], 0x0
	v_ashrrev_i32_e32 v1, 31, v0
	s_waitcnt lgkmcnt(0)
	v_mov_b32_e32 v4, s14
	v_cmpx_gt_i32_e64 s14, v0
	s_cbranch_execz .LBB2_10
; %bb.1:
	v_lshlrev_b64 v[2:3], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
	global_load_b32 v4, v[4:5], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, 1, v4
	v_mov_b32_e32 v4, s14
	s_and_saveexec_b32 s13, vcc_lo
	s_cbranch_execz .LBB2_9
; %bb.2:
	v_add_co_u32 v4, vcc_lo, s10, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s11, v3, vcc_lo
	s_load_b128 s[0:3], s[0:1], 0x30
	s_mov_b32 s11, 0
	s_mov_b32 s10, exec_lo
	global_load_b32 v8, v[4:5], off
	v_mov_b32_e32 v4, s14
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e32 0, v8
	s_cbranch_execz .LBB2_8
; %bb.3:                                ; %.lr.ph
	v_add_co_u32 v2, vcc_lo, s16, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s17, v3, vcc_lo
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v4, 1
	s_waitcnt lgkmcnt(0)
	s_mov_b64 s[2:3], 0
.LBB2_4:                                ; =>This Inner Loop Header: Depth=1
	global_load_b32 v6, v5, s[0:1]
	s_mov_b32 s14, exec_lo
	s_waitcnt vmcnt(0)
	v_mul_lo_u32 v6, v6, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v7, 31, v6
	v_add_co_u32 v6, vcc_lo, s2, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s3, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	v_add_co_u32 v6, vcc_lo, s8, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v7, vcc_lo
	global_load_b32 v6, v[6:7], off
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v7, 31, v6
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v9, vcc_lo, s6, v6
	v_add_co_ci_u32_e32 v10, vcc_lo, s7, v7, vcc_lo
	v_add_co_u32 v11, vcc_lo, s4, v6
	v_add_co_ci_u32_e32 v12, vcc_lo, s5, v7, vcc_lo
	global_atomic_cmpswap_b32 v[9:10], v[4:5], off
	global_load_b32 v9, v[11:12], off
	s_waitcnt vmcnt(0)
	v_cmpx_eq_u32_e32 0, v9
	s_cbranch_execz .LBB2_6
; %bb.5:                                ;   in Loop: Header=BB2_4 Depth=1
	global_load_b32 v9, v[2:3], off
	v_add_co_u32 v6, vcc_lo, s16, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s17, v7, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v9, 1, v9
	global_store_b32 v[6:7], v9, off
.LBB2_6:                                ;   in Loop: Header=BB2_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s14
	s_add_u32 s2, s2, 1
	s_addc_u32 s3, s3, 0
	v_cmp_eq_u32_e32 vcc_lo, s2, v8
	s_or_b32 s11, vcc_lo, s11
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB2_4
; %bb.7:                                ; %.loopexit.loopexit
	s_or_b32 exec_lo, exec_lo, s11
	v_mov_b32_e32 v2, 0
	global_load_b32 v4, v2, s[18:19]
.LBB2_8:                                ; %Flow56
	s_or_b32 exec_lo, exec_lo, s10
.LBB2_9:                                ; %Flow57
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s13
.LBB2_10:                               ; %.loopexit
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s12
	s_waitcnt lgkmcnt(0)
	s_mov_b32 s0, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e64 v0, v4
	s_cbranch_execz .LBB2_13
; %bb.11:
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, 2, v2
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_13
; %bb.12:
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_mov_b32_e32 v2, 2
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB2_13:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z20childListExploreWavePiS_S_S_S_S_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 56
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 13
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z20childListExploreWavePiS_S_S_S_S_S_, .Lfunc_end2-_Z20childListExploreWavePiS_S_S_S_S_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 560
; NumSgprs: 22
; NumVgprs: 13
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 13
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z11exploreWavePiS_P4NodeS_S_S_S_ ; -- Begin function _Z11exploreWavePiS_P4NodeS_S_S_S_
	.globl	_Z11exploreWavePiS_P4NodeS_S_S_S_
	.p2align	8
	.type	_Z11exploreWavePiS_P4NodeS_S_S_S_,@function
_Z11exploreWavePiS_P4NodeS_S_S_S_:      ; @_Z11exploreWavePiS_P4NodeS_S_S_S_
; %bb.0:
	s_load_b128 s[16:19], s[0:1], 0x20
	v_lshl_add_u32 v0, s15, 9, v0
	s_mov_b32 s12, exec_lo
	s_waitcnt lgkmcnt(0)
	s_load_b32 s14, s[18:19], 0x0
	s_load_b256 s[4:11], s[0:1], 0x0
	v_ashrrev_i32_e32 v1, 31, v0
	s_waitcnt lgkmcnt(0)
	v_mov_b32_e32 v4, s14
	v_cmpx_gt_i32_e64 s14, v0
	s_cbranch_execz .LBB3_10
; %bb.1:
	v_lshlrev_b64 v[2:3], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
	global_load_b32 v4, v[4:5], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, 1, v4
	v_mov_b32_e32 v4, s14
	s_and_saveexec_b32 s13, vcc_lo
	s_cbranch_execz .LBB3_9
; %bb.2:
	v_mad_i64_i32 v[4:5], null, v0, 24, s[8:9]
	s_load_b128 s[0:3], s[0:1], 0x30
	s_mov_b32 s9, 0
	s_mov_b32 s8, exec_lo
	global_load_b32 v8, v[4:5], off offset:16
	v_mov_b32_e32 v4, s14
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e32 0, v8
	s_cbranch_execz .LBB3_8
; %bb.3:                                ; %.lr.ph
	v_add_co_u32 v2, vcc_lo, s16, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s17, v3, vcc_lo
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v4, 1
	s_waitcnt lgkmcnt(0)
	s_mov_b64 s[2:3], 0
.LBB3_4:                                ; =>This Inner Loop Header: Depth=1
	global_load_b32 v6, v5, s[0:1]
	s_mov_b32 s14, exec_lo
	s_waitcnt vmcnt(0)
	v_mul_lo_u32 v6, v6, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v7, 31, v6
	v_add_co_u32 v6, vcc_lo, s2, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s3, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	v_add_co_u32 v6, vcc_lo, s10, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v7, vcc_lo, s11, v7, vcc_lo
	global_load_b32 v6, v[6:7], off
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v7, 31, v6
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v9, vcc_lo, s6, v6
	v_add_co_ci_u32_e32 v10, vcc_lo, s7, v7, vcc_lo
	v_add_co_u32 v11, vcc_lo, s4, v6
	v_add_co_ci_u32_e32 v12, vcc_lo, s5, v7, vcc_lo
	global_atomic_cmpswap_b32 v[9:10], v[4:5], off
	global_load_b32 v9, v[11:12], off
	s_waitcnt vmcnt(0)
	v_cmpx_eq_u32_e32 0, v9
	s_cbranch_execz .LBB3_6
; %bb.5:                                ;   in Loop: Header=BB3_4 Depth=1
	global_load_b32 v9, v[2:3], off
	v_add_co_u32 v6, vcc_lo, s16, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s17, v7, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v9, 1, v9
	global_store_b32 v[6:7], v9, off
.LBB3_6:                                ;   in Loop: Header=BB3_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s14
	s_add_u32 s2, s2, 1
	s_addc_u32 s3, s3, 0
	v_cmp_eq_u32_e32 vcc_lo, s2, v8
	s_or_b32 s9, vcc_lo, s9
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s9
	s_cbranch_execnz .LBB3_4
; %bb.7:                                ; %.loopexit.loopexit
	s_or_b32 exec_lo, exec_lo, s9
	v_mov_b32_e32 v2, 0
	global_load_b32 v4, v2, s[18:19]
.LBB3_8:                                ; %Flow56
	s_or_b32 exec_lo, exec_lo, s8
.LBB3_9:                                ; %Flow57
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s13
.LBB3_10:                               ; %.loopexit
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s12
	s_waitcnt lgkmcnt(0)
	s_mov_b32 s0, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e64 v0, v4
	s_cbranch_execz .LBB3_13
; %bb.11:
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, 2, v2
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB3_13
; %bb.12:
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_mov_b32_e32 v2, 2
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB3_13:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11exploreWavePiS_P4NodeS_S_S_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 56
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 13
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z11exploreWavePiS_P4NodeS_S_S_S_, .Lfunc_end3-_Z11exploreWavePiS_P4NodeS_S_S_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 556
; NumSgprs: 22
; NumVgprs: 13
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 13
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z19setPreviousExploredPiS_S_ ; -- Begin function _Z19setPreviousExploredPiS_S_
	.globl	_Z19setPreviousExploredPiS_S_
	.p2align	8
	.type	_Z19setPreviousExploredPiS_S_,@function
_Z19setPreviousExploredPiS_S_:          ; @_Z19setPreviousExploredPiS_S_
; %bb.0:
	s_load_b64 s[2:3], s[0:1], 0x10
	v_lshl_add_u32 v0, s15, 9, v0
	s_waitcnt lgkmcnt(0)
	s_load_b32 s2, s[2:3], 0x0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_i32_e32 vcc_lo, s2, v0
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB4_3
; %bb.1:
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, 1, v2
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB4_3
; %bb.2:
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_mov_b32_e32 v2, 2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB4_3:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z19setPreviousExploredPiS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 24
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end4:
	.size	_Z19setPreviousExploredPiS_S_, .Lfunc_end4-_Z19setPreviousExploredPiS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 152
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 48
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z23parentListBackwardsWavePiS_S_S_S_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     22
    .sgpr_spill_count: 0
    .symbol:         _Z23parentListBackwardsWavePiS_S_S_S_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     11
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 56
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z13backwardsWavePiS_S_S_S_S_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     30
    .sgpr_spill_count: 0
    .symbol:         _Z13backwardsWavePiS_S_S_S_S_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 56
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z20childListExploreWavePiS_S_S_S_S_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     22
    .sgpr_spill_count: 0
    .symbol:         _Z20childListExploreWavePiS_S_S_S_S_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     13
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 56
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11exploreWavePiS_P4NodeS_S_S_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     22
    .sgpr_spill_count: 0
    .symbol:         _Z11exploreWavePiS_P4NodeS_S_S_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     13
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 24
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z19setPreviousExploredPiS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z19setPreviousExploredPiS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     4
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
