#include <iostream>
#include <vector>
//#include <cstdio> - uncomment for printf in kernels
//#include <cuda_runtime.h>
//cuda is included automatically when compiling with nvcc

typedef double REAL_T;

//-----------------------------------------------------------------------------
class CUDAEventTimer {
public:
  CUDAEventTimer() {
    cudaEventCreate(&start_);
    cudaEventCreate(&stop_);
  }
  ~CUDAEventTimer() {
    cudaEventDestroy(start_);
    cudaEventDestroy(stop_);
  }
  void start(cudaStream_t stream = 0) { 
    stream_ = stream;
    cudaEventRecord(start_, stream_);
  } 
  void stop() { 
    cudaEventRecord(stop_, stream_); 
    cudaEventSynchronize(stop_);
  }
  float elapsed() {
    float elapsed = 0;
    cudaEventElapsedTime(&elapsed, start_, stop_);
    return elapsed;
  }
private:
  cudaEvent_t start_, stop_;
  cudaStream_t stream_;
};


int compute_blocks(int length, int threads_per_block) {
    //integer division:
    //if length is evenly divisable by the number of threads
    //is equivalent to length / threads_per_block, if not
    //it is equivalent to length / threads_per_block  + 1
    return (length + threads_per_block - 1) / threads_per_block;
}

dim3 compute_blocks(int xsize, int ysize, int zsize,
                    int threads_per_block_x,
                    int threads_per_block_y,
                    int threads_per_block_z) {
    return dim3(compute_blocks(xsize, threads_per_block_x),
                compute_blocks(ysize, threads_per_block_y),
                compute_blocks(zsize, threads_per_block_z));
}


//-----------------------------------------------------------------------------
__device__  REAL_T cell_op( REAL_T v) {
    return cos(v) * exp(v);
}

//-----------------------------------------------------------------------------
__global__ void cuda_kernel(REAL_T* grid,
                            dim3 size, 
                            int x_offset,
                            int y_offset,
                            int z_offset) {
   
    const int i = blockIdx.x * blockDim.x + threadIdx.x;// + x_offset;
    const int j = blockIdx.y * blockDim.y + threadIdx.y;// + y_offset;
    const int k = blockIdx.z * blockDim.z + threadIdx.z;// + z_offset;
    if( i >= size.x || j >= size.y || k >= size.z ) return;
    const int index = i + size.x * (j + size.y * k); 
    grid[ index ] = cell_op( grid[ index ] );

}

typedef long long int CYCLES;
__global__ void cuda_kernel_cycles(CYCLES cycles){
    const CYCLES start = clock64();
    while( (clock64() - start) < cycles );
}


//-----------------------------------------------------------------------------
int main(int argc, char** argv) {
    if(argc < 5) {
        std::cout << "usage: " << argv[0] 
                  << " xsize ysize zsize threads_per_block [kernel duration(ms)]\n";
        return 1;
    }
    const int XSIZE = atoi(argv[1]);
    const int YSIZE = atoi(argv[2]);
    const int ZSIZE = atoi(argv[3]);
    const int CUDA_THREADS_PER_BLOCK = atoi(argv[4]);
    const size_t TOTAL_SIZE = XSIZE * YSIZE * ZSIZE;
    const size_t TOTAL_BYTE_SIZE = TOTAL_SIZE * sizeof(REAL_T);

    bool use_cycles = false;
    int time_ms = 0;
    CYCLES cycles = 0;
    if( argc > 5 ) {
        time_ms = atoi(argv[5]);
        use_cycles = true;
    }


    // get clock rate in kHz
    cudaDeviceProp props;
    if( cudaGetDeviceProperties(&props, 0) != cudaSuccess ) return -1;
    const unsigned int CLOCK_RATE_Hz = props.clockRate * 1000;
    std::cout << "Clock rate (GHz): " 
              << CLOCK_RATE_Hz / double(1024 * 1024 * 1024)
              << std::endl;
    cycles = CLOCK_RATE_Hz * (time_ms / 1000.0);

    // 3D grid setup
    std::vector<  REAL_T > h_grid(TOTAL_SIZE, REAL_T(0));
    REAL_T* d_grid = 0;
    if( cudaMalloc(&d_grid, 2*TOTAL_BYTE_SIZE) != cudaSuccess ) return -2;
    if( cudaMemcpy(d_grid, &h_grid[0], TOTAL_BYTE_SIZE, cudaMemcpyHostToDevice)
        != cudaSuccess ) return -3;

    // launch configuration
    const dim3 CUDA_THREADS = dim3(CUDA_THREADS_PER_BLOCK,
                                   CUDA_THREADS_PER_BLOCK,
                                   CUDA_THREADS_PER_BLOCK);
    const dim3 CUDA_BLOCKS = compute_blocks(XSIZE, YSIZE, ZSIZE,
                                            CUDA_THREADS_PER_BLOCK,
                                            CUDA_THREADS_PER_BLOCK,
                                            CUDA_THREADS_PER_BLOCK); 
    int x_offset = 0;
    int y_offset = 0;
    int z_offset = 0;
    const dim3 GRID_SIZE = dim3(XSIZE, YSIZE, ZSIZE);
    cudaDeviceSynchronize();
    // launch one kernel encompassing the entire grid...
    std::cout << "Launching kernel:\n" 
              << "  Grid size: "
              << GRID_SIZE.x << ", " << GRID_SIZE.y << ", " << GRID_SIZE.z << std::endl
              << "  Block size: "
              << CUDA_BLOCKS.x << ", " << CUDA_BLOCKS.y << ", " << CUDA_BLOCKS.z << std::endl;  
    CUDAEventTimer timer;
    timer.start();
    if( use_cycles ) {
        cuda_kernel_cycles<<< CUDA_BLOCKS, CUDA_THREADS >>>(cycles);
    } else {
        cuda_kernel<<< CUDA_BLOCKS, CUDA_THREADS >>>(d_grid,
                                                     GRID_SIZE,  
                                                     x_offset,
                                                     y_offset,
                                                     z_offset);
    }

    timer.stop();
    const float single_elapsed = timer.elapsed();
    std::cout << "Single kernel launch: " << single_elapsed << std::endl;
                                        
    // ...and multiple time the same kernel on the same grid
    std::cout << "Launching kernel:\n" 
              << "  Grid size: "
              << GRID_SIZE.x << ", " << GRID_SIZE.y << ", " << GRID_SIZE.z << std::endl
              << "  Block size: 1, 1, 1" << std::endl;
    cudaDeviceSynchronize();  
    timer.start();
    for( int k = 0; k != CUDA_BLOCKS.z; ++k ) {
        z_offset = k * CUDA_THREADS.z; 
        for( int j = 0; j != CUDA_BLOCKS.y; ++j ) {
            y_offset = j * CUDA_THREADS.y;
            for( int i = 0; i != CUDA_BLOCKS.x; ++i ) {
                x_offset = i * CUDA_THREADS.x;
                if( use_cycles ) {
                    cuda_kernel_cycles<<< 1, CUDA_THREADS >>>(cycles);
                } else {
                    cuda_kernel<<< 1, CUDA_THREADS >>>(d_grid, GRID_SIZE,
                                                       x_offset, y_offset, z_offset);

                }
            }
        }
    }
    timer.stop();
    const float multiple_elapsed = timer.elapsed();
    std::cout << "Multiple kernel launches: " << multiple_elapsed << std::endl;

    std::cout << "Multiple/Single %: " << 100 * multiple_elapsed / single_elapsed << std::endl;

    // cleanup
    cudaFree(d_grid);
    return 0;
}
	.file	"tmpxft_0024c1a4_00000000-6_cuda_blocking.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4013:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4013:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.text._ZN14CUDAEventTimer4stopEv,"axG",@progbits,_ZN14CUDAEventTimer4stopEv,comdat
	.align 2
	.weak	_ZN14CUDAEventTimer4stopEv
	.type	_ZN14CUDAEventTimer4stopEv, @function
_ZN14CUDAEventTimer4stopEv:
.LFB4005:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	movq	16(%rdi), %rsi
	movq	8(%rdi), %rdi
	call	cudaEventRecord@PLT
	movq	8(%rbx), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	cudaEventSynchronize@PLT
	.cfi_endproc
.LFE4005:
	.size	_ZN14CUDAEventTimer4stopEv, .-_ZN14CUDAEventTimer4stopEv
	.text
	.globl	_Z14compute_blocksii
	.type	_Z14compute_blocksii, @function
_Z14compute_blocksii:
.LFB4007:
	.cfi_startproc
	endbr64
	leal	-1(%rsi,%rdi), %eax
	cltd
	idivl	%esi
	ret
	.cfi_endproc
.LFE4007:
	.size	_Z14compute_blocksii, .-_Z14compute_blocksii
	.globl	_Z14compute_blocksiiiiii
	.type	_Z14compute_blocksiiiiii, @function
_Z14compute_blocksiiiiii:
.LFB4008:
	.cfi_startproc
	endbr64
	leal	-1(%rcx,%rdi), %eax
	movl	%edx, %r10d
	cltd
	idivl	%ecx
	movl	%eax, -20(%rsp)
	leal	-1(%r8,%rsi), %eax
	leal	-1(%r9,%r10), %esi
	cltd
	idivl	%r8d
	movl	%eax, -16(%rsp)
	movl	%esi, %eax
	cltd
	idivl	%r9d
	movq	%rax, %rcx
	movq	-20(%rsp), %rax
	movq	%rcx, %rdx
	ret
	.cfi_endproc
.LFE4008:
	.size	_Z14compute_blocksiiiiii, .-_Z14compute_blocksiiiiii
	.globl	_Z7cell_opd
	.type	_Z7cell_opd, @function
_Z7cell_opd:
.LFB4009:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE4009:
	.size	_Z7cell_opd, .-_Z7cell_opd
	.globl	_Z39__device_stub__Z11cuda_kernelPd4dim3iiiPdR4dim3iii
	.type	_Z39__device_stub__Z11cuda_kernelPd4dim3iiiPdR4dim3iii, @function
_Z39__device_stub__Z11cuda_kernelPd4dim3iiiPdR4dim3iii:
.LFB4035:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movl	%edx, 20(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 16(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movq	%rsi, 104(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rax, 96(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movl	$1, 56(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z11cuda_kernelPd4dim3iii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L8:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4035:
	.size	_Z39__device_stub__Z11cuda_kernelPd4dim3iiiPdR4dim3iii, .-_Z39__device_stub__Z11cuda_kernelPd4dim3iiiPdR4dim3iii
	.globl	_Z11cuda_kernelPd4dim3iii
	.type	_Z11cuda_kernelPd4dim3iii, @function
_Z11cuda_kernelPd4dim3iii:
.LFB4036:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	%edx, %eax
	movl	%ecx, %edx
	movl	%r8d, %ecx
	movq	%rsi, (%rsp)
	movl	%r9d, %r8d
	movq	%rsp, %rsi
	movl	%eax, 8(%rsp)
	call	_Z39__device_stub__Z11cuda_kernelPd4dim3iiiPdR4dim3iii
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4036:
	.size	_Z11cuda_kernelPd4dim3iii, .-_Z11cuda_kernelPd4dim3iii
	.globl	_Z37__device_stub__Z18cuda_kernel_cyclesxx
	.type	_Z37__device_stub__Z18cuda_kernel_cyclesxx, @function
_Z37__device_stub__Z18cuda_kernel_cyclesxx:
.LFB4037:
	.cfi_startproc
	endbr64
	subq	$104, %rsp
	.cfi_def_cfa_offset 112
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	leaq	44(%rsp), %rsi
	leaq	32(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	pushq	24(%rsp)
	.cfi_def_cfa_offset 120
	leaq	_Z18cuda_kernel_cyclesx(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 128
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 120
	popq	%rdx
	.cfi_def_cfa_offset 112
.L15:
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L17
	call	__stack_chk_fail@PLT
.L17:
	addq	$104, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4037:
	.size	_Z37__device_stub__Z18cuda_kernel_cyclesxx, .-_Z37__device_stub__Z18cuda_kernel_cyclesxx
	.globl	_Z18cuda_kernel_cyclesx
	.type	_Z18cuda_kernel_cyclesx, @function
_Z18cuda_kernel_cyclesx:
.LFB4038:
	.cfi_startproc
	endbr64
	jmp	_Z37__device_stub__Z18cuda_kernel_cyclesxx
	.cfi_endproc
.LFE4038:
	.size	_Z18cuda_kernel_cyclesx, .-_Z18cuda_kernel_cyclesx
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z18cuda_kernel_cyclesx"
.LC1:
	.string	"_Z11cuda_kernelPd4dim3iii"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4040:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z18cuda_kernel_cyclesx(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC1(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z11cuda_kernelPd4dim3iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4040:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.text._ZNSt6vectorIdSaIdEED2Ev,"axG",@progbits,_ZNSt6vectorIdSaIdEED5Ev,comdat
	.align 2
	.weak	_ZNSt6vectorIdSaIdEED2Ev
	.type	_ZNSt6vectorIdSaIdEED2Ev, @function
_ZNSt6vectorIdSaIdEED2Ev:
.LFB4354:
	.cfi_startproc
	endbr64
	movq	(%rdi), %rax
	testq	%rax, %rax
	je	.L22
	movq	16(%rdi), %rsi
	movq	%rax, %rdi
	subq	%rax, %rsi
	jmp	_ZdlPvm@PLT
.L22:
	ret
	.cfi_endproc
.LFE4354:
	.size	_ZNSt6vectorIdSaIdEED2Ev, .-_ZNSt6vectorIdSaIdEED2Ev
	.weak	_ZNSt6vectorIdSaIdEED1Ev
	.set	_ZNSt6vectorIdSaIdEED1Ev,_ZNSt6vectorIdSaIdEED2Ev
	.section	.rodata.str1.1
.LC2:
	.string	"usage: "
.LC3:
	.string	" xsize ysize zsize threads_per_block [kernel duration(ms)]\n"
.LC4:
	.string	"Clock rate (GHz): "
.LC6:
	.string	"cannot create std::vector larger than max_size()"
.LC8:
	.string	"Launching kernel:\n"
.LC9:
	.string	"  Grid size: "
.LC10:
	.string	", "
.LC11:
	.string	"  Block size: "
.LC14:
	.string	"Single kernel launch: "
.LC15:
	.string	"  Block size: 1, 1, 1"
.LC16:
	.string	"Multiple kernel launches: "
.LC17:
	.string	"Multiple/Single %: "
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB4010:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA4010
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rsi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$1224, %rsp
	.cfi_def_cfa_offset 1280
	movq	%fs:40, %rax
	movq	%rax, 1208(%rsp)
	xorl	%eax, %eax
	cmpl	$4, %edi
	jg	.L25
	leaq	.LC2(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	movl	$1, %ebx
.LEHB0:
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	(%r14), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC3(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	jmp	.L24
.L25:
	movl	%edi, %r15d
	movq	8(%rsi), %rdi
	call	atoi@PLT
	movq	16(%r14), %rdi
	movl	%eax, %r13d
	call	atoi@PLT
	movl	%r13d, %ebx
	movq	24(%r14), %rdi
	movl	%eax, %r12d
	call	atoi@PLT
	imull	%r12d, %ebx
	movq	32(%r14), %rdi
	movl	%eax, %ebp
	call	atoi@PLT
	imull	%ebp, %ebx
	movl	%eax, 8(%rsp)
	movslq	%ebx, %rbx
	leaq	0(,%rbx,8), %rax
	movq	%rax, 16(%rsp)
	cmpl	$5, %r15d
	je	.L56
	movq	40(%r14), %rdi
	call	atoi@PLT
	movb	$1, 15(%rsp)
	movl	%eax, %r15d
	jmp	.L27
.L56:
	movb	$0, 15(%rsp)
	xorl	%r15d, %r15d
.L27:
	xorl	%esi, %esi
	leaq	176(%rsp), %rdi
	call	cudaGetDeviceProperties_v2@PLT
	testl	%eax, %eax
	jne	.L57
	leaq	.LC4(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	imull	$1000, 524(%rsp), %r14d
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	.LC5(%rip), %xmm0
	movq	%rax, %rdi
	cvtsi2sdq	%r14, %xmm1
	mulsd	%xmm1, %xmm0
	movsd	%xmm1, 24(%rsp)
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E@PLT
	movabsq	$1152921504606846975, %rax
	cmpq	%rbx, %rax
	jnb	.L30
	movq	1208(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L67
	leaq	.LC6(%rip), %rdi
	call	_ZSt20__throw_length_errorPKc@PLT
.L30:
	xorl	%r14d, %r14d
	testq	%rbx, %rbx
	je	.L32
	movq	16(%rsp), %rdi
	call	_Znwm@PLT
.LEHE0:
	movq	%rax, %r14
.L32:
	movq	16(%rsp), %rax
	movq	%r14, 128(%rsp)
	movq	%r14, %rdx
	addq	%r14, %rax
	movq	%rax, 144(%rsp)
	testq	%rbx, %rbx
	je	.L68
.L34:
	cmpq	%rdx, %rax
	je	.L33
	movq	$0x000000000, (%rdx)
	addq	$8, %rdx
	jmp	.L34
.L68:
	movq	%r14, %rax
.L33:
	xorl	%edi, %edi
	salq	$4, %rbx
	movq	%rax, 136(%rsp)
	movq	%rdi, 56(%rsp)
	movq	%rbx, %rsi
	leaq	56(%rsp), %rdi
.LEHB1:
	call	cudaMalloc@PLT
	movl	$-2, %ebx
	testl	%eax, %eax
	jne	.L36
	movq	16(%rsp), %rdx
	movq	56(%rsp), %rdi
	movl	$1, %ecx
	movq	%r14, %rsi
	call	cudaMemcpy@PLT
	movl	$-3, %ebx
	testl	%eax, %eax
	jne	.L36
	movl	8(%rsp), %eax
	movl	%ebp, %edx
	movl	%r12d, %esi
	movl	%r13d, %edi
	movl	%eax, %r9d
	movl	%eax, %r8d
	movl	%eax, %ecx
	movl	%eax, 68(%rsp)
	movl	%eax, 72(%rsp)
	movl	%eax, 76(%rsp)
	call	_Z14compute_blocksiiiiii
	movl	%r13d, 92(%rsp)
	movq	%rax, 80(%rsp)
	movl	%edx, 88(%rsp)
	movl	%r12d, 96(%rsp)
	movl	%ebp, 100(%rsp)
	call	cudaDeviceSynchronize@PLT
	leaq	.LC8(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	leaq	.LC9(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	movq	%r13, %rsi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	leaq	.LC10(%rip), %rbx
	movq	%rax, %rdi
	movq	%rbx, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	movq	%r12, %rsi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	%rax, %rdi
	movq	%rbx, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	movq	%rbp, %rsi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E@PLT
	movq	%rax, %rdi
	leaq	.LC11(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	80(%rsp), %esi
	movq	%rax, %rdi
	movl	%esi, 16(%rsp)
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	%rax, %rdi
	movq	%rbx, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	84(%rsp), %esi
	movq	%rax, %rdi
	movq	%rsi, %r14
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	%rax, %rdi
	movq	%rbx, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	88(%rsp), %esi
	movq	%rax, %rdi
	movl	%esi, 32(%rsp)
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E@PLT
	leaq	152(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	160(%rsp), %rdi
	call	cudaEventCreate@PLT
.LEHE1:
	xorl	%esi, %esi
	movq	152(%rsp), %rdi
	movq	%rsi, 168(%rsp)
	xorl	%esi, %esi
.LEHB2:
	call	cudaEventRecord@PLT
	cvtsi2sdl	%r15d, %xmm0
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	cmpb	$0, 15(%rsp)
	divsd	.LC12(%rip), %xmm0
	mulsd	24(%rsp), %xmm0
	movq	68(%rsp), %rdx
	movl	76(%rsp), %ecx
	movq	80(%rsp), %rdi
	movl	88(%rsp), %esi
	cvttsd2siq	%xmm0, %rax
	movq	%rax, 24(%rsp)
	je	.L37
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L39
	movq	24(%rsp), %rdi
	call	_Z37__device_stub__Z18cuda_kernel_cyclesxx
	jmp	.L39
.L37:
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L39
	movq	92(%rsp), %rax
	movq	56(%rsp), %rdi
	xorl	%r8d, %r8d
	xorl	%ecx, %ecx
	leaq	104(%rsp), %rsi
	xorl	%edx, %edx
	movq	%rax, 104(%rsp)
	movl	100(%rsp), %eax
	movl	%eax, 112(%rsp)
	call	_Z39__device_stub__Z11cuda_kernelPd4dim3iiiPdR4dim3iii
.L39:
	leaq	152(%rsp), %rdi
	call	_ZN14CUDAEventTimer4stopEv
	movq	160(%rsp), %rdx
	movq	152(%rsp), %rsi
	leaq	48(%rsp), %rdi
	movl	$0x00000000, 48(%rsp)
	call	cudaEventElapsedTime@PLT
	movss	48(%rsp), %xmm3
	leaq	_ZSt4cout(%rip), %rbx
	leaq	.LC14(%rip), %rsi
	movq	%rbx, %rdi
	movss	%xmm3, 44(%rsp)
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	cvtss2sd	44(%rsp), %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E@PLT
	leaq	.LC8(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	leaq	.LC9(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	movq	%r13, %rsi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	leaq	.LC10(%rip), %rbx
	movq	%rax, %rdi
	movq	%rbx, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	movq	%r12, %rsi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	%rax, %rdi
	movq	%rbx, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	movq	%rbp, %rsi
	call	_ZNSo9_M_insertImEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E@PLT
	movq	%rax, %rdi
	leaq	.LC15(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E@PLT
	call	cudaDeviceSynchronize@PLT
	movq	152(%rsp), %rdi
	xorl	%ecx, %ecx
	xorl	%esi, %esi
	movq	%rcx, 168(%rsp)
	call	cudaEventRecord@PLT
	movabsq	$4294967297, %rbx
	xorl	%edx, %edx
	xorl	%r13d, %r13d
	movl	%edx, 36(%rsp)
.L41:
	movl	32(%rsp), %eax
	cmpl	%eax, %r13d
	je	.L69
	xorl	%eax, %eax
	xorl	%ebp, %ebp
	movl	%eax, 40(%rsp)
.L42:
	cmpl	%r14d, %ebp
	je	.L70
	xorl	%r15d, %r15d
	xorl	%r12d, %r12d
.L43:
	movl	16(%rsp), %eax
	cmpl	%eax, %r12d
	je	.L71
	cmpb	$0, 15(%rsp)
	movq	68(%rsp), %rdx
	movl	76(%rsp), %ecx
	je	.L44
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%rbx, 116(%rsp)
	movl	$1, 124(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L46
	movq	24(%rsp), %rdi
	call	_Z37__device_stub__Z18cuda_kernel_cyclesxx
	jmp	.L46
.L44:
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%rbx, 104(%rsp)
	movl	$1, 112(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L46
	movq	92(%rsp), %rax
	movl	36(%rsp), %r8d
	leaq	116(%rsp), %rsi
	movl	%r15d, %edx
	movl	40(%rsp), %ecx
	movq	56(%rsp), %rdi
	movq	%rax, 116(%rsp)
	movl	100(%rsp), %eax
	movl	%eax, 124(%rsp)
	call	_Z39__device_stub__Z11cuda_kernelPd4dim3iiiPdR4dim3iii
.L46:
	movl	8(%rsp), %eax
	incl	%r12d
	addl	%eax, %r15d
	jmp	.L43
.L71:
	movl	8(%rsp), %ecx
	incl	%ebp
	addl	%ecx, 40(%rsp)
	jmp	.L42
.L70:
	movl	8(%rsp), %ecx
	incl	%r13d
	addl	%ecx, 36(%rsp)
	jmp	.L41
.L69:
	leaq	152(%rsp), %rdi
	call	_ZN14CUDAEventTimer4stopEv
	movq	160(%rsp), %rdx
	movq	152(%rsp), %rsi
	leaq	52(%rsp), %rdi
	movl	$0x00000000, 52(%rsp)
	call	cudaEventElapsedTime@PLT
	leaq	_ZSt4cout(%rip), %rbp
	leaq	.LC16(%rip), %rsi
	movl	52(%rsp), %ebx
	movq	%rbp, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movd	%ebx, %xmm4
	movq	%rax, %rdi
	cvtss2sd	%xmm4, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E@PLT
	leaq	.LC17(%rip), %rsi
	movq	%rbp, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movd	%ebx, %xmm0
	movq	%rax, %rdi
	mulss	.LC18(%rip), %xmm0
	divss	44(%rsp), %xmm0
	cvtss2sd	%xmm0, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
.LEHE2:
	movq	152(%rsp), %rdi
	xorl	%ebx, %ebx
	call	cudaEventDestroy@PLT
	movq	160(%rsp), %rdi
	call	cudaEventDestroy@PLT
.L36:
	leaq	128(%rsp), %rdi
	call	_ZNSt6vectorIdSaIdEED1Ev
	jmp	.L24
.L57:
	orl	$-1, %ebx
	jmp	.L24
.L63:
	endbr64
	movq	%rax, %rbx
.L52:
	movq	152(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movq	160(%rsp), %rdi
	call	cudaEventDestroy@PLT
	jmp	.L53
.L62:
	endbr64
	movq	%rax, %rbx
.L53:
	leaq	128(%rsp), %rdi
	call	_ZNSt6vectorIdSaIdEED1Ev
	movq	1208(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L67
	movq	%rbx, %rdi
.LEHB3:
	call	_Unwind_Resume@PLT
.LEHE3:
.L24:
	movq	1208(%rsp), %rax
	subq	%fs:40, %rax
	je	.L55
.L67:
	call	__stack_chk_fail@PLT
.L55:
	addq	$1224, %rsp
	.cfi_def_cfa_offset 56
	movl	%ebx, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4010:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table,"a",@progbits
.LLSDA4010:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE4010-.LLSDACSB4010
.LLSDACSB4010:
	.uleb128 .LEHB0-.LFB4010
	.uleb128 .LEHE0-.LEHB0
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB1-.LFB4010
	.uleb128 .LEHE1-.LEHB1
	.uleb128 .L62-.LFB4010
	.uleb128 0
	.uleb128 .LEHB2-.LFB4010
	.uleb128 .LEHE2-.LEHB2
	.uleb128 .L63-.LFB4010
	.uleb128 0
	.uleb128 .LEHB3-.LFB4010
	.uleb128 .LEHE3-.LEHB3
	.uleb128 0
	.uleb128 0
.LLSDACSE4010:
	.section	.text.startup
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC5:
	.long	0
	.long	1041235968
	.align 8
.LC12:
	.long	0
	.long	1083129856
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC18:
	.long	1120403456
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <iostream>
#include <vector>
//#include <cstdio> - uncomment for printf in kernels
//#include <cuda_runtime.h>
//cuda is included automatically when compiling with nvcc

typedef double REAL_T;

//-----------------------------------------------------------------------------
class CUDAEventTimer {
public:
  CUDAEventTimer() {
    hipEventCreate(&start_);
    hipEventCreate(&stop_);
  }
  ~CUDAEventTimer() {
    hipEventDestroy(start_);
    hipEventDestroy(stop_);
  }
  void start(hipStream_t stream = 0) { 
    stream_ = stream;
    hipEventRecord(start_, stream_);
  } 
  void stop() { 
    hipEventRecord(stop_, stream_); 
    hipEventSynchronize(stop_);
  }
  float elapsed() {
    float elapsed = 0;
    hipEventElapsedTime(&elapsed, start_, stop_);
    return elapsed;
  }
private:
  hipEvent_t start_, stop_;
  hipStream_t stream_;
};


int compute_blocks(int length, int threads_per_block) {
    //integer division:
    //if length is evenly divisable by the number of threads
    //is equivalent to length / threads_per_block, if not
    //it is equivalent to length / threads_per_block  + 1
    return (length + threads_per_block - 1) / threads_per_block;
}

dim3 compute_blocks(int xsize, int ysize, int zsize,
                    int threads_per_block_x,
                    int threads_per_block_y,
                    int threads_per_block_z) {
    return dim3(compute_blocks(xsize, threads_per_block_x),
                compute_blocks(ysize, threads_per_block_y),
                compute_blocks(zsize, threads_per_block_z));
}


//-----------------------------------------------------------------------------
__device__  REAL_T cell_op( REAL_T v) {
    return cos(v) * exp(v);
}

//-----------------------------------------------------------------------------
__global__ void cuda_kernel(REAL_T* grid,
                            dim3 size, 
                            int x_offset,
                            int y_offset,
                            int z_offset) {
   
    const int i = blockIdx.x * blockDim.x + threadIdx.x;// + x_offset;
    const int j = blockIdx.y * blockDim.y + threadIdx.y;// + y_offset;
    const int k = blockIdx.z * blockDim.z + threadIdx.z;// + z_offset;
    if( i >= size.x || j >= size.y || k >= size.z ) return;
    const int index = i + size.x * (j + size.y * k); 
    grid[ index ] = cell_op( grid[ index ] );

}

typedef long long int CYCLES;
__global__ void cuda_kernel_cycles(CYCLES cycles){
    const CYCLES start = clock64();
    while( (clock64() - start) < cycles );
}


//-----------------------------------------------------------------------------
int main(int argc, char** argv) {
    if(argc < 5) {
        std::cout << "usage: " << argv[0] 
                  << " xsize ysize zsize threads_per_block [kernel duration(ms)]\n";
        return 1;
    }
    const int XSIZE = atoi(argv[1]);
    const int YSIZE = atoi(argv[2]);
    const int ZSIZE = atoi(argv[3]);
    const int CUDA_THREADS_PER_BLOCK = atoi(argv[4]);
    const size_t TOTAL_SIZE = XSIZE * YSIZE * ZSIZE;
    const size_t TOTAL_BYTE_SIZE = TOTAL_SIZE * sizeof(REAL_T);

    bool use_cycles = false;
    int time_ms = 0;
    CYCLES cycles = 0;
    if( argc > 5 ) {
        time_ms = atoi(argv[5]);
        use_cycles = true;
    }


    // get clock rate in kHz
    hipDeviceProp_t props;
    if( hipGetDeviceProperties(&props, 0) != hipSuccess ) return -1;
    const unsigned int CLOCK_RATE_Hz = props.clockRate * 1000;
    std::cout << "Clock rate (GHz): " 
              << CLOCK_RATE_Hz / double(1024 * 1024 * 1024)
              << std::endl;
    cycles = CLOCK_RATE_Hz * (time_ms / 1000.0);

    // 3D grid setup
    std::vector<  REAL_T > h_grid(TOTAL_SIZE, REAL_T(0));
    REAL_T* d_grid = 0;
    if( hipMalloc(&d_grid, 2*TOTAL_BYTE_SIZE) != hipSuccess ) return -2;
    if( hipMemcpy(d_grid, &h_grid[0], TOTAL_BYTE_SIZE, hipMemcpyHostToDevice)
        != hipSuccess ) return -3;

    // launch configuration
    const dim3 CUDA_THREADS = dim3(CUDA_THREADS_PER_BLOCK,
                                   CUDA_THREADS_PER_BLOCK,
                                   CUDA_THREADS_PER_BLOCK);
    const dim3 CUDA_BLOCKS = compute_blocks(XSIZE, YSIZE, ZSIZE,
                                            CUDA_THREADS_PER_BLOCK,
                                            CUDA_THREADS_PER_BLOCK,
                                            CUDA_THREADS_PER_BLOCK); 
    int x_offset = 0;
    int y_offset = 0;
    int z_offset = 0;
    const dim3 GRID_SIZE = dim3(XSIZE, YSIZE, ZSIZE);
    hipDeviceSynchronize();
    // launch one kernel encompassing the entire grid...
    std::cout << "Launching kernel:\n" 
              << "  Grid size: "
              << GRID_SIZE.x << ", " << GRID_SIZE.y << ", " << GRID_SIZE.z << std::endl
              << "  Block size: "
              << CUDA_BLOCKS.x << ", " << CUDA_BLOCKS.y << ", " << CUDA_BLOCKS.z << std::endl;  
    CUDAEventTimer timer;
    timer.start();
    if( use_cycles ) {
        cuda_kernel_cycles<<< CUDA_BLOCKS, CUDA_THREADS >>>(cycles);
    } else {
        cuda_kernel<<< CUDA_BLOCKS, CUDA_THREADS >>>(d_grid,
                                                     GRID_SIZE,  
                                                     x_offset,
                                                     y_offset,
                                                     z_offset);
    }

    timer.stop();
    const float single_elapsed = timer.elapsed();
    std::cout << "Single kernel launch: " << single_elapsed << std::endl;
                                        
    // ...and multiple time the same kernel on the same grid
    std::cout << "Launching kernel:\n" 
              << "  Grid size: "
              << GRID_SIZE.x << ", " << GRID_SIZE.y << ", " << GRID_SIZE.z << std::endl
              << "  Block size: 1, 1, 1" << std::endl;
    hipDeviceSynchronize();  
    timer.start();
    for( int k = 0; k != CUDA_BLOCKS.z; ++k ) {
        z_offset = k * CUDA_THREADS.z; 
        for( int j = 0; j != CUDA_BLOCKS.y; ++j ) {
            y_offset = j * CUDA_THREADS.y;
            for( int i = 0; i != CUDA_BLOCKS.x; ++i ) {
                x_offset = i * CUDA_THREADS.x;
                if( use_cycles ) {
                    cuda_kernel_cycles<<< 1, CUDA_THREADS >>>(cycles);
                } else {
                    cuda_kernel<<< 1, CUDA_THREADS >>>(d_grid, GRID_SIZE,
                                                       x_offset, y_offset, z_offset);

                }
            }
        }
    }
    timer.stop();
    const float multiple_elapsed = timer.elapsed();
    std::cout << "Multiple kernel launches: " << multiple_elapsed << std::endl;

    std::cout << "Multiple/Single %: " << 100 * multiple_elapsed / single_elapsed << std::endl;

    // cleanup
    hipFree(d_grid);
    return 0;
}
	.text
	.file	"cuda_blocking.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z14compute_blocksii            # -- Begin function _Z14compute_blocksii
	.type	_Z14compute_blocksii,@function
_Z14compute_blocksii:                   # @_Z14compute_blocksii
	.cfi_startproc
# %bb.0:
                                        # kill: def $esi killed $esi def $rsi
                                        # kill: def $edi killed $edi def $rdi
	leal	(%rdi,%rsi), %eax
	decl	%eax
	cltd
	idivl	%esi
	retq
.Lfunc_end0:
	.size	_Z14compute_blocksii, .Lfunc_end0-_Z14compute_blocksii
	.cfi_endproc
                                        # -- End function
	.globl	_Z14compute_blocksiiiiii        # -- Begin function _Z14compute_blocksiiiiii
	.type	_Z14compute_blocksiiiiii,@function
_Z14compute_blocksiiiiii:               # @_Z14compute_blocksiiiiii
	.cfi_startproc
# %bb.0:
                                        # kill: def $r9d killed $r9d def $r9
                                        # kill: def $r8d killed $r8d def $r8
                                        # kill: def $ecx killed $ecx def $rcx
	movl	%edx, %r10d
                                        # kill: def $esi killed $esi def $rsi
                                        # kill: def $edi killed $edi def $rdi
	leal	(%rdi,%rcx), %eax
	decl	%eax
	cltd
	idivl	%ecx
	movl	%eax, %ecx
	leal	(%rsi,%r8), %eax
	decl	%eax
	cltd
	idivl	%r8d
	movl	%eax, %esi
	leal	(%r10,%r9), %eax
	decl	%eax
	cltd
	idivl	%r9d
	movl	%eax, %edx
	shlq	$32, %rsi
	orq	%rsi, %rcx
	movq	%rcx, %rax
	retq
.Lfunc_end1:
	.size	_Z14compute_blocksiiiiii, .Lfunc_end1-_Z14compute_blocksiiiiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z26__device_stub__cuda_kernelPd4dim3iii # -- Begin function _Z26__device_stub__cuda_kernelPd4dim3iii
	.type	_Z26__device_stub__cuda_kernelPd4dim3iii,@function
_Z26__device_stub__cuda_kernelPd4dim3iii: # @_Z26__device_stub__cuda_kernelPd4dim3iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	80(%rsp), %rax
	movq	%rsi, (%rax)
	movl	%edx, 8(%rax)
	leaq	40(%rsp), %rdx
	movq	%rdi, (%rdx)
	leaq	20(%rsp), %rsi
	movl	%ecx, (%rsi)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %rdi
	movl	%r9d, (%rdi)
	leaq	96(%rsp), %rbx
	movq	%rdx, (%rbx)
	movq	%rax, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rcx, 24(%rbx)
	movq	%rdi, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11cuda_kernelPd4dim3iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z26__device_stub__cuda_kernelPd4dim3iii, .Lfunc_end2-_Z26__device_stub__cuda_kernelPd4dim3iii
	.cfi_endproc
                                        # -- End function
	.globl	_Z33__device_stub__cuda_kernel_cyclesx # -- Begin function _Z33__device_stub__cuda_kernel_cyclesx
	.type	_Z33__device_stub__cuda_kernel_cyclesx,@function
_Z33__device_stub__cuda_kernel_cyclesx: # @_Z33__device_stub__cuda_kernel_cyclesx
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	movq	%rsp, %rbx
	movq	%rax, (%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z18cuda_kernel_cyclesx, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$80, %rsp
	.cfi_adjust_cfa_offset -80
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z33__device_stub__cuda_kernel_cyclesx, .Lfunc_end3-_Z33__device_stub__cuda_kernel_cyclesx
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI4_0:
	.quad	0x3e10000000000000              # double 9.3132257461547852E-10
.LCPI4_1:
	.quad	0x408f400000000000              # double 1000
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0
.LCPI4_2:
	.long	0x42c80000                      # float 100
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$1624, %rsp                     # imm = 0x658
	.cfi_def_cfa_offset 1680
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %rbx
	cmpl	$4, %edi
	jg	.LBB4_6
# %bb.1:
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$7, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%rbx), %rbx
	testq	%rbx, %rbx
	je	.LBB4_2
# %bb.3:
	movq	%rbx, %rdi
	callq	strlen
	movl	$_ZSt4cout, %edi
	movq	%rbx, %rsi
	movq	%rax, %rdx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB4_4
.LBB4_6:
	movl	%edi, %ebp
	movq	8(%rbx), %rdi
	callq	atoi
	movl	%eax, %r13d
	movq	16(%rbx), %rdi
	callq	atoi
	movl	%eax, %r12d
	movq	24(%rbx), %rdi
	callq	atoi
                                        # kill: def $eax killed $eax def $rax
	movq	%rax, 48(%rsp)                  # 8-byte Spill
	movq	32(%rbx), %rdi
	callq	atoi
	movl	%eax, %r15d
	xorl	%r14d, %r14d
	cmpl	$5, %ebp
	je	.LBB4_8
# %bb.7:
	movq	40(%rbx), %rdi
	callq	atoi
	movl	%eax, %r14d
.LBB4_8:
	leaq	152(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipGetDevicePropertiesR0600
	movl	$-1, %ebx
	testl	%eax, %eax
	jne	.LBB4_5
# %bb.9:
	movl	%r14d, 88(%rsp)                 # 4-byte Spill
	movl	%ebp, 16(%rsp)                  # 4-byte Spill
	movl	%r12d, %eax
	imull	%r13d, %eax
	imull	48(%rsp), %eax                  # 4-byte Folded Reload
	movslq	%eax, %r14
	imull	$1000, 500(%rsp), %ebx          # imm = 0x3E8
	movl	$_ZSt4cout, %edi
	movl	$.L.str.2, %esi
	movl	$18, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	cvtsi2sd	%rbx, %xmm1
	movsd	.LCPI4_0(%rip), %xmm0           # xmm0 = mem[0],zero
	movsd	%xmm1, 104(%rsp)                # 8-byte Spill
	mulsd	%xmm1, %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	xorl	%ebp, %ebp
	leaq	24(%rsp), %rdx
	movq	%rbp, (%rdx)
	leaq	128(%rsp), %rdi
	leaq	56(%rsp), %rbx
	movq	%r14, %rsi
	movq	%rbx, %rcx
	callq	_ZNSt6vectorIdSaIdEEC2EmRKdRKS0_
	movq	%rbp, (%rbx)
	movq	%r14, %rsi
	shlq	$4, %rsi
.Ltmp0:
	leaq	56(%rsp), %rdi
	callq	hipMalloc
.Ltmp1:
# %bb.10:                               # %_ZL9hipMallocIdE10hipError_tPPT_m.exit
	movl	$-2, %ebx
	testl	%eax, %eax
	jne	.LBB4_95
# %bb.11:
	shlq	$3, %r14
	movq	56(%rsp), %rdi
	movq	128(%rsp), %rsi
.Ltmp2:
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp3:
# %bb.12:
	movl	$-3, %ebx
	testl	%eax, %eax
	jne	.LBB4_95
# %bb.13:
	leal	(%r15,%r13), %eax
	decl	%eax
	cltd
	idivl	%r15d
                                        # kill: def $eax killed $eax def $rax
	movq	%rax, 80(%rsp)                  # 8-byte Spill
	leal	(%r15,%r12), %eax
	decl	%eax
	cltd
	idivl	%r15d
                                        # kill: def $eax killed $eax def $rax
	movq	%rax, 72(%rsp)                  # 8-byte Spill
	movq	48(%rsp), %rax                  # 8-byte Reload
	addl	%r15d, %eax
	decl	%eax
	cltd
	idivl	%r15d
	movl	%eax, 12(%rsp)                  # 4-byte Spill
.Ltmp5:
	callq	hipDeviceSynchronize
.Ltmp6:
# %bb.14:
.Ltmp7:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.3, %esi
	movl	$18, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp8:
# %bb.15:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit134
.Ltmp9:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.4, %esi
	movl	$13, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp10:
# %bb.16:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit135
.Ltmp11:
	movl	%r13d, %r13d
	movl	$_ZSt4cout, %edi
	movq	%r13, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
.Ltmp12:
# %bb.17:                               # %_ZNSolsEj.exit
.Ltmp13:
	movq	%rax, %rbx
	movl	$.L.str.5, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp14:
# %bb.18:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit136
.Ltmp15:
	movl	%r12d, %r12d
	movq	%rbx, %rdi
	movq	%r12, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
.Ltmp16:
# %bb.19:                               # %_ZNSolsEj.exit137
.Ltmp17:
	movq	%rax, %rbx
	movl	$.L.str.5, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp18:
# %bb.20:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit138
	movl	48(%rsp), %ebp                  # 4-byte Reload
.Ltmp19:
	movq	%rbx, %rdi
	movq	%rbp, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
.Ltmp20:
# %bb.21:                               # %_ZNSolsEj.exit139
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
.Ltmp21:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp22:
# %bb.22:                               # %.noexc198
.Ltmp23:
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
.Ltmp24:
# %bb.23:                               # %.noexc199
.Ltmp25:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp26:
# %bb.24:                               # %_ZNSolsEPFRSoS_E.exit
.Ltmp27:
	movq	%rax, %rbx
	movl	$.L.str.6, %esi
	movl	$14, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp28:
# %bb.25:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit140
.Ltmp29:
	movq	%rbx, %rdi
	movq	80(%rsp), %rsi                  # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
.Ltmp30:
# %bb.26:                               # %_ZNSolsEj.exit141
.Ltmp31:
	movq	%rax, %rbx
	movl	$.L.str.5, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp32:
# %bb.27:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit142
.Ltmp33:
	movq	%rbx, %rdi
	movq	72(%rsp), %rsi                  # 8-byte Reload
	callq	_ZNSo9_M_insertImEERSoT_
.Ltmp34:
# %bb.28:                               # %_ZNSolsEj.exit143
.Ltmp35:
	movq	%rax, %rbx
	movl	$.L.str.5, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp36:
# %bb.29:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit144
	movl	12(%rsp), %esi                  # 4-byte Reload
.Ltmp37:
	movq	%rbx, %rdi
	callq	_ZNSo9_M_insertImEERSoT_
.Ltmp38:
# %bb.30:                               # %_ZNSolsEj.exit145
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
.Ltmp39:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp40:
# %bb.31:                               # %.noexc201
.Ltmp41:
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
.Ltmp42:
# %bb.32:                               # %.noexc202
.Ltmp43:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp44:
# %bb.33:                               # %_ZNSolsEPFRSoS_E.exit146
.Ltmp46:
	leaq	24(%rsp), %rdi
	callq	hipEventCreate
.Ltmp47:
	movl	16(%rsp), %ebx                  # 4-byte Reload
	movl	88(%rsp), %r14d                 # 4-byte Reload
# %bb.34:                               # %.noexc
	leaq	32(%rsp), %rdi
.Ltmp48:
	callq	hipEventCreate
.Ltmp49:
# %bb.35:                               # %_ZN14CUDAEventTimerC2Ev.exit
	movq	$0, 40(%rsp)
	movq	24(%rsp), %rdi
.Ltmp51:
	xorl	%esi, %esi
	callq	hipEventRecord
.Ltmp52:
# %bb.36:                               # %_ZN14CUDAEventTimer5startEP12ihipStream_t.exit
	cvtsi2sd	%r14d, %xmm0
	divsd	.LCPI4_1(%rip), %xmm0
	mulsd	104(%rsp), %xmm0                # 8-byte Folded Reload
	cvttsd2si	%xmm0, %rax
	movq	%rax, 120(%rsp)                 # 8-byte Spill
	movq	%r15, %rcx
	movl	%ecx, %eax
	movq	%rax, %r14
	shlq	$32, %r14
	orq	%rax, %r14
	movq	72(%rsp), %rdi                  # 8-byte Reload
	shlq	$32, %rdi
	addq	80(%rsp), %rdi                  # 8-byte Folded Reload
	movq	%r12, %rax
	shlq	$32, %rax
	orq	%r13, %rax
	movq	%rax, 112(%rsp)                 # 8-byte Spill
	cmpl	$5, %ebx
	jne	.LBB4_37
# %bb.43:
.Ltmp57:
	movl	12(%rsp), %esi                  # 4-byte Reload
	movq	%r14, %rdx
                                        # kill: def $ecx killed $ecx killed $rcx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp58:
# %bb.44:
	testl	%eax, %eax
	jne	.LBB4_46
# %bb.45:
	movq	56(%rsp), %rdi
.Ltmp59:
	movq	112(%rsp), %rsi                 # 8-byte Reload
	movq	48(%rsp), %rdx                  # 8-byte Reload
                                        # kill: def $edx killed $edx killed $rdx
	xorl	%ecx, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	_Z26__device_stub__cuda_kernelPd4dim3iii
.Ltmp60:
	jmp	.LBB4_46
.LBB4_2:
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rax
	leaq	_ZSt4cout(%rax), %rdi
	movl	32(%rdi), %esi
	orl	$1, %esi
	callq	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.LBB4_4:                                # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$59, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$1, %ebx
.LBB4_5:
	movl	%ebx, %eax
	addq	$1624, %rsp                     # imm = 0x658
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB4_37:
	.cfi_def_cfa_offset 1680
.Ltmp53:
	movl	12(%rsp), %esi                  # 4-byte Reload
	movq	%r14, %rdx
                                        # kill: def $ecx killed $ecx killed $rcx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp54:
# %bb.38:
	testl	%eax, %eax
	jne	.LBB4_46
# %bb.39:
.Ltmp55:
	movq	120(%rsp), %rdi                 # 8-byte Reload
	callq	_Z33__device_stub__cuda_kernel_cyclesx
.Ltmp56:
.LBB4_46:
	movq	32(%rsp), %rdi
	movq	40(%rsp), %rsi
.Ltmp61:
	callq	hipEventRecord
.Ltmp62:
# %bb.47:                               # %.noexc149
	movq	32(%rsp), %rdi
.Ltmp63:
	callq	hipEventSynchronize
.Ltmp64:
# %bb.48:                               # %_ZN14CUDAEventTimer4stopEv.exit
	movq	%r14, 88(%rsp)                  # 8-byte Spill
	leaq	20(%rsp), %rdi
	movl	$0, (%rdi)
	movq	24(%rsp), %rsi
	movq	32(%rsp), %rdx
.Ltmp66:
	callq	hipEventElapsedTime
.Ltmp67:
# %bb.49:
	movss	20(%rsp), %xmm0                 # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 68(%rsp)                 # 4-byte Spill
.Ltmp68:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.7, %esi
	movl	$22, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp69:
# %bb.50:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit153
	xorps	%xmm0, %xmm0
	cvtss2sd	68(%rsp), %xmm0                 # 4-byte Folded Reload
.Ltmp70:
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
.Ltmp71:
# %bb.51:                               # %_ZNSolsEf.exit
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
.Ltmp72:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp73:
# %bb.52:                               # %.noexc205
.Ltmp74:
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
.Ltmp75:
# %bb.53:                               # %.noexc206
.Ltmp76:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp77:
# %bb.54:                               # %_ZNSolsEPFRSoS_E.exit156
.Ltmp78:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.3, %esi
	movl	$18, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp79:
# %bb.55:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit158
.Ltmp80:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.4, %esi
	movl	$13, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp81:
# %bb.56:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit160
.Ltmp82:
	movl	$_ZSt4cout, %edi
	movq	%r13, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
.Ltmp83:
# %bb.57:                               # %_ZNSolsEj.exit162
.Ltmp84:
	movq	%rax, %rbx
	movl	$.L.str.5, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp85:
# %bb.58:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit164
.Ltmp86:
	movq	%rbx, %rdi
	movq	%r12, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
.Ltmp87:
# %bb.59:                               # %_ZNSolsEj.exit166
.Ltmp88:
	movq	%rax, %rbx
	movl	$.L.str.5, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp89:
# %bb.60:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit168
.Ltmp90:
	movq	%rbx, %rdi
	movq	%rbp, %rsi
	callq	_ZNSo9_M_insertImEERSoT_
.Ltmp91:
# %bb.61:                               # %_ZNSolsEj.exit170
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
.Ltmp92:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp93:
# %bb.62:                               # %.noexc209
.Ltmp94:
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
.Ltmp95:
# %bb.63:                               # %.noexc210
.Ltmp96:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp97:
# %bb.64:                               # %_ZNSolsEPFRSoS_E.exit172
.Ltmp98:
	movq	%rax, %rbx
	movl	$.L.str.8, %esi
	movl	$21, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp99:
# %bb.65:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit174
	movq	(%rbx), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
.Ltmp100:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp101:
# %bb.66:                               # %.noexc213
.Ltmp102:
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
.Ltmp103:
# %bb.67:                               # %.noexc214
.Ltmp104:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp105:
# %bb.68:                               # %_ZNSolsEPFRSoS_E.exit176
.Ltmp106:
	callq	hipDeviceSynchronize
.Ltmp107:
# %bb.69:
	movq	$0, 40(%rsp)
	movq	24(%rsp), %rdi
.Ltmp108:
	xorl	%esi, %esi
	callq	hipEventRecord
.Ltmp109:
# %bb.70:                               # %_ZN14CUDAEventTimer5startEP12ihipStream_t.exit178.preheader
	cmpl	$0, 12(%rsp)                    # 4-byte Folded Reload
	je	.LBB4_80
# %bb.71:                               # %.lr.ph258
	xorl	%eax, %eax
	movq	%rax, 96(%rsp)                  # 8-byte Spill
	movabsq	$4294967297, %r14               # imm = 0x100000001
.LBB4_72:                               # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_74 Depth 2
                                        #       Child Loop BB4_76 Depth 3
	cmpl	$0, 72(%rsp)                    # 4-byte Folded Reload
	je	.LBB4_99
# %bb.73:                               # %.lr.ph254.preheader
                                        #   in Loop: Header=BB4_72 Depth=1
	movq	96(%rsp), %rax                  # 8-byte Reload
                                        # kill: def $eax killed $eax killed $rax
	imull	%r15d, %eax
	movl	%eax, 104(%rsp)                 # 4-byte Spill
	xorl	%r12d, %r12d
.LBB4_74:                               # %.lr.ph254
                                        #   Parent Loop BB4_72 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB4_76 Depth 3
	cmpl	$0, 80(%rsp)                    # 4-byte Folded Reload
	je	.LBB4_98
# %bb.75:                               # %.lr.ph.preheader
                                        #   in Loop: Header=BB4_74 Depth=2
	movl	%r12d, %ebp
	imull	%r15d, %ebp
	xorl	%ebx, %ebx
	movq	80(%rsp), %rax                  # 8-byte Reload
	movl	%eax, %r13d
.LBB4_76:                               # %.lr.ph
                                        #   Parent Loop BB4_72 Depth=1
                                        #     Parent Loop BB4_74 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	cmpl	$5, 16(%rsp)                    # 4-byte Folded Reload
	jne	.LBB4_77
# %bb.101:                              #   in Loop: Header=BB4_76 Depth=3
.Ltmp114:
	movq	%r14, %rdi
	movl	$1, %esi
	movq	88(%rsp), %rdx                  # 8-byte Reload
	movl	%r15d, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp115:
# %bb.102:                              #   in Loop: Header=BB4_76 Depth=3
	testl	%eax, %eax
	jne	.LBB4_104
# %bb.103:                              #   in Loop: Header=BB4_76 Depth=3
	movq	56(%rsp), %rdi
.Ltmp116:
	movq	112(%rsp), %rsi                 # 8-byte Reload
	movq	48(%rsp), %rdx                  # 8-byte Reload
                                        # kill: def $edx killed $edx killed $rdx
	movl	%ebx, %ecx
	movl	%ebp, %r8d
	movl	104(%rsp), %r9d                 # 4-byte Reload
	callq	_Z26__device_stub__cuda_kernelPd4dim3iii
.Ltmp117:
	jmp	.LBB4_104
.LBB4_77:                               #   in Loop: Header=BB4_76 Depth=3
.Ltmp110:
	movq	%r14, %rdi
	movl	$1, %esi
	movq	88(%rsp), %rdx                  # 8-byte Reload
	movl	%r15d, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp111:
# %bb.78:                               #   in Loop: Header=BB4_76 Depth=3
	testl	%eax, %eax
	jne	.LBB4_104
# %bb.79:                               #   in Loop: Header=BB4_76 Depth=3
.Ltmp112:
	movq	120(%rsp), %rdi                 # 8-byte Reload
	callq	_Z33__device_stub__cuda_kernel_cyclesx
.Ltmp113:
.LBB4_104:                              #   in Loop: Header=BB4_76 Depth=3
	addl	%r15d, %ebx
	decl	%r13d
	jne	.LBB4_76
.LBB4_98:                               # %._crit_edge
                                        #   in Loop: Header=BB4_74 Depth=2
	incl	%r12d
	cmpl	72(%rsp), %r12d                 # 4-byte Folded Reload
	jne	.LBB4_74
.LBB4_99:                               # %_ZN14CUDAEventTimer5startEP12ihipStream_t.exit178
                                        #   in Loop: Header=BB4_72 Depth=1
	movq	96(%rsp), %rax                  # 8-byte Reload
	incl	%eax
	movq	%rax, 96(%rsp)                  # 8-byte Spill
	cmpl	12(%rsp), %eax                  # 4-byte Folded Reload
	jne	.LBB4_72
.LBB4_80:                               # %_ZN14CUDAEventTimer5startEP12ihipStream_t.exit178._crit_edge
	movq	32(%rsp), %rdi
	movq	40(%rsp), %rsi
.Ltmp119:
	callq	hipEventRecord
.Ltmp120:
# %bb.81:                               # %.noexc179
	movq	32(%rsp), %rdi
.Ltmp121:
	callq	hipEventSynchronize
.Ltmp122:
# %bb.82:                               # %_ZN14CUDAEventTimer4stopEv.exit181
	leaq	20(%rsp), %rdi
	movl	$0, (%rdi)
	movq	24(%rsp), %rsi
	movq	32(%rsp), %rdx
.Ltmp124:
	callq	hipEventElapsedTime
.Ltmp125:
# %bb.83:
	movss	20(%rsp), %xmm0                 # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, 16(%rsp)                 # 4-byte Spill
.Ltmp126:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.9, %esi
	movl	$26, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp127:
# %bb.84:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit185
	xorps	%xmm0, %xmm0
	cvtss2sd	16(%rsp), %xmm0                 # 4-byte Folded Reload
.Ltmp128:
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
.Ltmp129:
# %bb.85:                               # %_ZNSolsEf.exit187
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
.Ltmp130:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp131:
# %bb.86:                               # %.noexc217
.Ltmp132:
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
.Ltmp133:
# %bb.87:                               # %.noexc218
.Ltmp134:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp135:
# %bb.88:                               # %_ZNSolsEPFRSoS_E.exit189
.Ltmp136:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.10, %esi
	movl	$19, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp137:
# %bb.89:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit191
	movss	16(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	mulss	.LCPI4_2(%rip), %xmm0
	divss	68(%rsp), %xmm0                 # 4-byte Folded Reload
	cvtss2sd	%xmm0, %xmm0
.Ltmp138:
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
.Ltmp139:
# %bb.90:                               # %_ZNSolsEf.exit193
	movq	%rax, %rbx
	movq	(%rax), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
.Ltmp140:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp141:
# %bb.91:                               # %.noexc221
.Ltmp142:
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
.Ltmp143:
# %bb.92:                               # %.noexc222
.Ltmp144:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp145:
# %bb.93:                               # %_ZNSolsEPFRSoS_E.exit195
	movq	56(%rsp), %rdi
.Ltmp146:
	callq	hipFree
.Ltmp147:
# %bb.94:
	leaq	24(%rsp), %rdi
	callq	_ZN14CUDAEventTimerD2Ev
	xorl	%ebx, %ebx
.LBB4_95:
	movq	128(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB4_5
# %bb.96:
	callq	_ZdlPv
	jmp	.LBB4_5
.LBB4_41:
.Ltmp50:
	jmp	.LBB4_108
.LBB4_42:
.Ltmp65:
	jmp	.LBB4_106
.LBB4_107:
.Ltmp4:
	jmp	.LBB4_108
.LBB4_105:
.Ltmp148:
	jmp	.LBB4_106
.LBB4_40:
.Ltmp45:
.LBB4_108:
	movq	%rax, %rbx
	jmp	.LBB4_109
.LBB4_97:
.Ltmp123:
	jmp	.LBB4_106
.LBB4_100:
.Ltmp118:
.LBB4_106:
	movq	%rax, %rbx
	leaq	24(%rsp), %rdi
	callq	_ZN14CUDAEventTimerD2Ev
.LBB4_109:
	movq	128(%rsp), %rdi
	testq	%rdi, %rdi
	je	.LBB4_111
# %bb.110:
	callq	_ZdlPv
.LBB4_111:                              # %_ZNSt6vectorIdSaIdEED2Ev.exit197
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end4:
	.size	main, .Lfunc_end4-main
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table4:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Lfunc_begin0-.Lfunc_begin0    # >> Call Site 1 <<
	.uleb128 .Ltmp0-.Lfunc_begin0           #   Call between .Lfunc_begin0 and .Ltmp0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 2 <<
	.uleb128 .Ltmp3-.Ltmp0                  #   Call between .Ltmp0 and .Ltmp3
	.uleb128 .Ltmp4-.Lfunc_begin0           #     jumps to .Ltmp4
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp5-.Lfunc_begin0           # >> Call Site 3 <<
	.uleb128 .Ltmp44-.Ltmp5                 #   Call between .Ltmp5 and .Ltmp44
	.uleb128 .Ltmp45-.Lfunc_begin0          #     jumps to .Ltmp45
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp46-.Lfunc_begin0          # >> Call Site 4 <<
	.uleb128 .Ltmp49-.Ltmp46                #   Call between .Ltmp46 and .Ltmp49
	.uleb128 .Ltmp50-.Lfunc_begin0          #     jumps to .Ltmp50
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp51-.Lfunc_begin0          # >> Call Site 5 <<
	.uleb128 .Ltmp60-.Ltmp51                #   Call between .Ltmp51 and .Ltmp60
	.uleb128 .Ltmp65-.Lfunc_begin0          #     jumps to .Ltmp65
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp60-.Lfunc_begin0          # >> Call Site 6 <<
	.uleb128 .Ltmp53-.Ltmp60                #   Call between .Ltmp60 and .Ltmp53
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp53-.Lfunc_begin0          # >> Call Site 7 <<
	.uleb128 .Ltmp64-.Ltmp53                #   Call between .Ltmp53 and .Ltmp64
	.uleb128 .Ltmp65-.Lfunc_begin0          #     jumps to .Ltmp65
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp66-.Lfunc_begin0          # >> Call Site 8 <<
	.uleb128 .Ltmp109-.Ltmp66               #   Call between .Ltmp66 and .Ltmp109
	.uleb128 .Ltmp123-.Lfunc_begin0         #     jumps to .Ltmp123
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp114-.Lfunc_begin0         # >> Call Site 9 <<
	.uleb128 .Ltmp113-.Ltmp114              #   Call between .Ltmp114 and .Ltmp113
	.uleb128 .Ltmp118-.Lfunc_begin0         #     jumps to .Ltmp118
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp119-.Lfunc_begin0         # >> Call Site 10 <<
	.uleb128 .Ltmp122-.Ltmp119              #   Call between .Ltmp119 and .Ltmp122
	.uleb128 .Ltmp123-.Lfunc_begin0         #     jumps to .Ltmp123
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp124-.Lfunc_begin0         # >> Call Site 11 <<
	.uleb128 .Ltmp147-.Ltmp124              #   Call between .Ltmp124 and .Ltmp147
	.uleb128 .Ltmp148-.Lfunc_begin0         #     jumps to .Ltmp148
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp147-.Lfunc_begin0         # >> Call Site 12 <<
	.uleb128 .Lfunc_end4-.Ltmp147           #   Call between .Ltmp147 and .Lfunc_end4
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZNSt6vectorIdSaIdEEC2EmRKdRKS0_,"axG",@progbits,_ZNSt6vectorIdSaIdEEC2EmRKdRKS0_,comdat
	.weak	_ZNSt6vectorIdSaIdEEC2EmRKdRKS0_ # -- Begin function _ZNSt6vectorIdSaIdEEC2EmRKdRKS0_
	.p2align	1, 0x90
	.type	_ZNSt6vectorIdSaIdEEC2EmRKdRKS0_,@function
_ZNSt6vectorIdSaIdEEC2EmRKdRKS0_:       # @_ZNSt6vectorIdSaIdEEC2EmRKdRKS0_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rsi, %rax
	shrq	$60, %rax
	jne	.LBB5_6
# %bb.1:                                # %_ZNSt6vectorIdSaIdEE17_S_check_init_lenEmRKS0_.exit
	movq	%rsi, %r14
	movq	%rdi, %rbx
	xorps	%xmm0, %xmm0
	movups	%xmm0, (%rdi)
	movq	$0, 16(%rdi)
	testq	%rsi, %rsi
	je	.LBB5_2
# %bb.3:
	movq	%rdx, %r15
	xorl	%r12d, %r12d
	movq	%rbx, %rdi
	movq	%r14, %rsi
	xorl	%edx, %edx
	callq	_ZNSt15__new_allocatorIdE8allocateEmPKv
	movq	%rax, (%rbx)
	leaq	(%rax,%r14,8), %rcx
	movq	%rcx, 16(%rbx)
	movsd	(%r15), %xmm0                   # xmm0 = mem[0],zero
	shlq	$3, %r14
.LBB5_4:                                # %.lr.ph.i.i.i.i.i.i.i.i
                                        # =>This Inner Loop Header: Depth=1
	movsd	%xmm0, (%rax,%r12)
	addq	$8, %r12
	cmpq	%r12, %r14
	jne	.LBB5_4
	jmp	.LBB5_5
.LBB5_2:                                # %_ZNSt12_Vector_baseIdSaIdEEC2EmRKS0_.exit.thread
	movups	%xmm0, (%rbx)
	movq	$0, 16(%rbx)
	xorl	%ecx, %ecx
.LBB5_5:                                # %.loopexit
	movq	%rcx, 8(%rbx)
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB5_6:
	.cfi_def_cfa_offset 48
	movl	$.L.str.11, %edi
	callq	_ZSt20__throw_length_errorPKc
.Lfunc_end5:
	.size	_ZNSt6vectorIdSaIdEEC2EmRKdRKS0_, .Lfunc_end5-_ZNSt6vectorIdSaIdEEC2EmRKdRKS0_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZN14CUDAEventTimerD2Ev,"axG",@progbits,_ZN14CUDAEventTimerD2Ev,comdat
	.weak	_ZN14CUDAEventTimerD2Ev         # -- Begin function _ZN14CUDAEventTimerD2Ev
	.p2align	1, 0x90
	.type	_ZN14CUDAEventTimerD2Ev,@function
_ZN14CUDAEventTimerD2Ev:                # @_ZN14CUDAEventTimerD2Ev
.Lfunc_begin1:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception1
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rdi, %rbx
	movq	(%rdi), %rdi
.Ltmp149:
	callq	hipEventDestroy
.Ltmp150:
# %bb.1:
	movq	8(%rbx), %rdi
.Ltmp151:
	callq	hipEventDestroy
.Ltmp152:
# %bb.2:
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.LBB6_3:
	.cfi_def_cfa_offset 16
.Ltmp153:
	movq	%rax, %rdi
	callq	__clang_call_terminate
.Lfunc_end6:
	.size	_ZN14CUDAEventTimerD2Ev, .Lfunc_end6-_ZN14CUDAEventTimerD2Ev
	.cfi_endproc
	.section	.gcc_except_table._ZN14CUDAEventTimerD2Ev,"aG",@progbits,_ZN14CUDAEventTimerD2Ev,comdat
	.p2align	2, 0x0
GCC_except_table6:
.Lexception1:
	.byte	255                             # @LPStart Encoding = omit
	.byte	3                               # @TType Encoding = udata4
	.uleb128 .Lttbase0-.Lttbaseref0
.Lttbaseref0:
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end1-.Lcst_begin1
.Lcst_begin1:
	.uleb128 .Ltmp149-.Lfunc_begin1         # >> Call Site 1 <<
	.uleb128 .Ltmp152-.Ltmp149              #   Call between .Ltmp149 and .Ltmp152
	.uleb128 .Ltmp153-.Lfunc_begin1         #     jumps to .Ltmp153
	.byte	1                               #   On action: 1
.Lcst_end1:
	.byte	1                               # >> Action Record 1 <<
                                        #   Catch TypeInfo 1
	.byte	0                               #   No further actions
	.p2align	2, 0x0
                                        # >> Catch TypeInfos <<
	.long	0                               # TypeInfo 1
.Lttbase0:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text.__clang_call_terminate,"axG",@progbits,__clang_call_terminate,comdat
	.hidden	__clang_call_terminate          # -- Begin function __clang_call_terminate
	.weak	__clang_call_terminate
	.type	__clang_call_terminate,@function
__clang_call_terminate:                 # @__clang_call_terminate
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__cxa_begin_catch
	callq	_ZSt9terminatev
.Lfunc_end7:
	.size	__clang_call_terminate, .Lfunc_end7-__clang_call_terminate
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt15__new_allocatorIdE8allocateEmPKv,"axG",@progbits,_ZNSt15__new_allocatorIdE8allocateEmPKv,comdat
	.weak	_ZNSt15__new_allocatorIdE8allocateEmPKv # -- Begin function _ZNSt15__new_allocatorIdE8allocateEmPKv
	.p2align	1, 0x90
	.type	_ZNSt15__new_allocatorIdE8allocateEmPKv,@function
_ZNSt15__new_allocatorIdE8allocateEmPKv: # @_ZNSt15__new_allocatorIdE8allocateEmPKv
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	%rsi, %rax
	shrq	$60, %rax
	jne	.LBB8_1
# %bb.3:
	shlq	$3, %rsi
	movq	%rsi, %rdi
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	_Znwm                           # TAILCALL
.LBB8_1:
	.cfi_def_cfa_offset 16
	shrq	$61, %rsi
	je	.LBB8_2
# %bb.4:
	callq	_ZSt28__throw_bad_array_new_lengthv
.LBB8_2:
	callq	_ZSt17__throw_bad_allocv
.Lfunc_end8:
	.size	_ZNSt15__new_allocatorIdE8allocateEmPKv, .Lfunc_end8-_ZNSt15__new_allocatorIdE8allocateEmPKv
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB9_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB9_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11cuda_kernelPd4dim3iii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z18cuda_kernel_cyclesx, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end9:
	.size	__hip_module_ctor, .Lfunc_end9-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB10_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB10_2:
	retq
.Lfunc_end10:
	.size	__hip_module_dtor, .Lfunc_end10-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z11cuda_kernelPd4dim3iii,@object # @_Z11cuda_kernelPd4dim3iii
	.section	.rodata,"a",@progbits
	.globl	_Z11cuda_kernelPd4dim3iii
	.p2align	3, 0x0
_Z11cuda_kernelPd4dim3iii:
	.quad	_Z26__device_stub__cuda_kernelPd4dim3iii
	.size	_Z11cuda_kernelPd4dim3iii, 8

	.type	_Z18cuda_kernel_cyclesx,@object # @_Z18cuda_kernel_cyclesx
	.globl	_Z18cuda_kernel_cyclesx
	.p2align	3, 0x0
_Z18cuda_kernel_cyclesx:
	.quad	_Z33__device_stub__cuda_kernel_cyclesx
	.size	_Z18cuda_kernel_cyclesx, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"usage: "
	.size	.L.str, 8

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	" xsize ysize zsize threads_per_block [kernel duration(ms)]\n"
	.size	.L.str.1, 60

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Clock rate (GHz): "
	.size	.L.str.2, 19

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Launching kernel:\n"
	.size	.L.str.3, 19

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"  Grid size: "
	.size	.L.str.4, 14

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	", "
	.size	.L.str.5, 3

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"  Block size: "
	.size	.L.str.6, 15

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"Single kernel launch: "
	.size	.L.str.7, 23

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"  Block size: 1, 1, 1"
	.size	.L.str.8, 22

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"Multiple kernel launches: "
	.size	.L.str.9, 27

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"Multiple/Single %: "
	.size	.L.str.10, 20

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"cannot create std::vector larger than max_size()"
	.size	.L.str.11, 49

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z11cuda_kernelPd4dim3iii"
	.size	.L__unnamed_1, 26

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z18cuda_kernel_cyclesx"
	.size	.L__unnamed_2, 24

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z26__device_stub__cuda_kernelPd4dim3iii
	.addrsig_sym _Z33__device_stub__cuda_kernel_cyclesx
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym _Z11cuda_kernelPd4dim3iii
	.addrsig_sym _Z18cuda_kernel_cyclesx
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z11cuda_kernelPd4dim3iii ; -- Begin function _Z11cuda_kernelPd4dim3iii
	.globl	_Z11cuda_kernelPd4dim3iii
	.p2align	8
	.type	_Z11cuda_kernelPd4dim3iii,@function
_Z11cuda_kernelPd4dim3iii:              ; @_Z11cuda_kernelPd4dim3iii
; %bb.0:
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x2c
	s_load_b128 s[4:7], s[0:1], 0x8
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	v_bfe_u32 v4, v0, 20, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s7, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_and_b32 s3, s3, 0xffff
	v_mad_u64_u32 v[0:1], null, s13, s2, v[2:3]
	v_mad_u64_u32 v[1:2], null, s14, s7, v[3:4]
	v_mad_u64_u32 v[2:3], null, s15, s3, v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_u32_e32 vcc_lo, s4, v0
	v_cmp_gt_u32_e64 s2, s5, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_u32_e64 s3, s6, v2
	s_and_b32 s2, vcc_lo, s2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s2, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_6
; %bb.1:
	v_mad_u64_u32 v[3:4], null, v2, s5, v[1:2]
	s_load_b64 s[0:1], s[0:1], 0x0
                                        ; implicit-def: $vgpr8
                                        ; implicit-def: $vgpr4_vgpr5
                                        ; implicit-def: $vgpr6_vgpr7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, v3, s4, v[0:1]
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_mov_b32 s1, exec_lo
	global_load_b64 v[2:3], v[0:1], off
	s_waitcnt vmcnt(0)
	v_cmpx_ngt_f64_e64 0x41d00000, |v[2:3]|
	s_xor_b32 s1, exec_lo, s1
	s_cbranch_execz .LBB0_3
; %bb.2:
	v_ldexp_f64 v[4:5], |v[2:3]|, 0xffffff80
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[2:3]|
	v_trig_preop_f64 v[6:7], |v[2:3]|, 0
	v_and_b32_e32 v8, 0x7fffffff, v3
	v_trig_preop_f64 v[18:19], |v[2:3]|, 2
	v_mov_b32_e32 v26, 0
	s_mov_b32 s2, 0x54442d18
	s_mov_b32 s3, 0x3ff921fb
	s_mov_b32 s4, 0x33145c07
	s_mov_b32 s5, 0x3c91a626
	v_dual_cndmask_b32 v5, v8, v5 :: v_dual_cndmask_b32 v4, v2, v4
	v_trig_preop_f64 v[8:9], |v[2:3]|, 1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_f64 v[10:11], v[6:7], v[4:5]
	v_mul_f64 v[24:25], v[18:19], v[4:5]
	v_mul_f64 v[12:13], v[8:9], v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[6:7], v[6:7], v[4:5], -v[10:11]
	v_fma_f64 v[8:9], v[8:9], v[4:5], -v[12:13]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[4:5], v[18:19], v[4:5], -v[24:25]
	v_add_f64 v[14:15], v[12:13], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[16:17], v[14:15], -v[12:13]
	v_add_f64 v[22:23], v[10:11], v[14:15]
	v_add_f64 v[20:21], v[14:15], -v[16:17]
	v_add_f64 v[6:7], v[6:7], -v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[16:17], v[22:23], -2
	v_add_f64 v[10:11], v[22:23], -v[10:11]
	v_add_f64 v[12:13], v[12:13], -v[20:21]
	v_add_f64 v[20:21], v[24:25], v[8:9]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[16:17]|
	v_add_f64 v[10:11], v[14:15], -v[10:11]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[6:7], v[12:13]
	v_fract_f64_e32 v[12:13], v[16:17]
	v_add_f64 v[14:15], v[20:21], v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v13, 0, v13 :: v_dual_cndmask_b32 v12, 0, v12
	v_ldexp_f64 v[12:13], v[12:13], 2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[16:17], v[10:11], v[14:15]
	v_add_f64 v[22:23], v[16:17], v[12:13]
	v_add_f64 v[10:11], v[16:17], -v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e32 vcc_lo, 0, v[22:23]
	v_add_f64 v[22:23], v[20:21], -v[24:25]
	v_cndmask_b32_e64 v27, 0, 0x40100000, vcc_lo
	v_add_f64 v[31:32], v[20:21], -v[22:23]
	v_add_f64 v[8:9], v[8:9], -v[22:23]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[12:13], v[12:13], v[26:27]
	v_add_f64 v[27:28], v[14:15], -v[20:21]
	v_add_f64 v[22:23], v[24:25], -v[31:32]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[29:30], v[16:17], v[12:13]
	v_add_f64 v[33:34], v[14:15], -v[27:28]
	v_add_f64 v[6:7], v[6:7], -v[27:28]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[8:9], v[8:9], v[22:23]
	v_cvt_i32_f64_e32 v29, v[29:30]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[20:21], v[20:21], -v[33:34]
	v_cvt_f64_i32_e32 v[27:28], v29
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[6:7], v[20:21]
	v_add_f64 v[12:13], v[12:13], -v[27:28]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[6:7], v[8:9], v[6:7]
	v_add_f64 v[8:9], v[14:15], -v[10:11]
	v_add_f64 v[18:19], v[16:17], v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[4:5], v[4:5], v[6:7]
	v_add_f64 v[6:7], v[18:19], -v[12:13]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[4:5], v[8:9], v[4:5]
	v_add_f64 v[6:7], v[16:17], -v[6:7]
	v_cndmask_b32_e64 v27, 0, 0x3ff00000, vcc_lo
	v_add_co_ci_u32_e64 v8, s0, 0, v29, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[4:5], v[4:5], v[6:7]
	v_add_f64 v[6:7], v[18:19], -v[26:27]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[9:10], v[6:7], v[4:5]
	v_mul_f64 v[11:12], v[9:10], s[2:3]
	v_add_f64 v[6:7], v[9:10], -v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[13:14], v[9:10], s[2:3], -v[11:12]
	v_add_f64 v[4:5], v[4:5], -v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], v[9:10], s[4:5], v[13:14]
	v_fma_f64 v[6:7], v[4:5], s[2:3], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[4:5], v[11:12], v[6:7]
	v_add_f64 v[9:10], v[4:5], -v[11:12]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[6:7], v[6:7], -v[9:10]
.LBB0_3:                                ; %Flow
	s_and_not1_saveexec_b32 s0, s1
	s_cbranch_execz .LBB0_5
; %bb.4:
	s_mov_b32 s2, 0x6dc9c883
	s_mov_b32 s3, 0x3fe45f30
	s_mov_b32 s5, 0xbc91a626
	v_mul_f64 v[4:5], |v[2:3]|, s[2:3]
	s_mov_b32 s2, 0x54442d18
	s_mov_b32 s3, 0xbff921fb
	s_mov_b32 s4, 0x33145c00
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[8:9], v[4:5]
	v_fma_f64 v[4:5], v[8:9], s[2:3], |v[2:3]|
	v_mul_f64 v[6:7], v[8:9], s[4:5]
	s_mov_b32 s2, 0x252049c0
	s_mov_b32 s3, 0xb97b839a
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[12:13], v[8:9], s[4:5], v[4:5]
	v_add_f64 v[10:11], v[4:5], v[6:7]
	s_mov_b32 s5, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[4:5], v[4:5], -v[10:11]
	v_add_f64 v[10:11], v[10:11], -v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[4:5], v[4:5], v[6:7]
	v_fma_f64 v[6:7], v[8:9], s[4:5], v[6:7]
	v_add_f64 v[4:5], v[10:11], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[4:5], v[4:5], -v[6:7]
	v_fma_f64 v[6:7], v[8:9], s[2:3], v[4:5]
	v_cvt_i32_f64_e32 v8, v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[4:5], v[12:13], v[6:7]
	v_add_f64 v[10:11], v[4:5], -v[12:13]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[6:7], v[6:7], -v[10:11]
.LBB0_5:                                ; %_Z7cell_opd.exit
	s_or_b32 exec_lo, exec_lo, s0
	s_mov_b32 s0, 0x652b82fe
	s_mov_b32 s1, 0x3ff71547
	s_mov_b32 s2, 0x6a5dcb37
	v_mul_f64 v[9:10], v[2:3], s[0:1]
	s_mov_b32 s0, 0xfefa39ef
	s_mov_b32 s1, 0xbfe62e42
	s_mov_b32 s3, 0x3e5ade15
	v_mul_f64 v[15:16], v[4:5], v[4:5]
	s_mov_b32 s4, 0xb42fdfa7
	s_mov_b32 s6, 0xf9a43bb8
	s_mov_b32 s5, 0xbe5ae600
	s_mov_b32 s7, 0x3de5e0b2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[25:26], v[6:7], 0.5
	v_rndne_f64_e32 v[9:10], v[9:10]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f64 v[19:20], v[15:16], s[6:7], s[4:5]
	v_mul_f64 v[21:22], v[15:16], 0.5
	v_mul_f64 v[29:30], v[4:5], -v[15:16]
	v_fma_f64 v[11:12], v[9:10], s[0:1], v[2:3]
	s_mov_b32 s0, 0x3b39803f
	s_mov_b32 s1, 0xbc7abc9e
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[23:24], -v[21:22], 1.0
	v_fma_f64 v[11:12], v[9:10], s[0:1], v[11:12]
	s_mov_b32 s0, 0xfca7ab0c
	s_mov_b32 s1, 0x3e928af3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[27:28], -v[23:24], 1.0
	v_fma_f64 v[13:14], v[11:12], s[2:3], s[0:1]
	s_mov_b32 s0, 0x623fde64
	s_mov_b32 s1, 0x3ec71dee
	s_mov_b32 s2, 0x46cc5e42
	s_mov_b32 s3, 0xbda907db
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[21:22], v[27:28], -v[21:22]
	v_fma_f64 v[13:14], v[11:12], v[13:14], s[0:1]
	s_mov_b32 s0, 0x9037ab78
	s_mov_b32 s1, 0x3e21eeb6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_fma_f64 v[17:18], v[15:16], s[2:3], s[0:1]
	s_mov_b32 s0, 0x7c89e6b0
	s_mov_b32 s1, 0x3efa0199
	s_mov_b32 s2, 0x796cde01
	s_mov_b32 s3, 0x3ec71de3
	v_fma_f64 v[21:22], v[4:5], -v[6:7], v[21:22]
	v_fma_f64 v[19:20], v[15:16], v[19:20], s[2:3]
	s_mov_b32 s2, 0x19e83e5c
	s_mov_b32 s3, 0xbf2a01a0
	s_delay_alu instid0(VALU_DEP_4)
	v_fma_f64 v[13:14], v[11:12], v[13:14], s[0:1]
	s_mov_b32 s0, 0xa17f65f6
	s_mov_b32 s1, 0xbe927e4f
	s_delay_alu instid0(VALU_DEP_4) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[17:18], v[15:16], v[17:18], s[0:1]
	s_mov_b32 s0, 0x14761f6e
	s_mov_b32 s1, 0x3f2a01a0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[19:20], v[15:16], v[19:20], s[2:3]
	s_mov_b32 s3, 0x3f811111
	s_mov_b32 s2, 0x11110bb3
	v_fma_f64 v[13:14], v[11:12], v[13:14], s[0:1]
	s_mov_b32 s0, 0x19f4ec90
	s_mov_b32 s1, 0x3efa01a0
	s_delay_alu instid0(VALU_DEP_3) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[17:18], v[15:16], v[17:18], s[0:1]
	s_mov_b32 s0, 0x1852b7b0
	s_mov_b32 s1, 0x3f56c16c
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[19:20], v[15:16], v[19:20], s[2:3]
	s_mov_b32 s2, 0x11122322
	v_fma_f64 v[13:14], v[11:12], v[13:14], s[0:1]
	s_mov_b32 s0, 0x16c16967
	s_mov_b32 s1, 0xbf56c16c
	s_delay_alu instid0(VALU_DEP_3) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[17:18], v[15:16], v[17:18], s[0:1]
	s_mov_b32 s1, 0x3fa55555
	s_mov_b32 s0, 0x55555555
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fma_f64 v[19:20], v[29:30], v[19:20], v[25:26]
	v_mul_f64 v[25:26], v[15:16], v[15:16]
	v_fma_f64 v[13:14], v[11:12], v[13:14], s[2:3]
	s_mov_b32 s2, s0
	s_mov_b32 s3, 0xbfc55555
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fma_f64 v[17:18], v[15:16], v[17:18], s[0:1]
	s_mov_b32 s0, 0x555502a1
	v_fma_f64 v[6:7], v[15:16], v[19:20], -v[6:7]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[13:14], v[11:12], v[13:14], s[0:1]
	s_mov_b32 s0, 0x55555511
	s_mov_b32 s1, 0x3fc55555
	v_fma_f64 v[15:16], v[25:26], v[17:18], v[21:22]
	v_cvt_i32_f64_e32 v17, v[9:10]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_fma_f64 v[6:7], v[29:30], s[2:3], v[6:7]
	v_cmp_ngt_f64_e64 s2, 0xc090cc00, v[2:3]
	v_fma_f64 v[13:14], v[11:12], v[13:14], s[0:1]
	s_mov_b32 s0, 11
	s_mov_b32 s1, 0x3fe00000
	v_add_f64 v[4:5], v[4:5], -v[6:7]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[13:14], v[11:12], v[13:14], s[0:1]
	v_cmp_nlt_f64_e64 s1, 0x40900000, v[2:3]
	v_cmp_class_f64_e64 s0, v[2:3], 0x1f8
	v_lshlrev_b32_e32 v2, 30, v8
	v_xor_b32_e32 v3, 0x80000000, v5
	v_fma_f64 v[13:14], v[11:12], v[13:14], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[9:10], v[11:12], v[13:14], 1.0
	v_add_f64 v[11:12], v[23:24], v[15:16]
	v_ldexp_f64 v[6:7], v[9:10], v17
	v_and_b32_e32 v9, 1, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_eq_u32_e32 vcc_lo, 0, v9
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_and_b32 v2, 0x80000000, v2
	v_cndmask_b32_e32 v4, v4, v11, vcc_lo
	s_and_b32 vcc_lo, s2, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v3, v3, v2
	v_cndmask_b32_e64 v2, 0, v4, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v3, 0x7ff80000, v3, s0
	v_cndmask_b32_e64 v7, 0x7ff00000, v7, s1
	v_cndmask_b32_e32 v4, 0, v6, vcc_lo
	v_cndmask_b32_e64 v5, 0, v7, s2
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f64 v[2:3], v[4:5], v[2:3]
	global_store_b64 v[0:1], v[2:3], off
.LBB0_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11cuda_kernelPd4dim3iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 13
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 35
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z11cuda_kernelPd4dim3iii, .Lfunc_end0-_Z11cuda_kernelPd4dim3iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2120
; NumSgprs: 18
; NumVgprs: 35
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 4
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 35
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 13
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.protected	_Z18cuda_kernel_cyclesx ; -- Begin function _Z18cuda_kernel_cyclesx
	.globl	_Z18cuda_kernel_cyclesx
	.p2align	8
	.type	_Z18cuda_kernel_cyclesx,@function
_Z18cuda_kernel_cyclesx:                ; @_Z18cuda_kernel_cyclesx
; %bb.0:
	s_load_b64 s[0:1], s[0:1], 0x0
	s_getreg_b32 s2, hwreg(HW_REG_SHADER_CYCLES, 0, 20)
.LBB1_1:                                ; =>This Inner Loop Header: Depth=1
	s_getreg_b32 s3, hwreg(HW_REG_SHADER_CYCLES, 0, 20)
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_sub_u32 s4, s3, s2
	s_subb_u32 s5, 0, 0
	s_waitcnt lgkmcnt(0)
	v_cmp_lt_i64_e64 s3, s[4:5], s[0:1]
	s_and_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccnz .LBB1_1
; %bb.2:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z18cuda_kernel_cyclesx
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 8
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 1
		.amdhsa_next_free_sgpr 6
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z18cuda_kernel_cyclesx, .Lfunc_end1-_Z18cuda_kernel_cyclesx
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 52
; NumSgprs: 8
; NumVgprs: 0
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 8
; NumVGPRsForWavesPerEU: 1
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           12
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11cuda_kernelPd4dim3iii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z11cuda_kernelPd4dim3iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     35
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           8
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 8
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z18cuda_kernel_cyclesx
    .private_segment_fixed_size: 0
    .sgpr_count:     8
    .sgpr_spill_count: 0
    .symbol:         _Z18cuda_kernel_cyclesx.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     0
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
