#include <stdio.h>
#include <memory.h>
#include <time.h>

#define htod(dst, src, size)\
	    cudaMemcpy(dst, src, size, cudaMemcpyHostToDevice)
#define dtoh(dst, src, size)\
	    cudaMemcpy(dst, src, size, cudaMemcpyDeviceToHost)
#define dtod(dst, src, size)\
	    cudaMemcpy(dst, src, size, cudaMemcpyDeviceToDevice)

#define ROW 8
#define COL 8
float ref[ROW][COL];

void initRef()
{
	float *tmp = (float*)ref;
	srand((unsigned int) time (NULL));
	for (int i = 0; i < ROW * COL; i++)
	{
		tmp[i] = i;//(float)rand() / RAND_MAX;
	}
}

void printData(float *data)
{
	printf("printData\n");
	for (int i = 0; i < ROW; i++)
	{
		for(int j = 0; j < COL; j++)
		{
			float tmp = data[i * COL + j];
			printf("%9.3f ", tmp);
		}
		printf("\n");
	}
}

void printData2(float *data, int r, int c)
{
	printf("printData\n");
	for (int i = 0; i < r; i++)
	{
		for(int j = 0; j < c; j++)
		{
			float tmp = data[i * c + j];
			printf("%9.6f ", tmp);
		}
		printf("\n");
	}
}

void printRef()
{
	printf("printRef\n");
	for (int i = 0; i < ROW; i++)
	{
		for(int j = 0; j < COL; j++)
		{
			printf("%8.6f ", ref[i][j]);
		}
		printf("\n");
	}
}

__global__ void map(float *d_data, float *d_func)
{
	int width = gridDim.x * blockDim.x;
	int x = blockIdx.x * blockDim.x + threadIdx.x;
	int y = blockIdx.y * blockDim.y + threadIdx.y;

	d_data[y * width + x] += *d_func;
}

void map()
{
	float *d_mapped, *d_func;
	float *h_mapped, h_func;
	float tmp[ROW][COL];
	size_t size = sizeof(ref);
	memcpy(tmp, ref, size);
	h_mapped = (float*)tmp;

	printf("before : ");
	printData(h_mapped);

	cudaMalloc(&d_mapped, size);
	cudaMalloc(&d_func, sizeof(float));

	h_func = 1.5;
	htod(d_func, &h_func, 1);
	htod(d_mapped, h_mapped, size);

	
	int c = 2;
	dim3 blockSize = dim3(c, c);
	dim3 gridSize = dim3(COL / c, ROW / c);
	map<<<gridSize, blockSize>>>(d_mapped, d_func);

	dtoh(h_mapped, d_mapped, size);

	printf("after : ");
	printData(h_mapped);

	cudaFree(d_mapped);
}

__global__ void transpose(float *d_transposed, float *d_ref)
{
	int width = gridDim.x * blockDim.x;
	int height = gridDim.y * blockDim.x;
	int x = blockIdx.x * blockDim.x + threadIdx.x;
	int y = blockIdx.y * blockDim.y + threadIdx.y;
	

	d_transposed[x * height + y] = d_ref[y * width + x];
}

void transpose()
{
	float *d_transposed, *d_ref;
	float *h_transposed, *h_ref;
	float tmp[ROW][COL];
	size_t size = sizeof(ref);
	memcpy(tmp, ref, size);
	h_ref = (float*)tmp;
	h_transposed = (float*)tmp;

	printf("before : ");
	printData(h_ref);

	cudaMalloc(&d_transposed, size);
	cudaMalloc(&d_ref, size);

	htod(d_ref, h_ref, size);

	
	int c = 2;
	dim3 blockSize = dim3(c, c);
	dim3 gridSize = dim3(COL / c, ROW / c);
	transpose<<<gridSize, blockSize>>>(d_transposed, d_ref);

	dtoh(h_transposed, d_transposed, size);

	printf("after : ");
	printData(h_transposed);

	cudaFree(d_transposed);
	cudaFree(d_ref);
}

__global__ void gather(float *d_gathered, float *d_ref)
{
	int width = gridDim.x * blockDim.x;
	int height = gridDim.y * blockDim.x;
	int x = blockIdx.x * blockDim.x + threadIdx.x;
	int y = blockIdx.y * blockDim.y + threadIdx.y;
	int cnt = 0;
	
	for (int yy = y - 1; yy < y + 2; yy++)
	{
		for (int xx = x - 1; xx < x + 2; xx++)
		{
			if (xx >= 0 && xx < width && yy >= 0 && yy < height)
			{
				d_gathered[y * width + x] += d_ref[yy * width + xx];
				cnt++;
			}
		}
	}
	d_gathered[y * width + x] /= cnt;
}

void gather()
{
	float *d_gathered, *d_ref;
	float *h_gathered, *h_ref;
	float tmp[ROW][COL];
	size_t size = sizeof(ref);
	memcpy(tmp, ref, size);
	h_ref = (float*)tmp;
	h_gathered = (float*)tmp;

	printf("before : ");
	printData(h_ref);

	cudaMalloc(&d_ref, size);
	cudaMalloc(&d_gathered, size);

	htod(d_ref, h_ref, size);
	cudaMemset(d_gathered, 0, size);
	
	int c = 2;
	dim3 blockSize = dim3(c, c);
	dim3 gridSize = dim3(COL / c, ROW / c);
	printf("run \n");
	gather<<<gridSize, blockSize>>>(d_gathered, d_ref);

	dtoh(h_gathered, d_gathered, size);

	printf("after : ");
	printData(h_gathered);

	cudaFree(d_gathered);
	cudaFree(d_ref);
}

__global__ void scatter(float *d_scattered, float *d_ref)
{
	int width = gridDim.x * blockDim.x;
	int height = gridDim.y * blockDim.x;
	int x = blockIdx.x * blockDim.x + threadIdx.x;
	int y = blockIdx.y * blockDim.y + threadIdx.y;
	int cnt = 0;
	
	for (int yy = y - 1; yy < y + 2; yy++)
	{
		for (int xx = x - 1; xx < x + 2; xx++)
		{
			if (xx >= 0 && xx < width && yy >= 0 && yy < height)
			{
				d_scattered[yy * width + xx] += d_ref[y * width + x];
				cnt++;
			}
		}
	}
	d_scattered[y * width + x] /= cnt;
}

void scatter()
{
	float *d_scattered, *d_ref;
	float *h_scattered, *h_ref;
	float tmp[ROW][COL];
	size_t size = sizeof(ref);
	memcpy(tmp, ref, size);
	h_ref = (float*)tmp;
	h_scattered = (float*)tmp;

	printf("before : ");
	printData(h_ref);

	cudaMalloc(&d_ref, size);
	cudaMalloc(&d_scattered, size);

	htod(d_ref, h_ref, size);
	cudaMemset(d_scattered, 0, size);
	
	int c = 2;
	dim3 blockSize = dim3(c, c);
	dim3 gridSize = dim3(COL / c, ROW / c);
	printf("run \n");
	scatter<<<gridSize, blockSize>>>(d_scattered, d_ref);

	dtoh(h_scattered, d_scattered, size);

	printf("after : ");
	printData(h_scattered);

	cudaFree(d_scattered);
	cudaFree(d_ref);
}

__global__ void stencil(float *d_stenciled, float *d_ref, float *d_window)
{
	int width = gridDim.x * blockDim.x;
	int height = gridDim.y * blockDim.x;
	int x = blockIdx.x * blockDim.x + threadIdx.x;
	int y = blockIdx.y * blockDim.y + threadIdx.y;
	float cnt = 0;
	
	for (int yy = y - 1, yyy = 0; yy < y + 2; yy++, yyy++)
	{
		for (int xx = x - 1, xxx = 0; xx < x + 2; xx++, xxx++)
		{
			if (xx >= 0 && xx < width && yy >= 0 && yy < height)
			{
				d_stenciled[y * width + x] += 
					d_ref[yy * width + xx] *
					d_window[yyy * width + xxx];

				cnt += 1 * d_window[yyy * width + xxx];
			}
		}
	}
	d_stenciled[y * width + x] /= cnt;
}

void stencil()
{
	float *d_stenciled, *d_ref, *d_window;
	float *h_stenciled, *h_ref, *h_window;
	float tmp[ROW][COL];
	float window[3][3];
	size_t size = sizeof(ref);
	memcpy(tmp, ref, size);
	h_ref = (float*)tmp;
	h_stenciled = (float*)tmp;
	h_window = (float*)window;

	window[0][1] = 0.2;
	window[1][0] = 0.2;
	window[1][1] = 0.2;
	window[1][2] = 0.2;
	window[2][1] = 0.2;

	printf("before : ");
	printData(h_ref);

	cudaMalloc(&d_ref, size);
	cudaMalloc(&d_stenciled, size);
	cudaMalloc(&d_window, sizeof(window));

	htod(d_ref, h_ref, size);
	htod(d_window, h_window, sizeof(window));
	cudaMemset(d_stenciled, 0, size);
	
	int c = 2;
	dim3 blockSize = dim3(c, c);
	dim3 gridSize = dim3(COL / c, ROW / c);
	printf("run \n");
	stencil<<<gridSize, blockSize>>>(d_stenciled, d_ref, d_window);

	dtoh(h_stenciled, d_stenciled, size);

	printf("after : ");
	printData(h_stenciled);

	cudaFree(d_stenciled);
	cudaFree(d_ref);
}

__global__ void reduce(float *d_reduced, float *d_ref)
{
	int width = gridDim.x * blockDim.x;
	//int height = gridDim.y * blockDim.x;
	int x = blockIdx.x * blockDim.x + threadIdx.x;
	int y = blockIdx.y * blockDim.y + threadIdx.y;
	int xx = blockIdx.x * blockDim.x;
	int yy = blockIdx.y * blockDim.y;
	__shared__ float data[2][2];
	
	data[threadIdx.y][threadIdx.x] = d_ref[y * width + x];

	if (yy == y && xx == x)
	{
		for (int i = 0; i < 4; i++)
		{
			d_reduced[yy/2 * (width/2) + xx/2] += ((float*)data)[i];
		}
	}
}

void reduce()
{
	float *d_reduced, *d_ref;
	float *h_reduced, *h_ref;
	float tmp[ROW][COL];
	size_t size = sizeof(ref);
	memcpy(tmp, ref, size);
	h_ref = (float*)tmp;
	h_reduced = (float*) malloc (sizeof(float) * size);

	printf("before : ");
	printData(h_ref);

	cudaMalloc(&d_ref, size);
	cudaMalloc(&d_reduced, size/4);

	htod(d_ref, h_ref, size);
	cudaMemset(d_reduced, 0, size/4);

	for (int i = ROW/2; i > 0; i /= 2)
	{
		dim3 blockSize = dim3(2, 2);
		dim3 gridSize = dim3(i, i);
		reduce<<<gridSize, blockSize>>>(d_reduced, d_ref);

		printf("before : ");
		free(h_reduced);
		h_reduced = (float*) malloc (size/4);
		dtoh(h_reduced, d_reduced, size/4);
		printData2(h_reduced, i, i);

		if (i == 1) break;

		size /= 4;
		cudaFree(d_ref);
		cudaMalloc(&d_ref, size);
		dtod(d_ref, d_reduced, size);

		cudaFree(d_reduced);
		cudaMalloc(&d_reduced, size/4);
		cudaMemset(d_reduced, 0, size/4);
	}

	dtoh(h_reduced, d_reduced, 1);

	printf("%f\n", *h_reduced);

	free(h_reduced);
	cudaFree(d_reduced);
	cudaFree(d_ref);

}

__global__ void hills_steele(float *d_scaned, float *d_ref, int step)
{
	int width = gridDim.x * blockDim.x;
	//int height = gridDim.y * blockDim.x;
	int x = blockIdx.x * blockDim.x + threadIdx.x;
	int y = blockIdx.y * blockDim.y + threadIdx.y;
	int index = y * width + x;

	if (index < step)
	{
		d_scaned[index] = d_ref[index];
	}
	else
	{
		d_scaned[index] = d_ref[index] + d_ref[index - step];
	}
}

// step efficiency, inclusive
void Hills_Steele_scan()
{
	float *d_scaned, *d_ref;
	float *h_scaned, *h_ref;
	float tmp[ROW][COL];
	size_t size = sizeof(ref);
	memcpy(tmp, ref, size);
	h_ref = (float*)tmp;
	h_scaned = (float*) malloc (sizeof(float) * size);

	printf("before : \n");
	printData(h_ref);

	cudaMalloc(&d_ref, size);
	cudaMalloc(&d_scaned, size);

	htod(d_ref, h_ref, size);
	cudaMemset(d_scaned, 0, size);

	for (int i = 1; i < size/2; i *= 2)
	{
		dim3 blockSize = dim3(2, 2);
		dim3 gridSize = dim3(ROW/2, COL/2);

		hills_steele<<<gridSize, blockSize>>>(d_scaned, d_ref, i);
		dtod(d_ref, d_scaned, size);
	}
	dtoh(h_scaned, d_scaned, size);
	printData(h_scaned);

	cudaFree(d_ref);
	cudaFree(d_scaned);
	free(h_scaned);
}

__global__ void blelloch(float *d_scaned, float *d_ref, int step)
{
	int width = gridDim.x * blockDim.x;
	int x = blockIdx.x * blockDim.x + threadIdx.x;
	int y = blockIdx.y * blockDim.y + threadIdx.y;
	int index = y * width + x;

	if ((index % step) == (step - 1))
	{
		d_scaned[index] = d_ref[index] + d_ref[index - (step/2)];
	}
	else
	{
		d_scaned[index] = d_ref[index];
	}
}

__global__ void blelloch_post(float *d_scaned, float *d_ref, int step)
{
	int width = gridDim.x * blockDim.x;
	int x = blockIdx.x * blockDim.x + threadIdx.x;
	int y = blockIdx.y * blockDim.y + threadIdx.y;
	int index = y * width + x;

	if ((index % step) == (step - 1))
	{
		d_scaned[index] = d_ref[index] + d_ref[index - (step/2)];
		d_scaned[index - (step/2)] = d_ref[index];
	}
}

// work efficiency, exclusive
void Blelloch_scan()
{
	float *d_scaned, *d_ref;
	float *h_scaned, *h_ref;
	float tmp[ROW][COL];
	size_t size = sizeof(ref);
	memcpy(tmp, ref, size);
	h_ref = (float*)tmp;
	h_scaned = (float*) malloc (sizeof(float) * size);

	printData(h_ref);

	cudaMalloc(&d_ref, size);
	cudaMalloc(&d_scaned, size);

	htod(d_ref, h_ref, size);
	cudaMemset(d_scaned, 0, size);

	dim3 blockSize = dim3(2, 2);
	dim3 gridSize = dim3(ROW/2, COL/2);

	for (int i = 2; i < ROW * COL; i *= 2)
	{
		blelloch<<<gridSize, blockSize>>>(d_scaned, d_ref, i);

		dtoh(h_scaned, d_scaned, size);
		printData(h_scaned);
		dtod(d_ref, d_scaned, size);
	}

	dtoh(h_ref, d_scaned, size);
	h_ref[(size/sizeof(float))-1] = 0;
	htod(d_ref, h_ref, size);
	dtod(d_scaned, d_ref, size);

	for (int i = ROW * COL; i > 1; i /= 2)
	{
		blelloch_post<<<gridSize, blockSize>>>(d_scaned, d_ref, i);

		dtoh(h_scaned, d_scaned, size);
		printData(h_scaned);
		dtod(d_ref, d_scaned, size);
	}


	cudaFree(d_ref);
	cudaFree(d_scaned);
	free(h_scaned);
}

__global__ void mapBits(
		unsigned int* d_ref,
		unsigned int* d_inputVals,
		unsigned int bits,
		unsigned int val)
{
	int index = blockDim.x * blockIdx.x + threadIdx.x;
	if ((d_inputVals[index] & bits) != 0)
		d_ref[index] = val;
	else 
		d_ref[index] = 0;
}

__global__ void mapBitsRev(
		unsigned int* d_ref,
		unsigned int* d_inputVals,
		unsigned int bits,
		unsigned int val)
{
	int index = blockDim.x * blockIdx.x + threadIdx.x;
	if ((d_inputVals[index] & bits) != 0)
		d_ref[index] = 0;
	else 
		d_ref[index] = val;
}

__global__ void sumScan(
		unsigned int *d_scanned,
		unsigned int *d_ref, 
		int step)
{
	int index = blockDim.x * blockIdx.x + threadIdx.x;
		

	if (index < step)
	{
		d_scanned[index] = d_ref[index];
	}
	else
	{
		d_scanned[index] = d_ref[index] + d_ref[index - step];
	}
}
__global__ void blelloch(
		unsigned int *d_scanned,
		unsigned int *d_ref, 
		int step)
{
	int index = blockDim.x * blockIdx.x + threadIdx.x;

	if ((index % step) == (step - 1))
		d_scanned[index] = d_ref[index] + d_ref[index - (step/2)];
	else
		d_scanned[index] = d_ref[index];

}

__global__ void blellochPost(
		unsigned int *d_scanned,
		unsigned int *d_ref, 
		int step)
{
	int index = blockDim.x * blockIdx.x + threadIdx.x;

	if ( (index % step) == (step - 1))
	{
		d_scanned[index] = d_ref[index] + d_ref[index - (step/2)];
		d_scanned[index - (step/2)] = d_ref[index];
	}
}

__global__ void getOffset(
		unsigned int *d_offset,
		unsigned int *d_0sum,
		unsigned int *d_1sum,
		unsigned int *d_map)
{
	int index = blockDim.x * blockIdx.x + threadIdx.x;

	if (d_map[index] == 1)
		d_offset[index] = d_1sum[index];
	else
		d_offset[index] = d_0sum[index];
}

__global__ void getNewIndices(
		unsigned int *d_newIndices,
		unsigned int *d_offset,
		unsigned int *d_histPSum)
{
	int index = blockDim.x * blockIdx.x + threadIdx.x;

	d_newIndices[index] = d_offset[index] + d_histPSum[index];
}



#define numberOfSort 16
#define num 14
void radixSort()
{
	const unsigned int h_input[16] = {
		5, 10, 0, 123, 12, 3, 11, 99, 11, 20, 2, 133, 27, 67, 0, 0
	};

	unsigned int* d_ref;
	unsigned int* d_map;
	unsigned int* d_sumScaned;
	unsigned int* d_histPSum;
	unsigned int* d_0sum;
	unsigned int* d_1sum;
	unsigned int* d_offset;
	unsigned int* d_newIndices;
	cudaMalloc(&d_ref, sizeof(unsigned int) * numberOfSort);
	cudaMalloc(&d_map, sizeof(unsigned int) * numberOfSort);
	cudaMalloc(&d_sumScaned, sizeof(unsigned int) * numberOfSort);
	cudaMalloc(&d_histPSum, sizeof(unsigned int) * numberOfSort);
	cudaMalloc(&d_0sum, sizeof(unsigned int) * numberOfSort);
	cudaMalloc(&d_1sum, sizeof(unsigned int) * numberOfSort);
	cudaMalloc(&d_offset, sizeof(unsigned int) * numberOfSort);
	cudaMalloc(&d_newIndices, sizeof(unsigned int) * numberOfSort);

	unsigned int* h_ref = (unsigned int*) malloc (sizeof(unsigned int) * numberOfSort);
	unsigned int* h_map = (unsigned int*) malloc (sizeof(unsigned int) * numberOfSort);
	unsigned int* h_sumScaned = (unsigned int*) malloc (sizeof(unsigned int) * numberOfSort);
	unsigned int* h_histPSum = (unsigned int*) malloc (sizeof(unsigned int) * numberOfSort);
	unsigned int* h_0sum = (unsigned int*) malloc (sizeof(unsigned int) * numberOfSort);
	unsigned int* h_1sum = (unsigned int*) malloc (sizeof(unsigned int) * numberOfSort);
	unsigned int* h_offset = (unsigned int*) malloc (sizeof(unsigned int) * numberOfSort);
	unsigned int* h_newIndices = (unsigned int*) malloc (sizeof(unsigned int) * numberOfSort);

	dim3 gridSize = dim3(4);
	dim3 blockSize = dim3(4);


	for (unsigned int bits = 0; bits < 32; bits++)
	{
		memcpy(h_ref, h_input, sizeof(unsigned int) * numberOfSort);
		cudaMemcpy(d_ref, h_ref, 
				sizeof(unsigned int) * numberOfSort, cudaMemcpyHostToDevice);

		mapBits<<<gridSize, blockSize>>>(d_map, d_ref, 1 << bits, 1);

		cudaMemcpy(h_sumScaned, d_map, 
				sizeof(unsigned int) * numberOfSort, cudaMemcpyDeviceToHost);

		for (int i = 0; i < numberOfSort; i++)
		{
			printf("%u\n", h_sumScaned[i]);
		}

		cudaMemcpy(d_ref, d_map, 
				sizeof(unsigned int) * numberOfSort, cudaMemcpyDeviceToDevice);

		// sum scan
		for (unsigned int i = 1; i <= numberOfSort; i*=2)
		{
			sumScan<<<gridSize, blockSize>>>(d_sumScaned, d_ref, i);
			cudaMemcpy(d_ref, d_sumScaned, 
					sizeof(unsigned int) * numberOfSort, cudaMemcpyDeviceToDevice);
		}

		cudaMemcpy(h_sumScaned, d_sumScaned, 
				sizeof(unsigned int) * numberOfSort, cudaMemcpyDeviceToHost);

		cudaMemcpy(d_ref, h_ref, 
				sizeof(unsigned int) * numberOfSort, cudaMemcpyHostToDevice);
		mapBits<<<gridSize, blockSize>>>(
				d_histPSum, d_ref, 1 << bits, numberOfSort - h_sumScaned[num-1]);
		cudaMemcpy(h_histPSum, d_histPSum,
				sizeof(unsigned int) * numberOfSort, cudaMemcpyDeviceToHost);


		// 0 sum
		memcpy(h_ref, h_input, sizeof(unsigned int) * numberOfSort);
		cudaMemcpy(d_ref, h_ref, 
				sizeof(unsigned int) * numberOfSort, cudaMemcpyHostToDevice);
		mapBitsRev<<<gridSize, blockSize>>>(d_ref, d_ref, (1<<bits), 1);
		cudaMemset(d_0sum, 0, sizeof(unsigned int) * numberOfSort);
		for (int i = 2; i < numberOfSort ; i *= 2)
		{
			blelloch<<<gridSize, blockSize>>>(d_0sum, d_ref, i);
			cudaMemcpy(d_ref, d_0sum, 
					sizeof(unsigned int) * numberOfSort, cudaMemcpyDeviceToDevice);
		}

		cudaMemcpy(h_ref, d_0sum,
				sizeof(unsigned int) * numberOfSort, cudaMemcpyDeviceToHost);
		h_ref[numberOfSort-1] = 0;
		cudaMemcpy(d_ref, h_ref,
				sizeof(unsigned int) * numberOfSort, cudaMemcpyHostToDevice);
		cudaMemcpy(d_0sum, d_ref, 
				sizeof(unsigned int) * numberOfSort, cudaMemcpyDeviceToDevice);

		for (int i = numberOfSort; i > 1; i /= 2)
		{
			blellochPost<<<gridSize, blockSize>>>(d_0sum, d_ref, i);
			cudaMemcpy(d_ref, d_0sum, 
					sizeof(unsigned int) * numberOfSort, cudaMemcpyDeviceToDevice);
		}
		cudaMemcpy(h_0sum, d_0sum, 
				sizeof(unsigned int) * numberOfSort, cudaMemcpyDeviceToHost);

		// 1 sum
		memcpy(h_ref, h_input, sizeof(unsigned int) * numberOfSort);
		cudaMemcpy(d_ref, h_ref, 
				sizeof(unsigned int) * numberOfSort, cudaMemcpyHostToDevice);
		mapBits<<<gridSize, blockSize>>>(d_ref, d_ref, (1<<bits), 1);
		cudaMemset(d_1sum, 0, sizeof(unsigned int) * numberOfSort);
		for (int i = 2; i < numberOfSort ; i *= 2)
		{
			blelloch<<<gridSize, blockSize>>>(d_1sum, d_ref, i);
			cudaMemcpy(d_ref, d_1sum, 
					sizeof(unsigned int) * numberOfSort, cudaMemcpyDeviceToDevice);
		}

		cudaMemcpy(h_ref, d_1sum,
				sizeof(unsigned int) * numberOfSort, cudaMemcpyDeviceToHost);
		h_ref[numberOfSort-1] = 0;
		cudaMemcpy(d_ref, h_ref,
				sizeof(unsigned int) * numberOfSort, cudaMemcpyHostToDevice);
		cudaMemcpy(d_1sum, d_ref, 
				sizeof(unsigned int) * numberOfSort, cudaMemcpyDeviceToDevice);

		for (int i = numberOfSort; i > 1; i /= 2)
		{
			blellochPost<<<gridSize, blockSize>>>(d_1sum, d_ref, i);
			cudaMemcpy(d_ref, d_1sum, 
					sizeof(unsigned int) * numberOfSort, cudaMemcpyDeviceToDevice);
		}
		cudaMemcpy(h_1sum, d_1sum, 
				sizeof(unsigned int) * numberOfSort, cudaMemcpyDeviceToHost);
		
		// offset
		getOffset<<<gridSize, blockSize>>>(d_offset, d_0sum, d_1sum, d_map);
	
		cudaMemcpy(h_offset, d_offset, 
				sizeof(unsigned int) * numberOfSort, cudaMemcpyDeviceToHost);

		// new Indices
		getNewIndices<<<gridSize, blockSize>>>(d_newIndices, d_offset, d_histPSum);
		cudaMemcpy(h_newIndices, d_newIndices, 
				sizeof(unsigned int) * numberOfSort, cudaMemcpyDeviceToHost);

		printf("\n");
		for (int i = 0; i < numberOfSort; i++)
		{
			printf("%u %u %u\n",
					h_offset[i], h_histPSum[i], h_newIndices[i]);
		}
		break;
	}

}

int main()
{
	//initRef();
	//map();
	//transpose();
	//gather();
	//scatter();
	//stencil();
	//reduce();
	//Hills_Steele_scan();
	//Blelloch_scan();
	radixSort();

	return 0;
}


	.file	"tmpxft_002c2fcc_00000000-6_main.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2043:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2043:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.type	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0, @function
_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0:
.LFB2216:
	.cfi_startproc
	jmp	cudaLaunchKernel@PLT
	.cfi_endproc
.LFE2216:
	.size	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0, .-_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	.type	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0, @function
_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0:
.LFB2217:
	.cfi_startproc
	jmp	cudaMalloc@PLT
	.cfi_endproc
.LFE2217:
	.size	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0, .-_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	.globl	_Z7initRefv
	.type	_Z7initRefv, @function
_Z7initRefv:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rdx
	.cfi_def_cfa_offset 16
	xorl	%edi, %edi
	call	time@PLT
	movl	%eax, %edi
	call	srand@PLT
	xorl	%eax, %eax
	leaq	ref(%rip), %rdx
.L5:
	cvtsi2ssl	%eax, %xmm0
	movss	%xmm0, (%rdx,%rax,4)
	incq	%rax
	cmpq	$64, %rax
	jne	.L5
	popq	%rax
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z7initRefv, .-_Z7initRefv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"printData\n"
.LC2:
	.string	"%9.3f "
.LC3:
	.string	"\n"
	.text
	.globl	_Z9printDataPf
	.type	_Z9printDataPf, @function
_Z9printDataPf:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	leaq	.LC1(%rip), %rsi
	xorl	%eax, %eax
	leaq	.LC2(%rip), %r14
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movq	%rdi, %r13
	movl	$2, %edi
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	call	__printf_chk@PLT
.L10:
	movq	%rbp, %r12
	xorl	%ebx, %ebx
	salq	$5, %r12
	addq	%r13, %r12
.L11:
	cvtss2sd	(%r12,%rbx,4), %xmm0
	movq	%r14, %rsi
	movl	$2, %edi
	movb	$1, %al
	call	__printf_chk@PLT
	incq	%rbx
	cmpq	$8, %rbx
	jne	.L11
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%rbp
	call	__printf_chk@PLT
	cmpq	$8, %rbp
	jne	.L10
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z9printDataPf, .-_Z9printDataPf
	.section	.rodata.str1.1
.LC4:
	.string	"%9.6f "
	.text
	.globl	_Z10printData2Pfii
	.type	_Z10printData2Pfii, @function
_Z10printData2Pfii:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	xorl	%eax, %eax
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%esi, %r14d
	leaq	.LC1(%rip), %rsi
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdi, %rbp
	movl	$2, %edi
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%edx, %ebx
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	call	__printf_chk@PLT
.L16:
	cmpl	%r14d, %r13d
	jge	.L15
	movslq	%r12d, %rax
	xorl	%r15d, %r15d
	leaq	0(%rbp,%rax,4), %rcx
.L19:
	cmpl	%r15d, %ebx
	jle	.L21
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	(%rcx,%r15,4), %xmm0
	movq	%rcx, 8(%rsp)
	incq	%r15
	call	__printf_chk@PLT
	movq	8(%rsp), %rcx
	jmp	.L19
.L21:
	leaq	.LC3(%rip), %rsi
	xorl	%eax, %eax
	incl	%r13d
	addl	%ebx, %r12d
	movl	$2, %edi
	call	__printf_chk@PLT
	jmp	.L16
.L15:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z10printData2Pfii, .-_Z10printData2Pfii
	.section	.rodata.str1.1
.LC5:
	.string	"printRef\n"
.LC6:
	.string	"%8.6f "
	.text
	.globl	_Z8printRefv
	.type	_Z8printRefv, @function
_Z8printRefv:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	leaq	.LC6(%rip), %r13
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	leaq	ref(%rip), %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	leaq	256(%rbp), %r12
	pushq	%rdx
	.cfi_def_cfa_offset 48
	call	__printf_chk@PLT
.L23:
	xorl	%ebx, %ebx
.L24:
	cvtss2sd	0(%rbp,%rbx,4), %xmm0
	movq	%r13, %rsi
	movl	$2, %edi
	movb	$1, %al
	call	__printf_chk@PLT
	incq	%rbx
	cmpq	$8, %rbx
	jne	.L24
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	addq	$32, %rbp
	call	__printf_chk@PLT
	cmpq	%r12, %rbp
	jne	.L23
	popq	%rax
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2030:
	.size	_Z8printRefv, .-_Z8printRefv
	.globl	_Z24__device_stub__Z3mapPfS_PfS_
	.type	_Z24__device_stub__Z3mapPfS_PfS_, @function
_Z24__device_stub__Z3mapPfS_PfS_:
.LFB2065:
	.cfi_startproc
	endbr64
	subq	$88, %rsp
	.cfi_def_cfa_offset 96
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	32(%rsp), %rdi
	leaq	44(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 56(%rsp)
	movq	%rsp, %rax
	movq	%rax, 64(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L28
	pushq	24(%rsp)
	.cfi_def_cfa_offset 104
	leaq	_Z3mapPfS_(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 112
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	72(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 104
	popq	%rdx
	.cfi_def_cfa_offset 96
.L28:
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L30
	call	__stack_chk_fail@PLT
.L30:
	addq	$88, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2065:
	.size	_Z24__device_stub__Z3mapPfS_PfS_, .-_Z24__device_stub__Z3mapPfS_PfS_
	.globl	_Z3mapPfS_
	.type	_Z3mapPfS_, @function
_Z3mapPfS_:
.LFB2066:
	.cfi_startproc
	endbr64
	jmp	_Z24__device_stub__Z3mapPfS_PfS_
	.cfi_endproc
.LFE2066:
	.size	_Z3mapPfS_, .-_Z3mapPfS_
	.section	.rodata.str1.1
.LC7:
	.string	"before : "
.LC9:
	.string	"after : "
	.text
	.globl	_Z3mapv
	.type	_Z3mapv, @function
_Z3mapv:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	ref(%rip), %rsi
	movl	$64, %ecx
	subq	$320, %rsp
	.cfi_def_cfa_offset 336
	movq	%fs:40, %rax
	movq	%rax, 312(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rbx
	leaq	56(%rsp), %rdi
	rep movsl
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	%rbx, %rdi
	call	_Z9printDataPf
	leaq	16(%rsp), %rdi
	movl	$256, %esi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	leaq	24(%rsp), %rdi
	movl	$4, %esi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	movq	24(%rsp), %rdi
	leaq	12(%rsp), %rsi
	movl	$1, %ecx
	movl	$1, %edx
	movl	$0x3fc00000, 12(%rsp)
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$256, %edx
	call	cudaMemcpy@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movabsq	$8589934594, %rdx
	movl	$1, %esi
	movabsq	$17179869188, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L34
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	call	_Z24__device_stub__Z3mapPfS_PfS_
.L34:
	movq	16(%rsp), %rsi
	movl	$2, %ecx
	movl	$256, %edx
	movq	%rbx, %rdi
	call	cudaMemcpy@PLT
	leaq	.LC9(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%rbx, %rdi
	call	_Z9printDataPf
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	312(%rsp), %rax
	subq	%fs:40, %rax
	je	.L35
	call	__stack_chk_fail@PLT
.L35:
	addq	$320, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2031:
	.size	_Z3mapv, .-_Z3mapv
	.globl	_Z30__device_stub__Z9transposePfS_PfS_
	.type	_Z30__device_stub__Z9transposePfS_PfS_, @function
_Z30__device_stub__Z9transposePfS_PfS_:
.LFB2067:
	.cfi_startproc
	endbr64
	subq	$88, %rsp
	.cfi_def_cfa_offset 96
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	32(%rsp), %rdi
	leaq	44(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 56(%rsp)
	movq	%rsp, %rax
	movq	%rax, 64(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L37
	pushq	24(%rsp)
	.cfi_def_cfa_offset 104
	leaq	_Z9transposePfS_(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 112
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	72(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 104
	popq	%rdx
	.cfi_def_cfa_offset 96
.L37:
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L39
	call	__stack_chk_fail@PLT
.L39:
	addq	$88, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2067:
	.size	_Z30__device_stub__Z9transposePfS_PfS_, .-_Z30__device_stub__Z9transposePfS_PfS_
	.globl	_Z9transposePfS_
	.type	_Z9transposePfS_, @function
_Z9transposePfS_:
.LFB2068:
	.cfi_startproc
	endbr64
	jmp	_Z30__device_stub__Z9transposePfS_PfS_
	.cfi_endproc
.LFE2068:
	.size	_Z9transposePfS_, .-_Z9transposePfS_
	.globl	_Z9transposev
	.type	_Z9transposev, @function
_Z9transposev:
.LFB2032:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	ref(%rip), %rsi
	movl	$64, %ecx
	subq	$304, %rsp
	.cfi_def_cfa_offset 320
	movq	%fs:40, %rax
	movq	%rax, 296(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rbx
	leaq	40(%rsp), %rdi
	rep movsl
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	%rbx, %rdi
	call	_Z9printDataPf
	movq	%rsp, %rdi
	movl	$256, %esi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	leaq	8(%rsp), %rdi
	movl	$256, %esi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$256, %edx
	call	cudaMemcpy@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movabsq	$8589934594, %rdx
	movl	$1, %esi
	movabsq	$17179869188, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L43
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	call	_Z30__device_stub__Z9transposePfS_PfS_
.L43:
	movq	(%rsp), %rsi
	movl	$2, %ecx
	movl	$256, %edx
	movq	%rbx, %rdi
	call	cudaMemcpy@PLT
	leaq	.LC9(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%rbx, %rdi
	call	_Z9printDataPf
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	296(%rsp), %rax
	subq	%fs:40, %rax
	je	.L44
	call	__stack_chk_fail@PLT
.L44:
	addq	$304, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2032:
	.size	_Z9transposev, .-_Z9transposev
	.globl	_Z27__device_stub__Z6gatherPfS_PfS_
	.type	_Z27__device_stub__Z6gatherPfS_PfS_, @function
_Z27__device_stub__Z6gatherPfS_PfS_:
.LFB2069:
	.cfi_startproc
	endbr64
	subq	$88, %rsp
	.cfi_def_cfa_offset 96
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	32(%rsp), %rdi
	leaq	44(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 56(%rsp)
	movq	%rsp, %rax
	movq	%rax, 64(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L46
	pushq	24(%rsp)
	.cfi_def_cfa_offset 104
	leaq	_Z6gatherPfS_(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 112
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	72(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 104
	popq	%rdx
	.cfi_def_cfa_offset 96
.L46:
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L48
	call	__stack_chk_fail@PLT
.L48:
	addq	$88, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2069:
	.size	_Z27__device_stub__Z6gatherPfS_PfS_, .-_Z27__device_stub__Z6gatherPfS_PfS_
	.globl	_Z6gatherPfS_
	.type	_Z6gatherPfS_, @function
_Z6gatherPfS_:
.LFB2070:
	.cfi_startproc
	endbr64
	jmp	_Z27__device_stub__Z6gatherPfS_PfS_
	.cfi_endproc
.LFE2070:
	.size	_Z6gatherPfS_, .-_Z6gatherPfS_
	.section	.rodata.str1.1
.LC11:
	.string	"run \n"
	.text
	.globl	_Z6gatherv
	.type	_Z6gatherv, @function
_Z6gatherv:
.LFB2033:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	ref(%rip), %rsi
	movl	$64, %ecx
	subq	$304, %rsp
	.cfi_def_cfa_offset 320
	movq	%fs:40, %rax
	movq	%rax, 296(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rbx
	leaq	40(%rsp), %rdi
	rep movsl
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	%rbx, %rdi
	call	_Z9printDataPf
	leaq	8(%rsp), %rdi
	movl	$256, %esi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	movq	%rsp, %rdi
	movl	$256, %esi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$256, %edx
	call	cudaMemcpy@PLT
	movq	(%rsp), %rdi
	movl	$256, %edx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	leaq	.LC11(%rip), %rsi
	movabsq	$8589934594, %rax
	movl	$2, %edi
	movq	%rax, 16(%rsp)
	movabsq	$17179869188, %rax
	movq	%rax, 28(%rsp)
	xorl	%eax, %eax
	movl	$1, 24(%rsp)
	movl	$1, 36(%rsp)
	call	__printf_chk@PLT
	movl	24(%rsp), %ecx
	movl	36(%rsp), %esi
	xorl	%r9d, %r9d
	movq	16(%rsp), %rdx
	movq	28(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L52
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	call	_Z27__device_stub__Z6gatherPfS_PfS_
.L52:
	movq	(%rsp), %rsi
	movl	$2, %ecx
	movl	$256, %edx
	movq	%rbx, %rdi
	call	cudaMemcpy@PLT
	leaq	.LC9(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%rbx, %rdi
	call	_Z9printDataPf
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	296(%rsp), %rax
	subq	%fs:40, %rax
	je	.L53
	call	__stack_chk_fail@PLT
.L53:
	addq	$304, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2033:
	.size	_Z6gatherv, .-_Z6gatherv
	.globl	_Z28__device_stub__Z7scatterPfS_PfS_
	.type	_Z28__device_stub__Z7scatterPfS_PfS_, @function
_Z28__device_stub__Z7scatterPfS_PfS_:
.LFB2071:
	.cfi_startproc
	endbr64
	subq	$88, %rsp
	.cfi_def_cfa_offset 96
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	32(%rsp), %rdi
	leaq	44(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 56(%rsp)
	movq	%rsp, %rax
	movq	%rax, 64(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L55
	pushq	24(%rsp)
	.cfi_def_cfa_offset 104
	leaq	_Z7scatterPfS_(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 112
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	72(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 104
	popq	%rdx
	.cfi_def_cfa_offset 96
.L55:
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L57
	call	__stack_chk_fail@PLT
.L57:
	addq	$88, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2071:
	.size	_Z28__device_stub__Z7scatterPfS_PfS_, .-_Z28__device_stub__Z7scatterPfS_PfS_
	.globl	_Z7scatterPfS_
	.type	_Z7scatterPfS_, @function
_Z7scatterPfS_:
.LFB2072:
	.cfi_startproc
	endbr64
	jmp	_Z28__device_stub__Z7scatterPfS_PfS_
	.cfi_endproc
.LFE2072:
	.size	_Z7scatterPfS_, .-_Z7scatterPfS_
	.globl	_Z7scatterv
	.type	_Z7scatterv, @function
_Z7scatterv:
.LFB2034:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	ref(%rip), %rsi
	movl	$64, %ecx
	subq	$304, %rsp
	.cfi_def_cfa_offset 320
	movq	%fs:40, %rax
	movq	%rax, 296(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rbx
	leaq	40(%rsp), %rdi
	rep movsl
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	movq	%rbx, %rdi
	call	_Z9printDataPf
	leaq	8(%rsp), %rdi
	movl	$256, %esi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	movq	%rsp, %rdi
	movl	$256, %esi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$256, %edx
	call	cudaMemcpy@PLT
	movq	(%rsp), %rdi
	movl	$256, %edx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	leaq	.LC11(%rip), %rsi
	movabsq	$8589934594, %rax
	movl	$2, %edi
	movq	%rax, 16(%rsp)
	movabsq	$17179869188, %rax
	movq	%rax, 28(%rsp)
	xorl	%eax, %eax
	movl	$1, 24(%rsp)
	movl	$1, 36(%rsp)
	call	__printf_chk@PLT
	movl	24(%rsp), %ecx
	movl	36(%rsp), %esi
	xorl	%r9d, %r9d
	movq	16(%rsp), %rdx
	movq	28(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L61
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	call	_Z28__device_stub__Z7scatterPfS_PfS_
.L61:
	movq	(%rsp), %rsi
	movl	$2, %ecx
	movl	$256, %edx
	movq	%rbx, %rdi
	call	cudaMemcpy@PLT
	leaq	.LC9(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%rbx, %rdi
	call	_Z9printDataPf
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	296(%rsp), %rax
	subq	%fs:40, %rax
	je	.L62
	call	__stack_chk_fail@PLT
.L62:
	addq	$304, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2034:
	.size	_Z7scatterv, .-_Z7scatterv
	.globl	_Z30__device_stub__Z7stencilPfS_S_PfS_S_
	.type	_Z30__device_stub__Z7stencilPfS_S_PfS_S_, @function
_Z30__device_stub__Z7stencilPfS_S_PfS_S_:
.LFB2073:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L64
	pushq	48(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z7stencilPfS_S_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 144
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L64:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L66
	call	__stack_chk_fail@PLT
.L66:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2073:
	.size	_Z30__device_stub__Z7stencilPfS_S_PfS_S_, .-_Z30__device_stub__Z7stencilPfS_S_PfS_S_
	.globl	_Z7stencilPfS_S_
	.type	_Z7stencilPfS_S_, @function
_Z7stencilPfS_S_:
.LFB2074:
	.cfi_startproc
	endbr64
	jmp	_Z30__device_stub__Z7stencilPfS_S_PfS_S_
	.cfi_endproc
.LFE2074:
	.size	_Z7stencilPfS_S_, .-_Z7stencilPfS_S_
	.globl	_Z7stencilv
	.type	_Z7stencilv, @function
_Z7stencilv:
.LFB2035:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	ref(%rip), %rsi
	movl	$64, %ecx
	subq	$352, %rsp
	.cfi_def_cfa_offset 368
	movss	.LC12(%rip), %xmm0
	movq	%fs:40, %rax
	movq	%rax, 344(%rsp)
	xorl	%eax, %eax
	leaq	88(%rsp), %rbx
	leaq	88(%rsp), %rdi
	movabsq	$4489188110467124429, %rax
	rep movsl
	movq	%rax, 64(%rsp)
	xorl	%eax, %eax
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	movss	%xmm0, 56(%rsp)
	movss	%xmm0, 72(%rsp)
	movss	%xmm0, 80(%rsp)
	call	__printf_chk@PLT
	movq	%rbx, %rdi
	call	_Z9printDataPf
	leaq	8(%rsp), %rdi
	movl	$256, %esi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	movq	%rsp, %rdi
	movl	$256, %esi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	leaq	16(%rsp), %rdi
	movl	$36, %esi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$256, %edx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	leaq	52(%rsp), %rsi
	movl	$36, %edx
	call	cudaMemcpy@PLT
	movq	(%rsp), %rdi
	movl	$256, %edx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	leaq	.LC11(%rip), %rsi
	movabsq	$8589934594, %rax
	movl	$2, %edi
	movq	%rax, 28(%rsp)
	movabsq	$17179869188, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	movl	$1, 36(%rsp)
	movl	$1, 48(%rsp)
	call	__printf_chk@PLT
	movl	36(%rsp), %ecx
	movl	48(%rsp), %esi
	xorl	%r9d, %r9d
	movq	28(%rsp), %rdx
	movq	40(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L70
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	call	_Z30__device_stub__Z7stencilPfS_S_PfS_S_
.L70:
	movq	(%rsp), %rsi
	movl	$2, %ecx
	movl	$256, %edx
	movq	%rbx, %rdi
	call	cudaMemcpy@PLT
	leaq	.LC9(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%rbx, %rdi
	call	_Z9printDataPf
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	344(%rsp), %rax
	subq	%fs:40, %rax
	je	.L71
	call	__stack_chk_fail@PLT
.L71:
	addq	$352, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2035:
	.size	_Z7stencilv, .-_Z7stencilv
	.globl	_Z27__device_stub__Z6reducePfS_PfS_
	.type	_Z27__device_stub__Z6reducePfS_PfS_, @function
_Z27__device_stub__Z6reducePfS_PfS_:
.LFB2075:
	.cfi_startproc
	endbr64
	subq	$88, %rsp
	.cfi_def_cfa_offset 96
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	32(%rsp), %rdi
	leaq	44(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 56(%rsp)
	movq	%rsp, %rax
	movq	%rax, 64(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L73
	pushq	24(%rsp)
	.cfi_def_cfa_offset 104
	leaq	_Z6reducePfS_(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 112
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	72(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 104
	popq	%rdx
	.cfi_def_cfa_offset 96
.L73:
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L75
	call	__stack_chk_fail@PLT
.L75:
	addq	$88, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2075:
	.size	_Z27__device_stub__Z6reducePfS_PfS_, .-_Z27__device_stub__Z6reducePfS_PfS_
	.globl	_Z6reducePfS_
	.type	_Z6reducePfS_, @function
_Z6reducePfS_:
.LFB2076:
	.cfi_startproc
	endbr64
	jmp	_Z27__device_stub__Z6reducePfS_PfS_
	.cfi_endproc
.LFE2076:
	.size	_Z6reducePfS_, .-_Z6reducePfS_
	.section	.rodata.str1.1
.LC13:
	.string	"%f\n"
	.text
	.globl	_Z6reducev
	.type	_Z6reducev, @function
_Z6reducev:
.LFB2036:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leaq	ref(%rip), %rsi
	movl	$64, %ecx
	movabsq	$8589934594, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	$3, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	$4, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$328, %rsp
	.cfi_def_cfa_offset 384
	movq	%fs:40, %rax
	movq	%rax, 312(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rdi
	leaq	56(%rsp), %rbp
	rep movsl
	movl	$1024, %edi
	call	malloc@PLT
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rbx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%rbp, %rdi
	call	_Z9printDataPf
	leaq	24(%rsp), %rax
	movl	$256, %esi
	movq	%rax, %rdi
	movq	%rax, (%rsp)
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	leaq	16(%rsp), %rax
	movl	$64, %esi
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	movq	24(%rsp), %rdi
	movq	%rbp, %rsi
	movl	$1, %ecx
	movl	$256, %edx
	movl	$256, %ebp
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	movl	$64, %edx
	xorl	%esi, %esi
	call	cudaMemset@PLT
.L79:
	movl	%r12d, 44(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r15, %rdx
	movl	%r12d, 48(%rsp)
	movq	44(%rsp), %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movq	%r15, 32(%rsp)
	movl	$1, 40(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L81
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	call	_Z27__device_stub__Z6reducePfS_PfS_
.L81:
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	movq	%rbp, %r13
	call	__printf_chk@PLT
	shrq	$2, %r13
	movq	%rbx, %rdi
	call	free@PLT
	movq	%r13, %rdi
	call	malloc@PLT
	movq	16(%rsp), %rsi
	movq	%r13, %rdx
	movl	$2, %ecx
	movq	%rax, %rbx
	movq	%rax, %rdi
	call	cudaMemcpy@PLT
	movl	%r12d, %edx
	movl	%r12d, %esi
	movq	%rbx, %rdi
	call	_Z10printData2Pfii
	decl	%r14d
	je	.L80
	movq	24(%rsp), %rdi
	shrq	$4, %rbp
	sarl	%r12d
	call	cudaFree@PLT
	movq	(%rsp), %rdi
	movq	%r13, %rsi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	movq	16(%rsp), %rsi
	movq	24(%rsp), %rdi
	movq	%r13, %rdx
	movl	$3, %ecx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	movq	%rbp, %rsi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	movq	16(%rsp), %rdi
	movq	%rbp, %rdx
	xorl	%esi, %esi
	movq	%r13, %rbp
	call	cudaMemset@PLT
	jmp	.L79
.L80:
	movq	16(%rsp), %rsi
	movl	$2, %ecx
	movl	$1, %edx
	movq	%rbx, %rdi
	call	cudaMemcpy@PLT
	movl	$2, %edi
	movb	$1, %al
	leaq	.LC13(%rip), %rsi
	cvtss2sd	(%rbx), %xmm0
	call	__printf_chk@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	312(%rsp), %rax
	subq	%fs:40, %rax
	je	.L83
	call	__stack_chk_fail@PLT
.L83:
	addq	$328, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2036:
	.size	_Z6reducev, .-_Z6reducev
	.globl	_Z35__device_stub__Z12hills_steelePfS_iPfS_i
	.type	_Z35__device_stub__Z12hills_steelePfS_iPfS_i, @function
_Z35__device_stub__Z12hills_steelePfS_iPfS_i:
.LFB2077:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L87
	pushq	48(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z12hills_steelePfS_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 144
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L87:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L89
	call	__stack_chk_fail@PLT
.L89:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2077:
	.size	_Z35__device_stub__Z12hills_steelePfS_iPfS_i, .-_Z35__device_stub__Z12hills_steelePfS_iPfS_i
	.globl	_Z12hills_steelePfS_i
	.type	_Z12hills_steelePfS_i, @function
_Z12hills_steelePfS_i:
.LFB2078:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z12hills_steelePfS_iPfS_i
	.cfi_endproc
.LFE2078:
	.size	_Z12hills_steelePfS_i, .-_Z12hills_steelePfS_i
	.section	.rodata.str1.1
.LC14:
	.string	"before : \n"
	.text
	.globl	_Z17Hills_Steele_scanv
	.type	_Z17Hills_Steele_scanv, @function
_Z17Hills_Steele_scanv:
.LFB2037:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	leaq	ref(%rip), %rsi
	movl	$64, %ecx
	movabsq	$8589934594, %r13
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movl	$1, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$312, %rsp
	.cfi_def_cfa_offset 352
	movq	%fs:40, %rax
	movq	%rax, 296(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rdi
	leaq	40(%rsp), %rbp
	rep movsl
	movl	$1024, %edi
	call	malloc@PLT
	leaq	.LC14(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rbx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%rbp, %rdi
	call	_Z9printDataPf
	leaq	8(%rsp), %rdi
	movl	$256, %esi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	movq	%rsp, %rdi
	movl	$256, %esi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	movq	8(%rsp), %rdi
	movq	%rbp, %rsi
	movl	$1, %ecx
	movl	$256, %edx
	movl	$7, %ebp
	call	cudaMemcpy@PLT
	movq	(%rsp), %rdi
	movl	$256, %edx
	xorl	%esi, %esi
	call	cudaMemset@PLT
.L94:
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r13, %rdx
	movl	$1, %ecx
	movabsq	$17179869188, %rdi
	movl	$1, %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L93
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	movl	%r12d, %edx
	call	_Z35__device_stub__Z12hills_steelePfS_iPfS_i
.L93:
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	movl	$3, %ecx
	addl	%r12d, %r12d
	movl	$256, %edx
	call	cudaMemcpy@PLT
	decl	%ebp
	jne	.L94
	movq	(%rsp), %rsi
	movl	$2, %ecx
	movl	$256, %edx
	movq	%rbx, %rdi
	call	cudaMemcpy@PLT
	movq	%rbx, %rdi
	call	_Z9printDataPf
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	296(%rsp), %rax
	subq	%fs:40, %rax
	je	.L95
	call	__stack_chk_fail@PLT
.L95:
	addq	$312, %rsp
	.cfi_def_cfa_offset 40
	movq	%rbx, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	free@PLT
	.cfi_endproc
.LFE2037:
	.size	_Z17Hills_Steele_scanv, .-_Z17Hills_Steele_scanv
	.globl	_Z30__device_stub__Z8blellochPfS_iPfS_i
	.type	_Z30__device_stub__Z8blellochPfS_iPfS_i, @function
_Z30__device_stub__Z8blellochPfS_iPfS_i:
.LFB2079:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L99
	pushq	48(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z8blellochPfS_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 144
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L99:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L101
	call	__stack_chk_fail@PLT
.L101:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2079:
	.size	_Z30__device_stub__Z8blellochPfS_iPfS_i, .-_Z30__device_stub__Z8blellochPfS_iPfS_i
	.globl	_Z8blellochPfS_i
	.type	_Z8blellochPfS_i, @function
_Z8blellochPfS_i:
.LFB2080:
	.cfi_startproc
	endbr64
	jmp	_Z30__device_stub__Z8blellochPfS_iPfS_i
	.cfi_endproc
.LFE2080:
	.size	_Z8blellochPfS_i, .-_Z8blellochPfS_i
	.globl	_Z36__device_stub__Z13blelloch_postPfS_iPfS_i
	.type	_Z36__device_stub__Z13blelloch_postPfS_iPfS_i, @function
_Z36__device_stub__Z13blelloch_postPfS_iPfS_i:
.LFB2081:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L104
	pushq	48(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z13blelloch_postPfS_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 144
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L104:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L106
	call	__stack_chk_fail@PLT
.L106:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2081:
	.size	_Z36__device_stub__Z13blelloch_postPfS_iPfS_i, .-_Z36__device_stub__Z13blelloch_postPfS_iPfS_i
	.globl	_Z13blelloch_postPfS_i
	.type	_Z13blelloch_postPfS_i, @function
_Z13blelloch_postPfS_i:
.LFB2082:
	.cfi_startproc
	endbr64
	jmp	_Z36__device_stub__Z13blelloch_postPfS_iPfS_i
	.cfi_endproc
.LFE2082:
	.size	_Z13blelloch_postPfS_i, .-_Z13blelloch_postPfS_i
	.globl	_Z13Blelloch_scanv
	.type	_Z13Blelloch_scanv, @function
_Z13Blelloch_scanv:
.LFB2038:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	leaq	ref(%rip), %rsi
	movl	$64, %ecx
	movl	$2, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movl	$5, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$312, %rsp
	.cfi_def_cfa_offset 352
	movq	%fs:40, %rax
	movq	%rax, 296(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rbp
	leaq	40(%rsp), %rdi
	rep movsl
	movl	$1024, %edi
	call	malloc@PLT
	movq	%rbp, %rdi
	movq	%rax, %rbx
	call	_Z9printDataPf
	leaq	8(%rsp), %rdi
	movl	$256, %esi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	movq	%rsp, %rdi
	movl	$256, %esi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$256, %edx
	call	cudaMemcpy@PLT
	movq	(%rsp), %rdi
	movl	$256, %edx
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movl	$1, 24(%rsp)
	movabsq	$8589934594, %rax
	movq	%rax, 16(%rsp)
	movabsq	$17179869188, %rax
	movq	%rax, 28(%rsp)
	movl	$1, 36(%rsp)
.L111:
	movl	24(%rsp), %ecx
	movq	16(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	28(%rsp), %rdi
	movl	36(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L110
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	movl	%r13d, %edx
	call	_Z30__device_stub__Z8blellochPfS_iPfS_i
.L110:
	movq	(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	addl	%r13d, %r13d
	movl	$256, %edx
	call	cudaMemcpy@PLT
	movq	%rbx, %rdi
	call	_Z9printDataPf
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	movl	$3, %ecx
	movl	$256, %edx
	call	cudaMemcpy@PLT
	decl	%r12d
	jne	.L111
	movq	(%rsp), %rsi
	movq	%rbp, %rdi
	movl	$2, %ecx
	movl	$256, %edx
	movl	$64, %r12d
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdi
	movq	%rbp, %rsi
	movl	$1, %ecx
	movl	$256, %edx
	movl	$6, %ebp
	movl	$0x00000000, 292(%rsp)
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	movl	$3, %ecx
	movl	$256, %edx
	call	cudaMemcpy@PLT
.L113:
	movl	24(%rsp), %ecx
	movq	16(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	28(%rsp), %rdi
	movl	36(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L112
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	movl	%r12d, %edx
	call	_Z36__device_stub__Z13blelloch_postPfS_iPfS_i
.L112:
	movq	(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	sarl	%r12d
	movl	$256, %edx
	call	cudaMemcpy@PLT
	movq	%rbx, %rdi
	call	_Z9printDataPf
	movq	(%rsp), %rsi
	movq	8(%rsp), %rdi
	movl	$3, %ecx
	movl	$256, %edx
	call	cudaMemcpy@PLT
	decl	%ebp
	jne	.L113
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	296(%rsp), %rax
	subq	%fs:40, %rax
	je	.L114
	call	__stack_chk_fail@PLT
.L114:
	addq	$312, %rsp
	.cfi_def_cfa_offset 40
	movq	%rbx, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	free@PLT
	.cfi_endproc
.LFE2038:
	.size	_Z13Blelloch_scanv, .-_Z13Blelloch_scanv
	.globl	_Z30__device_stub__Z7mapBitsPjS_jjPjS_jj
	.type	_Z30__device_stub__Z7mapBitsPjS_jjPjS_jj, @function
_Z30__device_stub__Z7mapBitsPjS_jjPjS_jj:
.LFB2083:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L119
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z7mapBitsPjS_jj(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L119:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L121
	call	__stack_chk_fail@PLT
.L121:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2083:
	.size	_Z30__device_stub__Z7mapBitsPjS_jjPjS_jj, .-_Z30__device_stub__Z7mapBitsPjS_jjPjS_jj
	.globl	_Z7mapBitsPjS_jj
	.type	_Z7mapBitsPjS_jj, @function
_Z7mapBitsPjS_jj:
.LFB2084:
	.cfi_startproc
	endbr64
	jmp	_Z30__device_stub__Z7mapBitsPjS_jjPjS_jj
	.cfi_endproc
.LFE2084:
	.size	_Z7mapBitsPjS_jj, .-_Z7mapBitsPjS_jj
	.globl	_Z34__device_stub__Z10mapBitsRevPjS_jjPjS_jj
	.type	_Z34__device_stub__Z10mapBitsRevPjS_jjPjS_jj, @function
_Z34__device_stub__Z10mapBitsRevPjS_jjPjS_jj:
.LFB2085:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L124
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z10mapBitsRevPjS_jj(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L124:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L126
	call	__stack_chk_fail@PLT
.L126:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2085:
	.size	_Z34__device_stub__Z10mapBitsRevPjS_jjPjS_jj, .-_Z34__device_stub__Z10mapBitsRevPjS_jjPjS_jj
	.globl	_Z10mapBitsRevPjS_jj
	.type	_Z10mapBitsRevPjS_jj, @function
_Z10mapBitsRevPjS_jj:
.LFB2086:
	.cfi_startproc
	endbr64
	jmp	_Z34__device_stub__Z10mapBitsRevPjS_jjPjS_jj
	.cfi_endproc
.LFE2086:
	.size	_Z10mapBitsRevPjS_jj, .-_Z10mapBitsRevPjS_jj
	.globl	_Z29__device_stub__Z7sumScanPjS_iPjS_i
	.type	_Z29__device_stub__Z7sumScanPjS_iPjS_i, @function
_Z29__device_stub__Z7sumScanPjS_iPjS_i:
.LFB2087:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L129
	pushq	48(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z7sumScanPjS_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 144
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L129:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L131
	call	__stack_chk_fail@PLT
.L131:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2087:
	.size	_Z29__device_stub__Z7sumScanPjS_iPjS_i, .-_Z29__device_stub__Z7sumScanPjS_iPjS_i
	.globl	_Z7sumScanPjS_i
	.type	_Z7sumScanPjS_i, @function
_Z7sumScanPjS_i:
.LFB2088:
	.cfi_startproc
	endbr64
	jmp	_Z29__device_stub__Z7sumScanPjS_iPjS_i
	.cfi_endproc
.LFE2088:
	.size	_Z7sumScanPjS_i, .-_Z7sumScanPjS_i
	.globl	_Z30__device_stub__Z8blellochPjS_iPjS_i
	.type	_Z30__device_stub__Z8blellochPjS_iPjS_i, @function
_Z30__device_stub__Z8blellochPjS_iPjS_i:
.LFB2089:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L134
	pushq	48(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z8blellochPjS_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 144
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L134:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L136
	call	__stack_chk_fail@PLT
.L136:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2089:
	.size	_Z30__device_stub__Z8blellochPjS_iPjS_i, .-_Z30__device_stub__Z8blellochPjS_iPjS_i
	.globl	_Z8blellochPjS_i
	.type	_Z8blellochPjS_i, @function
_Z8blellochPjS_i:
.LFB2090:
	.cfi_startproc
	endbr64
	jmp	_Z30__device_stub__Z8blellochPjS_iPjS_i
	.cfi_endproc
.LFE2090:
	.size	_Z8blellochPjS_i, .-_Z8blellochPjS_i
	.globl	_Z35__device_stub__Z12blellochPostPjS_iPjS_i
	.type	_Z35__device_stub__Z12blellochPostPjS_iPjS_i, @function
_Z35__device_stub__Z12blellochPostPjS_iPjS_i:
.LFB2091:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L139
	pushq	48(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z12blellochPostPjS_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 144
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L139:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L141
	call	__stack_chk_fail@PLT
.L141:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2091:
	.size	_Z35__device_stub__Z12blellochPostPjS_iPjS_i, .-_Z35__device_stub__Z12blellochPostPjS_iPjS_i
	.globl	_Z12blellochPostPjS_i
	.type	_Z12blellochPostPjS_i, @function
_Z12blellochPostPjS_i:
.LFB2092:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z12blellochPostPjS_iPjS_i
	.cfi_endproc
.LFE2092:
	.size	_Z12blellochPostPjS_i, .-_Z12blellochPostPjS_i
	.globl	_Z34__device_stub__Z9getOffsetPjS_S_S_PjS_S_S_
	.type	_Z34__device_stub__Z9getOffsetPjS_S_S_PjS_S_S_, @function
_Z34__device_stub__Z9getOffsetPjS_S_S_PjS_S_S_:
.LFB2093:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	40(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 72(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 80(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L144
	pushq	40(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z9getOffsetPjS_S_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 144
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	88(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L144:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L146
	call	__stack_chk_fail@PLT
.L146:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2093:
	.size	_Z34__device_stub__Z9getOffsetPjS_S_S_PjS_S_S_, .-_Z34__device_stub__Z9getOffsetPjS_S_S_PjS_S_S_
	.globl	_Z9getOffsetPjS_S_S_
	.type	_Z9getOffsetPjS_S_S_, @function
_Z9getOffsetPjS_S_S_:
.LFB2094:
	.cfi_startproc
	endbr64
	jmp	_Z34__device_stub__Z9getOffsetPjS_S_S_PjS_S_S_
	.cfi_endproc
.LFE2094:
	.size	_Z9getOffsetPjS_S_S_, .-_Z9getOffsetPjS_S_S_
	.globl	_Z37__device_stub__Z13getNewIndicesPjS_S_PjS_S_
	.type	_Z37__device_stub__Z13getNewIndicesPjS_S_PjS_S_, @function
_Z37__device_stub__Z13getNewIndicesPjS_S_PjS_S_:
.LFB2095:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L149
	pushq	48(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z13getNewIndicesPjS_S_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 144
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L149:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L151
	call	__stack_chk_fail@PLT
.L151:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2095:
	.size	_Z37__device_stub__Z13getNewIndicesPjS_S_PjS_S_, .-_Z37__device_stub__Z13getNewIndicesPjS_S_PjS_S_
	.globl	_Z13getNewIndicesPjS_S_
	.type	_Z13getNewIndicesPjS_S_, @function
_Z13getNewIndicesPjS_S_:
.LFB2096:
	.cfi_startproc
	endbr64
	jmp	_Z37__device_stub__Z13getNewIndicesPjS_S_PjS_S_
	.cfi_endproc
.LFE2096:
	.size	_Z13getNewIndicesPjS_S_, .-_Z13getNewIndicesPjS_S_
	.section	.rodata.str1.1
.LC16:
	.string	"%u\n"
.LC17:
	.string	"%u %u %u\n"
	.section	.rodata
	.align 32
.LC0:
	.long	5
	.long	10
	.long	0
	.long	123
	.long	12
	.long	3
	.long	11
	.long	99
	.long	11
	.long	20
	.long	2
	.long	133
	.long	27
	.long	67
	.long	0
	.long	0
	.text
	.globl	_Z9radixSortv
	.type	_Z9radixSortv, @function
_Z9radixSortv:
.LFB2039:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leaq	.LC0(%rip), %rsi
	movl	$16, %ecx
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$200, %rsp
	.cfi_def_cfa_offset 256
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	120(%rsp), %rdi
	rep movsl
	leaq	32(%rsp), %rdi
	movl	$64, %esi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	leaq	40(%rsp), %rdi
	movl	$64, %esi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	leaq	48(%rsp), %rdi
	movl	$64, %esi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	leaq	56(%rsp), %rdi
	movl	$64, %esi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	leaq	64(%rsp), %rdi
	movl	$64, %esi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	leaq	72(%rsp), %rdi
	movl	$64, %esi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	leaq	80(%rsp), %rdi
	movl	$64, %esi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	movl	$64, %esi
	leaq	88(%rsp), %rdi
	call	_Z10cudaMallocIfE9cudaErrorPPT_m.isra.0
	movl	$64, %edi
	call	malloc@PLT
	movl	$64, %edi
	movq	%rax, %rbx
	call	malloc@PLT
	movl	$64, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	movl	$64, %edi
	movq	%rax, %r13
	call	malloc@PLT
	movl	$64, %edi
	movq	%rax, 16(%rsp)
	call	malloc@PLT
	movl	$64, %edi
	movq	%rax, 24(%rsp)
	call	malloc@PLT
	movl	$64, %edi
	movq	%rax, %r12
	call	malloc@PLT
	leaq	120(%rsp), %rsi
	movl	$16, %ecx
	movq	%rbx, %rdi
	rep movsl
	movq	%rax, (%rsp)
	movq	%rbx, %rsi
	movq	32(%rsp), %rdi
	movl	$1073741825, %eax
	movl	$1, %ecx
	movl	$64, %edx
	movl	$1, 104(%rsp)
	salq	$2, %rax
	movl	$1, 116(%rsp)
	movq	%rax, 96(%rsp)
	movq	%rax, 108(%rsp)
	call	cudaMemcpy@PLT
	movl	116(%rsp), %ecx
	movl	104(%rsp), %esi
	xorl	%r9d, %r9d
	movq	108(%rsp), %rdx
	movq	96(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	leaq	120(%rsp), %rax
	movq	%rax, 8(%rsp)
	jne	.L155
	movq	32(%rsp), %rsi
	movq	40(%rsp), %rdi
	movl	$1, %ecx
	movl	$1, %edx
	call	_Z30__device_stub__Z7mapBitsPjS_jjPjS_jj
.L155:
	movq	40(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbp, %rdi
	xorl	%r15d, %r15d
	movl	$64, %edx
	leaq	.LC16(%rip), %r14
	call	cudaMemcpy@PLT
.L156:
	movl	0(%rbp,%r15,4), %edx
	movq	%r14, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%r15
	call	__printf_chk@PLT
	cmpq	$16, %r15
	jne	.L156
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdi
	movl	$3, %ecx
	movl	$64, %edx
	movl	$5, %r14d
	movl	$1, %r15d
	call	cudaMemcpy@PLT
.L158:
	movl	116(%rsp), %ecx
	movq	108(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	96(%rsp), %rdi
	movl	104(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L157
	movq	32(%rsp), %rsi
	movq	48(%rsp), %rdi
	movl	%r15d, %edx
	call	_Z29__device_stub__Z7sumScanPjS_iPjS_i
.L157:
	movq	48(%rsp), %rsi
	movq	32(%rsp), %rdi
	movl	$3, %ecx
	addl	%r15d, %r15d
	movl	$64, %edx
	call	cudaMemcpy@PLT
	decl	%r14d
	jne	.L158
	movq	48(%rsp), %rsi
	movl	$2, %ecx
	movl	$64, %edx
	movq	%rbp, %rdi
	call	cudaMemcpy@PLT
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$64, %edx
	call	cudaMemcpy@PLT
	movl	116(%rsp), %ecx
	movl	104(%rsp), %esi
	xorl	%r9d, %r9d
	movq	108(%rsp), %rdx
	movq	96(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L159
	movq	32(%rsp), %rsi
	movq	56(%rsp), %rdi
	movl	$16, %ecx
	movl	$1, %edx
	subl	52(%rbp), %ecx
	call	_Z30__device_stub__Z7mapBitsPjS_jjPjS_jj
.L159:
	movq	56(%rsp), %rsi
	movl	$2, %ecx
	movl	$64, %edx
	movq	%r13, %rdi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rsi
	movl	$16, %ecx
	movq	%rbx, %rdi
	rep movsl
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$64, %edx
	call	cudaMemcpy@PLT
	movl	116(%rsp), %ecx
	movl	104(%rsp), %esi
	xorl	%r9d, %r9d
	movq	108(%rsp), %rdx
	movq	96(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L160
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movl	$1, %edx
	movq	%rdi, %rsi
	call	_Z34__device_stub__Z10mapBitsRevPjS_jjPjS_jj
.L160:
	movq	64(%rsp), %rdi
	movl	$64, %edx
	xorl	%esi, %esi
	movl	$3, %ebp
	movl	$2, %r14d
	call	cudaMemset@PLT
.L162:
	movl	116(%rsp), %ecx
	movq	108(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	96(%rsp), %rdi
	movl	104(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L161
	movq	32(%rsp), %rsi
	movq	64(%rsp), %rdi
	movl	%r14d, %edx
	call	_Z30__device_stub__Z8blellochPjS_iPjS_i
.L161:
	movq	64(%rsp), %rsi
	movq	32(%rsp), %rdi
	movl	$3, %ecx
	addl	%r14d, %r14d
	movl	$64, %edx
	call	cudaMemcpy@PLT
	decl	%ebp
	jne	.L162
	movq	64(%rsp), %rsi
	movl	$2, %ecx
	movl	$64, %edx
	movq	%rbx, %rdi
	movl	$4, %ebp
	movl	$16, %r14d
	call	cudaMemcpy@PLT
	xorl	%edx, %edx
	movq	32(%rsp), %rdi
	movq	%rbx, %rsi
	movl	%edx, 60(%rbx)
	movl	$1, %ecx
	movl	$64, %edx
	call	cudaMemcpy@PLT
	movq	32(%rsp), %rsi
	movq	64(%rsp), %rdi
	movl	$3, %ecx
	movl	$64, %edx
	call	cudaMemcpy@PLT
.L164:
	movl	116(%rsp), %ecx
	movq	108(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	96(%rsp), %rdi
	movl	104(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L163
	movq	32(%rsp), %rsi
	movq	64(%rsp), %rdi
	movl	%r14d, %edx
	call	_Z35__device_stub__Z12blellochPostPjS_iPjS_i
.L163:
	movq	64(%rsp), %rsi
	movq	32(%rsp), %rdi
	movl	$3, %ecx
	sarl	%r14d
	movl	$64, %edx
	call	cudaMemcpy@PLT
	decl	%ebp
	jne	.L164
	movq	64(%rsp), %rsi
	movq	16(%rsp), %rdi
	movl	$2, %ecx
	movl	$64, %edx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rsi
	movl	$16, %ecx
	movq	%rbx, %rdi
	rep movsl
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$64, %edx
	call	cudaMemcpy@PLT
	movl	116(%rsp), %ecx
	movl	104(%rsp), %esi
	xorl	%r9d, %r9d
	movq	108(%rsp), %rdx
	movq	96(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L165
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movl	$1, %edx
	movq	%rdi, %rsi
	call	_Z30__device_stub__Z7mapBitsPjS_jjPjS_jj
.L165:
	movq	72(%rsp), %rdi
	movl	$64, %edx
	xorl	%esi, %esi
	movl	$3, %ebp
	movl	$2, %r14d
	call	cudaMemset@PLT
.L167:
	movl	116(%rsp), %ecx
	movq	108(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	96(%rsp), %rdi
	movl	104(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L166
	movq	32(%rsp), %rsi
	movq	72(%rsp), %rdi
	movl	%r14d, %edx
	call	_Z30__device_stub__Z8blellochPjS_iPjS_i
.L166:
	movq	72(%rsp), %rsi
	movq	32(%rsp), %rdi
	movl	$3, %ecx
	addl	%r14d, %r14d
	movl	$64, %edx
	call	cudaMemcpy@PLT
	decl	%ebp
	jne	.L167
	movq	72(%rsp), %rsi
	movq	%rbx, %rdi
	movl	$2, %ecx
	movl	$64, %edx
	movl	$16, %ebp
	call	cudaMemcpy@PLT
	xorl	%eax, %eax
	movq	32(%rsp), %rdi
	movq	%rbx, %rsi
	movl	%eax, 60(%rbx)
	movl	$1, %ecx
	movl	$64, %edx
	movl	$4, %ebx
	call	cudaMemcpy@PLT
	movq	32(%rsp), %rsi
	movq	72(%rsp), %rdi
	movl	$3, %ecx
	movl	$64, %edx
	call	cudaMemcpy@PLT
.L169:
	movl	116(%rsp), %ecx
	movq	108(%rsp), %rdx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	96(%rsp), %rdi
	movl	104(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L168
	movq	32(%rsp), %rsi
	movq	72(%rsp), %rdi
	movl	%ebp, %edx
	call	_Z35__device_stub__Z12blellochPostPjS_iPjS_i
.L168:
	movq	72(%rsp), %rsi
	movq	32(%rsp), %rdi
	movl	$3, %ecx
	sarl	%ebp
	movl	$64, %edx
	call	cudaMemcpy@PLT
	decl	%ebx
	jne	.L169
	movq	72(%rsp), %rsi
	movq	24(%rsp), %rdi
	movl	$2, %ecx
	movl	$64, %edx
	call	cudaMemcpy@PLT
	movl	116(%rsp), %ecx
	movl	104(%rsp), %esi
	xorl	%r9d, %r9d
	movq	108(%rsp), %rdx
	movq	96(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L170
	movq	40(%rsp), %rcx
	movq	72(%rsp), %rdx
	movq	64(%rsp), %rsi
	movq	80(%rsp), %rdi
	call	_Z34__device_stub__Z9getOffsetPjS_S_S_PjS_S_S_
.L170:
	movq	80(%rsp), %rsi
	movl	$2, %ecx
	movl	$64, %edx
	movq	%r12, %rdi
	call	cudaMemcpy@PLT
	movl	116(%rsp), %ecx
	movl	104(%rsp), %esi
	xorl	%r9d, %r9d
	movq	108(%rsp), %rdx
	movq	96(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L171
	movq	56(%rsp), %rdx
	movq	80(%rsp), %rsi
	movq	88(%rsp), %rdi
	call	_Z37__device_stub__Z13getNewIndicesPjS_S_PjS_S_
.L171:
	movq	88(%rsp), %rsi
	movq	(%rsp), %rdi
	movl	$2, %ecx
	xorl	%ebx, %ebx
	movl	$64, %edx
	leaq	.LC17(%rip), %rbp
	call	cudaMemcpy@PLT
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L172:
	movq	(%rsp), %rax
	movl	(%r12,%rbx), %edx
	movq	%rbp, %rsi
	movl	$2, %edi
	movl	0(%r13,%rbx), %ecx
	movl	(%rax,%rbx), %r8d
	xorl	%eax, %eax
	addq	$4, %rbx
	call	__printf_chk@PLT
	cmpq	$64, %rbx
	jne	.L172
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L173
	call	__stack_chk_fail@PLT
.L173:
	addq	$200, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2039:
	.size	_Z9radixSortv, .-_Z9radixSortv
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2040:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	_Z9radixSortv
	xorl	%eax, %eax
	popq	%rdx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2040:
	.size	main, .-main
	.section	.rodata.str1.1
.LC18:
	.string	"_Z13getNewIndicesPjS_S_"
.LC19:
	.string	"_Z9getOffsetPjS_S_S_"
.LC20:
	.string	"_Z12blellochPostPjS_i"
.LC21:
	.string	"_Z8blellochPjS_i"
.LC22:
	.string	"_Z7sumScanPjS_i"
.LC23:
	.string	"_Z10mapBitsRevPjS_jj"
.LC24:
	.string	"_Z7mapBitsPjS_jj"
.LC25:
	.string	"_Z13blelloch_postPfS_i"
.LC26:
	.string	"_Z8blellochPfS_i"
.LC27:
	.string	"_Z12hills_steelePfS_i"
.LC28:
	.string	"_Z6reducePfS_"
.LC29:
	.string	"_Z7stencilPfS_S_"
.LC30:
	.string	"_Z7scatterPfS_"
.LC31:
	.string	"_Z6gatherPfS_"
.LC32:
	.string	"_Z9transposePfS_"
.LC33:
	.string	"_Z3mapPfS_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2098:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC18(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z13getNewIndicesPjS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC19(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z9getOffsetPjS_S_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC20(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z12blellochPostPjS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC21(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z8blellochPjS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC22(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z7sumScanPjS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC23(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z10mapBitsRevPjS_jj(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC24(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z7mapBitsPjS_jj(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC25(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z13blelloch_postPfS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	leaq	.LC26(%rip), %rdx
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	_Z8blellochPfS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC27(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z12hills_steelePfS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC28(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z6reducePfS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC29(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z7stencilPfS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC30(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z7scatterPfS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC31(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z6gatherPfS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC32(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z9transposePfS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC33(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z3mapPfS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2098:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	ref
	.bss
	.align 32
	.type	ref, @object
	.size	ref, 256
ref:
	.zero	256
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC12:
	.long	1045220557
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <memory.h>
#include <time.h>

#define htod(dst, src, size)\
	    hipMemcpy(dst, src, size, hipMemcpyHostToDevice)
#define dtoh(dst, src, size)\
	    hipMemcpy(dst, src, size, hipMemcpyDeviceToHost)
#define dtod(dst, src, size)\
	    hipMemcpy(dst, src, size, hipMemcpyDeviceToDevice)

#define ROW 8
#define COL 8
float ref[ROW][COL];

void initRef()
{
	float *tmp = (float*)ref;
	srand((unsigned int) time (NULL));
	for (int i = 0; i < ROW * COL; i++)
	{
		tmp[i] = i;//(float)rand() / RAND_MAX;
	}
}

void printData(float *data)
{
	printf("printData\n");
	for (int i = 0; i < ROW; i++)
	{
		for(int j = 0; j < COL; j++)
		{
			float tmp = data[i * COL + j];
			printf("%9.3f ", tmp);
		}
		printf("\n");
	}
}

void printData2(float *data, int r, int c)
{
	printf("printData\n");
	for (int i = 0; i < r; i++)
	{
		for(int j = 0; j < c; j++)
		{
			float tmp = data[i * c + j];
			printf("%9.6f ", tmp);
		}
		printf("\n");
	}
}

void printRef()
{
	printf("printRef\n");
	for (int i = 0; i < ROW; i++)
	{
		for(int j = 0; j < COL; j++)
		{
			printf("%8.6f ", ref[i][j]);
		}
		printf("\n");
	}
}

__global__ void map(float *d_data, float *d_func)
{
	int width = gridDim.x * blockDim.x;
	int x = blockIdx.x * blockDim.x + threadIdx.x;
	int y = blockIdx.y * blockDim.y + threadIdx.y;

	d_data[y * width + x] += *d_func;
}

void map()
{
	float *d_mapped, *d_func;
	float *h_mapped, h_func;
	float tmp[ROW][COL];
	size_t size = sizeof(ref);
	memcpy(tmp, ref, size);
	h_mapped = (float*)tmp;

	printf("before : ");
	printData(h_mapped);

	hipMalloc(&d_mapped, size);
	hipMalloc(&d_func, sizeof(float));

	h_func = 1.5;
	htod(d_func, &h_func, 1);
	htod(d_mapped, h_mapped, size);

	
	int c = 2;
	dim3 blockSize = dim3(c, c);
	dim3 gridSize = dim3(COL / c, ROW / c);
	map<<<gridSize, blockSize>>>(d_mapped, d_func);

	dtoh(h_mapped, d_mapped, size);

	printf("after : ");
	printData(h_mapped);

	hipFree(d_mapped);
}

__global__ void transpose(float *d_transposed, float *d_ref)
{
	int width = gridDim.x * blockDim.x;
	int height = gridDim.y * blockDim.x;
	int x = blockIdx.x * blockDim.x + threadIdx.x;
	int y = blockIdx.y * blockDim.y + threadIdx.y;
	

	d_transposed[x * height + y] = d_ref[y * width + x];
}

void transpose()
{
	float *d_transposed, *d_ref;
	float *h_transposed, *h_ref;
	float tmp[ROW][COL];
	size_t size = sizeof(ref);
	memcpy(tmp, ref, size);
	h_ref = (float*)tmp;
	h_transposed = (float*)tmp;

	printf("before : ");
	printData(h_ref);

	hipMalloc(&d_transposed, size);
	hipMalloc(&d_ref, size);

	htod(d_ref, h_ref, size);

	
	int c = 2;
	dim3 blockSize = dim3(c, c);
	dim3 gridSize = dim3(COL / c, ROW / c);
	transpose<<<gridSize, blockSize>>>(d_transposed, d_ref);

	dtoh(h_transposed, d_transposed, size);

	printf("after : ");
	printData(h_transposed);

	hipFree(d_transposed);
	hipFree(d_ref);
}

__global__ void gather(float *d_gathered, float *d_ref)
{
	int width = gridDim.x * blockDim.x;
	int height = gridDim.y * blockDim.x;
	int x = blockIdx.x * blockDim.x + threadIdx.x;
	int y = blockIdx.y * blockDim.y + threadIdx.y;
	int cnt = 0;
	
	for (int yy = y - 1; yy < y + 2; yy++)
	{
		for (int xx = x - 1; xx < x + 2; xx++)
		{
			if (xx >= 0 && xx < width && yy >= 0 && yy < height)
			{
				d_gathered[y * width + x] += d_ref[yy * width + xx];
				cnt++;
			}
		}
	}
	d_gathered[y * width + x] /= cnt;
}

void gather()
{
	float *d_gathered, *d_ref;
	float *h_gathered, *h_ref;
	float tmp[ROW][COL];
	size_t size = sizeof(ref);
	memcpy(tmp, ref, size);
	h_ref = (float*)tmp;
	h_gathered = (float*)tmp;

	printf("before : ");
	printData(h_ref);

	hipMalloc(&d_ref, size);
	hipMalloc(&d_gathered, size);

	htod(d_ref, h_ref, size);
	hipMemset(d_gathered, 0, size);
	
	int c = 2;
	dim3 blockSize = dim3(c, c);
	dim3 gridSize = dim3(COL / c, ROW / c);
	printf("run \n");
	gather<<<gridSize, blockSize>>>(d_gathered, d_ref);

	dtoh(h_gathered, d_gathered, size);

	printf("after : ");
	printData(h_gathered);

	hipFree(d_gathered);
	hipFree(d_ref);
}

__global__ void scatter(float *d_scattered, float *d_ref)
{
	int width = gridDim.x * blockDim.x;
	int height = gridDim.y * blockDim.x;
	int x = blockIdx.x * blockDim.x + threadIdx.x;
	int y = blockIdx.y * blockDim.y + threadIdx.y;
	int cnt = 0;
	
	for (int yy = y - 1; yy < y + 2; yy++)
	{
		for (int xx = x - 1; xx < x + 2; xx++)
		{
			if (xx >= 0 && xx < width && yy >= 0 && yy < height)
			{
				d_scattered[yy * width + xx] += d_ref[y * width + x];
				cnt++;
			}
		}
	}
	d_scattered[y * width + x] /= cnt;
}

void scatter()
{
	float *d_scattered, *d_ref;
	float *h_scattered, *h_ref;
	float tmp[ROW][COL];
	size_t size = sizeof(ref);
	memcpy(tmp, ref, size);
	h_ref = (float*)tmp;
	h_scattered = (float*)tmp;

	printf("before : ");
	printData(h_ref);

	hipMalloc(&d_ref, size);
	hipMalloc(&d_scattered, size);

	htod(d_ref, h_ref, size);
	hipMemset(d_scattered, 0, size);
	
	int c = 2;
	dim3 blockSize = dim3(c, c);
	dim3 gridSize = dim3(COL / c, ROW / c);
	printf("run \n");
	scatter<<<gridSize, blockSize>>>(d_scattered, d_ref);

	dtoh(h_scattered, d_scattered, size);

	printf("after : ");
	printData(h_scattered);

	hipFree(d_scattered);
	hipFree(d_ref);
}

__global__ void stencil(float *d_stenciled, float *d_ref, float *d_window)
{
	int width = gridDim.x * blockDim.x;
	int height = gridDim.y * blockDim.x;
	int x = blockIdx.x * blockDim.x + threadIdx.x;
	int y = blockIdx.y * blockDim.y + threadIdx.y;
	float cnt = 0;
	
	for (int yy = y - 1, yyy = 0; yy < y + 2; yy++, yyy++)
	{
		for (int xx = x - 1, xxx = 0; xx < x + 2; xx++, xxx++)
		{
			if (xx >= 0 && xx < width && yy >= 0 && yy < height)
			{
				d_stenciled[y * width + x] += 
					d_ref[yy * width + xx] *
					d_window[yyy * width + xxx];

				cnt += 1 * d_window[yyy * width + xxx];
			}
		}
	}
	d_stenciled[y * width + x] /= cnt;
}

void stencil()
{
	float *d_stenciled, *d_ref, *d_window;
	float *h_stenciled, *h_ref, *h_window;
	float tmp[ROW][COL];
	float window[3][3];
	size_t size = sizeof(ref);
	memcpy(tmp, ref, size);
	h_ref = (float*)tmp;
	h_stenciled = (float*)tmp;
	h_window = (float*)window;

	window[0][1] = 0.2;
	window[1][0] = 0.2;
	window[1][1] = 0.2;
	window[1][2] = 0.2;
	window[2][1] = 0.2;

	printf("before : ");
	printData(h_ref);

	hipMalloc(&d_ref, size);
	hipMalloc(&d_stenciled, size);
	hipMalloc(&d_window, sizeof(window));

	htod(d_ref, h_ref, size);
	htod(d_window, h_window, sizeof(window));
	hipMemset(d_stenciled, 0, size);
	
	int c = 2;
	dim3 blockSize = dim3(c, c);
	dim3 gridSize = dim3(COL / c, ROW / c);
	printf("run \n");
	stencil<<<gridSize, blockSize>>>(d_stenciled, d_ref, d_window);

	dtoh(h_stenciled, d_stenciled, size);

	printf("after : ");
	printData(h_stenciled);

	hipFree(d_stenciled);
	hipFree(d_ref);
}

__global__ void reduce(float *d_reduced, float *d_ref)
{
	int width = gridDim.x * blockDim.x;
	//int height = gridDim.y * blockDim.x;
	int x = blockIdx.x * blockDim.x + threadIdx.x;
	int y = blockIdx.y * blockDim.y + threadIdx.y;
	int xx = blockIdx.x * blockDim.x;
	int yy = blockIdx.y * blockDim.y;
	__shared__ float data[2][2];
	
	data[threadIdx.y][threadIdx.x] = d_ref[y * width + x];

	if (yy == y && xx == x)
	{
		for (int i = 0; i < 4; i++)
		{
			d_reduced[yy/2 * (width/2) + xx/2] += ((float*)data)[i];
		}
	}
}

void reduce()
{
	float *d_reduced, *d_ref;
	float *h_reduced, *h_ref;
	float tmp[ROW][COL];
	size_t size = sizeof(ref);
	memcpy(tmp, ref, size);
	h_ref = (float*)tmp;
	h_reduced = (float*) malloc (sizeof(float) * size);

	printf("before : ");
	printData(h_ref);

	hipMalloc(&d_ref, size);
	hipMalloc(&d_reduced, size/4);

	htod(d_ref, h_ref, size);
	hipMemset(d_reduced, 0, size/4);

	for (int i = ROW/2; i > 0; i /= 2)
	{
		dim3 blockSize = dim3(2, 2);
		dim3 gridSize = dim3(i, i);
		reduce<<<gridSize, blockSize>>>(d_reduced, d_ref);

		printf("before : ");
		free(h_reduced);
		h_reduced = (float*) malloc (size/4);
		dtoh(h_reduced, d_reduced, size/4);
		printData2(h_reduced, i, i);

		if (i == 1) break;

		size /= 4;
		hipFree(d_ref);
		hipMalloc(&d_ref, size);
		dtod(d_ref, d_reduced, size);

		hipFree(d_reduced);
		hipMalloc(&d_reduced, size/4);
		hipMemset(d_reduced, 0, size/4);
	}

	dtoh(h_reduced, d_reduced, 1);

	printf("%f\n", *h_reduced);

	free(h_reduced);
	hipFree(d_reduced);
	hipFree(d_ref);

}

__global__ void hills_steele(float *d_scaned, float *d_ref, int step)
{
	int width = gridDim.x * blockDim.x;
	//int height = gridDim.y * blockDim.x;
	int x = blockIdx.x * blockDim.x + threadIdx.x;
	int y = blockIdx.y * blockDim.y + threadIdx.y;
	int index = y * width + x;

	if (index < step)
	{
		d_scaned[index] = d_ref[index];
	}
	else
	{
		d_scaned[index] = d_ref[index] + d_ref[index - step];
	}
}

// step efficiency, inclusive
void Hills_Steele_scan()
{
	float *d_scaned, *d_ref;
	float *h_scaned, *h_ref;
	float tmp[ROW][COL];
	size_t size = sizeof(ref);
	memcpy(tmp, ref, size);
	h_ref = (float*)tmp;
	h_scaned = (float*) malloc (sizeof(float) * size);

	printf("before : \n");
	printData(h_ref);

	hipMalloc(&d_ref, size);
	hipMalloc(&d_scaned, size);

	htod(d_ref, h_ref, size);
	hipMemset(d_scaned, 0, size);

	for (int i = 1; i < size/2; i *= 2)
	{
		dim3 blockSize = dim3(2, 2);
		dim3 gridSize = dim3(ROW/2, COL/2);

		hills_steele<<<gridSize, blockSize>>>(d_scaned, d_ref, i);
		dtod(d_ref, d_scaned, size);
	}
	dtoh(h_scaned, d_scaned, size);
	printData(h_scaned);

	hipFree(d_ref);
	hipFree(d_scaned);
	free(h_scaned);
}

__global__ void blelloch(float *d_scaned, float *d_ref, int step)
{
	int width = gridDim.x * blockDim.x;
	int x = blockIdx.x * blockDim.x + threadIdx.x;
	int y = blockIdx.y * blockDim.y + threadIdx.y;
	int index = y * width + x;

	if ((index % step) == (step - 1))
	{
		d_scaned[index] = d_ref[index] + d_ref[index - (step/2)];
	}
	else
	{
		d_scaned[index] = d_ref[index];
	}
}

__global__ void blelloch_post(float *d_scaned, float *d_ref, int step)
{
	int width = gridDim.x * blockDim.x;
	int x = blockIdx.x * blockDim.x + threadIdx.x;
	int y = blockIdx.y * blockDim.y + threadIdx.y;
	int index = y * width + x;

	if ((index % step) == (step - 1))
	{
		d_scaned[index] = d_ref[index] + d_ref[index - (step/2)];
		d_scaned[index - (step/2)] = d_ref[index];
	}
}

// work efficiency, exclusive
void Blelloch_scan()
{
	float *d_scaned, *d_ref;
	float *h_scaned, *h_ref;
	float tmp[ROW][COL];
	size_t size = sizeof(ref);
	memcpy(tmp, ref, size);
	h_ref = (float*)tmp;
	h_scaned = (float*) malloc (sizeof(float) * size);

	printData(h_ref);

	hipMalloc(&d_ref, size);
	hipMalloc(&d_scaned, size);

	htod(d_ref, h_ref, size);
	hipMemset(d_scaned, 0, size);

	dim3 blockSize = dim3(2, 2);
	dim3 gridSize = dim3(ROW/2, COL/2);

	for (int i = 2; i < ROW * COL; i *= 2)
	{
		blelloch<<<gridSize, blockSize>>>(d_scaned, d_ref, i);

		dtoh(h_scaned, d_scaned, size);
		printData(h_scaned);
		dtod(d_ref, d_scaned, size);
	}

	dtoh(h_ref, d_scaned, size);
	h_ref[(size/sizeof(float))-1] = 0;
	htod(d_ref, h_ref, size);
	dtod(d_scaned, d_ref, size);

	for (int i = ROW * COL; i > 1; i /= 2)
	{
		blelloch_post<<<gridSize, blockSize>>>(d_scaned, d_ref, i);

		dtoh(h_scaned, d_scaned, size);
		printData(h_scaned);
		dtod(d_ref, d_scaned, size);
	}


	hipFree(d_ref);
	hipFree(d_scaned);
	free(h_scaned);
}

__global__ void mapBits(
		unsigned int* d_ref,
		unsigned int* d_inputVals,
		unsigned int bits,
		unsigned int val)
{
	int index = blockDim.x * blockIdx.x + threadIdx.x;
	if ((d_inputVals[index] & bits) != 0)
		d_ref[index] = val;
	else 
		d_ref[index] = 0;
}

__global__ void mapBitsRev(
		unsigned int* d_ref,
		unsigned int* d_inputVals,
		unsigned int bits,
		unsigned int val)
{
	int index = blockDim.x * blockIdx.x + threadIdx.x;
	if ((d_inputVals[index] & bits) != 0)
		d_ref[index] = 0;
	else 
		d_ref[index] = val;
}

__global__ void sumScan(
		unsigned int *d_scanned,
		unsigned int *d_ref, 
		int step)
{
	int index = blockDim.x * blockIdx.x + threadIdx.x;
		

	if (index < step)
	{
		d_scanned[index] = d_ref[index];
	}
	else
	{
		d_scanned[index] = d_ref[index] + d_ref[index - step];
	}
}
__global__ void blelloch(
		unsigned int *d_scanned,
		unsigned int *d_ref, 
		int step)
{
	int index = blockDim.x * blockIdx.x + threadIdx.x;

	if ((index % step) == (step - 1))
		d_scanned[index] = d_ref[index] + d_ref[index - (step/2)];
	else
		d_scanned[index] = d_ref[index];

}

__global__ void blellochPost(
		unsigned int *d_scanned,
		unsigned int *d_ref, 
		int step)
{
	int index = blockDim.x * blockIdx.x + threadIdx.x;

	if ( (index % step) == (step - 1))
	{
		d_scanned[index] = d_ref[index] + d_ref[index - (step/2)];
		d_scanned[index - (step/2)] = d_ref[index];
	}
}

__global__ void getOffset(
		unsigned int *d_offset,
		unsigned int *d_0sum,
		unsigned int *d_1sum,
		unsigned int *d_map)
{
	int index = blockDim.x * blockIdx.x + threadIdx.x;

	if (d_map[index] == 1)
		d_offset[index] = d_1sum[index];
	else
		d_offset[index] = d_0sum[index];
}

__global__ void getNewIndices(
		unsigned int *d_newIndices,
		unsigned int *d_offset,
		unsigned int *d_histPSum)
{
	int index = blockDim.x * blockIdx.x + threadIdx.x;

	d_newIndices[index] = d_offset[index] + d_histPSum[index];
}



#define numberOfSort 16
#define num 14
void radixSort()
{
	const unsigned int h_input[16] = {
		5, 10, 0, 123, 12, 3, 11, 99, 11, 20, 2, 133, 27, 67, 0, 0
	};

	unsigned int* d_ref;
	unsigned int* d_map;
	unsigned int* d_sumScaned;
	unsigned int* d_histPSum;
	unsigned int* d_0sum;
	unsigned int* d_1sum;
	unsigned int* d_offset;
	unsigned int* d_newIndices;
	hipMalloc(&d_ref, sizeof(unsigned int) * numberOfSort);
	hipMalloc(&d_map, sizeof(unsigned int) * numberOfSort);
	hipMalloc(&d_sumScaned, sizeof(unsigned int) * numberOfSort);
	hipMalloc(&d_histPSum, sizeof(unsigned int) * numberOfSort);
	hipMalloc(&d_0sum, sizeof(unsigned int) * numberOfSort);
	hipMalloc(&d_1sum, sizeof(unsigned int) * numberOfSort);
	hipMalloc(&d_offset, sizeof(unsigned int) * numberOfSort);
	hipMalloc(&d_newIndices, sizeof(unsigned int) * numberOfSort);

	unsigned int* h_ref = (unsigned int*) malloc (sizeof(unsigned int) * numberOfSort);
	unsigned int* h_map = (unsigned int*) malloc (sizeof(unsigned int) * numberOfSort);
	unsigned int* h_sumScaned = (unsigned int*) malloc (sizeof(unsigned int) * numberOfSort);
	unsigned int* h_histPSum = (unsigned int*) malloc (sizeof(unsigned int) * numberOfSort);
	unsigned int* h_0sum = (unsigned int*) malloc (sizeof(unsigned int) * numberOfSort);
	unsigned int* h_1sum = (unsigned int*) malloc (sizeof(unsigned int) * numberOfSort);
	unsigned int* h_offset = (unsigned int*) malloc (sizeof(unsigned int) * numberOfSort);
	unsigned int* h_newIndices = (unsigned int*) malloc (sizeof(unsigned int) * numberOfSort);

	dim3 gridSize = dim3(4);
	dim3 blockSize = dim3(4);


	for (unsigned int bits = 0; bits < 32; bits++)
	{
		memcpy(h_ref, h_input, sizeof(unsigned int) * numberOfSort);
		hipMemcpy(d_ref, h_ref, 
				sizeof(unsigned int) * numberOfSort, hipMemcpyHostToDevice);

		mapBits<<<gridSize, blockSize>>>(d_map, d_ref, 1 << bits, 1);

		hipMemcpy(h_sumScaned, d_map, 
				sizeof(unsigned int) * numberOfSort, hipMemcpyDeviceToHost);

		for (int i = 0; i < numberOfSort; i++)
		{
			printf("%u\n", h_sumScaned[i]);
		}

		hipMemcpy(d_ref, d_map, 
				sizeof(unsigned int) * numberOfSort, hipMemcpyDeviceToDevice);

		// sum scan
		for (unsigned int i = 1; i <= numberOfSort; i*=2)
		{
			sumScan<<<gridSize, blockSize>>>(d_sumScaned, d_ref, i);
			hipMemcpy(d_ref, d_sumScaned, 
					sizeof(unsigned int) * numberOfSort, hipMemcpyDeviceToDevice);
		}

		hipMemcpy(h_sumScaned, d_sumScaned, 
				sizeof(unsigned int) * numberOfSort, hipMemcpyDeviceToHost);

		hipMemcpy(d_ref, h_ref, 
				sizeof(unsigned int) * numberOfSort, hipMemcpyHostToDevice);
		mapBits<<<gridSize, blockSize>>>(
				d_histPSum, d_ref, 1 << bits, numberOfSort - h_sumScaned[num-1]);
		hipMemcpy(h_histPSum, d_histPSum,
				sizeof(unsigned int) * numberOfSort, hipMemcpyDeviceToHost);


		// 0 sum
		memcpy(h_ref, h_input, sizeof(unsigned int) * numberOfSort);
		hipMemcpy(d_ref, h_ref, 
				sizeof(unsigned int) * numberOfSort, hipMemcpyHostToDevice);
		mapBitsRev<<<gridSize, blockSize>>>(d_ref, d_ref, (1<<bits), 1);
		hipMemset(d_0sum, 0, sizeof(unsigned int) * numberOfSort);
		for (int i = 2; i < numberOfSort ; i *= 2)
		{
			blelloch<<<gridSize, blockSize>>>(d_0sum, d_ref, i);
			hipMemcpy(d_ref, d_0sum, 
					sizeof(unsigned int) * numberOfSort, hipMemcpyDeviceToDevice);
		}

		hipMemcpy(h_ref, d_0sum,
				sizeof(unsigned int) * numberOfSort, hipMemcpyDeviceToHost);
		h_ref[numberOfSort-1] = 0;
		hipMemcpy(d_ref, h_ref,
				sizeof(unsigned int) * numberOfSort, hipMemcpyHostToDevice);
		hipMemcpy(d_0sum, d_ref, 
				sizeof(unsigned int) * numberOfSort, hipMemcpyDeviceToDevice);

		for (int i = numberOfSort; i > 1; i /= 2)
		{
			blellochPost<<<gridSize, blockSize>>>(d_0sum, d_ref, i);
			hipMemcpy(d_ref, d_0sum, 
					sizeof(unsigned int) * numberOfSort, hipMemcpyDeviceToDevice);
		}
		hipMemcpy(h_0sum, d_0sum, 
				sizeof(unsigned int) * numberOfSort, hipMemcpyDeviceToHost);

		// 1 sum
		memcpy(h_ref, h_input, sizeof(unsigned int) * numberOfSort);
		hipMemcpy(d_ref, h_ref, 
				sizeof(unsigned int) * numberOfSort, hipMemcpyHostToDevice);
		mapBits<<<gridSize, blockSize>>>(d_ref, d_ref, (1<<bits), 1);
		hipMemset(d_1sum, 0, sizeof(unsigned int) * numberOfSort);
		for (int i = 2; i < numberOfSort ; i *= 2)
		{
			blelloch<<<gridSize, blockSize>>>(d_1sum, d_ref, i);
			hipMemcpy(d_ref, d_1sum, 
					sizeof(unsigned int) * numberOfSort, hipMemcpyDeviceToDevice);
		}

		hipMemcpy(h_ref, d_1sum,
				sizeof(unsigned int) * numberOfSort, hipMemcpyDeviceToHost);
		h_ref[numberOfSort-1] = 0;
		hipMemcpy(d_ref, h_ref,
				sizeof(unsigned int) * numberOfSort, hipMemcpyHostToDevice);
		hipMemcpy(d_1sum, d_ref, 
				sizeof(unsigned int) * numberOfSort, hipMemcpyDeviceToDevice);

		for (int i = numberOfSort; i > 1; i /= 2)
		{
			blellochPost<<<gridSize, blockSize>>>(d_1sum, d_ref, i);
			hipMemcpy(d_ref, d_1sum, 
					sizeof(unsigned int) * numberOfSort, hipMemcpyDeviceToDevice);
		}
		hipMemcpy(h_1sum, d_1sum, 
				sizeof(unsigned int) * numberOfSort, hipMemcpyDeviceToHost);
		
		// offset
		getOffset<<<gridSize, blockSize>>>(d_offset, d_0sum, d_1sum, d_map);
	
		hipMemcpy(h_offset, d_offset, 
				sizeof(unsigned int) * numberOfSort, hipMemcpyDeviceToHost);

		// new Indices
		getNewIndices<<<gridSize, blockSize>>>(d_newIndices, d_offset, d_histPSum);
		hipMemcpy(h_newIndices, d_newIndices, 
				sizeof(unsigned int) * numberOfSort, hipMemcpyDeviceToHost);

		printf("\n");
		for (int i = 0; i < numberOfSort; i++)
		{
			printf("%u %u %u\n",
					h_offset[i], h_histPSum[i], h_newIndices[i]);
		}
		break;
	}

}

int main()
{
	//initRef();
	//map();
	//transpose();
	//gather();
	//scatter();
	//stencil();
	//reduce();
	//Hills_Steele_scan();
	//Blelloch_scan();
	radixSort();

	return 0;
}


	.text
	.file	"main.hip"
	.globl	_Z7initRefv                     # -- Begin function _Z7initRefv
	.type	_Z7initRefv,@function
_Z7initRefv:                            # @_Z7initRefv
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	xorl	%ebx, %ebx
	xorl	%edi, %edi
	callq	time
	movl	%eax, %edi
	callq	srand
.LBB0_1:                                # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtsi2ss	%ebx, %xmm0
	movss	%xmm0, ref(,%rbx,4)
	incq	%rbx
	cmpq	$64, %rbx
	jne	.LBB0_1
# %bb.2:
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z7initRefv, .Lfunc_end0-_Z7initRefv
	.cfi_endproc
                                        # -- End function
	.globl	_Z9printDataPf                  # -- Begin function _Z9printDataPf
	.type	_Z9printDataPf,@function
_Z9printDataPf:                         # @_Z9printDataPf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %rbx
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	xorl	%r14d, %r14d
.LBB1_1:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_2 Depth 2
	xorl	%r15d, %r15d
.LBB1_2:                                #   Parent Loop BB1_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbx,%r15,4), %xmm0
	movl	$.L.str.1, %edi
	movb	$1, %al
	callq	printf
	incq	%r15
	cmpq	$8, %r15
	jne	.LBB1_2
# %bb.3:                                #   in Loop: Header=BB1_1 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%r14
	addq	$32, %rbx
	cmpq	$8, %r14
	jne	.LBB1_1
# %bb.4:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z9printDataPf, .Lfunc_end1-_Z9printDataPf
	.cfi_endproc
                                        # -- End function
	.globl	_Z10printData2Pfii              # -- Begin function _Z10printData2Pfii
	.type	_Z10printData2Pfii,@function
_Z10printData2Pfii:                     # @_Z10printData2Pfii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%edx, %ebx
	movl	%esi, %ebp
	movq	%rdi, 8(%rsp)                   # 8-byte Spill
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	testl	%ebp, %ebp
	jle	.LBB2_6
# %bb.1:                                # %.preheader.lr.ph
	movl	%ebp, %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	%ebx, %r12d
	xorl	%r13d, %r13d
	xorl	%ebp, %ebp
.LBB2_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_4 Depth 2
	testl	%ebx, %ebx
	jle	.LBB2_5
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB2_2 Depth=1
	movl	%r13d, %eax
	movq	8(%rsp), %rcx                   # 8-byte Reload
	leaq	(%rcx,%rax,4), %r14
	xorl	%r15d, %r15d
.LBB2_4:                                #   Parent Loop BB2_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r14,%r15,4), %xmm0
	movl	$.L.str.3, %edi
	movb	$1, %al
	callq	printf
	incq	%r15
	cmpq	%r15, %r12
	jne	.LBB2_4
.LBB2_5:                                # %._crit_edge
                                        #   in Loop: Header=BB2_2 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%rbp
	addl	%ebx, %r13d
	cmpq	16(%rsp), %rbp                  # 8-byte Folded Reload
	jne	.LBB2_2
.LBB2_6:                                # %._crit_edge14
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z10printData2Pfii, .Lfunc_end2-_Z10printData2Pfii
	.cfi_endproc
                                        # -- End function
	.globl	_Z8printRefv                    # -- Begin function _Z8printRefv
	.type	_Z8printRefv,@function
_Z8printRefv:                           # @_Z8printRefv
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	movl	$ref, %ebx
	xorl	%r14d, %r14d
.LBB3_1:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_2 Depth 2
	xorl	%r15d, %r15d
.LBB3_2:                                #   Parent Loop BB3_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbx,%r15,4), %xmm0
	movl	$.L.str.5, %edi
	movb	$1, %al
	callq	printf
	incq	%r15
	cmpq	$8, %r15
	jne	.LBB3_2
# %bb.3:                                #   in Loop: Header=BB3_1 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%r14
	addq	$32, %rbx
	cmpq	$8, %r14
	jne	.LBB3_1
# %bb.4:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z8printRefv, .Lfunc_end3-_Z8printRefv
	.cfi_endproc
                                        # -- End function
	.globl	_Z18__device_stub__mapPfS_      # -- Begin function _Z18__device_stub__mapPfS_
	.type	_Z18__device_stub__mapPfS_,@function
_Z18__device_stub__mapPfS_:             # @_Z18__device_stub__mapPfS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z3mapPfS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z18__device_stub__mapPfS_, .Lfunc_end4-_Z18__device_stub__mapPfS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z3mapv                         # -- Begin function _Z3mapv
	.type	_Z3mapv,@function
_Z3mapv:                                # @_Z3mapv
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$288, %rsp                      # imm = 0x120
	.cfi_def_cfa_offset 320
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	32(%rsp), %rbx
	movl	$ref, %esi
	movl	$256, %edx                      # imm = 0x100
	movq	%rbx, %rdi
	callq	memcpy@PLT
	movl	$.Lstr.6, %edi
	xorl	%eax, %eax
	callq	printf
	movq	%rbx, %rdi
	callq	_Z9printDataPf
	leaq	8(%rsp), %r14
	movl	$256, %esi                      # imm = 0x100
	movq	%r14, %rdi
	callq	hipMalloc
	leaq	16(%rsp), %r15
	movl	$4, %esi
	movq	%r15, %rdi
	callq	hipMalloc
	leaq	28(%rsp), %rsi
	movl	$1069547520, (%rsi)             # imm = 0x3FC00000
	movq	(%r15), %rdi
	movl	$1, %edx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r14), %rdi
	movl	$256, %edx                      # imm = 0x100
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$17179869188, %rdi              # imm = 0x400000004
	movabsq	$8589934594, %rdx               # imm = 0x200000002
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_2
# %bb.1:
	movq	8(%rsp), %rdi
	movq	16(%rsp), %rsi
	callq	_Z18__device_stub__mapPfS_
.LBB5_2:
	movq	8(%rsp), %rsi
	leaq	32(%rsp), %rbx
	movl	$256, %edx                      # imm = 0x100
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$.L.str.7, %edi
	xorl	%eax, %eax
	callq	printf
	movq	%rbx, %rdi
	callq	_Z9printDataPf
	movq	8(%rsp), %rdi
	callq	hipFree
	addq	$288, %rsp                      # imm = 0x120
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z3mapv, .Lfunc_end5-_Z3mapv
	.cfi_endproc
                                        # -- End function
	.globl	_Z24__device_stub__transposePfS_ # -- Begin function _Z24__device_stub__transposePfS_
	.type	_Z24__device_stub__transposePfS_,@function
_Z24__device_stub__transposePfS_:       # @_Z24__device_stub__transposePfS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9transposePfS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z24__device_stub__transposePfS_, .Lfunc_end6-_Z24__device_stub__transposePfS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z9transposev                   # -- Begin function _Z9transposev
	.type	_Z9transposev,@function
_Z9transposev:                          # @_Z9transposev
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	subq	$280, %rsp                      # imm = 0x118
	.cfi_def_cfa_offset 304
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	leaq	16(%rsp), %rbx
	movl	$ref, %esi
	movl	$256, %edx                      # imm = 0x100
	movq	%rbx, %rdi
	callq	memcpy@PLT
	movl	$.Lstr.6, %edi
	xorl	%eax, %eax
	callq	printf
	movq	%rbx, %rdi
	callq	_Z9printDataPf
	movq	%rsp, %rdi
	movl	$256, %esi                      # imm = 0x100
	callq	hipMalloc
	leaq	8(%rsp), %r14
	movl	$256, %esi                      # imm = 0x100
	movq	%r14, %rdi
	callq	hipMalloc
	movq	(%r14), %rdi
	movl	$256, %edx                      # imm = 0x100
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$17179869188, %rdi              # imm = 0x400000004
	movabsq	$8589934594, %rdx               # imm = 0x200000002
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_2
# %bb.1:
	movq	(%rsp), %rdi
	movq	8(%rsp), %rsi
	callq	_Z24__device_stub__transposePfS_
.LBB7_2:
	movq	(%rsp), %rsi
	leaq	16(%rsp), %rbx
	movl	$256, %edx                      # imm = 0x100
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$.L.str.7, %edi
	xorl	%eax, %eax
	callq	printf
	movq	%rbx, %rdi
	callq	_Z9printDataPf
	movq	(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	addq	$280, %rsp                      # imm = 0x118
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	_Z9transposev, .Lfunc_end7-_Z9transposev
	.cfi_endproc
                                        # -- End function
	.globl	_Z21__device_stub__gatherPfS_   # -- Begin function _Z21__device_stub__gatherPfS_
	.type	_Z21__device_stub__gatherPfS_,@function
_Z21__device_stub__gatherPfS_:          # @_Z21__device_stub__gatherPfS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6gatherPfS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	_Z21__device_stub__gatherPfS_, .Lfunc_end8-_Z21__device_stub__gatherPfS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z6gatherv                      # -- Begin function _Z6gatherv
	.type	_Z6gatherv,@function
_Z6gatherv:                             # @_Z6gatherv
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$272, %rsp                      # imm = 0x110
	.cfi_def_cfa_offset 304
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	16(%rsp), %rbx
	movl	$ref, %esi
	movl	$256, %edx                      # imm = 0x100
	movq	%rbx, %rdi
	callq	memcpy@PLT
	movl	$.Lstr.6, %edi
	xorl	%eax, %eax
	callq	printf
	movq	%rbx, %rdi
	callq	_Z9printDataPf
	leaq	8(%rsp), %r14
	movl	$256, %esi                      # imm = 0x100
	movq	%r14, %rdi
	callq	hipMalloc
	movq	%rsp, %r15
	movl	$256, %esi                      # imm = 0x100
	movq	%r15, %rdi
	callq	hipMalloc
	movq	(%r14), %rdi
	movl	$256, %edx                      # imm = 0x100
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r15), %rdi
	movl	$256, %edx                      # imm = 0x100
	xorl	%esi, %esi
	callq	hipMemset
	movl	$.Lstr.5, %edi
	callq	puts@PLT
	movabsq	$17179869188, %rdi              # imm = 0x400000004
	movabsq	$8589934594, %rdx               # imm = 0x200000002
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB9_2
# %bb.1:
	movq	(%rsp), %rdi
	movq	8(%rsp), %rsi
	callq	_Z21__device_stub__gatherPfS_
.LBB9_2:
	movq	(%rsp), %rsi
	leaq	16(%rsp), %rbx
	movl	$256, %edx                      # imm = 0x100
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$.L.str.7, %edi
	xorl	%eax, %eax
	callq	printf
	movq	%rbx, %rdi
	callq	_Z9printDataPf
	movq	(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	addq	$272, %rsp                      # imm = 0x110
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end9:
	.size	_Z6gatherv, .Lfunc_end9-_Z6gatherv
	.cfi_endproc
                                        # -- End function
	.globl	_Z22__device_stub__scatterPfS_  # -- Begin function _Z22__device_stub__scatterPfS_
	.type	_Z22__device_stub__scatterPfS_,@function
_Z22__device_stub__scatterPfS_:         # @_Z22__device_stub__scatterPfS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7scatterPfS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end10:
	.size	_Z22__device_stub__scatterPfS_, .Lfunc_end10-_Z22__device_stub__scatterPfS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z7scatterv                     # -- Begin function _Z7scatterv
	.type	_Z7scatterv,@function
_Z7scatterv:                            # @_Z7scatterv
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$272, %rsp                      # imm = 0x110
	.cfi_def_cfa_offset 304
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	16(%rsp), %rbx
	movl	$ref, %esi
	movl	$256, %edx                      # imm = 0x100
	movq	%rbx, %rdi
	callq	memcpy@PLT
	movl	$.Lstr.6, %edi
	xorl	%eax, %eax
	callq	printf
	movq	%rbx, %rdi
	callq	_Z9printDataPf
	leaq	8(%rsp), %r14
	movl	$256, %esi                      # imm = 0x100
	movq	%r14, %rdi
	callq	hipMalloc
	movq	%rsp, %r15
	movl	$256, %esi                      # imm = 0x100
	movq	%r15, %rdi
	callq	hipMalloc
	movq	(%r14), %rdi
	movl	$256, %edx                      # imm = 0x100
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r15), %rdi
	movl	$256, %edx                      # imm = 0x100
	xorl	%esi, %esi
	callq	hipMemset
	movl	$.Lstr.5, %edi
	callq	puts@PLT
	movabsq	$17179869188, %rdi              # imm = 0x400000004
	movabsq	$8589934594, %rdx               # imm = 0x200000002
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB11_2
# %bb.1:
	movq	(%rsp), %rdi
	movq	8(%rsp), %rsi
	callq	_Z22__device_stub__scatterPfS_
.LBB11_2:
	movq	(%rsp), %rsi
	leaq	16(%rsp), %rbx
	movl	$256, %edx                      # imm = 0x100
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$.L.str.7, %edi
	xorl	%eax, %eax
	callq	printf
	movq	%rbx, %rdi
	callq	_Z9printDataPf
	movq	(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	addq	$272, %rsp                      # imm = 0x110
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end11:
	.size	_Z7scatterv, .Lfunc_end11-_Z7scatterv
	.cfi_endproc
                                        # -- End function
	.globl	_Z22__device_stub__stencilPfS_S_ # -- Begin function _Z22__device_stub__stencilPfS_S_
	.type	_Z22__device_stub__stencilPfS_S_,@function
_Z22__device_stub__stencilPfS_S_:       # @_Z22__device_stub__stencilPfS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7stencilPfS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end12:
	.size	_Z22__device_stub__stencilPfS_S_, .Lfunc_end12-_Z22__device_stub__stencilPfS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z7stencilv                     # -- Begin function _Z7stencilv
	.type	_Z7stencilv,@function
_Z7stencilv:                            # @_Z7stencilv
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$336, %rsp                      # imm = 0x150
	.cfi_def_cfa_offset 384
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	80(%rsp), %r14
	movl	$ref, %esi
	movl	$256, %edx                      # imm = 0x100
	movq	%r14, %rdi
	callq	memcpy@PLT
	movl	$1045220557, %eax               # imm = 0x3E4CCCCD
	leaq	32(%rsp), %rbx
	movl	%eax, 4(%rbx)
	movabsq	$4489188110467124429, %rcx      # imm = 0x3E4CCCCD3E4CCCCD
	movq	%rcx, 12(%rbx)
	movl	%eax, 20(%rbx)
	movl	%eax, 28(%rbx)
	movl	$.Lstr.6, %edi
	xorl	%eax, %eax
	callq	printf
	movq	%r14, %rdi
	callq	_Z9printDataPf
	leaq	16(%rsp), %r12
	movl	$256, %esi                      # imm = 0x100
	movq	%r12, %rdi
	callq	hipMalloc
	leaq	8(%rsp), %r15
	movl	$256, %esi                      # imm = 0x100
	movq	%r15, %rdi
	callq	hipMalloc
	leaq	24(%rsp), %r13
	movl	$36, %esi
	movq	%r13, %rdi
	callq	hipMalloc
	movq	(%r12), %rdi
	movl	$256, %edx                      # imm = 0x100
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r13), %rdi
	movl	$36, %edx
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r15), %rdi
	movl	$256, %edx                      # imm = 0x100
	xorl	%esi, %esi
	callq	hipMemset
	movl	$.Lstr.5, %edi
	callq	puts@PLT
	movabsq	$17179869188, %rdi              # imm = 0x400000004
	movabsq	$8589934594, %rdx               # imm = 0x200000002
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB13_2
# %bb.1:
	movq	8(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	24(%rsp), %rdx
	callq	_Z22__device_stub__stencilPfS_S_
.LBB13_2:
	movq	8(%rsp), %rsi
	leaq	80(%rsp), %rbx
	movl	$256, %edx                      # imm = 0x100
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$.L.str.7, %edi
	xorl	%eax, %eax
	callq	printf
	movq	%rbx, %rdi
	callq	_Z9printDataPf
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	addq	$336, %rsp                      # imm = 0x150
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end13:
	.size	_Z7stencilv, .Lfunc_end13-_Z7stencilv
	.cfi_endproc
                                        # -- End function
	.globl	_Z21__device_stub__reducePfS_   # -- Begin function _Z21__device_stub__reducePfS_
	.type	_Z21__device_stub__reducePfS_,@function
_Z21__device_stub__reducePfS_:          # @_Z21__device_stub__reducePfS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6reducePfS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end14:
	.size	_Z21__device_stub__reducePfS_, .Lfunc_end14-_Z21__device_stub__reducePfS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z6reducev                      # -- Begin function _Z6reducev
	.type	_Z6reducev,@function
_Z6reducev:                             # @_Z6reducev
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$280, %rsp                      # imm = 0x118
	.cfi_def_cfa_offset 336
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	leaq	16(%rsp), %r14
	movl	$256, %r15d                     # imm = 0x100
	movl	$ref, %esi
	movl	$256, %edx                      # imm = 0x100
	movq	%r14, %rdi
	callq	memcpy@PLT
	movl	$1024, %edi                     # imm = 0x400
	callq	malloc
	movq	%rax, %rbx
	movl	$.Lstr.6, %edi
	xorl	%eax, %eax
	callq	printf
	movq	%r14, %rdi
	callq	_Z9printDataPf
	leaq	8(%rsp), %r13
	movl	$256, %esi                      # imm = 0x100
	movq	%r13, %rdi
	callq	hipMalloc
	movq	%rsp, %r12
	movl	$64, %esi
	movq	%r12, %rdi
	callq	hipMalloc
	movq	(%r13), %rdi
	movl	$256, %edx                      # imm = 0x100
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r12), %rdi
	movl	$64, %edx
	xorl	%esi, %esi
	callq	hipMemset
	movl	$4, %ebp
	movabsq	$8589934594, %r13               # imm = 0x200000002
.LBB15_1:                               # =>This Inner Loop Header: Depth=1
	movl	%ebp, %eax
	movq	%rax, %rdi
	shlq	$32, %rdi
	orq	%rax, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB15_3
# %bb.2:                                #   in Loop: Header=BB15_1 Depth=1
	movq	(%rsp), %rdi
	movq	8(%rsp), %rsi
	callq	_Z21__device_stub__reducePfS_
.LBB15_3:                               #   in Loop: Header=BB15_1 Depth=1
	movl	$.Lstr.6, %edi
	xorl	%eax, %eax
	callq	printf
	movq	%rbx, %rdi
	callq	free
	movq	%r15, %r14
	shrq	$2, %r14
	movq	%r14, %rdi
	callq	malloc
	movq	%rax, %rbx
	movq	(%rsp), %rsi
	movq	%rax, %rdi
	movq	%r14, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	%rbx, %rdi
	movl	%ebp, %esi
	movl	%ebp, %edx
	callq	_Z10printData2Pfii
	cmpl	$1, %ebp
	je	.LBB15_5
# %bb.4:                                #   in Loop: Header=BB15_1 Depth=1
	movq	8(%rsp), %rdi
	callq	hipFree
	leaq	8(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movq	8(%rsp), %rdi
	movq	(%rsp), %rsi
	movq	%r14, %rdx
	movl	$3, %ecx
	callq	hipMemcpy
	movq	(%rsp), %rdi
	callq	hipFree
	shrq	$4, %r15
	movq	%r12, %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	movq	(%rsp), %rdi
	xorl	%esi, %esi
	movq	%r15, %rdx
	callq	hipMemset
	shrl	%ebp
	movq	%r14, %r15
	jmp	.LBB15_1
.LBB15_5:
	movq	(%rsp), %rsi
	movl	$1, %edx
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	cvtss2sd	(%rbx), %xmm0
	movl	$.L.str.9, %edi
	movb	$1, %al
	callq	printf
	movq	%rbx, %rdi
	callq	free
	movq	(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	addq	$280, %rsp                      # imm = 0x118
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end15:
	.size	_Z6reducev, .Lfunc_end15-_Z6reducev
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__hills_steelePfS_i # -- Begin function _Z27__device_stub__hills_steelePfS_i
	.type	_Z27__device_stub__hills_steelePfS_i,@function
_Z27__device_stub__hills_steelePfS_i:   # @_Z27__device_stub__hills_steelePfS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12hills_steelePfS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end16:
	.size	_Z27__device_stub__hills_steelePfS_i, .Lfunc_end16-_Z27__device_stub__hills_steelePfS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z17Hills_Steele_scanv          # -- Begin function _Z17Hills_Steele_scanv
	.type	_Z17Hills_Steele_scanv,@function
_Z17Hills_Steele_scanv:                 # @_Z17Hills_Steele_scanv
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$280, %rsp                      # imm = 0x118
	.cfi_def_cfa_offset 320
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	16(%rsp), %r15
	movl	$ref, %esi
	movl	$256, %edx                      # imm = 0x100
	movq	%r15, %rdi
	callq	memcpy@PLT
	movl	$1024, %edi                     # imm = 0x400
	callq	malloc
	movq	%rax, %rbx
	movl	$.Lstr.6, %edi
	callq	puts@PLT
	movq	%r15, %rdi
	callq	_Z9printDataPf
	leaq	8(%rsp), %r14
	movl	$256, %esi                      # imm = 0x100
	movq	%r14, %rdi
	callq	hipMalloc
	movq	%rsp, %r12
	movl	$256, %esi                      # imm = 0x100
	movq	%r12, %rdi
	callq	hipMalloc
	movq	(%r14), %rdi
	movl	$1, %r14d
	movl	$256, %edx                      # imm = 0x100
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r12), %rdi
	movl	$256, %edx                      # imm = 0x100
	xorl	%esi, %esi
	callq	hipMemset
	movabsq	$17179869188, %r15              # imm = 0x400000004
	movabsq	$8589934594, %r12               # imm = 0x200000002
.LBB17_1:                               # =>This Inner Loop Header: Depth=1
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB17_3
# %bb.2:                                #   in Loop: Header=BB17_1 Depth=1
	movq	(%rsp), %rdi
	movq	8(%rsp), %rsi
	movl	%r14d, %edx
	callq	_Z27__device_stub__hills_steelePfS_i
.LBB17_3:                               #   in Loop: Header=BB17_1 Depth=1
	movq	8(%rsp), %rdi
	movq	(%rsp), %rsi
	movl	$256, %edx                      # imm = 0x100
	movl	$3, %ecx
	callq	hipMemcpy
	leal	(%r14,%r14), %eax
	cmpl	$64, %r14d
	movl	%eax, %r14d
	jb	.LBB17_1
# %bb.4:
	movq	(%rsp), %rsi
	movl	$256, %edx                      # imm = 0x100
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	%rbx, %rdi
	callq	_Z9printDataPf
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	free
	addq	$280, %rsp                      # imm = 0x118
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end17:
	.size	_Z17Hills_Steele_scanv, .Lfunc_end17-_Z17Hills_Steele_scanv
	.cfi_endproc
                                        # -- End function
	.globl	_Z23__device_stub__blellochPfS_i # -- Begin function _Z23__device_stub__blellochPfS_i
	.type	_Z23__device_stub__blellochPfS_i,@function
_Z23__device_stub__blellochPfS_i:       # @_Z23__device_stub__blellochPfS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8blellochPfS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end18:
	.size	_Z23__device_stub__blellochPfS_i, .Lfunc_end18-_Z23__device_stub__blellochPfS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z28__device_stub__blelloch_postPfS_i # -- Begin function _Z28__device_stub__blelloch_postPfS_i
	.type	_Z28__device_stub__blelloch_postPfS_i,@function
_Z28__device_stub__blelloch_postPfS_i:  # @_Z28__device_stub__blelloch_postPfS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13blelloch_postPfS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end19:
	.size	_Z28__device_stub__blelloch_postPfS_i, .Lfunc_end19-_Z28__device_stub__blelloch_postPfS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z13Blelloch_scanv              # -- Begin function _Z13Blelloch_scanv
	.type	_Z13Blelloch_scanv,@function
_Z13Blelloch_scanv:                     # @_Z13Blelloch_scanv
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$280, %rsp                      # imm = 0x118
	.cfi_def_cfa_offset 336
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movabsq	$17179869188, %rbx              # imm = 0x400000004
	movabsq	$8589934594, %r14               # imm = 0x200000002
	leaq	16(%rsp), %r12
	movl	$ref, %esi
	movl	$256, %edx                      # imm = 0x100
	movq	%r12, %rdi
	callq	memcpy@PLT
	movl	$1024, %edi                     # imm = 0x400
	callq	malloc
	movq	%rax, %r15
	movq	%r12, %rdi
	callq	_Z9printDataPf
	leaq	8(%rsp), %r13
	movl	$256, %esi                      # imm = 0x100
	movq	%r13, %rdi
	callq	hipMalloc
	movq	%rsp, %rbp
	movl	$256, %esi                      # imm = 0x100
	movq	%rbp, %rdi
	callq	hipMalloc
	movq	(%r13), %rdi
	movl	$256, %edx                      # imm = 0x100
	movq	%r12, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbp), %rdi
	movl	$256, %edx                      # imm = 0x100
	xorl	%esi, %esi
	callq	hipMemset
	movl	$2, %r12d
.LBB20_1:                               # =>This Inner Loop Header: Depth=1
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB20_3
# %bb.2:                                #   in Loop: Header=BB20_1 Depth=1
	movq	(%rsp), %rdi
	movq	8(%rsp), %rsi
	movl	%r12d, %edx
	callq	_Z23__device_stub__blellochPfS_i
.LBB20_3:                               #   in Loop: Header=BB20_1 Depth=1
	movq	(%rsp), %rsi
	movl	$256, %edx                      # imm = 0x100
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	%r15, %rdi
	callq	_Z9printDataPf
	movq	8(%rsp), %rdi
	movq	(%rsp), %rsi
	movl	$256, %edx                      # imm = 0x100
	movl	$3, %ecx
	callq	hipMemcpy
	leal	(%r12,%r12), %eax
	cmpl	$32, %r12d
	movl	%eax, %r12d
	jb	.LBB20_1
# %bb.4:
	movq	(%rsp), %rsi
	leaq	16(%rsp), %r12
	movl	$256, %edx                      # imm = 0x100
	movq	%r12, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$0, 252(%r12)
	movq	8(%rsp), %rdi
	movl	$256, %edx                      # imm = 0x100
	movq	%r12, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rsp), %rdi
	movq	8(%rsp), %rsi
	movl	$256, %edx                      # imm = 0x100
	movl	$3, %ecx
	callq	hipMemcpy
	movl	$64, %ebp
.LBB20_5:                               # =>This Inner Loop Header: Depth=1
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB20_7
# %bb.6:                                #   in Loop: Header=BB20_5 Depth=1
	movq	(%rsp), %rdi
	movq	8(%rsp), %rsi
	movl	%ebp, %edx
	callq	_Z28__device_stub__blelloch_postPfS_i
.LBB20_7:                               #   in Loop: Header=BB20_5 Depth=1
	movq	(%rsp), %rsi
	movl	$256, %edx                      # imm = 0x100
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	%r15, %rdi
	callq	_Z9printDataPf
	movq	8(%rsp), %rdi
	movq	(%rsp), %rsi
	movl	$256, %edx                      # imm = 0x100
	movl	$3, %ecx
	callq	hipMemcpy
	movl	%ebp, %eax
	shrl	%eax
	cmpl	$3, %ebp
	movl	%eax, %ebp
	ja	.LBB20_5
# %bb.8:
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	(%rsp), %rdi
	callq	hipFree
	movq	%r15, %rdi
	callq	free
	addq	$280, %rsp                      # imm = 0x118
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end20:
	.size	_Z13Blelloch_scanv, .Lfunc_end20-_Z13Blelloch_scanv
	.cfi_endproc
                                        # -- End function
	.globl	_Z22__device_stub__mapBitsPjS_jj # -- Begin function _Z22__device_stub__mapBitsPjS_jj
	.type	_Z22__device_stub__mapBitsPjS_jj,@function
_Z22__device_stub__mapBitsPjS_jj:       # @_Z22__device_stub__mapBitsPjS_jj
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7mapBitsPjS_jj, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end21:
	.size	_Z22__device_stub__mapBitsPjS_jj, .Lfunc_end21-_Z22__device_stub__mapBitsPjS_jj
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__mapBitsRevPjS_jj # -- Begin function _Z25__device_stub__mapBitsRevPjS_jj
	.type	_Z25__device_stub__mapBitsRevPjS_jj,@function
_Z25__device_stub__mapBitsRevPjS_jj:    # @_Z25__device_stub__mapBitsRevPjS_jj
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10mapBitsRevPjS_jj, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end22:
	.size	_Z25__device_stub__mapBitsRevPjS_jj, .Lfunc_end22-_Z25__device_stub__mapBitsRevPjS_jj
	.cfi_endproc
                                        # -- End function
	.globl	_Z22__device_stub__sumScanPjS_i # -- Begin function _Z22__device_stub__sumScanPjS_i
	.type	_Z22__device_stub__sumScanPjS_i,@function
_Z22__device_stub__sumScanPjS_i:        # @_Z22__device_stub__sumScanPjS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7sumScanPjS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end23:
	.size	_Z22__device_stub__sumScanPjS_i, .Lfunc_end23-_Z22__device_stub__sumScanPjS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z23__device_stub__blellochPjS_i # -- Begin function _Z23__device_stub__blellochPjS_i
	.type	_Z23__device_stub__blellochPjS_i,@function
_Z23__device_stub__blellochPjS_i:       # @_Z23__device_stub__blellochPjS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8blellochPjS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end24:
	.size	_Z23__device_stub__blellochPjS_i, .Lfunc_end24-_Z23__device_stub__blellochPjS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__blellochPostPjS_i # -- Begin function _Z27__device_stub__blellochPostPjS_i
	.type	_Z27__device_stub__blellochPostPjS_i,@function
_Z27__device_stub__blellochPostPjS_i:   # @_Z27__device_stub__blellochPostPjS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12blellochPostPjS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end25:
	.size	_Z27__device_stub__blellochPostPjS_i, .Lfunc_end25-_Z27__device_stub__blellochPostPjS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z24__device_stub__getOffsetPjS_S_S_ # -- Begin function _Z24__device_stub__getOffsetPjS_S_S_
	.type	_Z24__device_stub__getOffsetPjS_S_S_,@function
_Z24__device_stub__getOffsetPjS_S_S_:   # @_Z24__device_stub__getOffsetPjS_S_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	16(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9getOffsetPjS_S_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end26:
	.size	_Z24__device_stub__getOffsetPjS_S_S_, .Lfunc_end26-_Z24__device_stub__getOffsetPjS_S_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z28__device_stub__getNewIndicesPjS_S_ # -- Begin function _Z28__device_stub__getNewIndicesPjS_S_
	.type	_Z28__device_stub__getNewIndicesPjS_S_,@function
_Z28__device_stub__getNewIndicesPjS_S_: # @_Z28__device_stub__getNewIndicesPjS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13getNewIndicesPjS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end27:
	.size	_Z28__device_stub__getNewIndicesPjS_S_, .Lfunc_end27-_Z28__device_stub__getNewIndicesPjS_S_
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function _Z9radixSortv
.LCPI28_0:
	.long	5                               # 0x5
	.long	10                              # 0xa
	.long	0                               # 0x0
	.long	123                             # 0x7b
.LCPI28_1:
	.long	12                              # 0xc
	.long	3                               # 0x3
	.long	11                              # 0xb
	.long	99                              # 0x63
.LCPI28_2:
	.long	11                              # 0xb
	.long	20                              # 0x14
	.long	2                               # 0x2
	.long	133                             # 0x85
.LCPI28_3:
	.long	27                              # 0x1b
	.long	67                              # 0x43
	.long	0                               # 0x0
	.long	0                               # 0x0
	.text
	.globl	_Z9radixSortv
	.type	_Z9radixSortv,@function
_Z9radixSortv:                          # @_Z9radixSortv
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movabsq	$4294967300, %rbx               # imm = 0x100000004
	movq	%rsp, %rdi
	movl	$64, %esi
	callq	hipMalloc
	leaq	24(%rsp), %rdi
	movl	$64, %esi
	callq	hipMalloc
	leaq	48(%rsp), %rdi
	movl	$64, %esi
	callq	hipMalloc
	leaq	40(%rsp), %rdi
	movl	$64, %esi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movl	$64, %esi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movl	$64, %esi
	callq	hipMalloc
	leaq	32(%rsp), %rdi
	movl	$64, %esi
	callq	hipMalloc
	leaq	56(%rsp), %rdi
	movl	$64, %esi
	callq	hipMalloc
	movl	$64, %edi
	callq	malloc
	movq	%rax, %rbp
	movl	$64, %edi
	callq	malloc
	movq	%rax, %r13
	movl	$64, %edi
	callq	malloc
	movq	%rax, %r14
	movl	$64, %edi
	callq	malloc
	movq	%rax, 64(%rsp)                  # 8-byte Spill
	movl	$64, %edi
	callq	malloc
	movq	%rax, 80(%rsp)                  # 8-byte Spill
	movl	$64, %edi
	callq	malloc
	movq	%rax, %r15
	movl	$64, %edi
	callq	malloc
	movq	%rax, %r12
	movaps	.LCPI28_0(%rip), %xmm0          # xmm0 = [5,10,0,123]
	movups	%xmm0, (%rbp)
	movaps	.LCPI28_1(%rip), %xmm0          # xmm0 = [12,3,11,99]
	movups	%xmm0, 16(%rbp)
	movaps	.LCPI28_2(%rip), %xmm0          # xmm0 = [11,20,2,133]
	movups	%xmm0, 32(%rbp)
	movaps	.LCPI28_3(%rip), %xmm0          # xmm0 = [27,67,0,0]
	movups	%xmm0, 48(%rbp)
	movq	%rsp, %rax
	movq	(%rax), %rdi
	movl	$64, %edx
	movq	%rbp, 72(%rsp)                  # 8-byte Spill
	movq	%rbp, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB28_2
# %bb.1:
	movq	24(%rsp), %rdi
	movq	(%rsp), %rsi
	movl	$1, %edx
	movl	$1, %ecx
	callq	_Z22__device_stub__mapBitsPjS_jj
.LBB28_2:
	movq	24(%rsp), %rsi
	movl	$64, %edx
	movq	%r13, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	xorl	%ebp, %ebp
.LBB28_3:                               # =>This Inner Loop Header: Depth=1
	movl	(%r13,%rbp,4), %esi
	movl	$.L.str.11, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%rbp
	cmpq	$16, %rbp
	jne	.LBB28_3
# %bb.4:
	movq	(%rsp), %rdi
	movq	24(%rsp), %rsi
	movl	$64, %edx
	movl	$3, %ecx
	callq	hipMemcpy
	movl	$1, %ebp
.LBB28_5:                               # =>This Inner Loop Header: Depth=1
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB28_7
# %bb.6:                                #   in Loop: Header=BB28_5 Depth=1
	movq	48(%rsp), %rdi
	movq	(%rsp), %rsi
	movl	%ebp, %edx
	callq	_Z22__device_stub__sumScanPjS_i
.LBB28_7:                               #   in Loop: Header=BB28_5 Depth=1
	movq	(%rsp), %rdi
	movq	48(%rsp), %rsi
	movl	$64, %edx
	movl	$3, %ecx
	callq	hipMemcpy
	leal	(,%rbp,2), %eax
	cmpl	$9, %ebp
	movl	%eax, %ebp
	jb	.LBB28_5
# %bb.8:
	movq	48(%rsp), %rsi
	movl	$64, %edx
	movq	%r13, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	(%rsp), %rdi
	movl	$64, %edx
	movq	72(%rsp), %rbp                  # 8-byte Reload
	movq	%rbp, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB28_10
# %bb.9:
	movq	40(%rsp), %rdi
	movq	(%rsp), %rsi
	movl	$16, %ecx
	subl	52(%r13), %ecx
	movl	$1, %edx
	callq	_Z22__device_stub__mapBitsPjS_jj
.LBB28_10:
	movq	40(%rsp), %rsi
	movl	$2, %r13d
	movl	$64, %edx
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movaps	.LCPI28_0(%rip), %xmm0          # xmm0 = [5,10,0,123]
	movups	%xmm0, (%rbp)
	movaps	.LCPI28_1(%rip), %xmm0          # xmm0 = [12,3,11,99]
	movups	%xmm0, 16(%rbp)
	movaps	.LCPI28_2(%rip), %xmm0          # xmm0 = [11,20,2,133]
	movups	%xmm0, 32(%rbp)
	movaps	.LCPI28_3(%rip), %xmm0          # xmm0 = [27,67,0,0]
	movups	%xmm0, 48(%rbp)
	movq	(%rsp), %rdi
	movl	$64, %edx
	movq	%rbp, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB28_12
# %bb.11:
	movq	(%rsp), %rdi
	movq	%rdi, %rsi
	movl	$1, %edx
	movl	$1, %ecx
	callq	_Z25__device_stub__mapBitsRevPjS_jj
.LBB28_12:
	movq	16(%rsp), %rdi
	movl	$64, %edx
	xorl	%esi, %esi
	callq	hipMemset
.LBB28_13:                              # =>This Inner Loop Header: Depth=1
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB28_15
# %bb.14:                               #   in Loop: Header=BB28_13 Depth=1
	movq	16(%rsp), %rdi
	movq	(%rsp), %rsi
	movl	%r13d, %edx
	callq	_Z23__device_stub__blellochPjS_i
.LBB28_15:                              #   in Loop: Header=BB28_13 Depth=1
	movq	(%rsp), %rdi
	movq	16(%rsp), %rsi
	movl	$64, %edx
	movl	$3, %ecx
	callq	hipMemcpy
	leal	(,%r13,2), %eax
	cmpl	$8, %r13d
	movl	%eax, %r13d
	jb	.LBB28_13
# %bb.16:
	movq	16(%rsp), %rsi
	movl	$64, %edx
	movq	%rbp, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$0, 60(%rbp)
	movq	(%rsp), %rdi
	movl	$64, %edx
	movq	%rbp, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rdi
	movq	(%rsp), %rsi
	movl	$64, %edx
	movl	$3, %ecx
	callq	hipMemcpy
	movl	$16, %r13d
.LBB28_17:                              # =>This Inner Loop Header: Depth=1
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB28_19
# %bb.18:                               #   in Loop: Header=BB28_17 Depth=1
	movq	16(%rsp), %rdi
	movq	(%rsp), %rsi
	movl	%r13d, %edx
	callq	_Z27__device_stub__blellochPostPjS_i
.LBB28_19:                              #   in Loop: Header=BB28_17 Depth=1
	movq	(%rsp), %rdi
	movq	16(%rsp), %rsi
	movl	$64, %edx
	movl	$3, %ecx
	callq	hipMemcpy
	movl	%r13d, %eax
	shrl	%eax
	cmpl	$3, %r13d
	movl	%eax, %r13d
	ja	.LBB28_17
# %bb.20:
	movq	16(%rsp), %rsi
	movl	$2, %r13d
	movl	$64, %edx
	movq	64(%rsp), %rdi                  # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	movaps	.LCPI28_0(%rip), %xmm0          # xmm0 = [5,10,0,123]
	movups	%xmm0, (%rbp)
	movaps	.LCPI28_1(%rip), %xmm0          # xmm0 = [12,3,11,99]
	movups	%xmm0, 16(%rbp)
	movaps	.LCPI28_2(%rip), %xmm0          # xmm0 = [11,20,2,133]
	movups	%xmm0, 32(%rbp)
	movaps	.LCPI28_3(%rip), %xmm0          # xmm0 = [27,67,0,0]
	movups	%xmm0, 48(%rbp)
	movq	(%rsp), %rdi
	movl	$64, %edx
	movq	%rbp, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB28_22
# %bb.21:
	movq	(%rsp), %rdi
	movq	%rdi, %rsi
	movl	$1, %edx
	movl	$1, %ecx
	callq	_Z22__device_stub__mapBitsPjS_jj
.LBB28_22:
	movq	8(%rsp), %rdi
	movl	$64, %edx
	xorl	%esi, %esi
	callq	hipMemset
.LBB28_23:                              # =>This Inner Loop Header: Depth=1
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB28_25
# %bb.24:                               #   in Loop: Header=BB28_23 Depth=1
	movq	8(%rsp), %rdi
	movq	(%rsp), %rsi
	movl	%r13d, %edx
	callq	_Z23__device_stub__blellochPjS_i
.LBB28_25:                              #   in Loop: Header=BB28_23 Depth=1
	movq	(%rsp), %rdi
	movq	8(%rsp), %rsi
	movl	$64, %edx
	movl	$3, %ecx
	callq	hipMemcpy
	leal	(,%r13,2), %eax
	cmpl	$8, %r13d
	movl	%eax, %r13d
	jb	.LBB28_23
# %bb.26:
	movq	8(%rsp), %rsi
	movl	$64, %edx
	movq	%rbp, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$0, 60(%rbp)
	movq	(%rsp), %rdi
	movl	$64, %edx
	movq	%rbp, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	movq	(%rsp), %rsi
	movl	$64, %edx
	movl	$3, %ecx
	callq	hipMemcpy
	movl	$16, %ebp
.LBB28_27:                              # =>This Inner Loop Header: Depth=1
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB28_29
# %bb.28:                               #   in Loop: Header=BB28_27 Depth=1
	movq	8(%rsp), %rdi
	movq	(%rsp), %rsi
	movl	%ebp, %edx
	callq	_Z27__device_stub__blellochPostPjS_i
.LBB28_29:                              #   in Loop: Header=BB28_27 Depth=1
	movq	(%rsp), %rdi
	movq	8(%rsp), %rsi
	movl	$64, %edx
	movl	$3, %ecx
	callq	hipMemcpy
	movl	%ebp, %eax
	shrl	%eax
	cmpl	$3, %ebp
	movl	%eax, %ebp
	ja	.LBB28_27
# %bb.30:
	movq	8(%rsp), %rsi
	movl	$64, %edx
	movq	80(%rsp), %rdi                  # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB28_32
# %bb.31:
	movq	32(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	movq	24(%rsp), %rcx
	callq	_Z24__device_stub__getOffsetPjS_S_S_
.LBB28_32:
	movq	32(%rsp), %rsi
	movl	$64, %edx
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB28_34
# %bb.33:
	movq	56(%rsp), %rdi
	movq	32(%rsp), %rsi
	movq	40(%rsp), %rdx
	callq	_Z28__device_stub__getNewIndicesPjS_S_
.LBB28_34:
	movq	56(%rsp), %rsi
	movl	$64, %edx
	movq	%r12, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$10, %edi
	callq	putchar@PLT
	xorl	%ebx, %ebx
.LBB28_35:                              # =>This Inner Loop Header: Depth=1
	movl	(%r15,%rbx,4), %esi
	movl	(%r14,%rbx,4), %edx
	movl	(%r12,%rbx,4), %ecx
	movl	$.L.str.12, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%rbx
	cmpq	$16, %rbx
	jne	.LBB28_35
# %bb.36:
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end28:
	.size	_Z9radixSortv, .Lfunc_end28-_Z9radixSortv
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	_Z9radixSortv
	xorl	%eax, %eax
	popq	%rcx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end29:
	.size	main, .Lfunc_end29-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB30_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB30_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z3mapPfS_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9transposePfS_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6gatherPfS_, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7scatterPfS_, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7stencilPfS_S_, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6reducePfS_, %esi
	movl	$.L__unnamed_6, %edx
	movl	$.L__unnamed_6, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12hills_steelePfS_i, %esi
	movl	$.L__unnamed_7, %edx
	movl	$.L__unnamed_7, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8blellochPfS_i, %esi
	movl	$.L__unnamed_8, %edx
	movl	$.L__unnamed_8, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13blelloch_postPfS_i, %esi
	movl	$.L__unnamed_9, %edx
	movl	$.L__unnamed_9, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7mapBitsPjS_jj, %esi
	movl	$.L__unnamed_10, %edx
	movl	$.L__unnamed_10, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10mapBitsRevPjS_jj, %esi
	movl	$.L__unnamed_11, %edx
	movl	$.L__unnamed_11, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7sumScanPjS_i, %esi
	movl	$.L__unnamed_12, %edx
	movl	$.L__unnamed_12, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8blellochPjS_i, %esi
	movl	$.L__unnamed_13, %edx
	movl	$.L__unnamed_13, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12blellochPostPjS_i, %esi
	movl	$.L__unnamed_14, %edx
	movl	$.L__unnamed_14, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9getOffsetPjS_S_S_, %esi
	movl	$.L__unnamed_15, %edx
	movl	$.L__unnamed_15, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13getNewIndicesPjS_S_, %esi
	movl	$.L__unnamed_16, %edx
	movl	$.L__unnamed_16, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end30:
	.size	__hip_module_ctor, .Lfunc_end30-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB31_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB31_2:
	retq
.Lfunc_end31:
	.size	__hip_module_dtor, .Lfunc_end31-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	ref,@object                     # @ref
	.bss
	.globl	ref
	.p2align	4, 0x0
ref:
	.zero	256
	.size	ref, 256

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"%9.3f "
	.size	.L.str.1, 7

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"%9.6f "
	.size	.L.str.3, 7

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"%8.6f "
	.size	.L.str.5, 7

	.type	_Z3mapPfS_,@object              # @_Z3mapPfS_
	.section	.rodata,"a",@progbits
	.globl	_Z3mapPfS_
	.p2align	3, 0x0
_Z3mapPfS_:
	.quad	_Z18__device_stub__mapPfS_
	.size	_Z3mapPfS_, 8

	.type	.L.str.7,@object                # @.str.7
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.7:
	.asciz	"after : "
	.size	.L.str.7, 9

	.type	_Z9transposePfS_,@object        # @_Z9transposePfS_
	.section	.rodata,"a",@progbits
	.globl	_Z9transposePfS_
	.p2align	3, 0x0
_Z9transposePfS_:
	.quad	_Z24__device_stub__transposePfS_
	.size	_Z9transposePfS_, 8

	.type	_Z6gatherPfS_,@object           # @_Z6gatherPfS_
	.globl	_Z6gatherPfS_
	.p2align	3, 0x0
_Z6gatherPfS_:
	.quad	_Z21__device_stub__gatherPfS_
	.size	_Z6gatherPfS_, 8

	.type	_Z7scatterPfS_,@object          # @_Z7scatterPfS_
	.globl	_Z7scatterPfS_
	.p2align	3, 0x0
_Z7scatterPfS_:
	.quad	_Z22__device_stub__scatterPfS_
	.size	_Z7scatterPfS_, 8

	.type	_Z7stencilPfS_S_,@object        # @_Z7stencilPfS_S_
	.globl	_Z7stencilPfS_S_
	.p2align	3, 0x0
_Z7stencilPfS_S_:
	.quad	_Z22__device_stub__stencilPfS_S_
	.size	_Z7stencilPfS_S_, 8

	.type	_Z6reducePfS_,@object           # @_Z6reducePfS_
	.globl	_Z6reducePfS_
	.p2align	3, 0x0
_Z6reducePfS_:
	.quad	_Z21__device_stub__reducePfS_
	.size	_Z6reducePfS_, 8

	.type	.L.str.9,@object                # @.str.9
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.9:
	.asciz	"%f\n"
	.size	.L.str.9, 4

	.type	_Z12hills_steelePfS_i,@object   # @_Z12hills_steelePfS_i
	.section	.rodata,"a",@progbits
	.globl	_Z12hills_steelePfS_i
	.p2align	3, 0x0
_Z12hills_steelePfS_i:
	.quad	_Z27__device_stub__hills_steelePfS_i
	.size	_Z12hills_steelePfS_i, 8

	.type	_Z8blellochPfS_i,@object        # @_Z8blellochPfS_i
	.globl	_Z8blellochPfS_i
	.p2align	3, 0x0
_Z8blellochPfS_i:
	.quad	_Z23__device_stub__blellochPfS_i
	.size	_Z8blellochPfS_i, 8

	.type	_Z13blelloch_postPfS_i,@object  # @_Z13blelloch_postPfS_i
	.globl	_Z13blelloch_postPfS_i
	.p2align	3, 0x0
_Z13blelloch_postPfS_i:
	.quad	_Z28__device_stub__blelloch_postPfS_i
	.size	_Z13blelloch_postPfS_i, 8

	.type	_Z7mapBitsPjS_jj,@object        # @_Z7mapBitsPjS_jj
	.globl	_Z7mapBitsPjS_jj
	.p2align	3, 0x0
_Z7mapBitsPjS_jj:
	.quad	_Z22__device_stub__mapBitsPjS_jj
	.size	_Z7mapBitsPjS_jj, 8

	.type	_Z10mapBitsRevPjS_jj,@object    # @_Z10mapBitsRevPjS_jj
	.globl	_Z10mapBitsRevPjS_jj
	.p2align	3, 0x0
_Z10mapBitsRevPjS_jj:
	.quad	_Z25__device_stub__mapBitsRevPjS_jj
	.size	_Z10mapBitsRevPjS_jj, 8

	.type	_Z7sumScanPjS_i,@object         # @_Z7sumScanPjS_i
	.globl	_Z7sumScanPjS_i
	.p2align	3, 0x0
_Z7sumScanPjS_i:
	.quad	_Z22__device_stub__sumScanPjS_i
	.size	_Z7sumScanPjS_i, 8

	.type	_Z8blellochPjS_i,@object        # @_Z8blellochPjS_i
	.globl	_Z8blellochPjS_i
	.p2align	3, 0x0
_Z8blellochPjS_i:
	.quad	_Z23__device_stub__blellochPjS_i
	.size	_Z8blellochPjS_i, 8

	.type	_Z12blellochPostPjS_i,@object   # @_Z12blellochPostPjS_i
	.globl	_Z12blellochPostPjS_i
	.p2align	3, 0x0
_Z12blellochPostPjS_i:
	.quad	_Z27__device_stub__blellochPostPjS_i
	.size	_Z12blellochPostPjS_i, 8

	.type	_Z9getOffsetPjS_S_S_,@object    # @_Z9getOffsetPjS_S_S_
	.globl	_Z9getOffsetPjS_S_S_
	.p2align	3, 0x0
_Z9getOffsetPjS_S_S_:
	.quad	_Z24__device_stub__getOffsetPjS_S_S_
	.size	_Z9getOffsetPjS_S_S_, 8

	.type	_Z13getNewIndicesPjS_S_,@object # @_Z13getNewIndicesPjS_S_
	.globl	_Z13getNewIndicesPjS_S_
	.p2align	3, 0x0
_Z13getNewIndicesPjS_S_:
	.quad	_Z28__device_stub__getNewIndicesPjS_S_
	.size	_Z13getNewIndicesPjS_S_, 8

	.type	.L.str.11,@object               # @.str.11
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.11:
	.asciz	"%u\n"
	.size	.L.str.11, 4

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"%u %u %u\n"
	.size	.L.str.12, 10

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z3mapPfS_"
	.size	.L__unnamed_1, 11

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z9transposePfS_"
	.size	.L__unnamed_2, 17

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z6gatherPfS_"
	.size	.L__unnamed_3, 14

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z7scatterPfS_"
	.size	.L__unnamed_4, 15

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"_Z7stencilPfS_S_"
	.size	.L__unnamed_5, 17

	.type	.L__unnamed_6,@object           # @5
.L__unnamed_6:
	.asciz	"_Z6reducePfS_"
	.size	.L__unnamed_6, 14

	.type	.L__unnamed_7,@object           # @6
.L__unnamed_7:
	.asciz	"_Z12hills_steelePfS_i"
	.size	.L__unnamed_7, 22

	.type	.L__unnamed_8,@object           # @7
.L__unnamed_8:
	.asciz	"_Z8blellochPfS_i"
	.size	.L__unnamed_8, 17

	.type	.L__unnamed_9,@object           # @8
.L__unnamed_9:
	.asciz	"_Z13blelloch_postPfS_i"
	.size	.L__unnamed_9, 23

	.type	.L__unnamed_10,@object          # @9
.L__unnamed_10:
	.asciz	"_Z7mapBitsPjS_jj"
	.size	.L__unnamed_10, 17

	.type	.L__unnamed_11,@object          # @10
.L__unnamed_11:
	.asciz	"_Z10mapBitsRevPjS_jj"
	.size	.L__unnamed_11, 21

	.type	.L__unnamed_12,@object          # @11
.L__unnamed_12:
	.asciz	"_Z7sumScanPjS_i"
	.size	.L__unnamed_12, 16

	.type	.L__unnamed_13,@object          # @12
.L__unnamed_13:
	.asciz	"_Z8blellochPjS_i"
	.size	.L__unnamed_13, 17

	.type	.L__unnamed_14,@object          # @13
.L__unnamed_14:
	.asciz	"_Z12blellochPostPjS_i"
	.size	.L__unnamed_14, 22

	.type	.L__unnamed_15,@object          # @14
.L__unnamed_15:
	.asciz	"_Z9getOffsetPjS_S_S_"
	.size	.L__unnamed_15, 21

	.type	.L__unnamed_16,@object          # @15
.L__unnamed_16:
	.asciz	"_Z13getNewIndicesPjS_S_"
	.size	.L__unnamed_16, 24

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr.1,@object                 # @str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr.1:
	.asciz	"printData"
	.size	.Lstr.1, 10

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"printRef"
	.size	.Lstr.2, 9

	.type	.Lstr.5,@object                 # @str.5
.Lstr.5:
	.asciz	"run "
	.size	.Lstr.5, 5

	.type	.Lstr.6,@object                 # @str.6
.Lstr.6:
	.asciz	"before : "
	.size	.Lstr.6, 10

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z18__device_stub__mapPfS_
	.addrsig_sym _Z24__device_stub__transposePfS_
	.addrsig_sym _Z21__device_stub__gatherPfS_
	.addrsig_sym _Z22__device_stub__scatterPfS_
	.addrsig_sym _Z22__device_stub__stencilPfS_S_
	.addrsig_sym _Z21__device_stub__reducePfS_
	.addrsig_sym _Z27__device_stub__hills_steelePfS_i
	.addrsig_sym _Z23__device_stub__blellochPfS_i
	.addrsig_sym _Z28__device_stub__blelloch_postPfS_i
	.addrsig_sym _Z22__device_stub__mapBitsPjS_jj
	.addrsig_sym _Z25__device_stub__mapBitsRevPjS_jj
	.addrsig_sym _Z22__device_stub__sumScanPjS_i
	.addrsig_sym _Z23__device_stub__blellochPjS_i
	.addrsig_sym _Z27__device_stub__blellochPostPjS_i
	.addrsig_sym _Z24__device_stub__getOffsetPjS_S_S_
	.addrsig_sym _Z28__device_stub__getNewIndicesPjS_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z3mapPfS_
	.addrsig_sym _Z9transposePfS_
	.addrsig_sym _Z6gatherPfS_
	.addrsig_sym _Z7scatterPfS_
	.addrsig_sym _Z7stencilPfS_S_
	.addrsig_sym _Z6reducePfS_
	.addrsig_sym _Z12hills_steelePfS_i
	.addrsig_sym _Z8blellochPfS_i
	.addrsig_sym _Z13blelloch_postPfS_i
	.addrsig_sym _Z7mapBitsPjS_jj
	.addrsig_sym _Z10mapBitsRevPjS_jj
	.addrsig_sym _Z7sumScanPjS_i
	.addrsig_sym _Z8blellochPjS_i
	.addrsig_sym _Z12blellochPostPjS_i
	.addrsig_sym _Z9getOffsetPjS_S_S_
	.addrsig_sym _Z13getNewIndicesPjS_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z3mapPfS_              ; -- Begin function _Z3mapPfS_
	.globl	_Z3mapPfS_
	.p2align	8
	.type	_Z3mapPfS_,@function
_Z3mapPfS_:                             ; @_Z3mapPfS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x1c
	s_load_b32 s2, s[0:1], 0x10
	v_bfe_u32 v1, v0, 10, 10
	v_and_b32_e32 v0, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s4, 16
	s_and_b32 s4, s4, 0xffff
	v_mad_u64_u32 v[2:3], null, s15, s3, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, v2, s2, s[14:15]
	s_load_b128 s[0:3], s[0:1], 0x0
	v_mad_u64_u32 v[1:2], null, v3, s4, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_load_b32 s0, s[2:3], 0x0
	global_load_b32 v2, v[0:1], off
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f32_e32 v2, s0, v2
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z3mapPfS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z3mapPfS_, .Lfunc_end0-_Z3mapPfS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 168
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z9transposePfS_        ; -- Begin function _Z9transposePfS_
	.globl	_Z9transposePfS_
	.p2align	8
	.type	_Z9transposePfS_,@function
_Z9transposePfS_:                       ; @_Z9transposePfS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x1c
	s_load_b64 s[4:5], s[0:1], 0x10
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v0, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s6, s2, 0xffff
	s_lshr_b32 s3, s2, 16
	v_mad_u64_u32 v[2:3], null, s14, s6, v[1:2]
	v_mad_u64_u32 v[3:4], null, s15, s3, v[0:1]
	s_mul_i32 s4, s4, s6
	s_load_b128 s[0:3], s[0:1], 0x0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[0:1], null, s4, v3, v[2:3]
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	s_mul_i32 s2, s5, s6
	global_load_b32 v4, v[0:1], off
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[0:1], null, s2, v2, v[3:4]
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v4, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9transposePfS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z9transposePfS_, .Lfunc_end1-_Z9transposePfS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 204
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z6gatherPfS_           ; -- Begin function _Z6gatherPfS_
	.globl	_Z6gatherPfS_
	.p2align	8
	.type	_Z6gatherPfS_,@function
_Z6gatherPfS_:                          ; @_Z6gatherPfS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x1c
	s_load_b64 s[6:7], s[0:1], 0x10
	v_and_b32_e32 v4, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s2, 0xffff
	s_lshr_b32 s3, s2, 16
	v_mad_u64_u32 v[0:1], null, s14, s5, v[4:5]
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_mul_i32 s4, s6, s5
	s_load_b128 s[0:3], s[0:1], 0x0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v1, s4, v[0:1]
	v_add_nc_u32_e32 v6, -1, v1
	v_mad_u64_u32 v[7:8], null, s6, v6, s[14:15]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v3, 31, v2
	s_mul_i32 s6, s7, s5
	v_mov_b32_e32 v8, 0
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v5, v7, s5
	v_add_nc_u32_e32 v7, -2, v0
	s_mov_b32 s5, 0
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add3_u32 v9, v4, v5, -1
.LBB2_1:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB2_2 Depth 2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cmp_lt_i32_e32 vcc_lo, -1, v6
	v_cmp_gt_i32_e64 s0, s6, v6
	v_mov_b32_e32 v4, v9
	v_mov_b32_e32 v10, v7
	s_mov_b32 s7, 0
.LBB2_2:                                ;   Parent Loop BB2_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v10, 1, v10
	v_cmp_lt_i32_e64 s1, -1, v10
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s8, s1
	s_cbranch_execz .LBB2_6
; %bb.3:                                ;   in Loop: Header=BB2_2 Depth=2
	v_cmp_gt_i32_e64 s1, s4, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, vcc_lo, s1
	s_and_b32 s1, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s9, s1
	s_cbranch_execz .LBB2_5
; %bb.4:                                ;   in Loop: Header=BB2_2 Depth=2
	v_ashrrev_i32_e32 v5, 31, v4
	v_add_nc_u32_e32 v8, 1, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[11:12], 2, v[4:5]
	v_add_co_u32 v11, s1, s2, v11
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v12, s1, s3, v12, s1
	global_load_b32 v5, v[11:12], off
	global_load_b32 v11, v[2:3], off
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v5, v5, v11
	global_store_b32 v[2:3], v5, off
.LBB2_5:                                ; %Flow
                                        ;   in Loop: Header=BB2_2 Depth=2
	s_or_b32 exec_lo, exec_lo, s9
.LBB2_6:                                ;   in Loop: Header=BB2_2 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	s_or_b32 exec_lo, exec_lo, s8
	v_cmp_gt_i32_e64 s1, v10, v0
	v_add_nc_u32_e32 v4, 1, v4
	s_or_b32 s7, s1, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB2_2
; %bb.7:                                ;   in Loop: Header=BB2_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	v_add_nc_u32_e32 v4, 1, v6
	v_cmp_gt_i32_e32 vcc_lo, v6, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v6, v4 :: v_dual_add_nc_u32 v9, s4, v9
	s_or_b32 s5, vcc_lo, s5
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB2_1
; %bb.8:
	s_or_b32 exec_lo, exec_lo, s5
	global_load_b32 v0, v[2:3], off
	v_cvt_f32_i32_e32 v1, v8
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f32 v4, null, v1, v1, v0
	v_rcp_f32_e32 v5, v4
	s_waitcnt_depctr 0xfff
	v_fma_f32 v6, -v4, v5, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v5, v6, v5
	v_div_scale_f32 v6, vcc_lo, v0, v1, v0
	v_mul_f32_e32 v7, v6, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v8, -v4, v7, v6
	v_fmac_f32_e32 v7, v8, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v4, -v4, v7, v6
	v_div_fmas_f32 v4, v4, v5, v7
	s_delay_alu instid0(VALU_DEP_1)
	v_div_fixup_f32 v0, v4, v1, v0
	global_store_b32 v[2:3], v0, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6gatherPfS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 13
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z6gatherPfS_, .Lfunc_end2-_Z6gatherPfS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 548
; NumSgprs: 18
; NumVgprs: 13
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 13
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z7scatterPfS_          ; -- Begin function _Z7scatterPfS_
	.globl	_Z7scatterPfS_
	.p2align	8
	.type	_Z7scatterPfS_,@function
_Z7scatterPfS_:                         ; @_Z7scatterPfS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x1c
	s_load_b64 s[8:9], s[0:1], 0x10
	v_dual_mov_b32 v9, 0 :: v_dual_and_b32 v6, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_load_b128 s[4:7], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s10, s2, 0xffff
	s_lshr_b32 s3, s2, 16
	v_mad_u64_u32 v[0:1], null, s14, s10, v[6:7]
	v_mad_u64_u32 v[1:2], null, s15, s3, v[3:4]
	s_mul_i32 s2, s8, s10
	s_mov_b32 s3, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v10, -2, v0
	v_mad_u64_u32 v[2:3], null, v1, s2, v[0:1]
	v_add_nc_u32_e32 v8, -1, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mad_u64_u32 v[4:5], null, s8, v8, s[14:15]
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_mul_lo_u32 v7, v4, s10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_add3_u32 v11, v6, v7, -1
	s_mul_i32 s6, s9, s10
.LBB3_1:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB3_2 Depth 2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cmp_lt_i32_e32 vcc_lo, -1, v8
	v_cmp_gt_i32_e64 s0, s6, v8
	v_mov_b32_e32 v6, v11
	v_mov_b32_e32 v12, v10
	s_mov_b32 s7, 0
.LBB3_2:                                ;   Parent Loop BB3_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v12, 1, v12
	s_mov_b32 s8, exec_lo
	v_cmpx_lt_i32_e32 -1, v12
	s_cbranch_execz .LBB3_6
; %bb.3:                                ;   in Loop: Header=BB3_2 Depth=2
	v_cmp_gt_i32_e64 s1, s2, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, vcc_lo, s1
	s_and_b32 s1, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s9, s1
	s_cbranch_execz .LBB3_5
; %bb.4:                                ;   in Loop: Header=BB3_2 Depth=2
	v_ashrrev_i32_e32 v7, 31, v6
	v_add_nc_u32_e32 v9, 1, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[13:14], 2, v[6:7]
	v_add_co_u32 v13, s1, s4, v13
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v14, s1, s5, v14, s1
	global_load_b32 v7, v[4:5], off
	global_load_b32 v15, v[13:14], off
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v7, v7, v15
	global_store_b32 v[13:14], v7, off
.LBB3_5:                                ; %Flow
                                        ;   in Loop: Header=BB3_2 Depth=2
	s_or_b32 exec_lo, exec_lo, s9
.LBB3_6:                                ;   in Loop: Header=BB3_2 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	s_or_b32 exec_lo, exec_lo, s8
	v_cmp_gt_i32_e64 s1, v12, v0
	v_add_nc_u32_e32 v6, 1, v6
	s_or_b32 s7, s1, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB3_2
; %bb.7:                                ;   in Loop: Header=BB3_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	v_add_nc_u32_e32 v6, 1, v8
	v_cmp_gt_i32_e32 vcc_lo, v8, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v8, v6 :: v_dual_add_nc_u32 v11, s2, v11
	s_or_b32 s3, vcc_lo, s3
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB3_1
; %bb.8:
	s_or_b32 exec_lo, exec_lo, s3
	v_add_co_u32 v0, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v3, vcc_lo
	v_cvt_f32_i32_e32 v3, v9
	global_load_b32 v2, v[0:1], off
	s_waitcnt vmcnt(0)
	v_div_scale_f32 v4, null, v3, v3, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v5, v4
	s_waitcnt_depctr 0xfff
	v_fma_f32 v6, -v4, v5, 1.0
	v_fmac_f32_e32 v5, v6, v5
	v_div_scale_f32 v6, vcc_lo, v2, v3, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v7, v6, v5
	v_fma_f32 v8, -v4, v7, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v7, v8, v5
	v_fma_f32 v4, -v4, v7, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v4, v4, v5, v7
	v_div_fixup_f32 v2, v4, v3, v2
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7scatterPfS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 16
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z7scatterPfS_, .Lfunc_end3-_Z7scatterPfS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 548
; NumSgprs: 18
; NumVgprs: 16
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 16
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z7stencilPfS_S_        ; -- Begin function _Z7stencilPfS_S_
	.globl	_Z7stencilPfS_S_
	.p2align	8
	.type	_Z7stencilPfS_S_,@function
_Z7stencilPfS_S_:                       ; @_Z7stencilPfS_S_
; %bb.0:
	s_clause 0x1
	s_load_b32 s8, s[0:1], 0x24
	s_load_b256 s[0:7], s[0:1], 0x0
	v_bfe_u32 v2, v0, 10, 10
	v_and_b32_e32 v5, 0x3ff, v0
	s_mov_b32 s11, 0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s9, s8, 16
	s_and_b32 s10, s8, 0xffff
	v_mad_u64_u32 v[0:1], null, s15, s9, v[2:3]
	v_mad_u64_u32 v[1:2], null, s14, s10, v[5:6]
	s_mul_i32 s8, s6, s10
	s_mov_b32 s9, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, -1, v0
	v_mad_u64_u32 v[2:3], null, v0, s8, v[1:2]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mad_u64_u32 v[6:7], null, s6, v4, s[14:15]
	v_add_nc_u32_e32 v7, -2, v1
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v8, v6, s10
	v_mov_b32_e32 v6, 0
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_mul_i32 s10, s7, s10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	v_add3_u32 v8, v5, v8, -1
	v_mov_b32_e32 v5, 0
.LBB4_1:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB4_2 Depth 2
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_lt_i32_e32 vcc_lo, -1, v4
	v_cmp_gt_i32_e64 s0, s10, v4
	v_mov_b32_e32 v9, v7
	s_mov_b32 s12, 0
	s_mov_b32 s6, s11
.LBB4_2:                                ;   Parent Loop BB4_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v9, 1, v9
	v_cmp_lt_i32_e64 s1, -1, v9
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s13, s1
	s_cbranch_execz .LBB4_6
; %bb.3:                                ;   in Loop: Header=BB4_2 Depth=2
	v_cmp_gt_i32_e64 s1, s8, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, vcc_lo, s1
	s_and_b32 s1, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s14, s1
	s_cbranch_execz .LBB4_5
; %bb.4:                                ;   in Loop: Header=BB4_2 Depth=2
	v_add_nc_u32_e32 v10, s6, v8
	s_ashr_i32 s7, s6, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[16:17], s[6:7], 2
	s_add_u32 s16, s4, s16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v11, 31, v10
	s_addc_u32 s17, s5, s17
	v_lshlrev_b64 v[10:11], 2, v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v10, s1, s2, v10
	v_add_co_ci_u32_e64 v11, s1, s3, v11, s1
	global_load_b32 v12, v6, s[16:17]
	global_load_b32 v10, v[10:11], off
	global_load_b32 v11, v[2:3], off
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v11, v10, v12
	global_store_b32 v[2:3], v11, off
	global_load_b32 v10, v6, s[16:17]
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v5, v5, v10
.LBB4_5:                                ; %Flow
                                        ;   in Loop: Header=BB4_2 Depth=2
	s_or_b32 exec_lo, exec_lo, s14
.LBB4_6:                                ;   in Loop: Header=BB4_2 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s13
	v_cmp_gt_i32_e64 s1, v9, v1
	s_add_i32 s6, s6, 1
	s_or_b32 s12, s1, s12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s12
	s_cbranch_execnz .LBB4_2
; %bb.7:                                ;   in Loop: Header=BB4_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s12
	v_add_nc_u32_e32 v9, 1, v4
	v_cmp_gt_i32_e32 vcc_lo, v4, v0
	s_add_i32 s11, s11, s8
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_mov_b32_e32 v4, v9
	s_or_b32 s9, vcc_lo, s9
	s_and_not1_b32 exec_lo, exec_lo, s9
	s_cbranch_execnz .LBB4_1
; %bb.8:
	s_or_b32 exec_lo, exec_lo, s9
	global_load_b32 v0, v[2:3], off
	s_waitcnt vmcnt(0)
	v_div_scale_f32 v1, null, v5, v5, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v4, v1
	s_waitcnt_depctr 0xfff
	v_fma_f32 v6, -v1, v4, 1.0
	v_fmac_f32_e32 v4, v6, v4
	v_div_scale_f32 v6, vcc_lo, v0, v5, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v7, v6, v4
	v_fma_f32 v8, -v1, v7, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v7, v8, v4
	v_fma_f32 v1, -v1, v7, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v1, v1, v4, v7
	v_div_fixup_f32 v0, v1, v5, v0
	global_store_b32 v[2:3], v0, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7stencilPfS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 13
		.amdhsa_next_free_sgpr 18
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end4:
	.size	_Z7stencilPfS_S_, .Lfunc_end4-_Z7stencilPfS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 580
; NumSgprs: 20
; NumVgprs: 13
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 20
; NumVGPRsForWavesPerEU: 13
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z6reducePfS_           ; -- Begin function _Z6reducePfS_
	.globl	_Z6reducePfS_
	.p2align	8
	.type	_Z6reducePfS_,@function
_Z6reducePfS_:                          ; @_Z6reducePfS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x1c
	s_load_b32 s6, s[0:1], 0x10
	v_bfe_u32 v2, v0, 10, 10
	v_and_b32_e32 v3, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s4, s2, 0xffff
	s_mul_i32 s5, s15, s3
	s_mul_i32 s6, s6, s4
	v_add_nc_u32_e32 v1, s5, v2
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mul_i32 s4, s14, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v1, v1, s6
	v_add3_u32 v0, s4, v3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	s_mov_b32 s2, 0
	s_mov_b32 s3, exec_lo
	global_load_b32 v0, v[0:1], off
	v_lshlrev_b32_e32 v1, 2, v3
	v_or_b32_e32 v3, v2, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_lshl_add_u32 v1, v2, 3, v1
	s_waitcnt vmcnt(0)
	ds_store_b32 v1, v0
	v_cmpx_eq_u32_e32 0, v3
	s_cbranch_execz .LBB5_4
; %bb.1:                                ; %.preheader
	s_lshr_b32 s3, s5, 31
	s_lshr_b32 s7, s6, 31
	s_add_i32 s5, s5, s3
	s_add_i32 s6, s6, s7
	s_ashr_i32 s3, s5, 1
	s_lshr_b32 s5, s4, 31
	s_ashr_i32 s6, s6, 1
	s_add_i32 s4, s4, s5
	s_mul_i32 s3, s3, s6
	s_ashr_i32 s4, s4, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s4, s3, s4
	s_ashr_i32 s5, s4, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[4:5], s[4:5], 2
	s_add_u32 s0, s0, s4
	s_addc_u32 s1, s1, s5
	s_load_b32 s3, s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	v_mov_b32_e32 v0, s3
.LBB5_2:                                ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v1, s2
	s_add_i32 s2, s2, 4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s2, 16
	ds_load_b32 v1, v1
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v0, v1, v0
	s_cbranch_scc1 .LBB5_2
; %bb.3:                                ; %.loopexit
	v_mov_b32_e32 v1, 0
	global_store_b32 v1, v0, s[0:1]
.LBB5_4:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6reducePfS_
		.amdhsa_group_segment_fixed_size 16
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end5:
	.size	_Z6reducePfS_, .Lfunc_end5-_Z6reducePfS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 332
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 16 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z12hills_steelePfS_i   ; -- Begin function _Z12hills_steelePfS_i
	.globl	_Z12hills_steelePfS_i
	.p2align	8
	.type	_Z12hills_steelePfS_i,@function
_Z12hills_steelePfS_i:                  ; @_Z12hills_steelePfS_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s3, s[0:1], 0x18
	v_bfe_u32 v1, v0, 10, 10
	v_and_b32_e32 v0, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s4, s2, 16
	s_and_b32 s2, s2, 0xffff
	v_mad_u64_u32 v[2:3], null, s15, s4, v[1:2]
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b32 s1, s[0:1], 0x10
	s_mov_b32 s0, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, v2, s3, s[14:15]
	v_mad_u64_u32 v[2:3], null, v4, s2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v4, vcc_lo, s7, v1, vcc_lo
	global_load_b32 v3, v[3:4], off
	v_cmpx_le_i32_e64 s1, v2
	s_cbranch_execz .LBB6_2
; %bb.1:
	v_subrev_nc_u32_e32 v4, s1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v5, 31, v4
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s6, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v5, vcc_lo
	global_load_b32 v2, v[4:5], off
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v3, v3, v2
.LBB6_2:
	s_or_b32 exec_lo, exec_lo, s0
	v_add_co_u32 v0, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v3, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12hills_steelePfS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end6:
	.size	_Z12hills_steelePfS_i, .Lfunc_end6-_Z12hills_steelePfS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 252
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z8blellochPfS_i        ; -- Begin function _Z8blellochPfS_i
	.globl	_Z8blellochPfS_i
	.p2align	8
	.type	_Z8blellochPfS_i,@function
_Z8blellochPfS_i:                       ; @_Z8blellochPfS_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s3, s[0:1], 0x18
	v_bfe_u32 v1, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s4, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, s15, s4, v[1:2]
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b32 s0, s[0:1], 0x10
	v_mad_u64_u32 v[3:4], null, v2, s3, s[14:15]
	v_and_b32_e32 v2, 0x3ff, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[0:1], null, v3, s2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s1, s0, 31
	v_ashrrev_i32_e32 v1, 31, v0
	s_add_i32 s2, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s1, s2, s1
	s_sub_i32 s2, 0, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[0:1]
	v_add_nc_u32_e32 v7, v0, v1
	v_xor_b32_e32 v7, v7, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v4, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v3, vcc_lo
	global_load_b32 v4, v[4:5], off
	v_cvt_f32_u32_e32 v5, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v5, v5
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v5, 0x4f7ffffe, v5
	v_cvt_u32_f32_e32 v5, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v6, s2, v5
	v_mul_hi_u32 v6, v5, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v5, v5, v6
	v_mul_hi_u32 v5, v7, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v5, v5, s1
	v_sub_nc_u32_e32 v5, v7, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v6, s1, v5
	v_cmp_le_u32_e32 vcc_lo, s1, v5
	v_cndmask_b32_e32 v5, v5, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v6, s1, v5
	v_cmp_le_u32_e32 vcc_lo, s1, v5
	s_add_i32 s1, s0, -1
	v_cndmask_b32_e32 v5, v5, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v5, v5, v1
	v_sub_nc_u32_e32 v1, v5, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_eq_u32_e32 vcc_lo, s1, v1
	s_and_saveexec_b32 s1, vcc_lo
	s_cbranch_execz .LBB7_2
; %bb.1:
	s_lshr_b32 s2, s0, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s0, s0, s2
	s_ashr_i32 s0, s0, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_subrev_nc_u32_e32 v0, s0, v0
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_add_co_u32 v0, vcc_lo, s6, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_load_b32 v0, v[0:1], off
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v4, v4, v0
.LBB7_2:
	s_or_b32 exec_lo, exec_lo, s1
	v_add_co_u32 v0, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v3, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v4, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8blellochPfS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end7:
	.size	_Z8blellochPfS_i, .Lfunc_end7-_Z8blellochPfS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 432
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z13blelloch_postPfS_i  ; -- Begin function _Z13blelloch_postPfS_i
	.globl	_Z13blelloch_postPfS_i
	.p2align	8
	.type	_Z13blelloch_postPfS_i,@function
_Z13blelloch_postPfS_i:                 ; @_Z13blelloch_postPfS_i
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x10
	s_load_b32 s3, s[0:1], 0x24
	s_load_b32 s4, s[0:1], 0x18
	v_bfe_u32 v1, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s5, s2, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s6, s2, s5
	s_xor_b32 s5, s6, s5
	s_lshr_b32 s6, s3, 16
	v_cvt_f32_u32_e32 v2, s5
	s_and_b32 s3, s3, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v5, v2
	v_mad_u64_u32 v[2:3], null, s15, s6, v[1:2]
	v_mad_u64_u32 v[3:4], null, v2, s4, s[14:15]
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v5
	v_and_b32_e32 v2, 0x3ff, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_u32_f32_e32 v4, v1
	v_mad_u64_u32 v[0:1], null, v3, s3, v[2:3]
	s_sub_i32 s3, 0, s5
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_mul_lo_u32 v2, s3, v4
	s_add_i32 s3, s2, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v1, 31, v0
	v_mul_hi_u32 v2, v4, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, v0, v1
	v_xor_b32_e32 v3, v3, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v2, v4, v2
	v_mul_hi_u32 v2, v3, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v2, v2, s5
	v_sub_nc_u32_e32 v2, v3, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v3, s5, v2
	v_cmp_le_u32_e32 vcc_lo, s5, v2
	v_cndmask_b32_e32 v2, v2, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v3, s5, v2
	v_cmp_le_u32_e32 vcc_lo, s5, v2
	v_cndmask_b32_e32 v2, v2, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v2, v2, v1
	v_sub_nc_u32_e32 v2, v2, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_eq_u32_e32 vcc_lo, s3, v2
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB8_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	s_lshr_b32 s0, s2, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s2, s2, s0
	s_ashr_i32 s0, s2, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v2, s0, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v4, vcc_lo, s6, v0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v6, vcc_lo, s6, v2
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v3, vcc_lo
	v_add_co_u32 v0, vcc_lo, s4, v0
	s_clause 0x1
	global_load_b32 v8, v[4:5], off
	global_load_b32 v6, v[6:7], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v6, v8, v6
	global_store_b32 v[0:1], v6, off
	global_load_b32 v4, v[4:5], off
	v_add_co_u32 v0, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v3, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v4, off
.LBB8_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13blelloch_postPfS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end8:
	.size	_Z13blelloch_postPfS_i, .Lfunc_end8-_Z13blelloch_postPfS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 456
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z7mapBitsPjS_jj        ; -- Begin function _Z7mapBitsPjS_jj
	.globl	_Z7mapBitsPjS_jj
	.p2align	8
	.type	_Z7mapBitsPjS_jj,@function
_Z7mapBitsPjS_jj:                       ; @_Z7mapBitsPjS_jj
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x24
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_add_co_u32 v2, vcc_lo, s6, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v2, s0, v2
	v_cmp_ne_u32_e32 vcc_lo, 0, v2
	v_cndmask_b32_e64 v2, 0, s1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7mapBitsPjS_jj
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end9:
	.size	_Z7mapBitsPjS_jj, .Lfunc_end9-_Z7mapBitsPjS_jj
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 144
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z10mapBitsRevPjS_jj    ; -- Begin function _Z10mapBitsRevPjS_jj
	.globl	_Z10mapBitsRevPjS_jj
	.p2align	8
	.type	_Z10mapBitsRevPjS_jj,@function
_Z10mapBitsRevPjS_jj:                   ; @_Z10mapBitsRevPjS_jj
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x24
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_add_co_u32 v2, vcc_lo, s6, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v2, s0, v2
	v_cmp_eq_u32_e32 vcc_lo, 0, v2
	v_cndmask_b32_e64 v2, 0, s1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10mapBitsRevPjS_jj
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end10:
	.size	_Z10mapBitsRevPjS_jj, .Lfunc_end10-_Z10mapBitsRevPjS_jj
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 144
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z7sumScanPjS_i         ; -- Begin function _Z7sumScanPjS_i
	.globl	_Z7sumScanPjS_i
	.p2align	8
	.type	_Z7sumScanPjS_i,@function
_Z7sumScanPjS_i:                        ; @_Z7sumScanPjS_i
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x24
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b32 s1, s[0:1], 0x10
	s_mov_b32 s0, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, s15, s2, v[0:1]
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[2:3]
	v_add_co_u32 v3, vcc_lo, s6, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s7, v1, vcc_lo
	global_load_b32 v3, v[3:4], off
	v_cmpx_le_i32_e64 s1, v2
	s_cbranch_execz .LBB11_2
; %bb.1:
	v_subrev_nc_u32_e32 v4, s1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v5, 31, v4
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s6, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v5, vcc_lo
	global_load_b32 v2, v[4:5], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v3, v2, v3
.LBB11_2:
	s_or_b32 exec_lo, exec_lo, s0
	v_add_co_u32 v0, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v3, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7sumScanPjS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end11:
	.size	_Z7sumScanPjS_i, .Lfunc_end11-_Z7sumScanPjS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 200
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z8blellochPjS_i        ; -- Begin function _Z8blellochPjS_i
	.globl	_Z8blellochPjS_i
	.p2align	8
	.type	_Z8blellochPjS_i,@function
_Z8blellochPjS_i:                       ; @_Z8blellochPjS_i
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x24
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b32 s0, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_ashr_i32 s1, s0, 31
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_add_i32 s2, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s1, s2, s1
	s_sub_i32 s2, 0, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	v_add_nc_u32_e32 v7, v1, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v7, v7, v2
	v_add_co_u32 v5, vcc_lo, s6, v3
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v4, vcc_lo
	global_load_b32 v0, v[5:6], off
	v_cvt_f32_u32_e32 v5, s1
	v_rcp_iflag_f32_e32 v5, v5
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v5, 0x4f7ffffe, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v5, v5
	v_mul_lo_u32 v6, s2, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v6, v5, v6
	v_add_nc_u32_e32 v5, v5, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v5, v7, v5
	v_mul_lo_u32 v5, v5, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v5, v7, v5
	v_subrev_nc_u32_e32 v6, s1, v5
	v_cmp_le_u32_e32 vcc_lo, s1, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v5, v5, v6, vcc_lo
	v_subrev_nc_u32_e32 v6, s1, v5
	v_cmp_le_u32_e32 vcc_lo, s1, v5
	s_add_i32 s1, s0, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v5, v5, v6, vcc_lo
	v_xor_b32_e32 v5, v5, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v2, v5, v2
	v_cmp_eq_u32_e32 vcc_lo, s1, v2
	s_and_saveexec_b32 s1, vcc_lo
	s_cbranch_execz .LBB12_2
; %bb.1:
	s_lshr_b32 s2, s0, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s0, s0, s2
	s_ashr_i32 s0, s0, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_subrev_nc_u32_e32 v1, s0, v1
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, vcc_lo, s6, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s7, v2, vcc_lo
	global_load_b32 v1, v[1:2], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v0, v1, v0
.LBB12_2:
	s_or_b32 exec_lo, exec_lo, s1
	v_add_co_u32 v1, vcc_lo, s4, v3
	v_add_co_ci_u32_e32 v2, vcc_lo, s5, v4, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[1:2], v0, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8blellochPjS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end12:
	.size	_Z8blellochPjS_i, .Lfunc_end12-_Z8blellochPjS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 372
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z12blellochPostPjS_i   ; -- Begin function _Z12blellochPostPjS_i
	.globl	_Z12blellochPostPjS_i
	.p2align	8
	.type	_Z12blellochPostPjS_i,@function
_Z12blellochPostPjS_i:                  ; @_Z12blellochPostPjS_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x10
	s_load_b32 s3, s[0:1], 0x24
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s4, s2, 31
	s_and_b32 s3, s3, 0xffff
	s_add_i32 s5, s2, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_xor_b32 s4, s5, s4
	v_cvt_f32_u32_e32 v1, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	v_cvt_u32_f32_e32 v3, v1
	v_mad_u64_u32 v[1:2], null, s15, s3, v[0:1]
	s_sub_i32 s3, 0, s4
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_mul_lo_u32 v0, s3, v3
	s_add_i32 s3, s2, -1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v2, 31, v1
	v_mul_hi_u32 v0, v3, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v4, v1, v2
	v_xor_b32_e32 v4, v4, v2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v3, v0
	v_mul_hi_u32 v0, v4, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v0, v0, s4
	v_sub_nc_u32_e32 v0, v4, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v3, s4, v0
	v_cmp_le_u32_e32 vcc_lo, s4, v0
	v_cndmask_b32_e32 v0, v0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v3, s4, v0
	v_cmp_le_u32_e32 vcc_lo, s4, v0
	v_cndmask_b32_e32 v0, v0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v0, v0, v2
	v_sub_nc_u32_e32 v0, v0, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_eq_u32_e32 vcc_lo, s3, v0
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB13_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	s_lshr_b32 s0, s2, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s2, s2, s0
	s_ashr_i32 s0, s2, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_subrev_nc_u32_e32 v3, s0, v1
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[2:3], 2, v[3:4]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v4, vcc_lo, s6, v0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v6, vcc_lo, s6, v2
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v3, vcc_lo
	v_add_co_u32 v0, vcc_lo, s4, v0
	s_clause 0x1
	global_load_b32 v8, v[4:5], off
	global_load_b32 v6, v[6:7], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v6, v6, v8
	global_store_b32 v[0:1], v6, off
	global_load_b32 v4, v[4:5], off
	v_add_co_u32 v0, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v3, vcc_lo
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v4, off
.LBB13_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12blellochPostPjS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end13:
	.size	_Z12blellochPostPjS_i, .Lfunc_end13-_Z12blellochPostPjS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 408
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z9getOffsetPjS_S_S_    ; -- Begin function _Z9getOffsetPjS_S_S_
	.globl	_Z9getOffsetPjS_S_S_
	.p2align	8
	.type	_Z9getOffsetPjS_S_S_,@function
_Z9getOffsetPjS_S_S_:                   ; @_Z9getOffsetPjS_S_S_
; %bb.0:
	s_clause 0x1
	s_load_b32 s8, s[0:1], 0x2c
	s_load_b256 s[0:7], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s8, s8, 0xffff
	v_mov_b32_e32 v4, s4
	v_mad_u64_u32 v[1:2], null, s15, s8, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	v_mov_b32_e32 v3, s5
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, 1, v2
	v_cndmask_b32_e32 v2, s2, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v3, s3, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, v2, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, v3, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9getOffsetPjS_S_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end14:
	.size	_Z9getOffsetPjS_S_S_, .Lfunc_end14-_Z9getOffsetPjS_S_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 168
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z13getNewIndicesPjS_S_ ; -- Begin function _Z13getNewIndicesPjS_S_
	.globl	_Z13getNewIndicesPjS_S_
	.p2align	8
	.type	_Z13getNewIndicesPjS_S_,@function
_Z13getNewIndicesPjS_S_:                ; @_Z13getNewIndicesPjS_S_
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x24
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_add_co_u32 v2, vcc_lo, s6, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s4, v0
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v2, v3, v2
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13getNewIndicesPjS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end15:
	.size	_Z13getNewIndicesPjS_S_, .Lfunc_end15-_Z13getNewIndicesPjS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 152
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z3mapPfS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z3mapPfS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
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amdhsa.version:
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...

	.end_amdgpu_metadata
