#include <stdio.h>
#include <math.h>

#ifndef gpuAssert
#define gpuAssert( condition ) { if( (condition) != cudaSuccess ) { fprintf( stderr, "\n FAILURE %s in %s, line %d\n", cudaGetErrorString(condition), __FILE__, __LINE__ ); exit( 1 ); } }
#endif

#define PREC 8

// I've used a snippet of someone elses code, and one condition of use is
// to retain this licensing message
// I obtained the code from: 
// https://github.com/parallel-forall/code-samples/blob/master/posts/cuda-aware-mpi-example/src/Device.cu

/* Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*  * Redistributions of source code must retain the above copyright
*    notice, this list of conditions and the following disclaimer.
*  * Redistributions in binary form must reproduce the above copyright
*    notice, this list of conditions and the following disclaimer in the
*    documentation and/or other materials provided with the distribution.
*  * Neither the name of NVIDIA CORPORATION nor the names of its
*    contributors may be used to endorse or promote products derived
*    from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ``AS IS'' AND ANY
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
* OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/

/******************************************************************/
/* borrowed just one function for AtomicMax on floats from github */
	 
/**
* @brief Compute the maximum of 2 single-precision floating point values using an atomic operation
*
* @param[in]	address	The address of the reference value which might get updated with the maximum
* @param[in]	value	The value that is compared to the reference in order to determine the maximum
*/
static __device__ void AtomicMax(float * const address, float value)
{
	if (*address >= value)
	{
		return;
	}

	int * const address_as_i = (int *)address;
	int old = *address_as_i, assumed;

	do
	{
		assumed = old;
		if (__int_as_float(assumed) >= value)
		{
			break;
		}

		old = atomicCAS(address_as_i, assumed, __float_as_int(value));
	} while (assumed != old);
}
/******************************************************************/

// don't actually need this, as you can & with offsets instead
//#define B01_MASK 0b0000000000000001 
//#define B02_MASK 0b0000000000000011
//#define B03_MASK 0b0000000000000111
//#define B04_MASK 0b0000000000001111
//#define B05_MASK 0b0000000000011111
//#define B06_MASK 0b0000000000111111
//#define B07_MASK 0b0000000001111111
//#define B08_MASK 0b0000000011111111
//#define B09_MASK 0b0000000111111111
//#define B10_MASK 0b0000001111111111

// * bitwise div of power 2 num (i\n): i >> log2(n)
// * bitwise modulo of power of 2 num(i % n) : i & (n - 1)

// much of the efficiency of this implementation hinges of being able to apply 
// very fast bitwise manipulations which will only be reliable in cases where
// the fundamental dimensionality of the data is strictly by powers of 2
// happily this is the case in this application, and for fft in general

// more specifically, exploiting the luxury of powers of 2 enables the construction
// of blocks that should be (theoretically) entirely divergence free, which also means
// that the __syncthreads statements, though necessary to ensure correctness, are in practice
// often a "formality", as all warps should be finishing at the same time, provided all
// memory accesses to shared and constant memory can be performed in the same number of 
// clock cycles, this is also one of the reasons behind using constant and shared memory.

// though this implementation fixes on 2048 point fft, it could easily be generalised
// to any 2^s point fft needed. There is a happy coincidence, where my particular GPU
// is limited to 1024 threads per block, and a 2048 point iterative fft unrolls its
// two inner loops to 1024 every time. This is optimal, but only by coincidence. Were
// this happy coincidence not to be relied upon, then further optimisations which take
// intra-block synchronisation, and possibly where warp boundaries will cross, might need 
// to be included.

// precision: it must also be mentioned that a loss of precision is being spent on performance
// Nvidia GPUs with Compute Cabaility 5.0 can only assure atomic arithmetic for single precision
// floats, and the registers available to the threads are also 32 bit registers. For this reason,
// the decision was made to reduce the precision from double to single

#define TWIDDLES_LEN 2047
#define LGSAMP 11
#define WSAMP 2048
#define HWSAMP (WSAMP / 2)
#define IDX_SHIFT (32 - LGSAMP)

//typedef float3 Complex; // padding to avoid bank conflicts - might not be needed in CUDA 9.0
typedef float2 Complex;
static __device__  inline Complex ComplexCast(float a, float b);
static __device__  inline Complex ComplexAdd(Complex a, Complex b);
static __device__  inline Complex ComplexSub(Complex a, Complex b);
static __device__  inline Complex ComplexMul(Complex a, Complex b);
static __device__ inline float ComplexNorm(Complex a);

static __device__  inline Complex ComplexCast(float a, float b)
{
	Complex c;
	c.x = a; c.y = b; 
	//c.z = 0;
	return c;
}

// Complex addition
static __device__ inline Complex ComplexAdd(Complex a, Complex b)
{
	Complex c;
	c.x = a.x + b.x;
	c.y = a.y + b.y;
	//c.z = 0; // padding to avoid bank conflicts - might not be needed in CUDA 9.0
	return c;
}

// Complex subtraction
static __device__ inline Complex ComplexSub(Complex a, Complex b)
{
	Complex c;
	c.x = a.x - b.x;
	c.y = a.y - b.y;
	//c.z = 0; // padding to avoid bank conflicts - might not be needed in CUDA 9.0
	return c;
}

// Complex multiplication
static __device__ inline Complex ComplexMul(Complex a, Complex b)
{
	Complex c;
	c.x = a.x * b.x - a.y * b.y;
	c.y = a.x * b.y + a.y * b.x;
	//c.z = 0; // padding to avoid bank conflicts - might not be needed in CUDA 9.0
	return c;
}

// Fast calc of Norm of a Complex Number
static __device__ inline float ComplexNorm(Complex a) { return sqrt(a.x*a.x + a.y*a.y); }

__device__ __constant__ int offsets[LGSAMP];
__device__ __constant__ float twiddles_re[TWIDDLES_LEN];
__device__ __constant__ float twiddles_im[TWIDDLES_LEN];

__device__ float * in_re;
__device__ float * in_im;

static __device__ float maxFFT = 0;

// would be really good to use this with Pinned Memory
__global__ void core(float * out, int size, int gridNum, int gridWidth)
{
	extern __shared__ Complex signalChunk[]; // twice the size of 1024 threads in block

	int tidx0, tidx1, rtidx0, rtidx1, stridx0, stridx1, idx_twid; 
	Complex radius;
	int start = (gridNum * gridWidth + blockIdx.x) * blockDim.x; // start of the block, threadIdx.x == 0
	
	tidx0 = threadIdx.x; 
	tidx1 = threadIdx.x + HWSAMP;
	rtidx0 = __brev(tidx0) >> IDX_SHIFT; 
	rtidx1 = __brev(tidx1) >> IDX_SHIFT;
	stridx0 = rtidx0 + start; 
	stridx1 = rtidx1 + start;
	
	if(tidx0 + start < size){
					
		// permutation by bit reversal of array indices as 11 bit numbers, requires 32-11 bit shift
		signalChunk[tidx0] = ComplexCast(in_re[stridx0], in_im[stridx0]);
		signalChunk[tidx1] = ComplexCast(in_re[stridx1], in_im[stridx1]);
		__syncthreads();
		
		for (unsigned int s = 0; s < LGSAMP; s++) // 11 values of s as per iterative algorithm for fft (2048 point)
		{
			tidx0 = threadIdx.x + (threadIdx.x & (~offsets[s]));
			tidx1 = tidx0 + offsets[s] + 1;
			idx_twid = offsets[s] + (threadIdx.x & offsets[s]);
			
			radius = ComplexMul(signalChunk[tidx1], ComplexCast(twiddles_re[idx_twid], twiddles_im[idx_twid])); // A[j + k + m/2]*w
			signalChunk[tidx0] = ComplexAdd(signalChunk[tidx0], radius); // A[j + k]       = A[j + k] + A[j + k + m/2]*w
			signalChunk[tidx1] = ComplexSub(signalChunk[tidx0], radius); // A[j + k + m/2] = A[j + k] - A[j + k + m/2]*w
			__syncthreads();
		}
		tidx0 = threadIdx.x; 
		out[tidx0 + start] = ComplexNorm(signalChunk[tidx0]);
		
		// eval for maxFFT, use AtomicMax() here
		AtomicMax(&maxFFT, out[tidx0 + start]);
	}
}
// use kernel termination as sync point to launch this next kernel named normaliseFinal
__global__ void normaliseFinal(float * out, int size, int gridNum, int gridWidth)
{

	int tidx =  (gridNum * gridWidth + blockIdx.x) * blockDim.x + threadIdx.x;
	if(tidx < size){
		out[tidx] = out[tidx] / maxFFT;
	}
}

// would be really good to use this with Pinned Memory
// since CPU will be busy reading in wavefile while this is happening
// this doesn't need to be all that optimised, it could even be as sequential
// as the CPU version
// NOTE: this should be 1 block, 11 threads
__global__ void calcTwiddles(float * out_re, float * out_im, float * zerothTwiddles_re, float * zerothTwiddles_im)
{
	int tid = threadIdx.x;
	Complex runVal; runVal.x = 1; runVal.y = 0; //runVal.z = 0;
	
	for (int i = offsets[tid]; i < 2 * offsets[tid] + 1; i++)
	{
		out_re[i] = runVal.x;
		out_im[i] = runVal.y;
		runVal = ComplexMul(runVal, ComplexCast(zerothTwiddles_re[tid], zerothTwiddles_im[tid]));
	}
}

void writeBinFile(const char * file_name, float * bin_data, size_t nmemb){
	FILE * fp = fopen(file_name, "wb");
	printf("writing %s is writing %d in %lu bytes\n",file_name, nmemb, sizeof(float) * nmemb);
	fflush(stdout);
	fwrite(bin_data, sizeof(float), nmemb, fp);
	fflush(fp);
	fclose(fp);
	
}

size_t readBinFile(const char * file_name, float ** bin_data){
	FILE * fp = fopen(file_name,"r");
	fseek(fp, 0, SEEK_END);
	size_t sz = ftell(fp);
	size_t nmemb = sz/sizeof(**bin_data);
	printf("file %s is %lu elements in %lu bytes\n", file_name, nmemb, sz);
	fflush(stdout);
	rewind(fp);
	*bin_data = (float*)malloc(sz);
	fread(*bin_data, sizeof(float), nmemb, fp);
	fflush(fp);
	fclose(fp);
	return nmemb;
}

int main(int argc, char ** argv){
	printf("hello\n");
	fflush(stdout);
	const float pi = 3.1415927410;
	const char * wave_bin = "wave_out";
	const char * timefreq_ref = "timefreq_out";
	const char * timefreq_cmp = "timefreq_done";
	const int h_offsets[LGSAMP] = {0,1,3,7,15,31,63,127,255,511,1023};
	
	for(int i = 0; i < LGSAMP; i++) printf("h_offsets[%d] = %d, ", i, h_offsets[i]);
	printf("\n");
	fflush(stdout);
	
	float h_zerothTwiddles_re[LGSAMP];
	float h_zerothTwiddles_im[LGSAMP];
	
	float h_twiddles_re[TWIDDLES_LEN];
	float h_twiddles_im[TWIDDLES_LEN];
	
	float a;
	float * h_wave_data;
	float * h_timefreq_ref_data;
	
	size_t wave_num_els = readBinFile(wave_bin, &h_wave_data);
	
	size_t timefreq_num_els = readBinFile(timefreq_ref, &h_timefreq_ref_data);
	
	// testing bit reversal
	float * out; 
	if((out = (float*)malloc(timefreq_num_els * sizeof(*out))) == NULL)
		printf("failed to allocate out");
	
	float * h_timefreq_cmp_data;
	printf("Allocating h_timefreq_cmp_data\n");
	fflush(stdout);
	if((h_timefreq_cmp_data = (float*)malloc(timefreq_num_els * sizeof(*h_timefreq_cmp_data))) == NULL)
		printf("failed to allocate h_timefreq_cmp_data");
	
	size_t wave_num_pels = ((size_t)ceil((double)wave_num_els / (double)WSAMP)) * WSAMP;
	printf("wave_num_els = %d, wave_num_pels = %d\n", wave_num_els, wave_num_pels);
	fflush(stdout);
	
	float ** h_sig_data;
	printf("Allocating h_sig_data\n");
	fflush(stdout);
	if(h_sig_data = (float**)malloc(2 * sizeof(*h_sig_data))){
		for(int i = 0; i < 2; i++){ 
			printf("Allocating h_sig_data[%d]\n", i);
			if((h_sig_data[i] = (float*)malloc(wave_num_pels * sizeof(**h_sig_data))) == NULL)
				printf("failed to allocate h_sig_data[%d]\n", i);
		}
	}
	else printf("failed to allocate h_sig_data\n");
	
	// cast wave data to complex and add padding
	printf("Casting wave to complex and padding with zeros\n");
	fflush(stdout);
	for(int i = 0; i < wave_num_pels; i++)
	{
		h_sig_data[1][i] = 0;
		if(i < wave_num_els){
			h_sig_data[0][i] = h_wave_data[i];
		}
		else h_sig_data[0][i] = 0;
	}
	
	// calc zerothTwiddles
	printf("Calculating the zeroth twiddles\n");
	fflush(stdout);
	for (int ii = 0; ii < LGSAMP; ii++)
	{
		a = -2 * pi / ((double)(2*(h_offsets[ii] + 1)));
		//printf("2 * pi * ii = %f, (float)h_offsets[ii] + 1 = %f\n", 2 * pi * ii, (float)h_offsets[ii] + 1);
		//fflush(stdout);
		h_zerothTwiddles_re[ii] = (float)cos(a);		
		h_zerothTwiddles_im[ii] = (float)sin(a);
		//printf("a = %f, h_zerothTwiddles_re[%d] = %f, h_zerothTwiddles_im[%d] = %f\n",a,ii,h_zerothTwiddles_re[ii],ii,h_zerothTwiddles_im[ii]);
		//fflush(stdout);
	}
	
	//float chk_twiddles_re[TWIDDLES_LEN];
	//float chk_twiddles_im[TWIDDLES_LEN];
	//
	//for(int s = 0; s < LGSAMP; s++){
	//	float runVal_re = 1.0f; float temp1;
	//	float runVal_im = 0.0f; 
	//	for (int i = h_offsets[s]; i < 2 * h_offsets[s] + 1; i++)
	//	{
	//		chk_twiddles_re[i] = runVal_re;
	//		chk_twiddles_im[i] = runVal_im;
	//		temp1 = runVal_re;
	//		runVal_re = runVal_re * h_zerothTwiddles_re[s] - runVal_im * h_zerothTwiddles_im[s];
	//		runVal_im = temp1 * h_zerothTwiddles_im[s] + runVal_im * h_zerothTwiddles_re[s];
	//	}
	//}
	/********************** kernel stuff **********************/
	
	// wave data in
	printf("Allocating memory on device\n");
	fflush(stdout);
	float * d_sig_data_re; cudaMalloc(&d_sig_data_re, wave_num_pels * sizeof(*d_sig_data_re)); 
	float * d_sig_data_im; cudaMalloc(&d_sig_data_im, wave_num_pels * sizeof(*d_sig_data_im)); 
	// timefreq data out 
	//float * d_timefreq_cmp_data; cudaMalloc(&d_timefreq_cmp_data, timefreq_num_els * sizeof(*d_timefreq_cmp_data)); 
	float * d_out; cudaMalloc(&d_out, timefreq_num_els * sizeof(*d_out)); 
	
	// supporting structures
	float * d_zerothTwiddles_re; cudaMalloc(&d_zerothTwiddles_re, TWIDDLES_LEN * sizeof(*d_zerothTwiddles_re)); 
	float * d_zerothTwiddles_im; cudaMalloc(&d_zerothTwiddles_im, TWIDDLES_LEN * sizeof(*d_zerothTwiddles_im)); 
	float * d_twiddles_re; cudaMalloc(&d_twiddles_re, TWIDDLES_LEN * sizeof(*d_twiddles_re)); 
	float * d_twiddles_im; cudaMalloc(&d_twiddles_im, TWIDDLES_LEN * sizeof(*d_twiddles_im)); 
	//int * d_offsets; cudaMalloc(&d_offsets, LGSAMP * sizeof(*d_offsets));
	
	// copy to device
	printf("Copying data over to device\n");
	fflush(stdout);
	
	gpuAssert( cudaMemcpyToSymbol(offsets, h_offsets, LGSAMP * sizeof(*h_offsets), 0, cudaMemcpyHostToDevice) );
	//cudaMemcpy( d_offsets, h_offsets, LGSAMP * sizeof(*d_offsets), cudaMemcpyHostToDevice );
	gpuAssert( cudaMemcpy( d_zerothTwiddles_re, h_zerothTwiddles_re, LGSAMP * sizeof(*d_zerothTwiddles_re), cudaMemcpyHostToDevice ) );
	gpuAssert( cudaMemcpy( d_zerothTwiddles_im, h_zerothTwiddles_im, LGSAMP * sizeof(*d_zerothTwiddles_im), cudaMemcpyHostToDevice ) );
	
	gpuAssert( cudaMemcpy( d_sig_data_re, h_sig_data[0], wave_num_pels * sizeof(*d_sig_data_re), cudaMemcpyHostToDevice ) );
	gpuAssert( cudaMemcpy( d_sig_data_im, h_sig_data[1], wave_num_pels * sizeof(*d_sig_data_im), cudaMemcpyHostToDevice ) );
	gpuAssert( cudaMemcpyToSymbol(in_re, &d_sig_data_re, sizeof(float *)) );
	gpuAssert( cudaMemcpyToSymbol(in_im, &d_sig_data_im, sizeof(float *)) );
	
	// launch prep kernel
	printf("Launching kernel to calc twiddles\n");
	fflush(stdout);
	calcTwiddles<<<1,11>>>(d_twiddles_re, d_twiddles_im, d_zerothTwiddles_re, d_zerothTwiddles_im);
	cudaDeviceSynchronize();
	
	/* this copy to host then back to device may not be necessary */
	// copy twiddles back to host
	gpuAssert( cudaMemcpy(h_twiddles_re, d_twiddles_re, TWIDDLES_LEN * sizeof(*h_twiddles_re), cudaMemcpyDeviceToHost ) );
	gpuAssert( cudaMemcpy(h_twiddles_im, d_twiddles_im, TWIDDLES_LEN * sizeof(*h_twiddles_im), cudaMemcpyDeviceToHost ) );
	
	// copy twiddles back to device
	gpuAssert( cudaMemcpyToSymbol(twiddles_re, h_twiddles_re, TWIDDLES_LEN * sizeof(*d_twiddles_re), 0, cudaMemcpyHostToDevice) );
	gpuAssert( cudaMemcpyToSymbol(twiddles_im, h_twiddles_im, TWIDDLES_LEN * sizeof(*d_twiddles_im), 0, cudaMemcpyHostToDevice) );
	
	// launch core kernel
	int threadsPerBlock = HWSAMP;
	int blocksPerGrid = wave_num_pels / (2 * threadsPerBlock);
	printf("launching kernel with %d blocks and %d threads per block\n", blocksPerGrid, threadsPerBlock);
	fflush(stdout);
	
	int blockEachLaunch = 32;
	int iter = 0;
	for(; iter < blocksPerGrid/blockEachLaunch; iter++){
		core<<<blockEachLaunch, threadsPerBlock, WSAMP * PREC>>>(d_out, timefreq_num_els, iter, blockEachLaunch);
	}
	if(blocksPerGrid % blockEachLaunch > 0) core<<<blocksPerGrid % blockEachLaunch, threadsPerBlock, WSAMP * PREC>>>(d_out, timefreq_num_els, iter, blockEachLaunch);
	cudaDeviceSynchronize();
	
	/* this copy to host then back to device may not be necessary */
	//// copy results back from device
	//cudaMemcpy(h_timefreq_cmp_data, d_timefreq_cmp_data, timefreq_num_els * sizeof(*h_timefreq_cmp_data), cudaMemcpyDeviceToHost );
	//
	//// copy results back to device
	//cudaMemcpy(d_timefreq_cmp_data, h_timefreq_data, timefreq_num_els * sizeof(*d_timefreq_cmp_data), cudaMemcpyHostToDevice );
	
	// launch kernel to normalise the data
	
	iter = 0;
	for(; iter < blocksPerGrid/blockEachLaunch; iter++){
		normaliseFinal<<<blockEachLaunch, threadsPerBlock>>>(d_out, timefreq_num_els, iter, blockEachLaunch);
	}
	if(blocksPerGrid % blockEachLaunch > 0) normaliseFinal<<<blocksPerGrid % blockEachLaunch, threadsPerBlock>>>(d_out, timefreq_num_els, iter, blockEachLaunch);
	cudaDeviceSynchronize();
	
	
	// copy final results back to host
	//cudaMemcpy(h_timefreq_cmp_data, d_timefreq_cmp_data, timefreq_num_els * sizeof(*h_timefreq_cmp_data), cudaMemcpyDeviceToHost );
	gpuAssert( cudaMemcpy(out, d_out, timefreq_num_els * sizeof(*out), cudaMemcpyDeviceToHost ) );
	
	gpuAssert( cudaFree(d_out) );
	// clean up device memory
	gpuAssert( cudaFree(d_sig_data_re) );
	gpuAssert( cudaFree(d_sig_data_im) );
	gpuAssert( cudaFree(d_zerothTwiddles_re) );
	gpuAssert( cudaFree(d_zerothTwiddles_im) );
	gpuAssert( cudaFree(d_twiddles_re) );
	gpuAssert( cudaFree(d_twiddles_im) );
	
	/********************** /kernel stuff **********************/
	
	//for(int i = 0; i < timefreq_num_els; i++) printf("%f ", out[i]);
	
	//printf("Writing results to timefreq_done. int is %lu bytes.\n", sizeof(int));
	writeBinFile(timefreq_cmp, out, timefreq_num_els);
	
	free(out);
	
	free(h_timefreq_ref_data);
	free(h_timefreq_cmp_data);
	free(h_wave_data);
}

// -gencode arch=compute_50,code=sm_50

	.file	"tmpxft_00252af5_00000000-6_kernel.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2038:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2038:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"wb"
.LC2:
	.string	"writing %s is writing %d in %lu bytes\n"
	.text
	.globl	_Z12writeBinFilePKcPfm
	.type	_Z12writeBinFilePKcPfm, @function
_Z12writeBinFilePKcPfm:
.LFB2033:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movq	%rsi, %r13
	leaq	.LC1(%rip), %rsi
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rdx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	pushq	%rax
	.cfi_def_cfa_offset 48
	call	fopen@PLT
	movq	%rbp, %rcx
	movq	%r12, %rdx
	movl	$2, %edi
	movq	%rax, %rbx
	leaq	.LC2(%rip), %rsi
	xorl	%eax, %eax
	leaq	0(,%rbp,4), %r8
	call	__printf_chk@PLT
	movq	stdout(%rip), %rdi
	call	fflush@PLT
	movq	%rbp, %rdx
	movq	%rbx, %rcx
	movq	%r13, %rdi
	movl	$4, %esi
	call	fwrite@PLT
	movq	%rbx, %rdi
	call	fflush@PLT
	popq	%rdx
	.cfi_def_cfa_offset 40
	movq	%rbx, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	fclose@PLT
	.cfi_endproc
.LFE2033:
	.size	_Z12writeBinFilePKcPfm, .-_Z12writeBinFilePKcPfm
	.section	.rodata.str1.1
.LC3:
	.string	"r"
.LC4:
	.string	"file %s is %lu elements in %lu bytes\n"
	.text
	.globl	_Z11readBinFilePKcPPf
	.type	_Z11readBinFilePKcPPf, @function
_Z11readBinFilePKcPPf:
.LFB2034:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movq	%rsi, %r14
	leaq	.LC3(%rip), %rsi
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	call	fopen@PLT
	movl	$2, %edx
	xorl	%esi, %esi
	movq	%rax, %rbx
	movq	%rax, %rdi
	call	fseek@PLT
	movq	%rbx, %rdi
	call	ftell@PLT
	movq	%r12, %rdx
	movl	$2, %edi
	leaq	.LC4(%rip), %rsi
	movq	%rax, %r13
	movq	%rax, %r8
	movq	%rax, %rbp
	xorl	%eax, %eax
	shrq	$2, %r13
	movq	%r13, %rcx
	call	__printf_chk@PLT
	movq	stdout(%rip), %rdi
	call	fflush@PLT
	movq	%rbx, %rdi
	call	rewind@PLT
	movq	%rbp, %rdi
	call	malloc@PLT
	movq	%rbx, %r8
	movq	%r13, %rcx
	movq	%rbp, %rsi
	movq	%rax, (%r14)
	movl	$4, %edx
	movq	%rax, %rdi
	call	__fread_chk@PLT
	movq	%rbx, %rdi
	call	fflush@PLT
	movq	%rbx, %rdi
	call	fclose@PLT
	popq	%rbx
	.cfi_def_cfa_offset 40
	movq	%r13, %rax
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2034:
	.size	_Z11readBinFilePKcPPf, .-_Z11readBinFilePKcPPf
	.globl	_Z26__device_stub__Z4corePfiiiPfiii
	.type	_Z26__device_stub__Z4corePfiiiPfiii, @function
_Z26__device_stub__Z4corePfiiiPfiii:
.LFB2060:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movl	%esi, 20(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 16(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 12(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L6
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z4corePfiii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L6:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L8
	call	__stack_chk_fail@PLT
.L8:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2060:
	.size	_Z26__device_stub__Z4corePfiiiPfiii, .-_Z26__device_stub__Z4corePfiiiPfiii
	.globl	_Z4corePfiii
	.type	_Z4corePfiii, @function
_Z4corePfiii:
.LFB2061:
	.cfi_startproc
	endbr64
	jmp	_Z26__device_stub__Z4corePfiiiPfiii
	.cfi_endproc
.LFE2061:
	.size	_Z4corePfiii, .-_Z4corePfiii
	.globl	_Z37__device_stub__Z14normaliseFinalPfiiiPfiii
	.type	_Z37__device_stub__Z14normaliseFinalPfiiiPfiii, @function
_Z37__device_stub__Z14normaliseFinalPfiiiPfiii:
.LFB2062:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movl	%esi, 20(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 16(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 12(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L12
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z14normaliseFinalPfiii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L12:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L14
	call	__stack_chk_fail@PLT
.L14:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2062:
	.size	_Z37__device_stub__Z14normaliseFinalPfiiiPfiii, .-_Z37__device_stub__Z14normaliseFinalPfiiiPfiii
	.globl	_Z14normaliseFinalPfiii
	.type	_Z14normaliseFinalPfiii, @function
_Z14normaliseFinalPfiii:
.LFB2063:
	.cfi_startproc
	endbr64
	jmp	_Z37__device_stub__Z14normaliseFinalPfiiiPfiii
	.cfi_endproc
.LFE2063:
	.size	_Z14normaliseFinalPfiii, .-_Z14normaliseFinalPfiii
	.globl	_Z38__device_stub__Z12calcTwiddlesPfS_S_S_PfS_S_S_
	.type	_Z38__device_stub__Z12calcTwiddlesPfS_S_S_PfS_S_S_, @function
_Z38__device_stub__Z12calcTwiddlesPfS_S_S_PfS_S_S_:
.LFB2064:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L17
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z12calcTwiddlesPfS_S_S_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L17:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L19
	call	__stack_chk_fail@PLT
.L19:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2064:
	.size	_Z38__device_stub__Z12calcTwiddlesPfS_S_S_PfS_S_S_, .-_Z38__device_stub__Z12calcTwiddlesPfS_S_S_PfS_S_S_
	.globl	_Z12calcTwiddlesPfS_S_S_
	.type	_Z12calcTwiddlesPfS_S_S_, @function
_Z12calcTwiddlesPfS_S_S_:
.LFB2065:
	.cfi_startproc
	endbr64
	jmp	_Z38__device_stub__Z12calcTwiddlesPfS_S_S_PfS_S_S_
	.cfi_endproc
.LFE2065:
	.size	_Z12calcTwiddlesPfS_S_S_, .-_Z12calcTwiddlesPfS_S_S_
	.section	.rodata.str1.1
.LC6:
	.string	"hello\n"
.LC7:
	.string	"h_offsets[%d] = %d, "
.LC8:
	.string	"\n"
.LC9:
	.string	"wave_out"
.LC10:
	.string	"timefreq_out"
.LC11:
	.string	"failed to allocate out"
.LC12:
	.string	"Allocating h_timefreq_cmp_data\n"
.LC13:
	.string	"failed to allocate h_timefreq_cmp_data"
.LC16:
	.string	"wave_num_els = %d, wave_num_pels = %d\n"
.LC17:
	.string	"Allocating h_sig_data\n"
.LC18:
	.string	"Allocating h_sig_data[%d]\n"
.LC19:
	.string	"failed to allocate h_sig_data[%d]\n"
.LC20:
	.string	"failed to allocate h_sig_data\n"
.LC21:
	.string	"Casting wave to complex and padding with zeros\n"
.LC22:
	.string	"Calculating the zeroth twiddles\n"
.LC24:
	.string	"Allocating memory on device\n"
.LC25:
	.string	"Copying data over to device\n"
.LC26:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/stephen-hannam/CUDA_impl_2048pt_TukeyCooley_Iterative_FFT/master/soln_single_prec/kernel.cu"
.LC27:
	.string	"\n FAILURE %s in %s, line %d\n"
.LC28:
	.string	"Launching kernel to calc twiddles\n"
.LC29:
	.string	"launching kernel with %d blocks and %d threads per block\n"
.LC30:
	.string	"timefreq_done"
	.section	.rodata
	.align 32
.LC0:
	.long	0
	.long	1
	.long	3
	.long	7
	.long	15
	.long	31
	.long	63
	.long	127
	.long	255
	.long	511
	.long	1023
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2035:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	leaq	-16384(%rsp), %r11
	.cfi_def_cfa 11, 16440
.LPSRL0:
	subq	$4096, %rsp
	orq	$0, (%rsp)
	cmpq	%r11, %rsp
	jne	.LPSRL0
	.cfi_def_cfa_register 7
	subq	$328, %rsp
	.cfi_def_cfa_offset 16768
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	xorl	%ebx, %ebx
	leaq	.LC7(%rip), %rbp
	movq	%fs:40, %rax
	movq	%rax, 16696(%rsp)
	xorl	%eax, %eax
	leaq	188(%rsp), %r13
	call	__printf_chk@PLT
	movq	stdout(%rip), %rdi
	call	fflush@PLT
	leaq	188(%rsp), %rdi
	movl	$11, %ecx
	leaq	.LC0(%rip), %rsi
	rep movsl
.L23:
	movl	0(%r13,%rbx,4), %ecx
	movl	%ebx, %edx
	movq	%rbp, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%rbx
	call	__printf_chk@PLT
	cmpq	$11, %rbx
	jne	.L23
	leaq	.LC8(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	stdout(%rip), %rdi
	call	fflush@PLT
	leaq	88(%rsp), %rsi
	leaq	.LC9(%rip), %rdi
	call	_Z11readBinFilePKcPPf
	leaq	96(%rsp), %rsi
	leaq	.LC10(%rip), %rdi
	movq	%rax, %r12
	call	_Z11readBinFilePKcPPf
	movq	%rax, %r15
	leaq	0(,%rax,4), %rax
	movq	%rax, %rdi
	movq	%rax, 24(%rsp)
	call	malloc@PLT
	movq	%rax, 16(%rsp)
	testq	%rax, %rax
	jne	.L24
	leaq	.LC11(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
.L24:
	leaq	.LC12(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	stdout(%rip), %rdi
	call	fflush@PLT
	movq	24(%rsp), %rdi
	call	malloc@PLT
	movq	%rax, 56(%rsp)
	testq	%rax, %rax
	jne	.L25
	leaq	.LC13(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
.L25:
	testq	%r12, %r12
	js	.L26
	cvtsi2sdq	%r12, %xmm0
	jmp	.L27
.L26:
	movq	%r12, %rax
	movq	%r12, %rdx
	shrq	%rax
	andl	$1, %edx
	orq	%rdx, %rax
	cvtsi2sdq	%rax, %xmm0
	addsd	%xmm0, %xmm0
.L27:
	mulsd	.LC14(%rip), %xmm0
	call	ceil@PLT
	movsd	.LC15(%rip), %xmm1
	comisd	%xmm1, %xmm0
	jnb	.L28
	cvttsd2siq	%xmm0, %rbx
	jmp	.L29
.L28:
	subsd	%xmm1, %xmm0
	cvttsd2siq	%xmm0, %rbx
	btcq	$63, %rbx
.L29:
	movq	%rbx, %r14
	movq	%r12, %rdx
	leaq	.LC16(%rip), %rsi
	xorl	%eax, %eax
	salq	$11, %r14
	movl	$2, %edi
	movq	%r14, %rcx
	call	__printf_chk@PLT
	movq	stdout(%rip), %rdi
	call	fflush@PLT
	leaq	.LC17(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	stdout(%rip), %rdi
	call	fflush@PLT
	movl	$16, %edi
	call	malloc@PLT
	movq	%rax, %rbp
	movq	%rbx, %rax
	salq	$13, %rax
	movq	%rax, 8(%rsp)
	testq	%rbp, %rbp
	je	.L30
	xorl	%edx, %edx
	leaq	.LC18(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	8(%rsp), %rdi
	call	malloc@PLT
	movq	%rax, 0(%rbp)
	testq	%rax, %rax
	jne	.L31
	xorl	%edx, %edx
	leaq	.LC19(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
.L31:
	movl	$1, %edx
	leaq	.LC18(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	8(%rsp), %rdi
	call	malloc@PLT
	movq	%rax, 8(%rbp)
	testq	%rax, %rax
	jne	.L33
	movl	$1, %edx
	leaq	.LC19(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	jmp	.L33
.L30:
	leaq	.LC20(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L33:
	leaq	.LC21(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	stdout(%rip), %rdi
	call	fflush@PLT
	movq	88(%rsp), %rax
	movq	%rax, 48(%rsp)
	xorl	%eax, %eax
.L34:
	cmpq	%r14, %rax
	jnb	.L74
	movq	8(%rbp), %rdx
	xorps	%xmm0, %xmm0
	movl	$0x00000000, (%rdx,%rax,4)
	movq	0(%rbp), %rdx
	leaq	(%rdx,%rax,4), %rdx
	cmpq	%r12, %rax
	jnb	.L35
	movq	48(%rsp), %rcx
	movss	(%rcx,%rax,4), %xmm0
.L35:
	movss	%xmm0, (%rdx)
	incq	%rax
	jmp	.L34
.L74:
	leaq	.LC22(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	xorl	%r12d, %r12d
	call	__printf_chk@PLT
	movq	stdout(%rip), %rdi
	call	fflush@PLT
.L37:
	movl	0(%r13,%r12), %edx
	leaq	76(%rsp), %rdi
	movsd	.LC23(%rip), %xmm0
	leaq	72(%rsp), %rsi
	leaq	276(%rsp), %r14
	leal	2(%rdx,%rdx), %edx
	cvtsi2sdl	%edx, %xmm1
	divsd	%xmm1, %xmm0
	cvtsd2ss	%xmm0, %xmm0
	call	sincosf@PLT
	movss	76(%rsp), %xmm0
	movss	72(%rsp), %xmm1
	leaq	232(%rsp), %rax
	movss	%xmm1, 232(%rsp,%r12)
	movss	%xmm0, 276(%rsp,%r12)
	addq	$4, %r12
	movq	%rax, 64(%rsp)
	cmpq	$44, %r12
	jne	.L37
	leaq	.LC24(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	stdout(%rip), %rdi
	call	fflush@PLT
	leaq	104(%rsp), %rax
	movq	8(%rsp), %rsi
	movq	%rax, %rdi
	movq	%rax, 32(%rsp)
	call	cudaMalloc@PLT
	leaq	112(%rsp), %rax
	movq	8(%rsp), %rsi
	movq	%rax, %rdi
	movq	%rax, 40(%rsp)
	call	cudaMalloc@PLT
	movq	24(%rsp), %rsi
	leaq	120(%rsp), %rdi
	call	cudaMalloc@PLT
	leaq	128(%rsp), %rdi
	movl	$8188, %esi
	call	cudaMalloc@PLT
	leaq	136(%rsp), %rdi
	movl	$8188, %esi
	call	cudaMalloc@PLT
	leaq	144(%rsp), %rdi
	movl	$8188, %esi
	call	cudaMalloc@PLT
	leaq	152(%rsp), %rdi
	movl	$8188, %esi
	call	cudaMalloc@PLT
	leaq	.LC25(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	stdout(%rip), %rdi
	call	fflush@PLT
	xorl	%ecx, %ecx
	movl	$1, %r8d
	movq	%r13, %rsi
	leaq	_ZL7offsets(%rip), %rdi
	movl	$44, %edx
	call	cudaMemcpyToSymbol@PLT
	leaq	_ZL7offsets(%rip), %rdi
	testl	%eax, %eax
	je	.L38
	xorl	%ecx, %ecx
	movl	$1, %r8d
	movl	$44, %edx
	movq	%r13, %rsi
	call	cudaMemcpyToSymbol@PLT
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	movl	$389, %r9d
	movq	%rax, %rcx
	jmp	.L73
.L38:
	movq	64(%rsp), %rsi
	movl	$1, %ecx
	movl	$44, %edx
	movq	128(%rsp), %rdi
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movl	$44, %edx
	testl	%eax, %eax
	je	.L39
	movq	64(%rsp), %rsi
	movq	128(%rsp), %rdi
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	movl	$391, %r9d
	movq	%rax, %rcx
.L73:
	movq	stderr(%rip), %rdi
	leaq	.LC26(%rip), %r8
	leaq	.LC27(%rip), %rdx
	xorl	%eax, %eax
	movl	$2, %esi
	call	__fprintf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L39:
	movq	136(%rsp), %rdi
	movq	%r14, %rsi
	call	cudaMemcpy@PLT
	testl	%eax, %eax
	je	.L40
	movq	136(%rsp), %rdi
	movl	$1, %ecx
	movl	$44, %edx
	movq	%r14, %rsi
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	movl	$392, %r9d
	movq	%rax, %rcx
	jmp	.L73
.L40:
	movq	0(%rbp), %r12
	movq	8(%rsp), %rdx
	movl	$1, %ecx
	movq	104(%rsp), %rdi
	movq	%r12, %rsi
	call	cudaMemcpy@PLT
	testl	%eax, %eax
	je	.L41
	movq	8(%rsp), %rdx
	movq	104(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	movl	$394, %r9d
	movq	%rax, %rcx
	jmp	.L73
.L41:
	movq	8(%rbp), %rbp
	movq	8(%rsp), %rdx
	movl	$1, %ecx
	movq	112(%rsp), %rdi
	movq	%rbp, %rsi
	call	cudaMemcpy@PLT
	testl	%eax, %eax
	je	.L42
	movq	8(%rsp), %rdx
	movq	112(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	movl	$395, %r9d
	movq	%rax, %rcx
	jmp	.L73
.L42:
	movq	32(%rsp), %rsi
	leaq	_ZL5in_re(%rip), %rbp
	xorl	%ecx, %ecx
	movl	$8, %edx
	movl	$1, %r8d
	movq	%rbp, %rdi
	call	cudaMemcpyToSymbol@PLT
	movl	$1, %r8d
	xorl	%ecx, %ecx
	movl	$8, %edx
	testl	%eax, %eax
	je	.L43
	movq	32(%rsp), %rsi
	movq	%rbp, %rdi
	call	cudaMemcpyToSymbol@PLT
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	movl	$396, %r9d
	movq	%rax, %rcx
	jmp	.L73
.L43:
	leaq	_ZL5in_im(%rip), %rbp
	movq	40(%rsp), %rsi
	movq	%rbp, %rdi
	call	cudaMemcpyToSymbol@PLT
	testl	%eax, %eax
	je	.L44
	movq	40(%rsp), %rsi
	xorl	%ecx, %ecx
	movl	$1, %r8d
	movq	%rbp, %rdi
	movl	$8, %edx
	call	cudaMemcpyToSymbol@PLT
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	movl	$397, %r9d
	movq	%rax, %rcx
	jmp	.L73
.L44:
	leaq	.LC28(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	stdout(%rip), %rdi
	call	fflush@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movabsq	$4294967307, %rdx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movl	$1, 184(%rsp)
	movq	%rdx, 176(%rsp)
	movq	%rdi, 164(%rsp)
	movl	$1, 172(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L45
	movq	136(%rsp), %rcx
	movq	128(%rsp), %rdx
	movq	152(%rsp), %rsi
	movq	144(%rsp), %rdi
	call	_Z38__device_stub__Z12calcTwiddlesPfS_S_S_PfS_S_S_
.L45:
	call	cudaDeviceSynchronize@PLT
	movl	$2, %ecx
	movl	$8188, %edx
	leaq	320(%rsp), %r12
	movq	144(%rsp), %rsi
	movq	%r12, %rdi
	call	cudaMemcpy@PLT
	testl	%eax, %eax
	je	.L46
	movq	144(%rsp), %rsi
	movl	$2, %ecx
	movl	$8188, %edx
	movq	%r12, %rdi
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	movl	$407, %r9d
	movq	%rax, %rcx
	jmp	.L73
.L46:
	leaq	8508(%rsp), %rbp
	movl	$2, %ecx
	movl	$8188, %edx
	movq	152(%rsp), %rsi
	movq	%rbp, %rdi
	call	cudaMemcpy@PLT
	testl	%eax, %eax
	je	.L47
	movq	152(%rsp), %rsi
	movl	$2, %ecx
	movl	$8188, %edx
	movq	%rbp, %rdi
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	movl	$408, %r9d
	movq	%rax, %rcx
	jmp	.L73
.L47:
	movl	$1, %r8d
	xorl	%ecx, %ecx
	movl	$8188, %edx
	movq	%r12, %rsi
	leaq	_ZL11twiddles_re(%rip), %r13
	movq	%r13, %rdi
	call	cudaMemcpyToSymbol@PLT
	movl	$1, %r8d
	xorl	%ecx, %ecx
	movl	$8188, %edx
	testl	%eax, %eax
	je	.L48
	movq	%r12, %rsi
	movq	%r13, %rdi
	call	cudaMemcpyToSymbol@PLT
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	movl	$411, %r9d
	movq	%rax, %rcx
	jmp	.L73
.L48:
	leaq	_ZL11twiddles_im(%rip), %r12
	movq	%rbp, %rsi
	movq	%r12, %rdi
	call	cudaMemcpyToSymbol@PLT
	testl	%eax, %eax
	je	.L49
	xorl	%ecx, %ecx
	movl	$1, %r8d
	movl	$8188, %edx
	movq	%rbp, %rsi
	movq	%r12, %rdi
	call	cudaMemcpyToSymbol@PLT
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	movl	$412, %r9d
	movq	%rax, %rcx
	jmp	.L73
.L49:
	movl	$1024, %ecx
	movl	%ebx, %edx
	leaq	.LC29(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	xorl	%ebp, %ebp
	movabsq	$4294968320, %r12
	call	__printf_chk@PLT
	movq	stdout(%rip), %rdi
	call	fflush@PLT
	movl	%ebx, %eax
	movl	$32, %ecx
	cltd
	idivl	%ecx
	movl	%eax, %r13d
.L50:
	cmpl	%ebp, %r13d
	jle	.L75
	movl	$134217729, %edi
	xorl	%r9d, %r9d
	movq	%r12, %rdx
	movl	$1, %ecx
	salq	$5, %rdi
	movl	$16384, %r8d
	movl	$1, %esi
	movq	%r12, 176(%rsp)
	movl	$1, 184(%rsp)
	movq	%rdi, 164(%rsp)
	movl	$1, 172(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L51
	movq	120(%rsp), %rdi
	movl	$32, %ecx
	movl	%ebp, %edx
	movl	%r15d, %esi
	call	_Z26__device_stub__Z4corePfiiiPfiii
.L51:
	incl	%ebp
	jmp	.L50
.L75:
	xorl	%ebp, %ebp
	movl	%ebx, %eax
	testl	%r13d, %r13d
	movl	$32, %ecx
	cmovns	%r13d, %ebp
	cltd
	idivl	%ecx
	movl	%edx, %r12d
	testl	%edx, %edx
	jle	.L53
	movl	%r12d, 164(%rsp)
	movl	$4194305, %edx
	xorl	%r9d, %r9d
	movl	$1, %ecx
	movabsq	$4294967297, %rax
	salq	$10, %rdx
	movl	$16384, %r8d
	movl	$1, 184(%rsp)
	movq	%rax, 168(%rsp)
	movq	164(%rsp), %rdi
	movl	172(%rsp), %esi
	movq	%rdx, 176(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L53
	movq	120(%rsp), %rdi
	movl	$32, %ecx
	movl	%ebp, %edx
	movl	%r15d, %esi
	call	_Z26__device_stub__Z4corePfiiiPfiii
.L53:
	call	cudaDeviceSynchronize@PLT
	xorl	%ebx, %ebx
	movabsq	$4294968320, %r14
.L55:
	cmpl	%ebx, %r13d
	jle	.L76
	movl	$134217729, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r14, %rdx
	salq	$5, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movq	%r14, 176(%rsp)
	movl	$1, 184(%rsp)
	movq	%rdi, 164(%rsp)
	movl	$1, 172(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L56
	movq	120(%rsp), %rdi
	movl	$32, %ecx
	movl	%ebx, %edx
	movl	%r15d, %esi
	call	_Z37__device_stub__Z14normaliseFinalPfiiiPfiii
.L56:
	incl	%ebx
	jmp	.L55
.L76:
	testl	%r12d, %r12d
	jle	.L58
	movl	$4194305, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movabsq	$4294967297, %rax
	salq	$10, %rdx
	movl	%r12d, 164(%rsp)
	movq	%rax, 168(%rsp)
	movq	164(%rsp), %rdi
	movl	172(%rsp), %esi
	movq	%rdx, 176(%rsp)
	movl	$1, 184(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L58
	movq	120(%rsp), %rdi
	movl	$32, %ecx
	movl	%ebp, %edx
	movl	%r15d, %esi
	call	_Z37__device_stub__Z14normaliseFinalPfiiiPfiii
.L58:
	call	cudaDeviceSynchronize@PLT
	movq	120(%rsp), %rsi
	movq	24(%rsp), %rdx
	movl	$2, %ecx
	movq	16(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	120(%rsp), %rsi
	testl	%eax, %eax
	je	.L60
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	movl	$447, %r9d
	movq	%rax, %rcx
	jmp	.L73
.L60:
	movq	%rsi, %rdi
	call	cudaFree@PLT
	testl	%eax, %eax
	je	.L61
	movq	120(%rsp), %rdi
	call	cudaFree@PLT
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	movl	$449, %r9d
	movq	%rax, %rcx
	jmp	.L73
.L61:
	movq	104(%rsp), %rdi
	call	cudaFree@PLT
	testl	%eax, %eax
	je	.L62
	movq	104(%rsp), %rdi
	call	cudaFree@PLT
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	movl	$451, %r9d
	movq	%rax, %rcx
	jmp	.L73
.L62:
	movq	112(%rsp), %rdi
	call	cudaFree@PLT
	testl	%eax, %eax
	je	.L63
	movq	112(%rsp), %rdi
	call	cudaFree@PLT
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	movl	$452, %r9d
	movq	%rax, %rcx
	jmp	.L73
.L63:
	movq	128(%rsp), %rdi
	call	cudaFree@PLT
	testl	%eax, %eax
	je	.L64
	movq	128(%rsp), %rdi
	call	cudaFree@PLT
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	movl	$453, %r9d
	movq	%rax, %rcx
	jmp	.L73
.L64:
	movq	136(%rsp), %rdi
	call	cudaFree@PLT
	testl	%eax, %eax
	je	.L65
	movq	136(%rsp), %rdi
	call	cudaFree@PLT
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	movl	$454, %r9d
	movq	%rax, %rcx
	jmp	.L73
.L65:
	movq	144(%rsp), %rdi
	call	cudaFree@PLT
	testl	%eax, %eax
	je	.L66
	movq	144(%rsp), %rdi
	call	cudaFree@PLT
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	movl	$455, %r9d
	movq	%rax, %rcx
	jmp	.L73
.L66:
	movq	152(%rsp), %rdi
	call	cudaFree@PLT
	testl	%eax, %eax
	je	.L67
	movq	152(%rsp), %rdi
	call	cudaFree@PLT
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	movl	$456, %r9d
	movq	%rax, %rcx
	jmp	.L73
.L67:
	movq	16(%rsp), %rsi
	movq	%r15, %rdx
	leaq	.LC30(%rip), %rdi
	call	_Z12writeBinFilePKcPfm
	movq	16(%rsp), %rdi
	call	free@PLT
	movq	96(%rsp), %rdi
	call	free@PLT
	movq	56(%rsp), %rdi
	call	free@PLT
	movq	48(%rsp), %rdi
	call	free@PLT
	movq	16696(%rsp), %rax
	subq	%fs:40, %rax
	je	.L68
	call	__stack_chk_fail@PLT
.L68:
	addq	$16712, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2035:
	.size	main, .-main
	.section	.rodata.str1.1
.LC32:
	.string	"_Z12calcTwiddlesPfS_S_S_"
.LC33:
	.string	"_Z14normaliseFinalPfiii"
.LC34:
	.string	"_Z4corePfiii"
.LC35:
	.string	"offsets"
.LC36:
	.string	"twiddles_re"
.LC37:
	.string	"twiddles_im"
.LC38:
	.string	"in_re"
.LC39:
	.string	"in_im"
.LC40:
	.string	"maxFFT"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2067:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC32(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z12calcTwiddlesPfS_S_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC33(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z14normaliseFinalPfiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC34(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z4corePfiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC35(%rip), %rdx
	movl	$44, %r9d
	leaq	_ZL7offsets(%rip), %rsi
	pushq	$1
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC36(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$8188, %r9d
	leaq	_ZL11twiddles_re(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	.LC37(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$8188, %r9d
	leaq	_ZL11twiddles_im(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC38(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$8, %r9d
	leaq	_ZL5in_re(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC39(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$8, %r9d
	leaq	_ZL5in_im(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC40(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$4, %r9d
	leaq	_ZL6maxFFT(%rip), %rsi
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2067:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZL6maxFFT
	.comm	_ZL6maxFFT,4,4
	.local	_ZL5in_im
	.comm	_ZL5in_im,8,8
	.local	_ZL5in_re
	.comm	_ZL5in_re,8,8
	.local	_ZL11twiddles_im
	.comm	_ZL11twiddles_im,8188,32
	.local	_ZL11twiddles_re
	.comm	_ZL11twiddles_re,8188,32
	.local	_ZL7offsets
	.comm	_ZL7offsets,44,32
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC14:
	.long	0
	.long	1061158912
	.align 8
.LC15:
	.long	0
	.long	1138753536
	.align 8
.LC23:
	.long	1610612736
	.long	-1072094725
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <math.h>

#ifndef gpuAssert
#define gpuAssert( condition ) { if( (condition) != hipSuccess ) { fprintf( stderr, "\n FAILURE %s in %s, line %d\n", hipGetErrorString(condition), __FILE__, __LINE__ ); exit( 1 ); } }
#endif

#define PREC 8

// I've used a snippet of someone elses code, and one condition of use is
// to retain this licensing message
// I obtained the code from: 
// https://github.com/parallel-forall/code-samples/blob/master/posts/cuda-aware-mpi-example/src/Device.cu

/* Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*  * Redistributions of source code must retain the above copyright
*    notice, this list of conditions and the following disclaimer.
*  * Redistributions in binary form must reproduce the above copyright
*    notice, this list of conditions and the following disclaimer in the
*    documentation and/or other materials provided with the distribution.
*  * Neither the name of NVIDIA CORPORATION nor the names of its
*    contributors may be used to endorse or promote products derived
*    from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ``AS IS'' AND ANY
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
* OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/

/******************************************************************/
/* borrowed just one function for AtomicMax on floats from github */
	 
/**
* @brief Compute the maximum of 2 single-precision floating point values using an atomic operation
*
* @param[in]	address	The address of the reference value which might get updated with the maximum
* @param[in]	value	The value that is compared to the reference in order to determine the maximum
*/
static __device__ void AtomicMax(float * const address, float value)
{
	if (*address >= value)
	{
		return;
	}

	int * const address_as_i = (int *)address;
	int old = *address_as_i, assumed;

	do
	{
		assumed = old;
		if (__int_as_float(assumed) >= value)
		{
			break;
		}

		old = atomicCAS(address_as_i, assumed, __float_as_int(value));
	} while (assumed != old);
}
/******************************************************************/

// don't actually need this, as you can & with offsets instead
//#define B01_MASK 0b0000000000000001 
//#define B02_MASK 0b0000000000000011
//#define B03_MASK 0b0000000000000111
//#define B04_MASK 0b0000000000001111
//#define B05_MASK 0b0000000000011111
//#define B06_MASK 0b0000000000111111
//#define B07_MASK 0b0000000001111111
//#define B08_MASK 0b0000000011111111
//#define B09_MASK 0b0000000111111111
//#define B10_MASK 0b0000001111111111

// * bitwise div of power 2 num (i\n): i >> log2(n)
// * bitwise modulo of power of 2 num(i % n) : i & (n - 1)

// much of the efficiency of this implementation hinges of being able to apply 
// very fast bitwise manipulations which will only be reliable in cases where
// the fundamental dimensionality of the data is strictly by powers of 2
// happily this is the case in this application, and for fft in general

// more specifically, exploiting the luxury of powers of 2 enables the construction
// of blocks that should be (theoretically) entirely divergence free, which also means
// that the __syncthreads statements, though necessary to ensure correctness, are in practice
// often a "formality", as all warps should be finishing at the same time, provided all
// memory accesses to shared and constant memory can be performed in the same number of 
// clock cycles, this is also one of the reasons behind using constant and shared memory.

// though this implementation fixes on 2048 point fft, it could easily be generalised
// to any 2^s point fft needed. There is a happy coincidence, where my particular GPU
// is limited to 1024 threads per block, and a 2048 point iterative fft unrolls its
// two inner loops to 1024 every time. This is optimal, but only by coincidence. Were
// this happy coincidence not to be relied upon, then further optimisations which take
// intra-block synchronisation, and possibly where warp boundaries will cross, might need 
// to be included.

// precision: it must also be mentioned that a loss of precision is being spent on performance
// Nvidia GPUs with Compute Cabaility 5.0 can only assure atomic arithmetic for single precision
// floats, and the registers available to the threads are also 32 bit registers. For this reason,
// the decision was made to reduce the precision from double to single

#define TWIDDLES_LEN 2047
#define LGSAMP 11
#define WSAMP 2048
#define HWSAMP (WSAMP / 2)
#define IDX_SHIFT (32 - LGSAMP)

//typedef float3 Complex; // padding to avoid bank conflicts - might not be needed in CUDA 9.0
typedef float2 Complex;
static __device__  inline Complex ComplexCast(float a, float b);
static __device__  inline Complex ComplexAdd(Complex a, Complex b);
static __device__  inline Complex ComplexSub(Complex a, Complex b);
static __device__  inline Complex ComplexMul(Complex a, Complex b);
static __device__ inline float ComplexNorm(Complex a);

static __device__  inline Complex ComplexCast(float a, float b)
{
	Complex c;
	c.x = a; c.y = b; 
	//c.z = 0;
	return c;
}

// Complex addition
static __device__ inline Complex ComplexAdd(Complex a, Complex b)
{
	Complex c;
	c.x = a.x + b.x;
	c.y = a.y + b.y;
	//c.z = 0; // padding to avoid bank conflicts - might not be needed in CUDA 9.0
	return c;
}

// Complex subtraction
static __device__ inline Complex ComplexSub(Complex a, Complex b)
{
	Complex c;
	c.x = a.x - b.x;
	c.y = a.y - b.y;
	//c.z = 0; // padding to avoid bank conflicts - might not be needed in CUDA 9.0
	return c;
}

// Complex multiplication
static __device__ inline Complex ComplexMul(Complex a, Complex b)
{
	Complex c;
	c.x = a.x * b.x - a.y * b.y;
	c.y = a.x * b.y + a.y * b.x;
	//c.z = 0; // padding to avoid bank conflicts - might not be needed in CUDA 9.0
	return c;
}

// Fast calc of Norm of a Complex Number
static __device__ inline float ComplexNorm(Complex a) { return sqrt(a.x*a.x + a.y*a.y); }

__device__ __constant__ int offsets[LGSAMP];
__device__ __constant__ float twiddles_re[TWIDDLES_LEN];
__device__ __constant__ float twiddles_im[TWIDDLES_LEN];

__device__ float * in_re;
__device__ float * in_im;

static __device__ float maxFFT = 0;

// would be really good to use this with Pinned Memory
__global__ void core(float * out, int size, int gridNum, int gridWidth)
{
	extern __shared__ Complex signalChunk[]; // twice the size of 1024 threads in block

	int tidx0, tidx1, rtidx0, rtidx1, stridx0, stridx1, idx_twid; 
	Complex radius;
	int start = (gridNum * gridWidth + blockIdx.x) * blockDim.x; // start of the block, threadIdx.x == 0
	
	tidx0 = threadIdx.x; 
	tidx1 = threadIdx.x + HWSAMP;
	rtidx0 = __brev(tidx0) >> IDX_SHIFT; 
	rtidx1 = __brev(tidx1) >> IDX_SHIFT;
	stridx0 = rtidx0 + start; 
	stridx1 = rtidx1 + start;
	
	if(tidx0 + start < size){
					
		// permutation by bit reversal of array indices as 11 bit numbers, requires 32-11 bit shift
		signalChunk[tidx0] = ComplexCast(in_re[stridx0], in_im[stridx0]);
		signalChunk[tidx1] = ComplexCast(in_re[stridx1], in_im[stridx1]);
		__syncthreads();
		
		for (unsigned int s = 0; s < LGSAMP; s++) // 11 values of s as per iterative algorithm for fft (2048 point)
		{
			tidx0 = threadIdx.x + (threadIdx.x & (~offsets[s]));
			tidx1 = tidx0 + offsets[s] + 1;
			idx_twid = offsets[s] + (threadIdx.x & offsets[s]);
			
			radius = ComplexMul(signalChunk[tidx1], ComplexCast(twiddles_re[idx_twid], twiddles_im[idx_twid])); // A[j + k + m/2]*w
			signalChunk[tidx0] = ComplexAdd(signalChunk[tidx0], radius); // A[j + k]       = A[j + k] + A[j + k + m/2]*w
			signalChunk[tidx1] = ComplexSub(signalChunk[tidx0], radius); // A[j + k + m/2] = A[j + k] - A[j + k + m/2]*w
			__syncthreads();
		}
		tidx0 = threadIdx.x; 
		out[tidx0 + start] = ComplexNorm(signalChunk[tidx0]);
		
		// eval for maxFFT, use AtomicMax() here
		AtomicMax(&maxFFT, out[tidx0 + start]);
	}
}
// use kernel termination as sync point to launch this next kernel named normaliseFinal
__global__ void normaliseFinal(float * out, int size, int gridNum, int gridWidth)
{

	int tidx =  (gridNum * gridWidth + blockIdx.x) * blockDim.x + threadIdx.x;
	if(tidx < size){
		out[tidx] = out[tidx] / maxFFT;
	}
}

// would be really good to use this with Pinned Memory
// since CPU will be busy reading in wavefile while this is happening
// this doesn't need to be all that optimised, it could even be as sequential
// as the CPU version
// NOTE: this should be 1 block, 11 threads
__global__ void calcTwiddles(float * out_re, float * out_im, float * zerothTwiddles_re, float * zerothTwiddles_im)
{
	int tid = threadIdx.x;
	Complex runVal; runVal.x = 1; runVal.y = 0; //runVal.z = 0;
	
	for (int i = offsets[tid]; i < 2 * offsets[tid] + 1; i++)
	{
		out_re[i] = runVal.x;
		out_im[i] = runVal.y;
		runVal = ComplexMul(runVal, ComplexCast(zerothTwiddles_re[tid], zerothTwiddles_im[tid]));
	}
}

void writeBinFile(const char * file_name, float * bin_data, size_t nmemb){
	FILE * fp = fopen(file_name, "wb");
	printf("writing %s is writing %d in %lu bytes\n",file_name, nmemb, sizeof(float) * nmemb);
	fflush(stdout);
	fwrite(bin_data, sizeof(float), nmemb, fp);
	fflush(fp);
	fclose(fp);
	
}

size_t readBinFile(const char * file_name, float ** bin_data){
	FILE * fp = fopen(file_name,"r");
	fseek(fp, 0, SEEK_END);
	size_t sz = ftell(fp);
	size_t nmemb = sz/sizeof(**bin_data);
	printf("file %s is %lu elements in %lu bytes\n", file_name, nmemb, sz);
	fflush(stdout);
	rewind(fp);
	*bin_data = (float*)malloc(sz);
	fread(*bin_data, sizeof(float), nmemb, fp);
	fflush(fp);
	fclose(fp);
	return nmemb;
}

int main(int argc, char ** argv){
	printf("hello\n");
	fflush(stdout);
	const float pi = 3.1415927410;
	const char * wave_bin = "wave_out";
	const char * timefreq_ref = "timefreq_out";
	const char * timefreq_cmp = "timefreq_done";
	const int h_offsets[LGSAMP] = {0,1,3,7,15,31,63,127,255,511,1023};
	
	for(int i = 0; i < LGSAMP; i++) printf("h_offsets[%d] = %d, ", i, h_offsets[i]);
	printf("\n");
	fflush(stdout);
	
	float h_zerothTwiddles_re[LGSAMP];
	float h_zerothTwiddles_im[LGSAMP];
	
	float h_twiddles_re[TWIDDLES_LEN];
	float h_twiddles_im[TWIDDLES_LEN];
	
	float a;
	float * h_wave_data;
	float * h_timefreq_ref_data;
	
	size_t wave_num_els = readBinFile(wave_bin, &h_wave_data);
	
	size_t timefreq_num_els = readBinFile(timefreq_ref, &h_timefreq_ref_data);
	
	// testing bit reversal
	float * out; 
	if((out = (float*)malloc(timefreq_num_els * sizeof(*out))) == NULL)
		printf("failed to allocate out");
	
	float * h_timefreq_cmp_data;
	printf("Allocating h_timefreq_cmp_data\n");
	fflush(stdout);
	if((h_timefreq_cmp_data = (float*)malloc(timefreq_num_els * sizeof(*h_timefreq_cmp_data))) == NULL)
		printf("failed to allocate h_timefreq_cmp_data");
	
	size_t wave_num_pels = ((size_t)ceil((double)wave_num_els / (double)WSAMP)) * WSAMP;
	printf("wave_num_els = %d, wave_num_pels = %d\n", wave_num_els, wave_num_pels);
	fflush(stdout);
	
	float ** h_sig_data;
	printf("Allocating h_sig_data\n");
	fflush(stdout);
	if(h_sig_data = (float**)malloc(2 * sizeof(*h_sig_data))){
		for(int i = 0; i < 2; i++){ 
			printf("Allocating h_sig_data[%d]\n", i);
			if((h_sig_data[i] = (float*)malloc(wave_num_pels * sizeof(**h_sig_data))) == NULL)
				printf("failed to allocate h_sig_data[%d]\n", i);
		}
	}
	else printf("failed to allocate h_sig_data\n");
	
	// cast wave data to complex and add padding
	printf("Casting wave to complex and padding with zeros\n");
	fflush(stdout);
	for(int i = 0; i < wave_num_pels; i++)
	{
		h_sig_data[1][i] = 0;
		if(i < wave_num_els){
			h_sig_data[0][i] = h_wave_data[i];
		}
		else h_sig_data[0][i] = 0;
	}
	
	// calc zerothTwiddles
	printf("Calculating the zeroth twiddles\n");
	fflush(stdout);
	for (int ii = 0; ii < LGSAMP; ii++)
	{
		a = -2 * pi / ((double)(2*(h_offsets[ii] + 1)));
		//printf("2 * pi * ii = %f, (float)h_offsets[ii] + 1 = %f\n", 2 * pi * ii, (float)h_offsets[ii] + 1);
		//fflush(stdout);
		h_zerothTwiddles_re[ii] = (float)cos(a);		
		h_zerothTwiddles_im[ii] = (float)sin(a);
		//printf("a = %f, h_zerothTwiddles_re[%d] = %f, h_zerothTwiddles_im[%d] = %f\n",a,ii,h_zerothTwiddles_re[ii],ii,h_zerothTwiddles_im[ii]);
		//fflush(stdout);
	}
	
	//float chk_twiddles_re[TWIDDLES_LEN];
	//float chk_twiddles_im[TWIDDLES_LEN];
	//
	//for(int s = 0; s < LGSAMP; s++){
	//	float runVal_re = 1.0f; float temp1;
	//	float runVal_im = 0.0f; 
	//	for (int i = h_offsets[s]; i < 2 * h_offsets[s] + 1; i++)
	//	{
	//		chk_twiddles_re[i] = runVal_re;
	//		chk_twiddles_im[i] = runVal_im;
	//		temp1 = runVal_re;
	//		runVal_re = runVal_re * h_zerothTwiddles_re[s] - runVal_im * h_zerothTwiddles_im[s];
	//		runVal_im = temp1 * h_zerothTwiddles_im[s] + runVal_im * h_zerothTwiddles_re[s];
	//	}
	//}
	/********************** kernel stuff **********************/
	
	// wave data in
	printf("Allocating memory on device\n");
	fflush(stdout);
	float * d_sig_data_re; hipMalloc(&d_sig_data_re, wave_num_pels * sizeof(*d_sig_data_re)); 
	float * d_sig_data_im; hipMalloc(&d_sig_data_im, wave_num_pels * sizeof(*d_sig_data_im)); 
	// timefreq data out 
	//float * d_timefreq_cmp_data; cudaMalloc(&d_timefreq_cmp_data, timefreq_num_els * sizeof(*d_timefreq_cmp_data)); 
	float * d_out; hipMalloc(&d_out, timefreq_num_els * sizeof(*d_out)); 
	
	// supporting structures
	float * d_zerothTwiddles_re; hipMalloc(&d_zerothTwiddles_re, TWIDDLES_LEN * sizeof(*d_zerothTwiddles_re)); 
	float * d_zerothTwiddles_im; hipMalloc(&d_zerothTwiddles_im, TWIDDLES_LEN * sizeof(*d_zerothTwiddles_im)); 
	float * d_twiddles_re; hipMalloc(&d_twiddles_re, TWIDDLES_LEN * sizeof(*d_twiddles_re)); 
	float * d_twiddles_im; hipMalloc(&d_twiddles_im, TWIDDLES_LEN * sizeof(*d_twiddles_im)); 
	//int * d_offsets; cudaMalloc(&d_offsets, LGSAMP * sizeof(*d_offsets));
	
	// copy to device
	printf("Copying data over to device\n");
	fflush(stdout);
	
	gpuAssert( hipMemcpyToSymbol(HIP_SYMBOL(offsets), h_offsets, LGSAMP * sizeof(*h_offsets), 0, hipMemcpyHostToDevice) );
	//cudaMemcpy( d_offsets, h_offsets, LGSAMP * sizeof(*d_offsets), cudaMemcpyHostToDevice );
	gpuAssert( hipMemcpy( d_zerothTwiddles_re, h_zerothTwiddles_re, LGSAMP * sizeof(*d_zerothTwiddles_re), hipMemcpyHostToDevice ) );
	gpuAssert( hipMemcpy( d_zerothTwiddles_im, h_zerothTwiddles_im, LGSAMP * sizeof(*d_zerothTwiddles_im), hipMemcpyHostToDevice ) );
	
	gpuAssert( hipMemcpy( d_sig_data_re, h_sig_data[0], wave_num_pels * sizeof(*d_sig_data_re), hipMemcpyHostToDevice ) );
	gpuAssert( hipMemcpy( d_sig_data_im, h_sig_data[1], wave_num_pels * sizeof(*d_sig_data_im), hipMemcpyHostToDevice ) );
	gpuAssert( hipMemcpyToSymbol(HIP_SYMBOL(in_re), &d_sig_data_re, sizeof(float *)) );
	gpuAssert( hipMemcpyToSymbol(HIP_SYMBOL(in_im), &d_sig_data_im, sizeof(float *)) );
	
	// launch prep kernel
	printf("Launching kernel to calc twiddles\n");
	fflush(stdout);
	calcTwiddles<<<1,11>>>(d_twiddles_re, d_twiddles_im, d_zerothTwiddles_re, d_zerothTwiddles_im);
	hipDeviceSynchronize();
	
	/* this copy to host then back to device may not be necessary */
	// copy twiddles back to host
	gpuAssert( hipMemcpy(h_twiddles_re, d_twiddles_re, TWIDDLES_LEN * sizeof(*h_twiddles_re), hipMemcpyDeviceToHost ) );
	gpuAssert( hipMemcpy(h_twiddles_im, d_twiddles_im, TWIDDLES_LEN * sizeof(*h_twiddles_im), hipMemcpyDeviceToHost ) );
	
	// copy twiddles back to device
	gpuAssert( hipMemcpyToSymbol(HIP_SYMBOL(twiddles_re), h_twiddles_re, TWIDDLES_LEN * sizeof(*d_twiddles_re), 0, hipMemcpyHostToDevice) );
	gpuAssert( hipMemcpyToSymbol(HIP_SYMBOL(twiddles_im), h_twiddles_im, TWIDDLES_LEN * sizeof(*d_twiddles_im), 0, hipMemcpyHostToDevice) );
	
	// launch core kernel
	int threadsPerBlock = HWSAMP;
	int blocksPerGrid = wave_num_pels / (2 * threadsPerBlock);
	printf("launching kernel with %d blocks and %d threads per block\n", blocksPerGrid, threadsPerBlock);
	fflush(stdout);
	
	int blockEachLaunch = 32;
	int iter = 0;
	for(; iter < blocksPerGrid/blockEachLaunch; iter++){
		core<<<blockEachLaunch, threadsPerBlock, WSAMP * PREC>>>(d_out, timefreq_num_els, iter, blockEachLaunch);
	}
	if(blocksPerGrid % blockEachLaunch > 0) core<<<blocksPerGrid % blockEachLaunch, threadsPerBlock, WSAMP * PREC>>>(d_out, timefreq_num_els, iter, blockEachLaunch);
	hipDeviceSynchronize();
	
	/* this copy to host then back to device may not be necessary */
	//// copy results back from device
	//cudaMemcpy(h_timefreq_cmp_data, d_timefreq_cmp_data, timefreq_num_els * sizeof(*h_timefreq_cmp_data), cudaMemcpyDeviceToHost );
	//
	//// copy results back to device
	//cudaMemcpy(d_timefreq_cmp_data, h_timefreq_data, timefreq_num_els * sizeof(*d_timefreq_cmp_data), cudaMemcpyHostToDevice );
	
	// launch kernel to normalise the data
	
	iter = 0;
	for(; iter < blocksPerGrid/blockEachLaunch; iter++){
		normaliseFinal<<<blockEachLaunch, threadsPerBlock>>>(d_out, timefreq_num_els, iter, blockEachLaunch);
	}
	if(blocksPerGrid % blockEachLaunch > 0) normaliseFinal<<<blocksPerGrid % blockEachLaunch, threadsPerBlock>>>(d_out, timefreq_num_els, iter, blockEachLaunch);
	hipDeviceSynchronize();
	
	
	// copy final results back to host
	//cudaMemcpy(h_timefreq_cmp_data, d_timefreq_cmp_data, timefreq_num_els * sizeof(*h_timefreq_cmp_data), cudaMemcpyDeviceToHost );
	gpuAssert( hipMemcpy(out, d_out, timefreq_num_els * sizeof(*out), hipMemcpyDeviceToHost ) );
	
	gpuAssert( hipFree(d_out) );
	// clean up device memory
	gpuAssert( hipFree(d_sig_data_re) );
	gpuAssert( hipFree(d_sig_data_im) );
	gpuAssert( hipFree(d_zerothTwiddles_re) );
	gpuAssert( hipFree(d_zerothTwiddles_im) );
	gpuAssert( hipFree(d_twiddles_re) );
	gpuAssert( hipFree(d_twiddles_im) );
	
	/********************** /kernel stuff **********************/
	
	//for(int i = 0; i < timefreq_num_els; i++) printf("%f ", out[i]);
	
	//printf("Writing results to timefreq_done. int is %lu bytes.\n", sizeof(int));
	writeBinFile(timefreq_cmp, out, timefreq_num_els);
	
	free(out);
	
	free(h_timefreq_ref_data);
	free(h_timefreq_cmp_data);
	free(h_wave_data);
}

// -gencode arch=compute_50,code=sm_50

	.text
	.file	"kernel.hip"
	.globl	_Z19__device_stub__corePfiii    # -- Begin function _Z19__device_stub__corePfiii
	.type	_Z19__device_stub__corePfiii,@function
_Z19__device_stub__corePfiii:           # @_Z19__device_stub__corePfiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	20(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	16(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	12(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z4corePfiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z19__device_stub__corePfiii, .Lfunc_end0-_Z19__device_stub__corePfiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z29__device_stub__normaliseFinalPfiii # -- Begin function _Z29__device_stub__normaliseFinalPfiii
	.type	_Z29__device_stub__normaliseFinalPfiii,@function
_Z29__device_stub__normaliseFinalPfiii: # @_Z29__device_stub__normaliseFinalPfiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	20(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	16(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	12(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14normaliseFinalPfiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z29__device_stub__normaliseFinalPfiii, .Lfunc_end1-_Z29__device_stub__normaliseFinalPfiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__calcTwiddlesPfS_S_S_ # -- Begin function _Z27__device_stub__calcTwiddlesPfS_S_S_
	.type	_Z27__device_stub__calcTwiddlesPfS_S_S_,@function
_Z27__device_stub__calcTwiddlesPfS_S_S_: # @_Z27__device_stub__calcTwiddlesPfS_S_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	16(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12calcTwiddlesPfS_S_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z27__device_stub__calcTwiddlesPfS_S_S_, .Lfunc_end2-_Z27__device_stub__calcTwiddlesPfS_S_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z12writeBinFilePKcPfm          # -- Begin function _Z12writeBinFilePKcPfm
	.type	_Z12writeBinFilePKcPfm,@function
_Z12writeBinFilePKcPfm:                 # @_Z12writeBinFilePKcPfm
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdx, %rbx
	movq	%rsi, %r14
	movq	%rdi, %r15
	movl	$.L.str, %esi
	callq	fopen
	movq	%rax, %r12
	leaq	(,%rbx,4), %rcx
	movl	$.L.str.1, %edi
	movq	%r15, %rsi
	movq	%rbx, %rdx
	xorl	%eax, %eax
	callq	printf
	movq	stdout(%rip), %rdi
	callq	fflush
	movl	$4, %esi
	movq	%r14, %rdi
	movq	%rbx, %rdx
	movq	%r12, %rcx
	callq	fwrite
	movq	%r12, %rdi
	callq	fflush
	movq	%r12, %rdi
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	fclose                          # TAILCALL
.Lfunc_end3:
	.size	_Z12writeBinFilePKcPfm, .Lfunc_end3-_Z12writeBinFilePKcPfm
	.cfi_endproc
                                        # -- End function
	.globl	_Z11readBinFilePKcPPf           # -- Begin function _Z11readBinFilePKcPPf
	.type	_Z11readBinFilePKcPPf,@function
_Z11readBinFilePKcPPf:                  # @_Z11readBinFilePKcPPf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rsi, %r14
	movq	%rdi, %r12
	movl	$.L.str.2, %esi
	callq	fopen
	movq	%rax, %rbx
	movq	%rax, %rdi
	xorl	%esi, %esi
	movl	$2, %edx
	callq	fseek
	movq	%rbx, %rdi
	callq	ftell
	movq	%rax, %r13
	movq	%rax, %r15
	shrq	$2, %r15
	movl	$.L.str.3, %edi
	movq	%r12, %rsi
	movq	%r15, %rdx
	movq	%rax, %rcx
	xorl	%eax, %eax
	callq	printf
	movq	stdout(%rip), %rdi
	callq	fflush
	movq	%rbx, %rdi
	callq	rewind
	movq	%r13, %rdi
	callq	malloc
	movq	%rax, (%r14)
	movl	$4, %esi
	movq	%rax, %rdi
	movq	%r15, %rdx
	movq	%rbx, %rcx
	callq	fread
	movq	%rbx, %rdi
	callq	fflush
	movq	%rbx, %rdi
	callq	fclose
	movq	%r15, %rax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z11readBinFilePKcPPf, .Lfunc_end4-_Z11readBinFilePKcPPf
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function main
.LCPI5_0:
	.long	0                               # 0x0
	.long	1                               # 0x1
	.long	3                               # 0x3
	.long	7                               # 0x7
.LCPI5_1:
	.long	15                              # 0xf
	.long	31                              # 0x1f
	.long	63                              # 0x3f
	.long	127                             # 0x7f
.LCPI5_2:
	.long	1127219200                      # 0x43300000
	.long	1160773632                      # 0x45300000
	.long	0                               # 0x0
	.long	0                               # 0x0
.LCPI5_3:
	.quad	0x4330000000000000              # double 4503599627370496
	.quad	0x4530000000000000              # double 1.9342813113834067E+25
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI5_4:
	.quad	0x3f40000000000000              # double 4.8828125E-4
.LCPI5_5:
	.quad	0x43e0000000000000              # double 9.2233720368547758E+18
.LCPI5_6:
	.quad	0xc01921fb60000000              # double -6.2831854820251465
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$16648, %rsp                    # imm = 0x4108
	.cfi_def_cfa_offset 16704
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$.Lstr, %edi
	callq	puts@PLT
	movq	stdout(%rip), %rdi
	callq	fflush
	movaps	.LCPI5_0(%rip), %xmm0           # xmm0 = [0,1,3,7]
	movaps	%xmm0, 112(%rsp)
	movaps	.LCPI5_1(%rip), %xmm0           # xmm0 = [15,31,63,127]
	movaps	%xmm0, 128(%rsp)
	movabsq	$2194728288511, %rax            # imm = 0x1FF000000FF
	movq	%rax, 144(%rsp)
	movl	$1023, 152(%rsp)                # imm = 0x3FF
	xorl	%ebx, %ebx
.LBB5_1:                                # =>This Inner Loop Header: Depth=1
	movl	112(%rsp,%rbx,4), %edx
	movl	$.L.str.8, %edi
	movl	%ebx, %esi
	xorl	%eax, %eax
	callq	printf
	incq	%rbx
	cmpq	$11, %rbx
	jne	.LBB5_1
# %bb.2:
	movl	$10, %edi
	callq	putchar@PLT
	movq	stdout(%rip), %rdi
	callq	fflush
	leaq	88(%rsp), %rsi
	movl	$.L.str.5, %edi
	callq	_Z11readBinFilePKcPPf
	movq	%rax, %rbp
	leaq	104(%rsp), %rsi
	movl	$.L.str.6, %edi
	callq	_Z11readBinFilePKcPPf
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	leaq	(,%rax,4), %rdi
	movq	%rdi, 72(%rsp)                  # 8-byte Spill
	callq	malloc
	movq	%rax, %rbx
	testq	%rax, %rax
	jne	.LBB5_4
# %bb.3:
	movl	$.L.str.10, %edi
	xorl	%eax, %eax
	callq	printf
.LBB5_4:
	movq	%rbx, 96(%rsp)                  # 8-byte Spill
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	movq	stdout(%rip), %rdi
	callq	fflush
	movq	%rbp, %xmm1
	punpckldq	.LCPI5_2(%rip), %xmm1   # xmm1 = xmm1[0],mem[0],xmm1[1],mem[1]
	subpd	.LCPI5_3(%rip), %xmm1
	movapd	%xmm1, %xmm0
	unpckhpd	%xmm1, %xmm0                    # xmm0 = xmm0[1],xmm1[1]
	addsd	%xmm1, %xmm0
	mulsd	.LCPI5_4(%rip), %xmm0
	callq	ceil@PLT
	cvttsd2si	%xmm0, %rax
	movq	%rax, %rcx
	sarq	$63, %rcx
	subsd	.LCPI5_5(%rip), %xmm0
	cvttsd2si	%xmm0, %r15
	andq	%rcx, %r15
	orq	%rax, %r15
	movq	%r15, %r12
	shlq	$11, %r12
	movl	$.L.str.13, %edi
	movq	%rbp, %rsi
	movq	%r12, %rdx
	xorl	%eax, %eax
	callq	printf
	movq	stdout(%rip), %rdi
	callq	fflush
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	movq	stdout(%rip), %rdi
	callq	fflush
	movl	$16, %edi
	callq	malloc
	movq	%rax, %r13
	testq	%rax, %rax
	movq	%r15, %rax
	movq	%r15, 80(%rsp)                  # 8-byte Spill
	je	.LBB5_9
# %bb.5:                                # %.preheader
	shlq	$13, %r15
	movb	$1, %bl
	xorl	%r14d, %r14d
.LBB5_6:                                # =>This Inner Loop Header: Depth=1
	movl	$.L.str.15, %edi
	movl	%r14d, %esi
	xorl	%eax, %eax
	callq	printf
	movq	%r15, %rdi
	callq	malloc
	movq	%rax, (%r13,%r14,8)
	testq	%rax, %rax
	jne	.LBB5_8
# %bb.7:                                #   in Loop: Header=BB5_6 Depth=1
	movl	$.L.str.16, %edi
	movl	%r14d, %esi
	xorl	%eax, %eax
	callq	printf
.LBB5_8:                                #   in Loop: Header=BB5_6 Depth=1
	movl	$1, %r14d
	testb	$1, %bl
	movl	$0, %ebx
	jne	.LBB5_6
	jmp	.LBB5_10
.LBB5_9:
	movl	$.Lstr.3, %edi
	callq	puts@PLT
.LBB5_10:                               # %.loopexit
	movl	$.Lstr.4, %edi
	callq	puts@PLT
	movq	stdout(%rip), %rdi
	callq	fflush
	testq	%r12, %r12
	je	.LBB5_15
# %bb.11:                               # %.lr.ph
	movq	(%r13), %rax
	movq	8(%r13), %rcx
	movq	88(%rsp), %rdx
	xorl	%esi, %esi
.LBB5_12:                               # =>This Inner Loop Header: Depth=1
	movl	$0, (%rcx,%rsi,4)
	xorpd	%xmm0, %xmm0
	cmpq	%rsi, %rbp
	jbe	.LBB5_14
# %bb.13:                               #   in Loop: Header=BB5_12 Depth=1
	movss	(%rdx,%rsi,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
.LBB5_14:                               #   in Loop: Header=BB5_12 Depth=1
	movss	%xmm0, (%rax,%rsi,4)
	incq	%rsi
	cmpq	%rsi, %r12
	jne	.LBB5_12
.LBB5_15:                               # %._crit_edge
	movl	$.Lstr.5, %edi
	callq	puts@PLT
	movq	stdout(%rip), %rdi
	callq	fflush
	xorl	%ebx, %ebx
.LBB5_16:                               # =>This Inner Loop Header: Depth=1
	movl	112(%rsp,%rbx,4), %eax
	leal	2(,%rax,2), %eax
	xorps	%xmm0, %xmm0
	cvtsi2sd	%eax, %xmm0
	movsd	.LCPI5_6(%rip), %xmm1           # xmm1 = mem[0],zero
	divsd	%xmm0, %xmm1
	xorps	%xmm0, %xmm0
	cvtsd2ss	%xmm1, %xmm0
	movss	%xmm0, 68(%rsp)                 # 4-byte Spill
	callq	cosf
	movss	%xmm0, 208(%rsp,%rbx,4)
	movss	68(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	callq	sinf
	movss	%xmm0, 160(%rsp,%rbx,4)
	incq	%rbx
	cmpq	$11, %rbx
	jne	.LBB5_16
# %bb.17:
	movl	$.Lstr.6, %edi
	callq	puts@PLT
	movq	stdout(%rip), %rdi
	callq	fflush
	movq	80(%rsp), %r12                  # 8-byte Reload
	movq	%r12, %rbp
	shlq	$13, %rbp
	leaq	16(%rsp), %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	movq	%rsp, %rdi
	movq	72(%rsp), %rbx                  # 8-byte Reload
	movq	%rbx, %rsi
	callq	hipMalloc
	leaq	56(%rsp), %rdi
	movl	$8188, %esi                     # imm = 0x1FFC
	callq	hipMalloc
	leaq	48(%rsp), %rdi
	movl	$8188, %esi                     # imm = 0x1FFC
	callq	hipMalloc
	leaq	40(%rsp), %rdi
	movl	$8188, %esi                     # imm = 0x1FFC
	callq	hipMalloc
	leaq	32(%rsp), %rdi
	movl	$8188, %esi                     # imm = 0x1FFC
	callq	hipMalloc
	movl	$.Lstr.7, %edi
	callq	puts@PLT
	movq	stdout(%rip), %rdi
	callq	fflush
	leaq	112(%rsp), %rsi
	movl	$offsets, %edi
	movl	$44, %edx
	xorl	%ecx, %ecx
	movl	$1, %r8d
	callq	hipMemcpyToSymbol
	testl	%eax, %eax
	jne	.LBB5_18
# %bb.19:
	movq	56(%rsp), %rdi
	leaq	208(%rsp), %rsi
	movl	$44, %edx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB5_20
# %bb.21:
	movq	48(%rsp), %rdi
	leaq	160(%rsp), %rsi
	movl	$44, %edx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB5_22
# %bb.23:
	movq	16(%rsp), %rdi
	movq	(%r13), %r14
	movq	%r14, %rsi
	movq	%rbp, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB5_24
# %bb.25:
	movq	8(%rsp), %rdi
	movq	8(%r13), %r14
	movq	%r14, %rsi
	movq	%rbp, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB5_26
# %bb.27:
	leaq	16(%rsp), %rsi
	movl	$in_re, %edi
	movl	$8, %edx
	xorl	%ecx, %ecx
	movl	$1, %r8d
	callq	hipMemcpyToSymbol
	testl	%eax, %eax
	jne	.LBB5_28
# %bb.29:
	leaq	8(%rsp), %rsi
	movl	$in_im, %edi
	movl	$8, %edx
	xorl	%ecx, %ecx
	movl	$1, %r8d
	callq	hipMemcpyToSymbol
	testl	%eax, %eax
	jne	.LBB5_30
# %bb.31:
	movabsq	$4294968320, %r13               # imm = 0x100000400
	movl	$.Lstr.8, %edi
	callq	puts@PLT
	movq	stdout(%rip), %rdi
	callq	fflush
	leaq	-1023(%r13), %rdi
	leaq	-1013(%r13), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_33
# %bb.32:
	movq	40(%rsp), %rdi
	movq	32(%rsp), %rsi
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rcx
	callq	_Z27__device_stub__calcTwiddlesPfS_S_S_
.LBB5_33:
	callq	hipDeviceSynchronize
	movq	40(%rsp), %rsi
	leaq	8448(%rsp), %rdi
	movl	$8188, %edx                     # imm = 0x1FFC
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB5_34
# %bb.35:
	movq	32(%rsp), %rsi
	leaq	256(%rsp), %rdi
	movl	$8188, %edx                     # imm = 0x1FFC
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB5_36
# %bb.37:
	leaq	8448(%rsp), %rsi
	movl	$twiddles_re, %edi
	movl	$8188, %edx                     # imm = 0x1FFC
	xorl	%ecx, %ecx
	movl	$1, %r8d
	callq	hipMemcpyToSymbol
	testl	%eax, %eax
	jne	.LBB5_38
# %bb.39:
	xorl	%r15d, %r15d
	leaq	256(%rsp), %rsi
	movl	$twiddles_im, %edi
	movl	$8188, %edx                     # imm = 0x1FFC
	xorl	%ecx, %ecx
	movl	$1, %r8d
	callq	hipMemcpyToSymbol
	testl	%eax, %eax
	jne	.LBB5_40
# %bb.41:
	movl	$.L.str.25, %edi
	movl	%r12d, %esi
	movl	$1024, %edx                     # imm = 0x400
	xorl	%eax, %eax
	callq	printf
	movq	stdout(%rip), %rdi
	callq	fflush
	leal	31(%r12), %eax
	testl	%r12d, %r12d
	cmovnsl	%r12d, %eax
	movl	%eax, %r14d
	sarl	$5, %r14d
	andl	$-32, %eax
	movl	%r12d, %ebp
	subl	%eax, %ebp
	cmpl	$32, %r12d
	jl	.LBB5_47
# %bb.42:                               # %.lr.ph188
	xorl	%r15d, %r15d
	leaq	-992(%r13), %r12
.LBB5_43:                               # =>This Inner Loop Header: Depth=1
	movl	$16384, %r8d                    # imm = 0x4000
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_45
# %bb.44:                               #   in Loop: Header=BB5_43 Depth=1
	movq	(%rsp), %rdi
	movq	24(%rsp), %rsi                  # 8-byte Reload
                                        # kill: def $esi killed $esi killed $rsi
	movl	%r15d, %edx
	movl	$32, %ecx
	callq	_Z19__device_stub__corePfiii
.LBB5_45:                               #   in Loop: Header=BB5_43 Depth=1
	incl	%r15d
	cmpl	%r15d, %r14d
	jne	.LBB5_43
# %bb.46:
	movl	%r14d, %r15d
.LBB5_47:                               # %._crit_edge189
	movl	%ebp, %r12d
	testl	%ebp, %ebp
	jle	.LBB5_50
# %bb.48:
	leaq	(%r12,%r13), %rdi
	addq	$-1024, %rdi                    # imm = 0xFC00
	movl	$16384, %r8d                    # imm = 0x4000
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_50
# %bb.49:
	movq	(%rsp), %rdi
	movq	24(%rsp), %rsi                  # 8-byte Reload
                                        # kill: def $esi killed $esi killed $rsi
	movl	%r15d, %edx
	movl	$32, %ecx
	callq	_Z19__device_stub__corePfiii
.LBB5_50:
	callq	hipDeviceSynchronize
	xorl	%r15d, %r15d
	cmpl	$32, 80(%rsp)                   # 4-byte Folded Reload
	jl	.LBB5_56
# %bb.51:                               # %.lr.ph193
	xorl	%ebx, %ebx
	leaq	-992(%r13), %r15
.LBB5_52:                               # =>This Inner Loop Header: Depth=1
	movq	%r15, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_54
# %bb.53:                               #   in Loop: Header=BB5_52 Depth=1
	movq	(%rsp), %rdi
	movq	24(%rsp), %rsi                  # 8-byte Reload
                                        # kill: def $esi killed $esi killed $rsi
	movl	%ebx, %edx
	movl	$32, %ecx
	callq	_Z29__device_stub__normaliseFinalPfiii
.LBB5_54:                               #   in Loop: Header=BB5_52 Depth=1
	incl	%ebx
	cmpl	%ebx, %r14d
	jne	.LBB5_52
# %bb.55:
	movl	%r14d, %r15d
	movq	72(%rsp), %rbx                  # 8-byte Reload
.LBB5_56:                               # %._crit_edge194
	testl	%ebp, %ebp
	jle	.LBB5_59
# %bb.57:
	leaq	(%r12,%r13), %rdi
	addq	$-1024, %rdi                    # imm = 0xFC00
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_59
# %bb.58:
	movq	(%rsp), %rdi
	movq	24(%rsp), %rsi                  # 8-byte Reload
                                        # kill: def $esi killed $esi killed $rsi
	movl	%r15d, %edx
	movl	$32, %ecx
	callq	_Z29__device_stub__normaliseFinalPfiii
.LBB5_59:
	callq	hipDeviceSynchronize
	movq	(%rsp), %rsi
	movq	96(%rsp), %r14                  # 8-byte Reload
	movq	%r14, %rdi
	movq	%rbx, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB5_60
# %bb.61:
	movq	(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB5_62
# %bb.64:
	movq	16(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB5_65
# %bb.66:
	movq	8(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB5_67
# %bb.68:
	movq	56(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB5_69
# %bb.70:
	movq	48(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB5_71
# %bb.72:
	movq	40(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB5_73
# %bb.74:
	movq	32(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB5_75
# %bb.76:
	movl	$.L.str.7, %edi
	movq	%r14, %rsi
	movq	24(%rsp), %rdx                  # 8-byte Reload
	callq	_Z12writeBinFilePKcPfm
	movq	%r14, %rdi
	callq	free
	movq	104(%rsp), %rdi
	callq	free
	movq	88(%rsp), %rdi
	callq	free
	xorl	%eax, %eax
	addq	$16648, %rsp                    # imm = 0x4108
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB5_18:
	.cfi_def_cfa_offset 16704
	movq	stderr(%rip), %rbx
	leaq	112(%rsp), %rsi
	movl	$offsets, %edi
	movl	$44, %edx
	xorl	%ecx, %ecx
	movl	$1, %r8d
	callq	_Z17hipMemcpyToSymbolIA11_iE10hipError_tRKT_PKvmm13hipMemcpyKind
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.22, %esi
	movl	$.L.str.23, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$391, %r8d                      # imm = 0x187
	jmp	.LBB5_63
.LBB5_20:
	movq	stderr(%rip), %rbx
	movq	56(%rsp), %rdi
	leaq	208(%rsp), %rsi
	movl	$44, %edx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.22, %esi
	movl	$.L.str.23, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$393, %r8d                      # imm = 0x189
	jmp	.LBB5_63
.LBB5_22:
	movq	stderr(%rip), %rbx
	movq	48(%rsp), %rdi
	leaq	160(%rsp), %rsi
	movl	$44, %edx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.22, %esi
	movl	$.L.str.23, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$394, %r8d                      # imm = 0x18A
	jmp	.LBB5_63
.LBB5_24:
	movq	stderr(%rip), %rbx
	movq	16(%rsp), %rdi
	movq	%r14, %rsi
	movq	%rbp, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.22, %esi
	movl	$.L.str.23, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$396, %r8d                      # imm = 0x18C
	jmp	.LBB5_63
.LBB5_26:
	movq	stderr(%rip), %rbx
	movq	8(%rsp), %rdi
	movq	%r14, %rsi
	movq	%rbp, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.22, %esi
	movl	$.L.str.23, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$397, %r8d                      # imm = 0x18D
	jmp	.LBB5_63
.LBB5_28:
	movq	stderr(%rip), %rbx
	leaq	16(%rsp), %rsi
	movl	$in_re, %edi
	movl	$8, %edx
	xorl	%ecx, %ecx
	movl	$1, %r8d
	callq	_Z17hipMemcpyToSymbolIPfE10hipError_tRKT_PKvmm13hipMemcpyKind
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.22, %esi
	movl	$.L.str.23, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$398, %r8d                      # imm = 0x18E
	jmp	.LBB5_63
.LBB5_30:
	movq	stderr(%rip), %rbx
	leaq	8(%rsp), %rsi
	movl	$in_im, %edi
	movl	$8, %edx
	xorl	%ecx, %ecx
	movl	$1, %r8d
	callq	_Z17hipMemcpyToSymbolIPfE10hipError_tRKT_PKvmm13hipMemcpyKind
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.22, %esi
	movl	$.L.str.23, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$399, %r8d                      # imm = 0x18F
	jmp	.LBB5_63
.LBB5_34:
	movq	stderr(%rip), %rbx
	movq	40(%rsp), %rsi
	leaq	8448(%rsp), %rdi
	movl	$8188, %edx                     # imm = 0x1FFC
	movl	$2, %ecx
	callq	hipMemcpy
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.22, %esi
	movl	$.L.str.23, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$409, %r8d                      # imm = 0x199
	jmp	.LBB5_63
.LBB5_36:
	movq	stderr(%rip), %rbx
	movq	32(%rsp), %rsi
	leaq	256(%rsp), %rdi
	movl	$8188, %edx                     # imm = 0x1FFC
	movl	$2, %ecx
	callq	hipMemcpy
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.22, %esi
	movl	$.L.str.23, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$410, %r8d                      # imm = 0x19A
	jmp	.LBB5_63
.LBB5_38:
	movq	stderr(%rip), %rbx
	leaq	8448(%rsp), %rsi
	movl	$twiddles_re, %edi
	movl	$8188, %edx                     # imm = 0x1FFC
	xorl	%ecx, %ecx
	movl	$1, %r8d
	callq	_Z17hipMemcpyToSymbolIA2047_fE10hipError_tRKT_PKvmm13hipMemcpyKind
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.22, %esi
	movl	$.L.str.23, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$413, %r8d                      # imm = 0x19D
	jmp	.LBB5_63
.LBB5_40:
	movq	stderr(%rip), %rbx
	leaq	256(%rsp), %rsi
	movl	$twiddles_im, %edi
	movl	$8188, %edx                     # imm = 0x1FFC
	xorl	%ecx, %ecx
	movl	$1, %r8d
	callq	_Z17hipMemcpyToSymbolIA2047_fE10hipError_tRKT_PKvmm13hipMemcpyKind
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.22, %esi
	movl	$.L.str.23, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$414, %r8d                      # imm = 0x19E
	jmp	.LBB5_63
.LBB5_60:
	movq	%rbx, %rdx
	movq	stderr(%rip), %rbx
	movq	(%rsp), %rsi
	movq	%r14, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.22, %esi
	movl	$.L.str.23, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$449, %r8d                      # imm = 0x1C1
	jmp	.LBB5_63
.LBB5_62:
	movq	stderr(%rip), %rbx
	movq	(%rsp), %rdi
	callq	hipFree
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.22, %esi
	movl	$.L.str.23, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$451, %r8d                      # imm = 0x1C3
	jmp	.LBB5_63
.LBB5_65:
	movq	stderr(%rip), %rbx
	movq	16(%rsp), %rdi
	callq	hipFree
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.22, %esi
	movl	$.L.str.23, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$453, %r8d                      # imm = 0x1C5
	jmp	.LBB5_63
.LBB5_67:
	movq	stderr(%rip), %rbx
	movq	8(%rsp), %rdi
	callq	hipFree
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.22, %esi
	movl	$.L.str.23, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$454, %r8d                      # imm = 0x1C6
	jmp	.LBB5_63
.LBB5_69:
	movq	stderr(%rip), %rbx
	movq	56(%rsp), %rdi
	callq	hipFree
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.22, %esi
	movl	$.L.str.23, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$455, %r8d                      # imm = 0x1C7
	jmp	.LBB5_63
.LBB5_71:
	movq	stderr(%rip), %rbx
	movq	48(%rsp), %rdi
	callq	hipFree
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.22, %esi
	movl	$.L.str.23, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$456, %r8d                      # imm = 0x1C8
	jmp	.LBB5_63
.LBB5_73:
	movq	stderr(%rip), %rbx
	movq	40(%rsp), %rdi
	callq	hipFree
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.22, %esi
	movl	$.L.str.23, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$457, %r8d                      # imm = 0x1C9
	jmp	.LBB5_63
.LBB5_75:
	movq	stderr(%rip), %rbx
	movq	32(%rsp), %rdi
	callq	hipFree
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.22, %esi
	movl	$.L.str.23, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$458, %r8d                      # imm = 0x1CA
.LBB5_63:
	xorl	%eax, %eax
	callq	fprintf
	movl	$1, %edi
	callq	exit
.Lfunc_end5:
	.size	main, .Lfunc_end5-main
	.cfi_endproc
                                        # -- End function
	.section	.text._Z17hipMemcpyToSymbolIA11_iE10hipError_tRKT_PKvmm13hipMemcpyKind,"axG",@progbits,_Z17hipMemcpyToSymbolIA11_iE10hipError_tRKT_PKvmm13hipMemcpyKind,comdat
	.weak	_Z17hipMemcpyToSymbolIA11_iE10hipError_tRKT_PKvmm13hipMemcpyKind # -- Begin function _Z17hipMemcpyToSymbolIA11_iE10hipError_tRKT_PKvmm13hipMemcpyKind
	.type	_Z17hipMemcpyToSymbolIA11_iE10hipError_tRKT_PKvmm13hipMemcpyKind,@function
_Z17hipMemcpyToSymbolIA11_iE10hipError_tRKT_PKvmm13hipMemcpyKind: # @_Z17hipMemcpyToSymbolIA11_iE10hipError_tRKT_PKvmm13hipMemcpyKind
	.cfi_startproc
# %bb.0:
	jmp	hipMemcpyToSymbol               # TAILCALL
.Lfunc_end6:
	.size	_Z17hipMemcpyToSymbolIA11_iE10hipError_tRKT_PKvmm13hipMemcpyKind, .Lfunc_end6-_Z17hipMemcpyToSymbolIA11_iE10hipError_tRKT_PKvmm13hipMemcpyKind
	.cfi_endproc
                                        # -- End function
	.section	.text._Z17hipMemcpyToSymbolIPfE10hipError_tRKT_PKvmm13hipMemcpyKind,"axG",@progbits,_Z17hipMemcpyToSymbolIPfE10hipError_tRKT_PKvmm13hipMemcpyKind,comdat
	.weak	_Z17hipMemcpyToSymbolIPfE10hipError_tRKT_PKvmm13hipMemcpyKind # -- Begin function _Z17hipMemcpyToSymbolIPfE10hipError_tRKT_PKvmm13hipMemcpyKind
	.type	_Z17hipMemcpyToSymbolIPfE10hipError_tRKT_PKvmm13hipMemcpyKind,@function
_Z17hipMemcpyToSymbolIPfE10hipError_tRKT_PKvmm13hipMemcpyKind: # @_Z17hipMemcpyToSymbolIPfE10hipError_tRKT_PKvmm13hipMemcpyKind
	.cfi_startproc
# %bb.0:
	jmp	hipMemcpyToSymbol               # TAILCALL
.Lfunc_end7:
	.size	_Z17hipMemcpyToSymbolIPfE10hipError_tRKT_PKvmm13hipMemcpyKind, .Lfunc_end7-_Z17hipMemcpyToSymbolIPfE10hipError_tRKT_PKvmm13hipMemcpyKind
	.cfi_endproc
                                        # -- End function
	.section	.text._Z17hipMemcpyToSymbolIA2047_fE10hipError_tRKT_PKvmm13hipMemcpyKind,"axG",@progbits,_Z17hipMemcpyToSymbolIA2047_fE10hipError_tRKT_PKvmm13hipMemcpyKind,comdat
	.weak	_Z17hipMemcpyToSymbolIA2047_fE10hipError_tRKT_PKvmm13hipMemcpyKind # -- Begin function _Z17hipMemcpyToSymbolIA2047_fE10hipError_tRKT_PKvmm13hipMemcpyKind
	.type	_Z17hipMemcpyToSymbolIA2047_fE10hipError_tRKT_PKvmm13hipMemcpyKind,@function
_Z17hipMemcpyToSymbolIA2047_fE10hipError_tRKT_PKvmm13hipMemcpyKind: # @_Z17hipMemcpyToSymbolIA2047_fE10hipError_tRKT_PKvmm13hipMemcpyKind
	.cfi_startproc
# %bb.0:
	jmp	hipMemcpyToSymbol               # TAILCALL
.Lfunc_end8:
	.size	_Z17hipMemcpyToSymbolIA2047_fE10hipError_tRKT_PKvmm13hipMemcpyKind, .Lfunc_end8-_Z17hipMemcpyToSymbolIA2047_fE10hipError_tRKT_PKvmm13hipMemcpyKind
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB9_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB9_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z4corePfiii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14normaliseFinalPfiii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12calcTwiddlesPfS_S_S_, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$0, 8(%rsp)
	movl	$1, (%rsp)
	movl	$offsets, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movl	$44, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	callq	__hipRegisterVar
	movl	$0, 8(%rsp)
	movl	$1, (%rsp)
	movl	$twiddles_re, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movl	$8188, %r9d                     # imm = 0x1FFC
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	callq	__hipRegisterVar
	movl	$0, 8(%rsp)
	movl	$1, (%rsp)
	movl	$twiddles_im, %esi
	movl	$.L__unnamed_6, %edx
	movl	$.L__unnamed_6, %ecx
	movl	$8188, %r9d                     # imm = 0x1FFC
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	callq	__hipRegisterVar
	movl	$0, 8(%rsp)
	movl	$0, (%rsp)
	movl	$in_re, %esi
	movl	$.L__unnamed_7, %edx
	movl	$.L__unnamed_7, %ecx
	movl	$8, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	callq	__hipRegisterVar
	movl	$0, 8(%rsp)
	movl	$0, (%rsp)
	movl	$in_im, %esi
	movl	$.L__unnamed_8, %edx
	movl	$.L__unnamed_8, %ecx
	movl	$8, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	callq	__hipRegisterVar
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end9:
	.size	__hip_module_ctor, .Lfunc_end9-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB10_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB10_2:
	retq
.Lfunc_end10:
	.size	__hip_module_dtor, .Lfunc_end10-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	offsets,@object                 # @offsets
	.local	offsets
	.comm	offsets,44,16
	.type	twiddles_re,@object             # @twiddles_re
	.local	twiddles_re
	.comm	twiddles_re,8188,16
	.type	twiddles_im,@object             # @twiddles_im
	.local	twiddles_im
	.comm	twiddles_im,8188,16
	.type	in_re,@object                   # @in_re
	.local	in_re
	.comm	in_re,8,8
	.type	in_im,@object                   # @in_im
	.local	in_im
	.comm	in_im,8,8
	.type	_Z4corePfiii,@object            # @_Z4corePfiii
	.section	.rodata,"a",@progbits
	.globl	_Z4corePfiii
	.p2align	3, 0x0
_Z4corePfiii:
	.quad	_Z19__device_stub__corePfiii
	.size	_Z4corePfiii, 8

	.type	_Z14normaliseFinalPfiii,@object # @_Z14normaliseFinalPfiii
	.globl	_Z14normaliseFinalPfiii
	.p2align	3, 0x0
_Z14normaliseFinalPfiii:
	.quad	_Z29__device_stub__normaliseFinalPfiii
	.size	_Z14normaliseFinalPfiii, 8

	.type	_Z12calcTwiddlesPfS_S_S_,@object # @_Z12calcTwiddlesPfS_S_S_
	.globl	_Z12calcTwiddlesPfS_S_S_
	.p2align	3, 0x0
_Z12calcTwiddlesPfS_S_S_:
	.quad	_Z27__device_stub__calcTwiddlesPfS_S_S_
	.size	_Z12calcTwiddlesPfS_S_S_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"wb"
	.size	.L.str, 3

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"writing %s is writing %d in %lu bytes\n"
	.size	.L.str.1, 39

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"r"
	.size	.L.str.2, 2

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"file %s is %lu elements in %lu bytes\n"
	.size	.L.str.3, 38

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"wave_out"
	.size	.L.str.5, 9

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"timefreq_out"
	.size	.L.str.6, 13

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"timefreq_done"
	.size	.L.str.7, 14

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"h_offsets[%d] = %d, "
	.size	.L.str.8, 21

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"failed to allocate out"
	.size	.L.str.10, 23

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	"wave_num_els = %d, wave_num_pels = %d\n"
	.size	.L.str.13, 39

	.type	.L.str.15,@object               # @.str.15
.L.str.15:
	.asciz	"Allocating h_sig_data[%d]\n"
	.size	.L.str.15, 27

	.type	.L.str.16,@object               # @.str.16
.L.str.16:
	.asciz	"failed to allocate h_sig_data[%d]\n"
	.size	.L.str.16, 35

	.type	.L.str.22,@object               # @.str.22
.L.str.22:
	.asciz	"\n FAILURE %s in %s, line %d\n"
	.size	.L.str.22, 29

	.type	.L.str.23,@object               # @.str.23
.L.str.23:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/stephen-hannam/CUDA_impl_2048pt_TukeyCooley_Iterative_FFT/master/soln_single_prec/kernel.hip"
	.size	.L.str.23, 155

	.type	.L.str.25,@object               # @.str.25
.L.str.25:
	.asciz	"launching kernel with %d blocks and %d threads per block\n"
	.size	.L.str.25, 58

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z4corePfiii"
	.size	.L__unnamed_1, 13

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z14normaliseFinalPfiii"
	.size	.L__unnamed_2, 24

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z12calcTwiddlesPfS_S_S_"
	.size	.L__unnamed_3, 25

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"offsets"
	.size	.L__unnamed_4, 8

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"twiddles_re"
	.size	.L__unnamed_5, 12

	.type	.L__unnamed_6,@object           # @5
.L__unnamed_6:
	.asciz	"twiddles_im"
	.size	.L__unnamed_6, 12

	.type	.L__unnamed_7,@object           # @6
.L__unnamed_7:
	.asciz	"in_re"
	.size	.L__unnamed_7, 6

	.type	.L__unnamed_8,@object           # @7
.L__unnamed_8:
	.asciz	"in_im"
	.size	.L__unnamed_8, 6

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"hello"
	.size	.Lstr, 6

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"Allocating h_timefreq_cmp_data"
	.size	.Lstr.1, 31

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"Allocating h_sig_data"
	.size	.Lstr.2, 22

	.type	.Lstr.3,@object                 # @str.3
.Lstr.3:
	.asciz	"failed to allocate h_sig_data"
	.size	.Lstr.3, 30

	.type	.Lstr.4,@object                 # @str.4
.Lstr.4:
	.asciz	"Casting wave to complex and padding with zeros"
	.size	.Lstr.4, 47

	.type	.Lstr.5,@object                 # @str.5
.Lstr.5:
	.asciz	"Calculating the zeroth twiddles"
	.size	.Lstr.5, 32

	.type	.Lstr.6,@object                 # @str.6
.Lstr.6:
	.asciz	"Allocating memory on device"
	.size	.Lstr.6, 28

	.type	.Lstr.7,@object                 # @str.7
.Lstr.7:
	.asciz	"Copying data over to device"
	.size	.Lstr.7, 28

	.type	.Lstr.8,@object                 # @str.8
.Lstr.8:
	.asciz	"Launching kernel to calc twiddles"
	.size	.Lstr.8, 34

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z19__device_stub__corePfiii
	.addrsig_sym _Z29__device_stub__normaliseFinalPfiii
	.addrsig_sym _Z27__device_stub__calcTwiddlesPfS_S_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym offsets
	.addrsig_sym twiddles_re
	.addrsig_sym twiddles_im
	.addrsig_sym in_re
	.addrsig_sym in_im
	.addrsig_sym _Z4corePfiii
	.addrsig_sym _Z14normaliseFinalPfiii
	.addrsig_sym _Z12calcTwiddlesPfS_S_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z4corePfiii            ; -- Begin function _Z4corePfiii
	.globl	_Z4corePfiii
	.p2align	8
	.type	_Z4corePfiii,@function
_Z4corePfiii:                           ; @_Z4corePfiii
; %bb.0:
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x8
	s_load_b32 s2, s[0:1], 0x24
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s3, s6, s5
	s_and_b32 s2, s2, 0xffff
	s_add_i32 s3, s3, s15
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_mul_i32 s2, s3, s2
	s_mov_b32 s3, exec_lo
	v_add_nc_u32_e32 v1, s2, v0
	v_cmpx_gt_i32_e64 s4, v1
	s_cbranch_execz .LBB0_8
; %bb.1:
	v_bfrev_b32_e32 v2, v0
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, in_re@rel32@lo+4
	s_addc_u32 s5, s5, in_re@rel32@hi+12
	s_getpc_b64 s[6:7]
	s_add_u32 s6, s6, in_im@rel32@lo+4
	s_addc_u32 s7, s7, in_im@rel32@hi+12
	s_load_b64 s[4:5], s[4:5], 0x0
	s_load_b64 s[6:7], s[6:7], 0x0
	v_lshrrev_b32_e32 v2, 21, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v2, s2, v2
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v4, vcc_lo, s4, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
	v_add_co_u32 v2, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
	flat_load_b32 v4, v[4:5]
	flat_load_b32 v5, v[2:3]
	v_or_b32_e32 v2, 0x400, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_bfrev_b32_e32 v2, v2
	v_lshrrev_b32_e32 v2, 21, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v2, s2, v2
	s_mov_b64 s[2:3], 0
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[6:7], 2, v[2:3]
	v_lshl_add_u32 v2, v0, 3, 0
	v_add_co_u32 v8, vcc_lo, s4, v6
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v9, vcc_lo, s5, v7, vcc_lo
	v_add_co_u32 v6, vcc_lo, s6, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v7, vcc_lo
	s_getpc_b64 s[6:7]
	s_add_u32 s6, s6, twiddles_im@rel32@lo+4
	s_addc_u32 s7, s7, twiddles_im@rel32@hi+12
	s_waitcnt vmcnt(0) lgkmcnt(0)
	ds_store_b64 v2, v[4:5]
	flat_load_b32 v3, v[8:9]
	flat_load_b32 v4, v[6:7]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	ds_store_b64 v2, v[3:4] offset:8192
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, offsets@rel32@lo+4
	s_addc_u32 s5, s5, offsets@rel32@hi+12
	s_add_u32 s4, s2, s4
	s_addc_u32 s5, s3, s5
	s_load_b32 s8, s[4:5], 0x0
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, twiddles_re@rel32@lo+4
	s_addc_u32 s5, s5, twiddles_re@rel32@hi+12
	s_waitcnt lgkmcnt(0)
	v_and_b32_e32 v3, s8, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, s8, v3
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v5, vcc_lo, v3, s6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v4, vcc_lo
	v_add_co_u32 v3, vcc_lo, v3, s4
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	s_not_b32 s4, s8
	global_load_b32 v7, v[5:6], off
	global_load_b32 v8, v[3:4], off
	v_and_b32_e32 v5, s4, v0
	s_add_u32 s2, s2, 4
	s_addc_u32 s3, s3, 0
	s_cmp_eq_u32 s2, 44
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add3_u32 v3, v5, v0, s8
	v_lshl_add_u32 v10, v5, 3, v2
	v_lshl_add_u32 v9, v3, 3, 0
	ds_load_b64 v[5:6], v10
	ds_load_b64 v[3:4], v9 offset:8
	s_waitcnt vmcnt(1) lgkmcnt(0)
	v_mul_f32_e32 v11, v4, v7
	v_mul_f32_e32 v7, v3, v7
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v11, v3, v8, -v11
	v_fmac_f32_e32 v7, v4, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v3, v5, v11
	v_add_f32_e32 v4, v6, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_f32_e32 v5, v3, v11
	v_sub_f32_e32 v6, v4, v7
	ds_store_b64 v10, v[3:4]
	ds_store_b64 v9, v[5:6] offset:8
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB0_2
; %bb.3:
	ds_load_b64 v[2:3], v2
	s_load_b64 s[2:3], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	v_mul_f32_e32 v0, v3, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v0, v2, v2
	v_mul_f32_e32 v2, 0x4f800000, v0
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v5, v0, v2, vcc_lo
	v_sqrt_f32_e32 v0, v5
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v2, -1, v0
	v_add_nc_u32_e32 v3, 1, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v4, -v2, v0, v5
	v_fma_f32 v6, -v3, v0, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_f32_e64 s0, 0, v4
	v_cndmask_b32_e64 v0, v0, v2, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_lt_f32_e64 s0, 0, v6
	v_ashrrev_i32_e32 v2, 31, v1
	v_cndmask_b32_e64 v3, v0, v3, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZL6maxFFT@rel32@lo+4
	s_addc_u32 s1, s1, _ZL6maxFFT@rel32@hi+12
	v_mul_f32_e32 v4, 0x37800000, v3
	v_cndmask_b32_e32 v2, v3, v4, vcc_lo
	v_add_co_u32 v3, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v4, vcc_lo, s3, v1, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v5, 0x260
	s_delay_alu instid0(VALU_DEP_4)
	v_cndmask_b32_e32 v0, v2, v5, vcc_lo
	v_mov_b32_e32 v2, 0
	global_store_b32 v[3:4], v0, off
	global_load_b32 v1, v2, s[0:1]
	s_mov_b32 s0, 0
	s_waitcnt vmcnt(0)
	v_cmp_nge_f32_e32 vcc_lo, v1, v0
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_8
; %bb.4:
                                        ; implicit-def: $sgpr1
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, _ZL6maxFFT@rel32@lo+4
	s_addc_u32 s5, s5, _ZL6maxFFT@rel32@hi+12
.LBB0_5:                                ; =>This Inner Loop Header: Depth=1
	s_or_b32 s1, s1, exec_lo
	s_mov_b32 s2, exec_lo
	v_cmpx_nle_f32_e32 v0, v1
	s_cbranch_execz .LBB0_7
; %bb.6:                                ;   in Loop: Header=BB0_5 Depth=1
	global_atomic_cmpswap_b32 v3, v2, v[0:1], s[4:5] glc
	s_and_not1_b32 s1, s1, exec_lo
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, v1, v3
	v_mov_b32_e32 v1, v3
	s_and_b32 s3, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s1, s1, s3
.LBB0_7:                                ; %Flow
                                        ;   in Loop: Header=BB0_5 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, exec_lo, s1
	s_or_b32 s0, s2, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB0_5
.LBB0_8:                                ; %_ZL9AtomicMaxPff.exit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z4corePfiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 12
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z4corePfiii, .Lfunc_end0-_Z4corePfiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1016
; NumSgprs: 18
; NumVgprs: 12
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 12
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z14normaliseFinalPfiii ; -- Begin function _Z14normaliseFinalPfiii
	.globl	_Z14normaliseFinalPfiii
	.p2align	8
	.type	_Z14normaliseFinalPfiii,@function
_Z14normaliseFinalPfiii:                ; @_Z14normaliseFinalPfiii
; %bb.0:
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x8
	s_load_b32 s2, s[0:1], 0x24
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s3, s6, s5
	s_and_b32 s2, s2, 0xffff
	s_add_i32 s3, s3, s15
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s3, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s4, v1
	s_cbranch_execz .LBB1_2
; %bb.1:
	s_load_b64 s[0:1], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, _ZL6maxFFT@rel32@lo+4
	s_addc_u32 s1, s1, _ZL6maxFFT@rel32@hi+12
	s_load_b32 s0, s[0:1], 0x0
	global_load_b32 v2, v[0:1], off
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_div_scale_f32 v3, null, s0, s0, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v4, v3
	s_waitcnt_depctr 0xfff
	v_fma_f32 v5, -v3, v4, 1.0
	v_fmac_f32_e32 v4, v5, v4
	v_div_scale_f32 v5, vcc_lo, v2, s0, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v6, v5, v4
	v_fma_f32 v7, -v3, v6, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v6, v7, v4
	v_fma_f32 v3, -v3, v6, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v3, v3, v4, v6
	v_div_fixup_f32 v2, v3, s0, v2
	global_store_b32 v[0:1], v2, off
.LBB1_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14normaliseFinalPfiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z14normaliseFinalPfiii, .Lfunc_end1-_Z14normaliseFinalPfiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 264
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z12calcTwiddlesPfS_S_S_ ; -- Begin function _Z12calcTwiddlesPfS_S_S_
	.globl	_Z12calcTwiddlesPfS_S_S_
	.p2align	8
	.type	_Z12calcTwiddlesPfS_S_S_,@function
_Z12calcTwiddlesPfS_S_S_:               ; @_Z12calcTwiddlesPfS_S_S_
; %bb.0:
	v_lshlrev_b32_e32 v2, 2, v0
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, offsets@rel32@lo+4
	s_addc_u32 s3, s3, offsets@rel32@hi+12
	global_load_b32 v4, v2, s[2:3]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(0)
	v_lshlrev_b32_e32 v0, 1, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_le_i32_e64 v4, v0
	s_cbranch_execz .LBB2_3
; %bb.1:                                ; %.lr.ph
	s_load_b256 s[0:7], s[0:1], 0x0
	v_dual_mov_b32 v5, 0 :: v_dual_add_nc_u32 v6, 1, v4
	v_mov_b32_e32 v7, 1.0
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, s4, s4, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v1, null, s5, 0, s4
	v_add_co_u32 v2, s4, s6, v2
	v_add_co_ci_u32_e64 v3, null, s7, 0, s4
	s_mov_b32 s4, 0
	s_mov_b32 s5, 0
.LBB2_2:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v8, s5, v4
	s_add_i32 s5, s5, 1
	v_ashrrev_i32_e32 v9, 31, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[8:9], 2, v[8:9]
	v_add_co_u32 v10, vcc_lo, s0, v8
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v11, vcc_lo, s1, v9, vcc_lo
	v_add_co_u32 v8, vcc_lo, s2, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, s3, v9, vcc_lo
	v_cmp_eq_u32_e32 vcc_lo, s5, v6
	global_store_b32 v[10:11], v7, off
	global_store_b32 v[8:9], v5, off
	global_load_b32 v8, v[2:3], off
	global_load_b32 v9, v[0:1], off
	s_or_b32 s4, vcc_lo, s4
	s_waitcnt vmcnt(1)
	v_mul_f32_e32 v10, v7, v8
	v_mul_f32_e32 v8, v5, v8
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v10, v5, v9
	v_fma_f32 v7, v7, v9, -v8
	s_delay_alu instid0(VALU_DEP_2)
	v_mov_b32_e32 v5, v10
	s_and_not1_b32 exec_lo, exec_lo, s4
	s_cbranch_execnz .LBB2_2
.LBB2_3:                                ; %Flow40
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12calcTwiddlesPfS_S_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 32
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 12
		.amdhsa_next_free_sgpr 8
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z12calcTwiddlesPfS_S_S_, .Lfunc_end2-_Z12calcTwiddlesPfS_S_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 284
; NumSgprs: 10
; NumVgprs: 12
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 10
; NumVGPRsForWavesPerEU: 12
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.protected	offsets                 ; @offsets
	.type	offsets,@object
	.section	.bss,"aw",@nobits
	.globl	offsets
	.p2align	4, 0x0
offsets:
	.zero	44
	.size	offsets, 44

	.protected	twiddles_re             ; @twiddles_re
	.type	twiddles_re,@object
	.globl	twiddles_re
	.p2align	4, 0x0
twiddles_re:
	.zero	8188
	.size	twiddles_re, 8188

	.protected	twiddles_im             ; @twiddles_im
	.type	twiddles_im,@object
	.globl	twiddles_im
	.p2align	4, 0x0
twiddles_im:
	.zero	8188
	.size	twiddles_im, 8188

	.protected	in_re                   ; @in_re
	.type	in_re,@object
	.globl	in_re
	.p2align	3, 0x0
in_re:
	.quad	0
	.size	in_re, 8

	.protected	in_im                   ; @in_im
	.type	in_im,@object
	.globl	in_im
	.p2align	3, 0x0
in_im:
	.quad	0
	.size	in_im, 8

	.type	_ZL6maxFFT,@object              ; @_ZL6maxFFT
	.local	_ZL6maxFFT
	.comm	_ZL6maxFFT,4,2
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym offsets
	.addrsig_sym twiddles_re
	.addrsig_sym twiddles_im
	.addrsig_sym in_re
	.addrsig_sym in_im
	.addrsig_sym _ZL6maxFFT
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
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    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
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    .max_flat_workgroup_size: 1024
    .name:           _Z4corePfiii
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    .sgpr_spill_count: 0
    .symbol:         _Z4corePfiii.kd
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    .vgpr_spill_count: 0
    .wavefront_size: 32
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amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
