// nvcc suma.cu -o v && ./v
#include <bits/stdc++.h>
using namespace std;
#define THREADS_PER_BLOCK 1024 //depende de la arquitectura
//#define THREADS_PER_BLOCK 16
#define threadsPB 8

void random_ints(int **&M, int rows, int cols){
    for (int i =0; i < rows; ++i){
        for (int j =0; j < cols; ++j){
            M[i][j] = 1+rand()%10;
        }
    }
}

void resize(int **&M,int rows, int cols){
    M = (int **) malloc(rows * sizeof(int*)) ;
    for(int i = 0; i<rows; i++) {
        M[i] = (int *) malloc(cols * sizeof(int));
    }
}


void imprimir(int **&M, int rows, int cols){
    for(int i=0;i<rows;i++){
        for(int j=0;j<cols;j++){
            cout<<M[i][j]<<" ";
        }
        cout<<endl;
    }
    cout<<endl;
}

//void createMatrixHostCUDA(int**& host, int**& device, int **& aux, int size, int rows, int cols ){
void createMatrixHostCUDA(int**& device, int rows, int cols ){
    //aux =(int **)malloc(rows*sizeof(int*));

    //cudaMalloc((void **)&aux[0],size);
    cudaMalloc((void **)&device,rows*sizeof(int*));

    //for (int i=1; i<rows;++i){
      //  aux[i]=aux[i-1]+cols;
    //}
    //cudaMemcpy(device, aux, rows*sizeof(int*), cudaMemcpyHostToDevice);
}

//=================cuda=================
__global__ void sum(int **A, int **B, int **R, int rows, int cols){
    int i = blockIdx.y * blockDim.y + threadIdx.y;
    int j = blockIdx.x * blockDim.x + threadIdx.x;
    if(i<rows && j<cols){
        R[i][j] = A[i][j] + B[i][j];
    }
}



void cuda_suma(int **h_A, int **h_B, int **h_R, int rows, int cols ){
    int **d_A, **d_B, **d_R; //device copias
    //int **a_aux, **b_aux, **c_aux;
    int size = rows * cols * sizeof(int*);
    //dar memoria en GPU
    //createMatrixHostCUDA(h_A,d_A,a_aux,size,rows,cols);
    //createMatrixHostCUDA(h_B,d_B,b_aux,size,rows,cols);
    //createMatrixHostCUDA(h_R,d_R,c_aux,size,rows,cols);
    createMatrixHostCUDA(d_A,rows,cols);
    createMatrixHostCUDA(d_B,rows,cols);
    createMatrixHostCUDA(d_R,rows,cols);
    //copiar HOST -> DEVICE
    //cudaMemcpy(a_aux[0], h_A[0], size, cudaMemcpyHostToDevice);
    //cudaMemcpy(b_aux[0], h_B[0], size, cudaMemcpyHostToDevice);
    //run kernel //almenos debe contener un bloque
    dim3 threadPerBlock(threadsPB, threadsPB);
    dim3 blockPerGrid((rows+threadPerBlock.x-1)/threadPerBlock.x,(cols+threadPerBlock.y-1)/threadPerBlock.y);
    sum<<<blockPerGrid,threadPerBlock>>>(d_A,d_B,d_R,rows,cols);
    //sum<<<1,512>>>(d_A,d_B,d_R,rows,cols);

    //=====

    //=====

    //copiar DEVICE -> HOST 
    cudaMemcpy(h_R,d_R, size, cudaMemcpyDeviceToHost);

    //free(h_A); free(h_B); free(h_R);
    cudaFree(d_A); cudaFree(d_B); cudaFree(d_R);
    //cudaFree(a_aux); cudaFree(b_aux);cudaFree(c_aux);
}

//======================================

int main(){
    int rows = 8;
    int cols = 8;
    int **A, **B, **R;
    
    resize(A,rows,cols);
    resize(B,rows,cols);
    resize(R,rows,cols);

    random_ints(A,rows,cols);
    random_ints(B,rows,cols);

    cuda_suma(A,B,R,rows,cols);
    imprimir(A,rows,cols);
    imprimir(B,rows,cols);
    imprimir(R,rows,cols);
}



/*
int main(){
    int rows=row;
    int cols=column;
    //srand (time(NULL));
    
    int **h_A, **h_B, **h_R;
    int **d_A, **d_B, **d_R;
    int **a_aux, **b_aux, **c_aux;
    int size = row* column * sizeof(int*);

    
    createMatrixHostCUDA(h_A,d_A,a_aux,size,row,column);
    createMatrixHostCUDA(h_B,d_B,b_aux,size,row,column);
    createMatrixHostCUDA(h_R,d_R,c_aux,size,row,column);
    
    random_ints(h_A,rows,cols);
    random_ints(h_B,rows,cols);

    cudaMemcpy(a_aux[0], h_A[0], size, cudaMemcpyHostToDevice);
    cudaMemcpy(b_aux[0], h_B[0], size, cudaMemcpyHostToDevice);

    
    dim3 threadPerBlock(threadsPB, threadsPB);
    dim3 blockPerGrid((rows+threadPerBlock.x-1)/threadPerBlock.x,(cols+threadPerBlock.y-1)/threadPerBlock.y);
        
    //scalarMult<<<blockPerGrid,threadPerBlock>>>(d_A,2,d_R);
    Multi<<<blockPerGrid,threadPerBlock>>>(d_A,d_B,d_R);
    cudaMemcpy(h_R[0],c_aux[0], size, cudaMemcpyDeviceToHost);
    
    print(h_A,rows,cols);
    print(h_B,rows,cols);
    print(h_R,rows,cols);

    free(h_A); free(h_B); free(h_R);
    cudaFree(d_A); cudaFree(d_B); cudaFree(d_R);
    cudaFree(a_aux[0]);cudaFree(c_aux[0]);
    return 0;
}*/
	.file	"tmpxft_00251d95_00000000-6_test.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB10833:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE10833:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z11random_intsRPPiii
	.type	_Z11random_intsRPPiii, @function
_Z11random_intsRPPiii:
.LFB10825:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$10, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%edx, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	movl	%esi, 12(%rsp)
.L3:
	cmpl	%ebp, 12(%rsp)
	jle	.L2
	leaq	0(,%rbp,8), %r13
	xorl	%ebx, %ebx
.L6:
	cmpl	%ebx, %r14d
	jle	.L9
	call	rand@PLT
	movq	(%r12), %rdx
	movq	(%rdx,%r13), %rsi
	cltd
	idivl	%r15d
	incl	%edx
	movl	%edx, (%rsi,%rbx,4)
	incq	%rbx
	jmp	.L6
.L9:
	incq	%rbp
	jmp	.L3
.L2:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE10825:
	.size	_Z11random_intsRPPiii, .-_Z11random_intsRPPiii
	.globl	_Z6resizeRPPiii
	.type	_Z6resizeRPPiii, @function
_Z6resizeRPPiii:
.LFB10826:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rdi, %rbp
	movslq	%esi, %rdi
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdi, %r12
	salq	$3, %rdi
	movslq	%edx, %rbx
	pushq	%rcx
	.cfi_def_cfa_offset 48
	salq	$2, %rbx
	call	malloc@PLT
	movq	%rax, 0(%rbp)
	movq	%rax, %r13
	xorl	%ebp, %ebp
.L11:
	cmpl	%ebp, %r12d
	jle	.L14
	movq	%rbx, %rdi
	call	malloc@PLT
	movq	%rax, 0(%r13,%rbp,8)
	incq	%rbp
	jmp	.L11
.L14:
	popq	%rax
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE10826:
	.size	_Z6resizeRPPiii, .-_Z6resizeRPPiii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	" "
	.text
	.globl	_Z8imprimirRPPiii
	.type	_Z8imprimirRPPiii, @function
_Z8imprimirRPPiii:
.LFB10827:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	xorl	%r15d, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movl	%edx, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	%esi, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	pushq	%rcx
	.cfi_def_cfa_offset 64
.L16:
	cmpl	%r15d, %r13d
	jle	.L18
	leaq	0(,%r15,8), %rbp
	xorl	%ebx, %ebx
.L19:
	cmpl	%ebx, %r14d
	jle	.L21
	movq	(%r12), %rax
	leaq	_ZSt4cout(%rip), %rdi
	movq	(%rax,%rbp), %rax
	movl	(%rax,%rbx,4), %esi
	incq	%rbx
	call	_ZNSolsEi@PLT
	movl	$1, %edx
	leaq	.LC0(%rip), %rsi
	movq	%rax, %rdi
	call	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l@PLT
	jmp	.L19
.L21:
	leaq	_ZSt4cout(%rip), %rdi
	incq	%r15
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	jmp	.L16
.L18:
	popq	%rax
	.cfi_def_cfa_offset 56
	leaq	_ZSt4cout(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	.cfi_endproc
.LFE10827:
	.size	_Z8imprimirRPPiii, .-_Z8imprimirRPPiii
	.globl	_Z20createMatrixHostCUDARPPiii
	.type	_Z20createMatrixHostCUDARPPiii, @function
_Z20createMatrixHostCUDARPPiii:
.LFB10828:
	.cfi_startproc
	endbr64
	movslq	%esi, %rsi
	salq	$3, %rsi
	jmp	cudaMalloc@PLT
	.cfi_endproc
.LFE10828:
	.size	_Z20createMatrixHostCUDARPPiii, .-_Z20createMatrixHostCUDARPPiii
	.globl	_Z31__device_stub__Z3sumPPiS0_S0_iiPPiS0_S0_ii
	.type	_Z31__device_stub__Z3sumPPiS0_S0_iiPPiS0_S0_ii, @function
_Z31__device_stub__Z3sumPPiS0_S0_iiPPiS0_S0_ii:
.LFB10855:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L23
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z3sumPPiS0_S0_ii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L23:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L25
	call	__stack_chk_fail@PLT
.L25:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE10855:
	.size	_Z31__device_stub__Z3sumPPiS0_S0_iiPPiS0_S0_ii, .-_Z31__device_stub__Z3sumPPiS0_S0_iiPPiS0_S0_ii
	.globl	_Z3sumPPiS0_S0_ii
	.type	_Z3sumPPiS0_S0_ii, @function
_Z3sumPPiS0_S0_ii:
.LFB10856:
	.cfi_startproc
	endbr64
	jmp	_Z31__device_stub__Z3sumPPiS0_S0_iiPPiS0_S0_ii
	.cfi_endproc
.LFE10856:
	.size	_Z3sumPPiS0_S0_ii, .-_Z3sumPPiS0_S0_ii
	.globl	_Z9cuda_sumaPPiS0_S0_ii
	.type	_Z9cuda_sumaPPiS0_S0_ii, @function
_Z9cuda_sumaPPiS0_S0_ii:
.LFB10829:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movq	%rdx, %r14
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movl	%r8d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movslq	%ecx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movl	%r12d, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movq	%r12, %rbx
	salq	$3, %r12
	imull	%r8d, %ebp
	movq	%r12, %rsi
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	sall	$3, %ebp
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rdi
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movq	%r12, %rsi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movq	%r12, %rsi
	call	cudaMalloc@PLT
	leal	7(%rbx), %eax
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	shrl	$3, %eax
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$34359738376, %rdx
	movl	%eax, 44(%rsp)
	leal	7(%r13), %eax
	shrl	$3, %eax
	movl	%eax, 48(%rsp)
	movq	44(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L29
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movl	%r13d, %r8d
	movl	%ebx, %ecx
	movq	8(%rsp), %rdi
	call	_Z31__device_stub__Z3sumPPiS0_S0_iiPPiS0_S0_ii
.L29:
	movq	24(%rsp), %rsi
	movslq	%ebp, %rdx
	movl	$2, %ecx
	movq	%r14, %rdi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L30
	call	__stack_chk_fail@PLT
.L30:
	addq	$64, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE10829:
	.size	_Z9cuda_sumaPPiS0_S0_ii, .-_Z9cuda_sumaPPiS0_S0_ii
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB10830:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	$8, %edx
	movl	$8, %esi
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	movq	%fs:40, %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	movq	%rsp, %rbp
	leaq	8(%rsp), %rbx
	leaq	16(%rsp), %r12
	movq	%rbp, %rdi
	call	_Z6resizeRPPiii
	movl	$8, %edx
	movl	$8, %esi
	movq	%rbx, %rdi
	call	_Z6resizeRPPiii
	movl	$8, %edx
	movl	$8, %esi
	movq	%r12, %rdi
	call	_Z6resizeRPPiii
	movl	$8, %edx
	movl	$8, %esi
	movq	%rbp, %rdi
	call	_Z11random_intsRPPiii
	movl	$8, %edx
	movl	$8, %esi
	movq	%rbx, %rdi
	call	_Z11random_intsRPPiii
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rsi
	movl	$8, %r8d
	movq	(%rsp), %rdi
	movl	$8, %ecx
	call	_Z9cuda_sumaPPiS0_S0_ii
	movl	$8, %edx
	movl	$8, %esi
	movq	%rbp, %rdi
	call	_Z8imprimirRPPiii
	movl	$8, %edx
	movl	$8, %esi
	movq	%rbx, %rdi
	call	_Z8imprimirRPPiii
	movl	$8, %edx
	movl	$8, %esi
	movq	%r12, %rdi
	call	_Z8imprimirRPPiii
	movq	24(%rsp), %rax
	subq	%fs:40, %rax
	je	.L33
	call	__stack_chk_fail@PLT
.L33:
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE10830:
	.size	main, .-main
	.section	.rodata.str1.1
.LC1:
	.string	"_Z3sumPPiS0_S0_ii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB10858:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC1(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z3sumPPiS0_S0_ii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE10858:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

// nvcc suma.cu -o v && ./v

#include <hip/hip_runtime.h>
#include <bits/stdc++.h>
using namespace std;
#define THREADS_PER_BLOCK 1024 //depende de la arquitectura
//#define THREADS_PER_BLOCK 16
#define threadsPB 8

void random_ints(int **&M, int rows, int cols){
    for (int i =0; i < rows; ++i){
        for (int j =0; j < cols; ++j){
            M[i][j] = 1+rand()%10;
        }
    }
}

void resize(int **&M,int rows, int cols){
    M = (int **) malloc(rows * sizeof(int*)) ;
    for(int i = 0; i<rows; i++) {
        M[i] = (int *) malloc(cols * sizeof(int));
    }
}


void imprimir(int **&M, int rows, int cols){
    for(int i=0;i<rows;i++){
        for(int j=0;j<cols;j++){
            cout<<M[i][j]<<" ";
        }
        cout<<endl;
    }
    cout<<endl;
}

//void createMatrixHostCUDA(int**& host, int**& device, int **& aux, int size, int rows, int cols ){
void createMatrixHostCUDA(int**& device, int rows, int cols ){
    //aux =(int **)malloc(rows*sizeof(int*));

    //cudaMalloc((void **)&aux[0],size);
    hipMalloc((void **)&device,rows*sizeof(int*));

    //for (int i=1; i<rows;++i){
      //  aux[i]=aux[i-1]+cols;
    //}
    //cudaMemcpy(device, aux, rows*sizeof(int*), cudaMemcpyHostToDevice);
}

//=================cuda=================
__global__ void sum(int **A, int **B, int **R, int rows, int cols){
    int i = blockIdx.y * blockDim.y + threadIdx.y;
    int j = blockIdx.x * blockDim.x + threadIdx.x;
    if(i<rows && j<cols){
        R[i][j] = A[i][j] + B[i][j];
    }
}



void cuda_suma(int **h_A, int **h_B, int **h_R, int rows, int cols ){
    int **d_A, **d_B, **d_R; //device copias
    //int **a_aux, **b_aux, **c_aux;
    int size = rows * cols * sizeof(int*);
    //dar memoria en GPU
    //createMatrixHostCUDA(h_A,d_A,a_aux,size,rows,cols);
    //createMatrixHostCUDA(h_B,d_B,b_aux,size,rows,cols);
    //createMatrixHostCUDA(h_R,d_R,c_aux,size,rows,cols);
    createMatrixHostCUDA(d_A,rows,cols);
    createMatrixHostCUDA(d_B,rows,cols);
    createMatrixHostCUDA(d_R,rows,cols);
    //copiar HOST -> DEVICE
    //cudaMemcpy(a_aux[0], h_A[0], size, cudaMemcpyHostToDevice);
    //cudaMemcpy(b_aux[0], h_B[0], size, cudaMemcpyHostToDevice);
    //run kernel //almenos debe contener un bloque
    dim3 threadPerBlock(threadsPB, threadsPB);
    dim3 blockPerGrid((rows+threadPerBlock.x-1)/threadPerBlock.x,(cols+threadPerBlock.y-1)/threadPerBlock.y);
    sum<<<blockPerGrid,threadPerBlock>>>(d_A,d_B,d_R,rows,cols);
    //sum<<<1,512>>>(d_A,d_B,d_R,rows,cols);

    //=====

    //=====

    //copiar DEVICE -> HOST 
    hipMemcpy(h_R,d_R, size, hipMemcpyDeviceToHost);

    //free(h_A); free(h_B); free(h_R);
    hipFree(d_A); hipFree(d_B); hipFree(d_R);
    //cudaFree(a_aux); cudaFree(b_aux);cudaFree(c_aux);
}

//======================================

int main(){
    int rows = 8;
    int cols = 8;
    int **A, **B, **R;
    
    resize(A,rows,cols);
    resize(B,rows,cols);
    resize(R,rows,cols);

    random_ints(A,rows,cols);
    random_ints(B,rows,cols);

    cuda_suma(A,B,R,rows,cols);
    imprimir(A,rows,cols);
    imprimir(B,rows,cols);
    imprimir(R,rows,cols);
}



/*
int main(){
    int rows=row;
    int cols=column;
    //srand (time(NULL));
    
    int **h_A, **h_B, **h_R;
    int **d_A, **d_B, **d_R;
    int **a_aux, **b_aux, **c_aux;
    int size = row* column * sizeof(int*);

    
    createMatrixHostCUDA(h_A,d_A,a_aux,size,row,column);
    createMatrixHostCUDA(h_B,d_B,b_aux,size,row,column);
    createMatrixHostCUDA(h_R,d_R,c_aux,size,row,column);
    
    random_ints(h_A,rows,cols);
    random_ints(h_B,rows,cols);

    cudaMemcpy(a_aux[0], h_A[0], size, cudaMemcpyHostToDevice);
    cudaMemcpy(b_aux[0], h_B[0], size, cudaMemcpyHostToDevice);

    
    dim3 threadPerBlock(threadsPB, threadsPB);
    dim3 blockPerGrid((rows+threadPerBlock.x-1)/threadPerBlock.x,(cols+threadPerBlock.y-1)/threadPerBlock.y);
        
    //scalarMult<<<blockPerGrid,threadPerBlock>>>(d_A,2,d_R);
    Multi<<<blockPerGrid,threadPerBlock>>>(d_A,d_B,d_R);
    cudaMemcpy(h_R[0],c_aux[0], size, cudaMemcpyDeviceToHost);
    
    print(h_A,rows,cols);
    print(h_B,rows,cols);
    print(h_R,rows,cols);

    free(h_A); free(h_B); free(h_R);
    cudaFree(d_A); cudaFree(d_B); cudaFree(d_R);
    cudaFree(a_aux[0]);cudaFree(c_aux[0]);
    return 0;
}*/
	.text
	.file	"test.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z11random_intsRPPiii           # -- Begin function _Z11random_intsRPPiii
	.type	_Z11random_intsRPPiii,@function
_Z11random_intsRPPiii:                  # @_Z11random_intsRPPiii
	.cfi_startproc
# %bb.0:
	testl	%esi, %esi
	jle	.LBB0_7
# %bb.1:                                # %.preheader.lr.ph
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%edx, %ebx
	movq	%rdi, %r14
	movl	%esi, %r15d
	movl	%edx, %r12d
	xorl	%r13d, %r13d
.LBB0_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_4 Depth 2
	testl	%ebx, %ebx
	jle	.LBB0_5
# %bb.3:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB0_2 Depth=1
	xorl	%ebp, %ebp
.LBB0_4:                                # %.lr.ph
                                        #   Parent Loop BB0_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	cltq
	imulq	$1717986919, %rax, %rcx         # imm = 0x66666667
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$34, %rcx
	addl	%edx, %ecx
	addl	%ecx, %ecx
	leal	(%rcx,%rcx,4), %ecx
	negl	%ecx
	addl	%ecx, %eax
	incl	%eax
	movq	(%r14), %rcx
	movq	(%rcx,%r13,8), %rcx
	movl	%eax, (%rcx,%rbp,4)
	incq	%rbp
	cmpq	%rbp, %r12
	jne	.LBB0_4
.LBB0_5:                                # %._crit_edge
                                        #   in Loop: Header=BB0_2 Depth=1
	incq	%r13
	cmpq	%r15, %r13
	jne	.LBB0_2
# %bb.6:
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r12
	.cfi_restore %r13
	.cfi_restore %r14
	.cfi_restore %r15
	.cfi_restore %rbp
.LBB0_7:                                # %._crit_edge11
	retq
.Lfunc_end0:
	.size	_Z11random_intsRPPiii, .Lfunc_end0-_Z11random_intsRPPiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z6resizeRPPiii                 # -- Begin function _Z6resizeRPPiii
	.type	_Z6resizeRPPiii,@function
_Z6resizeRPPiii:                        # @_Z6resizeRPPiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%edx, %r14d
	movl	%esi, %ebp
	movq	%rdi, %rbx
	movslq	%esi, %r15
	leaq	(,%r15,8), %rdi
	callq	malloc
	movq	%rax, (%rbx)
	testl	%r15d, %r15d
	jle	.LBB1_3
# %bb.1:                                # %.lr.ph
	movslq	%r14d, %r14
	shlq	$2, %r14
	movl	%ebp, %r15d
	xorl	%r12d, %r12d
.LBB1_2:                                # =>This Inner Loop Header: Depth=1
	movq	%r14, %rdi
	callq	malloc
	movq	(%rbx), %rcx
	movq	%rax, (%rcx,%r12,8)
	incq	%r12
	cmpq	%r12, %r15
	jne	.LBB1_2
.LBB1_3:                                # %._crit_edge
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z6resizeRPPiii, .Lfunc_end1-_Z6resizeRPPiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z8imprimirRPPiii               # -- Begin function _Z8imprimirRPPiii
	.type	_Z8imprimirRPPiii,@function
_Z8imprimirRPPiii:                      # @_Z8imprimirRPPiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	testl	%esi, %esi
	jle	.LBB2_6
# %bb.1:                                # %.preheader.lr.ph
	movl	%edx, %ebx
	movq	%rdi, %r14
	movl	%esi, %r15d
	movl	%edx, %r12d
	xorl	%r13d, %r13d
.LBB2_2:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_4 Depth 2
	testl	%ebx, %ebx
	jle	.LBB2_5
# %bb.3:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB2_2 Depth=1
	xorl	%ebp, %ebp
.LBB2_4:                                # %.lr.ph
                                        #   Parent Loop BB2_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	(%r14), %rax
	movq	(%rax,%r13,8), %rax
	movl	(%rax,%rbp,4), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSolsEi
	movl	$.L.str, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	incq	%rbp
	cmpq	%rbp, %r12
	jne	.LBB2_4
.LBB2_5:                                # %._crit_edge
                                        #   in Loop: Header=BB2_2 Depth=1
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	movl	$_ZSt4cout, %eax
	addq	%rax, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	incq	%r13
	cmpq	%r15, %r13
	jne	.LBB2_2
.LBB2_6:                                # %._crit_edge11
	movq	_ZSt4cout(%rip), %rax
	movl	$_ZSt4cout, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_ZNSo5flushEv                   # TAILCALL
.Lfunc_end2:
	.size	_Z8imprimirRPPiii, .Lfunc_end2-_Z8imprimirRPPiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z20createMatrixHostCUDARPPiii  # -- Begin function _Z20createMatrixHostCUDARPPiii
	.type	_Z20createMatrixHostCUDARPPiii,@function
_Z20createMatrixHostCUDARPPiii:         # @_Z20createMatrixHostCUDARPPiii
	.cfi_startproc
# %bb.0:
	movslq	%esi, %rsi
	shlq	$3, %rsi
	jmp	hipMalloc                       # TAILCALL
.Lfunc_end3:
	.size	_Z20createMatrixHostCUDARPPiii, .Lfunc_end3-_Z20createMatrixHostCUDARPPiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z18__device_stub__sumPPiS0_S0_ii # -- Begin function _Z18__device_stub__sumPPiS0_S0_ii
	.type	_Z18__device_stub__sumPPiS0_S0_ii,@function
_Z18__device_stub__sumPPiS0_S0_ii:      # @_Z18__device_stub__sumPPiS0_S0_ii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	movq	%rsp, %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z3sumPPiS0_S0_ii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z18__device_stub__sumPPiS0_S0_ii, .Lfunc_end4-_Z18__device_stub__sumPPiS0_S0_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z9cuda_sumaPPiS0_S0_ii         # -- Begin function _Z9cuda_sumaPPiS0_S0_ii
	.type	_Z9cuda_sumaPPiS0_S0_ii,@function
_Z9cuda_sumaPPiS0_S0_ii:                # @_Z9cuda_sumaPPiS0_S0_ii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r8d, %r14d
	movl	%ecx, %ebp
	movq	%rdx, %rbx
	movslq	%ecx, %r12
	leaq	(,%r12,8), %r15
	leaq	24(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	addl	$7, %r12d
	shrl	$3, %r12d
	leal	7(%r14), %edi
	shrl	$3, %edi
	shlq	$32, %rdi
	orq	%r12, %rdi
	movabsq	$34359738376, %rdx              # imm = 0x800000008
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_2
# %bb.1:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	movl	%ebp, %ecx
	movl	%r14d, %r8d
	callq	_Z18__device_stub__sumPPiS0_S0_ii
.LBB5_2:
	imull	%r14d, %ebp
	shll	$3, %ebp
	movq	8(%rsp), %rsi
	movslq	%ebp, %rdx
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z9cuda_sumaPPiS0_S0_ii, .Lfunc_end5-_Z9cuda_sumaPPiS0_S0_ii
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$64, %edi
	callq	malloc
	movq	%rax, %r15
	movq	%rax, 24(%rsp)
	xorl	%ebx, %ebx
.LBB6_1:                                # =>This Inner Loop Header: Depth=1
	movl	$32, %edi
	callq	malloc
	movq	%rax, (%r15,%rbx,8)
	incq	%rbx
	cmpq	$8, %rbx
	jne	.LBB6_1
# %bb.2:                                # %_Z6resizeRPPiii.exit
	movl	$64, %edi
	callq	malloc
	movq	%rax, %rbx
	movq	%rax, 16(%rsp)
	xorl	%r14d, %r14d
.LBB6_3:                                # =>This Inner Loop Header: Depth=1
	movl	$32, %edi
	callq	malloc
	movq	%rax, (%rbx,%r14,8)
	incq	%r14
	cmpq	$8, %r14
	jne	.LBB6_3
# %bb.4:                                # %_Z6resizeRPPiii.exit21
	movl	$64, %edi
	callq	malloc
	movq	%rax, %r14
	movq	%rax, 8(%rsp)
	xorl	%r12d, %r12d
.LBB6_5:                                # =>This Inner Loop Header: Depth=1
	movl	$32, %edi
	callq	malloc
	movq	%rax, (%r14,%r12,8)
	incq	%r12
	cmpq	$8, %r12
	jne	.LBB6_5
# %bb.6:                                # %.preheader.i.preheader
	xorl	%r12d, %r12d
.LBB6_7:                                # %.preheader.i
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB6_8 Depth 2
	xorl	%r13d, %r13d
.LBB6_8:                                # %.lr.ph.i
                                        #   Parent Loop BB6_7 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	cltq
	imulq	$1717986919, %rax, %rcx         # imm = 0x66666667
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$34, %rcx
	addl	%edx, %ecx
	addl	%ecx, %ecx
	leal	(%rcx,%rcx,4), %ecx
	negl	%ecx
	addl	%ecx, %eax
	incl	%eax
	movq	(%r15,%r12,8), %rcx
	movl	%eax, (%rcx,%r13,4)
	incq	%r13
	cmpq	$8, %r13
	jne	.LBB6_8
# %bb.9:                                # %._crit_edge.i
                                        #   in Loop: Header=BB6_7 Depth=1
	incq	%r12
	cmpq	$8, %r12
	jne	.LBB6_7
# %bb.10:                               # %.preheader.i29.preheader
	xorl	%r15d, %r15d
.LBB6_11:                               # %.preheader.i29
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB6_12 Depth 2
	xorl	%r12d, %r12d
.LBB6_12:                               # %.lr.ph.i31
                                        #   Parent Loop BB6_11 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	rand
	cltq
	imulq	$1717986919, %rax, %rcx         # imm = 0x66666667
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$34, %rcx
	addl	%edx, %ecx
	addl	%ecx, %ecx
	leal	(%rcx,%rcx,4), %ecx
	negl	%ecx
	addl	%ecx, %eax
	incl	%eax
	movq	(%rbx,%r15,8), %rcx
	movl	%eax, (%rcx,%r12,4)
	incq	%r12
	cmpq	$8, %r12
	jne	.LBB6_12
# %bb.13:                               # %._crit_edge.i35
                                        #   in Loop: Header=BB6_11 Depth=1
	incq	%r15
	cmpq	$8, %r15
	jne	.LBB6_11
# %bb.14:                               # %_Z11random_intsRPPiii.exit38
	movq	%r14, %rdx
	movl	$8, %ecx
	movl	$8, %r8d
	callq	_Z9cuda_sumaPPiS0_S0_ii
	leaq	24(%rsp), %rdi
	movl	$8, %esi
	movl	$8, %edx
	callq	_Z8imprimirRPPiii
	leaq	16(%rsp), %rdi
	movl	$8, %esi
	movl	$8, %edx
	callq	_Z8imprimirRPPiii
	leaq	8(%rsp), %rdi
	movl	$8, %esi
	movl	$8, %edx
	callq	_Z8imprimirRPPiii
	xorl	%eax, %eax
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	main, .Lfunc_end6-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB7_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB7_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z3sumPPiS0_S0_ii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end7:
	.size	__hip_module_ctor, .Lfunc_end7-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB8_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB8_2:
	retq
.Lfunc_end8:
	.size	__hip_module_dtor, .Lfunc_end8-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	" "
	.size	.L.str, 2

	.type	_Z3sumPPiS0_S0_ii,@object       # @_Z3sumPPiS0_S0_ii
	.section	.rodata,"a",@progbits
	.globl	_Z3sumPPiS0_S0_ii
	.p2align	3, 0x0
_Z3sumPPiS0_S0_ii:
	.quad	_Z18__device_stub__sumPPiS0_S0_ii
	.size	_Z3sumPPiS0_S0_ii, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z3sumPPiS0_S0_ii"
	.size	.L__unnamed_1, 18

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z18__device_stub__sumPPiS0_S0_ii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _ZSt4cout
	.addrsig_sym _Z3sumPPiS0_S0_ii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z3sumPPiS0_S0_ii       ; -- Begin function _Z3sumPPiS0_S0_ii
	.globl	_Z3sumPPiS0_S0_ii
	.p2align	8
	.type	_Z3sumPPiS0_S0_ii,@function
_Z3sumPPiS0_S0_ii:                      ; @_Z3sumPPiS0_S0_ii
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x2c
	s_load_b64 s[2:3], s[0:1], 0x18
	v_bfe_u32 v1, v0, 10, 10
	v_and_b32_e32 v4, 0x3ff, v0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s5, s4, 16
	s_and_b32 s4, s4, 0xffff
	v_mad_u64_u32 v[2:3], null, s15, s5, v[1:2]
	v_mad_u64_u32 v[0:1], null, s14, s4, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e32 vcc_lo, s2, v2
	v_cmp_gt_i32_e64 s2, s3, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, vcc_lo, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v3, 31, v2
	s_load_b64 s[0:1], s[0:1], 0x10
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[2:3], 3, v[2:3]
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
	v_add_co_u32 v6, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v3, vcc_lo
	global_load_b64 v[4:5], v[4:5], off
	global_load_b64 v[6:7], v[6:7], off
	s_waitcnt vmcnt(1)
	v_add_co_u32 v4, vcc_lo, v4, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_co_u32 v6, vcc_lo, v6, v0
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v1, vcc_lo
	v_add_co_u32 v2, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v3, vcc_lo
	global_load_b32 v4, v[4:5], off
	global_load_b32 v5, v[6:7], off
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(1)
	v_add_nc_u32_e32 v4, v5, v4
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, v3, v1, vcc_lo
	global_store_b32 v[0:1], v4, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z3sumPPiS0_S0_ii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z3sumPPiS0_S0_ii, .Lfunc_end0-_Z3sumPPiS0_S0_ii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 304
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z3sumPPiS0_S0_ii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z3sumPPiS0_S0_ii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
