#include<stdio.h>
#define BUF_SIZE 20 * 1048576

__global__ void get_nl_count(char *buf, int n, int *out) {
    int tid = threadIdx.x;
    __shared__ volatile int cnt[256];
    for (int i = tid + blockDim.x * blockIdx.x, j = blockIdx.x; j < n; i += blockDim.x * gridDim.x, j += gridDim.x) {
        cnt[tid] = buf[i] == '\n';
        //__syncthreads();
        //if (tid < 512) cnt[tid] += cnt[tid+512];
        //__syncthreads();
        //if (tid < 256) cnt[tid] += cnt[tid+256];
        __syncthreads();
        if (tid < 128) cnt[tid] += cnt[tid+128];
        __syncthreads();
        if (tid < 64) cnt[tid] += cnt[tid+64];
        __syncthreads();
        if (tid < 32) {
            cnt[tid] += cnt[tid+32];
            cnt[tid] += cnt[tid+16];
            cnt[tid] += cnt[tid+8];
            cnt[tid] += cnt[tid+4];
            cnt[tid] += cnt[tid+2];
            cnt[tid] += cnt[tid+1];
            if (tid == 0) out[j] = cnt[0];
        }
        __syncthreads();
    }
}

__global__ void get_line_pos(char *buf, int n, int *pos, int *out) {
    int tid = threadIdx.x;
    __shared__ int cnt[256], cnt2[256];
    for (int i = tid + blockDim.x * blockIdx.x, j = blockIdx.x; j < n; i += blockDim.x * gridDim.x, j += gridDim.x) {
        int b = buf[i] == '\n';
        cnt[tid] = b;
        if (tid == 0) cnt[0] += pos[j];
        // reduce sum
        __syncthreads();
        #pragma unroll
        for (int dd = 0; dd < 8; dd += 2) {
            cnt2[tid] = tid >= 1<<dd ? cnt[tid] + cnt[tid-(1<<dd)] : cnt[tid];
            __syncthreads();
            cnt[tid] = tid >= 2<<dd ? cnt2[tid] + cnt2[tid-(2<<dd)] : cnt2[tid];
            __syncthreads();
        }
        if (b) out[cnt[tid]-1] = i;
    }
}

__global__ void parse(char *buf, int *bmp, int n) {
    int gid = threadIdx.x + blockDim.x * blockIdx.x;
    for (int i = gid; i < n - 1; i += blockDim.x * gridDim.x) {
        int pos = bmp[i] + 1;
        int red = 0, green = 0, blue = 0;
        while (buf[pos] <= ' ' && buf[pos] != '\n') { pos += 1; }
        while (buf[pos] >= '0' && buf[pos] <= '9') {
            red = red * 10 + (buf[pos] - '0');
            pos += 1;
        }
        while (buf[pos] <= ' ' && buf[pos] != '\n') { pos += 1; }
        while (buf[pos] >= '0' && buf[pos] <= '9') {
            green = green * 10 + (buf[pos] - '0');
            pos += 1;
        }
        while (buf[pos] <= ' ' && buf[pos] != '\n') { pos += 1; }
        while (buf[pos] >= '0' && buf[pos] <= '9') {
            blue = blue * 10 + (buf[pos] - '0');
            pos += 1;
        }
        bmp[i] = red | green<<8 | blue<<16;
    }
}

__global__ void hist_kern(int *bmp, int n, int *out) {
    __shared__ int sr[256], sg[256], sb[256];
    int gid = threadIdx.x + blockDim.x * blockIdx.x;
    sr[threadIdx.x] = 0;
    sg[threadIdx.x] = 0;
    sb[threadIdx.x] = 0;
    __syncthreads();
    for (int i = gid; i < n; i += blockDim.x * gridDim.x) {
        int rgb = bmp[i];
        atomicAdd(&sr[rgb & 255], 1);
        atomicAdd(&sg[rgb >> 8 & 255], 1);
        atomicAdd(&sb[rgb >> 16 & 255], 1);
    }
    __syncthreads();
    out[gid] += sr[threadIdx.x];
    out[gid + 256 * gridDim.x] += sg[threadIdx.x];
    out[gid + 256 * gridDim.x * 2] += sb[threadIdx.x];
}

int main() {
    if (cudaSetDevice(0) != cudaSuccess) return 2;
    cudaDeviceProp prop;
    cudaGetDeviceProperties(&prop, 0);
    printf("using GPU %s\n", prop.name);
    int smcount = prop.multiProcessorCount;

    cudaEvent_t e, e2;
    cudaEventCreate(&e);
    cudaEventCreate(&e2);

    char *gpu_buf, *buf;
    cudaHostAlloc(&buf, BUF_SIZE + 100, cudaHostAllocDefault);
    cudaMalloc(&gpu_buf, BUF_SIZE + 100);

    int *gpu_what, *what;
    cudaMalloc(&gpu_what, sizeof(int) * 1048576);

    int *hist = new int[256*3*4*smcount], *gpu_hist;
    cudaMalloc(&gpu_hist, sizeof(int) * (256*3*4*smcount));
    cudaMemset(gpu_hist, 0, sizeof(int) * (256*3*4*smcount));
    int histogram_results[768] = {0};

    what = new int[1048576];
    FILE *inFile = fopen("input", "rb");
    FILE *outFile = fopen("yyyyyy.out", "wb");
    if (!inFile || !outFile) return 1;
    printf("open file\n");
    unsigned n = 0;
    if (fscanf(inFile, "%u", &n) != 1 || n%3 != 0) return 1;

    int *bmp = new int[n/3], *gpu_bmp;
    cudaMalloc(&gpu_bmp, sizeof(int) * BUF_SIZE);

    fgets(buf, BUF_SIZE-1, inFile);
    int bytes_read, tail = 1;
    unsigned sum = 0;
    buf[0] = '\n';
    cudaEventRecord(e, 0);
    while ((bytes_read = fread(buf + tail, 1, BUF_SIZE - tail, inFile)) > 0) {
        printf("read %d bytes\n", bytes_read);
        int blocks = (tail + bytes_read-1) / 256 + 1;

        for (int i = bytes_read + tail; i < blocks*256; i++) buf[i] = 0;

        cudaMemcpy(gpu_buf, buf, BUF_SIZE, cudaMemcpyHostToDevice);
        get_nl_count<<<8*smcount, 256>>>(gpu_buf, blocks, gpu_what);
        cudaMemcpy(what, gpu_what, sizeof(int) * blocks, cudaMemcpyDeviceToHost);

        unsigned sum2 = sum;
        for (int i = 0; i < blocks; i++) sum2 += what[i];
        for (int i = 1; i < blocks; i++) what[i] += what[i-1];
        for (int i = blocks-1; i > 0; i--) what[i] = what[i-1];
        what[0] = 0;

        cudaMemcpy(gpu_what, what, sizeof(int) * blocks, cudaMemcpyHostToDevice);
        get_line_pos<<<8*smcount, 256>>>(gpu_buf, blocks, gpu_what, gpu_bmp);
        //cudaDeviceSynchronize();

        //cudaMemcpy(bmp + sum, gpu_bmp, sizeof(int) * (sum2 - sum), cudaMemcpyDeviceToHost);
        parse<<<8*smcount, 256>>>(gpu_buf, gpu_bmp, sum2 - sum);
        //cudaDeviceSynchronize();

        hist_kern<<<4*smcount, 256>>>(gpu_bmp, sum2-1 - sum, gpu_hist);

        printf("sum = %u sum2 = %u\n", sum, sum2);
        sum = sum2-1;
        
        if (bytes_read + tail < BUF_SIZE) break;
        for (tail = 1; tail <= BUF_SIZE; tail++) {
            if (buf[BUF_SIZE - tail] == '\n') break;
        }
        if (tail > BUF_SIZE) tail = 0;
        for (int i = 0; i < tail; i++) buf[i] = buf[i + BUF_SIZE-tail];
    }

    cudaMemcpy(hist, gpu_hist, sizeof(int) * (256*3*4*smcount), cudaMemcpyDeviceToHost);
    for (int c = 0; c < 3; c++) {
        for (int i = 0; i < 4*smcount; i++) {
            for (int j = 0; j < 256; j++) histogram_results[j+c*256] += hist[j+i*256+c*256*20];
        }
    }

    int sum2 = 0;
    for (int i = 0; i < 768; i++) {
        if (i%256 == 0 && i != 0) fputc('\n', outFile);
        fprintf(outFile, "%d ", histogram_results[i]);
        sum2 += histogram_results[i];
    }

    cudaEventRecord(e2, 0);
    float t;
    cudaEventSynchronize(e);
    cudaEventSynchronize(e2);
    cudaEventElapsedTime(&t, e, e2);
    printf("%d %d %f %d\n", n, sum, t, sum2);

    fclose(inFile);
    fclose(outFile);
    delete[] what;
    cudaFree(gpu_what);
    cudaFreeHost(buf);
}

	.file	"tmpxft_00372873_00000000-6_hh.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z35__device_stub__Z12get_nl_countPciPiPciPi
	.type	_Z35__device_stub__Z12get_nl_countPciPiPciPi, @function
_Z35__device_stub__Z12get_nl_countPciPiPciPi:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movl	%esi, 20(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z12get_nl_countPciPi(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L2:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z35__device_stub__Z12get_nl_countPciPiPciPi, .-_Z35__device_stub__Z12get_nl_countPciPiPciPi
	.globl	_Z12get_nl_countPciPi
	.type	_Z12get_nl_countPciPi, @function
_Z12get_nl_countPciPi:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z12get_nl_countPciPiPciPi
	.cfi_endproc
.LFE2053:
	.size	_Z12get_nl_countPciPi, .-_Z12get_nl_countPciPi
	.globl	_Z38__device_stub__Z12get_line_posPciPiS0_PciPiS0_
	.type	_Z38__device_stub__Z12get_line_posPciPiS0_PciPiS0_, @function
_Z38__device_stub__Z12get_line_posPciPiS0_PciPiS0_:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movl	%esi, 20(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z12get_line_posPciPiS0_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L8:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z38__device_stub__Z12get_line_posPciPiS0_PciPiS0_, .-_Z38__device_stub__Z12get_line_posPciPiS0_PciPiS0_
	.globl	_Z12get_line_posPciPiS0_
	.type	_Z12get_line_posPciPiS0_, @function
_Z12get_line_posPciPiS0_:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z38__device_stub__Z12get_line_posPciPiS0_PciPiS0_
	.cfi_endproc
.LFE2055:
	.size	_Z12get_line_posPciPiS0_, .-_Z12get_line_posPciPiS0_
	.globl	_Z27__device_stub__Z5parsePcPiiPcPii
	.type	_Z27__device_stub__Z5parsePcPiiPcPii, @function
_Z27__device_stub__Z5parsePcPiiPcPii:
.LFB2056:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L13
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z5parsePcPii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L13:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L15
	call	__stack_chk_fail@PLT
.L15:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2056:
	.size	_Z27__device_stub__Z5parsePcPiiPcPii, .-_Z27__device_stub__Z5parsePcPiiPcPii
	.globl	_Z5parsePcPii
	.type	_Z5parsePcPii, @function
_Z5parsePcPii:
.LFB2057:
	.cfi_startproc
	endbr64
	jmp	_Z27__device_stub__Z5parsePcPiiPcPii
	.cfi_endproc
.LFE2057:
	.size	_Z5parsePcPii, .-_Z5parsePcPii
	.globl	_Z31__device_stub__Z9hist_kernPiiS_PiiS_
	.type	_Z31__device_stub__Z9hist_kernPiiS_PiiS_, @function
_Z31__device_stub__Z9hist_kernPiiS_PiiS_:
.LFB2058:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movl	%esi, 20(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L18
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z9hist_kernPiiS_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L18:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L20
	call	__stack_chk_fail@PLT
.L20:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2058:
	.size	_Z31__device_stub__Z9hist_kernPiiS_PiiS_, .-_Z31__device_stub__Z9hist_kernPiiS_PiiS_
	.globl	_Z9hist_kernPiiS_
	.type	_Z9hist_kernPiiS_, @function
_Z9hist_kernPiiS_:
.LFB2059:
	.cfi_startproc
	endbr64
	jmp	_Z31__device_stub__Z9hist_kernPiiS_PiiS_
	.cfi_endproc
.LFE2059:
	.size	_Z9hist_kernPiiS_, .-_Z9hist_kernPiiS_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"using GPU %s\n"
.LC1:
	.string	"rb"
.LC2:
	.string	"input"
.LC3:
	.string	"wb"
.LC4:
	.string	"yyyyyy.out"
.LC5:
	.string	"open file\n"
.LC6:
	.string	"%u"
.LC7:
	.string	"read %d bytes\n"
.LC8:
	.string	"sum = %u sum2 = %u\n"
.LC9:
	.string	"%d "
.LC10:
	.string	"%d %d %f %d\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$4096, %rsp
	.cfi_def_cfa_offset 4152
	orq	$0, (%rsp)
	subq	$168, %rsp
	.cfi_def_cfa_offset 4320
	xorl	%edi, %edi
	movq	%fs:40, %rax
	movq	%rax, 4248(%rsp)
	xorl	%eax, %eax
	call	cudaSetDevice@PLT
	testl	%eax, %eax
	jne	.L55
	leaq	144(%rsp), %rbp
	xorl	%esi, %esi
	movl	%eax, %ebx
	movq	%rbp, %rdi
	call	cudaGetDeviceProperties_v2@PLT
	movq	%rbp, %rdx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC0(%rip), %rsi
	call	__printf_chk@PLT
	leaq	64(%rsp), %rdi
	movl	532(%rsp), %r13d
	call	cudaEventCreate@PLT
	leaq	72(%rsp), %rdi
	call	cudaEventCreate@PLT
	xorl	%edx, %edx
	leaq	88(%rsp), %rdi
	movl	$20971620, %esi
	call	cudaHostAlloc@PLT
	leaq	80(%rsp), %rdi
	movl	$20971620, %esi
	call	cudaMalloc@PLT
	leaq	96(%rsp), %rdi
	movl	$4194304, %esi
	call	cudaMalloc@PLT
	imull	$3072, %r13d, %eax
	movabsq	$2305843009213693950, %rdx
	cltq
	cmpq	%rax, %rdx
	jb	.L25
	salq	$2, %rax
	movq	%rax, %rdi
	movq	%rax, 16(%rsp)
	call	_Znam@PLT
	movq	16(%rsp), %rsi
	leaq	104(%rsp), %rdi
	movq	%rax, 32(%rsp)
	call	cudaMalloc@PLT
	movq	16(%rsp), %rdx
	movq	104(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaMemset@PLT
	movl	%ebx, %eax
	movl	$768, %ecx
	leaq	1176(%rsp), %rdi
	rep stosl
	movl	$4194304, %edi
	call	_Znam@PLT
	leaq	.LC1(%rip), %rsi
	leaq	.LC2(%rip), %rdi
	movq	%rax, %rbx
	call	fopen@PLT
	leaq	.LC3(%rip), %rsi
	leaq	.LC4(%rip), %rdi
	movq	%rax, (%rsp)
	call	fopen@PLT
	cmpq	$0, (%rsp)
	movq	%rax, 24(%rsp)
	je	.L29
	testq	%rax, %rax
	jne	.L26
.L29:
	movl	$1, %eax
	jmp	.L23
.L25:
	movq	4248(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L69
	call	__cxa_throw_bad_array_new_length@PLT
.L26:
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	xorl	%edx, %edx
	movq	(%rsp), %rdi
	xorl	%eax, %eax
	movl	%edx, 60(%rsp)
	leaq	.LC6(%rip), %rsi
	leaq	60(%rsp), %rdx
	call	__isoc23_fscanf@PLT
	movl	%eax, %ebp
	cmpl	$1, %eax
	jne	.L29
	movl	60(%rsp), %eax
	movl	$3, %ecx
	xorl	%edx, %edx
	divl	%ecx
	movl	%edx, %r12d
	testl	%edx, %edx
	jne	.L29
	leaq	112(%rsp), %rdi
	movl	$83886080, %esi
	leal	0(,%r13,8), %r15d
	call	cudaMalloc@PLT
	movq	(%rsp), %rcx
	movq	88(%rsp), %rdi
	movl	$20971519, %edx
	orq	$-1, %rsi
	call	__fgets_chk@PLT
	movq	88(%rsp), %rax
	xorl	%esi, %esi
	movb	$10, (%rax)
	movq	64(%rsp), %rdi
	call	cudaEventRecord@PLT
	leal	0(,%r13,4), %eax
	movl	%eax, 44(%rsp)
.L30:
	movl	$20971520, %ecx
	movq	(%rsp), %r8
	movslq	%ebp, %rdi
	orq	$-1, %rsi
	subl	%ebp, %ecx
	movl	$1, %edx
	addq	88(%rsp), %rdi
	movslq	%ecx, %rcx
	call	__fread_chk@PLT
	movq	%rax, %r14
	movl	%eax, %edx
	testl	%eax, %eax
	jle	.L42
	addl	%ebp, %r14d
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leal	-1(%r14), %ebp
	movslq	%r14d, %rdx
	sarl	$8, %ebp
	leal	1(%rbp), %eax
	movl	%eax, %ecx
	movl	%eax, 40(%rsp)
	movl	%r14d, %eax
	sall	$8, %ecx
.L31:
	movq	88(%rsp), %rsi
	cmpl	%eax, %ecx
	jle	.L70
	movb	$0, (%rsi,%rdx)
	incl	%eax
	incq	%rdx
	jmp	.L31
.L70:
	movq	80(%rsp), %rdi
	movl	$1, %ecx
	movl	$20971520, %edx
	call	cudaMemcpy@PLT
	movl	%r15d, 120(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	movl	$16777217, %edx
	movl	$1, %ecx
	movl	$1, 140(%rsp)
	movq	%rax, 124(%rsp)
	movq	120(%rsp), %rdi
	salq	$8, %rdx
	movl	128(%rsp), %esi
	movq	%rdx, 132(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L33
	movq	96(%rsp), %rdx
	movl	40(%rsp), %esi
	movq	80(%rsp), %rdi
	call	_Z35__device_stub__Z12get_nl_countPciPiPciPi
.L33:
	movslq	40(%rsp), %rdx
	movq	96(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	salq	$2, %rdx
	movq	%rdx, 8(%rsp)
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdx
	movl	%r12d, %ecx
	xorl	%eax, %eax
.L34:
	addl	(%rbx,%rax,4), %ecx
	incq	%rax
	leal	-1(%rax), %esi
	movl	%ecx, 8(%rsp)
	cmpl	%esi, %ebp
	jg	.L34
	xorl	%eax, %eax
.L35:
	incq	%rax
	cmpl	%eax, 40(%rsp)
	jle	.L71
	movl	-4(%rbx,%rax,4), %ecx
	addl	%ecx, (%rbx,%rax,4)
	jmp	.L35
.L71:
	movslq	%ebp, %rax
.L37:
	movl	%eax, %ebp
	testl	%eax, %eax
	je	.L72
	movl	-4(%rbx,%rax,4), %ecx
	movl	%ecx, (%rbx,%rax,4)
	decq	%rax
	jmp	.L37
.L72:
	xorl	%eax, %eax
	movq	96(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	%eax, (%rbx)
	call	cudaMemcpy@PLT
	movl	%r15d, 120(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	movl	$16777217, %edx
	movl	$1, %ecx
	movl	$1, 140(%rsp)
	movq	%rax, 124(%rsp)
	movq	120(%rsp), %rdi
	salq	$8, %rdx
	movl	128(%rsp), %esi
	movq	%rdx, 132(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L39
	movq	112(%rsp), %rcx
	movq	96(%rsp), %rdx
	movl	40(%rsp), %esi
	movq	80(%rsp), %rdi
	call	_Z38__device_stub__Z12get_line_posPciPiS0_PciPiS0_
.L39:
	movl	%r15d, 120(%rsp)
	movl	$16777217, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	salq	$8, %rdx
	movl	$1, %ecx
	movl	$1, 140(%rsp)
	movq	%rax, 124(%rsp)
	movq	120(%rsp), %rdi
	movl	128(%rsp), %esi
	movq	%rdx, 132(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L40
	movl	8(%rsp), %edx
	movq	112(%rsp), %rsi
	movq	80(%rsp), %rdi
	subl	%r12d, %edx
	call	_Z27__device_stub__Z5parsePcPiiPcPii
.L40:
	movl	44(%rsp), %eax
	movl	$16777217, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$8, %rdx
	movl	$1, %ecx
	movl	$1, 140(%rsp)
	movl	%eax, 120(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 124(%rsp)
	movq	120(%rsp), %rdi
	movl	128(%rsp), %esi
	movq	%rdx, 132(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L41
	movl	8(%rsp), %esi
	movq	104(%rsp), %rdx
	movq	112(%rsp), %rdi
	subl	%r12d, %esi
	decl	%esi
	call	_Z31__device_stub__Z9hist_kernPiiS_PiiS_
.L41:
	movl	8(%rsp), %ecx
	movl	%r12d, %edx
	leaq	.LC8(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	8(%rsp), %r12d
	decl	%r12d
	cmpl	$20971519, %r14d
	jle	.L42
	movq	88(%rsp), %rdx
	xorl	%eax, %eax
.L44:
	cmpb	$10, 20971519(%rdx,%rax)
	je	.L43
	decq	%rax
	cmpq	$-20971520, %rax
	jne	.L44
	jmp	.L45
.L43:
	movl	$1, %ebp
	subl	%eax, %ebp
.L45:
	movslq	%ebp, %rcx
	movl	$20971520, %edx
	xorl	%eax, %eax
	subq	%rcx, %rdx
.L46:
	movq	88(%rsp), %rcx
	cmpl	%eax, %ebp
	jle	.L30
	leaq	(%rcx,%rax), %rsi
	movb	(%rsi,%rdx), %sil
	movb	%sil, (%rcx,%rax)
	incq	%rax
	jmp	.L46
.L42:
	movq	16(%rsp), %rdx
	movq	104(%rsp), %rsi
	movl	$2, %ecx
	sall	$2, %r13d
	movq	32(%rsp), %rdi
	call	cudaMemcpy@PLT
	leaq	1176(%rsp), %rdx
	xorl	%eax, %eax
	movq	%rdx, %r14
.L49:
	movq	32(%rsp), %rcx
	xorl	%edi, %edi
	leaq	(%rcx,%rax,4), %r8
.L52:
	cmpl	%edi, %r13d
	jle	.L73
	movq	%rdx, %rsi
	xorl	%ecx, %ecx
.L50:
	movl	(%r8,%rcx), %r9d
	addq	$4, %rcx
	addl	%r9d, (%rsi)
	addq	$4, %rsi
	cmpq	$1024, %rcx
	jne	.L50
	incl	%edi
	addq	$1024, %r8
	jmp	.L52
.L73:
	addq	$5120, %rax
	addq	$1024, %rdx
	cmpq	$15360, %rax
	jne	.L49
	xorl	%r15d, %r15d
	xorl	%ebp, %ebp
.L51:
	testb	%r15b, %r15b
	jne	.L53
	testl	%r15d, %r15d
	je	.L53
	movq	24(%rsp), %rsi
	movl	$10, %edi
	call	fputc@PLT
.L53:
	movl	(%r14,%r15,4), %r13d
	movq	24(%rsp), %rdi
	movl	$2, %esi
	xorl	%eax, %eax
	leaq	.LC9(%rip), %rdx
	incq	%r15
	movl	%r13d, %ecx
	addl	%r13d, %ebp
	call	__fprintf_chk@PLT
	cmpq	$768, %r15
	jne	.L51
	movq	72(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	64(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	72(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	72(%rsp), %rdx
	movq	64(%rsp), %rsi
	leaq	132(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movl	60(%rsp), %edx
	movl	%ebp, %r8d
	movl	%r12d, %ecx
	leaq	.LC10(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	132(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	(%rsp), %rdi
	call	fclose@PLT
	movq	24(%rsp), %rdi
	call	fclose@PLT
	movq	%rbx, %rdi
	call	_ZdaPv@PLT
	movq	96(%rsp), %rdi
	call	cudaFree@PLT
	movq	88(%rsp), %rdi
	call	cudaFreeHost@PLT
	xorl	%eax, %eax
	jmp	.L23
.L55:
	movl	$2, %eax
.L23:
	movq	4248(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L54
.L69:
	call	__stack_chk_fail@PLT
.L54:
	addq	$4264, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC11:
	.string	"_Z9hist_kernPiiS_"
.LC12:
	.string	"_Z5parsePcPii"
.LC13:
	.string	"_Z12get_line_posPciPiS0_"
.LC14:
	.string	"_Z12get_nl_countPciPi"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2061:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC11(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z9hist_kernPiiS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC12(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z5parsePcPii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC13(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z12get_line_posPciPiS0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC14(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z12get_nl_countPciPi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2061:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include<stdio.h>
#define BUF_SIZE 20 * 1048576

__global__ void get_nl_count(char *buf, int n, int *out) {
    int tid = threadIdx.x;
    __shared__ volatile int cnt[256];
    for (int i = tid + blockDim.x * blockIdx.x, j = blockIdx.x; j < n; i += blockDim.x * gridDim.x, j += gridDim.x) {
        cnt[tid] = buf[i] == '\n';
        //__syncthreads();
        //if (tid < 512) cnt[tid] += cnt[tid+512];
        //__syncthreads();
        //if (tid < 256) cnt[tid] += cnt[tid+256];
        __syncthreads();
        if (tid < 128) cnt[tid] += cnt[tid+128];
        __syncthreads();
        if (tid < 64) cnt[tid] += cnt[tid+64];
        __syncthreads();
        if (tid < 32) {
            cnt[tid] += cnt[tid+32];
            cnt[tid] += cnt[tid+16];
            cnt[tid] += cnt[tid+8];
            cnt[tid] += cnt[tid+4];
            cnt[tid] += cnt[tid+2];
            cnt[tid] += cnt[tid+1];
            if (tid == 0) out[j] = cnt[0];
        }
        __syncthreads();
    }
}

__global__ void get_line_pos(char *buf, int n, int *pos, int *out) {
    int tid = threadIdx.x;
    __shared__ int cnt[256], cnt2[256];
    for (int i = tid + blockDim.x * blockIdx.x, j = blockIdx.x; j < n; i += blockDim.x * gridDim.x, j += gridDim.x) {
        int b = buf[i] == '\n';
        cnt[tid] = b;
        if (tid == 0) cnt[0] += pos[j];
        // reduce sum
        __syncthreads();
        #pragma unroll
        for (int dd = 0; dd < 8; dd += 2) {
            cnt2[tid] = tid >= 1<<dd ? cnt[tid] + cnt[tid-(1<<dd)] : cnt[tid];
            __syncthreads();
            cnt[tid] = tid >= 2<<dd ? cnt2[tid] + cnt2[tid-(2<<dd)] : cnt2[tid];
            __syncthreads();
        }
        if (b) out[cnt[tid]-1] = i;
    }
}

__global__ void parse(char *buf, int *bmp, int n) {
    int gid = threadIdx.x + blockDim.x * blockIdx.x;
    for (int i = gid; i < n - 1; i += blockDim.x * gridDim.x) {
        int pos = bmp[i] + 1;
        int red = 0, green = 0, blue = 0;
        while (buf[pos] <= ' ' && buf[pos] != '\n') { pos += 1; }
        while (buf[pos] >= '0' && buf[pos] <= '9') {
            red = red * 10 + (buf[pos] - '0');
            pos += 1;
        }
        while (buf[pos] <= ' ' && buf[pos] != '\n') { pos += 1; }
        while (buf[pos] >= '0' && buf[pos] <= '9') {
            green = green * 10 + (buf[pos] - '0');
            pos += 1;
        }
        while (buf[pos] <= ' ' && buf[pos] != '\n') { pos += 1; }
        while (buf[pos] >= '0' && buf[pos] <= '9') {
            blue = blue * 10 + (buf[pos] - '0');
            pos += 1;
        }
        bmp[i] = red | green<<8 | blue<<16;
    }
}

__global__ void hist_kern(int *bmp, int n, int *out) {
    __shared__ int sr[256], sg[256], sb[256];
    int gid = threadIdx.x + blockDim.x * blockIdx.x;
    sr[threadIdx.x] = 0;
    sg[threadIdx.x] = 0;
    sb[threadIdx.x] = 0;
    __syncthreads();
    for (int i = gid; i < n; i += blockDim.x * gridDim.x) {
        int rgb = bmp[i];
        atomicAdd(&sr[rgb & 255], 1);
        atomicAdd(&sg[rgb >> 8 & 255], 1);
        atomicAdd(&sb[rgb >> 16 & 255], 1);
    }
    __syncthreads();
    out[gid] += sr[threadIdx.x];
    out[gid + 256 * gridDim.x] += sg[threadIdx.x];
    out[gid + 256 * gridDim.x * 2] += sb[threadIdx.x];
}

int main() {
    if (hipSetDevice(0) != hipSuccess) return 2;
    hipDeviceProp_t prop;
    hipGetDeviceProperties(&prop, 0);
    printf("using GPU %s\n", prop.name);
    int smcount = prop.multiProcessorCount;

    hipEvent_t e, e2;
    hipEventCreate(&e);
    hipEventCreate(&e2);

    char *gpu_buf, *buf;
    hipHostAlloc(&buf, BUF_SIZE + 100, hipHostMallocDefault);
    hipMalloc(&gpu_buf, BUF_SIZE + 100);

    int *gpu_what, *what;
    hipMalloc(&gpu_what, sizeof(int) * 1048576);

    int *hist = new int[256*3*4*smcount], *gpu_hist;
    hipMalloc(&gpu_hist, sizeof(int) * (256*3*4*smcount));
    hipMemset(gpu_hist, 0, sizeof(int) * (256*3*4*smcount));
    int histogram_results[768] = {0};

    what = new int[1048576];
    FILE *inFile = fopen("input", "rb");
    FILE *outFile = fopen("yyyyyy.out", "wb");
    if (!inFile || !outFile) return 1;
    printf("open file\n");
    unsigned n = 0;
    if (fscanf(inFile, "%u", &n) != 1 || n%3 != 0) return 1;

    int *bmp = new int[n/3], *gpu_bmp;
    hipMalloc(&gpu_bmp, sizeof(int) * BUF_SIZE);

    fgets(buf, BUF_SIZE-1, inFile);
    int bytes_read, tail = 1;
    unsigned sum = 0;
    buf[0] = '\n';
    hipEventRecord(e, 0);
    while ((bytes_read = fread(buf + tail, 1, BUF_SIZE - tail, inFile)) > 0) {
        printf("read %d bytes\n", bytes_read);
        int blocks = (tail + bytes_read-1) / 256 + 1;

        for (int i = bytes_read + tail; i < blocks*256; i++) buf[i] = 0;

        hipMemcpy(gpu_buf, buf, BUF_SIZE, hipMemcpyHostToDevice);
        get_nl_count<<<8*smcount, 256>>>(gpu_buf, blocks, gpu_what);
        hipMemcpy(what, gpu_what, sizeof(int) * blocks, hipMemcpyDeviceToHost);

        unsigned sum2 = sum;
        for (int i = 0; i < blocks; i++) sum2 += what[i];
        for (int i = 1; i < blocks; i++) what[i] += what[i-1];
        for (int i = blocks-1; i > 0; i--) what[i] = what[i-1];
        what[0] = 0;

        hipMemcpy(gpu_what, what, sizeof(int) * blocks, hipMemcpyHostToDevice);
        get_line_pos<<<8*smcount, 256>>>(gpu_buf, blocks, gpu_what, gpu_bmp);
        //cudaDeviceSynchronize();

        //cudaMemcpy(bmp + sum, gpu_bmp, sizeof(int) * (sum2 - sum), cudaMemcpyDeviceToHost);
        parse<<<8*smcount, 256>>>(gpu_buf, gpu_bmp, sum2 - sum);
        //cudaDeviceSynchronize();

        hist_kern<<<4*smcount, 256>>>(gpu_bmp, sum2-1 - sum, gpu_hist);

        printf("sum = %u sum2 = %u\n", sum, sum2);
        sum = sum2-1;
        
        if (bytes_read + tail < BUF_SIZE) break;
        for (tail = 1; tail <= BUF_SIZE; tail++) {
            if (buf[BUF_SIZE - tail] == '\n') break;
        }
        if (tail > BUF_SIZE) tail = 0;
        for (int i = 0; i < tail; i++) buf[i] = buf[i + BUF_SIZE-tail];
    }

    hipMemcpy(hist, gpu_hist, sizeof(int) * (256*3*4*smcount), hipMemcpyDeviceToHost);
    for (int c = 0; c < 3; c++) {
        for (int i = 0; i < 4*smcount; i++) {
            for (int j = 0; j < 256; j++) histogram_results[j+c*256] += hist[j+i*256+c*256*20];
        }
    }

    int sum2 = 0;
    for (int i = 0; i < 768; i++) {
        if (i%256 == 0 && i != 0) fputc('\n', outFile);
        fprintf(outFile, "%d ", histogram_results[i]);
        sum2 += histogram_results[i];
    }

    hipEventRecord(e2, 0);
    float t;
    hipEventSynchronize(e);
    hipEventSynchronize(e2);
    hipEventElapsedTime(&t, e, e2);
    printf("%d %d %f %d\n", n, sum, t, sum2);

    fclose(inFile);
    fclose(outFile);
    delete[] what;
    hipFree(gpu_what);
    hipHostFree(buf);
}

	.text
	.file	"hh.hip"
	.globl	_Z27__device_stub__get_nl_countPciPi # -- Begin function _Z27__device_stub__get_nl_countPciPi
	.type	_Z27__device_stub__get_nl_countPciPi,@function
_Z27__device_stub__get_nl_countPciPi:   # @_Z27__device_stub__get_nl_countPciPi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	12(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	32(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12get_nl_countPciPi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z27__device_stub__get_nl_countPciPi, .Lfunc_end0-_Z27__device_stub__get_nl_countPciPi
	.cfi_endproc
                                        # -- End function
	.globl	_Z27__device_stub__get_line_posPciPiS0_ # -- Begin function _Z27__device_stub__get_line_posPciPiS0_
	.type	_Z27__device_stub__get_line_posPciPiS0_,@function
_Z27__device_stub__get_line_posPciPiS0_: # @_Z27__device_stub__get_line_posPciPiS0_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	32(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	24(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z12get_line_posPciPiS0_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z27__device_stub__get_line_posPciPiS0_, .Lfunc_end1-_Z27__device_stub__get_line_posPciPiS0_
	.cfi_endproc
                                        # -- End function
	.globl	_Z20__device_stub__parsePcPii   # -- Begin function _Z20__device_stub__parsePcPii
	.type	_Z20__device_stub__parsePcPii,@function
_Z20__device_stub__parsePcPii:          # @_Z20__device_stub__parsePcPii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z5parsePcPii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z20__device_stub__parsePcPii, .Lfunc_end2-_Z20__device_stub__parsePcPii
	.cfi_endproc
                                        # -- End function
	.globl	_Z24__device_stub__hist_kernPiiS_ # -- Begin function _Z24__device_stub__hist_kernPiiS_
	.type	_Z24__device_stub__hist_kernPiiS_,@function
_Z24__device_stub__hist_kernPiiS_:      # @_Z24__device_stub__hist_kernPiiS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	12(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	32(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9hist_kernPiiS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z24__device_stub__hist_kernPiiS_, .Lfunc_end3-_Z24__device_stub__hist_kernPiiS_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$4696, %rsp                     # imm = 0x1258
	.cfi_def_cfa_offset 4752
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	xorl	%edi, %edi
	callq	hipSetDevice
	movl	$2, %r14d
	testl	%eax, %eax
	je	.LBB4_1
.LBB4_20:
	movl	%r14d, %eax
	addq	$4696, %rsp                     # imm = 0x1258
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB4_1:
	.cfi_def_cfa_offset 4752
	leaq	144(%rsp), %rbx
	movq	%rbx, %rdi
	xorl	%esi, %esi
	callq	hipGetDevicePropertiesR0600
	movl	$.L.str, %edi
	movq	%rbx, %rsi
	xorl	%eax, %eax
	callq	printf
	movslq	388(%rbx), %r15
	leaq	64(%rsp), %rdi
	callq	hipEventCreate
	leaq	56(%rsp), %rdi
	callq	hipEventCreate
	movq	%rsp, %rdi
	movl	$20971620, %esi                 # imm = 0x1400064
	xorl	%edx, %edx
	callq	hipHostAlloc
	leaq	40(%rsp), %rdi
	movl	$20971620, %esi                 # imm = 0x1400064
	callq	hipMalloc
	leaq	24(%rsp), %rdi
	movl	$4194304, %esi                  # imm = 0x400000
	callq	hipMalloc
	movq	%r15, %rax
	shlq	$12, %rax
	testq	%r15, %r15
	leaq	(%rax,%rax,2), %r14
	movq	$-1, %rdi
	cmovnsq	%r14, %rdi
	callq	_Znam
	movq	%rax, %r12
	leaq	96(%rsp), %rbx
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movq	(%rbx), %rdi
	xorl	%esi, %esi
	movq	%r14, 128(%rsp)                 # 8-byte Spill
	movq	%r14, %rdx
	callq	hipMemset
	leaq	1616(%rsp), %r13
	movl	$3072, %edx                     # imm = 0xC00
	movq	%r13, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
	movl	$4194304, %edi                  # imm = 0x400000
	callq	_Znam
	movq	%rax, %rbx
	movl	$.L.str.1, %edi
	movl	$.L.str.2, %esi
	callq	fopen
	movq	%rax, %rbp
	movl	$.L.str.3, %edi
	movl	$.L.str.4, %esi
	callq	fopen
	movl	$1, %r14d
	testq	%rbp, %rbp
	je	.LBB4_20
# %bb.2:
	movq	%rax, 104(%rsp)                 # 8-byte Spill
	testq	%rax, %rax
	je	.LBB4_20
# %bb.3:
	movl	$.Lstr, %edi
	callq	puts@PLT
	leaq	36(%rsp), %rdx
	movl	$0, (%rdx)
	movl	$.L.str.6, %esi
	movq	%rbp, %rdi
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movl	$1, %r14d
	cmpl	$1, %eax
	jne	.LBB4_20
# %bb.4:
	imull	$-1431655765, 36(%rsp), %eax    # imm = 0xAAAAAAAB
	cmpl	$1431655765, %eax               # imm = 0x55555555
	ja	.LBB4_20
# %bb.5:
	leaq	48(%rsp), %rdi
	movl	$83886080, %esi                 # imm = 0x5000000
	callq	hipMalloc
	movq	(%rsp), %rdi
	movl	$20971519, %esi                 # imm = 0x13FFFFF
	movq	%rbp, %rdx
	callq	fgets
	movq	(%rsp), %rax
	movb	$10, (%rax)
	movq	64(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	(%rsp), %rdi
	incq	%rdi
	movl	$1, %esi
	movl	$20971519, %edx                 # imm = 0x13FFFFF
	movq	%rbp, %rcx
	callq	fread
	movq	%rax, %r14
	testl	%r14d, %r14d
	jle	.LBB4_6
# %bb.24:                               # %.lr.ph194
	movabsq	$4294967552, %rcx               # imm = 0x100000100
	leal	(,%r15,8), %eax
	addq	%rcx, %rax
	addq	$-256, %rax
	movq	%rax, 88(%rsp)                  # 8-byte Spill
	movq	%r15, 72(%rsp)                  # 8-byte Spill
	leal	(,%r15,4), %eax
	movq	%rax, 80(%rsp)                  # 8-byte Spill
	addq	%rcx, %rax
	addq	$-256, %rax
	movq	%rax, 112(%rsp)                 # 8-byte Spill
	movl	$1, %r15d
	xorl	%eax, %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movq	%rbp, 120(%rsp)                 # 8-byte Spill
.LBB4_25:                               # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_27 Depth 2
                                        #     Child Loop BB4_32 Depth 2
                                        #     Child Loop BB4_35 Depth 2
                                        #     Child Loop BB4_37 Depth 2
                                        #     Child Loop BB4_47 Depth 2
                                        #     Child Loop BB4_52 Depth 2
	movl	$.L.str.7, %edi
	movl	%r14d, %esi
	xorl	%eax, %eax
	callq	printf
	leal	(%r14,%r15), %edx
	leal	(%r14,%r15), %eax
	decl	%eax
	leal	(%r14,%r15), %ebp
	addl	$254, %ebp
	testl	%eax, %eax
	cmovnsl	%eax, %ebp
	sarl	$8, %ebp
	leal	1(%rbp), %r14d
	movl	%r14d, %ecx
	shll	$8, %ecx
	movl	%edx, 12(%rsp)                  # 4-byte Spill
	cmpl	%ecx, %edx
	jge	.LBB4_28
# %bb.26:                               # %.lr.ph.preheader
                                        #   in Loop: Header=BB4_25 Depth=1
	movslq	12(%rsp), %rax                  # 4-byte Folded Reload
	movslq	%ecx, %rcx
.LBB4_27:                               # %.lr.ph
                                        #   Parent Loop BB4_25 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	(%rsp), %rdx
	movb	$0, (%rdx,%rax)
	incq	%rax
	cmpq	%rcx, %rax
	jl	.LBB4_27
.LBB4_28:                               # %._crit_edge
                                        #   in Loop: Header=BB4_25 Depth=1
	movq	40(%rsp), %rdi
	movq	(%rsp), %rsi
	movl	$20971520, %edx                 # imm = 0x1400000
	movl	$1, %ecx
	callq	hipMemcpy
	movq	88(%rsp), %rdi                  # 8-byte Reload
	movl	$1, %esi
	movabsq	$4294967552, %rdx               # imm = 0x100000100
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_30
# %bb.29:                               #   in Loop: Header=BB4_25 Depth=1
	movq	40(%rsp), %rdi
	movq	24(%rsp), %rdx
	movl	%r14d, %esi
	callq	_Z27__device_stub__get_nl_countPciPi
.LBB4_30:                               #   in Loop: Header=BB4_25 Depth=1
	movq	24(%rsp), %rsi
	movl	%r14d, 32(%rsp)                 # 4-byte Spill
	movslq	%r14d, %r14
	shlq	$2, %r14
	movq	%rbx, %rdi
	movq	%r14, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rax                  # 8-byte Reload
	movl	%eax, %r15d
	cmpl	$-254, 12(%rsp)                 # 4-byte Folded Reload
	jl	.LBB4_38
# %bb.31:                               # %.lr.ph180.preheader
                                        #   in Loop: Header=BB4_25 Depth=1
	testl	%ebp, %ebp
	movl	$0, %eax
	cmovgl	%ebp, %eax
	incl	%eax
	xorl	%ecx, %ecx
	movq	16(%rsp), %rdx                  # 8-byte Reload
	movl	%edx, %r15d
.LBB4_32:                               # %.lr.ph180
                                        #   Parent Loop BB4_25 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	addl	(%rbx,%rcx,4), %r15d
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB4_32
# %bb.33:                               # %.preheader174
                                        #   in Loop: Header=BB4_25 Depth=1
	cmpl	$257, 12(%rsp)                  # 4-byte Folded Reload
                                        # imm = 0x101
	jl	.LBB4_38
# %bb.34:                               # %.lr.ph183.preheader
                                        #   in Loop: Header=BB4_25 Depth=1
	cmpl	$2, %ebp
	movl	$1, %eax
	cmovgel	%ebp, %eax
	movl	(%rbx), %ecx
	xorl	%edx, %edx
.LBB4_35:                               # %.lr.ph183
                                        #   Parent Loop BB4_25 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	addl	4(%rbx,%rdx,4), %ecx
	movl	%ecx, 4(%rbx,%rdx,4)
	incq	%rdx
	cmpq	%rdx, %rax
	jne	.LBB4_35
# %bb.36:                               # %.lr.ph185.preheader
                                        #   in Loop: Header=BB4_25 Depth=1
	movl	%ebp, %eax
	leaq	(%rbx,%rax,4), %rcx
	movl	32(%rsp), %eax                  # 4-byte Reload
.LBB4_37:                               # %.lr.ph185
                                        #   Parent Loop BB4_25 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	-4(%rcx), %edx
	movl	%edx, (%rcx)
	addq	$-4, %rcx
	decl	%eax
	cmpl	$1, %eax
	jg	.LBB4_37
.LBB4_38:                               # %._crit_edge186
                                        #   in Loop: Header=BB4_25 Depth=1
	movl	$0, (%rbx)
	movq	24(%rsp), %rdi
	movq	%rbx, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	88(%rsp), %rbp                  # 8-byte Reload
	movq	%rbp, %rdi
	movl	$1, %esi
	movabsq	$4294967552, %r14               # imm = 0x100000100
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_40
# %bb.39:                               #   in Loop: Header=BB4_25 Depth=1
	movq	40(%rsp), %rdi
	movq	24(%rsp), %rdx
	movq	48(%rsp), %rcx
	movl	32(%rsp), %esi                  # 4-byte Reload
	callq	_Z27__device_stub__get_line_posPciPiS0_
.LBB4_40:                               #   in Loop: Header=BB4_25 Depth=1
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	movq	120(%rsp), %rbp                 # 8-byte Reload
	movq	%r14, %rdx
	movq	16(%rsp), %r14                  # 8-byte Reload
	jne	.LBB4_42
# %bb.41:                               #   in Loop: Header=BB4_25 Depth=1
	movq	40(%rsp), %rdi
	movq	48(%rsp), %rsi
	movl	%r15d, %edx
	subl	%r14d, %edx
	callq	_Z20__device_stub__parsePcPii
	movabsq	$4294967552, %rdx               # imm = 0x100000100
.LBB4_42:                               #   in Loop: Header=BB4_25 Depth=1
	movq	112(%rsp), %rdi                 # 8-byte Reload
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_44
# %bb.43:                               #   in Loop: Header=BB4_25 Depth=1
	movq	48(%rsp), %rdi
	movl	%r14d, %esi
	notl	%esi
	addl	%r15d, %esi
	movq	96(%rsp), %rdx
	callq	_Z24__device_stub__hist_kernPiiS_
.LBB4_44:                               #   in Loop: Header=BB4_25 Depth=1
	movl	$.L.str.8, %edi
	movl	%r14d, %esi
	movl	%r15d, %edx
	xorl	%eax, %eax
	callq	printf
	movl	%r15d, %r14d
	decl	%r14d
	cmpl	$20971520, 12(%rsp)             # 4-byte Folded Reload
                                        # imm = 0x1400000
	jl	.LBB4_45
# %bb.46:                               # %.preheader172
                                        #   in Loop: Header=BB4_25 Depth=1
	movq	(%rsp), %rax
	leaq	20971519(%rax), %rcx
	movl	$1, %edi
	movq	%r14, 16(%rsp)                  # 8-byte Spill
.LBB4_47:                               #   Parent Loop BB4_25 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	cmpb	$10, (%rcx)
	je	.LBB4_50
# %bb.48:                               #   in Loop: Header=BB4_47 Depth=2
	incq	%rdi
	decq	%rcx
	cmpq	$20971521, %rdi                 # imm = 0x1400001
	jne	.LBB4_47
	jmp	.LBB4_49
.LBB4_50:                               #   in Loop: Header=BB4_25 Depth=1
	xorl	%ecx, %ecx
	movl	%edi, %r15d
	cmpl	$20971521, %edi                 # imm = 0x1400001
	cmovael	%ecx, %r15d
	jb	.LBB4_51
.LBB4_49:                               #   in Loop: Header=BB4_25 Depth=1
	xorl	%r15d, %r15d
	xorl	%edi, %edi
	jmp	.LBB4_22
.LBB4_51:                               # %.lr.ph190
                                        #   in Loop: Header=BB4_25 Depth=1
	movl	$20971520, %eax                 # imm = 0x1400000
	subl	%r15d, %eax
	xorl	%ecx, %ecx
.LBB4_52:                               #   Parent Loop BB4_25 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movq	(%rsp), %rdx
	leal	(%rax,%rcx), %esi
	movslq	%esi, %rsi
	movb	(%rdx,%rsi), %sil
	movb	%sil, (%rdx,%rcx)
	incq	%rcx
	cmpq	%rcx, %rdi
	jne	.LBB4_52
# %bb.21:                               # %.loopexit.loopexit
                                        #   in Loop: Header=BB4_25 Depth=1
	movq	(%rsp), %rax
.LBB4_22:                               # %.loopexit
                                        #   in Loop: Header=BB4_25 Depth=1
	addq	%rax, %rdi
	movl	$20971520, %eax                 # imm = 0x1400000
	subl	%r15d, %eax
	movslq	%eax, %rdx
	movl	$1, %esi
	movq	%rbp, %rcx
	callq	fread
	movq	%rax, %r14
	testl	%r14d, %r14d
	jg	.LBB4_25
# %bb.23:
	movq	72(%rsp), %r15                  # 8-byte Reload
	movq	16(%rsp), %r14                  # 8-byte Reload
	jmp	.LBB4_7
.LBB4_6:                                # %..thread_crit_edge
	leal	(,%r15,4), %eax
	movq	%rax, 80(%rsp)                  # 8-byte Spill
	xorl	%r14d, %r14d
	jmp	.LBB4_7
.LBB4_45:
	movq	72(%rsp), %r15                  # 8-byte Reload
.LBB4_7:                                # %.thread
	movq	96(%rsp), %rsi
	movq	%r12, %rdi
	movq	128(%rsp), %rdx                 # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	movq	80(%rsp), %rcx                  # 8-byte Reload
	cmpl	$2, %ecx
	movl	$1, %eax
	cmovgel	%ecx, %eax
	xorl	%ecx, %ecx
.LBB4_8:                                # %.preheader171
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB4_10 Depth 2
                                        #       Child Loop BB4_11 Depth 3
	testl	%r15d, %r15d
	jle	.LBB4_13
# %bb.9:                                # %.preheader170.lr.ph
                                        #   in Loop: Header=BB4_8 Depth=1
	movq	%r12, %rdx
	xorl	%esi, %esi
.LBB4_10:                               # %.preheader170
                                        #   Parent Loop BB4_8 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB4_11 Depth 3
	xorl	%edi, %edi
.LBB4_11:                               #   Parent Loop BB4_8 Depth=1
                                        #     Parent Loop BB4_10 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movl	(%rdx,%rdi,4), %r8d
	addl	%r8d, (%r13,%rdi,4)
	incq	%rdi
	cmpq	$256, %rdi                      # imm = 0x100
	jne	.LBB4_11
# %bb.12:                               #   in Loop: Header=BB4_10 Depth=2
	incq	%rsi
	addq	$1024, %rdx                     # imm = 0x400
	cmpq	%rax, %rsi
	jne	.LBB4_10
.LBB4_13:                               # %._crit_edge200
                                        #   in Loop: Header=BB4_8 Depth=1
	incq	%rcx
	addq	$20480, %r12                    # imm = 0x5000
	addq	$1024, %r13                     # imm = 0x400
	cmpq	$3, %rcx
	jne	.LBB4_8
# %bb.14:                               # %.preheader.preheader
	movq	%r14, 16(%rsp)                  # 8-byte Spill
	xorl	%r12d, %r12d
	xorl	%r15d, %r15d
	movq	104(%rsp), %r13                 # 8-byte Reload
.LBB4_15:                               # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	testq	%r12, %r12
	je	.LBB4_18
# %bb.16:                               # %.preheader
                                        #   in Loop: Header=BB4_15 Depth=1
	movzbl	%r12b, %eax
	testq	%rax, %rax
	jne	.LBB4_18
# %bb.17:                               #   in Loop: Header=BB4_15 Depth=1
	movl	$10, %edi
	movq	%r13, %rsi
	callq	fputc
.LBB4_18:                               #   in Loop: Header=BB4_15 Depth=1
	movl	1616(%rsp,%r12,4), %r14d
	movl	$.L.str.9, %esi
	movq	%r13, %rdi
	movl	%r14d, %edx
	xorl	%eax, %eax
	callq	fprintf
	addl	%r14d, %r15d
	incq	%r12
	cmpq	$768, %r12                      # imm = 0x300
	jne	.LBB4_15
# %bb.19:
	movq	56(%rsp), %rdi
	xorl	%r14d, %r14d
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	64(%rsp), %rdi
	callq	hipEventSynchronize
	movq	56(%rsp), %rdi
	callq	hipEventSynchronize
	movq	64(%rsp), %rsi
	movq	56(%rsp), %rdx
	leaq	140(%rsp), %r12
	movq	%r12, %rdi
	callq	hipEventElapsedTime
	movl	36(%rsp), %esi
	cvtss2sd	(%r12), %xmm0
	movl	$.L.str.10, %edi
	movq	16(%rsp), %rdx                  # 8-byte Reload
                                        # kill: def $edx killed $edx killed $rdx
	movl	%r15d, %ecx
	movb	$1, %al
	callq	printf
	movq	%rbp, %rdi
	callq	fclose
	movq	%r13, %rdi
	callq	fclose
	movq	%rbx, %rdi
	callq	_ZdaPv
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	(%rsp), %rdi
	callq	hipHostFree
	jmp	.LBB4_20
.Lfunc_end4:
	.size	main, .Lfunc_end4-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB5_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB5_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12get_nl_countPciPi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z12get_line_posPciPiS0_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z5parsePcPii, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9hist_kernPiiS_, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end5:
	.size	__hip_module_ctor, .Lfunc_end5-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB6_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB6_2:
	retq
.Lfunc_end6:
	.size	__hip_module_dtor, .Lfunc_end6-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z12get_nl_countPciPi,@object   # @_Z12get_nl_countPciPi
	.section	.rodata,"a",@progbits
	.globl	_Z12get_nl_countPciPi
	.p2align	3, 0x0
_Z12get_nl_countPciPi:
	.quad	_Z27__device_stub__get_nl_countPciPi
	.size	_Z12get_nl_countPciPi, 8

	.type	_Z12get_line_posPciPiS0_,@object # @_Z12get_line_posPciPiS0_
	.globl	_Z12get_line_posPciPiS0_
	.p2align	3, 0x0
_Z12get_line_posPciPiS0_:
	.quad	_Z27__device_stub__get_line_posPciPiS0_
	.size	_Z12get_line_posPciPiS0_, 8

	.type	_Z5parsePcPii,@object           # @_Z5parsePcPii
	.globl	_Z5parsePcPii
	.p2align	3, 0x0
_Z5parsePcPii:
	.quad	_Z20__device_stub__parsePcPii
	.size	_Z5parsePcPii, 8

	.type	_Z9hist_kernPiiS_,@object       # @_Z9hist_kernPiiS_
	.globl	_Z9hist_kernPiiS_
	.p2align	3, 0x0
_Z9hist_kernPiiS_:
	.quad	_Z24__device_stub__hist_kernPiiS_
	.size	_Z9hist_kernPiiS_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"using GPU %s\n"
	.size	.L.str, 14

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"input"
	.size	.L.str.1, 6

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"rb"
	.size	.L.str.2, 3

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"yyyyyy.out"
	.size	.L.str.3, 11

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"wb"
	.size	.L.str.4, 3

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"%u"
	.size	.L.str.6, 3

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"read %d bytes\n"
	.size	.L.str.7, 15

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"sum = %u sum2 = %u\n"
	.size	.L.str.8, 20

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"%d "
	.size	.L.str.9, 4

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"%d %d %f %d\n"
	.size	.L.str.10, 13

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z12get_nl_countPciPi"
	.size	.L__unnamed_1, 22

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z12get_line_posPciPiS0_"
	.size	.L__unnamed_2, 25

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z5parsePcPii"
	.size	.L__unnamed_3, 14

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z9hist_kernPiiS_"
	.size	.L__unnamed_4, 18

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"open file"
	.size	.Lstr, 10

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z27__device_stub__get_nl_countPciPi
	.addrsig_sym _Z27__device_stub__get_line_posPciPiS0_
	.addrsig_sym _Z20__device_stub__parsePcPii
	.addrsig_sym _Z24__device_stub__hist_kernPiiS_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z12get_nl_countPciPi
	.addrsig_sym _Z12get_line_posPciPiS0_
	.addrsig_sym _Z5parsePcPii
	.addrsig_sym _Z9hist_kernPiiS_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z12get_nl_countPciPi   ; -- Begin function _Z12get_nl_countPciPi
	.globl	_Z12get_nl_countPciPi
	.p2align	8
	.type	_Z12get_nl_countPciPi,@function
_Z12get_nl_countPciPi:                  ; @_Z12get_nl_countPciPi
; %bb.0:
	s_load_b32 s5, s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_cmp_ge_i32 s15, s5
	s_cbranch_scc1 .LBB0_10
; %bb.1:                                ; %.lr.ph
	s_mov_b32 s6, s15
	s_load_b32 s3, s[0:1], 0x24
	s_mov_b64 s[14:15], src_shared_base
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v1, s15 :: v_dual_lshlrev_b32 v14, 2, v0
	s_clause 0x2
	s_load_b64 s[8:9], s[0:1], 0x0
	s_load_b64 s[10:11], s[0:1], 0x10
	s_load_b32 s12, s[0:1], 0x18
	v_cmp_gt_u32_e32 vcc_lo, 0x80, v0
	v_cmp_gt_u32_e64 s0, 64, v0
	v_add_nc_u32_e32 v4, 0x200, v14
	v_add_nc_u32_e32 v9, 0x80, v14
	v_add_nc_u32_e32 v11, 64, v14
	v_add_nc_u32_e32 v13, 32, v14
	v_cmp_ne_u32_e64 s1, -1, v14
	v_cmp_ne_u32_e64 s2, -1, v4
	v_add_nc_u32_e32 v8, 0x100, v14
	v_add_nc_u32_e32 v15, 16, v14
	v_add_nc_u32_e32 v17, 8, v14
	v_add_nc_u32_e32 v19, 4, v14
	v_cndmask_b32_e64 v4, 0, v4, s2
	v_cndmask_b32_e64 v5, 0, s15, s2
	v_cmp_ne_u32_e64 s2, -1, v9
	s_waitcnt lgkmcnt(0)
	s_and_b32 s7, s3, 0xffff
	v_cmp_ne_u32_e64 s3, -1, v11
	v_cndmask_b32_e64 v2, 0, v14, s1
	v_cndmask_b32_e64 v3, 0, s15, s1
	v_cndmask_b32_e64 v9, 0, v9, s2
	v_cndmask_b32_e64 v10, 0, s15, s2
	v_cmp_ne_u32_e64 s2, -1, v13
	v_cmp_ne_u32_e64 s1, -1, v8
	v_cndmask_b32_e64 v11, 0, v11, s3
	v_cndmask_b32_e64 v12, 0, s15, s3
	v_cmp_ne_u32_e64 s3, -1, v15
	v_cndmask_b32_e64 v13, 0, v13, s2
	v_cndmask_b32_e64 v14, 0, s15, s2
	v_cmp_ne_u32_e64 s2, -1, v17
	v_cmp_ne_u32_e64 s4, -1, v19
	v_mad_u64_u32 v[6:7], null, s6, s7, v[0:1]
	v_cndmask_b32_e64 v7, 0, v8, s1
	v_cndmask_b32_e64 v8, 0, s15, s1
	v_cmp_gt_u32_e64 s1, 32, v0
	v_cndmask_b32_e64 v15, 0, v15, s3
	v_cndmask_b32_e64 v16, 0, s15, s3
	v_cndmask_b32_e64 v17, 0, v17, s2
	v_cndmask_b32_e64 v18, 0, s15, s2
	v_cndmask_b32_e64 v19, 0, v19, s4
	v_cndmask_b32_e64 v20, 0, s15, s4
	v_cmp_eq_u32_e64 s2, 0, v0
	v_mov_b32_e32 v0, 0
	s_mul_i32 s4, s12, s7
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v22, 31, v6
	v_add_co_u32 v21, s3, s8, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v22, s3, s9, v22, s3
	global_load_u8 v21, v[21:22], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u16_e64 s3, 10, v21
	v_cndmask_b32_e64 v21, 0, 1, s3
	flat_store_b32 v[2:3], v21 dlc
	s_waitcnt_vscnt null, 0x0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB0_4
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	flat_load_b32 v21, v[4:5] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v22, v[2:3] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v21, v22, v21
	flat_store_b32 v[2:3], v21 dlc
	s_waitcnt_vscnt null, 0x0
.LBB0_4:                                ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s3, s0
	s_cbranch_execz .LBB0_6
; %bb.5:                                ;   in Loop: Header=BB0_2 Depth=1
	flat_load_b32 v21, v[7:8] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v22, v[2:3] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v21, v22, v21
	flat_store_b32 v[2:3], v21 dlc
	s_waitcnt_vscnt null, 0x0
.LBB0_6:                                ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s3, s1
	s_cbranch_execz .LBB0_9
; %bb.7:                                ;   in Loop: Header=BB0_2 Depth=1
	flat_load_b32 v21, v[9:10] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v22, v[2:3] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v21, v22, v21
	flat_store_b32 v[2:3], v21 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v21, v[11:12] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v22, v[2:3] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v21, v22, v21
	flat_store_b32 v[2:3], v21 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v21, v[13:14] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v22, v[2:3] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v21, v22, v21
	flat_store_b32 v[2:3], v21 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v21, v[15:16] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v22, v[2:3] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v21, v22, v21
	flat_store_b32 v[2:3], v21 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v21, v[17:18] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v22, v[2:3] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v21, v22, v21
	flat_store_b32 v[2:3], v21 dlc
	s_waitcnt_vscnt null, 0x0
	flat_load_b32 v21, v[19:20] glc dlc
	s_waitcnt vmcnt(0)
	flat_load_b32 v22, v[2:3] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v21, v22, v21
	flat_store_b32 v[2:3], v21 dlc
	s_waitcnt_vscnt null, 0x0
	s_and_b32 exec_lo, exec_lo, s2
	s_cbranch_execz .LBB0_9
; %bb.8:                                ;   in Loop: Header=BB0_2 Depth=1
	flat_load_b32 v21, v[0:1] glc dlc
	s_waitcnt vmcnt(0)
	s_ashr_i32 s7, s6, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[14:15], s[6:7], 2
	s_add_u32 s14, s10, s14
	s_addc_u32 s15, s11, s15
	s_waitcnt lgkmcnt(0)
	global_store_b32 v0, v21, s[14:15]
.LBB0_9:                                ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	v_add_nc_u32_e32 v6, s4, v6
	s_add_i32 s6, s6, s12
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_cmp_ge_i32 s6, s5
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB0_2
.LBB0_10:                               ; %._crit_edge
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12get_nl_countPciPi
		.amdhsa_group_segment_fixed_size 1024
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 23
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z12get_nl_countPciPi, .Lfunc_end0-_Z12get_nl_countPciPi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 964
; NumSgprs: 18
; NumVgprs: 23
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 1024 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 23
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z12get_line_posPciPiS0_ ; -- Begin function _Z12get_line_posPciPiS0_
	.globl	_Z12get_line_posPciPiS0_
	.p2align	8
	.type	_Z12get_line_posPciPiS0_,@function
_Z12get_line_posPciPiS0_:               ; @_Z12get_line_posPciPiS0_
; %bb.0:
	s_load_b32 s9, s[0:1], 0x8
	s_waitcnt lgkmcnt(0)
	s_cmp_ge_i32 s15, s9
	s_cbranch_scc1 .LBB1_23
; %bb.1:                                ; %.lr.ph
	s_mov_b32 s10, s15
	s_clause 0x3
	s_load_b32 s7, s[0:1], 0x2c
	s_load_b32 s18, s[0:1], 0x20
	s_load_b64 s[16:17], s[0:1], 0x0
	s_load_b128 s[12:15], s[0:1], 0x10
	v_lshlrev_b32_e32 v3, 2, v0
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	v_cmp_ne_u32_e64 s0, 0, v0
	v_cmp_lt_u32_e64 s1, 1, v0
	v_cmp_lt_u32_e64 s2, 3, v0
	v_cmp_lt_u32_e64 s3, 7, v0
	v_cmp_lt_u32_e64 s4, 15, v0
	v_cmp_lt_u32_e64 s5, 31, v0
	v_cmp_lt_u32_e64 s6, 63, v0
	v_dual_mov_b32 v11, 0 :: v_dual_add_nc_u32 v4, 0x400, v3
	v_add_nc_u32_e32 v5, -4, v3
	v_add_nc_u32_e32 v6, 0x3f8, v3
	v_add_nc_u32_e32 v7, -16, v3
	v_add_nc_u32_e32 v8, 0x3e0, v3
	v_subrev_nc_u32_e32 v9, 64, v3
	s_waitcnt lgkmcnt(0)
	s_and_b32 s8, s7, 0xffff
	v_add_nc_u32_e32 v10, 0x380, v3
	v_mad_u64_u32 v[1:2], null, s10, s8, v[0:1]
	v_add_nc_u32_e32 v2, 0xffffff00, v3
	v_cmp_lt_u32_e64 s7, 0x7f, v0
	v_add_nc_u32_e32 v0, 0x200, v3
	s_add_u32 s14, s14, -4
	s_mul_i32 s19, s18, s8
	s_addc_u32 s15, s15, -1
.LBB1_2:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v13, 31, v1
	v_add_co_u32 v12, s8, s16, v1
	v_add_co_ci_u32_e64 v13, s8, s17, v13, s8
	global_load_u8 v12, v[12:13], off
	s_waitcnt vmcnt(0)
	v_cmp_eq_u16_e64 s8, 10, v12
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v12, 0, 1, s8
	ds_store_b32 v3, v12
	s_and_saveexec_b32 s20, vcc_lo
	s_cbranch_execz .LBB1_4
; %bb.3:                                ;   in Loop: Header=BB1_2 Depth=1
	s_ashr_i32 s11, s10, 31
	ds_load_b32 v13, v11
	s_lshl_b64 s[22:23], s[10:11], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s22, s12, s22
	s_addc_u32 s23, s13, s23
	global_load_b32 v12, v11, s[22:23]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v12, v13, v12
	ds_store_b32 v11, v12
.LBB1_4:                                ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s20
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v12, v3
	s_and_saveexec_b32 s11, s0
	s_cbranch_execz .LBB1_6
; %bb.5:                                ;   in Loop: Header=BB1_2 Depth=1
	ds_load_b32 v13, v5
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v12, v13, v12
.LBB1_6:                                ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s11
	s_waitcnt lgkmcnt(0)
	ds_store_b32 v4, v12
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v12, v4
	s_and_saveexec_b32 s11, s1
	s_cbranch_execz .LBB1_8
; %bb.7:                                ;   in Loop: Header=BB1_2 Depth=1
	ds_load_b32 v13, v6
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v12, v13, v12
.LBB1_8:                                ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s11
	s_waitcnt lgkmcnt(0)
	ds_store_b32 v3, v12
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v12, v3
	s_and_saveexec_b32 s11, s2
	s_cbranch_execz .LBB1_10
; %bb.9:                                ;   in Loop: Header=BB1_2 Depth=1
	ds_load_b32 v13, v7
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v12, v13, v12
.LBB1_10:                               ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s11
	s_waitcnt lgkmcnt(0)
	ds_store_b32 v4, v12
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v12, v4
	s_and_saveexec_b32 s11, s3
	s_cbranch_execz .LBB1_12
; %bb.11:                               ;   in Loop: Header=BB1_2 Depth=1
	ds_load_b32 v13, v8
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v12, v13, v12
.LBB1_12:                               ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s11
	s_waitcnt lgkmcnt(0)
	ds_store_b32 v3, v12
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v12, v3
	s_and_saveexec_b32 s11, s4
	s_cbranch_execz .LBB1_14
; %bb.13:                               ;   in Loop: Header=BB1_2 Depth=1
	ds_load_b32 v13, v9
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v12, v13, v12
.LBB1_14:                               ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s11
	s_waitcnt lgkmcnt(0)
	ds_store_b32 v4, v12
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v12, v4
	s_and_saveexec_b32 s11, s5
	s_cbranch_execz .LBB1_16
; %bb.15:                               ;   in Loop: Header=BB1_2 Depth=1
	ds_load_b32 v13, v10
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v12, v13, v12
.LBB1_16:                               ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s11
	s_waitcnt lgkmcnt(0)
	ds_store_b32 v3, v12
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v12, v3
	s_and_saveexec_b32 s11, s6
	s_cbranch_execz .LBB1_18
; %bb.17:                               ;   in Loop: Header=BB1_2 Depth=1
	ds_load_b32 v13, v2
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v12, v13, v12
.LBB1_18:                               ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s11
	s_waitcnt lgkmcnt(0)
	ds_store_b32 v4, v12
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v12, v4
	s_and_saveexec_b32 s11, s7
	s_cbranch_execz .LBB1_20
; %bb.19:                               ;   in Loop: Header=BB1_2 Depth=1
	ds_load_b32 v13, v0
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v12, v13, v12
.LBB1_20:                               ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s11
	s_waitcnt lgkmcnt(0)
	ds_store_b32 v3, v12
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s11, s8
	s_cbranch_execz .LBB1_22
; %bb.21:                               ;   in Loop: Header=BB1_2 Depth=1
	ds_load_b32 v12, v3
	s_waitcnt lgkmcnt(0)
	v_ashrrev_i32_e32 v13, 31, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[12:13], 2, v[12:13]
	v_add_co_u32 v12, s8, s14, v12
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v13, s8, s15, v13, s8
	global_store_b32 v[12:13], v1, off
.LBB1_22:                               ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s11
	v_add_nc_u32_e32 v1, s19, v1
	s_add_i32 s10, s10, s18
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_ge_i32 s10, s9
	s_cbranch_scc0 .LBB1_2
.LBB1_23:                               ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z12get_line_posPciPiS0_
		.amdhsa_group_segment_fixed_size 2048
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 24
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z12get_line_posPciPiS0_, .Lfunc_end1-_Z12get_line_posPciPiS0_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 992
; NumSgprs: 26
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 2048 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 26
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z5parsePcPii           ; -- Begin function _Z5parsePcPii
	.globl	_Z5parsePcPii
	.p2align	8
	.type	_Z5parsePcPii,@function
_Z5parsePcPii:                          ; @_Z5parsePcPii
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x24
	s_load_b32 s8, s[0:1], 0x10
	s_add_u32 s2, s0, 24
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s9, s4, 0xffff
	s_add_i32 s8, s8, -1
	v_mad_u64_u32 v[1:2], null, s15, s9, v[0:1]
	s_mov_b32 s4, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s8, v1
	s_cbranch_execz .LBB2_21
; %bb.1:                                ; %.lr.ph96
	s_load_b32 s2, s[2:3], 0x0
	s_load_b128 s[4:7], s[0:1], 0x0
	s_mov_b32 s10, 0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s2, s2, s9
	s_add_u32 s3, s4, 1
	s_addc_u32 s9, s5, 0
.LBB2_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB2_3 Depth 2
                                        ;     Child Loop BB2_6 Depth 2
                                        ;     Child Loop BB2_9 Depth 2
                                        ;     Child Loop BB2_12 Depth 2
                                        ;     Child Loop BB2_15 Depth 2
                                        ;     Child Loop BB2_18 Depth 2
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s11, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	v_add_co_u32 v2, vcc_lo, s6, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
	global_load_b32 v8, v[2:3], off
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v0, 31, v8
	v_add_co_u32 v4, vcc_lo, s3, v8
	v_add_co_ci_u32_e32 v5, vcc_lo, s9, v0, vcc_lo
.LBB2_3:                                ;   Parent Loop BB2_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_i8 v6, v[4:5], off
	v_add_co_u32 v4, s1, v4, 1
	v_add_nc_u32_e32 v8, 1, v8
	s_waitcnt vmcnt(0)
	v_cmp_eq_u16_e32 vcc_lo, 10, v6
	v_cmp_lt_i16_e64 s0, 32, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_or_b32 s0, s0, vcc_lo
	v_add_co_ci_u32_e64 v5, vcc_lo, 0, v5, s1
	s_and_b32 s0, exec_lo, s0
	s_or_b32 s11, s0, s11
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB2_3
; %bb.4:                                ; %.critedge.preheader
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s11
	v_sub_nc_u16 v0, v6, 48
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v0, 0xff, v0
	v_cmp_gt_u16_e32 vcc_lo, 10, v0
	v_mov_b32_e32 v0, 0
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB2_8
; %bb.5:                                ; %.critedge.preheader141
                                        ;   in Loop: Header=BB2_2 Depth=1
	v_mov_b32_e32 v0, 0
	s_mov_b32 s1, 0
.LBB2_6:                                ; %.critedge
                                        ;   Parent Loop BB2_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_sub_nc_u16 v7, v6, 48
	v_mov_b32_e32 v9, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v5, 31, v9
	v_add_co_u32 v4, vcc_lo, s3, v9
	v_add_co_ci_u32_e32 v5, vcc_lo, s9, v5, vcc_lo
	global_load_u8 v6, v[4:5], off
	v_and_b32_e32 v4, 0xff, v7
	s_waitcnt vmcnt(0)
	v_sub_nc_u16 v5, v6, 48
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[7:8], null, v0, 10, v[4:5]
	v_and_b32_e32 v0, 0xff, v5
	v_add_nc_u32_e32 v8, 1, v9
	v_cmp_lt_u16_e32 vcc_lo, 9, v0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_mov_b32_e32 v0, v7
	s_or_b32 s1, vcc_lo, s1
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB2_6
; %bb.7:                                ; %Flow188
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
.LBB2_8:                                ; %Flow189
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	s_or_b32 exec_lo, exec_lo, s0
	v_ashrrev_i32_e32 v4, 31, v8
	v_add_co_u32 v6, vcc_lo, s4, v8
	v_add_nc_u32_e32 v11, -1, v8
	s_mov_b32 s11, 0
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v4, vcc_lo
	v_add_co_u32 v8, vcc_lo, s3, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v4, vcc_lo
.LBB2_9:                                ; %.critedge2
                                        ;   Parent Loop BB2_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_i8 v12, v[6:7], off
	v_dual_mov_b32 v4, v8 :: v_dual_mov_b32 v5, v9
	v_add_co_u32 v6, vcc_lo, v6, 1
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_u32 v8, vcc_lo, v4, 1
	v_add_nc_u32_e32 v11, 1, v11
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v5, vcc_lo
	s_waitcnt vmcnt(0)
	v_cmp_eq_u16_e64 s0, 10, v12
	v_cmp_lt_i16_e64 s1, 32, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s0, s1, s0
	s_and_b32 s0, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s11, s0, s11
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB2_9
; %bb.10:                               ; %.critedge4.preheader
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s11
	v_sub_nc_u16 v6, v12, 48
	v_mov_b32_e32 v10, 0
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v6, 0xff, v6
	v_cmpx_gt_u16_e32 10, v6
	s_cbranch_execz .LBB2_14
; %bb.11:                               ; %.critedge4.preheader140
                                        ;   in Loop: Header=BB2_2 Depth=1
	v_mov_b32_e32 v10, 0
	s_mov_b32 s11, 0
.LBB2_12:                               ; %.critedge4
                                        ;   Parent Loop BB2_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_sub_nc_u16 v6, v12, 48
	global_load_u8 v12, v[4:5], off
	v_add_co_u32 v4, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
	v_and_b32_e32 v6, 0xff, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[7:8], null, v10, 10, v[6:7]
	v_dual_mov_b32 v10, v7 :: v_dual_add_nc_u32 v11, 1, v11
	s_waitcnt vmcnt(0)
	v_sub_nc_u16 v9, v12, 48
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v6, 0xff, v9
	v_cmp_lt_u16_e64 s0, 9, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s11, s0, s11
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB2_12
; %bb.13:                               ; %Flow186
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s11
.LBB2_14:                               ; %Flow187
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	s_or_b32 exec_lo, exec_lo, s1
	v_ashrrev_i32_e32 v4, 31, v11
	v_add_co_u32 v6, vcc_lo, s4, v11
	s_mov_b32 s11, 0
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v4, vcc_lo
	v_add_co_u32 v8, vcc_lo, s3, v11
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v4, vcc_lo
.LBB2_15:                               ; %.critedge6
                                        ;   Parent Loop BB2_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_i8 v11, v[6:7], off
	v_dual_mov_b32 v4, v8 :: v_dual_mov_b32 v5, v9
	v_add_co_u32 v6, vcc_lo, v6, 1
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v8, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v5, vcc_lo
	s_waitcnt vmcnt(0)
	v_cmp_eq_u16_e64 s0, 10, v11
	v_cmp_lt_i16_e64 s1, 32, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s0, s1, s0
	s_and_b32 s0, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s11, s0, s11
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB2_15
; %bb.16:                               ; %.critedge8.preheader
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s11
	v_sub_nc_u16 v6, v11, 48
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v6, 0xff, v6
	v_cmp_gt_u16_e32 vcc_lo, 10, v6
	v_mov_b32_e32 v6, 0
	s_and_saveexec_b32 s1, vcc_lo
	s_cbranch_execz .LBB2_20
; %bb.17:                               ; %.critedge8.preheader139
                                        ;   in Loop: Header=BB2_2 Depth=1
	v_mov_b32_e32 v6, 0
	s_mov_b32 s11, 0
.LBB2_18:                               ; %.critedge8
                                        ;   Parent Loop BB2_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_sub_nc_u16 v7, v11, 48
	global_load_u8 v11, v[4:5], off
	v_add_co_u32 v4, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
	v_and_b32_e32 v7, 0xff, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[8:9], null, v6, 10, v[7:8]
	s_waitcnt vmcnt(0)
	v_sub_nc_u16 v12, v11, 48
	v_and_b32_e32 v6, 0xff, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_lt_u16_e64 s0, 9, v6
	v_mov_b32_e32 v6, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s11, s0, s11
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB2_18
; %bb.19:                               ; %Flow
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s11
.LBB2_20:                               ; %Flow185
                                        ;   in Loop: Header=BB2_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	s_or_b32 exec_lo, exec_lo, s1
	v_add_nc_u32_e32 v1, s2, v1
	v_lshlrev_b32_e32 v4, 8, v10
	v_lshlrev_b32_e32 v5, 16, v6
	v_cmp_le_i32_e32 vcc_lo, s8, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_or3_b32 v0, v4, v0, v5
	s_or_b32 s10, vcc_lo, s10
	global_store_b32 v[2:3], v0, off
	s_and_not1_b32 exec_lo, exec_lo, s10
	s_cbranch_execnz .LBB2_2
.LBB2_21:                               ; %Flow191
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z5parsePcPii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 13
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z5parsePcPii, .Lfunc_end2-_Z5parsePcPii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1052
; NumSgprs: 18
; NumVgprs: 13
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 13
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z9hist_kernPiiS_       ; -- Begin function _Z9hist_kernPiiS_
	.globl	_Z9hist_kernPiiS_
	.p2align	8
	.type	_Z9hist_kernPiiS_,@function
_Z9hist_kernPiiS_:                      ; @_Z9hist_kernPiiS_
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s5, s[0:1], 0x8
	s_load_b32 s4, s[0:1], 0x18
	s_mov_b32 s6, exec_lo
	s_waitcnt lgkmcnt(0)
	s_and_b32 s7, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mad_u64_u32 v[1:2], null, s15, s7, v[0:1]
	v_lshlrev_b32_e32 v0, 2, v0
	v_mov_b32_e32 v2, 0
	ds_store_b32 v0, v2 offset:2048
	ds_store_2addr_stride64_b32 v0, v2, v2 offset1:4
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_i32_e64 s5, v1
	s_cbranch_execz .LBB3_3
; %bb.1:                                ; %.lr.ph
	s_load_b64 s[2:3], s[0:1], 0x0
	v_mov_b32_e32 v4, 1
	v_mov_b32_e32 v2, v1
	s_mul_i32 s7, s4, s7
	s_mov_b32 s8, 0
.LBB3_2:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[5:6], 2, v[2:3]
	v_add_nc_u32_e32 v2, s7, v2
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v5, vcc_lo, s2, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s3, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_cmp_le_i32_e32 vcc_lo, s5, v2
	global_load_b32 v3, v[5:6], off
	s_or_b32 s8, vcc_lo, s8
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v5, 0xff, v3
	v_lshrrev_b32_e32 v6, 6, v3
	v_lshrrev_b32_e32 v3, 14, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b32_e32 v5, 2, v5
	v_and_b32_e32 v6, 0x3fc, v6
	s_delay_alu instid0(VALU_DEP_3)
	v_and_b32_e32 v3, 0x3fc, v3
	ds_add_u32 v5, v4 offset:2048
	ds_add_u32 v6, v4 offset:1024
	ds_add_u32 v3, v4
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB3_2
.LBB3_3:                                ; %Flow22
	s_or_b32 exec_lo, exec_lo, s6
	s_load_b64 s[0:1], s[0:1], 0x10
	v_ashrrev_i32_e32 v2, 31, v1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_add_nc_u32_e32 v4, 0x800, v0
	v_lshlrev_b64 v[5:6], 2, v[1:2]
	s_lshl_b32 s2, s4, 8
	v_dual_mov_b32 v2, 0 :: v_dual_add_nc_u32 v3, 0x400, v0
	ds_load_b32 v4, v4
	v_add_nc_u32_e32 v1, s2, v1
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 2, v[1:2]
	v_add_nc_u32_e32 v1, s2, v1
	v_add_co_u32 v5, vcc_lo, s0, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s1, v6, vcc_lo
	global_load_b32 v9, v[5:6], off
	ds_load_b32 v10, v3
	ds_load_b32 v11, v0
	v_add_co_u32 v3, vcc_lo, s0, v7
	s_waitcnt vmcnt(0) lgkmcnt(2)
	v_add_nc_u32_e32 v0, v9, v4
	v_add_co_ci_u32_e32 v4, vcc_lo, s1, v8, vcc_lo
	global_store_b32 v[5:6], v0, off
	global_load_b32 v5, v[3:4], off
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(0) lgkmcnt(1)
	v_add_nc_u32_e32 v2, v5, v10
	global_store_b32 v[3:4], v2, off
	global_load_b32 v2, v[0:1], off
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_nc_u32_e32 v2, v2, v11
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9hist_kernPiiS_
		.amdhsa_group_segment_fixed_size 3072
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 12
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z9hist_kernPiiS_, .Lfunc_end3-_Z9hist_kernPiiS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 512
; NumSgprs: 18
; NumVgprs: 12
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 3072 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 12
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 1024
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12get_nl_countPciPi
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z12get_nl_countPciPi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     23
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 2048
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z12get_line_posPciPiS0_
    .private_segment_fixed_size: 0
    .sgpr_count:     26
    .sgpr_spill_count: 0
    .symbol:         _Z12get_line_posPciPiS0_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     14
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z5parsePcPii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z5parsePcPii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     13
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 3072
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z9hist_kernPiiS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z9hist_kernPiiS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     12
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
