#include <stdio.h>
#include <string>
#include <iostream>
#include <fstream>
#include <vector>
#include <algorithm>
using namespace std;

__global__ void printArray(int *index, int outputsize) {
	int i = blockIdx.x * blockDim.x + threadIdx.x;
	if (i < outputsize) {
		printf(" %d", index[i]);
	}
}

__global__ void printArray(double *index, int outputsize) {
	int i = blockIdx.x * blockDim.x + threadIdx.x;
	if (i < outputsize) {
		printf(" %f", index[i]);
	}
}

__global__ void Count_number_of_term(int *A, int *Df) {
	int i = blockIdx.x * blockDim.x + threadIdx.x;
	int value = A[i] - 1;
	atomicAdd(&Df[value], 1);

}

__global__ void Kogge_Stone_scan_kernel(int *df, int *index, int InputSize, int thread_num, int *temp) {
	__shared__ int XY[100];
	int i = blockIdx.x * blockDim.x + threadIdx.x;
	if (i < InputSize) {
		XY[threadIdx.x] = df[i];
		__syncthreads();
	}

	for (unsigned int stride = 1; stride < blockDim.x; stride *= 2) {
		__syncthreads();
		if (threadIdx.x >= stride) {
			XY[threadIdx.x] += XY[threadIdx.x - stride];
		}
	}
	if (i < thread_num-1) {
		index[i + 1] = XY[threadIdx.x];
	}
		__syncthreads();
}

__global__ void Create_InvertedIndexA (int *A, int *B, int *Df, int *Index ,int *InvertedIndexA) {
	int temp = Index[threadIdx.x] + Df[threadIdx.x];
	if (blockIdx.x == 0) {
		for (unsigned int i = Index[threadIdx.x]; i < temp; i++) {
			__syncthreads();
			InvertedIndexA[i] = threadIdx.x + 1;
		}

	}
}

__global__ void Create_InvertedIndexB(int *A, int *B, double *C, int *Df, int *Index, int *InvertedIndexB, double *InvertedIndexC) {
	int i = blockIdx.x * blockDim.x + threadIdx.x;

	__syncthreads();
	int temp = 0;
	temp = Index[B[i]-1];
	__syncthreads();
	int value = B[i] - 1;
	int a = 0;
	a=atomicAdd(&Index[value], 1);
	InvertedIndexB[a] = A[i];
	InvertedIndexC[a] = C[i];
	__syncthreads();
}





// KNN Start

__global__ void knnTD(int *terms, double *qnorm, int *invertedIndex, double *norms, double *docs, int *index) {
	int i = blockIdx.x * blockDim.x + threadIdx.x;

	double temp = 0;
	for (int j = index[terms[i]]; j < index[terms[i]+1]; j++) {
		docs[invertedIndex[j]]+=qnorm[i]*norms[j];
		__syncthreads();
	}
}

__global__ void knn(int* terms, double *qnorm, double *docs, double *docNorm, double queryNorm) {
	int i = blockIdx.x * blockDim.x + threadIdx.x;
	if(docNorm[i] == 0 || queryNorm == 0) {
		docs[i] = 0;
	} else {
		docs[i] = docs[i]/(docNorm[i]*queryNorm);
	}
}

__global__ void printlist(int *terms, int *invertedIndex, int *index) {
	int i = blockIdx.x * blockDim.x + threadIdx.x;
	printf("Term -> %d\n", index[terms[i]]);
	for (int j = index[terms[i]]; j < index[terms[i]+1]; j++) {
		printf("%d -> %d\n", terms[i], invertedIndex[j]);
	}
	printf("\n");
}

__global__ void getDocNorm(int *docs, int *terms, double *norms, double *dn, int num) {
	int i = blockIdx.x * blockDim.x + threadIdx.x;

	double temp = 0.0;
	for (size_t j = 0; j < num; j++) {
		if(docs[j] == i) {
			temp+=(norms[j]*norms[j]);
		}
	}
	__syncthreads();
	dn[i] = sqrt(temp);
}

__global__ void oddEvenSort(double *data, int *dl, int num_elem) {
	int tid = (blockIdx.x*blockDim.x) + threadIdx.x;
	int tid_idx;
	int offset = 0; //Start off with even, then odd
	int num_swaps;
	dl[tid] = tid+1;
	__syncthreads();
	//Calculation maximum index for a given block
	//Last block it is number of elements minus one
	//Other blocks to end of block minus one
	int tid_idx_max = min((((blockIdx.x + 1)*(blockDim.x * 2)) - 1), (num_elem - 1));

	do
	{
		//Reset number of swaps
		num_swaps = 0;

		//work out index of data
		tid_idx = (tid * 2) + offset;

		//If no array or block overrun
		if (tid_idx < tid_idx_max) {
			//Read values into registers
			double d0 = data[tid_idx];
			int db0 = dl[tid_idx];
			double d1 = data[tid_idx + 1];
			int db1 = dl[tid_idx + 1];

			//Compare registers
			if (d0 < d1) {
				//Swap values if needed
				data[tid_idx] = d1;
				dl[tid_idx] = db1;
				data[tid_idx + 1] = d0;
				dl[tid_idx + 1] = db0;

				//keep track that we did a swap
				num_swaps++;
			}
		}

		//Switch from even to off, or odd to even
		if (offset == 0) {
			offset = 1;
		}
		else {
			offset = 0;
		}
	} while (__syncthreads_count(num_swaps) != 0);
}


__global__ void classify(int *dl, double *dn, int k, double *dc, int *u) {
	int i = blockIdx.x * blockDim.x + threadIdx.x;
	for (size_t j = 0; j < k; j++) {
		if(dl[j]/10 == u[i]) {
			dc[i] += dn[j];
		}
	}
}

// KNN end




int main(int argc, char **argv)
{
	int k;
	printf("%d\n", argc);
	if(argc < 2) {
		k = 3;
	} else {
		k = atoi(argv[1]);
	}

	// Read term-doc pairs
   ifstream ifs("result_norm.txt");
   string text;
   text.assign( (istreambuf_iterator<char>(ifs) ),
                     (istreambuf_iterator<char>()    ) );
   char arr[text.size()+1];
   strcpy(arr,text.c_str());

   vector<char*> v;
   vector<int> d1;
   vector<int> t1;
	vector<double> n1;
   char* chars_array = strtok(arr, "[");
   while(chars_array) {
         v.push_back(chars_array);
         chars_array = strtok(NULL, "[");
   }

	bool firstTerm = true, firstNorm = true;
   for(size_t n = 0; n < v.size(); ++n)
   {
        char* subchar_array = strtok(v[n], ",");
        while (subchar_array) {
            if (n == 0) {
               d1.push_back(atoi(subchar_array));
				} else if (n == 1) {
					if (firstTerm){
						d1.pop_back();
						firstTerm = false;
					}
               t1.push_back(atoi(subchar_array));
				} else if (n == 2) {
					if (firstNorm){
						t1.pop_back();
						firstNorm = false;
					}
					if (n1.size() == d1.size())
						break;
					n1.push_back(atof(subchar_array));
				}
            subchar_array = strtok(NULL, ",");
        }
   }

   int d[d1.size()];
   int t[t1.size()];
	double n[n1.size()];
   copy(d1.begin(), d1.end(), d);
   copy(t1.begin(), t1.end(), t);
	copy(n1.begin(), n1.end(), n);
	/*
	for (size_t i = 0; i < t1.size(); i++) {
      printf("%d -> [%d,%d,%f]\n",i,d[i],t[i],n[i]);
   }
	*/

	// Begin InvertedIndex algorithm

	int numDocs = d[d1.size()-1];

	const int arraySize = sizeof(d)/sizeof(int);
	printf("ArraySize: %d\n", arraySize);
	const int number_term = 7;
   int Df[number_term] = { 0 };
	int Index[number_term] = { 0 };
   vector<int> IA(arraySize,0);
   vector<int> IB(arraySize,0);
	vector<double> IC(arraySize,0);
	int InvertedIndexA[arraySize];//output
	int InvertedIndexB[arraySize];//output
	double InvertedIndexC[arraySize];//output
   copy(IA.begin(),IA.end(),InvertedIndexA);
   copy(IB.begin(),IB.end(),InvertedIndexB);
	copy(IC.begin(),IC.end(),InvertedIndexC);

	printf("A: %d\n", sizeof(InvertedIndexA)/sizeof(int));

	int thread_num = d[arraySize - 1];
	int blocks = (arraySize / thread_num) + (arraySize % thread_num != 0 ? 1 : 0);
	printf("blocks = %d\n", blocks);

	int *a, *b, *df, *index, *invertedIndexA, *invertedIndexB;
	double *c, *invertedIndexC, *dn;
	double docNorms[numDocs];
	cudaMallocManaged(&a, sizeof(d));
	cudaMallocManaged(&b, sizeof(t));
	cudaMallocManaged(&c, sizeof(n));
	cudaMallocManaged(&df, sizeof(Df));
	cudaMallocManaged(&index, sizeof(Index));
	cudaMallocManaged(&invertedIndexA, sizeof(InvertedIndexA));
	cudaMallocManaged(&invertedIndexB, sizeof(InvertedIndexB));
	cudaMallocManaged(&invertedIndexC, sizeof(InvertedIndexC));
	cudaMallocManaged(&dn,sizeof(docNorms));
	cudaMemcpy(a, d, sizeof(d), cudaMemcpyHostToDevice);
	cudaMemcpy(b, t, sizeof(t), cudaMemcpyHostToDevice);
	cudaMemcpy(c, n, sizeof(n), cudaMemcpyHostToDevice);
	cudaMemcpy(df, Df, sizeof(Df), cudaMemcpyHostToDevice);
	cudaMemcpy(index, Index, sizeof(Index), cudaMemcpyHostToDevice);
	cudaMemcpy(invertedIndexA, InvertedIndexA, sizeof(InvertedIndexA), cudaMemcpyHostToDevice);
	cudaMemcpy(invertedIndexB, InvertedIndexB, sizeof(InvertedIndexB), cudaMemcpyHostToDevice);
	cudaMemcpy(invertedIndexC, InvertedIndexC, sizeof(InvertedIndexC), cudaMemcpyHostToDevice);
	cudaMemcpy(dn,docNorms,sizeof(docNorms),cudaMemcpyHostToDevice);

	int Temp[number_term] = { 0 };int *temp;
	cudaMallocManaged(&temp, sizeof(Temp));
	cudaMemcpy(temp, Temp, sizeof(Temp), cudaMemcpyHostToDevice);

	printf("Initial Array:\n");
	printf("d:");
	printArray <<<1, arraySize>>> (a, sizeof(d) / sizeof(int));
	cudaDeviceSynchronize();
	printf("\n");

	printf("t:");
	printArray <<<1, arraySize >>> (b, sizeof(t) / sizeof(int));
	cudaDeviceSynchronize();
	printf("\n");

	printf("Count_number_of_term: \n");
	Count_number_of_term <<<blocks, thread_num>>> (b,df);
	cudaDeviceSynchronize();
	printArray <<<1, thread_num>>> (df, sizeof(Df) / sizeof(int));
	cudaDeviceSynchronize();
	printf("\n");

	printf("Execute the prefix sum by Kogge Stone:\n");
	Kogge_Stone_scan_kernel <<<blocks, thread_num>>> (df, index, arraySize, thread_num, temp);
	cudaDeviceSynchronize();

	//printf("Input count number array to the Kogge Stone:\n");
	printArray <<<1, arraySize >>> (index, sizeof(Index) / sizeof(int));
	cudaDeviceSynchronize();
	printf("\n");


	printf("InvertedIndex Array:\n");
	Create_InvertedIndexA <<<1, thread_num >>> (a, b, df, index, invertedIndexA);
	cudaDeviceSynchronize();
	printf("Terms: \n");
	for (size_t j = 0; j < arraySize; j++) {
		printf(" %d", invertedIndexA[j]);
	}
	printf("\n\n");

	printf("Documents: \n");
	Create_InvertedIndexB <<<blocks, thread_num >>> (a, b, c, df, index, invertedIndexB, invertedIndexC);
	cudaDeviceSynchronize();
	for (size_t j = 0; j < arraySize; j++) {
		printf(" %d", invertedIndexB[j]);
	}
	printf("\n\n");

	printf("Norms: \n");
	for (size_t j = 0; j < arraySize; j++) {
		printf(" %d", invertedIndexB[j]);
	}
	printf("\n\n");

	getDocNorm<<<1,numDocs>>>(a,b,c,dn,d1.size());
	cudaDeviceSynchronize();


   //Start Querying

   ifstream ifq("querydoc.txt");
   string qur;
   qur.assign( (istreambuf_iterator<char>(ifq) ),
                     (istreambuf_iterator<char>()    ) );
   char qarr[qur.size()+1];
   strcpy(qarr,qur.c_str());

   vector<char*> vq;
   vector<int> tq;
   vector<double> tf;
   char* query_array = strtok(qarr, "[");
   while(query_array) {
         vq.push_back(query_array);
         query_array = strtok(NULL, "[");
   }

   for(size_t n = 0; n < vq.size(); ++n)
   {
        char* subchar_array = strtok(vq[n], ",");
        while (subchar_array) {
            if (n == 0)
               tq.push_back(atoi(subchar_array));
            else if (n == 1)
               tf.push_back(atof(subchar_array));
            subchar_array = strtok(NULL, ",");
        }
   }

	int q_size = tq.size();
   int qterm[q_size];
	double sum[q_size];
   double qtermfreq[tf.size()];
   copy(tq.begin(), tq.end(), qterm);
   copy(tf.begin(), tf.end(), qtermfreq);


	int *qtptr;
	double *qfptr, *ds;
	double docSums[numDocs];


	cudaMallocManaged(&qtptr,q_size*sizeof(int));
	cudaMallocManaged(&qfptr,q_size*sizeof(double));
	cudaMallocManaged(&ds,sizeof(docSums));
	cudaMemcpy(qtptr,qterm,q_size *sizeof(int),cudaMemcpyHostToDevice);
	cudaMemcpy(qfptr,qtermfreq,q_size *sizeof(double),cudaMemcpyHostToDevice);
	cudaMemcpy(ds,docSums,sizeof(docSums),cudaMemcpyHostToDevice);

	double q_norm = 0;
	for (size_t j = 0; j < q_size; j++) {
		q_norm+=(qtermfreq[j]*qtermfreq[j]);
	}

	q_norm = sqrt(q_norm);

	knnTD<<<1,q_size>>>(qtptr,qfptr,invertedIndexB,invertedIndexC,ds,index);
	cudaDeviceSynchronize();
	knn<<<1,numDocs>>>(qtptr,qfptr,ds,dn,q_norm);
	cudaDeviceSynchronize();


/*
	printf("\n\nDoc Distances:\n");

	for (size_t j = 0; j < numDocs; j++) {
		printf("   %d -> %f\n",j+1,ds[j]);
	}
*/

	int docLabel[numDocs];
	int *dl;
	cudaMallocManaged(&dl,sizeof(docLabel));
	cudaMemcpy(dl,docLabel,sizeof(docLabel),cudaMemcpyHostToDevice);

	oddEvenSort<<<1,numDocs>>>(ds,dl,numDocs);
	cudaDeviceSynchronize();

	vector<int> nn;
	printf("\nK Nearest Neighbors (k=%d): \n", k);
	for (size_t j = 0; j < k; j++) {
		if (find(nn.begin(), nn.end(), dl[j]) != nn.end()) {

		} else {
			nn.push_back(dl[j]/10);
		}
		printf("   %d -> %f -> label = %d\n", dl[j],ds[j],dl[j]/10);
	}
	int uniqueN[nn.size()];
	copy(nn.begin(), nn.end(), uniqueN);


	double kCount[nn.size()];
	double *dc;
	int *u;
	cudaMallocManaged(&dc,sizeof(kCount));
	cudaMallocManaged(&u,sizeof(uniqueN));
	cudaMemcpy(dc,kCount,sizeof(kCount),cudaMemcpyHostToDevice);
	cudaMemcpy(u,uniqueN,sizeof(uniqueN),cudaMemcpyHostToDevice);
	classify<<<1,nn.size()>>>(dl,ds,k,dc,u);
	cudaDeviceSynchronize();

	double max = 0;
	int max_i = 0;
	for (size_t j = 0; j < nn.size(); j++) {
		if(dc[j] > max) {
			max = dc[j];
			max_i = j;
		}
	}
	printf("\nQuery Document is labelled = %d\n", u[max_i]);



	printf("\n");



	cudaFree(a);
	cudaFree(b);
	cudaFree(c);
	cudaFree(df);
	cudaFree(index);
	cudaFree(invertedIndexA);
	cudaFree(invertedIndexB);
	cudaFree(invertedIndexC);
	cudaFree(qtptr);
	cudaFree(qfptr);
	cudaFree(ds);
	cudaFree(dn);
	cudaFree(dl);
	cudaFree(dc);

	return 0;
}

	.file	"tmpxft_00315897_00000000-6_KNNADC.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4417:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4417:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.type	_Z17cudaMallocManagedIiE9cudaErrorPPT_mj.constprop.0.isra.0, @function
_Z17cudaMallocManagedIiE9cudaErrorPPT_mj.constprop.0.isra.0:
.LFB5488:
	.cfi_startproc
	movl	$1, %edx
	jmp	cudaMallocManaged@PLT
	.cfi_endproc
.LFE5488:
	.size	_Z17cudaMallocManagedIiE9cudaErrorPPT_mj.constprop.0.isra.0, .-_Z17cudaMallocManagedIiE9cudaErrorPPT_mj.constprop.0.isra.0
	.align 2
	.type	_ZNSt15basic_streambufIcSt11char_traitsIcEE6sbumpcEv.isra.0, @function
_ZNSt15basic_streambufIcSt11char_traitsIcEE6sbumpcEv.isra.0:
.LFB5489:
	.cfi_startproc
	movq	16(%rdi), %rax
	cmpq	24(%rdi), %rax
	jnb	.L4
	incq	%rax
	movq	%rax, 16(%rdi)
	ret
.L4:
	movq	(%rdi), %rax
	jmp	*80(%rax)
	.cfi_endproc
.LFE5489:
	.size	_ZNSt15basic_streambufIcSt11char_traitsIcEE6sbumpcEv.isra.0, .-_ZNSt15basic_streambufIcSt11char_traitsIcEE6sbumpcEv.isra.0
	.align 2
	.type	_ZNSt15__new_allocatorIPcE8allocateEmPKv.isra.0, @function
_ZNSt15__new_allocatorIPcE8allocateEmPKv.isra.0:
.LFB5491:
	.cfi_startproc
	movabsq	$1152921504606846975, %rax
	cmpq	%rdi, %rax
	jnb	.L9
	pushq	%rax
	.cfi_def_cfa_offset 16
	movabsq	$2305843009213693951, %rax
	cmpq	%rdi, %rax
	jnb	.L10
	call	_ZSt28__throw_bad_array_new_lengthv@PLT
.L10:
	call	_ZSt17__throw_bad_allocv@PLT
.L9:
	.cfi_def_cfa_offset 8
	salq	$3, %rdi
	jmp	_Znwm@PLT
	.cfi_endproc
.LFE5491:
	.size	_ZNSt15__new_allocatorIPcE8allocateEmPKv.isra.0, .-_ZNSt15__new_allocatorIPcE8allocateEmPKv.isra.0
	.type	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0, @function
_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0:
.LFB5492:
	.cfi_startproc
	jmp	cudaLaunchKernel@PLT
	.cfi_endproc
.LFE5492:
	.size	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0, .-_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	.type	_ZSt4copyIN9__gnu_cxx17__normal_iteratorIPdSt6vectorIdSaIdEEEES2_ET0_T_S8_S7_.isra.0, @function
_ZSt4copyIN9__gnu_cxx17__normal_iteratorIPdSt6vectorIdSaIdEEEES2_ET0_T_S8_S7_.isra.0:
.LFB5493:
	.cfi_startproc
	movq	%rdi, %rax
	movq	%rdx, %rdi
	subq	%rax, %rsi
	movq	%rsi, %rdx
	cmpq	$8, %rsi
	jle	.L16
	movq	%rax, %rsi
	jmp	memmove@PLT
.L16:
	jne	.L15
	movsd	(%rax), %xmm0
	movsd	%xmm0, (%rdi)
.L15:
	ret
	.cfi_endproc
.LFE5493:
	.size	_ZSt4copyIN9__gnu_cxx17__normal_iteratorIPdSt6vectorIdSaIdEEEES2_ET0_T_S8_S7_.isra.0, .-_ZSt4copyIN9__gnu_cxx17__normal_iteratorIPdSt6vectorIdSaIdEEEES2_ET0_T_S8_S7_.isra.0
	.type	_ZSt4copyIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEES2_ET0_T_S8_S7_.isra.0, @function
_ZSt4copyIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEES2_ET0_T_S8_S7_.isra.0:
.LFB5495:
	.cfi_startproc
	movq	%rdi, %rax
	movq	%rdx, %rdi
	subq	%rax, %rsi
	movq	%rsi, %rdx
	cmpq	$4, %rsi
	jle	.L19
	movq	%rax, %rsi
	jmp	memmove@PLT
.L19:
	jne	.L18
	movl	(%rax), %eax
	movl	%eax, (%rdi)
.L18:
	ret
	.cfi_endproc
.LFE5495:
	.size	_ZSt4copyIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEES2_ET0_T_S8_S7_.isra.0, .-_ZSt4copyIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEES2_ET0_T_S8_S7_.isra.0
	.globl	_Z31__device_stub__Z10printArrayPiiPii
	.type	_Z31__device_stub__Z10printArrayPiiPii, @function
_Z31__device_stub__Z10printArrayPiiPii:
.LFB4439:
	.cfi_startproc
	endbr64
	subq	$88, %rsp
	.cfi_def_cfa_offset 96
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	movl	%esi, 4(%rsp)
	leaq	32(%rsp), %rdi
	leaq	44(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 56(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 64(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L21
	pushq	24(%rsp)
	.cfi_def_cfa_offset 104
	leaq	_Z10printArrayPii(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 112
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	72(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 104
	popq	%rdx
	.cfi_def_cfa_offset 96
.L21:
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L23
	call	__stack_chk_fail@PLT
.L23:
	addq	$88, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4439:
	.size	_Z31__device_stub__Z10printArrayPiiPii, .-_Z31__device_stub__Z10printArrayPiiPii
	.globl	_Z10printArrayPii
	.type	_Z10printArrayPii, @function
_Z10printArrayPii:
.LFB4440:
	.cfi_startproc
	endbr64
	jmp	_Z31__device_stub__Z10printArrayPiiPii
	.cfi_endproc
.LFE4440:
	.size	_Z10printArrayPii, .-_Z10printArrayPii
	.globl	_Z31__device_stub__Z10printArrayPdiPdi
	.type	_Z31__device_stub__Z10printArrayPdiPdi, @function
_Z31__device_stub__Z10printArrayPdiPdi:
.LFB4441:
	.cfi_startproc
	endbr64
	subq	$88, %rsp
	.cfi_def_cfa_offset 96
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	movl	%esi, 4(%rsp)
	leaq	32(%rsp), %rdi
	leaq	44(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 56(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 64(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L26
	pushq	24(%rsp)
	.cfi_def_cfa_offset 104
	leaq	_Z10printArrayPdi(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 112
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	72(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 104
	popq	%rdx
	.cfi_def_cfa_offset 96
.L26:
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L28
	call	__stack_chk_fail@PLT
.L28:
	addq	$88, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4441:
	.size	_Z31__device_stub__Z10printArrayPdiPdi, .-_Z31__device_stub__Z10printArrayPdiPdi
	.globl	_Z10printArrayPdi
	.type	_Z10printArrayPdi, @function
_Z10printArrayPdi:
.LFB4442:
	.cfi_startproc
	endbr64
	jmp	_Z31__device_stub__Z10printArrayPdiPdi
	.cfi_endproc
.LFE4442:
	.size	_Z10printArrayPdi, .-_Z10printArrayPdi
	.globl	_Z42__device_stub__Z20Count_number_of_termPiS_PiS_
	.type	_Z42__device_stub__Z20Count_number_of_termPiS_PiS_, @function
_Z42__device_stub__Z20Count_number_of_termPiS_PiS_:
.LFB4443:
	.cfi_startproc
	endbr64
	subq	$88, %rsp
	.cfi_def_cfa_offset 96
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	16(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	32(%rsp), %rdi
	leaq	44(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 56(%rsp)
	movq	%rsp, %rax
	movq	%rax, 64(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L31
	pushq	24(%rsp)
	.cfi_def_cfa_offset 104
	leaq	_Z20Count_number_of_termPiS_(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 112
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	72(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 104
	popq	%rdx
	.cfi_def_cfa_offset 96
.L31:
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L33
	call	__stack_chk_fail@PLT
.L33:
	addq	$88, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4443:
	.size	_Z42__device_stub__Z20Count_number_of_termPiS_PiS_, .-_Z42__device_stub__Z20Count_number_of_termPiS_PiS_
	.globl	_Z20Count_number_of_termPiS_
	.type	_Z20Count_number_of_termPiS_, @function
_Z20Count_number_of_termPiS_:
.LFB4444:
	.cfi_startproc
	endbr64
	jmp	_Z42__device_stub__Z20Count_number_of_termPiS_PiS_
	.cfi_endproc
.LFE4444:
	.size	_Z20Count_number_of_termPiS_, .-_Z20Count_number_of_termPiS_
	.globl	_Z49__device_stub__Z23Kogge_Stone_scan_kernelPiS_iiS_PiS_iiS_
	.type	_Z49__device_stub__Z23Kogge_Stone_scan_kernelPiS_iiS_PiS_iiS_, @function
_Z49__device_stub__Z23Kogge_Stone_scan_kernelPiS_iiS_PiS_iiS_:
.LFB4445:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%r8, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 104(%rsp)
	movq	%rsp, %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L36
	pushq	48(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z23Kogge_Stone_scan_kernelPiS_iiS_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 160
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L36:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L38
	call	__stack_chk_fail@PLT
.L38:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4445:
	.size	_Z49__device_stub__Z23Kogge_Stone_scan_kernelPiS_iiS_PiS_iiS_, .-_Z49__device_stub__Z23Kogge_Stone_scan_kernelPiS_iiS_PiS_iiS_
	.globl	_Z23Kogge_Stone_scan_kernelPiS_iiS_
	.type	_Z23Kogge_Stone_scan_kernelPiS_iiS_, @function
_Z23Kogge_Stone_scan_kernelPiS_iiS_:
.LFB4446:
	.cfi_startproc
	endbr64
	jmp	_Z49__device_stub__Z23Kogge_Stone_scan_kernelPiS_iiS_PiS_iiS_
	.cfi_endproc
.LFE4446:
	.size	_Z23Kogge_Stone_scan_kernelPiS_iiS_, .-_Z23Kogge_Stone_scan_kernelPiS_iiS_
	.globl	_Z49__device_stub__Z21Create_InvertedIndexAPiS_S_S_S_PiS_S_S_S_
	.type	_Z49__device_stub__Z21Create_InvertedIndexAPiS_S_S_S_PiS_S_S_S_, @function
_Z49__device_stub__Z21Create_InvertedIndexAPiS_S_S_S_PiS_S_S_S_:
.LFB4447:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 96(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L41
	pushq	64(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z21Create_InvertedIndexAPiS_S_S_S_(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 176
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	112(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L41:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L43
	call	__stack_chk_fail@PLT
.L43:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4447:
	.size	_Z49__device_stub__Z21Create_InvertedIndexAPiS_S_S_S_PiS_S_S_S_, .-_Z49__device_stub__Z21Create_InvertedIndexAPiS_S_S_S_PiS_S_S_S_
	.globl	_Z21Create_InvertedIndexAPiS_S_S_S_
	.type	_Z21Create_InvertedIndexAPiS_S_S_S_, @function
_Z21Create_InvertedIndexAPiS_S_S_S_:
.LFB4448:
	.cfi_startproc
	endbr64
	jmp	_Z49__device_stub__Z21Create_InvertedIndexAPiS_S_S_S_PiS_S_S_S_
	.cfi_endproc
.LFE4448:
	.size	_Z21Create_InvertedIndexAPiS_S_S_S_, .-_Z21Create_InvertedIndexAPiS_S_S_S_
	.globl	_Z54__device_stub__Z21Create_InvertedIndexBPiS_PdS_S_S_S0_PiS_PdS_S_S_S0_
	.type	_Z54__device_stub__Z21Create_InvertedIndexBPiS_PdS_S_S_S0_PiS_PdS_S_S_S0_, @function
_Z54__device_stub__Z21Create_InvertedIndexBPiS_PdS_S_S_S0_PiS_PdS_S_S_S0_:
.LFB4449:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	192(%rsp), %rax
	movq	%rdi, 56(%rsp)
	leaq	88(%rsp), %rdi
	movq	%rsi, 48(%rsp)
	leaq	100(%rsp), %rsi
	movq	%rdx, 40(%rsp)
	leaq	72(%rsp), %rdx
	movq	%rcx, 32(%rsp)
	leaq	80(%rsp), %rcx
	movq	%r8, 24(%rsp)
	movq	%r9, 16(%rsp)
	movq	%rax, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rax
	movl	$1, 96(%rsp)
	movq	%rax, 112(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 88(%rsp)
	movq	%rax, 100(%rsp)
	movl	$1, 108(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L46
	pushq	80(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z21Create_InvertedIndexBPiS_PdS_S_S_S0_(%rip), %rdi
	pushq	80(%rsp)
	.cfi_def_cfa_offset 208
	movq	116(%rsp), %rcx
	movl	124(%rsp), %r8d
	movq	104(%rsp), %rsi
	movl	112(%rsp), %edx
	leaq	128(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L46:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L48
	call	__stack_chk_fail@PLT
.L48:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4449:
	.size	_Z54__device_stub__Z21Create_InvertedIndexBPiS_PdS_S_S_S0_PiS_PdS_S_S_S0_, .-_Z54__device_stub__Z21Create_InvertedIndexBPiS_PdS_S_S_S0_PiS_PdS_S_S_S0_
	.globl	_Z21Create_InvertedIndexBPiS_PdS_S_S_S0_
	.type	_Z21Create_InvertedIndexBPiS_PdS_S_S_S0_, @function
_Z21Create_InvertedIndexBPiS_PdS_S_S_S0_:
.LFB4450:
	.cfi_startproc
	endbr64
	jmp	_Z54__device_stub__Z21Create_InvertedIndexBPiS_PdS_S_S_S0_PiS_PdS_S_S_S0_
	.cfi_endproc
.LFE4450:
	.size	_Z21Create_InvertedIndexBPiS_PdS_S_S_S0_, .-_Z21Create_InvertedIndexBPiS_PdS_S_S_S0_
	.globl	_Z36__device_stub__Z5knnTDPiPdS_S0_S0_S_PiPdS_S0_S0_S_
	.type	_Z36__device_stub__Z5knnTDPiPdS_S0_S0_S_PiPdS_S0_S0_S_, @function
_Z36__device_stub__Z5knnTDPiPdS_S0_S0_S_PiPdS_S0_S0_S_:
.LFB4451:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movq	%r9, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 88(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 96(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L51
	pushq	56(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z5knnTDPiPdS_S0_S0_S_(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 176
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	104(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L51:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L53
	call	__stack_chk_fail@PLT
.L53:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4451:
	.size	_Z36__device_stub__Z5knnTDPiPdS_S0_S0_S_PiPdS_S0_S0_S_, .-_Z36__device_stub__Z5knnTDPiPdS_S0_S0_S_PiPdS_S0_S0_S_
	.globl	_Z5knnTDPiPdS_S0_S0_S_
	.type	_Z5knnTDPiPdS_S0_S0_S_, @function
_Z5knnTDPiPdS_S0_S0_S_:
.LFB4452:
	.cfi_startproc
	endbr64
	jmp	_Z36__device_stub__Z5knnTDPiPdS_S0_S0_S_PiPdS_S0_S0_S_
	.cfi_endproc
.LFE4452:
	.size	_Z5knnTDPiPdS_S0_S0_S_, .-_Z5knnTDPiPdS_S0_S0_S_
	.globl	_Z31__device_stub__Z3knnPiPdS0_S0_dPiPdS0_S0_d
	.type	_Z31__device_stub__Z3knnPiPdS0_S0_dPiPdS0_S0_d, @function
_Z31__device_stub__Z3knnPiPdS0_S0_dPiPdS0_S0_d:
.LFB4453:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movsd	%xmm0, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 96(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L56
	pushq	64(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z3knnPiPdS0_S0_d(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 176
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	112(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L56:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L58
	call	__stack_chk_fail@PLT
.L58:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4453:
	.size	_Z31__device_stub__Z3knnPiPdS0_S0_dPiPdS0_S0_d, .-_Z31__device_stub__Z3knnPiPdS0_S0_dPiPdS0_S0_d
	.globl	_Z3knnPiPdS0_S0_d
	.type	_Z3knnPiPdS0_S0_d, @function
_Z3knnPiPdS0_S0_d:
.LFB4454:
	.cfi_startproc
	endbr64
	jmp	_Z31__device_stub__Z3knnPiPdS0_S0_dPiPdS0_S0_d
	.cfi_endproc
.LFE4454:
	.size	_Z3knnPiPdS0_S0_d, .-_Z3knnPiPdS0_S0_d
	.globl	_Z32__device_stub__Z9printlistPiS_S_PiS_S_
	.type	_Z32__device_stub__Z9printlistPiS_S_PiS_S_, @function
_Z32__device_stub__Z9printlistPiS_S_PiS_S_:
.LFB4455:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L61
	pushq	48(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z9printlistPiS_S_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 144
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L61:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L63
	call	__stack_chk_fail@PLT
.L63:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4455:
	.size	_Z32__device_stub__Z9printlistPiS_S_PiS_S_, .-_Z32__device_stub__Z9printlistPiS_S_PiS_S_
	.globl	_Z9printlistPiS_S_
	.type	_Z9printlistPiS_S_, @function
_Z9printlistPiS_S_:
.LFB4456:
	.cfi_startproc
	endbr64
	jmp	_Z32__device_stub__Z9printlistPiS_S_PiS_S_
	.cfi_endproc
.LFE4456:
	.size	_Z9printlistPiS_S_, .-_Z9printlistPiS_S_
	.globl	_Z38__device_stub__Z10getDocNormPiS_PdS0_iPiS_PdS0_i
	.type	_Z38__device_stub__Z10getDocNormPiS_PdS0_iPiS_PdS0_i, @function
_Z38__device_stub__Z10getDocNormPiS_PdS0_iPiS_PdS0_i:
.LFB4457:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 96(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L66
	pushq	64(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z10getDocNormPiS_PdS0_i(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 176
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	112(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L66:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L68
	call	__stack_chk_fail@PLT
.L68:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4457:
	.size	_Z38__device_stub__Z10getDocNormPiS_PdS0_iPiS_PdS0_i, .-_Z38__device_stub__Z10getDocNormPiS_PdS0_iPiS_PdS0_i
	.globl	_Z10getDocNormPiS_PdS0_i
	.type	_Z10getDocNormPiS_PdS0_i, @function
_Z10getDocNormPiS_PdS0_i:
.LFB4458:
	.cfi_startproc
	endbr64
	jmp	_Z38__device_stub__Z10getDocNormPiS_PdS0_iPiS_PdS0_i
	.cfi_endproc
.LFE4458:
	.size	_Z10getDocNormPiS_PdS0_i, .-_Z10getDocNormPiS_PdS0_i
	.globl	_Z34__device_stub__Z11oddEvenSortPdPiiPdPii
	.type	_Z34__device_stub__Z11oddEvenSortPdPiiPdPii, @function
_Z34__device_stub__Z11oddEvenSortPdPiiPdPii:
.LFB4459:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 80(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 88(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L71
	pushq	48(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z11oddEvenSortPdPii(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 144
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	96(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L71:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L73
	call	__stack_chk_fail@PLT
.L73:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4459:
	.size	_Z34__device_stub__Z11oddEvenSortPdPiiPdPii, .-_Z34__device_stub__Z11oddEvenSortPdPiiPdPii
	.globl	_Z11oddEvenSortPdPii
	.type	_Z11oddEvenSortPdPii, @function
_Z11oddEvenSortPdPii:
.LFB4460:
	.cfi_startproc
	endbr64
	jmp	_Z34__device_stub__Z11oddEvenSortPdPiiPdPii
	.cfi_endproc
.LFE4460:
	.size	_Z11oddEvenSortPdPii, .-_Z11oddEvenSortPdPii
	.globl	_Z35__device_stub__Z8classifyPiPdiS0_S_PiPdiS0_S_
	.type	_Z35__device_stub__Z8classifyPiPdiS0_S_PiPdiS0_S_, @function
_Z35__device_stub__Z8classifyPiPdiS0_S_PiPdiS0_S_:
.LFB4461:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movl	%edx, 28(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 96(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	28(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L76
	pushq	64(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z8classifyPiPdiS0_S_(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 176
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	112(%rsp), %r9
	call	_Z16cudaLaunchKernelIcE9cudaErrorPT_4dim3S3_PPvmP11CUstream_st.isra.0
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L76:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L78
	call	__stack_chk_fail@PLT
.L78:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4461:
	.size	_Z35__device_stub__Z8classifyPiPdiS0_S_PiPdiS0_S_, .-_Z35__device_stub__Z8classifyPiPdiS0_S_PiPdiS0_S_
	.globl	_Z8classifyPiPdiS0_S_
	.type	_Z8classifyPiPdiS0_S_, @function
_Z8classifyPiPdiS0_S_:
.LFB4462:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z8classifyPiPdiS0_S_PiPdiS0_S_
	.cfi_endproc
.LFE4462:
	.size	_Z8classifyPiPdiS0_S_, .-_Z8classifyPiPdiS0_S_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z8classifyPiPdiS0_S_"
.LC1:
	.string	"_Z11oddEvenSortPdPii"
.LC2:
	.string	"_Z10getDocNormPiS_PdS0_i"
.LC3:
	.string	"_Z9printlistPiS_S_"
.LC4:
	.string	"_Z3knnPiPdS0_S0_d"
.LC5:
	.string	"_Z5knnTDPiPdS_S0_S0_S_"
.LC6:
	.string	"_Z21Create_InvertedIndexBPiS_PdS_S_S_S0_"
.LC7:
	.string	"_Z21Create_InvertedIndexAPiS_S_S_S_"
.LC8:
	.string	"_Z23Kogge_Stone_scan_kernelPiS_iiS_"
.LC9:
	.string	"_Z20Count_number_of_termPiS_"
.LC10:
	.string	"_Z10printArrayPdi"
.LC11:
	.string	"_Z10printArrayPii"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4464:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z8classifyPiPdiS0_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC1(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z11oddEvenSortPdPii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC2(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z10getDocNormPiS_PdS0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC3(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z9printlistPiS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC4(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z3knnPiPdS0_S0_d(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC5(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z5knnTDPiPdS_S0_S0_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC6(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z21Create_InvertedIndexBPiS_PdS_S_S_S0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC7(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z21Create_InvertedIndexAPiS_S_S_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	leaq	.LC8(%rip), %rdx
	pushq	$0
	.cfi_def_cfa_offset 24
	movq	%rdx, %rcx
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	_Z23Kogge_Stone_scan_kernelPiS_iiS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC9(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z20Count_number_of_termPiS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC10(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z10printArrayPdi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC11(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z10printArrayPii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4464:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.text._ZNSt6vectorIPcSaIS0_EED2Ev,"axG",@progbits,_ZNSt6vectorIPcSaIS0_EED5Ev,comdat
	.align 2
	.weak	_ZNSt6vectorIPcSaIS0_EED2Ev
	.type	_ZNSt6vectorIPcSaIS0_EED2Ev, @function
_ZNSt6vectorIPcSaIS0_EED2Ev:
.LFB4807:
	.cfi_startproc
	endbr64
	movq	(%rdi), %rax
	testq	%rax, %rax
	je	.L83
	movq	16(%rdi), %rsi
	movq	%rax, %rdi
	subq	%rax, %rsi
	jmp	_ZdlPvm@PLT
.L83:
	ret
	.cfi_endproc
.LFE4807:
	.size	_ZNSt6vectorIPcSaIS0_EED2Ev, .-_ZNSt6vectorIPcSaIS0_EED2Ev
	.weak	_ZNSt6vectorIPcSaIS0_EED1Ev
	.set	_ZNSt6vectorIPcSaIS0_EED1Ev,_ZNSt6vectorIPcSaIS0_EED2Ev
	.section	.text._ZNSt6vectorIiSaIiEED2Ev,"axG",@progbits,_ZNSt6vectorIiSaIiEED5Ev,comdat
	.align 2
	.weak	_ZNSt6vectorIiSaIiEED2Ev
	.type	_ZNSt6vectorIiSaIiEED2Ev, @function
_ZNSt6vectorIiSaIiEED2Ev:
.LFB4819:
	.cfi_startproc
	endbr64
	movq	(%rdi), %rax
	testq	%rax, %rax
	je	.L85
	movq	16(%rdi), %rsi
	movq	%rax, %rdi
	subq	%rax, %rsi
	jmp	_ZdlPvm@PLT
.L85:
	ret
	.cfi_endproc
.LFE4819:
	.size	_ZNSt6vectorIiSaIiEED2Ev, .-_ZNSt6vectorIiSaIiEED2Ev
	.weak	_ZNSt6vectorIiSaIiEED1Ev
	.set	_ZNSt6vectorIiSaIiEED1Ev,_ZNSt6vectorIiSaIiEED2Ev
	.section	.text._ZNSt6vectorIdSaIdEED2Ev,"axG",@progbits,_ZNSt6vectorIdSaIdEED5Ev,comdat
	.align 2
	.weak	_ZNSt6vectorIdSaIdEED2Ev
	.type	_ZNSt6vectorIdSaIdEED2Ev, @function
_ZNSt6vectorIdSaIdEED2Ev:
.LFB4831:
	.cfi_startproc
	endbr64
	movq	(%rdi), %rax
	testq	%rax, %rax
	je	.L87
	movq	16(%rdi), %rsi
	movq	%rax, %rdi
	subq	%rax, %rsi
	jmp	_ZdlPvm@PLT
.L87:
	ret
	.cfi_endproc
.LFE4831:
	.size	_ZNSt6vectorIdSaIdEED2Ev, .-_ZNSt6vectorIdSaIdEED2Ev
	.weak	_ZNSt6vectorIdSaIdEED1Ev
	.set	_ZNSt6vectorIdSaIdEED1Ev,_ZNSt6vectorIdSaIdEED2Ev
	.section	.rodata._ZNSt6vectorIiSaIiEEC2EmRKiRKS0_.str1.1,"aMS",@progbits,1
.LC12:
	.string	"cannot create std::vector larger than max_size()"
	.section	.text._ZNSt6vectorIiSaIiEEC2EmRKiRKS0_,"axG",@progbits,_ZNSt6vectorIiSaIiEEC5EmRKiRKS0_,comdat
	.align 2
	.weak	_ZNSt6vectorIiSaIiEEC2EmRKiRKS0_
	.type	_ZNSt6vectorIiSaIiEEC2EmRKiRKS0_, @function
_ZNSt6vectorIiSaIiEEC2EmRKiRKS0_:
.LFB4852:
	.cfi_startproc
	endbr64
	movabsq	$2305843009213693951, %rax
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	pushq	%rcx
	.cfi_def_cfa_offset 48
	cmpq	%rsi, %rax
	jnb	.L90
	leaq	.LC12(%rip), %rdi
	call	_ZSt20__throw_length_errorPKc@PLT
.L90:
	movq	%rdx, %r13
	xorl	%edx, %edx
	movq	%rdi, %rbx
	movq	%rsi, %rbp
	movq	%rdx, (%rdi)
	leaq	0(,%rsi,4), %r12
	xorl	%eax, %eax
	movq	%rdx, 8(%rdi)
	movq	%rdx, 16(%rdi)
	testq	%rsi, %rsi
	je	.L91
	movq	%r12, %rdi
	call	_Znwm@PLT
.L91:
	addq	%rax, %r12
	movq	%rax, (%rbx)
	movq	%r12, 16(%rbx)
	testq	%rbp, %rbp
	je	.L92
	movl	0(%r13), %edx
.L93:
	cmpq	%rax, %r12
	je	.L92
	movl	%edx, (%rax)
	addq	$4, %rax
	jmp	.L93
.L92:
	movq	%rax, 8(%rbx)
	popq	%rax
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4852:
	.size	_ZNSt6vectorIiSaIiEEC2EmRKiRKS0_, .-_ZNSt6vectorIiSaIiEEC2EmRKiRKS0_
	.weak	_ZNSt6vectorIiSaIiEEC1EmRKiRKS0_
	.set	_ZNSt6vectorIiSaIiEEC1EmRKiRKS0_,_ZNSt6vectorIiSaIiEEC2EmRKiRKS0_
	.section	.rodata._ZNSt6vectorIPcSaIS0_EE17_M_realloc_insertIJRKS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_.str1.1,"aMS",@progbits,1
.LC13:
	.string	"vector::_M_realloc_insert"
	.section	.text._ZNSt6vectorIPcSaIS0_EE17_M_realloc_insertIJRKS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_,"axG",@progbits,_ZNSt6vectorIPcSaIS0_EE17_M_realloc_insertIJRKS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_,comdat
	.align 2
	.weak	_ZNSt6vectorIPcSaIS0_EE17_M_realloc_insertIJRKS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
	.type	_ZNSt6vectorIPcSaIS0_EE17_M_realloc_insertIJRKS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_, @function
_ZNSt6vectorIPcSaIS0_EE17_M_realloc_insertIJRKS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_:
.LFB5064:
	.cfi_startproc
	endbr64
	movabsq	$1152921504606846975, %rcx
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	movq	8(%rdi), %rax
	movq	(%rdi), %r14
	movq	%rax, %rbx
	movq	%rax, (%rsp)
	subq	%r14, %rbx
	sarq	$3, %rbx
	cmpq	%rcx, %rbx
	jne	.L102
	leaq	.LC13(%rip), %rdi
	call	_ZSt20__throw_length_errorPKc@PLT
.L102:
	cmpq	%r14, (%rsp)
	movl	$1, %eax
	movq	%rsi, %r15
	movq	%rdi, %r13
	cmovne	%rbx, %rax
	movq	%rsi, %rbp
	addq	%rax, %rbx
	setc	%al
	subq	%r14, %r15
	movzbl	%al, %eax
	testq	%rax, %rax
	jne	.L112
	xorl	%r12d, %r12d
	testq	%rbx, %rbx
	je	.L107
	movabsq	$1152921504606846975, %rax
	cmpq	%rax, %rbx
	cmova	%rax, %rbx
	jmp	.L106
.L112:
	movq	%rcx, %rbx
.L106:
	movq	%rbx, %rdi
	movq	%rdx, 8(%rsp)
	call	_ZNSt15__new_allocatorIPcE8allocateEmPKv.isra.0
	movq	8(%rsp), %rdx
	movq	%rax, %r12
.L107:
	movq	(%rdx), %rax
	movq	%rax, (%r12,%r15)
	testq	%r15, %r15
	jle	.L108
	movq	%r15, %rdx
	movq	%r14, %rsi
	movq	%r12, %rdi
	call	memmove@PLT
.L108:
	movq	(%rsp), %rax
	leaq	8(%r12,%r15), %rdx
	subq	%rbp, %rax
	testq	%rax, %rax
	jle	.L109
	movq	%rdx, %rdi
	movq	%rbp, %rsi
	movq	%rax, %rcx
	rep movsb
.L109:
	leaq	(%rdx,%rax), %rbp
	testq	%r14, %r14
	je	.L110
	movq	16(%r13), %rsi
	movq	%r14, %rdi
	subq	%r14, %rsi
	call	_ZdlPvm@PLT
.L110:
	leaq	(%r12,%rbx,8), %rax
	movq	%r12, 0(%r13)
	movq	%rbp, 8(%r13)
	movq	%rax, 16(%r13)
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE5064:
	.size	_ZNSt6vectorIPcSaIS0_EE17_M_realloc_insertIJRKS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_, .-_ZNSt6vectorIPcSaIS0_EE17_M_realloc_insertIJRKS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
	.section	.text._ZNSt6vectorIPcSaIS0_EE9push_backERKS0_,"axG",@progbits,_ZNSt6vectorIPcSaIS0_EE9push_backERKS0_,comdat
	.align 2
	.weak	_ZNSt6vectorIPcSaIS0_EE9push_backERKS0_
	.type	_ZNSt6vectorIPcSaIS0_EE9push_backERKS0_, @function
_ZNSt6vectorIPcSaIS0_EE9push_backERKS0_:
.LFB4833:
	.cfi_startproc
	endbr64
	movq	%rsi, %rdx
	movq	8(%rdi), %rsi
	cmpq	16(%rdi), %rsi
	je	.L120
	movq	(%rdx), %rax
	addq	$8, %rsi
	movq	%rax, -8(%rsi)
	movq	%rsi, 8(%rdi)
	ret
.L120:
	jmp	_ZNSt6vectorIPcSaIS0_EE17_M_realloc_insertIJRKS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
	.cfi_endproc
.LFE4833:
	.size	_ZNSt6vectorIPcSaIS0_EE9push_backERKS0_, .-_ZNSt6vectorIPcSaIS0_EE9push_backERKS0_
	.section	.text._ZNSt6vectorIiSaIiEE17_M_realloc_insertIJiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_,"axG",@progbits,_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_,comdat
	.align 2
	.weak	_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_
	.type	_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_, @function
_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_:
.LFB5227:
	.cfi_startproc
	endbr64
	movabsq	$2305843009213693951, %rcx
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	movq	8(%rdi), %rax
	movq	(%rdi), %r14
	movq	%rax, %rbx
	movq	%rax, (%rsp)
	subq	%r14, %rbx
	sarq	$2, %rbx
	cmpq	%rcx, %rbx
	jne	.L124
	leaq	.LC13(%rip), %rdi
	call	_ZSt20__throw_length_errorPKc@PLT
.L124:
	cmpq	%r14, (%rsp)
	movl	$1, %eax
	movq	%rsi, %r15
	movq	%rdi, %r13
	cmovne	%rbx, %rax
	movq	%rsi, %rbp
	addq	%rax, %rbx
	setc	%al
	subq	%r14, %r15
	movzbl	%al, %eax
	testq	%rax, %rax
	jne	.L134
	xorl	%r12d, %r12d
	testq	%rbx, %rbx
	je	.L129
	movabsq	$2305843009213693951, %rax
	cmpq	%rax, %rbx
	cmova	%rax, %rbx
	jmp	.L128
.L134:
	movq	%rcx, %rbx
.L128:
	leaq	0(,%rbx,4), %rdi
	movq	%rdx, 8(%rsp)
	call	_Znwm@PLT
	movq	8(%rsp), %rdx
	movq	%rax, %r12
.L129:
	movl	(%rdx), %eax
	movl	%eax, (%r12,%r15)
	testq	%r15, %r15
	jle	.L130
	movq	%r15, %rdx
	movq	%r14, %rsi
	movq	%r12, %rdi
	call	memmove@PLT
.L130:
	movq	(%rsp), %rax
	leaq	4(%r12,%r15), %rdx
	subq	%rbp, %rax
	testq	%rax, %rax
	jle	.L131
	movq	%rdx, %rdi
	movq	%rbp, %rsi
	movq	%rax, %rcx
	rep movsb
.L131:
	leaq	(%rdx,%rax), %rbp
	testq	%r14, %r14
	je	.L132
	movq	16(%r13), %rsi
	movq	%r14, %rdi
	subq	%r14, %rsi
	call	_ZdlPvm@PLT
.L132:
	leaq	(%r12,%rbx,4), %rax
	movq	%r12, 0(%r13)
	movq	%rbp, 8(%r13)
	movq	%rax, 16(%r13)
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE5227:
	.size	_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_, .-_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_
	.text
	.align 2
	.type	_ZNSt6vectorIiSaIiEE12emplace_backIJiEEERiDpOT_.isra.0, @function
_ZNSt6vectorIiSaIiEE12emplace_backIJiEEERiDpOT_.isra.0:
.LFB5518:
	.cfi_startproc
	movq	%rsi, %rdx
	movq	8(%rdi), %rsi
	cmpq	16(%rdi), %rsi
	je	.L142
	movl	(%rdx), %eax
	addq	$4, %rsi
	movl	%eax, -4(%rsi)
	movq	%rsi, 8(%rdi)
	ret
.L142:
	jmp	_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_
	.cfi_endproc
.LFE5518:
	.size	_ZNSt6vectorIiSaIiEE12emplace_backIJiEEERiDpOT_.isra.0, .-_ZNSt6vectorIiSaIiEE12emplace_backIJiEEERiDpOT_.isra.0
	.section	.text._ZNSt6vectorIdSaIdEE17_M_realloc_insertIJdEEEvN9__gnu_cxx17__normal_iteratorIPdS1_EEDpOT_,"axG",@progbits,_ZNSt6vectorIdSaIdEE17_M_realloc_insertIJdEEEvN9__gnu_cxx17__normal_iteratorIPdS1_EEDpOT_,comdat
	.align 2
	.weak	_ZNSt6vectorIdSaIdEE17_M_realloc_insertIJdEEEvN9__gnu_cxx17__normal_iteratorIPdS1_EEDpOT_
	.type	_ZNSt6vectorIdSaIdEE17_M_realloc_insertIJdEEEvN9__gnu_cxx17__normal_iteratorIPdS1_EEDpOT_, @function
_ZNSt6vectorIdSaIdEE17_M_realloc_insertIJdEEEvN9__gnu_cxx17__normal_iteratorIPdS1_EEDpOT_:
.LFB5234:
	.cfi_startproc
	endbr64
	movabsq	$1152921504606846975, %rcx
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	movq	8(%rdi), %rax
	movq	(%rdi), %r14
	movq	%rax, %rbx
	movq	%rax, (%rsp)
	subq	%r14, %rbx
	sarq	$3, %rbx
	cmpq	%rcx, %rbx
	jne	.L146
	leaq	.LC13(%rip), %rdi
	call	_ZSt20__throw_length_errorPKc@PLT
.L146:
	cmpq	%r14, (%rsp)
	movl	$1, %eax
	movq	%rsi, %r15
	movq	%rdi, %r13
	cmovne	%rbx, %rax
	movq	%rsi, %rbp
	addq	%rax, %rbx
	setc	%al
	subq	%r14, %r15
	movzbl	%al, %eax
	testq	%rax, %rax
	jne	.L156
	xorl	%r12d, %r12d
	testq	%rbx, %rbx
	je	.L151
	movabsq	$1152921504606846975, %rax
	cmpq	%rax, %rbx
	cmova	%rax, %rbx
	jmp	.L150
.L156:
	movq	%rcx, %rbx
.L150:
	movq	%rbx, %rdi
	movq	%rdx, 8(%rsp)
	call	_ZNSt15__new_allocatorIPcE8allocateEmPKv.isra.0
	movq	8(%rsp), %rdx
	movq	%rax, %r12
.L151:
	movsd	(%rdx), %xmm0
	movsd	%xmm0, (%r12,%r15)
	testq	%r15, %r15
	jle	.L152
	movq	%r15, %rdx
	movq	%r14, %rsi
	movq	%r12, %rdi
	call	memmove@PLT
.L152:
	movq	(%rsp), %rax
	leaq	8(%r12,%r15), %rdx
	subq	%rbp, %rax
	testq	%rax, %rax
	jle	.L153
	movq	%rdx, %rdi
	movq	%rbp, %rsi
	movq	%rax, %rcx
	rep movsb
.L153:
	leaq	(%rdx,%rax), %rbp
	testq	%r14, %r14
	je	.L154
	movq	16(%r13), %rsi
	movq	%r14, %rdi
	subq	%r14, %rsi
	call	_ZdlPvm@PLT
.L154:
	leaq	(%r12,%rbx,8), %rax
	movq	%r12, 0(%r13)
	movq	%rbp, 8(%r13)
	movq	%rax, 16(%r13)
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE5234:
	.size	_ZNSt6vectorIdSaIdEE17_M_realloc_insertIJdEEEvN9__gnu_cxx17__normal_iteratorIPdS1_EEDpOT_, .-_ZNSt6vectorIdSaIdEE17_M_realloc_insertIJdEEEvN9__gnu_cxx17__normal_iteratorIPdS1_EEDpOT_
	.text
	.align 2
	.type	_ZNSt6vectorIdSaIdEE12emplace_backIJdEEERdDpOT_.isra.0, @function
_ZNSt6vectorIdSaIdEE12emplace_backIJdEEERdDpOT_.isra.0:
.LFB5521:
	.cfi_startproc
	movq	%rsi, %rdx
	movq	8(%rdi), %rsi
	cmpq	16(%rdi), %rsi
	je	.L164
	movsd	(%rdx), %xmm0
	addq	$8, %rsi
	movsd	%xmm0, -8(%rsi)
	movq	%rsi, 8(%rdi)
	ret
.L164:
	jmp	_ZNSt6vectorIdSaIdEE17_M_realloc_insertIJdEEEvN9__gnu_cxx17__normal_iteratorIPdS1_EEDpOT_
	.cfi_endproc
.LFE5521:
	.size	_ZNSt6vectorIdSaIdEE12emplace_backIJdEEERdDpOT_.isra.0, .-_ZNSt6vectorIdSaIdEE12emplace_backIJdEEERdDpOT_.isra.0
	.section	.text._ZNKSt19istreambuf_iteratorIcSt11char_traitsIcEE6_M_getEv,"axG",@progbits,_ZNKSt19istreambuf_iteratorIcSt11char_traitsIcEE6_M_getEv,comdat
	.align 2
	.weak	_ZNKSt19istreambuf_iteratorIcSt11char_traitsIcEE6_M_getEv
	.type	_ZNKSt19istreambuf_iteratorIcSt11char_traitsIcEE6_M_getEv, @function
_ZNKSt19istreambuf_iteratorIcSt11char_traitsIcEE6_M_getEv:
.LFB5458:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movl	8(%rdi), %eax
	movq	%rdi, %rbx
	movq	(%rdi), %rdi
	cmpl	$-1, %eax
	jne	.L167
	testq	%rdi, %rdi
	je	.L167
	call	_ZNSt15basic_streambufIcSt11char_traitsIcEE5sgetcEv@PLT
	cmpl	$-1, %eax
	jne	.L167
	xorl	%edx, %edx
	movq	%rdx, (%rbx)
.L167:
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE5458:
	.size	_ZNKSt19istreambuf_iteratorIcSt11char_traitsIcEE6_M_getEv, .-_ZNKSt19istreambuf_iteratorIcSt11char_traitsIcEE6_M_getEv
	.text
	.align 2
	.type	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6assignISt19istreambuf_iteratorIcS2_EvEERS4_T_S9_.isra.0, @function
_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6assignISt19istreambuf_iteratorIcS2_EvEERS4_T_S9_.isra.0:
.LFB5522:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA5522
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	xorl	%ebx, %ebx
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	movq	(%rdi), %r12
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	movq	8(%rdi), %rax
	movq	%rsi, 40(%rsp)
	movl	%edx, 48(%rsp)
	movq	%rax, 16(%rsp)
	leaq	88(%rsp), %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	movq	%rax, 80(%rsp)
	leaq	40(%rsp), %rax
	movq	%rcx, 56(%rsp)
	movl	%r8d, 64(%rsp)
	movq	$15, 32(%rsp)
	movq	%rax, (%rsp)
.L181:
	movq	(%rsp), %rdi
.LEHB0:
	call	_ZNKSt19istreambuf_iteratorIcSt11char_traitsIcEE6_M_getEv
	movl	%eax, %r13d
	leaq	56(%rsp), %rax
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
	call	_ZNKSt19istreambuf_iteratorIcSt11char_traitsIcEE6_M_getEv
	incl	%eax
	sete	%dl
	incl	%r13d
	sete	%al
	cmpb	%al, %dl
	jne	.L178
.L180:
	leaq	32(%rsp), %r15
	jmp	.L179
.L178:
	cmpq	32(%rsp), %rbx
	jnb	.L180
	movq	(%rsp), %rdi
	incq	%rbx
	call	_ZNKSt19istreambuf_iteratorIcSt11char_traitsIcEE6_M_getEv
	movq	40(%rsp), %rdi
	movb	%al, 87(%rsp,%rbx)
	call	_ZNSt15basic_streambufIcSt11char_traitsIcEE6sbumpcEv.isra.0
.LEHE0:
	movl	$-1, 48(%rsp)
	jmp	.L181
.L199:
	movq	8(%rsp), %rdi
	incl	%eax
	sete	%r13b
.LEHB1:
	call	_ZNKSt19istreambuf_iteratorIcSt11char_traitsIcEE6_M_getEv
	incl	%eax
	sete	%al
	cmpb	%al, %r13b
	je	.L197
	cmpq	%rbx, 32(%rsp)
	leaq	1(%rbx), %r13
	je	.L198
.L182:
	movq	(%rsp), %rdi
	call	_ZNKSt19istreambuf_iteratorIcSt11char_traitsIcEE6_M_getEv
	movq	72(%rsp), %rdx
	movq	40(%rsp), %rdi
	movb	%al, (%rdx,%rbx)
	call	_ZNSt15basic_streambufIcSt11char_traitsIcEE6sbumpcEv.isra.0
	movl	$-1, 48(%rsp)
	movq	%r13, %rbx
.L179:
	movq	(%rsp), %rdi
	call	_ZNKSt19istreambuf_iteratorIcSt11char_traitsIcEE6_M_getEv
	jmp	.L199
.L198:
	leaq	72(%rsp), %r14
	movq	%rbx, %rdx
	movq	%r15, %rsi
	movq	%r13, 32(%rsp)
	movq	%r14, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_createERmm@PLT
.LEHE1:
	movq	72(%rsp), %rsi
	movq	%rax, %rdi
	movq	%rbx, %rdx
	movq	%rax, 24(%rsp)
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7_S_copyEPcPKcm@PLT
	movq	%r14, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	24(%rsp), %rax
	movq	%rax, 72(%rsp)
	movq	32(%rsp), %rax
	movq	%rax, 88(%rsp)
	jmp	.L182
.L197:
	movq	72(%rsp), %rax
	movq	%rbx, 80(%rsp)
	movq	%r12, %rsi
	movq	%rbp, %rdi
	movq	16(%rsp), %rdx
	leaq	72(%rsp), %r12
	movb	$0, (%rax,%rbx)
	movq	80(%rsp), %r8
	movq	72(%rsp), %rcx
	subq	0(%rbp), %rsi
.LEHB2:
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_replaceEmmPKcm@PLT
.LEHE2:
	jmp	.L200
.L191:
	endbr64
	movq	%rax, %rbx
.L185:
	leaq	72(%rsp), %rdi
	jmp	.L196
.L200:
	movq	%r12, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L189
	jmp	.L193
.L190:
	endbr64
	movq	%rax, %rbx
.L187:
	movq	%r12, %rdi
.L196:
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L193
	movq	%rbx, %rdi
.LEHB3:
	call	_Unwind_Resume@PLT
.LEHE3:
.L193:
	call	__stack_chk_fail@PLT
.L189:
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE5522:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table,"a",@progbits
.LLSDA5522:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE5522-.LLSDACSB5522
.LLSDACSB5522:
	.uleb128 .LEHB0-.LFB5522
	.uleb128 .LEHE0-.LEHB0
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB1-.LFB5522
	.uleb128 .LEHE1-.LEHB1
	.uleb128 .L191-.LFB5522
	.uleb128 0
	.uleb128 .LEHB2-.LFB5522
	.uleb128 .LEHE2-.LEHB2
	.uleb128 .L190-.LFB5522
	.uleb128 0
	.uleb128 .LEHB3-.LFB5522
	.uleb128 .LEHE3-.LEHB3
	.uleb128 0
	.uleb128 0
.LLSDACSE5522:
	.text
	.size	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6assignISt19istreambuf_iteratorIcS2_EvEERS4_T_S9_.isra.0, .-_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6assignISt19istreambuf_iteratorIcS2_EvEERS4_T_S9_.isra.0
	.section	.rodata.str1.1
.LC15:
	.string	"%d\n"
.LC16:
	.string	"result_norm.txt"
.LC17:
	.string	"["
.LC18:
	.string	","
.LC19:
	.string	"ArraySize: %d\n"
.LC20:
	.string	"A: %d\n"
.LC21:
	.string	"blocks = %d\n"
.LC22:
	.string	"Initial Array:\n"
.LC23:
	.string	"d:"
.LC24:
	.string	"\n"
.LC25:
	.string	"t:"
.LC26:
	.string	"Count_number_of_term: \n"
.LC27:
	.string	"Execute the prefix sum by Kogge Stone:\n"
.LC28:
	.string	"InvertedIndex Array:\n"
.LC29:
	.string	"Terms: \n"
.LC30:
	.string	" %d"
.LC31:
	.string	"\n\n"
.LC32:
	.string	"Documents: \n"
.LC33:
	.string	"Norms: \n"
.LC34:
	.string	"querydoc.txt"
.LC35:
	.string	"\nK Nearest Neighbors (k=%d): \n"
.LC36:
	.string	"   %d -> %f -> label = %d\n"
.LC37:
	.string	"\nQuery Document is labelled = %d\n"
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB4383:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA4383
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	%edi, %edx
	movq	%rsp, %rbp
	.cfi_def_cfa_register 6
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	.cfi_offset 15, -24
	.cfi_offset 14, -32
	.cfi_offset 13, -40
	.cfi_offset 12, -48
	movq	%rsi, %r12
	leaq	.LC15(%rip), %rsi
	pushq	%rbx
	.cfi_offset 3, -56
	movl	%edi, %ebx
	movl	$2, %edi
	subq	$1768, %rsp
	movq	%fs:40, %rax
	movq	%rax, -56(%rbp)
	xorl	%eax, %eax
.LEHB4:
	call	__printf_chk@PLT
	decl	%ebx
	movl	$3, -1696(%rbp)
	jle	.L202
	movq	8(%r12), %rdi
	call	atoi@PLT
	movl	%eax, -1696(%rbp)
.L202:
	leaq	-1096(%rbp), %rdi
	movl	$8, %edx
	leaq	.LC16(%rip), %rsi
	xorl	%r12d, %r12d
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEEC1EPKcSt13_Ios_Openmode@PLT
.LEHE4:
	leaq	-1144(%rbp), %rax
	movl	$4294967295, %edx
	xorl	%ecx, %ecx
	movq	%rax, -1160(%rbp)
	movq	-1096(%rbp), %rax
	movq	%rdx, %r8
	leaq	-1160(%rbp), %rdi
	movq	%r12, -1152(%rbp)
	movb	$0, -1144(%rbp)
	movq	-24(%rax), %rax
	movq	-864(%rbp,%rax), %rsi
.LEHB5:
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6assignISt19istreambuf_iteratorIcS2_EvEERS4_T_S9_.isra.0
.LEHE5:
	movq	-1152(%rbp), %rax
	movq	%rsp, %rsi
	leaq	1(%rax), %rdx
	addq	$16, %rax
	movq	%rax, %rcx
	andq	$-4096, %rax
	andq	$-16, %rcx
	subq	%rax, %rsi
.L203:
	cmpq	%rsi, %rsp
	je	.L204
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L203
.L204:
	movq	%rcx, %rax
	andl	$4095, %eax
	subq	%rax, %rsp
	testq	%rax, %rax
	je	.L205
	orq	$0, -8(%rsp,%rax)
.L205:
	movq	-1160(%rbp), %rsi
	xorl	%ebx, %ebx
	movq	%rsp, %rdi
	leaq	-1680(%rbp), %r12
	call	__strcpy_chk@PLT
	movq	%rbx, -1512(%rbp)
	movq	%rsp, %rdi
	movq	%rbx, -1504(%rbp)
	movq	%rbx, -1496(%rbp)
	movq	%rbx, -1488(%rbp)
	movq	%rbx, -1480(%rbp)
	movq	%rbx, -1472(%rbp)
	movq	%rbx, -1464(%rbp)
	movq	%rbx, -1456(%rbp)
	movq	%rbx, -1448(%rbp)
	movq	%rbx, -1440(%rbp)
	movq	%rbx, -1432(%rbp)
	movq	%rbx, -1424(%rbp)
	leaq	.LC17(%rip), %rbx
	movq	%rbx, %rsi
	call	strtok@PLT
	movq	%rax, %r13
.L206:
	movq	%r13, -1680(%rbp)
	testq	%r13, %r13
	je	.L407
	leaq	-1512(%rbp), %rdi
	movq	%r12, %rsi
.LEHB6:
	call	_ZNSt6vectorIPcSaIS0_EE9push_backERKS0_
	movq	%rbx, %rsi
	xorl	%edi, %edi
	call	strtok@PLT
	movq	%rax, %r13
	jmp	.L206
.L407:
	xorl	%ebx, %ebx
	movb	$1, %r12b
	leaq	.LC18(%rip), %r15
	movb	$1, %r14b
.L208:
	movq	-1512(%rbp), %rdx
	movq	-1504(%rbp), %rax
	subq	%rdx, %rax
	sarq	$3, %rax
	cmpq	%rax, %rbx
	jnb	.L408
	movq	(%rdx,%rbx,8), %rdi
	movq	%r15, %rsi
	call	strtok@PLT
	movq	%rax, %rdi
	leaq	-1272(%rbp), %rax
	movq	%rax, -1688(%rbp)
.L209:
	testq	%rdi, %rdi
	je	.L215
	testq	%rbx, %rbx
	jne	.L210
	call	atoi@PLT
	movq	-1688(%rbp), %rsi
	leaq	-1488(%rbp), %rdi
	movl	%eax, -1272(%rbp)
	call	_ZNSt6vectorIiSaIiEE12emplace_backIJiEEERiDpOT_.isra.0
	jmp	.L211
.L210:
	cmpq	$1, %rbx
	jne	.L212
	testb	%r14b, %r14b
	je	.L213
	subq	$4, -1480(%rbp)
.L213:
	call	atoi@PLT
	movq	-1688(%rbp), %rsi
	leaq	-1464(%rbp), %rdi
	movl	%eax, -1272(%rbp)
	call	_ZNSt6vectorIiSaIiEE12emplace_backIJiEEERiDpOT_.isra.0
	xorl	%r14d, %r14d
	jmp	.L211
.L212:
	cmpq	$2, %rbx
	jne	.L211
	testb	%r12b, %r12b
	je	.L214
	subq	$4, -1456(%rbp)
.L214:
	movq	-1480(%rbp), %rdx
	movq	-1432(%rbp), %rax
	subq	-1488(%rbp), %rdx
	subq	-1440(%rbp), %rax
	sarq	$2, %rdx
	sarq	$3, %rax
	cmpq	%rax, %rdx
	je	.L323
	call	atof@PLT
	movq	-1688(%rbp), %rsi
	leaq	-1440(%rbp), %rdi
	movsd	%xmm0, -1272(%rbp)
	call	_ZNSt6vectorIdSaIdEE12emplace_backIJdEEERdDpOT_.isra.0
	xorl	%r12d, %r12d
.L211:
	xorl	%edi, %edi
	movq	%r15, %rsi
	call	strtok@PLT
	movq	%rax, %rdi
	jmp	.L209
.L323:
	xorl	%r12d, %r12d
.L215:
	incq	%rbx
	jmp	.L208
.L408:
	movq	-1480(%rbp), %rsi
	movq	-1488(%rbp), %rdi
	movq	%rsp, %rcx
	movq	%rsi, %rax
	subq	%rdi, %rax
	movq	%rax, -1704(%rbp)
	sarq	$2, %rax
	movq	%rax, -1760(%rbp)
	movq	-1704(%rbp), %rax
	leaq	15(%rax), %rdx
	movq	%rdx, %rax
	andq	$-4096, %rdx
	andq	$-16, %rax
	subq	%rdx, %rcx
.L218:
	cmpq	%rcx, %rsp
	je	.L219
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L218
.L219:
	andl	$4095, %eax
	subq	%rax, %rsp
	testq	%rax, %rax
	je	.L220
	orq	$0, -8(%rsp,%rax)
.L220:
	movq	-1456(%rbp), %r12
	movq	-1464(%rbp), %r15
	movq	%rsp, -1728(%rbp)
	movq	%rsp, %rcx
	movq	%r12, %rax
	subq	%r15, %rax
	leaq	15(%rax), %rdx
	movq	%rax, -1712(%rbp)
	movq	%rdx, %rax
	andq	$-4096, %rdx
	andq	$-16, %rax
	subq	%rdx, %rcx
.L221:
	cmpq	%rcx, %rsp
	je	.L222
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L221
.L222:
	andl	$4095, %eax
	subq	%rax, %rsp
	testq	%rax, %rax
	je	.L223
	orq	$0, -8(%rsp,%rax)
.L223:
	movq	-1432(%rbp), %rbx
	movq	-1440(%rbp), %r14
	movq	%rsp, -1768(%rbp)
	movq	%rsp, %rcx
	movq	%rbx, %rax
	subq	%r14, %rax
	leaq	15(%rax), %rdx
	movq	%rax, -1736(%rbp)
	movq	%rdx, %rax
	andq	$-4096, %rdx
	andq	$-16, %rax
	subq	%rdx, %rcx
.L224:
	cmpq	%rcx, %rsp
	je	.L225
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L224
.L225:
	andl	$4095, %eax
	subq	%rax, %rsp
	testq	%rax, %rax
	je	.L226
	orq	$0, -8(%rsp,%rax)
.L226:
	movq	-1728(%rbp), %rdx
	movq	%rsp, -1776(%rbp)
	call	_ZSt4copyIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEES2_ET0_T_S8_S7_.isra.0
	movq	-1768(%rbp), %rdx
	movq	%r12, %rsi
	movq	%r15, %rdi
	call	_ZSt4copyIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEES2_ET0_T_S8_S7_.isra.0
	movq	-1776(%rbp), %rdx
	movq	%rbx, %rsi
	movq	%r14, %rdi
	call	_ZSt4copyIN9__gnu_cxx17__normal_iteratorIPdSt6vectorIdSaIdEEEES2_ET0_T_S8_S7_.isra.0
	movq	-1728(%rbp), %rax
	movq	-1760(%rbp), %rbx
	leaq	.LC19(%rip), %rsi
	movq	-1704(%rbp), %r14
	movl	$2, %edi
	movl	-4(%rax,%rbx,4), %eax
	shrq	$2, %r14
	movl	%eax, -1692(%rbp)
	movl	%r14d, %edx
	xorl	%eax, %eax
	movl	%r14d, -1720(%rbp)
	call	__printf_chk@PLT
	xorl	%eax, %eax
	leaq	-1244(%rbp), %rdi
	movslq	%r14d, %rbx
	xorl	%r11d, %r11d
	movl	$7, %ecx
	leaq	-1296(%rbp), %r15
	movq	%rbx, %rsi
	movl	%r11d, -1272(%rbp)
	rep stosl
	leaq	-1272(%rbp), %r12
	leaq	-1216(%rbp), %rdi
	movl	$7, %ecx
	rep stosl
	movq	%r12, %rdx
	leaq	-1416(%rbp), %rdi
	movq	%r15, %rcx
	call	_ZNSt6vectorIiSaIiEEC1EmRKiRKS0_
.LEHE6:
	xorl	%r10d, %r10d
	leaq	-1392(%rbp), %rdi
	movq	%r15, %rcx
	movq	%r12, %rdx
	movq	%rbx, %rsi
	movl	%r10d, -1272(%rbp)
.LEHB7:
	call	_ZNSt6vectorIiSaIiEEC1EmRKiRKS0_
.LEHE7:
	movabsq	$1152921504606846975, %rax
	cmpq	%rbx, %rax
	jnb	.L227
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	jne	.L404
	leaq	.LC12(%rip), %rdi
.LEHB8:
	call	_ZSt20__throw_length_errorPKc@PLT
.L227:
	xorl	%r9d, %r9d
	movq	%r9, -1368(%rbp)
	movq	%r9, -1360(%rbp)
	movq	%r9, -1352(%rbp)
	testq	%rbx, %rbx
	je	.L229
	movq	%rbx, %rdi
	call	_ZNSt15__new_allocatorIPcE8allocateEmPKv.isra.0
.LEHE8:
	movq	%rax, %r13
.L229:
	leaq	0(,%rbx,8), %rax
	movq	%r13, -1368(%rbp)
	leaq	0(%r13,%rax), %r12
	movq	%rax, -1744(%rbp)
	movq	%r13, %rax
	movq	%r12, -1352(%rbp)
	testq	%rbx, %rbx
	je	.L409
.L231:
	cmpq	%rax, %r12
	je	.L230
	movq	$0x000000000, (%rax)
	addq	$8, %rax
	jmp	.L231
.L409:
	movq	%r13, %r12
.L230:
	leaq	0(,%rbx,4), %r15
	movq	%r12, -1360(%rbp)
	movq	%rsp, %rcx
	leaq	15(%r15), %rdx
	movq	%rdx, %rax
	andq	$-4096, %rdx
	andq	$-16, %rax
	subq	%rdx, %rcx
.L233:
	cmpq	%rcx, %rsp
	je	.L234
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L233
.L234:
	andl	$4095, %eax
	subq	%rax, %rsp
	testq	%rax, %rax
	je	.L235
	orq	$0, -8(%rsp,%rax)
.L235:
	leaq	15(%r15), %rdx
	movq	%rsp, -1784(%rbp)
	movq	%rsp, %rcx
	movq	%rdx, %rax
	andq	$-4096, %rdx
	andq	$-16, %rax
	subq	%rdx, %rcx
.L236:
	cmpq	%rcx, %rsp
	je	.L237
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L236
.L237:
	andl	$4095, %eax
	subq	%rax, %rsp
	testq	%rax, %rax
	je	.L238
	orq	$0, -8(%rsp,%rax)
.L238:
	movq	-1744(%rbp), %rax
	movq	%rsp, -1792(%rbp)
	movq	%rsp, %rcx
	leaq	15(%rax), %rdx
	movq	%rdx, %rax
	andq	$-4096, %rdx
	andq	$-16, %rax
	subq	%rdx, %rcx
.L239:
	cmpq	%rcx, %rsp
	je	.L240
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L239
.L240:
	andl	$4095, %eax
	subq	%rax, %rsp
	testq	%rax, %rax
	je	.L241
	orq	$0, -8(%rsp,%rax)
.L241:
	movq	-1784(%rbp), %rdx
	movq	-1408(%rbp), %rsi
	movq	%rsp, -1800(%rbp)
	movq	-1416(%rbp), %rdi
	call	_ZSt4copyIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEES2_ET0_T_S8_S7_.isra.0
	movq	-1792(%rbp), %rdx
	movq	-1384(%rbp), %rsi
	movq	-1392(%rbp), %rdi
	call	_ZSt4copyIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEES2_ET0_T_S8_S7_.isra.0
	movq	-1800(%rbp), %rdx
	movq	%r12, %rsi
	movq	%r13, %rdi
	call	_ZSt4copyIN9__gnu_cxx17__normal_iteratorIPdSt6vectorIdSaIdEEEES2_ET0_T_S8_S7_.isra.0
	movq	%rbx, %rdx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC20(%rip), %rsi
.LEHB9:
	call	__printf_chk@PLT
	movq	-1728(%rbp), %rcx
	leal	-1(%r14), %eax
	movl	$2, %edi
	leaq	.LC21(%rip), %rsi
	cltq
	movl	(%rcx,%rax,4), %r12d
	movl	-1720(%rbp), %eax
	cltd
	idivl	%r12d
	cmpl	$1, %edx
	sbbl	$-1, %eax
	movl	%eax, %r13d
	movl	%eax, %edx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movslq	-1692(%rbp), %rax
	movq	%rsp, %rcx
	movq	%rax, -1752(%rbp)
	salq	$3, %rax
	leaq	15(%rax), %rdx
	movq	%rax, -1688(%rbp)
	movq	%rdx, %rax
	andq	$-4096, %rdx
	andq	$-16, %rax
	subq	%rdx, %rcx
.L242:
	cmpq	%rcx, %rsp
	je	.L243
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L242
.L243:
	andl	$4095, %eax
	subq	%rax, %rsp
	testq	%rax, %rax
	je	.L244
	orq	$0, -8(%rsp,%rax)
.L244:
	movq	-1704(%rbp), %rsi
	leaq	-1672(%rbp), %rdi
	movq	%rsp, -1808(%rbp)
	call	_Z17cudaMallocManagedIiE9cudaErrorPPT_mj.constprop.0.isra.0
	movq	-1712(%rbp), %rsi
	leaq	-1664(%rbp), %rdi
	call	_Z17cudaMallocManagedIiE9cudaErrorPPT_mj.constprop.0.isra.0
	movq	-1736(%rbp), %rsi
	leaq	-1624(%rbp), %rdi
	call	_Z17cudaMallocManagedIiE9cudaErrorPPT_mj.constprop.0.isra.0
	leaq	-1656(%rbp), %rdi
	movl	$28, %esi
	call	_Z17cudaMallocManagedIiE9cudaErrorPPT_mj.constprop.0.isra.0
	leaq	-1648(%rbp), %rdi
	movl	$28, %esi
	call	_Z17cudaMallocManagedIiE9cudaErrorPPT_mj.constprop.0.isra.0
	leaq	-1640(%rbp), %rdi
	movq	%r15, %rsi
	call	_Z17cudaMallocManagedIiE9cudaErrorPPT_mj.constprop.0.isra.0
	leaq	-1632(%rbp), %rdi
	movq	%r15, %rsi
	call	_Z17cudaMallocManagedIiE9cudaErrorPPT_mj.constprop.0.isra.0
	movq	-1744(%rbp), %rsi
	leaq	-1616(%rbp), %rdi
	call	_Z17cudaMallocManagedIiE9cudaErrorPPT_mj.constprop.0.isra.0
	movq	-1688(%rbp), %rsi
	leaq	-1608(%rbp), %rdi
	call	_Z17cudaMallocManagedIiE9cudaErrorPPT_mj.constprop.0.isra.0
	movq	-1704(%rbp), %rdx
	movq	-1728(%rbp), %rsi
	movl	$1, %ecx
	movq	-1672(%rbp), %rdi
	call	cudaMemcpy@PLT
	movq	-1712(%rbp), %rdx
	movq	-1768(%rbp), %rsi
	movl	$1, %ecx
	movq	-1664(%rbp), %rdi
	call	cudaMemcpy@PLT
	movq	-1736(%rbp), %rdx
	movq	-1776(%rbp), %rsi
	movl	$1, %ecx
	movq	-1624(%rbp), %rdi
	call	cudaMemcpy@PLT
	movq	-1656(%rbp), %rdi
	movl	$1, %ecx
	movl	$28, %edx
	leaq	-1244(%rbp), %rsi
	call	cudaMemcpy@PLT
	movq	-1648(%rbp), %rdi
	movl	$1, %ecx
	movl	$28, %edx
	leaq	-1216(%rbp), %rsi
	call	cudaMemcpy@PLT
	movq	-1784(%rbp), %rsi
	movq	-1640(%rbp), %rdi
	movl	$1, %ecx
	movq	%r15, %rdx
	call	cudaMemcpy@PLT
	movq	-1792(%rbp), %rsi
	movq	-1632(%rbp), %rdi
	movl	$1, %ecx
	movq	%r15, %rdx
	call	cudaMemcpy@PLT
	movq	-1744(%rbp), %rdx
	movq	-1800(%rbp), %rsi
	movl	$1, %ecx
	movq	-1616(%rbp), %rdi
	call	cudaMemcpy@PLT
	movq	-1688(%rbp), %rdx
	movq	-1808(%rbp), %rsi
	movl	$1, %ecx
	movq	-1608(%rbp), %rdi
	call	cudaMemcpy@PLT
	leaq	-1188(%rbp), %rdi
	movl	$7, %ecx
	xorl	%eax, %eax
	movl	$28, %esi
	rep stosl
	leaq	-1600(%rbp), %rdi
	call	_Z17cudaMallocManagedIiE9cudaErrorPPT_mj.constprop.0.isra.0
	movq	-1600(%rbp), %rdi
	movl	$1, %ecx
	movl	$28, %edx
	leaq	-1188(%rbp), %rsi
	call	cudaMemcpy@PLT
	leaq	.LC22(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC23(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movabsq	$4294967297, %rdi
	movl	%r14d, -1272(%rbp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rdi, -1268(%rbp)
	movl	-1264(%rbp), %ecx
	movl	$1, %esi
	movq	-1272(%rbp), %rdx
	movq	%rdi, -1296(%rbp)
	movl	$1, -1288(%rbp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L245
	movl	-1720(%rbp), %esi
	movq	-1672(%rbp), %rdi
	call	_Z31__device_stub__Z10printArrayPiiPii
.L245:
	call	cudaDeviceSynchronize@PLT
	leaq	.LC24(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC25(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movabsq	$4294967297, %rdi
	movl	%r14d, -1272(%rbp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rdi, -1268(%rbp)
	movl	-1264(%rbp), %ecx
	movl	$1, %esi
	movq	-1272(%rbp), %rdx
	movq	%rdi, -1296(%rbp)
	movl	$1, -1288(%rbp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L246
	movq	-1712(%rbp), %rsi
	movq	-1664(%rbp), %rdi
	shrq	$2, %rsi
	call	_Z31__device_stub__Z10printArrayPiiPii
.L246:
	call	cudaDeviceSynchronize@PLT
	leaq	.LC24(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC26(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movabsq	$4294967297, %rax
	movl	%r12d, -1272(%rbp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rax, -1268(%rbp)
	movl	-1264(%rbp), %ecx
	movq	%rax, -1292(%rbp)
	movq	-1272(%rbp), %rdx
	movl	%r13d, -1296(%rbp)
	movl	-1288(%rbp), %esi
	movq	-1296(%rbp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L247
	movq	-1656(%rbp), %rsi
	movq	-1664(%rbp), %rdi
	call	_Z42__device_stub__Z20Count_number_of_termPiS_PiS_
.L247:
	call	cudaDeviceSynchronize@PLT
	movabsq	$4294967297, %rdi
	movl	%r12d, -1272(%rbp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rdi, -1268(%rbp)
	movl	-1264(%rbp), %ecx
	movl	$1, %esi
	movq	-1272(%rbp), %rdx
	movq	%rdi, -1296(%rbp)
	movl	$1, -1288(%rbp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L248
	movq	-1656(%rbp), %rdi
	movl	$7, %esi
	call	_Z31__device_stub__Z10printArrayPiiPii
.L248:
	call	cudaDeviceSynchronize@PLT
	leaq	.LC24(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC27(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movabsq	$4294967297, %rax
	movl	%r12d, -1272(%rbp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rax, -1268(%rbp)
	movl	-1264(%rbp), %ecx
	movq	%rax, -1292(%rbp)
	movq	-1272(%rbp), %rdx
	movl	%r13d, -1296(%rbp)
	movl	-1288(%rbp), %esi
	movq	-1296(%rbp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L249
	movq	-1600(%rbp), %r8
	movl	-1720(%rbp), %edx
	movl	%r12d, %ecx
	movq	-1648(%rbp), %rsi
	movq	-1656(%rbp), %rdi
	call	_Z49__device_stub__Z23Kogge_Stone_scan_kernelPiS_iiS_PiS_iiS_
.L249:
	call	cudaDeviceSynchronize@PLT
	movabsq	$4294967297, %rdi
	movl	%r14d, -1272(%rbp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rdi, -1268(%rbp)
	movl	-1264(%rbp), %ecx
	movl	$1, %esi
	movq	-1272(%rbp), %rdx
	movq	%rdi, -1296(%rbp)
	movl	$1, -1288(%rbp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L250
	movq	-1648(%rbp), %rdi
	movl	$7, %esi
	call	_Z31__device_stub__Z10printArrayPiiPii
.L250:
	call	cudaDeviceSynchronize@PLT
	leaq	.LC24(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC28(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movabsq	$4294967297, %rdi
	movl	%r12d, -1272(%rbp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rdi, -1268(%rbp)
	movl	-1264(%rbp), %ecx
	movl	$1, %esi
	movq	-1272(%rbp), %rdx
	movq	%rdi, -1296(%rbp)
	movl	$1, -1288(%rbp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L251
	movq	-1640(%rbp), %r8
	movq	-1648(%rbp), %rcx
	movq	-1656(%rbp), %rdx
	movq	-1664(%rbp), %rsi
	movq	-1672(%rbp), %rdi
	call	_Z49__device_stub__Z21Create_InvertedIndexAPiS_S_S_S_PiS_S_S_S_
.L251:
	call	cudaDeviceSynchronize@PLT
	leaq	.LC29(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	xorl	%r14d, %r14d
	leaq	.LC30(%rip), %r15
.L252:
	cmpq	%rbx, %r14
	jnb	.L410
	movq	-1640(%rbp), %rax
	movq	%r15, %rsi
	movl	$2, %edi
	movl	(%rax,%r14,4), %edx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	incq	%r14
	jmp	.L252
.L410:
	leaq	.LC31(%rip), %r14
	movl	$2, %edi
	xorl	%eax, %eax
	movq	%r14, %rsi
	call	__printf_chk@PLT
	leaq	.LC32(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movabsq	$4294967297, %rax
	movl	%r12d, -1272(%rbp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rax, -1268(%rbp)
	movl	-1264(%rbp), %ecx
	movq	%rax, -1292(%rbp)
	movq	-1272(%rbp), %rdx
	movl	%r13d, -1296(%rbp)
	movl	-1288(%rbp), %esi
	movq	-1296(%rbp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L254
	pushq	%r8
	movq	-1632(%rbp), %r9
	pushq	-1616(%rbp)
	movq	-1648(%rbp), %r8
	movq	-1656(%rbp), %rcx
	movq	-1624(%rbp), %rdx
	movq	-1664(%rbp), %rsi
	movq	-1672(%rbp), %rdi
	.cfi_escape 0x2e,0x10
	call	_Z54__device_stub__Z21Create_InvertedIndexBPiS_PdS_S_S_S0_PiS_PdS_S_S_S0_
	popq	%rsi
	popq	%rdi
.L254:
	.cfi_escape 0x2e,0
	call	cudaDeviceSynchronize@PLT
	xorl	%r12d, %r12d
	leaq	.LC30(%rip), %r13
.L255:
	cmpq	%rbx, %r12
	jnb	.L411
	movq	-1632(%rbp), %rax
	movq	%r13, %rsi
	movl	$2, %edi
	movl	(%rax,%r12,4), %edx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	incq	%r12
	jmp	.L255
.L411:
	movq	%r14, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC33(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	xorl	%r12d, %r12d
	leaq	.LC30(%rip), %r13
.L257:
	cmpq	%rbx, %r12
	jnb	.L412
	movq	-1632(%rbp), %rax
	movq	%r13, %rsi
	movl	$2, %edi
	movl	(%rax,%r12,4), %edx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	incq	%r12
	jmp	.L257
.L412:
	movq	%r14, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	-1692(%rbp), %eax
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movl	$1, -1288(%rbp)
	movq	%rdi, -1268(%rbp)
	movl	-1264(%rbp), %ecx
	movl	%eax, -1272(%rbp)
	movq	-1272(%rbp), %rdx
	movq	%rdi, -1296(%rbp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L259
	movl	-1760(%rbp), %r8d
	movq	-1608(%rbp), %rcx
	movq	-1624(%rbp), %rdx
	movq	-1664(%rbp), %rsi
	movq	-1672(%rbp), %rdi
	call	_Z38__device_stub__Z10getDocNormPiS_PdS0_iPiS_PdS0_i
.L259:
	call	cudaDeviceSynchronize@PLT
	leaq	-576(%rbp), %rdi
	movl	$8, %edx
	leaq	.LC34(%rip), %rsi
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEEC1EPKcSt13_Ios_Openmode@PLT
.LEHE9:
	leaq	-1112(%rbp), %rax
	xorl	%ecx, %ecx
	movb	$0, -1112(%rbp)
	movl	$4294967295, %edx
	movq	%rax, -1128(%rbp)
	movq	-576(%rbp), %rax
	leaq	-1128(%rbp), %rdi
	movq	%rdx, %r8
	movq	%rcx, -1120(%rbp)
	xorl	%ecx, %ecx
	movq	-24(%rax), %rax
	movq	-344(%rbp,%rax), %rsi
.LEHB10:
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6assignISt19istreambuf_iteratorIcS2_EvEERS4_T_S9_.isra.0
.LEHE10:
	movq	-1120(%rbp), %rax
	movq	%rsp, %rsi
	leaq	1(%rax), %rdx
	addq	$16, %rax
	movq	%rax, %rcx
	andq	$-4096, %rax
	andq	$-16, %rcx
	subq	%rax, %rsi
.L260:
	cmpq	%rsi, %rsp
	je	.L261
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L260
.L261:
	movq	%rcx, %rax
	andl	$4095, %eax
	subq	%rax, %rsp
	testq	%rax, %rax
	je	.L262
	orq	$0, -8(%rsp,%rax)
.L262:
	movq	-1128(%rbp), %rsi
	movq	%rsp, %rdi
	leaq	.LC17(%rip), %rbx
	leaq	-1592(%rbp), %r12
	call	__strcpy_chk@PLT
	xorl	%edx, %edx
	movq	%rbx, %rsi
	movq	%rsp, %rdi
	movq	%rdx, -1344(%rbp)
	movq	%rdx, -1336(%rbp)
	movq	%rdx, -1328(%rbp)
	movq	%rdx, -1320(%rbp)
	movq	%rdx, -1312(%rbp)
	movq	%rdx, -1304(%rbp)
	movq	%rdx, -1296(%rbp)
	movq	%rdx, -1288(%rbp)
	movq	%rdx, -1280(%rbp)
	call	strtok@PLT
.L263:
	movq	%rax, -1592(%rbp)
	testq	%rax, %rax
	je	.L413
	leaq	-1344(%rbp), %rdi
	movq	%r12, %rsi
.LEHB11:
	call	_ZNSt6vectorIPcSaIS0_EE9push_backERKS0_
	movq	%rbx, %rsi
	xorl	%edi, %edi
	call	strtok@PLT
	jmp	.L263
.L413:
	xorl	%ebx, %ebx
	leaq	.LC18(%rip), %r12
.L265:
	movq	-1344(%rbp), %rdx
	movq	-1336(%rbp), %rax
	subq	%rdx, %rax
	sarq	$3, %rax
	cmpq	%rax, %rbx
	jnb	.L414
	movq	(%rdx,%rbx,8), %rdi
	movq	%r12, %rsi
	leaq	-1272(%rbp), %r13
	call	strtok@PLT
	movq	%rax, %rdi
.L266:
	testq	%rdi, %rdi
	je	.L415
	testq	%rbx, %rbx
	jne	.L267
	call	atoi@PLT
	leaq	-1320(%rbp), %rdi
	movq	%r13, %rsi
	movl	%eax, -1272(%rbp)
	call	_ZNSt6vectorIiSaIiEE12emplace_backIJiEEERiDpOT_.isra.0
	jmp	.L268
.L267:
	cmpq	$1, %rbx
	jne	.L268
	call	atof@PLT
	leaq	-1296(%rbp), %rdi
	movq	%r13, %rsi
	movsd	%xmm0, -1272(%rbp)
	call	_ZNSt6vectorIdSaIdEE12emplace_backIJdEEERdDpOT_.isra.0
.L268:
	xorl	%edi, %edi
	movq	%r12, %rsi
	call	strtok@PLT
	movq	%rax, %rdi
	jmp	.L266
.L415:
	incq	%rbx
	jmp	.L265
.L414:
	movq	-1312(%rbp), %rsi
	movq	-1320(%rbp), %rdi
	movq	%rsp, %rcx
	movq	%rsi, %rbx
	subq	%rdi, %rbx
	sarq	$2, %rbx
	movslq	%ebx, %r12
	leaq	0(,%r12,4), %r14
	leaq	15(%r14), %rdx
	movq	%rdx, %rax
	andq	$-4096, %rdx
	andq	$-16, %rax
	subq	%rdx, %rcx
.L271:
	cmpq	%rcx, %rsp
	je	.L272
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L271
.L272:
	andl	$4095, %eax
	subq	%rax, %rsp
	testq	%rax, %rax
	je	.L273
	orq	$0, -8(%rsp,%rax)
.L273:
	leaq	0(,%r12,8), %rax
	movq	-1296(%rbp), %r15
	movq	%rsp, -1720(%rbp)
	movq	%rsp, %r8
	movq	%rax, -1704(%rbp)
	movq	-1288(%rbp), %rax
	movq	%rax, -1712(%rbp)
	subq	%r15, %rax
	addq	$15, %rax
	movq	%rax, %rdx
	andq	$-4096, %rax
	andq	$-16, %rdx
	subq	%rax, %r8
.L274:
	cmpq	%r8, %rsp
	je	.L275
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L274
.L275:
	movq	%rdx, %rax
	andl	$4095, %eax
	subq	%rax, %rsp
	testq	%rax, %rax
	je	.L276
	orq	$0, -8(%rsp,%rax)
.L276:
	movq	-1720(%rbp), %rdx
	movq	%rsp, %r13
	call	_ZSt4copyIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEES2_ET0_T_S8_S7_.isra.0
	movq	-1712(%rbp), %rsi
	movq	%r13, %rdx
	movq	%r15, %rdi
	call	_ZSt4copyIN9__gnu_cxx17__normal_iteratorIPdSt6vectorIdSaIdEEEES2_ET0_T_S8_S7_.isra.0
	movq	-1688(%rbp), %rax
	movq	%rsp, %rcx
	leaq	15(%rax), %rdx
	movq	%rdx, %rax
	andq	$-4096, %rdx
	andq	$-16, %rax
	subq	%rdx, %rcx
.L277:
	cmpq	%rcx, %rsp
	je	.L278
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L277
.L278:
	andl	$4095, %eax
	subq	%rax, %rsp
	testq	%rax, %rax
	je	.L279
	orq	$0, -8(%rsp,%rax)
.L279:
	leaq	-1584(%rbp), %rdi
	movq	%r14, %rsi
	movq	%rsp, %r15
	call	_Z17cudaMallocManagedIiE9cudaErrorPPT_mj.constprop.0.isra.0
	movq	-1704(%rbp), %rsi
	leaq	-1576(%rbp), %rdi
	call	_Z17cudaMallocManagedIiE9cudaErrorPPT_mj.constprop.0.isra.0
	movq	-1688(%rbp), %rsi
	leaq	-1568(%rbp), %rdi
	call	_Z17cudaMallocManagedIiE9cudaErrorPPT_mj.constprop.0.isra.0
	movq	-1720(%rbp), %rsi
	movq	-1584(%rbp), %rdi
	movl	$1, %ecx
	movq	%r14, %rdx
	call	cudaMemcpy@PLT
	movq	-1704(%rbp), %rdx
	movq	-1576(%rbp), %rdi
	movl	$1, %ecx
	movq	%r13, %rsi
	call	cudaMemcpy@PLT
	movq	-1688(%rbp), %rdx
	movq	-1568(%rbp), %rdi
	movl	$1, %ecx
	movq	%r15, %rsi
	call	cudaMemcpy@PLT
	xorl	%eax, %eax
	xorps	%xmm1, %xmm1
.L280:
	cmpq	%r12, %rax
	jnb	.L416
	movsd	0(%r13,%rax,8), %xmm0
	incq	%rax
	mulsd	%xmm0, %xmm0
	addsd	%xmm0, %xmm1
	jmp	.L280
.L416:
	movaps	%xmm1, %xmm0
	call	sqrt@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movl	%ebx, -1272(%rbp)
	movq	%xmm0, %r12
	movq	%rdi, -1268(%rbp)
	movl	-1264(%rbp), %ecx
	movq	-1272(%rbp), %rdx
	movq	%rdi, -1524(%rbp)
	movl	$1, -1516(%rbp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L282
	movq	-1648(%rbp), %r9
	movq	-1568(%rbp), %r8
	movq	-1616(%rbp), %rcx
	movq	-1632(%rbp), %rdx
	movq	-1576(%rbp), %rsi
	movq	-1584(%rbp), %rdi
	call	_Z36__device_stub__Z5knnTDPiPdS_S0_S0_S_PiPdS_S0_S0_S_
.L282:
	call	cudaDeviceSynchronize@PLT
	movl	-1692(%rbp), %eax
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movl	$1, -1516(%rbp)
	movq	%rdi, -1268(%rbp)
	movl	-1264(%rbp), %ecx
	movl	%eax, -1272(%rbp)
	movq	-1272(%rbp), %rdx
	movq	%rdi, -1524(%rbp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L283
	movq	-1608(%rbp), %rcx
	movq	-1568(%rbp), %rdx
	movq	%r12, %xmm0
	movq	-1576(%rbp), %rsi
	movq	-1584(%rbp), %rdi
	call	_Z31__device_stub__Z3knnPiPdS0_S0_dPiPdS0_S0_d
.L283:
	call	cudaDeviceSynchronize@PLT
	movq	-1752(%rbp), %rbx
	movq	%rsp, %rcx
	salq	$2, %rbx
	leaq	15(%rbx), %rdx
	movq	%rdx, %rax
	andq	$-4096, %rdx
	andq	$-16, %rax
	subq	%rdx, %rcx
.L284:
	cmpq	%rcx, %rsp
	je	.L285
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L284
.L285:
	andl	$4095, %eax
	subq	%rax, %rsp
	testq	%rax, %rax
	je	.L286
	orq	$0, -8(%rsp,%rax)
.L286:
	leaq	-1560(%rbp), %rdi
	movq	%rbx, %rsi
	movq	%rsp, %r12
	call	_Z17cudaMallocManagedIiE9cudaErrorPPT_mj.constprop.0.isra.0
	movq	-1560(%rbp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rdx
	movq	%r12, %rsi
	call	cudaMemcpy@PLT
	movl	-1692(%rbp), %eax
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	movl	$1, -1516(%rbp)
	movq	%rdi, -1268(%rbp)
	movl	-1264(%rbp), %ecx
	movl	%eax, -1272(%rbp)
	movq	-1272(%rbp), %rdx
	movq	%rdi, -1524(%rbp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L287
	movl	-1692(%rbp), %edx
	movq	-1560(%rbp), %rsi
	movq	-1568(%rbp), %rdi
	call	_Z34__device_stub__Z11oddEvenSortPdPiiPdPii
.L287:
	call	cudaDeviceSynchronize@PLT
.LEHE11:
	xorl	%eax, %eax
	movl	-1696(%rbp), %edx
	movl	$2, %edi
	leaq	.LC35(%rip), %rsi
	movq	%rax, -1272(%rbp)
	movq	%rax, -1264(%rbp)
	movq	%rax, -1256(%rbp)
	xorl	%eax, %eax
.LEHB12:
	call	__printf_chk@PLT
	movslq	-1696(%rbp), %r12
	xorl	%ebx, %ebx
.L288:
	cmpq	%r12, %rbx
	jnb	.L417
	movq	-1264(%rbp), %rdi
	movq	-1272(%rbp), %rcx
	leaq	0(,%rbx,4), %r13
	movq	-1560(%rbp), %rax
	movq	%rdi, %rsi
	subq	%rcx, %rsi
	movl	(%rax,%rbx,4), %eax
	sarq	$4, %rsi
.L289:
	movq	%rcx, %rdx
	testq	%rsi, %rsi
	jle	.L418
	cmpl	%eax, (%rcx)
	je	.L290
	cmpl	%eax, 4(%rdx)
	jne	.L291
	addq	$4, %rdx
	jmp	.L290
.L291:
	cmpl	%eax, 8(%rdx)
	jne	.L292
	addq	$8, %rdx
	jmp	.L290
.L292:
	leaq	16(%rdx), %rcx
	cmpl	%eax, 12(%rdx)
	jne	.L293
	addq	$12, %rdx
	jmp	.L290
.L293:
	decq	%rsi
	jmp	.L289
.L418:
	movq	%rdi, %rcx
	subq	%rdx, %rcx
	cmpq	$8, %rcx
	je	.L295
	cmpq	$12, %rcx
	je	.L296
	cmpq	$4, %rcx
	je	.L297
	jmp	.L298
.L296:
	cmpl	%eax, (%rdx)
	je	.L290
	addq	$4, %rdx
.L295:
	cmpl	%eax, (%rdx)
	je	.L290
	addq	$4, %rdx
.L297:
	cmpl	%eax, (%rdx)
	jne	.L298
.L290:
	cmpq	%rdi, %rdx
	jne	.L299
.L298:
	movl	$10, %ecx
	cltd
	leaq	-1524(%rbp), %rsi
	idivl	%ecx
	leaq	-1272(%rbp), %rdi
	movl	%eax, -1524(%rbp)
	call	_ZNSt6vectorIiSaIiEE12emplace_backIJiEEERiDpOT_.isra.0
.L299:
	movq	-1560(%rbp), %rax
	movl	$10, %ecx
	movl	$2, %edi
	movl	(%rax,%r13), %esi
	movl	%esi, %eax
	cltd
	idivl	%ecx
	movl	%esi, %edx
	leaq	.LC36(%rip), %rsi
	movl	%eax, %ecx
	movq	-1568(%rbp), %rax
	movsd	(%rax,%rbx,8), %xmm0
	movb	$1, %al
	call	__printf_chk@PLT
	incq	%rbx
	jmp	.L288
.L417:
	movq	-1264(%rbp), %rsi
	movq	-1272(%rbp), %rdi
	movq	%rsp, %rcx
	movq	%rsi, %rbx
	subq	%rdi, %rbx
	leaq	15(%rbx), %rdx
	movq	%rbx, %r12
	movq	%rdx, %rax
	andq	$-4096, %rdx
	sarq	$2, %r12
	andq	$-16, %rax
	subq	%rdx, %rcx
.L301:
	cmpq	%rcx, %rsp
	je	.L302
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L301
.L302:
	andl	$4095, %eax
	subq	%rax, %rsp
	testq	%rax, %rax
	je	.L303
	orq	$0, -8(%rsp,%rax)
.L303:
	movq	%rsp, %r15
	leaq	0(,%r12,8), %r13
	movq	%r15, %rdx
	call	_ZSt4copyIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEES2_ET0_T_S8_S7_.isra.0
	leaq	15(%r13), %rdx
	movq	%rsp, %rcx
	movq	%rdx, %rax
	andq	$-4096, %rdx
	andq	$-16, %rax
	subq	%rdx, %rcx
.L304:
	cmpq	%rcx, %rsp
	je	.L305
	subq	$4096, %rsp
	orq	$0, 4088(%rsp)
	jmp	.L304
.L305:
	andl	$4095, %eax
	subq	%rax, %rsp
	testq	%rax, %rax
	je	.L306
	orq	$0, -8(%rsp,%rax)
.L306:
	leaq	-1552(%rbp), %rdi
	movq	%r13, %rsi
	movq	%rsp, %r14
	call	_Z17cudaMallocManagedIiE9cudaErrorPPT_mj.constprop.0.isra.0
	leaq	-1544(%rbp), %rdi
	movq	%rbx, %rsi
	call	_Z17cudaMallocManagedIiE9cudaErrorPPT_mj.constprop.0.isra.0
	movq	-1552(%rbp), %rdi
	movl	$1, %ecx
	movq	%r13, %rdx
	movq	%r14, %rsi
	call	cudaMemcpy@PLT
	movq	-1544(%rbp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rdx
	movq	%r15, %rsi
	call	cudaMemcpy@PLT
	movabsq	$4294967297, %rdi
	movl	%r12d, -1524(%rbp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%rdi, -1520(%rbp)
	movl	-1516(%rbp), %ecx
	movl	$1, %esi
	movq	-1524(%rbp), %rdx
	movq	%rdi, -1536(%rbp)
	movl	$1, -1528(%rbp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L307
	movq	-1544(%rbp), %r8
	movq	-1552(%rbp), %rcx
	movl	-1696(%rbp), %edx
	movq	-1568(%rbp), %rsi
	movq	-1560(%rbp), %rdi
	call	_Z35__device_stub__Z8classifyPiPdiS0_S_PiPdiS0_S_
.L307:
	call	cudaDeviceSynchronize@PLT
	movq	-1552(%rbp), %rcx
	xorl	%edx, %edx
	xorl	%eax, %eax
	xorps	%xmm0, %xmm0
.L308:
	cmpq	%r12, %rdx
	je	.L419
	movsd	(%rcx,%rdx,8), %xmm1
	comisd	%xmm0, %xmm1
	maxsd	%xmm0, %xmm1
	cmova	%edx, %eax
	movaps	%xmm1, %xmm0
	incq	%rdx
	jmp	.L308
.L419:
	movq	-1544(%rbp), %rdx
	cltq
	movl	$2, %edi
	leaq	.LC37(%rip), %rsi
	movl	(%rdx,%rax,4), %edx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC24(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	-1672(%rbp), %rdi
	call	cudaFree@PLT
	movq	-1664(%rbp), %rdi
	call	cudaFree@PLT
	movq	-1624(%rbp), %rdi
	call	cudaFree@PLT
	movq	-1656(%rbp), %rdi
	call	cudaFree@PLT
	movq	-1648(%rbp), %rdi
	call	cudaFree@PLT
	movq	-1640(%rbp), %rdi
	call	cudaFree@PLT
	movq	-1632(%rbp), %rdi
	call	cudaFree@PLT
	movq	-1616(%rbp), %rdi
	call	cudaFree@PLT
	movq	-1584(%rbp), %rdi
	call	cudaFree@PLT
	movq	-1576(%rbp), %rdi
	call	cudaFree@PLT
	movq	-1568(%rbp), %rdi
	call	cudaFree@PLT
	movq	-1608(%rbp), %rdi
	call	cudaFree@PLT
	movq	-1560(%rbp), %rdi
	call	cudaFree@PLT
	movq	-1552(%rbp), %rdi
	call	cudaFree@PLT
.LEHE12:
	leaq	-1272(%rbp), %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	leaq	-1296(%rbp), %rdi
	call	_ZNSt6vectorIdSaIdEED1Ev
	leaq	-1320(%rbp), %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	leaq	-1344(%rbp), %rdi
	call	_ZNSt6vectorIPcSaIS0_EED1Ev
	leaq	-1128(%rbp), %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	leaq	-576(%rbp), %rdi
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev@PLT
	leaq	-1368(%rbp), %rdi
	call	_ZNSt6vectorIdSaIdEED1Ev
	leaq	-1392(%rbp), %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	leaq	-1416(%rbp), %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	leaq	-1440(%rbp), %rdi
	call	_ZNSt6vectorIdSaIdEED1Ev
	leaq	-1464(%rbp), %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	leaq	-1488(%rbp), %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	leaq	-1512(%rbp), %rdi
	call	_ZNSt6vectorIPcSaIS0_EED1Ev
	leaq	-1160(%rbp), %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	leaq	-1096(%rbp), %rdi
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev@PLT
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	je	.L321
	jmp	.L404
.L337:
	endbr64
	movq	%rax, %rbx
.L312:
	leaq	-1272(%rbp), %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	jmp	.L313
.L336:
	endbr64
	movq	%rax, %rbx
.L313:
	leaq	-1296(%rbp), %rdi
	call	_ZNSt6vectorIdSaIdEED1Ev
	leaq	-1320(%rbp), %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	leaq	-1344(%rbp), %rdi
	call	_ZNSt6vectorIPcSaIS0_EED1Ev
	jmp	.L314
.L335:
	endbr64
	movq	%rax, %rbx
.L314:
	leaq	-1128(%rbp), %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	leaq	-576(%rbp), %rdi
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev@PLT
	jmp	.L315
.L334:
	endbr64
	movq	%rax, %rbx
.L315:
	leaq	-1368(%rbp), %rdi
	call	_ZNSt6vectorIdSaIdEED1Ev
	jmp	.L316
.L333:
	endbr64
	movq	%rax, %rbx
.L316:
	leaq	-1392(%rbp), %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	jmp	.L317
.L332:
	endbr64
	movq	%rax, %rbx
.L317:
	leaq	-1416(%rbp), %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	jmp	.L318
.L331:
	endbr64
	movq	%rax, %rbx
.L318:
	leaq	-1440(%rbp), %rdi
	call	_ZNSt6vectorIdSaIdEED1Ev
	leaq	-1464(%rbp), %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	leaq	-1488(%rbp), %rdi
	call	_ZNSt6vectorIiSaIiEED1Ev
	leaq	-1512(%rbp), %rdi
	call	_ZNSt6vectorIPcSaIS0_EED1Ev
	jmp	.L319
.L330:
	endbr64
	movq	%rax, %rbx
.L319:
	leaq	-1160(%rbp), %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	leaq	-1096(%rbp), %rdi
	call	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev@PLT
	movq	-56(%rbp), %rax
	subq	%fs:40, %rax
	jne	.L404
	movq	%rbx, %rdi
.LEHB13:
	call	_Unwind_Resume@PLT
.LEHE13:
.L404:
	call	__stack_chk_fail@PLT
.L321:
	leaq	-40(%rbp), %rsp
	xorl	%eax, %eax
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa 7, 8
	ret
	.cfi_endproc
.LFE4383:
	.section	.gcc_except_table
.LLSDA4383:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE4383-.LLSDACSB4383
.LLSDACSB4383:
	.uleb128 .LEHB4-.LFB4383
	.uleb128 .LEHE4-.LEHB4
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB5-.LFB4383
	.uleb128 .LEHE5-.LEHB5
	.uleb128 .L330-.LFB4383
	.uleb128 0
	.uleb128 .LEHB6-.LFB4383
	.uleb128 .LEHE6-.LEHB6
	.uleb128 .L331-.LFB4383
	.uleb128 0
	.uleb128 .LEHB7-.LFB4383
	.uleb128 .LEHE7-.LEHB7
	.uleb128 .L332-.LFB4383
	.uleb128 0
	.uleb128 .LEHB8-.LFB4383
	.uleb128 .LEHE8-.LEHB8
	.uleb128 .L333-.LFB4383
	.uleb128 0
	.uleb128 .LEHB9-.LFB4383
	.uleb128 .LEHE9-.LEHB9
	.uleb128 .L334-.LFB4383
	.uleb128 0
	.uleb128 .LEHB10-.LFB4383
	.uleb128 .LEHE10-.LEHB10
	.uleb128 .L335-.LFB4383
	.uleb128 0
	.uleb128 .LEHB11-.LFB4383
	.uleb128 .LEHE11-.LEHB11
	.uleb128 .L336-.LFB4383
	.uleb128 0
	.uleb128 .LEHB12-.LFB4383
	.uleb128 .LEHE12-.LEHB12
	.uleb128 .L337-.LFB4383
	.uleb128 0
	.uleb128 .LEHB13-.LFB4383
	.uleb128 .LEHE13-.LEHB13
	.uleb128 0
	.uleb128 0
.LLSDACSE4383:
	.section	.text.startup
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <string>
#include <iostream>
#include <fstream>
#include <vector>
#include <algorithm>
using namespace std;

__global__ void printArray(int *index, int outputsize) {
	int i = blockIdx.x * blockDim.x + threadIdx.x;
	if (i < outputsize) {
		printf(" %d", index[i]);
	}
}

__global__ void printArray(double *index, int outputsize) {
	int i = blockIdx.x * blockDim.x + threadIdx.x;
	if (i < outputsize) {
		printf(" %f", index[i]);
	}
}

__global__ void Count_number_of_term(int *A, int *Df) {
	int i = blockIdx.x * blockDim.x + threadIdx.x;
	int value = A[i] - 1;
	atomicAdd(&Df[value], 1);

}

__global__ void Kogge_Stone_scan_kernel(int *df, int *index, int InputSize, int thread_num, int *temp) {
	__shared__ int XY[100];
	int i = blockIdx.x * blockDim.x + threadIdx.x;
	if (i < InputSize) {
		XY[threadIdx.x] = df[i];
		__syncthreads();
	}

	for (unsigned int stride = 1; stride < blockDim.x; stride *= 2) {
		__syncthreads();
		if (threadIdx.x >= stride) {
			XY[threadIdx.x] += XY[threadIdx.x - stride];
		}
	}
	if (i < thread_num-1) {
		index[i + 1] = XY[threadIdx.x];
	}
		__syncthreads();
}

__global__ void Create_InvertedIndexA (int *A, int *B, int *Df, int *Index ,int *InvertedIndexA) {
	int temp = Index[threadIdx.x] + Df[threadIdx.x];
	if (blockIdx.x == 0) {
		for (unsigned int i = Index[threadIdx.x]; i < temp; i++) {
			__syncthreads();
			InvertedIndexA[i] = threadIdx.x + 1;
		}

	}
}

__global__ void Create_InvertedIndexB(int *A, int *B, double *C, int *Df, int *Index, int *InvertedIndexB, double *InvertedIndexC) {
	int i = blockIdx.x * blockDim.x + threadIdx.x;

	__syncthreads();
	int temp = 0;
	temp = Index[B[i]-1];
	__syncthreads();
	int value = B[i] - 1;
	int a = 0;
	a=atomicAdd(&Index[value], 1);
	InvertedIndexB[a] = A[i];
	InvertedIndexC[a] = C[i];
	__syncthreads();
}





// KNN Start

__global__ void knnTD(int *terms, double *qnorm, int *invertedIndex, double *norms, double *docs, int *index) {
	int i = blockIdx.x * blockDim.x + threadIdx.x;

	double temp = 0;
	for (int j = index[terms[i]]; j < index[terms[i]+1]; j++) {
		docs[invertedIndex[j]]+=qnorm[i]*norms[j];
		__syncthreads();
	}
}

__global__ void knn(int* terms, double *qnorm, double *docs, double *docNorm, double queryNorm) {
	int i = blockIdx.x * blockDim.x + threadIdx.x;
	if(docNorm[i] == 0 || queryNorm == 0) {
		docs[i] = 0;
	} else {
		docs[i] = docs[i]/(docNorm[i]*queryNorm);
	}
}

__global__ void printlist(int *terms, int *invertedIndex, int *index) {
	int i = blockIdx.x * blockDim.x + threadIdx.x;
	printf("Term -> %d\n", index[terms[i]]);
	for (int j = index[terms[i]]; j < index[terms[i]+1]; j++) {
		printf("%d -> %d\n", terms[i], invertedIndex[j]);
	}
	printf("\n");
}

__global__ void getDocNorm(int *docs, int *terms, double *norms, double *dn, int num) {
	int i = blockIdx.x * blockDim.x + threadIdx.x;

	double temp = 0.0;
	for (size_t j = 0; j < num; j++) {
		if(docs[j] == i) {
			temp+=(norms[j]*norms[j]);
		}
	}
	__syncthreads();
	dn[i] = sqrt(temp);
}

__global__ void oddEvenSort(double *data, int *dl, int num_elem) {
	int tid = (blockIdx.x*blockDim.x) + threadIdx.x;
	int tid_idx;
	int offset = 0; //Start off with even, then odd
	int num_swaps;
	dl[tid] = tid+1;
	__syncthreads();
	//Calculation maximum index for a given block
	//Last block it is number of elements minus one
	//Other blocks to end of block minus one
	int tid_idx_max = min((((blockIdx.x + 1)*(blockDim.x * 2)) - 1), (num_elem - 1));

	do
	{
		//Reset number of swaps
		num_swaps = 0;

		//work out index of data
		tid_idx = (tid * 2) + offset;

		//If no array or block overrun
		if (tid_idx < tid_idx_max) {
			//Read values into registers
			double d0 = data[tid_idx];
			int db0 = dl[tid_idx];
			double d1 = data[tid_idx + 1];
			int db1 = dl[tid_idx + 1];

			//Compare registers
			if (d0 < d1) {
				//Swap values if needed
				data[tid_idx] = d1;
				dl[tid_idx] = db1;
				data[tid_idx + 1] = d0;
				dl[tid_idx + 1] = db0;

				//keep track that we did a swap
				num_swaps++;
			}
		}

		//Switch from even to off, or odd to even
		if (offset == 0) {
			offset = 1;
		}
		else {
			offset = 0;
		}
	} while (__syncthreads_count(num_swaps) != 0);
}


__global__ void classify(int *dl, double *dn, int k, double *dc, int *u) {
	int i = blockIdx.x * blockDim.x + threadIdx.x;
	for (size_t j = 0; j < k; j++) {
		if(dl[j]/10 == u[i]) {
			dc[i] += dn[j];
		}
	}
}

// KNN end




int main(int argc, char **argv)
{
	int k;
	printf("%d\n", argc);
	if(argc < 2) {
		k = 3;
	} else {
		k = atoi(argv[1]);
	}

	// Read term-doc pairs
   ifstream ifs("result_norm.txt");
   string text;
   text.assign( (istreambuf_iterator<char>(ifs) ),
                     (istreambuf_iterator<char>()    ) );
   char arr[text.size()+1];
   strcpy(arr,text.c_str());

   vector<char*> v;
   vector<int> d1;
   vector<int> t1;
	vector<double> n1;
   char* chars_array = strtok(arr, "[");
   while(chars_array) {
         v.push_back(chars_array);
         chars_array = strtok(NULL, "[");
   }

	bool firstTerm = true, firstNorm = true;
   for(size_t n = 0; n < v.size(); ++n)
   {
        char* subchar_array = strtok(v[n], ",");
        while (subchar_array) {
            if (n == 0) {
               d1.push_back(atoi(subchar_array));
				} else if (n == 1) {
					if (firstTerm){
						d1.pop_back();
						firstTerm = false;
					}
               t1.push_back(atoi(subchar_array));
				} else if (n == 2) {
					if (firstNorm){
						t1.pop_back();
						firstNorm = false;
					}
					if (n1.size() == d1.size())
						break;
					n1.push_back(atof(subchar_array));
				}
            subchar_array = strtok(NULL, ",");
        }
   }

   int d[d1.size()];
   int t[t1.size()];
	double n[n1.size()];
   copy(d1.begin(), d1.end(), d);
   copy(t1.begin(), t1.end(), t);
	copy(n1.begin(), n1.end(), n);
	/*
	for (size_t i = 0; i < t1.size(); i++) {
      printf("%d -> [%d,%d,%f]\n",i,d[i],t[i],n[i]);
   }
	*/

	// Begin InvertedIndex algorithm

	int numDocs = d[d1.size()-1];

	const int arraySize = sizeof(d)/sizeof(int);
	printf("ArraySize: %d\n", arraySize);
	const int number_term = 7;
   int Df[number_term] = { 0 };
	int Index[number_term] = { 0 };
   vector<int> IA(arraySize,0);
   vector<int> IB(arraySize,0);
	vector<double> IC(arraySize,0);
	int InvertedIndexA[arraySize];//output
	int InvertedIndexB[arraySize];//output
	double InvertedIndexC[arraySize];//output
   copy(IA.begin(),IA.end(),InvertedIndexA);
   copy(IB.begin(),IB.end(),InvertedIndexB);
	copy(IC.begin(),IC.end(),InvertedIndexC);

	printf("A: %d\n", sizeof(InvertedIndexA)/sizeof(int));

	int thread_num = d[arraySize - 1];
	int blocks = (arraySize / thread_num) + (arraySize % thread_num != 0 ? 1 : 0);
	printf("blocks = %d\n", blocks);

	int *a, *b, *df, *index, *invertedIndexA, *invertedIndexB;
	double *c, *invertedIndexC, *dn;
	double docNorms[numDocs];
	hipMallocManaged(&a, sizeof(d));
	hipMallocManaged(&b, sizeof(t));
	hipMallocManaged(&c, sizeof(n));
	hipMallocManaged(&df, sizeof(Df));
	hipMallocManaged(&index, sizeof(Index));
	hipMallocManaged(&invertedIndexA, sizeof(InvertedIndexA));
	hipMallocManaged(&invertedIndexB, sizeof(InvertedIndexB));
	hipMallocManaged(&invertedIndexC, sizeof(InvertedIndexC));
	hipMallocManaged(&dn,sizeof(docNorms));
	hipMemcpy(a, d, sizeof(d), hipMemcpyHostToDevice);
	hipMemcpy(b, t, sizeof(t), hipMemcpyHostToDevice);
	hipMemcpy(c, n, sizeof(n), hipMemcpyHostToDevice);
	hipMemcpy(df, Df, sizeof(Df), hipMemcpyHostToDevice);
	hipMemcpy(index, Index, sizeof(Index), hipMemcpyHostToDevice);
	hipMemcpy(invertedIndexA, InvertedIndexA, sizeof(InvertedIndexA), hipMemcpyHostToDevice);
	hipMemcpy(invertedIndexB, InvertedIndexB, sizeof(InvertedIndexB), hipMemcpyHostToDevice);
	hipMemcpy(invertedIndexC, InvertedIndexC, sizeof(InvertedIndexC), hipMemcpyHostToDevice);
	hipMemcpy(dn,docNorms,sizeof(docNorms),hipMemcpyHostToDevice);

	int Temp[number_term] = { 0 };int *temp;
	hipMallocManaged(&temp, sizeof(Temp));
	hipMemcpy(temp, Temp, sizeof(Temp), hipMemcpyHostToDevice);

	printf("Initial Array:\n");
	printf("d:");
	printArray <<<1, arraySize>>> (a, sizeof(d) / sizeof(int));
	hipDeviceSynchronize();
	printf("\n");

	printf("t:");
	printArray <<<1, arraySize >>> (b, sizeof(t) / sizeof(int));
	hipDeviceSynchronize();
	printf("\n");

	printf("Count_number_of_term: \n");
	Count_number_of_term <<<blocks, thread_num>>> (b,df);
	hipDeviceSynchronize();
	printArray <<<1, thread_num>>> (df, sizeof(Df) / sizeof(int));
	hipDeviceSynchronize();
	printf("\n");

	printf("Execute the prefix sum by Kogge Stone:\n");
	Kogge_Stone_scan_kernel <<<blocks, thread_num>>> (df, index, arraySize, thread_num, temp);
	hipDeviceSynchronize();

	//printf("Input count number array to the Kogge Stone:\n");
	printArray <<<1, arraySize >>> (index, sizeof(Index) / sizeof(int));
	hipDeviceSynchronize();
	printf("\n");


	printf("InvertedIndex Array:\n");
	Create_InvertedIndexA <<<1, thread_num >>> (a, b, df, index, invertedIndexA);
	hipDeviceSynchronize();
	printf("Terms: \n");
	for (size_t j = 0; j < arraySize; j++) {
		printf(" %d", invertedIndexA[j]);
	}
	printf("\n\n");

	printf("Documents: \n");
	Create_InvertedIndexB <<<blocks, thread_num >>> (a, b, c, df, index, invertedIndexB, invertedIndexC);
	hipDeviceSynchronize();
	for (size_t j = 0; j < arraySize; j++) {
		printf(" %d", invertedIndexB[j]);
	}
	printf("\n\n");

	printf("Norms: \n");
	for (size_t j = 0; j < arraySize; j++) {
		printf(" %d", invertedIndexB[j]);
	}
	printf("\n\n");

	getDocNorm<<<1,numDocs>>>(a,b,c,dn,d1.size());
	hipDeviceSynchronize();


   //Start Querying

   ifstream ifq("querydoc.txt");
   string qur;
   qur.assign( (istreambuf_iterator<char>(ifq) ),
                     (istreambuf_iterator<char>()    ) );
   char qarr[qur.size()+1];
   strcpy(qarr,qur.c_str());

   vector<char*> vq;
   vector<int> tq;
   vector<double> tf;
   char* query_array = strtok(qarr, "[");
   while(query_array) {
         vq.push_back(query_array);
         query_array = strtok(NULL, "[");
   }

   for(size_t n = 0; n < vq.size(); ++n)
   {
        char* subchar_array = strtok(vq[n], ",");
        while (subchar_array) {
            if (n == 0)
               tq.push_back(atoi(subchar_array));
            else if (n == 1)
               tf.push_back(atof(subchar_array));
            subchar_array = strtok(NULL, ",");
        }
   }

	int q_size = tq.size();
   int qterm[q_size];
	double sum[q_size];
   double qtermfreq[tf.size()];
   copy(tq.begin(), tq.end(), qterm);
   copy(tf.begin(), tf.end(), qtermfreq);


	int *qtptr;
	double *qfptr, *ds;
	double docSums[numDocs];


	hipMallocManaged(&qtptr,q_size*sizeof(int));
	hipMallocManaged(&qfptr,q_size*sizeof(double));
	hipMallocManaged(&ds,sizeof(docSums));
	hipMemcpy(qtptr,qterm,q_size *sizeof(int),hipMemcpyHostToDevice);
	hipMemcpy(qfptr,qtermfreq,q_size *sizeof(double),hipMemcpyHostToDevice);
	hipMemcpy(ds,docSums,sizeof(docSums),hipMemcpyHostToDevice);

	double q_norm = 0;
	for (size_t j = 0; j < q_size; j++) {
		q_norm+=(qtermfreq[j]*qtermfreq[j]);
	}

	q_norm = sqrt(q_norm);

	knnTD<<<1,q_size>>>(qtptr,qfptr,invertedIndexB,invertedIndexC,ds,index);
	hipDeviceSynchronize();
	knn<<<1,numDocs>>>(qtptr,qfptr,ds,dn,q_norm);
	hipDeviceSynchronize();


/*
	printf("\n\nDoc Distances:\n");

	for (size_t j = 0; j < numDocs; j++) {
		printf("   %d -> %f\n",j+1,ds[j]);
	}
*/

	int docLabel[numDocs];
	int *dl;
	hipMallocManaged(&dl,sizeof(docLabel));
	hipMemcpy(dl,docLabel,sizeof(docLabel),hipMemcpyHostToDevice);

	oddEvenSort<<<1,numDocs>>>(ds,dl,numDocs);
	hipDeviceSynchronize();

	vector<int> nn;
	printf("\nK Nearest Neighbors (k=%d): \n", k);
	for (size_t j = 0; j < k; j++) {
		if (find(nn.begin(), nn.end(), dl[j]) != nn.end()) {

		} else {
			nn.push_back(dl[j]/10);
		}
		printf("   %d -> %f -> label = %d\n", dl[j],ds[j],dl[j]/10);
	}
	int uniqueN[nn.size()];
	copy(nn.begin(), nn.end(), uniqueN);


	double kCount[nn.size()];
	double *dc;
	int *u;
	hipMallocManaged(&dc,sizeof(kCount));
	hipMallocManaged(&u,sizeof(uniqueN));
	hipMemcpy(dc,kCount,sizeof(kCount),hipMemcpyHostToDevice);
	hipMemcpy(u,uniqueN,sizeof(uniqueN),hipMemcpyHostToDevice);
	classify<<<1,nn.size()>>>(dl,ds,k,dc,u);
	hipDeviceSynchronize();

	double max = 0;
	int max_i = 0;
	for (size_t j = 0; j < nn.size(); j++) {
		if(dc[j] > max) {
			max = dc[j];
			max_i = j;
		}
	}
	printf("\nQuery Document is labelled = %d\n", u[max_i]);



	printf("\n");



	hipFree(a);
	hipFree(b);
	hipFree(c);
	hipFree(df);
	hipFree(index);
	hipFree(invertedIndexA);
	hipFree(invertedIndexB);
	hipFree(invertedIndexC);
	hipFree(qtptr);
	hipFree(qfptr);
	hipFree(ds);
	hipFree(dn);
	hipFree(dl);
	hipFree(dc);

	return 0;
}

	.text
	.file	"KNNADC.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z25__device_stub__printArrayPii # -- Begin function _Z25__device_stub__printArrayPii
	.type	_Z25__device_stub__printArrayPii,@function
_Z25__device_stub__printArrayPii:       # @_Z25__device_stub__printArrayPii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10printArrayPii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z25__device_stub__printArrayPii, .Lfunc_end0-_Z25__device_stub__printArrayPii
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__printArrayPdi # -- Begin function _Z25__device_stub__printArrayPdi
	.type	_Z25__device_stub__printArrayPdi,@function
_Z25__device_stub__printArrayPdi:       # @_Z25__device_stub__printArrayPdi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10printArrayPdi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z25__device_stub__printArrayPdi, .Lfunc_end1-_Z25__device_stub__printArrayPdi
	.cfi_endproc
                                        # -- End function
	.globl	_Z35__device_stub__Count_number_of_termPiS_ # -- Begin function _Z35__device_stub__Count_number_of_termPiS_
	.type	_Z35__device_stub__Count_number_of_termPiS_,@function
_Z35__device_stub__Count_number_of_termPiS_: # @_Z35__device_stub__Count_number_of_termPiS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z20Count_number_of_termPiS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z35__device_stub__Count_number_of_termPiS_, .Lfunc_end2-_Z35__device_stub__Count_number_of_termPiS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z38__device_stub__Kogge_Stone_scan_kernelPiS_iiS_ # -- Begin function _Z38__device_stub__Kogge_Stone_scan_kernelPiS_iiS_
	.type	_Z38__device_stub__Kogge_Stone_scan_kernelPiS_iiS_,@function
_Z38__device_stub__Kogge_Stone_scan_kernelPiS_iiS_: # @_Z38__device_stub__Kogge_Stone_scan_kernelPiS_iiS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	4(%rsp), %rsi
	movl	%edx, (%rsi)
	movq	%rsp, %rdx
	movl	%ecx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z23Kogge_Stone_scan_kernelPiS_iiS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z38__device_stub__Kogge_Stone_scan_kernelPiS_iiS_, .Lfunc_end3-_Z38__device_stub__Kogge_Stone_scan_kernelPiS_iiS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z36__device_stub__Create_InvertedIndexAPiS_S_S_S_ # -- Begin function _Z36__device_stub__Create_InvertedIndexAPiS_S_S_S_
	.type	_Z36__device_stub__Create_InvertedIndexAPiS_S_S_S_,@function
_Z36__device_stub__Create_InvertedIndexAPiS_S_S_S_: # @_Z36__device_stub__Create_InvertedIndexAPiS_S_S_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z21Create_InvertedIndexAPiS_S_S_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z36__device_stub__Create_InvertedIndexAPiS_S_S_S_, .Lfunc_end4-_Z36__device_stub__Create_InvertedIndexAPiS_S_S_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z36__device_stub__Create_InvertedIndexBPiS_PdS_S_S_S0_ # -- Begin function _Z36__device_stub__Create_InvertedIndexBPiS_PdS_S_S_S0_
	.type	_Z36__device_stub__Create_InvertedIndexBPiS_PdS_S_S_S0_,@function
_Z36__device_stub__Create_InvertedIndexBPiS_PdS_S_S_S0_: # @_Z36__device_stub__Create_InvertedIndexBPiS_PdS_S_S_S0_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	16(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z21Create_InvertedIndexBPiS_PdS_S_S_S0_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z36__device_stub__Create_InvertedIndexBPiS_PdS_S_S_S0_, .Lfunc_end5-_Z36__device_stub__Create_InvertedIndexBPiS_PdS_S_S_S0_
	.cfi_endproc
                                        # -- End function
	.globl	_Z20__device_stub__knnTDPiPdS_S0_S0_S_ # -- Begin function _Z20__device_stub__knnTDPiPdS_S0_S0_S_
	.type	_Z20__device_stub__knnTDPiPdS_S0_S0_S_,@function
_Z20__device_stub__knnTDPiPdS_S0_S0_S_: # @_Z20__device_stub__knnTDPiPdS_S0_S0_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	16(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z5knnTDPiPdS_S0_S0_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z20__device_stub__knnTDPiPdS_S0_S0_S_, .Lfunc_end6-_Z20__device_stub__knnTDPiPdS_S0_S0_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z18__device_stub__knnPiPdS0_S0_d # -- Begin function _Z18__device_stub__knnPiPdS0_S0_d
	.type	_Z18__device_stub__knnPiPdS0_S0_d,@function
_Z18__device_stub__knnPiPdS0_S0_d:      # @_Z18__device_stub__knnPiPdS0_S0_d
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movsd	%xmm0, (%rcx)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z3knnPiPdS0_S0_d, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	_Z18__device_stub__knnPiPdS0_S0_d, .Lfunc_end7-_Z18__device_stub__knnPiPdS0_S0_d
	.cfi_endproc
                                        # -- End function
	.globl	_Z24__device_stub__printlistPiS_S_ # -- Begin function _Z24__device_stub__printlistPiS_S_
	.type	_Z24__device_stub__printlistPiS_S_,@function
_Z24__device_stub__printlistPiS_S_:     # @_Z24__device_stub__printlistPiS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9printlistPiS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	_Z24__device_stub__printlistPiS_S_, .Lfunc_end8-_Z24__device_stub__printlistPiS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__getDocNormPiS_PdS0_i # -- Begin function _Z25__device_stub__getDocNormPiS_PdS0_i
	.type	_Z25__device_stub__getDocNormPiS_PdS0_i,@function
_Z25__device_stub__getDocNormPiS_PdS0_i: # @_Z25__device_stub__getDocNormPiS_PdS0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10getDocNormPiS_PdS0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end9:
	.size	_Z25__device_stub__getDocNormPiS_PdS0_i, .Lfunc_end9-_Z25__device_stub__getDocNormPiS_PdS0_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z26__device_stub__oddEvenSortPdPii # -- Begin function _Z26__device_stub__oddEvenSortPdPii
	.type	_Z26__device_stub__oddEvenSortPdPii,@function
_Z26__device_stub__oddEvenSortPdPii:    # @_Z26__device_stub__oddEvenSortPdPii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11oddEvenSortPdPii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end10:
	.size	_Z26__device_stub__oddEvenSortPdPii, .Lfunc_end10-_Z26__device_stub__oddEvenSortPdPii
	.cfi_endproc
                                        # -- End function
	.globl	_Z23__device_stub__classifyPiPdiS0_S_ # -- Begin function _Z23__device_stub__classifyPiPdiS0_S_
	.type	_Z23__device_stub__classifyPiPdiS0_S_,@function
_Z23__device_stub__classifyPiPdiS0_S_:  # @_Z23__device_stub__classifyPiPdiS0_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	32(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8classifyPiPdiS0_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end11:
	.size	_Z23__device_stub__classifyPiPdiS0_S_, .Lfunc_end11-_Z23__device_stub__classifyPiPdiS0_S_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset %rbp, -16
	movq	%rsp, %rbp
	.cfi_def_cfa_register %rbp
	pushq	%r15
	pushq	%r14
	pushq	%r13
	pushq	%r12
	pushq	%rbx
	subq	$1800, %rsp                     # imm = 0x708
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	movq	%rsi, %rbx
	movl	%edi, %r14d
	.cfi_escape 0x2e, 0x00
	movl	$.L.str, %edi
	movl	%r14d, %esi
	xorl	%eax, %eax
	callq	printf
	movl	$3, -52(%rbp)                   # 4-byte Folded Spill
	cmpl	$2, %r14d
	jl	.LBB12_2
# %bb.1:
	movq	8(%rbx), %rdi
	.cfi_escape 0x2e, 0x00
	callq	atoi
	movl	%eax, -52(%rbp)                 # 4-byte Spill
.LBB12_2:
	.cfi_escape 0x2e, 0x00
	leaq	-1840(%rbp), %rbx
	movl	$.L.str.1, %esi
	movq	%rbx, %rdi
	movl	$8, %edx
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEEC1EPKcSt13_Ios_Openmode
	leaq	-608(%rbp), %rdx
	movq	%rdx, -16(%rdx)
	xorl	%eax, %eax
	movq	%rax, -8(%rdx)
	movb	$0, (%rdx)
	movq	(%rbx), %rcx
	movq	-24(%rcx), %rcx
	movq	-1608(%rbp,%rcx), %rcx
	movq	%rax, -1320(%rbp)
	movl	$-1, -1312(%rbp)
.Ltmp0:
	.cfi_escape 0x2e, 0x10
	subq	$16, %rsp
	movupd	-1320(%rbp), %xmm0
	movupd	%xmm0, (%rsp)
	leaq	-624(%rbp), %rdi
	movq	%rdx, %rsi
	movl	$-1, %r8d
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE19_M_replace_dispatchISt19istreambuf_iteratorIcS2_EEERS4_N9__gnu_cxx17__normal_iteratorIPKcS4_EESD_T_SE_St12__false_type
	addq	$16, %rsp
.Ltmp1:
# %bb.3:
	movq	%rsp, -584(%rbp)                # 8-byte Spill
	movq	-616(%rbp), %rax
	.cfi_escape 0x2e, 0x00
	movq	%rsp, %rbx
	addq	$16, %rax
	andq	$-16, %rax
	subq	%rax, %rbx
	movq	%rbx, %rsp
	movq	-624(%rbp), %rsi
	.cfi_escape 0x2e, 0x00
	movq	%rbx, %rdi
	callq	strcpy
	xorl	%eax, %eax
	movq	%rax, -288(%rbp)
	xorpd	%xmm0, %xmm0
	movapd	%xmm0, -304(%rbp)
	movq	%rax, -208(%rbp)
	movapd	%xmm0, -224(%rbp)
	movq	%rax, -400(%rbp)
	movapd	%xmm0, -416(%rbp)
	movq	%rax, -368(%rbp)
	movapd	%xmm0, -384(%rbp)
	.cfi_escape 0x2e, 0x00
	movl	$.L.str.2, %esi
	movq	%rbx, %rdi
	callq	strtok
	movq	%rax, -536(%rbp)
	testq	%rax, %rax
	je	.LBB12_9
# %bb.4:
	leaq	-304(%rbp), %rbx
	leaq	-536(%rbp), %r14
.LBB12_5:                               # =>This Inner Loop Header: Depth=1
	movq	-296(%rbp), %rsi
	cmpq	-288(%rbp), %rsi
	je	.LBB12_7
# %bb.6:                                #   in Loop: Header=BB12_5 Depth=1
	movq	%rax, (%rsi)
	addq	$8, -296(%rbp)
	jmp	.LBB12_8
.LBB12_7:                               #   in Loop: Header=BB12_5 Depth=1
.Ltmp3:
	.cfi_escape 0x2e, 0x00
	movq	%rbx, %rdi
	movq	%r14, %rdx
	callq	_ZNSt6vectorIPcSaIS0_EE17_M_realloc_insertIJRKS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
.Ltmp4:
.LBB12_8:                               # %_ZNSt6vectorIPcSaIS0_EE9push_backERKS0_.exit
                                        #   in Loop: Header=BB12_5 Depth=1
	.cfi_escape 0x2e, 0x00
	movl	$.L.str.2, %esi
	xorl	%edi, %edi
	callq	strtok
	movq	%rax, -536(%rbp)
	testq	%rax, %rax
	jne	.LBB12_5
.LBB12_9:                               # %.preheader479
	movq	-304(%rbp), %rax
	cmpq	%rax, -296(%rbp)
	je	.LBB12_32
# %bb.10:                               # %.lr.ph497
	movb	$1, %r15b
	xorl	%ebx, %ebx
	leaq	-1320(%rbp), %r14
	movb	$1, %r12b
.LBB12_11:                              # =>This Loop Header: Depth=1
                                        #     Child Loop BB12_12 Depth 2
	movq	(%rax,%rbx,8), %rdi
	.cfi_escape 0x2e, 0x00
	movl	$.L.str.3, %esi
.LBB12_12:                              #   Parent Loop BB12_11 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	strtok
	testq	%rax, %rax
	je	.LBB12_31
# %bb.13:                               # %.lr.ph489
                                        #   in Loop: Header=BB12_12 Depth=2
	cmpq	$2, %rbx
	je	.LBB12_22
# %bb.14:                               # %.lr.ph489
                                        #   in Loop: Header=BB12_12 Depth=2
	cmpq	$1, %rbx
	je	.LBB12_18
# %bb.15:                               # %.lr.ph489
                                        #   in Loop: Header=BB12_12 Depth=2
	testq	%rbx, %rbx
	jne	.LBB12_30
# %bb.16:                               #   in Loop: Header=BB12_12 Depth=2
	.cfi_escape 0x2e, 0x00
	movq	%rax, %rdi
	callq	atoi
	movl	%eax, -1320(%rbp)
	movq	-216(%rbp), %rsi
	cmpq	-208(%rbp), %rsi
	je	.LBB12_28
# %bb.17:                               #   in Loop: Header=BB12_12 Depth=2
	movl	%eax, (%rsi)
	addq	$4, %rsi
	movq	%rsi, -216(%rbp)
	jmp	.LBB12_30
.LBB12_18:                              #   in Loop: Header=BB12_12 Depth=2
	testb	$1, %r15b
	je	.LBB12_20
# %bb.19:                               #   in Loop: Header=BB12_12 Depth=2
	addq	$-4, -216(%rbp)
	xorl	%r15d, %r15d
.LBB12_20:                              #   in Loop: Header=BB12_12 Depth=2
	.cfi_escape 0x2e, 0x00
	movq	%rax, %rdi
	callq	atoi
	movl	%eax, -1320(%rbp)
	movq	-408(%rbp), %rsi
	cmpq	-400(%rbp), %rsi
	je	.LBB12_27
# %bb.21:                               #   in Loop: Header=BB12_12 Depth=2
	movl	%eax, (%rsi)
	addq	$4, %rsi
	movq	%rsi, -408(%rbp)
	jmp	.LBB12_30
.LBB12_22:                              #   in Loop: Header=BB12_12 Depth=2
	testb	$1, %r12b
	je	.LBB12_24
# %bb.23:                               #   in Loop: Header=BB12_12 Depth=2
	addq	$-4, -408(%rbp)
	xorl	%r12d, %r12d
.LBB12_24:                              #   in Loop: Header=BB12_12 Depth=2
	movq	-376(%rbp), %r13
	movq	%r13, %rcx
	subq	-384(%rbp), %rcx
	sarq	$3, %rcx
	movq	-216(%rbp), %rdx
	subq	-224(%rbp), %rdx
	sarq	$2, %rdx
	cmpq	%rdx, %rcx
	je	.LBB12_31
# %bb.25:                               #   in Loop: Header=BB12_12 Depth=2
	.cfi_escape 0x2e, 0x00
	movq	%rax, %rdi
	callq	atof
	movsd	%xmm0, -1320(%rbp)
	cmpq	-368(%rbp), %r13
	je	.LBB12_29
# %bb.26:                               #   in Loop: Header=BB12_12 Depth=2
	movsd	%xmm0, (%r13)
	addq	$8, %r13
	movq	%r13, -376(%rbp)
	jmp	.LBB12_30
.LBB12_27:                              #   in Loop: Header=BB12_12 Depth=2
.Ltmp9:
	.cfi_escape 0x2e, 0x00
	leaq	-416(%rbp), %rdi
	movq	%r14, %rdx
	callq	_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_
.Ltmp10:
	jmp	.LBB12_30
.LBB12_28:                              #   in Loop: Header=BB12_12 Depth=2
.Ltmp12:
	.cfi_escape 0x2e, 0x00
	leaq	-224(%rbp), %rdi
	movq	%r14, %rdx
	callq	_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_
.Ltmp13:
	jmp	.LBB12_30
.LBB12_29:                              #   in Loop: Header=BB12_12 Depth=2
.Ltmp6:
	.cfi_escape 0x2e, 0x00
	leaq	-384(%rbp), %rdi
	movq	%r13, %rsi
	movq	%r14, %rdx
	callq	_ZNSt6vectorIdSaIdEE17_M_realloc_insertIJdEEEvN9__gnu_cxx17__normal_iteratorIPdS1_EEDpOT_
.Ltmp7:
.LBB12_30:                              #   in Loop: Header=BB12_12 Depth=2
	.cfi_escape 0x2e, 0x00
	movl	$.L.str.3, %esi
	xorl	%edi, %edi
	jmp	.LBB12_12
.LBB12_31:                              # %._crit_edge
                                        #   in Loop: Header=BB12_11 Depth=1
	incq	%rbx
	movq	-304(%rbp), %rax
	movq	-296(%rbp), %rcx
	subq	%rax, %rcx
	sarq	$3, %rcx
	cmpq	%rcx, %rbx
	jb	.LBB12_11
.LBB12_32:                              # %._crit_edge498
	movq	-224(%rbp), %rsi
	movq	-216(%rbp), %rbx
	subq	%rsi, %rbx
	.cfi_escape 0x2e, 0x00
	movq	%rsp, %rdi
	leaq	15(%rbx), %rax
	andq	$-16, %rax
	subq	%rax, %rdi
	movq	%rdi, %rsp
	movq	-416(%rbp), %r15
	movq	-408(%rbp), %r13
	subq	%r15, %r13
	.cfi_escape 0x2e, 0x00
	movq	%rsp, %rcx
	leaq	15(%r13), %rax
	andq	$-16, %rax
	subq	%rax, %rcx
	movq	%rcx, -328(%rbp)                # 8-byte Spill
	movq	%rcx, %rsp
	movq	-384(%rbp), %r14
	movq	-376(%rbp), %r12
	subq	%r14, %r12
	.cfi_escape 0x2e, 0x00
	movq	%rsp, %rcx
	leaq	15(%r12), %rax
	andq	$-16, %rax
	subq	%rax, %rcx
	movq	%rcx, -320(%rbp)                # 8-byte Spill
	movq	%rcx, %rsp
	cmpq	$5, %rbx
	movq	%rdi, -48(%rbp)                 # 8-byte Spill
	jl	.LBB12_229
# %bb.33:
	.cfi_escape 0x2e, 0x00
	movq	%rbx, %rdx
	callq	memmove@PLT
.LBB12_34:                              # %_ZSt4copyIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEES2_ET0_T_S8_S7_.exit
	cmpq	$5, %r13
	jl	.LBB12_231
# %bb.35:
	.cfi_escape 0x2e, 0x00
	movq	-328(%rbp), %rdi                # 8-byte Reload
	movq	%r15, %rsi
	movq	%r13, %rdx
	callq	memmove@PLT
.LBB12_36:                              # %_ZSt4copyIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEES2_ET0_T_S8_S7_.exit288
	movq	%rbx, %r15
	sarq	$2, %r15
	cmpq	$9, %r12
	movq	%r12, -232(%rbp)                # 8-byte Spill
	jl	.LBB12_233
# %bb.37:
	.cfi_escape 0x2e, 0x00
	movq	-320(%rbp), %rdi                # 8-byte Reload
	movq	%r14, %rsi
	movq	%r12, %rdx
	callq	memmove@PLT
.LBB12_38:                              # %_ZSt4copyIN9__gnu_cxx17__normal_iteratorIPdSt6vectorIdSaIdEEEES2_ET0_T_S8_S7_.exit
	movq	-48(%rbp), %rax                 # 8-byte Reload
	movl	-4(%rax,%rbx), %eax
	movq	%rax, -168(%rbp)                # 8-byte Spill
	.cfi_escape 0x2e, 0x00
	movl	$.L.str.4, %edi
	movl	%r15d, %esi
	xorl	%eax, %eax
	callq	printf
	xorpd	%xmm0, %xmm0
	movupd	%xmm0, -788(%rbp)
	movapd	%xmm0, -800(%rbp)
	movupd	%xmm0, -756(%rbp)
	movapd	%xmm0, -768(%rbp)
	movq	%rbx, %rax
	shrq	$2, %rax
	movslq	%eax, %r12
	leaq	-1320(%rbp), %rdx
	movl	$0, (%rdx)
.Ltmp15:
	.cfi_escape 0x2e, 0x00
	leaq	-696(%rbp), %rdi
	leaq	-568(%rbp), %rcx
	movq	%r12, %rsi
	callq	_ZNSt6vectorIiSaIiEEC2EmRKiRKS0_
.Ltmp16:
# %bb.39:
	leaq	-1320(%rbp), %rdx
	movl	$0, (%rdx)
.Ltmp18:
	.cfi_escape 0x2e, 0x00
	leaq	-672(%rbp), %rdi
	leaq	-568(%rbp), %rcx
	movq	%r12, %rsi
	callq	_ZNSt6vectorIiSaIiEEC2EmRKiRKS0_
.Ltmp19:
# %bb.40:
	movq	%r13, -152(%rbp)                # 8-byte Spill
	leaq	-1320(%rbp), %rdx
	movq	$0, (%rdx)
.Ltmp21:
	.cfi_escape 0x2e, 0x00
	leaq	-648(%rbp), %rdi
	leaq	-568(%rbp), %rcx
	movq	%r12, %rsi
	callq	_ZNSt6vectorIdSaIdEEC2EmRKdRKS0_
.Ltmp22:
# %bb.41:
	movl	%r15d, %r13d
	.cfi_escape 0x2e, 0x00
	movq	%rsp, %rdi
	leaq	15(,%r13,4), %rax
	andq	$-16, %rax
	subq	%rax, %rdi
	movq	%rdi, %rsp
	.cfi_escape 0x2e, 0x00
	movq	%rsp, %r14
	subq	%rax, %r14
	movq	%r14, %rsp
	.cfi_escape 0x2e, 0x00
	movq	%rsp, %rcx
	leaq	15(,%r13,8), %rax
	andq	$-16, %rax
	subq	%rax, %rcx
	movq	%rcx, -312(%rbp)                # 8-byte Spill
	movq	%rcx, %rsp
	movq	-696(%rbp), %rsi
	movq	-688(%rbp), %rdx
	subq	%rsi, %rdx
	cmpq	$5, %rdx
	movq	%rdi, -496(%rbp)                # 8-byte Spill
	jl	.LBB12_235
# %bb.42:
	.cfi_escape 0x2e, 0x00
	callq	memmove@PLT
.LBB12_43:                              # %_ZSt4copyIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEES2_ET0_T_S8_S7_.exit289
	movq	-672(%rbp), %rsi
	movq	-664(%rbp), %rdx
	subq	%rsi, %rdx
	cmpq	$5, %rdx
	jl	.LBB12_237
# %bb.44:
	.cfi_escape 0x2e, 0x00
	movq	%r14, %rdi
	callq	memmove@PLT
.LBB12_45:                              # %_ZSt4copyIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEES2_ET0_T_S8_S7_.exit290
	movq	%r14, -592(%rbp)                # 8-byte Spill
	movq	%rbx, %r14
	shlq	$30, %r14
	movq	-648(%rbp), %rsi
	movq	-640(%rbp), %rdx
	subq	%rsi, %rdx
	cmpq	$9, %rdx
	jl	.LBB12_239
# %bb.46:
	.cfi_escape 0x2e, 0x00
	movq	-312(%rbp), %rdi                # 8-byte Reload
	callq	memmove@PLT
.LBB12_47:                              # %_ZSt4copyIN9__gnu_cxx17__normal_iteratorIPdSt6vectorIdSaIdEEEES2_ET0_T_S8_S7_.exit291
	.cfi_escape 0x2e, 0x00
	movl	$.L.str.5, %edi
	movq	%r13, -160(%rbp)                # 8-byte Spill
	movq	%r13, %rsi
	xorl	%eax, %eax
	callq	printf
	movabsq	$-4294967296, %rax              # imm = 0xFFFFFFFF00000000
	movq	%r14, -512(%rbp)                # 8-byte Spill
	addq	%r14, %rax
	sarq	$30, %rax
	movq	-48(%rbp), %rcx                 # 8-byte Reload
	movl	(%rcx,%rax), %ecx
	movq	%r15, -488(%rbp)                # 8-byte Spill
	movl	%r15d, %eax
	cltd
	movq	%rcx, -504(%rbp)                # 8-byte Spill
	idivl	%ecx
	cmpl	$1, %edx
	sbbl	$-1, %eax
	.cfi_escape 0x2e, 0x00
	movl	$.L.str.6, %edi
	movl	%eax, -348(%rbp)                # 4-byte Spill
	movl	%eax, %esi
	xorl	%eax, %eax
	callq	printf
	.cfi_escape 0x2e, 0x00
	movq	%rsp, %r14
	movq	-168(%rbp), %rax                # 8-byte Reload
	leaq	15(,%rax,8), %rax
	andq	$-16, %rax
	movq	%rax, -576(%rbp)                # 8-byte Spill
	subq	%rax, %r14
	movq	%r14, %rsp
.Ltmp24:
	.cfi_escape 0x2e, 0x00
	leaq	-120(%rbp), %rdi
	movq	%rbx, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
.Ltmp25:
# %bb.48:                               # %_ZL16hipMallocManagedIiE10hipError_tPPT_mj.exit
.Ltmp26:
	.cfi_escape 0x2e, 0x00
	leaq	-96(%rbp), %rdi
	movq	-152(%rbp), %rsi                # 8-byte Reload
	movl	$1, %edx
	callq	hipMallocManaged
.Ltmp27:
# %bb.49:                               # %_ZL16hipMallocManagedIiE10hipError_tPPT_mj.exit294
.Ltmp28:
	.cfi_escape 0x2e, 0x00
	leaq	-272(%rbp), %rdi
	movq	-232(%rbp), %rsi                # 8-byte Reload
	movl	$1, %edx
	callq	hipMallocManaged
.Ltmp29:
# %bb.50:                               # %_ZL16hipMallocManagedIdE10hipError_tPPT_mj.exit
.Ltmp30:
	.cfi_escape 0x2e, 0x00
	leaq	-88(%rbp), %rdi
	movl	$28, %esi
	movl	$1, %edx
	callq	hipMallocManaged
.Ltmp31:
# %bb.51:                               # %_ZL16hipMallocManagedIiE10hipError_tPPT_mj.exit297
.Ltmp32:
	.cfi_escape 0x2e, 0x00
	leaq	-80(%rbp), %rdi
	movl	$28, %esi
	movl	$1, %edx
	callq	hipMallocManaged
.Ltmp33:
# %bb.52:                               # %_ZL16hipMallocManagedIiE10hipError_tPPT_mj.exit299
.Ltmp34:
	movq	-160(%rbp), %rax                # 8-byte Reload
	leaq	(,%rax,4), %r13
	.cfi_escape 0x2e, 0x00
	leaq	-280(%rbp), %rdi
	movq	%r13, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
.Ltmp35:
# %bb.53:                               # %_ZL16hipMallocManagedIiE10hipError_tPPT_mj.exit301
.Ltmp36:
	.cfi_escape 0x2e, 0x00
	leaq	-112(%rbp), %rdi
	movq	%r13, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
.Ltmp37:
# %bb.54:                               # %_ZL16hipMallocManagedIiE10hipError_tPPT_mj.exit303
	movq	-160(%rbp), %rax                # 8-byte Reload
	leaq	(,%rax,8), %r15
.Ltmp38:
	.cfi_escape 0x2e, 0x00
	leaq	-264(%rbp), %rdi
	movq	%r15, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
.Ltmp39:
# %bb.55:                               # %_ZL16hipMallocManagedIdE10hipError_tPPT_mj.exit305
	movq	-168(%rbp), %rax                # 8-byte Reload
	leaq	(,%rax,8), %rsi
.Ltmp40:
	.cfi_escape 0x2e, 0x00
	leaq	-256(%rbp), %rdi
	movq	%rsi, -336(%rbp)                # 8-byte Spill
	movl	$1, %edx
	callq	hipMallocManaged
.Ltmp41:
# %bb.56:                               # %_ZL16hipMallocManagedIdE10hipError_tPPT_mj.exit307
	movq	-120(%rbp), %rdi
.Ltmp42:
	.cfi_escape 0x2e, 0x00
	movq	-48(%rbp), %rsi                 # 8-byte Reload
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp43:
# %bb.57:
	movq	-96(%rbp), %rdi
.Ltmp44:
	.cfi_escape 0x2e, 0x00
	movq	-328(%rbp), %rsi                # 8-byte Reload
	movq	-152(%rbp), %rdx                # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp45:
# %bb.58:
	movq	-272(%rbp), %rdi
.Ltmp46:
	.cfi_escape 0x2e, 0x00
	movq	-320(%rbp), %rsi                # 8-byte Reload
	movq	-232(%rbp), %rdx                # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp47:
# %bb.59:
	movq	-88(%rbp), %rdi
.Ltmp48:
	.cfi_escape 0x2e, 0x00
	leaq	-800(%rbp), %rsi
	movl	$28, %edx
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp49:
# %bb.60:
	movq	-80(%rbp), %rdi
.Ltmp50:
	.cfi_escape 0x2e, 0x00
	leaq	-768(%rbp), %rsi
	movl	$28, %edx
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp51:
# %bb.61:
	movq	-280(%rbp), %rdi
.Ltmp52:
	.cfi_escape 0x2e, 0x00
	movq	-496(%rbp), %rsi                # 8-byte Reload
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp53:
# %bb.62:
	movq	-112(%rbp), %rdi
.Ltmp54:
	.cfi_escape 0x2e, 0x00
	movq	-592(%rbp), %rsi                # 8-byte Reload
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp55:
# %bb.63:
	movq	-264(%rbp), %rdi
.Ltmp56:
	.cfi_escape 0x2e, 0x00
	movq	-312(%rbp), %rsi                # 8-byte Reload
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp57:
# %bb.64:
	movq	-256(%rbp), %rdi
.Ltmp58:
	.cfi_escape 0x2e, 0x00
	movq	%r14, %rsi
	movq	-336(%rbp), %rdx                # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp59:
# %bb.65:
	xorpd	%xmm0, %xmm0
	movupd	%xmm0, -724(%rbp)
	movapd	%xmm0, -736(%rbp)
.Ltmp61:
	.cfi_escape 0x2e, 0x00
	leaq	-528(%rbp), %rdi
	movl	$28, %esi
	movl	$1, %edx
	callq	hipMallocManaged
.Ltmp62:
	movq	-160(%rbp), %r13                # 8-byte Reload
# %bb.66:                               # %_ZL16hipMallocManagedIiE10hipError_tPPT_mj.exit309
	movq	-528(%rbp), %rdi
.Ltmp63:
	.cfi_escape 0x2e, 0x00
	leaq	-736(%rbp), %rsi
	movl	$28, %edx
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp64:
# %bb.67:
	.cfi_escape 0x2e, 0x00
	movl	$.Lstr, %edi
	callq	puts@PLT
	.cfi_escape 0x2e, 0x00
	movl	$.L.str.8, %edi
	xorl	%eax, %eax
	callq	printf
	btsq	$32, %r13
.Ltmp65:
	.cfi_escape 0x2e, 0x00
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp66:
# %bb.68:
	testl	%eax, %eax
	jne	.LBB12_70
# %bb.69:
	movq	-120(%rbp), %rdi
.Ltmp67:
	.cfi_escape 0x2e, 0x00
	movq	-488(%rbp), %rsi                # 8-byte Reload
                                        # kill: def $esi killed $esi killed $rsi
	callq	_Z25__device_stub__printArrayPii
.Ltmp68:
.LBB12_70:
.Ltmp69:
	.cfi_escape 0x2e, 0x00
	callq	hipDeviceSynchronize
.Ltmp70:
# %bb.71:
	.cfi_escape 0x2e, 0x00
	movl	$10, %edi
	callq	putchar@PLT
	.cfi_escape 0x2e, 0x00
	movl	$.L.str.10, %edi
	xorl	%eax, %eax
	callq	printf
.Ltmp71:
	.cfi_escape 0x2e, 0x00
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp72:
# %bb.72:
	testl	%eax, %eax
	jne	.LBB12_74
# %bb.73:
	movq	-152(%rbp), %rsi                # 8-byte Reload
	sarq	$2, %rsi
	movq	-96(%rbp), %rdi
.Ltmp73:
	.cfi_escape 0x2e, 0x00
                                        # kill: def $esi killed $esi killed $rsi
	callq	_Z25__device_stub__printArrayPii
.Ltmp74:
.LBB12_74:
.Ltmp75:
	.cfi_escape 0x2e, 0x00
	callq	hipDeviceSynchronize
.Ltmp76:
# %bb.75:
	movabsq	$4294967296, %r15               # imm = 0x100000000
	.cfi_escape 0x2e, 0x00
	movl	$10, %edi
	callq	putchar@PLT
	.cfi_escape 0x2e, 0x00
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	movl	-348(%rbp), %ebx                # 4-byte Reload
	orq	%r15, %rbx
	movq	-504(%rbp), %r14                # 8-byte Reload
	orq	%r15, %r14
.Ltmp77:
	.cfi_escape 0x2e, 0x00
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp78:
# %bb.76:
	testl	%eax, %eax
	jne	.LBB12_78
# %bb.77:
	movq	-96(%rbp), %rdi
	movq	-88(%rbp), %rsi
.Ltmp79:
	.cfi_escape 0x2e, 0x00
	callq	_Z35__device_stub__Count_number_of_termPiS_
.Ltmp80:
.LBB12_78:
.Ltmp81:
	.cfi_escape 0x2e, 0x00
	callq	hipDeviceSynchronize
.Ltmp82:
# %bb.79:
.Ltmp83:
	.cfi_escape 0x2e, 0x00
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp84:
# %bb.80:
	testl	%eax, %eax
	jne	.LBB12_82
# %bb.81:
	movq	-88(%rbp), %rdi
.Ltmp85:
	.cfi_escape 0x2e, 0x00
	movl	$7, %esi
	callq	_Z25__device_stub__printArrayPii
.Ltmp86:
.LBB12_82:
.Ltmp87:
	.cfi_escape 0x2e, 0x00
	callq	hipDeviceSynchronize
.Ltmp88:
# %bb.83:
	.cfi_escape 0x2e, 0x00
	movl	$10, %edi
	callq	putchar@PLT
	.cfi_escape 0x2e, 0x00
	movl	$.Lstr.2, %edi
	callq	puts@PLT
.Ltmp89:
	.cfi_escape 0x2e, 0x00
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp90:
# %bb.84:
	testl	%eax, %eax
	jne	.LBB12_86
# %bb.85:
	movq	-88(%rbp), %rdi
	movq	-80(%rbp), %rsi
	movq	-528(%rbp), %r8
.Ltmp91:
	.cfi_escape 0x2e, 0x00
	movq	-488(%rbp), %rdx                # 8-byte Reload
                                        # kill: def $edx killed $edx killed $rdx
	movq	-504(%rbp), %rcx                # 8-byte Reload
                                        # kill: def $ecx killed $ecx killed $rcx
	callq	_Z38__device_stub__Kogge_Stone_scan_kernelPiS_iiS_
.Ltmp92:
.LBB12_86:
.Ltmp93:
	.cfi_escape 0x2e, 0x00
	callq	hipDeviceSynchronize
.Ltmp94:
# %bb.87:
.Ltmp95:
	.cfi_escape 0x2e, 0x00
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp96:
# %bb.88:
	testl	%eax, %eax
	jne	.LBB12_90
# %bb.89:
	movq	-80(%rbp), %rdi
.Ltmp97:
	.cfi_escape 0x2e, 0x00
	movl	$7, %esi
	callq	_Z25__device_stub__printArrayPii
.Ltmp98:
.LBB12_90:
.Ltmp99:
	.cfi_escape 0x2e, 0x00
	callq	hipDeviceSynchronize
.Ltmp100:
# %bb.91:
	.cfi_escape 0x2e, 0x00
	movl	$10, %edi
	callq	putchar@PLT
	.cfi_escape 0x2e, 0x00
	movl	$.Lstr.3, %edi
	callq	puts@PLT
.Ltmp101:
	.cfi_escape 0x2e, 0x00
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp102:
# %bb.92:
	testl	%eax, %eax
	jne	.LBB12_94
# %bb.93:
	movq	-120(%rbp), %rdi
	movq	-96(%rbp), %rsi
	movq	-88(%rbp), %rdx
	movq	-80(%rbp), %rcx
	movq	-280(%rbp), %r8
.Ltmp103:
	.cfi_escape 0x2e, 0x00
	callq	_Z36__device_stub__Create_InvertedIndexAPiS_S_S_S_
.Ltmp104:
.LBB12_94:
.Ltmp105:
	.cfi_escape 0x2e, 0x00
	callq	hipDeviceSynchronize
.Ltmp106:
# %bb.95:
	.cfi_escape 0x2e, 0x00
	movl	$.Lstr.4, %edi
	callq	puts@PLT
	cmpq	$0, -512(%rbp)                  # 8-byte Folded Reload
	je	.LBB12_98
# %bb.96:                               # %.lr.ph501.preheader
	cmpq	$1, %r12
	movq	%r12, %r15
	adcq	$0, %r15
	xorl	%r13d, %r13d
.LBB12_97:                              # %.lr.ph501
                                        # =>This Inner Loop Header: Depth=1
	movq	-280(%rbp), %rax
	movl	(%rax,%r13,4), %esi
	.cfi_escape 0x2e, 0x00
	movl	$.L.str.15, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%r13
	cmpq	%r13, %r15
	jne	.LBB12_97
.LBB12_98:                              # %._crit_edge502
	.cfi_escape 0x2e, 0x00
	movl	$.Lstr.9, %edi
	callq	puts@PLT
	.cfi_escape 0x2e, 0x00
	movl	$.Lstr.6, %edi
	callq	puts@PLT
.Ltmp107:
	.cfi_escape 0x2e, 0x00
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp108:
# %bb.99:
	testl	%eax, %eax
	jne	.LBB12_101
# %bb.100:
	movq	-120(%rbp), %rdi
	movq	-96(%rbp), %rsi
	movq	-272(%rbp), %rdx
	movq	-88(%rbp), %rcx
	movq	-80(%rbp), %r8
	movq	-112(%rbp), %r9
.Ltmp109:
	.cfi_escape 0x2e, 0x10
	subq	$8, %rsp
	pushq	-264(%rbp)
	callq	_Z36__device_stub__Create_InvertedIndexBPiS_PdS_S_S_S0_
	addq	$16, %rsp
.Ltmp110:
.LBB12_101:
.Ltmp111:
	.cfi_escape 0x2e, 0x00
	callq	hipDeviceSynchronize
.Ltmp112:
# %bb.102:                              # %.preheader478
	movq	-512(%rbp), %r15                # 8-byte Reload
	testq	%r15, %r15
	je	.LBB12_108
# %bb.103:                              # %.lr.ph504.preheader
	cmpq	$1, %r12
	movq	%r12, %rbx
	adcq	$0, %rbx
	xorl	%r14d, %r14d
.LBB12_104:                             # %.lr.ph504
                                        # =>This Inner Loop Header: Depth=1
	movq	-112(%rbp), %rax
	movl	(%rax,%r14,4), %esi
	.cfi_escape 0x2e, 0x00
	movl	$.L.str.15, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%r14
	cmpq	%r14, %rbx
	jne	.LBB12_104
# %bb.105:                              # %._crit_edge505
	.cfi_escape 0x2e, 0x00
	movl	$.Lstr.9, %edi
	callq	puts@PLT
	.cfi_escape 0x2e, 0x00
	movl	$.Lstr.8, %edi
	callq	puts@PLT
	testq	%r15, %r15
	je	.LBB12_109
# %bb.106:                              # %.lr.ph508.preheader
	cmpq	$1, %r12
	adcq	$0, %r12
	xorl	%ebx, %ebx
.LBB12_107:                             # %.lr.ph508
                                        # =>This Inner Loop Header: Depth=1
	movq	-112(%rbp), %rax
	movl	(%rax,%rbx,4), %esi
	.cfi_escape 0x2e, 0x00
	movl	$.L.str.15, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%rbx
	cmpq	%rbx, %r12
	jne	.LBB12_107
	jmp	.LBB12_109
.LBB12_108:                             # %._crit_edge509.critedge
	.cfi_escape 0x2e, 0x00
	movl	$.Lstr.9, %edi
	callq	puts@PLT
	.cfi_escape 0x2e, 0x00
	movl	$.Lstr.8, %edi
	callq	puts@PLT
.LBB12_109:                             # %._crit_edge509
	.cfi_escape 0x2e, 0x00
	movl	$.Lstr.9, %edi
	callq	puts@PLT
	movq	-168(%rbp), %r12                # 8-byte Reload
	movabsq	$4294967296, %rax               # imm = 0x100000000
	orq	%rax, %r12
.Ltmp113:
	.cfi_escape 0x2e, 0x00
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp114:
# %bb.110:
	testl	%eax, %eax
	jne	.LBB12_112
# %bb.111:
	movq	-120(%rbp), %rdi
	movq	-96(%rbp), %rsi
	movq	-272(%rbp), %rdx
	movq	-256(%rbp), %rcx
	movq	-216(%rbp), %r8
	subq	-224(%rbp), %r8
	shrq	$2, %r8
.Ltmp115:
	.cfi_escape 0x2e, 0x00
                                        # kill: def $r8d killed $r8d killed $r8
	callq	_Z25__device_stub__getDocNormPiS_PdS0_i
.Ltmp116:
.LBB12_112:
.Ltmp117:
	.cfi_escape 0x2e, 0x00
	callq	hipDeviceSynchronize
.Ltmp118:
# %bb.113:
.Ltmp120:
	.cfi_escape 0x2e, 0x00
	leaq	-1320(%rbp), %rdi
	movl	$.L.str.19, %esi
	movl	$8, %edx
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEEC1EPKcSt13_Ios_Openmode
.Ltmp121:
# %bb.114:
	leaq	-552(%rbp), %rdx
	movq	%rdx, -16(%rdx)
	xorl	%eax, %eax
	movq	%rax, -8(%rdx)
	movb	$0, (%rdx)
	movq	-1320(%rbp), %rcx
	movq	-24(%rcx), %rcx
	movq	-1088(%rbp,%rcx), %rcx
	movq	%rax, -192(%rbp)
	movl	$-1, -184(%rbp)
.Ltmp123:
	.cfi_escape 0x2e, 0x10
	subq	$16, %rsp
	movupd	-192(%rbp), %xmm0
	movupd	%xmm0, (%rsp)
	leaq	-568(%rbp), %rdi
	movq	%rdx, %rsi
	movl	$-1, %r8d
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE19_M_replace_dispatchISt19istreambuf_iteratorIcS2_EEERS4_N9__gnu_cxx17__normal_iteratorIPKcS4_EESD_T_SE_St12__false_type
	addq	$16, %rsp
.Ltmp124:
# %bb.115:
	movq	-560(%rbp), %rax
	.cfi_escape 0x2e, 0x00
	movq	%rsp, %rbx
	addq	$16, %rax
	andq	$-16, %rax
	subq	%rax, %rbx
	movq	%rbx, %rsp
	movq	-568(%rbp), %rsi
	.cfi_escape 0x2e, 0x00
	movq	%rbx, %rdi
	callq	strcpy
	xorl	%eax, %eax
	movq	%rax, -176(%rbp)
	xorpd	%xmm0, %xmm0
	movapd	%xmm0, -192(%rbp)
	movq	%rax, -464(%rbp)
	movapd	%xmm0, -480(%rbp)
	movq	%rax, -432(%rbp)
	movapd	%xmm0, -448(%rbp)
	.cfi_escape 0x2e, 0x00
	movl	$.L.str.2, %esi
	movq	%rbx, %rdi
	callq	strtok
	movq	%rax, -520(%rbp)
	testq	%rax, %rax
	je	.LBB12_121
# %bb.116:
	leaq	-192(%rbp), %rbx
	leaq	-520(%rbp), %r14
.LBB12_117:                             # =>This Inner Loop Header: Depth=1
	movq	-184(%rbp), %rsi
	cmpq	-176(%rbp), %rsi
	je	.LBB12_119
# %bb.118:                              #   in Loop: Header=BB12_117 Depth=1
	movq	%rax, (%rsi)
	addq	$8, -184(%rbp)
	jmp	.LBB12_120
.LBB12_119:                             #   in Loop: Header=BB12_117 Depth=1
.Ltmp126:
	.cfi_escape 0x2e, 0x00
	movq	%rbx, %rdi
	movq	%r14, %rdx
	callq	_ZNSt6vectorIPcSaIS0_EE17_M_realloc_insertIJRKS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
.Ltmp127:
.LBB12_120:                             # %_ZNSt6vectorIPcSaIS0_EE9push_backERKS0_.exit315
                                        #   in Loop: Header=BB12_117 Depth=1
	.cfi_escape 0x2e, 0x00
	movl	$.L.str.2, %esi
	xorl	%edi, %edi
	callq	strtok
	movq	%rax, -520(%rbp)
	testq	%rax, %rax
	jne	.LBB12_117
.LBB12_121:                             # %.preheader477
	movq	-192(%rbp), %rax
	cmpq	%rax, -184(%rbp)
	je	.LBB12_135
# %bb.122:                              # %.lr.ph520
	xorl	%ebx, %ebx
	leaq	-448(%rbp), %r14
	leaq	-144(%rbp), %r15
	leaq	-480(%rbp), %r13
.LBB12_123:                             # =>This Loop Header: Depth=1
                                        #     Child Loop BB12_124 Depth 2
	movq	(%rax,%rbx,8), %rdi
	.cfi_escape 0x2e, 0x00
	movl	$.L.str.3, %esi
.LBB12_124:                             #   Parent Loop BB12_123 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	callq	strtok
	testq	%rax, %rax
	je	.LBB12_134
# %bb.125:                              # %.lr.ph517
                                        #   in Loop: Header=BB12_124 Depth=2
	cmpq	$1, %rbx
	je	.LBB12_129
# %bb.126:                              # %.lr.ph517
                                        #   in Loop: Header=BB12_124 Depth=2
	testq	%rbx, %rbx
	jne	.LBB12_133
# %bb.127:                              #   in Loop: Header=BB12_124 Depth=2
	.cfi_escape 0x2e, 0x00
	movq	%rax, %rdi
	callq	atoi
	movl	%eax, -144(%rbp)
	movq	-472(%rbp), %rsi
	cmpq	-464(%rbp), %rsi
	je	.LBB12_131
# %bb.128:                              #   in Loop: Header=BB12_124 Depth=2
	movl	%eax, (%rsi)
	addq	$4, %rsi
	movq	%rsi, -472(%rbp)
	jmp	.LBB12_133
.LBB12_129:                             #   in Loop: Header=BB12_124 Depth=2
	.cfi_escape 0x2e, 0x00
	movq	%rax, %rdi
	callq	atof
	movsd	%xmm0, -144(%rbp)
	movq	-440(%rbp), %rsi
	cmpq	-432(%rbp), %rsi
	je	.LBB12_132
# %bb.130:                              #   in Loop: Header=BB12_124 Depth=2
	movsd	%xmm0, (%rsi)
	addq	$8, %rsi
	movq	%rsi, -440(%rbp)
	jmp	.LBB12_133
.LBB12_131:                             #   in Loop: Header=BB12_124 Depth=2
.Ltmp132:
	.cfi_escape 0x2e, 0x00
	movq	%r13, %rdi
	movq	%r15, %rdx
	callq	_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_
.Ltmp133:
	jmp	.LBB12_133
.LBB12_132:                             #   in Loop: Header=BB12_124 Depth=2
.Ltmp129:
	.cfi_escape 0x2e, 0x00
	movq	%r14, %rdi
	movq	%r15, %rdx
	callq	_ZNSt6vectorIdSaIdEE17_M_realloc_insertIJdEEEvN9__gnu_cxx17__normal_iteratorIPdS1_EEDpOT_
.Ltmp130:
.LBB12_133:                             #   in Loop: Header=BB12_124 Depth=2
	.cfi_escape 0x2e, 0x00
	movl	$.L.str.3, %esi
	xorl	%edi, %edi
	jmp	.LBB12_124
.LBB12_134:                             # %._crit_edge518
                                        #   in Loop: Header=BB12_123 Depth=1
	incq	%rbx
	movq	-192(%rbp), %rax
	movq	-184(%rbp), %rcx
	subq	%rax, %rcx
	sarq	$3, %rcx
	cmpq	%rcx, %rbx
	jb	.LBB12_123
.LBB12_135:                             # %._crit_edge521
	movq	%r12, -160(%rbp)                # 8-byte Spill
	movq	-480(%rbp), %rsi
	movq	-472(%rbp), %r12
	subq	%rsi, %r12
	movq	%r12, %rax
	shrq	$2, %rax
	movq	%rax, -232(%rbp)                # 8-byte Spill
	movl	%eax, %eax
	.cfi_escape 0x2e, 0x00
	movq	%rsp, %r13
	movq	%rax, -152(%rbp)                # 8-byte Spill
	leaq	15(,%rax,4), %rax
	andq	$-16, %rax
	subq	%rax, %r13
	movq	%r13, %rsp
	movq	-448(%rbp), %rbx
	movq	-440(%rbp), %r14
	subq	%rbx, %r14
	.cfi_escape 0x2e, 0x00
	movq	%rsp, %r15
	leaq	15(%r14), %rax
	andq	$-16, %rax
	subq	%rax, %r15
	movq	%r15, %rsp
	cmpq	$5, %r12
	jl	.LBB12_241
# %bb.136:
	.cfi_escape 0x2e, 0x00
	movq	%r13, %rdi
	movq	%r12, %rdx
	callq	memmove@PLT
.LBB12_137:                             # %_ZSt4copyIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEES2_ET0_T_S8_S7_.exit316
	cmpq	$9, %r14
	movq	%r13, -48(%rbp)                 # 8-byte Spill
	jl	.LBB12_243
# %bb.138:
	.cfi_escape 0x2e, 0x00
	movq	%r15, %rdi
	movq	%rbx, %rsi
	movq	%r14, %rdx
	callq	memmove@PLT
.LBB12_139:                             # %_ZSt4copyIN9__gnu_cxx17__normal_iteratorIPdSt6vectorIdSaIdEEEES2_ET0_T_S8_S7_.exit323
	.cfi_escape 0x2e, 0x00
	movq	%rsp, %rbx
	subq	-576(%rbp), %rbx                # 8-byte Folded Reload
	movq	%rbx, %rsp
	shlq	$30, %r12
	movq	%r12, %r14
	sarq	$30, %r14
.Ltmp135:
	.cfi_escape 0x2e, 0x00
	leaq	-248(%rbp), %rdi
	movq	%r14, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
.Ltmp136:
# %bb.140:                              # %_ZL16hipMallocManagedIiE10hipError_tPPT_mj.exit325
	movq	%r12, %r13
	sarq	$29, %r13
.Ltmp137:
	.cfi_escape 0x2e, 0x00
	leaq	-240(%rbp), %rdi
	movq	%r13, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
.Ltmp138:
# %bb.141:                              # %_ZL16hipMallocManagedIdE10hipError_tPPT_mj.exit327
.Ltmp139:
	.cfi_escape 0x2e, 0x00
	leaq	-72(%rbp), %rdi
	movq	-336(%rbp), %rsi                # 8-byte Reload
	movl	$1, %edx
	callq	hipMallocManaged
.Ltmp140:
# %bb.142:                              # %_ZL16hipMallocManagedIdE10hipError_tPPT_mj.exit329
	movq	-248(%rbp), %rdi
.Ltmp141:
	.cfi_escape 0x2e, 0x00
	movq	-48(%rbp), %rsi                 # 8-byte Reload
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp142:
# %bb.143:
	movq	-240(%rbp), %rdi
.Ltmp143:
	.cfi_escape 0x2e, 0x00
	movq	%r15, %rsi
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp144:
# %bb.144:
	movq	-72(%rbp), %rdi
.Ltmp145:
	.cfi_escape 0x2e, 0x00
	movq	%rbx, %rsi
	movq	-336(%rbp), %rdx                # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp146:
# %bb.145:                              # %.preheader476
	xorpd	%xmm1, %xmm1
	xorpd	%xmm0, %xmm0
	testq	%r12, %r12
	je	.LBB12_148
# %bb.146:                              # %.lr.ph524.preheader
	movslq	-232(%rbp), %rax                # 4-byte Folded Reload
	cmpq	$1, %rax
	adcq	$0, %rax
	xorl	%ecx, %ecx
.LBB12_147:                             # %.lr.ph524
                                        # =>This Inner Loop Header: Depth=1
	movsd	(%r15,%rcx,8), %xmm2            # xmm2 = mem[0],zero
	mulsd	%xmm2, %xmm2
	addsd	%xmm2, %xmm0
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB12_147
.LBB12_148:                             # %._crit_edge525
	ucomisd	%xmm1, %xmm0
	movq	-160(%rbp), %r15                # 8-byte Reload
	jb	.LBB12_150
# %bb.149:
	sqrtsd	%xmm0, %xmm0
	jmp	.LBB12_151
.LBB12_150:                             # %call.sqrt
	.cfi_escape 0x2e, 0x00
	callq	sqrt
.LBB12_151:                             # %._crit_edge525.split
	movsd	%xmm0, -48(%rbp)                # 8-byte Spill
	movabsq	$4294967296, %rax               # imm = 0x100000000
	movq	-152(%rbp), %rdx                # 8-byte Reload
	orq	%rax, %rdx
.Ltmp148:
	.cfi_escape 0x2e, 0x00
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp149:
# %bb.152:
	testl	%eax, %eax
	jne	.LBB12_154
# %bb.153:
	movq	-248(%rbp), %rdi
	movq	-240(%rbp), %rsi
	movq	-112(%rbp), %rdx
	movq	-264(%rbp), %rcx
	movq	-72(%rbp), %r8
	movq	-80(%rbp), %r9
.Ltmp150:
	.cfi_escape 0x2e, 0x00
	callq	_Z20__device_stub__knnTDPiPdS_S0_S0_S_
.Ltmp151:
.LBB12_154:
.Ltmp152:
	.cfi_escape 0x2e, 0x00
	callq	hipDeviceSynchronize
.Ltmp153:
# %bb.155:
.Ltmp154:
	.cfi_escape 0x2e, 0x00
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp155:
# %bb.156:
	testl	%eax, %eax
	jne	.LBB12_158
# %bb.157:
	movq	-248(%rbp), %rdi
	movq	-240(%rbp), %rsi
	movq	-72(%rbp), %rdx
	movq	-256(%rbp), %rcx
.Ltmp156:
	.cfi_escape 0x2e, 0x00
	movsd	-48(%rbp), %xmm0                # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	_Z18__device_stub__knnPiPdS0_S0_d
.Ltmp157:
.LBB12_158:
.Ltmp158:
	.cfi_escape 0x2e, 0x00
	callq	hipDeviceSynchronize
.Ltmp159:
# %bb.159:
	.cfi_escape 0x2e, 0x00
	movq	%rsp, %rbx
	movq	-168(%rbp), %rcx                # 8-byte Reload
	leaq	15(,%rcx,4), %rax
	andq	$-16, %rax
	subq	%rax, %rbx
	movq	%rbx, %rsp
	leaq	(,%rcx,4), %r14
.Ltmp161:
	.cfi_escape 0x2e, 0x00
	leaq	-64(%rbp), %rdi
	movq	%r14, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
.Ltmp162:
# %bb.160:                              # %_ZL16hipMallocManagedIiE10hipError_tPPT_mj.exit331
	movq	-64(%rbp), %rdi
.Ltmp163:
	.cfi_escape 0x2e, 0x00
	movq	%rbx, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp164:
# %bb.161:
.Ltmp165:
	.cfi_escape 0x2e, 0x00
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	movl	$1, %esi
	movq	%r15, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp166:
# %bb.162:
	testl	%eax, %eax
	jne	.LBB12_164
# %bb.163:
	movq	-72(%rbp), %rdi
	movq	-64(%rbp), %rsi
.Ltmp167:
	.cfi_escape 0x2e, 0x00
	movq	-168(%rbp), %rdx                # 8-byte Reload
                                        # kill: def $edx killed $edx killed $rdx
	callq	_Z26__device_stub__oddEvenSortPdPii
.Ltmp168:
.LBB12_164:
.Ltmp169:
	.cfi_escape 0x2e, 0x00
	callq	hipDeviceSynchronize
.Ltmp170:
# %bb.165:
	xorpd	%xmm0, %xmm0
	movapd	%xmm0, -144(%rbp)
	movq	$0, -128(%rbp)
	.cfi_escape 0x2e, 0x00
	movl	$.L.str.20, %edi
	movl	-52(%rbp), %ebx                 # 4-byte Reload
	movl	%ebx, %esi
	xorl	%eax, %eax
	callq	printf
	testl	%ebx, %ebx
	je	.LBB12_174
# %bb.166:                              # %.lr.ph529
	movslq	-52(%rbp), %r15                 # 4-byte Folded Reload
	xorl	%r12d, %r12d
	leaq	-144(%rbp), %rbx
	leaq	-104(%rbp), %r14
.LBB12_167:                             # =>This Inner Loop Header: Depth=1
	movq	-144(%rbp), %rdi
	movq	-136(%rbp), %rsi
	movq	-64(%rbp), %rdx
	addq	%r12, %rdx
.Ltmp172:
	.cfi_escape 0x2e, 0x00
	callq	_ZSt9__find_ifIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops16_Iter_equals_valIKiEEET_SB_SB_T0_St26random_access_iterator_tag
.Ltmp173:
# %bb.168:                              # %_ZSt4findIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEEiET_S7_S7_RKT0_.exit
                                        #   in Loop: Header=BB12_167 Depth=1
	movq	-64(%rbp), %rcx
	cmpq	-136(%rbp), %rax
	jne	.LBB12_173
# %bb.169:                              #   in Loop: Header=BB12_167 Depth=1
	movslq	(%rcx,%r12), %rdx
	imulq	$1717986919, %rdx, %rdx         # imm = 0x66666667
	movq	%rdx, %rsi
	shrq	$63, %rsi
	sarq	$34, %rdx
	addl	%esi, %edx
	movl	%edx, -104(%rbp)
	cmpq	-128(%rbp), %rax
	je	.LBB12_171
# %bb.170:                              #   in Loop: Header=BB12_167 Depth=1
	movl	%edx, (%rax)
	addq	$4, %rax
	movq	%rax, -136(%rbp)
	jmp	.LBB12_173
.LBB12_171:                             #   in Loop: Header=BB12_167 Depth=1
.Ltmp175:
	.cfi_escape 0x2e, 0x00
	movq	%rbx, %rdi
	movq	%rax, %rsi
	movq	%r14, %rdx
	callq	_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_
.Ltmp176:
# %bb.172:                              # %._ZNSt6vectorIiSaIiEE9push_backEOi.exit336_crit_edge
                                        #   in Loop: Header=BB12_167 Depth=1
	movq	-64(%rbp), %rcx
.LBB12_173:                             #   in Loop: Header=BB12_167 Depth=1
	movslq	(%rcx,%r12), %rsi
	movq	-72(%rbp), %rax
	movsd	(%rax,%r12,2), %xmm0            # xmm0 = mem[0],zero
	imulq	$1717986919, %rsi, %rdx         # imm = 0x66666667
	movq	%rdx, %rax
	shrq	$63, %rax
	sarq	$34, %rdx
	addl	%eax, %edx
	.cfi_escape 0x2e, 0x00
	movl	$.L.str.21, %edi
                                        # kill: def $esi killed $esi killed $rsi
                                        # kill: def $edx killed $edx killed $rdx
	movb	$1, %al
	callq	printf
	addq	$4, %r12
	decq	%r15
	jne	.LBB12_167
.LBB12_174:                             # %._crit_edge530
	movq	-144(%rbp), %rsi
	movq	-136(%rbp), %rbx
	subq	%rsi, %rbx
	movq	%rbx, %r12
	sarq	$2, %r12
	.cfi_escape 0x2e, 0x00
	movq	%rsp, %r14
	leaq	15(%rbx), %rax
	andq	$-16, %rax
	subq	%rax, %r14
	movq	%r14, %rsp
	cmpq	$5, %rbx
	jl	.LBB12_245
# %bb.175:
	.cfi_escape 0x2e, 0x00
	movq	%r14, %rdi
	movq	%rbx, %rdx
	callq	memmove@PLT
.LBB12_176:                             # %_ZSt4copyIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEES2_ET0_T_S8_S7_.exit332
	.cfi_escape 0x2e, 0x00
	movq	%rsp, %r15
	leaq	15(,%r12,8), %rax
	andq	$-16, %rax
	subq	%rax, %r15
	movq	%r15, %rsp
	leaq	(%rbx,%rbx), %r12
.Ltmp178:
	.cfi_escape 0x2e, 0x00
	leaq	-104(%rbp), %rdi
	movq	%r12, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
.Ltmp179:
# %bb.177:                              # %_ZL16hipMallocManagedIdE10hipError_tPPT_mj.exit338
.Ltmp180:
	.cfi_escape 0x2e, 0x00
	leaq	-344(%rbp), %rdi
	movq	%rbx, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
.Ltmp181:
# %bb.178:                              # %_ZL16hipMallocManagedIiE10hipError_tPPT_mj.exit340
	movq	-104(%rbp), %rdi
.Ltmp182:
	.cfi_escape 0x2e, 0x00
	movq	%r15, %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp183:
# %bb.179:
	movq	-344(%rbp), %rdi
.Ltmp184:
	.cfi_escape 0x2e, 0x00
	movq	%r14, %rsi
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
.Ltmp185:
# %bb.180:
	movq	-136(%rbp), %rax
	subq	-144(%rbp), %rax
	shrq	$2, %rax
	movl	%eax, %edx
	movabsq	$4294967296, %rax               # imm = 0x100000000
	orq	%rax, %rdx
.Ltmp186:
	.cfi_escape 0x2e, 0x00
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
.Ltmp187:
# %bb.181:
	testl	%eax, %eax
	jne	.LBB12_183
# %bb.182:
	movq	-64(%rbp), %rdi
	movq	-72(%rbp), %rsi
	movq	-104(%rbp), %rcx
	movq	-344(%rbp), %r8
.Ltmp188:
	.cfi_escape 0x2e, 0x00
	movl	-52(%rbp), %edx                 # 4-byte Reload
	callq	_Z23__device_stub__classifyPiPdiS0_S_
.Ltmp189:
.LBB12_183:
.Ltmp190:
	.cfi_escape 0x2e, 0x00
	callq	hipDeviceSynchronize
.Ltmp191:
# %bb.184:                              # %.preheader
	movq	-136(%rbp), %rax
	subq	-144(%rbp), %rax
	je	.LBB12_187
# %bb.185:                              # %.lr.ph534
	sarq	$2, %rax
	cmpq	$1, %rax
	adcq	$0, %rax
	movq	-104(%rbp), %rdx
	xorpd	%xmm0, %xmm0
	xorl	%esi, %esi
	xorl	%ecx, %ecx
.LBB12_186:                             # =>This Inner Loop Header: Depth=1
	movsd	(%rdx,%rsi,8), %xmm1            # xmm1 = mem[0],zero
	ucomisd	%xmm0, %xmm1
	cmoval	%esi, %ecx
	maxsd	%xmm0, %xmm1
	incq	%rsi
	movapd	%xmm1, %xmm0
	cmpq	%rsi, %rax
	jne	.LBB12_186
	jmp	.LBB12_188
.LBB12_187:
	xorl	%ecx, %ecx
.LBB12_188:                             # %._crit_edge535
	movq	-344(%rbp), %rax
	movslq	%ecx, %rcx
	movl	(%rax,%rcx,4), %esi
	.cfi_escape 0x2e, 0x00
	movl	$.L.str.22, %edi
	xorl	%eax, %eax
	callq	printf
	.cfi_escape 0x2e, 0x00
	movl	$10, %edi
	callq	putchar@PLT
	movq	-120(%rbp), %rdi
.Ltmp193:
	.cfi_escape 0x2e, 0x00
	callq	hipFree
.Ltmp194:
# %bb.189:
	movq	-96(%rbp), %rdi
.Ltmp195:
	.cfi_escape 0x2e, 0x00
	callq	hipFree
.Ltmp196:
# %bb.190:
	movq	-272(%rbp), %rdi
.Ltmp197:
	.cfi_escape 0x2e, 0x00
	callq	hipFree
.Ltmp198:
# %bb.191:
	movq	-88(%rbp), %rdi
.Ltmp199:
	.cfi_escape 0x2e, 0x00
	callq	hipFree
.Ltmp200:
# %bb.192:
	movq	-80(%rbp), %rdi
.Ltmp201:
	.cfi_escape 0x2e, 0x00
	callq	hipFree
.Ltmp202:
# %bb.193:
	movq	-280(%rbp), %rdi
.Ltmp203:
	.cfi_escape 0x2e, 0x00
	callq	hipFree
.Ltmp204:
# %bb.194:
	movq	-112(%rbp), %rdi
.Ltmp205:
	.cfi_escape 0x2e, 0x00
	callq	hipFree
.Ltmp206:
# %bb.195:
	movq	-264(%rbp), %rdi
.Ltmp207:
	.cfi_escape 0x2e, 0x00
	callq	hipFree
.Ltmp208:
# %bb.196:
	movq	-248(%rbp), %rdi
.Ltmp209:
	.cfi_escape 0x2e, 0x00
	callq	hipFree
.Ltmp210:
# %bb.197:
	movq	-240(%rbp), %rdi
.Ltmp211:
	.cfi_escape 0x2e, 0x00
	callq	hipFree
.Ltmp212:
# %bb.198:
	movq	-72(%rbp), %rdi
.Ltmp213:
	.cfi_escape 0x2e, 0x00
	callq	hipFree
.Ltmp214:
# %bb.199:
	movq	-256(%rbp), %rdi
.Ltmp215:
	.cfi_escape 0x2e, 0x00
	callq	hipFree
.Ltmp216:
# %bb.200:
	movq	-64(%rbp), %rdi
.Ltmp217:
	.cfi_escape 0x2e, 0x00
	callq	hipFree
.Ltmp218:
# %bb.201:
	movq	-104(%rbp), %rdi
.Ltmp219:
	.cfi_escape 0x2e, 0x00
	callq	hipFree
.Ltmp220:
# %bb.202:
	movq	-144(%rbp), %rdi
	testq	%rdi, %rdi
	je	.LBB12_204
# %bb.203:
	.cfi_escape 0x2e, 0x00
	callq	_ZdlPv
.LBB12_204:                             # %_ZNSt6vectorIiSaIiEED2Ev.exit
	movq	-448(%rbp), %rdi
	testq	%rdi, %rdi
	je	.LBB12_206
# %bb.205:
	.cfi_escape 0x2e, 0x00
	callq	_ZdlPv
.LBB12_206:                             # %_ZNSt6vectorIdSaIdEED2Ev.exit
	movq	-480(%rbp), %rdi
	testq	%rdi, %rdi
	je	.LBB12_208
# %bb.207:
	.cfi_escape 0x2e, 0x00
	callq	_ZdlPv
.LBB12_208:                             # %_ZNSt6vectorIiSaIiEED2Ev.exit343
	movq	-192(%rbp), %rdi
	testq	%rdi, %rdi
	je	.LBB12_210
# %bb.209:
	.cfi_escape 0x2e, 0x00
	callq	_ZdlPv
.LBB12_210:                             # %_ZNSt6vectorIPcSaIS0_EED2Ev.exit
	movq	-568(%rbp), %rdi
	leaq	-552(%rbp), %rax
	cmpq	%rax, %rdi
	je	.LBB12_212
# %bb.211:                              # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i
	.cfi_escape 0x2e, 0x00
	callq	_ZdlPv
.LBB12_212:                             # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit
	.cfi_escape 0x2e, 0x00
	leaq	-1320(%rbp), %rdi
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev
	movq	-648(%rbp), %rdi
	testq	%rdi, %rdi
	je	.LBB12_214
# %bb.213:
	.cfi_escape 0x2e, 0x00
	callq	_ZdlPv
.LBB12_214:                             # %_ZNSt6vectorIdSaIdEED2Ev.exit346
	movq	-672(%rbp), %rdi
	testq	%rdi, %rdi
	je	.LBB12_216
# %bb.215:
	.cfi_escape 0x2e, 0x00
	callq	_ZdlPv
.LBB12_216:                             # %_ZNSt6vectorIiSaIiEED2Ev.exit348
	movq	-696(%rbp), %rdi
	testq	%rdi, %rdi
	je	.LBB12_218
# %bb.217:
	.cfi_escape 0x2e, 0x00
	callq	_ZdlPv
.LBB12_218:                             # %_ZNSt6vectorIiSaIiEED2Ev.exit350
	movq	-384(%rbp), %rdi
	testq	%rdi, %rdi
	je	.LBB12_220
# %bb.219:
	.cfi_escape 0x2e, 0x00
	callq	_ZdlPv
.LBB12_220:                             # %_ZNSt6vectorIdSaIdEED2Ev.exit352
	movq	-416(%rbp), %rdi
	testq	%rdi, %rdi
	je	.LBB12_222
# %bb.221:
	.cfi_escape 0x2e, 0x00
	callq	_ZdlPv
.LBB12_222:                             # %_ZNSt6vectorIiSaIiEED2Ev.exit354
	movq	-224(%rbp), %rdi
	testq	%rdi, %rdi
	je	.LBB12_224
# %bb.223:
	.cfi_escape 0x2e, 0x00
	callq	_ZdlPv
.LBB12_224:                             # %_ZNSt6vectorIiSaIiEED2Ev.exit356
	movq	-304(%rbp), %rdi
	testq	%rdi, %rdi
	je	.LBB12_226
# %bb.225:
	.cfi_escape 0x2e, 0x00
	callq	_ZdlPv
.LBB12_226:                             # %_ZNSt6vectorIPcSaIS0_EED2Ev.exit358
	movq	-584(%rbp), %rsp                # 8-byte Reload
	movq	-624(%rbp), %rdi
	leaq	-608(%rbp), %rax
	cmpq	%rax, %rdi
	je	.LBB12_228
# %bb.227:                              # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i359
	.cfi_escape 0x2e, 0x00
	callq	_ZdlPv
.LBB12_228:                             # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit361
	.cfi_escape 0x2e, 0x00
	leaq	-1840(%rbp), %rdi
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev
	xorl	%eax, %eax
	leaq	-40(%rbp), %rsp
	popq	%rbx
	popq	%r12
	popq	%r13
	popq	%r14
	popq	%r15
	popq	%rbp
	.cfi_def_cfa %rsp, 8
	retq
.LBB12_229:
	.cfi_def_cfa %rbp, 16
	cmpq	$4, %rbx
	jne	.LBB12_34
# %bb.230:
	movl	(%rsi), %eax
	movq	-48(%rbp), %rcx                 # 8-byte Reload
	movl	%eax, (%rcx)
	jmp	.LBB12_34
.LBB12_231:
	cmpq	$4, %r13
	jne	.LBB12_36
# %bb.232:
	movl	(%r15), %eax
	movq	-328(%rbp), %rcx                # 8-byte Reload
	movl	%eax, (%rcx)
	jmp	.LBB12_36
.LBB12_233:
	cmpq	$8, %r12
	jne	.LBB12_38
# %bb.234:
	movsd	(%r14), %xmm0                   # xmm0 = mem[0],zero
	movq	-320(%rbp), %rax                # 8-byte Reload
	movsd	%xmm0, (%rax)
	jmp	.LBB12_38
.LBB12_235:
	cmpq	$4, %rdx
	jne	.LBB12_43
# %bb.236:
	movl	(%rsi), %eax
	movq	-496(%rbp), %rcx                # 8-byte Reload
	movl	%eax, (%rcx)
	jmp	.LBB12_43
.LBB12_237:
	cmpq	$4, %rdx
	jne	.LBB12_45
# %bb.238:
	movl	(%rsi), %eax
	movl	%eax, (%r14)
	jmp	.LBB12_45
.LBB12_239:
	cmpq	$8, %rdx
	jne	.LBB12_47
# %bb.240:
	movsd	(%rsi), %xmm0                   # xmm0 = mem[0],zero
	movq	-312(%rbp), %rax                # 8-byte Reload
	movsd	%xmm0, (%rax)
	jmp	.LBB12_47
.LBB12_241:
	cmpq	$4, %r12
	jne	.LBB12_137
# %bb.242:
	movl	(%rsi), %eax
	movl	%eax, (%r13)
	jmp	.LBB12_137
.LBB12_243:
	cmpq	$8, %r14
	jne	.LBB12_139
# %bb.244:
	movsd	(%rbx), %xmm0                   # xmm0 = mem[0],zero
	movsd	%xmm0, (%r15)
	jmp	.LBB12_139
.LBB12_245:
	cmpq	$4, %rbx
	jne	.LBB12_176
# %bb.246:
	movl	(%rsi), %eax
	movl	%eax, (%r14)
	jmp	.LBB12_176
.LBB12_247:
.Ltmp125:
	movq	%rax, %rbx
	jmp	.LBB12_280
.LBB12_248:
.Ltmp122:
	jmp	.LBB12_263
.LBB12_249:
.Ltmp23:
	movq	%rax, %rbx
	jmp	.LBB12_285
.LBB12_250:
.Ltmp20:
	movq	%rax, %rbx
	jmp	.LBB12_287
.LBB12_251:
.Ltmp17:
	jmp	.LBB12_260
.LBB12_252:
.Ltmp2:
	movq	%rax, %rbx
	jmp	.LBB12_297
.LBB12_253:
.Ltmp177:
	jmp	.LBB12_265
.LBB12_254:
.Ltmp171:
	jmp	.LBB12_273
.LBB12_255:
.Ltmp160:
	jmp	.LBB12_273
.LBB12_256:
.Ltmp147:
	jmp	.LBB12_273
.LBB12_257:
.Ltmp192:
	jmp	.LBB12_265
.LBB12_258:
.Ltmp128:
	jmp	.LBB12_273
.LBB12_259:
.Ltmp5:
	jmp	.LBB12_260
.LBB12_261:
.Ltmp221:
	jmp	.LBB12_265
.LBB12_262:
.Ltmp60:
	jmp	.LBB12_263
.LBB12_264:
.Ltmp174:
.LBB12_265:
	movq	%rax, %rbx
	movq	-144(%rbp), %rdi
	testq	%rdi, %rdi
	je	.LBB12_274
# %bb.266:
	.cfi_escape 0x2e, 0x00
	callq	_ZdlPv
	jmp	.LBB12_274
.LBB12_267:
.Ltmp119:
.LBB12_263:
	movq	%rax, %rbx
	jmp	.LBB12_283
.LBB12_268:
.Ltmp8:
	jmp	.LBB12_260
.LBB12_269:
.Ltmp11:
	jmp	.LBB12_260
.LBB12_270:
.Ltmp14:
.LBB12_260:
	movq	%rax, %rbx
	jmp	.LBB12_289
.LBB12_271:
.Ltmp131:
	jmp	.LBB12_273
.LBB12_272:
.Ltmp134:
.LBB12_273:
	movq	%rax, %rbx
.LBB12_274:
	movq	-448(%rbp), %rdi
	testq	%rdi, %rdi
	je	.LBB12_276
# %bb.275:
	.cfi_escape 0x2e, 0x00
	callq	_ZdlPv
.LBB12_276:                             # %_ZNSt6vectorIdSaIdEED2Ev.exit365
	movq	-480(%rbp), %rdi
	testq	%rdi, %rdi
	je	.LBB12_278
# %bb.277:
	.cfi_escape 0x2e, 0x00
	callq	_ZdlPv
.LBB12_278:                             # %_ZNSt6vectorIiSaIiEED2Ev.exit367
	movq	-192(%rbp), %rdi
	testq	%rdi, %rdi
	je	.LBB12_280
# %bb.279:
	.cfi_escape 0x2e, 0x00
	callq	_ZdlPv
.LBB12_280:
	movq	-568(%rbp), %rdi
	leaq	-552(%rbp), %rax
	cmpq	%rax, %rdi
	je	.LBB12_282
# %bb.281:                              # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i370
	.cfi_escape 0x2e, 0x00
	callq	_ZdlPv
.LBB12_282:                             # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit372
	.cfi_escape 0x2e, 0x00
	leaq	-1320(%rbp), %rdi
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev
.LBB12_283:
	movq	-648(%rbp), %rdi
	testq	%rdi, %rdi
	je	.LBB12_285
# %bb.284:
	.cfi_escape 0x2e, 0x00
	callq	_ZdlPv
.LBB12_285:                             # %_ZNSt6vectorIdSaIdEED2Ev.exit374
	movq	-672(%rbp), %rdi
	testq	%rdi, %rdi
	je	.LBB12_287
# %bb.286:
	.cfi_escape 0x2e, 0x00
	callq	_ZdlPv
.LBB12_287:                             # %_ZNSt6vectorIiSaIiEED2Ev.exit376
	movq	-696(%rbp), %rdi
	testq	%rdi, %rdi
	je	.LBB12_289
# %bb.288:
	.cfi_escape 0x2e, 0x00
	callq	_ZdlPv
.LBB12_289:
	movq	-384(%rbp), %rdi
	testq	%rdi, %rdi
	je	.LBB12_291
# %bb.290:
	.cfi_escape 0x2e, 0x00
	callq	_ZdlPv
.LBB12_291:                             # %_ZNSt6vectorIdSaIdEED2Ev.exit380
	movq	-416(%rbp), %rdi
	testq	%rdi, %rdi
	je	.LBB12_293
# %bb.292:
	.cfi_escape 0x2e, 0x00
	callq	_ZdlPv
.LBB12_293:                             # %_ZNSt6vectorIiSaIiEED2Ev.exit382
	movq	-224(%rbp), %rdi
	testq	%rdi, %rdi
	je	.LBB12_295
# %bb.294:
	.cfi_escape 0x2e, 0x00
	callq	_ZdlPv
.LBB12_295:                             # %_ZNSt6vectorIiSaIiEED2Ev.exit384
	movq	-304(%rbp), %rdi
	testq	%rdi, %rdi
	je	.LBB12_297
# %bb.296:
	.cfi_escape 0x2e, 0x00
	callq	_ZdlPv
.LBB12_297:
	movq	-624(%rbp), %rdi
	leaq	-608(%rbp), %rax
	cmpq	%rax, %rdi
	je	.LBB12_299
# %bb.298:                              # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i387
	.cfi_escape 0x2e, 0x00
	callq	_ZdlPv
.LBB12_299:                             # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit389
	.cfi_escape 0x2e, 0x00
	leaq	-1840(%rbp), %rdi
	callq	_ZNSt14basic_ifstreamIcSt11char_traitsIcEED1Ev
	.cfi_escape 0x2e, 0x00
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end12:
	.size	main, .Lfunc_end12-main
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table12:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Lfunc_begin0-.Lfunc_begin0    # >> Call Site 1 <<
	.uleb128 .Ltmp0-.Lfunc_begin0           #   Call between .Lfunc_begin0 and .Ltmp0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 2 <<
	.uleb128 .Ltmp1-.Ltmp0                  #   Call between .Ltmp0 and .Ltmp1
	.uleb128 .Ltmp2-.Lfunc_begin0           #     jumps to .Ltmp2
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp3-.Lfunc_begin0           # >> Call Site 3 <<
	.uleb128 .Ltmp4-.Ltmp3                  #   Call between .Ltmp3 and .Ltmp4
	.uleb128 .Ltmp5-.Lfunc_begin0           #     jumps to .Ltmp5
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp9-.Lfunc_begin0           # >> Call Site 4 <<
	.uleb128 .Ltmp10-.Ltmp9                 #   Call between .Ltmp9 and .Ltmp10
	.uleb128 .Ltmp11-.Lfunc_begin0          #     jumps to .Ltmp11
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp12-.Lfunc_begin0          # >> Call Site 5 <<
	.uleb128 .Ltmp13-.Ltmp12                #   Call between .Ltmp12 and .Ltmp13
	.uleb128 .Ltmp14-.Lfunc_begin0          #     jumps to .Ltmp14
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp6-.Lfunc_begin0           # >> Call Site 6 <<
	.uleb128 .Ltmp7-.Ltmp6                  #   Call between .Ltmp6 and .Ltmp7
	.uleb128 .Ltmp8-.Lfunc_begin0           #     jumps to .Ltmp8
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp7-.Lfunc_begin0           # >> Call Site 7 <<
	.uleb128 .Ltmp15-.Ltmp7                 #   Call between .Ltmp7 and .Ltmp15
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp15-.Lfunc_begin0          # >> Call Site 8 <<
	.uleb128 .Ltmp16-.Ltmp15                #   Call between .Ltmp15 and .Ltmp16
	.uleb128 .Ltmp17-.Lfunc_begin0          #     jumps to .Ltmp17
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp18-.Lfunc_begin0          # >> Call Site 9 <<
	.uleb128 .Ltmp19-.Ltmp18                #   Call between .Ltmp18 and .Ltmp19
	.uleb128 .Ltmp20-.Lfunc_begin0          #     jumps to .Ltmp20
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp21-.Lfunc_begin0          # >> Call Site 10 <<
	.uleb128 .Ltmp22-.Ltmp21                #   Call between .Ltmp21 and .Ltmp22
	.uleb128 .Ltmp23-.Lfunc_begin0          #     jumps to .Ltmp23
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp22-.Lfunc_begin0          # >> Call Site 11 <<
	.uleb128 .Ltmp24-.Ltmp22                #   Call between .Ltmp22 and .Ltmp24
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp24-.Lfunc_begin0          # >> Call Site 12 <<
	.uleb128 .Ltmp59-.Ltmp24                #   Call between .Ltmp24 and .Ltmp59
	.uleb128 .Ltmp60-.Lfunc_begin0          #     jumps to .Ltmp60
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp61-.Lfunc_begin0          # >> Call Site 13 <<
	.uleb128 .Ltmp118-.Ltmp61               #   Call between .Ltmp61 and .Ltmp118
	.uleb128 .Ltmp119-.Lfunc_begin0         #     jumps to .Ltmp119
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp120-.Lfunc_begin0         # >> Call Site 14 <<
	.uleb128 .Ltmp121-.Ltmp120              #   Call between .Ltmp120 and .Ltmp121
	.uleb128 .Ltmp122-.Lfunc_begin0         #     jumps to .Ltmp122
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp123-.Lfunc_begin0         # >> Call Site 15 <<
	.uleb128 .Ltmp124-.Ltmp123              #   Call between .Ltmp123 and .Ltmp124
	.uleb128 .Ltmp125-.Lfunc_begin0         #     jumps to .Ltmp125
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp126-.Lfunc_begin0         # >> Call Site 16 <<
	.uleb128 .Ltmp127-.Ltmp126              #   Call between .Ltmp126 and .Ltmp127
	.uleb128 .Ltmp128-.Lfunc_begin0         #     jumps to .Ltmp128
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp132-.Lfunc_begin0         # >> Call Site 17 <<
	.uleb128 .Ltmp133-.Ltmp132              #   Call between .Ltmp132 and .Ltmp133
	.uleb128 .Ltmp134-.Lfunc_begin0         #     jumps to .Ltmp134
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp129-.Lfunc_begin0         # >> Call Site 18 <<
	.uleb128 .Ltmp130-.Ltmp129              #   Call between .Ltmp129 and .Ltmp130
	.uleb128 .Ltmp131-.Lfunc_begin0         #     jumps to .Ltmp131
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp130-.Lfunc_begin0         # >> Call Site 19 <<
	.uleb128 .Ltmp135-.Ltmp130              #   Call between .Ltmp130 and .Ltmp135
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp135-.Lfunc_begin0         # >> Call Site 20 <<
	.uleb128 .Ltmp146-.Ltmp135              #   Call between .Ltmp135 and .Ltmp146
	.uleb128 .Ltmp147-.Lfunc_begin0         #     jumps to .Ltmp147
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp148-.Lfunc_begin0         # >> Call Site 21 <<
	.uleb128 .Ltmp159-.Ltmp148              #   Call between .Ltmp148 and .Ltmp159
	.uleb128 .Ltmp160-.Lfunc_begin0         #     jumps to .Ltmp160
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp161-.Lfunc_begin0         # >> Call Site 22 <<
	.uleb128 .Ltmp170-.Ltmp161              #   Call between .Ltmp161 and .Ltmp170
	.uleb128 .Ltmp171-.Lfunc_begin0         #     jumps to .Ltmp171
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp172-.Lfunc_begin0         # >> Call Site 23 <<
	.uleb128 .Ltmp173-.Ltmp172              #   Call between .Ltmp172 and .Ltmp173
	.uleb128 .Ltmp174-.Lfunc_begin0         #     jumps to .Ltmp174
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp175-.Lfunc_begin0         # >> Call Site 24 <<
	.uleb128 .Ltmp176-.Ltmp175              #   Call between .Ltmp175 and .Ltmp176
	.uleb128 .Ltmp177-.Lfunc_begin0         #     jumps to .Ltmp177
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp176-.Lfunc_begin0         # >> Call Site 25 <<
	.uleb128 .Ltmp178-.Ltmp176              #   Call between .Ltmp176 and .Ltmp178
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp178-.Lfunc_begin0         # >> Call Site 26 <<
	.uleb128 .Ltmp191-.Ltmp178              #   Call between .Ltmp178 and .Ltmp191
	.uleb128 .Ltmp192-.Lfunc_begin0         #     jumps to .Ltmp192
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp193-.Lfunc_begin0         # >> Call Site 27 <<
	.uleb128 .Ltmp220-.Ltmp193              #   Call between .Ltmp193 and .Ltmp220
	.uleb128 .Ltmp221-.Lfunc_begin0         #     jumps to .Ltmp221
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp220-.Lfunc_begin0         # >> Call Site 28 <<
	.uleb128 .Lfunc_end12-.Ltmp220          #   Call between .Ltmp220 and .Lfunc_end12
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZNSt6vectorIiSaIiEEC2EmRKiRKS0_,"axG",@progbits,_ZNSt6vectorIiSaIiEEC2EmRKiRKS0_,comdat
	.weak	_ZNSt6vectorIiSaIiEEC2EmRKiRKS0_ # -- Begin function _ZNSt6vectorIiSaIiEEC2EmRKiRKS0_
	.p2align	1, 0x90
	.type	_ZNSt6vectorIiSaIiEEC2EmRKiRKS0_,@function
_ZNSt6vectorIiSaIiEEC2EmRKiRKS0_:       # @_ZNSt6vectorIiSaIiEEC2EmRKiRKS0_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rsi, %rax
	shrq	$61, %rax
	jne	.LBB13_6
# %bb.1:                                # %_ZNSt6vectorIiSaIiEE17_S_check_init_lenEmRKS0_.exit
	movq	%rsi, %r14
	movq	%rdi, %rbx
	xorps	%xmm0, %xmm0
	movups	%xmm0, (%rdi)
	movq	$0, 16(%rdi)
	testq	%rsi, %rsi
	je	.LBB13_2
# %bb.3:
	movq	%rdx, %r15
	xorl	%r12d, %r12d
	movq	%rbx, %rdi
	movq	%r14, %rsi
	xorl	%edx, %edx
	callq	_ZNSt15__new_allocatorIiE8allocateEmPKv
	movq	%rax, (%rbx)
	leaq	(%rax,%r14,4), %rcx
	movq	%rcx, 16(%rbx)
	movl	(%r15), %edx
	shlq	$2, %r14
.LBB13_4:                               # %.lr.ph.i.i.i.i.i.i.i.i
                                        # =>This Inner Loop Header: Depth=1
	movl	%edx, (%rax,%r12)
	addq	$4, %r12
	cmpq	%r12, %r14
	jne	.LBB13_4
	jmp	.LBB13_5
.LBB13_2:                               # %_ZNSt12_Vector_baseIiSaIiEEC2EmRKS0_.exit.thread
	movups	%xmm0, (%rbx)
	movq	$0, 16(%rbx)
	xorl	%ecx, %ecx
.LBB13_5:                               # %.loopexit
	movq	%rcx, 8(%rbx)
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB13_6:
	.cfi_def_cfa_offset 48
	movl	$.L.str.24, %edi
	callq	_ZSt20__throw_length_errorPKc
.Lfunc_end13:
	.size	_ZNSt6vectorIiSaIiEEC2EmRKiRKS0_, .Lfunc_end13-_ZNSt6vectorIiSaIiEEC2EmRKiRKS0_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt6vectorIdSaIdEEC2EmRKdRKS0_,"axG",@progbits,_ZNSt6vectorIdSaIdEEC2EmRKdRKS0_,comdat
	.weak	_ZNSt6vectorIdSaIdEEC2EmRKdRKS0_ # -- Begin function _ZNSt6vectorIdSaIdEEC2EmRKdRKS0_
	.p2align	1, 0x90
	.type	_ZNSt6vectorIdSaIdEEC2EmRKdRKS0_,@function
_ZNSt6vectorIdSaIdEEC2EmRKdRKS0_:       # @_ZNSt6vectorIdSaIdEEC2EmRKdRKS0_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rsi, %rax
	shrq	$60, %rax
	jne	.LBB14_6
# %bb.1:                                # %_ZNSt6vectorIdSaIdEE17_S_check_init_lenEmRKS0_.exit
	movq	%rsi, %r14
	movq	%rdi, %rbx
	xorps	%xmm0, %xmm0
	movups	%xmm0, (%rdi)
	movq	$0, 16(%rdi)
	testq	%rsi, %rsi
	je	.LBB14_2
# %bb.3:
	movq	%rdx, %r15
	xorl	%r12d, %r12d
	movq	%rbx, %rdi
	movq	%r14, %rsi
	xorl	%edx, %edx
	callq	_ZNSt15__new_allocatorIdE8allocateEmPKv
	movq	%rax, (%rbx)
	leaq	(%rax,%r14,8), %rcx
	movq	%rcx, 16(%rbx)
	movsd	(%r15), %xmm0                   # xmm0 = mem[0],zero
	shlq	$3, %r14
.LBB14_4:                               # %.lr.ph.i.i.i.i.i.i.i.i
                                        # =>This Inner Loop Header: Depth=1
	movsd	%xmm0, (%rax,%r12)
	addq	$8, %r12
	cmpq	%r12, %r14
	jne	.LBB14_4
	jmp	.LBB14_5
.LBB14_2:                               # %_ZNSt12_Vector_baseIdSaIdEEC2EmRKS0_.exit.thread
	movups	%xmm0, (%rbx)
	movq	$0, 16(%rbx)
	xorl	%ecx, %ecx
.LBB14_5:                               # %.loopexit
	movq	%rcx, 8(%rbx)
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB14_6:
	.cfi_def_cfa_offset 48
	movl	$.L.str.24, %edi
	callq	_ZSt20__throw_length_errorPKc
.Lfunc_end14:
	.size	_ZNSt6vectorIdSaIdEEC2EmRKdRKS0_, .Lfunc_end14-_ZNSt6vectorIdSaIdEEC2EmRKdRKS0_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE19_M_replace_dispatchISt19istreambuf_iteratorIcS2_EEERS4_N9__gnu_cxx17__normal_iteratorIPKcS4_EESD_T_SE_St12__false_type,"axG",@progbits,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE19_M_replace_dispatchISt19istreambuf_iteratorIcS2_EEERS4_N9__gnu_cxx17__normal_iteratorIPKcS4_EESD_T_SE_St12__false_type,comdat
	.weak	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE19_M_replace_dispatchISt19istreambuf_iteratorIcS2_EEERS4_N9__gnu_cxx17__normal_iteratorIPKcS4_EESD_T_SE_St12__false_type # -- Begin function _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE19_M_replace_dispatchISt19istreambuf_iteratorIcS2_EEERS4_N9__gnu_cxx17__normal_iteratorIPKcS4_EESD_T_SE_St12__false_type
	.p2align	1, 0x90
	.type	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE19_M_replace_dispatchISt19istreambuf_iteratorIcS2_EEERS4_N9__gnu_cxx17__normal_iteratorIPKcS4_EESD_T_SE_St12__false_type,@function
_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE19_M_replace_dispatchISt19istreambuf_iteratorIcS2_EEERS4_N9__gnu_cxx17__normal_iteratorIPKcS4_EESD_T_SE_St12__false_type: # @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE19_M_replace_dispatchISt19istreambuf_iteratorIcS2_EEERS4_N9__gnu_cxx17__normal_iteratorIPKcS4_EESD_T_SE_St12__false_type
.Lfunc_begin1:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception1
# %bb.0:                                # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2ISt19istreambuf_iteratorIcS2_EvEET_S8_RKS3_.exit
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	%r8d, %r9d
	movq	%rdx, %rbx
	movq	%rsi, %r14
	movq	%rdi, %r15
	movq	80(%rsp), %rax
	movl	88(%rsp), %r8d
	leaq	16(%rsp), %r13
	movq	%r13, -16(%r13)
	movq	$0, -8(%r13)
	movq	%rsp, %r12
	movq	%r12, %rdi
	movq	%rcx, %rsi
	movl	%r9d, %edx
	movq	%rax, %rcx
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructISt19istreambuf_iteratorIcS2_EEEvT_S8_St18input_iterator_tag
	subq	%r14, %rbx
	subq	(%r15), %r14
	movq	(%r12), %rcx
	movq	8(%r12), %r8
.Ltmp222:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movq	%rbx, %rdx
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_replaceEmmPKcm
.Ltmp223:
# %bb.1:
	movq	%rax, %rbx
	movq	(%rsp), %rdi
	cmpq	%r13, %rdi
	je	.LBB15_3
# %bb.2:                                # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i
	callq	_ZdlPv
.LBB15_3:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit
	movq	%rbx, %rax
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB15_4:
	.cfi_def_cfa_offset 80
.Ltmp224:
	movq	%rax, %rbx
	movq	(%rsp), %rdi
	cmpq	%r13, %rdi
	je	.LBB15_6
# %bb.5:                                # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i10
	callq	_ZdlPv
.LBB15_6:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit12
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end15:
	.size	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE19_M_replace_dispatchISt19istreambuf_iteratorIcS2_EEERS4_N9__gnu_cxx17__normal_iteratorIPKcS4_EESD_T_SE_St12__false_type, .Lfunc_end15-_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE19_M_replace_dispatchISt19istreambuf_iteratorIcS2_EEERS4_N9__gnu_cxx17__normal_iteratorIPKcS4_EESD_T_SE_St12__false_type
	.cfi_endproc
	.section	.gcc_except_table._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE19_M_replace_dispatchISt19istreambuf_iteratorIcS2_EEERS4_N9__gnu_cxx17__normal_iteratorIPKcS4_EESD_T_SE_St12__false_type,"aG",@progbits,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE19_M_replace_dispatchISt19istreambuf_iteratorIcS2_EEERS4_N9__gnu_cxx17__normal_iteratorIPKcS4_EESD_T_SE_St12__false_type,comdat
	.p2align	2, 0x0
GCC_except_table15:
.Lexception1:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end1-.Lcst_begin1
.Lcst_begin1:
	.uleb128 .Lfunc_begin1-.Lfunc_begin1    # >> Call Site 1 <<
	.uleb128 .Ltmp222-.Lfunc_begin1         #   Call between .Lfunc_begin1 and .Ltmp222
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp222-.Lfunc_begin1         # >> Call Site 2 <<
	.uleb128 .Ltmp223-.Ltmp222              #   Call between .Ltmp222 and .Ltmp223
	.uleb128 .Ltmp224-.Lfunc_begin1         #     jumps to .Ltmp224
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp223-.Lfunc_begin1         # >> Call Site 3 <<
	.uleb128 .Lfunc_end15-.Ltmp223          #   Call between .Ltmp223 and .Lfunc_end15
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end1:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructISt19istreambuf_iteratorIcS2_EEEvT_S8_St18input_iterator_tag,"axG",@progbits,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructISt19istreambuf_iteratorIcS2_EEEvT_S8_St18input_iterator_tag,comdat
	.weak	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructISt19istreambuf_iteratorIcS2_EEEvT_S8_St18input_iterator_tag # -- Begin function _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructISt19istreambuf_iteratorIcS2_EEEvT_S8_St18input_iterator_tag
	.p2align	1, 0x90
	.type	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructISt19istreambuf_iteratorIcS2_EEEvT_S8_St18input_iterator_tag,@function
_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructISt19istreambuf_iteratorIcS2_EEEvT_S8_St18input_iterator_tag: # @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructISt19istreambuf_iteratorIcS2_EEEvT_S8_St18input_iterator_tag
.Lfunc_begin2:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception2
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r8d, %ebx
	movq	%rcx, %r15
	movl	%edx, %r13d
	movq	%rsi, %r12
	movq	$15, 8(%rsp)
	movq	%rdi, (%rsp)                    # 8-byte Spill
	leaq	16(%rdi), %rax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	xorl	%r14d, %r14d
.LBB16_1:                               # %_ZNSt19istreambuf_iteratorIcSt11char_traitsIcEEppEv.exit
                                        # =>This Inner Loop Header: Depth=1
	testq	%r12, %r12
	je	.LBB16_2
# %bb.3:                                # %_ZNSt19istreambuf_iteratorIcSt11char_traitsIcEEppEv.exit
                                        #   in Loop: Header=BB16_1 Depth=1
	cmpl	$-1, %r13d
	jne	.LBB16_2
# %bb.4:                                #   in Loop: Header=BB16_1 Depth=1
	movq	16(%r12), %rax
	cmpq	24(%r12), %rax
	jae	.LBB16_6
# %bb.5:                                # %_ZNSt15basic_streambufIcSt11char_traitsIcEE5sgetcEv.exit.thread.i28
                                        #   in Loop: Header=BB16_1 Depth=1
	movzbl	(%rax), %ebp
	jmp	.LBB16_8
.LBB16_2:                               #   in Loop: Header=BB16_1 Depth=1
	movl	%r13d, %ebp
.LBB16_8:                               # %_ZNKSt19istreambuf_iteratorIcSt11char_traitsIcEE6_M_getEv.exit29
                                        #   in Loop: Header=BB16_1 Depth=1
	testq	%r15, %r15
	je	.LBB16_9
# %bb.10:                               # %_ZNKSt19istreambuf_iteratorIcSt11char_traitsIcEE6_M_getEv.exit29
                                        #   in Loop: Header=BB16_1 Depth=1
	cmpl	$-1, %ebx
	jne	.LBB16_9
# %bb.11:                               #   in Loop: Header=BB16_1 Depth=1
	movq	16(%r15), %rax
	cmpq	24(%r15), %rax
	jae	.LBB16_13
# %bb.12:                               # %_ZNSt15basic_streambufIcSt11char_traitsIcEE5sgetcEv.exit.thread.i
                                        #   in Loop: Header=BB16_1 Depth=1
	movzbl	(%rax), %eax
	jmp	.LBB16_15
.LBB16_9:                               #   in Loop: Header=BB16_1 Depth=1
	movl	%ebx, %eax
.LBB16_15:                              # %_ZNKSt19istreambuf_iteratorIcSt11char_traitsIcEE6_M_getEv.exit
                                        #   in Loop: Header=BB16_1 Depth=1
	cmpl	$-1, %ebp
	sete	%cl
	cmpl	$-1, %eax
	sete	%al
	cmpb	%al, %cl
	je	.LBB16_27
# %bb.16:                               # %_ZNKSt19istreambuf_iteratorIcSt11char_traitsIcEE6_M_getEv.exit
                                        #   in Loop: Header=BB16_1 Depth=1
	cmpq	$15, %r14
	jae	.LBB16_27
# %bb.17:                               #   in Loop: Header=BB16_1 Depth=1
	testq	%r12, %r12
	je	.LBB16_23
# %bb.18:                               #   in Loop: Header=BB16_1 Depth=1
	cmpl	$-1, %r13d
	jne	.LBB16_23
# %bb.19:                               #   in Loop: Header=BB16_1 Depth=1
	movq	16(%r12), %rax
	cmpq	24(%r12), %rax
	jae	.LBB16_21
# %bb.20:                               # %_ZNSt15basic_streambufIcSt11char_traitsIcEE5sgetcEv.exit.thread.i34
                                        #   in Loop: Header=BB16_1 Depth=1
	movzbl	(%rax), %r13d
.LBB16_23:                              # %_ZNKSt19istreambuf_iteratorIcSt11char_traitsIcEE6_M_getEv.exit35
                                        #   in Loop: Header=BB16_1 Depth=1
	movq	(%rsp), %rax                    # 8-byte Reload
	movb	%r13b, 16(%rax,%r14)
	movq	16(%r12), %rax
	cmpq	24(%r12), %rax
	jae	.LBB16_26
# %bb.24:                               #   in Loop: Header=BB16_1 Depth=1
	incq	%rax
	movq	%rax, 16(%r12)
.LBB16_25:                              # %_ZNSt19istreambuf_iteratorIcSt11char_traitsIcEEppEv.exit.backedge
                                        #   in Loop: Header=BB16_1 Depth=1
	incq	%r14
	movl	$-1, %r13d
	jmp	.LBB16_1
.LBB16_26:                              #   in Loop: Header=BB16_1 Depth=1
	movq	(%r12), %rax
	movq	%r12, %rdi
	callq	*80(%rax)
	jmp	.LBB16_25
.LBB16_6:                               # %_ZNSt15basic_streambufIcSt11char_traitsIcEE5sgetcEv.exit.i27
                                        #   in Loop: Header=BB16_1 Depth=1
	movq	(%r12), %rax
	movq	%r12, %rdi
	callq	*72(%rax)
	movl	%eax, %ebp
	cmpl	$-1, %eax
	jne	.LBB16_8
# %bb.7:                                #   in Loop: Header=BB16_1 Depth=1
	xorl	%r12d, %r12d
	jmp	.LBB16_8
.LBB16_13:                              # %_ZNSt15basic_streambufIcSt11char_traitsIcEE5sgetcEv.exit.i
                                        #   in Loop: Header=BB16_1 Depth=1
	movq	(%r15), %rax
	movq	%r15, %rdi
	callq	*72(%rax)
	cmpl	$-1, %eax
	jne	.LBB16_15
# %bb.14:                               #   in Loop: Header=BB16_1 Depth=1
	xorl	%r15d, %r15d
	jmp	.LBB16_15
.LBB16_21:                              # %_ZNSt15basic_streambufIcSt11char_traitsIcEE5sgetcEv.exit.i33
                                        #   in Loop: Header=BB16_1 Depth=1
	movq	(%r12), %rax
	movq	%r12, %rdi
	callq	*72(%rax)
	movl	%eax, %r13d
	cmpl	$-1, %eax
	jne	.LBB16_23
# %bb.22:                               #   in Loop: Header=BB16_1 Depth=1
	xorl	%r12d, %r12d
	jmp	.LBB16_23
.LBB16_43:                              #   in Loop: Header=BB16_27 Depth=1
	cmpq	8(%rsp), %r14
	jne	.LBB16_44
# %bb.45:                               #   in Loop: Header=BB16_27 Depth=1
	leaq	1(%r14), %rax
	leaq	8(%rsp), %rsi
	movq	%rax, (%rsi)
.Ltmp229:
	movq	(%rsp), %rdi                    # 8-byte Reload
	movq	%r14, %rdx
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_createERmm
.Ltmp230:
# %bb.46:                               #   in Loop: Header=BB16_27 Depth=1
	movq	%rax, %rbp
	testq	%r14, %r14
	je	.LBB16_50
# %bb.47:                               #   in Loop: Header=BB16_27 Depth=1
	movq	(%rsp), %rax                    # 8-byte Reload
	movq	(%rax), %rsi
	cmpq	$1, %r14
	jne	.LBB16_49
# %bb.48:                               #   in Loop: Header=BB16_27 Depth=1
	movb	(%rsi), %al
	movb	%al, (%rbp)
	jmp	.LBB16_50
.LBB16_44:                              # %._crit_edge
                                        #   in Loop: Header=BB16_27 Depth=1
	movq	(%rsp), %rax                    # 8-byte Reload
	movq	(%rax), %rbp
	jmp	.LBB16_53
.LBB16_49:                              #   in Loop: Header=BB16_27 Depth=1
	movq	%rbp, %rdi
	movq	%r14, %rdx
	callq	memcpy@PLT
.LBB16_50:                              # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE7_S_copyEPcPKcm.exit
                                        #   in Loop: Header=BB16_27 Depth=1
	movq	(%rsp), %rax                    # 8-byte Reload
	movq	(%rax), %rdi
	cmpq	16(%rsp), %rdi                  # 8-byte Folded Reload
	je	.LBB16_52
# %bb.51:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i
                                        #   in Loop: Header=BB16_27 Depth=1
	callq	_ZdlPv
.LBB16_52:                              # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv.exit
                                        #   in Loop: Header=BB16_27 Depth=1
	movq	(%rsp), %rcx                    # 8-byte Reload
	movq	%rbp, (%rcx)
	movq	8(%rsp), %rax
	movq	%rax, 16(%rcx)
.LBB16_53:                              #   in Loop: Header=BB16_27 Depth=1
	testq	%r12, %r12
	je	.LBB16_60
# %bb.54:                               #   in Loop: Header=BB16_27 Depth=1
	cmpl	$-1, %r13d
	jne	.LBB16_60
# %bb.55:                               #   in Loop: Header=BB16_27 Depth=1
	movq	16(%r12), %rax
	cmpq	24(%r12), %rax
	jae	.LBB16_57
# %bb.56:                               # %_ZNSt15basic_streambufIcSt11char_traitsIcEE5sgetcEv.exit.thread.i54
                                        #   in Loop: Header=BB16_27 Depth=1
	movzbl	(%rax), %r13d
.LBB16_60:                              #   in Loop: Header=BB16_27 Depth=1
	movb	%r13b, (%rbp,%r14)
	movq	16(%r12), %rax
	cmpq	24(%r12), %rax
	jae	.LBB16_62
# %bb.61:                               #   in Loop: Header=BB16_27 Depth=1
	incq	%rax
	movq	%rax, 16(%r12)
.LBB16_63:                              # %_ZNSt19istreambuf_iteratorIcSt11char_traitsIcEEppEv.exit18.backedge
                                        #   in Loop: Header=BB16_27 Depth=1
	incq	%r14
	movl	$-1, %r13d
	jmp	.LBB16_27
.LBB16_62:                              #   in Loop: Header=BB16_27 Depth=1
	movq	(%r12), %rax
.Ltmp235:
	movq	%r12, %rdi
	callq	*80(%rax)
.Ltmp236:
	jmp	.LBB16_63
.LBB16_32:                              # %_ZNSt15basic_streambufIcSt11char_traitsIcEE5sgetcEv.exit.i46
                                        #   in Loop: Header=BB16_27 Depth=1
	movq	(%r12), %rax
.Ltmp225:
	movq	%r12, %rdi
	callq	*72(%rax)
.Ltmp226:
# %bb.33:                               # %.noexc48
                                        #   in Loop: Header=BB16_27 Depth=1
	movl	%eax, %ebp
	cmpl	$-1, %eax
	jne	.LBB16_35
# %bb.34:                               #   in Loop: Header=BB16_27 Depth=1
	xorl	%r12d, %r12d
	jmp	.LBB16_35
.LBB16_38:                              # %_ZNSt15basic_streambufIcSt11char_traitsIcEE5sgetcEv.exit.i39
                                        #   in Loop: Header=BB16_27 Depth=1
	movq	(%r15), %rax
.Ltmp227:
	movq	%r15, %rdi
	callq	*72(%rax)
.Ltmp228:
# %bb.39:                               # %.noexc41
                                        #   in Loop: Header=BB16_27 Depth=1
	cmpl	$-1, %eax
	jne	.LBB16_65
# %bb.40:                               #   in Loop: Header=BB16_27 Depth=1
	cmpl	$-1, %ebp
	je	.LBB16_66
# %bb.41:                               #   in Loop: Header=BB16_27 Depth=1
	xorl	%r15d, %r15d
	jmp	.LBB16_43
.LBB16_57:                              # %_ZNSt15basic_streambufIcSt11char_traitsIcEE5sgetcEv.exit.i53
                                        #   in Loop: Header=BB16_27 Depth=1
	movq	(%r12), %rax
.Ltmp232:
	movq	%r12, %rdi
	callq	*72(%rax)
.Ltmp233:
# %bb.58:                               # %.noexc55
                                        #   in Loop: Header=BB16_27 Depth=1
	movl	%eax, %r13d
	cmpl	$-1, %eax
	jne	.LBB16_60
# %bb.59:                               #   in Loop: Header=BB16_27 Depth=1
	xorl	%r12d, %r12d
	jmp	.LBB16_60
.LBB16_27:                              # %_ZNSt19istreambuf_iteratorIcSt11char_traitsIcEEppEv.exit18
                                        # =>This Inner Loop Header: Depth=1
	testq	%r12, %r12
	je	.LBB16_28
# %bb.29:                               # %_ZNSt19istreambuf_iteratorIcSt11char_traitsIcEEppEv.exit18
                                        #   in Loop: Header=BB16_27 Depth=1
	cmpl	$-1, %r13d
	jne	.LBB16_28
# %bb.30:                               #   in Loop: Header=BB16_27 Depth=1
	movq	16(%r12), %rax
	cmpq	24(%r12), %rax
	jae	.LBB16_32
# %bb.31:                               # %_ZNSt15basic_streambufIcSt11char_traitsIcEE5sgetcEv.exit.thread.i47
                                        #   in Loop: Header=BB16_27 Depth=1
	movzbl	(%rax), %ebp
	jmp	.LBB16_35
.LBB16_28:                              #   in Loop: Header=BB16_27 Depth=1
	movl	%r13d, %ebp
.LBB16_35:                              # %.noexc
                                        #   in Loop: Header=BB16_27 Depth=1
	testq	%r15, %r15
	je	.LBB16_42
# %bb.36:                               # %.noexc
                                        #   in Loop: Header=BB16_27 Depth=1
	cmpl	$-1, %ebx
	jne	.LBB16_42
# %bb.37:                               #   in Loop: Header=BB16_27 Depth=1
	movq	16(%r15), %rax
	cmpq	24(%r15), %rax
	jae	.LBB16_38
.LBB16_65:                              # %.thr_comm
                                        #   in Loop: Header=BB16_27 Depth=1
	cmpl	$-1, %ebp
	je	.LBB16_43
	jmp	.LBB16_66
.LBB16_42:                              #   in Loop: Header=BB16_27 Depth=1
	cmpl	$-1, %ebp
	sete	%al
	cmpl	$-1, %ebx
	sete	%cl
	cmpb	%al, %cl
	jne	.LBB16_43
.LBB16_66:                              # %_ZZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructISt19istreambuf_iteratorIcS2_EEEvT_S8_St18input_iterator_tagEN6_GuardD2Ev.exit
	movq	(%rsp), %rax                    # 8-byte Reload
	movq	%r14, 8(%rax)
	movq	(%rax), %rax
	movb	$0, (%rax,%r14)
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB16_64:
	.cfi_def_cfa_offset 80
.Ltmp234:
	jmp	.LBB16_68
.LBB16_67:
.Ltmp237:
	jmp	.LBB16_68
.LBB16_71:
.Ltmp231:
.LBB16_68:
	movq	%rax, %r14
	movq	(%rsp), %rax                    # 8-byte Reload
	movq	(%rax), %rdi
	cmpq	16(%rsp), %rdi                  # 8-byte Folded Reload
	je	.LBB16_70
# %bb.69:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i20
	callq	_ZdlPv
.LBB16_70:                              # %_ZZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructISt19istreambuf_iteratorIcS2_EEEvT_S8_St18input_iterator_tagEN6_GuardD2Ev.exit22
	movq	%r14, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end16:
	.size	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructISt19istreambuf_iteratorIcS2_EEEvT_S8_St18input_iterator_tag, .Lfunc_end16-_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructISt19istreambuf_iteratorIcS2_EEEvT_S8_St18input_iterator_tag
	.cfi_endproc
	.section	.gcc_except_table._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructISt19istreambuf_iteratorIcS2_EEEvT_S8_St18input_iterator_tag,"aG",@progbits,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructISt19istreambuf_iteratorIcS2_EEEvT_S8_St18input_iterator_tag,comdat
	.p2align	2, 0x0
GCC_except_table16:
.Lexception2:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end2-.Lcst_begin2
.Lcst_begin2:
	.uleb128 .Lfunc_begin2-.Lfunc_begin2    # >> Call Site 1 <<
	.uleb128 .Ltmp229-.Lfunc_begin2         #   Call between .Lfunc_begin2 and .Ltmp229
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp229-.Lfunc_begin2         # >> Call Site 2 <<
	.uleb128 .Ltmp230-.Ltmp229              #   Call between .Ltmp229 and .Ltmp230
	.uleb128 .Ltmp231-.Lfunc_begin2         #     jumps to .Ltmp231
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp230-.Lfunc_begin2         # >> Call Site 3 <<
	.uleb128 .Ltmp235-.Ltmp230              #   Call between .Ltmp230 and .Ltmp235
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp235-.Lfunc_begin2         # >> Call Site 4 <<
	.uleb128 .Ltmp228-.Ltmp235              #   Call between .Ltmp235 and .Ltmp228
	.uleb128 .Ltmp237-.Lfunc_begin2         #     jumps to .Ltmp237
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp232-.Lfunc_begin2         # >> Call Site 5 <<
	.uleb128 .Ltmp233-.Ltmp232              #   Call between .Ltmp232 and .Ltmp233
	.uleb128 .Ltmp234-.Lfunc_begin2         #     jumps to .Ltmp234
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp233-.Lfunc_begin2         # >> Call Site 6 <<
	.uleb128 .Lfunc_end16-.Ltmp233          #   Call between .Ltmp233 and .Lfunc_end16
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end2:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZNSt6vectorIPcSaIS0_EE17_M_realloc_insertIJRKS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_,"axG",@progbits,_ZNSt6vectorIPcSaIS0_EE17_M_realloc_insertIJRKS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_,comdat
	.weak	_ZNSt6vectorIPcSaIS0_EE17_M_realloc_insertIJRKS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_ # -- Begin function _ZNSt6vectorIPcSaIS0_EE17_M_realloc_insertIJRKS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
	.p2align	1, 0x90
	.type	_ZNSt6vectorIPcSaIS0_EE17_M_realloc_insertIJRKS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_,@function
_ZNSt6vectorIPcSaIS0_EE17_M_realloc_insertIJRKS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_: # @_ZNSt6vectorIPcSaIS0_EE17_M_realloc_insertIJRKS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, (%rsp)                    # 8-byte Spill
	movq	%rsi, %r12
	movq	%rdi, %rbx
	movl	$1, %esi
	movl	$.L.str.23, %edx
	callq	_ZNKSt6vectorIPcSaIS0_EE12_M_check_lenEmPKc
	movq	(%rbx), %r13
	movq	8(%rbx), %r15
	movq	%r12, 8(%rsp)                   # 8-byte Spill
	subq	%r13, %r12
	movq	%r12, %r14
	sarq	$3, %r14
	testq	%rax, %rax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	je	.LBB17_1
# %bb.2:
	movq	%rbx, %rdi
	movq	%rax, %rsi
	xorl	%edx, %edx
	callq	_ZNSt15__new_allocatorIPcE8allocateEmPKv
	movq	%rax, %rbp
	jmp	.LBB17_3
.LBB17_1:
	xorl	%ebp, %ebp
.LBB17_3:                               # %_ZNSt12_Vector_baseIPcSaIS0_EE11_M_allocateEm.exit
	movq	(%rsp), %rax                    # 8-byte Reload
	movq	(%rax), %rax
	movq	%rax, (%rbp,%r14,8)
	testq	%r12, %r12
	jle	.LBB17_5
# %bb.4:
	movq	%rbp, %rdi
	movq	%r13, %rsi
	movq	%r12, %rdx
	callq	memmove@PLT
.LBB17_5:                               # %_ZNSt6vectorIPcSaIS0_EE11_S_relocateEPS0_S3_S3_RS1_.exit
	addq	%rbp, %r12
	addq	$8, %r12
	movq	8(%rsp), %rsi                   # 8-byte Reload
	subq	%rsi, %r15
	testq	%r15, %r15
	jle	.LBB17_7
# %bb.6:
	movq	%r12, %rdi
	movq	%r15, %rdx
	callq	memmove@PLT
.LBB17_7:                               # %_ZNSt6vectorIPcSaIS0_EE11_S_relocateEPS0_S3_S3_RS1_.exit16
	testq	%r13, %r13
	je	.LBB17_9
# %bb.8:
	movq	%r13, %rdi
	callq	_ZdlPv
.LBB17_9:                               # %_ZNSt12_Vector_baseIPcSaIS0_EE13_M_deallocateEPS0_m.exit
	addq	%r15, %r12
	movq	%rbp, (%rbx)
	movq	%r12, 8(%rbx)
	movq	16(%rsp), %rax                  # 8-byte Reload
	leaq	(,%rax,8), %rax
	addq	%rbp, %rax
	movq	%rax, 16(%rbx)
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end17:
	.size	_ZNSt6vectorIPcSaIS0_EE17_M_realloc_insertIJRKS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_, .Lfunc_end17-_ZNSt6vectorIPcSaIS0_EE17_M_realloc_insertIJRKS0_EEEvN9__gnu_cxx17__normal_iteratorIPS0_S2_EEDpOT_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNKSt6vectorIPcSaIS0_EE12_M_check_lenEmPKc,"axG",@progbits,_ZNKSt6vectorIPcSaIS0_EE12_M_check_lenEmPKc,comdat
	.weak	_ZNKSt6vectorIPcSaIS0_EE12_M_check_lenEmPKc # -- Begin function _ZNKSt6vectorIPcSaIS0_EE12_M_check_lenEmPKc
	.p2align	1, 0x90
	.type	_ZNKSt6vectorIPcSaIS0_EE12_M_check_lenEmPKc,@function
_ZNKSt6vectorIPcSaIS0_EE12_M_check_lenEmPKc: # @_ZNKSt6vectorIPcSaIS0_EE12_M_check_lenEmPKc
	.cfi_startproc
# %bb.0:
	movabsq	$1152921504606846975, %rcx      # imm = 0xFFFFFFFFFFFFFFF
	movq	8(%rdi), %r8
	subq	(%rdi), %r8
	sarq	$3, %r8
	movq	%rcx, %rax
	subq	%r8, %rax
	cmpq	%rsi, %rax
	jb	.LBB18_2
# %bb.1:
	cmpq	%rsi, %r8
	cmovaq	%r8, %rsi
	leaq	(%rsi,%r8), %rax
	cmpq	%rcx, %rax
	cmovaeq	%rcx, %rax
	addq	%r8, %rsi
	cmovbq	%rcx, %rax
	retq
.LBB18_2:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	%rdx, %rdi
	callq	_ZSt20__throw_length_errorPKc
.Lfunc_end18:
	.size	_ZNKSt6vectorIPcSaIS0_EE12_M_check_lenEmPKc, .Lfunc_end18-_ZNKSt6vectorIPcSaIS0_EE12_M_check_lenEmPKc
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt15__new_allocatorIPcE8allocateEmPKv,"axG",@progbits,_ZNSt15__new_allocatorIPcE8allocateEmPKv,comdat
	.weak	_ZNSt15__new_allocatorIPcE8allocateEmPKv # -- Begin function _ZNSt15__new_allocatorIPcE8allocateEmPKv
	.p2align	1, 0x90
	.type	_ZNSt15__new_allocatorIPcE8allocateEmPKv,@function
_ZNSt15__new_allocatorIPcE8allocateEmPKv: # @_ZNSt15__new_allocatorIPcE8allocateEmPKv
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	%rsi, %rax
	shrq	$60, %rax
	jne	.LBB19_1
# %bb.3:
	shlq	$3, %rsi
	movq	%rsi, %rdi
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	_Znwm                           # TAILCALL
.LBB19_1:
	.cfi_def_cfa_offset 16
	shrq	$61, %rsi
	je	.LBB19_2
# %bb.4:
	callq	_ZSt28__throw_bad_array_new_lengthv
.LBB19_2:
	callq	_ZSt17__throw_bad_allocv
.Lfunc_end19:
	.size	_ZNSt15__new_allocatorIPcE8allocateEmPKv, .Lfunc_end19-_ZNSt15__new_allocatorIPcE8allocateEmPKv
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt6vectorIiSaIiEE17_M_realloc_insertIJiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_,"axG",@progbits,_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_,comdat
	.weak	_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_ # -- Begin function _ZNSt6vectorIiSaIiEE17_M_realloc_insertIJiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_
	.p2align	1, 0x90
	.type	_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_,@function
_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_: # @_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, (%rsp)                    # 8-byte Spill
	movq	%rsi, %r12
	movq	%rdi, %rbx
	movl	$1, %esi
	movl	$.L.str.23, %edx
	callq	_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc
	movq	(%rbx), %r13
	movq	8(%rbx), %r15
	movq	%r12, 8(%rsp)                   # 8-byte Spill
	subq	%r13, %r12
	movq	%r12, %r14
	sarq	$2, %r14
	testq	%rax, %rax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	je	.LBB20_1
# %bb.2:
	movq	%rbx, %rdi
	movq	%rax, %rsi
	xorl	%edx, %edx
	callq	_ZNSt15__new_allocatorIiE8allocateEmPKv
	movq	%rax, %rbp
	jmp	.LBB20_3
.LBB20_1:
	xorl	%ebp, %ebp
.LBB20_3:                               # %_ZNSt12_Vector_baseIiSaIiEE11_M_allocateEm.exit
	movq	(%rsp), %rax                    # 8-byte Reload
	movl	(%rax), %eax
	movl	%eax, (%rbp,%r14,4)
	testq	%r12, %r12
	jle	.LBB20_5
# %bb.4:
	movq	%rbp, %rdi
	movq	%r13, %rsi
	movq	%r12, %rdx
	callq	memmove@PLT
.LBB20_5:                               # %_ZNSt6vectorIiSaIiEE11_S_relocateEPiS2_S2_RS0_.exit
	addq	%rbp, %r12
	addq	$4, %r12
	movq	8(%rsp), %rsi                   # 8-byte Reload
	subq	%rsi, %r15
	testq	%r15, %r15
	jle	.LBB20_7
# %bb.6:
	movq	%r12, %rdi
	movq	%r15, %rdx
	callq	memmove@PLT
.LBB20_7:                               # %_ZNSt6vectorIiSaIiEE11_S_relocateEPiS2_S2_RS0_.exit16
	testq	%r13, %r13
	je	.LBB20_9
# %bb.8:
	movq	%r13, %rdi
	callq	_ZdlPv
.LBB20_9:                               # %_ZNSt12_Vector_baseIiSaIiEE13_M_deallocateEPim.exit
	addq	%r15, %r12
	movq	%rbp, (%rbx)
	movq	%r12, 8(%rbx)
	movq	16(%rsp), %rax                  # 8-byte Reload
	leaq	(,%rax,4), %rax
	addq	%rbp, %rax
	movq	%rax, 16(%rbx)
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end20:
	.size	_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_, .Lfunc_end20-_ZNSt6vectorIiSaIiEE17_M_realloc_insertIJiEEEvN9__gnu_cxx17__normal_iteratorIPiS1_EEDpOT_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc,"axG",@progbits,_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc,comdat
	.weak	_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc # -- Begin function _ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc
	.p2align	1, 0x90
	.type	_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc,@function
_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc: # @_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc
	.cfi_startproc
# %bb.0:
	movabsq	$2305843009213693951, %rcx      # imm = 0x1FFFFFFFFFFFFFFF
	movq	8(%rdi), %r8
	subq	(%rdi), %r8
	sarq	$2, %r8
	movq	%rcx, %rax
	subq	%r8, %rax
	cmpq	%rsi, %rax
	jb	.LBB21_2
# %bb.1:
	cmpq	%rsi, %r8
	cmovaq	%r8, %rsi
	leaq	(%rsi,%r8), %rax
	cmpq	%rcx, %rax
	cmovaeq	%rcx, %rax
	addq	%r8, %rsi
	cmovbq	%rcx, %rax
	retq
.LBB21_2:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	%rdx, %rdi
	callq	_ZSt20__throw_length_errorPKc
.Lfunc_end21:
	.size	_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc, .Lfunc_end21-_ZNKSt6vectorIiSaIiEE12_M_check_lenEmPKc
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt15__new_allocatorIiE8allocateEmPKv,"axG",@progbits,_ZNSt15__new_allocatorIiE8allocateEmPKv,comdat
	.weak	_ZNSt15__new_allocatorIiE8allocateEmPKv # -- Begin function _ZNSt15__new_allocatorIiE8allocateEmPKv
	.p2align	1, 0x90
	.type	_ZNSt15__new_allocatorIiE8allocateEmPKv,@function
_ZNSt15__new_allocatorIiE8allocateEmPKv: # @_ZNSt15__new_allocatorIiE8allocateEmPKv
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	%rsi, %rax
	shrq	$61, %rax
	jne	.LBB22_1
# %bb.3:
	shlq	$2, %rsi
	movq	%rsi, %rdi
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	_Znwm                           # TAILCALL
.LBB22_1:
	.cfi_def_cfa_offset 16
	shrq	$62, %rsi
	je	.LBB22_2
# %bb.4:
	callq	_ZSt28__throw_bad_array_new_lengthv
.LBB22_2:
	callq	_ZSt17__throw_bad_allocv
.Lfunc_end22:
	.size	_ZNSt15__new_allocatorIiE8allocateEmPKv, .Lfunc_end22-_ZNSt15__new_allocatorIiE8allocateEmPKv
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt6vectorIdSaIdEE17_M_realloc_insertIJdEEEvN9__gnu_cxx17__normal_iteratorIPdS1_EEDpOT_,"axG",@progbits,_ZNSt6vectorIdSaIdEE17_M_realloc_insertIJdEEEvN9__gnu_cxx17__normal_iteratorIPdS1_EEDpOT_,comdat
	.weak	_ZNSt6vectorIdSaIdEE17_M_realloc_insertIJdEEEvN9__gnu_cxx17__normal_iteratorIPdS1_EEDpOT_ # -- Begin function _ZNSt6vectorIdSaIdEE17_M_realloc_insertIJdEEEvN9__gnu_cxx17__normal_iteratorIPdS1_EEDpOT_
	.p2align	1, 0x90
	.type	_ZNSt6vectorIdSaIdEE17_M_realloc_insertIJdEEEvN9__gnu_cxx17__normal_iteratorIPdS1_EEDpOT_,@function
_ZNSt6vectorIdSaIdEE17_M_realloc_insertIJdEEEvN9__gnu_cxx17__normal_iteratorIPdS1_EEDpOT_: # @_ZNSt6vectorIdSaIdEE17_M_realloc_insertIJdEEEvN9__gnu_cxx17__normal_iteratorIPdS1_EEDpOT_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, (%rsp)                    # 8-byte Spill
	movq	%rsi, %r12
	movq	%rdi, %rbx
	movl	$1, %esi
	movl	$.L.str.23, %edx
	callq	_ZNKSt6vectorIdSaIdEE12_M_check_lenEmPKc
	movq	(%rbx), %r13
	movq	8(%rbx), %r15
	movq	%r12, 8(%rsp)                   # 8-byte Spill
	subq	%r13, %r12
	movq	%r12, %r14
	sarq	$3, %r14
	testq	%rax, %rax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	je	.LBB23_1
# %bb.2:
	movq	%rbx, %rdi
	movq	%rax, %rsi
	xorl	%edx, %edx
	callq	_ZNSt15__new_allocatorIdE8allocateEmPKv
	movq	%rax, %rbp
	jmp	.LBB23_3
.LBB23_1:
	xorl	%ebp, %ebp
.LBB23_3:                               # %_ZNSt12_Vector_baseIdSaIdEE11_M_allocateEm.exit
	movq	(%rsp), %rax                    # 8-byte Reload
	movsd	(%rax), %xmm0                   # xmm0 = mem[0],zero
	movsd	%xmm0, (%rbp,%r14,8)
	testq	%r12, %r12
	jle	.LBB23_5
# %bb.4:
	movq	%rbp, %rdi
	movq	%r13, %rsi
	movq	%r12, %rdx
	callq	memmove@PLT
.LBB23_5:                               # %_ZNSt6vectorIdSaIdEE11_S_relocateEPdS2_S2_RS0_.exit
	addq	%rbp, %r12
	addq	$8, %r12
	movq	8(%rsp), %rsi                   # 8-byte Reload
	subq	%rsi, %r15
	testq	%r15, %r15
	jle	.LBB23_7
# %bb.6:
	movq	%r12, %rdi
	movq	%r15, %rdx
	callq	memmove@PLT
.LBB23_7:                               # %_ZNSt6vectorIdSaIdEE11_S_relocateEPdS2_S2_RS0_.exit16
	testq	%r13, %r13
	je	.LBB23_9
# %bb.8:
	movq	%r13, %rdi
	callq	_ZdlPv
.LBB23_9:                               # %_ZNSt12_Vector_baseIdSaIdEE13_M_deallocateEPdm.exit
	addq	%r15, %r12
	movq	%rbp, (%rbx)
	movq	%r12, 8(%rbx)
	movq	16(%rsp), %rax                  # 8-byte Reload
	leaq	(,%rax,8), %rax
	addq	%rbp, %rax
	movq	%rax, 16(%rbx)
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end23:
	.size	_ZNSt6vectorIdSaIdEE17_M_realloc_insertIJdEEEvN9__gnu_cxx17__normal_iteratorIPdS1_EEDpOT_, .Lfunc_end23-_ZNSt6vectorIdSaIdEE17_M_realloc_insertIJdEEEvN9__gnu_cxx17__normal_iteratorIPdS1_EEDpOT_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNKSt6vectorIdSaIdEE12_M_check_lenEmPKc,"axG",@progbits,_ZNKSt6vectorIdSaIdEE12_M_check_lenEmPKc,comdat
	.weak	_ZNKSt6vectorIdSaIdEE12_M_check_lenEmPKc # -- Begin function _ZNKSt6vectorIdSaIdEE12_M_check_lenEmPKc
	.p2align	1, 0x90
	.type	_ZNKSt6vectorIdSaIdEE12_M_check_lenEmPKc,@function
_ZNKSt6vectorIdSaIdEE12_M_check_lenEmPKc: # @_ZNKSt6vectorIdSaIdEE12_M_check_lenEmPKc
	.cfi_startproc
# %bb.0:
	movabsq	$1152921504606846975, %rcx      # imm = 0xFFFFFFFFFFFFFFF
	movq	8(%rdi), %r8
	subq	(%rdi), %r8
	sarq	$3, %r8
	movq	%rcx, %rax
	subq	%r8, %rax
	cmpq	%rsi, %rax
	jb	.LBB24_2
# %bb.1:
	cmpq	%rsi, %r8
	cmovaq	%r8, %rsi
	leaq	(%rsi,%r8), %rax
	cmpq	%rcx, %rax
	cmovaeq	%rcx, %rax
	addq	%r8, %rsi
	cmovbq	%rcx, %rax
	retq
.LBB24_2:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	%rdx, %rdi
	callq	_ZSt20__throw_length_errorPKc
.Lfunc_end24:
	.size	_ZNKSt6vectorIdSaIdEE12_M_check_lenEmPKc, .Lfunc_end24-_ZNKSt6vectorIdSaIdEE12_M_check_lenEmPKc
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt15__new_allocatorIdE8allocateEmPKv,"axG",@progbits,_ZNSt15__new_allocatorIdE8allocateEmPKv,comdat
	.weak	_ZNSt15__new_allocatorIdE8allocateEmPKv # -- Begin function _ZNSt15__new_allocatorIdE8allocateEmPKv
	.p2align	1, 0x90
	.type	_ZNSt15__new_allocatorIdE8allocateEmPKv,@function
_ZNSt15__new_allocatorIdE8allocateEmPKv: # @_ZNSt15__new_allocatorIdE8allocateEmPKv
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	%rsi, %rax
	shrq	$60, %rax
	jne	.LBB25_1
# %bb.3:
	shlq	$3, %rsi
	movq	%rsi, %rdi
	popq	%rax
	.cfi_def_cfa_offset 8
	jmp	_Znwm                           # TAILCALL
.LBB25_1:
	.cfi_def_cfa_offset 16
	shrq	$61, %rsi
	je	.LBB25_2
# %bb.4:
	callq	_ZSt28__throw_bad_array_new_lengthv
.LBB25_2:
	callq	_ZSt17__throw_bad_allocv
.Lfunc_end25:
	.size	_ZNSt15__new_allocatorIdE8allocateEmPKv, .Lfunc_end25-_ZNSt15__new_allocatorIdE8allocateEmPKv
	.cfi_endproc
                                        # -- End function
	.section	.text._ZSt9__find_ifIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops16_Iter_equals_valIKiEEET_SB_SB_T0_St26random_access_iterator_tag,"axG",@progbits,_ZSt9__find_ifIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops16_Iter_equals_valIKiEEET_SB_SB_T0_St26random_access_iterator_tag,comdat
	.weak	_ZSt9__find_ifIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops16_Iter_equals_valIKiEEET_SB_SB_T0_St26random_access_iterator_tag # -- Begin function _ZSt9__find_ifIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops16_Iter_equals_valIKiEEET_SB_SB_T0_St26random_access_iterator_tag
	.type	_ZSt9__find_ifIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops16_Iter_equals_valIKiEEET_SB_SB_T0_St26random_access_iterator_tag,@function
_ZSt9__find_ifIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops16_Iter_equals_valIKiEEET_SB_SB_T0_St26random_access_iterator_tag: # @_ZSt9__find_ifIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops16_Iter_equals_valIKiEEET_SB_SB_T0_St26random_access_iterator_tag
	.cfi_startproc
# %bb.0:
	movq	%rdi, %rax
	movq	%rsi, %r9
	subq	%rdi, %r9
	movq	%r9, %rdi
	sarq	$4, %rdi
	testq	%rdi, %rdi
	jle	.LBB26_1
# %bb.2:                                # %.lr.ph
	movl	(%rdx), %r8d
	andq	$-16, %r9
	movq	%r9, %rcx
	addq	%rax, %rcx
	incq	%rdi
	addq	$8, %rax
.LBB26_3:                               # =>This Inner Loop Header: Depth=1
	cmpl	%r8d, -8(%rax)
	je	.LBB26_23
# %bb.4:                                #   in Loop: Header=BB26_3 Depth=1
	cmpl	%r8d, -4(%rax)
	je	.LBB26_21
# %bb.5:                                #   in Loop: Header=BB26_3 Depth=1
	cmpl	%r8d, (%rax)
	je	.LBB26_24
# %bb.6:                                #   in Loop: Header=BB26_3 Depth=1
	cmpl	%r8d, 4(%rax)
	je	.LBB26_22
# %bb.7:                                #   in Loop: Header=BB26_3 Depth=1
	decq	%rdi
	addq	$16, %rax
	cmpq	$1, %rdi
	jg	.LBB26_3
# %bb.8:                                # %._crit_edge.loopexit
	movq	%rsi, %r9
	subq	%rcx, %r9
	jmp	.LBB26_9
.LBB26_1:
	movq	%rax, %rcx
.LBB26_9:                               # %._crit_edge
	sarq	$2, %r9
	cmpq	$3, %r9
	je	.LBB26_15
# %bb.10:                               # %._crit_edge
	cmpq	$2, %r9
	je	.LBB26_14
# %bb.11:                               # %._crit_edge
	cmpq	$1, %r9
	jne	.LBB26_12
# %bb.13:                               # %._crit_edge._crit_edge57
	movl	(%rdx), %eax
	jmp	.LBB26_20
.LBB26_23:                              # %.loopexit.loopexit
	addq	$-8, %rax
.LBB26_24:                              # %.loopexit
	retq
.LBB26_21:                              # %.loopexit.loopexit.split.loop.exit
	addq	$-4, %rax
	retq
.LBB26_14:                              # %._crit_edge._crit_edge
	movl	(%rdx), %eax
	jmp	.LBB26_18
.LBB26_15:
	movl	(%rdx), %eax
	cmpl	%eax, (%rcx)
	je	.LBB26_16
# %bb.17:
	addq	$4, %rcx
.LBB26_18:
	cmpl	%eax, (%rcx)
	jne	.LBB26_19
.LBB26_16:
	movq	%rcx, %rax
	retq
.LBB26_22:                              # %.loopexit.loopexit.split.loop.exit64
	addq	$4, %rax
	retq
.LBB26_19:
	addq	$4, %rcx
.LBB26_20:
	cmpl	%eax, (%rcx)
	cmoveq	%rcx, %rsi
.LBB26_12:
	movq	%rsi, %rax
	retq
.Lfunc_end26:
	.size	_ZSt9__find_ifIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops16_Iter_equals_valIKiEEET_SB_SB_T0_St26random_access_iterator_tag, .Lfunc_end26-_ZSt9__find_ifIN9__gnu_cxx17__normal_iteratorIPiSt6vectorIiSaIiEEEENS0_5__ops16_Iter_equals_valIKiEEET_SB_SB_T0_St26random_access_iterator_tag
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB27_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB27_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10printArrayPii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10printArrayPdi, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z20Count_number_of_termPiS_, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z23Kogge_Stone_scan_kernelPiS_iiS_, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z21Create_InvertedIndexAPiS_S_S_S_, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z21Create_InvertedIndexBPiS_PdS_S_S_S0_, %esi
	movl	$.L__unnamed_6, %edx
	movl	$.L__unnamed_6, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z5knnTDPiPdS_S0_S0_S_, %esi
	movl	$.L__unnamed_7, %edx
	movl	$.L__unnamed_7, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z3knnPiPdS0_S0_d, %esi
	movl	$.L__unnamed_8, %edx
	movl	$.L__unnamed_8, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9printlistPiS_S_, %esi
	movl	$.L__unnamed_9, %edx
	movl	$.L__unnamed_9, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10getDocNormPiS_PdS0_i, %esi
	movl	$.L__unnamed_10, %edx
	movl	$.L__unnamed_10, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11oddEvenSortPdPii, %esi
	movl	$.L__unnamed_11, %edx
	movl	$.L__unnamed_11, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8classifyPiPdiS0_S_, %esi
	movl	$.L__unnamed_12, %edx
	movl	$.L__unnamed_12, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end27:
	.size	__hip_module_ctor, .Lfunc_end27-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB28_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB28_2:
	retq
.Lfunc_end28:
	.size	__hip_module_dtor, .Lfunc_end28-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z10printArrayPii,@object       # @_Z10printArrayPii
	.section	.rodata,"a",@progbits
	.globl	_Z10printArrayPii
	.p2align	3, 0x0
_Z10printArrayPii:
	.quad	_Z25__device_stub__printArrayPii
	.size	_Z10printArrayPii, 8

	.type	_Z10printArrayPdi,@object       # @_Z10printArrayPdi
	.globl	_Z10printArrayPdi
	.p2align	3, 0x0
_Z10printArrayPdi:
	.quad	_Z25__device_stub__printArrayPdi
	.size	_Z10printArrayPdi, 8

	.type	_Z20Count_number_of_termPiS_,@object # @_Z20Count_number_of_termPiS_
	.globl	_Z20Count_number_of_termPiS_
	.p2align	3, 0x0
_Z20Count_number_of_termPiS_:
	.quad	_Z35__device_stub__Count_number_of_termPiS_
	.size	_Z20Count_number_of_termPiS_, 8

	.type	_Z23Kogge_Stone_scan_kernelPiS_iiS_,@object # @_Z23Kogge_Stone_scan_kernelPiS_iiS_
	.globl	_Z23Kogge_Stone_scan_kernelPiS_iiS_
	.p2align	3, 0x0
_Z23Kogge_Stone_scan_kernelPiS_iiS_:
	.quad	_Z38__device_stub__Kogge_Stone_scan_kernelPiS_iiS_
	.size	_Z23Kogge_Stone_scan_kernelPiS_iiS_, 8

	.type	_Z21Create_InvertedIndexAPiS_S_S_S_,@object # @_Z21Create_InvertedIndexAPiS_S_S_S_
	.globl	_Z21Create_InvertedIndexAPiS_S_S_S_
	.p2align	3, 0x0
_Z21Create_InvertedIndexAPiS_S_S_S_:
	.quad	_Z36__device_stub__Create_InvertedIndexAPiS_S_S_S_
	.size	_Z21Create_InvertedIndexAPiS_S_S_S_, 8

	.type	_Z21Create_InvertedIndexBPiS_PdS_S_S_S0_,@object # @_Z21Create_InvertedIndexBPiS_PdS_S_S_S0_
	.globl	_Z21Create_InvertedIndexBPiS_PdS_S_S_S0_
	.p2align	3, 0x0
_Z21Create_InvertedIndexBPiS_PdS_S_S_S0_:
	.quad	_Z36__device_stub__Create_InvertedIndexBPiS_PdS_S_S_S0_
	.size	_Z21Create_InvertedIndexBPiS_PdS_S_S_S0_, 8

	.type	_Z5knnTDPiPdS_S0_S0_S_,@object  # @_Z5knnTDPiPdS_S0_S0_S_
	.globl	_Z5knnTDPiPdS_S0_S0_S_
	.p2align	3, 0x0
_Z5knnTDPiPdS_S0_S0_S_:
	.quad	_Z20__device_stub__knnTDPiPdS_S0_S0_S_
	.size	_Z5knnTDPiPdS_S0_S0_S_, 8

	.type	_Z3knnPiPdS0_S0_d,@object       # @_Z3knnPiPdS0_S0_d
	.globl	_Z3knnPiPdS0_S0_d
	.p2align	3, 0x0
_Z3knnPiPdS0_S0_d:
	.quad	_Z18__device_stub__knnPiPdS0_S0_d
	.size	_Z3knnPiPdS0_S0_d, 8

	.type	_Z9printlistPiS_S_,@object      # @_Z9printlistPiS_S_
	.globl	_Z9printlistPiS_S_
	.p2align	3, 0x0
_Z9printlistPiS_S_:
	.quad	_Z24__device_stub__printlistPiS_S_
	.size	_Z9printlistPiS_S_, 8

	.type	_Z10getDocNormPiS_PdS0_i,@object # @_Z10getDocNormPiS_PdS0_i
	.globl	_Z10getDocNormPiS_PdS0_i
	.p2align	3, 0x0
_Z10getDocNormPiS_PdS0_i:
	.quad	_Z25__device_stub__getDocNormPiS_PdS0_i
	.size	_Z10getDocNormPiS_PdS0_i, 8

	.type	_Z11oddEvenSortPdPii,@object    # @_Z11oddEvenSortPdPii
	.globl	_Z11oddEvenSortPdPii
	.p2align	3, 0x0
_Z11oddEvenSortPdPii:
	.quad	_Z26__device_stub__oddEvenSortPdPii
	.size	_Z11oddEvenSortPdPii, 8

	.type	_Z8classifyPiPdiS0_S_,@object   # @_Z8classifyPiPdiS0_S_
	.globl	_Z8classifyPiPdiS0_S_
	.p2align	3, 0x0
_Z8classifyPiPdiS0_S_:
	.quad	_Z23__device_stub__classifyPiPdiS0_S_
	.size	_Z8classifyPiPdiS0_S_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"%d\n"
	.size	.L.str, 4

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"result_norm.txt"
	.size	.L.str.1, 16

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"["
	.size	.L.str.2, 2

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	","
	.size	.L.str.3, 2

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"ArraySize: %d\n"
	.size	.L.str.4, 15

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"A: %d\n"
	.size	.L.str.5, 7

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"blocks = %d\n"
	.size	.L.str.6, 13

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"d:"
	.size	.L.str.8, 3

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"t:"
	.size	.L.str.10, 3

	.type	.L.str.15,@object               # @.str.15
.L.str.15:
	.asciz	" %d"
	.size	.L.str.15, 4

	.type	.L.str.19,@object               # @.str.19
.L.str.19:
	.asciz	"querydoc.txt"
	.size	.L.str.19, 13

	.type	.L.str.20,@object               # @.str.20
.L.str.20:
	.asciz	"\nK Nearest Neighbors (k=%d): \n"
	.size	.L.str.20, 31

	.type	.L.str.21,@object               # @.str.21
.L.str.21:
	.asciz	"   %d -> %f -> label = %d\n"
	.size	.L.str.21, 27

	.type	.L.str.22,@object               # @.str.22
.L.str.22:
	.asciz	"\nQuery Document is labelled = %d\n"
	.size	.L.str.22, 34

	.type	.L.str.23,@object               # @.str.23
.L.str.23:
	.asciz	"vector::_M_realloc_insert"
	.size	.L.str.23, 26

	.type	.L.str.24,@object               # @.str.24
.L.str.24:
	.asciz	"cannot create std::vector larger than max_size()"
	.size	.L.str.24, 49

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z10printArrayPii"
	.size	.L__unnamed_1, 18

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z10printArrayPdi"
	.size	.L__unnamed_2, 18

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z20Count_number_of_termPiS_"
	.size	.L__unnamed_3, 29

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z23Kogge_Stone_scan_kernelPiS_iiS_"
	.size	.L__unnamed_4, 36

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"_Z21Create_InvertedIndexAPiS_S_S_S_"
	.size	.L__unnamed_5, 36

	.type	.L__unnamed_6,@object           # @5
.L__unnamed_6:
	.asciz	"_Z21Create_InvertedIndexBPiS_PdS_S_S_S0_"
	.size	.L__unnamed_6, 41

	.type	.L__unnamed_7,@object           # @6
.L__unnamed_7:
	.asciz	"_Z5knnTDPiPdS_S0_S0_S_"
	.size	.L__unnamed_7, 23

	.type	.L__unnamed_8,@object           # @7
.L__unnamed_8:
	.asciz	"_Z3knnPiPdS0_S0_d"
	.size	.L__unnamed_8, 18

	.type	.L__unnamed_9,@object           # @8
.L__unnamed_9:
	.asciz	"_Z9printlistPiS_S_"
	.size	.L__unnamed_9, 19

	.type	.L__unnamed_10,@object          # @9
.L__unnamed_10:
	.asciz	"_Z10getDocNormPiS_PdS0_i"
	.size	.L__unnamed_10, 25

	.type	.L__unnamed_11,@object          # @10
.L__unnamed_11:
	.asciz	"_Z11oddEvenSortPdPii"
	.size	.L__unnamed_11, 21

	.type	.L__unnamed_12,@object          # @11
.L__unnamed_12:
	.asciz	"_Z8classifyPiPdiS0_S_"
	.size	.L__unnamed_12, 22

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Initial Array:"
	.size	.Lstr, 15

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"Count_number_of_term: "
	.size	.Lstr.1, 23

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"Execute the prefix sum by Kogge Stone:"
	.size	.Lstr.2, 39

	.type	.Lstr.3,@object                 # @str.3
.Lstr.3:
	.asciz	"InvertedIndex Array:"
	.size	.Lstr.3, 21

	.type	.Lstr.4,@object                 # @str.4
.Lstr.4:
	.asciz	"Terms: "
	.size	.Lstr.4, 8

	.type	.Lstr.6,@object                 # @str.6
.Lstr.6:
	.asciz	"Documents: "
	.size	.Lstr.6, 12

	.type	.Lstr.8,@object                 # @str.8
.Lstr.8:
	.asciz	"Norms: "
	.size	.Lstr.8, 8

	.type	.Lstr.9,@object                 # @str.9
.Lstr.9:
	.asciz	"\n"
	.size	.Lstr.9, 2

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z25__device_stub__printArrayPii
	.addrsig_sym _Z25__device_stub__printArrayPdi
	.addrsig_sym _Z35__device_stub__Count_number_of_termPiS_
	.addrsig_sym _Z38__device_stub__Kogge_Stone_scan_kernelPiS_iiS_
	.addrsig_sym _Z36__device_stub__Create_InvertedIndexAPiS_S_S_S_
	.addrsig_sym _Z36__device_stub__Create_InvertedIndexBPiS_PdS_S_S_S0_
	.addrsig_sym _Z20__device_stub__knnTDPiPdS_S0_S0_S_
	.addrsig_sym _Z18__device_stub__knnPiPdS0_S0_d
	.addrsig_sym _Z24__device_stub__printlistPiS_S_
	.addrsig_sym _Z25__device_stub__getDocNormPiS_PdS0_i
	.addrsig_sym _Z26__device_stub__oddEvenSortPdPii
	.addrsig_sym _Z23__device_stub__classifyPiPdiS0_S_
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym _Z10printArrayPii
	.addrsig_sym _Z10printArrayPdi
	.addrsig_sym _Z20Count_number_of_termPiS_
	.addrsig_sym _Z23Kogge_Stone_scan_kernelPiS_iiS_
	.addrsig_sym _Z21Create_InvertedIndexAPiS_S_S_S_
	.addrsig_sym _Z21Create_InvertedIndexBPiS_PdS_S_S_S0_
	.addrsig_sym _Z5knnTDPiPdS_S0_S0_S_
	.addrsig_sym _Z3knnPiPdS0_S0_d
	.addrsig_sym _Z9printlistPiS_S_
	.addrsig_sym _Z10getDocNormPiS_PdS0_i
	.addrsig_sym _Z11oddEvenSortPdPii
	.addrsig_sym _Z8classifyPiPdiS0_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.p2align	2                               ; -- Begin function __ockl_printf_append_string_n
	.type	__ockl_printf_append_string_n,@function
__ockl_printf_append_string_n:          ; @__ockl_printf_append_string_n
; %bb.0:
	s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v8, v3 :: v_dual_mov_b32 v7, v2
	v_or_b32_e32 v2, 2, v0
	v_cmp_eq_u32_e64 s0, 0, v6
	s_mov_b32 s11, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v10, v2, v0, s0
	s_mov_b32 s0, exec_lo
	v_cmpx_ne_u64_e32 0, v[7:8]
	s_xor_b32 s10, exec_lo, s0
	s_cbranch_execz .LBB0_87
; %bb.1:
	s_load_b64 s[2:3], s[8:9], 0x50
	v_dual_mov_b32 v11, 2 :: v_dual_and_b32 v6, 2, v10
	v_mov_b32_e32 v30, 0
	v_and_b32_e32 v0, -3, v10
	v_mbcnt_lo_u32_b32 v33, -1, 0
	v_mov_b32_e32 v12, 1
	s_mov_b32 s12, 0
.LBB0_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_5 Depth 2
                                        ;     Child Loop BB0_13 Depth 2
                                        ;     Child Loop BB0_21 Depth 2
                                        ;     Child Loop BB0_29 Depth 2
                                        ;     Child Loop BB0_37 Depth 2
                                        ;     Child Loop BB0_45 Depth 2
                                        ;     Child Loop BB0_53 Depth 2
                                        ;     Child Loop BB0_61 Depth 2
                                        ;     Child Loop BB0_69 Depth 2
                                        ;     Child Loop BB0_75 Depth 2
                                        ;     Child Loop BB0_84 Depth 2
	v_cmp_gt_u64_e32 vcc_lo, 56, v[4:5]
                                        ; implicit-def: $vgpr2_vgpr3
                                        ; implicit-def: $sgpr4
	s_mov_b32 s0, exec_lo
	v_dual_cndmask_b32 v32, 0, v5 :: v_dual_cndmask_b32 v31, 56, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e32 8, v31
	s_xor_b32 s1, exec_lo, s0
	s_cbranch_execz .LBB0_8
; %bb.3:                                ;   in Loop: Header=BB0_2 Depth=1
	s_waitcnt vmcnt(0)
	v_mov_b32_e32 v2, 0
	v_mov_b32_e32 v3, 0
	s_mov_b32 s6, exec_lo
	v_cmpx_ne_u32_e32 0, v31
	s_cbranch_execz .LBB0_7
; %bb.4:                                ; %.preheader31.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v2, 0
	v_lshlrev_b64 v[9:10], 3, v[31:32]
	v_dual_mov_b32 v3, 0 :: v_dual_mov_b32 v14, v8
	v_mov_b32_e32 v13, v7
	s_mov_b64 s[4:5], 0
	s_mov_b32 s7, 0
.LBB0_5:                                ; %.preheader31
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	flat_load_u8 v10, v[13:14]
	v_mov_b32_e32 v16, s11
	v_add_co_u32 v13, vcc_lo, v13, 1
	v_add_co_ci_u32_e32 v14, vcc_lo, 0, v14, vcc_lo
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_and_b32_e32 v15, 0xffff, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[15:16], s4, v[15:16]
	s_add_u32 s4, s4, 8
	s_addc_u32 s5, s5, 0
	v_cmp_eq_u32_e64 s0, s4, v9
	v_or_b32_e32 v3, v16, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_or_b32_e32 v2, v15, v2
	s_or_b32 s7, s0, s7
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s7
	s_cbranch_execnz .LBB0_5
; %bb.6:                                ; %Flow232
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
.LBB0_7:                                ; %Flow234
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s6
	s_mov_b32 s4, 0
.LBB0_8:                                ; %Flow236
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_saveexec_b32 s0, s1
	v_dual_mov_b32 v15, s4 :: v_dual_mov_b32 v10, v8
	v_mov_b32_e32 v9, v7
	s_xor_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB0_10
; %bb.9:                                ;   in Loop: Header=BB0_2 Depth=1
	s_waitcnt vmcnt(0)
	s_clause 0x5
	flat_load_u8 v2, v[7:8]
	flat_load_u8 v3, v[7:8] offset:1
	flat_load_u8 v9, v[7:8] offset:2
	flat_load_u8 v10, v[7:8] offset:3
	flat_load_u8 v13, v[7:8] offset:5
	flat_load_u8 v14, v[7:8] offset:4
	v_mov_b32_e32 v16, v30
	s_waitcnt vmcnt(5) lgkmcnt(0)
	v_and_b32_e32 v2, 0xffff, v2
	s_waitcnt vmcnt(4)
	v_lshlrev_b32_e32 v3, 8, v3
	s_clause 0x1
	flat_load_u8 v15, v[7:8] offset:7
	flat_load_d16_hi_u8 v16, v[7:8] offset:6
	s_waitcnt vmcnt(5)
	v_lshlrev_b32_e32 v9, 16, v9
	s_waitcnt vmcnt(4)
	v_lshlrev_b32_e32 v10, 24, v10
	v_or_b32_e32 v2, v3, v2
	s_waitcnt vmcnt(3)
	v_lshlrev_b32_e32 v3, 8, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_or3_b32 v2, v2, v9, v10
	s_waitcnt vmcnt(2)
	v_or3_b32 v3, 0, v14, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or3_b32 v2, v2, 0, 0
	v_or3_b32 v2, v2, 0, 0
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_lshlrev_b32_e32 v9, 24, v15
	v_add_nc_u32_e32 v15, -8, v31
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2)
	v_or3_b32 v3, v3, v16, v9
	v_add_co_u32 v9, vcc_lo, v7, 8
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v8, vcc_lo
.LBB0_10:                               ; %.loopexit32
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr13_vgpr14
                                        ; implicit-def: $sgpr1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 8, v15
	s_xor_b32 s6, exec_lo, s0
	s_cbranch_execz .LBB0_16
; %bb.11:                               ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v13, 0
	v_mov_b32_e32 v14, 0
	s_mov_b32 s7, exec_lo
	v_cmpx_ne_u32_e32 0, v15
	s_cbranch_execz .LBB0_15
; %bb.12:                               ; %.preheader29.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v13, 0
	v_mov_b32_e32 v14, 0
	s_mov_b64 s[0:1], 0
	s_mov_b32 s13, 0
	s_mov_b64 s[4:5], 0
.LBB0_13:                               ; %.preheader29
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v16, vcc_lo, v9, s4
	v_add_co_ci_u32_e32 v17, vcc_lo, s5, v10, vcc_lo
	s_add_u32 s4, s4, 1
	s_addc_u32 s5, s5, 0
	v_cmp_eq_u32_e32 vcc_lo, s4, v15
	flat_load_u8 v16, v[16:17]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v17, s11 :: v_dual_and_b32 v16, 0xffff, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[16:17], s0, v[16:17]
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_or_b32 s13, vcc_lo, s13
	v_or_b32_e32 v14, v17, v14
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v13, v16, v13
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB0_13
; %bb.14:                               ; %Flow227
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
.LBB0_15:                               ; %Flow229
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s7
	s_mov_b32 s1, 0
                                        ; implicit-def: $vgpr15
.LBB0_16:                               ; %Flow231
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_saveexec_b32 s0, s6
	v_mov_b32_e32 v17, s1
	s_xor_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB0_18
; %bb.17:                               ;   in Loop: Header=BB0_2 Depth=1
	s_clause 0x5
	flat_load_u8 v13, v[9:10]
	flat_load_u8 v14, v[9:10] offset:1
	flat_load_u8 v16, v[9:10] offset:2
	flat_load_u8 v17, v[9:10] offset:3
	flat_load_u8 v18, v[9:10] offset:5
	flat_load_u8 v19, v[9:10] offset:4
	s_waitcnt vmcnt(5) lgkmcnt(0)
	v_dual_mov_b32 v20, v30 :: v_dual_and_b32 v13, 0xffff, v13
	s_clause 0x1
	flat_load_u8 v21, v[9:10] offset:7
	flat_load_d16_hi_u8 v20, v[9:10] offset:6
	s_waitcnt vmcnt(6)
	v_lshlrev_b32_e32 v14, 8, v14
	s_waitcnt vmcnt(5)
	v_lshlrev_b32_e32 v16, 16, v16
	s_waitcnt vmcnt(4)
	v_lshlrev_b32_e32 v17, 24, v17
	v_add_co_u32 v9, vcc_lo, v9, 8
	v_or_b32_e32 v13, v14, v13
	s_waitcnt vmcnt(3)
	v_lshlrev_b32_e32 v14, 8, v18
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_or3_b32 v13, v13, v16, v17
	s_waitcnt vmcnt(2)
	v_or3_b32 v14, 0, v19, v14
	v_add_nc_u32_e32 v17, -8, v15
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or3_b32 v13, v13, 0, 0
	v_or3_b32 v13, v13, 0, 0
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_lshlrev_b32_e32 v16, 24, v21
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_or3_b32 v14, v14, v20, v16
.LBB0_18:                               ; %.loopexit30
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $sgpr1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 8, v17
	s_xor_b32 s6, exec_lo, s0
	s_cbranch_execz .LBB0_24
; %bb.19:                               ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v15, 0
	v_mov_b32_e32 v16, 0
	s_mov_b32 s7, exec_lo
	v_cmpx_ne_u32_e32 0, v17
	s_cbranch_execz .LBB0_23
; %bb.20:                               ; %.preheader27.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v15, 0
	v_mov_b32_e32 v16, 0
	s_mov_b64 s[0:1], 0
	s_mov_b32 s13, 0
	s_mov_b64 s[4:5], 0
.LBB0_21:                               ; %.preheader27
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v18, vcc_lo, v9, s4
	v_add_co_ci_u32_e32 v19, vcc_lo, s5, v10, vcc_lo
	s_add_u32 s4, s4, 1
	s_addc_u32 s5, s5, 0
	v_cmp_eq_u32_e32 vcc_lo, s4, v17
	flat_load_u8 v18, v[18:19]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v19, s11 :: v_dual_and_b32 v18, 0xffff, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[18:19], s0, v[18:19]
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_or_b32 s13, vcc_lo, s13
	v_or_b32_e32 v16, v19, v16
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v15, v18, v15
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB0_21
; %bb.22:                               ; %Flow222
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
.LBB0_23:                               ; %Flow224
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s7
	s_mov_b32 s1, 0
                                        ; implicit-def: $vgpr17
.LBB0_24:                               ; %Flow226
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_saveexec_b32 s0, s6
	v_mov_b32_e32 v19, s1
	s_xor_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB0_26
; %bb.25:                               ;   in Loop: Header=BB0_2 Depth=1
	s_clause 0x5
	flat_load_u8 v15, v[9:10]
	flat_load_u8 v16, v[9:10] offset:1
	flat_load_u8 v18, v[9:10] offset:2
	flat_load_u8 v19, v[9:10] offset:3
	flat_load_u8 v20, v[9:10] offset:5
	flat_load_u8 v21, v[9:10] offset:4
	s_waitcnt vmcnt(5) lgkmcnt(0)
	v_dual_mov_b32 v22, v30 :: v_dual_and_b32 v15, 0xffff, v15
	s_clause 0x1
	flat_load_u8 v23, v[9:10] offset:7
	flat_load_d16_hi_u8 v22, v[9:10] offset:6
	s_waitcnt vmcnt(6)
	v_lshlrev_b32_e32 v16, 8, v16
	s_waitcnt vmcnt(5)
	v_lshlrev_b32_e32 v18, 16, v18
	s_waitcnt vmcnt(4)
	v_lshlrev_b32_e32 v19, 24, v19
	v_add_co_u32 v9, vcc_lo, v9, 8
	v_or_b32_e32 v15, v16, v15
	s_waitcnt vmcnt(3)
	v_lshlrev_b32_e32 v16, 8, v20
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_or3_b32 v15, v15, v18, v19
	s_waitcnt vmcnt(2)
	v_or3_b32 v16, 0, v21, v16
	v_add_nc_u32_e32 v19, -8, v17
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or3_b32 v15, v15, 0, 0
	v_or3_b32 v15, v15, 0, 0
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_lshlrev_b32_e32 v18, 24, v23
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_or3_b32 v16, v16, v22, v18
.LBB0_26:                               ; %.loopexit28
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr17_vgpr18
                                        ; implicit-def: $sgpr1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 8, v19
	s_xor_b32 s6, exec_lo, s0
	s_cbranch_execz .LBB0_32
; %bb.27:                               ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v17, 0
	v_mov_b32_e32 v18, 0
	s_mov_b32 s7, exec_lo
	v_cmpx_ne_u32_e32 0, v19
	s_cbranch_execz .LBB0_31
; %bb.28:                               ; %.preheader25.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v17, 0
	v_mov_b32_e32 v18, 0
	s_mov_b64 s[0:1], 0
	s_mov_b32 s13, 0
	s_mov_b64 s[4:5], 0
.LBB0_29:                               ; %.preheader25
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v20, vcc_lo, v9, s4
	v_add_co_ci_u32_e32 v21, vcc_lo, s5, v10, vcc_lo
	s_add_u32 s4, s4, 1
	s_addc_u32 s5, s5, 0
	v_cmp_eq_u32_e32 vcc_lo, s4, v19
	flat_load_u8 v20, v[20:21]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v21, s11 :: v_dual_and_b32 v20, 0xffff, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[20:21], s0, v[20:21]
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_or_b32 s13, vcc_lo, s13
	v_or_b32_e32 v18, v21, v18
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v17, v20, v17
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB0_29
; %bb.30:                               ; %Flow217
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
.LBB0_31:                               ; %Flow219
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s7
	s_mov_b32 s1, 0
                                        ; implicit-def: $vgpr19
.LBB0_32:                               ; %Flow221
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_saveexec_b32 s0, s6
	v_mov_b32_e32 v21, s1
	s_xor_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB0_34
; %bb.33:                               ;   in Loop: Header=BB0_2 Depth=1
	s_clause 0x5
	flat_load_u8 v17, v[9:10]
	flat_load_u8 v18, v[9:10] offset:1
	flat_load_u8 v20, v[9:10] offset:2
	flat_load_u8 v21, v[9:10] offset:3
	flat_load_u8 v22, v[9:10] offset:5
	flat_load_u8 v23, v[9:10] offset:4
	s_waitcnt vmcnt(5) lgkmcnt(0)
	v_dual_mov_b32 v24, v30 :: v_dual_and_b32 v17, 0xffff, v17
	s_clause 0x1
	flat_load_u8 v25, v[9:10] offset:7
	flat_load_d16_hi_u8 v24, v[9:10] offset:6
	s_waitcnt vmcnt(6)
	v_lshlrev_b32_e32 v18, 8, v18
	s_waitcnt vmcnt(5)
	v_lshlrev_b32_e32 v20, 16, v20
	s_waitcnt vmcnt(4)
	v_lshlrev_b32_e32 v21, 24, v21
	v_add_co_u32 v9, vcc_lo, v9, 8
	v_or_b32_e32 v17, v18, v17
	s_waitcnt vmcnt(3)
	v_lshlrev_b32_e32 v18, 8, v22
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_or3_b32 v17, v17, v20, v21
	s_waitcnt vmcnt(2)
	v_or3_b32 v18, 0, v23, v18
	v_add_nc_u32_e32 v21, -8, v19
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or3_b32 v17, v17, 0, 0
	v_or3_b32 v17, v17, 0, 0
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_lshlrev_b32_e32 v20, 24, v25
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_or3_b32 v18, v18, v24, v20
.LBB0_34:                               ; %.loopexit26
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $sgpr1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 8, v21
	s_xor_b32 s6, exec_lo, s0
	s_cbranch_execz .LBB0_40
; %bb.35:                               ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v19, 0
	v_mov_b32_e32 v20, 0
	s_mov_b32 s7, exec_lo
	v_cmpx_ne_u32_e32 0, v21
	s_cbranch_execz .LBB0_39
; %bb.36:                               ; %.preheader23.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v19, 0
	v_mov_b32_e32 v20, 0
	s_mov_b64 s[0:1], 0
	s_mov_b32 s13, 0
	s_mov_b64 s[4:5], 0
.LBB0_37:                               ; %.preheader23
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v22, vcc_lo, v9, s4
	v_add_co_ci_u32_e32 v23, vcc_lo, s5, v10, vcc_lo
	s_add_u32 s4, s4, 1
	s_addc_u32 s5, s5, 0
	v_cmp_eq_u32_e32 vcc_lo, s4, v21
	flat_load_u8 v22, v[22:23]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v23, s11 :: v_dual_and_b32 v22, 0xffff, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[22:23], s0, v[22:23]
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_or_b32 s13, vcc_lo, s13
	v_or_b32_e32 v20, v23, v20
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v19, v22, v19
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB0_37
; %bb.38:                               ; %Flow212
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
.LBB0_39:                               ; %Flow214
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s7
	s_mov_b32 s1, 0
                                        ; implicit-def: $vgpr21
.LBB0_40:                               ; %Flow216
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_saveexec_b32 s0, s6
	v_mov_b32_e32 v23, s1
	s_xor_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB0_42
; %bb.41:                               ;   in Loop: Header=BB0_2 Depth=1
	s_clause 0x5
	flat_load_u8 v19, v[9:10]
	flat_load_u8 v20, v[9:10] offset:1
	flat_load_u8 v22, v[9:10] offset:2
	flat_load_u8 v23, v[9:10] offset:3
	flat_load_u8 v24, v[9:10] offset:5
	flat_load_u8 v25, v[9:10] offset:4
	s_waitcnt vmcnt(5) lgkmcnt(0)
	v_dual_mov_b32 v26, v30 :: v_dual_and_b32 v19, 0xffff, v19
	s_clause 0x1
	flat_load_u8 v27, v[9:10] offset:7
	flat_load_d16_hi_u8 v26, v[9:10] offset:6
	s_waitcnt vmcnt(6)
	v_lshlrev_b32_e32 v20, 8, v20
	s_waitcnt vmcnt(5)
	v_lshlrev_b32_e32 v22, 16, v22
	s_waitcnt vmcnt(4)
	v_lshlrev_b32_e32 v23, 24, v23
	v_add_co_u32 v9, vcc_lo, v9, 8
	v_or_b32_e32 v19, v20, v19
	s_waitcnt vmcnt(3)
	v_lshlrev_b32_e32 v20, 8, v24
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_or3_b32 v19, v19, v22, v23
	s_waitcnt vmcnt(2)
	v_or3_b32 v20, 0, v25, v20
	v_add_nc_u32_e32 v23, -8, v21
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or3_b32 v19, v19, 0, 0
	v_or3_b32 v19, v19, 0, 0
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_lshlrev_b32_e32 v22, 24, v27
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_or3_b32 v20, v20, v26, v22
.LBB0_42:                               ; %.loopexit24
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr21_vgpr22
                                        ; implicit-def: $sgpr1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 8, v23
	s_xor_b32 s6, exec_lo, s0
	s_cbranch_execz .LBB0_48
; %bb.43:                               ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v21, 0
	v_mov_b32_e32 v22, 0
	s_mov_b32 s7, exec_lo
	v_cmpx_ne_u32_e32 0, v23
	s_cbranch_execz .LBB0_47
; %bb.44:                               ; %.preheader21.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v21, 0
	v_mov_b32_e32 v22, 0
	s_mov_b64 s[0:1], 0
	s_mov_b32 s13, 0
	s_mov_b64 s[4:5], 0
.LBB0_45:                               ; %.preheader21
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	v_add_co_u32 v24, vcc_lo, v9, s4
	v_add_co_ci_u32_e32 v25, vcc_lo, s5, v10, vcc_lo
	s_add_u32 s4, s4, 1
	s_addc_u32 s5, s5, 0
	v_cmp_eq_u32_e32 vcc_lo, s4, v23
	flat_load_u8 v24, v[24:25]
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_dual_mov_b32 v25, s11 :: v_dual_and_b32 v24, 0xffff, v24
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[24:25], s0, v[24:25]
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_or_b32 s13, vcc_lo, s13
	v_or_b32_e32 v22, v25, v22
	s_delay_alu instid0(VALU_DEP_2)
	v_or_b32_e32 v21, v24, v21
	s_and_not1_b32 exec_lo, exec_lo, s13
	s_cbranch_execnz .LBB0_45
; %bb.46:                               ; %Flow207
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
.LBB0_47:                               ; %Flow209
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s7
	s_mov_b32 s1, 0
                                        ; implicit-def: $vgpr23
.LBB0_48:                               ; %Flow211
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_saveexec_b32 s0, s6
	v_mov_b32_e32 v25, s1
	s_xor_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB0_50
; %bb.49:                               ;   in Loop: Header=BB0_2 Depth=1
	s_clause 0x5
	flat_load_u8 v21, v[9:10]
	flat_load_u8 v22, v[9:10] offset:1
	flat_load_u8 v24, v[9:10] offset:2
	flat_load_u8 v25, v[9:10] offset:3
	flat_load_u8 v26, v[9:10] offset:5
	flat_load_u8 v27, v[9:10] offset:4
	s_waitcnt vmcnt(5) lgkmcnt(0)
	v_dual_mov_b32 v28, v30 :: v_dual_and_b32 v21, 0xffff, v21
	s_clause 0x1
	flat_load_u8 v29, v[9:10] offset:7
	flat_load_d16_hi_u8 v28, v[9:10] offset:6
	s_waitcnt vmcnt(6)
	v_lshlrev_b32_e32 v22, 8, v22
	s_waitcnt vmcnt(5)
	v_lshlrev_b32_e32 v24, 16, v24
	s_waitcnt vmcnt(4)
	v_lshlrev_b32_e32 v25, 24, v25
	v_add_co_u32 v9, vcc_lo, v9, 8
	v_or_b32_e32 v21, v22, v21
	s_waitcnt vmcnt(3)
	v_lshlrev_b32_e32 v22, 8, v26
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_or3_b32 v21, v21, v24, v25
	s_waitcnt vmcnt(2)
	v_or3_b32 v22, 0, v27, v22
	v_add_nc_u32_e32 v25, -8, v23
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or3_b32 v21, v21, 0, 0
	v_or3_b32 v21, v21, 0, 0
	s_waitcnt vmcnt(1) lgkmcnt(1)
	v_lshlrev_b32_e32 v24, 24, v29
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_or3_b32 v22, v22, v28, v24
.LBB0_50:                               ; %.loopexit22
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 8, v25
	s_xor_b32 s4, exec_lo, s0
	s_cbranch_execz .LBB0_56
; %bb.51:                               ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v23, 0
	v_mov_b32_e32 v24, 0
	s_mov_b32 s5, exec_lo
	v_cmpx_ne_u32_e32 0, v25
	s_cbranch_execz .LBB0_55
; %bb.52:                               ; %.preheader.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v23, 0
	v_mov_b32_e32 v24, 0
	s_mov_b64 s[0:1], 0
	s_mov_b32 s6, 0
.LBB0_53:                               ; %.preheader
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	flat_load_u8 v26, v[9:10]
	v_mov_b32_e32 v27, s11
	v_add_nc_u32_e32 v25, -1, v25
	v_add_co_u32 v9, vcc_lo, v9, 1
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v25
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_and_b32_e32 v26, 0xffff, v26
	v_lshlrev_b64 v[26:27], s0, v[26:27]
	s_add_u32 s0, s0, 8
	s_addc_u32 s1, s1, 0
	s_or_b32 s6, vcc_lo, s6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or_b32_e32 v24, v27, v24
	v_or_b32_e32 v23, v26, v23
	s_and_not1_b32 exec_lo, exec_lo, s6
	s_cbranch_execnz .LBB0_53
; %bb.54:                               ; %Flow202
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
.LBB0_55:                               ; %Flow204
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
                                        ; implicit-def: $vgpr9_vgpr10
.LBB0_56:                               ; %Flow206
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_and_not1_saveexec_b32 s0, s4
	s_cbranch_execz .LBB0_58
; %bb.57:                               ;   in Loop: Header=BB0_2 Depth=1
	s_clause 0x5
	flat_load_u8 v23, v[9:10]
	flat_load_u8 v24, v[9:10] offset:1
	flat_load_u8 v25, v[9:10] offset:2
	flat_load_u8 v26, v[9:10] offset:3
	flat_load_u8 v27, v[9:10] offset:5
	flat_load_u8 v28, v[9:10] offset:4
	v_mov_b32_e32 v29, v30
	s_clause 0x1
	flat_load_u8 v34, v[9:10] offset:7
	flat_load_d16_hi_u8 v29, v[9:10] offset:6
	s_waitcnt vmcnt(7) lgkmcnt(0)
	v_and_b32_e32 v9, 0xffff, v23
	s_waitcnt vmcnt(6)
	v_lshlrev_b32_e32 v10, 8, v24
	s_waitcnt vmcnt(5)
	v_lshlrev_b32_e32 v23, 16, v25
	s_waitcnt vmcnt(3)
	v_lshlrev_b32_e32 v24, 8, v27
	v_or_b32_e32 v9, v10, v9
	v_lshlrev_b32_e32 v10, 24, v26
	s_delay_alu instid0(VALU_DEP_1)
	v_or3_b32 v9, v9, v23, v10
	s_waitcnt vmcnt(2)
	v_or3_b32 v10, 0, v28, v24
	s_waitcnt vmcnt(1)
	v_lshlrev_b32_e32 v23, 24, v34
	v_or3_b32 v9, v9, 0, 0
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_or3_b32 v24, v10, v29, v23
	v_or3_b32 v23, v9, 0, 0
.LBB0_58:                               ; %.loopexit
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s0
	v_mov_b32_e32 v29, v33
	v_mov_b32_e32 v9, 0
	v_mov_b32_e32 v10, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s0, v29
	v_cmp_eq_u32_e64 s0, s0, v29
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_64
; %bb.59:                               ;   in Loop: Header=BB0_2 Depth=1
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[27:28], v30, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[9:10], v30, s[2:3] offset:40
	global_load_b64 v[25:26], v30, s[2:3]
	s_mov_b32 s4, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v10, v10, v28
	v_and_b32_e32 v9, v9, v27
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v10, v10, 24
	v_mul_hi_u32 v34, v9, 24
	v_mul_lo_u32 v9, v9, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v10, v34, v10
	s_waitcnt vmcnt(0)
	v_add_co_u32 v9, vcc_lo, v25, v9
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v10, vcc_lo, v26, v10, vcc_lo
	global_load_b64 v[25:26], v[9:10], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[9:10], v30, v[25:28], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[9:10], v[27:28]
	s_cbranch_execz .LBB0_63
; %bb.60:                               ; %.preheader3.i.i19.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_mov_b32 s5, 0
.LBB0_61:                               ; %.preheader3.i.i19
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[25:26], v30, s[2:3] offset:40
	global_load_b64 v[34:35], v30, s[2:3]
	v_dual_mov_b32 v28, v10 :: v_dual_mov_b32 v27, v9
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v25, v25, v27
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[9:10], null, v25, 24, v[34:35]
	v_and_b32_e32 v34, v26, v28
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[25:26], null, v34, 24, v[10:11]
	v_mov_b32_e32 v10, v25
	global_load_b64 v[25:26], v[9:10], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[9:10], v30, v[25:28], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[27:28]
	s_or_b32 s5, vcc_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB0_61
; %bb.62:                               ; %Flow199
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
.LBB0_63:                               ; %Flow201
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
.LBB0_64:                               ; %.loopexit4.i.i14
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[34:35], v30, s[2:3] offset:40
	global_load_b128 v[25:28], v30, s[2:3]
	v_readfirstlane_b32 s4, v9
	v_readfirstlane_b32 s5, v10
	s_mov_b32 s15, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v34
	v_readfirstlane_b32 s7, v35
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[4:5], s[6:7]
	s_mul_i32 s1, s7, 24
	s_mul_hi_u32 s13, s6, 24
	s_mul_i32 s14, s6, 24
	s_and_saveexec_b32 s16, s0
	s_cbranch_execz .LBB0_66
; %bb.65:                               ;   in Loop: Header=BB0_2 Depth=1
	s_add_i32 s17, s13, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v34, vcc_lo, v25, s14
	v_add_co_ci_u32_e32 v35, vcc_lo, s17, v26, vcc_lo
	v_dual_mov_b32 v9, s15 :: v_dual_mov_b32 v10, v30
	global_store_b128 v[34:35], v[9:12], off offset:8
.LBB0_66:                               ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s16
	v_cmp_lt_u64_e32 vcc_lo, 56, v[4:5]
	v_or_b32_e32 v9, 0, v1
	v_or_b32_e32 v10, v0, v6
	v_lshl_add_u32 v34, v31, 2, 28
	s_lshl_b64 s[6:7], s[6:7], 12
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_cndmask_b32 v1, v9, v1 :: v_dual_cndmask_b32 v0, v10, v0
	v_lshlrev_b64 v[9:10], 6, v[29:30]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v27, vcc_lo, v27, s6
	v_and_b32_e32 v34, 0x1e0, v34
	v_add_co_ci_u32_e32 v28, vcc_lo, s7, v28, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v9, vcc_lo, v27, v9
	v_and_or_b32 v0, 0xffffff1f, v0, v34
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v10, vcc_lo, v28, v10, vcc_lo
	s_clause 0x3
	global_store_b128 v[9:10], v[0:3], off
	global_store_b128 v[9:10], v[13:16], off offset:16
	global_store_b128 v[9:10], v[17:20], off offset:32
	global_store_b128 v[9:10], v[21:24], off offset:48
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB0_74
; %bb.67:                               ;   in Loop: Header=BB0_2 Depth=1
	s_clause 0x1
	global_load_b64 v[17:18], v30, s[2:3] offset:32 glc
	global_load_b64 v[0:1], v30, s[2:3] offset:40
	v_dual_mov_b32 v15, s4 :: v_dual_mov_b32 v16, s5
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s16, v0
	v_readfirstlane_b32 s17, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[16:17], s[16:17], s[4:5]
	s_mul_i32 s7, s17, 24
	s_mul_hi_u32 s15, s16, 24
	s_mul_i32 s16, s16, 24
	s_add_i32 s15, s15, s7
	v_add_co_u32 v13, vcc_lo, v25, s16
	v_add_co_ci_u32_e32 v14, vcc_lo, s15, v26, vcc_lo
	s_mov_b32 s7, exec_lo
	global_store_b64 v[13:14], v[17:18], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v30, v[15:18], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[2:3], v[17:18]
	s_cbranch_execz .LBB0_70
; %bb.68:                               ; %.preheader1.i.i17.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_mov_b32 s15, 0
.LBB0_69:                               ; %.preheader1.i.i17
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5
	s_sleep 1
	global_store_b64 v[13:14], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[0:1], v30, v[0:3], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	s_or_b32 s15, vcc_lo, s15
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s15
	s_cbranch_execnz .LBB0_69
.LBB0_70:                               ; %Flow197
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	global_load_b64 v[0:1], v30, s[2:3] offset:16
	s_mov_b32 s15, exec_lo
	s_mov_b32 s7, exec_lo
	v_mbcnt_lo_u32_b32 v2, s15, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB0_72
; %bb.71:                               ;   in Loop: Header=BB0_2 Depth=1
	s_bcnt1_i32_b32 s15, s15
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v29, s15
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[29:30], off offset:8
.LBB0_72:                               ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB0_74
; %bb.73:                               ;   in Loop: Header=BB0_2 Depth=1
	global_load_b32 v29, v[0:1], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s7, v29
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[2:3], v[29:30], off
	s_and_b32 m0, s7, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB0_74:                               ; %Flow198
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_add_i32 s13, s13, s1
	v_add_co_u32 v0, vcc_lo, v25, s14
	v_add_co_ci_u32_e32 v1, vcc_lo, s13, v26, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB0_75:                               ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_77
; %bb.76:                               ;   in Loop: Header=BB0_75 Depth=2
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB0_77:                               ;   in Loop: Header=BB0_75 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB0_79
; %bb.78:                               ;   in Loop: Header=BB0_75 Depth=2
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB0_80
.LBB0_79:                               ;   in Loop: Header=BB0_75 Depth=2
	s_mov_b32 s1, -1
.LBB0_80:                               ; %Flow192
                                        ;   in Loop: Header=BB0_75 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB0_75
; %bb.81:                               ;   in Loop: Header=BB0_2 Depth=1
	global_load_b128 v[0:3], v[9:10], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_85
; %bb.82:                               ;   in Loop: Header=BB0_2 Depth=1
	s_clause 0x2
	global_load_b64 v[2:3], v30, s[2:3] offset:40
	global_load_b64 v[9:10], v30, s[2:3] offset:24 glc
	global_load_b64 v[15:16], v30, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v17, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v18, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v13, vcc_lo, v17, s4
	v_add_co_ci_u32_e32 v14, vcc_lo, s5, v18, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[13:14]
	v_dual_cndmask_b32 v14, v14, v18 :: v_dual_cndmask_b32 v13, v13, v17
	v_and_b32_e32 v3, v14, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v13, v2
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v17, v2, 24
	v_mul_lo_u32 v2, v2, 24
	v_add_nc_u32_e32 v3, v17, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v2, vcc_lo, v15, v2
	v_mov_b32_e32 v15, v9
	v_add_co_ci_u32_e32 v3, vcc_lo, v16, v3, vcc_lo
	v_mov_b32_e32 v16, v10
	global_store_b64 v[2:3], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[15:16], v30, v[13:16], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[15:16], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_85
; %bb.83:                               ; %.preheader.i.i16.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_mov_b32 s0, 0
.LBB0_84:                               ; %.preheader.i.i16
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	global_store_b64 v[2:3], v[15:16], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v30, v[13:16], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[15:16]
	v_dual_mov_b32 v16, v10 :: v_dual_mov_b32 v15, v9
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB0_84
.LBB0_85:                               ; %__ockl_hostcall_preview.exit20
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	v_sub_co_u32 v4, vcc_lo, v4, v31
	v_sub_co_ci_u32_e32 v5, vcc_lo, v5, v32, vcc_lo
	v_add_co_u32 v7, s0, v7, v31
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v8, s0, v8, v32, s0
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_or_b32 s12, vcc_lo, s12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s12
	s_cbranch_execnz .LBB0_2
; %bb.86:                               ; %Flow237
	s_or_b32 exec_lo, exec_lo, s12
                                        ; implicit-def: $vgpr10
.LBB0_87:                               ; %Flow253
	s_and_not1_saveexec_b32 s1, s10
	s_cbranch_execz .LBB0_116
; %bb.88:
	s_load_b64 s[2:3], s[8:9], 0x50
	s_waitcnt vmcnt(0)
	v_mbcnt_lo_u32_b32 v2, -1, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_readfirstlane_b32 s0, v2
	v_mov_b32_e32 v8, 0
	v_mov_b32_e32 v9, 0
	v_cmp_eq_u32_e64 s0, s0, v2
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB0_94
; %bb.89:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s5, exec_lo
	s_waitcnt lgkmcnt(0)
	global_load_b64 v[5:6], v0, s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[3:4], v0, s[2:3] offset:40
	global_load_b64 v[7:8], v0, s[2:3]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v3, v3, v5
	v_and_b32_e32 v4, v4, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v9, v3, 24
	v_mul_lo_u32 v4, v4, 24
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v9, v4
	s_waitcnt vmcnt(0)
	v_add_co_u32 v3, vcc_lo, v7, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, v8, v4, vcc_lo
	global_load_b64 v[3:4], v[3:4], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[8:9], v0, v[3:6], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[8:9], v[5:6]
	s_cbranch_execz .LBB0_93
; %bb.90:                               ; %.preheader3.i.i.preheader
	s_mov_b32 s6, 0
.LBB0_91:                               ; %.preheader3.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[3:4], v0, s[2:3] offset:40
	global_load_b64 v[11:12], v0, s[2:3]
	v_dual_mov_b32 v5, v8 :: v_dual_mov_b32 v6, v9
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v3, v3, v5
	v_and_b32_e32 v4, v4, v6
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[7:8], null, v3, 24, v[11:12]
	v_mov_b32_e32 v3, v8
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[8:9], null, v4, 24, v[3:4]
	global_load_b64 v[3:4], v[7:8], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[8:9], v0, v[3:6], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[5:6]
	s_or_b32 s6, vcc_lo, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s6
	s_cbranch_execnz .LBB0_91
; %bb.92:                               ; %Flow249
	s_or_b32 exec_lo, exec_lo, s6
.LBB0_93:                               ; %Flow251
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s5
.LBB0_94:                               ; %.loopexit4.i.i
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
	v_mov_b32_e32 v3, 0
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_mov_b32 s11, exec_lo
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b64 v[11:12], v3, s[2:3] offset:40
	global_load_b128 v[4:7], v3, s[2:3]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v11
	v_readfirstlane_b32 s7, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[4:5], s[6:7]
	s_mul_i32 s8, s7, 24
	s_mul_hi_u32 s9, s6, 24
	s_mul_i32 s10, s6, 24
	s_and_saveexec_b32 s12, s0
	s_cbranch_execz .LBB0_96
; %bb.95:
	s_add_i32 s13, s9, s8
	s_waitcnt vmcnt(0)
	v_add_co_u32 v8, vcc_lo, v4, s10
	v_add_co_ci_u32_e32 v9, vcc_lo, s13, v5, vcc_lo
	v_dual_mov_b32 v11, s11 :: v_dual_mov_b32 v12, v3
	v_dual_mov_b32 v13, 2 :: v_dual_mov_b32 v14, 1
	global_store_b128 v[8:9], v[11:14], off offset:8
.LBB0_96:
	s_or_b32 exec_lo, exec_lo, s12
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[8:9], 6, v[2:3]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v6, s6
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v7, vcc_lo
	s_mov_b32 s12, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v2, v8
	s_mov_b32 s13, s12
	s_mov_b32 s14, s12
	s_mov_b32 s15, s12
	v_and_or_b32 v0, 0xffffff1f, v10, 32
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v9, vcc_lo
	v_mov_b32_e32 v2, v3
	v_dual_mov_b32 v8, s12 :: v_dual_mov_b32 v11, s15
	v_dual_mov_b32 v9, s13 :: v_dual_mov_b32 v10, s14
	s_clause 0x3
	global_store_b128 v[6:7], v[0:3], off
	global_store_b128 v[6:7], v[8:11], off offset:16
	global_store_b128 v[6:7], v[8:11], off offset:32
	global_store_b128 v[6:7], v[8:11], off offset:48
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB0_104
; %bb.97:
	v_mov_b32_e32 v10, 0
	s_mov_b32 s7, exec_lo
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[2:3] offset:32 glc
	global_load_b64 v[0:1], v10, s[2:3] offset:40
	v_dual_mov_b32 v11, s4 :: v_dual_mov_b32 v12, s5
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v1, s5, v1
	v_and_b32_e32 v0, s4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v1, v1, 24
	v_mul_hi_u32 v2, v0, 24
	v_mul_lo_u32 v0, v0, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, v2, v1
	v_add_co_u32 v8, vcc_lo, v4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, v5, v1, vcc_lo
	global_store_b64 v[8:9], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[11:14], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[2:3], v[13:14]
	s_cbranch_execz .LBB0_100
; %bb.98:                               ; %.preheader1.i.i.preheader
	s_mov_b32 s11, 0
.LBB0_99:                               ; %.preheader1.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5
	s_sleep 1
	global_store_b64 v[8:9], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[0:1], v10, v[0:3], s[2:3] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	s_or_b32 s11, vcc_lo, s11
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB0_99
.LBB0_100:                              ; %Flow247
	s_or_b32 exec_lo, exec_lo, s7
	v_mov_b32_e32 v3, 0
	s_mov_b32 s11, exec_lo
	s_mov_b32 s7, exec_lo
	v_mbcnt_lo_u32_b32 v2, s11, 0
	global_load_b64 v[0:1], v3, s[2:3] offset:16
	v_cmpx_eq_u32_e32 0, v2
	s_cbranch_execz .LBB0_102
; %bb.101:
	s_bcnt1_i32_b32 s11, s11
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v2, s11
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[0:1], v[2:3], off offset:8
.LBB0_102:
	s_or_b32 exec_lo, exec_lo, s7
	s_waitcnt vmcnt(0)
	global_load_b64 v[2:3], v[0:1], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	s_cbranch_vccnz .LBB0_104
; %bb.103:
	global_load_b32 v0, v[0:1], off offset:24
	v_mov_b32_e32 v1, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s7, v0
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[2:3], v[0:1], off
	s_and_b32 m0, s7, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB0_104:                              ; %Flow248
	s_or_b32 exec_lo, exec_lo, s6
	s_add_i32 s9, s9, s8
	v_add_co_u32 v0, vcc_lo, v4, s10
	v_add_co_ci_u32_e32 v1, vcc_lo, s9, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB0_105:                              ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB0_107
; %bb.106:                              ;   in Loop: Header=BB0_105 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB0_107:                              ;   in Loop: Header=BB0_105 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s6, v2
	s_cmp_eq_u32 s6, 0
	s_cbranch_scc1 .LBB0_109
; %bb.108:                              ;   in Loop: Header=BB0_105 Depth=1
	s_mov_b32 s6, 0
	s_sleep 1
	s_branch .LBB0_110
.LBB0_109:                              ;   in Loop: Header=BB0_105 Depth=1
	s_mov_b32 s6, -1
.LBB0_110:                              ; %Flow242
                                        ;   in Loop: Header=BB0_105 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB0_105
; %bb.111:
	global_load_b128 v[0:3], v[6:7], off
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB0_115
; %bb.112:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[2:3] offset:40
	global_load_b64 v[9:10], v8, s[2:3] offset:24 glc
	global_load_b64 v[6:7], v8, s[2:3]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_115
; %bb.113:                              ; %.preheader.i.i.preheader
	s_mov_b32 s0, 0
.LBB0_114:                              ; %.preheader.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[2:3] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB0_114
.LBB0_115:                              ; %__ockl_hostcall_preview.exit
	s_or_b32 exec_lo, exec_lo, s6
.LBB0_116:                              ; %Flow254
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_setpc_b64 s[30:31]
.Lfunc_end0:
	.size	__ockl_printf_append_string_n, .Lfunc_end0-__ockl_printf_append_string_n
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Function info:
; codeLenInByte = 5708
; NumSgprs: 34
; NumVgprs: 36
; ScratchSize: 0
; MemoryBound: 0
	.text
	.protected	_Z10printArrayPii       ; -- Begin function _Z10printArrayPii
	.globl	_Z10printArrayPii
	.p2align	8
	.type	_Z10printArrayPii,@function
_Z10printArrayPii:                      ; @_Z10printArrayPii
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x1c
	s_load_b32 s5, s[0:1], 0x8
	s_add_u32 s2, s0, 16
	s_addc_u32 s3, s1, 0
	s_mov_b32 s32, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	s_mov_b32 s4, exec_lo
	v_cmpx_gt_i32_e64 s5, v1
	s_cbranch_execz .LBB1_55
; %bb.1:
	s_load_b64 s[4:5], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[18:19], s[2:3], 0x50
	v_mbcnt_lo_u32_b32 v39, -1, 0
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v7, 0
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v4, v39
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	global_load_b32 v38, v[0:1], off
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s2, v4
	v_cmp_eq_u32_e64 s2, s2, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB1_7
; %bb.2:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s4, exec_lo
	global_load_b64 v[8:9], v0, s[18:19] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[18:19] offset:40
	global_load_b64 v[5:6], v0, s[18:19]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[18:19] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB1_6
; %bb.3:                                ; %.preheader3.i.i.i.preheader
	s_mov_b32 s5, 0
.LBB1_4:                                ; %.preheader3.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[18:19] offset:40
	global_load_b64 v[10:11], v0, s[18:19]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[18:19] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s5, vcc_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB1_4
; %bb.5:                                ; %Flow79
	s_or_b32 exec_lo, exec_lo, s5
.LBB1_6:                                ; %Flow81
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
.LBB1_7:                                ; %.loopexit4.i.i.i
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s3
	v_mov_b32_e32 v5, 0
	v_readfirstlane_b32 s4, v6
	v_readfirstlane_b32 s5, v7
	s_mov_b32 s10, exec_lo
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[18:19] offset:40
	global_load_b128 v[0:3], v5, s[18:19]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v8
	v_readfirstlane_b32 s7, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[4:5], s[6:7]
	s_mul_i32 s3, s7, 24
	s_mul_hi_u32 s8, s6, 24
	s_mul_i32 s9, s6, 24
	s_and_saveexec_b32 s11, s2
	s_cbranch_execz .LBB1_9
; %bb.8:
	v_dual_mov_b32 v6, s10 :: v_dual_mov_b32 v7, v5
	s_add_i32 s10, s8, s3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s9
	v_add_co_ci_u32_e32 v11, vcc_lo, s10, v1, vcc_lo
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB1_9:
	s_or_b32 exec_lo, exec_lo, s11
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s6
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
	s_mov_b32 s12, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v6
	s_mov_b32 s13, s12
	s_mov_b32 s14, s12
	s_mov_b32 s15, s12
	v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo
	v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5
	v_mov_b32_e32 v6, v5
	v_dual_mov_b32 v10, s12 :: v_dual_mov_b32 v13, s15
	v_dual_mov_b32 v11, s13 :: v_dual_mov_b32 v12, s14
	s_clause 0x3
	global_store_b128 v[8:9], v[4:7], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s6, s2
	s_cbranch_execz .LBB1_17
; %bb.10:
	v_mov_b32_e32 v10, 0
	s_mov_b32 s7, exec_lo
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[18:19] offset:32 glc
	global_load_b64 v[2:3], v10, s[18:19] offset:40
	v_dual_mov_b32 v11, s4 :: v_dual_mov_b32 v12, s5
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, s5, v3
	v_and_b32_e32 v2, s4, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v4, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v4, v3
	v_add_co_u32 v6, vcc_lo, v0, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, v1, v3, vcc_lo
	global_store_b64 v[6:7], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[18:19] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB1_13
; %bb.11:                               ; %.preheader1.i.i.i.preheader
	s_mov_b32 s10, 0
.LBB1_12:                               ; %.preheader1.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s4 :: v_dual_mov_b32 v3, s5
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[18:19] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s10, vcc_lo, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s10
	s_cbranch_execnz .LBB1_12
.LBB1_13:                               ; %Flow77
	s_or_b32 exec_lo, exec_lo, s7
	v_mov_b32_e32 v5, 0
	s_mov_b32 s10, exec_lo
	s_mov_b32 s7, exec_lo
	v_mbcnt_lo_u32_b32 v4, s10, 0
	global_load_b64 v[2:3], v5, s[18:19] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB1_15
; %bb.14:
	s_bcnt1_i32_b32 s10, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s10
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB1_15:
	s_or_b32 exec_lo, exec_lo, s7
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB1_17
; %bb.16:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s7, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s7, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB1_17:                               ; %Flow78
	s_or_b32 exec_lo, exec_lo, s6
	s_add_i32 s8, s8, s3
	v_add_co_u32 v0, vcc_lo, v0, s9
	v_add_co_ci_u32_e32 v1, vcc_lo, s8, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB1_18:                               ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB1_20
; %bb.19:                               ;   in Loop: Header=BB1_18 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB1_20:                               ;   in Loop: Header=BB1_18 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s3, v2
	s_cmp_eq_u32 s3, 0
	s_cbranch_scc1 .LBB1_22
; %bb.21:                               ;   in Loop: Header=BB1_18 Depth=1
	s_mov_b32 s3, 0
	s_sleep 1
	s_branch .LBB1_23
.LBB1_22:                               ;   in Loop: Header=BB1_18 Depth=1
	s_mov_b32 s3, -1
.LBB1_23:                               ; %Flow72
                                        ;   in Loop: Header=BB1_18 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccnz .LBB1_18
; %bb.24:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB1_28
; %bb.25:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[18:19] offset:40
	global_load_b64 v[9:10], v8, s[18:19] offset:24 glc
	global_load_b64 v[6:7], v8, s[18:19]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[18:19] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_28
; %bb.26:                               ; %.preheader.i.i.i.preheader
	s_mov_b32 s2, 0
.LBB1_27:                               ; %.preheader.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[18:19] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB1_27
.LBB1_28:                               ; %__ockl_printf_begin.exit
	s_or_b32 exec_lo, exec_lo, s3
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, .str@rel32@lo+4
	s_addc_u32 s3, s3, .str@rel32@hi+12
	v_dual_mov_b32 v36, 0 :: v_dual_mov_b32 v5, 0
	s_cmp_lg_u64 s[2:3], 0
	v_mov_b32_e32 v6, 0
	s_cselect_b32 s4, -1, 0
	s_add_u32 s8, s0, 16
	v_cndmask_b32_e64 v2, 0, 1, s4
	s_addc_u32 s9, s1, 0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_printf_append_string_n@rel32@hi+12
	v_dual_mov_b32 v3, s3 :: v_dual_lshlrev_b32 v4, 2, v2
	v_mov_b32_e32 v2, s2
	s_swappc_b64 s[30:31], s[0:1]
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v39
	v_mov_b32_e32 v5, 0
	v_dual_mov_b32 v37, v1 :: v_dual_mov_b32 v6, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v39
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_34
; %bb.29:
	global_load_b64 v[3:4], v36, s[18:19] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v36, s[18:19] offset:40
	global_load_b64 v[5:6], v36, s[18:19]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v2, v2, v4
	v_and_b32_e32 v1, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v2, v2, 24
	v_mul_hi_u32 v7, v1, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v7, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[1:2], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[5:6], v36, v[1:4], s[18:19] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[5:6], v[3:4]
	s_cbranch_execz .LBB1_33
; %bb.30:                               ; %.preheader3.i.i.i9.preheader
	v_mov_b32_e32 v1, 0
	s_mov_b32 s3, 0
.LBB1_31:                               ; %.preheader3.i.i.i9
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[2:3], v1, s[18:19] offset:40
	global_load_b64 v[9:10], v1, s[18:19]
	v_dual_mov_b32 v8, v6 :: v_dual_mov_b32 v7, v5
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v2, v2, v7
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[4:5], null, v2, 24, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v2, v5 :: v_dual_and_b32 v3, v3, v8
	v_mad_u64_u32 v[5:6], null, v3, 24, v[2:3]
	global_load_b64 v[5:6], v[4:5], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[5:6], v1, v[5:8], s[18:19] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[5:6], v[7:8]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB1_31
; %bb.32:                               ; %Flow65
	s_or_b32 exec_lo, exec_lo, s3
.LBB1_33:                               ; %Flow67
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB1_34:                               ; %.loopexit4.i.i.i4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[7:8], v36, s[18:19] offset:40
	global_load_b128 v[1:4], v36, s[18:19]
	v_readfirstlane_b32 s2, v5
	v_readfirstlane_b32 s3, v6
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v7
	v_readfirstlane_b32 s5, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB1_36
; %bb.35:
	v_dual_mov_b32 v5, s8 :: v_dual_mov_b32 v6, 0
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v9, vcc_lo, v1, s7
	v_add_co_ci_u32_e32 v10, vcc_lo, s8, v2, vcc_lo
	v_dual_mov_b32 v7, 2 :: v_dual_mov_b32 v8, 1
	global_store_b128 v[9:10], v[5:8], off offset:8
.LBB1_36:
	s_or_b32 exec_lo, exec_lo, s9
	s_mov_b32 s8, 0
	s_lshl_b64 s[4:5], s[4:5], 12
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	s_mov_b32 s11, s8
	v_mov_b32_e32 v40, 0
	s_waitcnt vmcnt(0)
	v_add_co_u32 v3, vcc_lo, v3, s4
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[5:6], 6, v[39:40]
	v_and_or_b32 v36, 0xffffff1d, v0, 34
	v_add_co_u32 v7, vcc_lo, v3, v5
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v8, vcc_lo, v4, v6, vcc_lo
	v_mov_b32_e32 v3, s8
	v_dual_mov_b32 v39, v40 :: v_dual_mov_b32 v4, s9
	v_dual_mov_b32 v5, s10 :: v_dual_mov_b32 v6, s11
	s_clause 0x3
	global_store_b128 v[7:8], v[36:39], off
	global_store_b128 v[7:8], v[3:6], off offset:16
	global_store_b128 v[7:8], v[3:6], off offset:32
	global_store_b128 v[7:8], v[3:6], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB1_44
; %bb.37:
	s_clause 0x1
	global_load_b64 v[11:12], v40, s[18:19] offset:32 glc
	global_load_b64 v[3:4], v40, s[18:19] offset:40
	v_dual_mov_b32 v9, s2 :: v_dual_mov_b32 v10, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v3
	v_readfirstlane_b32 s9, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v7, vcc_lo, v1, s8
	v_add_co_ci_u32_e32 v8, vcc_lo, s9, v2, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[7:8], v[11:12], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[5:6], v40, v[9:12], s[18:19] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[5:6], v[11:12]
	s_cbranch_execz .LBB1_40
; %bb.38:                               ; %.preheader1.i.i.i7.preheader
	s_mov_b32 s8, 0
.LBB1_39:                               ; %.preheader1.i.i.i7
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v3, s2 :: v_dual_mov_b32 v4, s3
	s_sleep 1
	global_store_b64 v[7:8], v[5:6], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[3:4], v40, v[3:6], s[18:19] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[3:4], v[5:6]
	v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v5, v3
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB1_39
.LBB1_40:                               ; %Flow63
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v6, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v0, s8, 0
	global_load_b64 v[3:4], v6, s[18:19] offset:16
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB1_42
; %bb.41:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v5, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[3:4], v[5:6], off offset:8
.LBB1_42:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[5:6], v[3:4], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[5:6]
	s_cbranch_vccnz .LBB1_44
; %bb.43:
	global_load_b32 v3, v[3:4], off offset:24
	v_mov_b32_e32 v4, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v3
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[5:6], v[3:4], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB1_44:                               ; %Flow64
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v1, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB1_45:                               ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB1_47
; %bb.46:                               ;   in Loop: Header=BB1_45 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB1_47:                               ;   in Loop: Header=BB1_45 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB1_49
; %bb.48:                               ;   in Loop: Header=BB1_45 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB1_50
.LBB1_49:                               ;   in Loop: Header=BB1_45 Depth=1
	s_mov_b32 s1, -1
.LBB1_50:                               ; %Flow58
                                        ;   in Loop: Header=BB1_45 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB1_45
; %bb.51:
	s_and_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB1_55
; %bb.52:
	v_mov_b32_e32 v6, 0
	s_clause 0x2
	global_load_b64 v[2:3], v6, s[18:19] offset:40
	global_load_b64 v[7:8], v6, s[18:19] offset:24 glc
	global_load_b64 v[4:5], v6, s[18:19]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v9, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v9, s2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v0, v0, v9
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v0, v2
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v9, v2, 24
	v_mul_lo_u32 v2, v2, 24
	v_add_nc_u32_e32 v3, v9, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v7
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v8
	global_store_b64 v[4:5], v[7:8], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v6, v[0:3], s[18:19] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[7:8]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB1_55
; %bb.53:                               ; %.preheader.i.i.i6.preheader
	s_mov_b32 s0, 0
.LBB1_54:                               ; %.preheader.i.i.i6
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[7:8], v6, v[0:3], s[18:19] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3]
	v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB1_54
.LBB1_55:                               ; %__ockl_printf_append_args.exit
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10printArrayPii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 41
		.amdhsa_next_free_sgpr 33
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z10printArrayPii, .Lfunc_end1-_Z10printArrayPii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2948
; NumSgprs: 35
; NumVgprs: 41
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 4
; VGPRBlocks: 5
; NumSGPRsForWavesPerEU: 35
; NumVGPRsForWavesPerEU: 41
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z10printArrayPdi       ; -- Begin function _Z10printArrayPdi
	.globl	_Z10printArrayPdi
	.p2align	8
	.type	_Z10printArrayPdi,@function
_Z10printArrayPdi:                      ; @_Z10printArrayPdi
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x1c
	s_load_b32 s5, s[0:1], 0x8
	s_add_u32 s2, s0, 16
	s_addc_u32 s3, s1, 0
	s_mov_b32 s32, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	s_mov_b32 s4, exec_lo
	v_cmpx_gt_i32_e64 s5, v1
	s_cbranch_execz .LBB2_55
; %bb.1:
	s_load_b64 s[4:5], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b64 s[18:19], s[2:3], 0x50
	v_mbcnt_lo_u32_b32 v40, -1, 0
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v7, 0
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v4, v40
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	global_load_b64 v[38:39], v[0:1], off
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s2, v4
	v_cmp_eq_u32_e64 s2, s2, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB2_7
; %bb.2:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s4, exec_lo
	global_load_b64 v[8:9], v0, s[18:19] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[18:19] offset:40
	global_load_b64 v[5:6], v0, s[18:19]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[18:19] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB2_6
; %bb.3:                                ; %.preheader3.i.i.i.preheader
	s_mov_b32 s5, 0
.LBB2_4:                                ; %.preheader3.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[18:19] offset:40
	global_load_b64 v[10:11], v0, s[18:19]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[18:19] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s5, vcc_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s5
	s_cbranch_execnz .LBB2_4
; %bb.5:                                ; %Flow79
	s_or_b32 exec_lo, exec_lo, s5
.LBB2_6:                                ; %Flow81
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
.LBB2_7:                                ; %.loopexit4.i.i.i
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s3
	v_mov_b32_e32 v5, 0
	v_readfirstlane_b32 s4, v6
	v_readfirstlane_b32 s5, v7
	s_mov_b32 s10, exec_lo
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[18:19] offset:40
	global_load_b128 v[0:3], v5, s[18:19]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s6, v8
	v_readfirstlane_b32 s7, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[6:7], s[4:5], s[6:7]
	s_mul_i32 s3, s7, 24
	s_mul_hi_u32 s8, s6, 24
	s_mul_i32 s9, s6, 24
	s_and_saveexec_b32 s11, s2
	s_cbranch_execz .LBB2_9
; %bb.8:
	v_dual_mov_b32 v6, s10 :: v_dual_mov_b32 v7, v5
	s_add_i32 s10, s8, s3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s9
	v_add_co_ci_u32_e32 v11, vcc_lo, s10, v1, vcc_lo
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB2_9:
	s_or_b32 exec_lo, exec_lo, s11
	s_lshl_b64 s[6:7], s[6:7], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s6
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
	s_mov_b32 s12, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v6
	s_mov_b32 s13, s12
	s_mov_b32 s14, s12
	s_mov_b32 s15, s12
	v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo
	v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5
	v_mov_b32_e32 v6, v5
	v_dual_mov_b32 v10, s12 :: v_dual_mov_b32 v13, s15
	v_dual_mov_b32 v11, s13 :: v_dual_mov_b32 v12, s14
	s_clause 0x3
	global_store_b128 v[8:9], v[4:7], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s6, s2
	s_cbranch_execz .LBB2_17
; %bb.10:
	v_mov_b32_e32 v10, 0
	s_mov_b32 s7, exec_lo
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[18:19] offset:32 glc
	global_load_b64 v[2:3], v10, s[18:19] offset:40
	v_dual_mov_b32 v11, s4 :: v_dual_mov_b32 v12, s5
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, s5, v3
	v_and_b32_e32 v2, s4, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v4, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v4, v3
	v_add_co_u32 v6, vcc_lo, v0, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, v1, v3, vcc_lo
	global_store_b64 v[6:7], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[18:19] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB2_13
; %bb.11:                               ; %.preheader1.i.i.i.preheader
	s_mov_b32 s10, 0
.LBB2_12:                               ; %.preheader1.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s4 :: v_dual_mov_b32 v3, s5
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[18:19] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s10, vcc_lo, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s10
	s_cbranch_execnz .LBB2_12
.LBB2_13:                               ; %Flow77
	s_or_b32 exec_lo, exec_lo, s7
	v_mov_b32_e32 v5, 0
	s_mov_b32 s10, exec_lo
	s_mov_b32 s7, exec_lo
	v_mbcnt_lo_u32_b32 v4, s10, 0
	global_load_b64 v[2:3], v5, s[18:19] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB2_15
; %bb.14:
	s_bcnt1_i32_b32 s10, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s10
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB2_15:
	s_or_b32 exec_lo, exec_lo, s7
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB2_17
; %bb.16:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s7, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s7, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB2_17:                               ; %Flow78
	s_or_b32 exec_lo, exec_lo, s6
	s_add_i32 s8, s8, s3
	v_add_co_u32 v0, vcc_lo, v0, s9
	v_add_co_ci_u32_e32 v1, vcc_lo, s8, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB2_18:                               ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB2_20
; %bb.19:                               ;   in Loop: Header=BB2_18 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB2_20:                               ;   in Loop: Header=BB2_18 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s3, v2
	s_cmp_eq_u32 s3, 0
	s_cbranch_scc1 .LBB2_22
; %bb.21:                               ;   in Loop: Header=BB2_18 Depth=1
	s_mov_b32 s3, 0
	s_sleep 1
	s_branch .LBB2_23
.LBB2_22:                               ;   in Loop: Header=BB2_18 Depth=1
	s_mov_b32 s3, -1
.LBB2_23:                               ; %Flow72
                                        ;   in Loop: Header=BB2_18 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s3
	s_cbranch_vccnz .LBB2_18
; %bb.24:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB2_28
; %bb.25:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[18:19] offset:40
	global_load_b64 v[9:10], v8, s[18:19] offset:24 glc
	global_load_b64 v[6:7], v8, s[18:19]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[18:19] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_28
; %bb.26:                               ; %.preheader.i.i.i.preheader
	s_mov_b32 s2, 0
.LBB2_27:                               ; %.preheader.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[18:19] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s2, vcc_lo, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB2_27
.LBB2_28:                               ; %__ockl_printf_begin.exit
	s_or_b32 exec_lo, exec_lo, s3
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, .str.1@rel32@lo+4
	s_addc_u32 s3, s3, .str.1@rel32@hi+12
	v_dual_mov_b32 v36, 0 :: v_dual_mov_b32 v5, 0
	s_cmp_lg_u64 s[2:3], 0
	v_mov_b32_e32 v6, 0
	s_cselect_b32 s4, -1, 0
	s_add_u32 s8, s0, 16
	v_cndmask_b32_e64 v2, 0, 1, s4
	s_addc_u32 s9, s1, 0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s1, s1, __ockl_printf_append_string_n@rel32@hi+12
	v_dual_mov_b32 v3, s3 :: v_dual_lshlrev_b32 v4, 2, v2
	v_mov_b32_e32 v2, s2
	s_swappc_b64 s[30:31], s[0:1]
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v40
	v_mov_b32_e32 v5, 0
	v_dual_mov_b32 v37, v1 :: v_dual_mov_b32 v6, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v40
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_34
; %bb.29:
	global_load_b64 v[3:4], v36, s[18:19] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v36, s[18:19] offset:40
	global_load_b64 v[5:6], v36, s[18:19]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v2, v2, v4
	v_and_b32_e32 v1, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v2, v2, 24
	v_mul_hi_u32 v7, v1, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v7, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[1:2], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[5:6], v36, v[1:4], s[18:19] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[5:6], v[3:4]
	s_cbranch_execz .LBB2_33
; %bb.30:                               ; %.preheader3.i.i.i9.preheader
	v_mov_b32_e32 v1, 0
	s_mov_b32 s3, 0
.LBB2_31:                               ; %.preheader3.i.i.i9
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[2:3], v1, s[18:19] offset:40
	global_load_b64 v[9:10], v1, s[18:19]
	v_dual_mov_b32 v8, v6 :: v_dual_mov_b32 v7, v5
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v2, v2, v7
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[4:5], null, v2, 24, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v2, v5 :: v_dual_and_b32 v3, v3, v8
	v_mad_u64_u32 v[5:6], null, v3, 24, v[2:3]
	global_load_b64 v[5:6], v[4:5], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[5:6], v1, v[5:8], s[18:19] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[5:6], v[7:8]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB2_31
; %bb.32:                               ; %Flow65
	s_or_b32 exec_lo, exec_lo, s3
.LBB2_33:                               ; %Flow67
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB2_34:                               ; %.loopexit4.i.i.i4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[7:8], v36, s[18:19] offset:40
	global_load_b128 v[1:4], v36, s[18:19]
	v_readfirstlane_b32 s2, v5
	v_readfirstlane_b32 s3, v6
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v7
	v_readfirstlane_b32 s5, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB2_36
; %bb.35:
	v_dual_mov_b32 v5, s8 :: v_dual_mov_b32 v6, 0
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v9, vcc_lo, v1, s7
	v_add_co_ci_u32_e32 v10, vcc_lo, s8, v2, vcc_lo
	v_dual_mov_b32 v7, 2 :: v_dual_mov_b32 v8, 1
	global_store_b128 v[9:10], v[5:8], off offset:8
.LBB2_36:
	s_or_b32 exec_lo, exec_lo, s9
	s_mov_b32 s8, 0
	s_lshl_b64 s[4:5], s[4:5], 12
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	s_mov_b32 s11, s8
	v_mov_b32_e32 v41, 0
	s_waitcnt vmcnt(0)
	v_add_co_u32 v5, vcc_lo, v3, s4
	v_add_co_ci_u32_e32 v6, vcc_lo, s5, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[3:4], 6, v[40:41]
	v_and_or_b32 v36, 0xffffff1d, v0, 34
	v_add_co_u32 v7, vcc_lo, v5, v3
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v8, vcc_lo, v6, v4, vcc_lo
	v_dual_mov_b32 v3, s8 :: v_dual_mov_b32 v6, s11
	v_dual_mov_b32 v4, s9 :: v_dual_mov_b32 v5, s10
	s_clause 0x3
	global_store_b128 v[7:8], v[36:39], off
	global_store_b128 v[7:8], v[3:6], off offset:16
	global_store_b128 v[7:8], v[3:6], off offset:32
	global_store_b128 v[7:8], v[3:6], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB2_44
; %bb.37:
	s_clause 0x1
	global_load_b64 v[11:12], v41, s[18:19] offset:32 glc
	global_load_b64 v[3:4], v41, s[18:19] offset:40
	v_dual_mov_b32 v9, s2 :: v_dual_mov_b32 v10, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v3
	v_readfirstlane_b32 s9, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v7, vcc_lo, v1, s8
	v_add_co_ci_u32_e32 v8, vcc_lo, s9, v2, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[7:8], v[11:12], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[5:6], v41, v[9:12], s[18:19] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[5:6], v[11:12]
	s_cbranch_execz .LBB2_40
; %bb.38:                               ; %.preheader1.i.i.i7.preheader
	v_mov_b32_e32 v0, 0
	s_mov_b32 s8, 0
.LBB2_39:                               ; %.preheader1.i.i.i7
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v3, s2 :: v_dual_mov_b32 v4, s3
	s_sleep 1
	global_store_b64 v[7:8], v[5:6], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[3:4], v0, v[3:6], s[18:19] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[3:4], v[5:6]
	v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v5, v3
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB2_39
.LBB2_40:                               ; %Flow63
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v6, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v0, s8, 0
	global_load_b64 v[3:4], v6, s[18:19] offset:16
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB2_42
; %bb.41:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v5, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[3:4], v[5:6], off offset:8
.LBB2_42:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[5:6], v[3:4], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[5:6]
	s_cbranch_vccnz .LBB2_44
; %bb.43:
	global_load_b32 v3, v[3:4], off offset:24
	v_mov_b32_e32 v4, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v3
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[5:6], v[3:4], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB2_44:                               ; %Flow64
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v1, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB2_45:                               ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB2_47
; %bb.46:                               ;   in Loop: Header=BB2_45 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB2_47:                               ;   in Loop: Header=BB2_45 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB2_49
; %bb.48:                               ;   in Loop: Header=BB2_45 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB2_50
.LBB2_49:                               ;   in Loop: Header=BB2_45 Depth=1
	s_mov_b32 s1, -1
.LBB2_50:                               ; %Flow58
                                        ;   in Loop: Header=BB2_45 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB2_45
; %bb.51:
	s_and_b32 exec_lo, exec_lo, s0
	s_cbranch_execz .LBB2_55
; %bb.52:
	v_mov_b32_e32 v6, 0
	s_clause 0x2
	global_load_b64 v[2:3], v6, s[18:19] offset:40
	global_load_b64 v[7:8], v6, s[18:19] offset:24 glc
	global_load_b64 v[4:5], v6, s[18:19]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v9, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v9, s2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v0, v0, v9
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v0, v2
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v9, v2, 24
	v_mul_lo_u32 v2, v2, 24
	v_add_nc_u32_e32 v3, v9, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v7
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v8
	global_store_b64 v[4:5], v[7:8], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v6, v[0:3], s[18:19] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[7:8]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB2_55
; %bb.53:                               ; %.preheader.i.i.i6.preheader
	s_mov_b32 s0, 0
.LBB2_54:                               ; %.preheader.i.i.i6
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[7:8], v6, v[0:3], s[18:19] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3]
	v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB2_54
.LBB2_55:                               ; %__ockl_printf_append_args.exit
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10printArrayPdi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 42
		.amdhsa_next_free_sgpr 33
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z10printArrayPdi, .Lfunc_end2-_Z10printArrayPdi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2948
; NumSgprs: 35
; NumVgprs: 42
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 4
; VGPRBlocks: 5
; NumSGPRsForWavesPerEU: 35
; NumVGPRsForWavesPerEU: 42
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z20Count_number_of_termPiS_ ; -- Begin function _Z20Count_number_of_termPiS_
	.globl	_Z20Count_number_of_termPiS_
	.p2align	8
	.type	_Z20Count_number_of_termPiS_,@function
_Z20Count_number_of_termPiS_:           ; @_Z20Count_number_of_termPiS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x1c
	s_load_b128 s[0:3], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_mov_b32_e32 v2, 1
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_load_b32 v0, v[0:1], off
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	global_atomic_add_u32 v[0:1], v2, off offset:-4
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z20Count_number_of_termPiS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 3
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z20Count_number_of_termPiS_, .Lfunc_end3-_Z20Count_number_of_termPiS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 140
; NumSgprs: 18
; NumVgprs: 3
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 3
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z23Kogge_Stone_scan_kernelPiS_iiS_ ; -- Begin function _Z23Kogge_Stone_scan_kernelPiS_iiS_
	.globl	_Z23Kogge_Stone_scan_kernelPiS_iiS_
	.p2align	8
	.type	_Z23Kogge_Stone_scan_kernelPiS_iiS_,@function
_Z23Kogge_Stone_scan_kernelPiS_iiS_:    ; @_Z23Kogge_Stone_scan_kernelPiS_iiS_
; %bb.0:
	s_clause 0x2
	s_load_b32 s6, s[0:1], 0x2c
	s_load_b64 s[4:5], s[0:1], 0x10
	s_load_b128 s[0:3], s[0:1], 0x0
	v_lshlrev_b32_e32 v3, 2, v0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s6, s6, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s6, v[0:1]
	v_cmp_gt_i32_e32 vcc_lo, s4, v1
	v_ashrrev_i32_e32 v2, 31, v1
	s_and_saveexec_b32 s4, vcc_lo
	s_cbranch_execz .LBB4_2
; %bb.1:
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[1:2]
	v_add_co_u32 v4, vcc_lo, s0, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s1, v5, vcc_lo
	global_load_b32 v4, v[4:5], off
	s_waitcnt vmcnt(0)
	ds_store_b32 v3, v4
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB4_2:
	s_or_b32 exec_lo, exec_lo, s4
	s_cmp_lt_u32 s6, 2
	s_cbranch_scc1 .LBB4_7
; %bb.3:                                ; %.lr.ph
	s_mov_b32 s0, 1
.LBB4_4:                                ; =>This Inner Loop Header: Depth=1
	s_mov_b32 s1, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_le_u32_e64 s0, v0
	s_cbranch_execz .LBB4_6
; %bb.5:                                ;   in Loop: Header=BB4_4 Depth=1
	v_subrev_nc_u32_e32 v4, s0, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_lshlrev_b32_e32 v4, 2, v4
	ds_load_b32 v4, v4
	ds_load_b32 v5, v3
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v4, v5, v4
	ds_store_b32 v3, v4
.LBB4_6:                                ;   in Loop: Header=BB4_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_lshl_b32 s0, s0, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_ge_u32 s0, s6
	s_cbranch_scc0 .LBB4_4
.LBB4_7:                                ; %._crit_edge
	s_add_i32 s0, s5, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cmp_gt_i32_e32 vcc_lo, s0, v1
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB4_9
; %bb.8:
	ds_load_b32 v3, v3
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[0:1], v3, off offset:4
.LBB4_9:
	s_or_b32 exec_lo, exec_lo, s0
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z23Kogge_Stone_scan_kernelPiS_iiS_
		.amdhsa_group_segment_fixed_size 400
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end4:
	.size	_Z23Kogge_Stone_scan_kernelPiS_iiS_, .Lfunc_end4-_Z23Kogge_Stone_scan_kernelPiS_iiS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 340
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 400 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z21Create_InvertedIndexAPiS_S_S_S_ ; -- Begin function _Z21Create_InvertedIndexAPiS_S_S_S_
	.globl	_Z21Create_InvertedIndexAPiS_S_S_S_
	.p2align	8
	.type	_Z21Create_InvertedIndexAPiS_S_S_S_,@function
_Z21Create_InvertedIndexAPiS_S_S_S_:    ; @_Z21Create_InvertedIndexAPiS_S_S_S_
; %bb.0:
	s_load_b128 s[4:7], s[0:1], 0x10
	v_lshlrev_b32_e32 v2, 2, v0
	s_cmp_eq_u32 s15, 0
	s_mov_b32 s2, 0
	s_cselect_b32 s3, -1, 0
	s_waitcnt lgkmcnt(0)
	s_clause 0x1
	global_load_b32 v1, v2, s[6:7]
	global_load_b32 v3, v2, s[4:5]
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v2, v3, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_lt_u32_e32 vcc_lo, v1, v2
	s_and_b32 s3, s3, vcc_lo
	s_and_saveexec_b32 s4, s3
	s_cbranch_execz .LBB5_3
; %bb.1:                                ; %.lr.ph
	s_load_b64 s[0:1], s[0:1], 0x20
	v_mov_b32_e32 v2, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[4:5], 2, v[1:2]
	v_add_nc_u32_e32 v2, 1, v0
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v4
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v5, vcc_lo
.LBB5_2:                                ; =>This Inner Loop Header: Depth=1
	v_add_nc_u32_e32 v3, -1, v3
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	global_store_b32 v[0:1], v2, off
	v_cmp_eq_u32_e32 vcc_lo, 0, v3
	v_add_co_u32 v0, s0, v0, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e64 v1, s0, 0, v1, s0
	s_or_b32 s2, vcc_lo, s2
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB5_2
.LBB5_3:                                ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z21Create_InvertedIndexAPiS_S_S_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 40
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end5:
	.size	_Z21Create_InvertedIndexAPiS_S_S_S_, .Lfunc_end5-_Z21Create_InvertedIndexAPiS_S_S_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 200
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z21Create_InvertedIndexBPiS_PdS_S_S_S0_ ; -- Begin function _Z21Create_InvertedIndexBPiS_PdS_S_S_S0_
	.globl	_Z21Create_InvertedIndexBPiS_PdS_S_S_S0_
	.p2align	8
	.type	_Z21Create_InvertedIndexBPiS_PdS_S_S_S0_,@function
_Z21Create_InvertedIndexBPiS_PdS_S_S_S0_: ; @_Z21Create_InvertedIndexBPiS_PdS_S_S_S0_
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x44
	s_load_b128 s[8:11], s[0:1], 0x20
	s_load_b128 s[4:7], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_barrier
	buffer_gl0_inv
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_load_b64 s[2:3], s[0:1], 0x10
	v_mov_b32_e32 v0, 1
	s_load_b64 s[0:1], s[0:1], 0x30
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	v_lshlrev_b64 v[1:2], 3, v[1:2]
	v_add_co_u32 v5, vcc_lo, s6, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v6, vcc_lo, s7, v4, vcc_lo
	global_load_b32 v5, v[5:6], off
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v6, 31, v5
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, s8, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s9, v6, vcc_lo
	v_add_co_u32 v3, vcc_lo, s4, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	global_atomic_add_u32 v0, v[5:6], v0, off offset:-4 glc
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v1, vcc_lo, s2, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s3, v2, vcc_lo
	global_load_b32 v6, v[3:4], off
	global_load_b64 v[2:3], v[1:2], off
	s_waitcnt vmcnt(2)
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[4:5], 2, v[0:1]
	v_lshlrev_b64 v[0:1], 3, v[0:1]
	v_add_co_u32 v4, vcc_lo, s10, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v5, vcc_lo, s11, v5, vcc_lo
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	s_waitcnt vmcnt(1)
	global_store_b32 v[4:5], v6, off
	s_waitcnt vmcnt(0)
	global_store_b64 v[0:1], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z21Create_InvertedIndexBPiS_PdS_S_S_S0_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 312
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end6:
	.size	_Z21Create_InvertedIndexBPiS_PdS_S_S_S0_, .Lfunc_end6-_Z21Create_InvertedIndexBPiS_PdS_S_S_S0_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 332
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z5knnTDPiPdS_S0_S0_S_  ; -- Begin function _Z5knnTDPiPdS_S0_S0_S_
	.globl	_Z5knnTDPiPdS_S0_S0_S_
	.p2align	8
	.type	_Z5knnTDPiPdS_S0_S0_S_,@function
_Z5knnTDPiPdS_S0_S0_S_:                 ; @_Z5knnTDPiPdS_S0_S0_S_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x3c
	s_load_b256 s[4:11], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, s15, s2, v[0:1]
	s_load_b128 s[12:15], s[0:1], 0x20
	s_mov_b32 s0, exec_lo
	v_ashrrev_i32_e32 v5, 31, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[4:5]
	v_add_co_u32 v0, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	global_load_b32 v2, v[0:1], off
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s14, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s15, v3, vcc_lo
	global_load_b64 v[2:3], v[2:3], off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e64 v2, v3
	s_cbranch_execz .LBB7_3
; %bb.1:                                ; %.lr.ph
	v_ashrrev_i32_e32 v3, 31, v2
	v_lshlrev_b64 v[4:5], 3, v[4:5]
	s_add_u32 s1, s14, 4
	s_addc_u32 s2, s15, 0
	s_mov_b32 s3, 0
	v_lshlrev_b64 v[6:7], 3, v[2:3]
	v_lshlrev_b64 v[8:9], 2, v[2:3]
	v_add_co_u32 v3, vcc_lo, s6, v4
	v_add_co_ci_u32_e32 v4, vcc_lo, s7, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v5, vcc_lo, s10, v6
	v_add_co_ci_u32_e32 v6, vcc_lo, s11, v7, vcc_lo
	v_add_co_u32 v7, vcc_lo, s8, v8
	v_add_co_ci_u32_e32 v8, vcc_lo, s9, v9, vcc_lo
.LBB7_2:                                ; =>This Inner Loop Header: Depth=1
	global_load_b32 v9, v[7:8], off
	global_load_b64 v[11:12], v[3:4], off
	global_load_b64 v[13:14], v[5:6], off
	v_add_nc_u32_e32 v2, 1, v2
	v_add_co_u32 v7, s0, v7, 4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v8, s0, 0, v8, s0
	s_waitcnt vmcnt(2)
	v_ashrrev_i32_e32 v10, 31, v9
	v_lshlrev_b64 v[9:10], 3, v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v9, vcc_lo, s12, v9
	v_add_co_ci_u32_e32 v10, vcc_lo, s13, v10, vcc_lo
	global_load_b64 v[15:16], v[9:10], off
	s_waitcnt vmcnt(0)
	v_fma_f64 v[11:12], v[11:12], v[13:14], v[15:16]
	global_store_b64 v[9:10], v[11:12], off
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	global_load_b32 v9, v[0:1], off
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v10, 31, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[9:10], 2, v[9:10]
	v_add_co_u32 v9, vcc_lo, s1, v9
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v10, vcc_lo, s2, v10, vcc_lo
	v_add_co_u32 v5, vcc_lo, v5, 8
	v_add_co_ci_u32_e32 v6, vcc_lo, 0, v6, vcc_lo
	global_load_b32 v9, v[9:10], off
	s_waitcnt vmcnt(0)
	v_cmp_ge_i32_e32 vcc_lo, v2, v9
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB7_2
.LBB7_3:                                ; %Flow43
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z5knnTDPiPdS_S0_S0_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 17
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end7:
	.size	_Z5knnTDPiPdS_S0_S0_S_, .Lfunc_end7-_Z5knnTDPiPdS_S0_S0_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 452
; NumSgprs: 18
; NumVgprs: 17
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 17
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z3knnPiPdS0_S0_d       ; -- Begin function _Z3knnPiPdS0_S0_d
	.globl	_Z3knnPiPdS0_S0_d
	.p2align	8
	.type	_Z3knnPiPdS0_S0_d,@function
_Z3knnPiPdS0_S0_d:                      ; @_Z3knnPiPdS0_S0_d
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x34
	s_load_b128 s[4:7], s[0:1], 0x10
	v_mov_b32_e32 v4, 0
	v_mov_b32_e32 v5, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_load_b64 s[2:3], s[0:1], 0x20
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	v_add_co_u32 v2, vcc_lo, s6, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v1, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_cmp_neq_f64_e64 s1, s[2:3], 0
	v_add_co_u32 v0, s0, s4, v0
	global_load_b64 v[2:3], v[2:3], off
	v_add_co_ci_u32_e64 v1, s0, s5, v1, s0
	s_waitcnt vmcnt(0)
	v_cmp_neq_f64_e32 vcc_lo, 0, v[2:3]
	s_and_b32 s1, s1, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB8_2
; %bb.1:
	global_load_b64 v[4:5], v[0:1], off
	v_mul_f64 v[2:3], v[2:3], s[2:3]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f64 v[6:7], null, v[2:3], v[2:3], v[4:5]
	v_rcp_f64_e32 v[8:9], v[6:7]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[10:11], -v[6:7], v[8:9], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], v[8:9], v[10:11], v[8:9]
	v_fma_f64 v[10:11], -v[6:7], v[8:9], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], v[8:9], v[10:11], v[8:9]
	v_div_scale_f64 v[10:11], vcc_lo, v[4:5], v[2:3], v[4:5]
	v_mul_f64 v[12:13], v[10:11], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], -v[6:7], v[12:13], v[10:11]
	v_div_fmas_f64 v[6:7], v[6:7], v[8:9], v[12:13]
	s_delay_alu instid0(VALU_DEP_1)
	v_div_fixup_f64 v[4:5], v[6:7], v[2:3], v[4:5]
.LBB8_2:
	s_or_b32 exec_lo, exec_lo, s0
	global_store_b64 v[0:1], v[4:5], off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z3knnPiPdS0_S0_d
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end8:
	.size	_Z3knnPiPdS0_S0_d, .Lfunc_end8-_Z3knnPiPdS0_S0_d
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 304
; NumSgprs: 18
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z9printlistPiS_S_      ; -- Begin function _Z9printlistPiS_S_
	.globl	_Z9printlistPiS_S_
	.p2align	8
	.type	_Z9printlistPiS_S_,@function
_Z9printlistPiS_S_:                     ; @_Z9printlistPiS_S_
; %bb.0:
	s_mov_b64 s[18:19], s[0:1]
	s_clause 0x3
	s_load_b32 s0, s[0:1], 0x24
	s_load_b64 s[28:29], s[18:19], 0x68
	s_load_b128 s[20:23], s[18:19], 0x0
	s_load_b64 s[26:27], s[18:19], 0x10
	v_mbcnt_lo_u32_b32 v40, -1, 0
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v7, 0
	s_mov_b32 s32, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_mov_b32_e32 v4, v40
	s_waitcnt lgkmcnt(0)
	s_and_b32 s0, s0, 0xffff
	v_mad_u64_u32 v[1:2], null, s15, s0, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v2, 31, v1
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v52, vcc_lo, s20, v0
	v_add_co_ci_u32_e32 v53, vcc_lo, s21, v1, vcc_lo
	global_load_b32 v0, v[52:53], off
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_add_co_u32 v0, vcc_lo, s26, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v1, vcc_lo, s27, v1, vcc_lo
	global_load_b32 v38, v[0:1], off
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v4
	v_cmp_eq_u32_e64 s0, s0, v4
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB9_6
; %bb.1:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[8:9], v0, s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[28:29] offset:40
	global_load_b64 v[5:6], v0, s[28:29]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v2, v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v3, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[6:7], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[6:7], v[8:9]
	s_cbranch_execz .LBB9_5
; %bb.2:                                ; %.preheader3.i.i.i.preheader
	s_mov_b32 s3, 0
.LBB9_3:                                ; %.preheader3.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[28:29] offset:40
	global_load_b64 v[10:11], v0, s[28:29]
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v8
	v_and_b32_e32 v7, v2, v9
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[10:11]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[2:3], null, v7, 24, v[1:2]
	v_mov_b32_e32 v6, v2
	global_load_b64 v[6:7], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[6:7], v0, v[6:9], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB9_3
; %bb.4:                                ; %Flow325
	s_or_b32 exec_lo, exec_lo, s3
.LBB9_5:                                ; %Flow327
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB9_6:                                ; %.loopexit4.i.i.i
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v5, 0
	v_readfirstlane_b32 s2, v6
	v_readfirstlane_b32 s3, v7
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[8:9], v5, s[28:29] offset:40
	global_load_b128 v[0:3], v5, s[28:29]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v8
	v_readfirstlane_b32 s5, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB9_8
; %bb.7:
	v_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, v5
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v10, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v11, vcc_lo, s8, v1, vcc_lo
	v_dual_mov_b32 v8, 2 :: v_dual_mov_b32 v9, 1
	global_store_b128 v[10:11], v[6:9], off offset:8
.LBB9_8:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[6:7], 6, v[4:5]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v2, v6
	s_mov_b32 s11, s8
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, v3, v7, vcc_lo
	v_dual_mov_b32 v4, 33 :: v_dual_mov_b32 v7, v5
	v_dual_mov_b32 v6, v5 :: v_dual_mov_b32 v13, s11
	v_dual_mov_b32 v12, s10 :: v_dual_mov_b32 v11, s9
	v_mov_b32_e32 v10, s8
	s_clause 0x3
	global_store_b128 v[8:9], v[4:7], off
	global_store_b128 v[8:9], v[10:13], off offset:16
	global_store_b128 v[8:9], v[10:13], off offset:32
	global_store_b128 v[8:9], v[10:13], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB9_15
; %bb.9:
	v_mov_b32_e32 v10, 0
	s_mov_b32 s5, exec_lo
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[28:29] offset:32 glc
	global_load_b64 v[2:3], v10, s[28:29] offset:40
	v_dual_mov_b32 v11, s2 :: v_dual_mov_b32 v12, s3
	s_waitcnt vmcnt(0)
	v_and_b32_e32 v3, s3, v3
	v_and_b32_e32 v2, s2, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, v3, 24
	v_mul_hi_u32 v4, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v4, v3
	v_add_co_u32 v6, vcc_lo, v0, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, v1, v3, vcc_lo
	global_store_b64 v[6:7], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[28:29] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB9_11
.LBB9_10:                               ; %.preheader1.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[28:29] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB9_10
.LBB9_11:                               ; %Flow323
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[28:29] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB9_13
; %bb.12:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB9_13:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB9_15
; %bb.14:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB9_15:                               ; %Flow324
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB9_16:                               ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB9_18
; %bb.17:                               ;   in Loop: Header=BB9_16 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB9_18:                               ;   in Loop: Header=BB9_16 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB9_20
; %bb.19:                               ;   in Loop: Header=BB9_16 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB9_21
.LBB9_20:                               ;   in Loop: Header=BB9_16 Depth=1
	s_mov_b32 s1, -1
.LBB9_21:                               ; %Flow318
                                        ;   in Loop: Header=BB9_16 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB9_16
; %bb.22:
	global_load_b64 v[0:1], v[8:9], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB9_26
; %bb.23:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[28:29] offset:40
	global_load_b64 v[9:10], v8, s[28:29] offset:24 glc
	global_load_b64 v[6:7], v8, s[28:29]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB9_26
; %bb.24:                               ; %.preheader.i.i.i.preheader
	s_mov_b32 s0, 0
.LBB9_25:                               ; %.preheader.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB9_25
.LBB9_26:                               ; %__ockl_printf_begin.exit
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.2@rel32@lo+4
	s_addc_u32 s1, s1, .str.2@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
	s_cmp_lg_u64 s[0:1], 0
	v_mov_b32_e32 v6, 0
	s_cselect_b32 s4, 12, 0
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v4, s4
	s_add_u32 s8, s18, 24
	s_addc_u32 s9, s19, 0
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[2:3]
	v_mov_b32_e32 v5, v40
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v5
	v_mov_b32_e32 v7, 0
	v_dual_mov_b32 v37, v1 :: v_dual_mov_b32 v8, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v5
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB9_32
; %bb.27:
	v_mov_b32_e32 v1, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[9:10], v1, s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[2:3], v1, s[28:29] offset:40
	global_load_b64 v[6:7], v1, s[28:29]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v2, v2, v9
	v_and_b32_e32 v3, v3, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v4, v2, 24
	v_mul_lo_u32 v3, v3, 24
	v_mul_lo_u32 v2, v2, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v4, v3
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v6, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, v7, v3, vcc_lo
	global_load_b64 v[7:8], v[2:3], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[7:8], v1, v[7:10], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[7:8], v[9:10]
	s_cbranch_execz .LBB9_31
; %bb.28:                               ; %.preheader3.i.i.i22.preheader
	s_mov_b32 s3, 0
.LBB9_29:                               ; %.preheader3.i.i.i22
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[2:3], v1, s[28:29] offset:40
	global_load_b64 v[11:12], v1, s[28:29]
	v_dual_mov_b32 v10, v8 :: v_dual_mov_b32 v9, v7
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v2, v9
	v_and_b32_e32 v8, v3, v10
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[6:7], null, v2, 24, v[11:12]
	v_mov_b32_e32 v2, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, v8, 24, v[2:3]
	v_mov_b32_e32 v7, v3
	global_load_b64 v[7:8], v[6:7], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[7:8], v1, v[7:10], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[9:10]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB9_29
; %bb.30:                               ; %Flow311
	s_or_b32 exec_lo, exec_lo, s3
.LBB9_31:                               ; %Flow313
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB9_32:                               ; %.loopexit4.i.i.i17
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v6, 0
	v_readfirstlane_b32 s2, v7
	v_readfirstlane_b32 s3, v8
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[9:10], v6, s[28:29] offset:40
	global_load_b128 v[1:4], v6, s[28:29]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v9
	v_readfirstlane_b32 s5, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB9_34
; %bb.33:
	v_dual_mov_b32 v7, s8 :: v_dual_mov_b32 v8, v6
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v11, vcc_lo, v1, s7
	v_add_co_ci_u32_e32 v12, vcc_lo, s8, v2, vcc_lo
	v_dual_mov_b32 v9, 2 :: v_dual_mov_b32 v10, 1
	global_store_b128 v[11:12], v[7:10], off offset:8
.LBB9_34:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[7:8], 6, v[5:6]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v3, vcc_lo, v3, s4
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v7, vcc_lo, v3, v7
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	s_mov_b32 s11, s8
	v_and_or_b32 v36, 0xffffff1d, v0, 34
	v_add_co_ci_u32_e32 v8, vcc_lo, v4, v8, vcc_lo
	v_mov_b32_e32 v39, v6
	v_dual_mov_b32 v3, s8 :: v_dual_mov_b32 v6, s11
	v_dual_mov_b32 v4, s9 :: v_dual_mov_b32 v5, s10
	s_clause 0x3
	global_store_b128 v[7:8], v[36:39], off
	global_store_b128 v[7:8], v[3:6], off offset:16
	global_store_b128 v[7:8], v[3:6], off offset:32
	global_store_b128 v[7:8], v[3:6], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB9_42
; %bb.35:
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v9, s2
	v_mov_b32_e32 v10, s3
	s_clause 0x1
	global_load_b64 v[11:12], v0, s[28:29] offset:32 glc
	global_load_b64 v[3:4], v0, s[28:29] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v3
	v_readfirstlane_b32 s9, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v7, vcc_lo, v1, s8
	v_add_co_ci_u32_e32 v8, vcc_lo, s9, v2, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[7:8], v[11:12], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[5:6], v0, v[9:12], s[28:29] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[5:6], v[11:12]
	s_cbranch_execz .LBB9_38
; %bb.36:                               ; %.preheader1.i.i.i20.preheader
	s_mov_b32 s8, 0
.LBB9_37:                               ; %.preheader1.i.i.i20
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v3, s2 :: v_dual_mov_b32 v4, s3
	s_sleep 1
	global_store_b64 v[7:8], v[5:6], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[3:4], v0, v[3:6], s[28:29] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[3:4], v[5:6]
	v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v5, v3
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB9_37
.LBB9_38:                               ; %Flow309
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v6, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v0, s8, 0
	global_load_b64 v[3:4], v6, s[28:29] offset:16
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB9_40
; %bb.39:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v5, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[3:4], v[5:6], off offset:8
.LBB9_40:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[5:6], v[3:4], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[5:6]
	s_cbranch_vccnz .LBB9_42
; %bb.41:
	global_load_b32 v3, v[3:4], off offset:24
	v_mov_b32_e32 v4, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v3
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[5:6], v[3:4], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB9_42:                               ; %Flow310
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v1, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB9_43:                               ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB9_45
; %bb.44:                               ;   in Loop: Header=BB9_43 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB9_45:                               ;   in Loop: Header=BB9_43 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB9_47
; %bb.46:                               ;   in Loop: Header=BB9_43 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB9_48
.LBB9_47:                               ;   in Loop: Header=BB9_43 Depth=1
	s_mov_b32 s1, -1
.LBB9_48:                               ; %Flow304
                                        ;   in Loop: Header=BB9_43 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB9_43
; %bb.49:
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB9_53
; %bb.50:
	v_mov_b32_e32 v6, 0
	s_clause 0x2
	global_load_b64 v[2:3], v6, s[28:29] offset:40
	global_load_b64 v[7:8], v6, s[28:29] offset:24 glc
	global_load_b64 v[4:5], v6, s[28:29]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v9, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v9, s2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v0, v0, v9
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v2, v0, v2
	v_mul_lo_u32 v3, v3, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v9, v2, 24
	v_mul_lo_u32 v2, v2, 24
	v_add_nc_u32_e32 v3, v9, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v7
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v8
	global_store_b64 v[4:5], v[7:8], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v6, v[0:3], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[7:8]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB9_53
; %bb.51:                               ; %.preheader.i.i.i19.preheader
	s_mov_b32 s0, 0
.LBB9_52:                               ; %.preheader.i.i.i19
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[7:8], v6, v[0:3], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3]
	v_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB9_52
.LBB9_53:                               ; %__ockl_printf_append_args.exit
	s_or_b32 exec_lo, exec_lo, s1
	global_load_b32 v38, v[52:53], off
	s_mov_b32 s20, exec_lo
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v39, 31, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[38:39]
	v_add_co_u32 v0, vcc_lo, s26, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s27, v1, vcc_lo
	global_load_b64 v[54:55], v[0:1], off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_i32_e64 v54, v55
	s_cbranch_execz .LBB9_137
; %bb.54:                               ; %.lr.ph
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.3@rel32@lo+4
	s_addc_u32 s1, s1, .str.3@rel32@hi+12
	v_dual_mov_b32 v43, 0 :: v_dual_mov_b32 v46, 2
	v_mov_b32_e32 v41, 33
	s_cmp_lg_u64 s[0:1], 0
	v_mov_b32_e32 v47, 1
	s_cselect_b32 s21, 10, 0
	s_add_u32 s33, s26, 4
	s_mov_b32 s24, 0
	s_addc_u32 s34, s27, 0
	s_mov_b32 s35, 0
.LBB9_55:                               ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB9_58 Depth 2
                                        ;     Child Loop BB9_66 Depth 2
                                        ;     Child Loop BB9_72 Depth 2
                                        ;     Child Loop BB9_81 Depth 2
                                        ;     Child Loop BB9_85 Depth 2
                                        ;     Child Loop BB9_93 Depth 2
                                        ;     Child Loop BB9_99 Depth 2
                                        ;     Child Loop BB9_108 Depth 2
                                        ;     Child Loop BB9_112 Depth 2
                                        ;     Child Loop BB9_120 Depth 2
                                        ;     Child Loop BB9_126 Depth 2
                                        ;     Child Loop BB9_135 Depth 2
	v_ashrrev_i32_e32 v55, 31, v54
	v_mov_b32_e32 v42, v40
	v_mov_b32_e32 v4, 0
	v_mov_b32_e32 v5, 0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[54:55]
	v_add_co_u32 v0, vcc_lo, s22, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v1, vcc_lo, s23, v1, vcc_lo
	global_load_b32 v50, v[0:1], off
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v42
	v_cmp_eq_u32_e64 s0, s0, v42
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB9_61
; %bb.56:                               ;   in Loop: Header=BB9_55 Depth=1
	global_load_b64 v[2:3], v43, s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[0:1], v43, s[28:29] offset:40
	global_load_b64 v[4:5], v43, s[28:29]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v3
	v_and_b32_e32 v0, v0, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v1, v1, 24
	v_mul_hi_u32 v6, v0, 24
	v_mul_lo_u32 v0, v0, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, v6, v1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, v5, v1, vcc_lo
	global_load_b64 v[0:1], v[0:1], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v43, v[0:3], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[4:5], v[2:3]
	s_cbranch_execz .LBB9_60
; %bb.57:                               ; %.preheader3.i.i.i35.preheader
                                        ;   in Loop: Header=BB9_55 Depth=1
	s_mov_b32 s3, 0
.LBB9_58:                               ; %.preheader3.i.i.i35
                                        ;   Parent Loop BB9_55 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[0:1], v43, s[28:29] offset:40
	global_load_b64 v[6:7], v43, s[28:29]
	v_dual_mov_b32 v2, v4 :: v_dual_mov_b32 v3, v5
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v0, v0, v2
	v_and_b32_e32 v1, v1, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, v0, 24, v[6:7]
	v_mov_b32_e32 v0, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[0:1]
	global_load_b64 v[0:1], v[4:5], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v43, v[0:3], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[2:3]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB9_58
; %bb.59:                               ; %Flow294
                                        ;   in Loop: Header=BB9_55 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
.LBB9_60:                               ; %Flow296
                                        ;   in Loop: Header=BB9_55 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB9_61:                               ; %.loopexit4.i.i.i30
                                        ;   in Loop: Header=BB9_55 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[6:7], v43, s[28:29] offset:40
	global_load_b128 v[0:3], v43, s[28:29]
	v_readfirstlane_b32 s2, v4
	v_readfirstlane_b32 s3, v5
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v6
	v_readfirstlane_b32 s5, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB9_63
; %bb.62:                               ;   in Loop: Header=BB9_55 Depth=1
	v_dual_mov_b32 v44, s8 :: v_dual_mov_b32 v45, v43
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v4, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v5, vcc_lo, s8, v1, vcc_lo
	global_store_b128 v[4:5], v[44:47], off offset:8
.LBB9_63:                               ;   in Loop: Header=BB9_55 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[4:5], 6, v[42:43]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s25, s24
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v2, v4
	s_mov_b32 s26, s24
	s_mov_b32 s27, s24
	v_add_co_ci_u32_e32 v7, vcc_lo, v3, v5, vcc_lo
	v_mov_b32_e32 v42, v43
	v_mov_b32_e32 v44, v43
	v_dual_mov_b32 v2, s24 :: v_dual_mov_b32 v5, s27
	v_dual_mov_b32 v3, s25 :: v_dual_mov_b32 v4, s26
	s_clause 0x3
	global_store_b128 v[6:7], v[41:44], off
	global_store_b128 v[6:7], v[2:5], off offset:16
	global_store_b128 v[6:7], v[2:5], off offset:32
	global_store_b128 v[6:7], v[2:5], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB9_71
; %bb.64:                               ;   in Loop: Header=BB9_55 Depth=1
	s_clause 0x1
	global_load_b64 v[12:13], v43, s[28:29] offset:32 glc
	global_load_b64 v[2:3], v43, s[28:29] offset:40
	v_dual_mov_b32 v10, s2 :: v_dual_mov_b32 v11, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v8, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[8:9], v[12:13], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v43, v[10:13], s[28:29] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[12:13]
	s_cbranch_execz .LBB9_67
; %bb.65:                               ; %.preheader1.i.i.i33.preheader
                                        ;   in Loop: Header=BB9_55 Depth=1
	s_mov_b32 s8, 0
.LBB9_66:                               ; %.preheader1.i.i.i33
                                        ;   Parent Loop BB9_55 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[8:9], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v43, v[2:5], s[28:29] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB9_66
.LBB9_67:                               ; %Flow292
                                        ;   in Loop: Header=BB9_55 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	global_load_b64 v[2:3], v43, s[28:29] offset:16
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB9_69
; %bb.68:                               ;   in Loop: Header=BB9_55 Depth=1
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v42, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[42:43], off offset:8
.LBB9_69:                               ;   in Loop: Header=BB9_55 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB9_71
; %bb.70:                               ;   in Loop: Header=BB9_55 Depth=1
	global_load_b32 v42, v[2:3], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v42
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[42:43], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB9_71:                               ; %Flow293
                                        ;   in Loop: Header=BB9_55 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB9_72:                               ;   Parent Loop BB9_55 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB9_74
; %bb.73:                               ;   in Loop: Header=BB9_72 Depth=2
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB9_74:                               ;   in Loop: Header=BB9_72 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB9_76
; %bb.75:                               ;   in Loop: Header=BB9_72 Depth=2
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB9_77
.LBB9_76:                               ;   in Loop: Header=BB9_72 Depth=2
	s_mov_b32 s1, -1
.LBB9_77:                               ; %Flow287
                                        ;   in Loop: Header=BB9_72 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB9_72
; %bb.78:                               ;   in Loop: Header=BB9_55 Depth=1
	global_load_b64 v[0:1], v[6:7], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB9_82
; %bb.79:                               ;   in Loop: Header=BB9_55 Depth=1
	s_clause 0x2
	global_load_b64 v[4:5], v43, s[28:29] offset:40
	global_load_b64 v[8:9], v43, s[28:29] offset:24 glc
	global_load_b64 v[6:7], v43, s[28:29]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v10, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v11, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v10, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v11, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v11 :: v_dual_cndmask_b32 v2, v2, v10
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v4, v2, v4
	v_mul_hi_u32 v10, v4, 24
	v_mul_lo_u32 v4, v4, 24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v8
	v_mul_lo_u32 v5, v5, 24
	v_add_nc_u32_e32 v5, v10, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v9
	global_store_b64 v[6:7], v[8:9], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v43, v[2:5], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[8:9]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB9_82
; %bb.80:                               ; %.preheader.i.i.i32.preheader
                                        ;   in Loop: Header=BB9_55 Depth=1
	s_mov_b32 s0, 0
.LBB9_81:                               ; %.preheader.i.i.i32
                                        ;   Parent Loop BB9_55 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[8:9], v43, v[2:5], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[8:9], v[4:5]
	v_dual_mov_b32 v4, v8 :: v_dual_mov_b32 v5, v9
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB9_81
.LBB9_82:                               ; %__ockl_printf_begin.exit36
                                        ;   in Loop: Header=BB9_55 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_add_u32 s8, s18, 24
	s_addc_u32 s9, s19, 0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.3@rel32@lo+4
	s_addc_u32 s1, s1, .str.3@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1)
	v_dual_mov_b32 v2, s0 :: v_dual_mov_b32 v3, s1
	v_dual_mov_b32 v4, s21 :: v_dual_mov_b32 v5, 0
	v_mov_b32_e32 v6, 0
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_swappc_b64 s[30:31], s[2:3]
	v_dual_mov_b32 v37, v1 :: v_dual_mov_b32 v42, v40
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v42
	v_mov_b32_e32 v5, 0
	v_mov_b32_e32 v6, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v42
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB9_88
; %bb.83:                               ;   in Loop: Header=BB9_55 Depth=1
	global_load_b64 v[3:4], v43, s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v43, s[28:29] offset:40
	global_load_b64 v[5:6], v43, s[28:29]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v2, v2, v4
	v_and_b32_e32 v1, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v2, v2, 24
	v_mul_hi_u32 v7, v1, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v7, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v5, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v6, v2, vcc_lo
	global_load_b64 v[1:2], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[5:6], v43, v[1:4], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[5:6], v[3:4]
	s_cbranch_execz .LBB9_87
; %bb.84:                               ; %.preheader3.i.i.i42.preheader
                                        ;   in Loop: Header=BB9_55 Depth=1
	s_mov_b32 s3, 0
.LBB9_85:                               ; %.preheader3.i.i.i42
                                        ;   Parent Loop BB9_55 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v43, s[28:29] offset:40
	global_load_b64 v[7:8], v43, s[28:29]
	v_dual_mov_b32 v3, v5 :: v_dual_mov_b32 v4, v6
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v1, v1, v3
	v_and_b32_e32 v2, v2, v4
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[7:8]
	v_mov_b32_e32 v1, v6
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[6:7], null, v2, 24, v[1:2]
	global_load_b64 v[1:2], v[5:6], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[5:6], v43, v[1:4], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[5:6], v[3:4]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB9_85
; %bb.86:                               ; %Flow280
                                        ;   in Loop: Header=BB9_55 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
.LBB9_87:                               ; %Flow282
                                        ;   in Loop: Header=BB9_55 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB9_88:                               ; %.loopexit4.i.i.i37
                                        ;   in Loop: Header=BB9_55 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[7:8], v43, s[28:29] offset:40
	global_load_b128 v[1:4], v43, s[28:29]
	v_readfirstlane_b32 s2, v5
	v_readfirstlane_b32 s3, v6
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v7
	v_readfirstlane_b32 s5, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB9_90
; %bb.89:                               ;   in Loop: Header=BB9_55 Depth=1
	v_dual_mov_b32 v44, s8 :: v_dual_mov_b32 v45, v43
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v5, vcc_lo, v1, s7
	v_add_co_ci_u32_e32 v6, vcc_lo, s8, v2, vcc_lo
	global_store_b128 v[5:6], v[44:47], off offset:8
.LBB9_90:                               ;   in Loop: Header=BB9_55 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[5:6], 6, v[42:43]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v3, vcc_lo, v3, s4
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	s_mov_b32 s25, s24
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v7, vcc_lo, v3, v5
	s_mov_b32 s26, s24
	s_mov_b32 s27, s24
	v_and_or_b32 v36, 0xffffff1f, v0, 32
	v_add_co_ci_u32_e32 v8, vcc_lo, v4, v6, vcc_lo
	v_mov_b32_e32 v39, v43
	v_dual_mov_b32 v3, s24 :: v_dual_mov_b32 v6, s27
	v_dual_mov_b32 v4, s25 :: v_dual_mov_b32 v5, s26
	s_clause 0x3
	global_store_b128 v[7:8], v[36:39], off
	global_store_b128 v[7:8], v[3:6], off offset:16
	global_store_b128 v[7:8], v[3:6], off offset:32
	global_store_b128 v[7:8], v[3:6], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB9_98
; %bb.91:                               ;   in Loop: Header=BB9_55 Depth=1
	s_clause 0x1
	global_load_b64 v[13:14], v43, s[28:29] offset:32 glc
	global_load_b64 v[3:4], v43, s[28:29] offset:40
	v_dual_mov_b32 v11, s2 :: v_dual_mov_b32 v12, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v3
	v_readfirstlane_b32 s9, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v9, vcc_lo, v1, s8
	v_add_co_ci_u32_e32 v10, vcc_lo, s9, v2, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[9:10], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[5:6], v43, v[11:14], s[28:29] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[5:6], v[13:14]
	s_cbranch_execz .LBB9_94
; %bb.92:                               ; %.preheader1.i.i.i40.preheader
                                        ;   in Loop: Header=BB9_55 Depth=1
	s_mov_b32 s8, 0
.LBB9_93:                               ; %.preheader1.i.i.i40
                                        ;   Parent Loop BB9_55 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_dual_mov_b32 v3, s2 :: v_dual_mov_b32 v4, s3
	s_sleep 1
	global_store_b64 v[9:10], v[5:6], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[3:4], v43, v[3:6], s[28:29] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[3:4], v[5:6]
	v_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v5, v3
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB9_93
.LBB9_94:                               ; %Flow278
                                        ;   in Loop: Header=BB9_55 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	global_load_b64 v[3:4], v43, s[28:29] offset:16
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v0, s8, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB9_96
; %bb.95:                               ;   in Loop: Header=BB9_55 Depth=1
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v42, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[3:4], v[42:43], off offset:8
.LBB9_96:                               ;   in Loop: Header=BB9_55 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[5:6], v[3:4], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[5:6]
	s_cbranch_vccnz .LBB9_98
; %bb.97:                               ;   in Loop: Header=BB9_55 Depth=1
	global_load_b32 v42, v[3:4], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v42
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[5:6], v[42:43], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB9_98:                               ; %Flow279
                                        ;   in Loop: Header=BB9_55 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v1, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB9_99:                               ;   Parent Loop BB9_55 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB9_101
; %bb.100:                              ;   in Loop: Header=BB9_99 Depth=2
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB9_101:                              ;   in Loop: Header=BB9_99 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB9_103
; %bb.102:                              ;   in Loop: Header=BB9_99 Depth=2
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB9_104
.LBB9_103:                              ;   in Loop: Header=BB9_99 Depth=2
	s_mov_b32 s1, -1
.LBB9_104:                              ; %Flow273
                                        ;   in Loop: Header=BB9_99 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB9_99
; %bb.105:                              ;   in Loop: Header=BB9_55 Depth=1
	global_load_b64 v[48:49], v[7:8], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB9_109
; %bb.106:                              ;   in Loop: Header=BB9_55 Depth=1
	s_clause 0x2
	global_load_b64 v[2:3], v43, s[28:29] offset:40
	global_load_b64 v[6:7], v43, s[28:29] offset:24 glc
	global_load_b64 v[4:5], v43, s[28:29]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v8, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v8, s2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v9 :: v_dual_cndmask_b32 v0, v0, v8
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v2, v0, v2
	v_mul_hi_u32 v8, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v6
	v_mul_lo_u32 v3, v3, 24
	v_add_nc_u32_e32 v3, v8, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v7
	global_store_b64 v[4:5], v[6:7], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v43, v[0:3], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[6:7]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB9_109
; %bb.107:                              ; %.preheader.i.i.i39.preheader
                                        ;   in Loop: Header=BB9_55 Depth=1
	s_mov_b32 s0, 0
.LBB9_108:                              ; %.preheader.i.i.i39
                                        ;   Parent Loop BB9_55 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[6:7], v43, v[0:3], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[2:3]
	v_dual_mov_b32 v2, v6 :: v_dual_mov_b32 v3, v7
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB9_108
.LBB9_109:                              ; %__ockl_printf_append_args.exit43
                                        ;   in Loop: Header=BB9_55 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v42, v40
	v_mov_b32_e32 v4, 0
	v_mov_b32_e32 v5, 0
	;;#ASMSTART
	;;#ASMEND
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s0, v42
	v_cmp_eq_u32_e64 s0, s0, v42
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB9_115
; %bb.110:                              ;   in Loop: Header=BB9_55 Depth=1
	global_load_b64 v[2:3], v43, s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[0:1], v43, s[28:29] offset:40
	global_load_b64 v[4:5], v43, s[28:29]
	s_mov_b32 s2, exec_lo
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v3
	v_and_b32_e32 v0, v0, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v1, v1, 24
	v_mul_hi_u32 v6, v0, 24
	v_mul_lo_u32 v0, v0, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, v6, v1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v0, vcc_lo, v4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, v5, v1, vcc_lo
	global_load_b64 v[0:1], v[0:1], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v43, v[0:3], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[4:5], v[2:3]
	s_cbranch_execz .LBB9_114
; %bb.111:                              ; %.preheader3.i.i.i49.preheader
                                        ;   in Loop: Header=BB9_55 Depth=1
	s_mov_b32 s3, 0
.LBB9_112:                              ; %.preheader3.i.i.i49
                                        ;   Parent Loop BB9_55 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[0:1], v43, s[28:29] offset:40
	global_load_b64 v[6:7], v43, s[28:29]
	v_dual_mov_b32 v2, v4 :: v_dual_mov_b32 v3, v5
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v0, v0, v2
	v_and_b32_e32 v1, v1, v3
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[4:5], null, v0, 24, v[6:7]
	v_mov_b32_e32 v0, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_mad_u64_u32 v[5:6], null, v1, 24, v[0:1]
	global_load_b64 v[0:1], v[4:5], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v43, v[0:3], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[2:3]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB9_112
; %bb.113:                              ; %Flow266
                                        ;   in Loop: Header=BB9_55 Depth=1
	s_or_b32 exec_lo, exec_lo, s3
.LBB9_114:                              ; %Flow268
                                        ;   in Loop: Header=BB9_55 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB9_115:                              ; %.loopexit4.i.i.i44
                                        ;   in Loop: Header=BB9_55 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_clause 0x1
	global_load_b64 v[6:7], v43, s[28:29] offset:40
	global_load_b128 v[0:3], v43, s[28:29]
	v_readfirstlane_b32 s2, v4
	v_readfirstlane_b32 s3, v5
	s_mov_b32 s8, exec_lo
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v6
	v_readfirstlane_b32 s5, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB9_117
; %bb.116:                              ;   in Loop: Header=BB9_55 Depth=1
	v_dual_mov_b32 v44, s8 :: v_dual_mov_b32 v45, v43
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v4, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v5, vcc_lo, s8, v1, vcc_lo
	global_store_b128 v[4:5], v[44:47], off offset:8
.LBB9_117:                              ;   in Loop: Header=BB9_55 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[4:5], 6, v[42:43]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s25, s24
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v2, v4
	s_mov_b32 s26, s24
	s_mov_b32 s27, s24
	v_and_or_b32 v48, 0xffffff1d, v48, 34
	v_add_co_ci_u32_e32 v7, vcc_lo, v3, v5, vcc_lo
	v_dual_mov_b32 v51, v43 :: v_dual_mov_b32 v2, s24
	v_dual_mov_b32 v3, s25 :: v_dual_mov_b32 v4, s26
	v_mov_b32_e32 v5, s27
	s_clause 0x3
	global_store_b128 v[6:7], v[48:51], off
	global_store_b128 v[6:7], v[2:5], off offset:16
	global_store_b128 v[6:7], v[2:5], off offset:32
	global_store_b128 v[6:7], v[2:5], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB9_125
; %bb.118:                              ;   in Loop: Header=BB9_55 Depth=1
	s_clause 0x1
	global_load_b64 v[10:11], v43, s[28:29] offset:32 glc
	global_load_b64 v[2:3], v43, s[28:29] offset:40
	v_dual_mov_b32 v8, s2 :: v_dual_mov_b32 v9, s3
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v6, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[6:7], v[10:11], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v43, v[8:11], s[28:29] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[10:11]
	s_cbranch_execz .LBB9_121
; %bb.119:                              ; %.preheader1.i.i.i47.preheader
                                        ;   in Loop: Header=BB9_55 Depth=1
	s_mov_b32 s8, 0
.LBB9_120:                              ; %.preheader1.i.i.i47
                                        ;   Parent Loop BB9_55 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v43, v[2:5], s[28:29] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB9_120
.LBB9_121:                              ; %Flow264
                                        ;   in Loop: Header=BB9_55 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	global_load_b64 v[2:3], v43, s[28:29] offset:16
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB9_123
; %bb.122:                              ;   in Loop: Header=BB9_55 Depth=1
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v42, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[42:43], off offset:8
.LBB9_123:                              ;   in Loop: Header=BB9_55 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB9_125
; %bb.124:                              ;   in Loop: Header=BB9_55 Depth=1
	global_load_b32 v42, v[2:3], off offset:24
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v42
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[42:43], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB9_125:                              ; %Flow265
                                        ;   in Loop: Header=BB9_55 Depth=1
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB9_126:                              ;   Parent Loop BB9_55 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB9_128
; %bb.127:                              ;   in Loop: Header=BB9_126 Depth=2
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB9_128:                              ;   in Loop: Header=BB9_126 Depth=2
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB9_130
; %bb.129:                              ;   in Loop: Header=BB9_126 Depth=2
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB9_131
.LBB9_130:                              ;   in Loop: Header=BB9_126 Depth=2
	s_mov_b32 s1, -1
.LBB9_131:                              ; %Flow259
                                        ;   in Loop: Header=BB9_126 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB9_126
; %bb.132:                              ;   in Loop: Header=BB9_55 Depth=1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB9_136
; %bb.133:                              ;   in Loop: Header=BB9_55 Depth=1
	s_clause 0x2
	global_load_b64 v[2:3], v43, s[28:29] offset:40
	global_load_b64 v[6:7], v43, s[28:29] offset:24 glc
	global_load_b64 v[4:5], v43, s[28:29]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v8, vcc_lo, v2, 1
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v8, s2
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]
	v_dual_cndmask_b32 v1, v1, v9 :: v_dual_cndmask_b32 v0, v0, v8
	v_and_b32_e32 v3, v1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v2, v0, v2
	v_mul_hi_u32 v8, v2, 24
	v_mul_lo_u32 v2, v2, 24
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_u32 v4, vcc_lo, v4, v2
	v_mov_b32_e32 v2, v6
	v_mul_lo_u32 v3, v3, 24
	v_add_nc_u32_e32 v3, v8, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo
	v_mov_b32_e32 v3, v7
	global_store_b64 v[4:5], v[6:7], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v43, v[0:3], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[2:3], v[6:7]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB9_136
; %bb.134:                              ; %.preheader.i.i.i46.preheader
                                        ;   in Loop: Header=BB9_55 Depth=1
	s_mov_b32 s0, 0
.LBB9_135:                              ; %.preheader.i.i.i46
                                        ;   Parent Loop BB9_55 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_sleep 1
	global_store_b64 v[4:5], v[2:3], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[6:7], v43, v[0:3], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[6:7], v[2:3]
	v_dual_mov_b32 v2, v6 :: v_dual_mov_b32 v3, v7
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB9_135
.LBB9_136:                              ; %__ockl_printf_append_args.exit50
                                        ;   in Loop: Header=BB9_55 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	global_load_b32 v38, v[52:53], off
	v_add_nc_u32_e32 v54, 1, v54
	s_waitcnt vmcnt(0)
	v_ashrrev_i32_e32 v39, 31, v38
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[38:39]
	v_add_co_u32 v0, vcc_lo, s33, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	v_add_co_ci_u32_e32 v1, vcc_lo, s34, v1, vcc_lo
	global_load_b32 v0, v[0:1], off
	s_waitcnt vmcnt(0)
	v_cmp_ge_i32_e32 vcc_lo, v54, v0
	s_or_b32 s35, vcc_lo, s35
	s_and_not1_b32 exec_lo, exec_lo, s35
	s_cbranch_execnz .LBB9_55
.LBB9_137:                              ; %Flow299
	s_or_b32 exec_lo, exec_lo, s20
; %bb.138:                              ; %._crit_edge
	;;#ASMSTART
	;;#ASMEND
	v_readfirstlane_b32 s0, v40
	v_mov_b32_e32 v4, 0
	v_mov_b32_e32 v5, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_eq_u32_e64 s0, s0, v40
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB9_144
; %bb.139:
	v_mov_b32_e32 v0, 0
	s_mov_b32 s2, exec_lo
	global_load_b64 v[6:7], v0, s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[28:29] offset:40
	global_load_b64 v[3:4], v0, s[28:29]
	s_waitcnt vmcnt(1)
	v_and_b32_e32 v1, v1, v6
	v_and_b32_e32 v2, v2, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v5, v1, 24
	v_mul_lo_u32 v2, v2, 24
	v_mul_lo_u32 v1, v1, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v5, v2
	s_waitcnt vmcnt(0)
	v_add_co_u32 v1, vcc_lo, v3, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, v4, v2, vcc_lo
	global_load_b64 v[4:5], v[1:2], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v0, v[4:7], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmpx_ne_u64_e64 v[4:5], v[6:7]
	s_cbranch_execz .LBB9_143
; %bb.140:                              ; %.preheader3.i.i.i28.preheader
	s_mov_b32 s3, 0
.LBB9_141:                              ; %.preheader3.i.i.i28
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	s_clause 0x1
	global_load_b64 v[1:2], v0, s[28:29] offset:40
	global_load_b64 v[8:9], v0, s[28:29]
	v_dual_mov_b32 v7, v5 :: v_dual_mov_b32 v6, v4
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_and_b32_e32 v1, v1, v6
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[3:4], null, v1, 24, v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v1, v4 :: v_dual_and_b32 v2, v2, v7
	v_mad_u64_u32 v[4:5], null, v2, 24, v[1:2]
	global_load_b64 v[4:5], v[3:4], off glc
	s_waitcnt vmcnt(0)
	global_atomic_cmpswap_b64 v[4:5], v0, v[4:7], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_cmp_eq_u64_e32 vcc_lo, v[4:5], v[6:7]
	s_or_b32 s3, vcc_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s3
	s_cbranch_execnz .LBB9_141
; %bb.142:                              ; %Flow252
	s_or_b32 exec_lo, exec_lo, s3
.LBB9_143:                              ; %Flow254
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
.LBB9_144:                              ; %.loopexit4.i.i.i23
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v41, 0
	v_readfirstlane_b32 s2, v4
	v_readfirstlane_b32 s3, v5
	s_mov_b32 s8, exec_lo
	s_clause 0x1
	global_load_b64 v[6:7], v41, s[28:29] offset:40
	global_load_b128 v[0:3], v41, s[28:29]
	s_waitcnt vmcnt(1)
	v_readfirstlane_b32 s4, v6
	v_readfirstlane_b32 s5, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[4:5], s[2:3], s[4:5]
	s_mul_i32 s1, s5, 24
	s_mul_hi_u32 s6, s4, 24
	s_mul_i32 s7, s4, 24
	s_and_saveexec_b32 s9, s0
	s_cbranch_execz .LBB9_146
; %bb.145:
	v_dual_mov_b32 v4, s8 :: v_dual_mov_b32 v5, v41
	s_add_i32 s8, s6, s1
	s_waitcnt vmcnt(0)
	v_add_co_u32 v8, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v9, vcc_lo, s8, v1, vcc_lo
	v_dual_mov_b32 v6, 2 :: v_dual_mov_b32 v7, 1
	global_store_b128 v[8:9], v[4:7], off offset:8
.LBB9_146:
	s_or_b32 exec_lo, exec_lo, s9
	s_lshl_b64 s[4:5], s[4:5], 12
	v_lshlrev_b64 v[4:5], 6, v[40:41]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v2, vcc_lo, v2, s4
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v2, v4
	s_mov_b32 s9, s8
	s_mov_b32 s10, s8
	s_mov_b32 s11, s8
	v_add_co_ci_u32_e32 v7, vcc_lo, v3, v5, vcc_lo
	v_dual_mov_b32 v40, 33 :: v_dual_mov_b32 v43, v41
	v_mov_b32_e32 v42, v41
	v_dual_mov_b32 v2, s8 :: v_dual_mov_b32 v5, s11
	v_dual_mov_b32 v3, s9 :: v_dual_mov_b32 v4, s10
	s_clause 0x3
	global_store_b128 v[6:7], v[40:43], off
	global_store_b128 v[6:7], v[2:5], off offset:16
	global_store_b128 v[6:7], v[2:5], off offset:32
	global_store_b128 v[6:7], v[2:5], off offset:48
	s_and_saveexec_b32 s4, s0
	s_cbranch_execz .LBB9_154
; %bb.147:
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, s2
	v_mov_b32_e32 v12, s3
	s_clause 0x1
	global_load_b64 v[13:14], v10, s[28:29] offset:32 glc
	global_load_b64 v[2:3], v10, s[28:29] offset:40
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s8, v2
	v_readfirstlane_b32 s9, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b64 s[8:9], s[8:9], s[2:3]
	s_mul_i32 s5, s9, 24
	s_mul_hi_u32 s9, s8, 24
	s_mul_i32 s8, s8, 24
	s_add_i32 s9, s9, s5
	v_add_co_u32 v8, vcc_lo, v0, s8
	v_add_co_ci_u32_e32 v9, vcc_lo, s9, v1, vcc_lo
	s_mov_b32 s5, exec_lo
	global_store_b64 v[8:9], v[13:14], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v10, v[11:14], s[28:29] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmpx_ne_u64_e64 v[4:5], v[13:14]
	s_cbranch_execz .LBB9_150
; %bb.148:                              ; %.preheader1.i.i.i26.preheader
	s_mov_b32 s8, 0
.LBB9_149:                              ; %.preheader1.i.i.i26
                                        ; =>This Inner Loop Header: Depth=1
	v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
	s_sleep 1
	global_store_b64 v[8:9], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[2:3], v10, v[2:5], s[28:29] offset:32 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[2:3], v[4:5]
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_or_b32 s8, vcc_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s8
	s_cbranch_execnz .LBB9_149
.LBB9_150:                              ; %Flow250
	s_or_b32 exec_lo, exec_lo, s5
	v_mov_b32_e32 v5, 0
	s_mov_b32 s8, exec_lo
	s_mov_b32 s5, exec_lo
	v_mbcnt_lo_u32_b32 v4, s8, 0
	global_load_b64 v[2:3], v5, s[28:29] offset:16
	v_cmpx_eq_u32_e32 0, v4
	s_cbranch_execz .LBB9_152
; %bb.151:
	s_bcnt1_i32_b32 s8, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v4, s8
	s_waitcnt vmcnt(0)
	global_atomic_add_u64 v[2:3], v[4:5], off offset:8
.LBB9_152:
	s_or_b32 exec_lo, exec_lo, s5
	s_waitcnt vmcnt(0)
	global_load_b64 v[4:5], v[2:3], off offset:16
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[4:5]
	s_cbranch_vccnz .LBB9_154
; %bb.153:
	global_load_b32 v2, v[2:3], off offset:24
	v_mov_b32_e32 v3, 0
	s_waitcnt vmcnt(0)
	v_readfirstlane_b32 s5, v2
	s_waitcnt_vscnt null, 0x0
	global_store_b64 v[4:5], v[2:3], off
	s_and_b32 m0, s5, 0xff
	s_sendmsg sendmsg(MSG_INTERRUPT)
.LBB9_154:                              ; %Flow251
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s6, s6, s1
	v_add_co_u32 v0, vcc_lo, v0, s7
	v_add_co_ci_u32_e32 v1, vcc_lo, s6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, v0, 20
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
.LBB9_155:                              ; =>This Inner Loop Header: Depth=1
	v_mov_b32_e32 v2, 1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB9_157
; %bb.156:                              ;   in Loop: Header=BB9_155 Depth=1
	global_load_b32 v2, v[0:1], off glc
	s_waitcnt vmcnt(0)
	buffer_gl1_inv
	buffer_gl0_inv
	v_and_b32_e32 v2, 1, v2
.LBB9_157:                              ;   in Loop: Header=BB9_155 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_readfirstlane_b32 s1, v2
	s_cmp_eq_u32 s1, 0
	s_cbranch_scc1 .LBB9_159
; %bb.158:                              ;   in Loop: Header=BB9_155 Depth=1
	s_mov_b32 s1, 0
	s_sleep 1
	s_branch .LBB9_160
.LBB9_159:                              ;   in Loop: Header=BB9_155 Depth=1
	s_mov_b32 s1, -1
.LBB9_160:                              ; %Flow245
                                        ;   in Loop: Header=BB9_155 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s1
	s_cbranch_vccnz .LBB9_155
; %bb.161:
	global_load_b64 v[0:1], v[6:7], off
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB9_165
; %bb.162:
	v_mov_b32_e32 v8, 0
	s_clause 0x2
	global_load_b64 v[4:5], v8, s[28:29] offset:40
	global_load_b64 v[9:10], v8, s[28:29] offset:24 glc
	global_load_b64 v[6:7], v8, s[28:29]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v11, vcc_lo, v4, 1
	v_add_co_ci_u32_e32 v12, vcc_lo, 0, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, v11, s2
	v_add_co_ci_u32_e32 v3, vcc_lo, s3, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]
	v_dual_cndmask_b32 v3, v3, v12 :: v_dual_cndmask_b32 v2, v2, v11
	v_and_b32_e32 v5, v3, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_and_b32_e32 v4, v2, v4
	v_mul_lo_u32 v5, v5, 24
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v11, v4, 24
	v_mul_lo_u32 v4, v4, 24
	v_add_nc_u32_e32 v5, v11, v5
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v6, v4
	v_mov_b32_e32 v4, v9
	v_add_co_ci_u32_e32 v7, vcc_lo, v7, v5, vcc_lo
	v_mov_b32_e32 v5, v10
	global_store_b64 v[6:7], v[9:10], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[4:5], v8, v[2:5], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_ne_u64_e32 vcc_lo, v[4:5], v[9:10]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB9_165
; %bb.163:                              ; %.preheader.i.i.i25.preheader
	s_mov_b32 s0, 0
.LBB9_164:                              ; %.preheader.i.i.i25
                                        ; =>This Inner Loop Header: Depth=1
	s_sleep 1
	global_store_b64 v[6:7], v[4:5], off
	s_waitcnt_vscnt null, 0x0
	global_atomic_cmpswap_b64 v[9:10], v8, v[2:5], s[28:29] offset:24 glc
	s_waitcnt vmcnt(0)
	v_cmp_eq_u64_e32 vcc_lo, v[9:10], v[4:5]
	v_dual_mov_b32 v4, v9 :: v_dual_mov_b32 v5, v10
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB9_164
.LBB9_165:                              ; %__ockl_printf_begin.exit29
	s_or_b32 exec_lo, exec_lo, s1
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, .str.4@rel32@lo+4
	s_addc_u32 s1, s1, .str.4@rel32@hi+12
	v_mov_b32_e32 v6, 1
	s_cmp_lg_u64 s[0:1], 0
	v_mov_b32_e32 v5, 0
	s_cselect_b32 s2, -1, 0
	v_mov_b32_e32 v3, s1
	v_cndmask_b32_e64 v2, 0, 1, s2
	s_add_u32 s8, s18, 24
	s_addc_u32 s9, s19, 0
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, __ockl_printf_append_string_n@rel32@lo+4
	s_addc_u32 s3, s3, __ockl_printf_append_string_n@rel32@hi+12
	v_lshlrev_b32_e32 v4, 1, v2
	v_mov_b32_e32 v2, s0
	s_swappc_b64 s[30:31], s[2:3]
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9printlistPiS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 56
		.amdhsa_next_free_sgpr 36
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end9:
	.size	_Z9printlistPiS_S_, .Lfunc_end9-_Z9printlistPiS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 8704
; NumSgprs: 38
; NumVgprs: 56
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 4
; VGPRBlocks: 6
; NumSGPRsForWavesPerEU: 38
; NumVGPRsForWavesPerEU: 56
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z10getDocNormPiS_PdS0_i ; -- Begin function _Z10getDocNormPiS_PdS0_i
	.globl	_Z10getDocNormPiS_PdS0_i
	.p2align	8
	.type	_Z10getDocNormPiS_PdS0_i,@function
_Z10getDocNormPiS_PdS0_i:               ; @_Z10getDocNormPiS_PdS0_i
; %bb.0:
	s_clause 0x2
	s_load_b32 s3, s[0:1], 0x34
	s_load_b32 s2, s[0:1], 0x20
	s_load_b128 s[4:7], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s3, 0xffff
	s_cmp_eq_u32 s2, 0
	v_mad_u64_u32 v[1:2], null, s15, s3, v[0:1]
	s_cbranch_scc1 .LBB10_5
; %bb.1:                                ; %.lr.ph.preheader
	s_load_b64 s[0:1], s[0:1], 0x0
	v_mov_b32_e32 v2, 0
	v_mov_b32_e32 v3, 0
	s_ashr_i32 s3, s2, 31
.LBB10_2:                               ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_waitcnt lgkmcnt(0)
	s_load_b32 s8, s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, s8, v1
	s_and_saveexec_b32 s8, vcc_lo
	s_cbranch_execz .LBB10_4
; %bb.3:                                ;   in Loop: Header=BB10_2 Depth=1
	s_load_b64 s[10:11], s[4:5], 0x0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[2:3], s[10:11], s[10:11], v[2:3]
.LBB10_4:                               ;   in Loop: Header=BB10_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s8
	s_add_u32 s2, s2, -1
	s_addc_u32 s3, s3, -1
	s_add_u32 s4, s4, 8
	s_addc_u32 s5, s5, 0
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmp_eq_u64 s[2:3], 0
	s_cbranch_scc0 .LBB10_2
	s_branch .LBB10_6
.LBB10_5:
	v_mov_b32_e32 v2, 0
	v_mov_b32_e32 v3, 0
.LBB10_6:                               ; %Flow32
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[2:3]
	s_barrier
	buffer_gl0_inv
	v_cndmask_b32_e64 v0, 0, 1, vcc_lo
	v_lshlrev_b32_e32 v0, 8, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[3:4], v[2:3], v0
	v_cndmask_b32_e64 v0, 0, 0xffffff80, vcc_lo
	v_ashrrev_i32_e32 v2, 31, v1
	v_rsq_f64_e32 v[5:6], v[3:4]
	v_cmp_class_f64_e64 vcc_lo, v[3:4], 0x260
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[7:8], v[3:4], v[5:6]
	v_mul_f64 v[5:6], v[5:6], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[9:10], -v[5:6], v[7:8], 0.5
	v_fma_f64 v[7:8], v[7:8], v[9:10], v[7:8]
	v_fma_f64 v[5:6], v[5:6], v[9:10], v[5:6]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[9:10], -v[7:8], v[7:8], v[3:4]
	v_fma_f64 v[7:8], v[9:10], v[5:6], v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[9:10], -v[7:8], v[7:8], v[3:4]
	v_fma_f64 v[5:6], v[9:10], v[5:6], v[7:8]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[5:6], v[5:6], v0
	v_lshlrev_b64 v[0:1], 3, v[1:2]
	v_dual_cndmask_b32 v3, v5, v3 :: v_dual_cndmask_b32 v4, v6, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	global_store_b64 v[0:1], v[3:4], off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10getDocNormPiS_PdS0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end10:
	.size	_Z10getDocNormPiS_PdS0_i, .Lfunc_end10-_Z10getDocNormPiS_PdS0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 408
; NumSgprs: 18
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z11oddEvenSortPdPii    ; -- Begin function _Z11oddEvenSortPdPii
	.globl	_Z11oddEvenSortPdPii
	.p2align	8
	.type	_Z11oddEvenSortPdPii,@function
_Z11oddEvenSortPdPii:                   ; @_Z11oddEvenSortPdPii
; %bb.0:
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x24
	s_load_b32 s4, s[0:1], 0x10
	s_lshl_b32 s5, s15, 1
	v_bfe_u32 v6, v0, 20, 10
	s_add_i32 s5, s5, 2
	v_mbcnt_lo_u32_b32 v10, -1, 0
	v_mov_b32_e32 v12, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s8, s2, 0xffff
	s_add_i32 s4, s4, -1
	s_mul_i32 s5, s5, s8
	v_cvt_f64_i32_e32 v[3:4], s4
	s_add_i32 s5, s5, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cvt_f64_u32_e32 v[1:2], s5
	s_load_b128 s[4:7], s[0:1], 0x0
	s_lshr_b32 s1, s2, 16
	s_and_b32 s0, s3, 0xffff
	s_mov_b32 s2, 0
	s_mov_b32 s3, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_min_f64 v[1:2], v[1:2], v[3:4]
	v_and_b32_e32 v3, 0x3ff, v0
	v_mad_u64_u32 v[4:5], null, s15, s8, v[3:4]
	s_delay_alu instid0(VALU_DEP_1)
	v_ashrrev_i32_e32 v5, 31, v4
	v_add_nc_u32_e32 v7, 1, v4
	v_lshlrev_b32_e32 v9, 1, v4
	v_cvt_i32_f64_e32 v8, v[1:2]
	v_bfe_u32 v2, v0, 10, 10
	v_lshlrev_b64 v[0:1], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_mad_u32_u24 v2, v6, s1, v2
	s_mul_i32 s1, s8, s1
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s6, v0
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	v_mad_u64_u32 v[5:6], null, v2, s8, v[3:4]
	s_bfe_i32 s1, s1, 0x180000
	global_store_b32 v[0:1], v7, off
	s_mul_i32 s0, s1, s0
	s_waitcnt_vscnt null, 0x0
	s_add_i32 s0, s0, 31
	s_barrier
	v_lshrrev_b32_e32 v0, 5, v5
	s_and_not1_b32 s0, s0, 31
	buffer_gl0_inv
	s_cmp_lg_u32 s0, 32
	v_cmp_lt_u32_e64 s0, 31, v5
	v_or_b32_e32 v11, v10, v0
	s_cselect_b32 s1, -1, 0
.LBB11_1:                               ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB11_10 Depth 2
	v_dual_mov_b32 v13, 0 :: v_dual_add_nc_u32 v6, s3, v9
	s_mov_b32 s8, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_lt_i32_e64 v6, v8
	s_cbranch_execz .LBB11_5
; %bb.2:                                ;   in Loop: Header=BB11_1 Depth=1
	v_ashrrev_i32_e32 v7, 31, v6
	v_mov_b32_e32 v13, 0
	s_mov_b32 s9, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[6:7]
	v_add_co_u32 v4, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v1, vcc_lo
	global_load_b128 v[0:3], v[4:5], off
	s_waitcnt vmcnt(0)
	v_cmpx_lt_f64_e32 v[0:1], v[2:3]
	s_cbranch_execz .LBB11_4
; %bb.3:                                ;   in Loop: Header=BB11_1 Depth=1
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	v_dual_mov_b32 v14, v2 :: v_dual_mov_b32 v15, v3
	v_dual_mov_b32 v16, v0 :: v_dual_mov_b32 v17, v1
	v_mov_b32_e32 v13, 1
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v6, vcc_lo, s6, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v7, vcc_lo
	global_load_b64 v[18:19], v[6:7], off
	s_waitcnt vmcnt(0)
	v_dual_mov_b32 v0, v19 :: v_dual_mov_b32 v1, v18
	global_store_b128 v[4:5], v[14:17], off
	global_store_b64 v[6:7], v[0:1], off
.LBB11_4:                               ; %Flow53
                                        ;   in Loop: Header=BB11_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s9
.LBB11_5:                               ;   in Loop: Header=BB11_1 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s8
	v_add_nc_u32_dpp v0, v13, v13 row_shl:1 row_mask:0xf bank_mask:0xf bound_ctrl:1
	s_and_not1_b32 vcc_lo, exec_lo, s1
	v_add_nc_u32_dpp v0, v0, v0 row_shl:2 row_mask:0xf bank_mask:0xf bound_ctrl:1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_dpp v0, v0, v0 row_shl:4 row_mask:0xf bank_mask:0xf bound_ctrl:1
	v_add_nc_u32_dpp v0, v0, v0 row_shl:8 row_mask:0xf bank_mask:0xf bound_ctrl:1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mov_b32_dpp v0, v0 row_share:0 row_mask:0xf bank_mask:0xf bound_ctrl:1
	v_permlanex16_b32 v1, v0, 0, 0 op_sel:[0,1]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v1, v0
	s_cbranch_vccnz .LBB11_14
; %bb.6:                                ;   in Loop: Header=BB11_1 Depth=1
	s_mov_b32 s8, exec_lo
	v_cmpx_eq_u32_e32 0, v11
	s_cbranch_execz .LBB11_8
; %bb.7:                                ;   in Loop: Header=BB11_1 Depth=1
	ds_store_b32 v12, v0
.LBB11_8:                               ;   in Loop: Header=BB11_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s8
	v_cmp_eq_u32_e32 vcc_lo, 0, v10
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_and_b32 s9, s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_saveexec_b32 s8, s9
	s_cbranch_execz .LBB11_13
; %bb.9:                                ;   in Loop: Header=BB11_1 Depth=1
	s_mov_b32 s10, exec_lo
	s_mov_b32 s9, 0
.LBB11_10:                              ; %ComputeLoop
                                        ;   Parent Loop BB11_1 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_ctz_i32_b32 s11, s10
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_readlane_b32 s12, v0, s11
	s_lshl_b32 s11, 1, s11
	s_and_not1_b32 s10, s10, s11
	s_delay_alu instid0(VALU_DEP_1)
	s_add_i32 s9, s9, s12
	s_cmp_lg_u32 s10, 0
	s_cbranch_scc1 .LBB11_10
; %bb.11:                               ; %ComputeEnd
                                        ;   in Loop: Header=BB11_1 Depth=1
	v_mbcnt_lo_u32_b32 v0, exec_lo, 0
	s_mov_b32 s10, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_eq_u32_e32 0, v0
	s_xor_b32 s10, exec_lo, s10
	s_cbranch_execz .LBB11_13
; %bb.12:                               ;   in Loop: Header=BB11_1 Depth=1
	v_mov_b32_e32 v0, s9
	ds_add_u32 v12, v0
.LBB11_13:                              ; %Flow51
                                        ;   in Loop: Header=BB11_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s8
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v0, v12
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB11_14:                              ; %_Z19__syncthreads_counti.exit
                                        ;   in Loop: Header=BB11_1 Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v0
	s_xor_b32 s3, s3, 1
	s_or_b32 s2, vcc_lo, s2
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB11_1
; %bb.15:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11oddEvenSortPdPii
		.amdhsa_group_segment_fixed_size 256
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 20
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end11:
	.size	_Z11oddEvenSortPdPii, .Lfunc_end11-_Z11oddEvenSortPdPii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 772
; NumSgprs: 18
; NumVgprs: 20
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 256 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 20
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.protected	_Z8classifyPiPdiS0_S_   ; -- Begin function _Z8classifyPiPdiS0_S_
	.globl	_Z8classifyPiPdiS0_S_
	.p2align	8
	.type	_Z8classifyPiPdiS0_S_,@function
_Z8classifyPiPdiS0_S_:                  ; @_Z8classifyPiPdiS0_S_
; %bb.0:
	s_load_b32 s4, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_cmp_eq_u32 s4, 0
	s_cbranch_scc1 .LBB12_5
; %bb.1:                                ; %.lr.ph
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x34
	s_load_b128 s[8:11], s[0:1], 0x18
	s_ashr_i32 s5, s4, 31
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, s15, s2, v[0:1]
	s_load_b128 s[0:3], s[0:1], 0x0
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[3:4]
	v_add_co_u32 v0, vcc_lo, s10, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s11, v1, vcc_lo
	global_load_b32 v2, v[0:1], off
	v_lshlrev_b64 v[0:1], 3, v[3:4]
	v_mov_b32_e32 v3, 0
	v_add_co_u32 v0, vcc_lo, s8, v0
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v1, vcc_lo, s9, v1, vcc_lo
.LBB12_2:                               ; =>This Inner Loop Header: Depth=1
	s_waitcnt lgkmcnt(0)
	s_load_b32 s6, s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_mul_hi_i32 s6, s6, 0x66666667
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_lshr_b32 s7, s6, 31
	s_ashr_i32 s6, s6, 2
	s_add_i32 s6, s6, s7
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e32 vcc_lo, s6, v2
	s_and_saveexec_b32 s6, vcc_lo
	s_cbranch_execz .LBB12_4
; %bb.3:                                ;   in Loop: Header=BB12_2 Depth=1
	global_load_b64 v[4:5], v3, s[2:3]
	global_load_b64 v[6:7], v[0:1], off
	s_waitcnt vmcnt(0)
	v_add_f64 v[4:5], v[4:5], v[6:7]
	global_store_b64 v[0:1], v[4:5], off
.LBB12_4:                               ;   in Loop: Header=BB12_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_add_u32 s4, s4, -1
	s_addc_u32 s5, s5, -1
	s_add_u32 s2, s2, 8
	s_addc_u32 s3, s3, 0
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmp_eq_u64 s[4:5], 0
	s_cbranch_scc0 .LBB12_2
.LBB12_5:                               ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8classifyPiPdiS0_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end12:
	.size	_Z8classifyPiPdiS0_S_, .Lfunc_end12-_Z8classifyPiPdiS0_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 284
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 1
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	.str,@object                    ; @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.str:
	.asciz	" %d"
	.size	.str, 4

	.type	.str.1,@object                  ; @.str.1
.str.1:
	.asciz	" %f"
	.size	.str.1, 4

	.type	.str.2,@object                  ; @.str.2
.str.2:
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__hip_cuid_:
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	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
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amdhsa.version:
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...

	.end_amdgpu_metadata
