#define MODE_MANDEL 1
#define MODE_MANDEL_DISTANCE 2
#define MODE_JULIA 3

#define WIDTH gridDim.x*blockDim.x
#define HEIGHT gridDim.y*blockDim.y
#define X ((blockIdx.x * blockDim.x) + threadIdx.x)
#define Y ((blockIdx.y * blockDim.y) + threadIdx.y)

__device__ inline double2 mul(const double2 pFF1, const double2 pFF2) {
    const double hi = pFF1.x;
    const double lo = pFF1.y;
    const double yhi = pFF2.x;
    const double ylo = pFF2.y;

       double t, tau, u, v, w;

           t = hi * yhi;            /* Highest order double term.  */

           if (t == 0) {
               return make_double2(0,0);
           }

           tau = fma(hi, yhi, -t);
           v = hi * ylo;
           w = lo * yhi;
           tau += v + w;        /* Add in other second-order terms.	 */
           u = t + tau;

       return make_double2(u, (t - u) + tau);
}

__device__ inline double2 mulDouble(const double2 pFF1, const double pDouble) {
    const double hi = pFF1.x;
    const double lo = pFF1.y;
    const double yhi = pDouble;

       double t, tau, u, w;

           t = hi * yhi;            /* Highest order double term.  */

           if (t == 0) {
               return make_double2(0,0);
           }

           tau = fma(hi, yhi, -t);
           w = lo * yhi;
           tau += w;        /* Add in other second-order terms.	 */
           u = t + tau;

       return make_double2(u, (t - u) + tau);
}


__device__ inline double2 add(const double2 pFF1, const double2 pFF2) {
    const double hi = pFF1.x;
    const double lo = pFF1.y;
    const double yhi = pFF2.x;
    const double ylo = pFF2.y;

        double z, q, zz, xh;

        z = hi + yhi;

        q = hi - z;
        zz = q + yhi + (hi - (q + z)) + lo + ylo;

        /* Keep -0 result.  */
        if (zz == 0.0) {
            return make_double2(z,0);
        }

        xh = z + zz;

    return make_double2(xh,z - xh + zz);

}

__device__ inline double2 addDouble(const double2 pFF1, const double y) {
    double hi = pFF1.x;
    double lo = pFF1.y;

        double z, q, zz, xh;

        z = hi + y;

        q = hi - z;
        zz = q + y + (hi - (q + z)) + lo;

        /* Keep -0 result.  */
        if (zz == 0.0) {
            return make_double2(z,0);
        }

        xh = z + zz;

    return make_double2(xh,z - xh + zz);
}

__device__ inline double2 sub(const double2 pFF1, const double2 pFF2) {
    return add(pFF1, make_double2(-pFF2.x, -pFF2.y));
}


extern "C"
__global__ void compute(
        int *iters,
        double *lastValuesR,
        double *lastValuesI,
        double *distancesR,
        double *distancesI,
        const int mode,
        const int4 tile,
        const double2 xStart,
        const double2 yStart,
        const double2 juliaCr,
        const double2 juliaCi,
        const double2 xInc,
        const double2 yInc,
        const int maxIterations,
        const double sqrEscapeRadius
) {

    if (X >= tile.z || Y >= tile.w) {      // tile.z is width of tile, tile.w is height of tile
        return;
    }


    const double2 x = add(make_double2(xStart.x, xStart.y), mulDouble(make_double2(xInc.x, xInc.y), X));
    const double2 y = add(make_double2(yStart.x, yStart.y), mulDouble(make_double2(yInc.x, yInc.y), Y));

    const double2 cr = mode == MODE_JULIA ? juliaCr : x;
    const double2 ci = mode == MODE_JULIA ? juliaCi : y;

    double2 zr = x;
    double2 zi = y;
    double2 tmp;

    // distance
    double2 dr = make_double2(1, 0);
    double2 di = make_double2(0, 0);
    double2 new_dr;

    int count = 0;

    for (; count < maxIterations; count++) {
        const double2 zrsqr = mul(zr, zr);
        const double2 zisqr = mul(zi, zi);

        if (add(zrsqr, zisqr).x >= sqrEscapeRadius) {
            break;
        }

        if (mode == MODE_MANDEL_DISTANCE) {
//            new_dr = 2.0f * (zr * dr - zi * di) + 1.0f;
            new_dr = addDouble(mulDouble(sub(mul(zr, dr), mul(zi, di)), 2.0), 1.0);
//            di = 2.0f * (zr * di + zi * dr);
            di = mulDouble(add(mul(zr, di), mul(zi, dr)), 2.0);
            dr = new_dr;
        }

        tmp = add(sub(zrsqr, zisqr), cr);
        zi = add(mulDouble(mul(zr, zi), 2.0), ci);
        zr = tmp;
    }

    const int tIndex = X + Y * tile.z;  // tile.z is width of tile
    iters[tIndex] = count;
    lastValuesR[tIndex] = (double) zr.x + (double) zr.y;
    lastValuesI[tIndex] = (double) zi.x + (double) zi.y;
    if (mode == MODE_MANDEL_DISTANCE) {
        distancesR[tIndex] = (double) dr.x + (double) dr.y;
        distancesI[tIndex] = (double) di.x + (double) di.y;
    }
}
	.file	"tmpxft_00309ebf_00000000-6_DDMandel.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2015:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2015:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z68__device_stub__Z7computePiPdS0_S0_S0_i4int47double2S2_S2_S2_S2_S2_idPiPdS0_S0_S0_iRK4int4RK7double2S6_S6_S6_S6_S6_id
	.type	_Z68__device_stub__Z7computePiPdS0_S0_S0_i4int47double2S2_S2_S2_S2_S2_idPiPdS0_S0_S0_iRK4int4RK7double2S6_S6_S6_S6_S6_id, @function
_Z68__device_stub__Z7computePiPdS0_S0_S0_i4int47double2S2_S2_S2_S2_S2_idPiPdS0_S0_S0_iRK4int4RK7double2S6_S6_S6_S6_S6_id:
.LFB2037:
	.cfi_startproc
	endbr64
	subq	$264, %rsp
	.cfi_def_cfa_offset 272
	movq	%rdi, 56(%rsp)
	leaq	80(%rsp), %rdi
	movq	%rsi, 48(%rsp)
	leaq	92(%rsp), %rsi
	movq	%rdx, 40(%rsp)
	leaq	64(%rsp), %rdx
	movq	%rcx, 32(%rsp)
	leaq	72(%rsp), %rcx
	movq	%r8, 24(%rsp)
	movl	%r9d, 20(%rsp)
	movsd	%xmm0, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 248(%rsp)
	xorl	%eax, %eax
	leaq	56(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 168(%rsp)
	movq	272(%rsp), %rax
	movq	%rax, 176(%rsp)
	movq	280(%rsp), %rax
	movq	%rax, 184(%rsp)
	movq	288(%rsp), %rax
	movq	%rax, 192(%rsp)
	movq	296(%rsp), %rax
	movq	%rax, 200(%rsp)
	movq	304(%rsp), %rax
	movq	%rax, 208(%rsp)
	movq	312(%rsp), %rax
	movq	%rax, 216(%rsp)
	movq	320(%rsp), %rax
	movq	%rax, 224(%rsp)
	leaq	328(%rsp), %rax
	movq	%rax, 232(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 240(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 80(%rsp)
	movl	$1, 88(%rsp)
	movq	%rax, 92(%rsp)
	movl	$1, 100(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	72(%rsp)
	.cfi_def_cfa_offset 280
	leaq	compute(%rip), %rdi
	pushq	72(%rsp)
	.cfi_def_cfa_offset 288
	movq	108(%rsp), %rcx
	movl	116(%rsp), %r8d
	movq	96(%rsp), %rsi
	movl	104(%rsp), %edx
	leaq	144(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 280
	popq	%rdx
	.cfi_def_cfa_offset 272
.L2:
	movq	248(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$264, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2037:
	.size	_Z68__device_stub__Z7computePiPdS0_S0_S0_i4int47double2S2_S2_S2_S2_S2_idPiPdS0_S0_S0_iRK4int4RK7double2S6_S6_S6_S6_S6_id, .-_Z68__device_stub__Z7computePiPdS0_S0_S0_i4int47double2S2_S2_S2_S2_S2_idPiPdS0_S0_S0_iRK4int4RK7double2S6_S6_S6_S6_S6_id
	.globl	compute
	.type	compute, @function
compute:
.LFB2038:
	.cfi_startproc
	endbr64
	subq	$72, %rsp
	.cfi_def_cfa_offset 80
	movl	128(%rsp), %eax
	movq	%xmm0, 48(%rsp)
	movq	%xmm1, 56(%rsp)
	movq	%xmm2, 32(%rsp)
	movq	%xmm3, 40(%rsp)
	movq	%xmm4, 16(%rsp)
	movq	%xmm5, 24(%rsp)
	movq	%xmm6, (%rsp)
	movq	%xmm7, 8(%rsp)
	pushq	%rax
	.cfi_def_cfa_offset 88
	leaq	120(%rsp), %rax
	pushq	%rax
	.cfi_def_cfa_offset 96
	leaq	112(%rsp), %rax
	pushq	%rax
	.cfi_def_cfa_offset 104
	leaq	24(%rsp), %rax
	pushq	%rax
	.cfi_def_cfa_offset 112
	leaq	48(%rsp), %rax
	pushq	%rax
	.cfi_def_cfa_offset 120
	leaq	72(%rsp), %rax
	pushq	%rax
	.cfi_def_cfa_offset 128
	leaq	96(%rsp), %rax
	pushq	%rax
	.cfi_def_cfa_offset 136
	leaq	136(%rsp), %rax
	pushq	%rax
	.cfi_def_cfa_offset 144
	movsd	200(%rsp), %xmm0
	call	_Z68__device_stub__Z7computePiPdS0_S0_S0_i4int47double2S2_S2_S2_S2_S2_idPiPdS0_S0_S0_iRK4int4RK7double2S6_S6_S6_S6_S6_id
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2038:
	.size	compute, .-compute
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"compute"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2040:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	compute(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2040:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#define MODE_MANDEL 1
#define MODE_MANDEL_DISTANCE 2
#define MODE_JULIA 3

#define WIDTH gridDim.x*blockDim.x
#define HEIGHT gridDim.y*blockDim.y
#define X ((blockIdx.x * blockDim.x) + threadIdx.x)
#define Y ((blockIdx.y * blockDim.y) + threadIdx.y)

__device__ inline double2 mul(const double2 pFF1, const double2 pFF2) {
    const double hi = pFF1.x;
    const double lo = pFF1.y;
    const double yhi = pFF2.x;
    const double ylo = pFF2.y;

       double t, tau, u, v, w;

           t = hi * yhi;            /* Highest order double term.  */

           if (t == 0) {
               return make_double2(0,0);
           }

           tau = fma(hi, yhi, -t);
           v = hi * ylo;
           w = lo * yhi;
           tau += v + w;        /* Add in other second-order terms.	 */
           u = t + tau;

       return make_double2(u, (t - u) + tau);
}

__device__ inline double2 mulDouble(const double2 pFF1, const double pDouble) {
    const double hi = pFF1.x;
    const double lo = pFF1.y;
    const double yhi = pDouble;

       double t, tau, u, w;

           t = hi * yhi;            /* Highest order double term.  */

           if (t == 0) {
               return make_double2(0,0);
           }

           tau = fma(hi, yhi, -t);
           w = lo * yhi;
           tau += w;        /* Add in other second-order terms.	 */
           u = t + tau;

       return make_double2(u, (t - u) + tau);
}


__device__ inline double2 add(const double2 pFF1, const double2 pFF2) {
    const double hi = pFF1.x;
    const double lo = pFF1.y;
    const double yhi = pFF2.x;
    const double ylo = pFF2.y;

        double z, q, zz, xh;

        z = hi + yhi;

        q = hi - z;
        zz = q + yhi + (hi - (q + z)) + lo + ylo;

        /* Keep -0 result.  */
        if (zz == 0.0) {
            return make_double2(z,0);
        }

        xh = z + zz;

    return make_double2(xh,z - xh + zz);

}

__device__ inline double2 addDouble(const double2 pFF1, const double y) {
    double hi = pFF1.x;
    double lo = pFF1.y;

        double z, q, zz, xh;

        z = hi + y;

        q = hi - z;
        zz = q + y + (hi - (q + z)) + lo;

        /* Keep -0 result.  */
        if (zz == 0.0) {
            return make_double2(z,0);
        }

        xh = z + zz;

    return make_double2(xh,z - xh + zz);
}

__device__ inline double2 sub(const double2 pFF1, const double2 pFF2) {
    return add(pFF1, make_double2(-pFF2.x, -pFF2.y));
}


extern "C"
__global__ void compute(
        int *iters,
        double *lastValuesR,
        double *lastValuesI,
        double *distancesR,
        double *distancesI,
        const int mode,
        const int4 tile,
        const double2 xStart,
        const double2 yStart,
        const double2 juliaCr,
        const double2 juliaCi,
        const double2 xInc,
        const double2 yInc,
        const int maxIterations,
        const double sqrEscapeRadius
) {

    if (X >= tile.z || Y >= tile.w) {      // tile.z is width of tile, tile.w is height of tile
        return;
    }


    const double2 x = add(make_double2(xStart.x, xStart.y), mulDouble(make_double2(xInc.x, xInc.y), X));
    const double2 y = add(make_double2(yStart.x, yStart.y), mulDouble(make_double2(yInc.x, yInc.y), Y));

    const double2 cr = mode == MODE_JULIA ? juliaCr : x;
    const double2 ci = mode == MODE_JULIA ? juliaCi : y;

    double2 zr = x;
    double2 zi = y;
    double2 tmp;

    // distance
    double2 dr = make_double2(1, 0);
    double2 di = make_double2(0, 0);
    double2 new_dr;

    int count = 0;

    for (; count < maxIterations; count++) {
        const double2 zrsqr = mul(zr, zr);
        const double2 zisqr = mul(zi, zi);

        if (add(zrsqr, zisqr).x >= sqrEscapeRadius) {
            break;
        }

        if (mode == MODE_MANDEL_DISTANCE) {
//            new_dr = 2.0f * (zr * dr - zi * di) + 1.0f;
            new_dr = addDouble(mulDouble(sub(mul(zr, dr), mul(zi, di)), 2.0), 1.0);
//            di = 2.0f * (zr * di + zi * dr);
            di = mulDouble(add(mul(zr, di), mul(zi, dr)), 2.0);
            dr = new_dr;
        }

        tmp = add(sub(zrsqr, zisqr), cr);
        zi = add(mulDouble(mul(zr, zi), 2.0), ci);
        zr = tmp;
    }

    const int tIndex = X + Y * tile.z;  // tile.z is width of tile
    iters[tIndex] = count;
    lastValuesR[tIndex] = (double) zr.x + (double) zr.y;
    lastValuesI[tIndex] = (double) zi.x + (double) zi.y;
    if (mode == MODE_MANDEL_DISTANCE) {
        distancesR[tIndex] = (double) dr.x + (double) dr.y;
        distancesI[tIndex] = (double) di.x + (double) di.y;
    }
}
	.text
	.file	"DDMandel.hip"
	.globl	__device_stub__compute          # -- Begin function __device_stub__compute
	.type	__device_stub__compute,@function
__device_stub__compute:                 # @__device_stub__compute
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$288, %rsp                      # imm = 0x120
	.cfi_def_cfa_offset 336
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	144(%rsp), %rax
	movsd	%xmm0, (%rax)
	movsd	%xmm1, 8(%rax)
	leaq	128(%rsp), %r10
	movsd	%xmm2, (%r10)
	movsd	%xmm3, 8(%r10)
	leaq	112(%rsp), %r11
	movsd	%xmm4, (%r11)
	movsd	%xmm5, 8(%r11)
	leaq	96(%rsp), %r14
	movsd	%xmm6, (%r14)
	movsd	%xmm7, 8(%r14)
	leaq	56(%rsp), %r15
	movq	%rdi, (%r15)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	4(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	160(%rsp), %rbx
	movq	%r15, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	336(%rsp), %rcx
	movq	%rcx, 48(%rbx)
	movq	%rax, 56(%rbx)
	movq	%r10, 64(%rbx)
	movq	%r11, 72(%rbx)
	movq	%r14, 80(%rbx)
	leaq	352(%rsp), %rax
	movq	%rax, 88(%rbx)
	leaq	368(%rsp), %rax
	movq	%rax, 96(%rbx)
	leaq	384(%rsp), %rax
	movq	%rax, 104(%rbx)
	leaq	392(%rsp), %rax
	movq	%rax, 112(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$compute, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$304, %rsp                      # imm = 0x130
	.cfi_adjust_cfa_offset -304
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	__device_stub__compute, .Lfunc_end0-__device_stub__compute
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB1_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB1_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$compute, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end1:
	.size	__hip_module_ctor, .Lfunc_end1-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB2_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB2_2:
	retq
.Lfunc_end2:
	.size	__hip_module_dtor, .Lfunc_end2-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	compute,@object                 # @compute
	.section	.rodata,"a",@progbits
	.globl	compute
	.p2align	3, 0x0
compute:
	.quad	__device_stub__compute
	.size	compute, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"compute"
	.size	.L__unnamed_1, 8

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __device_stub__compute
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym compute
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	compute                 ; -- Begin function compute
	.globl	compute
	.p2align	8
	.type	compute,@function
compute:                                ; @compute
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0xbc
	s_load_b32 s28, s[0:1], 0x38
	v_and_b32_e32 v1, 0x3ff, v0
	s_add_u32 s2, s0, 0xb0
	s_addc_u32 s3, s1, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[20:21], null, s14, s4, v[1:2]
	s_mov_b32 s4, exec_lo
	v_cmpx_gt_u32_e64 s28, v20
	s_cbranch_execz .LBB0_74
; %bb.1:
	s_load_b32 s2, s[2:3], 0xc
	s_load_b32 s3, s[0:1], 0x3c
	v_bfe_u32 v0, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s2, s2, 16
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[21:22], null, s15, s2, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u32_e32 vcc_lo, s3, v21
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_74
; %bb.2:
	v_cvt_f64_u32_e32 v[0:1], v20
	s_clause 0x1
	s_load_b256 s[20:27], s[0:1], 0x80
	s_load_b512 s[4:19], s[0:1], 0x40
	v_mov_b32_e32 v2, 0
	v_mov_b32_e32 v3, 0
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_dual_mov_b32 v5, v3 :: v_dual_mov_b32 v4, v2
	s_waitcnt lgkmcnt(0)
	v_mul_f64 v[6:7], s[20:21], v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_neq_f64_e32 0, v[6:7]
; %bb.3:
	v_fma_f64 v[2:3], s[20:21], v[0:1], -v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[0:1], s[22:23], v[0:1], v[2:3]
	v_add_f64 v[2:3], v[6:7], v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[4:5], v[6:7], -v[2:3]
	v_add_f64 v[4:5], v[0:1], v[4:5]
; %bb.4:                                ; %_Z9mulDouble15HIP_vector_typeIdLj2EEd.exit
	s_or_b32 exec_lo, exec_lo, s2
	v_add_f64 v[0:1], s[4:5], v[2:3]
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[6:7], s[4:5], -v[0:1]
	v_add_f64 v[8:9], v[0:1], v[6:7]
	v_add_f64 v[2:3], v[2:3], v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[6:7], s[4:5], -v[8:9]
	v_add_f64 v[2:3], v[2:3], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], s[6:7], v[2:3]
	v_add_f64 v[2:3], v[4:5], v[2:3]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_neq_f64_e32 0, v[2:3]
	s_xor_b32 s2, exec_lo, s2
; %bb.5:
	v_add_f64 v[4:5], v[0:1], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[0:1], v[0:1], -v[4:5]
	v_add_f64 v[6:7], v[2:3], v[0:1]
	v_dual_mov_b32 v0, v4 :: v_dual_mov_b32 v1, v5
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_mov_b32 v2, v6 :: v_dual_mov_b32 v3, v7
; %bb.6:                                ; %Flow505
	s_and_not1_saveexec_b32 s2, s2
; %bb.7:
	v_mov_b32_e32 v2, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v3, v2
; %bb.8:                                ; %_Z3add15HIP_vector_typeIdLj2EES0_.exit
	s_or_b32 exec_lo, exec_lo, s2
	v_cvt_f64_u32_e32 v[10:11], v21
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v7, 0
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6
	v_mul_f64 v[4:5], s[24:25], v[10:11]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_neq_f64_e32 0, v[4:5]
; %bb.9:
	v_fma_f64 v[6:7], s[24:25], v[10:11], -v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], s[26:27], v[10:11], v[6:7]
	v_add_f64 v[6:7], v[4:5], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[4:5], v[4:5], -v[6:7]
	v_add_f64 v[8:9], v[8:9], v[4:5]
; %bb.10:                               ; %_Z9mulDouble15HIP_vector_typeIdLj2EEd.exit202
	s_or_b32 exec_lo, exec_lo, s2
	v_add_f64 v[4:5], s[8:9], v[6:7]
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[10:11], s[8:9], -v[4:5]
	v_add_f64 v[12:13], v[4:5], v[10:11]
	v_add_f64 v[6:7], v[6:7], v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[10:11], s[8:9], -v[12:13]
	v_add_f64 v[6:7], v[6:7], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[6:7], s[10:11], v[6:7]
	v_add_f64 v[6:7], v[8:9], v[6:7]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_neq_f64_e32 0, v[6:7]
	s_xor_b32 s2, exec_lo, s2
; %bb.11:
	v_add_f64 v[8:9], v[4:5], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[4:5], v[4:5], -v[8:9]
	v_add_f64 v[10:11], v[6:7], v[4:5]
	v_dual_mov_b32 v4, v8 :: v_dual_mov_b32 v5, v9
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_mov_b32 v6, v10 :: v_dual_mov_b32 v7, v11
; %bb.12:                               ; %Flow504
	s_and_not1_saveexec_b32 s2, s2
; %bb.13:
	v_mov_b32_e32 v6, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_mov_b32_e32 v7, v6
; %bb.14:                               ; %_Z3add15HIP_vector_typeIdLj2EES0_.exit211
	s_or_b32 exec_lo, exec_lo, s2
	s_clause 0x1
	s_load_b32 s10, s[0:1], 0xa0
	s_load_b32 s3, s[0:1], 0x28
	v_mov_b32_e32 v32, 0
	v_dual_mov_b32 v33, 0 :: v_dual_mov_b32 v8, 0
	s_mov_b32 s4, 0
	s_mov_b32 s5, 0x3ff00000
	s_mov_b32 s6, s4
	s_mov_b32 s7, s4
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s10, 1
	s_cbranch_scc1 .LBB0_71
; %bb.15:                               ; %.lr.ph
	s_load_b64 s[8:9], s[0:1], 0xa8
	v_dual_mov_b32 v28, 0 :: v_dual_mov_b32 v15, s7
	v_dual_mov_b32 v29, 0 :: v_dual_mov_b32 v14, s6
	s_cmp_eq_u32 s3, 3
	v_mov_b32_e32 v10, 0
	s_cselect_b32 s2, -1, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_mov_b32 v35, v29 :: v_dual_mov_b32 v34, v28
	v_mov_b32_e32 v33, v29
	v_cndmask_b32_e64 v23, v5, s17, s2
	v_cndmask_b32_e64 v22, v4, s16, s2
	v_cndmask_b32_e64 v25, v7, s19, s2
	v_cndmask_b32_e64 v24, v6, s18, s2
	v_cndmask_b32_e64 v27, v1, s13, s2
	v_cndmask_b32_e64 v26, v0, s12, s2
	v_cndmask_b32_e64 v31, v3, s15, s2
	v_cndmask_b32_e64 v30, v2, s14, s2
	v_dual_mov_b32 v13, s5 :: v_dual_mov_b32 v12, s4
	v_mov_b32_e32 v32, v28
	s_cmp_eq_u32 s3, 2
	s_mov_b32 s6, s4
	s_cselect_b32 s5, -1, 0
.LBB0_16:                               ; =>This Inner Loop Header: Depth=1
	v_mul_f64 v[8:9], v[0:1], v[0:1]
	v_dual_mov_b32 v37, v29 :: v_dual_mov_b32 v36, v28
	v_dual_mov_b32 v39, v29 :: v_dual_mov_b32 v38, v28
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_cmpx_neq_f64_e32 0, v[8:9]
; %bb.17:                               ;   in Loop: Header=BB0_16 Depth=1
	v_fma_f64 v[16:17], v[0:1], v[0:1], -v[8:9]
	v_mul_f64 v[18:19], v[0:1], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[16:17], v[18:19], 2.0, v[16:17]
	v_add_f64 v[36:37], v[8:9], v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[8:9], -v[36:37]
	v_add_f64 v[38:39], v[16:17], v[8:9]
; %bb.18:                               ; %_Z3mul15HIP_vector_typeIdLj2EES0_.exit
                                        ;   in Loop: Header=BB0_16 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	v_mul_f64 v[8:9], v[4:5], v[4:5]
	v_mov_b32_e32 v40, 0
	v_mov_b32_e32 v41, 0
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_dual_mov_b32 v43, v41 :: v_dual_mov_b32 v42, v40
	v_cmpx_neq_f64_e32 0, v[8:9]
; %bb.19:                               ;   in Loop: Header=BB0_16 Depth=1
	v_fma_f64 v[16:17], v[4:5], v[4:5], -v[8:9]
	v_mul_f64 v[18:19], v[4:5], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[16:17], v[18:19], 2.0, v[16:17]
	v_add_f64 v[40:41], v[8:9], v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[8:9], -v[40:41]
	v_add_f64 v[42:43], v[16:17], v[8:9]
; %bb.20:                               ; %_Z3mul15HIP_vector_typeIdLj2EES0_.exit227
                                        ;   in Loop: Header=BB0_16 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	v_add_f64 v[8:9], v[36:37], v[40:41]
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[16:17], v[36:37], -v[8:9]
	v_add_f64 v[18:19], v[8:9], v[16:17]
	v_add_f64 v[16:17], v[40:41], v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[18:19], v[36:37], -v[18:19]
	v_add_f64 v[16:17], v[16:17], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[16:17], v[38:39], v[16:17]
	v_add_f64 v[16:17], v[42:43], v[16:17]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_neq_f64_e32 0, v[16:17]
	s_xor_b32 s2, exec_lo, s2
; %bb.21:                               ;   in Loop: Header=BB0_16 Depth=1
	v_add_f64 v[8:9], v[8:9], v[16:17]
; %bb.22:                               ; %Flow500
                                        ;   in Loop: Header=BB0_16 Depth=1
	s_and_not1_saveexec_b32 s2, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s2
	s_waitcnt lgkmcnt(0)
	v_cmp_nle_f64_e64 s2, s[8:9], v[8:9]
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s7, s2
	s_cbranch_execz .LBB0_67
; %bb.23:                               ;   in Loop: Header=BB0_16 Depth=1
	s_and_not1_b32 vcc_lo, exec_lo, s5
	s_cbranch_vccnz .LBB0_49
; %bb.24:                               ;   in Loop: Header=BB0_16 Depth=1
	v_mul_f64 v[44:45], v[12:13], v[0:1]
	v_mov_b32_e32 v8, 0
	v_mov_b32_e32 v9, 0
	s_mov_b32 s11, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v17, v9 :: v_dual_mov_b32 v16, v8
	v_dual_mov_b32 v19, v9 :: v_dual_mov_b32 v18, v8
	v_cmpx_neq_f64_e32 0, v[44:45]
; %bb.25:                               ;   in Loop: Header=BB0_16 Depth=1
	v_mul_f64 v[16:17], v[12:13], v[2:3]
	v_fma_f64 v[18:19], v[0:1], v[12:13], -v[44:45]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[16:17], v[14:15], v[0:1], v[16:17]
	v_add_f64 v[18:19], v[18:19], v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[16:17], v[44:45], v[18:19]
	v_add_f64 v[44:45], v[44:45], -v[16:17]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[18:19], v[18:19], v[44:45]
; %bb.26:                               ; %_Z3mul15HIP_vector_typeIdLj2EES0_.exit245
                                        ;   in Loop: Header=BB0_16 Depth=1
	s_or_b32 exec_lo, exec_lo, s11
	v_mul_f64 v[44:45], v[34:35], v[4:5]
	v_dual_mov_b32 v47, v9 :: v_dual_mov_b32 v46, v8
	s_mov_b32 s11, exec_lo
	s_delay_alu instid0(VALU_DEP_2)
	v_cmpx_neq_f64_e32 0, v[44:45]
; %bb.27:                               ;   in Loop: Header=BB0_16 Depth=1
	v_mul_f64 v[8:9], v[34:35], v[6:7]
	v_fma_f64 v[46:47], v[4:5], v[34:35], -v[44:45]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], v[32:33], v[4:5], v[8:9]
	v_add_f64 v[46:47], v[46:47], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[44:45], v[46:47]
	v_add_f64 v[44:45], v[44:45], -v[8:9]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[46:47], v[46:47], v[44:45]
; %bb.28:                               ; %_Z3mul15HIP_vector_typeIdLj2EES0_.exit254
                                        ;   in Loop: Header=BB0_16 Depth=1
	s_or_b32 exec_lo, exec_lo, s11
	v_add_f64 v[44:45], v[16:17], -v[8:9]
	s_mov_b32 s11, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[48:49], v[16:17], -v[44:45]
	v_add_f64 v[50:51], v[44:45], v[48:49]
	v_add_f64 v[8:9], v[48:49], -v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[16:17], v[16:17], -v[50:51]
	v_add_f64 v[8:9], v[8:9], v[16:17]
                                        ; implicit-def: $vgpr16_vgpr17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[18:19], v[8:9]
	v_add_f64 v[18:19], v[8:9], -v[46:47]
                                        ; implicit-def: $vgpr8_vgpr9
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_neq_f64_e32 0, v[18:19]
	s_xor_b32 s11, exec_lo, s11
; %bb.29:                               ;   in Loop: Header=BB0_16 Depth=1
	v_add_f64 v[16:17], v[44:45], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[44:45], -v[16:17]
                                        ; implicit-def: $vgpr44_vgpr45
	v_add_f64 v[8:9], v[18:19], v[8:9]
; %bb.30:                               ; %Flow497
                                        ;   in Loop: Header=BB0_16 Depth=1
	s_and_not1_saveexec_b32 s11, s11
; %bb.31:                               ;   in Loop: Header=BB0_16 Depth=1
	v_mov_b32_e32 v8, 0
	v_dual_mov_b32 v9, 0 :: v_dual_mov_b32 v16, v44
	v_mov_b32_e32 v17, v45
; %bb.32:                               ; %_Z3sub15HIP_vector_typeIdLj2EES0_.exit
                                        ;   in Loop: Header=BB0_16 Depth=1
	s_or_b32 exec_lo, exec_lo, s11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_f64 v[46:47], v[16:17], v[16:17]
	v_mov_b32_e32 v18, 0
	v_mov_b32_e32 v19, 0
	s_mov_b32 s11, exec_lo
	v_dual_mov_b32 v45, v19 :: v_dual_mov_b32 v44, v18
	s_delay_alu instid0(VALU_DEP_4)
	v_cmpx_neq_f64_e32 0, v[46:47]
; %bb.33:                               ;   in Loop: Header=BB0_16 Depth=1
	v_fma_f64 v[16:17], v[16:17], 2.0, -v[46:47]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], v[8:9], 2.0, v[16:17]
	v_add_f64 v[18:19], v[46:47], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[16:17], v[46:47], -v[18:19]
	v_add_f64 v[44:45], v[8:9], v[16:17]
; %bb.34:                               ; %_Z9mulDouble15HIP_vector_typeIdLj2EEd.exit262
                                        ;   in Loop: Header=BB0_16 Depth=1
	s_or_b32 exec_lo, exec_lo, s11
	v_add_f64 v[8:9], v[18:19], 1.0
	s_mov_b32 s11, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[16:17], v[18:19], -v[8:9]
	v_add_f64 v[46:47], v[8:9], v[16:17]
	v_add_f64 v[16:17], v[16:17], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[18:19], v[18:19], -v[46:47]
	v_add_f64 v[16:17], v[16:17], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[44:45], v[44:45], v[16:17]
                                        ; implicit-def: $vgpr16_vgpr17_vgpr18_vgpr19
	v_cmpx_neq_f64_e32 0, v[44:45]
	s_xor_b32 s11, exec_lo, s11
; %bb.35:                               ;   in Loop: Header=BB0_16 Depth=1
	v_add_f64 v[16:17], v[8:9], v[44:45]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[8:9], -v[16:17]
	v_add_f64 v[18:19], v[44:45], v[8:9]
; %bb.36:                               ; %Flow496
                                        ;   in Loop: Header=BB0_16 Depth=1
	s_and_not1_saveexec_b32 s11, s11
; %bb.37:                               ;   in Loop: Header=BB0_16 Depth=1
	v_mov_b32_e32 v11, v10
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v19, v11 :: v_dual_mov_b32 v18, v10
	v_dual_mov_b32 v17, v9 :: v_dual_mov_b32 v16, v8
; %bb.38:                               ; %_Z9addDouble15HIP_vector_typeIdLj2EEd.exit
                                        ;   in Loop: Header=BB0_16 Depth=1
	s_or_b32 exec_lo, exec_lo, s11
	v_mul_f64 v[48:49], v[34:35], v[0:1]
	v_mov_b32_e32 v46, 0
	v_mov_b32_e32 v47, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mov_b32_e32 v8, v46
	v_mov_b32_e32 v44, v46
	s_mov_b32 s11, exec_lo
	v_mov_b32_e32 v45, v47
	v_mov_b32_e32 v9, v47
	v_cmpx_neq_f64_e32 0, v[48:49]
; %bb.39:                               ;   in Loop: Header=BB0_16 Depth=1
	v_mul_f64 v[8:9], v[34:35], v[2:3]
	v_fma_f64 v[34:35], v[0:1], v[34:35], -v[48:49]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], v[32:33], v[0:1], v[8:9]
	v_add_f64 v[32:33], v[34:35], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[48:49], v[32:33]
	v_add_f64 v[34:35], v[48:49], -v[8:9]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[44:45], v[32:33], v[34:35]
; %bb.40:                               ; %_Z3mul15HIP_vector_typeIdLj2EES0_.exit276
                                        ;   in Loop: Header=BB0_16 Depth=1
	s_or_b32 exec_lo, exec_lo, s11
	v_mul_f64 v[32:33], v[12:13], v[4:5]
	v_dual_mov_b32 v34, v46 :: v_dual_mov_b32 v35, v47
	s_mov_b32 s11, exec_lo
	s_delay_alu instid0(VALU_DEP_2)
	v_cmpx_neq_f64_e32 0, v[32:33]
; %bb.41:                               ;   in Loop: Header=BB0_16 Depth=1
	v_mul_f64 v[34:35], v[12:13], v[6:7]
	v_fma_f64 v[11:12], v[4:5], v[12:13], -v[32:33]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[13:14], v[14:15], v[4:5], v[34:35]
	v_add_f64 v[11:12], v[11:12], v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[46:47], v[32:33], v[11:12]
	v_add_f64 v[13:14], v[32:33], -v[46:47]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[34:35], v[11:12], v[13:14]
; %bb.42:                               ; %_Z3mul15HIP_vector_typeIdLj2EES0_.exit285
                                        ;   in Loop: Header=BB0_16 Depth=1
	s_or_b32 exec_lo, exec_lo, s11
	v_add_f64 v[13:14], v[8:9], v[46:47]
	s_mov_b32 s11, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[11:12], v[8:9], -v[13:14]
	v_add_f64 v[32:33], v[13:14], v[11:12]
	v_add_f64 v[11:12], v[46:47], v[11:12]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[8:9], -v[32:33]
	v_add_f64 v[8:9], v[11:12], v[8:9]
                                        ; implicit-def: $vgpr11_vgpr12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[44:45], v[8:9]
	v_add_f64 v[32:33], v[34:35], v[8:9]
                                        ; implicit-def: $vgpr8_vgpr9
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_neq_f64_e32 0, v[32:33]
	s_xor_b32 s11, exec_lo, s11
; %bb.43:                               ;   in Loop: Header=BB0_16 Depth=1
	v_add_f64 v[11:12], v[13:14], v[32:33]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[13:14], -v[11:12]
                                        ; implicit-def: $vgpr13_vgpr14
	v_add_f64 v[8:9], v[32:33], v[8:9]
; %bb.44:                               ; %Flow495
                                        ;   in Loop: Header=BB0_16 Depth=1
	s_and_not1_saveexec_b32 s11, s11
; %bb.45:                               ;   in Loop: Header=BB0_16 Depth=1
	v_dual_mov_b32 v8, 0 :: v_dual_mov_b32 v11, v13
	v_dual_mov_b32 v9, 0 :: v_dual_mov_b32 v12, v14
; %bb.46:                               ; %_Z3add15HIP_vector_typeIdLj2EES0_.exit294
                                        ;   in Loop: Header=BB0_16 Depth=1
	s_or_b32 exec_lo, exec_lo, s11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_f64 v[13:14], v[11:12], v[11:12]
	v_mov_b32_e32 v32, 0
	v_mov_b32_e32 v33, 0
	s_mov_b32 s11, exec_lo
	v_dual_mov_b32 v35, v33 :: v_dual_mov_b32 v34, v32
	s_delay_alu instid0(VALU_DEP_4)
	v_cmpx_neq_f64_e32 0, v[13:14]
; %bb.47:                               ;   in Loop: Header=BB0_16 Depth=1
	v_fma_f64 v[11:12], v[11:12], 2.0, -v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], v[8:9], 2.0, v[11:12]
	v_add_f64 v[34:35], v[13:14], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[11:12], v[13:14], -v[34:35]
	v_add_f64 v[32:33], v[8:9], v[11:12]
; %bb.48:                               ; %Flow494
                                        ;   in Loop: Header=BB0_16 Depth=1
	s_or_b32 exec_lo, exec_lo, s11
	s_branch .LBB0_50
.LBB0_49:                               ;   in Loop: Header=BB0_16 Depth=1
	v_dual_mov_b32 v19, v15 :: v_dual_mov_b32 v18, v14
	v_dual_mov_b32 v17, v13 :: v_dual_mov_b32 v16, v12
.LBB0_50:                               ; %_Z9mulDouble15HIP_vector_typeIdLj2EEd.exit300
                                        ;   in Loop: Header=BB0_16 Depth=1
	v_add_f64 v[8:9], v[36:37], -v[40:41]
	s_mov_b32 s11, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[11:12], v[36:37], -v[8:9]
	v_add_f64 v[13:14], v[8:9], v[11:12]
	v_add_f64 v[11:12], v[11:12], -v[40:41]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[13:14], v[36:37], -v[13:14]
	v_add_f64 v[11:12], v[11:12], v[13:14]
                                        ; implicit-def: $vgpr13_vgpr14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[11:12], v[38:39], v[11:12]
	v_add_f64 v[36:37], v[11:12], -v[42:43]
                                        ; implicit-def: $vgpr11_vgpr12
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_neq_f64_e32 0, v[36:37]
	s_xor_b32 s11, exec_lo, s11
; %bb.51:                               ;   in Loop: Header=BB0_16 Depth=1
	v_add_f64 v[13:14], v[8:9], v[36:37]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[8:9], -v[13:14]
	v_add_f64 v[11:12], v[36:37], v[8:9]
                                        ; implicit-def: $vgpr8_vgpr9
; %bb.52:                               ; %Flow493
                                        ;   in Loop: Header=BB0_16 Depth=1
	s_and_not1_saveexec_b32 s11, s11
; %bb.53:                               ;   in Loop: Header=BB0_16 Depth=1
	v_dual_mov_b32 v11, 0 :: v_dual_mov_b32 v14, v9
	v_dual_mov_b32 v12, 0 :: v_dual_mov_b32 v13, v8
; %bb.54:                               ; %_Z3sub15HIP_vector_typeIdLj2EES0_.exit309
                                        ;   in Loop: Header=BB0_16 Depth=1
	s_or_b32 exec_lo, exec_lo, s11
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[26:27], v[13:14]
	s_mov_b32 s11, exec_lo
	v_add_f64 v[36:37], v[13:14], -v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[38:39], v[8:9], v[36:37]
	v_add_f64 v[36:37], v[26:27], v[36:37]
	v_add_f64 v[13:14], v[13:14], -v[38:39]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[13:14], v[36:37], v[13:14]
	v_add_f64 v[11:12], v[11:12], v[13:14]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[36:37], v[30:31], v[11:12]
                                        ; implicit-def: $vgpr12_vgpr13_vgpr14_vgpr15
	v_cmpx_neq_f64_e32 0, v[36:37]
	s_xor_b32 s11, exec_lo, s11
; %bb.55:                               ;   in Loop: Header=BB0_16 Depth=1
	v_add_f64 v[12:13], v[8:9], v[36:37]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[8:9], -v[12:13]
	v_add_f64 v[14:15], v[36:37], v[8:9]
; %bb.56:                               ; %Flow492
                                        ;   in Loop: Header=BB0_16 Depth=1
	s_and_not1_saveexec_b32 s11, s11
; %bb.57:                               ;   in Loop: Header=BB0_16 Depth=1
	v_mov_b32_e32 v11, v10
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v15, v11 :: v_dual_mov_b32 v14, v10
	v_dual_mov_b32 v13, v9 :: v_dual_mov_b32 v12, v8
; %bb.58:                               ; %_Z3add15HIP_vector_typeIdLj2EES0_.exit318
                                        ;   in Loop: Header=BB0_16 Depth=1
	s_or_b32 exec_lo, exec_lo, s11
	v_mul_f64 v[38:39], v[4:5], v[0:1]
	v_mov_b32_e32 v36, 0
	v_mov_b32_e32 v37, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v8, v36
	s_mov_b32 s11, exec_lo
	v_mov_b32_e32 v9, v37
	v_dual_mov_b32 v41, v37 :: v_dual_mov_b32 v40, v36
	v_cmpx_neq_f64_e32 0, v[38:39]
; %bb.59:                               ;   in Loop: Header=BB0_16 Depth=1
	v_mul_f64 v[2:3], v[4:5], v[2:3]
	v_fma_f64 v[4:5], v[0:1], v[4:5], -v[38:39]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[0:1], v[6:7], v[0:1], v[2:3]
	v_add_f64 v[0:1], v[4:5], v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[38:39], v[0:1]
	v_add_f64 v[2:3], v[38:39], -v[8:9]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[40:41], v[0:1], v[2:3]
; %bb.60:                               ; %_Z3mul15HIP_vector_typeIdLj2EES0_.exit327
                                        ;   in Loop: Header=BB0_16 Depth=1
	s_or_b32 exec_lo, exec_lo, s11
	v_add_f64 v[2:3], v[8:9], v[8:9]
	v_dual_mov_b32 v0, v36 :: v_dual_mov_b32 v1, v37
	s_mov_b32 s11, exec_lo
	s_delay_alu instid0(VALU_DEP_2)
	v_cmpx_neq_f64_e32 0, v[2:3]
; %bb.61:                               ;   in Loop: Header=BB0_16 Depth=1
	v_fma_f64 v[0:1], v[8:9], 2.0, -v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[0:1], v[40:41], 2.0, v[0:1]
	v_add_f64 v[36:37], v[2:3], v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], v[2:3], -v[36:37]
	v_add_f64 v[0:1], v[0:1], v[2:3]
; %bb.62:                               ; %_Z9mulDouble15HIP_vector_typeIdLj2EEd.exit333
                                        ;   in Loop: Header=BB0_16 Depth=1
	s_or_b32 exec_lo, exec_lo, s11
	v_add_f64 v[8:9], v[22:23], v[36:37]
	s_mov_b32 s11, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], v[36:37], -v[8:9]
	v_add_f64 v[4:5], v[8:9], v[2:3]
	v_add_f64 v[2:3], v[22:23], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[4:5], v[36:37], -v[4:5]
	v_add_f64 v[2:3], v[2:3], v[4:5]
                                        ; implicit-def: $vgpr4_vgpr5_vgpr6_vgpr7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[0:1], v[0:1], v[2:3]
	v_add_f64 v[0:1], v[24:25], v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_neq_f64_e32 0, v[0:1]
	s_xor_b32 s11, exec_lo, s11
; %bb.63:                               ;   in Loop: Header=BB0_16 Depth=1
	v_add_f64 v[4:5], v[8:9], v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], v[8:9], -v[4:5]
	v_add_f64 v[6:7], v[0:1], v[2:3]
; %bb.64:                               ; %Flow490
                                        ;   in Loop: Header=BB0_16 Depth=1
	s_and_not1_saveexec_b32 s11, s11
; %bb.65:                               ;   in Loop: Header=BB0_16 Depth=1
	v_mov_b32_e32 v11, v10
	v_dual_mov_b32 v4, v8 :: v_dual_mov_b32 v5, v9
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_mov_b32 v6, v10 :: v_dual_mov_b32 v7, v11
; %bb.66:                               ; %Flow491
                                        ;   in Loop: Header=BB0_16 Depth=1
	s_or_b32 exec_lo, exec_lo, s11
	v_dual_mov_b32 v0, v12 :: v_dual_mov_b32 v1, v13
	v_dual_mov_b32 v2, v14 :: v_dual_mov_b32 v3, v15
	v_dual_mov_b32 v12, v16 :: v_dual_mov_b32 v13, v17
	v_dual_mov_b32 v14, v18 :: v_dual_mov_b32 v15, v19
.LBB0_67:                               ; %Flow499
                                        ;   in Loop: Header=BB0_16 Depth=1
	s_or_b32 exec_lo, exec_lo, s7
	v_mov_b32_e32 v8, s6
	s_mov_b32 s7, -1
	s_and_saveexec_b32 s11, s2
; %bb.68:                               ;   in Loop: Header=BB0_16 Depth=1
	s_add_i32 s6, s6, 1
	v_mov_b32_e32 v8, s10
	s_cmp_eq_u32 s10, s6
	s_cselect_b32 s2, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_not1_b32 s7, s2, exec_lo
; %bb.69:                               ; %Flow501
                                        ;   in Loop: Header=BB0_16 Depth=1
	s_or_b32 exec_lo, exec_lo, s11
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, exec_lo, s7
	s_or_b32 s4, s2, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s4
	s_cbranch_execnz .LBB0_16
; %bb.70:                               ; %Flow502
	s_or_b32 exec_lo, exec_lo, s4
	s_branch .LBB0_72
.LBB0_71:
	v_dual_mov_b32 v15, s7 :: v_dual_mov_b32 v14, s6
	v_dual_mov_b32 v13, s5 :: v_dual_mov_b32 v12, s4
	v_dual_mov_b32 v35, v33 :: v_dual_mov_b32 v34, v32
.LBB0_72:                               ; %_Z3add15HIP_vector_typeIdLj2EES0_.exit342._crit_edge
	v_add_f64 v[2:3], v[0:1], v[2:3]
	v_add_f64 v[4:5], v[4:5], v[6:7]
	s_load_b256 s[4:11], s[0:1], 0x0
	v_mad_u64_u32 v[0:1], null, v21, s28, v[20:21]
	s_cmp_lg_u32 s3, 2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v1, 31, v0
	v_lshlrev_b64 v[6:7], 2, v[0:1]
	v_lshlrev_b64 v[0:1], 3, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, s4, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v9, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v10, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v16, vcc_lo, s8, v0
	v_add_co_ci_u32_e32 v17, vcc_lo, s9, v1, vcc_lo
	global_store_b32 v[6:7], v8, off
	global_store_b64 v[9:10], v[2:3], off
	global_store_b64 v[16:17], v[4:5], off
	s_cbranch_scc1 .LBB0_74
; %bb.73:
	v_add_f64 v[2:3], v[12:13], v[14:15]
	v_add_f64 v[4:5], v[34:35], v[32:33]
	s_load_b64 s[0:1], s[0:1], 0x20
	v_add_co_u32 v6, vcc_lo, s10, v0
	v_add_co_ci_u32_e32 v7, vcc_lo, s11, v1, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b64 v[6:7], v[2:3], off
	global_store_b64 v[0:1], v[4:5], off
.LBB0_74:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel compute
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 432
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 52
		.amdhsa_next_free_sgpr 29
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	compute, .Lfunc_end0-compute
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 3272
; NumSgprs: 31
; NumVgprs: 52
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 6
; NumSGPRsForWavesPerEU: 31
; NumVGPRsForWavesPerEU: 52
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .offset:         40
        .size:           4
        .value_kind:     by_value
      - .offset:         48
        .size:           16
        .value_kind:     by_value
      - .offset:         64
        .size:           16
        .value_kind:     by_value
      - .offset:         80
        .size:           16
        .value_kind:     by_value
      - .offset:         96
        .size:           16
        .value_kind:     by_value
      - .offset:         112
        .size:           16
        .value_kind:     by_value
      - .offset:         128
        .size:           16
        .value_kind:     by_value
      - .offset:         144
        .size:           16
        .value_kind:     by_value
      - .offset:         160
        .size:           4
        .value_kind:     by_value
      - .offset:         168
        .size:           8
        .value_kind:     by_value
      - .offset:         176
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         180
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         184
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         188
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         190
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         192
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         194
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         196
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         198
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         216
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         224
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         232
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         240
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 16
    .kernarg_segment_size: 432
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           compute
    .private_segment_fixed_size: 0
    .sgpr_count:     31
    .sgpr_spill_count: 0
    .symbol:         compute.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     52
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
