#include <stdio.h>
#include <time.h>
#include <stdlib.h>
#include <math.h>
#include "cuda_runtime.h"
#include "device_launch_parameters.h"

#define m(data,y,x)		data[y*n+x]
#define MAX_THREADS		1024

// ===========================> Functions Prototype <===============================
void fill(float* data, int size);
double calc_mse(float* data1, float* data2, int size);
void cpuKernel_yx(float* a, float* b, float* c, int n, int y, int x);
void cpuKernel_y(float* a, float* b, float* c, int n, int y);
void cpuKernel(float* a, float* b, float* c, int n);
__global__ void kernelFunc(float* ad, float* bd, float* cd, int n);
void gpuKernel(float* a, float* b, float* c, int n);
// =================================================================================

int main(int argc, char** argv) {

    struct cudaDeviceProp p;
    cudaGetDeviceProperties(&p, 0);
    printf("Device Name: %s\n", p.name);
	
	// get parameter from command line to build Matrix dimension
	// check for 10<=m<=13, because m>=14 do not fit in the memory of our GPU, i.e., 1GB.
	int m = 5;
	int n = 1;
	
	if(argc > 1)
		m = atoi(argv[1]);
	for (int i=0;i<m;i++)
		n*=2; // n=2^m
	
	// allocate memory in CPU for calculation
	float* a;
	float* b;
	float* c_serial;
	float* c;
	a        = (float*)malloc(n*n * sizeof(float));
	b        = (float*)malloc(n*n * sizeof(float));
	c_serial = (float*)malloc(n*n * sizeof(float));
	c        = (float*)malloc(n*n * sizeof(float));
	
	// fill a, b matrices with random values between -16.0f and 16.0f
	srand(0);
	fill(a, n*n);
	fill(b, n*n);
	
	// time measurement for CPU calculation
	clock_t t0 = clock(); 
	if (m<=10) {
		cpuKernel (a, b, c_serial, n);
	} else {
		cpuKernel_y (a, b, c_serial, n, 0); // 1st row
	}
	clock_t t1 = clock(); 
		
	// time measurement for GPU calculation
	clock_t t2 = clock();
	gpuKernel (a, b, c, n);
	clock_t t3 = clock();

	// check correctness of calculation
	float mse;
	if (m<=10) {
		mse = calc_mse( c_serial, c, n*n );
	} else {
		mse = calc_mse( c_serial, c, n ); // 1st row
	}

	printf("n=%d\t CPU=%06ld ms GPU=%06ld ms mse=%f\n",n, (t1-t0)/1000, (t3-t2)/1000, mse);
		
	// free allocated memory for later use
	free(a);
	free(b);
	free(c_serial);
	free(c);
   
	return 0;
}

//-----------------------------------------------------------------------------
void fill(float* data, int size) {
    for (int i=0; i<size; ++i)
        data[i] = (float) (rand() % 33 - 16);
}

double calc_mse (float* data1, float* data2, int size) {

	double mse = 0.0;
	int i; for (i=0; i<size; i++) {
		double e = data1[i]-data2[i];
		e = e * e;
		mse += e;
	}
	mse = mse / size;
	return mse;
}

//-----------------------------------------------------------------------------
void cpuKernel_yx(float* a, float* b, float* c, int n, int y, int x) { // one element
	m(c,y,x)=0;
    for(int k=0; k<n; k++) {
		m(c,y,x) += m(a,y,k) * m(b,k,x);
	}
}
void cpuKernel_y(float* a, float* b, float* c, int n, int y) { // one row
    for(int x=0; x<n; x++)
	{
		cpuKernel_yx(a,b,c,n,y,x);
	}
}
void cpuKernel(float* a, float* b, float* c, int n) { // entire matrix
    for(int y=0; y<n; y++)
    for(int x=0; x<n; x++)
	{
		cpuKernel_yx(a,b,c,n,y,x);
	}
}

//-----------------------------------------------------------------------------
/*__global__ void kernelFunc(float* ad, float* bd, float* cd, int n) {
	// write your GPU kernel function here
	// note that maximum # of threads per block is 1024
	int bx=blockIdx.x;
	int by=blockIdx.y;
	int bz=blockIdx.z;
	int tx=threadIdx.x;
	long i,j;
	float sum=0;
	i= bx+(by*MAX_THREADS*MAX_THREADS+bz*MAX_THREADS+tx)/n;
	j= (by*MAX_THREADS*MAX_THREADS+bz*MAX_THREADS+tx)%n;
	for(long k=0; k<n; k++) {
		sum += m(ad,i,k) * m(bd,k,j);
	}
	m(cd,i,j) = sum;

}*/
__global__ void kernelFunc(float* ad, float* bd, float* cd, int n) {

	int tx = threadIdx.x;
	int by = blockIdx.y;
	int bx = blockIdx.x;
	int row = bx;
      
	float s = 0.0f;
	int column;
	column = (by)*(blockDim.x)+tx;
	int k; for (k=0; k<n; k++)
		s += m(ad,row,k) * m(bd,k,column);
	
	m(cd,row,column) = s;
}
//-----------------------------------------------------------------------------
void gpuKernel(float* a, float* b, float* c, int n) {
	// allocate memory on GPU
	// copy data to GPU
	// call kernelFunc
	// copy the results back to CPU
	// free GPU memory
	float *ad, *bd, *cd;
	
	cudaMalloc((void**)&ad, n*n*sizeof(float));
	cudaMalloc((void**)&bd, n*n*sizeof(float));
	cudaMalloc((void**)&cd, n*n*sizeof(float));
	
	cudaMemcpy(ad, a, n*n*sizeof(float), cudaMemcpyHostToDevice);
	cudaMemcpy(bd, b, n*n*sizeof(float), cudaMemcpyHostToDevice);
	
	//kernelFunc <<<dim3(n/MAX_THREADS,n/MAX_THREADS,MAX_THREADS),MAX_THREADS>>> (ad,bd,cd,n);
	kernelFunc<<< dim3(n,1,1), n >>>(ad, bd, cd, n);
	
	cudaMemcpy(c, cd, n*n*sizeof(float), cudaMemcpyDeviceToHost);
	
	cudaFree(ad);
	cudaFree(bd);
	cudaFree(cd);
}
	.file	"tmpxft_0022bda1_00000000-6_mm.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2036:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2036:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z4fillPfi
	.type	_Z4fillPfi, @function
_Z4fillPfi:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	$33, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movl	%esi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	xorl	%ebx, %ebx
	pushq	%rdx
	.cfi_def_cfa_offset 48
.L3:
	cmpl	%ebx, %ebp
	jle	.L7
	call	rand@PLT
	cltd
	idivl	%r13d
	subl	$16, %edx
	cvtsi2ssl	%edx, %xmm0
	movss	%xmm0, (%r12,%rbx,4)
	incq	%rbx
	jmp	.L3
.L7:
	popq	%rax
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z4fillPfi, .-_Z4fillPfi
	.globl	_Z8calc_msePfS_i
	.type	_Z8calc_msePfS_i, @function
_Z8calc_msePfS_i:
.LFB2029:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
	xorps	%xmm0, %xmm0
.L9:
	cmpl	%eax, %edx
	jle	.L11
	movss	(%rdi,%rax,4), %xmm1
	subss	(%rsi,%rax,4), %xmm1
	incq	%rax
	cvtss2sd	%xmm1, %xmm1
	mulsd	%xmm1, %xmm1
	addsd	%xmm1, %xmm0
	jmp	.L9
.L11:
	cvtsi2sdl	%edx, %xmm1
	divsd	%xmm1, %xmm0
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z8calc_msePfS_i, .-_Z8calc_msePfS_i
	.globl	_Z12cpuKernel_yxPfS_S_iii
	.type	_Z12cpuKernel_yxPfS_S_iii, @function
_Z12cpuKernel_yxPfS_S_iii:
.LFB2030:
	.cfi_startproc
	endbr64
	imull	%ecx, %r8d
	movq	%rsi, %r10
	movq	%rdx, %rsi
	movl	%ecx, %eax
	xorps	%xmm0, %xmm0
	leal	(%r8,%r9), %edx
	movslq	%r9d, %r9
	movslq	%r8d, %r8
	movslq	%edx, %rdx
	leaq	(%rdi,%r8,4), %rdi
	leaq	(%rsi,%rdx,4), %r11
	movslq	%ecx, %rsi
	leaq	(%r10,%r9,4), %rcx
	xorl	%edx, %edx
	salq	$2, %rsi
.L13:
	movss	%xmm0, (%r11)
	cmpl	%edx, %eax
	jle	.L15
	movss	(%rdi,%rdx,4), %xmm1
	mulss	(%rcx), %xmm1
	incq	%rdx
	addq	%rsi, %rcx
	addss	%xmm1, %xmm0
	jmp	.L13
.L15:
	ret
	.cfi_endproc
.LFE2030:
	.size	_Z12cpuKernel_yxPfS_S_iii, .-_Z12cpuKernel_yxPfS_S_iii
	.globl	_Z11cpuKernel_yPfS_S_ii
	.type	_Z11cpuKernel_yPfS_S_ii, @function
_Z11cpuKernel_yPfS_S_ii:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	%r8d, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rdx, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rsi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%ecx, %ebx
.L17:
	cmpl	%ebx, %ebp
	jge	.L20
	movl	%ebp, %r9d
	movl	%r15d, %r8d
	movl	%ebx, %ecx
	movq	%r14, %rdx
	movq	%r13, %rsi
	movq	%r12, %rdi
	incl	%ebp
	call	_Z12cpuKernel_yxPfS_S_iii
	jmp	.L17
.L20:
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2031:
	.size	_Z11cpuKernel_yPfS_S_ii, .-_Z11cpuKernel_yPfS_S_ii
	.globl	_Z9cpuKernelPfS_S_i
	.type	_Z9cpuKernelPfS_S_i, @function
_Z9cpuKernelPfS_S_i:
.LFB2032:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rdx, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rsi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movslq	%ecx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%r12, %rbx
	pushq	%r8
	.cfi_def_cfa_offset 64
	movq	%rdi, (%rsp)
.L22:
	cmpl	%ebx, %ebp
	jge	.L27
	xorl	%r15d, %r15d
.L23:
	movq	(%rsp), %rdi
	movl	%r15d, %r9d
	movl	%ebp, %r8d
	movl	%ebx, %ecx
	movq	%r14, %rdx
	movq	%r13, %rsi
	incq	%r15
	call	_Z12cpuKernel_yxPfS_S_iii
	cmpq	%r12, %r15
	jne	.L23
	incl	%ebp
	jmp	.L22
.L27:
	popq	%rax
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2032:
	.size	_Z9cpuKernelPfS_S_i, .-_Z9cpuKernelPfS_S_i
	.globl	_Z35__device_stub__Z10kernelFuncPfS_S_iPfS_S_i
	.type	_Z35__device_stub__Z10kernelFuncPfS_S_iPfS_S_i, @function
_Z35__device_stub__Z10kernelFuncPfS_S_iPfS_S_i:
.LFB2058:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L28
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z10kernelFuncPfS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L28:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L30
	call	__stack_chk_fail@PLT
.L30:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2058:
	.size	_Z35__device_stub__Z10kernelFuncPfS_S_iPfS_S_i, .-_Z35__device_stub__Z10kernelFuncPfS_S_iPfS_S_i
	.globl	_Z10kernelFuncPfS_S_i
	.type	_Z10kernelFuncPfS_S_i, @function
_Z10kernelFuncPfS_S_i:
.LFB2059:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z10kernelFuncPfS_S_iPfS_S_i
	.cfi_endproc
.LFE2059:
	.size	_Z10kernelFuncPfS_S_i, .-_Z10kernelFuncPfS_S_i
	.globl	_Z9gpuKernelPfS_S_i
	.type	_Z9gpuKernelPfS_S_i, @function
_Z9gpuKernelPfS_S_i:
.LFB2033:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	%ecx, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movq	%rdi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%rsi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%rdx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movl	%ecx, %ebx
	imull	%ecx, %ebx
	subq	$64, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	movslq	%ebx, %rbx
	leaq	8(%rsp), %rdi
	salq	$2, %rbx
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	movq	%rbx, %rdx
	movq	%r13, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	movq	%rbx, %rdx
	movq	%r12, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	%r14d, 44(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	movl	%r14d, 32(%rsp)
	movq	%rax, 48(%rsp)
	movl	52(%rsp), %ecx
	movq	%rax, 36(%rsp)
	movq	44(%rsp), %rdx
	movq	32(%rsp), %rdi
	movl	40(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L34
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movl	%r14d, %ecx
	movq	8(%rsp), %rdi
	call	_Z35__device_stub__Z10kernelFuncPfS_S_iPfS_S_i
.L34:
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdx
	movq	%rbp, %rdi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L35
	call	__stack_chk_fail@PLT
.L35:
	addq	$64, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2033:
	.size	_Z9gpuKernelPfS_S_i, .-_Z9gpuKernelPfS_S_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"Device Name: %s\n"
.LC3:
	.string	"n=%d\t CPU=%06ld ms GPU=%06ld ms mse=%f\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%edi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rsi, %rbx
	xorl	%esi, %esi
	subq	$1080, %rsp
	.cfi_def_cfa_offset 1136
	movq	%fs:40, %rax
	movq	%rax, 1064(%rsp)
	xorl	%eax, %eax
	leaq	32(%rsp), %r12
	movq	%r12, %rdi
	call	cudaGetDeviceProperties_v2@PLT
	movq	%r12, %rdx
	xorl	%eax, %eax
	movl	$2, %edi
	leaq	.LC2(%rip), %rsi
	movl	$5, %r12d
	call	__printf_chk@PLT
	decl	%ebp
	jle	.L38
	movq	8(%rbx), %rdi
	call	atoi@PLT
	movl	%eax, %r12d
.L38:
	xorl	%eax, %eax
	movl	$1, %ebx
.L39:
	cmpl	%eax, %r12d
	jle	.L50
	addl	%ebx, %ebx
	incl	%eax
	jmp	.L39
.L50:
	movl	%ebx, %r13d
	imull	%ebx, %r13d
	movslq	%r13d, %rax
	leaq	0(,%rax,4), %rbp
	movq	%rbp, %rdi
	call	malloc@PLT
	movq	%rbp, %rdi
	movq	%rax, (%rsp)
	call	malloc@PLT
	movq	%rbp, %rdi
	movq	%rax, 8(%rsp)
	call	malloc@PLT
	movq	%rbp, %rdi
	movq	%rax, 16(%rsp)
	call	malloc@PLT
	xorl	%edi, %edi
	movq	%rax, 24(%rsp)
	call	srand@PLT
	movq	(%rsp), %rdi
	movl	%r13d, %esi
	call	_Z4fillPfi
	movq	8(%rsp), %rdi
	movl	%r13d, %esi
	call	_Z4fillPfi
	call	clock@PLT
	movq	%rax, %r14
	cmpl	$10, %r12d
	jg	.L41
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rsi
	movl	%ebx, %ecx
	movq	(%rsp), %rdi
	call	_Z9cpuKernelPfS_S_i
	jmp	.L42
.L41:
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rsi
	xorl	%r8d, %r8d
	movl	%ebx, %ecx
	movq	(%rsp), %rdi
	call	_Z11cpuKernel_yPfS_S_ii
.L42:
	call	clock@PLT
	movq	%rax, %rbp
	call	clock@PLT
	movq	24(%rsp), %rdx
	movq	(%rsp), %rdi
	movl	%ebx, %ecx
	movq	8(%rsp), %rsi
	movq	%rax, %r15
	call	_Z9gpuKernelPfS_S_i
	call	clock@PLT
	movl	%r13d, %edx
	movq	%rax, %r8
	cmpl	$10, %r12d
	jle	.L49
	movl	%ebx, %edx
.L49:
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	subq	%r15, %r8
	movl	$1000, %ecx
	call	_Z8calc_msePfS_i
	movq	%r8, %rax
	movl	$2, %edi
	leaq	.LC3(%rip), %rsi
	cqto
	cvtsd2ss	%xmm0, %xmm0
	cvtss2sd	%xmm0, %xmm0
	idivq	%rcx
	movq	%rax, %r8
	movq	%rbp, %rax
	subq	%r14, %rax
	cqto
	idivq	%rcx
	movl	%ebx, %edx
	movq	%rax, %rcx
	movb	$1, %al
	call	__printf_chk@PLT
	movq	(%rsp), %rdi
	call	free@PLT
	movq	8(%rsp), %rdi
	call	free@PLT
	movq	16(%rsp), %rdi
	call	free@PLT
	movq	24(%rsp), %rdi
	call	free@PLT
	movq	1064(%rsp), %rax
	subq	%fs:40, %rax
	je	.L45
	call	__stack_chk_fail@PLT
.L45:
	addq	$1080, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC4:
	.string	"_Z10kernelFuncPfS_S_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2061:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC4(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z10kernelFuncPfS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2061:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include <time.h>
#include <stdlib.h>
#include <math.h>
#include "hip/hip_runtime.h"


#define m(data,y,x)		data[y*n+x]
#define MAX_THREADS		1024

// ===========================> Functions Prototype <===============================
void fill(float* data, int size);
double calc_mse(float* data1, float* data2, int size);
void cpuKernel_yx(float* a, float* b, float* c, int n, int y, int x);
void cpuKernel_y(float* a, float* b, float* c, int n, int y);
void cpuKernel(float* a, float* b, float* c, int n);
__global__ void kernelFunc(float* ad, float* bd, float* cd, int n);
void gpuKernel(float* a, float* b, float* c, int n);
// =================================================================================

int main(int argc, char** argv) {

    struct hipDeviceProp_t p;
    hipGetDeviceProperties(&p, 0);
    printf("Device Name: %s\n", p.name);
	
	// get parameter from command line to build Matrix dimension
	// check for 10<=m<=13, because m>=14 do not fit in the memory of our GPU, i.e., 1GB.
	int m = 5;
	int n = 1;
	
	if(argc > 1)
		m = atoi(argv[1]);
	for (int i=0;i<m;i++)
		n*=2; // n=2^m
	
	// allocate memory in CPU for calculation
	float* a;
	float* b;
	float* c_serial;
	float* c;
	a        = (float*)malloc(n*n * sizeof(float));
	b        = (float*)malloc(n*n * sizeof(float));
	c_serial = (float*)malloc(n*n * sizeof(float));
	c        = (float*)malloc(n*n * sizeof(float));
	
	// fill a, b matrices with random values between -16.0f and 16.0f
	srand(0);
	fill(a, n*n);
	fill(b, n*n);
	
	// time measurement for CPU calculation
	clock_t t0 = clock(); 
	if (m<=10) {
		cpuKernel (a, b, c_serial, n);
	} else {
		cpuKernel_y (a, b, c_serial, n, 0); // 1st row
	}
	clock_t t1 = clock(); 
		
	// time measurement for GPU calculation
	clock_t t2 = clock();
	gpuKernel (a, b, c, n);
	clock_t t3 = clock();

	// check correctness of calculation
	float mse;
	if (m<=10) {
		mse = calc_mse( c_serial, c, n*n );
	} else {
		mse = calc_mse( c_serial, c, n ); // 1st row
	}

	printf("n=%d\t CPU=%06ld ms GPU=%06ld ms mse=%f\n",n, (t1-t0)/1000, (t3-t2)/1000, mse);
		
	// free allocated memory for later use
	free(a);
	free(b);
	free(c_serial);
	free(c);
   
	return 0;
}

//-----------------------------------------------------------------------------
void fill(float* data, int size) {
    for (int i=0; i<size; ++i)
        data[i] = (float) (rand() % 33 - 16);
}

double calc_mse (float* data1, float* data2, int size) {

	double mse = 0.0;
	int i; for (i=0; i<size; i++) {
		double e = data1[i]-data2[i];
		e = e * e;
		mse += e;
	}
	mse = mse / size;
	return mse;
}

//-----------------------------------------------------------------------------
void cpuKernel_yx(float* a, float* b, float* c, int n, int y, int x) { // one element
	m(c,y,x)=0;
    for(int k=0; k<n; k++) {
		m(c,y,x) += m(a,y,k) * m(b,k,x);
	}
}
void cpuKernel_y(float* a, float* b, float* c, int n, int y) { // one row
    for(int x=0; x<n; x++)
	{
		cpuKernel_yx(a,b,c,n,y,x);
	}
}
void cpuKernel(float* a, float* b, float* c, int n) { // entire matrix
    for(int y=0; y<n; y++)
    for(int x=0; x<n; x++)
	{
		cpuKernel_yx(a,b,c,n,y,x);
	}
}

//-----------------------------------------------------------------------------
/*__global__ void kernelFunc(float* ad, float* bd, float* cd, int n) {
	// write your GPU kernel function here
	// note that maximum # of threads per block is 1024
	int bx=blockIdx.x;
	int by=blockIdx.y;
	int bz=blockIdx.z;
	int tx=threadIdx.x;
	long i,j;
	float sum=0;
	i= bx+(by*MAX_THREADS*MAX_THREADS+bz*MAX_THREADS+tx)/n;
	j= (by*MAX_THREADS*MAX_THREADS+bz*MAX_THREADS+tx)%n;
	for(long k=0; k<n; k++) {
		sum += m(ad,i,k) * m(bd,k,j);
	}
	m(cd,i,j) = sum;

}*/
__global__ void kernelFunc(float* ad, float* bd, float* cd, int n) {

	int tx = threadIdx.x;
	int by = blockIdx.y;
	int bx = blockIdx.x;
	int row = bx;
      
	float s = 0.0f;
	int column;
	column = (by)*(blockDim.x)+tx;
	int k; for (k=0; k<n; k++)
		s += m(ad,row,k) * m(bd,k,column);
	
	m(cd,row,column) = s;
}
//-----------------------------------------------------------------------------
void gpuKernel(float* a, float* b, float* c, int n) {
	// allocate memory on GPU
	// copy data to GPU
	// call kernelFunc
	// copy the results back to CPU
	// free GPU memory
	float *ad, *bd, *cd;
	
	hipMalloc((void**)&ad, n*n*sizeof(float));
	hipMalloc((void**)&bd, n*n*sizeof(float));
	hipMalloc((void**)&cd, n*n*sizeof(float));
	
	hipMemcpy(ad, a, n*n*sizeof(float), hipMemcpyHostToDevice);
	hipMemcpy(bd, b, n*n*sizeof(float), hipMemcpyHostToDevice);
	
	//kernelFunc <<<dim3(n/MAX_THREADS,n/MAX_THREADS,MAX_THREADS),MAX_THREADS>>> (ad,bd,cd,n);
	kernelFunc<<< dim3(n,1,1), n >>>(ad, bd, cd, n);
	
	hipMemcpy(c, cd, n*n*sizeof(float), hipMemcpyDeviceToHost);
	
	hipFree(ad);
	hipFree(bd);
	hipFree(cd);
}
	.text
	.file	"mm.hip"
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$1512, %rsp                     # imm = 0x5E8
	.cfi_def_cfa_offset 1568
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %rbx
	movl	%edi, %ebp
	leaq	40(%rsp), %r14
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	hipGetDevicePropertiesR0600
	movl	$.L.str, %edi
	movq	%r14, %rsi
	xorl	%eax, %eax
	callq	printf
	movl	$5, %eax
	cmpl	$2, %ebp
	jl	.LBB0_10
# %bb.1:
	movq	8(%rbx), %rdi
	callq	atoi
	testl	%eax, %eax
	jle	.LBB0_2
.LBB0_10:                               # %.lr.ph.preheader
	movl	$1, %ebx
	movl	%eax, %ecx
.LBB0_11:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	addl	%ebx, %ebx
	decl	%ecx
	jne	.LBB0_11
# %bb.3:                                # %._crit_edge.loopexit
	cmpl	$11, %eax
	setb	15(%rsp)                        # 1-byte Folded Spill
.LBB0_4:                                # %._crit_edge
	movl	%ebx, %ebp
	imull	%ebp, %ebp
	leaq	(,%rbp,4), %r13
	movq	%r13, %rdi
	callq	malloc
	movq	%rax, %r14
	movq	%r13, %rdi
	callq	malloc
	movq	%rax, %r15
	movq	%r13, %rdi
	callq	malloc
	movq	%rax, %r12
	movq	%r13, %rdi
	callq	malloc
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	xorl	%r13d, %r13d
	xorl	%edi, %edi
	callq	srand
.LBB0_5:                                # %.lr.ph.i
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$1041204193, %rax, %rcx         # imm = 0x3E0F83E1
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$35, %rcx
	addl	%edx, %ecx
	movl	%ecx, %edx
	shll	$5, %edx
	addl	%ecx, %edx
	negl	%edx
	addl	%edx, %eax
	addl	$-16, %eax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	%xmm0, (%r14,%r13,4)
	incq	%r13
	cmpq	%r13, %rbp
	jne	.LBB0_5
# %bb.6:                                # %.lr.ph.i54.preheader
	xorl	%r13d, %r13d
.LBB0_7:                                # %.lr.ph.i54
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$1041204193, %rax, %rcx         # imm = 0x3E0F83E1
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$35, %rcx
	addl	%edx, %ecx
	movl	%ecx, %edx
	shll	$5, %edx
	addl	%ecx, %edx
	negl	%edx
	addl	%edx, %eax
	addl	$-16, %eax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	%xmm0, (%r15,%r13,4)
	incq	%r13
	cmpq	%r13, %rbp
	jne	.LBB0_7
# %bb.8:                                # %_Z4fillPfi.exit58
	callq	clock
	cmpb	$0, 15(%rsp)                    # 1-byte Folded Reload
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	je	.LBB0_12
# %bb.9:
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movl	%ebx, %ecx
	callq	_Z9cpuKernelPfS_S_i
	movq	16(%rsp), %r13                  # 8-byte Reload
	jmp	.LBB0_17
.LBB0_12:
	testl	%ebx, %ebx
	movq	16(%rsp), %r13                  # 8-byte Reload
	jle	.LBB0_17
# %bb.13:                               # %.lr.ph.i59
	movl	%ebx, %eax
	leaq	(,%rax,4), %rcx
	xorl	%edx, %edx
	movq	%r15, %rsi
.LBB0_14:                               # %.lr.ph.i.i
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_15 Depth 2
	xorps	%xmm0, %xmm0
	movq	%rsi, %rdi
	xorl	%r8d, %r8d
.LBB0_15:                               #   Parent Loop BB0_14 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	(%r14,%r8), %xmm1               # xmm1 = mem[0],zero,zero,zero
	mulss	(%rdi), %xmm1
	addss	%xmm1, %xmm0
	addq	$4, %r8
	addq	%rcx, %rdi
	cmpq	%r8, %rcx
	jne	.LBB0_15
# %bb.16:                               # %_Z12cpuKernel_yxPfS_S_iii.exit.i
                                        #   in Loop: Header=BB0_14 Depth=1
	movss	%xmm0, (%r12,%rdx,4)
	incq	%rdx
	addq	$4, %rsi
	cmpq	%rax, %rdx
	jne	.LBB0_14
.LBB0_17:                               # %_Z11cpuKernel_yPfS_S_ii.exit
	callq	clock
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	callq	clock
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r13, %rdx
	movl	%ebx, %ecx
	callq	_Z9gpuKernelPfS_S_i
	callq	clock
	movq	%rax, %rcx
	cmpb	$0, 15(%rsp)                    # 1-byte Folded Reload
	je	.LBB0_21
# %bb.18:                               # %.lr.ph.i64.preheader
	xorps	%xmm0, %xmm0
	xorl	%eax, %eax
.LBB0_19:                               # %.lr.ph.i64
                                        # =>This Inner Loop Header: Depth=1
	movss	(%r12,%rax,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	subss	(%r13,%rax,4), %xmm1
	cvtss2sd	%xmm1, %xmm1
	mulsd	%xmm1, %xmm1
	addsd	%xmm1, %xmm0
	incq	%rax
	cmpq	%rax, %rbp
	jne	.LBB0_19
	jmp	.LBB0_20
.LBB0_21:
	testl	%ebx, %ebx
	jle	.LBB0_22
# %bb.23:                               # %.lr.ph.preheader.i
	movl	%ebx, %eax
	xorps	%xmm0, %xmm0
	xorl	%edx, %edx
	movq	16(%rsp), %rdi                  # 8-byte Reload
.LBB0_24:                               # %.lr.ph.i69
                                        # =>This Inner Loop Header: Depth=1
	movss	(%r12,%rdx,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	subss	(%r13,%rdx,4), %xmm1
	cvtss2sd	%xmm1, %xmm1
	mulsd	%xmm1, %xmm1
	addsd	%xmm1, %xmm0
	incq	%rdx
	cmpq	%rdx, %rax
	jne	.LBB0_24
# %bb.25:
	movl	%ebx, %ebp
	movq	32(%rsp), %rdx                  # 8-byte Reload
	jmp	.LBB0_26
.LBB0_2:
	movl	$1, %ebx
	movb	$1, 15(%rsp)                    # 1-byte Folded Spill
	jmp	.LBB0_4
.LBB0_22:
	xorps	%xmm0, %xmm0
	movl	%ebx, %ebp
.LBB0_20:
	movq	32(%rsp), %rdx                  # 8-byte Reload
	movq	16(%rsp), %rdi                  # 8-byte Reload
.LBB0_26:                               # %_Z8calc_msePfS_i.exit
	movq	24(%rsp), %rax                  # 8-byte Reload
	xorps	%xmm1, %xmm1
	cvtsi2sd	%ebp, %xmm1
	divsd	%xmm1, %xmm0
	cvtsd2ss	%xmm0, %xmm0
	subq	%rdx, %rax
	movabsq	$2361183241434822607, %rsi      # imm = 0x20C49BA5E353F7CF
	imulq	%rsi
	movq	%rdx, %r8
	movq	%rdx, %rax
	shrq	$63, %rax
	sarq	$7, %r8
	addq	%rax, %r8
	subq	%rdi, %rcx
	movq	%rcx, %rax
	imulq	%rsi
	movq	%rdx, %rcx
	shrq	$63, %rcx
	sarq	$7, %rdx
	addq	%rdx, %rcx
	cvtss2sd	%xmm0, %xmm0
	movl	$.L.str.1, %edi
	movl	%ebx, %esi
	movq	%r8, %rdx
	movb	$1, %al
	callq	printf
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	movq	%r12, %rdi
	callq	free
	movq	%r13, %rdi
	callq	free
	xorl	%eax, %eax
	addq	$1512, %rsp                     # imm = 0x5E8
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	main, .Lfunc_end0-main
	.cfi_endproc
                                        # -- End function
	.globl	_Z4fillPfi                      # -- Begin function _Z4fillPfi
	.type	_Z4fillPfi,@function
_Z4fillPfi:                             # @_Z4fillPfi
	.cfi_startproc
# %bb.0:
	testl	%esi, %esi
	jle	.LBB1_4
# %bb.1:                                # %.lr.ph.preheader
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %rbx
	movl	%esi, %r14d
	xorl	%r15d, %r15d
.LBB1_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$1041204193, %rax, %rcx         # imm = 0x3E0F83E1
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$35, %rcx
	addl	%edx, %ecx
	movl	%ecx, %edx
	shll	$5, %edx
	addl	%ecx, %edx
	negl	%edx
	addl	%edx, %eax
	addl	$-16, %eax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	%xmm0, (%rbx,%r15,4)
	incq	%r15
	cmpq	%r15, %r14
	jne	.LBB1_2
# %bb.3:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
	.cfi_restore %r15
.LBB1_4:                                # %._crit_edge
	retq
.Lfunc_end1:
	.size	_Z4fillPfi, .Lfunc_end1-_Z4fillPfi
	.cfi_endproc
                                        # -- End function
	.globl	_Z9cpuKernelPfS_S_i             # -- Begin function _Z9cpuKernelPfS_S_i
	.type	_Z9cpuKernelPfS_S_i,@function
_Z9cpuKernelPfS_S_i:                    # @_Z9cpuKernelPfS_S_i
	.cfi_startproc
# %bb.0:
	testl	%ecx, %ecx
	jle	.LBB2_8
# %bb.1:                                # %.preheader.lr.ph
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movl	%ecx, %eax
	leaq	(,%rax,4), %rcx
	xorl	%r8d, %r8d
.LBB2_2:                                # %.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_3 Depth 2
                                        #       Child Loop BB2_4 Depth 3
	movl	%r8d, %r9d
	imull	%eax, %r9d
	leaq	(%rdx,%r9,4), %r9
	movq	%rsi, %r10
	xorl	%r11d, %r11d
.LBB2_3:                                # %.lr.ph.i
                                        #   Parent Loop BB2_2 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB2_4 Depth 3
	movl	$0, (%r9,%r11,4)
	xorps	%xmm0, %xmm0
	movq	%r10, %rbx
	xorl	%r14d, %r14d
.LBB2_4:                                #   Parent Loop BB2_2 Depth=1
                                        #     Parent Loop BB2_3 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movss	(%rdi,%r14), %xmm1              # xmm1 = mem[0],zero,zero,zero
	mulss	(%rbx), %xmm1
	addss	%xmm1, %xmm0
	movss	%xmm0, (%r9,%r11,4)
	addq	$4, %r14
	addq	%rcx, %rbx
	cmpq	%r14, %rcx
	jne	.LBB2_4
# %bb.5:                                # %_Z12cpuKernel_yxPfS_S_iii.exit
                                        #   in Loop: Header=BB2_3 Depth=2
	incq	%r11
	addq	$4, %r10
	cmpq	%rax, %r11
	jne	.LBB2_3
# %bb.6:                                # %._crit_edge
                                        #   in Loop: Header=BB2_2 Depth=1
	incq	%r8
	addq	%rcx, %rdi
	cmpq	%rax, %r8
	jne	.LBB2_2
# %bb.7:
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
.LBB2_8:                                # %._crit_edge15
	retq
.Lfunc_end2:
	.size	_Z9cpuKernelPfS_S_i, .Lfunc_end2-_Z9cpuKernelPfS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z11cpuKernel_yPfS_S_ii         # -- Begin function _Z11cpuKernel_yPfS_S_ii
	.type	_Z11cpuKernel_yPfS_S_ii,@function
_Z11cpuKernel_yPfS_S_ii:                # @_Z11cpuKernel_yPfS_S_ii
	.cfi_startproc
# %bb.0:
	testl	%ecx, %ecx
	jle	.LBB3_5
# %bb.1:                                # %.lr.ph
	imull	%ecx, %r8d
	movslq	%r8d, %r8
	movl	%ecx, %eax
	leaq	(%rdi,%r8,4), %rcx
	leaq	(%rdx,%r8,4), %rdx
	leaq	(,%rax,4), %rdi
	xorl	%r8d, %r8d
.LBB3_2:                                # %.lr.ph.i
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_3 Depth 2
	movl	$0, (%rdx,%r8,4)
	xorps	%xmm0, %xmm0
	movq	%rsi, %r9
	xorl	%r10d, %r10d
.LBB3_3:                                #   Parent Loop BB3_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movss	(%rcx,%r10), %xmm1              # xmm1 = mem[0],zero,zero,zero
	mulss	(%r9), %xmm1
	addss	%xmm1, %xmm0
	movss	%xmm0, (%rdx,%r8,4)
	addq	$4, %r10
	addq	%rdi, %r9
	cmpq	%r10, %rdi
	jne	.LBB3_3
# %bb.4:                                # %_Z12cpuKernel_yxPfS_S_iii.exit
                                        #   in Loop: Header=BB3_2 Depth=1
	incq	%r8
	addq	$4, %rsi
	cmpq	%rax, %r8
	jne	.LBB3_2
.LBB3_5:                                # %._crit_edge
	retq
.Lfunc_end3:
	.size	_Z11cpuKernel_yPfS_S_ii, .Lfunc_end3-_Z11cpuKernel_yPfS_S_ii
	.cfi_endproc
                                        # -- End function
	.globl	_Z9gpuKernelPfS_S_i             # -- Begin function _Z9gpuKernelPfS_S_i
	.type	_Z9gpuKernelPfS_S_i,@function
_Z9gpuKernelPfS_S_i:                    # @_Z9gpuKernelPfS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%ecx, %ebp
	movq	%rdx, 32(%rsp)                  # 8-byte Spill
	movq	%rsi, %r15
	movq	%rdi, %r12
	movl	%ecx, %r14d
	imull	%r14d, %r14d
	shlq	$2, %r14
	leaq	24(%rsp), %r13
	movq	%r13, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	leaq	16(%rsp), %rbx
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movq	(%r13), %rdi
	movq	%r12, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbx), %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	%ebp, %edi
	btsq	$32, %rdi
	movl	$1, %esi
	movq	%rdi, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB4_2
# %bb.1:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	movl	%ebp, %ecx
	callq	_Z25__device_stub__kernelFuncPfS_S_i
.LBB4_2:
	movq	8(%rsp), %rsi
	movq	32(%rsp), %rdi                  # 8-byte Reload
	movq	%r14, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z9gpuKernelPfS_S_i, .Lfunc_end4-_Z9gpuKernelPfS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z8calc_msePfS_i                # -- Begin function _Z8calc_msePfS_i
	.type	_Z8calc_msePfS_i,@function
_Z8calc_msePfS_i:                       # @_Z8calc_msePfS_i
	.cfi_startproc
# %bb.0:
	testl	%edx, %edx
	jle	.LBB5_1
# %bb.2:                                # %.lr.ph.preheader
	movl	%edx, %eax
	xorpd	%xmm0, %xmm0
	xorl	%ecx, %ecx
.LBB5_3:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movss	(%rdi,%rcx,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	subss	(%rsi,%rcx,4), %xmm1
	cvtss2sd	%xmm1, %xmm1
	mulsd	%xmm1, %xmm1
	addsd	%xmm1, %xmm0
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB5_3
	jmp	.LBB5_4
.LBB5_1:
	xorpd	%xmm0, %xmm0
.LBB5_4:                                # %._crit_edge
	xorps	%xmm1, %xmm1
	cvtsi2sd	%edx, %xmm1
	divsd	%xmm1, %xmm0
	retq
.Lfunc_end5:
	.size	_Z8calc_msePfS_i, .Lfunc_end5-_Z8calc_msePfS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z12cpuKernel_yxPfS_S_iii       # -- Begin function _Z12cpuKernel_yxPfS_S_iii
	.type	_Z12cpuKernel_yxPfS_S_iii,@function
_Z12cpuKernel_yxPfS_S_iii:              # @_Z12cpuKernel_yxPfS_S_iii
	.cfi_startproc
# %bb.0:
                                        # kill: def $r9d killed $r9d def $r9
                                        # kill: def $r8d killed $r8d def $r8
	imull	%ecx, %r8d
	leal	(%r8,%r9), %eax
	cltq
	movl	$0, (%rdx,%rax,4)
	testl	%ecx, %ecx
	jle	.LBB6_3
# %bb.1:                                # %.lr.ph
	movslq	%r8d, %r8
	movslq	%r9d, %r9
	movl	%ecx, %ecx
	leaq	(%rdi,%r8,4), %rdi
	leaq	(%rsi,%r9,4), %rsi
	leaq	(,%rcx,4), %r8
	xorps	%xmm0, %xmm0
	xorl	%r9d, %r9d
.LBB6_2:                                # =>This Inner Loop Header: Depth=1
	movss	(%rdi,%r9,4), %xmm1             # xmm1 = mem[0],zero,zero,zero
	mulss	(%rsi), %xmm1
	addss	%xmm1, %xmm0
	movss	%xmm0, (%rdx,%rax,4)
	incq	%r9
	addq	%r8, %rsi
	cmpq	%r9, %rcx
	jne	.LBB6_2
.LBB6_3:                                # %._crit_edge
	retq
.Lfunc_end6:
	.size	_Z12cpuKernel_yxPfS_S_iii, .Lfunc_end6-_Z12cpuKernel_yxPfS_S_iii
	.cfi_endproc
                                        # -- End function
	.globl	_Z25__device_stub__kernelFuncPfS_S_i # -- Begin function _Z25__device_stub__kernelFuncPfS_S_i
	.type	_Z25__device_stub__kernelFuncPfS_S_i,@function
_Z25__device_stub__kernelFuncPfS_S_i:   # @_Z25__device_stub__kernelFuncPfS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10kernelFuncPfS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	_Z25__device_stub__kernelFuncPfS_S_i, .Lfunc_end7-_Z25__device_stub__kernelFuncPfS_S_i
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB8_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB8_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10kernelFuncPfS_S_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end8:
	.size	__hip_module_ctor, .Lfunc_end8-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB9_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB9_2:
	retq
.Lfunc_end9:
	.size	__hip_module_dtor, .Lfunc_end9-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Device Name: %s\n"
	.size	.L.str, 17

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"n=%d\t CPU=%06ld ms GPU=%06ld ms mse=%f\n"
	.size	.L.str.1, 40

	.type	_Z10kernelFuncPfS_S_i,@object   # @_Z10kernelFuncPfS_S_i
	.section	.rodata,"a",@progbits
	.globl	_Z10kernelFuncPfS_S_i
	.p2align	3, 0x0
_Z10kernelFuncPfS_S_i:
	.quad	_Z25__device_stub__kernelFuncPfS_S_i
	.size	_Z10kernelFuncPfS_S_i, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z10kernelFuncPfS_S_i"
	.size	.L__unnamed_1, 22

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z25__device_stub__kernelFuncPfS_S_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z10kernelFuncPfS_S_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z10kernelFuncPfS_S_i   ; -- Begin function _Z10kernelFuncPfS_S_i
	.globl	_Z10kernelFuncPfS_S_i
	.p2align	8
	.type	_Z10kernelFuncPfS_S_i,@function
_Z10kernelFuncPfS_S_i:                  ; @_Z10kernelFuncPfS_S_i
; %bb.0:
	s_clause 0x3
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s8, s[0:1], 0x18
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_cmp_lt_i32 s8, 1
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mul_i32 s2, s14, s8
	s_cbranch_scc1 .LBB0_3
; %bb.1:                                ; %.lr.ph.preheader
	s_ashr_i32 s3, s2, 31
	v_mov_b32_e32 v0, 0
	s_lshl_b64 s[10:11], s[2:3], 2
	s_delay_alu instid0(VALU_DEP_2)
	v_mov_b32_e32 v2, v1
	s_add_u32 s4, s4, s10
	s_addc_u32 s5, s5, s11
	s_mov_b32 s3, s8
.LBB0_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1)
	v_ashrrev_i32_e32 v3, 31, v2
	s_load_b32 s9, s[4:5], 0x0
	s_add_i32 s3, s3, -1
	s_add_u32 s4, s4, 4
	s_addc_u32 s5, s5, 0
	v_lshlrev_b64 v[3:4], 2, v[2:3]
	v_add_nc_u32_e32 v2, s8, v2
	s_cmp_lg_u32 s3, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v3, vcc_lo, s6, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s7, v4, vcc_lo
	global_load_b32 v3, v[3:4], off
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_fmac_f32_e32 v0, s9, v3
	s_cbranch_scc1 .LBB0_2
	s_branch .LBB0_4
.LBB0_3:
	v_mov_b32_e32 v0, 0
.LBB0_4:                                ; %._crit_edge
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v1, s2, v1
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, vcc_lo, s0, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	global_store_b32 v[1:2], v0, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10kernelFuncPfS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z10kernelFuncPfS_S_i, .Lfunc_end0-_Z10kernelFuncPfS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 248
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10kernelFuncPfS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z10kernelFuncPfS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
