#ifndef GLOBAL_CUBIC_CU
#define GLOBAL_CUBIC_CU

#include <thrust/complex.h>
using namespace thrust;

extern "C" __global__ void cubic(const double* B,
                                 const double* C,
                                 const double* D,
                                 long n,
                                 double* x)
{
    long i = blockDim.x * blockIdx.x + threadIdx.x;
    if (i < n) {
        double b = B[i], c = C[i], d = D[i];
        complex<double> delta, u, v, m, n, w, r0, r1, r2;
        u = (9 * b * c - 27 * d - 2 * b * b * b) / 54;
        delta = 3 * (4 * pow(c, 3) - pow(b, 2) * pow(c, 2)  - 18 * b * c * d + 27 * pow(d, 2) + 4 * pow(b, 3) * d);
        v = sqrt(delta) / 18;
        m = abs(u + v) >= abs(u - v) ? pow(u + v, 1. / 3) : pow(u - v, 1. / 3);
        n = abs(m) > 1e-8 ? (pow(b, 2) - 3 * c) / (m * 9) : 0;
        w.real(-0.5); w.imag(0.5 * sqrt(3.0));
        r0 = m + n - b / 3;
        r1 = w * m + w * w * n - b / 3;
        r2 = w * w * m + w * n - b / 3;
        if (abs(r0.imag()) > 1e-8) r0.real(0);
        if (abs(r1.imag()) > 1e-8) r1.real(0);
        if (abs(r2.imag()) > 1e-8) r2.real(0);
        x[i] = fmax(fmax(r0.real(), r1.real()), r2.real());
    }
}
#endif
	.file	"tmpxft_0021cb4b_00000000-6_global_cubic.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB5942:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE5942:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z34__device_stub__Z5cubicPKdS0_S0_lPdPKdS0_S0_lPd
	.type	_Z34__device_stub__Z5cubicPKdS0_S0_lPdPKdS0_S0_lPd, @function
_Z34__device_stub__Z5cubicPKdS0_S0_lPdPKdS0_S0_lPd:
.LFB5964:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movq	%r8, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	56(%rsp)
	.cfi_def_cfa_offset 184
	leaq	cubic(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 192
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L2:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE5964:
	.size	_Z34__device_stub__Z5cubicPKdS0_S0_lPdPKdS0_S0_lPd, .-_Z34__device_stub__Z5cubicPKdS0_S0_lPdPKdS0_S0_lPd
	.globl	cubic
	.type	cubic, @function
cubic:
.LFB5965:
	.cfi_startproc
	endbr64
	jmp	_Z34__device_stub__Z5cubicPKdS0_S0_lPdPKdS0_S0_lPd
	.cfi_endproc
.LFE5965:
	.size	cubic, .-cubic
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"cubic"
.LC1:
	.string	"_ZN43_INTERNAL_31311394_15_global_cubic_cu_cubic4cuda3std3__45__cpo5beginE"
.LC2:
	.string	"_ZN43_INTERNAL_31311394_15_global_cubic_cu_cubic4cuda3std3__45__cpo3endE"
.LC3:
	.string	"_ZN43_INTERNAL_31311394_15_global_cubic_cu_cubic4cuda3std3__45__cpo6cbeginE"
.LC4:
	.string	"_ZN43_INTERNAL_31311394_15_global_cubic_cu_cubic4cuda3std3__45__cpo4cendE"
.LC5:
	.string	"_ZN43_INTERNAL_31311394_15_global_cubic_cu_cubic4cuda3std3__445_GLOBAL__N__31311394_15_global_cubic_cu_cubic6ignoreE"
.LC6:
	.string	"_ZN43_INTERNAL_31311394_15_global_cubic_cu_cubic4cuda3std3__419piecewise_constructE"
.LC7:
	.string	"_ZN43_INTERNAL_31311394_15_global_cubic_cu_cubic4cuda3std3__48in_placeE"
.LC8:
	.string	"_ZN43_INTERNAL_31311394_15_global_cubic_cu_cubic4cuda3std6ranges3__45__cpo4swapE"
.LC9:
	.string	"_ZN43_INTERNAL_31311394_15_global_cubic_cu_cubic4cuda3std6ranges3__45__cpo9iter_moveE"
.LC10:
	.string	"_ZN43_INTERNAL_31311394_15_global_cubic_cu_cubic4cuda3std6ranges3__45__cpo7advanceE"
.LC11:
	.string	"_ZN43_INTERNAL_31311394_15_global_cubic_cu_cubic6thrust20THRUST_200700_890_NS6system6detail10sequential3seqE"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB5967:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	cubic(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC1(%rip), %rdx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__45__cpo5beginE(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC2(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__45__cpo3endE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC3(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__45__cpo6cbeginE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC4(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__45__cpo4cendE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__445_GLOBAL__N__31311394_15_global_cubic_cu_cubic6ignoreE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC6(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__419piecewise_constructE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC7(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__48in_placeE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC8(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo4swapE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	popq	%r8
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC9(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo9iter_moveE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r9
	.cfi_def_cfa_offset 24
	popq	%r10
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC10(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo7advanceE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%r11
	.cfi_def_cfa_offset 24
	popq	%rax
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC11(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN6thrust20THRUST_200700_890_NS6system6detail10sequentialL3seqE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE5967:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata
	.type	_ZN6thrust20THRUST_200700_890_NS6system6detail10sequentialL3seqE, @object
	.size	_ZN6thrust20THRUST_200700_890_NS6system6detail10sequentialL3seqE, 1
_ZN6thrust20THRUST_200700_890_NS6system6detail10sequentialL3seqE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo7advanceE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo7advanceE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo7advanceE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo7advanceE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo7advanceE, 1
_ZN4cuda3std6ranges3__45__cpo7advanceE:
	.zero	1
	.hidden	_ZN4cuda3std3__445_GLOBAL__N__31311394_15_global_cubic_cu_cubic6ignoreE
	.weak	_ZN4cuda3std3__445_GLOBAL__N__31311394_15_global_cubic_cu_cubic6ignoreE
	.section	.rodata._ZN4cuda3std3__445_GLOBAL__N__31311394_15_global_cubic_cu_cubic6ignoreE,"aG",@progbits,_ZN4cuda3std3__445_GLOBAL__N__31311394_15_global_cubic_cu_cubic6ignoreE,comdat
	.type	_ZN4cuda3std3__445_GLOBAL__N__31311394_15_global_cubic_cu_cubic6ignoreE, @gnu_unique_object
	.size	_ZN4cuda3std3__445_GLOBAL__N__31311394_15_global_cubic_cu_cubic6ignoreE, 1
_ZN4cuda3std3__445_GLOBAL__N__31311394_15_global_cubic_cu_cubic6ignoreE:
	.zero	1
	.weak	_ZN4cuda3std3__48in_placeE
	.section	.rodata._ZN4cuda3std3__48in_placeE,"aG",@progbits,_ZN4cuda3std3__48in_placeE,comdat
	.type	_ZN4cuda3std3__48in_placeE, @gnu_unique_object
	.size	_ZN4cuda3std3__48in_placeE, 1
_ZN4cuda3std3__48in_placeE:
	.zero	1
	.weak	_ZN4cuda3std3__45__cpo4cendE
	.section	.rodata._ZN4cuda3std3__45__cpo4cendE,"aG",@progbits,_ZN4cuda3std3__45__cpo4cendE,comdat
	.type	_ZN4cuda3std3__45__cpo4cendE, @gnu_unique_object
	.size	_ZN4cuda3std3__45__cpo4cendE, 1
_ZN4cuda3std3__45__cpo4cendE:
	.zero	1
	.weak	_ZN4cuda3std3__45__cpo6cbeginE
	.section	.rodata._ZN4cuda3std3__45__cpo6cbeginE,"aG",@progbits,_ZN4cuda3std3__45__cpo6cbeginE,comdat
	.type	_ZN4cuda3std3__45__cpo6cbeginE, @gnu_unique_object
	.size	_ZN4cuda3std3__45__cpo6cbeginE, 1
_ZN4cuda3std3__45__cpo6cbeginE:
	.zero	1
	.weak	_ZN4cuda3std3__45__cpo3endE
	.section	.rodata._ZN4cuda3std3__45__cpo3endE,"aG",@progbits,_ZN4cuda3std3__45__cpo3endE,comdat
	.type	_ZN4cuda3std3__45__cpo3endE, @gnu_unique_object
	.size	_ZN4cuda3std3__45__cpo3endE, 1
_ZN4cuda3std3__45__cpo3endE:
	.zero	1
	.weak	_ZN4cuda3std3__45__cpo5beginE
	.section	.rodata._ZN4cuda3std3__45__cpo5beginE,"aG",@progbits,_ZN4cuda3std3__45__cpo5beginE,comdat
	.type	_ZN4cuda3std3__45__cpo5beginE, @gnu_unique_object
	.size	_ZN4cuda3std3__45__cpo5beginE, 1
_ZN4cuda3std3__45__cpo5beginE:
	.zero	1
	.weak	_ZN4cuda3std3__419piecewise_constructE
	.section	.rodata._ZN4cuda3std3__419piecewise_constructE,"aG",@progbits,_ZN4cuda3std3__419piecewise_constructE,comdat
	.type	_ZN4cuda3std3__419piecewise_constructE, @gnu_unique_object
	.size	_ZN4cuda3std3__419piecewise_constructE, 1
_ZN4cuda3std3__419piecewise_constructE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo9iter_moveE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo9iter_moveE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo9iter_moveE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo9iter_moveE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo9iter_moveE, 1
_ZN4cuda3std6ranges3__45__cpo9iter_moveE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo4swapE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo4swapE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4swapE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo4swapE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo4swapE, 1
_ZN4cuda3std6ranges3__45__cpo4swapE:
	.zero	1
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#ifndef GLOBAL_CUBIC_CU
#define GLOBAL_CUBIC_CU

#include <thrust/complex.h>
using namespace thrust;

extern "C" __global__ void cubic(const double* B,
                                 const double* C,
                                 const double* D,
                                 long n,
                                 double* x)
{
    long i = blockDim.x * blockIdx.x + threadIdx.x;
    if (i < n) {
        double b = B[i], c = C[i], d = D[i];
        complex<double> delta, u, v, m, n, w, r0, r1, r2;
        u = (9 * b * c - 27 * d - 2 * b * b * b) / 54;
        delta = 3 * (4 * pow(c, 3) - pow(b, 2) * pow(c, 2)  - 18 * b * c * d + 27 * pow(d, 2) + 4 * pow(b, 3) * d);
        v = sqrt(delta) / 18;
        m = abs(u + v) >= abs(u - v) ? pow(u + v, 1. / 3) : pow(u - v, 1. / 3);
        n = abs(m) > 1e-8 ? (pow(b, 2) - 3 * c) / (m * 9) : 0;
        w.real(-0.5); w.imag(0.5 * sqrt(3.0));
        r0 = m + n - b / 3;
        r1 = w * m + w * w * n - b / 3;
        r2 = w * w * m + w * n - b / 3;
        if (abs(r0.imag()) > 1e-8) r0.real(0);
        if (abs(r1.imag()) > 1e-8) r1.real(0);
        if (abs(r2.imag()) > 1e-8) r2.real(0);
        x[i] = fmax(fmax(r0.real(), r1.real()), r2.real());
    }
}
#endif
	.text
	.file	"global_cubic.hip"
	.globl	__device_stub__cubic            # -- Begin function __device_stub__cubic
	.type	__device_stub__cubic,@function
__device_stub__cubic:                   # @__device_stub__cubic
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$cubic, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	__device_stub__cubic, .Lfunc_end0-__device_stub__cubic
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB1_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB1_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$cubic, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end1:
	.size	__hip_module_ctor, .Lfunc_end1-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB2_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB2_2:
	retq
.Lfunc_end2:
	.size	__hip_module_dtor, .Lfunc_end2-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	cubic,@object                   # @cubic
	.section	.rodata,"a",@progbits
	.globl	cubic
	.p2align	3, 0x0
cubic:
	.quad	__device_stub__cubic
	.size	cubic, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"cubic"
	.size	.L__unnamed_1, 6

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __device_stub__cubic
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym cubic
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	cubic                   ; -- Begin function cubic
	.globl	cubic
	.p2align	8
	.type	cubic,@function
cubic:                                  ; @cubic
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x34
	s_load_b256 s[4:11], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	v_mov_b32_e32 v2, 0
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i64_e64 s[10:11], v[1:2]
	s_cbranch_execz .LBB0_196
; %bb.1:
	v_lshlrev_b64 v[64:65], 3, v[1:2]
	s_mov_b32 s10, 0x3abe935a
	s_mov_b32 s11, 0x3fbe25e4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v0, vcc_lo, s6, v64
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v65, vcc_lo
	v_add_co_u32 v2, vcc_lo, s4, v64
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v65, vcc_lo
	s_mov_b32 s4, 0x55555555
	global_load_b64 v[68:69], v[0:1], off
	global_load_b64 v[66:67], v[2:3], off
	v_add_co_u32 v0, vcc_lo, s8, v64
	v_add_co_ci_u32_e32 v1, vcc_lo, s9, v65, vcc_lo
	s_mov_b32 s5, 0x3fe55555
	s_mov_b32 s6, 0x968915a9
	s_mov_b32 s8, 0x4222de17
	global_load_b64 v[0:1], v[0:1], off
	s_mov_b32 s7, 0x3fba6564
	s_mov_b32 s9, 0x3fbdee67
	s_waitcnt vmcnt(2)
	v_frexp_mant_f64_e64 v[2:3], |v[68:69]|
	s_waitcnt vmcnt(1)
	v_frexp_mant_f64_e64 v[4:5], |v[66:67]|
	s_waitcnt vmcnt(0)
	v_frexp_mant_f64_e64 v[6:7], |v[0:1]|
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_f64_e64 s2, s[4:5], v[2:3]
	v_cmp_gt_f64_e64 s3, s[4:5], v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_f64_e32 vcc_lo, s[4:5], v[6:7]
	v_cndmask_b32_e64 v8, 0, 1, s2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v9, 0, 1, s3
	v_ldexp_f64 v[2:3], v[2:3], v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[4:5], v[4:5], v9
	v_cndmask_b32_e64 v8, 0, 1, vcc_lo
	v_ldexp_f64 v[6:7], v[6:7], v8
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[8:9], v[2:3], 1.0
	v_add_f64 v[10:11], v[4:5], 1.0
	v_add_f64 v[26:27], v[2:3], -1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[12:13], v[6:7], 1.0
	v_rcp_f64_e32 v[14:15], v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_rcp_f64_e32 v[16:17], v[10:11]
	v_add_f64 v[32:33], v[8:9], -1.0
	v_add_f64 v[36:37], v[10:11], -1.0
	v_rcp_f64_e32 v[18:19], v[12:13]
	v_add_f64 v[40:41], v[12:13], -1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(TRANS32_DEP_3)
	v_add_f64 v[2:3], v[2:3], -v[32:33]
	v_fma_f64 v[20:21], -v[8:9], v[14:15], 1.0
	s_delay_alu instid0(TRANS32_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_fma_f64 v[22:23], -v[10:11], v[16:17], 1.0
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[24:25], -v[12:13], v[18:19], 1.0
	v_fma_f64 v[14:15], v[20:21], v[14:15], v[14:15]
	v_fma_f64 v[16:17], v[22:23], v[16:17], v[16:17]
	v_fma_f64 v[18:19], v[24:25], v[18:19], v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[20:21], -v[8:9], v[14:15], 1.0
	v_fma_f64 v[22:23], -v[10:11], v[16:17], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[24:25], -v[12:13], v[18:19], 1.0
	v_fma_f64 v[14:15], v[20:21], v[14:15], v[14:15]
	v_add_f64 v[20:21], v[4:5], -1.0
	s_delay_alu instid0(VALU_DEP_4)
	v_fma_f64 v[16:17], v[22:23], v[16:17], v[16:17]
	v_add_f64 v[22:23], v[6:7], -1.0
	v_add_f64 v[4:5], v[4:5], -v[36:37]
	v_add_f64 v[6:7], v[6:7], -v[40:41]
	v_fma_f64 v[18:19], v[24:25], v[18:19], v[18:19]
	v_mul_f64 v[24:25], v[26:27], v[14:15]
	v_mul_f64 v[28:29], v[20:21], v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[30:31], v[22:23], v[18:19]
	v_mul_f64 v[34:35], v[8:9], v[24:25]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[38:39], v[10:11], v[28:29]
	v_mul_f64 v[42:43], v[12:13], v[30:31]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[8:9], v[24:25], v[8:9], -v[34:35]
	v_fma_f64 v[10:11], v[28:29], v[10:11], -v[38:39]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[12:13], v[30:31], v[12:13], -v[42:43]
	v_fma_f64 v[2:3], v[24:25], v[2:3], v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[4:5], v[28:29], v[4:5], v[10:11]
	v_fma_f64 v[6:7], v[30:31], v[6:7], v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[8:9], v[34:35], v[2:3]
	v_add_f64 v[10:11], v[38:39], v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[42:43], v[6:7]
	v_add_f64 v[32:33], v[26:27], -v[8:9]
	v_add_f64 v[34:35], v[8:9], -v[34:35]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[36:37], v[20:21], -v[10:11]
	v_add_f64 v[38:39], v[10:11], -v[38:39]
	v_add_f64 v[40:41], v[22:23], -v[12:13]
	v_add_f64 v[42:43], v[12:13], -v[42:43]
	v_add_f64 v[26:27], v[26:27], -v[32:33]
	v_add_f64 v[2:3], v[34:35], -v[2:3]
	v_add_f64 v[20:21], v[20:21], -v[36:37]
	v_add_f64 v[4:5], v[38:39], -v[4:5]
	v_add_f64 v[22:23], v[22:23], -v[40:41]
	v_add_f64 v[6:7], v[42:43], -v[6:7]
	v_add_f64 v[8:9], v[26:27], -v[8:9]
	v_add_f64 v[10:11], v[20:21], -v[10:11]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[22:23], -v[12:13]
	v_add_f64 v[2:3], v[2:3], v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[4:5], v[4:5], v[10:11]
	v_add_f64 v[6:7], v[6:7], v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[2:3], v[32:33], v[2:3]
	v_add_f64 v[4:5], v[36:37], v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[6:7], v[40:41], v[6:7]
	v_mul_f64 v[2:3], v[14:15], v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[4:5], v[16:17], v[4:5]
	v_mul_f64 v[6:7], v[18:19], v[6:7]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[8:9], v[24:25], v[2:3]
	v_add_f64 v[10:11], v[28:29], v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[30:31], v[6:7]
	v_add_f64 v[14:15], v[8:9], -v[24:25]
	v_mul_f64 v[20:21], v[8:9], v[8:9]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[16:17], v[10:11], -v[28:29]
	v_add_f64 v[18:19], v[12:13], -v[30:31]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[2:3], v[2:3], -v[14:15]
	v_mul_f64 v[14:15], v[10:11], v[10:11]
	v_add_f64 v[4:5], v[4:5], -v[16:17]
	v_mul_f64 v[16:17], v[12:13], v[12:13]
	v_add_f64 v[6:7], v[6:7], -v[18:19]
	v_fma_f64 v[18:19], v[8:9], v[8:9], -v[20:21]
	v_add_f64 v[22:23], v[2:3], v[2:3]
	v_fma_f64 v[24:25], v[10:11], v[10:11], -v[14:15]
	v_add_f64 v[26:27], v[4:5], v[4:5]
	v_fma_f64 v[28:29], v[12:13], v[12:13], -v[16:17]
	v_add_f64 v[30:31], v[6:7], v[6:7]
	v_fma_f64 v[18:19], v[8:9], v[22:23], v[18:19]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[22:23], v[10:11], v[26:27], v[24:25]
	v_fma_f64 v[24:25], v[12:13], v[30:31], v[28:29]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[26:27], v[20:21], v[18:19]
	v_add_f64 v[28:29], v[14:15], v[22:23]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[30:31], v[16:17], v[24:25]
	v_fma_f64 v[32:33], v[26:27], s[8:9], s[6:7]
	v_add_f64 v[20:21], v[26:27], -v[20:21]
	s_delay_alu instid0(VALU_DEP_4)
	v_fma_f64 v[34:35], v[28:29], s[8:9], s[6:7]
	v_add_f64 v[14:15], v[28:29], -v[14:15]
	v_mul_f64 v[50:51], v[10:11], v[28:29]
	v_fma_f64 v[36:37], v[30:31], s[8:9], s[6:7]
	s_mov_b32 s6, 0x47e6c9c2
	s_mov_b32 s7, 0x3fc110ef
	s_mov_b32 s8, 0xcfa74449
	s_mov_b32 s9, 0x3fc3b13b
	v_add_f64 v[16:17], v[30:31], -v[16:17]
	v_mul_f64 v[52:53], v[12:13], v[30:31]
	v_fma_f64 v[32:33], v[26:27], v[32:33], s[10:11]
	v_add_f64 v[18:19], v[18:19], -v[20:21]
	v_fma_f64 v[34:35], v[28:29], v[34:35], s[10:11]
	v_add_f64 v[14:15], v[22:23], -v[14:15]
	v_fma_f64 v[36:37], v[30:31], v[36:37], s[10:11]
	s_mov_b32 s10, 0x652b82fe
	s_mov_b32 s11, 0x3ff71547
	v_add_f64 v[16:17], v[24:25], -v[16:17]
	v_fma_f64 v[60:61], v[30:31], v[12:13], -v[52:53]
	v_fma_f64 v[32:33], v[26:27], v[32:33], s[6:7]
	v_fma_f64 v[34:35], v[28:29], v[34:35], s[6:7]
	v_fma_f64 v[36:37], v[30:31], v[36:37], s[6:7]
	s_mov_b32 s6, 0x71bf3c30
	s_mov_b32 s7, 0x3fc745d1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[32:33], v[26:27], v[32:33], s[8:9]
	v_fma_f64 v[34:35], v[28:29], v[34:35], s[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[36:37], v[30:31], v[36:37], s[8:9]
	s_mov_b32 s8, 0x1c7792ce
	s_mov_b32 s9, 0x3fcc71c7
	v_fma_f64 v[32:33], v[26:27], v[32:33], s[6:7]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[34:35], v[28:29], v[34:35], s[6:7]
	v_fma_f64 v[36:37], v[30:31], v[36:37], s[6:7]
	s_mov_b32 s6, 0x924920da
	s_mov_b32 s7, 0x3fd24924
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[32:33], v[26:27], v[32:33], s[8:9]
	v_fma_f64 v[34:35], v[28:29], v[34:35], s[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[36:37], v[30:31], v[36:37], s[8:9]
	s_mov_b32 s8, 0x9999999c
	s_mov_b32 s9, 0x3fd99999
	v_fma_f64 v[32:33], v[26:27], v[32:33], s[6:7]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[34:35], v[28:29], v[34:35], s[6:7]
	v_fma_f64 v[36:37], v[30:31], v[36:37], s[6:7]
	s_mov_b32 s7, 0xbfe55555
	s_mov_b32 s6, s4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[32:33], v[26:27], v[32:33], s[8:9]
	v_fma_f64 v[34:35], v[28:29], v[34:35], s[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[36:37], v[30:31], v[36:37], s[8:9]
	s_mov_b32 s8, 0x3b39803f
	s_mov_b32 s9, 0x3c7abc9e
	v_mul_f64 v[38:39], v[26:27], v[32:33]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[40:41], v[28:29], v[34:35]
	v_mul_f64 v[42:43], v[30:31], v[36:37]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[20:21], v[26:27], v[32:33], -v[38:39]
	v_fma_f64 v[22:23], v[28:29], v[34:35], -v[40:41]
	s_delay_alu instid0(VALU_DEP_3)
	v_fma_f64 v[24:25], v[30:31], v[36:37], -v[42:43]
	v_fma_f64 v[30:31], v[30:31], v[6:7], v[60:61]
	v_ldexp_f64 v[6:7], v[6:7], 1
	v_fma_f64 v[20:21], v[18:19], v[32:33], v[20:21]
	v_fma_f64 v[22:23], v[14:15], v[34:35], v[22:23]
	v_fma_f64 v[24:25], v[16:17], v[36:37], v[24:25]
	v_mul_f64 v[36:37], v[8:9], v[26:27]
	v_fma_f64 v[16:17], v[16:17], v[12:13], v[30:31]
	v_ldexp_f64 v[12:13], v[12:13], 1
	v_add_f64 v[32:33], v[38:39], v[20:21]
	v_add_f64 v[34:35], v[40:41], v[22:23]
	v_add_f64 v[44:45], v[42:43], v[24:25]
	v_fma_f64 v[54:55], v[26:27], v[8:9], -v[36:37]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[46:47], v[32:33], s[4:5]
	v_add_f64 v[38:39], v[32:33], -v[38:39]
	v_add_f64 v[48:49], v[34:35], s[4:5]
	v_add_f64 v[40:41], v[34:35], -v[40:41]
	v_add_f64 v[56:57], v[44:45], s[4:5]
	v_add_f64 v[42:43], v[44:45], -v[42:43]
	v_fma_f64 v[26:27], v[26:27], v[2:3], v[54:55]
	s_mov_b32 s4, 0xd5df274d
	s_mov_b32 s5, 0x3c8543b0
	v_ldexp_f64 v[2:3], v[2:3], 1
	v_add_f64 v[58:59], v[46:47], s[6:7]
	v_add_f64 v[20:21], v[20:21], -v[38:39]
	v_add_f64 v[38:39], v[48:49], s[6:7]
	v_add_f64 v[22:23], v[22:23], -v[40:41]
	v_fma_f64 v[40:41], v[28:29], v[10:11], -v[50:51]
	v_add_f64 v[54:55], v[56:57], s[6:7]
	v_add_f64 v[24:25], v[24:25], -v[42:43]
	v_fma_f64 v[18:19], v[18:19], v[8:9], v[26:27]
	v_ldexp_f64 v[8:9], v[8:9], 1
	s_mov_b32 s6, 0xfefa39ef
	s_mov_b32 s7, 0x3fe62e42
	v_add_f64 v[32:33], v[32:33], -v[58:59]
	v_add_f64 v[20:21], v[20:21], s[4:5]
	v_add_f64 v[34:35], v[34:35], -v[38:39]
	v_add_f64 v[22:23], v[22:23], s[4:5]
	v_fma_f64 v[28:29], v[28:29], v[4:5], v[40:41]
	v_ldexp_f64 v[4:5], v[4:5], 1
	v_add_f64 v[38:39], v[44:45], -v[54:55]
	v_add_f64 v[24:25], v[24:25], s[4:5]
	v_add_f64 v[20:21], v[20:21], v[32:33]
	v_add_f64 v[22:23], v[22:23], v[34:35]
	v_fma_f64 v[14:15], v[14:15], v[10:11], v[28:29]
	v_add_f64 v[28:29], v[36:37], v[18:19]
	v_ldexp_f64 v[10:11], v[10:11], 1
	v_add_f64 v[24:25], v[24:25], v[38:39]
	v_add_f64 v[38:39], v[52:53], v[16:17]
	v_add_f64 v[26:27], v[46:47], v[20:21]
	v_add_f64 v[30:31], v[48:49], v[22:23]
	v_add_f64 v[32:33], v[50:51], v[14:15]
	v_add_f64 v[36:37], v[28:29], -v[36:37]
	v_add_f64 v[34:35], v[56:57], v[24:25]
	v_add_f64 v[52:53], v[38:39], -v[52:53]
	v_add_f64 v[40:41], v[46:47], -v[26:27]
	v_mul_f64 v[42:43], v[28:29], v[26:27]
	v_add_f64 v[44:45], v[48:49], -v[30:31]
	v_mul_f64 v[46:47], v[32:33], v[30:31]
	v_add_f64 v[48:49], v[32:33], -v[50:51]
	v_add_f64 v[18:19], v[18:19], -v[36:37]
	v_add_f64 v[50:51], v[56:57], -v[34:35]
	v_mul_f64 v[54:55], v[38:39], v[34:35]
	v_add_f64 v[16:17], v[16:17], -v[52:53]
	v_add_f64 v[20:21], v[20:21], v[40:41]
	v_fma_f64 v[40:41], v[28:29], v[26:27], -v[42:43]
	v_add_f64 v[22:23], v[22:23], v[44:45]
	v_fma_f64 v[44:45], v[32:33], v[30:31], -v[46:47]
	v_add_f64 v[14:15], v[14:15], -v[48:49]
	v_add_f64 v[24:25], v[24:25], v[50:51]
	v_fma_f64 v[50:51], v[38:39], v[34:35], -v[54:55]
	v_fma_f64 v[20:21], v[28:29], v[20:21], v[40:41]
	v_fma_f64 v[22:23], v[32:33], v[22:23], v[44:45]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fma_f64 v[24:25], v[38:39], v[24:25], v[50:51]
	v_frexp_exp_i32_f64_e32 v38, v[0:1]
	v_fma_f64 v[18:19], v[18:19], v[26:27], v[20:21]
	v_frexp_exp_i32_f64_e32 v26, v[68:69]
	v_fma_f64 v[14:15], v[14:15], v[30:31], v[22:23]
	v_frexp_exp_i32_f64_e32 v27, v[66:67]
	v_fma_f64 v[16:17], v[16:17], v[34:35], v[24:25]
	v_subrev_co_ci_u32_e32 v38, vcc_lo, 0, v38, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_cvt_f64_i32_e32 v[38:39], v38
	v_add_f64 v[20:21], v[42:43], v[18:19]
	v_subrev_co_ci_u32_e64 v24, s2, 0, v26, s2
	v_add_f64 v[22:23], v[46:47], v[14:15]
	v_subrev_co_ci_u32_e64 v26, s2, 0, v27, s3
	v_cvt_f64_i32_e32 v[24:25], v24
	v_add_f64 v[28:29], v[54:55], v[16:17]
	s_delay_alu instid0(VALU_DEP_3)
	v_cvt_f64_i32_e32 v[26:27], v26
	v_add_f64 v[30:31], v[8:9], v[20:21]
	v_add_f64 v[32:33], v[20:21], -v[42:43]
	v_add_f64 v[34:35], v[10:11], v[22:23]
	v_add_f64 v[36:37], v[22:23], -v[46:47]
	v_mul_f64 v[40:41], v[24:25], s[6:7]
	v_add_f64 v[44:45], v[12:13], v[28:29]
	v_add_f64 v[46:47], v[28:29], -v[54:55]
	v_mul_f64 v[42:43], v[26:27], s[6:7]
	v_add_f64 v[8:9], v[30:31], -v[8:9]
	v_add_f64 v[18:19], v[18:19], -v[32:33]
	v_mul_f64 v[32:33], v[38:39], s[6:7]
	v_add_f64 v[10:11], v[34:35], -v[10:11]
	v_add_f64 v[14:15], v[14:15], -v[36:37]
	v_fma_f64 v[36:37], v[24:25], s[6:7], -v[40:41]
	v_add_f64 v[12:13], v[44:45], -v[12:13]
	v_add_f64 v[16:17], v[16:17], -v[46:47]
	v_fma_f64 v[48:49], v[26:27], s[6:7], -v[42:43]
	v_add_f64 v[8:9], v[20:21], -v[8:9]
	v_add_f64 v[2:3], v[2:3], v[18:19]
	v_add_f64 v[10:11], v[22:23], -v[10:11]
	v_add_f64 v[4:5], v[4:5], v[14:15]
	v_fma_f64 v[14:15], v[38:39], s[6:7], -v[32:33]
	s_mov_b32 s7, 0xbfe62e42
	v_add_f64 v[12:13], v[28:29], -v[12:13]
	v_add_f64 v[6:7], v[6:7], v[16:17]
	v_fma_f64 v[16:17], v[24:25], s[8:9], v[36:37]
	v_add_f64 v[2:3], v[2:3], v[8:9]
	v_fma_f64 v[8:9], v[26:27], s[8:9], v[48:49]
	v_add_f64 v[4:5], v[4:5], v[10:11]
	v_fma_f64 v[10:11], v[38:39], s[8:9], v[14:15]
	s_mov_b32 s9, 0xbc7abc9e
	v_add_f64 v[6:7], v[6:7], v[12:13]
	v_add_f64 v[12:13], v[40:41], v[16:17]
	v_add_f64 v[14:15], v[30:31], v[2:3]
	v_add_f64 v[18:19], v[42:43], v[8:9]
	v_add_f64 v[20:21], v[34:35], v[4:5]
	v_add_f64 v[22:23], v[32:33], v[10:11]
	v_add_f64 v[24:25], v[44:45], v[6:7]
	v_add_f64 v[40:41], v[12:13], -v[40:41]
	v_add_f64 v[26:27], v[12:13], v[14:15]
	v_add_f64 v[30:31], v[14:15], -v[30:31]
	v_add_f64 v[42:43], v[18:19], -v[42:43]
	v_add_f64 v[28:29], v[18:19], v[20:21]
	v_add_f64 v[34:35], v[20:21], -v[34:35]
	v_add_f64 v[32:33], v[22:23], -v[32:33]
	v_add_f64 v[36:37], v[22:23], v[24:25]
	v_add_f64 v[16:17], v[16:17], -v[40:41]
	v_add_f64 v[40:41], v[24:25], -v[44:45]
	v_add_f64 v[38:39], v[26:27], -v[12:13]
	v_add_f64 v[2:3], v[2:3], -v[30:31]
	v_add_f64 v[8:9], v[8:9], -v[42:43]
	v_add_f64 v[46:47], v[28:29], -v[18:19]
	v_add_f64 v[4:5], v[4:5], -v[34:35]
	v_add_f64 v[10:11], v[10:11], -v[32:33]
	v_add_f64 v[48:49], v[36:37], -v[22:23]
	v_add_f64 v[6:7], v[6:7], -v[40:41]
	v_add_f64 v[50:51], v[26:27], -v[38:39]
	v_add_f64 v[14:15], v[14:15], -v[38:39]
	v_add_f64 v[52:53], v[28:29], -v[46:47]
	v_add_f64 v[20:21], v[20:21], -v[46:47]
	v_add_f64 v[30:31], v[36:37], -v[48:49]
	v_add_f64 v[24:25], v[24:25], -v[48:49]
	v_add_f64 v[12:13], v[12:13], -v[50:51]
	v_add_f64 v[18:19], v[18:19], -v[52:53]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[22:23], v[22:23], -v[30:31]
	v_add_f64 v[30:31], v[16:17], v[2:3]
	v_add_f64 v[12:13], v[14:15], v[12:13]
	v_add_f64 v[14:15], v[8:9], v[4:5]
	v_add_f64 v[18:19], v[20:21], v[18:19]
	v_add_f64 v[20:21], v[10:11], v[6:7]
	v_add_f64 v[22:23], v[24:25], v[22:23]
	v_add_f64 v[24:25], v[30:31], -v[16:17]
	v_add_f64 v[12:13], v[30:31], v[12:13]
	v_add_f64 v[32:33], v[14:15], -v[8:9]
	v_add_f64 v[18:19], v[14:15], v[18:19]
	v_add_f64 v[34:35], v[20:21], -v[10:11]
	v_add_f64 v[22:23], v[20:21], v[22:23]
	v_add_f64 v[30:31], v[30:31], -v[24:25]
	v_add_f64 v[2:3], v[2:3], -v[24:25]
	v_add_f64 v[38:39], v[26:27], v[12:13]
	v_add_f64 v[14:15], v[14:15], -v[32:33]
	v_add_f64 v[4:5], v[4:5], -v[32:33]
	v_add_f64 v[40:41], v[28:29], v[18:19]
	v_add_f64 v[20:21], v[20:21], -v[34:35]
	v_add_f64 v[6:7], v[6:7], -v[34:35]
	v_add_f64 v[24:25], v[36:37], v[22:23]
	v_add_f64 v[16:17], v[16:17], -v[30:31]
	v_add_f64 v[26:27], v[38:39], -v[26:27]
	v_add_f64 v[8:9], v[8:9], -v[14:15]
	v_add_f64 v[14:15], v[40:41], -v[28:29]
	v_add_f64 v[10:11], v[10:11], -v[20:21]
	v_add_f64 v[20:21], v[24:25], -v[36:37]
	v_add_f64 v[2:3], v[2:3], v[16:17]
	v_add_f64 v[12:13], v[12:13], -v[26:27]
	v_add_f64 v[4:5], v[4:5], v[8:9]
	v_add_f64 v[8:9], v[18:19], -v[14:15]
	v_add_f64 v[6:7], v[6:7], v[10:11]
	v_add_f64 v[10:11], v[22:23], -v[20:21]
	v_add_f64 v[2:3], v[2:3], v[12:13]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[4:5], v[4:5], v[8:9]
	v_add_f64 v[6:7], v[6:7], v[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[8:9], v[38:39], v[2:3]
	v_add_f64 v[10:11], v[40:41], v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[24:25], v[6:7]
	v_add_f64 v[14:15], v[8:9], -v[38:39]
	v_mul_f64 v[16:17], 0x40080000, v[8:9]
	v_add_f64 v[22:23], v[8:9], v[8:9]
	v_add_f64 v[18:19], v[10:11], -v[40:41]
	v_add_f64 v[20:21], v[10:11], v[10:11]
	v_add_f64 v[24:25], v[12:13], -v[24:25]
	v_add_f64 v[26:27], v[12:13], v[12:13]
	v_add_f64 v[2:3], v[2:3], -v[14:15]
	v_fma_f64 v[14:15], 0x40080000, v[8:9], -v[16:17]
	v_fma_f64 v[8:9], v[8:9], 2.0, -v[22:23]
	v_add_f64 v[4:5], v[4:5], -v[18:19]
	v_fma_f64 v[18:19], v[10:11], 2.0, -v[20:21]
	v_cmp_class_f64_e64 vcc_lo, v[16:17], 0x204
	v_cmp_class_f64_e64 s2, v[20:21], 0x204
	v_cmp_class_f64_e64 s3, v[22:23], 0x204
	v_add_f64 v[6:7], v[6:7], -v[24:25]
	v_fma_f64 v[12:13], v[12:13], 2.0, -v[26:27]
	v_cmp_class_f64_e64 s4, v[26:27], 0x204
	v_fma_f64 v[14:15], 0x40080000, v[2:3], v[14:15]
	v_fma_f64 v[2:3], v[2:3], 2.0, v[8:9]
	v_mul_f64 v[8:9], 0x40080000, v[10:11]
	v_fma_f64 v[18:19], v[4:5], 2.0, v[18:19]
	v_fma_f64 v[6:7], v[6:7], 2.0, v[12:13]
	v_add_f64 v[12:13], v[16:17], v[14:15]
	v_add_f64 v[28:29], v[22:23], v[2:3]
	v_fma_f64 v[10:11], 0x40080000, v[10:11], -v[8:9]
	v_add_f64 v[24:25], v[20:21], v[18:19]
	v_add_f64 v[30:31], v[26:27], v[6:7]
	v_dual_cndmask_b32 v33, v13, v17 :: v_dual_cndmask_b32 v32, v12, v16
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[4:5], 0x40080000, v[4:5], v[10:11]
	v_cndmask_b32_e64 v35, v25, v21, s2
	v_cndmask_b32_e64 v34, v24, v20, s2
	v_cndmask_b32_e64 v37, v29, v23, s3
	v_cndmask_b32_e64 v36, v28, v22, s3
	v_mul_f64 v[38:39], v[32:33], s[10:11]
	v_cndmask_b32_e64 v11, v31, v27, s4
	v_cndmask_b32_e64 v10, v30, v26, s4
	v_mul_f64 v[40:41], v[34:35], s[10:11]
	v_mul_f64 v[42:43], v[36:37], s[10:11]
	v_cmp_class_f64_e64 vcc_lo, v[8:9], 0x204
	s_mov_b32 s2, 0xfca7ab0c
	v_mul_f64 v[44:45], v[10:11], s[10:11]
	s_mov_b32 s4, 0x6a5dcb37
	s_mov_b32 s3, 0x3e928af3
	s_mov_b32 s5, 0x3e5ade15
	v_add_f64 v[12:13], v[12:13], -v[16:17]
	v_add_f64 v[16:17], v[24:25], -v[20:21]
	v_add_f64 v[20:21], v[28:29], -v[22:23]
	v_add_f64 v[26:27], v[30:31], -v[26:27]
	v_add_f64 v[46:47], v[8:9], v[4:5]
	v_rndne_f64_e32 v[38:39], v[38:39]
	v_rndne_f64_e32 v[40:41], v[40:41]
	v_rndne_f64_e32 v[42:43], v[42:43]
	v_rndne_f64_e32 v[44:45], v[44:45]
	v_add_f64 v[12:13], v[14:15], -v[12:13]
	v_add_f64 v[14:15], v[18:19], -v[16:17]
	v_add_f64 v[2:3], v[2:3], -v[20:21]
	v_add_f64 v[6:7], v[6:7], -v[26:27]
	v_dual_cndmask_b32 v55, v47, v9 :: v_dual_cndmask_b32 v54, v46, v8
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[32:33]|
	v_add_f64 v[8:9], v[46:47], -v[8:9]
	v_fma_f64 v[48:49], v[38:39], s[6:7], v[32:33]
	s_delay_alu instid0(VALU_DEP_4)
	v_mul_f64 v[56:57], v[54:55], s[10:11]
	v_cvt_i32_f64_e32 v78, v[38:39]
	v_fma_f64 v[50:51], v[40:41], s[6:7], v[34:35]
	v_fma_f64 v[52:53], v[42:43], s[6:7], v[36:37]
	v_cmp_neq_f64_e64 s10, 0x7ff00000, |v[10:11]|
	v_fma_f64 v[58:59], v[44:45], s[6:7], v[10:11]
	v_dual_cndmask_b32 v13, 0, v13 :: v_dual_cndmask_b32 v12, 0, v12
	v_cmp_nlt_f64_e32 vcc_lo, 0x40900000, v[10:11]
	v_fma_f64 v[48:49], v[38:39], s[8:9], v[48:49]
	v_rndne_f64_e32 v[56:57], v[56:57]
	v_add_f64 v[4:5], v[4:5], -v[8:9]
	v_fma_f64 v[50:51], v[40:41], s[8:9], v[50:51]
	v_fma_f64 v[52:53], v[42:43], s[8:9], v[52:53]
	v_cndmask_b32_e64 v7, 0, v7, s10
	v_cndmask_b32_e64 v6, 0, v6, s10
	v_fma_f64 v[58:59], v[44:45], s[8:9], v[58:59]
	v_cvt_i32_f64_e32 v44, v[44:45]
	v_fma_f64 v[60:61], v[48:49], s[4:5], s[2:3]
	v_fma_f64 v[72:73], v[56:57], s[6:7], v[54:55]
	s_mov_b32 s6, 0x623fde64
	v_fma_f64 v[62:63], v[50:51], s[4:5], s[2:3]
	v_fma_f64 v[70:71], v[52:53], s[4:5], s[2:3]
	s_mov_b32 s7, 0x3ec71dee
	v_fma_f64 v[74:75], v[58:59], s[4:5], s[2:3]
	v_fma_f64 v[60:61], v[48:49], v[60:61], s[6:7]
	v_fma_f64 v[72:73], v[56:57], s[8:9], v[72:73]
	s_mov_b32 s8, 0x7c89e6b0
	v_fma_f64 v[62:63], v[50:51], v[62:63], s[6:7]
	v_fma_f64 v[70:71], v[52:53], v[70:71], s[6:7]
	s_mov_b32 s9, 0x3efa0199
	v_fma_f64 v[74:75], v[58:59], v[74:75], s[6:7]
	v_fma_f64 v[60:61], v[48:49], v[60:61], s[8:9]
	v_fma_f64 v[76:77], v[72:73], s[4:5], s[2:3]
	s_mov_b32 s2, 0x14761f6e
	v_fma_f64 v[62:63], v[50:51], v[62:63], s[8:9]
	v_fma_f64 v[70:71], v[52:53], v[70:71], s[8:9]
	s_mov_b32 s3, 0x3f2a01a0
	s_mov_b32 s4, 0x1852b7b0
	v_fma_f64 v[74:75], v[58:59], v[74:75], s[8:9]
	s_mov_b32 s5, 0x3f56c16c
	v_fma_f64 v[60:61], v[48:49], v[60:61], s[2:3]
	v_fma_f64 v[76:77], v[72:73], v[76:77], s[6:7]
	s_mov_b32 s6, 0x11122322
	v_fma_f64 v[62:63], v[50:51], v[62:63], s[2:3]
	v_fma_f64 v[70:71], v[52:53], v[70:71], s[2:3]
	s_mov_b32 s7, 0x3f811111
	v_fma_f64 v[74:75], v[58:59], v[74:75], s[2:3]
	v_fma_f64 v[60:61], v[48:49], v[60:61], s[4:5]
	v_fma_f64 v[76:77], v[72:73], v[76:77], s[8:9]
	v_cmp_nlt_f64_e64 s8, 0x40900000, v[36:37]
	v_fma_f64 v[62:63], v[50:51], v[62:63], s[4:5]
	v_fma_f64 v[70:71], v[52:53], v[70:71], s[4:5]
	v_cmp_ngt_f64_e64 s9, 0xc090cc00, v[36:37]
	v_fma_f64 v[74:75], v[58:59], v[74:75], s[4:5]
	v_fma_f64 v[60:61], v[48:49], v[60:61], s[6:7]
	v_fma_f64 v[76:77], v[72:73], v[76:77], s[2:3]
	s_mov_b32 s2, 0x555502a1
	v_fma_f64 v[62:63], v[50:51], v[62:63], s[6:7]
	v_fma_f64 v[70:71], v[52:53], v[70:71], s[6:7]
	s_mov_b32 s3, 0x3fa55555
	v_fma_f64 v[74:75], v[58:59], v[74:75], s[6:7]
	v_fma_f64 v[60:61], v[48:49], v[60:61], s[2:3]
	v_fma_f64 v[76:77], v[72:73], v[76:77], s[4:5]
	s_mov_b32 s4, 0x55555511
	v_fma_f64 v[62:63], v[50:51], v[62:63], s[2:3]
	v_fma_f64 v[70:71], v[52:53], v[70:71], s[2:3]
	s_mov_b32 s5, 0x3fc55555
	v_fma_f64 v[74:75], v[58:59], v[74:75], s[2:3]
	v_fma_f64 v[60:61], v[48:49], v[60:61], s[4:5]
	v_fma_f64 v[76:77], v[72:73], v[76:77], s[6:7]
	s_mov_b32 s6, 11
	v_fma_f64 v[62:63], v[50:51], v[62:63], s[4:5]
	v_fma_f64 v[70:71], v[52:53], v[70:71], s[4:5]
	s_mov_b32 s7, 0x3fe00000
	v_fma_f64 v[74:75], v[58:59], v[74:75], s[4:5]
	v_fma_f64 v[60:61], v[48:49], v[60:61], s[6:7]
	v_fma_f64 v[76:77], v[72:73], v[76:77], s[2:3]
	v_cmp_neq_f64_e64 s2, 0x7ff00000, |v[34:35]|
	v_fma_f64 v[62:63], v[50:51], v[62:63], s[6:7]
	v_fma_f64 v[70:71], v[52:53], v[70:71], s[6:7]
	v_cmp_neq_f64_e64 s3, 0x7ff00000, |v[36:37]|
	v_fma_f64 v[74:75], v[58:59], v[74:75], s[6:7]
	v_fma_f64 v[60:61], v[48:49], v[60:61], 1.0
	v_fma_f64 v[76:77], v[72:73], v[76:77], s[4:5]
	v_cmp_nlt_f64_e64 s5, 0x40900000, v[34:35]
	v_fma_f64 v[62:63], v[50:51], v[62:63], 1.0
	v_fma_f64 v[70:71], v[52:53], v[70:71], 1.0
	v_cmp_nlt_f64_e64 s4, 0x40900000, v[32:33]
	v_cndmask_b32_e64 v15, 0, v15, s2
	v_fma_f64 v[74:75], v[58:59], v[74:75], 1.0
	v_cndmask_b32_e64 v14, 0, v14, s2
	v_cmp_ngt_f64_e64 s2, 0xc090cc00, v[10:11]
	v_cndmask_b32_e64 v3, 0, v3, s3
	v_cndmask_b32_e64 v2, 0, v2, s3
	v_fma_f64 v[38:39], v[48:49], v[60:61], 1.0
	v_fma_f64 v[22:23], v[72:73], v[76:77], s[6:7]
	v_cvt_i32_f64_e32 v48, v[40:41]
	v_fma_f64 v[40:41], v[50:51], v[62:63], 1.0
	v_cvt_i32_f64_e32 v49, v[42:43]
	v_fma_f64 v[42:43], v[52:53], v[70:71], 1.0
	v_cmp_ngt_f64_e64 s6, 0xc090cc00, v[34:35]
	v_fma_f64 v[24:25], v[58:59], v[74:75], 1.0
	v_cmp_ngt_f64_e64 s7, 0xc090cc00, v[32:33]
	v_ldexp_f64 v[28:29], v[38:39], v78
	v_fma_f64 v[16:17], v[72:73], v[22:23], 1.0
	v_ldexp_f64 v[38:39], v[40:41], v48
	v_ldexp_f64 v[40:41], v[42:43], v49
	s_and_b32 s3, s6, s5
	v_ldexp_f64 v[18:19], v[24:25], v44
	v_cvt_i32_f64_e32 v25, v[56:57]
	v_cndmask_b32_e64 v20, 0x7ff00000, v29, s4
	v_fma_f64 v[16:17], v[72:73], v[16:17], 1.0
	v_cndmask_b32_e64 v21, 0x7ff00000, v39, s5
	v_cmp_eq_f64_e64 s5, 0, v[68:69]
	v_cndmask_b32_e64 v22, 0x7ff00000, v41, s8
	v_cndmask_b32_e64 v11, 0, v20, s7
	v_cndmask_b32_e32 v23, 0x7ff00000, v19, vcc_lo
	v_cndmask_b32_e64 v19, 0, v38, s3
	s_and_b32 s3, s7, s4
	s_and_b32 vcc_lo, s2, vcc_lo
	v_cndmask_b32_e64 v10, 0, v28, s3
	s_and_b32 s3, s9, s8
	v_cndmask_b32_e64 v20, 0, v21, s6
	v_cndmask_b32_e64 v22, 0, v22, s9
	v_cndmask_b32_e64 v21, 0, v40, s3
	v_cndmask_b32_e64 v24, 0, v23, s2
	v_fma_f64 v[12:13], v[10:11], v[12:13], v[10:11]
	v_fma_f64 v[14:15], v[19:20], v[14:15], v[19:20]
	v_cmp_class_f64_e64 s3, v[19:20], 0x204
	v_fma_f64 v[2:3], v[21:22], v[2:3], v[21:22]
	v_cmp_class_f64_e64 s4, v[21:22], 0x204
	v_cmp_eq_f64_e64 s6, 0, v[66:67]
	v_cmp_class_f64_e64 s2, v[10:11], 0x204
	v_cmp_class_f64_e64 s7, v[68:69], 0x204
	v_cmp_class_f64_e64 s8, v[66:67], 0x204
	v_ldexp_f64 v[16:17], v[16:17], v25
	v_cndmask_b32_e32 v23, 0, v18, vcc_lo
	v_cndmask_b32_e64 v26, 0x7ff00000, 0, s5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[6:7], v[23:24], v[6:7], v[23:24]
	v_cmp_class_f64_e64 vcc_lo, v[23:24], 0x204
	v_bfi_b32 v8, 0x7fffffff, v26, v69
	v_cndmask_b32_e64 v15, v15, v20, s3
	v_cndmask_b32_e64 v3, v3, v22, s4
	v_cndmask_b32_e64 v27, 0x7ff00000, 0, s6
	v_cndmask_b32_e64 v10, v12, v10, s2
	v_cndmask_b32_e64 v12, v14, v19, s3
	v_cndmask_b32_e64 v14, v2, v21, s4
	v_and_b32_e32 v15, 0x7fffffff, v15
	s_or_b32 s3, s5, s7
	s_or_b32 s4, s6, s8
	v_mul_f64 v[18:19], 0xc0320000, v[66:67]
	v_cndmask_b32_e64 v14, v14, 0, s3
	v_cndmask_b32_e64 v71, v15, v27, s4
	v_cndmask_b32_e64 v70, v12, 0, s4
	v_cmp_nlt_f64_e64 s6, 0x40900000, v[54:55]
	v_cmp_ngt_f64_e64 s7, 0xc090cc00, v[54:55]
	v_cmp_neq_f64_e64 s5, 0x7ff00000, |v[54:55]|
	v_cndmask_b32_e64 v2, v10, 0, s3
	v_dual_cndmask_b32 v7, v7, v24 :: v_dual_cndmask_b32 v6, v6, v23
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_f64 v[6:7], 0x403b0000, |v[6:7]|
	v_and_b32_e32 v3, 0x7fffffff, v3
	v_cndmask_b32_e64 v15, v3, v26, s3
	v_cndmask_b32_e64 v3, v13, v11, s2
	v_cmp_neq_f64_e64 s2, 0x7ff00000, |v[0:1]|
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[14:15], v[70:71], v[14:15]
	v_bfi_b32 v3, 0x7fffffff, v3, v69
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v3, v3, v8, s3
	v_mul_f64 v[8:9], v[18:19], v[68:69]
	v_cndmask_b32_e64 v10, 0x7ff00000, v17, s6
	s_and_b32 vcc_lo, s7, s6
	v_cndmask_b32_e64 v5, 0, v5, s5
	v_cndmask_b32_e64 v4, 0, v4, s5
	v_cmp_neq_f64_e64 s3, 0, v[0:1]
	v_cndmask_b32_e64 v11, 0, v10, s7
	v_cndmask_b32_e32 v10, 0, v16, vcc_lo
	s_load_b64 s[6:7], s[0:1], 0x20
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_fma_f64 v[4:5], v[10:11], v[4:5], v[10:11]
	v_cmp_class_f64_e64 vcc_lo, v[10:11], 0x204
	v_cndmask_b32_e64 v7, 0x7ff00000, v7, s2
	v_fma_f64 v[2:3], v[2:3], 4.0, -v[14:15]
	v_cndmask_b32_e64 v7, 0, v7, s3
	v_dual_cndmask_b32 v5, v5, v11 :: v_dual_cndmask_b32 v4, v4, v10
	s_and_b32 vcc_lo, s3, s2
	s_mov_b32 s2, exec_lo
	v_cndmask_b32_e32 v6, 0, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_bfi_b32 v5, 0x7fffffff, v5, v67
	v_cndmask_b32_e64 v4, v4, 0, s4
	v_fma_f64 v[2:3], v[8:9], v[0:1], v[2:3]
	v_bfi_b32 v8, 0x7fffffff, v27, v67
	v_cndmask_b32_e64 v5, v5, v8, s4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[4:5], v[4:5], 4.0
	v_add_f64 v[2:3], v[2:3], v[6:7]
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v7, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[2:3], v[0:1], v[4:5], v[2:3]
	v_dual_mov_b32 v4, v6 :: v_dual_mov_b32 v5, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[2:3], 0x40080000, v[2:3]
	v_cmpx_neq_f64_e32 0, v[2:3]
	s_cbranch_execz .LBB0_25
; %bb.2:
	v_mov_b32_e32 v4, 0
	v_mov_b32_e32 v5, 0x7ff80000
	s_mov_b32 s3, exec_lo
	v_cmpx_o_f64_e32 v[2:3], v[2:3]
	s_cbranch_execz .LBB0_24
; %bb.3:
                                        ; implicit-def: $vgpr4_vgpr5
	s_mov_b32 s1, exec_lo
	v_cmpx_neq_f64_e64 0x7ff00000, |v[2:3]|
	s_xor_b32 s4, exec_lo, s1
	s_cbranch_execz .LBB0_21
; %bb.4:
	s_mov_b32 s0, 0x99fcef32
	s_mov_b32 s1, 0x7fda8279
                                        ; implicit-def: $sgpr8
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_nge_f64_e64 s5, |v[2:3]|, s[0:1]
	s_and_saveexec_b32 s0, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s0, exec_lo, s0
	s_cbranch_execz .LBB0_8
; %bb.5:
	s_mov_b32 s1, 0
	s_mov_b32 s8, exec_lo
	v_cmpx_ge_f64_e64 0x200000, |v[2:3]|
; %bb.6:
	v_mul_f64 v[2:3], v[2:3], 4.0
	s_mov_b32 s1, exec_lo
; %bb.7:                                ; %Flow453
	s_or_b32 exec_lo, exec_lo, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s8, s1, exec_lo
.LBB0_8:                                ; %Flow454
	s_and_not1_saveexec_b32 s0, s0
; %bb.9:
	s_delay_alu instid0(VALU_DEP_1)
	v_ldexp_f64 v[2:3], v[2:3], -2
	s_and_not1_b32 s8, s8, exec_lo
; %bb.10:
	s_or_b32 exec_lo, exec_lo, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_max_f64 v[4:5], |v[2:3]|, |v[2:3]|
	v_cmp_neq_f64_e64 s0, 0x7ff00000, |v[2:3]|
	v_max_f64 v[4:5], v[4:5], 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_frexp_exp_i32_f64_e32 v12, v[4:5]
	v_sub_nc_u32_e32 v4, 0, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[4:5], |v[2:3]|, v4
	v_fma_f64 v[4:5], v[4:5], v[4:5], 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[6:7], v[4:5]
	v_cmp_eq_f64_e32 vcc_lo, 0, v[4:5]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[8:9], v[4:5], v[6:7]
	v_mul_f64 v[6:7], v[6:7], 0.5
	v_fma_f64 v[10:11], -v[6:7], v[8:9], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[8:9], v[8:9], v[10:11], v[8:9]
	v_fma_f64 v[6:7], v[6:7], v[10:11], v[6:7]
	v_fma_f64 v[10:11], -v[8:9], v[8:9], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], v[10:11], v[6:7], v[8:9]
	v_dual_cndmask_b32 v5, v7, v5 :: v_dual_cndmask_b32 v4, v6, v4
	v_cmp_o_f64_e32 vcc_lo, v[2:3], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[4:5], v[4:5], v12
	v_cndmask_b32_e32 v5, 0x7ff80000, v5, vcc_lo
	s_and_b32 vcc_lo, s0, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v6, 0, v4, vcc_lo
	v_cndmask_b32_e64 v7, 0x7ff00000, v5, s0
	s_mov_b32 s0, exec_lo
                                        ; implicit-def: $vgpr4_vgpr5
	v_cmpx_le_f64_e32 0, v[2:3]
	s_xor_b32 s0, exec_lo, s0
	s_cbranch_execz .LBB0_12
; %bb.11:
	v_add_f64 v[2:3], v[2:3], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[2:3], v[2:3], 0.5
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[2:3]
	v_cndmask_b32_e64 v4, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v4, 8, v4
	v_ldexp_f64 v[2:3], v[2:3], v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[4:5], v[2:3]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[6:7], v[2:3], v[4:5]
	v_mul_f64 v[4:5], v[4:5], 0.5
	v_fma_f64 v[8:9], -v[4:5], v[6:7], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[6:7], v[6:7], v[8:9], v[6:7]
	v_fma_f64 v[4:5], v[4:5], v[8:9], v[4:5]
	v_fma_f64 v[8:9], -v[6:7], v[6:7], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], v[8:9], v[4:5], v[6:7]
	v_fma_f64 v[8:9], -v[6:7], v[6:7], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[4:5], v[8:9], v[4:5], v[6:7]
	v_cndmask_b32_e64 v6, 0, 0xffffff80, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[2:3], 0x260
	v_ldexp_f64 v[4:5], v[4:5], v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v3, v5, v3 :: v_dual_cndmask_b32 v2, v4, v2
	v_add_f64 v[4:5], v[2:3], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f64 v[6:7], null, v[4:5], v[4:5], 0
	v_rcp_f64_e32 v[8:9], v[6:7]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[10:11], -v[6:7], v[8:9], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], v[8:9], v[10:11], v[8:9]
	v_fma_f64 v[10:11], -v[6:7], v[8:9], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], v[8:9], v[10:11], v[8:9]
	v_div_scale_f64 v[10:11], vcc_lo, 0, v[4:5], 0
	v_mul_f64 v[12:13], v[10:11], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], -v[6:7], v[12:13], v[10:11]
	v_div_fmas_f64 v[6:7], v[6:7], v[8:9], v[12:13]
	s_delay_alu instid0(VALU_DEP_1)
	v_div_fixup_f64 v[4:5], v[6:7], v[4:5], 0
                                        ; implicit-def: $vgpr6_vgpr7
.LBB0_12:                               ; %Flow451
	s_and_not1_saveexec_b32 s0, s0
	s_cbranch_execz .LBB0_14
; %bb.13:
	v_add_f64 v[2:3], v[6:7], -v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[2:3], v[2:3], 0.5
	v_cmp_gt_f64_e32 vcc_lo, 0x10000000, v[2:3]
	v_cndmask_b32_e64 v4, 0, 1, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v4, 8, v4
	v_ldexp_f64 v[2:3], v[2:3], v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[4:5], v[2:3]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[6:7], v[2:3], v[4:5]
	v_mul_f64 v[4:5], v[4:5], 0.5
	v_fma_f64 v[8:9], -v[4:5], v[6:7], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[6:7], v[6:7], v[8:9], v[6:7]
	v_fma_f64 v[4:5], v[4:5], v[8:9], v[4:5]
	v_fma_f64 v[8:9], -v[6:7], v[6:7], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], v[8:9], v[4:5], v[6:7]
	v_fma_f64 v[8:9], -v[6:7], v[6:7], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[4:5], v[8:9], v[4:5], v[6:7]
	v_cndmask_b32_e64 v6, 0, 0xffffff80, vcc_lo
	v_cmp_class_f64_e64 vcc_lo, v[2:3], 0x260
	v_ldexp_f64 v[4:5], v[4:5], v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v5, v5, v3 :: v_dual_cndmask_b32 v4, v4, v2
	v_add_f64 v[2:3], v[4:5], v[4:5]
	v_and_b32_e32 v5, 0x7fffffff, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_scale_f64 v[6:7], null, v[2:3], v[2:3], 0
	v_rcp_f64_e32 v[8:9], v[6:7]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[10:11], -v[6:7], v[8:9], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], v[8:9], v[10:11], v[8:9]
	v_fma_f64 v[10:11], -v[6:7], v[8:9], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], v[8:9], v[10:11], v[8:9]
	v_div_scale_f64 v[10:11], vcc_lo, 0, v[2:3], 0
	v_mul_f64 v[12:13], v[10:11], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], -v[6:7], v[12:13], v[10:11]
	v_div_fmas_f64 v[6:7], v[6:7], v[8:9], v[12:13]
	s_delay_alu instid0(VALU_DEP_1)
	v_div_fixup_f64 v[2:3], v[6:7], v[2:3], 0
.LBB0_14:
	s_or_b32 exec_lo, exec_lo, s0
	s_and_saveexec_b32 s0, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s0, exec_lo, s0
	s_cbranch_execz .LBB0_18
; %bb.15:
	s_and_saveexec_b32 s1, s8
; %bb.16:
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[2:3], v[2:3], 0.5
	v_mul_f64 v[4:5], v[4:5], 0.5
; %bb.17:                               ; %Flow446
	s_or_b32 exec_lo, exec_lo, s1
.LBB0_18:                               ; %Flow448
	s_and_not1_saveexec_b32 s0, s0
; %bb.19:
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[2:3], v[2:3], v[2:3]
	v_add_f64 v[4:5], v[4:5], v[4:5]
; %bb.20:                               ; %Flow449
	s_or_b32 exec_lo, exec_lo, s0
.LBB0_21:                               ; %Flow456
	s_and_not1_saveexec_b32 s0, s4
; %bb.22:
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_i64_e32 vcc_lo, 0, v[2:3]
	v_ashrrev_i32_e32 v4, 31, v3
	v_dual_mov_b32 v4, 0 :: v_dual_and_b32 v5, 0x7ff00000, v4
	v_cndmask_b32_e64 v3, v3, 0, vcc_lo
	v_cndmask_b32_e64 v2, v2, 0, vcc_lo
; %bb.23:                               ; %Flow457
	s_or_b32 exec_lo, exec_lo, s0
.LBB0_24:                               ; %Flow459
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s3
	v_dual_mov_b32 v7, v3 :: v_dual_mov_b32 v6, v2
.LBB0_25:                               ; %_ZN6thrust4sqrtIdEENS_7complexIT_EERKS3_.exit
	s_or_b32 exec_lo, exec_lo, s2
	v_mul_f64 v[2:3], 0x40220000, v[66:67]
	v_mul_f64 v[0:1], 0xc03b0000, v[0:1]
	v_add_f64 v[8:9], v[66:67], v[66:67]
	v_div_scale_f64 v[10:11], null, 0x40320000, 0x40320000, v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[0:1], v[2:3], v[68:69], v[0:1]
	v_mul_f64 v[2:3], v[66:67], v[8:9]
	v_div_scale_f64 v[8:9], null, 0x40320000, 0x40320000, v[6:7]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f64_e32 v[16:17], v[10:11]
	v_fma_f64 v[0:1], -v[66:67], v[2:3], v[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_rcp_f64_e32 v[14:15], v[8:9]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[22:23], -v[10:11], v[16:17], 1.0
	v_div_scale_f64 v[2:3], null, 0x404b0000, 0x404b0000, v[0:1]
	v_div_scale_f64 v[24:25], vcc_lo, v[0:1], 0x404b0000, v[0:1]
	v_fma_f64 v[20:21], -v[8:9], v[14:15], 1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[16:17], v[16:17], v[22:23], v[16:17]
	v_rcp_f64_e32 v[12:13], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[14:15], v[14:15], v[20:21], v[14:15]
	v_fma_f64 v[22:23], -v[10:11], v[16:17], 1.0
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[18:19], -v[2:3], v[12:13], 1.0
	v_fma_f64 v[20:21], -v[8:9], v[14:15], 1.0
	v_fma_f64 v[16:17], v[16:17], v[22:23], v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[12:13], v[12:13], v[18:19], v[12:13]
	v_fma_f64 v[14:15], v[14:15], v[20:21], v[14:15]
	v_div_scale_f64 v[20:21], s1, v[4:5], 0x40320000, v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[18:19], -v[2:3], v[12:13], 1.0
	v_mul_f64 v[28:29], v[20:21], v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[12:13], v[12:13], v[18:19], v[12:13]
	v_div_scale_f64 v[18:19], s0, v[6:7], 0x40320000, v[6:7]
	v_fma_f64 v[10:11], -v[10:11], v[28:29], v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[22:23], v[24:25], v[12:13]
	v_mul_f64 v[26:27], v[18:19], v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[2:3], -v[2:3], v[22:23], v[24:25]
	v_fma_f64 v[8:9], -v[8:9], v[26:27], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fmas_f64 v[2:3], v[2:3], v[12:13], v[22:23]
	s_mov_b32 vcc_lo, s0
	v_div_fmas_f64 v[8:9], v[8:9], v[14:15], v[26:27]
	s_mov_b32 vcc_lo, s1
	v_div_fmas_f64 v[10:11], v[10:11], v[16:17], v[28:29]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_div_fixup_f64 v[0:1], v[2:3], 0x404b0000, v[0:1]
	v_div_fixup_f64 v[2:3], v[8:9], 0x40320000, v[6:7]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fixup_f64 v[4:5], v[10:11], 0x40320000, v[4:5]
	v_add_f64 v[76:77], v[0:1], v[2:3]
	v_add_f64 v[78:79], v[0:1], -v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[72:73], v[4:5], 0
	v_add_f64 v[74:75], -v[4:5], 0
	v_cmp_class_f64_e64 s12, v[76:77], 0x204
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_class_f64_e64 s8, v[78:79], 0x204
	v_max_f64 v[82:83], |v[76:77]|, |v[72:73]|
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_max_f64 v[80:81], |v[78:79]|, |v[74:75]|
	v_cmp_class_f64_e64 s13, v[72:73], 0x204
	v_cmp_class_f64_e64 s9, v[74:75], 0x204
	v_frexp_exp_i32_f64_e32 v16, v[82:83]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_frexp_exp_i32_f64_e32 v17, v[80:81]
	s_or_b32 s17, s12, s13
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_or_b32 s10, s8, s9
	v_sub_nc_u32_e32 v4, 0, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v6, 0, v17
	v_ldexp_f64 v[0:1], |v[72:73]|, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[2:3], |v[74:75]|, v6
	v_ldexp_f64 v[4:5], |v[76:77]|, v4
	v_ldexp_f64 v[6:7], |v[78:79]|, v6
	v_mul_f64 v[0:1], v[0:1], v[0:1]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[2:3], v[2:3], v[2:3]
	v_fma_f64 v[0:1], v[4:5], v[4:5], v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[2:3], v[6:7], v[6:7], v[2:3]
	v_rsq_f64_e32 v[4:5], v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_rsq_f64_e32 v[6:7], v[2:3]
	v_cmp_eq_f64_e32 vcc_lo, 0, v[0:1]
	v_cmp_eq_f64_e64 s0, 0, v[2:3]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[8:9], v[0:1], v[4:5]
	v_mul_f64 v[4:5], v[4:5], 0.5
	v_mul_f64 v[10:11], v[2:3], v[6:7]
	v_mul_f64 v[6:7], v[6:7], 0.5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[12:13], -v[4:5], v[8:9], 0.5
	v_fma_f64 v[14:15], -v[6:7], v[10:11], 0.5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[8:9], v[8:9], v[12:13], v[8:9]
	v_fma_f64 v[4:5], v[4:5], v[12:13], v[4:5]
	v_fma_f64 v[10:11], v[10:11], v[14:15], v[10:11]
	v_fma_f64 v[6:7], v[6:7], v[14:15], v[6:7]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[12:13], -v[8:9], v[8:9], v[0:1]
	v_fma_f64 v[14:15], -v[10:11], v[10:11], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[4:5], v[12:13], v[4:5], v[8:9]
	v_fma_f64 v[6:7], v[14:15], v[6:7], v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v1, v5, v1 :: v_dual_cndmask_b32 v0, v4, v0
	v_cndmask_b32_e64 v3, v7, v3, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v2, v6, v2, s0
	v_cmp_u_f64_e32 vcc_lo, v[76:77], v[72:73]
	v_cmp_u_f64_e64 s0, v[78:79], v[74:75]
	v_ldexp_f64 v[10:11], v[0:1], v16
                                        ; implicit-def: $vgpr4_vgpr5
	v_ldexp_f64 v[8:9], v[2:3], v17
	s_or_b32 s1, s17, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v0, v11, 0x7ff80000, vcc_lo
	v_cmp_o_f64_e32 vcc_lo, v[76:77], v[72:73]
	v_cndmask_b32_e64 v2, v9, 0x7ff80000, s0
	s_or_b32 s0, s10, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v1, v0, 0x7ff00000, s17
	v_cndmask_b32_e64 v0, v10, 0, s1
	v_cndmask_b32_e64 v3, v2, 0x7ff00000, s10
	v_cndmask_b32_e64 v2, v8, 0, s0
	v_cmp_o_f64_e64 s0, v[78:79], v[74:75]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_f64_e64 s1, v[0:1], v[2:3]
                                        ; implicit-def: $vgpr0_vgpr1
	s_and_saveexec_b32 s2, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s11, exec_lo, s2
	s_cbranch_execz .LBB0_109
; %bb.26:
                                        ; implicit-def: $vgpr4_vgpr5
                                        ; implicit-def: $vgpr6_vgpr7
	s_and_saveexec_b32 s1, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s14, exec_lo, s1
	s_cbranch_execz .LBB0_58
; %bb.27:
	v_cmp_lt_f64_e64 s1, |v[76:77]|, |v[72:73]|
	v_and_b32_e32 v0, 0x7fffffff, v77
	v_and_b32_e32 v1, 0x7fffffff, v73
	s_mov_b32 s2, 0x85ebc8a0
	s_mov_b32 s3, 0x7fd1ccf3
                                        ; implicit-def: $vgpr4_vgpr5
                                        ; implicit-def: $vgpr6_vgpr7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v3, v1, v0, s1
	v_cndmask_b32_e64 v2, v72, v76, s1
	v_cmp_nlt_f64_e32 vcc_lo, s[2:3], v[2:3]
	s_and_saveexec_b32 s2, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s15, exec_lo, s2
	s_cbranch_execz .LBB0_55
; %bb.28:
	v_cndmask_b32_e64 v9, v0, v1, s1
	v_cndmask_b32_e64 v8, v76, v72, s1
                                        ; implicit-def: $vgpr4_vgpr5
                                        ; implicit-def: $vgpr6_vgpr7
	s_mov_b32 s2, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_neq_f64_e32 1.0, v[8:9]
	s_xor_b32 s16, exec_lo, s2
	s_cbranch_execz .LBB0_48
; %bb.29:
	v_max_f64 v[0:1], v[2:3], v[2:3]
	v_max_f64 v[4:5], v[8:9], v[8:9]
	s_mov_b32 s2, 0x4ad4b81f
	s_mov_b32 s4, 0xc57e649a
	s_mov_b32 s3, 0x358dee7a
	s_mov_b32 s5, 0x4a511b0e
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_min_f64 v[6:7], v[4:5], v[0:1]
	v_max_f64 v[0:1], v[4:5], v[0:1]
                                        ; implicit-def: $vgpr4_vgpr5
	v_cmp_ngt_f64_e32 vcc_lo, s[2:3], v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_nlt_f64_e64 s2, s[4:5], v[0:1]
                                        ; implicit-def: $vgpr6_vgpr7
	s_and_b32 s2, s2, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s2
	s_xor_b32 s18, exec_lo, s3
	s_cbranch_execz .LBB0_45
; %bb.30:
                                        ; implicit-def: $vgpr4_vgpr5
                                        ; implicit-def: $vgpr6_vgpr7
	s_mov_b32 s2, exec_lo
	v_cmpx_le_f64_e32 1.0, v[8:9]
	s_xor_b32 s4, exec_lo, s2
	s_cbranch_execz .LBB0_32
; %bb.31:
	v_add_f64 v[0:1], v[8:9], -1.0
	v_add_f64 v[4:5], v[8:9], 1.0
	s_mov_b32 s3, 0x3fe55555
	s_mov_b32 s2, 0x55555555
	s_mov_b32 s20, 0xbd3237f4
	s_mov_b32 s22, 0xb5e68a13
	s_mov_b32 s21, 0xbf23e260
	s_mov_b32 s23, 0x3eeba404
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[0:1], v[0:1], v[4:5]
	v_fma_f64 v[0:1], v[2:3], v[2:3], v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], v[0:1], 1.0
	v_frexp_mant_f64_e32 v[4:5], v[2:3]
	v_frexp_exp_i32_f64_e32 v8, v[2:3]
	v_add_f64 v[6:7], v[2:3], -1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e32 vcc_lo, s[2:3], v[4:5]
	s_mov_b32 s2, 0x55555780
	v_add_f64 v[4:5], v[6:7], -v[2:3]
	v_add_f64 v[6:7], v[0:1], -v[6:7]
	v_subrev_co_ci_u32_e32 v30, vcc_lo, 0, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[4:5], v[4:5], 1.0
	v_sub_nc_u32_e32 v10, 0, v30
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[2:3], v[2:3], v10
	v_add_f64 v[4:5], v[6:7], v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[8:9], v[2:3], 1.0
	v_add_f64 v[14:15], v[2:3], -1.0
	v_ldexp_f64 v[4:5], v[4:5], v10
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[6:7], v[8:9], -1.0
	v_add_f64 v[16:17], v[14:15], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[2:3], -v[6:7]
	v_add_f64 v[2:3], v[2:3], -v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[4:5], v[6:7]
	v_add_f64 v[2:3], v[4:5], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[8:9], v[6:7]
	v_add_f64 v[16:17], v[14:15], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_rcp_f64_e32 v[12:13], v[10:11]
	v_add_f64 v[8:9], v[10:11], -v[8:9]
	v_add_f64 v[14:15], v[16:17], -v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[6:7], -v[8:9]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[18:19], -v[10:11], v[12:13], 1.0
	v_add_f64 v[2:3], v[2:3], -v[14:15]
	v_fma_f64 v[12:13], v[18:19], v[12:13], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], -v[10:11], v[12:13], 1.0
	v_fma_f64 v[4:5], v[4:5], v[12:13], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[12:13], v[16:17], v[4:5]
	v_mul_f64 v[18:19], v[10:11], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], v[12:13], v[10:11], -v[18:19]
	v_fma_f64 v[8:9], v[12:13], v[6:7], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[20:21], v[18:19], v[8:9]
	v_add_f64 v[22:23], v[16:17], -v[20:21]
	v_add_f64 v[14:15], v[20:21], -v[18:19]
	v_max_f64 v[18:19], |v[72:73]|, |v[72:73]|
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[16:17], v[16:17], -v[22:23]
	v_add_f64 v[8:9], v[14:15], -v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[16:17], v[16:17], -v[20:21]
	v_max_f64 v[20:21], |v[76:77]|, |v[76:77]|
	v_add_f64 v[2:3], v[2:3], v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_min_f64 v[18:19], v[20:21], v[18:19]
	v_add_f64 v[2:3], v[8:9], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[22:23], v[2:3]
	v_mul_f64 v[14:15], v[4:5], v[8:9]
	v_add_f64 v[22:23], v[22:23], -v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[16:17], v[10:11], v[14:15]
	v_add_f64 v[2:3], v[2:3], v[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[10:11], v[14:15], v[10:11], -v[16:17]
	v_fma_f64 v[6:7], v[14:15], v[6:7], v[10:11]
	v_div_scale_f64 v[10:11], null, v[82:83], v[82:83], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[20:21], v[16:17], v[6:7]
	v_rcp_f64_e32 v[24:25], v[10:11]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[26:27], v[8:9], -v[20:21]
	v_add_f64 v[16:17], v[20:21], -v[16:17]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[28:29], -v[10:11], v[24:25], 1.0
	v_add_f64 v[8:9], v[8:9], -v[26:27]
	v_add_f64 v[6:7], v[16:17], -v[6:7]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[24:25], v[24:25], v[28:29], v[24:25]
	v_add_f64 v[8:9], v[8:9], -v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[20:21], -v[10:11], v[24:25], 1.0
	v_add_f64 v[2:3], v[2:3], v[8:9]
	v_div_scale_f64 v[8:9], vcc_lo, v[18:19], v[82:83], v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fma_f64 v[16:17], v[24:25], v[20:21], v[24:25]
	v_add_f64 v[20:21], v[12:13], v[14:15]
	v_add_f64 v[2:3], v[6:7], v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[6:7], v[8:9], v[16:17]
	v_add_f64 v[12:13], v[20:21], -v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[2:3], v[26:27], v[2:3]
	v_fma_f64 v[8:9], -v[10:11], v[6:7], v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[10:11], v[14:15], -v[12:13]
	v_mul_f64 v[2:3], v[4:5], v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_div_fmas_f64 v[4:5], v[8:9], v[16:17], v[6:7]
	v_cmp_eq_f64_e32 vcc_lo, 0x7ff00000, v[0:1]
	v_add_f64 v[2:3], v[10:11], v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fixup_f64 v[4:5], v[4:5], v[82:83], v[18:19]
                                        ; implicit-def: $vgpr82_vgpr83
	v_add_f64 v[6:7], v[20:21], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[8:9], v[4:5], v[4:5]
	v_mul_f64 v[10:11], v[6:7], v[6:7]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[12:13], v[8:9], s[22:23], s[20:21]
	s_mov_b32 s20, 0x6b47b09a
	s_mov_b32 s22, 0xbf559e2b
	s_mov_b32 s21, 0x3fc38538
	s_mov_b32 s23, 0x3fc3ab76
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[14:15], v[10:11], s[22:23], s[20:21]
	s_mov_b32 s20, 0x69efb384
	s_mov_b32 s21, 0x3f4b2bb0
	v_mul_f64 v[16:17], v[6:7], v[10:11]
	s_delay_alu instid0(VALU_DEP_3)
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[20:21]
	s_mov_b32 s20, 0xd7f4df2e
	s_mov_b32 s21, 0x3fc7474d
	s_delay_alu instid0(VALU_DEP_3) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[14:15], v[10:11], v[14:15], s[20:21]
	s_mov_b32 s20, 0xaf56de9b
	s_mov_b32 s21, 0xbf67952d
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[20:21]
	s_mov_b32 s20, 0x16291751
	s_mov_b32 s21, 0x3fcc71c0
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[14:15], v[10:11], v[14:15], s[20:21]
	s_mov_b32 s20, 0xa595c56f
	s_mov_b32 s21, 0x3f7d6d43
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[20:21]
	s_mov_b32 s20, 0x9b27acf1
	s_mov_b32 s21, 0x3fd24924
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[14:15], v[10:11], v[14:15], s[20:21]
	s_mov_b32 s20, 0xa57d9582
	s_mov_b32 s21, 0xbf8c6ea4
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[20:21]
	s_mov_b32 s20, 0x998ef7b6
	s_mov_b32 s21, 0x3fd99999
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[14:15], v[10:11], v[14:15], s[20:21]
	s_mov_b32 s20, 0x5f08b19f
	s_mov_b32 s21, 0x3f967e29
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[20:21]
	s_mov_b32 s20, 0x6ef28734
	s_mov_b32 s21, 0x3fa82d5d
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_fma_f64 v[10:11], v[10:11], v[14:15], s[2:3]
	s_mov_b32 s2, 0xfc27006a
	s_mov_b32 s3, 0xbf9e9ae6
	v_ldexp_f64 v[14:15], v[6:7], 1
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[2:3]
	s_mov_b32 s2, 0x5711927a
	s_mov_b32 s3, 0x3fa2c15b
	v_add_f64 v[6:7], v[6:7], -v[20:21]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_mul_f64 v[10:11], v[16:17], v[10:11]
	v_cvt_f64_i32_e32 v[16:17], v30
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[2:3]
	s_mov_b32 s2, 0xe82d3ff0
	s_mov_b32 s3, 0xbfa59976
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[2:3], v[2:3], -v[6:7]
	v_add_f64 v[18:19], v[14:15], v[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[2:3]
	s_mov_b32 s2, 0xfefa39ef
	s_mov_b32 s3, 0x3fe62e42
	v_ldexp_f64 v[2:3], v[2:3], 1
	v_mul_f64 v[20:21], v[16:17], s[2:3]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[6:7], v[18:19], -v[14:15]
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[14:15], v[16:17], s[2:3], -v[20:21]
	s_mov_b32 s2, 0x6a214619
	s_mov_b32 s3, 0xbfaae5ce
	v_add_f64 v[6:7], v[10:11], -v[6:7]
	s_delay_alu instid0(VALU_DEP_3)
	v_fma_f64 v[10:11], v[8:9], v[12:13], s[2:3]
	s_mov_b32 s2, 0x3b39803f
	s_mov_b32 s3, 0x3c7abc9e
	s_delay_alu instid0(VALU_DEP_3) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[16:17], s[2:3], v[14:15]
	s_mov_b32 s2, 0x8427b883
	s_mov_b32 s3, 0x3fae1bb4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[2:3], v[2:3], v[6:7]
	v_fma_f64 v[6:7], v[8:9], v[10:11], s[2:3]
	s_mov_b32 s2, 0x8b207f05
	s_mov_b32 s3, 0xbfb110e4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[10:11], v[20:21], v[12:13]
	v_add_f64 v[14:15], v[18:19], v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[6:7], v[8:9], v[6:7], s[2:3]
	s_mov_b32 s2, 0x57b87036
	s_mov_b32 s3, 0x3fb3b136
	v_add_f64 v[20:21], v[10:11], -v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[16:17], v[10:11], v[14:15]
	v_add_f64 v[18:19], v[14:15], -v[18:19]
	v_fma_f64 v[6:7], v[8:9], v[6:7], s[2:3]
	s_mov_b32 s2, 0x19378e4f
	s_mov_b32 s3, 0xbfb745d1
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[12:13], v[12:13], -v[20:21]
	v_add_f64 v[22:23], v[16:17], -v[10:11]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[2:3], v[2:3], -v[18:19]
	v_fma_f64 v[6:7], v[8:9], v[6:7], s[2:3]
	s_mov_b32 s2, 0x17e1913c
	s_mov_b32 s3, 0x3fbc71c7
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[24:25], v[16:17], -v[22:23]
	v_add_f64 v[14:15], v[14:15], -v[22:23]
	v_add_f64 v[18:19], v[12:13], v[2:3]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f64 v[6:7], v[8:9], v[6:7], s[2:3]
	s_mov_b32 s2, 0x92376b7d
	s_mov_b32 s3, 0xbfc24924
	v_add_f64 v[10:11], v[10:11], -v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[6:7], v[8:9], v[6:7], s[2:3]
	s_mov_b32 s2, 0x999952cc
	s_mov_b32 s3, 0x3fc99999
	v_add_f64 v[10:11], v[14:15], v[10:11]
	v_add_f64 v[14:15], v[18:19], -v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[6:7], v[8:9], v[6:7], s[2:3]
	s_mov_b32 s2, 0x55555523
	s_mov_b32 s3, 0xbfd55555
	v_add_f64 v[10:11], v[18:19], v[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[18:19], v[18:19], -v[14:15]
	v_add_f64 v[2:3], v[2:3], -v[14:15]
	v_fma_f64 v[6:7], v[8:9], v[6:7], s[2:3]
	s_mov_b32 s2, 0x54442d18
	s_mov_b32 s3, 0x3ff921fb
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[20:21], v[16:17], v[10:11]
	v_mul_f64 v[6:7], v[8:9], v[6:7]
	v_add_f64 v[8:9], v[12:13], -v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[20:21], -v[16:17]
	v_fma_f64 v[4:5], v[4:5], v[6:7], v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[2:3], v[2:3], v[8:9]
	v_add_f64 v[6:7], v[10:11], -v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[8:9], -v[4:5], s[2:3]
	s_mov_b32 s3, 0x400921fb
	v_add_f64 v[2:3], v[2:3], v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v5, v5, v9, s1
	v_cndmask_b32_e64 v4, v4, v8, s1
	v_ashrrev_i32_e32 v9, 31, v77
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_add_f64 v[6:7], -v[4:5], s[2:3]
	v_cmp_gt_i32_e64 s2, 0, v77
                                        ; implicit-def: $vgpr76_vgpr77
	v_add_f64 v[2:3], v[20:21], v[2:3]
	v_mov_b32_e32 v8, 0x7f3321d2
	v_cndmask_b32_e64 v4, v4, v6, s2
	v_mov_b32_e32 v6, 0x4002d97c
	v_cndmask_b32_e64 v5, v5, v7, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v6, 0x3fe921fb, v6, s2
	v_bfi_b32 v6, 0x7fffffff, v6, v73
	v_and_b32_e32 v10, 0x54442d18, v9
	v_and_b32_e32 v9, 0x400921fb, v9
	v_dual_cndmask_b32 v3, v3, v1 :: v_dual_cndmask_b32 v2, v2, v0
	v_cmp_eq_f64_e32 vcc_lo, 0, v[72:73]
	v_cndmask_b32_e64 v8, 0x54442d18, v8, s2
	v_cmp_nge_f64_e64 s2, -1.0, v[0:1]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_mul_f64 v[2:3], v[2:3], 0.5
	v_cndmask_b32_e32 v10, v4, v10, vcc_lo
	v_cndmask_b32_e32 v4, v5, v9, vcc_lo
	v_cmp_ngt_f64_e32 vcc_lo, -1.0, v[0:1]
	v_cndmask_b32_e32 v3, 0x7ff80000, v3, vcc_lo
	s_and_b32 vcc_lo, s12, s13
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v7, v4, v6, vcc_lo
	v_cndmask_b32_e64 v4, 0, v2, s2
	v_cmp_neq_f64_e64 s2, -1.0, v[0:1]
	v_cndmask_b32_e32 v6, v10, v8, vcc_lo
                                        ; implicit-def: $vgpr8_vgpr9
	v_cndmask_b32_e64 v5, 0xfff00000, v3, s2
                                        ; implicit-def: $vgpr2_vgpr3
.LBB0_32:                               ; %Flow387
	s_and_not1_saveexec_b32 s19, s4
	s_cbranch_execz .LBB0_44
; %bb.33:
	v_mul_f64 v[0:1], v[2:3], v[2:3]
	s_mov_b32 s2, 0x66666666
	s_mov_b32 s3, 0x3fe66666
                                        ; implicit-def: $vgpr4_vgpr5
                                        ; implicit-def: $vgpr6_vgpr7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[0:1], v[8:9], v[8:9], v[0:1]
	v_cmp_ge_f64_e32 vcc_lo, s[2:3], v[0:1]
	s_and_saveexec_b32 s2, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s20, exec_lo, s2
	s_cbranch_execz .LBB0_35
; %bb.34:
	v_frexp_mant_f64_e32 v[2:3], v[0:1]
	s_mov_b32 s5, 0x3fe55555
	s_mov_b32 s4, 0x55555555
	v_max_f64 v[12:13], |v[76:77]|, |v[76:77]|
	s_mov_b32 s22, 0xbd3237f4
	s_mov_b32 s24, 0xb5e68a13
	s_mov_b32 s23, 0xbf23e260
	s_mov_b32 s25, 0x3eeba404
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e64 s2, s[4:5], v[2:3]
	s_mov_b32 s4, 0x55555780
	v_cndmask_b32_e64 v4, 0, 1, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[2:3], v[2:3], v4
	v_add_f64 v[4:5], v[2:3], 1.0
	v_add_f64 v[10:11], v[2:3], -1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[6:7], v[4:5]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[8:9], -v[4:5], v[6:7], 1.0
	v_fma_f64 v[6:7], v[8:9], v[6:7], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], -v[4:5], v[6:7], 1.0
	v_fma_f64 v[6:7], v[8:9], v[6:7], v[6:7]
	v_max_f64 v[8:9], |v[72:73]|, |v[72:73]|
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[14:15], v[10:11], v[6:7]
	v_min_f64 v[8:9], v[12:13], v[8:9]
	v_add_f64 v[12:13], v[4:5], -1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[16:17], v[4:5], v[14:15]
	v_div_scale_f64 v[18:19], null, v[82:83], v[82:83], v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[2:3], v[2:3], -v[12:13]
	v_div_scale_f64 v[24:25], vcc_lo, v[8:9], v[82:83], v[8:9]
	v_fma_f64 v[4:5], v[14:15], v[4:5], -v[16:17]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[12:13], v[18:19]
	v_fma_f64 v[2:3], v[14:15], v[2:3], v[4:5]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[4:5], -v[18:19], v[12:13], 1.0
	v_add_f64 v[20:21], v[16:17], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[4:5], v[12:13], v[4:5], v[12:13]
	v_add_f64 v[12:13], v[10:11], -v[20:21]
	v_add_f64 v[16:17], v[20:21], -v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[22:23], -v[18:19], v[4:5], 1.0
	v_add_f64 v[10:11], v[10:11], -v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[2:3], v[16:17], -v[2:3]
	v_fma_f64 v[4:5], v[4:5], v[22:23], v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[10:11], v[10:11], -v[20:21]
	v_frexp_exp_i32_f64_e32 v20, v[0:1]
	v_mul_f64 v[16:17], v[24:25], v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[2:3], v[2:3], v[10:11]
	v_fma_f64 v[10:11], -v[18:19], v[16:17], v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[2:3], v[12:13], v[2:3]
	v_div_fmas_f64 v[4:5], v[10:11], v[4:5], v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[2:3], v[6:7], v[2:3]
	v_div_fixup_f64 v[4:5], v[4:5], v[82:83], v[8:9]
                                        ; implicit-def: $vgpr82_vgpr83
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[14:15], v[2:3]
	v_mul_f64 v[8:9], v[4:5], v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[10:11], v[6:7], v[6:7]
	v_fma_f64 v[12:13], v[8:9], s[24:25], s[22:23]
	s_mov_b32 s22, 0x6b47b09a
	s_mov_b32 s24, 0xbf559e2b
	s_mov_b32 s23, 0x3fc38538
	s_mov_b32 s25, 0x3fc3ab76
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[10:11], s[24:25], s[22:23]
	s_mov_b32 s22, 0x69efb384
	s_mov_b32 s23, 0x3f4b2bb0
	v_mul_f64 v[18:19], v[6:7], v[10:11]
	s_delay_alu instid0(VALU_DEP_3)
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[22:23]
	s_mov_b32 s22, 0xd7f4df2e
	s_mov_b32 s23, 0x3fc7474d
	s_delay_alu instid0(VALU_DEP_3) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[10:11], v[16:17], s[22:23]
	s_mov_b32 s22, 0xaf56de9b
	s_mov_b32 s23, 0xbf67952d
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[22:23]
	s_mov_b32 s22, 0x16291751
	s_mov_b32 s23, 0x3fcc71c0
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[10:11], v[16:17], s[22:23]
	s_mov_b32 s22, 0xa595c56f
	s_mov_b32 s23, 0x3f7d6d43
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[22:23]
	s_mov_b32 s22, 0x9b27acf1
	s_mov_b32 s23, 0x3fd24924
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[10:11], v[16:17], s[22:23]
	s_mov_b32 s22, 0xa57d9582
	s_mov_b32 s23, 0xbf8c6ea4
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[22:23]
	s_mov_b32 s22, 0x998ef7b6
	s_mov_b32 s23, 0x3fd99999
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[10:11], v[16:17], s[22:23]
	s_mov_b32 s22, 0x5f08b19f
	s_mov_b32 s23, 0x3f967e29
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_fma_f64 v[10:11], v[10:11], v[16:17], s[4:5]
	s_mov_b32 s4, 0xfc27006a
	s_mov_b32 s5, 0xbf9e9ae6
	v_ldexp_f64 v[16:17], v[6:7], 1
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[4:5]
	s_mov_b32 s4, 0x5711927a
	s_mov_b32 s5, 0x3fa2c15b
	v_add_f64 v[6:7], v[6:7], -v[14:15]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_mul_f64 v[10:11], v[18:19], v[10:11]
	v_subrev_co_ci_u32_e64 v18, vcc_lo, 0, v20, s2
	s_mov_b32 s2, 0xe82d3ff0
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[4:5]
	s_mov_b32 s3, 0xbfa59976
	s_delay_alu instid0(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[18:19], v18
	v_add_f64 v[2:3], v[2:3], -v[6:7]
	s_mov_b32 s4, 0x6ef28734
	s_mov_b32 s5, 0x3fa82d5d
	v_cmp_eq_f64_e32 vcc_lo, 0x7ff00000, v[0:1]
	v_add_f64 v[14:15], v[16:17], v[10:11]
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[2:3]
	s_mov_b32 s2, 0xfefa39ef
	s_mov_b32 s3, 0x3fe62e42
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[2:3], v[2:3], 1
	v_mul_f64 v[20:21], v[18:19], s[2:3]
	v_add_f64 v[6:7], v[14:15], -v[16:17]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[4:5]
	v_fma_f64 v[16:17], v[18:19], s[2:3], -v[20:21]
	s_mov_b32 s2, 0x6a214619
	s_mov_b32 s3, 0xbfaae5ce
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[6:7], v[10:11], -v[6:7]
	v_fma_f64 v[10:11], v[8:9], v[12:13], s[2:3]
	s_mov_b32 s2, 0x3b39803f
	s_mov_b32 s3, 0x3c7abc9e
	s_delay_alu instid0(VALU_DEP_3) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[18:19], s[2:3], v[16:17]
	s_mov_b32 s2, 0x8427b883
	s_mov_b32 s3, 0x3fae1bb4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[2:3], v[2:3], v[6:7]
	v_fma_f64 v[6:7], v[8:9], v[10:11], s[2:3]
	s_mov_b32 s2, 0x8b207f05
	s_mov_b32 s3, 0xbfb110e4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[10:11], v[20:21], v[12:13]
	v_add_f64 v[16:17], v[14:15], v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[6:7], v[8:9], v[6:7], s[2:3]
	s_mov_b32 s2, 0x57b87036
	s_mov_b32 s3, 0x3fb3b136
	v_add_f64 v[20:21], v[10:11], -v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[18:19], v[10:11], v[16:17]
	v_add_f64 v[14:15], v[16:17], -v[14:15]
	v_fma_f64 v[6:7], v[8:9], v[6:7], s[2:3]
	s_mov_b32 s2, 0x19378e4f
	s_mov_b32 s3, 0xbfb745d1
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[12:13], v[12:13], -v[20:21]
	v_add_f64 v[22:23], v[18:19], -v[10:11]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[2:3], v[2:3], -v[14:15]
	v_fma_f64 v[6:7], v[8:9], v[6:7], s[2:3]
	s_mov_b32 s2, 0x17e1913c
	s_mov_b32 s3, 0x3fbc71c7
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[24:25], v[18:19], -v[22:23]
	v_add_f64 v[14:15], v[16:17], -v[22:23]
	v_add_f64 v[16:17], v[12:13], v[2:3]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f64 v[6:7], v[8:9], v[6:7], s[2:3]
	s_mov_b32 s2, 0x92376b7d
	s_mov_b32 s3, 0xbfc24924
	v_add_f64 v[10:11], v[10:11], -v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[6:7], v[8:9], v[6:7], s[2:3]
	s_mov_b32 s2, 0x999952cc
	s_mov_b32 s3, 0x3fc99999
	v_add_f64 v[10:11], v[14:15], v[10:11]
	v_add_f64 v[14:15], v[16:17], -v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[6:7], v[8:9], v[6:7], s[2:3]
	s_mov_b32 s2, 0x55555523
	s_mov_b32 s3, 0xbfd55555
	v_add_f64 v[10:11], v[16:17], v[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[16:17], v[16:17], -v[14:15]
	v_add_f64 v[2:3], v[2:3], -v[14:15]
	v_fma_f64 v[6:7], v[8:9], v[6:7], s[2:3]
	s_mov_b32 s2, 0x54442d18
	s_mov_b32 s3, 0x3ff921fb
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[20:21], v[18:19], v[10:11]
	v_mul_f64 v[6:7], v[8:9], v[6:7]
	v_add_f64 v[8:9], v[12:13], -v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[20:21], -v[18:19]
	v_fma_f64 v[4:5], v[4:5], v[6:7], v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[2:3], v[2:3], v[8:9]
	v_add_f64 v[6:7], v[10:11], -v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[8:9], -v[4:5], s[2:3]
	s_mov_b32 s3, 0x400921fb
	v_add_f64 v[2:3], v[2:3], v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v5, v5, v9, s1
	v_cndmask_b32_e64 v4, v4, v8, s1
	v_ashrrev_i32_e32 v9, 31, v77
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[6:7], -v[4:5], s[2:3]
	v_cmp_eq_f64_e64 s3, 0, v[72:73]
	v_cmp_gt_i32_e64 s2, 0, v77
	v_and_b32_e32 v10, 0x54442d18, v9
                                        ; implicit-def: $vgpr76_vgpr77
	v_add_f64 v[2:3], v[20:21], v[2:3]
	v_mov_b32_e32 v8, 0x7f3321d2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v4, v4, v6, s2
	v_cndmask_b32_e64 v5, v5, v7, s2
	v_cndmask_b32_e64 v6, v4, v10, s3
	v_dual_cndmask_b32 v3, v3, v1 :: v_dual_cndmask_b32 v2, v2, v0
	v_cmp_neq_f64_e32 vcc_lo, 0, v[0:1]
	v_and_b32_e32 v1, 0x400921fb, v9
	v_mov_b32_e32 v0, 0x4002d97c
	v_cndmask_b32_e64 v8, 0x54442d18, v8, s2
	v_mul_f64 v[2:3], v[2:3], 0.5
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v1, v5, v1, s3
	v_cndmask_b32_e64 v0, 0x3fe921fb, v0, s2
	s_and_b32 s2, s12, s13
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v6, v6, v8, s2
                                        ; implicit-def: $vgpr8_vgpr9
	v_bfi_b32 v0, 0x7fffffff, v0, v73
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v7, v1, v0, s2
	v_cndmask_b32_e32 v5, 0xfff00000, v3, vcc_lo
	v_cndmask_b32_e32 v4, 0, v2, vcc_lo
                                        ; implicit-def: $vgpr2_vgpr3
.LBB0_35:                               ; %Flow385
	s_and_not1_saveexec_b32 s4, s20
	s_cbranch_execz .LBB0_43
; %bb.36:
	v_dual_mov_b32 v0, 0 :: v_dual_and_b32 v1, -8, v9
	v_and_b32_e32 v5, -8, v3
	s_mov_b32 s2, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mov_b32_e32 v4, v0
	v_add_f64 v[6:7], v[8:9], -v[0:1]
	v_mov_b32_e32 v8, v0
	v_add_f64 v[12:13], v[0:1], v[0:1]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[2:3], v[2:3], -v[4:5]
	v_mov_b32_e32 v10, v0
	v_add_f64 v[14:15], v[4:5], v[4:5]
	v_mul_f64 v[0:1], v[0:1], v[0:1]
	v_and_b32_e32 v9, -8, v7
	v_and_b32_e32 v11, -8, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[18:19], v[6:7], -v[8:9]
	v_add_f64 v[16:17], v[8:9], v[8:9]
	v_add_f64 v[22:23], v[2:3], -v[10:11]
	v_add_f64 v[24:25], v[10:11], v[10:11]
	v_mul_f64 v[2:3], v[4:5], v[4:5]
	v_mul_f64 v[4:5], v[12:13], v[8:9]
	v_mul_f64 v[8:9], v[8:9], v[8:9]
	v_mul_f64 v[6:7], v[14:15], v[10:11]
	v_mul_f64 v[10:11], v[10:11], v[10:11]
	v_mul_f64 v[12:13], v[12:13], v[18:19]
	v_mul_f64 v[16:17], v[16:17], v[18:19]
	v_mul_f64 v[20:21], v[18:19], v[18:19]
	v_mul_f64 v[14:15], v[14:15], v[22:23]
	v_mul_f64 v[18:19], v[24:25], v[22:23]
	v_mul_f64 v[22:23], v[22:23], v[22:23]
.LBB0_37:                               ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_38 Depth 2
	v_dual_mov_b32 v78, 1 :: v_dual_mov_b32 v75, v1
	v_mov_b32_e32 v74, v0
	s_mov_b32 s3, 0
.LBB0_38:                               ;   Parent Loop BB0_37 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s5, s3, 1
	v_dual_mov_b32 v63, v31 :: v_dual_mov_b32 v62, v30
	s_lshl_b32 s20, s5, 1
	v_dual_mov_b32 v33, v1 :: v_dual_mov_b32 v32, v0
	s_mov_b32 m0, s20
	s_lshl_b32 s3, s3, 1
	v_movrels_b32_e32 v79, v0
	v_movrels_b32_e32 v80, v1
	s_mov_b32 m0, s3
	v_dual_mov_b32 v61, v29 :: v_dual_mov_b32 v60, v28
	v_dual_mov_b32 v59, v27 :: v_dual_mov_b32 v58, v26
	s_delay_alu instid0(VALU_DEP_3)
	v_cmp_lt_f64_e32 vcc_lo, v[74:75], v[79:80]
	v_dual_mov_b32 v57, v25 :: v_dual_mov_b32 v56, v24
	v_dual_mov_b32 v55, v23 :: v_dual_mov_b32 v54, v22
	v_dual_mov_b32 v53, v21 :: v_dual_mov_b32 v52, v20
	v_dual_mov_b32 v51, v19 :: v_dual_mov_b32 v50, v18
	v_dual_mov_b32 v49, v17 :: v_dual_mov_b32 v48, v16
	v_dual_mov_b32 v47, v15 :: v_dual_mov_b32 v46, v14
	v_dual_mov_b32 v45, v13 :: v_dual_mov_b32 v44, v12
	v_dual_mov_b32 v43, v11 :: v_dual_mov_b32 v42, v10
	v_dual_mov_b32 v41, v9 :: v_dual_mov_b32 v40, v8
	v_dual_mov_b32 v39, v7 :: v_dual_mov_b32 v38, v6
	v_dual_mov_b32 v37, v5 :: v_dual_mov_b32 v36, v4
	v_dual_mov_b32 v35, v3 :: v_dual_mov_b32 v34, v2
	v_movreld_b32_e32 v32, v79
	v_movreld_b32_e32 v33, v80
	s_mov_b32 m0, s20
	s_cmp_lg_u32 s5, 11
	v_movreld_b32_e32 v32, v74
	v_movreld_b32_e32 v33, v75
	s_mov_b32 s3, s5
	v_dual_cndmask_b32 v31, v31, v63 :: v_dual_cndmask_b32 v30, v30, v62
	v_dual_cndmask_b32 v29, v29, v61 :: v_dual_cndmask_b32 v28, v28, v60
	v_dual_cndmask_b32 v27, v27, v59 :: v_dual_cndmask_b32 v26, v26, v58
	v_dual_cndmask_b32 v25, v25, v57 :: v_dual_cndmask_b32 v24, v24, v56
	v_dual_cndmask_b32 v23, v23, v55 :: v_dual_cndmask_b32 v22, v22, v54
	v_dual_cndmask_b32 v21, v21, v53 :: v_dual_cndmask_b32 v20, v20, v52
	v_dual_cndmask_b32 v19, v19, v51 :: v_dual_cndmask_b32 v18, v18, v50
	v_dual_cndmask_b32 v17, v17, v49 :: v_dual_cndmask_b32 v16, v16, v48
	v_dual_cndmask_b32 v15, v15, v47 :: v_dual_cndmask_b32 v14, v14, v46
	v_dual_cndmask_b32 v13, v13, v45 :: v_dual_cndmask_b32 v12, v12, v44
	v_dual_cndmask_b32 v11, v11, v43 :: v_dual_cndmask_b32 v10, v10, v42
	v_dual_cndmask_b32 v9, v9, v41 :: v_dual_cndmask_b32 v8, v8, v40
	v_dual_cndmask_b32 v7, v7, v39 :: v_dual_cndmask_b32 v6, v6, v38
	v_dual_cndmask_b32 v5, v5, v37 :: v_dual_cndmask_b32 v4, v4, v36
	v_dual_cndmask_b32 v3, v3, v35 :: v_dual_cndmask_b32 v2, v2, v34
	v_dual_cndmask_b32 v1, v1, v33 :: v_dual_cndmask_b32 v0, v0, v32
	v_dual_cndmask_b32 v75, v80, v75 :: v_dual_cndmask_b32 v74, v79, v74
	v_cndmask_b32_e64 v78, v78, 0, vcc_lo
	s_cbranch_scc1 .LBB0_38
; %bb.39:                               ;   in Loop: Header=BB0_37 Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ne_u32_e32 vcc_lo, 0, v78
	s_or_b32 s2, vcc_lo, s2
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB0_37
; %bb.40:                               ; %.preheader.i.i.i.preheader
	s_or_b32 exec_lo, exec_lo, s2
	v_mov_b32_e32 v32, 0
	v_mov_b32_e32 v33, 0xbff00000
	s_mov_b32 s2, 0
.LBB0_41:                               ; %.preheader.i.i.i
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b32 s3, s2, 1
	s_add_i32 s2, s2, 1
	s_mov_b32 m0, s3
	s_cmp_lg_u32 s2, 12
	v_movrels_b32_e32 v35, v1
	v_movrels_b32_e32 v34, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[32:33], v[32:33], v[34:35]
	s_cbranch_scc1 .LBB0_41
; %bb.42:
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[0:1], v[32:33], 1.0
	s_mov_b32 s3, 0x3fe55555
	s_mov_b32 s2, 0x55555555
	s_mov_b32 s20, 0xbd3237f4
	s_mov_b32 s22, 0xb5e68a13
	s_mov_b32 s21, 0xbf23e260
	s_mov_b32 s23, 0x3eeba404
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_frexp_mant_f64_e32 v[2:3], v[0:1]
	v_frexp_exp_i32_f64_e32 v6, v[0:1]
	v_add_f64 v[4:5], v[0:1], -1.0
	v_cmp_gt_f64_e32 vcc_lo, s[2:3], v[2:3]
	s_mov_b32 s2, 0x55555780
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_f64 v[2:3], v[4:5], -v[0:1]
	v_add_f64 v[4:5], v[32:33], -v[4:5]
	v_subrev_co_ci_u32_e32 v28, vcc_lo, 0, v6, vcc_lo
	v_add_f64 v[2:3], v[2:3], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v8, 0, v28
	v_ldexp_f64 v[0:1], v[0:1], v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[2:3], v[4:5], v[2:3]
	v_add_f64 v[6:7], v[0:1], 1.0
	v_add_f64 v[12:13], v[0:1], -1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[2:3], v[2:3], v8
	v_add_f64 v[4:5], v[6:7], -1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[14:15], v[12:13], 1.0
	v_add_f64 v[4:5], v[0:1], -v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[0:1], v[0:1], -v[14:15]
	v_add_f64 v[4:5], v[2:3], v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[0:1], v[2:3], v[0:1]
	v_add_f64 v[8:9], v[6:7], v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[14:15], v[12:13], v[0:1]
	v_rcp_f64_e32 v[10:11], v[8:9]
	v_add_f64 v[6:7], v[8:9], -v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[12:13], v[14:15], -v[12:13]
	v_add_f64 v[4:5], v[4:5], -v[6:7]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[16:17], -v[8:9], v[10:11], 1.0
	v_add_f64 v[0:1], v[0:1], -v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[10:11], v[16:17], v[10:11], v[10:11]
	v_fma_f64 v[2:3], -v[8:9], v[10:11], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[2:3], v[2:3], v[10:11], v[10:11]
	v_mul_f64 v[10:11], v[14:15], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[16:17], v[8:9], v[10:11]
	v_fma_f64 v[6:7], v[10:11], v[8:9], -v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], v[10:11], v[4:5], v[6:7]
	v_add_f64 v[18:19], v[16:17], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_f64 v[20:21], v[14:15], -v[18:19]
	v_add_f64 v[12:13], v[18:19], -v[16:17]
	v_max_f64 v[16:17], |v[72:73]|, |v[72:73]|
	v_add_f64 v[14:15], v[14:15], -v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[12:13], -v[6:7]
	v_add_f64 v[14:15], v[14:15], -v[18:19]
	v_max_f64 v[18:19], |v[76:77]|, |v[76:77]|
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[0:1], v[0:1], v[14:15]
	v_min_f64 v[16:17], v[18:19], v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[0:1], v[6:7], v[0:1]
	v_add_f64 v[6:7], v[20:21], v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[12:13], v[2:3], v[6:7]
	v_add_f64 v[20:21], v[20:21], -v[6:7]
	v_mul_f64 v[14:15], v[8:9], v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[0:1], v[0:1], v[20:21]
	v_fma_f64 v[8:9], v[12:13], v[8:9], -v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[4:5], v[12:13], v[4:5], v[8:9]
	v_div_scale_f64 v[8:9], null, v[82:83], v[82:83], v[16:17]
	v_add_f64 v[18:19], v[14:15], v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[22:23], v[8:9]
	v_add_f64 v[24:25], v[6:7], -v[18:19]
	v_add_f64 v[14:15], v[18:19], -v[14:15]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[26:27], -v[8:9], v[22:23], 1.0
	v_add_f64 v[6:7], v[6:7], -v[24:25]
	v_add_f64 v[4:5], v[14:15], -v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[22:23], v[22:23], v[26:27], v[22:23]
	v_add_f64 v[6:7], v[6:7], -v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[18:19], -v[8:9], v[22:23], 1.0
	v_add_f64 v[0:1], v[0:1], v[6:7]
	v_div_scale_f64 v[6:7], vcc_lo, v[16:17], v[82:83], v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fma_f64 v[14:15], v[22:23], v[18:19], v[22:23]
	v_add_f64 v[18:19], v[10:11], v[12:13]
	v_add_f64 v[0:1], v[4:5], v[0:1]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[4:5], v[6:7], v[14:15]
	v_add_f64 v[10:11], v[18:19], -v[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[0:1], v[24:25], v[0:1]
	v_fma_f64 v[6:7], -v[8:9], v[4:5], v[6:7]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[8:9], v[12:13], -v[10:11]
	v_mul_f64 v[0:1], v[2:3], v[0:1]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_div_fmas_f64 v[2:3], v[6:7], v[14:15], v[4:5]
	v_cmp_eq_f64_e32 vcc_lo, 0x7ff00000, v[32:33]
	v_add_f64 v[0:1], v[8:9], v[0:1]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fixup_f64 v[2:3], v[2:3], v[82:83], v[16:17]
	v_add_f64 v[4:5], v[18:19], v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[6:7], v[2:3], v[2:3]
	v_mul_f64 v[8:9], v[4:5], v[4:5]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[10:11], v[6:7], s[22:23], s[20:21]
	s_mov_b32 s20, 0x6b47b09a
	s_mov_b32 s22, 0xbf559e2b
	s_mov_b32 s21, 0x3fc38538
	s_mov_b32 s23, 0x3fc3ab76
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[8:9], s[22:23], s[20:21]
	s_mov_b32 s20, 0x69efb384
	s_mov_b32 s21, 0x3f4b2bb0
	v_mul_f64 v[14:15], v[4:5], v[8:9]
	s_delay_alu instid0(VALU_DEP_3)
	v_fma_f64 v[10:11], v[6:7], v[10:11], s[20:21]
	s_mov_b32 s20, 0xd7f4df2e
	s_mov_b32 s21, 0x3fc7474d
	s_delay_alu instid0(VALU_DEP_3) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[20:21]
	s_mov_b32 s20, 0xaf56de9b
	s_mov_b32 s21, 0xbf67952d
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[10:11], v[6:7], v[10:11], s[20:21]
	s_mov_b32 s20, 0x16291751
	s_mov_b32 s21, 0x3fcc71c0
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[20:21]
	s_mov_b32 s20, 0xa595c56f
	s_mov_b32 s21, 0x3f7d6d43
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[10:11], v[6:7], v[10:11], s[20:21]
	s_mov_b32 s20, 0x9b27acf1
	s_mov_b32 s21, 0x3fd24924
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[20:21]
	s_mov_b32 s20, 0xa57d9582
	s_mov_b32 s21, 0xbf8c6ea4
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[10:11], v[6:7], v[10:11], s[20:21]
	s_mov_b32 s20, 0x998ef7b6
	s_mov_b32 s21, 0x3fd99999
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[20:21]
	s_mov_b32 s20, 0x5f08b19f
	s_mov_b32 s21, 0x3f967e29
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[10:11], v[6:7], v[10:11], s[20:21]
	s_mov_b32 s20, 0x6ef28734
	s_mov_b32 s21, 0x3fa82d5d
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_fma_f64 v[8:9], v[8:9], v[12:13], s[2:3]
	s_mov_b32 s2, 0xfc27006a
	s_mov_b32 s3, 0xbf9e9ae6
	v_ldexp_f64 v[12:13], v[4:5], 1
	v_fma_f64 v[10:11], v[6:7], v[10:11], s[2:3]
	s_mov_b32 s2, 0x5711927a
	s_mov_b32 s3, 0x3fa2c15b
	v_add_f64 v[4:5], v[4:5], -v[18:19]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_mul_f64 v[8:9], v[14:15], v[8:9]
	v_cvt_f64_i32_e32 v[14:15], v28
	v_fma_f64 v[10:11], v[6:7], v[10:11], s[2:3]
	s_mov_b32 s2, 0xe82d3ff0
	s_mov_b32 s3, 0xbfa59976
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[0:1], v[0:1], -v[4:5]
	v_add_f64 v[16:17], v[12:13], v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[10:11], v[6:7], v[10:11], s[2:3]
	s_mov_b32 s2, 0xfefa39ef
	s_mov_b32 s3, 0x3fe62e42
	v_ldexp_f64 v[0:1], v[0:1], 1
	v_mul_f64 v[18:19], v[14:15], s[2:3]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[4:5], v[16:17], -v[12:13]
	v_fma_f64 v[10:11], v[6:7], v[10:11], s[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[12:13], v[14:15], s[2:3], -v[18:19]
	s_mov_b32 s2, 0x6a214619
	s_mov_b32 s3, 0xbfaae5ce
	v_add_f64 v[4:5], v[8:9], -v[4:5]
	s_delay_alu instid0(VALU_DEP_3)
	v_fma_f64 v[8:9], v[6:7], v[10:11], s[2:3]
	s_mov_b32 s2, 0x3b39803f
	s_mov_b32 s3, 0x3c7abc9e
	s_delay_alu instid0(VALU_DEP_3) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[10:11], v[14:15], s[2:3], v[12:13]
	s_mov_b32 s2, 0x8427b883
	s_mov_b32 s3, 0x3fae1bb4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[0:1], v[0:1], v[4:5]
	v_fma_f64 v[4:5], v[6:7], v[8:9], s[2:3]
	s_mov_b32 s2, 0x8b207f05
	s_mov_b32 s3, 0xbfb110e4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[8:9], v[18:19], v[10:11]
	v_add_f64 v[12:13], v[16:17], v[0:1]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[4:5], v[6:7], v[4:5], s[2:3]
	s_mov_b32 s2, 0x57b87036
	s_mov_b32 s3, 0x3fb3b136
	v_add_f64 v[18:19], v[8:9], -v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[14:15], v[8:9], v[12:13]
	v_add_f64 v[16:17], v[12:13], -v[16:17]
	v_fma_f64 v[4:5], v[6:7], v[4:5], s[2:3]
	s_mov_b32 s2, 0x19378e4f
	s_mov_b32 s3, 0xbfb745d1
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[10:11], v[10:11], -v[18:19]
	v_add_f64 v[20:21], v[14:15], -v[8:9]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[0:1], v[0:1], -v[16:17]
	v_fma_f64 v[4:5], v[6:7], v[4:5], s[2:3]
	s_mov_b32 s2, 0x17e1913c
	s_mov_b32 s3, 0x3fbc71c7
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[22:23], v[14:15], -v[20:21]
	v_add_f64 v[12:13], v[12:13], -v[20:21]
	v_add_f64 v[16:17], v[10:11], v[0:1]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f64 v[4:5], v[6:7], v[4:5], s[2:3]
	s_mov_b32 s2, 0x92376b7d
	s_mov_b32 s3, 0xbfc24924
	v_add_f64 v[8:9], v[8:9], -v[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[4:5], v[6:7], v[4:5], s[2:3]
	s_mov_b32 s2, 0x999952cc
	s_mov_b32 s3, 0x3fc99999
	v_add_f64 v[8:9], v[12:13], v[8:9]
	v_add_f64 v[12:13], v[16:17], -v[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[4:5], v[6:7], v[4:5], s[2:3]
	s_mov_b32 s2, 0x55555523
	s_mov_b32 s3, 0xbfd55555
	v_add_f64 v[8:9], v[16:17], v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[16:17], v[16:17], -v[12:13]
	v_add_f64 v[0:1], v[0:1], -v[12:13]
	v_fma_f64 v[4:5], v[6:7], v[4:5], s[2:3]
	s_mov_b32 s2, 0x54442d18
	s_mov_b32 s3, 0x3ff921fb
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[18:19], v[14:15], v[8:9]
	v_mul_f64 v[4:5], v[6:7], v[4:5]
	v_add_f64 v[6:7], v[10:11], -v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[10:11], v[18:19], -v[14:15]
	v_fma_f64 v[2:3], v[2:3], v[4:5], v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[0:1], v[0:1], v[6:7]
	v_add_f64 v[4:5], v[8:9], -v[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], -v[2:3], s[2:3]
	s_mov_b32 s3, 0x400921fb
	v_add_f64 v[0:1], v[0:1], v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v3, v3, v7, s1
	v_cndmask_b32_e64 v2, v2, v6, s1
	v_ashrrev_i32_e32 v7, 31, v77
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_add_f64 v[4:5], -v[2:3], s[2:3]
	v_cmp_gt_i32_e64 s2, 0, v77
	v_add_f64 v[0:1], v[18:19], v[0:1]
	v_mov_b32_e32 v6, 0x7f3321d2
	v_cndmask_b32_e64 v2, v2, v4, s2
	v_cndmask_b32_e64 v3, v3, v5, s2
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v1, v1, v33 :: v_dual_cndmask_b32 v0, v0, v32
	v_cmp_eq_f64_e32 vcc_lo, 0, v[72:73]
	v_mov_b32_e32 v4, 0x4002d97c
	v_cndmask_b32_e64 v6, 0x54442d18, v6, s2
	v_cndmask_b32_e64 v4, 0x3fe921fb, v4, s2
	v_cmp_nge_f64_e64 s2, -1.0, v[32:33]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_bfi_b32 v4, 0x7fffffff, v4, v73
	v_and_b32_e32 v8, 0x54442d18, v7
	v_and_b32_e32 v7, 0x400921fb, v7
	v_mul_f64 v[0:1], v[0:1], 0.5
	v_dual_cndmask_b32 v2, v2, v8 :: v_dual_cndmask_b32 v3, v3, v7
	v_cmp_ngt_f64_e32 vcc_lo, -1.0, v[32:33]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v1, 0x7ff80000, v1, vcc_lo
	s_and_b32 vcc_lo, s12, s13
	v_cndmask_b32_e32 v7, v3, v4, vcc_lo
	v_cndmask_b32_e64 v4, 0, v0, s2
	v_cmp_neq_f64_e64 s2, -1.0, v[32:33]
	v_cndmask_b32_e32 v6, v2, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v5, 0xfff00000, v1, s2
.LBB0_43:                               ; %Flow386
	s_or_b32 exec_lo, exec_lo, s4
.LBB0_44:                               ; %Flow388
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s19
                                        ; implicit-def: $vgpr10_vgpr11
                                        ; implicit-def: $vgpr76_vgpr77
                                        ; implicit-def: $vgpr82_vgpr83
.LBB0_45:                               ; %Flow389
	s_and_not1_saveexec_b32 s18, s18
	s_cbranch_execz .LBB0_47
; %bb.46:
	v_cndmask_b32_e64 v1, v11, 0x7ff00000, s17
	v_cndmask_b32_e64 v0, v10, 0, s17
	s_mov_b32 s5, 0x3fe55555
	s_mov_b32 s4, 0x55555555
	v_max_f64 v[10:11], |v[72:73]|, |v[72:73]|
	v_max_f64 v[12:13], |v[76:77]|, |v[76:77]|
	v_frexp_mant_f64_e32 v[2:3], v[0:1]
	s_mov_b32 s20, 0xbd3237f4
	s_mov_b32 s22, 0xb5e68a13
	s_mov_b32 s21, 0xbf23e260
	s_mov_b32 s23, 0x3eeba404
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e64 s2, s[4:5], v[2:3]
	s_mov_b32 s4, 0x55555780
	v_cndmask_b32_e64 v4, 0, 1, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[2:3], v[2:3], v4
	v_add_f64 v[4:5], v[2:3], 1.0
	v_add_f64 v[14:15], v[2:3], -1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[6:7], v[4:5]
	v_add_f64 v[16:17], v[4:5], -1.0
	v_add_f64 v[2:3], v[2:3], -v[16:17]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[8:9], -v[4:5], v[6:7], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], v[8:9], v[6:7], v[6:7]
	v_fma_f64 v[8:9], -v[4:5], v[6:7], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[6:7], v[8:9], v[6:7], v[6:7]
	v_min_f64 v[8:9], v[12:13], v[10:11]
	v_mul_f64 v[10:11], v[14:15], v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_div_scale_f64 v[12:13], null, v[82:83], v[82:83], v[8:9]
	v_div_scale_f64 v[24:25], vcc_lo, v[8:9], v[82:83], v[8:9]
	v_mul_f64 v[18:19], v[4:5], v[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[20:21], v[12:13]
	v_fma_f64 v[4:5], v[10:11], v[4:5], -v[18:19]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[16:17], -v[12:13], v[20:21], 1.0
	v_fma_f64 v[2:3], v[10:11], v[2:3], v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[4:5], v[20:21], v[16:17], v[20:21]
	v_add_f64 v[16:17], v[18:19], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[20:21], -v[12:13], v[4:5], 1.0
	v_add_f64 v[22:23], v[14:15], -v[16:17]
	v_add_f64 v[18:19], v[16:17], -v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[4:5], v[4:5], v[20:21], v[4:5]
	v_add_f64 v[14:15], v[14:15], -v[22:23]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[2:3], v[18:19], -v[2:3]
	v_mul_f64 v[20:21], v[24:25], v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[14:15], v[14:15], -v[16:17]
	v_fma_f64 v[12:13], -v[12:13], v[20:21], v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[2:3], v[2:3], v[14:15]
	v_div_fmas_f64 v[4:5], v[12:13], v[4:5], v[20:21]
	v_frexp_exp_i32_f64_e32 v20, v[0:1]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[2:3], v[22:23], v[2:3]
	v_div_fixup_f64 v[4:5], v[4:5], v[82:83], v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[2:3], v[6:7], v[2:3]
	v_mul_f64 v[6:7], v[4:5], v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[8:9], v[10:11], v[2:3]
	v_fma_f64 v[12:13], v[6:7], s[22:23], s[20:21]
	s_mov_b32 s20, 0x69efb384
	s_mov_b32 s21, 0x3f4b2bb0
	s_mov_b32 s22, 0xbf559e2b
	s_mov_b32 s23, 0x3fc3ab76
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[14:15], v[8:9], v[8:9]
	v_fma_f64 v[12:13], v[6:7], v[12:13], s[20:21]
	s_mov_b32 s20, 0x6b47b09a
	s_mov_b32 s21, 0x3fc38538
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[14:15], s[22:23], s[20:21]
	s_mov_b32 s20, 0xaf56de9b
	s_mov_b32 s21, 0xbf67952d
	v_mul_f64 v[18:19], v[8:9], v[14:15]
	s_delay_alu instid0(VALU_DEP_3)
	v_fma_f64 v[12:13], v[6:7], v[12:13], s[20:21]
	s_mov_b32 s20, 0xd7f4df2e
	s_mov_b32 s21, 0x3fc7474d
	s_delay_alu instid0(VALU_DEP_3) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[14:15], v[16:17], s[20:21]
	s_mov_b32 s20, 0xa595c56f
	s_mov_b32 s21, 0x3f7d6d43
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[6:7], v[12:13], s[20:21]
	s_mov_b32 s20, 0x16291751
	s_mov_b32 s21, 0x3fcc71c0
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[14:15], v[16:17], s[20:21]
	s_mov_b32 s20, 0xa57d9582
	s_mov_b32 s21, 0xbf8c6ea4
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[6:7], v[12:13], s[20:21]
	s_mov_b32 s20, 0x9b27acf1
	s_mov_b32 s21, 0x3fd24924
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[14:15], v[16:17], s[20:21]
	s_mov_b32 s20, 0x5f08b19f
	s_mov_b32 s21, 0x3f967e29
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[6:7], v[12:13], s[20:21]
	s_mov_b32 s20, 0x998ef7b6
	s_mov_b32 s21, 0x3fd99999
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[14:15], v[16:17], s[20:21]
	s_mov_b32 s20, 0xfc27006a
	s_mov_b32 s21, 0xbf9e9ae6
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[6:7], v[12:13], s[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_fma_f64 v[14:15], v[14:15], v[16:17], s[4:5]
	s_mov_b32 s4, 0x5711927a
	s_mov_b32 s5, 0x3fa2c15b
	v_ldexp_f64 v[16:17], v[8:9], 1
	v_fma_f64 v[12:13], v[6:7], v[12:13], s[4:5]
	s_mov_b32 s4, 0xe82d3ff0
	s_mov_b32 s5, 0xbfa59976
	v_add_f64 v[8:9], v[8:9], -v[10:11]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_mul_f64 v[14:15], v[18:19], v[14:15]
	v_subrev_co_ci_u32_e64 v18, vcc_lo, 0, v20, s2
	s_mov_b32 s2, 0x6ef28734
	v_fma_f64 v[12:13], v[6:7], v[12:13], s[4:5]
	s_mov_b32 s3, 0x3fa82d5d
	s_delay_alu instid0(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[18:19], v18
	v_add_f64 v[2:3], v[2:3], -v[8:9]
	s_mov_b32 s4, 0x6a214619
	s_mov_b32 s5, 0xbfaae5ce
	v_cmp_gt_i32_e32 vcc_lo, 0, v77
	v_add_f64 v[10:11], v[16:17], v[14:15]
	v_fma_f64 v[12:13], v[6:7], v[12:13], s[2:3]
	s_mov_b32 s2, 0xfefa39ef
	s_mov_b32 s3, 0x3fe62e42
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[2:3], v[2:3], 1
	v_mul_f64 v[20:21], v[18:19], s[2:3]
	v_add_f64 v[8:9], v[10:11], -v[16:17]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[12:13], v[6:7], v[12:13], s[4:5]
	v_fma_f64 v[16:17], v[18:19], s[2:3], -v[20:21]
	s_mov_b32 s2, 0x8427b883
	s_mov_b32 s3, 0x3fae1bb4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[8:9], v[14:15], -v[8:9]
	v_fma_f64 v[12:13], v[6:7], v[12:13], s[2:3]
	s_mov_b32 s2, 0x3b39803f
	s_mov_b32 s3, 0x3c7abc9e
	s_delay_alu instid0(VALU_DEP_3) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[14:15], v[18:19], s[2:3], v[16:17]
	s_mov_b32 s2, 0x8b207f05
	s_mov_b32 s3, 0xbfb110e4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[2:3], v[2:3], v[8:9]
	v_fma_f64 v[8:9], v[6:7], v[12:13], s[2:3]
	s_mov_b32 s2, 0x57b87036
	s_mov_b32 s3, 0x3fb3b136
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[20:21], v[14:15]
	v_add_f64 v[16:17], v[10:11], v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[8:9], v[6:7], v[8:9], s[2:3]
	s_mov_b32 s2, 0x19378e4f
	s_mov_b32 s3, 0xbfb745d1
	v_add_f64 v[20:21], v[12:13], -v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[18:19], v[12:13], v[16:17]
	v_add_f64 v[10:11], v[16:17], -v[10:11]
	v_fma_f64 v[8:9], v[6:7], v[8:9], s[2:3]
	s_mov_b32 s2, 0x17e1913c
	s_mov_b32 s3, 0x3fbc71c7
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[14:15], v[14:15], -v[20:21]
	v_add_f64 v[22:23], v[18:19], -v[12:13]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[2:3], v[2:3], -v[10:11]
	v_fma_f64 v[8:9], v[6:7], v[8:9], s[2:3]
	s_mov_b32 s2, 0x92376b7d
	s_mov_b32 s3, 0xbfc24924
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[24:25], v[18:19], -v[22:23]
	v_add_f64 v[10:11], v[16:17], -v[22:23]
	v_add_f64 v[16:17], v[14:15], v[2:3]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f64 v[8:9], v[6:7], v[8:9], s[2:3]
	s_mov_b32 s2, 0x999952cc
	s_mov_b32 s3, 0x3fc99999
	v_add_f64 v[12:13], v[12:13], -v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[8:9], v[6:7], v[8:9], s[2:3]
	s_mov_b32 s2, 0x55555523
	s_mov_b32 s3, 0xbfd55555
	v_add_f64 v[10:11], v[10:11], v[12:13]
	v_add_f64 v[12:13], v[16:17], -v[14:15]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[8:9], v[6:7], v[8:9], s[2:3]
	s_mov_b32 s2, 0x54442d18
	s_mov_b32 s3, 0x3ff921fb
	v_add_f64 v[10:11], v[16:17], v[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[2:3], v[2:3], -v[12:13]
	v_mul_f64 v[6:7], v[6:7], v[8:9]
	v_add_f64 v[8:9], v[16:17], -v[12:13]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[16:17], v[18:19], v[10:11]
	v_fma_f64 v[4:5], v[4:5], v[6:7], v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[6:7], v[14:15], -v[8:9]
	v_add_f64 v[8:9], v[16:17], -v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], -v[4:5], s[2:3]
	v_add_f64 v[2:3], v[2:3], v[6:7]
	s_mov_b32 s3, 0x400921fb
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[6:7], v[10:11], -v[8:9]
	v_ashrrev_i32_e32 v9, 31, v77
	v_cndmask_b32_e64 v5, v5, v13, s1
	v_cndmask_b32_e64 v4, v4, v12, s1
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[2:3], v[2:3], v[6:7]
	v_add_f64 v[6:7], -v[4:5], s[2:3]
	v_cmp_class_f64_e64 s2, v[0:1], 0x204
	v_mov_b32_e32 v8, 0x7f3321d2
	v_cmp_eq_f64_e64 s3, 0, v[72:73]
	v_add_f64 v[2:3], v[16:17], v[2:3]
	v_dual_cndmask_b32 v5, v5, v7 :: v_dual_cndmask_b32 v4, v4, v6
	v_mov_b32_e32 v6, 0x4002d97c
	v_cndmask_b32_e32 v8, 0x54442d18, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v6, 0x3fe921fb, v6, vcc_lo
	v_cmp_ngt_f64_e32 vcc_lo, 0, v[0:1]
	v_bfi_b32 v6, 0x7fffffff, v6, v73
	v_cndmask_b32_e64 v2, v2, v0, s2
	v_cndmask_b32_e64 v3, v3, v1, s2
	v_cmp_nge_f64_e64 s2, 0, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v3, 0x7ff80000, v3, vcc_lo
	s_and_b32 vcc_lo, s12, s13
	v_and_b32_e32 v10, 0x54442d18, v9
	v_and_b32_e32 v9, 0x400921fb, v9
	v_cndmask_b32_e64 v10, v4, v10, s3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v4, v5, v9, s3
	v_dual_cndmask_b32 v7, v4, v6 :: v_dual_cndmask_b32 v6, v10, v8
	v_cndmask_b32_e64 v4, 0, v2, s2
	v_cmp_neq_f64_e64 s2, 0, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v5, 0xfff00000, v3, s2
.LBB0_47:                               ; %Flow390
	s_or_b32 exec_lo, exec_lo, s18
                                        ; implicit-def: $vgpr2_vgpr3
                                        ; implicit-def: $vgpr76_vgpr77
                                        ; implicit-def: $vgpr82_vgpr83
.LBB0_48:                               ; %Flow393
	s_and_not1_saveexec_b32 s4, s16
	s_cbranch_execz .LBB0_54
; %bb.49:
	s_mov_b32 s2, 0x6a3f9475
	s_mov_b32 s3, 0x20ca2fe7
                                        ; implicit-def: $vgpr4_vgpr5
                                        ; implicit-def: $vgpr6_vgpr7
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ngt_f64_e32 vcc_lo, s[2:3], v[2:3]
	s_and_saveexec_b32 s2, vcc_lo
	s_xor_b32 s5, exec_lo, s2
	s_cbranch_execz .LBB0_51
; %bb.50:
	v_mul_f64 v[0:1], v[2:3], v[2:3]
	s_mov_b32 s3, 0x3fe55555
	s_mov_b32 s2, 0x55555555
	s_mov_b32 s16, 0xbd3237f4
	s_mov_b32 s18, 0xb5e68a13
	s_mov_b32 s17, 0xbf23e260
	s_mov_b32 s19, 0x3eeba404
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], v[0:1], 1.0
	v_frexp_mant_f64_e32 v[4:5], v[2:3]
	v_frexp_exp_i32_f64_e32 v8, v[2:3]
	v_add_f64 v[6:7], v[2:3], -1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e32 vcc_lo, s[2:3], v[4:5]
	s_mov_b32 s2, 0x55555780
	v_add_f64 v[4:5], v[6:7], -v[2:3]
	v_add_f64 v[6:7], v[0:1], -v[6:7]
	v_subrev_co_ci_u32_e32 v30, vcc_lo, 0, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[4:5], v[4:5], 1.0
	v_sub_nc_u32_e32 v10, 0, v30
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[2:3], v[2:3], v10
	v_add_f64 v[4:5], v[6:7], v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[8:9], v[2:3], 1.0
	v_add_f64 v[14:15], v[2:3], -1.0
	v_ldexp_f64 v[4:5], v[4:5], v10
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[6:7], v[8:9], -1.0
	v_add_f64 v[16:17], v[14:15], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[2:3], -v[6:7]
	v_add_f64 v[2:3], v[2:3], -v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[4:5], v[6:7]
	v_add_f64 v[2:3], v[4:5], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[8:9], v[6:7]
	v_add_f64 v[16:17], v[14:15], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_rcp_f64_e32 v[12:13], v[10:11]
	v_add_f64 v[8:9], v[8:9], -v[10:11]
	v_add_f64 v[14:15], v[14:15], -v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[6:7], v[8:9]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[18:19], -v[10:11], v[12:13], 1.0
	v_add_f64 v[2:3], v[2:3], v[14:15]
	v_fma_f64 v[12:13], v[18:19], v[12:13], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], -v[10:11], v[12:13], 1.0
	v_fma_f64 v[4:5], v[4:5], v[12:13], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[12:13], v[16:17], v[4:5]
	v_mul_f64 v[18:19], v[10:11], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], v[12:13], v[10:11], -v[18:19]
	v_fma_f64 v[8:9], v[12:13], v[6:7], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[20:21], v[18:19], v[8:9]
	v_add_f64 v[22:23], v[16:17], -v[20:21]
	v_add_f64 v[14:15], v[20:21], -v[18:19]
	v_max_f64 v[18:19], |v[72:73]|, |v[72:73]|
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[16:17], v[16:17], -v[22:23]
	v_add_f64 v[8:9], v[14:15], -v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[16:17], v[16:17], -v[20:21]
	v_max_f64 v[20:21], |v[76:77]|, |v[76:77]|
	v_add_f64 v[2:3], v[2:3], v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_min_f64 v[18:19], v[20:21], v[18:19]
	v_add_f64 v[2:3], v[8:9], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[22:23], v[2:3]
	v_mul_f64 v[14:15], v[4:5], v[8:9]
	v_add_f64 v[22:23], v[22:23], -v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[16:17], v[10:11], v[14:15]
	v_add_f64 v[2:3], v[2:3], v[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[10:11], v[14:15], v[10:11], -v[16:17]
	v_fma_f64 v[6:7], v[14:15], v[6:7], v[10:11]
	v_div_scale_f64 v[10:11], null, v[82:83], v[82:83], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[20:21], v[16:17], v[6:7]
	v_rcp_f64_e32 v[24:25], v[10:11]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[26:27], v[8:9], -v[20:21]
	v_add_f64 v[16:17], v[20:21], -v[16:17]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[28:29], -v[10:11], v[24:25], 1.0
	v_add_f64 v[8:9], v[8:9], -v[26:27]
	v_add_f64 v[6:7], v[16:17], -v[6:7]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[24:25], v[24:25], v[28:29], v[24:25]
	v_add_f64 v[8:9], v[8:9], -v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[20:21], -v[10:11], v[24:25], 1.0
	v_add_f64 v[2:3], v[2:3], v[8:9]
	v_div_scale_f64 v[8:9], vcc_lo, v[18:19], v[82:83], v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fma_f64 v[16:17], v[24:25], v[20:21], v[24:25]
	v_add_f64 v[20:21], v[12:13], v[14:15]
	v_add_f64 v[2:3], v[6:7], v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[6:7], v[8:9], v[16:17]
	v_add_f64 v[12:13], v[20:21], -v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[2:3], v[26:27], v[2:3]
	v_fma_f64 v[8:9], -v[10:11], v[6:7], v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[10:11], v[14:15], -v[12:13]
	v_mul_f64 v[2:3], v[4:5], v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_div_fmas_f64 v[4:5], v[8:9], v[16:17], v[6:7]
	v_cmp_eq_f64_e32 vcc_lo, 0x7ff00000, v[0:1]
	v_add_f64 v[2:3], v[10:11], v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fixup_f64 v[4:5], v[4:5], v[82:83], v[18:19]
                                        ; implicit-def: $vgpr82_vgpr83
	v_add_f64 v[6:7], v[20:21], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[8:9], v[4:5], v[4:5]
	v_mul_f64 v[10:11], v[6:7], v[6:7]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[12:13], v[8:9], s[18:19], s[16:17]
	s_mov_b32 s16, 0x6b47b09a
	s_mov_b32 s18, 0xbf559e2b
	s_mov_b32 s17, 0x3fc38538
	s_mov_b32 s19, 0x3fc3ab76
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[14:15], v[10:11], s[18:19], s[16:17]
	s_mov_b32 s16, 0x69efb384
	s_mov_b32 s17, 0x3f4b2bb0
	v_mul_f64 v[16:17], v[6:7], v[10:11]
	s_delay_alu instid0(VALU_DEP_3)
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[16:17]
	s_mov_b32 s16, 0xd7f4df2e
	s_mov_b32 s17, 0x3fc7474d
	s_delay_alu instid0(VALU_DEP_3) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[14:15], v[10:11], v[14:15], s[16:17]
	s_mov_b32 s16, 0xaf56de9b
	s_mov_b32 s17, 0xbf67952d
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[16:17]
	s_mov_b32 s16, 0x16291751
	s_mov_b32 s17, 0x3fcc71c0
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[14:15], v[10:11], v[14:15], s[16:17]
	s_mov_b32 s16, 0xa595c56f
	s_mov_b32 s17, 0x3f7d6d43
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[16:17]
	s_mov_b32 s16, 0x9b27acf1
	s_mov_b32 s17, 0x3fd24924
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[14:15], v[10:11], v[14:15], s[16:17]
	s_mov_b32 s16, 0xa57d9582
	s_mov_b32 s17, 0xbf8c6ea4
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[16:17]
	s_mov_b32 s16, 0x998ef7b6
	s_mov_b32 s17, 0x3fd99999
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[14:15], v[10:11], v[14:15], s[16:17]
	s_mov_b32 s16, 0x5f08b19f
	s_mov_b32 s17, 0x3f967e29
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[16:17]
	s_mov_b32 s16, 0x6ef28734
	s_mov_b32 s17, 0x3fa82d5d
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_fma_f64 v[10:11], v[10:11], v[14:15], s[2:3]
	s_mov_b32 s2, 0xfc27006a
	s_mov_b32 s3, 0xbf9e9ae6
	v_ldexp_f64 v[14:15], v[6:7], 1
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[2:3]
	s_mov_b32 s2, 0x5711927a
	s_mov_b32 s3, 0x3fa2c15b
	v_add_f64 v[6:7], v[6:7], -v[20:21]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_mul_f64 v[10:11], v[16:17], v[10:11]
	v_cvt_f64_i32_e32 v[16:17], v30
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[2:3]
	s_mov_b32 s2, 0xe82d3ff0
	s_mov_b32 s3, 0xbfa59976
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[2:3], v[2:3], -v[6:7]
	v_add_f64 v[18:19], v[14:15], v[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[2:3]
	s_mov_b32 s2, 0xfefa39ef
	s_mov_b32 s3, 0x3fe62e42
	v_ldexp_f64 v[2:3], v[2:3], 1
	v_mul_f64 v[20:21], v[16:17], s[2:3]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[6:7], v[18:19], -v[14:15]
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[14:15], v[16:17], s[2:3], -v[20:21]
	s_mov_b32 s2, 0x6a214619
	s_mov_b32 s3, 0xbfaae5ce
	v_add_f64 v[6:7], v[10:11], -v[6:7]
	s_delay_alu instid0(VALU_DEP_3)
	v_fma_f64 v[10:11], v[8:9], v[12:13], s[2:3]
	s_mov_b32 s2, 0x3b39803f
	s_mov_b32 s3, 0x3c7abc9e
	s_delay_alu instid0(VALU_DEP_3) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[16:17], s[2:3], v[14:15]
	s_mov_b32 s2, 0x8427b883
	s_mov_b32 s3, 0x3fae1bb4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[2:3], v[2:3], v[6:7]
	v_fma_f64 v[6:7], v[8:9], v[10:11], s[2:3]
	s_mov_b32 s2, 0x8b207f05
	s_mov_b32 s3, 0xbfb110e4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[10:11], v[20:21], v[12:13]
	v_add_f64 v[14:15], v[18:19], v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[6:7], v[8:9], v[6:7], s[2:3]
	s_mov_b32 s2, 0x57b87036
	s_mov_b32 s3, 0x3fb3b136
	v_add_f64 v[20:21], v[10:11], -v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[16:17], v[10:11], v[14:15]
	v_add_f64 v[18:19], v[14:15], -v[18:19]
	v_fma_f64 v[6:7], v[8:9], v[6:7], s[2:3]
	s_mov_b32 s2, 0x19378e4f
	s_mov_b32 s3, 0xbfb745d1
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[12:13], v[12:13], -v[20:21]
	v_add_f64 v[22:23], v[16:17], -v[10:11]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[2:3], v[2:3], -v[18:19]
	v_fma_f64 v[6:7], v[8:9], v[6:7], s[2:3]
	s_mov_b32 s2, 0x17e1913c
	s_mov_b32 s3, 0x3fbc71c7
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[24:25], v[16:17], -v[22:23]
	v_add_f64 v[14:15], v[14:15], -v[22:23]
	v_add_f64 v[18:19], v[12:13], v[2:3]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f64 v[6:7], v[8:9], v[6:7], s[2:3]
	s_mov_b32 s2, 0x92376b7d
	s_mov_b32 s3, 0xbfc24924
	v_add_f64 v[10:11], v[10:11], -v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[6:7], v[8:9], v[6:7], s[2:3]
	s_mov_b32 s2, 0x999952cc
	s_mov_b32 s3, 0x3fc99999
	v_add_f64 v[10:11], v[14:15], v[10:11]
	v_add_f64 v[14:15], v[18:19], -v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[6:7], v[8:9], v[6:7], s[2:3]
	s_mov_b32 s2, 0x55555523
	s_mov_b32 s3, 0xbfd55555
	v_add_f64 v[10:11], v[18:19], v[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[18:19], v[18:19], -v[14:15]
	v_add_f64 v[2:3], v[2:3], -v[14:15]
	v_fma_f64 v[6:7], v[8:9], v[6:7], s[2:3]
	s_mov_b32 s2, 0x54442d18
	s_mov_b32 s3, 0x3ff921fb
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[20:21], v[16:17], v[10:11]
	v_mul_f64 v[6:7], v[8:9], v[6:7]
	v_add_f64 v[8:9], v[12:13], -v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[20:21], -v[16:17]
	v_fma_f64 v[4:5], v[4:5], v[6:7], v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[2:3], v[2:3], v[8:9]
	v_add_f64 v[6:7], v[10:11], -v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[8:9], -v[4:5], s[2:3]
	s_mov_b32 s3, 0x400921fb
	v_add_f64 v[2:3], v[2:3], v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v6, v5, v9, s1
	v_cndmask_b32_e64 v5, v4, v8, s1
	v_ashrrev_i32_e32 v9, 31, v77
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f64 v[7:8], -v[5:6], s[2:3]
	v_cmp_eq_f64_e64 s3, 0, v[72:73]
	v_cmp_gt_i32_e64 s2, 0, v77
                                        ; implicit-def: $vgpr76_vgpr77
	v_add_f64 v[2:3], v[20:21], v[2:3]
	v_mov_b32_e32 v4, 0x7f3321d2
	v_and_b32_e32 v11, 0x54442d18, v9
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v7, v5, v7, s2
	v_dual_cndmask_b32 v0, v2, v0 :: v_dual_cndmask_b32 v1, v3, v1
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v10, 0x54442d18, v4, s2
	v_cndmask_b32_e64 v2, v6, v8, s2
	v_cndmask_b32_e64 v3, v7, v11, s3
	s_and_b32 vcc_lo, s12, s13
	v_mul_f64 v[4:5], v[0:1], 0.5
	v_mov_b32_e32 v0, 0x4002d97c
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v6, v3, v10 :: v_dual_and_b32 v1, 0x400921fb, v9
	v_cndmask_b32_e64 v0, 0x3fe921fb, v0, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v1, v2, v1, s3
                                        ; implicit-def: $vgpr2_vgpr3
	v_bfi_b32 v0, 0x7fffffff, v0, v73
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e32 v7, v1, v0, vcc_lo
.LBB0_51:                               ; %Flow391
	s_and_not1_saveexec_b32 s3, s5
	s_cbranch_execz .LBB0_53
; %bb.52:
	v_max_f64 v[0:1], |v[72:73]|, |v[72:73]|
	v_max_f64 v[4:5], |v[76:77]|, |v[76:77]|
	s_mov_b32 s16, 0xbd3237f4
	s_mov_b32 s18, 0xb5e68a13
	s_mov_b32 s17, 0xbf23e260
	s_mov_b32 s19, 0x3eeba404
	v_cmp_eq_f64_e64 s2, 0, v[72:73]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_f64 v[0:1], v[4:5], v[0:1]
	v_div_scale_f64 v[4:5], null, v[82:83], v[82:83], v[0:1]
	v_div_scale_f64 v[10:11], vcc_lo, v[0:1], v[82:83], v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[6:7], v[4:5]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[8:9], -v[4:5], v[6:7], 1.0
	v_fma_f64 v[6:7], v[6:7], v[8:9], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], -v[4:5], v[6:7], 1.0
	v_fma_f64 v[6:7], v[6:7], v[8:9], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[8:9], v[10:11], v[6:7]
	v_fma_f64 v[4:5], -v[4:5], v[8:9], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[4:5], v[4:5], v[6:7], v[8:9]
	v_cmp_gt_i32_e32 vcc_lo, 0, v77
	v_ashrrev_i32_e32 v9, 31, v77
	v_and_b32_e32 v11, 0x54442d18, v9
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f64 v[0:1], v[4:5], v[82:83], v[0:1]
	v_mul_f64 v[4:5], v[0:1], v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[6:7], v[4:5], s[18:19], s[16:17]
	s_mov_b32 s16, 0x69efb384
	s_mov_b32 s17, 0x3f4b2bb0
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[6:7], v[4:5], v[6:7], s[16:17]
	s_mov_b32 s16, 0xaf56de9b
	s_mov_b32 s17, 0xbf67952d
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[6:7], v[4:5], v[6:7], s[16:17]
	s_mov_b32 s16, 0xa595c56f
	s_mov_b32 s17, 0x3f7d6d43
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[6:7], v[4:5], v[6:7], s[16:17]
	s_mov_b32 s16, 0xa57d9582
	s_mov_b32 s17, 0xbf8c6ea4
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[6:7], v[4:5], v[6:7], s[16:17]
	s_mov_b32 s16, 0x5f08b19f
	s_mov_b32 s17, 0x3f967e29
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[6:7], v[4:5], v[6:7], s[16:17]
	s_mov_b32 s16, 0xfc27006a
	s_mov_b32 s17, 0xbf9e9ae6
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[6:7], v[4:5], v[6:7], s[16:17]
	s_mov_b32 s16, 0x5711927a
	s_mov_b32 s17, 0x3fa2c15b
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[6:7], v[4:5], v[6:7], s[16:17]
	s_mov_b32 s16, 0xe82d3ff0
	s_mov_b32 s17, 0xbfa59976
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[6:7], v[4:5], v[6:7], s[16:17]
	s_mov_b32 s16, 0x6ef28734
	s_mov_b32 s17, 0x3fa82d5d
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[6:7], v[4:5], v[6:7], s[16:17]
	s_mov_b32 s16, 0x6a214619
	s_mov_b32 s17, 0xbfaae5ce
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[6:7], v[4:5], v[6:7], s[16:17]
	s_mov_b32 s16, 0x8427b883
	s_mov_b32 s17, 0x3fae1bb4
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[6:7], v[4:5], v[6:7], s[16:17]
	s_mov_b32 s16, 0x8b207f05
	s_mov_b32 s17, 0xbfb110e4
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[6:7], v[4:5], v[6:7], s[16:17]
	s_mov_b32 s16, 0x57b87036
	s_mov_b32 s17, 0x3fb3b136
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[6:7], v[4:5], v[6:7], s[16:17]
	s_mov_b32 s16, 0x19378e4f
	s_mov_b32 s17, 0xbfb745d1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[6:7], v[4:5], v[6:7], s[16:17]
	s_mov_b32 s16, 0x17e1913c
	s_mov_b32 s17, 0x3fbc71c7
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[6:7], v[4:5], v[6:7], s[16:17]
	s_mov_b32 s16, 0x92376b7d
	s_mov_b32 s17, 0xbfc24924
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[6:7], v[4:5], v[6:7], s[16:17]
	s_mov_b32 s16, 0x999952cc
	s_mov_b32 s17, 0x3fc99999
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[6:7], v[4:5], v[6:7], s[16:17]
	s_mov_b32 s16, 0x55555523
	s_mov_b32 s17, 0xbfd55555
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[6:7], v[4:5], v[6:7], s[16:17]
	s_mov_b32 s16, 0x54442d18
	s_mov_b32 s17, 0x3ff921fb
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[4:5], v[4:5], v[6:7]
	v_mul_f64 v[7:8], v[2:3], 0.5
	v_fma_f64 v[0:1], v[0:1], v[4:5], v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[4:5], -v[0:1], s[16:17]
	s_mov_b32 s17, 0x400921fb
	v_cndmask_b32_e64 v1, v1, v5, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v0, v0, v4, s1
	v_add_f64 v[5:6], -v[0:1], s[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v4, 0x7f3321d2 :: v_dual_cndmask_b32 v1, v1, v6
	v_cndmask_b32_e32 v10, 0x54442d18, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v0, v0, v5, vcc_lo
	v_mul_f64 v[4:5], v[2:3], v[7:8]
	v_mov_b32_e32 v2, 0x4002d97c
	v_cndmask_b32_e32 v2, 0x3fe921fb, v2, vcc_lo
	s_and_b32 vcc_lo, s12, s13
	v_and_b32_e32 v3, 0x400921fb, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_bfi_b32 v2, 0x7fffffff, v2, v73
	v_cndmask_b32_e64 v1, v1, v3, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v7, v1, v2, vcc_lo
	v_cndmask_b32_e64 v0, v0, v11, s2
	v_cndmask_b32_e32 v6, v0, v10, vcc_lo
.LBB0_53:                               ; %Flow392
	s_or_b32 exec_lo, exec_lo, s3
.LBB0_54:                               ; %Flow394
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s4
                                        ; implicit-def: $vgpr76_vgpr77
                                        ; implicit-def: $vgpr82_vgpr83
.LBB0_55:                               ; %Flow395
	s_and_not1_saveexec_b32 s3, s15
	s_cbranch_execz .LBB0_57
; %bb.56:
	s_mov_b32 s4, 0x8b145769
	s_mov_b32 s5, 0x4005bf0a
	s_mov_b32 s16, 0xbd3237f4
	v_div_scale_f64 v[0:1], null, s[4:5], s[4:5], v[76:77]
	v_div_scale_f64 v[2:3], null, s[4:5], s[4:5], v[72:73]
	v_div_scale_f64 v[12:13], vcc_lo, v[76:77], s[4:5], v[76:77]
	s_mov_b32 s18, 0xb5e68a13
	s_mov_b32 s17, 0xbf23e260
	s_mov_b32 s19, 0x3eeba404
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f64_e32 v[4:5], v[0:1]
	v_rcp_f64_e32 v[6:7], v[2:3]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[8:9], -v[0:1], v[4:5], 1.0
	v_fma_f64 v[10:11], -v[2:3], v[6:7], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[4:5], v[4:5], v[8:9], v[4:5]
	v_fma_f64 v[6:7], v[6:7], v[10:11], v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[8:9], -v[0:1], v[4:5], 1.0
	v_fma_f64 v[10:11], -v[2:3], v[6:7], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[4:5], v[4:5], v[8:9], v[4:5]
	v_div_scale_f64 v[8:9], s2, v[72:73], s[4:5], v[72:73]
	v_fma_f64 v[6:7], v[6:7], v[10:11], v[6:7]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[10:11], v[12:13], v[4:5]
	v_mul_f64 v[14:15], v[8:9], v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[0:1], -v[0:1], v[10:11], v[12:13]
	v_fma_f64 v[2:3], -v[2:3], v[14:15], v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fmas_f64 v[0:1], v[0:1], v[4:5], v[10:11]
	s_mov_b32 vcc_lo, s2
	v_div_fmas_f64 v[2:3], v[2:3], v[6:7], v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fixup_f64 v[0:1], v[0:1], s[4:5], v[76:77]
	v_div_fixup_f64 v[2:3], v[2:3], s[4:5], v[72:73]
	s_mov_b32 s5, 0x3fe55555
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_class_f64_e64 s2, v[0:1], 0x204
	v_max_f64 v[4:5], |v[0:1]|, |v[2:3]|
	v_cmp_class_f64_e64 s4, v[2:3], 0x204
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_frexp_exp_i32_f64_e32 v12, v[4:5]
	s_or_b32 s2, s2, s4
	s_mov_b32 s4, 0x55555555
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v6, 0, v12
	v_ldexp_f64 v[4:5], |v[2:3]|, v6
	v_ldexp_f64 v[6:7], |v[0:1]|, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[4:5], v[4:5], v[4:5]
	v_fma_f64 v[4:5], v[6:7], v[6:7], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[6:7], v[4:5]
	v_cmp_eq_f64_e32 vcc_lo, 0, v[4:5]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[8:9], v[4:5], v[6:7]
	v_mul_f64 v[6:7], v[6:7], 0.5
	v_fma_f64 v[10:11], -v[6:7], v[8:9], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[8:9], v[8:9], v[10:11], v[8:9]
	v_fma_f64 v[6:7], v[6:7], v[10:11], v[6:7]
	v_fma_f64 v[10:11], -v[8:9], v[8:9], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], v[10:11], v[6:7], v[8:9]
	v_dual_cndmask_b32 v5, v7, v5 :: v_dual_cndmask_b32 v4, v6, v4
	v_cmp_o_f64_e32 vcc_lo, v[0:1], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[4:5], v[4:5], v12
	v_max_f64 v[12:13], |v[76:77]|, |v[76:77]|
	v_cndmask_b32_e32 v1, 0x7ff80000, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v1, v1, 0x7ff00000, s2
	v_cndmask_b32_e32 v0, 0, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v0, v0, 0, s2
	v_frexp_mant_f64_e32 v[2:3], v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e64 s2, s[4:5], v[2:3]
	s_mov_b32 s4, 0x55555780
	v_cndmask_b32_e64 v4, 0, 1, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[2:3], v[2:3], v4
	v_add_f64 v[4:5], v[2:3], 1.0
	v_add_f64 v[10:11], v[2:3], -1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[6:7], v[4:5]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[8:9], -v[4:5], v[6:7], 1.0
	v_fma_f64 v[6:7], v[8:9], v[6:7], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], -v[4:5], v[6:7], 1.0
	v_fma_f64 v[6:7], v[8:9], v[6:7], v[6:7]
	v_max_f64 v[8:9], |v[72:73]|, |v[72:73]|
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[14:15], v[10:11], v[6:7]
	v_min_f64 v[8:9], v[12:13], v[8:9]
	v_add_f64 v[12:13], v[4:5], -1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[16:17], v[4:5], v[14:15]
	v_div_scale_f64 v[18:19], null, v[82:83], v[82:83], v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[2:3], v[2:3], -v[12:13]
	v_div_scale_f64 v[24:25], vcc_lo, v[8:9], v[82:83], v[8:9]
	v_fma_f64 v[4:5], v[14:15], v[4:5], -v[16:17]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[12:13], v[18:19]
	v_fma_f64 v[2:3], v[14:15], v[2:3], v[4:5]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[4:5], -v[18:19], v[12:13], 1.0
	v_add_f64 v[20:21], v[16:17], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[4:5], v[12:13], v[4:5], v[12:13]
	v_add_f64 v[12:13], v[10:11], -v[20:21]
	v_add_f64 v[16:17], v[20:21], -v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[22:23], -v[18:19], v[4:5], 1.0
	v_add_f64 v[10:11], v[10:11], -v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[2:3], v[16:17], -v[2:3]
	v_fma_f64 v[4:5], v[4:5], v[22:23], v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[10:11], v[10:11], -v[20:21]
	v_frexp_exp_i32_f64_e32 v20, v[0:1]
	v_mul_f64 v[16:17], v[24:25], v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[2:3], v[2:3], v[10:11]
	v_fma_f64 v[10:11], -v[18:19], v[16:17], v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[2:3], v[12:13], v[2:3]
	v_div_fmas_f64 v[4:5], v[10:11], v[4:5], v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[2:3], v[6:7], v[2:3]
	v_div_fixup_f64 v[4:5], v[4:5], v[82:83], v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[14:15], v[2:3]
	v_mul_f64 v[8:9], v[4:5], v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[10:11], v[6:7], v[6:7]
	v_fma_f64 v[12:13], v[8:9], s[18:19], s[16:17]
	s_mov_b32 s16, 0x6b47b09a
	s_mov_b32 s18, 0xbf559e2b
	s_mov_b32 s17, 0x3fc38538
	s_mov_b32 s19, 0x3fc3ab76
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[10:11], s[18:19], s[16:17]
	s_mov_b32 s16, 0x69efb384
	s_mov_b32 s17, 0x3f4b2bb0
	v_mul_f64 v[18:19], v[6:7], v[10:11]
	s_delay_alu instid0(VALU_DEP_3)
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[16:17]
	s_mov_b32 s16, 0xd7f4df2e
	s_mov_b32 s17, 0x3fc7474d
	s_delay_alu instid0(VALU_DEP_3) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[10:11], v[16:17], s[16:17]
	s_mov_b32 s16, 0xaf56de9b
	s_mov_b32 s17, 0xbf67952d
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[16:17]
	s_mov_b32 s16, 0x16291751
	s_mov_b32 s17, 0x3fcc71c0
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[10:11], v[16:17], s[16:17]
	s_mov_b32 s16, 0xa595c56f
	s_mov_b32 s17, 0x3f7d6d43
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[16:17]
	s_mov_b32 s16, 0x9b27acf1
	s_mov_b32 s17, 0x3fd24924
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[10:11], v[16:17], s[16:17]
	s_mov_b32 s16, 0xa57d9582
	s_mov_b32 s17, 0xbf8c6ea4
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[16:17]
	s_mov_b32 s16, 0x998ef7b6
	s_mov_b32 s17, 0x3fd99999
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[10:11], v[16:17], s[16:17]
	s_mov_b32 s16, 0x5f08b19f
	s_mov_b32 s17, 0x3f967e29
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[16:17]
	s_mov_b32 s16, 0x6ef28734
	s_mov_b32 s17, 0x3fa82d5d
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_fma_f64 v[10:11], v[10:11], v[16:17], s[4:5]
	s_mov_b32 s4, 0xfc27006a
	s_mov_b32 s5, 0xbf9e9ae6
	v_ldexp_f64 v[16:17], v[6:7], 1
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[4:5]
	s_mov_b32 s4, 0x5711927a
	s_mov_b32 s5, 0x3fa2c15b
	v_add_f64 v[6:7], v[6:7], -v[14:15]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_mul_f64 v[10:11], v[18:19], v[10:11]
	v_subrev_co_ci_u32_e64 v18, vcc_lo, 0, v20, s2
	v_cmp_class_f64_e64 vcc_lo, v[0:1], 0x204
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[4:5]
	s_mov_b32 s4, 0xe82d3ff0
	v_cvt_f64_i32_e32 v[18:19], v18
	s_mov_b32 s5, 0xbfa59976
	v_add_f64 v[2:3], v[2:3], -v[6:7]
	v_add_f64 v[14:15], v[16:17], v[10:11]
	s_delay_alu instid0(VALU_DEP_4)
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[4:5]
	s_mov_b32 s4, 0xfefa39ef
	s_mov_b32 s5, 0x3fe62e42
	s_delay_alu instid0(VALU_DEP_4) | instid1(SALU_CYCLE_1)
	v_mul_f64 v[20:21], v[18:19], s[4:5]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[2:3], v[2:3], 1
	v_add_f64 v[6:7], v[14:15], -v[16:17]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[16:17]
	v_fma_f64 v[16:17], v[18:19], s[4:5], -v[20:21]
	s_mov_b32 s4, 0x6a214619
	s_mov_b32 s5, 0xbfaae5ce
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[6:7], v[10:11], -v[6:7]
	v_fma_f64 v[10:11], v[8:9], v[12:13], s[4:5]
	s_mov_b32 s4, 0x3b39803f
	s_mov_b32 s5, 0x3c7abc9e
	s_delay_alu instid0(VALU_DEP_3) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[18:19], s[4:5], v[16:17]
	s_mov_b32 s4, 0x8427b883
	s_mov_b32 s5, 0x3fae1bb4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[2:3], v[2:3], v[6:7]
	v_fma_f64 v[6:7], v[8:9], v[10:11], s[4:5]
	s_mov_b32 s4, 0x8b207f05
	s_mov_b32 s5, 0xbfb110e4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[10:11], v[20:21], v[12:13]
	v_add_f64 v[16:17], v[14:15], v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[6:7], v[8:9], v[6:7], s[4:5]
	s_mov_b32 s4, 0x57b87036
	s_mov_b32 s5, 0x3fb3b136
	v_add_f64 v[20:21], v[10:11], -v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[18:19], v[10:11], v[16:17]
	v_add_f64 v[14:15], v[16:17], -v[14:15]
	v_fma_f64 v[6:7], v[8:9], v[6:7], s[4:5]
	s_mov_b32 s4, 0x19378e4f
	s_mov_b32 s5, 0xbfb745d1
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[12:13], v[12:13], -v[20:21]
	v_add_f64 v[22:23], v[18:19], -v[10:11]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[2:3], v[2:3], -v[14:15]
	v_fma_f64 v[6:7], v[8:9], v[6:7], s[4:5]
	s_mov_b32 s4, 0x17e1913c
	s_mov_b32 s5, 0x3fbc71c7
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[24:25], v[18:19], -v[22:23]
	v_add_f64 v[14:15], v[16:17], -v[22:23]
	v_add_f64 v[16:17], v[12:13], v[2:3]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f64 v[6:7], v[8:9], v[6:7], s[4:5]
	s_mov_b32 s4, 0x92376b7d
	s_mov_b32 s5, 0xbfc24924
	v_add_f64 v[10:11], v[10:11], -v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[6:7], v[8:9], v[6:7], s[4:5]
	s_mov_b32 s4, 0x999952cc
	s_mov_b32 s5, 0x3fc99999
	v_add_f64 v[10:11], v[14:15], v[10:11]
	v_add_f64 v[14:15], v[16:17], -v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[6:7], v[8:9], v[6:7], s[4:5]
	s_mov_b32 s4, 0x55555523
	s_mov_b32 s5, 0xbfd55555
	v_add_f64 v[10:11], v[16:17], v[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[16:17], v[16:17], -v[14:15]
	v_add_f64 v[2:3], v[2:3], -v[14:15]
	v_fma_f64 v[6:7], v[8:9], v[6:7], s[4:5]
	s_mov_b32 s4, 0x54442d18
	s_mov_b32 s5, 0x3ff921fb
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[20:21], v[18:19], v[10:11]
	v_mul_f64 v[6:7], v[8:9], v[6:7]
	v_add_f64 v[8:9], v[12:13], -v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[20:21], -v[18:19]
	v_fma_f64 v[4:5], v[4:5], v[6:7], v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[2:3], v[2:3], v[8:9]
	v_add_f64 v[6:7], v[10:11], -v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[8:9], -v[4:5], s[4:5]
	s_mov_b32 s5, 0x400921fb
	v_add_f64 v[2:3], v[2:3], v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v5, v5, v9, s1
	v_cndmask_b32_e64 v4, v4, v8, s1
	v_ashrrev_i32_e32 v9, 31, v77
	v_cmp_gt_i32_e64 s1, 0, v77
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[6:7], -v[4:5], s[4:5]
	v_and_b32_e32 v10, 0x54442d18, v9
	v_and_b32_e32 v9, 0x400921fb, v9
	v_add_f64 v[2:3], v[20:21], v[2:3]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v4, v4, v6, s1
	v_cndmask_b32_e64 v5, v5, v7, s1
	v_mov_b32_e32 v6, 0x4002d97c
	v_cndmask_b32_e64 v6, 0x3fe921fb, v6, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_bfi_b32 v6, 0x7fffffff, v6, v73
	v_dual_cndmask_b32 v3, v3, v1 :: v_dual_cndmask_b32 v2, v2, v0
	v_cmp_eq_f64_e32 vcc_lo, 0, v[72:73]
	v_add_f64 v[2:3], v[2:3], 1.0
	v_cndmask_b32_e32 v10, v4, v10, vcc_lo
	v_cndmask_b32_e32 v4, v5, v9, vcc_lo
	v_cmp_ngt_f64_e32 vcc_lo, 0, v[0:1]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v3, 0x7ff80000, v3, vcc_lo
	s_and_b32 vcc_lo, s12, s13
	v_dual_mov_b32 v8, 0x7f3321d2 :: v_dual_cndmask_b32 v7, v4, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v8, 0x54442d18, v8, s1
	v_cmp_nge_f64_e64 s1, 0, v[0:1]
	v_cndmask_b32_e32 v6, v10, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v4, 0, v2, s1
	v_cmp_neq_f64_e64 s1, 0, v[0:1]
	v_cndmask_b32_e64 v5, 0xfff00000, v3, s1
.LBB0_57:                               ; %Flow396
	s_or_b32 exec_lo, exec_lo, s3
                                        ; implicit-def: $vgpr76_vgpr77
.LBB0_58:                               ; %Flow398
	s_and_not1_saveexec_b32 s1, s14
	s_cbranch_execz .LBB0_64
; %bb.59:
	v_cmp_ngt_f64_e64 s2, 0x20000000, |v[76:77]|
	v_cmp_ngt_f64_e64 s3, 0x20000000, |v[72:73]|
                                        ; implicit-def: $vgpr0_vgpr1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s2, s2, s3
	s_and_saveexec_b32 s3, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s2, exec_lo, s3
; %bb.60:                               ; %._crit_edge.i.i.i.i
	v_mul_f64 v[0:1], v[72:73], v[72:73]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[0:1], v[76:77], v[76:77], v[0:1]
                                        ; implicit-def: $vgpr76_vgpr77
; %bb.61:                               ; %Flow397
	s_and_not1_saveexec_b32 s2, s2
; %bb.62:
	v_mul_f64 v[0:1], v[72:73], 4.0
	v_mul_f64 v[2:3], v[76:77], 4.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[0:1], v[0:1], v[0:1]
	v_fma_f64 v[0:1], v[2:3], v[2:3], v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_ldexp_f64 v[0:1], v[0:1], -4
; %bb.63:                               ; %_ZN6thrust4normIdEET_RKNS_7complexIS1_EE.exit.i.i.i
	s_or_b32 exec_lo, exec_lo, s2
	s_delay_alu instid0(VALU_DEP_1)
	v_frexp_mant_f64_e32 v[2:3], v[0:1]
	s_mov_b32 s3, 0x3fe55555
	s_mov_b32 s2, 0x55555555
	s_mov_b32 s4, 0x6b47b09a
	s_mov_b32 s12, 0xbf559e2b
	s_mov_b32 s5, 0x3fc38538
	s_mov_b32 s13, 0x3fc3ab76
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, s[2:3], v[2:3]
	s_mov_b32 s2, 0x55555780
	v_cndmask_b32_e64 v4, 0, 1, vcc_lo
	v_ldexp_f64 v[2:3], v[2:3], v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[4:5], v[2:3], 1.0
	v_add_f64 v[10:11], v[2:3], -1.0
	v_rcp_f64_e32 v[6:7], v[4:5]
	v_add_f64 v[12:13], v[4:5], -1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], v[2:3], -v[12:13]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[8:9], -v[4:5], v[6:7], 1.0
	v_fma_f64 v[6:7], v[8:9], v[6:7], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], -v[4:5], v[6:7], 1.0
	v_fma_f64 v[6:7], v[8:9], v[6:7], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[8:9], v[10:11], v[6:7]
	v_mul_f64 v[14:15], v[4:5], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], v[8:9], v[4:5], -v[14:15]
	v_fma_f64 v[2:3], v[8:9], v[2:3], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[4:5], v[14:15], v[2:3]
	v_add_f64 v[12:13], v[10:11], -v[4:5]
	v_add_f64 v[14:15], v[4:5], -v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[10:11], -v[12:13]
	v_add_f64 v[2:3], v[14:15], -v[2:3]
	v_frexp_exp_i32_f64_e32 v14, v[0:1]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[4:5], v[10:11], -v[4:5]
	v_add_f64 v[2:3], v[2:3], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], v[12:13], v[2:3]
	v_mul_f64 v[2:3], v[6:7], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[4:5], v[8:9], v[2:3]
	v_mul_f64 v[6:7], v[4:5], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_fma_f64 v[10:11], v[6:7], s[12:13], s[4:5]
	s_mov_b32 s4, 0xd7f4df2e
	s_mov_b32 s5, 0x3fc7474d
	v_mul_f64 v[12:13], v[4:5], v[6:7]
	v_fma_f64 v[10:11], v[6:7], v[10:11], s[4:5]
	s_mov_b32 s4, 0x16291751
	s_mov_b32 s5, 0x3fcc71c0
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[10:11], v[6:7], v[10:11], s[4:5]
	s_mov_b32 s4, 0x9b27acf1
	s_mov_b32 s5, 0x3fd24924
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[10:11], v[6:7], v[10:11], s[4:5]
	s_mov_b32 s4, 0x998ef7b6
	s_mov_b32 s5, 0x3fd99999
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[10:11], v[6:7], v[10:11], s[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_fma_f64 v[6:7], v[6:7], v[10:11], s[2:3]
	v_ldexp_f64 v[10:11], v[4:5], 1
	v_add_f64 v[4:5], v[4:5], -v[8:9]
	s_mov_b32 s2, 0xfefa39ef
	s_mov_b32 s3, 0x3fe62e42
	v_mul_f64 v[6:7], v[12:13], v[6:7]
	v_subrev_co_ci_u32_e32 v12, vcc_lo, 0, v14, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[2:3], v[2:3], -v[4:5]
	v_cmp_class_f64_e64 vcc_lo, v[0:1], 0x204
	v_cvt_f64_i32_e32 v[12:13], v12
	v_add_f64 v[8:9], v[10:11], v[6:7]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[2:3], v[2:3], 1
	v_mul_f64 v[14:15], v[12:13], s[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[4:5], v[8:9], -v[10:11]
	v_fma_f64 v[10:11], v[12:13], s[2:3], -v[14:15]
	s_mov_b32 s2, 0x3b39803f
	s_mov_b32 s3, 0x3c7abc9e
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[4:5], v[6:7], -v[4:5]
	v_fma_f64 v[6:7], v[12:13], s[2:3], v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[2:3], v[2:3], v[4:5]
	v_add_f64 v[4:5], v[14:15], v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[8:9], v[2:3]
	v_add_f64 v[14:15], v[4:5], -v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[4:5], v[10:11]
	v_add_f64 v[8:9], v[10:11], -v[8:9]
	v_add_f64 v[6:7], v[6:7], -v[14:15]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[16:17], v[12:13], -v[4:5]
	v_add_f64 v[2:3], v[2:3], -v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[18:19], v[12:13], -v[16:17]
	v_add_f64 v[8:9], v[10:11], -v[16:17]
	v_add_f64 v[10:11], v[6:7], v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[4:5], v[4:5], -v[18:19]
	v_add_f64 v[4:5], v[8:9], v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[8:9], v[10:11], -v[6:7]
	v_add_f64 v[4:5], v[10:11], v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[10:11], v[10:11], -v[8:9]
	v_add_f64 v[2:3], v[2:3], -v[8:9]
	v_add_f64 v[14:15], v[12:13], v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[6:7], -v[10:11]
	v_add_f64 v[8:9], v[14:15], -v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[2:3], v[2:3], v[6:7]
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v7, 0x7ff80000
	v_add_f64 v[4:5], v[4:5], -v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], v[2:3], v[4:5]
	v_add_f64 v[2:3], v[14:15], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v2, v2, v0 :: v_dual_cndmask_b32 v3, v3, v1
	v_cmp_ngt_f64_e32 vcc_lo, 0, v[0:1]
	v_cndmask_b32_e32 v3, 0x7ff80000, v3, vcc_lo
	v_cmp_nge_f64_e32 vcc_lo, 0, v[0:1]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v4, 0, v2, vcc_lo
	v_cmp_neq_f64_e32 vcc_lo, 0, v[0:1]
	v_cndmask_b32_e32 v5, 0xfff00000, v3, vcc_lo
.LBB0_64:                               ; %Flow399
	s_or_b32 exec_lo, exec_lo, s1
	v_bfi_b32 v7, 0x7fffffff, v7, v73
	s_mov_b32 s2, 0x55555555
	s_mov_b32 s3, 0x3fd55555
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[2:3], v[4:5], s[2:3]
	v_mul_f64 v[0:1], v[6:7], s[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_and_b32_e32 v18, 0x7fffffff, v1
	v_or_b32_e32 v4, v18, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ne_u32_e32 vcc_lo, 0, v4
                                        ; implicit-def: $vgpr4_vgpr5
	s_and_saveexec_b32 s1, vcc_lo
	s_xor_b32 s5, exec_lo, s1
	s_cbranch_execz .LBB0_106
; %bb.65:
	v_and_b32_e32 v6, 0x7fffffff, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or_b32_e32 v4, v6, v2
	v_cmp_ne_u32_e32 vcc_lo, 0, v4
                                        ; implicit-def: $vgpr4_vgpr5
	s_and_saveexec_b32 s1, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s12, exec_lo, s1
	s_cbranch_execz .LBB0_95
; %bb.66:
                                        ; implicit-def: $vgpr4_vgpr5
	s_mov_b32 s1, exec_lo
	v_cmpx_gt_u32_e32 0x7ff00000, v18
	s_xor_b32 s13, exec_lo, s1
	s_cbranch_execz .LBB0_88
; %bb.67:
	v_add_nc_u32_e32 v4, 0xbf79d1be, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_lt_u32_e32 vcc_lo, 0x108aa2, v4
                                        ; implicit-def: $vgpr4_vgpr5
	s_and_saveexec_b32 s1, vcc_lo
	s_xor_b32 s14, exec_lo, s1
	s_cbranch_execz .LBB0_77
; %bb.68:
	v_cmp_ngt_f64_e64 s2, 0x41d00000, |v[0:1]|
                                        ; implicit-def: $vgpr12
                                        ; implicit-def: $vgpr4_vgpr5
                                        ; implicit-def: $vgpr6_vgpr7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s1, s2
	s_xor_b32 s3, exec_lo, s1
	s_cbranch_execz .LBB0_70
; %bb.69:
	v_ldexp_f64 v[4:5], |v[0:1]|, 0xffffff80
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[0:1]|
	v_trig_preop_f64 v[6:7], |v[0:1]|, 0
	v_trig_preop_f64 v[8:9], |v[0:1]|, 1
	v_trig_preop_f64 v[19:20], |v[0:1]|, 2
	v_mov_b32_e32 v27, 0
	s_mov_b32 s16, 0x54442d18
	s_mov_b32 s17, 0x3ff921fb
	s_mov_b32 s18, 0x33145c07
	s_mov_b32 s19, 0x3c91a626
	v_dual_cndmask_b32 v5, v18, v5 :: v_dual_cndmask_b32 v4, v0, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[10:11], v[6:7], v[4:5]
	v_mul_f64 v[12:13], v[8:9], v[4:5]
	v_mul_f64 v[25:26], v[19:20], v[4:5]
	v_fma_f64 v[6:7], v[6:7], v[4:5], -v[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[8:9], v[8:9], v[4:5], -v[12:13]
	v_fma_f64 v[4:5], v[19:20], v[4:5], -v[25:26]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[14:15], v[12:13], v[6:7]
	v_add_f64 v[16:17], v[14:15], -v[12:13]
	v_add_f64 v[23:24], v[10:11], v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[21:22], v[14:15], -v[16:17]
	v_add_f64 v[6:7], v[6:7], -v[16:17]
	v_ldexp_f64 v[16:17], v[23:24], -2
	v_add_f64 v[10:11], v[23:24], -v[10:11]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[12:13], v[12:13], -v[21:22]
	v_add_f64 v[21:22], v[25:26], v[8:9]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[16:17]|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[10:11], v[14:15], -v[10:11]
	v_add_f64 v[6:7], v[6:7], v[12:13]
	v_fract_f64_e32 v[12:13], v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[14:15], v[21:22], v[6:7]
	v_dual_cndmask_b32 v13, 0, v13 :: v_dual_cndmask_b32 v12, 0, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[12:13], v[12:13], 2
	v_add_f64 v[16:17], v[10:11], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[23:24], v[16:17], v[12:13]
	v_add_f64 v[10:11], v[16:17], -v[10:11]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[23:24]
	v_add_f64 v[23:24], v[21:22], -v[25:26]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[10:11], v[14:15], -v[10:11]
	v_cndmask_b32_e64 v28, 0, 0x40100000, vcc_lo
	v_add_f64 v[32:33], v[21:22], -v[23:24]
	v_add_f64 v[8:9], v[8:9], -v[23:24]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[12:13], v[12:13], v[27:28]
	v_add_f64 v[28:29], v[14:15], -v[21:22]
	v_add_f64 v[23:24], v[25:26], -v[32:33]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[30:31], v[16:17], v[12:13]
	v_add_f64 v[34:35], v[14:15], -v[28:29]
	v_add_f64 v[6:7], v[6:7], -v[28:29]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[8:9], v[8:9], v[23:24]
	v_cvt_i32_f64_e32 v30, v[30:31]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[21:22], v[21:22], -v[34:35]
	v_cvt_f64_i32_e32 v[28:29], v30
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[6:7], v[21:22]
	v_add_f64 v[12:13], v[12:13], -v[28:29]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[8:9], v[6:7]
	v_add_f64 v[8:9], v[16:17], v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[4:5], v[4:5], v[6:7]
	v_add_f64 v[6:7], v[8:9], -v[12:13]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[4:5], v[10:11], v[4:5]
	v_add_f64 v[6:7], v[16:17], -v[6:7]
	v_cndmask_b32_e64 v28, 0, 0x3ff00000, vcc_lo
	v_add_co_ci_u32_e64 v12, s1, 0, v30, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[4:5], v[4:5], v[6:7]
	v_add_f64 v[6:7], v[8:9], -v[27:28]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[6:7], v[4:5]
	v_mul_f64 v[10:11], v[8:9], s[16:17]
	v_add_f64 v[6:7], v[8:9], -v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[13:14], v[8:9], s[16:17], -v[10:11]
	v_add_f64 v[4:5], v[4:5], -v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], v[8:9], s[18:19], v[13:14]
	v_fma_f64 v[6:7], v[4:5], s[16:17], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[4:5], v[10:11], v[6:7]
	v_add_f64 v[8:9], v[4:5], -v[10:11]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[6:7], v[6:7], -v[8:9]
.LBB0_70:                               ; %Flow370
	s_and_not1_saveexec_b32 s1, s3
	s_cbranch_execz .LBB0_72
; %bb.71:
	s_mov_b32 s16, 0x6dc9c883
	s_mov_b32 s17, 0x3fe45f30
	s_mov_b32 s19, 0xbc91a626
	v_mul_f64 v[4:5], |v[0:1]|, s[16:17]
	s_mov_b32 s16, 0x54442d18
	s_mov_b32 s17, 0xbff921fb
	s_mov_b32 s18, 0x33145c00
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[8:9], v[4:5]
	v_fma_f64 v[4:5], v[8:9], s[16:17], |v[0:1]|
	v_mul_f64 v[6:7], v[8:9], s[18:19]
	s_mov_b32 s16, 0x252049c0
	s_mov_b32 s17, 0xb97b839a
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[12:13], v[8:9], s[18:19], v[4:5]
	v_add_f64 v[10:11], v[4:5], v[6:7]
	s_mov_b32 s19, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[4:5], v[4:5], -v[10:11]
	v_add_f64 v[10:11], v[10:11], -v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[4:5], v[4:5], v[6:7]
	v_fma_f64 v[6:7], v[8:9], s[18:19], v[6:7]
	v_add_f64 v[4:5], v[10:11], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[4:5], v[4:5], -v[6:7]
	v_fma_f64 v[6:7], v[8:9], s[16:17], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[4:5], v[12:13], v[6:7]
	v_add_f64 v[10:11], v[4:5], -v[12:13]
	v_cvt_i32_f64_e32 v12, v[8:9]
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f64 v[6:7], v[6:7], -v[10:11]
.LBB0_72:                               ; %_ZL3cosd.exit17.i.i.i
	s_or_b32 exec_lo, exec_lo, s1
                                        ; implicit-def: $vgpr13
                                        ; implicit-def: $vgpr8_vgpr9
                                        ; implicit-def: $vgpr10_vgpr11
	s_and_saveexec_b32 s1, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s2, exec_lo, s1
	s_cbranch_execz .LBB0_74
; %bb.73:
	v_ldexp_f64 v[8:9], |v[0:1]|, 0xffffff80
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[0:1]|
	v_trig_preop_f64 v[10:11], |v[0:1]|, 0
	v_trig_preop_f64 v[13:14], |v[0:1]|, 1
	v_trig_preop_f64 v[23:24], |v[0:1]|, 2
	v_mov_b32_e32 v31, 0
	s_mov_b32 s16, 0x54442d18
	s_mov_b32 s17, 0x3ff921fb
	s_mov_b32 s18, 0x33145c07
	s_mov_b32 s19, 0x3c91a626
	v_dual_cndmask_b32 v9, v18, v9 :: v_dual_cndmask_b32 v8, v0, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[15:16], v[10:11], v[8:9]
	v_mul_f64 v[17:18], v[13:14], v[8:9]
	v_mul_f64 v[29:30], v[23:24], v[8:9]
	v_fma_f64 v[10:11], v[10:11], v[8:9], -v[15:16]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[13:14], v[13:14], v[8:9], -v[17:18]
	v_fma_f64 v[8:9], v[23:24], v[8:9], -v[29:30]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[19:20], v[17:18], v[10:11]
	v_add_f64 v[21:22], v[19:20], -v[17:18]
	v_add_f64 v[27:28], v[15:16], v[19:20]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[25:26], v[19:20], -v[21:22]
	v_add_f64 v[10:11], v[10:11], -v[21:22]
	v_ldexp_f64 v[21:22], v[27:28], -2
	v_add_f64 v[15:16], v[27:28], -v[15:16]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[17:18], v[17:18], -v[25:26]
	v_add_f64 v[25:26], v[29:30], v[13:14]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[21:22]|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[15:16], v[19:20], -v[15:16]
	v_add_f64 v[10:11], v[10:11], v[17:18]
	v_fract_f64_e32 v[17:18], v[21:22]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[19:20], v[25:26], v[10:11]
	v_dual_cndmask_b32 v18, 0, v18 :: v_dual_cndmask_b32 v17, 0, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[17:18], v[17:18], 2
	v_add_f64 v[21:22], v[15:16], v[19:20]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[27:28], v[21:22], v[17:18]
	v_add_f64 v[15:16], v[21:22], -v[15:16]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[27:28]
	v_add_f64 v[27:28], v[25:26], -v[29:30]
	v_cndmask_b32_e64 v32, 0, 0x40100000, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[36:37], v[25:26], -v[27:28]
	v_add_f64 v[13:14], v[13:14], -v[27:28]
	v_add_f64 v[17:18], v[17:18], v[31:32]
	v_add_f64 v[32:33], v[19:20], -v[25:26]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[27:28], v[29:30], -v[36:37]
	v_add_f64 v[34:35], v[21:22], v[17:18]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[38:39], v[19:20], -v[32:33]
	v_add_f64 v[10:11], v[10:11], -v[32:33]
	v_add_f64 v[13:14], v[13:14], v[27:28]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cvt_i32_f64_e32 v34, v[34:35]
	v_add_f64 v[25:26], v[25:26], -v[38:39]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[32:33], v34
	v_add_f64 v[10:11], v[10:11], v[25:26]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[17:18], v[17:18], -v[32:33]
	v_add_f64 v[10:11], v[13:14], v[10:11]
	v_add_f64 v[13:14], v[19:20], -v[15:16]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[23:24], v[21:22], v[17:18]
	v_add_f64 v[8:9], v[8:9], v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[10:11], v[23:24], -v[17:18]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[23:24]
	v_add_f64 v[8:9], v[13:14], v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_f64 v[10:11], v[21:22], -v[10:11]
	v_cndmask_b32_e64 v32, 0, 0x3ff00000, vcc_lo
	v_add_co_ci_u32_e64 v13, s1, 0, v34, vcc_lo
	v_add_f64 v[8:9], v[8:9], v[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[10:11], v[23:24], -v[31:32]
	v_add_f64 v[14:15], v[10:11], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[16:17], v[14:15], s[16:17]
	v_add_f64 v[10:11], v[14:15], -v[10:11]
	v_fma_f64 v[18:19], v[14:15], s[16:17], -v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[8:9], v[8:9], -v[10:11]
	v_fma_f64 v[10:11], v[14:15], s[18:19], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[10:11], v[8:9], s[16:17], v[10:11]
	v_add_f64 v[8:9], v[16:17], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[14:15], v[8:9], -v[16:17]
	v_add_f64 v[10:11], v[10:11], -v[14:15]
.LBB0_74:                               ; %Flow
	s_and_not1_saveexec_b32 s1, s2
	s_cbranch_execz .LBB0_76
; %bb.75:
	s_mov_b32 s2, 0x6dc9c883
	s_mov_b32 s3, 0x3fe45f30
	s_mov_b32 s17, 0xbc91a626
	v_mul_f64 v[8:9], |v[0:1]|, s[2:3]
	s_mov_b32 s2, 0x54442d18
	s_mov_b32 s3, 0xbff921fb
	s_mov_b32 s16, 0x33145c00
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[13:14], v[8:9]
	v_fma_f64 v[8:9], v[13:14], s[2:3], |v[0:1]|
	v_mul_f64 v[10:11], v[13:14], s[16:17]
	s_mov_b32 s2, 0x252049c0
	s_mov_b32 s3, 0xb97b839a
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[17:18], v[13:14], s[16:17], v[8:9]
	v_add_f64 v[15:16], v[8:9], v[10:11]
	s_mov_b32 s17, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[8:9], v[8:9], -v[15:16]
	v_add_f64 v[15:16], v[15:16], -v[17:18]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[8:9], v[8:9], v[10:11]
	v_fma_f64 v[10:11], v[13:14], s[16:17], v[10:11]
	v_add_f64 v[8:9], v[15:16], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[8:9], -v[10:11]
	v_fma_f64 v[10:11], v[13:14], s[2:3], v[8:9]
	v_cvt_i32_f64_e32 v13, v[13:14]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[17:18], v[10:11]
	v_add_f64 v[15:16], v[8:9], -v[17:18]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[10:11], v[10:11], -v[15:16]
.LBB0_76:                               ; %_ZL3sind.exit22.i.i.i
	s_or_b32 exec_lo, exec_lo, s1
	s_mov_b32 s2, 0x652b82fe
	s_mov_b32 s3, 0x3ff71547
	s_mov_b32 s16, 0x6a5dcb37
	v_mul_f64 v[14:15], v[2:3], s[2:3]
	s_mov_b32 s2, 0xfefa39ef
	s_mov_b32 s3, 0xbfe62e42
	s_mov_b32 s17, 0x3e5ade15
	v_mul_f64 v[20:21], v[4:5], v[4:5]
	v_mul_f64 v[22:23], v[8:9], v[8:9]
	s_mov_b32 s18, 0x1852b7b0
	s_mov_b32 s19, 0x3f56c16c
	s_mov_b32 s21, 0x3f811111
	s_mov_b32 s20, 0x11122322
	s_mov_b32 s22, 0x19f4ec90
	s_mov_b32 s23, 0x3efa01a0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_mul_f64 v[40:41], v[6:7], 0.5
	v_mul_f64 v[46:47], v[10:11], 0.5
	v_cmp_class_f64_e64 s1, v[0:1], 0x1f8
	v_lshlrev_b32_e32 v0, 30, v13
	v_xor_b32_e32 v0, v0, v1
	v_rndne_f64_e32 v[14:15], v[14:15]
	v_mul_f64 v[28:29], v[20:21], 0.5
	v_mul_f64 v[32:33], v[22:23], 0.5
	v_mul_f64 v[42:43], v[4:5], -v[20:21]
	v_mul_f64 v[48:49], v[8:9], -v[22:23]
	v_fma_f64 v[16:17], v[14:15], s[2:3], v[2:3]
	s_mov_b32 s2, 0x3b39803f
	s_mov_b32 s3, 0xbc7abc9e
	v_add_f64 v[36:37], -v[28:29], 1.0
	v_add_f64 v[38:39], -v[32:33], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[16:17], v[14:15], s[2:3], v[16:17]
	s_mov_b32 s2, 0xfca7ab0c
	s_mov_b32 s3, 0x3e928af3
	v_add_f64 v[44:45], -v[36:37], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[50:51], -v[38:39], 1.0
	v_fma_f64 v[18:19], v[16:17], s[16:17], s[2:3]
	s_mov_b32 s2, 0x623fde64
	s_mov_b32 s3, 0x3ec71dee
	s_mov_b32 s16, 0xf9a43bb8
	s_mov_b32 s17, 0x3de5e0b2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[28:29], v[44:45], -v[28:29]
	v_add_f64 v[32:33], v[50:51], -v[32:33]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[2:3]
	s_mov_b32 s2, 0x7c89e6b0
	s_mov_b32 s3, 0x3efa0199
	v_fma_f64 v[28:29], v[4:5], -v[6:7], v[28:29]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[2:3]
	s_mov_b32 s2, 0x14761f6e
	s_mov_b32 s3, 0x3f2a01a0
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[2:3]
	s_mov_b32 s2, 0xb42fdfa7
	s_mov_b32 s3, 0xbe5ae600
	s_delay_alu instid0(SALU_CYCLE_1)
	v_fma_f64 v[24:25], v[20:21], s[16:17], s[2:3]
	v_fma_f64 v[26:27], v[22:23], s[16:17], s[2:3]
	s_mov_b32 s2, 0x46cc5e42
	s_mov_b32 s16, 0x796cde01
	s_mov_b32 s3, 0xbda907db
	s_mov_b32 s17, 0x3ec71de3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[18:19]
	s_mov_b32 s18, 0x9037ab78
	s_mov_b32 s19, 0x3e21eeb6
	v_fma_f64 v[30:31], v[20:21], s[2:3], s[18:19]
	s_delay_alu instid0(VALU_DEP_4)
	v_fma_f64 v[24:25], v[20:21], v[24:25], s[16:17]
	v_fma_f64 v[34:35], v[22:23], s[2:3], s[18:19]
	v_fma_f64 v[26:27], v[22:23], v[26:27], s[16:17]
	s_mov_b32 s2, 0xa17f65f6
	s_mov_b32 s16, 0x19e83e5c
	s_mov_b32 s3, 0xbe927e4f
	s_mov_b32 s17, 0xbf2a01a0
	s_mov_b32 s19, 0x3fa55555
	s_mov_b32 s18, 0x555502a1
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[20:21]
	s_mov_b32 s20, 0x11110bb3
	v_fma_f64 v[30:31], v[20:21], v[30:31], s[2:3]
	v_fma_f64 v[24:25], v[20:21], v[24:25], s[16:17]
	v_fma_f64 v[34:35], v[22:23], v[34:35], s[2:3]
	v_fma_f64 v[26:27], v[22:23], v[26:27], s[16:17]
	s_mov_b32 s2, 0x55555511
	s_mov_b32 s3, 0x3fc55555
	s_mov_b32 s16, 11
	s_mov_b32 s17, 0x3fe00000
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[18:19]
	s_mov_b32 s18, 0x55555555
	v_fma_f64 v[30:31], v[20:21], v[30:31], s[22:23]
	v_fma_f64 v[24:25], v[20:21], v[24:25], s[20:21]
	v_fma_f64 v[34:35], v[22:23], v[34:35], s[22:23]
	v_fma_f64 v[26:27], v[22:23], v[26:27], s[20:21]
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[2:3]
	s_mov_b32 s2, 0x16c16967
	s_mov_b32 s3, 0xbf56c16c
	s_delay_alu instid0(SALU_CYCLE_1)
	v_fma_f64 v[30:31], v[20:21], v[30:31], s[2:3]
	v_fma_f64 v[24:25], v[42:43], v[24:25], v[40:41]
	v_fma_f64 v[34:35], v[22:23], v[34:35], s[2:3]
	v_fma_f64 v[26:27], v[48:49], v[26:27], v[46:47]
	v_mul_f64 v[40:41], v[20:21], v[20:21]
	v_cmp_nlt_f64_e64 s2, 0x40900000, v[2:3]
	v_cmp_ngt_f64_e64 s3, 0xc090cc00, v[2:3]
	v_lshlrev_b32_e32 v2, 30, v12
	v_and_b32_e32 v3, 1, v13
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_eq_u32_e64 s4, 0, v3
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[16:17]
	v_fma_f64 v[30:31], v[20:21], v[30:31], s[18:19]
	v_fma_f64 v[6:7], v[20:21], v[24:25], -v[6:7]
	v_mul_f64 v[20:21], v[22:23], v[22:23]
	v_fma_f64 v[24:25], v[8:9], -v[10:11], v[32:33]
	v_fma_f64 v[32:33], v[22:23], v[34:35], s[18:19]
	v_fma_f64 v[10:11], v[22:23], v[26:27], -v[10:11]
	s_mov_b32 s19, 0xbfc55555
	v_cvt_i32_f64_e32 v26, v[14:15]
	v_fma_f64 v[18:19], v[16:17], v[18:19], 1.0
	v_fma_f64 v[22:23], v[40:41], v[30:31], v[28:29]
	v_fma_f64 v[6:7], v[42:43], s[18:19], v[6:7]
	v_fma_f64 v[10:11], v[48:49], s[18:19], v[10:11]
	s_delay_alu instid0(VALU_DEP_4)
	v_fma_f64 v[14:15], v[16:17], v[18:19], 1.0
	v_fma_f64 v[16:17], v[20:21], v[32:33], v[24:25]
	v_add_f64 v[18:19], v[36:37], v[22:23]
	v_add_f64 v[4:5], v[4:5], -v[6:7]
	v_add_f64 v[8:9], v[8:9], -v[10:11]
	v_and_b32_e32 v10, 1, v12
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v10
	v_ldexp_f64 v[6:7], v[14:15], v26
	v_add_f64 v[14:15], v[38:39], v[16:17]
	v_cndmask_b32_e32 v4, v4, v18, vcc_lo
	v_xor_b32_e32 v5, 0x80000000, v5
	v_and_b32_e32 v1, 0x80000000, v2
                                        ; implicit-def: $vgpr18
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v2, v5, v19, vcc_lo
	s_and_b32 vcc_lo, s3, s2
	v_and_b32_e32 v3, 0x80000000, v0
	v_cndmask_b32_e64 v0, 0, v4, s1
	v_xor_b32_e32 v1, v2, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v1, 0x7ff80000, v1, s1
	v_cndmask_b32_e32 v6, 0, v6, vcc_lo
	v_cndmask_b32_e64 v5, v14, v8, s4
	v_cndmask_b32_e64 v8, v15, v9, s4
	v_cndmask_b32_e64 v7, 0x7ff00000, v7, s2
	v_cndmask_b32_e64 v2, 0, v5, s1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v3, v8, v3
	v_cndmask_b32_e64 v7, 0, v7, s3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v3, 0x7ff80000, v3, s1
	v_mul_f64 v[4:5], v[6:7], v[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_mul_f64 v[0:1], v[6:7], v[2:3]
                                        ; implicit-def: $vgpr2_vgpr3
.LBB0_77:                               ; %Flow373
	s_and_not1_saveexec_b32 s14, s14
	s_cbranch_execz .LBB0_87
; %bb.78:
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ngt_f64_e64 s2, 0x41d00000, |v[0:1]|
                                        ; implicit-def: $vgpr12
                                        ; implicit-def: $vgpr4_vgpr5
                                        ; implicit-def: $vgpr6_vgpr7
	s_and_saveexec_b32 s1, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s3, exec_lo, s1
	s_cbranch_execz .LBB0_80
; %bb.79:
	v_ldexp_f64 v[4:5], |v[0:1]|, 0xffffff80
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[0:1]|
	v_trig_preop_f64 v[6:7], |v[0:1]|, 0
	v_trig_preop_f64 v[8:9], |v[0:1]|, 1
	v_trig_preop_f64 v[19:20], |v[0:1]|, 2
	v_mov_b32_e32 v27, 0
	s_mov_b32 s16, 0x54442d18
	s_mov_b32 s17, 0x3ff921fb
	s_mov_b32 s18, 0x33145c07
	s_mov_b32 s19, 0x3c91a626
	v_dual_cndmask_b32 v5, v18, v5 :: v_dual_cndmask_b32 v4, v0, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[10:11], v[6:7], v[4:5]
	v_mul_f64 v[12:13], v[8:9], v[4:5]
	v_mul_f64 v[25:26], v[19:20], v[4:5]
	v_fma_f64 v[6:7], v[6:7], v[4:5], -v[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[8:9], v[8:9], v[4:5], -v[12:13]
	v_fma_f64 v[4:5], v[19:20], v[4:5], -v[25:26]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[14:15], v[12:13], v[6:7]
	v_add_f64 v[16:17], v[14:15], -v[12:13]
	v_add_f64 v[23:24], v[10:11], v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[21:22], v[14:15], -v[16:17]
	v_add_f64 v[6:7], v[6:7], -v[16:17]
	v_ldexp_f64 v[16:17], v[23:24], -2
	v_add_f64 v[10:11], v[23:24], -v[10:11]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[12:13], v[12:13], -v[21:22]
	v_add_f64 v[21:22], v[25:26], v[8:9]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[16:17]|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[10:11], v[14:15], -v[10:11]
	v_add_f64 v[6:7], v[6:7], v[12:13]
	v_fract_f64_e32 v[12:13], v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[14:15], v[21:22], v[6:7]
	v_dual_cndmask_b32 v13, 0, v13 :: v_dual_cndmask_b32 v12, 0, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[12:13], v[12:13], 2
	v_add_f64 v[16:17], v[10:11], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[23:24], v[16:17], v[12:13]
	v_add_f64 v[10:11], v[16:17], -v[10:11]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[23:24]
	v_add_f64 v[23:24], v[21:22], -v[25:26]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[10:11], v[14:15], -v[10:11]
	v_cndmask_b32_e64 v28, 0, 0x40100000, vcc_lo
	v_add_f64 v[32:33], v[21:22], -v[23:24]
	v_add_f64 v[8:9], v[8:9], -v[23:24]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[12:13], v[12:13], v[27:28]
	v_add_f64 v[28:29], v[14:15], -v[21:22]
	v_add_f64 v[23:24], v[25:26], -v[32:33]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[30:31], v[16:17], v[12:13]
	v_add_f64 v[34:35], v[14:15], -v[28:29]
	v_add_f64 v[6:7], v[6:7], -v[28:29]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[8:9], v[8:9], v[23:24]
	v_cvt_i32_f64_e32 v30, v[30:31]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[21:22], v[21:22], -v[34:35]
	v_cvt_f64_i32_e32 v[28:29], v30
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[6:7], v[21:22]
	v_add_f64 v[12:13], v[12:13], -v[28:29]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[8:9], v[6:7]
	v_add_f64 v[8:9], v[16:17], v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[4:5], v[4:5], v[6:7]
	v_add_f64 v[6:7], v[8:9], -v[12:13]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[4:5], v[10:11], v[4:5]
	v_add_f64 v[6:7], v[16:17], -v[6:7]
	v_cndmask_b32_e64 v28, 0, 0x3ff00000, vcc_lo
	v_add_co_ci_u32_e64 v12, s1, 0, v30, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[4:5], v[4:5], v[6:7]
	v_add_f64 v[6:7], v[8:9], -v[27:28]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[6:7], v[4:5]
	v_mul_f64 v[10:11], v[8:9], s[16:17]
	v_add_f64 v[6:7], v[8:9], -v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[13:14], v[8:9], s[16:17], -v[10:11]
	v_add_f64 v[4:5], v[4:5], -v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], v[8:9], s[18:19], v[13:14]
	v_fma_f64 v[6:7], v[4:5], s[16:17], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[4:5], v[10:11], v[6:7]
	v_add_f64 v[8:9], v[4:5], -v[10:11]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[6:7], v[6:7], -v[8:9]
.LBB0_80:                               ; %Flow372
	s_and_not1_saveexec_b32 s1, s3
	s_cbranch_execz .LBB0_82
; %bb.81:
	s_mov_b32 s16, 0x6dc9c883
	s_mov_b32 s17, 0x3fe45f30
	s_mov_b32 s19, 0xbc91a626
	v_mul_f64 v[4:5], |v[0:1]|, s[16:17]
	s_mov_b32 s16, 0x54442d18
	s_mov_b32 s17, 0xbff921fb
	s_mov_b32 s18, 0x33145c00
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[8:9], v[4:5]
	v_fma_f64 v[4:5], v[8:9], s[16:17], |v[0:1]|
	v_mul_f64 v[6:7], v[8:9], s[18:19]
	s_mov_b32 s16, 0x252049c0
	s_mov_b32 s17, 0xb97b839a
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[12:13], v[8:9], s[18:19], v[4:5]
	v_add_f64 v[10:11], v[4:5], v[6:7]
	s_mov_b32 s19, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[4:5], v[4:5], -v[10:11]
	v_add_f64 v[10:11], v[10:11], -v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[4:5], v[4:5], v[6:7]
	v_fma_f64 v[6:7], v[8:9], s[18:19], v[6:7]
	v_add_f64 v[4:5], v[10:11], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[4:5], v[4:5], -v[6:7]
	v_fma_f64 v[6:7], v[8:9], s[16:17], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[4:5], v[12:13], v[6:7]
	v_add_f64 v[10:11], v[4:5], -v[12:13]
	v_cvt_i32_f64_e32 v12, v[8:9]
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f64 v[6:7], v[6:7], -v[10:11]
.LBB0_82:                               ; %_ZL3cosd.exit.i.i.i.i
	s_or_b32 exec_lo, exec_lo, s1
                                        ; implicit-def: $vgpr13
                                        ; implicit-def: $vgpr8_vgpr9
                                        ; implicit-def: $vgpr10_vgpr11
	s_and_saveexec_b32 s1, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s2, exec_lo, s1
	s_cbranch_execz .LBB0_84
; %bb.83:
	v_ldexp_f64 v[8:9], |v[0:1]|, 0xffffff80
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[0:1]|
	v_trig_preop_f64 v[10:11], |v[0:1]|, 0
	v_trig_preop_f64 v[13:14], |v[0:1]|, 1
	v_trig_preop_f64 v[23:24], |v[0:1]|, 2
	v_mov_b32_e32 v31, 0
	s_mov_b32 s16, 0x54442d18
	s_mov_b32 s17, 0x3ff921fb
	s_mov_b32 s18, 0x33145c07
	s_mov_b32 s19, 0x3c91a626
	v_dual_cndmask_b32 v9, v18, v9 :: v_dual_cndmask_b32 v8, v0, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[15:16], v[10:11], v[8:9]
	v_mul_f64 v[17:18], v[13:14], v[8:9]
	v_mul_f64 v[29:30], v[23:24], v[8:9]
	v_fma_f64 v[10:11], v[10:11], v[8:9], -v[15:16]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[13:14], v[13:14], v[8:9], -v[17:18]
	v_fma_f64 v[8:9], v[23:24], v[8:9], -v[29:30]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[19:20], v[17:18], v[10:11]
	v_add_f64 v[21:22], v[19:20], -v[17:18]
	v_add_f64 v[27:28], v[15:16], v[19:20]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[25:26], v[19:20], -v[21:22]
	v_add_f64 v[10:11], v[10:11], -v[21:22]
	v_ldexp_f64 v[21:22], v[27:28], -2
	v_add_f64 v[15:16], v[27:28], -v[15:16]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[17:18], v[17:18], -v[25:26]
	v_add_f64 v[25:26], v[29:30], v[13:14]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[21:22]|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[15:16], v[19:20], -v[15:16]
	v_add_f64 v[10:11], v[10:11], v[17:18]
	v_fract_f64_e32 v[17:18], v[21:22]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[19:20], v[25:26], v[10:11]
	v_dual_cndmask_b32 v18, 0, v18 :: v_dual_cndmask_b32 v17, 0, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[17:18], v[17:18], 2
	v_add_f64 v[21:22], v[15:16], v[19:20]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[27:28], v[21:22], v[17:18]
	v_add_f64 v[15:16], v[21:22], -v[15:16]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[27:28]
	v_add_f64 v[27:28], v[25:26], -v[29:30]
	v_cndmask_b32_e64 v32, 0, 0x40100000, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[36:37], v[25:26], -v[27:28]
	v_add_f64 v[13:14], v[13:14], -v[27:28]
	v_add_f64 v[17:18], v[17:18], v[31:32]
	v_add_f64 v[32:33], v[19:20], -v[25:26]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[27:28], v[29:30], -v[36:37]
	v_add_f64 v[34:35], v[21:22], v[17:18]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[38:39], v[19:20], -v[32:33]
	v_add_f64 v[10:11], v[10:11], -v[32:33]
	v_add_f64 v[13:14], v[13:14], v[27:28]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cvt_i32_f64_e32 v34, v[34:35]
	v_add_f64 v[25:26], v[25:26], -v[38:39]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[32:33], v34
	v_add_f64 v[10:11], v[10:11], v[25:26]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[17:18], v[17:18], -v[32:33]
	v_add_f64 v[10:11], v[13:14], v[10:11]
	v_add_f64 v[13:14], v[19:20], -v[15:16]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[23:24], v[21:22], v[17:18]
	v_add_f64 v[8:9], v[8:9], v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[10:11], v[23:24], -v[17:18]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[23:24]
	v_add_f64 v[8:9], v[13:14], v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_f64 v[10:11], v[21:22], -v[10:11]
	v_cndmask_b32_e64 v32, 0, 0x3ff00000, vcc_lo
	v_add_co_ci_u32_e64 v13, s1, 0, v34, vcc_lo
	v_add_f64 v[8:9], v[8:9], v[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[10:11], v[23:24], -v[31:32]
	v_add_f64 v[14:15], v[10:11], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[16:17], v[14:15], s[16:17]
	v_add_f64 v[10:11], v[14:15], -v[10:11]
	v_fma_f64 v[18:19], v[14:15], s[16:17], -v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[8:9], v[8:9], -v[10:11]
	v_fma_f64 v[10:11], v[14:15], s[18:19], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[10:11], v[8:9], s[16:17], v[10:11]
	v_add_f64 v[8:9], v[16:17], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[14:15], v[8:9], -v[16:17]
	v_add_f64 v[10:11], v[10:11], -v[14:15]
.LBB0_84:                               ; %Flow371
	s_and_not1_saveexec_b32 s1, s2
	s_cbranch_execz .LBB0_86
; %bb.85:
	s_mov_b32 s2, 0x6dc9c883
	s_mov_b32 s3, 0x3fe45f30
	s_mov_b32 s17, 0xbc91a626
	v_mul_f64 v[8:9], |v[0:1]|, s[2:3]
	s_mov_b32 s2, 0x54442d18
	s_mov_b32 s3, 0xbff921fb
	s_mov_b32 s16, 0x33145c00
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[13:14], v[8:9]
	v_fma_f64 v[8:9], v[13:14], s[2:3], |v[0:1]|
	v_mul_f64 v[10:11], v[13:14], s[16:17]
	s_mov_b32 s2, 0x252049c0
	s_mov_b32 s3, 0xb97b839a
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[17:18], v[13:14], s[16:17], v[8:9]
	v_add_f64 v[15:16], v[8:9], v[10:11]
	s_mov_b32 s17, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[8:9], v[8:9], -v[15:16]
	v_add_f64 v[15:16], v[15:16], -v[17:18]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[8:9], v[8:9], v[10:11]
	v_fma_f64 v[10:11], v[13:14], s[16:17], v[10:11]
	v_add_f64 v[8:9], v[15:16], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[8:9], -v[10:11]
	v_fma_f64 v[10:11], v[13:14], s[2:3], v[8:9]
	v_cvt_i32_f64_e32 v13, v[13:14]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[17:18], v[10:11]
	v_add_f64 v[15:16], v[8:9], -v[17:18]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[10:11], v[10:11], -v[15:16]
.LBB0_86:                               ; %_ZN6thrust6detail7complex10ldexp_cexpENS_7complexIdEEi.exit.i.i.i
	s_or_b32 exec_lo, exec_lo, s1
	s_mov_b32 s2, 0x19ba0da4
	s_mov_b32 s3, 0xc0937be3
	s_mov_b32 s16, 0x6a5dcb37
	v_add_f64 v[2:3], v[2:3], s[2:3]
	s_mov_b32 s2, 0x652b82fe
	s_mov_b32 s3, 0x3ff71547
	s_mov_b32 s17, 0x3e5ade15
	s_delay_alu instid0(VALU_DEP_4)
	v_mul_f64 v[20:21], v[4:5], v[4:5]
	v_mul_f64 v[22:23], v[8:9], v[8:9]
	s_mov_b32 s18, 0x1852b7b0
	s_mov_b32 s19, 0x3f56c16c
	s_mov_b32 s20, 0x46cc5e42
	s_mov_b32 s21, 0xbda907db
	s_mov_b32 s22, 0x11122322
	s_delay_alu instid0(VALU_DEP_4)
	v_mul_f64 v[40:41], v[6:7], 0.5
	v_mul_f64 v[46:47], v[10:11], 0.5
	v_cmp_class_f64_e64 s1, v[0:1], 0x1f8
	v_mul_f64 v[14:15], v[2:3], s[2:3]
	s_mov_b32 s2, 0xfefa39ef
	s_mov_b32 s3, 0xbfe62e42
	v_mul_f64 v[30:31], v[20:21], 0.5
	v_mul_f64 v[32:33], v[22:23], 0.5
	v_mul_f64 v[42:43], v[4:5], -v[20:21]
	v_mul_f64 v[48:49], v[8:9], -v[22:23]
	v_rndne_f64_e32 v[14:15], v[14:15]
	v_add_f64 v[36:37], -v[30:31], 1.0
	v_add_f64 v[38:39], -v[32:33], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[16:17], v[14:15], s[2:3], v[2:3]
	s_mov_b32 s2, 0x3b39803f
	s_mov_b32 s3, 0xbc7abc9e
	v_add_f64 v[44:45], -v[36:37], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[50:51], -v[38:39], 1.0
	v_fma_f64 v[16:17], v[14:15], s[2:3], v[16:17]
	s_mov_b32 s2, 0xfca7ab0c
	s_mov_b32 s3, 0x3e928af3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[30:31], v[44:45], -v[30:31]
	v_add_f64 v[32:33], v[50:51], -v[32:33]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_fma_f64 v[18:19], v[16:17], s[16:17], s[2:3]
	s_mov_b32 s2, 0x623fde64
	s_mov_b32 s3, 0x3ec71dee
	s_mov_b32 s16, 0xf9a43bb8
	s_mov_b32 s17, 0x3de5e0b2
	v_fma_f64 v[30:31], v[4:5], -v[6:7], v[30:31]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[32:33], v[8:9], -v[10:11], v[32:33]
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[2:3]
	s_mov_b32 s2, 0x7c89e6b0
	s_mov_b32 s3, 0x3efa0199
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[2:3]
	s_mov_b32 s2, 0x14761f6e
	s_mov_b32 s3, 0x3f2a01a0
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[2:3]
	s_mov_b32 s2, 0xb42fdfa7
	s_mov_b32 s3, 0xbe5ae600
	s_delay_alu instid0(SALU_CYCLE_1)
	v_fma_f64 v[24:25], v[20:21], s[16:17], s[2:3]
	v_fma_f64 v[26:27], v[22:23], s[16:17], s[2:3]
	s_mov_b32 s2, 0x796cde01
	s_mov_b32 s3, 0x3ec71de3
	s_mov_b32 s16, 0x11110bb3
	s_mov_b32 s17, 0x3f811111
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	s_mov_b32 s23, s17
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[18:19]
	s_mov_b32 s18, 0x9037ab78
	s_mov_b32 s19, 0x3e21eeb6
	s_delay_alu instid0(VALU_DEP_3)
	v_fma_f64 v[24:25], v[20:21], v[24:25], s[2:3]
	v_fma_f64 v[28:29], v[20:21], s[20:21], s[18:19]
	v_fma_f64 v[34:35], v[22:23], s[20:21], s[18:19]
	v_fma_f64 v[26:27], v[22:23], v[26:27], s[2:3]
	s_mov_b32 s18, 0x19e83e5c
	s_mov_b32 s19, 0xbf2a01a0
	s_mov_b32 s2, 0x55555555
	s_mov_b32 s3, 0x3fa55555
	s_mov_b32 s20, 0x555502a1
	s_mov_b32 s21, s3
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[22:23]
	s_mov_b32 s22, 0xa17f65f6
	s_mov_b32 s23, 0xbe927e4f
	v_fma_f64 v[24:25], v[20:21], v[24:25], s[18:19]
	v_fma_f64 v[28:29], v[20:21], v[28:29], s[22:23]
	v_fma_f64 v[34:35], v[22:23], v[34:35], s[22:23]
	v_fma_f64 v[26:27], v[22:23], v[26:27], s[18:19]
	s_mov_b32 s18, 0x19f4ec90
	s_mov_b32 s19, 0x3efa01a0
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[20:21]
	s_mov_b32 s20, 0x55555511
	s_mov_b32 s21, 0x3fc55555
	v_fma_f64 v[24:25], v[20:21], v[24:25], s[16:17]
	v_fma_f64 v[28:29], v[20:21], v[28:29], s[18:19]
	v_fma_f64 v[34:35], v[22:23], v[34:35], s[18:19]
	v_fma_f64 v[26:27], v[22:23], v[26:27], s[16:17]
	s_mov_b32 s16, 0x16c16967
	s_mov_b32 s17, 0xbf56c16c
	s_mov_b32 s18, 11
	s_mov_b32 s19, 0x3fe00000
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[20:21]
	v_fma_f64 v[24:25], v[42:43], v[24:25], v[40:41]
	v_fma_f64 v[28:29], v[20:21], v[28:29], s[16:17]
	v_fma_f64 v[34:35], v[22:23], v[34:35], s[16:17]
	v_fma_f64 v[26:27], v[48:49], v[26:27], v[46:47]
	v_mul_f64 v[40:41], v[20:21], v[20:21]
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[18:19]
	v_fma_f64 v[6:7], v[20:21], v[24:25], -v[6:7]
	v_fma_f64 v[28:29], v[20:21], v[28:29], s[2:3]
	v_mul_f64 v[20:21], v[22:23], v[22:23]
	v_fma_f64 v[24:25], v[22:23], v[34:35], s[2:3]
	v_fma_f64 v[10:11], v[22:23], v[26:27], -v[10:11]
	s_mov_b32 s3, 0xbfc55555
	v_cvt_i32_f64_e32 v26, v[14:15]
	v_fma_f64 v[18:19], v[16:17], v[18:19], 1.0
	v_fma_f64 v[6:7], v[42:43], s[2:3], v[6:7]
	v_fma_f64 v[22:23], v[40:41], v[28:29], v[30:31]
	v_fma_f64 v[10:11], v[48:49], s[2:3], v[10:11]
	v_cmp_nlt_f64_e64 s2, 0x40900000, v[2:3]
	v_cmp_ngt_f64_e64 s3, 0xc090cc00, v[2:3]
	v_lshlrev_b32_e32 v2, 30, v13
	v_lshlrev_b32_e32 v3, 30, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v1, v2, v1
	v_and_b32_e32 v2, 0x80000000, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_and_b32_e32 v1, 0x80000000, v1
	v_fma_f64 v[14:15], v[16:17], v[18:19], 1.0
	v_fma_f64 v[16:17], v[20:21], v[24:25], v[32:33]
	v_add_f64 v[4:5], v[4:5], -v[6:7]
	v_add_f64 v[18:19], v[36:37], v[22:23]
	v_add_f64 v[8:9], v[8:9], -v[10:11]
	v_ldexp_f64 v[6:7], v[14:15], v26
	v_add_f64 v[14:15], v[38:39], v[16:17]
	v_xor_b32_e32 v5, 0x80000000, v5
	v_and_b32_e32 v10, 1, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_eq_u32_e32 vcc_lo, 0, v10
	v_dual_cndmask_b32 v3, v5, v19 :: v_dual_cndmask_b32 v4, v4, v18
	s_and_b32 vcc_lo, s3, s2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v2, v3, v2
	v_cndmask_b32_e64 v0, 0x7ff00000, v7, s2
	v_and_b32_e32 v7, 1, v13
	v_cmp_eq_u32_e64 s4, 0, v7
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v7, v15, v9, s4
	v_cndmask_b32_e64 v5, v14, v8, s4
	v_cndmask_b32_e64 v8, 0, v0, s3
	s_mov_b32 s4, 0xfffff
	v_cndmask_b32_e64 v0, 0, v4, s1
	v_cndmask_b32_e32 v4, 0, v6, vcc_lo
	v_xor_b32_e32 v3, v7, v1
	v_cndmask_b32_e64 v1, 0x7ff80000, v2, s1
	v_cndmask_b32_e64 v2, 0, v5, s1
	v_and_or_b32 v5, v8, s4, 0x7fe00000
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v3, 0x7ff80000, v3, s1
	v_mul_f64 v[0:1], v[4:5], v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_f64 v[2:3], v[4:5], v[2:3]
	v_lshrrev_b32_e32 v4, 20, v8
	v_add_nc_u32_e32 v6, 0xffffff09, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b16 v4, 15, v6
	v_add_nc_u16 v4, v6, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i16 v4, 1, v4
	v_bfe_i32 v7, v4, 0, 16
	v_mov_b32_e32 v4, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v5, v7, 20, 0x3ff00000
	v_mul_f64 v[0:1], v[0:1], v[4:5]
	v_mul_f64 v[2:3], v[2:3], v[4:5]
	v_sub_nc_u32_e32 v5, v6, v7
	v_mov_b32_e32 v6, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v7, v5, 20, 0x3ff00000
	v_mul_f64 v[4:5], v[0:1], v[6:7]
	v_mul_f64 v[0:1], v[2:3], v[6:7]
.LBB0_87:                               ; %Flow374
	s_or_b32 exec_lo, exec_lo, s14
                                        ; implicit-def: $vgpr2_vgpr3
                                        ; implicit-def: $vgpr6
.LBB0_88:                               ; %Flow377
	s_and_not1_saveexec_b32 s2, s13
	s_cbranch_execz .LBB0_94
; %bb.89:
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_f64 v[0:1], v[0:1], -v[0:1]
	v_cmp_ne_u32_e32 vcc_lo, 0, v2
	v_cmp_ne_u32_e64 s1, 0x7ff00000, v6
	s_or_b32 s1, vcc_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s3, s1
	s_xor_b32 s1, exec_lo, s3
; %bb.90:
                                        ; implicit-def: $vgpr2_vgpr3
; %bb.91:                               ; %Flow375
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	s_or_saveexec_b32 s1, s1
	v_dual_mov_b32 v5, v1 :: v_dual_mov_b32 v4, v0
	s_xor_b32 exec_lo, exec_lo, s1
; %bb.92:
	v_cmp_lt_i64_e32 vcc_lo, -1, v[2:3]
	v_dual_cndmask_b32 v5, 0, v3 :: v_dual_cndmask_b32 v4, 0, v2
	v_dual_cndmask_b32 v1, 0, v1 :: v_dual_cndmask_b32 v0, 0, v0
; %bb.93:                               ; %Flow376
	s_or_b32 exec_lo, exec_lo, s1
.LBB0_94:                               ; %Flow378
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr18
.LBB0_95:                               ; %Flow381
	s_and_not1_saveexec_b32 s3, s12
	s_cbranch_execz .LBB0_105
; %bb.96:
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ngt_f64_e64 s2, 0x41d00000, |v[0:1]|
	v_trig_preop_f64 v[10:11], |v[0:1]|, 0
	v_trig_preop_f64 v[8:9], |v[0:1]|, 1
	v_ldexp_f64 v[12:13], |v[0:1]|, 0xffffff80
	v_trig_preop_f64 v[6:7], |v[0:1]|, 2
                                        ; implicit-def: $vgpr19
                                        ; implicit-def: $vgpr2_vgpr3
                                        ; implicit-def: $vgpr4_vgpr5
	s_and_saveexec_b32 s1, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s4, exec_lo, s1
	s_cbranch_execz .LBB0_98
; %bb.97:
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[0:1]|
	v_mov_b32_e32 v31, 0
	s_mov_b32 s12, 0x54442d18
	s_mov_b32 s13, 0x3ff921fb
	s_mov_b32 s14, 0x33145c07
	s_mov_b32 s15, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v3, v18, v13 :: v_dual_cndmask_b32 v2, v0, v12
	v_mul_f64 v[4:5], v[10:11], v[2:3]
	v_mul_f64 v[14:15], v[8:9], v[2:3]
	v_mul_f64 v[27:28], v[6:7], v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[16:17], v[10:11], v[2:3], -v[4:5]
	v_fma_f64 v[29:30], v[8:9], v[2:3], -v[14:15]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[2:3], v[6:7], v[2:3], -v[27:28]
	v_add_f64 v[19:20], v[14:15], v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[21:22], v[19:20], -v[14:15]
	v_add_f64 v[25:26], v[4:5], v[19:20]
	v_add_f64 v[23:24], v[19:20], -v[21:22]
	v_add_f64 v[16:17], v[16:17], -v[21:22]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[21:22], v[25:26], -2
	v_add_f64 v[4:5], v[25:26], -v[4:5]
	v_add_f64 v[14:15], v[14:15], -v[23:24]
	v_add_f64 v[23:24], v[27:28], v[29:30]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[21:22]|
	v_add_f64 v[4:5], v[19:20], -v[4:5]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[14:15], v[16:17], v[14:15]
	v_fract_f64_e32 v[16:17], v[21:22]
	v_add_f64 v[19:20], v[23:24], v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v17, 0, v17 :: v_dual_cndmask_b32 v16, 0, v16
	v_ldexp_f64 v[16:17], v[16:17], 2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[21:22], v[4:5], v[19:20]
	v_add_f64 v[25:26], v[21:22], v[16:17]
	v_add_f64 v[4:5], v[21:22], -v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cmp_gt_f64_e32 vcc_lo, 0, v[25:26]
	v_add_f64 v[25:26], v[23:24], -v[27:28]
	v_add_f64 v[4:5], v[19:20], -v[4:5]
	v_cndmask_b32_e64 v32, 0, 0x40100000, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[36:37], v[23:24], -v[25:26]
	v_add_f64 v[25:26], v[29:30], -v[25:26]
	v_add_f64 v[16:17], v[16:17], v[31:32]
	v_add_f64 v[32:33], v[19:20], -v[23:24]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[29:30], v[27:28], -v[36:37]
	v_add_f64 v[34:35], v[21:22], v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[38:39], v[19:20], -v[32:33]
	v_add_f64 v[14:15], v[14:15], -v[32:33]
	v_add_f64 v[25:26], v[25:26], v[29:30]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cvt_i32_f64_e32 v34, v[34:35]
	v_add_f64 v[23:24], v[23:24], -v[38:39]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[32:33], v34
	v_add_f64 v[14:15], v[14:15], v[23:24]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[16:17], v[16:17], -v[32:33]
	v_add_f64 v[14:15], v[25:26], v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[23:24], v[21:22], v[16:17]
	v_add_f64 v[2:3], v[2:3], v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[14:15], v[23:24], -v[16:17]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[23:24]
	v_add_f64 v[2:3], v[4:5], v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_f64 v[4:5], v[21:22], -v[14:15]
	v_cndmask_b32_e64 v32, 0, 0x3ff00000, vcc_lo
	v_add_co_ci_u32_e64 v19, s1, 0, v34, vcc_lo
	v_add_f64 v[2:3], v[2:3], v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[4:5], v[23:24], -v[31:32]
	v_add_f64 v[14:15], v[4:5], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[16:17], v[14:15], s[12:13]
	v_add_f64 v[4:5], v[14:15], -v[4:5]
	v_fma_f64 v[20:21], v[14:15], s[12:13], -v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[2:3], v[2:3], -v[4:5]
	v_fma_f64 v[4:5], v[14:15], s[14:15], v[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], v[2:3], s[12:13], v[4:5]
	v_add_f64 v[2:3], v[16:17], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[14:15], v[2:3], -v[16:17]
	v_add_f64 v[4:5], v[4:5], -v[14:15]
.LBB0_98:                               ; %Flow380
	s_and_not1_saveexec_b32 s1, s4
	s_cbranch_execz .LBB0_100
; %bb.99:
	s_mov_b32 s12, 0x6dc9c883
	s_mov_b32 s13, 0x3fe45f30
	s_mov_b32 s15, 0xbc91a626
	v_mul_f64 v[2:3], |v[0:1]|, s[12:13]
	s_mov_b32 s12, 0x54442d18
	s_mov_b32 s13, 0xbff921fb
	s_mov_b32 s14, 0x33145c00
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[14:15], v[2:3]
	v_fma_f64 v[2:3], v[14:15], s[12:13], |v[0:1]|
	v_mul_f64 v[4:5], v[14:15], s[14:15]
	s_mov_b32 s12, 0x252049c0
	s_mov_b32 s13, 0xb97b839a
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[19:20], v[14:15], s[14:15], v[2:3]
	v_add_f64 v[16:17], v[2:3], v[4:5]
	s_mov_b32 s15, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[2:3], v[2:3], -v[16:17]
	v_add_f64 v[16:17], v[16:17], -v[19:20]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[2:3], v[2:3], v[4:5]
	v_fma_f64 v[4:5], v[14:15], s[14:15], v[4:5]
	v_add_f64 v[2:3], v[16:17], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], v[2:3], -v[4:5]
	v_fma_f64 v[4:5], v[14:15], s[12:13], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], v[19:20], v[4:5]
	v_add_f64 v[16:17], v[2:3], -v[19:20]
	v_cvt_i32_f64_e32 v19, v[14:15]
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f64 v[4:5], v[4:5], -v[16:17]
.LBB0_100:                              ; %_ZL3cosd.exit.i.i.i
	s_or_b32 exec_lo, exec_lo, s1
                                        ; implicit-def: $vgpr20
                                        ; implicit-def: $vgpr14_vgpr15
                                        ; implicit-def: $vgpr16_vgpr17
	s_and_saveexec_b32 s1, s2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s2, exec_lo, s1
	s_cbranch_execz .LBB0_102
; %bb.101:
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[0:1]|
	v_mov_b32_e32 v30, 0
	s_mov_b32 s12, 0x54442d18
	s_mov_b32 s13, 0x3ff921fb
	s_mov_b32 s14, 0x33145c07
	s_mov_b32 s15, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v13, v18, v13 :: v_dual_cndmask_b32 v12, v0, v12
	v_mul_f64 v[14:15], v[10:11], v[12:13]
	v_mul_f64 v[16:17], v[8:9], v[12:13]
	v_mul_f64 v[28:29], v[6:7], v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[10:11], v[10:11], v[12:13], -v[14:15]
	v_fma_f64 v[8:9], v[8:9], v[12:13], -v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[6:7], v[6:7], v[12:13], -v[28:29]
	v_add_f64 v[20:21], v[16:17], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[22:23], v[20:21], -v[16:17]
	v_add_f64 v[26:27], v[14:15], v[20:21]
	v_add_f64 v[24:25], v[20:21], -v[22:23]
	v_add_f64 v[10:11], v[10:11], -v[22:23]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[22:23], v[26:27], -2
	v_add_f64 v[14:15], v[26:27], -v[14:15]
	v_add_f64 v[16:17], v[16:17], -v[24:25]
	v_add_f64 v[24:25], v[28:29], v[8:9]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[22:23]|
	v_add_f64 v[14:15], v[20:21], -v[14:15]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[10:11], v[16:17]
	v_fract_f64_e32 v[16:17], v[22:23]
	v_add_f64 v[20:21], v[24:25], v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v17, 0, v17 :: v_dual_cndmask_b32 v16, 0, v16
	v_ldexp_f64 v[16:17], v[16:17], 2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[22:23], v[14:15], v[20:21]
	v_add_f64 v[26:27], v[22:23], v[16:17]
	v_add_f64 v[12:13], v[22:23], -v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cmp_gt_f64_e32 vcc_lo, 0, v[26:27]
	v_add_f64 v[26:27], v[24:25], -v[28:29]
	v_add_f64 v[12:13], v[20:21], -v[12:13]
	v_cndmask_b32_e64 v31, 0, 0x40100000, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[35:36], v[24:25], -v[26:27]
	v_add_f64 v[8:9], v[8:9], -v[26:27]
	v_add_f64 v[16:17], v[16:17], v[30:31]
	v_add_f64 v[31:32], v[20:21], -v[24:25]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[26:27], v[28:29], -v[35:36]
	v_add_f64 v[33:34], v[22:23], v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[37:38], v[20:21], -v[31:32]
	v_add_f64 v[10:11], v[10:11], -v[31:32]
	v_add_f64 v[8:9], v[8:9], v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cvt_i32_f64_e32 v18, v[33:34]
	v_add_f64 v[24:25], v[24:25], -v[37:38]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[31:32], v18
	v_add_f64 v[10:11], v[10:11], v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[16:17], v[16:17], -v[31:32]
	v_add_f64 v[8:9], v[8:9], v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[22:23], v[16:17]
	v_add_f64 v[6:7], v[6:7], v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[8:9], v[10:11], -v[16:17]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[10:11]
	v_add_f64 v[6:7], v[12:13], v[6:7]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_f64 v[8:9], v[22:23], -v[8:9]
	v_cndmask_b32_e64 v31, 0, 0x3ff00000, vcc_lo
	v_add_co_ci_u32_e64 v20, s1, 0, v18, vcc_lo
	v_add_f64 v[6:7], v[6:7], v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[10:11], -v[30:31]
	v_add_f64 v[10:11], v[8:9], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[12:13], v[10:11], s[12:13]
	v_add_f64 v[8:9], v[10:11], -v[8:9]
	v_fma_f64 v[14:15], v[10:11], s[12:13], -v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[6:7], -v[8:9]
	v_fma_f64 v[8:9], v[10:11], s[14:15], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], v[6:7], s[12:13], v[8:9]
	v_add_f64 v[14:15], v[12:13], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[14:15], -v[12:13]
	v_add_f64 v[16:17], v[6:7], -v[8:9]
.LBB0_102:                              ; %Flow379
	s_and_not1_saveexec_b32 s1, s2
	s_cbranch_execz .LBB0_104
; %bb.103:
	s_mov_b32 s12, 0x6dc9c883
	s_mov_b32 s13, 0x3fe45f30
	s_mov_b32 s15, 0xbc91a626
	v_mul_f64 v[6:7], |v[0:1]|, s[12:13]
	s_mov_b32 s12, 0x54442d18
	s_mov_b32 s13, 0xbff921fb
	s_mov_b32 s14, 0x33145c00
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[6:7], v[6:7]
	v_fma_f64 v[8:9], v[6:7], s[12:13], |v[0:1]|
	v_mul_f64 v[10:11], v[6:7], s[14:15]
	s_mov_b32 s12, 0x252049c0
	s_mov_b32 s13, 0xb97b839a
	v_cvt_i32_f64_e32 v20, v[6:7]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[16:17], v[6:7], s[14:15], v[8:9]
	v_add_f64 v[12:13], v[8:9], v[10:11]
	s_mov_b32 s15, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[8:9], v[8:9], -v[12:13]
	v_add_f64 v[12:13], v[12:13], -v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[8:9], v[8:9], v[10:11]
	v_fma_f64 v[10:11], v[6:7], s[14:15], v[10:11]
	v_add_f64 v[8:9], v[12:13], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[8:9], -v[10:11]
	v_fma_f64 v[8:9], v[6:7], s[12:13], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[14:15], v[16:17], v[8:9]
	v_add_f64 v[10:11], v[14:15], -v[16:17]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[16:17], v[8:9], -v[10:11]
.LBB0_104:                              ; %_ZL3sind.exit.i.i.i
	s_or_b32 exec_lo, exec_lo, s1
	v_mul_f64 v[6:7], v[2:3], v[2:3]
	v_mul_f64 v[8:9], v[14:15], v[14:15]
	s_mov_b32 s12, 0xb42fdfa7
	s_mov_b32 s14, 0xf9a43bb8
	s_mov_b32 s13, 0xbe5ae600
	s_mov_b32 s15, 0x3de5e0b2
	s_mov_b32 s16, 0x796cde01
	s_mov_b32 s17, 0x3ec71de3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[33:34], v[4:5], 0.5
	v_mul_f64 v[39:40], v[16:17], 0.5
	v_cmp_class_f64_e64 s1, v[0:1], 0x1f8
	v_fma_f64 v[10:11], v[6:7], s[14:15], s[12:13]
	v_fma_f64 v[12:13], v[8:9], s[14:15], s[12:13]
	s_mov_b32 s12, 0x9037ab78
	s_mov_b32 s14, 0x46cc5e42
	s_mov_b32 s13, 0x3e21eeb6
	s_mov_b32 s15, 0xbda907db
	v_mul_f64 v[23:24], v[6:7], 0.5
	v_fma_f64 v[21:22], v[6:7], s[14:15], s[12:13]
	v_mul_f64 v[25:26], v[8:9], 0.5
	v_fma_f64 v[27:28], v[8:9], s[14:15], s[12:13]
	s_mov_b32 s12, 0xa17f65f6
	s_mov_b32 s14, 0x19e83e5c
	s_mov_b32 s13, 0xbe927e4f
	s_mov_b32 s15, 0xbf2a01a0
	v_mul_f64 v[35:36], v[2:3], -v[6:7]
	v_mul_f64 v[41:42], v[14:15], -v[8:9]
	v_fma_f64 v[10:11], v[6:7], v[10:11], s[16:17]
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[16:17]
	v_add_f64 v[29:30], -v[23:24], 1.0
	v_fma_f64 v[21:22], v[6:7], v[21:22], s[12:13]
	v_add_f64 v[31:32], -v[25:26], 1.0
	v_fma_f64 v[27:28], v[8:9], v[27:28], s[12:13]
	s_mov_b32 s12, 0x19f4ec90
	s_mov_b32 s13, 0x3efa01a0
	v_fma_f64 v[10:11], v[6:7], v[10:11], s[14:15]
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[14:15]
	s_mov_b32 s14, 0x11110bb3
	s_mov_b32 s15, 0x3f811111
	v_add_f64 v[37:38], -v[29:30], 1.0
	v_fma_f64 v[21:22], v[6:7], v[21:22], s[12:13]
	v_add_f64 v[43:44], -v[31:32], 1.0
	v_fma_f64 v[27:28], v[8:9], v[27:28], s[12:13]
	s_mov_b32 s12, 0x16c16967
	s_mov_b32 s13, 0xbf56c16c
	v_fma_f64 v[10:11], v[6:7], v[10:11], s[14:15]
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[14:15]
	v_add_f64 v[23:24], v[37:38], -v[23:24]
	v_fma_f64 v[21:22], v[6:7], v[21:22], s[12:13]
	v_add_f64 v[25:26], v[43:44], -v[25:26]
	v_fma_f64 v[27:28], v[8:9], v[27:28], s[12:13]
	s_mov_b32 s12, 0x55555555
	s_mov_b32 s13, 0x3fa55555
	v_fma_f64 v[10:11], v[35:36], v[10:11], v[33:34]
	v_fma_f64 v[12:13], v[41:42], v[12:13], v[39:40]
	v_mul_f64 v[33:34], v[6:7], v[6:7]
	v_fma_f64 v[23:24], v[2:3], -v[4:5], v[23:24]
	v_fma_f64 v[21:22], v[6:7], v[21:22], s[12:13]
	v_fma_f64 v[25:26], v[14:15], -v[16:17], v[25:26]
	v_fma_f64 v[4:5], v[6:7], v[10:11], -v[4:5]
	v_mul_f64 v[6:7], v[8:9], v[8:9]
	v_fma_f64 v[10:11], v[8:9], v[27:28], s[12:13]
	v_fma_f64 v[8:9], v[8:9], v[12:13], -v[16:17]
	s_mov_b32 s13, 0xbfc55555
	v_fma_f64 v[12:13], v[33:34], v[21:22], v[23:24]
	v_fma_f64 v[4:5], v[35:36], s[12:13], v[4:5]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[6:7], v[6:7], v[10:11], v[25:26]
	v_fma_f64 v[8:9], v[41:42], s[12:13], v[8:9]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[10:11], v[29:30], v[12:13]
	v_add_f64 v[2:3], v[2:3], -v[4:5]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[4:5], v[31:32], v[6:7]
	v_add_f64 v[6:7], v[14:15], -v[8:9]
	v_and_b32_e32 v8, 1, v19
	v_lshlrev_b32_e32 v9, 30, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cmp_eq_u32_e32 vcc_lo, 0, v8
	v_lshlrev_b32_e32 v0, 30, v20
	v_and_b32_e32 v8, 1, v20
	v_xor_b32_e32 v0, v0, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_eq_u32_e64 s2, 0, v8
	v_and_b32_e32 v0, 0x80000000, v0
	v_cndmask_b32_e32 v2, v2, v10, vcc_lo
	v_xor_b32_e32 v1, 0x80000000, v3
	v_and_b32_e32 v3, 0x80000000, v9
	v_cndmask_b32_e64 v6, v4, v6, s2
	v_cndmask_b32_e64 v4, v5, v7, s2
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v1, v1, v11, vcc_lo
	v_xor_b32_e32 v1, v1, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v3, v4, v0
	v_cndmask_b32_e64 v4, 0, v2, s1
	v_cndmask_b32_e64 v0, 0, v6, s1
	v_cndmask_b32_e64 v5, 0x7ff80000, v1, s1
	s_delay_alu instid0(VALU_DEP_4)
	v_cndmask_b32_e64 v1, 0x7ff80000, v3, s1
.LBB0_105:                              ; %Flow382
	s_or_b32 exec_lo, exec_lo, s3
                                        ; implicit-def: $vgpr2_vgpr3
.LBB0_106:                              ; %Flow383
	s_and_not1_saveexec_b32 s2, s5
	s_cbranch_execz .LBB0_108
; %bb.107:
	s_mov_b32 s4, 0x652b82fe
	s_mov_b32 s5, 0x3ff71547
	s_mov_b32 s12, 0x6a5dcb37
	v_mul_f64 v[4:5], v[2:3], s[4:5]
	s_mov_b32 s4, 0xfefa39ef
	s_mov_b32 s5, 0xbfe62e42
	s_mov_b32 s13, 0x3e5ade15
	v_cmp_nlt_f64_e32 vcc_lo, 0x40900000, v[2:3]
	v_cmp_ngt_f64_e64 s1, 0xc090cc00, v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[4:5], v[4:5]
	v_fma_f64 v[6:7], v[4:5], s[4:5], v[2:3]
	s_mov_b32 s4, 0x3b39803f
	s_mov_b32 s5, 0xbc7abc9e
	v_cvt_i32_f64_e32 v10, v[4:5]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[6:7], v[4:5], s[4:5], v[6:7]
	s_mov_b32 s4, 0xfca7ab0c
	s_mov_b32 s5, 0x3e928af3
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[8:9], v[6:7], s[12:13], s[4:5]
	s_mov_b32 s4, 0x623fde64
	s_mov_b32 s5, 0x3ec71dee
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[8:9], v[6:7], v[8:9], s[4:5]
	s_mov_b32 s4, 0x7c89e6b0
	s_mov_b32 s5, 0x3efa0199
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[8:9], v[6:7], v[8:9], s[4:5]
	s_mov_b32 s4, 0x14761f6e
	s_mov_b32 s5, 0x3f2a01a0
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[8:9], v[6:7], v[8:9], s[4:5]
	s_mov_b32 s4, 0x1852b7b0
	s_mov_b32 s5, 0x3f56c16c
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[8:9], v[6:7], v[8:9], s[4:5]
	s_mov_b32 s4, 0x11122322
	s_mov_b32 s5, 0x3f811111
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[8:9], v[6:7], v[8:9], s[4:5]
	s_mov_b32 s4, 0x555502a1
	s_mov_b32 s5, 0x3fa55555
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[8:9], v[6:7], v[8:9], s[4:5]
	s_mov_b32 s4, 0x55555511
	s_mov_b32 s5, 0x3fc55555
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[8:9], v[6:7], v[8:9], s[4:5]
	s_mov_b32 s4, 11
	s_mov_b32 s5, 0x3fe00000
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[8:9], v[6:7], v[8:9], s[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], v[6:7], v[8:9], 1.0
	v_fma_f64 v[4:5], v[6:7], v[8:9], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[4:5], v[4:5], v10
	v_cndmask_b32_e32 v5, 0x7ff00000, v5, vcc_lo
	s_and_b32 vcc_lo, s1, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v4, 0, v4, vcc_lo
	v_cndmask_b32_e64 v5, 0, v5, s1
.LBB0_108:                              ; %Flow384
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr74_vgpr75
                                        ; implicit-def: $vgpr78_vgpr79
                                        ; implicit-def: $vgpr80_vgpr81
                                        ; implicit-def: $vgpr8_vgpr9
.LBB0_109:                              ; %Flow444
	s_and_not1_saveexec_b32 s4, s11
	s_cbranch_execz .LBB0_193
; %bb.110:
                                        ; implicit-def: $vgpr4_vgpr5
                                        ; implicit-def: $vgpr6_vgpr7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s1, s0
	s_xor_b32 s5, exec_lo, s1
	s_cbranch_execz .LBB0_142
; %bb.111:
	v_cmp_lt_f64_e64 s0, |v[78:79]|, |v[74:75]|
	v_and_b32_e32 v0, 0x7fffffff, v79
	v_and_b32_e32 v1, 0x7fffffff, v75
	s_mov_b32 s2, 0x85ebc8a0
	s_mov_b32 s3, 0x7fd1ccf3
                                        ; implicit-def: $vgpr4_vgpr5
                                        ; implicit-def: $vgpr6_vgpr7
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v3, v1, v0, s0
	v_cndmask_b32_e64 v2, v74, v78, s0
	v_cmpx_nlt_f64_e32 s[2:3], v[2:3]
	s_xor_b32 s11, exec_lo, s1
	s_cbranch_execz .LBB0_139
; %bb.112:
	v_cndmask_b32_e64 v11, v0, v1, s0
	v_cndmask_b32_e64 v10, v78, v74, s0
                                        ; implicit-def: $vgpr4_vgpr5
                                        ; implicit-def: $vgpr6_vgpr7
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_neq_f64_e32 1.0, v[10:11]
	s_xor_b32 s12, exec_lo, s1
	s_cbranch_execz .LBB0_132
; %bb.113:
	v_max_f64 v[0:1], v[2:3], v[2:3]
	v_max_f64 v[4:5], v[10:11], v[10:11]
	s_mov_b32 s2, 0x4ad4b81f
	s_mov_b32 s14, 0xc57e649a
	s_mov_b32 s3, 0x358dee7a
	s_mov_b32 s15, 0x4a511b0e
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_min_f64 v[6:7], v[4:5], v[0:1]
	v_max_f64 v[0:1], v[4:5], v[0:1]
                                        ; implicit-def: $vgpr4_vgpr5
	v_cmp_ngt_f64_e32 vcc_lo, s[2:3], v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_nlt_f64_e64 s1, s[14:15], v[0:1]
                                        ; implicit-def: $vgpr6_vgpr7
	s_and_b32 s1, s1, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s2, s1
	s_xor_b32 s13, exec_lo, s2
	s_cbranch_execz .LBB0_129
; %bb.114:
                                        ; implicit-def: $vgpr4_vgpr5
                                        ; implicit-def: $vgpr6_vgpr7
	s_mov_b32 s1, exec_lo
	v_cmpx_le_f64_e32 1.0, v[10:11]
	s_xor_b32 s14, exec_lo, s1
	s_cbranch_execz .LBB0_116
; %bb.115:
	v_add_f64 v[0:1], v[10:11], -1.0
	v_add_f64 v[4:5], v[10:11], 1.0
	s_mov_b32 s3, 0x3fe55555
	s_mov_b32 s2, 0x55555555
	s_mov_b32 s16, 0xbd3237f4
	s_mov_b32 s18, 0xb5e68a13
	s_mov_b32 s17, 0xbf23e260
	s_mov_b32 s19, 0x3eeba404
	v_cmp_gt_i32_e64 s1, 0, v79
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[0:1], v[0:1], v[4:5]
	v_fma_f64 v[0:1], v[2:3], v[2:3], v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], v[0:1], 1.0
	v_frexp_mant_f64_e32 v[4:5], v[2:3]
	v_frexp_exp_i32_f64_e32 v8, v[2:3]
	v_add_f64 v[6:7], v[2:3], -1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e32 vcc_lo, s[2:3], v[4:5]
	s_mov_b32 s2, 0x55555780
	v_add_f64 v[4:5], v[6:7], -v[2:3]
	v_add_f64 v[6:7], v[0:1], -v[6:7]
	v_subrev_co_ci_u32_e32 v30, vcc_lo, 0, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[4:5], v[4:5], 1.0
	v_sub_nc_u32_e32 v10, 0, v30
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[2:3], v[2:3], v10
	v_add_f64 v[4:5], v[6:7], v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[8:9], v[2:3], 1.0
	v_add_f64 v[14:15], v[2:3], -1.0
	v_ldexp_f64 v[4:5], v[4:5], v10
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[6:7], v[8:9], -1.0
	v_add_f64 v[16:17], v[14:15], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[2:3], -v[6:7]
	v_add_f64 v[2:3], v[2:3], -v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[4:5], v[6:7]
	v_add_f64 v[2:3], v[4:5], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[8:9], v[6:7]
	v_add_f64 v[16:17], v[14:15], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_rcp_f64_e32 v[12:13], v[10:11]
	v_add_f64 v[8:9], v[10:11], -v[8:9]
	v_add_f64 v[14:15], v[16:17], -v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[6:7], -v[8:9]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[18:19], -v[10:11], v[12:13], 1.0
	v_add_f64 v[2:3], v[2:3], -v[14:15]
	v_fma_f64 v[12:13], v[18:19], v[12:13], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], -v[10:11], v[12:13], 1.0
	v_fma_f64 v[4:5], v[4:5], v[12:13], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[12:13], v[16:17], v[4:5]
	v_mul_f64 v[18:19], v[10:11], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], v[12:13], v[10:11], -v[18:19]
	v_fma_f64 v[8:9], v[12:13], v[6:7], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[20:21], v[18:19], v[8:9]
	v_add_f64 v[22:23], v[16:17], -v[20:21]
	v_add_f64 v[14:15], v[20:21], -v[18:19]
	v_max_f64 v[18:19], |v[74:75]|, |v[74:75]|
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[16:17], v[16:17], -v[22:23]
	v_add_f64 v[8:9], v[14:15], -v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[16:17], v[16:17], -v[20:21]
	v_max_f64 v[20:21], |v[78:79]|, |v[78:79]|
	v_add_f64 v[2:3], v[2:3], v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_min_f64 v[18:19], v[20:21], v[18:19]
	v_add_f64 v[2:3], v[8:9], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[22:23], v[2:3]
	v_mul_f64 v[14:15], v[4:5], v[8:9]
	v_add_f64 v[22:23], v[22:23], -v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[16:17], v[10:11], v[14:15]
	v_add_f64 v[2:3], v[2:3], v[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[10:11], v[14:15], v[10:11], -v[16:17]
	v_fma_f64 v[6:7], v[14:15], v[6:7], v[10:11]
	v_div_scale_f64 v[10:11], null, v[80:81], v[80:81], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[20:21], v[16:17], v[6:7]
	v_rcp_f64_e32 v[24:25], v[10:11]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[26:27], v[8:9], -v[20:21]
	v_add_f64 v[16:17], v[20:21], -v[16:17]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[28:29], -v[10:11], v[24:25], 1.0
	v_add_f64 v[8:9], v[8:9], -v[26:27]
	v_add_f64 v[6:7], v[16:17], -v[6:7]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[24:25], v[24:25], v[28:29], v[24:25]
	v_add_f64 v[8:9], v[8:9], -v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[20:21], -v[10:11], v[24:25], 1.0
	v_add_f64 v[2:3], v[2:3], v[8:9]
	v_div_scale_f64 v[8:9], vcc_lo, v[18:19], v[80:81], v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fma_f64 v[16:17], v[24:25], v[20:21], v[24:25]
	v_add_f64 v[20:21], v[12:13], v[14:15]
	v_add_f64 v[2:3], v[6:7], v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[6:7], v[8:9], v[16:17]
	v_add_f64 v[12:13], v[20:21], -v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[2:3], v[26:27], v[2:3]
	v_fma_f64 v[8:9], -v[10:11], v[6:7], v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[10:11], v[14:15], -v[12:13]
	v_mul_f64 v[2:3], v[4:5], v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_div_fmas_f64 v[4:5], v[8:9], v[16:17], v[6:7]
	v_cmp_eq_f64_e32 vcc_lo, 0x7ff00000, v[0:1]
	v_add_f64 v[2:3], v[10:11], v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fixup_f64 v[4:5], v[4:5], v[80:81], v[18:19]
                                        ; implicit-def: $vgpr80_vgpr81
	v_add_f64 v[6:7], v[20:21], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[8:9], v[4:5], v[4:5]
	v_mul_f64 v[10:11], v[6:7], v[6:7]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[12:13], v[8:9], s[18:19], s[16:17]
	s_mov_b32 s16, 0x6b47b09a
	s_mov_b32 s18, 0xbf559e2b
	s_mov_b32 s17, 0x3fc38538
	s_mov_b32 s19, 0x3fc3ab76
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[14:15], v[10:11], s[18:19], s[16:17]
	s_mov_b32 s16, 0x69efb384
	s_mov_b32 s17, 0x3f4b2bb0
	v_mul_f64 v[16:17], v[6:7], v[10:11]
	s_delay_alu instid0(VALU_DEP_3)
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[16:17]
	s_mov_b32 s16, 0xd7f4df2e
	s_mov_b32 s17, 0x3fc7474d
	s_delay_alu instid0(VALU_DEP_3) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[14:15], v[10:11], v[14:15], s[16:17]
	s_mov_b32 s16, 0xaf56de9b
	s_mov_b32 s17, 0xbf67952d
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[16:17]
	s_mov_b32 s16, 0x16291751
	s_mov_b32 s17, 0x3fcc71c0
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[14:15], v[10:11], v[14:15], s[16:17]
	s_mov_b32 s16, 0xa595c56f
	s_mov_b32 s17, 0x3f7d6d43
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[16:17]
	s_mov_b32 s16, 0x9b27acf1
	s_mov_b32 s17, 0x3fd24924
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[14:15], v[10:11], v[14:15], s[16:17]
	s_mov_b32 s16, 0xa57d9582
	s_mov_b32 s17, 0xbf8c6ea4
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[16:17]
	s_mov_b32 s16, 0x998ef7b6
	s_mov_b32 s17, 0x3fd99999
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[14:15], v[10:11], v[14:15], s[16:17]
	s_mov_b32 s16, 0x5f08b19f
	s_mov_b32 s17, 0x3f967e29
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[16:17]
	s_mov_b32 s16, 0x6ef28734
	s_mov_b32 s17, 0x3fa82d5d
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_fma_f64 v[10:11], v[10:11], v[14:15], s[2:3]
	s_mov_b32 s2, 0xfc27006a
	s_mov_b32 s3, 0xbf9e9ae6
	v_ldexp_f64 v[14:15], v[6:7], 1
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[2:3]
	s_mov_b32 s2, 0x5711927a
	s_mov_b32 s3, 0x3fa2c15b
	v_add_f64 v[6:7], v[6:7], -v[20:21]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_mul_f64 v[10:11], v[16:17], v[10:11]
	v_cvt_f64_i32_e32 v[16:17], v30
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[2:3]
	s_mov_b32 s2, 0xe82d3ff0
	s_mov_b32 s3, 0xbfa59976
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[2:3], v[2:3], -v[6:7]
	v_add_f64 v[18:19], v[14:15], v[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[2:3]
	s_mov_b32 s2, 0xfefa39ef
	s_mov_b32 s3, 0x3fe62e42
	v_ldexp_f64 v[2:3], v[2:3], 1
	v_mul_f64 v[20:21], v[16:17], s[2:3]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[6:7], v[18:19], -v[14:15]
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[14:15], v[16:17], s[2:3], -v[20:21]
	s_mov_b32 s2, 0x6a214619
	s_mov_b32 s3, 0xbfaae5ce
	v_add_f64 v[6:7], v[10:11], -v[6:7]
	s_delay_alu instid0(VALU_DEP_3)
	v_fma_f64 v[10:11], v[8:9], v[12:13], s[2:3]
	s_mov_b32 s2, 0x3b39803f
	s_mov_b32 s3, 0x3c7abc9e
	s_delay_alu instid0(VALU_DEP_3) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[16:17], s[2:3], v[14:15]
	s_mov_b32 s2, 0x8427b883
	s_mov_b32 s3, 0x3fae1bb4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[2:3], v[2:3], v[6:7]
	v_fma_f64 v[6:7], v[8:9], v[10:11], s[2:3]
	s_mov_b32 s2, 0x8b207f05
	s_mov_b32 s3, 0xbfb110e4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[10:11], v[20:21], v[12:13]
	v_add_f64 v[14:15], v[18:19], v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[6:7], v[8:9], v[6:7], s[2:3]
	s_mov_b32 s2, 0x57b87036
	s_mov_b32 s3, 0x3fb3b136
	v_add_f64 v[20:21], v[10:11], -v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[16:17], v[10:11], v[14:15]
	v_add_f64 v[18:19], v[14:15], -v[18:19]
	v_fma_f64 v[6:7], v[8:9], v[6:7], s[2:3]
	s_mov_b32 s2, 0x19378e4f
	s_mov_b32 s3, 0xbfb745d1
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[12:13], v[12:13], -v[20:21]
	v_add_f64 v[22:23], v[16:17], -v[10:11]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[2:3], v[2:3], -v[18:19]
	v_fma_f64 v[6:7], v[8:9], v[6:7], s[2:3]
	s_mov_b32 s2, 0x17e1913c
	s_mov_b32 s3, 0x3fbc71c7
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[24:25], v[16:17], -v[22:23]
	v_add_f64 v[14:15], v[14:15], -v[22:23]
	v_add_f64 v[18:19], v[12:13], v[2:3]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f64 v[6:7], v[8:9], v[6:7], s[2:3]
	s_mov_b32 s2, 0x92376b7d
	s_mov_b32 s3, 0xbfc24924
	v_add_f64 v[10:11], v[10:11], -v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[6:7], v[8:9], v[6:7], s[2:3]
	s_mov_b32 s2, 0x999952cc
	s_mov_b32 s3, 0x3fc99999
	v_add_f64 v[10:11], v[14:15], v[10:11]
	v_add_f64 v[14:15], v[18:19], -v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[6:7], v[8:9], v[6:7], s[2:3]
	s_mov_b32 s2, 0x55555523
	s_mov_b32 s3, 0xbfd55555
	v_add_f64 v[10:11], v[18:19], v[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[18:19], v[18:19], -v[14:15]
	v_add_f64 v[2:3], v[2:3], -v[14:15]
	v_fma_f64 v[6:7], v[8:9], v[6:7], s[2:3]
	s_mov_b32 s2, 0x54442d18
	s_mov_b32 s3, 0x3ff921fb
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[20:21], v[16:17], v[10:11]
	v_mul_f64 v[6:7], v[8:9], v[6:7]
	v_add_f64 v[8:9], v[12:13], -v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[20:21], -v[16:17]
	v_fma_f64 v[4:5], v[4:5], v[6:7], v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[2:3], v[2:3], v[8:9]
	v_add_f64 v[6:7], v[10:11], -v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[8:9], -v[4:5], s[2:3]
	s_mov_b32 s3, 0x400921fb
	v_add_f64 v[2:3], v[2:3], v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v5, v5, v9, s0
	v_cndmask_b32_e64 v4, v4, v8, s0
	v_ashrrev_i32_e32 v9, 31, v79
                                        ; implicit-def: $vgpr78_vgpr79
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_f64 v[6:7], -v[4:5], s[2:3]
	v_add_f64 v[2:3], v[20:21], v[2:3]
	v_mov_b32_e32 v8, 0x7f3321d2
	v_cndmask_b32_e64 v4, v4, v6, s1
	v_mov_b32_e32 v6, 0x4002d97c
	v_cndmask_b32_e64 v5, v5, v7, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v6, 0x3fe921fb, v6, s1
	v_bfi_b32 v6, 0x7fffffff, v6, v75
	v_and_b32_e32 v10, 0x54442d18, v9
	v_and_b32_e32 v9, 0x400921fb, v9
	v_dual_cndmask_b32 v3, v3, v1 :: v_dual_cndmask_b32 v2, v2, v0
	v_cmp_eq_f64_e32 vcc_lo, 0, v[74:75]
	v_cndmask_b32_e64 v8, 0x54442d18, v8, s1
	v_cmp_nge_f64_e64 s1, -1.0, v[0:1]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_mul_f64 v[2:3], v[2:3], 0.5
	v_cndmask_b32_e32 v10, v4, v10, vcc_lo
	v_cndmask_b32_e32 v4, v5, v9, vcc_lo
	v_cmp_ngt_f64_e32 vcc_lo, -1.0, v[0:1]
	v_cndmask_b32_e32 v3, 0x7ff80000, v3, vcc_lo
	s_and_b32 vcc_lo, s8, s9
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v7, v4, v6, vcc_lo
	v_cndmask_b32_e64 v4, 0, v2, s1
	v_cmp_neq_f64_e64 s1, -1.0, v[0:1]
	v_cndmask_b32_e32 v6, v10, v8, vcc_lo
                                        ; implicit-def: $vgpr10_vgpr11
	v_cndmask_b32_e64 v5, 0xfff00000, v3, s1
                                        ; implicit-def: $vgpr2_vgpr3
.LBB0_116:                              ; %Flow426
	s_and_not1_saveexec_b32 s14, s14
	s_cbranch_execz .LBB0_128
; %bb.117:
	v_mul_f64 v[0:1], v[2:3], v[2:3]
	s_mov_b32 s2, 0x66666666
	s_mov_b32 s3, 0x3fe66666
                                        ; implicit-def: $vgpr4_vgpr5
                                        ; implicit-def: $vgpr6_vgpr7
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[0:1], v[10:11], v[10:11], v[0:1]
	v_cmpx_ge_f64_e32 s[2:3], v[0:1]
	s_xor_b32 s15, exec_lo, s1
	s_cbranch_execz .LBB0_119
; %bb.118:
	v_frexp_mant_f64_e32 v[2:3], v[0:1]
	s_mov_b32 s3, 0x3fe55555
	s_mov_b32 s2, 0x55555555
	v_max_f64 v[12:13], |v[78:79]|, |v[78:79]|
	s_mov_b32 s16, 0xbd3237f4
	s_mov_b32 s18, 0xb5e68a13
	s_mov_b32 s17, 0xbf23e260
	s_mov_b32 s19, 0x3eeba404
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e64 s1, s[2:3], v[2:3]
	s_mov_b32 s2, 0x55555780
	v_cndmask_b32_e64 v4, 0, 1, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[2:3], v[2:3], v4
	v_add_f64 v[4:5], v[2:3], 1.0
	v_add_f64 v[10:11], v[2:3], -1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[6:7], v[4:5]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[8:9], -v[4:5], v[6:7], 1.0
	v_fma_f64 v[6:7], v[8:9], v[6:7], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], -v[4:5], v[6:7], 1.0
	v_fma_f64 v[6:7], v[8:9], v[6:7], v[6:7]
	v_max_f64 v[8:9], |v[74:75]|, |v[74:75]|
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[14:15], v[10:11], v[6:7]
	v_min_f64 v[8:9], v[12:13], v[8:9]
	v_add_f64 v[12:13], v[4:5], -1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[16:17], v[4:5], v[14:15]
	v_div_scale_f64 v[18:19], null, v[80:81], v[80:81], v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[2:3], v[2:3], -v[12:13]
	v_div_scale_f64 v[24:25], vcc_lo, v[8:9], v[80:81], v[8:9]
	v_fma_f64 v[4:5], v[14:15], v[4:5], -v[16:17]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[12:13], v[18:19]
	v_fma_f64 v[2:3], v[14:15], v[2:3], v[4:5]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[4:5], -v[18:19], v[12:13], 1.0
	v_add_f64 v[20:21], v[16:17], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[4:5], v[12:13], v[4:5], v[12:13]
	v_add_f64 v[12:13], v[10:11], -v[20:21]
	v_add_f64 v[16:17], v[20:21], -v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[22:23], -v[18:19], v[4:5], 1.0
	v_add_f64 v[10:11], v[10:11], -v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[2:3], v[16:17], -v[2:3]
	v_fma_f64 v[4:5], v[4:5], v[22:23], v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[10:11], v[10:11], -v[20:21]
	v_frexp_exp_i32_f64_e32 v20, v[0:1]
	v_mul_f64 v[16:17], v[24:25], v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[2:3], v[2:3], v[10:11]
	v_fma_f64 v[10:11], -v[18:19], v[16:17], v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[2:3], v[12:13], v[2:3]
	v_div_fmas_f64 v[4:5], v[10:11], v[4:5], v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[2:3], v[6:7], v[2:3]
	v_div_fixup_f64 v[4:5], v[4:5], v[80:81], v[8:9]
                                        ; implicit-def: $vgpr80_vgpr81
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[14:15], v[2:3]
	v_mul_f64 v[8:9], v[4:5], v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[10:11], v[6:7], v[6:7]
	v_fma_f64 v[12:13], v[8:9], s[18:19], s[16:17]
	s_mov_b32 s16, 0x6b47b09a
	s_mov_b32 s18, 0xbf559e2b
	s_mov_b32 s17, 0x3fc38538
	s_mov_b32 s19, 0x3fc3ab76
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[10:11], s[18:19], s[16:17]
	s_mov_b32 s16, 0x69efb384
	s_mov_b32 s17, 0x3f4b2bb0
	v_mul_f64 v[18:19], v[6:7], v[10:11]
	s_delay_alu instid0(VALU_DEP_3)
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[16:17]
	s_mov_b32 s16, 0xd7f4df2e
	s_mov_b32 s17, 0x3fc7474d
	s_delay_alu instid0(VALU_DEP_3) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[10:11], v[16:17], s[16:17]
	s_mov_b32 s16, 0xaf56de9b
	s_mov_b32 s17, 0xbf67952d
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[16:17]
	s_mov_b32 s16, 0x16291751
	s_mov_b32 s17, 0x3fcc71c0
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[10:11], v[16:17], s[16:17]
	s_mov_b32 s16, 0xa595c56f
	s_mov_b32 s17, 0x3f7d6d43
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[16:17]
	s_mov_b32 s16, 0x9b27acf1
	s_mov_b32 s17, 0x3fd24924
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[10:11], v[16:17], s[16:17]
	s_mov_b32 s16, 0xa57d9582
	s_mov_b32 s17, 0xbf8c6ea4
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[16:17]
	s_mov_b32 s16, 0x998ef7b6
	s_mov_b32 s17, 0x3fd99999
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[10:11], v[16:17], s[16:17]
	s_mov_b32 s16, 0x5f08b19f
	s_mov_b32 s17, 0x3f967e29
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[16:17]
	s_mov_b32 s16, 0x6ef28734
	s_mov_b32 s17, 0x3fa82d5d
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_fma_f64 v[10:11], v[10:11], v[16:17], s[2:3]
	s_mov_b32 s2, 0xfc27006a
	s_mov_b32 s3, 0xbf9e9ae6
	v_ldexp_f64 v[16:17], v[6:7], 1
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[2:3]
	s_mov_b32 s2, 0x5711927a
	s_mov_b32 s3, 0x3fa2c15b
	v_add_f64 v[6:7], v[6:7], -v[14:15]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_mul_f64 v[10:11], v[18:19], v[10:11]
	v_subrev_co_ci_u32_e64 v18, vcc_lo, 0, v20, s1
	v_cmp_eq_f64_e32 vcc_lo, 0x7ff00000, v[0:1]
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[2:3]
	s_mov_b32 s2, 0xe82d3ff0
	v_cvt_f64_i32_e32 v[18:19], v18
	s_mov_b32 s3, 0xbfa59976
	v_add_f64 v[2:3], v[2:3], -v[6:7]
	v_cmp_gt_i32_e64 s1, 0, v79
	v_add_f64 v[14:15], v[16:17], v[10:11]
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[2:3]
	s_mov_b32 s2, 0xfefa39ef
	s_mov_b32 s3, 0x3fe62e42
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_mul_f64 v[20:21], v[18:19], s[2:3]
	v_ldexp_f64 v[2:3], v[2:3], 1
	v_add_f64 v[6:7], v[14:15], -v[16:17]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[16:17]
	v_fma_f64 v[16:17], v[18:19], s[2:3], -v[20:21]
	s_mov_b32 s2, 0x6a214619
	s_mov_b32 s3, 0xbfaae5ce
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[6:7], v[10:11], -v[6:7]
	v_fma_f64 v[10:11], v[8:9], v[12:13], s[2:3]
	s_mov_b32 s2, 0x3b39803f
	s_mov_b32 s3, 0x3c7abc9e
	s_delay_alu instid0(VALU_DEP_3) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[18:19], s[2:3], v[16:17]
	s_mov_b32 s2, 0x8427b883
	s_mov_b32 s3, 0x3fae1bb4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[2:3], v[2:3], v[6:7]
	v_fma_f64 v[6:7], v[8:9], v[10:11], s[2:3]
	s_mov_b32 s2, 0x8b207f05
	s_mov_b32 s3, 0xbfb110e4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[10:11], v[20:21], v[12:13]
	v_add_f64 v[16:17], v[14:15], v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[6:7], v[8:9], v[6:7], s[2:3]
	s_mov_b32 s2, 0x57b87036
	s_mov_b32 s3, 0x3fb3b136
	v_add_f64 v[20:21], v[10:11], -v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[18:19], v[10:11], v[16:17]
	v_add_f64 v[14:15], v[16:17], -v[14:15]
	v_fma_f64 v[6:7], v[8:9], v[6:7], s[2:3]
	s_mov_b32 s2, 0x19378e4f
	s_mov_b32 s3, 0xbfb745d1
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[12:13], v[12:13], -v[20:21]
	v_add_f64 v[22:23], v[18:19], -v[10:11]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[2:3], v[2:3], -v[14:15]
	v_fma_f64 v[6:7], v[8:9], v[6:7], s[2:3]
	s_mov_b32 s2, 0x17e1913c
	s_mov_b32 s3, 0x3fbc71c7
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[24:25], v[18:19], -v[22:23]
	v_add_f64 v[14:15], v[16:17], -v[22:23]
	v_add_f64 v[16:17], v[12:13], v[2:3]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f64 v[6:7], v[8:9], v[6:7], s[2:3]
	s_mov_b32 s2, 0x92376b7d
	s_mov_b32 s3, 0xbfc24924
	v_add_f64 v[10:11], v[10:11], -v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[6:7], v[8:9], v[6:7], s[2:3]
	s_mov_b32 s2, 0x999952cc
	s_mov_b32 s3, 0x3fc99999
	v_add_f64 v[10:11], v[14:15], v[10:11]
	v_add_f64 v[14:15], v[16:17], -v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[6:7], v[8:9], v[6:7], s[2:3]
	s_mov_b32 s2, 0x55555523
	s_mov_b32 s3, 0xbfd55555
	v_add_f64 v[10:11], v[16:17], v[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[16:17], v[16:17], -v[14:15]
	v_add_f64 v[2:3], v[2:3], -v[14:15]
	v_fma_f64 v[6:7], v[8:9], v[6:7], s[2:3]
	s_mov_b32 s2, 0x54442d18
	s_mov_b32 s3, 0x3ff921fb
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[20:21], v[18:19], v[10:11]
	v_mul_f64 v[6:7], v[8:9], v[6:7]
	v_add_f64 v[8:9], v[12:13], -v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[20:21], -v[18:19]
	v_fma_f64 v[4:5], v[4:5], v[6:7], v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[2:3], v[2:3], v[8:9]
	v_add_f64 v[6:7], v[10:11], -v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[8:9], -v[4:5], s[2:3]
	s_mov_b32 s3, 0x400921fb
	v_add_f64 v[2:3], v[2:3], v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v5, v5, v9, s0
	v_cndmask_b32_e64 v4, v4, v8, s0
	v_ashrrev_i32_e32 v9, 31, v79
                                        ; implicit-def: $vgpr78_vgpr79
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[6:7], -v[4:5], s[2:3]
	v_cmp_eq_f64_e64 s2, 0, v[74:75]
	v_and_b32_e32 v10, 0x54442d18, v9
	v_add_f64 v[2:3], v[20:21], v[2:3]
	v_mov_b32_e32 v8, 0x7f3321d2
	v_cndmask_b32_e64 v4, v4, v6, s1
	v_cndmask_b32_e64 v5, v5, v7, s1
	s_delay_alu instid0(VALU_DEP_2)
	v_cndmask_b32_e64 v6, v4, v10, s2
                                        ; implicit-def: $vgpr10_vgpr11
	v_dual_cndmask_b32 v3, v3, v1 :: v_dual_cndmask_b32 v2, v2, v0
	v_cmp_neq_f64_e32 vcc_lo, 0, v[0:1]
	v_and_b32_e32 v1, 0x400921fb, v9
	v_mov_b32_e32 v0, 0x4002d97c
	v_cndmask_b32_e64 v8, 0x54442d18, v8, s1
	v_mul_f64 v[2:3], v[2:3], 0.5
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v1, v5, v1, s2
	v_cndmask_b32_e64 v0, 0x3fe921fb, v0, s1
	s_and_b32 s1, s8, s9
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v6, v6, v8, s1
	v_bfi_b32 v0, 0x7fffffff, v0, v75
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v7, v1, v0, s1
	v_cndmask_b32_e32 v5, 0xfff00000, v3, vcc_lo
	v_cndmask_b32_e32 v4, 0, v2, vcc_lo
                                        ; implicit-def: $vgpr2_vgpr3
.LBB0_119:                              ; %Flow423
	s_and_not1_saveexec_b32 s15, s15
	s_cbranch_execz .LBB0_127
; %bb.120:
	v_dual_mov_b32 v0, 0 :: v_dual_and_b32 v1, -8, v11
	v_and_b32_e32 v5, -8, v3
	s_mov_b32 s1, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mov_b32_e32 v4, v0
	v_add_f64 v[6:7], v[10:11], -v[0:1]
	v_mov_b32_e32 v8, v0
	v_add_f64 v[12:13], v[0:1], v[0:1]
	s_delay_alu instid0(VALU_DEP_4)
	v_add_f64 v[2:3], v[2:3], -v[4:5]
	v_mov_b32_e32 v10, v0
	v_add_f64 v[14:15], v[4:5], v[4:5]
	v_mul_f64 v[0:1], v[0:1], v[0:1]
	v_and_b32_e32 v9, -8, v7
	v_and_b32_e32 v11, -8, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[18:19], v[6:7], -v[8:9]
	v_add_f64 v[16:17], v[8:9], v[8:9]
	v_add_f64 v[22:23], v[2:3], -v[10:11]
	v_add_f64 v[24:25], v[10:11], v[10:11]
	v_mul_f64 v[2:3], v[4:5], v[4:5]
	v_mul_f64 v[4:5], v[12:13], v[8:9]
	v_mul_f64 v[8:9], v[8:9], v[8:9]
	v_mul_f64 v[6:7], v[14:15], v[10:11]
	v_mul_f64 v[10:11], v[10:11], v[10:11]
	v_mul_f64 v[12:13], v[12:13], v[18:19]
	v_mul_f64 v[16:17], v[16:17], v[18:19]
	v_mul_f64 v[20:21], v[18:19], v[18:19]
	v_mul_f64 v[14:15], v[14:15], v[22:23]
	v_mul_f64 v[18:19], v[24:25], v[22:23]
	v_mul_f64 v[22:23], v[22:23], v[22:23]
.LBB0_121:                              ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_122 Depth 2
	v_dual_mov_b32 v76, 1 :: v_dual_mov_b32 v73, v1
	v_mov_b32_e32 v72, v0
	s_mov_b32 s2, 0
.LBB0_122:                              ;   Parent Loop BB0_121 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s3, s2, 1
	v_dual_mov_b32 v63, v31 :: v_dual_mov_b32 v62, v30
	s_lshl_b32 s16, s3, 1
	v_dual_mov_b32 v33, v1 :: v_dual_mov_b32 v32, v0
	s_mov_b32 m0, s16
	s_lshl_b32 s2, s2, 1
	v_movrels_b32_e32 v82, v0
	v_movrels_b32_e32 v83, v1
	s_mov_b32 m0, s2
	v_dual_mov_b32 v61, v29 :: v_dual_mov_b32 v60, v28
	v_dual_mov_b32 v59, v27 :: v_dual_mov_b32 v58, v26
	s_delay_alu instid0(VALU_DEP_3)
	v_cmp_lt_f64_e32 vcc_lo, v[72:73], v[82:83]
	v_dual_mov_b32 v57, v25 :: v_dual_mov_b32 v56, v24
	v_dual_mov_b32 v55, v23 :: v_dual_mov_b32 v54, v22
	v_dual_mov_b32 v53, v21 :: v_dual_mov_b32 v52, v20
	v_dual_mov_b32 v51, v19 :: v_dual_mov_b32 v50, v18
	v_dual_mov_b32 v49, v17 :: v_dual_mov_b32 v48, v16
	v_dual_mov_b32 v47, v15 :: v_dual_mov_b32 v46, v14
	v_dual_mov_b32 v45, v13 :: v_dual_mov_b32 v44, v12
	v_dual_mov_b32 v43, v11 :: v_dual_mov_b32 v42, v10
	v_dual_mov_b32 v41, v9 :: v_dual_mov_b32 v40, v8
	v_dual_mov_b32 v39, v7 :: v_dual_mov_b32 v38, v6
	v_dual_mov_b32 v37, v5 :: v_dual_mov_b32 v36, v4
	v_dual_mov_b32 v35, v3 :: v_dual_mov_b32 v34, v2
	v_movreld_b32_e32 v32, v82
	v_movreld_b32_e32 v33, v83
	s_mov_b32 m0, s16
	s_cmp_lg_u32 s3, 11
	v_movreld_b32_e32 v32, v72
	v_movreld_b32_e32 v33, v73
	s_mov_b32 s2, s3
	v_dual_cndmask_b32 v31, v31, v63 :: v_dual_cndmask_b32 v30, v30, v62
	v_dual_cndmask_b32 v29, v29, v61 :: v_dual_cndmask_b32 v28, v28, v60
	v_dual_cndmask_b32 v27, v27, v59 :: v_dual_cndmask_b32 v26, v26, v58
	v_dual_cndmask_b32 v25, v25, v57 :: v_dual_cndmask_b32 v24, v24, v56
	v_dual_cndmask_b32 v23, v23, v55 :: v_dual_cndmask_b32 v22, v22, v54
	v_dual_cndmask_b32 v21, v21, v53 :: v_dual_cndmask_b32 v20, v20, v52
	v_dual_cndmask_b32 v19, v19, v51 :: v_dual_cndmask_b32 v18, v18, v50
	v_dual_cndmask_b32 v17, v17, v49 :: v_dual_cndmask_b32 v16, v16, v48
	v_dual_cndmask_b32 v15, v15, v47 :: v_dual_cndmask_b32 v14, v14, v46
	v_dual_cndmask_b32 v13, v13, v45 :: v_dual_cndmask_b32 v12, v12, v44
	v_dual_cndmask_b32 v11, v11, v43 :: v_dual_cndmask_b32 v10, v10, v42
	v_dual_cndmask_b32 v9, v9, v41 :: v_dual_cndmask_b32 v8, v8, v40
	v_dual_cndmask_b32 v7, v7, v39 :: v_dual_cndmask_b32 v6, v6, v38
	v_dual_cndmask_b32 v5, v5, v37 :: v_dual_cndmask_b32 v4, v4, v36
	v_dual_cndmask_b32 v3, v3, v35 :: v_dual_cndmask_b32 v2, v2, v34
	v_dual_cndmask_b32 v1, v1, v33 :: v_dual_cndmask_b32 v0, v0, v32
	v_dual_cndmask_b32 v73, v83, v73 :: v_dual_cndmask_b32 v72, v82, v72
	v_cndmask_b32_e64 v76, v76, 0, vcc_lo
	s_cbranch_scc1 .LBB0_122
; %bb.123:                              ;   in Loop: Header=BB0_121 Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_ne_u32_e32 vcc_lo, 0, v76
	s_or_b32 s1, vcc_lo, s1
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB0_121
; %bb.124:                              ; %.preheader.i.i.i215.preheader
	s_or_b32 exec_lo, exec_lo, s1
	v_mov_b32_e32 v32, 0
	v_mov_b32_e32 v33, 0xbff00000
	s_mov_b32 s1, 0
.LBB0_125:                              ; %.preheader.i.i.i215
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b32 s2, s1, 1
	s_add_i32 s1, s1, 1
	s_mov_b32 m0, s2
	s_cmp_lg_u32 s1, 12
	v_movrels_b32_e32 v35, v1
	v_movrels_b32_e32 v34, v0
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[32:33], v[32:33], v[34:35]
	s_cbranch_scc1 .LBB0_125
; %bb.126:
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[0:1], v[32:33], 1.0
	s_mov_b32 s3, 0x3fe55555
	s_mov_b32 s2, 0x55555555
	s_mov_b32 s16, 0xbd3237f4
	s_mov_b32 s18, 0xb5e68a13
	s_mov_b32 s17, 0xbf23e260
	s_mov_b32 s19, 0x3eeba404
	v_cmp_gt_i32_e64 s1, 0, v79
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_frexp_mant_f64_e32 v[2:3], v[0:1]
	v_frexp_exp_i32_f64_e32 v6, v[0:1]
	v_add_f64 v[4:5], v[0:1], -1.0
	v_cmp_gt_f64_e32 vcc_lo, s[2:3], v[2:3]
	s_mov_b32 s2, 0x55555780
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_f64 v[2:3], v[4:5], -v[0:1]
	v_add_f64 v[4:5], v[32:33], -v[4:5]
	v_subrev_co_ci_u32_e32 v28, vcc_lo, 0, v6, vcc_lo
	v_add_f64 v[2:3], v[2:3], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v8, 0, v28
	v_ldexp_f64 v[0:1], v[0:1], v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[2:3], v[4:5], v[2:3]
	v_add_f64 v[6:7], v[0:1], 1.0
	v_add_f64 v[12:13], v[0:1], -1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[2:3], v[2:3], v8
	v_add_f64 v[4:5], v[6:7], -1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[14:15], v[12:13], 1.0
	v_add_f64 v[4:5], v[0:1], -v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[0:1], v[0:1], -v[14:15]
	v_add_f64 v[4:5], v[2:3], v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[0:1], v[2:3], v[0:1]
	v_add_f64 v[8:9], v[6:7], v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[14:15], v[12:13], v[0:1]
	v_rcp_f64_e32 v[10:11], v[8:9]
	v_add_f64 v[6:7], v[8:9], -v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[12:13], v[14:15], -v[12:13]
	v_add_f64 v[4:5], v[4:5], -v[6:7]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[16:17], -v[8:9], v[10:11], 1.0
	v_add_f64 v[0:1], v[0:1], -v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[10:11], v[16:17], v[10:11], v[10:11]
	v_fma_f64 v[2:3], -v[8:9], v[10:11], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[2:3], v[2:3], v[10:11], v[10:11]
	v_mul_f64 v[10:11], v[14:15], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[16:17], v[8:9], v[10:11]
	v_fma_f64 v[6:7], v[10:11], v[8:9], -v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], v[10:11], v[4:5], v[6:7]
	v_add_f64 v[18:19], v[16:17], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_f64 v[20:21], v[14:15], -v[18:19]
	v_add_f64 v[12:13], v[18:19], -v[16:17]
	v_max_f64 v[16:17], |v[74:75]|, |v[74:75]|
	v_add_f64 v[14:15], v[14:15], -v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[12:13], -v[6:7]
	v_add_f64 v[14:15], v[14:15], -v[18:19]
	v_max_f64 v[18:19], |v[78:79]|, |v[78:79]|
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[0:1], v[0:1], v[14:15]
	v_min_f64 v[16:17], v[18:19], v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[0:1], v[6:7], v[0:1]
	v_add_f64 v[6:7], v[20:21], v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[12:13], v[2:3], v[6:7]
	v_add_f64 v[20:21], v[20:21], -v[6:7]
	v_mul_f64 v[14:15], v[8:9], v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[0:1], v[0:1], v[20:21]
	v_fma_f64 v[8:9], v[12:13], v[8:9], -v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[4:5], v[12:13], v[4:5], v[8:9]
	v_div_scale_f64 v[8:9], null, v[80:81], v[80:81], v[16:17]
	v_add_f64 v[18:19], v[14:15], v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[22:23], v[8:9]
	v_add_f64 v[24:25], v[6:7], -v[18:19]
	v_add_f64 v[14:15], v[18:19], -v[14:15]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[26:27], -v[8:9], v[22:23], 1.0
	v_add_f64 v[6:7], v[6:7], -v[24:25]
	v_add_f64 v[4:5], v[14:15], -v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[22:23], v[22:23], v[26:27], v[22:23]
	v_add_f64 v[6:7], v[6:7], -v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[18:19], -v[8:9], v[22:23], 1.0
	v_add_f64 v[0:1], v[0:1], v[6:7]
	v_div_scale_f64 v[6:7], vcc_lo, v[16:17], v[80:81], v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fma_f64 v[14:15], v[22:23], v[18:19], v[22:23]
	v_add_f64 v[18:19], v[10:11], v[12:13]
	v_add_f64 v[0:1], v[4:5], v[0:1]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[4:5], v[6:7], v[14:15]
	v_add_f64 v[10:11], v[18:19], -v[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[0:1], v[24:25], v[0:1]
	v_fma_f64 v[6:7], -v[8:9], v[4:5], v[6:7]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[8:9], v[12:13], -v[10:11]
	v_mul_f64 v[0:1], v[2:3], v[0:1]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_div_fmas_f64 v[2:3], v[6:7], v[14:15], v[4:5]
	v_cmp_eq_f64_e32 vcc_lo, 0x7ff00000, v[32:33]
	v_add_f64 v[0:1], v[8:9], v[0:1]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fixup_f64 v[2:3], v[2:3], v[80:81], v[16:17]
	v_add_f64 v[4:5], v[18:19], v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[6:7], v[2:3], v[2:3]
	v_mul_f64 v[8:9], v[4:5], v[4:5]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[10:11], v[6:7], s[18:19], s[16:17]
	s_mov_b32 s16, 0x6b47b09a
	s_mov_b32 s18, 0xbf559e2b
	s_mov_b32 s17, 0x3fc38538
	s_mov_b32 s19, 0x3fc3ab76
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[8:9], s[18:19], s[16:17]
	s_mov_b32 s16, 0x69efb384
	s_mov_b32 s17, 0x3f4b2bb0
	v_mul_f64 v[14:15], v[4:5], v[8:9]
	s_delay_alu instid0(VALU_DEP_3)
	v_fma_f64 v[10:11], v[6:7], v[10:11], s[16:17]
	s_mov_b32 s16, 0xd7f4df2e
	s_mov_b32 s17, 0x3fc7474d
	s_delay_alu instid0(VALU_DEP_3) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[16:17]
	s_mov_b32 s16, 0xaf56de9b
	s_mov_b32 s17, 0xbf67952d
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[10:11], v[6:7], v[10:11], s[16:17]
	s_mov_b32 s16, 0x16291751
	s_mov_b32 s17, 0x3fcc71c0
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[16:17]
	s_mov_b32 s16, 0xa595c56f
	s_mov_b32 s17, 0x3f7d6d43
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[10:11], v[6:7], v[10:11], s[16:17]
	s_mov_b32 s16, 0x9b27acf1
	s_mov_b32 s17, 0x3fd24924
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[16:17]
	s_mov_b32 s16, 0xa57d9582
	s_mov_b32 s17, 0xbf8c6ea4
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[10:11], v[6:7], v[10:11], s[16:17]
	s_mov_b32 s16, 0x998ef7b6
	s_mov_b32 s17, 0x3fd99999
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[16:17]
	s_mov_b32 s16, 0x5f08b19f
	s_mov_b32 s17, 0x3f967e29
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[10:11], v[6:7], v[10:11], s[16:17]
	s_mov_b32 s16, 0x6ef28734
	s_mov_b32 s17, 0x3fa82d5d
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_fma_f64 v[8:9], v[8:9], v[12:13], s[2:3]
	s_mov_b32 s2, 0xfc27006a
	s_mov_b32 s3, 0xbf9e9ae6
	v_ldexp_f64 v[12:13], v[4:5], 1
	v_fma_f64 v[10:11], v[6:7], v[10:11], s[2:3]
	s_mov_b32 s2, 0x5711927a
	s_mov_b32 s3, 0x3fa2c15b
	v_add_f64 v[4:5], v[4:5], -v[18:19]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_mul_f64 v[8:9], v[14:15], v[8:9]
	v_cvt_f64_i32_e32 v[14:15], v28
	v_fma_f64 v[10:11], v[6:7], v[10:11], s[2:3]
	s_mov_b32 s2, 0xe82d3ff0
	s_mov_b32 s3, 0xbfa59976
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[0:1], v[0:1], -v[4:5]
	v_add_f64 v[16:17], v[12:13], v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[10:11], v[6:7], v[10:11], s[2:3]
	s_mov_b32 s2, 0xfefa39ef
	s_mov_b32 s3, 0x3fe62e42
	v_ldexp_f64 v[0:1], v[0:1], 1
	v_mul_f64 v[18:19], v[14:15], s[2:3]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[4:5], v[16:17], -v[12:13]
	v_fma_f64 v[10:11], v[6:7], v[10:11], s[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[12:13], v[14:15], s[2:3], -v[18:19]
	s_mov_b32 s2, 0x6a214619
	s_mov_b32 s3, 0xbfaae5ce
	v_add_f64 v[4:5], v[8:9], -v[4:5]
	s_delay_alu instid0(VALU_DEP_3)
	v_fma_f64 v[8:9], v[6:7], v[10:11], s[2:3]
	s_mov_b32 s2, 0x3b39803f
	s_mov_b32 s3, 0x3c7abc9e
	s_delay_alu instid0(VALU_DEP_3) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[10:11], v[14:15], s[2:3], v[12:13]
	s_mov_b32 s2, 0x8427b883
	s_mov_b32 s3, 0x3fae1bb4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[0:1], v[0:1], v[4:5]
	v_fma_f64 v[4:5], v[6:7], v[8:9], s[2:3]
	s_mov_b32 s2, 0x8b207f05
	s_mov_b32 s3, 0xbfb110e4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[8:9], v[18:19], v[10:11]
	v_add_f64 v[12:13], v[16:17], v[0:1]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[4:5], v[6:7], v[4:5], s[2:3]
	s_mov_b32 s2, 0x57b87036
	s_mov_b32 s3, 0x3fb3b136
	v_add_f64 v[18:19], v[8:9], -v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[14:15], v[8:9], v[12:13]
	v_add_f64 v[16:17], v[12:13], -v[16:17]
	v_fma_f64 v[4:5], v[6:7], v[4:5], s[2:3]
	s_mov_b32 s2, 0x19378e4f
	s_mov_b32 s3, 0xbfb745d1
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[10:11], v[10:11], -v[18:19]
	v_add_f64 v[20:21], v[14:15], -v[8:9]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[0:1], v[0:1], -v[16:17]
	v_fma_f64 v[4:5], v[6:7], v[4:5], s[2:3]
	s_mov_b32 s2, 0x17e1913c
	s_mov_b32 s3, 0x3fbc71c7
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[22:23], v[14:15], -v[20:21]
	v_add_f64 v[12:13], v[12:13], -v[20:21]
	v_add_f64 v[16:17], v[10:11], v[0:1]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f64 v[4:5], v[6:7], v[4:5], s[2:3]
	s_mov_b32 s2, 0x92376b7d
	s_mov_b32 s3, 0xbfc24924
	v_add_f64 v[8:9], v[8:9], -v[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[4:5], v[6:7], v[4:5], s[2:3]
	s_mov_b32 s2, 0x999952cc
	s_mov_b32 s3, 0x3fc99999
	v_add_f64 v[8:9], v[12:13], v[8:9]
	v_add_f64 v[12:13], v[16:17], -v[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[4:5], v[6:7], v[4:5], s[2:3]
	s_mov_b32 s2, 0x55555523
	s_mov_b32 s3, 0xbfd55555
	v_add_f64 v[8:9], v[16:17], v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[16:17], v[16:17], -v[12:13]
	v_add_f64 v[0:1], v[0:1], -v[12:13]
	v_fma_f64 v[4:5], v[6:7], v[4:5], s[2:3]
	s_mov_b32 s2, 0x54442d18
	s_mov_b32 s3, 0x3ff921fb
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[18:19], v[14:15], v[8:9]
	v_mul_f64 v[4:5], v[6:7], v[4:5]
	v_add_f64 v[6:7], v[10:11], -v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[10:11], v[18:19], -v[14:15]
	v_fma_f64 v[2:3], v[2:3], v[4:5], v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[0:1], v[0:1], v[6:7]
	v_add_f64 v[4:5], v[8:9], -v[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], -v[2:3], s[2:3]
	s_mov_b32 s3, 0x400921fb
	v_add_f64 v[0:1], v[0:1], v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v3, v3, v7, s0
	v_cndmask_b32_e64 v2, v2, v6, s0
	v_ashrrev_i32_e32 v7, 31, v79
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_f64 v[4:5], -v[2:3], s[2:3]
	v_add_f64 v[0:1], v[18:19], v[0:1]
	v_mov_b32_e32 v6, 0x7f3321d2
	v_cndmask_b32_e64 v2, v2, v4, s1
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v3, v3, v5, s1
	v_dual_cndmask_b32 v1, v1, v33 :: v_dual_cndmask_b32 v0, v0, v32
	v_cmp_eq_f64_e32 vcc_lo, 0, v[74:75]
	v_mov_b32_e32 v4, 0x4002d97c
	v_cndmask_b32_e64 v6, 0x54442d18, v6, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v4, 0x3fe921fb, v4, s1
	v_cmp_nge_f64_e64 s1, -1.0, v[32:33]
	v_bfi_b32 v4, 0x7fffffff, v4, v75
	v_and_b32_e32 v8, 0x54442d18, v7
	v_and_b32_e32 v7, 0x400921fb, v7
	v_mul_f64 v[0:1], v[0:1], 0.5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_dual_cndmask_b32 v2, v2, v8 :: v_dual_cndmask_b32 v3, v3, v7
	v_cmp_ngt_f64_e32 vcc_lo, -1.0, v[32:33]
	v_cndmask_b32_e32 v1, 0x7ff80000, v1, vcc_lo
	s_and_b32 vcc_lo, s8, s9
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v7, v3, v4, vcc_lo
	v_cndmask_b32_e64 v4, 0, v0, s1
	v_cmp_neq_f64_e64 s1, -1.0, v[32:33]
	v_cndmask_b32_e32 v6, v2, v6, vcc_lo
	v_cndmask_b32_e64 v5, 0xfff00000, v1, s1
.LBB0_127:                              ; %Flow424
	s_or_b32 exec_lo, exec_lo, s15
.LBB0_128:                              ; %Flow427
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s14
                                        ; implicit-def: $vgpr8_vgpr9
                                        ; implicit-def: $vgpr78_vgpr79
                                        ; implicit-def: $vgpr80_vgpr81
.LBB0_129:                              ; %Flow428
	s_and_not1_saveexec_b32 s13, s13
	s_cbranch_execz .LBB0_131
; %bb.130:
	v_cndmask_b32_e64 v1, v9, 0x7ff00000, s10
	v_cndmask_b32_e64 v0, v8, 0, s10
	s_mov_b32 s3, 0x3fe55555
	s_mov_b32 s2, 0x55555555
	v_max_f64 v[10:11], |v[74:75]|, |v[74:75]|
	v_max_f64 v[12:13], |v[78:79]|, |v[78:79]|
	v_frexp_mant_f64_e32 v[2:3], v[0:1]
	s_mov_b32 s14, 0xbd3237f4
	s_mov_b32 s16, 0xb5e68a13
	s_mov_b32 s15, 0xbf23e260
	s_mov_b32 s17, 0x3eeba404
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e64 s1, s[2:3], v[2:3]
	s_mov_b32 s2, 0x55555780
	v_cndmask_b32_e64 v4, 0, 1, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[2:3], v[2:3], v4
	v_add_f64 v[4:5], v[2:3], 1.0
	v_add_f64 v[14:15], v[2:3], -1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[6:7], v[4:5]
	v_add_f64 v[16:17], v[4:5], -1.0
	v_add_f64 v[2:3], v[2:3], -v[16:17]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[8:9], -v[4:5], v[6:7], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], v[8:9], v[6:7], v[6:7]
	v_fma_f64 v[8:9], -v[4:5], v[6:7], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[6:7], v[8:9], v[6:7], v[6:7]
	v_min_f64 v[8:9], v[12:13], v[10:11]
	v_mul_f64 v[10:11], v[14:15], v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_div_scale_f64 v[12:13], null, v[80:81], v[80:81], v[8:9]
	v_div_scale_f64 v[24:25], vcc_lo, v[8:9], v[80:81], v[8:9]
	v_mul_f64 v[18:19], v[4:5], v[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[20:21], v[12:13]
	v_fma_f64 v[4:5], v[10:11], v[4:5], -v[18:19]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[16:17], -v[12:13], v[20:21], 1.0
	v_fma_f64 v[2:3], v[10:11], v[2:3], v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[4:5], v[20:21], v[16:17], v[20:21]
	v_add_f64 v[16:17], v[18:19], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[20:21], -v[12:13], v[4:5], 1.0
	v_add_f64 v[22:23], v[14:15], -v[16:17]
	v_add_f64 v[18:19], v[16:17], -v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[4:5], v[4:5], v[20:21], v[4:5]
	v_add_f64 v[14:15], v[14:15], -v[22:23]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[2:3], v[18:19], -v[2:3]
	v_mul_f64 v[20:21], v[24:25], v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[14:15], v[14:15], -v[16:17]
	v_fma_f64 v[12:13], -v[12:13], v[20:21], v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[2:3], v[2:3], v[14:15]
	v_div_fmas_f64 v[4:5], v[12:13], v[4:5], v[20:21]
	v_frexp_exp_i32_f64_e32 v20, v[0:1]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[2:3], v[22:23], v[2:3]
	v_div_fixup_f64 v[4:5], v[4:5], v[80:81], v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[2:3], v[6:7], v[2:3]
	v_mul_f64 v[6:7], v[4:5], v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[8:9], v[10:11], v[2:3]
	v_fma_f64 v[12:13], v[6:7], s[16:17], s[14:15]
	s_mov_b32 s14, 0x69efb384
	s_mov_b32 s15, 0x3f4b2bb0
	s_mov_b32 s16, 0xbf559e2b
	s_mov_b32 s17, 0x3fc3ab76
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[14:15], v[8:9], v[8:9]
	v_fma_f64 v[12:13], v[6:7], v[12:13], s[14:15]
	s_mov_b32 s14, 0x6b47b09a
	s_mov_b32 s15, 0x3fc38538
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[14:15], s[16:17], s[14:15]
	s_mov_b32 s14, 0xaf56de9b
	s_mov_b32 s15, 0xbf67952d
	v_mul_f64 v[18:19], v[8:9], v[14:15]
	s_delay_alu instid0(VALU_DEP_3)
	v_fma_f64 v[12:13], v[6:7], v[12:13], s[14:15]
	s_mov_b32 s14, 0xd7f4df2e
	s_mov_b32 s15, 0x3fc7474d
	s_delay_alu instid0(VALU_DEP_3) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[14:15], v[16:17], s[14:15]
	s_mov_b32 s14, 0xa595c56f
	s_mov_b32 s15, 0x3f7d6d43
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[6:7], v[12:13], s[14:15]
	s_mov_b32 s14, 0x16291751
	s_mov_b32 s15, 0x3fcc71c0
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[14:15], v[16:17], s[14:15]
	s_mov_b32 s14, 0xa57d9582
	s_mov_b32 s15, 0xbf8c6ea4
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[6:7], v[12:13], s[14:15]
	s_mov_b32 s14, 0x9b27acf1
	s_mov_b32 s15, 0x3fd24924
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[14:15], v[16:17], s[14:15]
	s_mov_b32 s14, 0x5f08b19f
	s_mov_b32 s15, 0x3f967e29
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[6:7], v[12:13], s[14:15]
	s_mov_b32 s14, 0x998ef7b6
	s_mov_b32 s15, 0x3fd99999
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[14:15], v[16:17], s[14:15]
	s_mov_b32 s14, 0xfc27006a
	s_mov_b32 s15, 0xbf9e9ae6
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[6:7], v[12:13], s[14:15]
	s_mov_b32 s14, 0x6a214619
	s_mov_b32 s15, 0xbfaae5ce
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_fma_f64 v[14:15], v[14:15], v[16:17], s[2:3]
	s_mov_b32 s2, 0x5711927a
	s_mov_b32 s3, 0x3fa2c15b
	v_ldexp_f64 v[16:17], v[8:9], 1
	v_fma_f64 v[12:13], v[6:7], v[12:13], s[2:3]
	s_mov_b32 s2, 0xe82d3ff0
	s_mov_b32 s3, 0xbfa59976
	v_add_f64 v[8:9], v[8:9], -v[10:11]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_mul_f64 v[14:15], v[18:19], v[14:15]
	v_subrev_co_ci_u32_e64 v18, vcc_lo, 0, v20, s1
	v_cmp_class_f64_e64 s1, v[0:1], 0x204
	v_fma_f64 v[12:13], v[6:7], v[12:13], s[2:3]
	s_mov_b32 s2, 0x6ef28734
	v_cvt_f64_i32_e32 v[18:19], v18
	s_mov_b32 s3, 0x3fa82d5d
	v_add_f64 v[2:3], v[2:3], -v[8:9]
	v_cmp_gt_i32_e32 vcc_lo, 0, v79
	v_add_f64 v[10:11], v[16:17], v[14:15]
	v_fma_f64 v[12:13], v[6:7], v[12:13], s[2:3]
	s_mov_b32 s2, 0xfefa39ef
	s_mov_b32 s3, 0x3fe62e42
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_mul_f64 v[20:21], v[18:19], s[2:3]
	v_ldexp_f64 v[2:3], v[2:3], 1
	v_add_f64 v[8:9], v[10:11], -v[16:17]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[12:13], v[6:7], v[12:13], s[14:15]
	v_fma_f64 v[16:17], v[18:19], s[2:3], -v[20:21]
	s_mov_b32 s2, 0x8427b883
	s_mov_b32 s3, 0x3fae1bb4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[8:9], v[14:15], -v[8:9]
	v_fma_f64 v[12:13], v[6:7], v[12:13], s[2:3]
	s_mov_b32 s2, 0x3b39803f
	s_mov_b32 s3, 0x3c7abc9e
	s_delay_alu instid0(VALU_DEP_3) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[14:15], v[18:19], s[2:3], v[16:17]
	s_mov_b32 s2, 0x8b207f05
	s_mov_b32 s3, 0xbfb110e4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[2:3], v[2:3], v[8:9]
	v_fma_f64 v[8:9], v[6:7], v[12:13], s[2:3]
	s_mov_b32 s2, 0x57b87036
	s_mov_b32 s3, 0x3fb3b136
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[20:21], v[14:15]
	v_add_f64 v[16:17], v[10:11], v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[8:9], v[6:7], v[8:9], s[2:3]
	s_mov_b32 s2, 0x19378e4f
	s_mov_b32 s3, 0xbfb745d1
	v_add_f64 v[20:21], v[12:13], -v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[18:19], v[12:13], v[16:17]
	v_add_f64 v[10:11], v[16:17], -v[10:11]
	v_fma_f64 v[8:9], v[6:7], v[8:9], s[2:3]
	s_mov_b32 s2, 0x17e1913c
	s_mov_b32 s3, 0x3fbc71c7
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[14:15], v[14:15], -v[20:21]
	v_add_f64 v[22:23], v[18:19], -v[12:13]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[2:3], v[2:3], -v[10:11]
	v_fma_f64 v[8:9], v[6:7], v[8:9], s[2:3]
	s_mov_b32 s2, 0x92376b7d
	s_mov_b32 s3, 0xbfc24924
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[24:25], v[18:19], -v[22:23]
	v_add_f64 v[10:11], v[16:17], -v[22:23]
	v_add_f64 v[16:17], v[14:15], v[2:3]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f64 v[8:9], v[6:7], v[8:9], s[2:3]
	s_mov_b32 s2, 0x999952cc
	s_mov_b32 s3, 0x3fc99999
	v_add_f64 v[12:13], v[12:13], -v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[8:9], v[6:7], v[8:9], s[2:3]
	s_mov_b32 s2, 0x55555523
	s_mov_b32 s3, 0xbfd55555
	v_add_f64 v[10:11], v[10:11], v[12:13]
	v_add_f64 v[12:13], v[16:17], -v[14:15]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[8:9], v[6:7], v[8:9], s[2:3]
	s_mov_b32 s2, 0x54442d18
	s_mov_b32 s3, 0x3ff921fb
	v_add_f64 v[10:11], v[16:17], v[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[2:3], v[2:3], -v[12:13]
	v_mul_f64 v[6:7], v[6:7], v[8:9]
	v_add_f64 v[8:9], v[16:17], -v[12:13]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[16:17], v[18:19], v[10:11]
	v_fma_f64 v[4:5], v[4:5], v[6:7], v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[6:7], v[14:15], -v[8:9]
	v_add_f64 v[8:9], v[16:17], -v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], -v[4:5], s[2:3]
	v_add_f64 v[2:3], v[2:3], v[6:7]
	s_mov_b32 s3, 0x400921fb
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[6:7], v[10:11], -v[8:9]
	v_ashrrev_i32_e32 v9, 31, v79
	v_cndmask_b32_e64 v5, v5, v13, s0
	v_cndmask_b32_e64 v4, v4, v12, s0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[2:3], v[2:3], v[6:7]
	v_add_f64 v[6:7], -v[4:5], s[2:3]
	v_mov_b32_e32 v8, 0x7f3321d2
	v_cmp_eq_f64_e64 s2, 0, v[74:75]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[2:3], v[16:17], v[2:3]
	v_dual_cndmask_b32 v5, v5, v7 :: v_dual_cndmask_b32 v4, v4, v6
	v_mov_b32_e32 v6, 0x4002d97c
	v_cndmask_b32_e32 v8, 0x54442d18, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v6, 0x3fe921fb, v6, vcc_lo
	v_cmp_ngt_f64_e32 vcc_lo, 0, v[0:1]
	v_bfi_b32 v6, 0x7fffffff, v6, v75
	v_cndmask_b32_e64 v2, v2, v0, s1
	v_cndmask_b32_e64 v3, v3, v1, s1
	v_cmp_nge_f64_e64 s1, 0, v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v3, 0x7ff80000, v3, vcc_lo
	s_and_b32 vcc_lo, s8, s9
	v_and_b32_e32 v10, 0x54442d18, v9
	v_and_b32_e32 v9, 0x400921fb, v9
	v_cndmask_b32_e64 v10, v4, v10, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v4, v5, v9, s2
	v_dual_cndmask_b32 v7, v4, v6 :: v_dual_cndmask_b32 v6, v10, v8
	v_cndmask_b32_e64 v4, 0, v2, s1
	v_cmp_neq_f64_e64 s1, 0, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v5, 0xfff00000, v3, s1
.LBB0_131:                              ; %Flow429
	s_or_b32 exec_lo, exec_lo, s13
                                        ; implicit-def: $vgpr2_vgpr3
                                        ; implicit-def: $vgpr78_vgpr79
                                        ; implicit-def: $vgpr80_vgpr81
.LBB0_132:                              ; %Flow434
	s_and_not1_saveexec_b32 s10, s12
	s_cbranch_execz .LBB0_138
; %bb.133:
	s_mov_b32 s2, 0x6a3f9475
	s_mov_b32 s3, 0x20ca2fe7
                                        ; implicit-def: $vgpr4_vgpr5
                                        ; implicit-def: $vgpr6_vgpr7
	s_mov_b32 s1, exec_lo
	v_cmpx_ngt_f64_e32 s[2:3], v[2:3]
	s_xor_b32 s12, exec_lo, s1
	s_cbranch_execz .LBB0_135
; %bb.134:
	v_mul_f64 v[0:1], v[2:3], v[2:3]
	s_mov_b32 s3, 0x3fe55555
	s_mov_b32 s2, 0x55555555
	s_mov_b32 s14, 0xbd3237f4
	s_mov_b32 s16, 0xb5e68a13
	s_mov_b32 s15, 0xbf23e260
	s_mov_b32 s17, 0x3eeba404
	v_cmp_gt_i32_e64 s1, 0, v79
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], v[0:1], 1.0
	v_frexp_mant_f64_e32 v[4:5], v[2:3]
	v_frexp_exp_i32_f64_e32 v8, v[2:3]
	v_add_f64 v[6:7], v[2:3], -1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cmp_gt_f64_e32 vcc_lo, s[2:3], v[4:5]
	s_mov_b32 s2, 0x55555780
	v_add_f64 v[4:5], v[6:7], -v[2:3]
	v_add_f64 v[6:7], v[0:1], -v[6:7]
	v_subrev_co_ci_u32_e32 v30, vcc_lo, 0, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[4:5], v[4:5], 1.0
	v_sub_nc_u32_e32 v10, 0, v30
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[2:3], v[2:3], v10
	v_add_f64 v[4:5], v[6:7], v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[8:9], v[2:3], 1.0
	v_add_f64 v[14:15], v[2:3], -1.0
	v_ldexp_f64 v[4:5], v[4:5], v10
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[6:7], v[8:9], -1.0
	v_add_f64 v[16:17], v[14:15], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[2:3], -v[6:7]
	v_add_f64 v[2:3], v[2:3], -v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[4:5], v[6:7]
	v_add_f64 v[2:3], v[4:5], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[8:9], v[6:7]
	v_add_f64 v[16:17], v[14:15], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_rcp_f64_e32 v[12:13], v[10:11]
	v_add_f64 v[8:9], v[8:9], -v[10:11]
	v_add_f64 v[14:15], v[14:15], -v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[6:7], v[8:9]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[18:19], -v[10:11], v[12:13], 1.0
	v_add_f64 v[2:3], v[2:3], v[14:15]
	v_fma_f64 v[12:13], v[18:19], v[12:13], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], -v[10:11], v[12:13], 1.0
	v_fma_f64 v[4:5], v[4:5], v[12:13], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[12:13], v[16:17], v[4:5]
	v_mul_f64 v[18:19], v[10:11], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], v[12:13], v[10:11], -v[18:19]
	v_fma_f64 v[8:9], v[12:13], v[6:7], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[20:21], v[18:19], v[8:9]
	v_add_f64 v[22:23], v[16:17], -v[20:21]
	v_add_f64 v[14:15], v[20:21], -v[18:19]
	v_max_f64 v[18:19], |v[74:75]|, |v[74:75]|
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[16:17], v[16:17], -v[22:23]
	v_add_f64 v[8:9], v[14:15], -v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[16:17], v[16:17], -v[20:21]
	v_max_f64 v[20:21], |v[78:79]|, |v[78:79]|
	v_add_f64 v[2:3], v[2:3], v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_min_f64 v[18:19], v[20:21], v[18:19]
	v_add_f64 v[2:3], v[8:9], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[22:23], v[2:3]
	v_mul_f64 v[14:15], v[4:5], v[8:9]
	v_add_f64 v[22:23], v[22:23], -v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[16:17], v[10:11], v[14:15]
	v_add_f64 v[2:3], v[2:3], v[22:23]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[10:11], v[14:15], v[10:11], -v[16:17]
	v_fma_f64 v[6:7], v[14:15], v[6:7], v[10:11]
	v_div_scale_f64 v[10:11], null, v[80:81], v[80:81], v[18:19]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[20:21], v[16:17], v[6:7]
	v_rcp_f64_e32 v[24:25], v[10:11]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[26:27], v[8:9], -v[20:21]
	v_add_f64 v[16:17], v[20:21], -v[16:17]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[28:29], -v[10:11], v[24:25], 1.0
	v_add_f64 v[8:9], v[8:9], -v[26:27]
	v_add_f64 v[6:7], v[16:17], -v[6:7]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[24:25], v[24:25], v[28:29], v[24:25]
	v_add_f64 v[8:9], v[8:9], -v[20:21]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[20:21], -v[10:11], v[24:25], 1.0
	v_add_f64 v[2:3], v[2:3], v[8:9]
	v_div_scale_f64 v[8:9], vcc_lo, v[18:19], v[80:81], v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fma_f64 v[16:17], v[24:25], v[20:21], v[24:25]
	v_add_f64 v[20:21], v[12:13], v[14:15]
	v_add_f64 v[2:3], v[6:7], v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[6:7], v[8:9], v[16:17]
	v_add_f64 v[12:13], v[20:21], -v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[2:3], v[26:27], v[2:3]
	v_fma_f64 v[8:9], -v[10:11], v[6:7], v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[10:11], v[14:15], -v[12:13]
	v_mul_f64 v[2:3], v[4:5], v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_div_fmas_f64 v[4:5], v[8:9], v[16:17], v[6:7]
	v_cmp_eq_f64_e32 vcc_lo, 0x7ff00000, v[0:1]
	v_add_f64 v[2:3], v[10:11], v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fixup_f64 v[4:5], v[4:5], v[80:81], v[18:19]
                                        ; implicit-def: $vgpr80_vgpr81
	v_add_f64 v[6:7], v[20:21], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[8:9], v[4:5], v[4:5]
	v_mul_f64 v[10:11], v[6:7], v[6:7]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[12:13], v[8:9], s[16:17], s[14:15]
	s_mov_b32 s14, 0x6b47b09a
	s_mov_b32 s16, 0xbf559e2b
	s_mov_b32 s15, 0x3fc38538
	s_mov_b32 s17, 0x3fc3ab76
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[14:15], v[10:11], s[16:17], s[14:15]
	s_mov_b32 s14, 0x69efb384
	s_mov_b32 s15, 0x3f4b2bb0
	v_mul_f64 v[16:17], v[6:7], v[10:11]
	s_delay_alu instid0(VALU_DEP_3)
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[14:15]
	s_mov_b32 s14, 0xd7f4df2e
	s_mov_b32 s15, 0x3fc7474d
	s_delay_alu instid0(VALU_DEP_3) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[14:15], v[10:11], v[14:15], s[14:15]
	s_mov_b32 s14, 0xaf56de9b
	s_mov_b32 s15, 0xbf67952d
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[14:15]
	s_mov_b32 s14, 0x16291751
	s_mov_b32 s15, 0x3fcc71c0
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[14:15], v[10:11], v[14:15], s[14:15]
	s_mov_b32 s14, 0xa595c56f
	s_mov_b32 s15, 0x3f7d6d43
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[14:15]
	s_mov_b32 s14, 0x9b27acf1
	s_mov_b32 s15, 0x3fd24924
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[14:15], v[10:11], v[14:15], s[14:15]
	s_mov_b32 s14, 0xa57d9582
	s_mov_b32 s15, 0xbf8c6ea4
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[14:15]
	s_mov_b32 s14, 0x998ef7b6
	s_mov_b32 s15, 0x3fd99999
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[14:15], v[10:11], v[14:15], s[14:15]
	s_mov_b32 s14, 0x5f08b19f
	s_mov_b32 s15, 0x3f967e29
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[14:15]
	s_mov_b32 s14, 0x6ef28734
	s_mov_b32 s15, 0x3fa82d5d
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_fma_f64 v[10:11], v[10:11], v[14:15], s[2:3]
	s_mov_b32 s2, 0xfc27006a
	s_mov_b32 s3, 0xbf9e9ae6
	v_ldexp_f64 v[14:15], v[6:7], 1
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[2:3]
	s_mov_b32 s2, 0x5711927a
	s_mov_b32 s3, 0x3fa2c15b
	v_add_f64 v[6:7], v[6:7], -v[20:21]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_mul_f64 v[10:11], v[16:17], v[10:11]
	v_cvt_f64_i32_e32 v[16:17], v30
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[2:3]
	s_mov_b32 s2, 0xe82d3ff0
	s_mov_b32 s3, 0xbfa59976
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[2:3], v[2:3], -v[6:7]
	v_add_f64 v[18:19], v[14:15], v[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[2:3]
	s_mov_b32 s2, 0xfefa39ef
	s_mov_b32 s3, 0x3fe62e42
	v_ldexp_f64 v[2:3], v[2:3], 1
	v_mul_f64 v[20:21], v[16:17], s[2:3]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[6:7], v[18:19], -v[14:15]
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[14:15]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[14:15], v[16:17], s[2:3], -v[20:21]
	s_mov_b32 s2, 0x6a214619
	s_mov_b32 s3, 0xbfaae5ce
	v_add_f64 v[6:7], v[10:11], -v[6:7]
	s_delay_alu instid0(VALU_DEP_3)
	v_fma_f64 v[10:11], v[8:9], v[12:13], s[2:3]
	s_mov_b32 s2, 0x3b39803f
	s_mov_b32 s3, 0x3c7abc9e
	s_delay_alu instid0(VALU_DEP_3) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[16:17], s[2:3], v[14:15]
	s_mov_b32 s2, 0x8427b883
	s_mov_b32 s3, 0x3fae1bb4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[2:3], v[2:3], v[6:7]
	v_fma_f64 v[6:7], v[8:9], v[10:11], s[2:3]
	s_mov_b32 s2, 0x8b207f05
	s_mov_b32 s3, 0xbfb110e4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[10:11], v[20:21], v[12:13]
	v_add_f64 v[14:15], v[18:19], v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[6:7], v[8:9], v[6:7], s[2:3]
	s_mov_b32 s2, 0x57b87036
	s_mov_b32 s3, 0x3fb3b136
	v_add_f64 v[20:21], v[10:11], -v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[16:17], v[10:11], v[14:15]
	v_add_f64 v[18:19], v[14:15], -v[18:19]
	v_fma_f64 v[6:7], v[8:9], v[6:7], s[2:3]
	s_mov_b32 s2, 0x19378e4f
	s_mov_b32 s3, 0xbfb745d1
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[12:13], v[12:13], -v[20:21]
	v_add_f64 v[22:23], v[16:17], -v[10:11]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[2:3], v[2:3], -v[18:19]
	v_fma_f64 v[6:7], v[8:9], v[6:7], s[2:3]
	s_mov_b32 s2, 0x17e1913c
	s_mov_b32 s3, 0x3fbc71c7
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[24:25], v[16:17], -v[22:23]
	v_add_f64 v[14:15], v[14:15], -v[22:23]
	v_add_f64 v[18:19], v[12:13], v[2:3]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f64 v[6:7], v[8:9], v[6:7], s[2:3]
	s_mov_b32 s2, 0x92376b7d
	s_mov_b32 s3, 0xbfc24924
	v_add_f64 v[10:11], v[10:11], -v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[6:7], v[8:9], v[6:7], s[2:3]
	s_mov_b32 s2, 0x999952cc
	s_mov_b32 s3, 0x3fc99999
	v_add_f64 v[10:11], v[14:15], v[10:11]
	v_add_f64 v[14:15], v[18:19], -v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[6:7], v[8:9], v[6:7], s[2:3]
	s_mov_b32 s2, 0x55555523
	s_mov_b32 s3, 0xbfd55555
	v_add_f64 v[10:11], v[18:19], v[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[18:19], v[18:19], -v[14:15]
	v_add_f64 v[2:3], v[2:3], -v[14:15]
	v_fma_f64 v[6:7], v[8:9], v[6:7], s[2:3]
	s_mov_b32 s2, 0x54442d18
	s_mov_b32 s3, 0x3ff921fb
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[20:21], v[16:17], v[10:11]
	v_mul_f64 v[6:7], v[8:9], v[6:7]
	v_add_f64 v[8:9], v[12:13], -v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[20:21], -v[16:17]
	v_fma_f64 v[4:5], v[4:5], v[6:7], v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[2:3], v[2:3], v[8:9]
	v_add_f64 v[6:7], v[10:11], -v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[8:9], -v[4:5], s[2:3]
	s_mov_b32 s3, 0x400921fb
	v_add_f64 v[2:3], v[2:3], v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v6, v5, v9, s0
	v_cndmask_b32_e64 v5, v4, v8, s0
	v_ashrrev_i32_e32 v9, 31, v79
                                        ; implicit-def: $vgpr78_vgpr79
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f64 v[7:8], -v[5:6], s[2:3]
	v_cmp_eq_f64_e64 s2, 0, v[74:75]
	v_add_f64 v[2:3], v[20:21], v[2:3]
	v_mov_b32_e32 v4, 0x7f3321d2
	v_and_b32_e32 v11, 0x54442d18, v9
	v_cndmask_b32_e64 v7, v5, v7, s1
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_dual_cndmask_b32 v0, v2, v0 :: v_dual_cndmask_b32 v1, v3, v1
	v_cndmask_b32_e64 v10, 0x54442d18, v4, s1
	v_cndmask_b32_e64 v2, v6, v8, s1
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v3, v7, v11, s2
	s_and_b32 vcc_lo, s8, s9
	v_mul_f64 v[4:5], v[0:1], 0.5
	v_mov_b32_e32 v0, 0x4002d97c
	v_dual_cndmask_b32 v6, v3, v10 :: v_dual_and_b32 v1, 0x400921fb, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v0, 0x3fe921fb, v0, s1
	v_cndmask_b32_e64 v1, v2, v1, s2
                                        ; implicit-def: $vgpr2_vgpr3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_bfi_b32 v0, 0x7fffffff, v0, v75
	v_cndmask_b32_e32 v7, v1, v0, vcc_lo
.LBB0_135:                              ; %Flow431
	s_and_not1_saveexec_b32 s2, s12
	s_cbranch_execz .LBB0_137
; %bb.136:
	v_max_f64 v[0:1], |v[74:75]|, |v[74:75]|
	v_max_f64 v[4:5], |v[78:79]|, |v[78:79]|
	s_mov_b32 s12, 0xbd3237f4
	s_mov_b32 s14, 0xb5e68a13
	s_mov_b32 s13, 0xbf23e260
	s_mov_b32 s15, 0x3eeba404
	v_cmp_eq_f64_e64 s1, 0, v[74:75]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_f64 v[0:1], v[4:5], v[0:1]
	v_div_scale_f64 v[4:5], null, v[80:81], v[80:81], v[0:1]
	v_div_scale_f64 v[10:11], vcc_lo, v[0:1], v[80:81], v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[6:7], v[4:5]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[8:9], -v[4:5], v[6:7], 1.0
	v_fma_f64 v[6:7], v[6:7], v[8:9], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], -v[4:5], v[6:7], 1.0
	v_fma_f64 v[6:7], v[6:7], v[8:9], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[8:9], v[10:11], v[6:7]
	v_fma_f64 v[4:5], -v[4:5], v[8:9], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[4:5], v[4:5], v[6:7], v[8:9]
	v_cmp_gt_i32_e32 vcc_lo, 0, v79
	v_ashrrev_i32_e32 v9, 31, v79
	v_and_b32_e32 v11, 0x54442d18, v9
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f64 v[0:1], v[4:5], v[80:81], v[0:1]
	v_mul_f64 v[4:5], v[0:1], v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[6:7], v[4:5], s[14:15], s[12:13]
	s_mov_b32 s12, 0x69efb384
	s_mov_b32 s13, 0x3f4b2bb0
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[6:7], v[4:5], v[6:7], s[12:13]
	s_mov_b32 s12, 0xaf56de9b
	s_mov_b32 s13, 0xbf67952d
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[6:7], v[4:5], v[6:7], s[12:13]
	s_mov_b32 s12, 0xa595c56f
	s_mov_b32 s13, 0x3f7d6d43
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[6:7], v[4:5], v[6:7], s[12:13]
	s_mov_b32 s12, 0xa57d9582
	s_mov_b32 s13, 0xbf8c6ea4
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[6:7], v[4:5], v[6:7], s[12:13]
	s_mov_b32 s12, 0x5f08b19f
	s_mov_b32 s13, 0x3f967e29
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[6:7], v[4:5], v[6:7], s[12:13]
	s_mov_b32 s12, 0xfc27006a
	s_mov_b32 s13, 0xbf9e9ae6
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[6:7], v[4:5], v[6:7], s[12:13]
	s_mov_b32 s12, 0x5711927a
	s_mov_b32 s13, 0x3fa2c15b
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[6:7], v[4:5], v[6:7], s[12:13]
	s_mov_b32 s12, 0xe82d3ff0
	s_mov_b32 s13, 0xbfa59976
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[6:7], v[4:5], v[6:7], s[12:13]
	s_mov_b32 s12, 0x6ef28734
	s_mov_b32 s13, 0x3fa82d5d
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[6:7], v[4:5], v[6:7], s[12:13]
	s_mov_b32 s12, 0x6a214619
	s_mov_b32 s13, 0xbfaae5ce
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[6:7], v[4:5], v[6:7], s[12:13]
	s_mov_b32 s12, 0x8427b883
	s_mov_b32 s13, 0x3fae1bb4
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[6:7], v[4:5], v[6:7], s[12:13]
	s_mov_b32 s12, 0x8b207f05
	s_mov_b32 s13, 0xbfb110e4
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[6:7], v[4:5], v[6:7], s[12:13]
	s_mov_b32 s12, 0x57b87036
	s_mov_b32 s13, 0x3fb3b136
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[6:7], v[4:5], v[6:7], s[12:13]
	s_mov_b32 s12, 0x19378e4f
	s_mov_b32 s13, 0xbfb745d1
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[6:7], v[4:5], v[6:7], s[12:13]
	s_mov_b32 s12, 0x17e1913c
	s_mov_b32 s13, 0x3fbc71c7
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[6:7], v[4:5], v[6:7], s[12:13]
	s_mov_b32 s12, 0x92376b7d
	s_mov_b32 s13, 0xbfc24924
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[6:7], v[4:5], v[6:7], s[12:13]
	s_mov_b32 s12, 0x999952cc
	s_mov_b32 s13, 0x3fc99999
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[6:7], v[4:5], v[6:7], s[12:13]
	s_mov_b32 s12, 0x55555523
	s_mov_b32 s13, 0xbfd55555
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[6:7], v[4:5], v[6:7], s[12:13]
	s_mov_b32 s12, 0x54442d18
	s_mov_b32 s13, 0x3ff921fb
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[4:5], v[4:5], v[6:7]
	v_mul_f64 v[7:8], v[2:3], 0.5
	v_fma_f64 v[0:1], v[0:1], v[4:5], v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f64 v[4:5], -v[0:1], s[12:13]
	s_mov_b32 s13, 0x400921fb
	v_cndmask_b32_e64 v1, v1, v5, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v0, v0, v4, s0
	v_add_f64 v[5:6], -v[0:1], s[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v4, 0x7f3321d2 :: v_dual_cndmask_b32 v1, v1, v6
	v_cndmask_b32_e32 v10, 0x54442d18, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v0, v0, v5, vcc_lo
	v_mul_f64 v[4:5], v[2:3], v[7:8]
	v_mov_b32_e32 v2, 0x4002d97c
	v_cndmask_b32_e32 v2, 0x3fe921fb, v2, vcc_lo
	s_and_b32 vcc_lo, s8, s9
	v_and_b32_e32 v3, 0x400921fb, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_bfi_b32 v2, 0x7fffffff, v2, v75
	v_cndmask_b32_e64 v1, v1, v3, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v7, v1, v2, vcc_lo
	v_cndmask_b32_e64 v0, v0, v11, s1
	v_cndmask_b32_e32 v6, v0, v10, vcc_lo
.LBB0_137:                              ; %Flow432
	s_or_b32 exec_lo, exec_lo, s2
.LBB0_138:                              ; %Flow435
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s10
                                        ; implicit-def: $vgpr78_vgpr79
                                        ; implicit-def: $vgpr80_vgpr81
.LBB0_139:                              ; %Flow437
	s_and_not1_saveexec_b32 s10, s11
	s_cbranch_execz .LBB0_141
; %bb.140:
	s_mov_b32 s2, 0x8b145769
	s_mov_b32 s3, 0x4005bf0a
	s_mov_b32 s12, 0xbd3237f4
	v_div_scale_f64 v[0:1], null, s[2:3], s[2:3], v[78:79]
	v_div_scale_f64 v[2:3], null, s[2:3], s[2:3], v[74:75]
	v_div_scale_f64 v[12:13], vcc_lo, v[78:79], s[2:3], v[78:79]
	s_mov_b32 s14, 0xb5e68a13
	s_mov_b32 s13, 0xbf23e260
	s_mov_b32 s15, 0x3eeba404
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f64_e32 v[4:5], v[0:1]
	v_rcp_f64_e32 v[6:7], v[2:3]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[8:9], -v[0:1], v[4:5], 1.0
	v_fma_f64 v[10:11], -v[2:3], v[6:7], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[4:5], v[4:5], v[8:9], v[4:5]
	v_fma_f64 v[6:7], v[6:7], v[10:11], v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[8:9], -v[0:1], v[4:5], 1.0
	v_fma_f64 v[10:11], -v[2:3], v[6:7], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_fma_f64 v[4:5], v[4:5], v[8:9], v[4:5]
	v_div_scale_f64 v[8:9], s1, v[74:75], s[2:3], v[74:75]
	v_fma_f64 v[6:7], v[6:7], v[10:11], v[6:7]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[10:11], v[12:13], v[4:5]
	v_mul_f64 v[14:15], v[8:9], v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[0:1], -v[0:1], v[10:11], v[12:13]
	v_fma_f64 v[2:3], -v[2:3], v[14:15], v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fmas_f64 v[0:1], v[0:1], v[4:5], v[10:11]
	s_mov_b32 vcc_lo, s1
	v_div_fmas_f64 v[2:3], v[2:3], v[6:7], v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fixup_f64 v[0:1], v[0:1], s[2:3], v[78:79]
	v_div_fixup_f64 v[2:3], v[2:3], s[2:3], v[74:75]
	s_mov_b32 s3, 0x3fe55555
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_class_f64_e64 s1, v[0:1], 0x204
	v_max_f64 v[4:5], |v[0:1]|, |v[2:3]|
	v_cmp_class_f64_e64 s2, v[2:3], 0x204
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_frexp_exp_i32_f64_e32 v12, v[4:5]
	s_or_b32 s1, s1, s2
	s_mov_b32 s2, 0x55555555
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v6, 0, v12
	v_ldexp_f64 v[4:5], |v[2:3]|, v6
	v_ldexp_f64 v[6:7], |v[0:1]|, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[4:5], v[4:5], v[4:5]
	v_fma_f64 v[4:5], v[6:7], v[6:7], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[6:7], v[4:5]
	v_cmp_eq_f64_e32 vcc_lo, 0, v[4:5]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[8:9], v[4:5], v[6:7]
	v_mul_f64 v[6:7], v[6:7], 0.5
	v_fma_f64 v[10:11], -v[6:7], v[8:9], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[8:9], v[8:9], v[10:11], v[8:9]
	v_fma_f64 v[6:7], v[6:7], v[10:11], v[6:7]
	v_fma_f64 v[10:11], -v[8:9], v[8:9], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], v[10:11], v[6:7], v[8:9]
	v_dual_cndmask_b32 v5, v7, v5 :: v_dual_cndmask_b32 v4, v6, v4
	v_cmp_o_f64_e32 vcc_lo, v[0:1], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ldexp_f64 v[4:5], v[4:5], v12
	v_max_f64 v[12:13], |v[78:79]|, |v[78:79]|
	v_cndmask_b32_e32 v1, 0x7ff80000, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cndmask_b32_e64 v1, v1, 0x7ff00000, s1
	v_cndmask_b32_e32 v0, 0, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v0, v0, 0, s1
	v_frexp_mant_f64_e32 v[2:3], v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e64 s1, s[2:3], v[2:3]
	s_mov_b32 s2, 0x55555780
	v_cndmask_b32_e64 v4, 0, 1, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[2:3], v[2:3], v4
	v_add_f64 v[4:5], v[2:3], 1.0
	v_add_f64 v[10:11], v[2:3], -1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[6:7], v[4:5]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[8:9], -v[4:5], v[6:7], 1.0
	v_fma_f64 v[6:7], v[8:9], v[6:7], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], -v[4:5], v[6:7], 1.0
	v_fma_f64 v[6:7], v[8:9], v[6:7], v[6:7]
	v_max_f64 v[8:9], |v[74:75]|, |v[74:75]|
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[14:15], v[10:11], v[6:7]
	v_min_f64 v[8:9], v[12:13], v[8:9]
	v_add_f64 v[12:13], v[4:5], -1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[16:17], v[4:5], v[14:15]
	v_div_scale_f64 v[18:19], null, v[80:81], v[80:81], v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[2:3], v[2:3], -v[12:13]
	v_div_scale_f64 v[24:25], vcc_lo, v[8:9], v[80:81], v[8:9]
	v_fma_f64 v[4:5], v[14:15], v[4:5], -v[16:17]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[12:13], v[18:19]
	v_fma_f64 v[2:3], v[14:15], v[2:3], v[4:5]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[4:5], -v[18:19], v[12:13], 1.0
	v_add_f64 v[20:21], v[16:17], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[4:5], v[12:13], v[4:5], v[12:13]
	v_add_f64 v[12:13], v[10:11], -v[20:21]
	v_add_f64 v[16:17], v[20:21], -v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[22:23], -v[18:19], v[4:5], 1.0
	v_add_f64 v[10:11], v[10:11], -v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[2:3], v[16:17], -v[2:3]
	v_fma_f64 v[4:5], v[4:5], v[22:23], v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[10:11], v[10:11], -v[20:21]
	v_frexp_exp_i32_f64_e32 v20, v[0:1]
	v_mul_f64 v[16:17], v[24:25], v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[2:3], v[2:3], v[10:11]
	v_fma_f64 v[10:11], -v[18:19], v[16:17], v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[2:3], v[12:13], v[2:3]
	v_div_fmas_f64 v[4:5], v[10:11], v[4:5], v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[2:3], v[6:7], v[2:3]
	v_div_fixup_f64 v[4:5], v[4:5], v[80:81], v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[14:15], v[2:3]
	v_mul_f64 v[8:9], v[4:5], v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[10:11], v[6:7], v[6:7]
	v_fma_f64 v[12:13], v[8:9], s[14:15], s[12:13]
	s_mov_b32 s12, 0x6b47b09a
	s_mov_b32 s14, 0xbf559e2b
	s_mov_b32 s13, 0x3fc38538
	s_mov_b32 s15, 0x3fc3ab76
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[10:11], s[14:15], s[12:13]
	s_mov_b32 s12, 0x69efb384
	s_mov_b32 s13, 0x3f4b2bb0
	v_mul_f64 v[18:19], v[6:7], v[10:11]
	s_delay_alu instid0(VALU_DEP_3)
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[12:13]
	s_mov_b32 s12, 0xd7f4df2e
	s_mov_b32 s13, 0x3fc7474d
	s_delay_alu instid0(VALU_DEP_3) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[10:11], v[16:17], s[12:13]
	s_mov_b32 s12, 0xaf56de9b
	s_mov_b32 s13, 0xbf67952d
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[12:13]
	s_mov_b32 s12, 0x16291751
	s_mov_b32 s13, 0x3fcc71c0
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[10:11], v[16:17], s[12:13]
	s_mov_b32 s12, 0xa595c56f
	s_mov_b32 s13, 0x3f7d6d43
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[12:13]
	s_mov_b32 s12, 0x9b27acf1
	s_mov_b32 s13, 0x3fd24924
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[10:11], v[16:17], s[12:13]
	s_mov_b32 s12, 0xa57d9582
	s_mov_b32 s13, 0xbf8c6ea4
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[12:13]
	s_mov_b32 s12, 0x998ef7b6
	s_mov_b32 s13, 0x3fd99999
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[16:17], v[10:11], v[16:17], s[12:13]
	s_mov_b32 s12, 0x5f08b19f
	s_mov_b32 s13, 0x3f967e29
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[12:13]
	s_mov_b32 s12, 0x6ef28734
	s_mov_b32 s13, 0x3fa82d5d
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_fma_f64 v[10:11], v[10:11], v[16:17], s[2:3]
	s_mov_b32 s2, 0xfc27006a
	s_mov_b32 s3, 0xbf9e9ae6
	v_ldexp_f64 v[16:17], v[6:7], 1
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[2:3]
	s_mov_b32 s2, 0x5711927a
	s_mov_b32 s3, 0x3fa2c15b
	v_add_f64 v[6:7], v[6:7], -v[14:15]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_mul_f64 v[10:11], v[18:19], v[10:11]
	v_subrev_co_ci_u32_e64 v18, vcc_lo, 0, v20, s1
	v_cmp_class_f64_e64 vcc_lo, v[0:1], 0x204
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[2:3]
	s_mov_b32 s2, 0xe82d3ff0
	v_cvt_f64_i32_e32 v[18:19], v18
	s_mov_b32 s3, 0xbfa59976
	v_add_f64 v[2:3], v[2:3], -v[6:7]
	v_add_f64 v[14:15], v[16:17], v[10:11]
	s_delay_alu instid0(VALU_DEP_4)
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[2:3]
	s_mov_b32 s2, 0xfefa39ef
	s_mov_b32 s3, 0x3fe62e42
	s_delay_alu instid0(VALU_DEP_4) | instid1(SALU_CYCLE_1)
	v_mul_f64 v[20:21], v[18:19], s[2:3]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[2:3], v[2:3], 1
	v_add_f64 v[6:7], v[14:15], -v[16:17]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[12:13]
	v_fma_f64 v[16:17], v[18:19], s[2:3], -v[20:21]
	s_mov_b32 s2, 0x6a214619
	s_mov_b32 s3, 0xbfaae5ce
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[6:7], v[10:11], -v[6:7]
	v_fma_f64 v[10:11], v[8:9], v[12:13], s[2:3]
	s_mov_b32 s2, 0x3b39803f
	s_mov_b32 s3, 0x3c7abc9e
	s_delay_alu instid0(VALU_DEP_3) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[12:13], v[18:19], s[2:3], v[16:17]
	s_mov_b32 s2, 0x8427b883
	s_mov_b32 s3, 0x3fae1bb4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[2:3], v[2:3], v[6:7]
	v_fma_f64 v[6:7], v[8:9], v[10:11], s[2:3]
	s_mov_b32 s2, 0x8b207f05
	s_mov_b32 s3, 0xbfb110e4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[10:11], v[20:21], v[12:13]
	v_add_f64 v[16:17], v[14:15], v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[6:7], v[8:9], v[6:7], s[2:3]
	s_mov_b32 s2, 0x57b87036
	s_mov_b32 s3, 0x3fb3b136
	v_add_f64 v[20:21], v[10:11], -v[20:21]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[18:19], v[10:11], v[16:17]
	v_add_f64 v[14:15], v[16:17], -v[14:15]
	v_fma_f64 v[6:7], v[8:9], v[6:7], s[2:3]
	s_mov_b32 s2, 0x19378e4f
	s_mov_b32 s3, 0xbfb745d1
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[12:13], v[12:13], -v[20:21]
	v_add_f64 v[22:23], v[18:19], -v[10:11]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[2:3], v[2:3], -v[14:15]
	v_fma_f64 v[6:7], v[8:9], v[6:7], s[2:3]
	s_mov_b32 s2, 0x17e1913c
	s_mov_b32 s3, 0x3fbc71c7
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[24:25], v[18:19], -v[22:23]
	v_add_f64 v[14:15], v[16:17], -v[22:23]
	v_add_f64 v[16:17], v[12:13], v[2:3]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f64 v[6:7], v[8:9], v[6:7], s[2:3]
	s_mov_b32 s2, 0x92376b7d
	s_mov_b32 s3, 0xbfc24924
	v_add_f64 v[10:11], v[10:11], -v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fma_f64 v[6:7], v[8:9], v[6:7], s[2:3]
	s_mov_b32 s2, 0x999952cc
	s_mov_b32 s3, 0x3fc99999
	v_add_f64 v[10:11], v[14:15], v[10:11]
	v_add_f64 v[14:15], v[16:17], -v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[6:7], v[8:9], v[6:7], s[2:3]
	s_mov_b32 s2, 0x55555523
	s_mov_b32 s3, 0xbfd55555
	v_add_f64 v[10:11], v[16:17], v[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[16:17], v[16:17], -v[14:15]
	v_add_f64 v[2:3], v[2:3], -v[14:15]
	v_fma_f64 v[6:7], v[8:9], v[6:7], s[2:3]
	s_mov_b32 s2, 0x54442d18
	s_mov_b32 s3, 0x3ff921fb
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[20:21], v[18:19], v[10:11]
	v_mul_f64 v[6:7], v[8:9], v[6:7]
	v_add_f64 v[8:9], v[12:13], -v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[20:21], -v[18:19]
	v_fma_f64 v[4:5], v[4:5], v[6:7], v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[2:3], v[2:3], v[8:9]
	v_add_f64 v[6:7], v[10:11], -v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[8:9], -v[4:5], s[2:3]
	s_mov_b32 s3, 0x400921fb
	v_add_f64 v[2:3], v[2:3], v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v5, v5, v9, s0
	v_cndmask_b32_e64 v4, v4, v8, s0
	v_ashrrev_i32_e32 v9, 31, v79
	v_cmp_gt_i32_e64 s0, 0, v79
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[6:7], -v[4:5], s[2:3]
	v_and_b32_e32 v10, 0x54442d18, v9
	v_and_b32_e32 v9, 0x400921fb, v9
	v_add_f64 v[2:3], v[20:21], v[2:3]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v4, v4, v6, s0
	v_cndmask_b32_e64 v5, v5, v7, s0
	v_mov_b32_e32 v6, 0x4002d97c
	v_cndmask_b32_e64 v6, 0x3fe921fb, v6, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_bfi_b32 v6, 0x7fffffff, v6, v75
	v_dual_cndmask_b32 v3, v3, v1 :: v_dual_cndmask_b32 v2, v2, v0
	v_cmp_eq_f64_e32 vcc_lo, 0, v[74:75]
	v_add_f64 v[2:3], v[2:3], 1.0
	v_cndmask_b32_e32 v10, v4, v10, vcc_lo
	v_cndmask_b32_e32 v4, v5, v9, vcc_lo
	v_cmp_ngt_f64_e32 vcc_lo, 0, v[0:1]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v3, 0x7ff80000, v3, vcc_lo
	s_and_b32 vcc_lo, s8, s9
	v_dual_mov_b32 v8, 0x7f3321d2 :: v_dual_cndmask_b32 v7, v4, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v8, 0x54442d18, v8, s0
	v_cmp_nge_f64_e64 s0, 0, v[0:1]
	v_cndmask_b32_e32 v6, v10, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v4, 0, v2, s0
	v_cmp_neq_f64_e64 s0, 0, v[0:1]
	v_cndmask_b32_e64 v5, 0xfff00000, v3, s0
.LBB0_141:                              ; %Flow438
	s_or_b32 exec_lo, exec_lo, s10
                                        ; implicit-def: $vgpr78_vgpr79
.LBB0_142:                              ; %Flow441
	s_and_not1_saveexec_b32 s0, s5
	s_cbranch_execz .LBB0_148
; %bb.143:
	v_cmp_ngt_f64_e64 s1, 0x20000000, |v[78:79]|
	v_cmp_ngt_f64_e64 s2, 0x20000000, |v[74:75]|
                                        ; implicit-def: $vgpr0_vgpr1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s1, s1, s2
	s_and_saveexec_b32 s2, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s1, exec_lo, s2
; %bb.144:                              ; %._crit_edge.i.i.i.i220
	v_mul_f64 v[0:1], v[74:75], v[74:75]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[0:1], v[78:79], v[78:79], v[0:1]
                                        ; implicit-def: $vgpr78_vgpr79
; %bb.145:                              ; %Flow439
	s_and_not1_saveexec_b32 s1, s1
; %bb.146:
	v_mul_f64 v[0:1], v[74:75], 4.0
	v_mul_f64 v[2:3], v[78:79], 4.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[0:1], v[0:1], v[0:1]
	v_fma_f64 v[0:1], v[2:3], v[2:3], v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_ldexp_f64 v[0:1], v[0:1], -4
; %bb.147:                              ; %_ZN6thrust4normIdEET_RKNS_7complexIS1_EE.exit.i.i.i221
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(VALU_DEP_1)
	v_frexp_mant_f64_e32 v[2:3], v[0:1]
	s_mov_b32 s3, 0x3fe55555
	s_mov_b32 s2, 0x55555555
	s_mov_b32 s8, 0x6b47b09a
	s_mov_b32 s10, 0xbf559e2b
	s_mov_b32 s9, 0x3fc38538
	s_mov_b32 s11, 0x3fc3ab76
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_cmp_gt_f64_e32 vcc_lo, s[2:3], v[2:3]
	s_mov_b32 s2, 0x55555780
	v_cndmask_b32_e64 v4, 0, 1, vcc_lo
	v_ldexp_f64 v[2:3], v[2:3], v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[4:5], v[2:3], 1.0
	v_add_f64 v[10:11], v[2:3], -1.0
	v_rcp_f64_e32 v[6:7], v[4:5]
	v_add_f64 v[12:13], v[4:5], -1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], v[2:3], -v[12:13]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[8:9], -v[4:5], v[6:7], 1.0
	v_fma_f64 v[6:7], v[8:9], v[6:7], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], -v[4:5], v[6:7], 1.0
	v_fma_f64 v[6:7], v[8:9], v[6:7], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[8:9], v[10:11], v[6:7]
	v_mul_f64 v[14:15], v[4:5], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], v[8:9], v[4:5], -v[14:15]
	v_fma_f64 v[2:3], v[8:9], v[2:3], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[4:5], v[14:15], v[2:3]
	v_add_f64 v[12:13], v[10:11], -v[4:5]
	v_add_f64 v[14:15], v[4:5], -v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[10:11], -v[12:13]
	v_add_f64 v[2:3], v[14:15], -v[2:3]
	v_frexp_exp_i32_f64_e32 v14, v[0:1]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[4:5], v[10:11], -v[4:5]
	v_add_f64 v[2:3], v[2:3], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], v[12:13], v[2:3]
	v_mul_f64 v[2:3], v[6:7], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[4:5], v[8:9], v[2:3]
	v_mul_f64 v[6:7], v[4:5], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_fma_f64 v[10:11], v[6:7], s[10:11], s[8:9]
	s_mov_b32 s8, 0xd7f4df2e
	s_mov_b32 s9, 0x3fc7474d
	v_mul_f64 v[12:13], v[4:5], v[6:7]
	v_fma_f64 v[10:11], v[6:7], v[10:11], s[8:9]
	s_mov_b32 s8, 0x16291751
	s_mov_b32 s9, 0x3fcc71c0
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[10:11], v[6:7], v[10:11], s[8:9]
	s_mov_b32 s8, 0x9b27acf1
	s_mov_b32 s9, 0x3fd24924
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[10:11], v[6:7], v[10:11], s[8:9]
	s_mov_b32 s8, 0x998ef7b6
	s_mov_b32 s9, 0x3fd99999
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[10:11], v[6:7], v[10:11], s[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_fma_f64 v[6:7], v[6:7], v[10:11], s[2:3]
	v_ldexp_f64 v[10:11], v[4:5], 1
	v_add_f64 v[4:5], v[4:5], -v[8:9]
	s_mov_b32 s2, 0xfefa39ef
	s_mov_b32 s3, 0x3fe62e42
	v_mul_f64 v[6:7], v[12:13], v[6:7]
	v_subrev_co_ci_u32_e32 v12, vcc_lo, 0, v14, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[2:3], v[2:3], -v[4:5]
	v_cmp_class_f64_e64 vcc_lo, v[0:1], 0x204
	v_cvt_f64_i32_e32 v[12:13], v12
	v_add_f64 v[8:9], v[10:11], v[6:7]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[2:3], v[2:3], 1
	v_mul_f64 v[14:15], v[12:13], s[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[4:5], v[8:9], -v[10:11]
	v_fma_f64 v[10:11], v[12:13], s[2:3], -v[14:15]
	s_mov_b32 s2, 0x3b39803f
	s_mov_b32 s3, 0x3c7abc9e
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[4:5], v[6:7], -v[4:5]
	v_fma_f64 v[6:7], v[12:13], s[2:3], v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[2:3], v[2:3], v[4:5]
	v_add_f64 v[4:5], v[14:15], v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[8:9], v[2:3]
	v_add_f64 v[14:15], v[4:5], -v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[12:13], v[4:5], v[10:11]
	v_add_f64 v[8:9], v[10:11], -v[8:9]
	v_add_f64 v[6:7], v[6:7], -v[14:15]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[16:17], v[12:13], -v[4:5]
	v_add_f64 v[2:3], v[2:3], -v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[18:19], v[12:13], -v[16:17]
	v_add_f64 v[8:9], v[10:11], -v[16:17]
	v_add_f64 v[10:11], v[6:7], v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[4:5], v[4:5], -v[18:19]
	v_add_f64 v[4:5], v[8:9], v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[8:9], v[10:11], -v[6:7]
	v_add_f64 v[4:5], v[10:11], v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[10:11], v[10:11], -v[8:9]
	v_add_f64 v[2:3], v[2:3], -v[8:9]
	v_add_f64 v[14:15], v[12:13], v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[6:7], -v[10:11]
	v_add_f64 v[8:9], v[14:15], -v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_add_f64 v[2:3], v[2:3], v[6:7]
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v7, 0x7ff80000
	v_add_f64 v[4:5], v[4:5], -v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], v[2:3], v[4:5]
	v_add_f64 v[2:3], v[14:15], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_cndmask_b32 v2, v2, v0 :: v_dual_cndmask_b32 v3, v3, v1
	v_cmp_ngt_f64_e32 vcc_lo, 0, v[0:1]
	v_cndmask_b32_e32 v3, 0x7ff80000, v3, vcc_lo
	v_cmp_nge_f64_e32 vcc_lo, 0, v[0:1]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_cndmask_b32_e32 v4, 0, v2, vcc_lo
	v_cmp_neq_f64_e32 vcc_lo, 0, v[0:1]
	v_cndmask_b32_e32 v5, 0xfff00000, v3, vcc_lo
.LBB0_148:                              ; %Flow442
	s_or_b32 exec_lo, exec_lo, s0
	v_bfi_b32 v7, 0x7fffffff, v7, v75
	s_mov_b32 s0, 0x55555555
	s_mov_b32 s1, 0x3fd55555
	s_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)
	v_mul_f64 v[2:3], v[4:5], s[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[0:1], v[6:7], s[0:1]
	v_and_b32_e32 v18, 0x7fffffff, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or_b32_e32 v4, v18, v0
	v_cmp_ne_u32_e32 vcc_lo, 0, v4
                                        ; implicit-def: $vgpr4_vgpr5
	s_and_saveexec_b32 s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s5, exec_lo, s0
	s_cbranch_execz .LBB0_190
; %bb.149:
	v_and_b32_e32 v6, 0x7fffffff, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_or_b32_e32 v4, v6, v2
	v_cmp_ne_u32_e32 vcc_lo, 0, v4
                                        ; implicit-def: $vgpr4_vgpr5
	s_and_saveexec_b32 s0, vcc_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s8, exec_lo, s0
	s_cbranch_execz .LBB0_179
; %bb.150:
                                        ; implicit-def: $vgpr4_vgpr5
	s_mov_b32 s0, exec_lo
	v_cmpx_gt_u32_e32 0x7ff00000, v18
	s_xor_b32 s9, exec_lo, s0
	s_cbranch_execz .LBB0_172
; %bb.151:
	v_add_nc_u32_e32 v4, 0xbf79d1be, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_lt_u32_e32 vcc_lo, 0x108aa2, v4
                                        ; implicit-def: $vgpr4_vgpr5
	s_and_saveexec_b32 s0, vcc_lo
	s_xor_b32 s10, exec_lo, s0
	s_cbranch_execz .LBB0_161
; %bb.152:
	v_cmp_ngt_f64_e64 s1, 0x41d00000, |v[0:1]|
                                        ; implicit-def: $vgpr12
                                        ; implicit-def: $vgpr4_vgpr5
                                        ; implicit-def: $vgpr6_vgpr7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s0, s1
	s_xor_b32 s2, exec_lo, s0
	s_cbranch_execz .LBB0_154
; %bb.153:
	v_ldexp_f64 v[4:5], |v[0:1]|, 0xffffff80
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[0:1]|
	v_trig_preop_f64 v[6:7], |v[0:1]|, 0
	v_trig_preop_f64 v[8:9], |v[0:1]|, 1
	v_trig_preop_f64 v[19:20], |v[0:1]|, 2
	v_mov_b32_e32 v27, 0
	s_mov_b32 s12, 0x54442d18
	s_mov_b32 s13, 0x3ff921fb
	s_mov_b32 s14, 0x33145c07
	s_mov_b32 s15, 0x3c91a626
	v_dual_cndmask_b32 v5, v18, v5 :: v_dual_cndmask_b32 v4, v0, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[10:11], v[6:7], v[4:5]
	v_mul_f64 v[12:13], v[8:9], v[4:5]
	v_mul_f64 v[25:26], v[19:20], v[4:5]
	v_fma_f64 v[6:7], v[6:7], v[4:5], -v[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[8:9], v[8:9], v[4:5], -v[12:13]
	v_fma_f64 v[4:5], v[19:20], v[4:5], -v[25:26]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[14:15], v[12:13], v[6:7]
	v_add_f64 v[16:17], v[14:15], -v[12:13]
	v_add_f64 v[23:24], v[10:11], v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[21:22], v[14:15], -v[16:17]
	v_add_f64 v[6:7], v[6:7], -v[16:17]
	v_ldexp_f64 v[16:17], v[23:24], -2
	v_add_f64 v[10:11], v[23:24], -v[10:11]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[12:13], v[12:13], -v[21:22]
	v_add_f64 v[21:22], v[25:26], v[8:9]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[16:17]|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[10:11], v[14:15], -v[10:11]
	v_add_f64 v[6:7], v[6:7], v[12:13]
	v_fract_f64_e32 v[12:13], v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[14:15], v[21:22], v[6:7]
	v_dual_cndmask_b32 v13, 0, v13 :: v_dual_cndmask_b32 v12, 0, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[12:13], v[12:13], 2
	v_add_f64 v[16:17], v[10:11], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[23:24], v[16:17], v[12:13]
	v_add_f64 v[10:11], v[16:17], -v[10:11]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[23:24]
	v_add_f64 v[23:24], v[21:22], -v[25:26]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[10:11], v[14:15], -v[10:11]
	v_cndmask_b32_e64 v28, 0, 0x40100000, vcc_lo
	v_add_f64 v[32:33], v[21:22], -v[23:24]
	v_add_f64 v[8:9], v[8:9], -v[23:24]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[12:13], v[12:13], v[27:28]
	v_add_f64 v[28:29], v[14:15], -v[21:22]
	v_add_f64 v[23:24], v[25:26], -v[32:33]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[30:31], v[16:17], v[12:13]
	v_add_f64 v[34:35], v[14:15], -v[28:29]
	v_add_f64 v[6:7], v[6:7], -v[28:29]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[8:9], v[8:9], v[23:24]
	v_cvt_i32_f64_e32 v30, v[30:31]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[21:22], v[21:22], -v[34:35]
	v_cvt_f64_i32_e32 v[28:29], v30
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[6:7], v[21:22]
	v_add_f64 v[12:13], v[12:13], -v[28:29]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[8:9], v[6:7]
	v_add_f64 v[8:9], v[16:17], v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[4:5], v[4:5], v[6:7]
	v_add_f64 v[6:7], v[8:9], -v[12:13]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[4:5], v[10:11], v[4:5]
	v_add_f64 v[6:7], v[16:17], -v[6:7]
	v_cndmask_b32_e64 v28, 0, 0x3ff00000, vcc_lo
	v_add_co_ci_u32_e64 v12, s0, 0, v30, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[4:5], v[4:5], v[6:7]
	v_add_f64 v[6:7], v[8:9], -v[27:28]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[6:7], v[4:5]
	v_mul_f64 v[10:11], v[8:9], s[12:13]
	v_add_f64 v[6:7], v[8:9], -v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[13:14], v[8:9], s[12:13], -v[10:11]
	v_add_f64 v[4:5], v[4:5], -v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], v[8:9], s[14:15], v[13:14]
	v_fma_f64 v[6:7], v[4:5], s[12:13], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[4:5], v[10:11], v[6:7]
	v_add_f64 v[8:9], v[4:5], -v[10:11]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[6:7], v[6:7], -v[8:9]
.LBB0_154:                              ; %Flow402
	s_and_not1_saveexec_b32 s0, s2
	s_cbranch_execz .LBB0_156
; %bb.155:
	s_mov_b32 s2, 0x6dc9c883
	s_mov_b32 s3, 0x3fe45f30
	s_mov_b32 s13, 0xbc91a626
	v_mul_f64 v[4:5], |v[0:1]|, s[2:3]
	s_mov_b32 s2, 0x54442d18
	s_mov_b32 s3, 0xbff921fb
	s_mov_b32 s12, 0x33145c00
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[8:9], v[4:5]
	v_fma_f64 v[4:5], v[8:9], s[2:3], |v[0:1]|
	v_mul_f64 v[6:7], v[8:9], s[12:13]
	s_mov_b32 s2, 0x252049c0
	s_mov_b32 s3, 0xb97b839a
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[12:13], v[8:9], s[12:13], v[4:5]
	v_add_f64 v[10:11], v[4:5], v[6:7]
	s_mov_b32 s13, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[4:5], v[4:5], -v[10:11]
	v_add_f64 v[10:11], v[10:11], -v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[4:5], v[4:5], v[6:7]
	v_fma_f64 v[6:7], v[8:9], s[12:13], v[6:7]
	v_add_f64 v[4:5], v[10:11], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[4:5], v[4:5], -v[6:7]
	v_fma_f64 v[6:7], v[8:9], s[2:3], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[4:5], v[12:13], v[6:7]
	v_add_f64 v[10:11], v[4:5], -v[12:13]
	v_cvt_i32_f64_e32 v12, v[8:9]
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f64 v[6:7], v[6:7], -v[10:11]
.LBB0_156:                              ; %_ZL3cosd.exit17.i.i.i157
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr13
                                        ; implicit-def: $vgpr8_vgpr9
                                        ; implicit-def: $vgpr10_vgpr11
	s_and_saveexec_b32 s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s1, exec_lo, s0
	s_cbranch_execz .LBB0_158
; %bb.157:
	v_ldexp_f64 v[8:9], |v[0:1]|, 0xffffff80
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[0:1]|
	v_trig_preop_f64 v[10:11], |v[0:1]|, 0
	v_trig_preop_f64 v[13:14], |v[0:1]|, 1
	v_trig_preop_f64 v[23:24], |v[0:1]|, 2
	v_mov_b32_e32 v31, 0
	s_mov_b32 s2, 0x54442d18
	s_mov_b32 s3, 0x3ff921fb
	s_mov_b32 s12, 0x33145c07
	s_mov_b32 s13, 0x3c91a626
	v_dual_cndmask_b32 v9, v18, v9 :: v_dual_cndmask_b32 v8, v0, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[15:16], v[10:11], v[8:9]
	v_mul_f64 v[17:18], v[13:14], v[8:9]
	v_mul_f64 v[29:30], v[23:24], v[8:9]
	v_fma_f64 v[10:11], v[10:11], v[8:9], -v[15:16]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[13:14], v[13:14], v[8:9], -v[17:18]
	v_fma_f64 v[8:9], v[23:24], v[8:9], -v[29:30]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[19:20], v[17:18], v[10:11]
	v_add_f64 v[21:22], v[19:20], -v[17:18]
	v_add_f64 v[27:28], v[15:16], v[19:20]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[25:26], v[19:20], -v[21:22]
	v_add_f64 v[10:11], v[10:11], -v[21:22]
	v_ldexp_f64 v[21:22], v[27:28], -2
	v_add_f64 v[15:16], v[27:28], -v[15:16]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[17:18], v[17:18], -v[25:26]
	v_add_f64 v[25:26], v[29:30], v[13:14]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[21:22]|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[15:16], v[19:20], -v[15:16]
	v_add_f64 v[10:11], v[10:11], v[17:18]
	v_fract_f64_e32 v[17:18], v[21:22]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[19:20], v[25:26], v[10:11]
	v_dual_cndmask_b32 v18, 0, v18 :: v_dual_cndmask_b32 v17, 0, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[17:18], v[17:18], 2
	v_add_f64 v[21:22], v[15:16], v[19:20]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[27:28], v[21:22], v[17:18]
	v_add_f64 v[15:16], v[21:22], -v[15:16]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[27:28]
	v_add_f64 v[27:28], v[25:26], -v[29:30]
	v_cndmask_b32_e64 v32, 0, 0x40100000, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[36:37], v[25:26], -v[27:28]
	v_add_f64 v[13:14], v[13:14], -v[27:28]
	v_add_f64 v[17:18], v[17:18], v[31:32]
	v_add_f64 v[32:33], v[19:20], -v[25:26]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[27:28], v[29:30], -v[36:37]
	v_add_f64 v[34:35], v[21:22], v[17:18]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[38:39], v[19:20], -v[32:33]
	v_add_f64 v[10:11], v[10:11], -v[32:33]
	v_add_f64 v[13:14], v[13:14], v[27:28]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cvt_i32_f64_e32 v34, v[34:35]
	v_add_f64 v[25:26], v[25:26], -v[38:39]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[32:33], v34
	v_add_f64 v[10:11], v[10:11], v[25:26]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[17:18], v[17:18], -v[32:33]
	v_add_f64 v[10:11], v[13:14], v[10:11]
	v_add_f64 v[13:14], v[19:20], -v[15:16]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[23:24], v[21:22], v[17:18]
	v_add_f64 v[8:9], v[8:9], v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[10:11], v[23:24], -v[17:18]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[23:24]
	v_add_f64 v[8:9], v[13:14], v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_f64 v[10:11], v[21:22], -v[10:11]
	v_cndmask_b32_e64 v32, 0, 0x3ff00000, vcc_lo
	v_add_co_ci_u32_e64 v13, s0, 0, v34, vcc_lo
	v_add_f64 v[8:9], v[8:9], v[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[10:11], v[23:24], -v[31:32]
	v_add_f64 v[14:15], v[10:11], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[16:17], v[14:15], s[2:3]
	v_add_f64 v[10:11], v[14:15], -v[10:11]
	v_fma_f64 v[18:19], v[14:15], s[2:3], -v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[8:9], v[8:9], -v[10:11]
	v_fma_f64 v[10:11], v[14:15], s[12:13], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[10:11], v[8:9], s[2:3], v[10:11]
	v_add_f64 v[8:9], v[16:17], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[14:15], v[8:9], -v[16:17]
	v_add_f64 v[10:11], v[10:11], -v[14:15]
.LBB0_158:                              ; %Flow401
	s_and_not1_saveexec_b32 s0, s1
	s_cbranch_execz .LBB0_160
; %bb.159:
	s_mov_b32 s2, 0x6dc9c883
	s_mov_b32 s3, 0x3fe45f30
	s_mov_b32 s13, 0xbc91a626
	v_mul_f64 v[8:9], |v[0:1]|, s[2:3]
	s_mov_b32 s2, 0x54442d18
	s_mov_b32 s3, 0xbff921fb
	s_mov_b32 s12, 0x33145c00
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[13:14], v[8:9]
	v_fma_f64 v[8:9], v[13:14], s[2:3], |v[0:1]|
	v_mul_f64 v[10:11], v[13:14], s[12:13]
	s_mov_b32 s2, 0x252049c0
	s_mov_b32 s3, 0xb97b839a
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[17:18], v[13:14], s[12:13], v[8:9]
	v_add_f64 v[15:16], v[8:9], v[10:11]
	s_mov_b32 s13, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[8:9], v[8:9], -v[15:16]
	v_add_f64 v[15:16], v[15:16], -v[17:18]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[8:9], v[8:9], v[10:11]
	v_fma_f64 v[10:11], v[13:14], s[12:13], v[10:11]
	v_add_f64 v[8:9], v[15:16], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[8:9], -v[10:11]
	v_fma_f64 v[10:11], v[13:14], s[2:3], v[8:9]
	v_cvt_i32_f64_e32 v13, v[13:14]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[17:18], v[10:11]
	v_add_f64 v[15:16], v[8:9], -v[17:18]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[10:11], v[10:11], -v[15:16]
.LBB0_160:                              ; %_ZL3sind.exit22.i.i.i162
	s_or_b32 exec_lo, exec_lo, s0
	s_mov_b32 s0, 0x652b82fe
	s_mov_b32 s1, 0x3ff71547
	s_mov_b32 s2, 0x6a5dcb37
	v_mul_f64 v[14:15], v[2:3], s[0:1]
	s_mov_b32 s0, 0xfefa39ef
	s_mov_b32 s1, 0xbfe62e42
	s_mov_b32 s3, 0x3e5ade15
	v_mul_f64 v[20:21], v[4:5], v[4:5]
	v_mul_f64 v[22:23], v[8:9], v[8:9]
	s_mov_b32 s12, 0x1852b7b0
	s_mov_b32 s13, 0x3f56c16c
	s_mov_b32 s15, 0x3f811111
	s_mov_b32 s14, 0x11122322
	s_mov_b32 s16, 0x19f4ec90
	s_mov_b32 s17, 0x3efa01a0
	s_delay_alu instid0(VALU_DEP_4)
	v_mul_f64 v[40:41], v[6:7], 0.5
	v_mul_f64 v[46:47], v[10:11], 0.5
	v_rndne_f64_e32 v[14:15], v[14:15]
	v_mul_f64 v[28:29], v[20:21], 0.5
	v_mul_f64 v[32:33], v[22:23], 0.5
	v_mul_f64 v[42:43], v[4:5], -v[20:21]
	v_mul_f64 v[48:49], v[8:9], -v[22:23]
	v_fma_f64 v[16:17], v[14:15], s[0:1], v[2:3]
	s_mov_b32 s0, 0x3b39803f
	s_mov_b32 s1, 0xbc7abc9e
	v_add_f64 v[36:37], -v[28:29], 1.0
	v_add_f64 v[38:39], -v[32:33], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[16:17], v[14:15], s[0:1], v[16:17]
	s_mov_b32 s0, 0xfca7ab0c
	s_mov_b32 s1, 0x3e928af3
	v_add_f64 v[44:45], -v[36:37], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[50:51], -v[38:39], 1.0
	v_fma_f64 v[18:19], v[16:17], s[2:3], s[0:1]
	s_mov_b32 s0, 0x623fde64
	s_mov_b32 s1, 0x3ec71dee
	s_mov_b32 s2, 0xf9a43bb8
	s_mov_b32 s3, 0x3de5e0b2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[28:29], v[44:45], -v[28:29]
	v_add_f64 v[32:33], v[50:51], -v[32:33]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[0:1]
	s_mov_b32 s0, 0x7c89e6b0
	s_mov_b32 s1, 0x3efa0199
	v_fma_f64 v[28:29], v[4:5], -v[6:7], v[28:29]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[0:1]
	s_mov_b32 s0, 0x14761f6e
	s_mov_b32 s1, 0x3f2a01a0
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[0:1]
	s_mov_b32 s0, 0xb42fdfa7
	s_mov_b32 s1, 0xbe5ae600
	s_delay_alu instid0(SALU_CYCLE_1)
	v_fma_f64 v[24:25], v[20:21], s[2:3], s[0:1]
	v_fma_f64 v[26:27], v[22:23], s[2:3], s[0:1]
	s_mov_b32 s0, 0x46cc5e42
	s_mov_b32 s2, 0x796cde01
	s_mov_b32 s1, 0xbda907db
	s_mov_b32 s3, 0x3ec71de3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[12:13]
	s_mov_b32 s12, 0x9037ab78
	s_mov_b32 s13, 0x3e21eeb6
	v_fma_f64 v[30:31], v[20:21], s[0:1], s[12:13]
	s_delay_alu instid0(VALU_DEP_4)
	v_fma_f64 v[24:25], v[20:21], v[24:25], s[2:3]
	v_fma_f64 v[34:35], v[22:23], s[0:1], s[12:13]
	v_fma_f64 v[26:27], v[22:23], v[26:27], s[2:3]
	s_mov_b32 s0, 0xa17f65f6
	s_mov_b32 s2, 0x19e83e5c
	s_mov_b32 s1, 0xbe927e4f
	s_mov_b32 s3, 0xbf2a01a0
	s_mov_b32 s13, 0x3fa55555
	s_mov_b32 s12, 0x555502a1
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[14:15]
	s_mov_b32 s14, 0x11110bb3
	v_fma_f64 v[30:31], v[20:21], v[30:31], s[0:1]
	v_fma_f64 v[24:25], v[20:21], v[24:25], s[2:3]
	v_fma_f64 v[34:35], v[22:23], v[34:35], s[0:1]
	v_fma_f64 v[26:27], v[22:23], v[26:27], s[2:3]
	s_mov_b32 s0, 0x55555511
	s_mov_b32 s1, 0x3fc55555
	s_mov_b32 s2, 11
	s_mov_b32 s3, 0x3fe00000
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[12:13]
	s_mov_b32 s12, 0x55555555
	v_fma_f64 v[30:31], v[20:21], v[30:31], s[16:17]
	v_fma_f64 v[24:25], v[20:21], v[24:25], s[14:15]
	v_fma_f64 v[34:35], v[22:23], v[34:35], s[16:17]
	v_fma_f64 v[26:27], v[22:23], v[26:27], s[14:15]
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[0:1]
	s_mov_b32 s0, 0x16c16967
	s_mov_b32 s1, 0xbf56c16c
	s_delay_alu instid0(SALU_CYCLE_1)
	v_fma_f64 v[30:31], v[20:21], v[30:31], s[0:1]
	v_fma_f64 v[24:25], v[42:43], v[24:25], v[40:41]
	v_fma_f64 v[34:35], v[22:23], v[34:35], s[0:1]
	v_fma_f64 v[26:27], v[48:49], v[26:27], v[46:47]
	v_mul_f64 v[40:41], v[20:21], v[20:21]
	v_cmp_nlt_f64_e64 s1, 0x40900000, v[2:3]
	v_cmp_class_f64_e64 s0, v[0:1], 0x1f8
	v_lshlrev_b32_e32 v0, 30, v13
	s_delay_alu instid0(VALU_DEP_1)
	v_xor_b32_e32 v0, v0, v1
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[2:3]
	v_cmp_ngt_f64_e64 s2, 0xc090cc00, v[2:3]
	v_lshlrev_b32_e32 v2, 30, v12
	v_and_b32_e32 v3, 1, v13
	v_fma_f64 v[30:31], v[20:21], v[30:31], s[12:13]
	v_fma_f64 v[6:7], v[20:21], v[24:25], -v[6:7]
	v_mul_f64 v[20:21], v[22:23], v[22:23]
	v_fma_f64 v[24:25], v[8:9], -v[10:11], v[32:33]
	v_fma_f64 v[32:33], v[22:23], v[34:35], s[12:13]
	v_fma_f64 v[10:11], v[22:23], v[26:27], -v[10:11]
	s_mov_b32 s13, 0xbfc55555
	v_cvt_i32_f64_e32 v26, v[14:15]
	v_cmp_eq_u32_e64 s3, 0, v3
	v_fma_f64 v[18:19], v[16:17], v[18:19], 1.0
	v_fma_f64 v[22:23], v[40:41], v[30:31], v[28:29]
	v_fma_f64 v[6:7], v[42:43], s[12:13], v[6:7]
	v_fma_f64 v[10:11], v[48:49], s[12:13], v[10:11]
	s_delay_alu instid0(VALU_DEP_4)
	v_fma_f64 v[14:15], v[16:17], v[18:19], 1.0
	v_fma_f64 v[16:17], v[20:21], v[32:33], v[24:25]
	v_add_f64 v[18:19], v[36:37], v[22:23]
	v_add_f64 v[4:5], v[4:5], -v[6:7]
	v_add_f64 v[8:9], v[8:9], -v[10:11]
	v_and_b32_e32 v10, 1, v12
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_eq_u32_e32 vcc_lo, 0, v10
	v_ldexp_f64 v[6:7], v[14:15], v26
	v_add_f64 v[14:15], v[38:39], v[16:17]
	v_cndmask_b32_e32 v4, v4, v18, vcc_lo
	v_xor_b32_e32 v5, 0x80000000, v5
	v_and_b32_e32 v1, 0x80000000, v2
                                        ; implicit-def: $vgpr18
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v2, v5, v19, vcc_lo
	s_and_b32 vcc_lo, s2, s1
	v_and_b32_e32 v3, 0x80000000, v0
	v_cndmask_b32_e64 v0, 0, v4, s0
	v_xor_b32_e32 v1, v2, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v1, 0x7ff80000, v1, s0
	v_cndmask_b32_e32 v6, 0, v6, vcc_lo
	v_cndmask_b32_e64 v5, v14, v8, s3
	v_cndmask_b32_e64 v8, v15, v9, s3
	v_cndmask_b32_e64 v7, 0x7ff00000, v7, s1
	v_cndmask_b32_e64 v2, 0, v5, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_xor_b32_e32 v3, v8, v3
	v_cndmask_b32_e64 v7, 0, v7, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v3, 0x7ff80000, v3, s0
	v_mul_f64 v[4:5], v[6:7], v[0:1]
	s_delay_alu instid0(VALU_DEP_2)
	v_mul_f64 v[0:1], v[6:7], v[2:3]
                                        ; implicit-def: $vgpr2_vgpr3
.LBB0_161:                              ; %Flow406
	s_and_not1_saveexec_b32 s10, s10
	s_cbranch_execz .LBB0_171
; %bb.162:
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ngt_f64_e64 s1, 0x41d00000, |v[0:1]|
                                        ; implicit-def: $vgpr12
                                        ; implicit-def: $vgpr4_vgpr5
                                        ; implicit-def: $vgpr6_vgpr7
	s_and_saveexec_b32 s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s2, exec_lo, s0
	s_cbranch_execz .LBB0_164
; %bb.163:
	v_ldexp_f64 v[4:5], |v[0:1]|, 0xffffff80
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[0:1]|
	v_trig_preop_f64 v[6:7], |v[0:1]|, 0
	v_trig_preop_f64 v[8:9], |v[0:1]|, 1
	v_trig_preop_f64 v[19:20], |v[0:1]|, 2
	v_mov_b32_e32 v27, 0
	s_mov_b32 s12, 0x54442d18
	s_mov_b32 s13, 0x3ff921fb
	s_mov_b32 s14, 0x33145c07
	s_mov_b32 s15, 0x3c91a626
	v_dual_cndmask_b32 v5, v18, v5 :: v_dual_cndmask_b32 v4, v0, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[10:11], v[6:7], v[4:5]
	v_mul_f64 v[12:13], v[8:9], v[4:5]
	v_mul_f64 v[25:26], v[19:20], v[4:5]
	v_fma_f64 v[6:7], v[6:7], v[4:5], -v[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[8:9], v[8:9], v[4:5], -v[12:13]
	v_fma_f64 v[4:5], v[19:20], v[4:5], -v[25:26]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[14:15], v[12:13], v[6:7]
	v_add_f64 v[16:17], v[14:15], -v[12:13]
	v_add_f64 v[23:24], v[10:11], v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[21:22], v[14:15], -v[16:17]
	v_add_f64 v[6:7], v[6:7], -v[16:17]
	v_ldexp_f64 v[16:17], v[23:24], -2
	v_add_f64 v[10:11], v[23:24], -v[10:11]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[12:13], v[12:13], -v[21:22]
	v_add_f64 v[21:22], v[25:26], v[8:9]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[16:17]|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[10:11], v[14:15], -v[10:11]
	v_add_f64 v[6:7], v[6:7], v[12:13]
	v_fract_f64_e32 v[12:13], v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[14:15], v[21:22], v[6:7]
	v_dual_cndmask_b32 v13, 0, v13 :: v_dual_cndmask_b32 v12, 0, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[12:13], v[12:13], 2
	v_add_f64 v[16:17], v[10:11], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[23:24], v[16:17], v[12:13]
	v_add_f64 v[10:11], v[16:17], -v[10:11]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[23:24]
	v_add_f64 v[23:24], v[21:22], -v[25:26]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[10:11], v[14:15], -v[10:11]
	v_cndmask_b32_e64 v28, 0, 0x40100000, vcc_lo
	v_add_f64 v[32:33], v[21:22], -v[23:24]
	v_add_f64 v[8:9], v[8:9], -v[23:24]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[12:13], v[12:13], v[27:28]
	v_add_f64 v[28:29], v[14:15], -v[21:22]
	v_add_f64 v[23:24], v[25:26], -v[32:33]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[30:31], v[16:17], v[12:13]
	v_add_f64 v[34:35], v[14:15], -v[28:29]
	v_add_f64 v[6:7], v[6:7], -v[28:29]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[8:9], v[8:9], v[23:24]
	v_cvt_i32_f64_e32 v30, v[30:31]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[21:22], v[21:22], -v[34:35]
	v_cvt_f64_i32_e32 v[28:29], v30
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[6:7], v[21:22]
	v_add_f64 v[12:13], v[12:13], -v[28:29]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[8:9], v[6:7]
	v_add_f64 v[8:9], v[16:17], v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[4:5], v[4:5], v[6:7]
	v_add_f64 v[6:7], v[8:9], -v[12:13]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[4:5], v[10:11], v[4:5]
	v_add_f64 v[6:7], v[16:17], -v[6:7]
	v_cndmask_b32_e64 v28, 0, 0x3ff00000, vcc_lo
	v_add_co_ci_u32_e64 v12, s0, 0, v30, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[4:5], v[4:5], v[6:7]
	v_add_f64 v[6:7], v[8:9], -v[27:28]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[6:7], v[4:5]
	v_mul_f64 v[10:11], v[8:9], s[12:13]
	v_add_f64 v[6:7], v[8:9], -v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[13:14], v[8:9], s[12:13], -v[10:11]
	v_add_f64 v[4:5], v[4:5], -v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], v[8:9], s[14:15], v[13:14]
	v_fma_f64 v[6:7], v[4:5], s[12:13], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[4:5], v[10:11], v[6:7]
	v_add_f64 v[8:9], v[4:5], -v[10:11]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[6:7], v[6:7], -v[8:9]
.LBB0_164:                              ; %Flow405
	s_and_not1_saveexec_b32 s0, s2
	s_cbranch_execz .LBB0_166
; %bb.165:
	s_mov_b32 s2, 0x6dc9c883
	s_mov_b32 s3, 0x3fe45f30
	s_mov_b32 s13, 0xbc91a626
	v_mul_f64 v[4:5], |v[0:1]|, s[2:3]
	s_mov_b32 s2, 0x54442d18
	s_mov_b32 s3, 0xbff921fb
	s_mov_b32 s12, 0x33145c00
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[8:9], v[4:5]
	v_fma_f64 v[4:5], v[8:9], s[2:3], |v[0:1]|
	v_mul_f64 v[6:7], v[8:9], s[12:13]
	s_mov_b32 s2, 0x252049c0
	s_mov_b32 s3, 0xb97b839a
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[12:13], v[8:9], s[12:13], v[4:5]
	v_add_f64 v[10:11], v[4:5], v[6:7]
	s_mov_b32 s13, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[4:5], v[4:5], -v[10:11]
	v_add_f64 v[10:11], v[10:11], -v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[4:5], v[4:5], v[6:7]
	v_fma_f64 v[6:7], v[8:9], s[12:13], v[6:7]
	v_add_f64 v[4:5], v[10:11], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[4:5], v[4:5], -v[6:7]
	v_fma_f64 v[6:7], v[8:9], s[2:3], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[4:5], v[12:13], v[6:7]
	v_add_f64 v[10:11], v[4:5], -v[12:13]
	v_cvt_i32_f64_e32 v12, v[8:9]
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f64 v[6:7], v[6:7], -v[10:11]
.LBB0_166:                              ; %_ZL3cosd.exit.i.i.i.i171
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr13
                                        ; implicit-def: $vgpr8_vgpr9
                                        ; implicit-def: $vgpr10_vgpr11
	s_and_saveexec_b32 s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s1, exec_lo, s0
	s_cbranch_execz .LBB0_168
; %bb.167:
	v_ldexp_f64 v[8:9], |v[0:1]|, 0xffffff80
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[0:1]|
	v_trig_preop_f64 v[10:11], |v[0:1]|, 0
	v_trig_preop_f64 v[13:14], |v[0:1]|, 1
	v_trig_preop_f64 v[23:24], |v[0:1]|, 2
	v_mov_b32_e32 v31, 0
	s_mov_b32 s2, 0x54442d18
	s_mov_b32 s3, 0x3ff921fb
	s_mov_b32 s12, 0x33145c07
	s_mov_b32 s13, 0x3c91a626
	v_dual_cndmask_b32 v9, v18, v9 :: v_dual_cndmask_b32 v8, v0, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[15:16], v[10:11], v[8:9]
	v_mul_f64 v[17:18], v[13:14], v[8:9]
	v_mul_f64 v[29:30], v[23:24], v[8:9]
	v_fma_f64 v[10:11], v[10:11], v[8:9], -v[15:16]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[13:14], v[13:14], v[8:9], -v[17:18]
	v_fma_f64 v[8:9], v[23:24], v[8:9], -v[29:30]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[19:20], v[17:18], v[10:11]
	v_add_f64 v[21:22], v[19:20], -v[17:18]
	v_add_f64 v[27:28], v[15:16], v[19:20]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[25:26], v[19:20], -v[21:22]
	v_add_f64 v[10:11], v[10:11], -v[21:22]
	v_ldexp_f64 v[21:22], v[27:28], -2
	v_add_f64 v[15:16], v[27:28], -v[15:16]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[17:18], v[17:18], -v[25:26]
	v_add_f64 v[25:26], v[29:30], v[13:14]
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[21:22]|
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_f64 v[15:16], v[19:20], -v[15:16]
	v_add_f64 v[10:11], v[10:11], v[17:18]
	v_fract_f64_e32 v[17:18], v[21:22]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[19:20], v[25:26], v[10:11]
	v_dual_cndmask_b32 v18, 0, v18 :: v_dual_cndmask_b32 v17, 0, v17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_ldexp_f64 v[17:18], v[17:18], 2
	v_add_f64 v[21:22], v[15:16], v[19:20]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[27:28], v[21:22], v[17:18]
	v_add_f64 v[15:16], v[21:22], -v[15:16]
	v_cmp_gt_f64_e32 vcc_lo, 0, v[27:28]
	v_add_f64 v[27:28], v[25:26], -v[29:30]
	v_cndmask_b32_e64 v32, 0, 0x40100000, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[36:37], v[25:26], -v[27:28]
	v_add_f64 v[13:14], v[13:14], -v[27:28]
	v_add_f64 v[17:18], v[17:18], v[31:32]
	v_add_f64 v[32:33], v[19:20], -v[25:26]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[27:28], v[29:30], -v[36:37]
	v_add_f64 v[34:35], v[21:22], v[17:18]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[38:39], v[19:20], -v[32:33]
	v_add_f64 v[10:11], v[10:11], -v[32:33]
	v_add_f64 v[13:14], v[13:14], v[27:28]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cvt_i32_f64_e32 v34, v[34:35]
	v_add_f64 v[25:26], v[25:26], -v[38:39]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[32:33], v34
	v_add_f64 v[10:11], v[10:11], v[25:26]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[17:18], v[17:18], -v[32:33]
	v_add_f64 v[10:11], v[13:14], v[10:11]
	v_add_f64 v[13:14], v[19:20], -v[15:16]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[23:24], v[21:22], v[17:18]
	v_add_f64 v[8:9], v[8:9], v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[10:11], v[23:24], -v[17:18]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[23:24]
	v_add_f64 v[8:9], v[13:14], v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_f64 v[10:11], v[21:22], -v[10:11]
	v_cndmask_b32_e64 v32, 0, 0x3ff00000, vcc_lo
	v_add_co_ci_u32_e64 v13, s0, 0, v34, vcc_lo
	v_add_f64 v[8:9], v[8:9], v[10:11]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[10:11], v[23:24], -v[31:32]
	v_add_f64 v[14:15], v[10:11], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[16:17], v[14:15], s[2:3]
	v_add_f64 v[10:11], v[14:15], -v[10:11]
	v_fma_f64 v[18:19], v[14:15], s[2:3], -v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[8:9], v[8:9], -v[10:11]
	v_fma_f64 v[10:11], v[14:15], s[12:13], v[18:19]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[10:11], v[8:9], s[2:3], v[10:11]
	v_add_f64 v[8:9], v[16:17], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[14:15], v[8:9], -v[16:17]
	v_add_f64 v[10:11], v[10:11], -v[14:15]
.LBB0_168:                              ; %Flow404
	s_and_not1_saveexec_b32 s0, s1
	s_cbranch_execz .LBB0_170
; %bb.169:
	s_mov_b32 s2, 0x6dc9c883
	s_mov_b32 s3, 0x3fe45f30
	s_mov_b32 s13, 0xbc91a626
	v_mul_f64 v[8:9], |v[0:1]|, s[2:3]
	s_mov_b32 s2, 0x54442d18
	s_mov_b32 s3, 0xbff921fb
	s_mov_b32 s12, 0x33145c00
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[13:14], v[8:9]
	v_fma_f64 v[8:9], v[13:14], s[2:3], |v[0:1]|
	v_mul_f64 v[10:11], v[13:14], s[12:13]
	s_mov_b32 s2, 0x252049c0
	s_mov_b32 s3, 0xb97b839a
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[17:18], v[13:14], s[12:13], v[8:9]
	v_add_f64 v[15:16], v[8:9], v[10:11]
	s_mov_b32 s13, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[8:9], v[8:9], -v[15:16]
	v_add_f64 v[15:16], v[15:16], -v[17:18]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[8:9], v[8:9], v[10:11]
	v_fma_f64 v[10:11], v[13:14], s[12:13], v[10:11]
	v_add_f64 v[8:9], v[15:16], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[8:9], -v[10:11]
	v_fma_f64 v[10:11], v[13:14], s[2:3], v[8:9]
	v_cvt_i32_f64_e32 v13, v[13:14]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[17:18], v[10:11]
	v_add_f64 v[15:16], v[8:9], -v[17:18]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[10:11], v[10:11], -v[15:16]
.LBB0_170:                              ; %_ZN6thrust6detail7complex10ldexp_cexpENS_7complexIdEEi.exit.i.i.i175
	s_or_b32 exec_lo, exec_lo, s0
	s_mov_b32 s0, 0x19ba0da4
	s_mov_b32 s1, 0xc0937be3
	s_mov_b32 s2, 0x6a5dcb37
	v_add_f64 v[2:3], v[2:3], s[0:1]
	s_mov_b32 s0, 0x652b82fe
	s_mov_b32 s1, 0x3ff71547
	s_mov_b32 s3, 0x3e5ade15
	s_delay_alu instid0(VALU_DEP_4)
	v_mul_f64 v[20:21], v[4:5], v[4:5]
	v_mul_f64 v[22:23], v[8:9], v[8:9]
	s_mov_b32 s12, 0x1852b7b0
	s_mov_b32 s13, 0x3f56c16c
	s_mov_b32 s14, 0x46cc5e42
	s_mov_b32 s15, 0xbda907db
	s_mov_b32 s16, 0x11122322
	s_delay_alu instid0(VALU_DEP_4)
	v_mul_f64 v[40:41], v[6:7], 0.5
	v_mul_f64 v[46:47], v[10:11], 0.5
	v_mul_f64 v[14:15], v[2:3], s[0:1]
	s_mov_b32 s0, 0xfefa39ef
	s_mov_b32 s1, 0xbfe62e42
	v_mul_f64 v[30:31], v[20:21], 0.5
	v_mul_f64 v[32:33], v[22:23], 0.5
	v_mul_f64 v[42:43], v[4:5], -v[20:21]
	v_mul_f64 v[48:49], v[8:9], -v[22:23]
	v_rndne_f64_e32 v[14:15], v[14:15]
	v_add_f64 v[36:37], -v[30:31], 1.0
	v_add_f64 v[38:39], -v[32:33], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[16:17], v[14:15], s[0:1], v[2:3]
	s_mov_b32 s0, 0x3b39803f
	s_mov_b32 s1, 0xbc7abc9e
	v_add_f64 v[44:45], -v[36:37], 1.0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[50:51], -v[38:39], 1.0
	v_fma_f64 v[16:17], v[14:15], s[0:1], v[16:17]
	s_mov_b32 s0, 0xfca7ab0c
	s_mov_b32 s1, 0x3e928af3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[30:31], v[44:45], -v[30:31]
	v_add_f64 v[32:33], v[50:51], -v[32:33]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_fma_f64 v[18:19], v[16:17], s[2:3], s[0:1]
	s_mov_b32 s0, 0x623fde64
	s_mov_b32 s1, 0x3ec71dee
	s_mov_b32 s2, 0xf9a43bb8
	s_mov_b32 s3, 0x3de5e0b2
	v_fma_f64 v[30:31], v[4:5], -v[6:7], v[30:31]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[32:33], v[8:9], -v[10:11], v[32:33]
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[0:1]
	s_mov_b32 s0, 0x7c89e6b0
	s_mov_b32 s1, 0x3efa0199
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[0:1]
	s_mov_b32 s0, 0x14761f6e
	s_mov_b32 s1, 0x3f2a01a0
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[0:1]
	s_mov_b32 s0, 0xb42fdfa7
	s_mov_b32 s1, 0xbe5ae600
	s_delay_alu instid0(SALU_CYCLE_1)
	v_fma_f64 v[24:25], v[20:21], s[2:3], s[0:1]
	v_fma_f64 v[26:27], v[22:23], s[2:3], s[0:1]
	s_mov_b32 s0, 0x796cde01
	s_mov_b32 s1, 0x3ec71de3
	s_mov_b32 s2, 0x11110bb3
	s_mov_b32 s3, 0x3f811111
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	s_mov_b32 s17, s3
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[12:13]
	s_mov_b32 s12, 0x9037ab78
	s_mov_b32 s13, 0x3e21eeb6
	s_delay_alu instid0(VALU_DEP_3)
	v_fma_f64 v[24:25], v[20:21], v[24:25], s[0:1]
	v_fma_f64 v[28:29], v[20:21], s[14:15], s[12:13]
	v_fma_f64 v[34:35], v[22:23], s[14:15], s[12:13]
	v_fma_f64 v[26:27], v[22:23], v[26:27], s[0:1]
	s_mov_b32 s12, 0x19e83e5c
	s_mov_b32 s13, 0xbf2a01a0
	s_mov_b32 s0, 0x55555555
	s_mov_b32 s1, 0x3fa55555
	s_mov_b32 s14, 0x555502a1
	s_mov_b32 s15, s1
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[16:17]
	s_mov_b32 s16, 0xa17f65f6
	s_mov_b32 s17, 0xbe927e4f
	v_fma_f64 v[24:25], v[20:21], v[24:25], s[12:13]
	v_fma_f64 v[28:29], v[20:21], v[28:29], s[16:17]
	v_fma_f64 v[34:35], v[22:23], v[34:35], s[16:17]
	v_fma_f64 v[26:27], v[22:23], v[26:27], s[12:13]
	s_mov_b32 s12, 0x19f4ec90
	s_mov_b32 s13, 0x3efa01a0
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[14:15]
	s_mov_b32 s14, 0x55555511
	s_mov_b32 s15, 0x3fc55555
	v_fma_f64 v[24:25], v[20:21], v[24:25], s[2:3]
	v_fma_f64 v[28:29], v[20:21], v[28:29], s[12:13]
	v_fma_f64 v[34:35], v[22:23], v[34:35], s[12:13]
	v_fma_f64 v[26:27], v[22:23], v[26:27], s[2:3]
	s_mov_b32 s2, 0x16c16967
	s_mov_b32 s3, 0xbf56c16c
	s_mov_b32 s12, 11
	s_mov_b32 s13, 0x3fe00000
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[14:15]
	v_fma_f64 v[24:25], v[42:43], v[24:25], v[40:41]
	v_fma_f64 v[28:29], v[20:21], v[28:29], s[2:3]
	v_fma_f64 v[34:35], v[22:23], v[34:35], s[2:3]
	v_fma_f64 v[26:27], v[48:49], v[26:27], v[46:47]
	v_mul_f64 v[40:41], v[20:21], v[20:21]
	v_cmp_ngt_f64_e64 s2, 0xc090cc00, v[2:3]
	v_fma_f64 v[18:19], v[16:17], v[18:19], s[12:13]
	v_fma_f64 v[6:7], v[20:21], v[24:25], -v[6:7]
	v_fma_f64 v[28:29], v[20:21], v[28:29], s[0:1]
	v_mul_f64 v[20:21], v[22:23], v[22:23]
	v_fma_f64 v[24:25], v[22:23], v[34:35], s[0:1]
	v_fma_f64 v[10:11], v[22:23], v[26:27], -v[10:11]
	s_mov_b32 s1, 0xbfc55555
	v_cvt_i32_f64_e32 v26, v[14:15]
	v_fma_f64 v[18:19], v[16:17], v[18:19], 1.0
	v_fma_f64 v[6:7], v[42:43], s[0:1], v[6:7]
	v_fma_f64 v[22:23], v[40:41], v[28:29], v[30:31]
	v_fma_f64 v[10:11], v[48:49], s[0:1], v[10:11]
	v_cmp_nlt_f64_e64 s1, 0x40900000, v[2:3]
	v_cmp_class_f64_e64 s0, v[0:1], 0x1f8
	v_lshlrev_b32_e32 v2, 30, v13
	v_lshlrev_b32_e32 v3, 30, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_xor_b32_e32 v1, v2, v1
	v_and_b32_e32 v2, 0x80000000, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_and_b32_e32 v1, 0x80000000, v1
	v_fma_f64 v[14:15], v[16:17], v[18:19], 1.0
	v_fma_f64 v[16:17], v[20:21], v[24:25], v[32:33]
	v_add_f64 v[4:5], v[4:5], -v[6:7]
	v_add_f64 v[18:19], v[36:37], v[22:23]
	v_add_f64 v[8:9], v[8:9], -v[10:11]
	v_ldexp_f64 v[6:7], v[14:15], v26
	v_add_f64 v[14:15], v[38:39], v[16:17]
	v_xor_b32_e32 v5, 0x80000000, v5
	v_and_b32_e32 v10, 1, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_eq_u32_e32 vcc_lo, 0, v10
	v_dual_cndmask_b32 v3, v5, v19 :: v_dual_cndmask_b32 v4, v4, v18
	s_and_b32 vcc_lo, s2, s1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v2, v3, v2
	v_cndmask_b32_e64 v0, 0x7ff00000, v7, s1
	v_and_b32_e32 v7, 1, v13
	v_cmp_eq_u32_e64 s3, 0, v7
	s_delay_alu instid0(VALU_DEP_1)
	v_cndmask_b32_e64 v7, v15, v9, s3
	v_cndmask_b32_e64 v5, v14, v8, s3
	v_cndmask_b32_e64 v8, 0, v0, s2
	s_mov_b32 s3, 0xfffff
	v_cndmask_b32_e64 v0, 0, v4, s0
	v_cndmask_b32_e32 v4, 0, v6, vcc_lo
	v_xor_b32_e32 v3, v7, v1
	v_cndmask_b32_e64 v1, 0x7ff80000, v2, s0
	v_cndmask_b32_e64 v2, 0, v5, s0
	v_and_or_b32 v5, v8, s3, 0x7fe00000
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v3, 0x7ff80000, v3, s0
	v_mul_f64 v[0:1], v[4:5], v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_f64 v[2:3], v[4:5], v[2:3]
	v_lshrrev_b32_e32 v4, 20, v8
	v_add_nc_u32_e32 v6, 0xffffff09, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b16 v4, 15, v6
	v_add_nc_u16 v4, v6, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i16 v4, 1, v4
	v_bfe_i32 v7, v4, 0, 16
	v_mov_b32_e32 v4, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v5, v7, 20, 0x3ff00000
	v_mul_f64 v[0:1], v[0:1], v[4:5]
	v_mul_f64 v[2:3], v[2:3], v[4:5]
	v_sub_nc_u32_e32 v5, v6, v7
	v_mov_b32_e32 v6, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v7, v5, 20, 0x3ff00000
	v_mul_f64 v[4:5], v[0:1], v[6:7]
	v_mul_f64 v[0:1], v[2:3], v[6:7]
.LBB0_171:                              ; %Flow407
	s_or_b32 exec_lo, exec_lo, s10
                                        ; implicit-def: $vgpr2_vgpr3
                                        ; implicit-def: $vgpr6
.LBB0_172:                              ; %Flow411
	s_and_not1_saveexec_b32 s1, s9
	s_cbranch_execz .LBB0_178
; %bb.173:
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_f64 v[0:1], v[0:1], -v[0:1]
	v_cmp_ne_u32_e32 vcc_lo, 0, v2
	v_cmp_ne_u32_e64 s0, 0x7ff00000, v6
	s_or_b32 s0, vcc_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_saveexec_b32 s2, s0
	s_xor_b32 s0, exec_lo, s2
; %bb.174:
                                        ; implicit-def: $vgpr2_vgpr3
; %bb.175:                              ; %Flow408
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	s_or_saveexec_b32 s0, s0
	v_dual_mov_b32 v5, v1 :: v_dual_mov_b32 v4, v0
	s_xor_b32 exec_lo, exec_lo, s0
; %bb.176:
	v_cmp_lt_i64_e32 vcc_lo, -1, v[2:3]
	v_dual_cndmask_b32 v5, 0, v3 :: v_dual_cndmask_b32 v4, 0, v2
	v_dual_cndmask_b32 v1, 0, v1 :: v_dual_cndmask_b32 v0, 0, v0
; %bb.177:                              ; %Flow409
	s_or_b32 exec_lo, exec_lo, s0
.LBB0_178:                              ; %Flow412
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
                                        ; implicit-def: $vgpr18
.LBB0_179:                              ; %Flow417
	s_and_not1_saveexec_b32 s2, s8
	s_cbranch_execz .LBB0_189
; %bb.180:
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ngt_f64_e64 s1, 0x41d00000, |v[0:1]|
	v_trig_preop_f64 v[10:11], |v[0:1]|, 0
	v_trig_preop_f64 v[8:9], |v[0:1]|, 1
	v_ldexp_f64 v[12:13], |v[0:1]|, 0xffffff80
	v_trig_preop_f64 v[6:7], |v[0:1]|, 2
                                        ; implicit-def: $vgpr19
                                        ; implicit-def: $vgpr2_vgpr3
                                        ; implicit-def: $vgpr4_vgpr5
	s_and_saveexec_b32 s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s3, exec_lo, s0
	s_cbranch_execz .LBB0_182
; %bb.181:
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[0:1]|
	v_mov_b32_e32 v31, 0
	s_mov_b32 s8, 0x54442d18
	s_mov_b32 s9, 0x3ff921fb
	s_mov_b32 s10, 0x33145c07
	s_mov_b32 s11, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v3, v18, v13 :: v_dual_cndmask_b32 v2, v0, v12
	v_mul_f64 v[4:5], v[10:11], v[2:3]
	v_mul_f64 v[14:15], v[8:9], v[2:3]
	v_mul_f64 v[27:28], v[6:7], v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[16:17], v[10:11], v[2:3], -v[4:5]
	v_fma_f64 v[29:30], v[8:9], v[2:3], -v[14:15]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[2:3], v[6:7], v[2:3], -v[27:28]
	v_add_f64 v[19:20], v[14:15], v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[21:22], v[19:20], -v[14:15]
	v_add_f64 v[25:26], v[4:5], v[19:20]
	v_add_f64 v[23:24], v[19:20], -v[21:22]
	v_add_f64 v[16:17], v[16:17], -v[21:22]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[21:22], v[25:26], -2
	v_add_f64 v[4:5], v[25:26], -v[4:5]
	v_add_f64 v[14:15], v[14:15], -v[23:24]
	v_add_f64 v[23:24], v[27:28], v[29:30]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[21:22]|
	v_add_f64 v[4:5], v[19:20], -v[4:5]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[14:15], v[16:17], v[14:15]
	v_fract_f64_e32 v[16:17], v[21:22]
	v_add_f64 v[19:20], v[23:24], v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v17, 0, v17 :: v_dual_cndmask_b32 v16, 0, v16
	v_ldexp_f64 v[16:17], v[16:17], 2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[21:22], v[4:5], v[19:20]
	v_add_f64 v[25:26], v[21:22], v[16:17]
	v_add_f64 v[4:5], v[21:22], -v[4:5]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cmp_gt_f64_e32 vcc_lo, 0, v[25:26]
	v_add_f64 v[25:26], v[23:24], -v[27:28]
	v_add_f64 v[4:5], v[19:20], -v[4:5]
	v_cndmask_b32_e64 v32, 0, 0x40100000, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[36:37], v[23:24], -v[25:26]
	v_add_f64 v[25:26], v[29:30], -v[25:26]
	v_add_f64 v[16:17], v[16:17], v[31:32]
	v_add_f64 v[32:33], v[19:20], -v[23:24]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[29:30], v[27:28], -v[36:37]
	v_add_f64 v[34:35], v[21:22], v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[38:39], v[19:20], -v[32:33]
	v_add_f64 v[14:15], v[14:15], -v[32:33]
	v_add_f64 v[25:26], v[25:26], v[29:30]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cvt_i32_f64_e32 v34, v[34:35]
	v_add_f64 v[23:24], v[23:24], -v[38:39]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[32:33], v34
	v_add_f64 v[14:15], v[14:15], v[23:24]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[16:17], v[16:17], -v[32:33]
	v_add_f64 v[14:15], v[25:26], v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[23:24], v[21:22], v[16:17]
	v_add_f64 v[2:3], v[2:3], v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[14:15], v[23:24], -v[16:17]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[23:24]
	v_add_f64 v[2:3], v[4:5], v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_f64 v[4:5], v[21:22], -v[14:15]
	v_cndmask_b32_e64 v32, 0, 0x3ff00000, vcc_lo
	v_add_co_ci_u32_e64 v19, s0, 0, v34, vcc_lo
	v_add_f64 v[2:3], v[2:3], v[4:5]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[4:5], v[23:24], -v[31:32]
	v_add_f64 v[14:15], v[4:5], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[16:17], v[14:15], s[8:9]
	v_add_f64 v[4:5], v[14:15], -v[4:5]
	v_fma_f64 v[20:21], v[14:15], s[8:9], -v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[2:3], v[2:3], -v[4:5]
	v_fma_f64 v[4:5], v[14:15], s[10:11], v[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], v[2:3], s[8:9], v[4:5]
	v_add_f64 v[2:3], v[16:17], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[14:15], v[2:3], -v[16:17]
	v_add_f64 v[4:5], v[4:5], -v[14:15]
.LBB0_182:                              ; %Flow415
	s_and_not1_saveexec_b32 s0, s3
	s_cbranch_execz .LBB0_184
; %bb.183:
	s_mov_b32 s8, 0x6dc9c883
	s_mov_b32 s9, 0x3fe45f30
	s_mov_b32 s11, 0xbc91a626
	v_mul_f64 v[2:3], |v[0:1]|, s[8:9]
	s_mov_b32 s8, 0x54442d18
	s_mov_b32 s9, 0xbff921fb
	s_mov_b32 s10, 0x33145c00
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[14:15], v[2:3]
	v_fma_f64 v[2:3], v[14:15], s[8:9], |v[0:1]|
	v_mul_f64 v[4:5], v[14:15], s[10:11]
	s_mov_b32 s8, 0x252049c0
	s_mov_b32 s9, 0xb97b839a
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[19:20], v[14:15], s[10:11], v[2:3]
	v_add_f64 v[16:17], v[2:3], v[4:5]
	s_mov_b32 s11, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[2:3], v[2:3], -v[16:17]
	v_add_f64 v[16:17], v[16:17], -v[19:20]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[2:3], v[2:3], v[4:5]
	v_fma_f64 v[4:5], v[14:15], s[10:11], v[4:5]
	v_add_f64 v[2:3], v[16:17], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], v[2:3], -v[4:5]
	v_fma_f64 v[4:5], v[14:15], s[8:9], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], v[19:20], v[4:5]
	v_add_f64 v[16:17], v[2:3], -v[19:20]
	v_cvt_i32_f64_e32 v19, v[14:15]
	s_delay_alu instid0(VALU_DEP_2)
	v_add_f64 v[4:5], v[4:5], -v[16:17]
.LBB0_184:                              ; %_ZL3cosd.exit.i.i.i195
	s_or_b32 exec_lo, exec_lo, s0
                                        ; implicit-def: $vgpr20
                                        ; implicit-def: $vgpr14_vgpr15
                                        ; implicit-def: $vgpr16_vgpr17
	s_and_saveexec_b32 s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s1, exec_lo, s0
	s_cbranch_execz .LBB0_186
; %bb.185:
	v_cmp_le_f64_e64 vcc_lo, 0x7b000000, |v[0:1]|
	v_mov_b32_e32 v30, 0
	s_mov_b32 s8, 0x54442d18
	s_mov_b32 s9, 0x3ff921fb
	s_mov_b32 s10, 0x33145c07
	s_mov_b32 s11, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v13, v18, v13 :: v_dual_cndmask_b32 v12, v0, v12
	v_mul_f64 v[14:15], v[10:11], v[12:13]
	v_mul_f64 v[16:17], v[8:9], v[12:13]
	v_mul_f64 v[28:29], v[6:7], v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[10:11], v[10:11], v[12:13], -v[14:15]
	v_fma_f64 v[8:9], v[8:9], v[12:13], -v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[6:7], v[6:7], v[12:13], -v[28:29]
	v_add_f64 v[20:21], v[16:17], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[22:23], v[20:21], -v[16:17]
	v_add_f64 v[26:27], v[14:15], v[20:21]
	v_add_f64 v[24:25], v[20:21], -v[22:23]
	v_add_f64 v[10:11], v[10:11], -v[22:23]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_ldexp_f64 v[22:23], v[26:27], -2
	v_add_f64 v[14:15], v[26:27], -v[14:15]
	v_add_f64 v[16:17], v[16:17], -v[24:25]
	v_add_f64 v[24:25], v[28:29], v[8:9]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cmp_neq_f64_e64 vcc_lo, 0x7ff00000, |v[22:23]|
	v_add_f64 v[14:15], v[20:21], -v[14:15]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[10:11], v[16:17]
	v_fract_f64_e32 v[16:17], v[22:23]
	v_add_f64 v[20:21], v[24:25], v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_cndmask_b32 v17, 0, v17 :: v_dual_cndmask_b32 v16, 0, v16
	v_ldexp_f64 v[16:17], v[16:17], 2
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[22:23], v[14:15], v[20:21]
	v_add_f64 v[26:27], v[22:23], v[16:17]
	v_add_f64 v[12:13], v[22:23], -v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cmp_gt_f64_e32 vcc_lo, 0, v[26:27]
	v_add_f64 v[26:27], v[24:25], -v[28:29]
	v_add_f64 v[12:13], v[20:21], -v[12:13]
	v_cndmask_b32_e64 v31, 0, 0x40100000, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[35:36], v[24:25], -v[26:27]
	v_add_f64 v[8:9], v[8:9], -v[26:27]
	v_add_f64 v[16:17], v[16:17], v[30:31]
	v_add_f64 v[31:32], v[20:21], -v[24:25]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[26:27], v[28:29], -v[35:36]
	v_add_f64 v[33:34], v[22:23], v[16:17]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_f64 v[37:38], v[20:21], -v[31:32]
	v_add_f64 v[10:11], v[10:11], -v[31:32]
	v_add_f64 v[8:9], v[8:9], v[26:27]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_cvt_i32_f64_e32 v18, v[33:34]
	v_add_f64 v[24:25], v[24:25], -v[37:38]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cvt_f64_i32_e32 v[31:32], v18
	v_add_f64 v[10:11], v[10:11], v[24:25]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[16:17], v[16:17], -v[31:32]
	v_add_f64 v[8:9], v[8:9], v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[10:11], v[22:23], v[16:17]
	v_add_f64 v[6:7], v[6:7], v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_add_f64 v[8:9], v[10:11], -v[16:17]
	v_cmp_le_f64_e32 vcc_lo, 0.5, v[10:11]
	v_add_f64 v[6:7], v[12:13], v[6:7]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_f64 v[8:9], v[22:23], -v[8:9]
	v_cndmask_b32_e64 v31, 0, 0x3ff00000, vcc_lo
	v_add_co_ci_u32_e64 v20, s0, 0, v18, vcc_lo
	v_add_f64 v[6:7], v[6:7], v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[10:11], -v[30:31]
	v_add_f64 v[10:11], v[8:9], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[12:13], v[10:11], s[8:9]
	v_add_f64 v[8:9], v[10:11], -v[8:9]
	v_fma_f64 v[14:15], v[10:11], s[8:9], -v[12:13]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f64 v[6:7], v[6:7], -v[8:9]
	v_fma_f64 v[8:9], v[10:11], s[10:11], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], v[6:7], s[8:9], v[8:9]
	v_add_f64 v[14:15], v[12:13], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[14:15], -v[12:13]
	v_add_f64 v[16:17], v[6:7], -v[8:9]
.LBB0_186:                              ; %Flow414
	s_and_not1_saveexec_b32 s0, s1
	s_cbranch_execz .LBB0_188
; %bb.187:
	s_mov_b32 s8, 0x6dc9c883
	s_mov_b32 s9, 0x3fe45f30
	s_mov_b32 s11, 0xbc91a626
	v_mul_f64 v[6:7], |v[0:1]|, s[8:9]
	s_mov_b32 s8, 0x54442d18
	s_mov_b32 s9, 0xbff921fb
	s_mov_b32 s10, 0x33145c00
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[6:7], v[6:7]
	v_fma_f64 v[8:9], v[6:7], s[8:9], |v[0:1]|
	v_mul_f64 v[10:11], v[6:7], s[10:11]
	s_mov_b32 s8, 0x252049c0
	s_mov_b32 s9, 0xb97b839a
	v_cvt_i32_f64_e32 v20, v[6:7]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[16:17], v[6:7], s[10:11], v[8:9]
	v_add_f64 v[12:13], v[8:9], v[10:11]
	s_mov_b32 s11, 0x3c91a626
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f64 v[8:9], v[8:9], -v[12:13]
	v_add_f64 v[12:13], v[12:13], -v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_f64 v[8:9], v[8:9], v[10:11]
	v_fma_f64 v[10:11], v[6:7], s[10:11], v[10:11]
	v_add_f64 v[8:9], v[12:13], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], v[8:9], -v[10:11]
	v_fma_f64 v[8:9], v[6:7], s[8:9], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[14:15], v[16:17], v[8:9]
	v_add_f64 v[10:11], v[14:15], -v[16:17]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[16:17], v[8:9], -v[10:11]
.LBB0_188:                              ; %_ZL3sind.exit.i.i.i200
	s_or_b32 exec_lo, exec_lo, s0
	v_mul_f64 v[6:7], v[2:3], v[2:3]
	v_mul_f64 v[8:9], v[14:15], v[14:15]
	s_mov_b32 s0, 0xb42fdfa7
	s_mov_b32 s8, 0xf9a43bb8
	s_mov_b32 s1, 0xbe5ae600
	s_mov_b32 s9, 0x3de5e0b2
	s_mov_b32 s10, 0x796cde01
	s_mov_b32 s11, 0x3ec71de3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[33:34], v[4:5], 0.5
	v_mul_f64 v[39:40], v[16:17], 0.5
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[10:11], v[6:7], s[8:9], s[0:1]
	v_fma_f64 v[12:13], v[8:9], s[8:9], s[0:1]
	s_mov_b32 s0, 0x9037ab78
	s_mov_b32 s8, 0x46cc5e42
	s_mov_b32 s1, 0x3e21eeb6
	s_mov_b32 s9, 0xbda907db
	v_mul_f64 v[23:24], v[6:7], 0.5
	v_fma_f64 v[21:22], v[6:7], s[8:9], s[0:1]
	v_mul_f64 v[25:26], v[8:9], 0.5
	v_fma_f64 v[27:28], v[8:9], s[8:9], s[0:1]
	s_mov_b32 s0, 0xa17f65f6
	s_mov_b32 s8, 0x19e83e5c
	s_mov_b32 s1, 0xbe927e4f
	s_mov_b32 s9, 0xbf2a01a0
	v_mul_f64 v[35:36], v[2:3], -v[6:7]
	v_mul_f64 v[41:42], v[14:15], -v[8:9]
	v_fma_f64 v[10:11], v[6:7], v[10:11], s[10:11]
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[10:11]
	v_add_f64 v[29:30], -v[23:24], 1.0
	v_fma_f64 v[21:22], v[6:7], v[21:22], s[0:1]
	v_add_f64 v[31:32], -v[25:26], 1.0
	v_fma_f64 v[27:28], v[8:9], v[27:28], s[0:1]
	s_mov_b32 s0, 0x19f4ec90
	s_mov_b32 s1, 0x3efa01a0
	v_fma_f64 v[10:11], v[6:7], v[10:11], s[8:9]
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[8:9]
	s_mov_b32 s8, 0x11110bb3
	s_mov_b32 s9, 0x3f811111
	v_add_f64 v[37:38], -v[29:30], 1.0
	v_fma_f64 v[21:22], v[6:7], v[21:22], s[0:1]
	v_add_f64 v[43:44], -v[31:32], 1.0
	v_fma_f64 v[27:28], v[8:9], v[27:28], s[0:1]
	s_mov_b32 s0, 0x16c16967
	s_mov_b32 s1, 0xbf56c16c
	v_fma_f64 v[10:11], v[6:7], v[10:11], s[8:9]
	v_fma_f64 v[12:13], v[8:9], v[12:13], s[8:9]
	v_add_f64 v[23:24], v[37:38], -v[23:24]
	v_fma_f64 v[21:22], v[6:7], v[21:22], s[0:1]
	v_add_f64 v[25:26], v[43:44], -v[25:26]
	v_fma_f64 v[27:28], v[8:9], v[27:28], s[0:1]
	s_mov_b32 s0, 0x55555555
	s_mov_b32 s1, 0x3fa55555
	v_fma_f64 v[10:11], v[35:36], v[10:11], v[33:34]
	v_fma_f64 v[12:13], v[41:42], v[12:13], v[39:40]
	v_mul_f64 v[33:34], v[6:7], v[6:7]
	v_fma_f64 v[23:24], v[2:3], -v[4:5], v[23:24]
	v_fma_f64 v[21:22], v[6:7], v[21:22], s[0:1]
	v_fma_f64 v[25:26], v[14:15], -v[16:17], v[25:26]
	v_fma_f64 v[4:5], v[6:7], v[10:11], -v[4:5]
	v_mul_f64 v[6:7], v[8:9], v[8:9]
	v_fma_f64 v[10:11], v[8:9], v[27:28], s[0:1]
	v_fma_f64 v[8:9], v[8:9], v[12:13], -v[16:17]
	s_mov_b32 s1, 0xbfc55555
	v_fma_f64 v[12:13], v[33:34], v[21:22], v[23:24]
	v_fma_f64 v[4:5], v[35:36], s[0:1], v[4:5]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[6:7], v[6:7], v[10:11], v[25:26]
	v_fma_f64 v[8:9], v[41:42], s[0:1], v[8:9]
	v_cmp_class_f64_e64 s0, v[0:1], 0x1f8
	v_add_f64 v[10:11], v[29:30], v[12:13]
	v_add_f64 v[2:3], v[2:3], -v[4:5]
	v_add_f64 v[4:5], v[31:32], v[6:7]
	v_add_f64 v[6:7], v[14:15], -v[8:9]
	v_and_b32_e32 v8, 1, v19
	v_lshlrev_b32_e32 v9, 30, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_cmp_eq_u32_e32 vcc_lo, 0, v8
	v_lshlrev_b32_e32 v0, 30, v20
	v_and_b32_e32 v8, 1, v20
	v_xor_b32_e32 v0, v0, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_eq_u32_e64 s1, 0, v8
	v_and_b32_e32 v0, 0x80000000, v0
	v_cndmask_b32_e32 v2, v2, v10, vcc_lo
	v_xor_b32_e32 v1, 0x80000000, v3
	v_and_b32_e32 v3, 0x80000000, v9
	v_cndmask_b32_e64 v6, v4, v6, s1
	v_cndmask_b32_e64 v4, v5, v7, s1
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v1, v1, v11, vcc_lo
	v_xor_b32_e32 v1, v1, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_xor_b32_e32 v3, v4, v0
	v_cndmask_b32_e64 v4, 0, v2, s0
	v_cndmask_b32_e64 v0, 0, v6, s0
	v_cndmask_b32_e64 v5, 0x7ff80000, v1, s0
	s_delay_alu instid0(VALU_DEP_4)
	v_cndmask_b32_e64 v1, 0x7ff80000, v3, s0
.LBB0_189:                              ; %Flow418
	s_or_b32 exec_lo, exec_lo, s2
                                        ; implicit-def: $vgpr2_vgpr3
.LBB0_190:                              ; %Flow420
	s_and_not1_saveexec_b32 s1, s5
	s_cbranch_execz .LBB0_192
; %bb.191:
	s_mov_b32 s2, 0x652b82fe
	s_mov_b32 s3, 0x3ff71547
	s_mov_b32 s8, 0x6a5dcb37
	v_mul_f64 v[4:5], v[2:3], s[2:3]
	s_mov_b32 s2, 0xfefa39ef
	s_mov_b32 s3, 0xbfe62e42
	s_mov_b32 s9, 0x3e5ade15
	v_cmp_nlt_f64_e32 vcc_lo, 0x40900000, v[2:3]
	v_cmp_ngt_f64_e64 s0, 0xc090cc00, v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_rndne_f64_e32 v[4:5], v[4:5]
	v_fma_f64 v[6:7], v[4:5], s[2:3], v[2:3]
	s_mov_b32 s2, 0x3b39803f
	s_mov_b32 s3, 0xbc7abc9e
	v_cvt_i32_f64_e32 v10, v[4:5]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[6:7], v[4:5], s[2:3], v[6:7]
	s_mov_b32 s2, 0xfca7ab0c
	s_mov_b32 s3, 0x3e928af3
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[8:9], v[6:7], s[8:9], s[2:3]
	s_mov_b32 s2, 0x623fde64
	s_mov_b32 s3, 0x3ec71dee
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[8:9], v[6:7], v[8:9], s[2:3]
	s_mov_b32 s2, 0x7c89e6b0
	s_mov_b32 s3, 0x3efa0199
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[8:9], v[6:7], v[8:9], s[2:3]
	s_mov_b32 s2, 0x14761f6e
	s_mov_b32 s3, 0x3f2a01a0
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[8:9], v[6:7], v[8:9], s[2:3]
	s_mov_b32 s2, 0x1852b7b0
	s_mov_b32 s3, 0x3f56c16c
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[8:9], v[6:7], v[8:9], s[2:3]
	s_mov_b32 s2, 0x11122322
	s_mov_b32 s3, 0x3f811111
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[8:9], v[6:7], v[8:9], s[2:3]
	s_mov_b32 s2, 0x555502a1
	s_mov_b32 s3, 0x3fa55555
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[8:9], v[6:7], v[8:9], s[2:3]
	s_mov_b32 s2, 0x55555511
	s_mov_b32 s3, 0x3fc55555
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[8:9], v[6:7], v[8:9], s[2:3]
	s_mov_b32 s2, 11
	s_mov_b32 s3, 0x3fe00000
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_fma_f64 v[8:9], v[6:7], v[8:9], s[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[8:9], v[6:7], v[8:9], 1.0
	v_fma_f64 v[4:5], v[6:7], v[8:9], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[4:5], v[4:5], v10
	v_cndmask_b32_e32 v5, 0x7ff00000, v5, vcc_lo
	s_and_b32 vcc_lo, s0, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v4, 0, v4, vcc_lo
	v_cndmask_b32_e64 v5, 0, v5, s0
.LBB0_192:                              ; %Flow421
	s_or_b32 exec_lo, exec_lo, s1
.LBB0_193:                              ; %Flow445
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s4
	v_max_f64 v[2:3], |v[0:1]|, |v[0:1]|
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_3)
	v_max_f64 v[6:7], |v[4:5]|, |v[4:5]|
	v_cmp_class_f64_e64 s0, v[4:5], 0x204
	v_cmp_class_f64_e64 s1, v[0:1], 0x204
	s_mov_b32 s2, 0xe2308c3a
	s_mov_b32 s3, 0x3e45798e
	v_max_f64 v[2:3], v[6:7], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 s0, s0, s1
	v_frexp_exp_i32_f64_e32 v12, v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v6, 0, v12
	v_ldexp_f64 v[2:3], |v[0:1]|, v6
	v_ldexp_f64 v[6:7], |v[4:5]|, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[2:3], v[2:3], v[2:3]
	v_fma_f64 v[2:3], v[6:7], v[6:7], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_rsq_f64_e32 v[6:7], v[2:3]
	v_cmp_eq_f64_e32 vcc_lo, 0, v[2:3]
	s_waitcnt_depctr 0xfff
	v_mul_f64 v[8:9], v[2:3], v[6:7]
	v_mul_f64 v[6:7], v[6:7], 0.5
	v_fma_f64 v[10:11], -v[6:7], v[8:9], 0.5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[8:9], v[8:9], v[10:11], v[8:9]
	v_fma_f64 v[6:7], v[6:7], v[10:11], v[6:7]
	v_fma_f64 v[10:11], -v[8:9], v[8:9], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], v[10:11], v[6:7], v[8:9]
	v_dual_cndmask_b32 v3, v7, v3 :: v_dual_cndmask_b32 v2, v6, v2
	v_cmp_o_f64_e32 vcc_lo, v[4:5], v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ldexp_f64 v[2:3], v[2:3], v12
	v_cndmask_b32_e32 v2, 0, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cndmask_b32_e32 v3, 0x7ff80000, v3, vcc_lo
	v_cndmask_b32_e64 v2, v2, 0, s0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v3, v3, 0x7ff00000, s0
	v_cmp_lt_f64_e32 vcc_lo, s[2:3], v[2:3]
	v_mov_b32_e32 v2, 0
	v_mov_b32_e32 v3, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v7, v3 :: v_dual_mov_b32 v6, v2
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB0_195
; %bb.194:
	v_mul_f64 v[2:3], 0x40220000, v[4:5]
	v_mul_f64 v[6:7], 0x40220000, v[0:1]
	v_fma_f64 v[20:21], 0xc0080000, v[68:69], v[70:71]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[8:9], |v[2:3]|, |v[6:7]|
	v_div_scale_f64 v[10:11], null, v[8:9], v[8:9], 1.0
	v_div_scale_f64 v[16:17], vcc_lo, 1.0, v[8:9], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[12:13], v[10:11]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[14:15], -v[10:11], v[12:13], 1.0
	v_fma_f64 v[12:13], v[12:13], v[14:15], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[14:15], -v[10:11], v[12:13], 1.0
	v_fma_f64 v[12:13], v[12:13], v[14:15], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[14:15], v[16:17], v[12:13]
	v_fma_f64 v[10:11], -v[10:11], v[14:15], v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[10:11], v[10:11], v[12:13], v[14:15]
	v_div_fixup_f64 v[8:9], v[10:11], v[8:9], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_mul_f64 v[6:7], v[6:7], v[8:9]
	v_mul_f64 v[2:3], v[2:3], v[8:9]
	v_mul_f64 v[22:23], v[8:9], 0
	v_mul_f64 v[8:9], v[20:21], v[8:9]
	v_mul_f64 v[10:11], v[6:7], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[10:11], v[2:3], v[2:3], v[10:11]
	v_div_scale_f64 v[12:13], null, v[10:11], v[10:11], 1.0
	v_div_scale_f64 v[18:19], vcc_lo, 1.0, v[10:11], 1.0
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[14:15], v[12:13]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[16:17], -v[12:13], v[14:15], 1.0
	v_fma_f64 v[14:15], v[14:15], v[16:17], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[16:17], -v[12:13], v[14:15], 1.0
	v_fma_f64 v[14:15], v[14:15], v[16:17], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[16:17], v[18:19], v[14:15]
	v_fma_f64 v[12:13], -v[12:13], v[16:17], v[18:19]
	v_mul_f64 v[18:19], v[22:23], v[6:7]
	v_mul_f64 v[6:7], v[8:9], v[6:7]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_div_fmas_f64 v[12:13], v[12:13], v[14:15], v[16:17]
	v_fma_f64 v[8:9], v[8:9], v[2:3], v[18:19]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f64 v[6:7], v[22:23], v[2:3], -v[6:7]
	v_div_fixup_f64 v[10:11], v[12:13], v[10:11], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[2:3], v[8:9], v[10:11]
	v_mul_f64 v[6:7], v[6:7], v[10:11]
.LBB0_195:
	s_or_b32 exec_lo, exec_lo, s0
	v_div_scale_f64 v[8:9], null, 0x40080000, 0x40080000, v[66:67]
	v_div_scale_f64 v[14:15], vcc_lo, v[66:67], 0x40080000, v[66:67]
	s_mov_b32 s0, 0xe8584caa
	s_mov_b32 s4, -2
	s_mov_b32 s1, 0x3febb67a
	s_mov_b32 s5, 0xbfdfffff
	v_mul_f64 v[16:17], v[0:1], -0.5
	s_delay_alu instid0(VALU_DEP_4)
	v_mul_f64 v[18:19], v[6:7], s[0:1]
	v_mul_f64 v[20:21], v[6:7], s[4:5]
	s_mov_b32 s9, 0xbfebb67a
	s_mov_b32 s8, s0
	v_mul_f64 v[22:23], v[6:7], -0.5
	v_mul_f64 v[24:25], v[0:1], s[4:5]
	v_add_f64 v[26:27], v[4:5], v[2:3]
	v_rcp_f64_e32 v[10:11], v[8:9]
	v_fma_f64 v[16:17], v[4:5], s[0:1], v[16:17]
	v_fma_f64 v[20:21], v[2:3], s[8:9], v[20:21]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[12:13], -v[8:9], v[10:11], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[10:11], v[10:11], v[12:13], v[10:11]
	v_fma_f64 v[12:13], -v[8:9], v[10:11], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[10:11], v[10:11], v[12:13], v[10:11]
	v_mul_f64 v[12:13], v[14:15], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_fma_f64 v[8:9], -v[8:9], v[12:13], v[14:15]
	v_mul_f64 v[14:15], v[0:1], s[0:1]
	v_add_f64 v[0:1], v[0:1], v[6:7]
	v_div_fmas_f64 v[8:9], v[8:9], v[10:11], v[12:13]
	s_delay_alu instid0(VALU_DEP_3)
	v_fma_f64 v[10:11], v[4:5], -0.5, -v[14:15]
	v_fma_f64 v[12:13], v[2:3], s[4:5], v[18:19]
	v_fma_f64 v[6:7], v[4:5], s[4:5], v[14:15]
	v_fma_f64 v[14:15], v[2:3], -0.5, -v[18:19]
	v_fma_f64 v[2:3], v[2:3], s[0:1], v[22:23]
	v_fma_f64 v[4:5], v[4:5], s[8:9], v[24:25]
	v_cmp_ngt_f64_e64 vcc_lo, |v[0:1]|, s[2:3]
	v_div_fixup_f64 v[8:9], v[8:9], 0x40080000, v[66:67]
	v_add_f64 v[10:11], v[10:11], v[12:13]
	v_add_f64 v[12:13], v[16:17], v[20:21]
	v_add_f64 v[6:7], v[6:7], v[14:15]
	v_add_f64 v[2:3], v[4:5], v[2:3]
	v_add_f64 v[14:15], v[26:27], -v[8:9]
	v_add_f64 v[0:1], v[10:11], -v[8:9]
	v_cmp_ngt_f64_e64 s0, |v[12:13]|, s[2:3]
	v_add_f64 v[4:5], v[6:7], -v[8:9]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_dual_cndmask_b32 v7, 0, v15 :: v_dual_cndmask_b32 v6, 0, v14
	v_cmp_ngt_f64_e64 vcc_lo, |v[2:3]|, s[2:3]
	v_cndmask_b32_e64 v1, 0, v1, s0
	v_cndmask_b32_e64 v0, 0, v0, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_max_f64 v[0:1], v[6:7], v[0:1]
	v_dual_cndmask_b32 v3, 0, v5 :: v_dual_cndmask_b32 v2, 0, v4
	v_max_f64 v[0:1], v[0:1], v[2:3]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s6, v64
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v65, vcc_lo
	global_store_b64 v[2:3], v[0:1], off
.LBB0_196:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel cubic
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 84
		.amdhsa_next_free_sgpr 26
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	cubic, .Lfunc_end0-cubic
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 58900
; NumSgprs: 28
; NumVgprs: 84
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 10
; NumSGPRsForWavesPerEU: 28
; NumVGPRsForWavesPerEU: 84
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           8
        .value_kind:     by_value
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           cubic
    .private_segment_fixed_size: 0
    .sgpr_count:     28
    .sgpr_spill_count: 0
    .symbol:         cubic.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     84
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
