// input: L (1), xyz1 (b,n,3), xyz2 (b,m,3)
// output: weight_space (b,m,27,3)
__global__ void query_and_interpolation_gpu(int b, int n, int m, int c, const float *xyz1, const float *xyz2, const float *lh, float *weight_space) {
    int batch_index = blockIdx.x;
    xyz1 += n*3*batch_index;
    xyz2 += m*3*batch_index;
    weight_space += m*27*3*batch_index;

    int index = threadIdx.x;
    int stride = blockDim.x;
    float L=lh[0];
    int pts;
    int cnt;
    float alpha=3*sqrtf(3)/2;
    float dist[27];
    float dist_sum[27];
    float x2_,y2_,z2_;

    for(int j=index;j<m;j+=stride){
	for(int f=0;f<27;++f) dist_sum[f]=0;
	pts=0;
	for(int k=0;k<n;++k){
	    float x2=xyz2[j*3+0];
	    float y2=xyz2[j*3+1];
	    float z2=xyz2[j*3+2];
	    float x1=xyz1[k*3+0];
	    float y1=xyz1[k*3+1];
	    float z1=xyz1[k*3+2];
	    float d=max(sqrtf((x2-x1)*(x2-x1)+(y2-y1)*(y2-y1)+(z2-z1)*(z2-z1)),1e-20f);
	    if (d<alpha*L) {
                pts += 1;
		cnt = 0;
		for (int o = -1; o < 2; ++o) {
		    for (int p = -1; p < 2; ++p) {
			for (int q = -1; q < 2; ++q) {
			    x2_ = x2 + o * L;
			    y2_ = y2 + p * L;
			    z2_ = z2 + q * L;
			    dist[cnt] = sqrtf((x2_ - x1)*(x2_ - x1) + (y2_ - y1)*(y2_ - y1) + (z2_ - z1)*(z2_ - z1));
			    dist_sum[cnt] += dist[cnt];
			    weight_space[j * 27 * 3 + cnt * 3 + 0] += x1 / dist[cnt];
			    weight_space[j * 27 * 3 + cnt * 3 + 1] += y1 / dist[cnt];
			    weight_space[j * 27 * 3 + cnt * 3 + 2] += z1 / dist[cnt];
			    cnt += 1;
			}
		    }	
		}
            }
	}
	for (int s = 0; s < 27; ++s) {
	    weight_space[j * 27 * 3 + s * 3 + 0] *= (dist_sum[s] / pts);
	    weight_space[j * 27 * 3 + s * 3 + 1] *= (dist_sum[s] / pts);
	    weight_space[j * 27 * 3 + s * 3 + 2] *= (dist_sum[s] / pts);
	}
    }
}

__global__ void query_and_interpolation_grad_gpu(int b, int n, int m, int c, const float *xyz1, const float *xyz2, const float *lh, const float *grad_out, float *grad_points1, float *grad_points2) {
    int batch_index = blockIdx.x;
    xyz1 += n*3*batch_index;
    xyz2 += m*3*batch_index;
    grad_out += m*27*3*batch_index;
    grad_points1 += n*3*batch_index;
    grad_points2 += m*3*batch_index;

    int index = threadIdx.x;
    int stride = blockDim.x;
    float L=lh[0];
    int pts;
    int cnt;
    float alpha=3*sqrtf(3)/2;
    float dist[27];
    float dist_sum[27];
    float x2_,y2_,z2_;

}

void queryAndInterpolationLauncher(int b, int n, int m, int c, const float *xyz1, const float *xyz2,const float *lh, float *weight_space) {
    query_and_interpolation_gpu<<<b,256>>>(b,n,m,c,xyz1,xyz2,lh,weight_space);
    //cudaDeviceSynchronize();
}
void queryAndInterpolationGradLauncher(int b, int n, int m, int c, const float *xyz1, const float *xyz2, const float *lh, const float *grad_out, float *grad_points1, float *grad_points2) {
    query_and_interpolation_grad_gpu<<<b,256>>>(b,n,m,c,xyz1,xyz2,lh,grad_out,grad_points1,grad_points2);
    //cudaDeviceSynchronize();
}

	.file	"tmpxft_0034939a_00000000-6_tf_grouping_self_g.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2012:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2012:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z60__device_stub__Z27query_and_interpolation_gpuiiiiPKfS0_S0_PfiiiiPKfS0_S0_Pf
	.type	_Z60__device_stub__Z27query_and_interpolation_gpuiiiiPKfS0_S0_PfiiiiPKfS0_S0_Pf, @function
_Z60__device_stub__Z27query_and_interpolation_gpuiiiiPKfS0_S0_PfiiiiPKfS0_S0_Pf:
.LFB2034:
	.cfi_startproc
	endbr64
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movq	208(%rsp), %rax
	movl	%edi, 44(%rsp)
	leaq	72(%rsp), %rdi
	movl	%esi, 40(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rax, 8(%rsp)
	movq	216(%rsp), %rax
	movl	%edx, 36(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 32(%rsp)
	leaq	64(%rsp), %rcx
	movq	%r8, 24(%rsp)
	movq	%r9, 16(%rsp)
	movq	%rax, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	44(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	36(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 168(%rsp)
	movq	%rsp, %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	64(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_Z27query_and_interpolation_gpuiiiiPKfS0_S0_Pf(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 224
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L2:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2034:
	.size	_Z60__device_stub__Z27query_and_interpolation_gpuiiiiPKfS0_S0_PfiiiiPKfS0_S0_Pf, .-_Z60__device_stub__Z27query_and_interpolation_gpuiiiiPKfS0_S0_PfiiiiPKfS0_S0_Pf
	.globl	_Z27query_and_interpolation_gpuiiiiPKfS0_S0_Pf
	.type	_Z27query_and_interpolation_gpuiiiiPKfS0_S0_Pf, @function
_Z27query_and_interpolation_gpuiiiiPKfS0_S0_Pf:
.LFB2035:
	.cfi_startproc
	endbr64
	jmp	_Z60__device_stub__Z27query_and_interpolation_gpuiiiiPKfS0_S0_PfiiiiPKfS0_S0_Pf
	.cfi_endproc
.LFE2035:
	.size	_Z27query_and_interpolation_gpuiiiiPKfS0_S0_Pf, .-_Z27query_and_interpolation_gpuiiiiPKfS0_S0_Pf
	.globl	_Z29queryAndInterpolationLauncheriiiiPKfS0_S0_Pf
	.type	_Z29queryAndInterpolationLauncheriiiiPKfS0_S0_Pf, @function
_Z29queryAndInterpolationLauncheriiiiPKfS0_S0_Pf:
.LFB2008:
	.cfi_startproc
	endbr64
	movabsq	$4294967297, %rax
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%r9, %r15
	xorl	%r9d, %r9d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%r8, %r14
	xorl	%r8d, %r8d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movl	%ecx, %r13d
	movl	$1, %ecx
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%edi, %ebx
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movq	%rax, 28(%rsp)
	movq	112(%rsp), %rbp
	movl	%esi, 8(%rsp)
	movl	32(%rsp), %esi
	movl	%edx, 12(%rsp)
	movl	$16777217, %edx
	movq	120(%rsp), %r12
	movl	%edi, 24(%rsp)
	movq	24(%rsp), %rdi
	salq	$8, %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	movq	%r12, 120(%rsp)
	movl	12(%rsp), %edx
	movq	%r15, %r9
	movq	%r14, %r8
	movq	%rbp, 112(%rsp)
	movl	8(%rsp), %esi
	addq	$56, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	movl	%r13d, %ecx
	movl	%ebx, %edi
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z60__device_stub__Z27query_and_interpolation_gpuiiiiPKfS0_S0_PfiiiiPKfS0_S0_Pf
.L8:
	.cfi_restore_state
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2008:
	.size	_Z29queryAndInterpolationLauncheriiiiPKfS0_S0_Pf, .-_Z29queryAndInterpolationLauncheriiiiPKfS0_S0_Pf
	.globl	_Z71__device_stub__Z32query_and_interpolation_grad_gpuiiiiPKfS0_S0_S0_PfS1_iiiiPKfS0_S0_S0_PfS1_
	.type	_Z71__device_stub__Z32query_and_interpolation_grad_gpuiiiiPKfS0_S0_S0_PfS1_iiiiPKfS0_S0_S0_PfS1_, @function
_Z71__device_stub__Z32query_and_interpolation_grad_gpuiiiiPKfS0_S0_S0_PfS1_iiiiPKfS0_S0_S0_PfS1_:
.LFB2036:
	.cfi_startproc
	endbr64
	subq	$232, %rsp
	.cfi_def_cfa_offset 240
	movq	240(%rsp), %rax
	movl	%edi, 60(%rsp)
	leaq	88(%rsp), %rdi
	movl	%esi, 56(%rsp)
	leaq	100(%rsp), %rsi
	movq	%rax, 24(%rsp)
	movq	248(%rsp), %rax
	movl	%edx, 52(%rsp)
	leaq	72(%rsp), %rdx
	movq	%rax, 16(%rsp)
	movq	256(%rsp), %rax
	movl	%ecx, 48(%rsp)
	leaq	80(%rsp), %rcx
	movq	%rax, 8(%rsp)
	movq	264(%rsp), %rax
	movq	%r8, 40(%rsp)
	movq	%r9, 32(%rsp)
	movq	%rax, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 216(%rsp)
	xorl	%eax, %eax
	leaq	60(%rsp), %rax
	movl	$1, 96(%rsp)
	movq	%rax, 136(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	52(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 200(%rsp)
	movq	%rsp, %rax
	movq	%rax, 208(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 88(%rsp)
	movq	%rax, 100(%rsp)
	movl	$1, 108(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L11
	pushq	80(%rsp)
	.cfi_def_cfa_offset 248
	leaq	_Z32query_and_interpolation_grad_gpuiiiiPKfS0_S0_S0_PfS1_(%rip), %rdi
	pushq	80(%rsp)
	.cfi_def_cfa_offset 256
	movq	116(%rsp), %rcx
	movl	124(%rsp), %r8d
	movq	104(%rsp), %rsi
	movl	112(%rsp), %edx
	leaq	152(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 248
	popq	%rdx
	.cfi_def_cfa_offset 240
.L11:
	movq	216(%rsp), %rax
	subq	%fs:40, %rax
	je	.L13
	call	__stack_chk_fail@PLT
.L13:
	addq	$232, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2036:
	.size	_Z71__device_stub__Z32query_and_interpolation_grad_gpuiiiiPKfS0_S0_S0_PfS1_iiiiPKfS0_S0_S0_PfS1_, .-_Z71__device_stub__Z32query_and_interpolation_grad_gpuiiiiPKfS0_S0_S0_PfS1_iiiiPKfS0_S0_S0_PfS1_
	.globl	_Z32query_and_interpolation_grad_gpuiiiiPKfS0_S0_S0_PfS1_
	.type	_Z32query_and_interpolation_grad_gpuiiiiPKfS0_S0_S0_PfS1_, @function
_Z32query_and_interpolation_grad_gpuiiiiPKfS0_S0_S0_PfS1_:
.LFB2037:
	.cfi_startproc
	endbr64
	jmp	_Z71__device_stub__Z32query_and_interpolation_grad_gpuiiiiPKfS0_S0_S0_PfS1_iiiiPKfS0_S0_S0_PfS1_
	.cfi_endproc
.LFE2037:
	.size	_Z32query_and_interpolation_grad_gpuiiiiPKfS0_S0_S0_PfS1_, .-_Z32query_and_interpolation_grad_gpuiiiiPKfS0_S0_S0_PfS1_
	.globl	_Z33queryAndInterpolationGradLauncheriiiiPKfS0_S0_S0_PfS1_
	.type	_Z33queryAndInterpolationGradLauncheriiiiPKfS0_S0_S0_PfS1_, @function
_Z33queryAndInterpolationGradLauncheriiiiPKfS0_S0_S0_PfS1_:
.LFB2009:
	.cfi_startproc
	endbr64
	movabsq	$4294967297, %rax
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%r9, %r13
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%edi, %ebx
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movq	%rax, 44(%rsp)
	movq	128(%rsp), %r14
	movl	%esi, 12(%rsp)
	movl	48(%rsp), %esi
	movl	%edx, 16(%rsp)
	movl	$16777217, %edx
	movq	136(%rsp), %r15
	movl	%edi, 40(%rsp)
	movq	40(%rsp), %rdi
	salq	$8, %rdx
	movl	%ecx, 20(%rsp)
	movl	$1, %ecx
	movq	144(%rsp), %rbp
	movq	%r8, 24(%rsp)
	xorl	%r8d, %r8d
	movq	152(%rsp), %r12
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	movq	%r12, 152(%rsp)
	movq	24(%rsp), %r8
	movq	%r13, %r9
	movl	%ebx, %edi
	movl	20(%rsp), %ecx
	movl	16(%rsp), %edx
	movq	%rbp, 144(%rsp)
	movq	%r15, 136(%rsp)
	movl	12(%rsp), %esi
	movq	%r14, 128(%rsp)
	addq	$72, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z71__device_stub__Z32query_and_interpolation_grad_gpuiiiiPKfS0_S0_S0_PfS1_iiiiPKfS0_S0_S0_PfS1_
.L16:
	.cfi_restore_state
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2009:
	.size	_Z33queryAndInterpolationGradLauncheriiiiPKfS0_S0_S0_PfS1_, .-_Z33queryAndInterpolationGradLauncheriiiiPKfS0_S0_S0_PfS1_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z32query_and_interpolation_grad_gpuiiiiPKfS0_S0_S0_PfS1_"
.LC1:
	.string	"_Z27query_and_interpolation_gpuiiiiPKfS0_S0_Pf"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2039:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z32query_and_interpolation_grad_gpuiiiiPKfS0_S0_S0_PfS1_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC1(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z27query_and_interpolation_gpuiiiiPKfS0_S0_Pf(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2039:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
// input: L (1), xyz1 (b,n,3), xyz2 (b,m,3)
// output: weight_space (b,m,27,3)
__global__ void query_and_interpolation_gpu(int b, int n, int m, int c, const float *xyz1, const float *xyz2, const float *lh, float *weight_space) {
    int batch_index = blockIdx.x;
    xyz1 += n*3*batch_index;
    xyz2 += m*3*batch_index;
    weight_space += m*27*3*batch_index;

    int index = threadIdx.x;
    int stride = blockDim.x;
    float L=lh[0];
    int pts;
    int cnt;
    float alpha=3*sqrtf(3)/2;
    float dist[27];
    float dist_sum[27];
    float x2_,y2_,z2_;

    for(int j=index;j<m;j+=stride){
	for(int f=0;f<27;++f) dist_sum[f]=0;
	pts=0;
	for(int k=0;k<n;++k){
	    float x2=xyz2[j*3+0];
	    float y2=xyz2[j*3+1];
	    float z2=xyz2[j*3+2];
	    float x1=xyz1[k*3+0];
	    float y1=xyz1[k*3+1];
	    float z1=xyz1[k*3+2];
	    float d=max(sqrtf((x2-x1)*(x2-x1)+(y2-y1)*(y2-y1)+(z2-z1)*(z2-z1)),1e-20f);
	    if (d<alpha*L) {
                pts += 1;
		cnt = 0;
		for (int o = -1; o < 2; ++o) {
		    for (int p = -1; p < 2; ++p) {
			for (int q = -1; q < 2; ++q) {
			    x2_ = x2 + o * L;
			    y2_ = y2 + p * L;
			    z2_ = z2 + q * L;
			    dist[cnt] = sqrtf((x2_ - x1)*(x2_ - x1) + (y2_ - y1)*(y2_ - y1) + (z2_ - z1)*(z2_ - z1));
			    dist_sum[cnt] += dist[cnt];
			    weight_space[j * 27 * 3 + cnt * 3 + 0] += x1 / dist[cnt];
			    weight_space[j * 27 * 3 + cnt * 3 + 1] += y1 / dist[cnt];
			    weight_space[j * 27 * 3 + cnt * 3 + 2] += z1 / dist[cnt];
			    cnt += 1;
			}
		    }	
		}
            }
	}
	for (int s = 0; s < 27; ++s) {
	    weight_space[j * 27 * 3 + s * 3 + 0] *= (dist_sum[s] / pts);
	    weight_space[j * 27 * 3 + s * 3 + 1] *= (dist_sum[s] / pts);
	    weight_space[j * 27 * 3 + s * 3 + 2] *= (dist_sum[s] / pts);
	}
    }
}

__global__ void query_and_interpolation_grad_gpu(int b, int n, int m, int c, const float *xyz1, const float *xyz2, const float *lh, const float *grad_out, float *grad_points1, float *grad_points2) {
    int batch_index = blockIdx.x;
    xyz1 += n*3*batch_index;
    xyz2 += m*3*batch_index;
    grad_out += m*27*3*batch_index;
    grad_points1 += n*3*batch_index;
    grad_points2 += m*3*batch_index;

    int index = threadIdx.x;
    int stride = blockDim.x;
    float L=lh[0];
    int pts;
    int cnt;
    float alpha=3*sqrtf(3)/2;
    float dist[27];
    float dist_sum[27];
    float x2_,y2_,z2_;

}

void queryAndInterpolationLauncher(int b, int n, int m, int c, const float *xyz1, const float *xyz2,const float *lh, float *weight_space) {
    query_and_interpolation_gpu<<<b,256>>>(b,n,m,c,xyz1,xyz2,lh,weight_space);
    //cudaDeviceSynchronize();
}
void queryAndInterpolationGradLauncher(int b, int n, int m, int c, const float *xyz1, const float *xyz2, const float *lh, const float *grad_out, float *grad_points1, float *grad_points2) {
    query_and_interpolation_grad_gpu<<<b,256>>>(b,n,m,c,xyz1,xyz2,lh,grad_out,grad_points1,grad_points2);
    //cudaDeviceSynchronize();
}

	.text
	.file	"tf_grouping_self_g.hip"
	.globl	_Z42__device_stub__query_and_interpolation_gpuiiiiPKfS0_S0_Pf # -- Begin function _Z42__device_stub__query_and_interpolation_gpuiiiiPKfS0_S0_Pf
	.type	_Z42__device_stub__query_and_interpolation_gpuiiiiPKfS0_S0_Pf,@function
_Z42__device_stub__query_and_interpolation_gpuiiiiPKfS0_S0_Pf: # @_Z42__device_stub__query_and_interpolation_gpuiiiiPKfS0_S0_Pf
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	8(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	4(%rsp), %rsi
	movl	%edx, (%rsi)
	movq	%rsp, %rdx
	movl	%ecx, (%rdx)
	leaq	40(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	32(%rsp), %r8
	movq	%r9, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	192(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	200(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z27query_and_interpolation_gpuiiiiPKfS0_S0_Pf, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z42__device_stub__query_and_interpolation_gpuiiiiPKfS0_S0_Pf, .Lfunc_end0-_Z42__device_stub__query_and_interpolation_gpuiiiiPKfS0_S0_Pf
	.cfi_endproc
                                        # -- End function
	.globl	_Z47__device_stub__query_and_interpolation_grad_gpuiiiiPKfS0_S0_S0_PfS1_ # -- Begin function _Z47__device_stub__query_and_interpolation_grad_gpuiiiiPKfS0_S0_S0_PfS1_
	.type	_Z47__device_stub__query_and_interpolation_grad_gpuiiiiPKfS0_S0_S0_PfS1_,@function
_Z47__device_stub__query_and_interpolation_grad_gpuiiiiPKfS0_S0_S0_PfS1_: # @_Z47__device_stub__query_and_interpolation_grad_gpuiiiiPKfS0_S0_S0_PfS1_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	8(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	4(%rsp), %rsi
	movl	%edx, (%rsi)
	movq	%rsp, %rdx
	movl	%ecx, (%rdx)
	leaq	40(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	32(%rsp), %r8
	movq	%r9, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	216(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	232(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z32query_and_interpolation_grad_gpuiiiiPKfS0_S0_S0_PfS1_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z47__device_stub__query_and_interpolation_grad_gpuiiiiPKfS0_S0_S0_PfS1_, .Lfunc_end1-_Z47__device_stub__query_and_interpolation_grad_gpuiiiiPKfS0_S0_S0_PfS1_
	.cfi_endproc
                                        # -- End function
	.globl	_Z29queryAndInterpolationLauncheriiiiPKfS0_S0_Pf # -- Begin function _Z29queryAndInterpolationLauncheriiiiPKfS0_S0_Pf
	.type	_Z29queryAndInterpolationLauncheriiiiPKfS0_S0_Pf,@function
_Z29queryAndInterpolationLauncheriiiiPKfS0_S0_Pf: # @_Z29queryAndInterpolationLauncheriiiiPKfS0_S0_Pf
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %rbx
	movq	%r8, %r14
	movl	%ecx, %ebp
	movl	%edx, %r15d
	movl	%esi, %r12d
	movl	%edi, %r13d
	movl	%edi, %edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$256, %rdx                      # imm = 0x100
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	je	.LBB2_2
# %bb.1:
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB2_2:
	.cfi_def_cfa_offset 64
	movl	%r13d, %edi
	movl	%r12d, %esi
	movl	%r15d, %edx
	movl	%ebp, %ecx
	movq	%r14, %r8
	movq	%rbx, %r9
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z42__device_stub__query_and_interpolation_gpuiiiiPKfS0_S0_Pf # TAILCALL
.Lfunc_end2:
	.size	_Z29queryAndInterpolationLauncheriiiiPKfS0_S0_Pf, .Lfunc_end2-_Z29queryAndInterpolationLauncheriiiiPKfS0_S0_Pf
	.cfi_endproc
                                        # -- End function
	.globl	_Z33queryAndInterpolationGradLauncheriiiiPKfS0_S0_S0_PfS1_ # -- Begin function _Z33queryAndInterpolationGradLauncheriiiiPKfS0_S0_S0_PfS1_
	.type	_Z33queryAndInterpolationGradLauncheriiiiPKfS0_S0_S0_PfS1_,@function
_Z33queryAndInterpolationGradLauncheriiiiPKfS0_S0_S0_PfS1_: # @_Z33queryAndInterpolationGradLauncheriiiiPKfS0_S0_S0_PfS1_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, %rbx
	movq	%r8, %r14
	movl	%ecx, %ebp
	movl	%edx, %r15d
	movl	%esi, %r12d
	movl	%edi, %r13d
	movl	%edi, %edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$256, %rdx                      # imm = 0x100
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	je	.LBB3_2
# %bb.1:
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB3_2:
	.cfi_def_cfa_offset 64
	movl	%r13d, %edi
	movl	%r12d, %esi
	movl	%r15d, %edx
	movl	%ebp, %ecx
	movq	%r14, %r8
	movq	%rbx, %r9
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z47__device_stub__query_and_interpolation_grad_gpuiiiiPKfS0_S0_S0_PfS1_ # TAILCALL
.Lfunc_end3:
	.size	_Z33queryAndInterpolationGradLauncheriiiiPKfS0_S0_S0_PfS1_, .Lfunc_end3-_Z33queryAndInterpolationGradLauncheriiiiPKfS0_S0_S0_PfS1_
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z27query_and_interpolation_gpuiiiiPKfS0_S0_Pf, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z32query_and_interpolation_grad_gpuiiiiPKfS0_S0_S0_PfS1_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z27query_and_interpolation_gpuiiiiPKfS0_S0_Pf,@object # @_Z27query_and_interpolation_gpuiiiiPKfS0_S0_Pf
	.section	.rodata,"a",@progbits
	.globl	_Z27query_and_interpolation_gpuiiiiPKfS0_S0_Pf
	.p2align	3, 0x0
_Z27query_and_interpolation_gpuiiiiPKfS0_S0_Pf:
	.quad	_Z42__device_stub__query_and_interpolation_gpuiiiiPKfS0_S0_Pf
	.size	_Z27query_and_interpolation_gpuiiiiPKfS0_S0_Pf, 8

	.type	_Z32query_and_interpolation_grad_gpuiiiiPKfS0_S0_S0_PfS1_,@object # @_Z32query_and_interpolation_grad_gpuiiiiPKfS0_S0_S0_PfS1_
	.globl	_Z32query_and_interpolation_grad_gpuiiiiPKfS0_S0_S0_PfS1_
	.p2align	3, 0x0
_Z32query_and_interpolation_grad_gpuiiiiPKfS0_S0_S0_PfS1_:
	.quad	_Z47__device_stub__query_and_interpolation_grad_gpuiiiiPKfS0_S0_S0_PfS1_
	.size	_Z32query_and_interpolation_grad_gpuiiiiPKfS0_S0_S0_PfS1_, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z27query_and_interpolation_gpuiiiiPKfS0_S0_Pf"
	.size	.L__unnamed_1, 47

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z32query_and_interpolation_grad_gpuiiiiPKfS0_S0_S0_PfS1_"
	.size	.L__unnamed_2, 58

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z42__device_stub__query_and_interpolation_gpuiiiiPKfS0_S0_Pf
	.addrsig_sym _Z47__device_stub__query_and_interpolation_grad_gpuiiiiPKfS0_S0_S0_PfS1_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z27query_and_interpolation_gpuiiiiPKfS0_S0_Pf
	.addrsig_sym _Z32query_and_interpolation_grad_gpuiiiiPKfS0_S0_S0_PfS1_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z27query_and_interpolation_gpuiiiiPKfS0_S0_Pf ; -- Begin function _Z27query_and_interpolation_gpuiiiiPKfS0_S0_Pf
	.globl	_Z27query_and_interpolation_gpuiiiiPKfS0_S0_Pf
	.p2align	8
	.type	_Z27query_and_interpolation_gpuiiiiPKfS0_S0_Pf,@function
_Z27query_and_interpolation_gpuiiiiPKfS0_S0_Pf: ; @_Z27query_and_interpolation_gpuiiiiPKfS0_S0_Pf
; %bb.0:
	s_load_b64 s[2:3], s[0:1], 0x4
	s_mov_b32 s4, exec_lo
	s_waitcnt lgkmcnt(0)
	v_cmpx_gt_i32_e64 s3, v0
	s_cbranch_execz .LBB0_22
; %bb.1:                                ; %.preheader127.lr.ph
	s_clause 0x1
	s_load_b256 s[4:11], s[0:1], 0x10
	s_load_b32 s13, s[0:1], 0x3c
	s_mul_i32 s12, s15, 3
	v_mul_u32_u24_e32 v7, 0x51, v0
	s_mul_i32 s0, s12, s2
	s_mul_i32 s16, s12, s3
	s_ashr_i32 s1, s0, 31
	v_mov_b32_e32 v9, 0
	s_lshl_b64 s[0:1], s[0:1], 2
	s_mov_b32 s18, 0
	s_waitcnt lgkmcnt(0)
	s_load_b32 s8, s[8:9], 0x0
	s_add_u32 s9, s4, s0
	s_addc_u32 s12, s5, s1
	s_ashr_i32 s17, s16, 31
	s_mul_i32 s4, s15, s3
	s_lshl_b64 s[0:1], s[16:17], 2
	s_mulk_i32 s4, 0x51
	s_add_u32 s6, s6, s0
	s_addc_u32 s7, s7, s1
	s_ashr_i32 s5, s4, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[4:5], 2
	s_mov_b32 s5, 0
	s_add_u32 s10, s0, s10
	s_addc_u32 s11, s1, s11
	s_and_b32 s13, s13, 0xffff
	s_cmp_lt_i32 s2, 1
	s_mul_i32 s14, s13, 0x51
	s_cselect_b32 s15, -1, 0
	s_add_u32 s16, s10, 8
	s_waitcnt lgkmcnt(0)
	v_mul_f32_e64 v14, 0x402646e1, s8
	s_addc_u32 s17, s11, 0
.LBB0_2:                                ; %.preheader127
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_3 Depth 2
                                        ;     Child Loop BB0_9 Depth 2
                                        ;       Child Loop BB0_11 Depth 3
                                        ;         Child Loop BB0_12 Depth 4
                                        ;           Child Loop BB0_13 Depth 5
                                        ;     Child Loop BB0_20 Depth 2
	s_mov_b32 s0, s5
.LBB0_3:                                ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s1, s0, 16
	s_add_i32 s0, s0, 4
	scratch_store_b32 off, v9, s1
	s_cmpk_eq_i32 s0, 0x6c
	s_cbranch_scc0 .LBB0_3
; %bb.4:                                ; %.preheader126
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_mul_lo_u32 v15, 0x51, v0
	s_and_not1_b32 vcc_lo, exec_lo, s15
	s_cbranch_vccnz .LBB0_6
; %bb.5:                                ; %.preheader126..preheader125_crit_edge
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_mul_lo_u32 v1, 0x51, v0
	s_mov_b32 s0, 0
	s_mov_b32 s1, 0
	s_branch .LBB0_7
.LBB0_6:                                ;   in Loop: Header=BB0_2 Depth=1
	s_mov_b32 s0, -1
                                        ; implicit-def: $sgpr1
                                        ; implicit-def: $vgpr1
.LBB0_7:                                ; %Flow178
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v8, s1
	s_and_not1_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB0_19
; %bb.8:                                ; %.lr.ph
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_lshl_add_u32 v8, v0, 1, v0
	s_mov_b32 s19, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[1:2], 2, v[8:9]
	v_mov_b32_e32 v8, 0
	v_add_co_u32 v10, vcc_lo, s6, v1
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v11, vcc_lo, s7, v2, vcc_lo
.LBB0_9:                                ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_11 Depth 3
                                        ;         Child Loop BB0_12 Depth 4
                                        ;           Child Loop BB0_13 Depth 5
	s_mul_i32 s4, s19, 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[4:5], 2
	s_mov_b32 s4, exec_lo
	s_add_u32 s0, s9, s0
	s_addc_u32 s1, s12, s1
	global_load_b96 v[1:3], v[10:11], off
	global_load_b96 v[4:6], v9, s[0:1]
	s_waitcnt vmcnt(0)
	v_dual_sub_f32 v12, v2, v5 :: v_dual_sub_f32 v13, v1, v4
	v_sub_f32_e32 v16, v3, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v12, v12, v12
	v_fmac_f32_e32 v12, v13, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v12, v16, v16
	v_mul_f32_e32 v13, 0x4f800000, v12
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v12, v12, v13, vcc_lo
	v_sqrt_f32_e32 v13, v12
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v16, -1, v13
	v_add_nc_u32_e32 v17, 1, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v18, -v16, v13, v12
	v_fma_f32 v19, -v17, v13, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_f32_e64 s0, 0, v18
	v_cndmask_b32_e64 v13, v13, v16, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_f32_e64 s0, 0, v19
	v_cndmask_b32_e64 v13, v13, v17, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v16, 0x37800000, v13
	v_cndmask_b32_e32 v13, v13, v16, vcc_lo
	v_cmp_class_f32_e64 vcc_lo, v12, 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v12, v13, v12, vcc_lo
	v_max_f32_e32 v12, 0x1e3ce508, v12
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_lt_f32_e32 v12, v14
	s_cbranch_execz .LBB0_17
; %bb.10:                               ; %.preheader124.preheader
                                        ;   in Loop: Header=BB0_9 Depth=2
	s_mov_b32 s21, 0
	s_mov_b32 s20, -1
.LBB0_11:                               ; %.preheader124
                                        ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_9 Depth=2
                                        ; =>    This Loop Header: Depth=3
                                        ;         Child Loop BB0_12 Depth 4
                                        ;           Child Loop BB0_13 Depth 5
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cvt_f32_i32_e32 v12, s20
	s_mov_b32 s22, -1
	v_fma_f32 v12, s8, v12, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_f32_e32 v12, v12, v4
	v_mul_f32_e32 v16, v12, v12
.LBB0_12:                               ; %.preheader
                                        ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_9 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ; =>      This Loop Header: Depth=4
                                        ;           Child Loop BB0_13 Depth 5
	v_cvt_f32_i32_e32 v12, s22
	s_lshl_b32 s0, s21, 2
	s_mov_b32 s23, -1
	v_add_nc_u32_e64 v18, s0, 16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v12, s8, v12, v2
	v_sub_f32_e32 v17, v12, v5
	v_mad_u64_u32 v[12:13], null, s21, 3, v[7:8]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f32 v17, v17, v17, v16
.LBB0_13:                               ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_9 Depth=2
                                        ;       Parent Loop BB0_11 Depth=3
                                        ;         Parent Loop BB0_12 Depth=4
                                        ; =>        This Inner Loop Header: Depth=5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_ashrrev_i32_e32 v13, 31, v12
	v_cvt_f32_i32_e32 v24, s23
	s_add_i32 s23, s23, 1
	s_cmp_eq_u32 s23, 2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[19:20], 2, v[12:13]
	v_add_co_u32 v22, vcc_lo, s10, v19
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v23, vcc_lo, s11, v20, vcc_lo
	scratch_load_b32 v13, v18, off
	global_load_b96 v[19:21], v[22:23], off
	v_fma_f32 v24, s8, v24, v3
	v_sub_f32_e32 v24, v24, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v24, v24, v24, v17
	v_mul_f32_e32 v25, 0x4f800000, v24
	v_cmp_gt_f32_e32 vcc_lo, 0xf800000, v24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v24, v24, v25, vcc_lo
	v_sqrt_f32_e32 v25, v24
	s_waitcnt_depctr 0xfff
	v_add_nc_u32_e32 v26, -1, v25
	v_add_nc_u32_e32 v27, 1, v25
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v28, -v26, v25, v24
	v_fma_f32 v29, -v27, v25, v24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_f32_e64 s0, 0, v28
	v_cndmask_b32_e64 v25, v25, v26, s0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_lt_f32_e64 s0, 0, v29
	v_cndmask_b32_e64 v25, v25, v27, s0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v26, 0x37800000, v25
	v_dual_cndmask_b32 v25, v25, v26 :: v_dual_add_nc_u32 v12, 3, v12
	v_cmp_class_f32_e64 vcc_lo, v24, 0x260
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v24, v25, v24, vcc_lo
	v_div_scale_f32 v29, null, v24, v24, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v33, v29
	s_waitcnt_depctr 0xfff
	v_fma_f32 v36, -v29, v33, 1.0
	v_fmac_f32_e32 v33, v36, v33
	v_div_scale_f32 v25, null, v24, v24, v4
	v_div_scale_f32 v26, vcc_lo, v4, v24, v4
	v_div_scale_f32 v27, null, v24, v24, v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v31, v25
	v_div_scale_f32 v28, s0, v5, v24, v5
	v_rcp_f32_e32 v32, v27
	v_div_scale_f32 v30, s1, v6, v24, v6
	s_waitcnt_depctr 0xfff
	v_fma_f32 v34, -v25, v31, 1.0
	v_fma_f32 v35, -v27, v32, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v31, v34, v31 :: v_dual_fmac_f32 v32, v35, v32
	v_mul_f32_e32 v34, v26, v31
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v37, -v25, v34, v26
	v_fmac_f32_e32 v34, v37, v31
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v25, -v25, v34, v26
	v_div_fmas_f32 v25, v25, v31, v34
	s_mov_b32 vcc_lo, s0
	s_delay_alu instid0(VALU_DEP_1)
	v_div_fixup_f32 v25, v25, v24, v4
	v_mul_f32_e32 v36, v30, v33
	s_waitcnt vmcnt(1)
	v_add_f32_e32 v13, v24, v13
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v19, v25, v19
	v_mul_f32_e32 v35, v28, v32
	v_fma_f32 v39, -v29, v36, v30
	scratch_store_b32 v18, v13, off
	v_add_nc_u32_e32 v18, 4, v18
	v_fma_f32 v38, -v27, v35, v28
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v36, v39, v33 :: v_dual_fmac_f32 v35, v38, v32
	v_fma_f32 v26, -v27, v35, v28
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v27, -v29, v36, v30
	v_div_fmas_f32 v26, v26, v32, v35
	s_mov_b32 vcc_lo, s1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_fmas_f32 v27, v27, v33, v36
	v_div_fixup_f32 v26, v26, v24, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v27, v27, v24, v6
	v_dual_add_f32 v20, v26, v20 :: v_dual_add_f32 v21, v27, v21
	global_store_b96 v[22:23], v[19:21], off
	s_cbranch_scc0 .LBB0_13
; %bb.14:                               ;   in Loop: Header=BB0_12 Depth=4
	s_add_i32 s0, s21, s23
	s_add_i32 s22, s22, 1
	s_add_i32 s21, s0, 1
	s_cmp_eq_u32 s22, 2
	s_cbranch_scc0 .LBB0_12
; %bb.15:                               ;   in Loop: Header=BB0_11 Depth=3
	s_add_i32 s20, s20, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s20, 2
	s_cbranch_scc0 .LBB0_11
; %bb.16:                               ; %.loopexit.loopexit
                                        ;   in Loop: Header=BB0_9 Depth=2
	v_add_nc_u32_e32 v8, 1, v8
.LBB0_17:                               ; %Flow
                                        ;   in Loop: Header=BB0_9 Depth=2
	s_or_b32 exec_lo, exec_lo, s4
	s_add_i32 s19, s19, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s19, s2
	s_cbranch_scc0 .LBB0_9
; %bb.18:                               ; %Flow177
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_mov_b32_e32 v1, v15
.LBB0_19:                               ; %Flow179
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v2, 31, v1
	v_cvt_f32_i32_e32 v3, v8
	s_mov_b32 s0, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	v_add_co_u32 v1, vcc_lo, s16, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s17, v2, vcc_lo
.LBB0_20:                               ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_add_i32 s1, s0, 16
	s_add_i32 s0, s0, 4
	scratch_load_b32 v8, off, s1
	global_load_b96 v[4:6], v[1:2], off offset:-8
	s_cmpk_eq_i32 s0, 0x6c
	s_waitcnt vmcnt(1)
	v_div_scale_f32 v10, null, v3, v3, v8
	v_div_scale_f32 v12, vcc_lo, v8, v3, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f32_e32 v11, v10
	s_waitcnt_depctr 0xfff
	v_fma_f32 v13, -v10, v11, 1.0
	v_fmac_f32_e32 v11, v13, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v13, v12, v11
	v_fma_f32 v15, -v10, v13, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v13, v15, v11
	v_fma_f32 v10, -v10, v13, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f32 v10, v10, v11, v13
	v_div_fixup_f32 v8, v10, v3, v8
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v6, v8, v6
	v_mul_f32_e32 v4, v4, v8
	v_mul_f32_e32 v5, v8, v5
	global_store_b96 v[1:2], v[4:6], off offset:-8
	v_add_co_u32 v1, vcc_lo, v1, 12
	v_add_co_ci_u32_e32 v2, vcc_lo, 0, v2, vcc_lo
	s_cbranch_scc0 .LBB0_20
; %bb.21:                               ;   in Loop: Header=BB0_2 Depth=1
	v_add_nc_u32_e32 v0, s13, v0
	v_add_nc_u32_e32 v7, s14, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_le_i32_e32 vcc_lo, s3, v0
	s_or_b32 s18, vcc_lo, s18
	s_and_not1_b32 exec_lo, exec_lo, s18
	s_cbranch_execnz .LBB0_2
.LBB0_22:                               ; %._crit_edge
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z27query_and_interpolation_gpuiiiiPKfS0_S0_Pf
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 128
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 1
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 40
		.amdhsa_next_free_sgpr 24
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z27query_and_interpolation_gpuiiiiPKfS0_S0_Pf, .Lfunc_end0-_Z27query_and_interpolation_gpuiiiiPKfS0_S0_Pf
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1520
; NumSgprs: 26
; NumVgprs: 40
; ScratchSize: 128
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 4
; NumSGPRsForWavesPerEU: 26
; NumVGPRsForWavesPerEU: 40
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 1
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z32query_and_interpolation_grad_gpuiiiiPKfS0_S0_S0_PfS1_ ; -- Begin function _Z32query_and_interpolation_grad_gpuiiiiPKfS0_S0_S0_PfS1_
	.globl	_Z32query_and_interpolation_grad_gpuiiiiPKfS0_S0_S0_PfS1_
	.p2align	8
	.type	_Z32query_and_interpolation_grad_gpuiiiiPKfS0_S0_S0_PfS1_,@function
_Z32query_and_interpolation_grad_gpuiiiiPKfS0_S0_S0_PfS1_: ; @_Z32query_and_interpolation_grad_gpuiiiiPKfS0_S0_S0_PfS1_
; %bb.0:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z32query_and_interpolation_grad_gpuiiiiPKfS0_S0_S0_PfS1_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 64
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 1
		.amdhsa_next_free_sgpr 1
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z32query_and_interpolation_grad_gpuiiiiPKfS0_S0_S0_PfS1_, .Lfunc_end1-_Z32query_and_interpolation_grad_gpuiiiiPKfS0_S0_S0_PfS1_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 4
; NumSgprs: 0
; NumVgprs: 0
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 1
; NumVGPRsForWavesPerEU: 1
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .offset:         4
        .size:           4
        .value_kind:     by_value
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z27query_and_interpolation_gpuiiiiPKfS0_S0_Pf
    .private_segment_fixed_size: 128
    .sgpr_count:     26
    .sgpr_spill_count: 0
    .symbol:         _Z27query_and_interpolation_gpuiiiiPKfS0_S0_Pf.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     40
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .offset:         4
        .size:           4
        .value_kind:     by_value
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         56
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 64
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z32query_and_interpolation_grad_gpuiiiiPKfS0_S0_S0_PfS1_
    .private_segment_fixed_size: 0
    .sgpr_count:     0
    .sgpr_spill_count: 0
    .symbol:         _Z32query_and_interpolation_grad_gpuiiiiPKfS0_S0_S0_PfS1_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     0
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
