/// LSU EE 4702-1 (Fall 2018), GPU Programming
//

 /// Simple CUDA Example, without LSU ECE helper classes.

/// References
//
//  :ccpg8: CUDA C Programming Guide Version 8
//          https://docs.nvidia.com/cuda/cuda-c-programming-guide

#if 0
/// Background

 /// CUDA
 //
 //  NVIDIA's system for programming NVIDIA GPUs.
 //
 //  Intended for non-graphical computation, widely used for
 //  scientific computation.
 //

 /// CUDA Components.
 //
 //  - CUDA C
 //    Language used for writing code that runs on the GPU.
 //
 //  - CUDA Runtime API
 //    Library used for managing the execution of code on the GPU.
 //
 //  - CUDA Compiler Toolchain
 //    The "compiler" nvcc, and related tools.
 //
 //  - CUDA Compatible GPU
 //    Probably just NVIDIA GPUs.


 /// CUDA C
 //
 //  Language used for writing code that runs on the GPU.
 //
 //  A file can contain both CUDA C and C for the host compiler ...
 //  ... that is the case for this file.
 //
 //  In this file CUDA C is in routine: cuda_thread_start()
 //
 //  Syntactically similar to C++.
 //
 //  Major Differences
 //
 //    Executes as a hierarchy of threads.
 //
 //    Specialized address spaces.


 /// CUDA C Runtime API
 //
 //  Library calls used on CPU side to manage execution on GPU.
 //
 //  Activities Performed with API
 //
 //    o Send data from CPU to GPU.
 //    o Start execution of GPU code.
 //    o Send data from GPU to CPU.


 /// CUDA Address Spaces
 //

 /// Global Address Space
 //
 //  Works like "regular" memory on CPU, but it's usually separated.
 //  Uses the same hardware as OpenGL buffer objects.

 /// Constant Address Space
 //
 //  Limited amount of storage, read-only on GPU.
 //  Probably uses the same hardware as OpenGL uniforms.


 /// The Whole Process
 //
 //   - Install CUDA toolkit and NVIDIA drivers.
 //   - Write hello.cu.
 //   - Compile with nvcc
 //   - Run.


 /// Typical Program Structure
 //
 //   - Prepare input data on CPU.
 //   - Send data from CPU to GPU.
 //   - Launch kernel.
 //   - Send data from GPU to CPU.

 /// Multithreaded Execution
 //
 //  :Def: Thread
 //  A path of execution through a program.
 //  Most beginner programs have one thread.
 //
 //  :Def: Multithreaded Execution
 //  Execution of a program using more than one thread.
 //  On CPUs, program starts with one thread (in main), additional
 //   threads are requested by programmer.


#endif


#include <string.h>
#include <stdio.h>
#include <stdlib.h>
#include <unistd.h>
#include <errno.h>
#include <ctype.h>
#include <time.h>
#include <new>

#include <cuda_runtime.h>

 /// CUDA API Error-Checking Wrapper
///
#define CE(call)                                                              \
 {                                                                            \
   const cudaError_t rv = call;                                               \
   if ( rv != cudaSuccess )                                                   \
     {                                                                        \
       printf("CUDA error %d, %s\n",rv,cudaGetErrorString(rv));               \
       exit(1);                                                               \
     }                                                                        \
 }

double
time_fp()
{
  struct timespec tp;
  clock_gettime(CLOCK_REALTIME,&tp);
  return ((double)tp.tv_sec)+((double)tp.tv_nsec) * 0.000000001;
}

struct App
{
  int num_threads;
  int array_size;
  float *v_in;
  float *m_out;
  float *d_v_in;
  float *d_m_out;
};

// In host address space.
App app;

// In device constant address space.
__constant__ App d_app;

__global__ void
cuda_thread_start()
{
  // Compute a unique ID for this thread.
  const int tid = threadIdx.x + blockIdx.x * blockDim.x;

  if ( tid >= d_app.num_threads ) return;

  // Warning: The order in which d_v_in is accessed is inefficient.
  //          See demo-cuda-02-basics for a better ordering.
  //
  const int elt_per_thread = d_app.array_size / d_app.num_threads;
  const int start = elt_per_thread * tid;
  const int stop = start + elt_per_thread;

# pragma unroll 1
  for ( int h=start; h<stop; h++ )
    d_app.d_m_out[h] = d_app.d_v_in[h] + 1;

}

int
main(int argc, char **argv)
{
  const int nt_raw = argc < 2 ? 1 : atoi(argv[1]);
  app.num_threads = abs(nt_raw);

  app.array_size = argc < 3 ? 1 << 20 : int( atof(argv[2]) * (1<<20) );
  const int array_size_bytes = app.array_size * sizeof(app.v_in[0]);
  const int out_array_size_bytes = app.array_size * sizeof(app.m_out[0]);

  // Allocate storage for CPU copy of data.
  //
  app.v_in = new float[app.array_size];
  app.m_out = new float[app.array_size];

  // Allocate storage for GPU copy of data.
  //
  CE( cudaMalloc( &app.d_v_in,  array_size_bytes     ) );
  CE( cudaMalloc( &app.d_m_out, out_array_size_bytes ) );

  printf("Preparing for %d threads %d elements.\n",
         app.num_threads, app.array_size);

  // Initialize input array.
  //
  for ( int i=0; i<app.array_size; i++ ) app.v_in[i] = drand48();

  const double time_start = time_fp();

  // Copy input array from CPU to GPU.
  //
  CE( cudaMemcpy
      ( app.d_v_in, app.v_in, array_size_bytes, cudaMemcpyHostToDevice ) );

  // Copy App structure to GPU.
  //
  CE( cudaMemcpyToSymbol
      ( d_app, &app, sizeof(app), 0, cudaMemcpyHostToDevice ) );

  const int threads_per_block = 256;
  const int blocks_per_grid =
    ( app.num_threads + threads_per_block-1 ) / threads_per_block;

  /// KERNEL LAUNCH
  cuda_thread_start<<< blocks_per_grid, threads_per_block >>>();
  //               --- <-- CUDA C kernel launch syntax -> ---

  // Copy output array from GPU to CPU.
  //
  CE( cudaMemcpy
      ( app.m_out, app.d_m_out, out_array_size_bytes, cudaMemcpyDeviceToHost) );

  const double data_size = 
    app.array_size * ( sizeof(app.v_in[0]) + sizeof(app.m_out[0]) );
  const double fp_op_count = app.array_size * 5;
  const double elapsed_time = time_fp() - time_start;

  printf("Elapsed time for %d threads and %d elements is %.3f µs\n",
         app.num_threads, app.array_size, 1e6 * elapsed_time);
  printf("Rate %.3f GFLOPS,  %.3f GB/s\n",
         1e-9 * fp_op_count / elapsed_time,
         1e-9 * data_size / elapsed_time);
}

	.file	"tmpxft_0031ef2a_00000000-6_demo-cuda-01-simple.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2058:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2058:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z7time_fpv
	.type	_Z7time_fpv, @function
_Z7time_fpv:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	xorl	%edi, %edi
	movq	%fs:40, %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rsi
	call	clock_gettime@PLT
	cvtsi2sdq	16(%rsp), %xmm0
	mulsd	.LC0(%rip), %xmm0
	cvtsi2sdq	8(%rsp), %xmm1
	addsd	%xmm1, %xmm0
	movq	24(%rsp), %rax
	subq	%fs:40, %rax
	je	.L3
	call	__stack_chk_fail@PLT
.L3:
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z7time_fpv, .-_Z7time_fpv
	.globl	_Z36__device_stub__Z17cuda_thread_startvv
	.type	_Z36__device_stub__Z17cuda_thread_startvv, @function
_Z36__device_stub__Z17cuda_thread_startvv:
.LFB2080:
	.cfi_startproc
	endbr64
	subq	$88, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	movabsq	$4294967297, %rax
	leaq	8(%rsp), %rcx
	movq	%rsp, %rdx
	leaq	28(%rsp), %rsi
	leaq	16(%rsp), %rdi
	movl	$1, 24(%rsp)
	movl	$1, 36(%rsp)
	movq	%rax, 16(%rsp)
	movq	%rax, 28(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L6
	pushq	8(%rsp)
	.cfi_def_cfa_offset 104
	leaq	_Z17cuda_thread_startv(%rip), %rdi
	pushq	8(%rsp)
	.cfi_def_cfa_offset 112
	movq	44(%rsp), %rcx
	movl	52(%rsp), %r8d
	movq	32(%rsp), %rsi
	movl	40(%rsp), %edx
	leaq	80(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 104
	popq	%rdx
	.cfi_def_cfa_offset 96
.L6:
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L8
	call	__stack_chk_fail@PLT
.L8:
	addq	$88, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2080:
	.size	_Z36__device_stub__Z17cuda_thread_startvv, .-_Z36__device_stub__Z17cuda_thread_startvv
	.globl	_Z17cuda_thread_startv
	.type	_Z17cuda_thread_startv, @function
_Z17cuda_thread_startv:
.LFB2081:
	.cfi_startproc
	endbr64
	jmp	_Z36__device_stub__Z17cuda_thread_startvv
	.cfi_endproc
.LFE2081:
	.size	_Z17cuda_thread_startv, .-_Z17cuda_thread_startv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"CUDA error %d, %s\n"
.LC3:
	.string	"Preparing for %d threads %d elements.\n"
.LC5:
	.string	"Elapsed time for %d threads and %d elements is %.3f \302\265s\n"
.LC6:
	.string	"Rate %.3f GFLOPS,  %.3f GB/s\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	%edi, %r12d
	movl	$1, %eax
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rsi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$64, %rsp
	.cfi_def_cfa_offset 96
	decl	%edi
	jle	.L12
	movq	8(%rsi), %rdi
	call	atoi@PLT
.L12:
	movl	%eax, %edx
	movl	$1048576, %ebx
	negl	%edx
	cmovns	%edx, %eax
	movl	%eax, app(%rip)
	cmpl	$2, %r12d
	jle	.L13
	movq	16(%rbp), %rdi
	call	atof@PLT
	mulsd	.LC1(%rip), %xmm0
	cvttsd2sil	%xmm0, %ebx
.L13:
	movslq	%ebx, %rdi
	movl	%ebx, 4+app(%rip)
	sall	$2, %ebx
	movabsq	$2305843009213693950, %rbp
	cmpq	%rdi, %rbp
	jb	.L14
	salq	$2, %rdi
	call	_Znam@PLT
	movslq	4+app(%rip), %rdi
	movq	%rax, 8+app(%rip)
	cmpq	%rdi, %rbp
	jnb	.L15
.L14:
	call	__cxa_throw_bad_array_new_length@PLT
.L15:
	salq	$2, %rdi
	movslq	%ebx, %rbx
	call	_Znam@PLT
	movq	%rbx, %rsi
	leaq	24+app(%rip), %rdi
	movq	%rax, 16+app(%rip)
	call	cudaMalloc@PLT
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L32
	movq	%rbx, %rsi
	leaq	32+app(%rip), %rdi
	call	cudaMalloc@PLT
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L32
	movl	4+app(%rip), %ecx
	movl	app(%rip), %edx
	xorl	%eax, %eax
	xorl	%ebp, %ebp
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
.L18:
	cmpl	%ebp, 4+app(%rip)
	jle	.L33
	call	drand48@PLT
	movq	8+app(%rip), %rax
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, (%rax,%rbp,4)
	incq	%rbp
	jmp	.L18
.L33:
	call	_Z7time_fpv
	movq	8+app(%rip), %rsi
	movl	$1, %ecx
	movq	%rbx, %rdx
	movq	24+app(%rip), %rdi
	movsd	%xmm0, 8(%rsp)
	call	cudaMemcpy@PLT
	movl	%eax, %ebp
	testl	%eax, %eax
	jne	.L32
	movl	$1, %r8d
	xorl	%ecx, %ecx
	movl	$40, %edx
	leaq	app(%rip), %rsi
	leaq	_ZL5d_app(%rip), %rdi
	call	cudaMemcpyToSymbol@PLT
	movl	%eax, %ebp
	testl	%eax, %eax
	je	.L21
.L32:
	movl	%ebp, %edi
	call	cudaGetErrorString@PLT
	movl	%ebp, %edx
	movq	%rax, %rcx
	jmp	.L31
.L21:
	movl	app(%rip), %eax
	movl	$256, %ecx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	addl	$255, %eax
	cltd
	idivl	%ecx
	movl	$16777217, %edx
	movl	$1, %ecx
	salq	$8, %rdx
	movl	%eax, 40(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 44(%rsp)
	movq	40(%rsp), %rdi
	movl	48(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L22
	call	_Z36__device_stub__Z17cuda_thread_startvv
.L22:
	movq	32+app(%rip), %rsi
	movq	16+app(%rip), %rdi
	movq	%rbx, %rdx
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	je	.L23
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	movl	%ebx, %edx
	movq	%rax, %rcx
.L31:
	movl	$2, %edi
	leaq	.LC2(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L23:
	movslq	4+app(%rip), %rax
	movq	%rax, %rdx
	salq	$3, %rax
	js	.L24
	cvtsi2sdq	%rax, %xmm1
	jmp	.L25
.L24:
	shrq	%rax
	cvtsi2sdq	%rax, %xmm1
	addsd	%xmm1, %xmm1
.L25:
	leal	(%rdx,%rdx,4), %edx
	movsd	%xmm1, 24(%rsp)
	cvtsi2sdl	%edx, %xmm3
	movsd	%xmm3, 16(%rsp)
	call	_Z7time_fpv
	movl	4+app(%rip), %ecx
	movl	app(%rip), %edx
	movb	$1, %al
	movaps	%xmm0, %xmm2
	subsd	8(%rsp), %xmm2
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	movaps	%xmm2, %xmm0
	movsd	%xmm2, 8(%rsp)
	mulsd	.LC4(%rip), %xmm0
	call	__printf_chk@PLT
	movsd	.LC0(%rip), %xmm0
	movb	$2, %al
	movsd	24(%rsp), %xmm1
	movsd	8(%rsp), %xmm2
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	mulsd	%xmm0, %xmm1
	mulsd	16(%rsp), %xmm0
	divsd	%xmm2, %xmm1
	divsd	%xmm2, %xmm0
	call	__printf_chk@PLT
	addq	$64, %rsp
	.cfi_def_cfa_offset 32
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2055:
	.size	main, .-main
	.section	.rodata.str1.1
.LC7:
	.string	"_Z17cuda_thread_startv"
.LC8:
	.string	"d_app"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2083:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC7(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z17cuda_thread_startv(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC8(%rip), %rdx
	movl	$40, %r9d
	leaq	_ZL5d_app(%rip), %rsi
	pushq	$1
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2083:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZL5d_app
	.comm	_ZL5d_app,40,32
	.globl	app
	.bss
	.align 32
	.type	app, @object
	.size	app, 40
app:
	.zero	40
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC0:
	.long	-400107883
	.long	1041313291
	.align 8
.LC1:
	.long	0
	.long	1093664768
	.align 8
.LC4:
	.long	0
	.long	1093567616
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/// LSU EE 4702-1 (Fall 2018), GPU Programming
//

 /// Simple CUDA Example, without LSU ECE helper classes.

/// References
//
//  :ccpg8: CUDA C Programming Guide Version 8
//          https://docs.nvidia.com/cuda/cuda-c-programming-guide

#if 0
/// Background

 /// CUDA
 //
 //  NVIDIA's system for programming NVIDIA GPUs.
 //
 //  Intended for non-graphical computation, widely used for
 //  scientific computation.
 //

 /// CUDA Components.
 //
 //  - CUDA C
 //    Language used for writing code that runs on the GPU.
 //
 //  - CUDA Runtime API
 //    Library used for managing the execution of code on the GPU.
 //
 //  - CUDA Compiler Toolchain
 //    The "compiler" nvcc, and related tools.
 //
 //  - CUDA Compatible GPU
 //    Probably just NVIDIA GPUs.


 /// CUDA C
 //
 //  Language used for writing code that runs on the GPU.
 //
 //  A file can contain both CUDA C and C for the host compiler ...
 //  ... that is the case for this file.
 //
 //  In this file CUDA C is in routine: cuda_thread_start()
 //
 //  Syntactically similar to C++.
 //
 //  Major Differences
 //
 //    Executes as a hierarchy of threads.
 //
 //    Specialized address spaces.


 /// CUDA C Runtime API
 //
 //  Library calls used on CPU side to manage execution on GPU.
 //
 //  Activities Performed with API
 //
 //    o Send data from CPU to GPU.
 //    o Start execution of GPU code.
 //    o Send data from GPU to CPU.


 /// CUDA Address Spaces
 //

 /// Global Address Space
 //
 //  Works like "regular" memory on CPU, but it's usually separated.
 //  Uses the same hardware as OpenGL buffer objects.

 /// Constant Address Space
 //
 //  Limited amount of storage, read-only on GPU.
 //  Probably uses the same hardware as OpenGL uniforms.


 /// The Whole Process
 //
 //   - Install CUDA toolkit and NVIDIA drivers.
 //   - Write hello.cu.
 //   - Compile with nvcc
 //   - Run.


 /// Typical Program Structure
 //
 //   - Prepare input data on CPU.
 //   - Send data from CPU to GPU.
 //   - Launch kernel.
 //   - Send data from GPU to CPU.

 /// Multithreaded Execution
 //
 //  :Def: Thread
 //  A path of execution through a program.
 //  Most beginner programs have one thread.
 //
 //  :Def: Multithreaded Execution
 //  Execution of a program using more than one thread.
 //  On CPUs, program starts with one thread (in main), additional
 //   threads are requested by programmer.


#endif


#include <string.h>
#include <stdio.h>
#include <stdlib.h>
#include <unistd.h>
#include <errno.h>
#include <ctype.h>
#include <time.h>
#include <new>

#include <hip/hip_runtime.h>

 /// CUDA API Error-Checking Wrapper
///
#define CE(call)                                                              \
 {                                                                            \
   const hipError_t rv = call;                                               \
   if ( rv != hipSuccess )                                                   \
     {                                                                        \
       printf("CUDA error %d, %s\n",rv,hipGetErrorString(rv));               \
       exit(1);                                                               \
     }                                                                        \
 }

double
time_fp()
{
  struct timespec tp;
  clock_gettime(CLOCK_REALTIME,&tp);
  return ((double)tp.tv_sec)+((double)tp.tv_nsec) * 0.000000001;
}

struct App
{
  int num_threads;
  int array_size;
  float *v_in;
  float *m_out;
  float *d_v_in;
  float *d_m_out;
};

// In host address space.
App app;

// In device constant address space.
__constant__ App d_app;

__global__ void
cuda_thread_start()
{
  // Compute a unique ID for this thread.
  const int tid = threadIdx.x + blockIdx.x * blockDim.x;

  if ( tid >= d_app.num_threads ) return;

  // Warning: The order in which d_v_in is accessed is inefficient.
  //          See demo-cuda-02-basics for a better ordering.
  //
  const int elt_per_thread = d_app.array_size / d_app.num_threads;
  const int start = elt_per_thread * tid;
  const int stop = start + elt_per_thread;

# pragma unroll 1
  for ( int h=start; h<stop; h++ )
    d_app.d_m_out[h] = d_app.d_v_in[h] + 1;

}

int
main(int argc, char **argv)
{
  const int nt_raw = argc < 2 ? 1 : atoi(argv[1]);
  app.num_threads = abs(nt_raw);

  app.array_size = argc < 3 ? 1 << 20 : int( atof(argv[2]) * (1<<20) );
  const int array_size_bytes = app.array_size * sizeof(app.v_in[0]);
  const int out_array_size_bytes = app.array_size * sizeof(app.m_out[0]);

  // Allocate storage for CPU copy of data.
  //
  app.v_in = new float[app.array_size];
  app.m_out = new float[app.array_size];

  // Allocate storage for GPU copy of data.
  //
  CE( hipMalloc( &app.d_v_in,  array_size_bytes     ) );
  CE( hipMalloc( &app.d_m_out, out_array_size_bytes ) );

  printf("Preparing for %d threads %d elements.\n",
         app.num_threads, app.array_size);

  // Initialize input array.
  //
  for ( int i=0; i<app.array_size; i++ ) app.v_in[i] = drand48();

  const double time_start = time_fp();

  // Copy input array from CPU to GPU.
  //
  CE( hipMemcpy
      ( app.d_v_in, app.v_in, array_size_bytes, hipMemcpyHostToDevice ) );

  // Copy App structure to GPU.
  //
  CE( hipMemcpyToSymbol
      ( HIP_SYMBOL(d_app), &app, sizeof(app), 0, hipMemcpyHostToDevice ) );

  const int threads_per_block = 256;
  const int blocks_per_grid =
    ( app.num_threads + threads_per_block-1 ) / threads_per_block;

  /// KERNEL LAUNCH
  cuda_thread_start<<< blocks_per_grid, threads_per_block >>>();
  //               --- <-- CUDA C kernel launch syntax -> ---

  // Copy output array from GPU to CPU.
  //
  CE( hipMemcpy
      ( app.m_out, app.d_m_out, out_array_size_bytes, hipMemcpyDeviceToHost) );

  const double data_size = 
    app.array_size * ( sizeof(app.v_in[0]) + sizeof(app.m_out[0]) );
  const double fp_op_count = app.array_size * 5;
  const double elapsed_time = time_fp() - time_start;

  printf("Elapsed time for %d threads and %d elements is %.3f µs\n",
         app.num_threads, app.array_size, 1e6 * elapsed_time);
  printf("Rate %.3f GFLOPS,  %.3f GB/s\n",
         1e-9 * fp_op_count / elapsed_time,
         1e-9 * data_size / elapsed_time);
}

	.text
	.file	"demo-cuda-01-simple.hip"
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z7time_fpv
.LCPI0_0:
	.quad	0x3e112e0be826d695              # double 1.0000000000000001E-9
	.text
	.globl	_Z7time_fpv
	.type	_Z7time_fpv,@function
_Z7time_fpv:                            # @_Z7time_fpv
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$16, %rsp
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -16
	movq	%rsp, %rbx
	xorl	%edi, %edi
	movq	%rbx, %rsi
	callq	clock_gettime
	cvtsi2sdq	(%rbx), %xmm1
	cvtsi2sdq	8(%rbx), %xmm0
	mulsd	.LCPI0_0(%rip), %xmm0
	addsd	%xmm1, %xmm0
	addq	$16, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z7time_fpv, .Lfunc_end0-_Z7time_fpv
	.cfi_endproc
                                        # -- End function
	.globl	_Z32__device_stub__cuda_thread_startv # -- Begin function _Z32__device_stub__cuda_thread_startv
	.type	_Z32__device_stub__cuda_thread_startv,@function
_Z32__device_stub__cuda_thread_startv:  # @_Z32__device_stub__cuda_thread_startv
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$56, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rbx
	leaq	24(%rsp), %r14
	leaq	16(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rbx, %rdi
	movq	%r14, %rsi
	movq	%r15, %rdx
	movq	%r12, %rcx
	callq	__hipPopCallConfiguration
	movq	(%rbx), %rsi
	movl	8(%rbx), %edx
	movq	(%r14), %rcx
	movl	8(%r14), %r8d
	movq	%rsp, %r9
	movl	$_Z17cuda_thread_startv, %edi
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	pushq	(%r15)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$72, %rsp
	.cfi_adjust_cfa_offset -72
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z32__device_stub__cuda_thread_startv, .Lfunc_end1-_Z32__device_stub__cuda_thread_startv
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI2_0:
	.quad	0x4130000000000000              # double 1048576
.LCPI2_1:
	.quad	0x3e112e0be826d695              # double 1.0000000000000001E-9
.LCPI2_4:
	.quad	0x412e848000000000              # double 1.0E+6
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0
.LCPI2_2:
	.long	1127219200                      # 0x43300000
	.long	1160773632                      # 0x45300000
	.long	0                               # 0x0
	.long	0                               # 0x0
.LCPI2_3:
	.quad	0x4330000000000000              # double 4503599627370496
	.quad	0x4530000000000000              # double 1.9342813113834067E+25
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$56, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	cmpl	$1, %edi
	jg	.LBB2_2
# %bb.1:                                # %.thread
	movl	$1, app(%rip)
	jmp	.LBB2_3
.LBB2_2:
	movq	%rsi, %rbx
	movl	%edi, %ebp
	movq	8(%rsi), %rdi
	callq	atoi
	movl	%eax, %ecx
	negl	%ecx
	cmovsl	%eax, %ecx
	movl	%ecx, app(%rip)
	cmpl	$2, %ebp
	jne	.LBB2_4
.LBB2_3:                                # %.thread49
	movl	$1048576, app+4(%rip)           # imm = 0x100000
	movl	$4194304, %ebx                  # imm = 0x400000
	movl	$4194304, %r14d                 # imm = 0x400000
	jmp	.LBB2_5
.LBB2_4:
	movq	16(%rbx), %rdi
	callq	atof
	mulsd	.LCPI2_0(%rip), %xmm0
	cvttsd2si	%xmm0, %eax
	movl	%eax, app+4(%rip)
	movl	%eax, %ecx
	leal	(,%rax,4), %edx
	shlq	$2, %rcx
	testl	%eax, %eax
	movq	$-1, %r14
	cmovnsq	%rcx, %r14
	movslq	%edx, %rbx
.LBB2_5:
	movq	%r14, %rdi
	callq	_Znam
	movq	%rax, app+8(%rip)
	movq	%r14, %rdi
	callq	_Znam
	movq	%rax, app+16(%rip)
	movl	$app+24, %edi
	movq	%rbx, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_6
# %bb.8:
	movl	$app+32, %edi
	movq	%rbx, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_6
# %bb.9:
	movl	app(%rip), %esi
	movl	app+4(%rip), %edx
	movl	$.L.str.1, %edi
	xorl	%eax, %eax
	callq	printf
	cmpl	$0, app+4(%rip)
	jle	.LBB2_12
# %bb.10:                               # %.lr.ph.preheader
	xorl	%r14d, %r14d
.LBB2_11:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	callq	drand48
	cvtsd2ss	%xmm0, %xmm0
	movq	app+8(%rip), %rax
	movss	%xmm0, (%rax,%r14,4)
	incq	%r14
	movslq	app+4(%rip), %rax
	cmpq	%rax, %r14
	jl	.LBB2_11
.LBB2_12:                               # %._crit_edge
	leaq	40(%rsp), %r14
	xorl	%edi, %edi
	movq	%r14, %rsi
	callq	clock_gettime
	movq	(%r14), %r15
	movq	8(%r14), %r14
	movq	app+24(%rip), %rdi
	movq	app+8(%rip), %rsi
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB2_6
# %bb.13:
	movl	$d_app, %edi
	movl	$app, %esi
	movl	$40, %edx
	xorl	%ecx, %ecx
	movl	$1, %r8d
	callq	hipMemcpyToSymbol
	testl	%eax, %eax
	jne	.LBB2_6
# %bb.14:
	movl	app(%rip), %edi
	leal	255(%rdi), %eax
	addl	$510, %edi                      # imm = 0x1FE
	testl	%eax, %eax
	cmovnsl	%eax, %edi
	sarl	$8, %edi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$256, %rdx                      # imm = 0x100
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_16
# %bb.15:
	callq	_Z32__device_stub__cuda_thread_startv
.LBB2_16:
	movq	app+16(%rip), %rdi
	movq	app+32(%rip), %rsi
	movq	%rbx, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB2_17
# %bb.18:
	xorps	%xmm0, %xmm0
	cvtsi2sd	%r14, %xmm0
	cvtsi2sd	%r15, %xmm2
	mulsd	.LCPI2_1(%rip), %xmm0
	movslq	app+4(%rip), %rax
	leal	(%rax,%rax,4), %ecx
	shlq	$3, %rax
	movq	%rax, %xmm1
	punpckldq	.LCPI2_2(%rip), %xmm1   # xmm1 = xmm1[0],mem[0],xmm1[1],mem[1]
	addsd	%xmm0, %xmm2
	movsd	%xmm2, (%rsp)                   # 8-byte Spill
	subpd	.LCPI2_3(%rip), %xmm1
	movapd	%xmm1, %xmm0
	unpckhpd	%xmm1, %xmm0                    # xmm0 = xmm0[1],xmm1[1]
	addsd	%xmm1, %xmm0
	movapd	%xmm0, 16(%rsp)                 # 16-byte Spill
	xorps	%xmm0, %xmm0
	cvtsi2sd	%ecx, %xmm0
	movsd	%xmm0, 8(%rsp)                  # 8-byte Spill
	leaq	40(%rsp), %rbx
	xorl	%edi, %edi
	movq	%rbx, %rsi
	callq	clock_gettime
	xorps	%xmm0, %xmm0
	cvtsi2sdq	(%rbx), %xmm0
	xorps	%xmm1, %xmm1
	cvtsi2sdq	8(%rbx), %xmm1
	mulsd	.LCPI2_1(%rip), %xmm1
	addsd	%xmm0, %xmm1
	subsd	(%rsp), %xmm1                   # 8-byte Folded Reload
	movsd	%xmm1, (%rsp)                   # 8-byte Spill
	movl	app(%rip), %esi
	movl	app+4(%rip), %edx
	movsd	.LCPI2_4(%rip), %xmm0           # xmm0 = mem[0],zero
	mulsd	%xmm1, %xmm0
	movl	$.L.str.2, %edi
	movb	$1, %al
	callq	printf
	movsd	.LCPI2_1(%rip), %xmm2           # xmm2 = mem[0],zero
	movsd	8(%rsp), %xmm0                  # 8-byte Reload
                                        # xmm0 = mem[0],zero
	mulsd	%xmm2, %xmm0
	movsd	(%rsp), %xmm3                   # 8-byte Reload
                                        # xmm3 = mem[0],zero
	divsd	%xmm3, %xmm0
	movapd	16(%rsp), %xmm1                 # 16-byte Reload
	mulsd	%xmm2, %xmm1
	divsd	%xmm3, %xmm1
	movl	$.L.str.3, %edi
	movb	$2, %al
	callq	printf
	xorl	%eax, %eax
	addq	$56, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB2_6:
	.cfi_def_cfa_offset 96
	movl	%eax, %ebp
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movl	%ebp, %esi
.LBB2_7:
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	printf
	movl	$1, %edi
	callq	exit
.LBB2_17:
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movl	%ebx, %esi
	jmp	.LBB2_7
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17cuda_thread_startv, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$0, 8(%rsp)
	movl	$1, (%rsp)
	movl	$d_app, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movl	$40, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	callq	__hipRegisterVar
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	app,@object                     # @app
	.bss
	.globl	app
	.p2align	3, 0x0
app:
	.zero	40
	.size	app, 40

	.type	d_app,@object                   # @d_app
	.local	d_app
	.comm	d_app,40,8
	.type	_Z17cuda_thread_startv,@object  # @_Z17cuda_thread_startv
	.section	.rodata,"a",@progbits
	.globl	_Z17cuda_thread_startv
	.p2align	3, 0x0
_Z17cuda_thread_startv:
	.quad	_Z32__device_stub__cuda_thread_startv
	.size	_Z17cuda_thread_startv, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"CUDA error %d, %s\n"
	.size	.L.str, 19

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Preparing for %d threads %d elements.\n"
	.size	.L.str.1, 39

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Elapsed time for %d threads and %d elements is %.3f \302\265s\n"
	.size	.L.str.2, 57

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Rate %.3f GFLOPS,  %.3f GB/s\n"
	.size	.L.str.3, 30

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z17cuda_thread_startv"
	.size	.L__unnamed_1, 23

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"d_app"
	.size	.L__unnamed_2, 6

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z32__device_stub__cuda_thread_startv
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym app
	.addrsig_sym d_app
	.addrsig_sym _Z17cuda_thread_startv
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z17cuda_thread_startv  ; -- Begin function _Z17cuda_thread_startv
	.globl	_Z17cuda_thread_startv
	.p2align	8
	.type	_Z17cuda_thread_startv,@function
_Z17cuda_thread_startv:                 ; @_Z17cuda_thread_startv
; %bb.0:
	s_load_b32 s2, s[0:1], 0xc
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, d_app@rel32@lo+4
	s_addc_u32 s1, s1, d_app@rel32@hi+12
	s_load_b32 s0, s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s1, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s1, v[0:1]
	s_mov_b32 s1, exec_lo
	v_cmpx_gt_i32_e64 s0, v1
	s_cbranch_execz .LBB0_4
; %bb.1:
	s_ashr_i32 s2, s0, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s0, s0, s2
	s_xor_b32 s3, s0, s2
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, d_app@rel32@lo+8
	s_addc_u32 s1, s1, d_app@rel32@hi+16
	v_cvt_f32_u32_e32 v0, s3
	s_load_b32 s0, s[0:1], 0x0
	s_sub_i32 s4, 0, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v0, v0
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	v_cvt_u32_f32_e32 v0, v0
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s5, s0, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	s_add_i32 s0, s0, s5
	s_xor_b32 s2, s5, s2
	v_readfirstlane_b32 s1, v0
	s_xor_b32 s0, s0, s5
	s_mul_i32 s4, s4, s1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s4, s1, s4
	s_add_i32 s1, s1, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s1, s0, s1
	s_mul_i32 s4, s1, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_sub_i32 s0, s0, s4
	s_add_i32 s4, s1, 1
	s_sub_i32 s5, s0, s3
	s_cmp_ge_u32 s0, s3
	s_cselect_b32 s1, s4, s1
	s_cselect_b32 s0, s5, s0
	s_add_i32 s4, s1, 1
	s_cmp_ge_u32 s0, s3
	s_cselect_b32 s0, s4, s1
	s_mov_b32 s1, 0
	s_xor_b32 s0, s0, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_sub_i32 s0, s0, s2
	s_cmp_lt_i32 s0, 1
	s_cbranch_scc1 .LBB0_4
; %bb.2:                                ; %.lr.ph
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, d_app@rel32@lo+28
	s_addc_u32 s3, s3, d_app@rel32@hi+36
	v_mul_lo_u32 v0, s0, v1
	s_load_b128 s[4:7], s[2:3], 0x0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v1, 31, v0
	v_add_nc_u32_e32 v5, s0, v0
	v_lshlrev_b64 v[3:4], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s4, v3
	v_add_co_ci_u32_e32 v2, vcc_lo, s5, v4, vcc_lo
	v_add_co_u32 v3, vcc_lo, s6, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s7, v4, vcc_lo
.LBB0_3:                                ; =>This Inner Loop Header: Depth=1
	global_load_b32 v6, v[1:2], off
	v_add_nc_u32_e32 v0, 1, v0
	v_add_co_u32 v1, vcc_lo, v1, 4
	v_add_co_ci_u32_e32 v2, vcc_lo, 0, v2, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_cmp_ge_i32_e32 vcc_lo, v0, v5
	s_or_b32 s1, vcc_lo, s1
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v6, 1.0, v6
	global_store_b32 v[3:4], v6, off
	v_add_co_u32 v3, s0, v3, 4
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s0, 0, v4, s0
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB0_3
.LBB0_4:                                ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17cuda_thread_startv
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 256
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z17cuda_thread_startv, .Lfunc_end0-_Z17cuda_thread_startv
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 452
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.protected	d_app                   ; @d_app
	.type	d_app,@object
	.section	.bss,"aw",@nobits
	.globl	d_app
	.p2align	3, 0x0
d_app:
	.zero	40
	.size	d_app, 40

	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym d_app
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         4
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         8
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         12
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         14
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         16
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         18
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         20
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         22
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         40
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         48
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         64
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 256
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z17cuda_thread_startv
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z17cuda_thread_startv.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
