#include <stdio.h>
#include <time.h>
#include <cuda.h>

#define CHKCUDA(val)  ({                                         \
            cudaError_t v = (val);                               \
  if (v != cudaSuccess) {                                        \
      const char *ename;                                         \
      ename = cudaGetErrorName(v);                               \
      fprintf(stderr, "CUDA error %s(%d) at %s:%d\n",            \
              ename, v, __FILE__, __LINE__);                     \
      exit(EXIT_FAILURE);                                        \
  }                                                              \
  v;})

__global__ void kmain(int N, int *A, int *B, int *C) {
    int idx;
    int row, col;
    int s, i;

    idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx >= N * N) {
        return;
    }
    row = idx / N;
    col = idx % N;

    for( s = 0, i = 0; i < N;i++) {
        s += A[row * N + i] * B[ i * N + col];
    }
    C[row * N + col] = s;
}


int main(int argc, char **argv) {
  int N;
  int *A, *B, *C;
  int blocks;
  int *dA, *dB, *dC;
  int asize;
  clock_t ts;
  
  N = (argc > 1) ? atoi(argv[1]) : 512;
  asize = N * N * sizeof (int);
  A = (int *)malloc(asize);
  B = (int *)malloc(asize);
  C = (int *)malloc(asize);

  printf("=== begin %s where N  is %d === \n", argv[0], N);
  ts = clock();
  CHKCUDA(cudaMalloc(&dA, asize));
  CHKCUDA(cudaMalloc(&dB, asize));
  CHKCUDA(cudaMalloc(&dC, asize));
  CHKCUDA(cudaMemcpy(dA, A, asize, cudaMemcpyHostToDevice));
  CHKCUDA(cudaMemcpy(dB, B, asize, cudaMemcpyHostToDevice));
  CHKCUDA(cudaMemcpy(dC, C, asize, cudaMemcpyHostToDevice));
  blocks = N * N / 512;
  kmain<<<blocks, 512>>>(N, dA, dB, dC);
  CHKCUDA(cudaDeviceSynchronize());
  CHKCUDA(cudaMemcpy(A, dA, asize, cudaMemcpyDeviceToHost));
  CHKCUDA(cudaMemcpy(B, dB, asize, cudaMemcpyDeviceToHost));
  CHKCUDA(cudaMemcpy(C, dC, asize, cudaMemcpyDeviceToHost));  

  CHKCUDA(cudaFree(dA));
  CHKCUDA(cudaFree(dB));
  CHKCUDA(cudaFree(dC));
  printf("=== finished %s in %d ms ===\n",
         argv[0],
         (int)((clock() - ts) / (CLOCKS_PER_SEC/1000)));
  free(A);
  free(B);
  free(C);

  return 0;
}

	.file	"tmpxft_002383ae_00000000-6_DMMCUDA.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z29__device_stub__Z5kmainiPiS_S_iPiS_S_
	.type	_Z29__device_stub__Z5kmainiPiS_S_iPiS_S_, @function
_Z29__device_stub__Z5kmainiPiS_S_iPiS_S_:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movl	%edi, 28(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z5kmainiPiS_S_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z29__device_stub__Z5kmainiPiS_S_iPiS_S_, .-_Z29__device_stub__Z5kmainiPiS_S_iPiS_S_
	.globl	_Z5kmainiPiS_S_
	.type	_Z5kmainiPiS_S_, @function
_Z5kmainiPiS_S_:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z29__device_stub__Z5kmainiPiS_S_iPiS_S_
	.cfi_endproc
.LFE2053:
	.size	_Z5kmainiPiS_S_, .-_Z5kmainiPiS_S_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"=== begin %s where N  is %d === \n"
.LC1:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/DICL/dumbo/master/grvm/examples/DMMCUDA.cu"
.LC2:
	.string	"CUDA error %s(%d) at %s:%d\n"
.LC3:
	.string	"=== finished %s in %d ms ===\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rsi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	$512, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	decl	%edi
	jle	.L9
	movq	8(%rsi), %rdi
	call	atoi@PLT
	movl	%eax, %ebp
.L9:
	movl	%ebp, %r14d
	imull	%ebp, %r14d
	leal	0(,%r14,4), %ebx
	movslq	%ebx, %rbx
	movq	%rbx, %rdi
	call	malloc@PLT
	movq	%rbx, %rdi
	movq	%rax, %r12
	call	malloc@PLT
	movq	%rbx, %rdi
	movq	%rax, (%rsp)
	call	malloc@PLT
	movq	0(%r13), %rdx
	movl	$2, %edi
	movl	%ebp, %ecx
	leaq	.LC0(%rip), %rsi
	movq	%rax, 8(%rsp)
	xorl	%eax, %eax
	call	__printf_chk@PLT
	call	clock@PLT
	leaq	24(%rsp), %rdi
	movq	%rbx, %rsi
	movq	%rax, %r15
	call	cudaMalloc@PLT
	testl	%eax, %eax
	je	.L10
	movl	%eax, %edi
	movl	%eax, (%rsp)
	call	cudaGetErrorName@PLT
	pushq	%r14
	.cfi_remember_state
	.cfi_def_cfa_offset 152
	movq	%rax, %rcx
	pushq	$51
	.cfi_def_cfa_offset 160
	jmp	.L28
.L10:
	.cfi_restore_state
	leaq	32(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	testl	%eax, %eax
	je	.L11
	movl	%eax, %edi
	movl	%eax, (%rsp)
	call	cudaGetErrorName@PLT
	pushq	%r13
	.cfi_def_cfa_offset 152
	pushq	$52
	.cfi_def_cfa_offset 160
	movq	%rax, %rcx
.L28:
	movq	stderr(%rip), %rdi
	movl	16(%rsp), %r8d
	xorl	%eax, %eax
	leaq	.LC1(%rip), %r9
	leaq	.LC2(%rip), %rdx
	movl	$2, %esi
	call	__fprintf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L11:
	.cfi_def_cfa_offset 144
	leaq	40(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	testl	%eax, %eax
	je	.L12
	movl	%eax, %edi
	movl	%eax, (%rsp)
	call	cudaGetErrorName@PLT
	pushq	%r12
	.cfi_remember_state
	.cfi_def_cfa_offset 152
	movq	%rax, %rcx
	pushq	$53
	.cfi_def_cfa_offset 160
	jmp	.L28
.L12:
	.cfi_restore_state
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rdx
	movq	%r12, %rsi
	call	cudaMemcpy@PLT
	testl	%eax, %eax
	je	.L13
	movl	%eax, %edi
	movl	%eax, (%rsp)
	call	cudaGetErrorName@PLT
	pushq	%rbp
	.cfi_remember_state
	.cfi_def_cfa_offset 152
	movq	%rax, %rcx
	pushq	$54
	.cfi_def_cfa_offset 160
	jmp	.L28
.L13:
	.cfi_restore_state
	movq	(%rsp), %rsi
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rdx
	call	cudaMemcpy@PLT
	testl	%eax, %eax
	je	.L14
	movl	%eax, %edi
	movl	%eax, (%rsp)
	call	cudaGetErrorName@PLT
	pushq	%rbx
	.cfi_remember_state
	.cfi_def_cfa_offset 152
	movq	%rax, %rcx
	pushq	$55
	.cfi_def_cfa_offset 160
	jmp	.L28
.L14:
	.cfi_restore_state
	movq	8(%rsp), %rsi
	movq	40(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rdx
	call	cudaMemcpy@PLT
	testl	%eax, %eax
	je	.L15
	movl	%eax, %edi
	movl	%eax, (%rsp)
	call	cudaGetErrorName@PLT
	movq	%rax, %rcx
	pushq	%r11
	.cfi_remember_state
	.cfi_def_cfa_offset 152
	pushq	$56
	.cfi_def_cfa_offset 160
	jmp	.L28
.L15:
	.cfi_restore_state
	sarl	$9, %r14d
	movl	$8388609, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	%r14d, 48(%rsp)
	salq	$9, %rdx
	movl	$1, %ecx
	movabsq	$4294967297, %rax
	movq	%rax, 52(%rsp)
	movq	48(%rsp), %rdi
	movl	56(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	movq	40(%rsp), %rcx
	movq	32(%rsp), %rdx
	movl	%ebp, %edi
	movq	24(%rsp), %rsi
	call	_Z29__device_stub__Z5kmainiPiS_S_iPiS_S_
.L16:
	call	cudaDeviceSynchronize@PLT
	testl	%eax, %eax
	je	.L17
	movl	%eax, %edi
	movl	%eax, (%rsp)
	call	cudaGetErrorName@PLT
	movq	%rax, %rcx
	pushq	%r10
	.cfi_remember_state
	.cfi_def_cfa_offset 152
	pushq	$59
	.cfi_def_cfa_offset 160
	jmp	.L28
.L17:
	.cfi_restore_state
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdx
	movq	%r12, %rdi
	call	cudaMemcpy@PLT
	testl	%eax, %eax
	je	.L18
	movl	%eax, %edi
	movl	%eax, (%rsp)
	call	cudaGetErrorName@PLT
	movq	%rax, %rcx
	pushq	%r9
	.cfi_remember_state
	.cfi_def_cfa_offset 152
	pushq	$60
	.cfi_def_cfa_offset 160
	jmp	.L28
.L18:
	.cfi_restore_state
	movq	32(%rsp), %rsi
	movq	(%rsp), %rdi
	movl	$2, %ecx
	movq	%rbx, %rdx
	call	cudaMemcpy@PLT
	testl	%eax, %eax
	je	.L19
	movl	%eax, %edi
	movl	%eax, (%rsp)
	call	cudaGetErrorName@PLT
	movq	%rax, %rcx
	pushq	%r8
	.cfi_remember_state
	.cfi_def_cfa_offset 152
	pushq	$61
	.cfi_def_cfa_offset 160
	jmp	.L28
.L19:
	.cfi_restore_state
	movq	40(%rsp), %rsi
	movq	8(%rsp), %rdi
	movl	$2, %ecx
	movq	%rbx, %rdx
	call	cudaMemcpy@PLT
	testl	%eax, %eax
	je	.L20
	movl	%eax, %edi
	movl	%eax, (%rsp)
	call	cudaGetErrorName@PLT
	movq	%rax, %rcx
	pushq	%rdi
	.cfi_remember_state
	.cfi_def_cfa_offset 152
	pushq	$62
	.cfi_def_cfa_offset 160
	jmp	.L28
.L20:
	.cfi_restore_state
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	testl	%eax, %eax
	je	.L21
	movl	%eax, %edi
	movl	%eax, (%rsp)
	call	cudaGetErrorName@PLT
	movq	%rax, %rcx
	pushq	%rsi
	.cfi_remember_state
	.cfi_def_cfa_offset 152
	pushq	$64
	.cfi_def_cfa_offset 160
	jmp	.L28
.L21:
	.cfi_restore_state
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	testl	%eax, %eax
	je	.L22
	movl	%eax, %edi
	movl	%eax, (%rsp)
	call	cudaGetErrorName@PLT
	movq	%rax, %rcx
	pushq	%rdx
	.cfi_remember_state
	.cfi_def_cfa_offset 152
	pushq	$65
	.cfi_def_cfa_offset 160
	jmp	.L28
.L22:
	.cfi_restore_state
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	testl	%eax, %eax
	je	.L23
	movl	%eax, %edi
	movl	%eax, (%rsp)
	call	cudaGetErrorName@PLT
	movq	%rax, %rcx
	pushq	%rax
	.cfi_remember_state
	.cfi_def_cfa_offset 152
	pushq	$66
	.cfi_def_cfa_offset 160
	jmp	.L28
.L23:
	.cfi_restore_state
	call	clock@PLT
	movl	$1000, %ecx
	movl	$2, %edi
	leaq	.LC3(%rip), %rsi
	subq	%r15, %rax
	cqto
	idivq	%rcx
	movq	0(%r13), %rdx
	movl	%eax, %ecx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	(%rsp), %rdi
	call	free@PLT
	movq	8(%rsp), %rdi
	call	free@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L24
	call	__stack_chk_fail@PLT
.L24:
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC4:
	.string	"_Z5kmainiPiS_S_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC4(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z5kmainiPiS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include <time.h>
#include <hip/hip_runtime.h>

#define CHKCUDA(val)  ({                                         \
            hipError_t v = (val);                               \
  if (v != hipSuccess) {                                        \
      const char *ename;                                         \
      ename = hipGetErrorName(v);                               \
      fprintf(stderr, "CUDA error %s(%d) at %s:%d\n",            \
              ename, v, __FILE__, __LINE__);                     \
      exit(EXIT_FAILURE);                                        \
  }                                                              \
  v;})

__global__ void kmain(int N, int *A, int *B, int *C) {
    int idx;
    int row, col;
    int s, i;

    idx = blockIdx.x * blockDim.x + threadIdx.x;
    if (idx >= N * N) {
        return;
    }
    row = idx / N;
    col = idx % N;

    for( s = 0, i = 0; i < N;i++) {
        s += A[row * N + i] * B[ i * N + col];
    }
    C[row * N + col] = s;
}


int main(int argc, char **argv) {
  int N;
  int *A, *B, *C;
  int blocks;
  int *dA, *dB, *dC;
  int asize;
  clock_t ts;
  
  N = (argc > 1) ? atoi(argv[1]) : 512;
  asize = N * N * sizeof (int);
  A = (int *)malloc(asize);
  B = (int *)malloc(asize);
  C = (int *)malloc(asize);

  printf("=== begin %s where N  is %d === \n", argv[0], N);
  ts = clock();
  CHKCUDA(hipMalloc(&dA, asize));
  CHKCUDA(hipMalloc(&dB, asize));
  CHKCUDA(hipMalloc(&dC, asize));
  CHKCUDA(hipMemcpy(dA, A, asize, hipMemcpyHostToDevice));
  CHKCUDA(hipMemcpy(dB, B, asize, hipMemcpyHostToDevice));
  CHKCUDA(hipMemcpy(dC, C, asize, hipMemcpyHostToDevice));
  blocks = N * N / 512;
  kmain<<<blocks, 512>>>(N, dA, dB, dC);
  CHKCUDA(hipDeviceSynchronize());
  CHKCUDA(hipMemcpy(A, dA, asize, hipMemcpyDeviceToHost));
  CHKCUDA(hipMemcpy(B, dB, asize, hipMemcpyDeviceToHost));
  CHKCUDA(hipMemcpy(C, dC, asize, hipMemcpyDeviceToHost));  

  CHKCUDA(hipFree(dA));
  CHKCUDA(hipFree(dB));
  CHKCUDA(hipFree(dC));
  printf("=== finished %s in %d ms ===\n",
         argv[0],
         (int)((clock() - ts) / (CLOCKS_PER_SEC/1000)));
  free(A);
  free(B);
  free(C);

  return 0;
}

	.text
	.file	"DMMCUDA.hip"
	.globl	_Z20__device_stub__kmainiPiS_S_ # -- Begin function _Z20__device_stub__kmainiPiS_S_
	.type	_Z20__device_stub__kmainiPiS_S_,@function
_Z20__device_stub__kmainiPiS_S_:        # @_Z20__device_stub__kmainiPiS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	leaq	40(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	32(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	24(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z5kmainiPiS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z20__device_stub__kmainiPiS_S_, .Lfunc_end0-_Z20__device_stub__kmainiPiS_S_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %rbx
	movl	$512, %r13d                     # imm = 0x200
	cmpl	$2, %edi
	jl	.LBB1_2
# %bb.1:
	movq	8(%rbx), %rdi
	callq	atoi
	movl	%eax, %r13d
.LBB1_2:
	movl	%r13d, %r12d
	imull	%r12d, %r12d
	leal	(,%r12,4), %eax
	movslq	%eax, %rbp
	movq	%rbp, %rdi
	callq	malloc
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	movq	%rbp, %rdi
	callq	malloc
	movq	%rax, %r14
	movq	%rbp, %rdi
	callq	malloc
	movq	%rax, %r15
	movq	%rbx, 48(%rsp)                  # 8-byte Spill
	movq	(%rbx), %rsi
	movl	$.L.str, %edi
	movl	%r13d, %edx
	xorl	%eax, %eax
	callq	printf
	callq	clock
	movq	%rax, 40(%rsp)                  # 8-byte Spill
	leaq	24(%rsp), %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_3
# %bb.5:
	leaq	16(%rsp), %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_6
# %bb.7:
	leaq	8(%rsp), %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_8
# %bb.9:
	movq	24(%rsp), %rdi
	movq	32(%rsp), %rsi                  # 8-byte Reload
	movq	%rbp, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_10
# %bb.11:
	movq	16(%rsp), %rdi
	movq	%r14, %rsi
	movq	%rbp, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_12
# %bb.13:
	movq	8(%rsp), %rdi
	movq	%r15, %rsi
	movq	%rbp, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_14
# %bb.15:
	shrl	$9, %r12d
	btsq	$32, %r12
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$512, %rdx                      # imm = 0x200
	movq	%r12, %rdi
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_17
# %bb.16:
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdx
	movq	8(%rsp), %rcx
	movl	%r13d, %edi
	callq	_Z20__device_stub__kmainiPiS_S_
.LBB1_17:
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB1_18
# %bb.19:
	movq	24(%rsp), %rsi
	movq	32(%rsp), %rdi                  # 8-byte Reload
	movq	%rbp, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_20
# %bb.21:
	movq	16(%rsp), %rsi
	movq	%r14, %rdi
	movq	%rbp, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_22
# %bb.23:
	movq	8(%rsp), %rsi
	movq	%r15, %rdi
	movq	%rbp, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_24
# %bb.25:
	movq	24(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB1_26
# %bb.27:
	movq	16(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB1_28
# %bb.29:
	movq	8(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB1_30
# %bb.31:
	movq	48(%rsp), %rax                  # 8-byte Reload
	movq	(%rax), %rbx
	callq	clock
	subq	40(%rsp), %rax                  # 8-byte Folded Reload
	movabsq	$2361183241434822607, %rcx      # imm = 0x20C49BA5E353F7CF
	imulq	%rcx
	movq	%rdx, %rax
	shrq	$63, %rax
	shrq	$7, %rdx
	addl	%eax, %edx
	movl	$.L.str.3, %edi
	movq	%rbx, %rsi
                                        # kill: def $edx killed $edx killed $rdx
	xorl	%eax, %eax
	callq	printf
	movq	32(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	xorl	%eax, %eax
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB1_3:
	.cfi_def_cfa_offset 112
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	hipGetErrorName
	movq	stderr(%rip), %rdi
	movl	$.L.str.1, %esi
	movl	$.L.str.2, %r8d
	movq	%rax, %rdx
	movl	%ebx, %ecx
	movl	$51, %r9d
	jmp	.LBB1_4
.LBB1_6:
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	hipGetErrorName
	movq	stderr(%rip), %rdi
	movl	$.L.str.1, %esi
	movl	$.L.str.2, %r8d
	movq	%rax, %rdx
	movl	%ebx, %ecx
	movl	$52, %r9d
	jmp	.LBB1_4
.LBB1_8:
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	hipGetErrorName
	movq	stderr(%rip), %rdi
	movl	$.L.str.1, %esi
	movl	$.L.str.2, %r8d
	movq	%rax, %rdx
	movl	%ebx, %ecx
	movl	$53, %r9d
	jmp	.LBB1_4
.LBB1_10:
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	hipGetErrorName
	movq	stderr(%rip), %rdi
	movl	$.L.str.1, %esi
	movl	$.L.str.2, %r8d
	movq	%rax, %rdx
	movl	%ebx, %ecx
	movl	$54, %r9d
	jmp	.LBB1_4
.LBB1_12:
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	hipGetErrorName
	movq	stderr(%rip), %rdi
	movl	$.L.str.1, %esi
	movl	$.L.str.2, %r8d
	movq	%rax, %rdx
	movl	%ebx, %ecx
	movl	$55, %r9d
	jmp	.LBB1_4
.LBB1_14:
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	hipGetErrorName
	movq	stderr(%rip), %rdi
	movl	$.L.str.1, %esi
	movl	$.L.str.2, %r8d
	movq	%rax, %rdx
	movl	%ebx, %ecx
	movl	$56, %r9d
	jmp	.LBB1_4
.LBB1_18:
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	hipGetErrorName
	movq	stderr(%rip), %rdi
	movl	$.L.str.1, %esi
	movl	$.L.str.2, %r8d
	movq	%rax, %rdx
	movl	%ebx, %ecx
	movl	$59, %r9d
	jmp	.LBB1_4
.LBB1_20:
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	hipGetErrorName
	movq	stderr(%rip), %rdi
	movl	$.L.str.1, %esi
	movl	$.L.str.2, %r8d
	movq	%rax, %rdx
	movl	%ebx, %ecx
	movl	$60, %r9d
	jmp	.LBB1_4
.LBB1_22:
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	hipGetErrorName
	movq	stderr(%rip), %rdi
	movl	$.L.str.1, %esi
	movl	$.L.str.2, %r8d
	movq	%rax, %rdx
	movl	%ebx, %ecx
	movl	$61, %r9d
	jmp	.LBB1_4
.LBB1_24:
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	hipGetErrorName
	movq	stderr(%rip), %rdi
	movl	$.L.str.1, %esi
	movl	$.L.str.2, %r8d
	movq	%rax, %rdx
	movl	%ebx, %ecx
	movl	$62, %r9d
	jmp	.LBB1_4
.LBB1_26:
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	hipGetErrorName
	movq	stderr(%rip), %rdi
	movl	$.L.str.1, %esi
	movl	$.L.str.2, %r8d
	movq	%rax, %rdx
	movl	%ebx, %ecx
	movl	$64, %r9d
	jmp	.LBB1_4
.LBB1_28:
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	hipGetErrorName
	movq	stderr(%rip), %rdi
	movl	$.L.str.1, %esi
	movl	$.L.str.2, %r8d
	movq	%rax, %rdx
	movl	%ebx, %ecx
	movl	$65, %r9d
	jmp	.LBB1_4
.LBB1_30:
	movl	%eax, %ebx
	movl	%eax, %edi
	callq	hipGetErrorName
	movq	stderr(%rip), %rdi
	movl	$.L.str.1, %esi
	movl	$.L.str.2, %r8d
	movq	%rax, %rdx
	movl	%ebx, %ecx
	movl	$66, %r9d
.LBB1_4:
	xorl	%eax, %eax
	callq	fprintf
	movl	$1, %edi
	callq	exit
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z5kmainiPiS_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z5kmainiPiS_S_,@object         # @_Z5kmainiPiS_S_
	.section	.rodata,"a",@progbits
	.globl	_Z5kmainiPiS_S_
	.p2align	3, 0x0
_Z5kmainiPiS_S_:
	.quad	_Z20__device_stub__kmainiPiS_S_
	.size	_Z5kmainiPiS_S_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"=== begin %s where N  is %d === \n"
	.size	.L.str, 34

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"CUDA error %s(%d) at %s:%d\n"
	.size	.L.str.1, 28

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/DICL/dumbo/master/grvm/examples/DMMCUDA.hip"
	.size	.L.str.2, 106

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"=== finished %s in %d ms ===\n"
	.size	.L.str.3, 30

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z5kmainiPiS_S_"
	.size	.L__unnamed_1, 16

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z20__device_stub__kmainiPiS_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z5kmainiPiS_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z5kmainiPiS_S_         ; -- Begin function _Z5kmainiPiS_S_
	.globl	_Z5kmainiPiS_S_
	.p2align	8
	.type	_Z5kmainiPiS_S_,@function
_Z5kmainiPiS_S_:                        ; @_Z5kmainiPiS_S_
; %bb.0:
	s_clause 0x1
	s_load_b32 s3, s[0:1], 0x2c
	s_load_b32 s2, s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s3, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mad_u64_u32 v[1:2], null, s15, s3, v[0:1]
	s_mul_i32 s3, s2, s2
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_cmp_gt_i32_e32 vcc_lo, s3, v1
	s_and_saveexec_b32 s3, vcc_lo
	s_cbranch_execz .LBB0_6
; %bb.1:
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x8
	s_load_b64 s[0:1], s[0:1], 0x18
	v_ashrrev_i32_e32 v2, 31, v1
	s_cmp_lt_i32 s2, 1
	s_cbranch_scc1 .LBB0_4
; %bb.2:                                ; %.lr.ph.preheader
	s_ashr_i32 s3, s2, 31
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v4, v1, v2
	s_add_i32 s8, s2, s3
	s_xor_b32 s3, s8, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_xor_b32_e32 v4, v4, v2
	v_cvt_f32_u32_e32 v0, s3
	s_sub_i32 s8, 0, s3
	v_rcp_iflag_f32_e32 v0, v0
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v0, 0x4f7ffffe, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_u32_f32_e32 v0, v0
	v_mul_lo_u32 v3, s8, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v3, v0, v3
	v_add_nc_u32_e32 v0, v0, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_hi_u32 v0, v4, v0
	v_mul_lo_u32 v0, v0, s3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v0, v4, v0
	v_subrev_nc_u32_e32 v3, s3, v0
	v_cmp_le_u32_e32 vcc_lo, s3, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v0, v0, v3, vcc_lo
	v_subrev_nc_u32_e32 v3, s3, v0
	v_cmp_le_u32_e32 vcc_lo, s3, v0
	s_mov_b32 s3, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cndmask_b32_e32 v0, v0, v3, vcc_lo
	v_xor_b32_e32 v0, v0, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v3, v0, v2
	v_mov_b32_e32 v0, 0
	v_sub_nc_u32_e32 v5, v1, v3
.LBB0_3:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v6, s3, v5
	v_ashrrev_i32_e32 v4, 31, v3
	s_add_i32 s3, s3, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	s_cmp_lg_u32 s2, s3
	v_ashrrev_i32_e32 v7, 31, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[8:9], 2, v[3:4]
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v8, vcc_lo, s6, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, s7, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v6, vcc_lo, s4, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v7, vcc_lo
	global_load_b32 v4, v[8:9], off
	global_load_b32 v8, v[6:7], off
	s_waitcnt vmcnt(0)
	v_mad_u64_u32 v[6:7], null, v4, v8, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_dual_mov_b32 v0, v6 :: v_dual_add_nc_u32 v3, s2, v3
	s_cbranch_scc1 .LBB0_3
	s_branch .LBB0_5
.LBB0_4:
	v_mov_b32_e32 v0, 0
.LBB0_5:                                ; %._crit_edge
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v1, vcc_lo, s0, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	global_store_b32 v[1:2], v0, off
.LBB0_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z5kmainiPiS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z5kmainiPiS_S_, .Lfunc_end0-_Z5kmainiPiS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 452
; NumSgprs: 18
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .offset:         0
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z5kmainiPiS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z5kmainiPiS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
