#include <iostream>
#include <cmath>
#include <chrono>
#include <random>
#include <limits>
#include <cuda.h>
typedef std::chrono::high_resolution_clock Clock;

#define NUM_TEST 10000000
#define NUM_BLOCKS 1
#define K 100

using namespace std;
  

// Helper function for modular exponentiation.
// Returns a^e (mode n)
__device__ unsigned long long modexp(unsigned long long a, unsigned long long e, unsigned long long n) {
    unsigned long long res = 1;
 
    a = a % n;  // Compute a mod n first (if a > n)
 
    while (e > 0) 
    {
        // exponent is odd
        if (e & 1) 
            res = (res * a) % n;
 
        // exponent is even
        e = e >> 1; // Shift right one (divide by 2)
        a = (a * a) % n;  // Set a = a^2 mod n
    }
    return res;
}
  
// Called each iteration of witness loop.
// Returns false if composite or true if probably prime
__global__ void witnessTest(float *d_random_nums, volatile bool *shared_result, unsigned long long d, unsigned long long n) {
    if (!(*shared_result)) return;
    // Pick a random number in [2..n-2]
    unsigned long long a = 2 + d_random_nums[threadIdx.x] * (n-4);
    unsigned long long x = modexp(a, d, n); 

    if (x == 1  || x == n-1) {
        return;
    }
  
    // Iterate r times (2^r * d = n - 1)
    while (d != n-1) { 
        x = (x * x) % n; 
        d *= 2; 
  
        if (x == 1) {
            *shared_result = false;
            return;
        } 
        if (x == n-1) {
            return;
        } 
    } 
  
    // Return composite 
    *shared_result = false;
}
  
// See: https://en.wikipedia.org/wiki/Miller%E2%80%93Rabin_primality_test
// Returns true if k-probably prime (k is a parameter that determines accuracy)
// Returns false if composite
bool millerRabinPrimalityTest(unsigned long long n, unsigned long long k, float *random_nums) {
    if (n == 4) return false; 
    if (n <= 3) return true; 
  
    // Find r such that n = 2^d * r + 1 for some r >= 1 
    unsigned long long d = n - 1; 
    while (d % 2 == 0) {
        d /= 2; 
    }

    volatile bool *d_result;
    float *d_random_nums;
    bool result = true;

    cudaMalloc((void **) &d_result, sizeof(bool));
    cudaMalloc((void **) &d_random_nums, K * sizeof(float));

    cudaMemcpy((void *) d_result, &result, sizeof(bool), cudaMemcpyHostToDevice);
    cudaMemcpy((void *) d_random_nums, random_nums, K * sizeof(float), cudaMemcpyHostToDevice);

    // Witness loop to repeat k times
    // As long as K <= 256, run on 1 block
    witnessTest<<<NUM_BLOCKS, K>>>(d_random_nums, d_result, d, n);

    cudaMemcpy(&result, (void *) d_result, sizeof(bool), cudaMemcpyDeviceToHost);
    
    cudaFree((void *) d_result);
    cudaFree(d_random_nums);

    return result;
}

// void random_test() {
//     random_device rd;
//     mt19937_64 eng(rd());
//     uniform_int_distribution<unsigned long long> distr;

//     cout << "Starting Miller-Rabin CUDA test for " << NUM_TEST << " numbers with parameter k = " << K << ". Tests primality with accuracy " << (1 - (1/pow(4, K))) << "." << endl;

//     auto begin = Clock::now();
//     for (int i = 0; i < NUM_TEST; i++) {
//         millerRabinPrimalityTest(distr(eng), K, );
//     }
//     auto end = Clock::now();

//     auto totalDuration = chrono::duration_cast<chrono::nanoseconds>(end - begin).count();
//     auto avgDuration = ((double) totalDuration) / NUM_TEST;

//     cout << "Total Time: " << totalDuration << " nanoseconds" << endl;
//     cout << "Average Time per iteration: " << avgDuration << " nanoseconds" << endl;
// }

void single_test() {
    random_device rd;
    mt19937_64 eng(rd());
    uniform_int_distribution<unsigned long> distr;

    float *random_nums = new float[K];
    for (int i=0; i<K; i++) {
        random_nums[i] = (float) distr(eng) / (ULONG_MAX);
    }
    int numTest = 10000000;

    cout << "Starting Miller-Rabin CUDA test for " << numTest << " numbers with parameter k = " << K << ". Tests primality with accuracy " << (1 - (1/pow(4, K))) << "." << endl;

    auto begin = Clock::now();
    for (int i = 0; i < numTest; i++) {
        millerRabinPrimalityTest(distr(eng), K, random_nums);
    }
    auto end = Clock::now();

    auto totalDuration = chrono::duration_cast<chrono::nanoseconds>(end - begin).count();
    auto avgDuration = ((double) totalDuration) / numTest;

    cout << "Total Time: " << totalDuration << " nanoseconds" << endl;
    cout << "Average Time per iteration: " << avgDuration << " nanoseconds" << endl;
}

int main(int argc, char const *argv[]) {
    single_test();
    return 0;
}

	.file	"tmpxft_002dcd1c_00000000-6_miller-rabin-old.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4827:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4827:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z6modexpyyy
	.type	_Z6modexpyyy, @function
_Z6modexpyyy:
.LFB4818:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE4818:
	.size	_Z6modexpyyy, .-_Z6modexpyyy
	.globl	_Z36__device_stub__Z11witnessTestPfPVbyyPfPVbyy
	.type	_Z36__device_stub__Z11witnessTestPfPVbyyPfPVbyy, @function
_Z36__device_stub__Z11witnessTestPfPVbyyPfPVbyy:
.LFB4849:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L4
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z11witnessTestPfPVbyy(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L4:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L6
	call	__stack_chk_fail@PLT
.L6:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4849:
	.size	_Z36__device_stub__Z11witnessTestPfPVbyyPfPVbyy, .-_Z36__device_stub__Z11witnessTestPfPVbyyPfPVbyy
	.globl	_Z11witnessTestPfPVbyy
	.type	_Z11witnessTestPfPVbyy, @function
_Z11witnessTestPfPVbyy:
.LFB4850:
	.cfi_startproc
	endbr64
	jmp	_Z36__device_stub__Z11witnessTestPfPVbyyPfPVbyy
	.cfi_endproc
.LFE4850:
	.size	_Z11witnessTestPfPVbyy, .-_Z11witnessTestPfPVbyy
	.globl	_Z24millerRabinPrimalityTestyyPf
	.type	_Z24millerRabinPrimalityTestyyPf, @function
_Z24millerRabinPrimalityTestyyPf:
.LFB4819:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$72, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	cmpq	$4, %rdi
	je	.L10
	movq	%rdi, %rbx
	movb	$1, %al
	cmpq	$3, %rdi
	jbe	.L10
	movq	%rdx, %r12
	leaq	-1(%rdi), %rbp
.L12:
	testl	$1, %ebp
	jne	.L19
	shrq	%rbp
	jmp	.L12
.L19:
	leaq	16(%rsp), %rdi
	movl	$1, %esi
	movb	$1, 15(%rsp)
	leaq	15(%rsp), %r13
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$400, %esi
	call	cudaMalloc@PLT
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%r13, %rsi
	movl	$1, %edx
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$400, %edx
	call	cudaMemcpy@PLT
	movl	$1073741849, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$2, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L14
	movq	16(%rsp), %rsi
	movq	24(%rsp), %rdi
	movq	%rbx, %rcx
	movq	%rbp, %rdx
	call	_Z36__device_stub__Z11witnessTestPfPVbyyPfPVbyy
.L14:
	movq	16(%rsp), %rsi
	movl	$2, %ecx
	movl	$1, %edx
	movq	%r13, %rdi
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movb	15(%rsp), %al
.L10:
	movq	56(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L15
	call	__stack_chk_fail@PLT
.L15:
	addq	$72, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4819:
	.size	_Z24millerRabinPrimalityTestyyPf, .-_Z24millerRabinPrimalityTestyyPf
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z11witnessTestPfPVbyy"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4852:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z11witnessTestPfPVbyy(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4852:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.text._ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EE11_M_gen_randEv,"axG",@progbits,_ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EE11_M_gen_randEv,comdat
	.align 2
	.weak	_ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EE11_M_gen_randEv
	.type	_ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EE11_M_gen_randEv, @function
_ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EE11_M_gen_randEv:
.LFB5555:
	.cfi_startproc
	endbr64
	movq	%rdi, %rax
	xorl	%edx, %edx
	movabsq	$-5403634167711393303, %rdi
.L24:
	movq	(%rax,%rdx,8), %rsi
	incq	%rdx
	movq	(%rax,%rdx,8), %rcx
	andq	$-2147483648, %rsi
	andl	$2147483647, %ecx
	orq	%rsi, %rcx
	movq	%rcx, %rsi
	shrq	%rsi
	xorq	1240(%rax,%rdx,8), %rsi
	andl	$1, %ecx
	je	.L23
	movq	%rdi, %rcx
.L23:
	xorq	%rsi, %rcx
	movq	%rcx, -8(%rax,%rdx,8)
	cmpq	$156, %rdx
	jne	.L24
	movabsq	$-5403634167711393303, %rdi
.L26:
	movq	(%rax,%rdx,8), %rsi
	incq	%rdx
	movq	(%rax,%rdx,8), %rcx
	andq	$-2147483648, %rsi
	andl	$2147483647, %ecx
	orq	%rsi, %rcx
	movq	%rcx, %rsi
	shrq	%rsi
	xorq	-1256(%rax,%rdx,8), %rsi
	andl	$1, %ecx
	je	.L25
	movq	%rdi, %rcx
.L25:
	xorq	%rsi, %rcx
	movq	%rcx, -8(%rax,%rdx,8)
	cmpq	$311, %rdx
	jne	.L26
	movq	2488(%rax), %rdx
	movq	(%rax), %rcx
	andq	$-2147483648, %rdx
	andl	$2147483647, %ecx
	orq	%rcx, %rdx
	movq	%rdx, %rcx
	shrq	%rcx
	xorq	1240(%rax), %rcx
	andl	$1, %edx
	je	.L27
	movabsq	$-5403634167711393303, %rdx
.L27:
	xorq	%rcx, %rdx
	movq	%rdx, 2488(%rax)
	xorl	%edx, %edx
	movq	%rdx, 2496(%rax)
	ret
	.cfi_endproc
.LFE5555:
	.size	_ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EE11_M_gen_randEv, .-_ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EE11_M_gen_randEv
	.section	.text._ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEclEv,"axG",@progbits,_ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEclEv,comdat
	.align 2
	.weak	_ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEclEv
	.type	_ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEclEv, @function
_ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEclEv:
.LFB5487:
	.cfi_startproc
	endbr64
	cmpq	$311, 2496(%rdi)
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	jbe	.L40
	call	_ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EE11_M_gen_randEv
.L40:
	movq	2496(%rbx), %rax
	movaps	.LC1(%rip), %xmm2
	movq	(%rbx,%rax,8), %xmm1
	leaq	1(%rax), %rdx
	movq	%rdx, 2496(%rbx)
	popq	%rbx
	.cfi_def_cfa_offset 8
	movaps	%xmm1, %xmm3
	psrlq	$29, %xmm3
	movaps	%xmm3, %xmm0
	andps	%xmm2, %xmm0
	movaps	.LC2(%rip), %xmm2
	xorps	%xmm1, %xmm0
	movaps	%xmm0, %xmm4
	psllq	$17, %xmm4
	movaps	%xmm4, %xmm1
	andps	%xmm2, %xmm1
	movaps	.LC3(%rip), %xmm2
	xorps	%xmm0, %xmm1
	movaps	%xmm1, %xmm5
	psllq	$37, %xmm5
	movaps	%xmm5, %xmm0
	andps	%xmm2, %xmm0
	xorps	%xmm1, %xmm0
	movaps	%xmm0, %xmm6
	psrlq	$43, %xmm6
	xorps	%xmm6, %xmm0
	movq	%xmm0, %rax
	ret
	.cfi_endproc
.LFE5487:
	.size	_ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEclEv, .-_ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEclEv
	.section	.text._ZNSt24uniform_int_distributionImE5_S_ndIoSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEmEET1_RT0_S4_,"axG",@progbits,_ZNSt24uniform_int_distributionImE5_S_ndIoSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEmEET1_RT0_S4_,comdat
	.weak	_ZNSt24uniform_int_distributionImE5_S_ndIoSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEmEET1_RT0_S4_
	.type	_ZNSt24uniform_int_distributionImE5_S_ndIoSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEmEET1_RT0_S4_, @function
_ZNSt24uniform_int_distributionImE5_S_ndIoSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEmEET1_RT0_S4_:
.LFB5486:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movq	%rdi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rsi, %rbx
	call	_ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEclEv
	mulq	%rbx
	movq	%rdx, %r9
	cmpq	%rbx, %rax
	jnb	.L43
	movq	%rax, %rcx
	movq	%rbx, %rax
	xorl	%edx, %edx
	negq	%rax
	divq	%rbx
	movq	%rdx, %r12
.L44:
	cmpq	%r12, %rcx
	jnb	.L43
	movq	%rbp, %rdi
	call	_ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEclEv
	mulq	%rbx
	movq	%rdx, %r9
	movq	%rax, %rcx
	jmp	.L44
.L43:
	popq	%rbx
	.cfi_def_cfa_offset 24
	movq	%r9, %rax
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE5486:
	.size	_ZNSt24uniform_int_distributionImE5_S_ndIoSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEmEET1_RT0_S4_, .-_ZNSt24uniform_int_distributionImE5_S_ndIoSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEmEET1_RT0_S4_
	.section	.rodata.str1.1
.LC4:
	.string	"default"
.LC6:
	.string	"Starting Miller-Rabin CUDA test for "
.LC7:
	.string	" numbers with parameter k = "
.LC8:
	.string	". Tests primality with accuracy "
.LC10:
	.string	"."
.LC12:
	.string	"Total Time: "
.LC13:
	.string	" nanoseconds"
.LC14:
	.string	"Average Time per iteration: "
	.text
	.globl	_Z11single_testv
	.type	_Z11single_testv, @function
_Z11single_testv:
.LFB4820:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA4820
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$4096, %rsp
	.cfi_def_cfa_offset 4152
	orq	$0, (%rsp)
	subq	$3432, %rsp
	.cfi_def_cfa_offset 7584
	leaq	7+.LC4(%rip), %rdx
	leaq	-7(%rdx), %rsi
	movq	%fs:40, %rax
	movq	%rax, 7512(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rdi
	leaq	8(%rsp), %rbx
	movq	%rdi, 8(%rsp)
	leaq	2512(%rsp), %rbp
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE13_S_copy_charsEPcPKcS7_@PLT
	movq	8(%rsp), %rax
	movq	%rbx, %rsi
	movq	%rbp, %rdi
	movq	$7, 16(%rsp)
	movb	$0, 7(%rax)
.LEHB0:
	call	_ZNSt13random_device7_M_initERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE@PLT
.LEHE0:
	movq	%rbx, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	%rbp, %rdi
.LEHB1:
	call	_ZNSt13random_device9_M_getvalEv@PLT
	movl	%eax, %eax
	movl	$1, %edx
	movabsq	$6364136223846793005, %rcx
	movq	%rax, 8(%rsp)
	jmp	.L51
.L60:
	endbr64
	movq	%rax, %rbp
.L49:
	movq	%rbx, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	%rbp, %rdi
	movq	7512(%rsp), %rax
	subq	%fs:40, %rax
	je	.L67
	jmp	.L64
.L51:
	movq	-8(%rbx,%rdx,8), %rax
	movq	%rax, %rsi
	shrq	$62, %rsi
	xorq	%rsi, %rax
	imulq	%rcx, %rax
	addq	%rdx, %rax
	movq	%rax, (%rbx,%rdx,8)
	incq	%rdx
	cmpq	$312, %rdx
	jne	.L51
	movl	$400, %edi
	movq	$312, 2504(%rsp)
	call	_Znam@PLT
	movq	%rax, %r12
	xorl	%r13d, %r13d
.L54:
	movq	%rbx, %rdi
	call	_ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEclEv
	testq	%rax, %rax
	js	.L52
	cvtsi2ssq	%rax, %xmm0
	jmp	.L53
.L52:
	movq	%rax, %rdx
	andl	$1, %eax
	shrq	%rdx
	orq	%rax, %rdx
	cvtsi2ssq	%rdx, %xmm0
	addss	%xmm0, %xmm0
.L53:
	mulss	.LC5(%rip), %xmm0
	movss	%xmm0, (%r12,%r13,4)
	incq	%r13
	cmpq	$100, %r13
	jne	.L54
	leaq	_ZSt4cout(%rip), %r13
	leaq	.LC6(%rip), %rsi
	movq	%r13, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	movl	$10000000, %esi
	call	_ZNSolsEi@PLT
	movq	%rax, %rdi
	leaq	.LC7(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	movl	$100, %esi
	call	_ZNSolsEi@PLT
	movq	%rax, %rdi
	leaq	.LC8(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	.LC9(%rip), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rax, %rdi
	leaq	.LC10(%rip), %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	movl	$10000000, %r15d
	movq	%rax, %r14
.L55:
	movq	%rbx, %rdi
	call	_ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEclEv
	movq	%r12, %rdx
	movl	$100, %esi
	movq	%rax, %rdi
	call	_Z24millerRabinPrimalityTestyyPf
	decl	%r15d
	jne	.L55
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	leaq	.LC12(%rip), %rsi
	movq	%r13, %rdi
	subq	%r14, %rax
	cvtsi2sdq	%rax, %xmm0
	movq	%rax, %rbx
	divsd	.LC11(%rip), %xmm0
	movq	%xmm0, %r12
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	movq	%rbx, %rsi
	call	_ZNSo9_M_insertIlEERSoT_@PLT
	leaq	.LC13(%rip), %rbx
	movq	%rax, %rdi
	movq	%rbx, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
	leaq	.LC14(%rip), %rsi
	movq	%r13, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	movq	%r12, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%rax, %rdi
	movq	%rbx, %rsi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
.LEHE1:
	movq	%rbp, %rdi
	call	_ZNSt13random_device7_M_finiEv@PLT
	movq	7512(%rsp), %rax
	subq	%fs:40, %rax
	je	.L58
	jmp	.L64
.L59:
	endbr64
	movq	%rax, %rbx
.L56:
	movq	%rbp, %rdi
	call	_ZNSt13random_device7_M_finiEv@PLT
	movq	%rbx, %rdi
	movq	7512(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L64
.L67:
.LEHB2:
	call	_Unwind_Resume@PLT
.LEHE2:
.L64:
	call	__stack_chk_fail@PLT
.L58:
	addq	$7528, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4820:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table,"a",@progbits
.LLSDA4820:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE4820-.LLSDACSB4820
.LLSDACSB4820:
	.uleb128 .LEHB0-.LFB4820
	.uleb128 .LEHE0-.LEHB0
	.uleb128 .L60-.LFB4820
	.uleb128 0
	.uleb128 .LEHB1-.LFB4820
	.uleb128 .LEHE1-.LEHB1
	.uleb128 .L59-.LFB4820
	.uleb128 0
	.uleb128 .LEHB2-.LFB4820
	.uleb128 .LEHE2-.LEHB2
	.uleb128 0
	.uleb128 0
.LLSDACSE4820:
	.text
	.size	_Z11single_testv, .-_Z11single_testv
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB4824:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	_Z11single_testv
	xorl	%eax, %eax
	popq	%rdx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4824:
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst16,"aM",@progbits,16
	.align 16
.LC1:
	.quad	6148914691236517205
	.quad	0
	.align 16
.LC2:
	.quad	8202884508482404352
	.quad	0
	.align 16
.LC3:
	.quad	-2270628950310912
	.quad	0
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC5:
	.long	528482304
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC9:
	.long	0
	.long	1072693248
	.align 8
.LC11:
	.long	0
	.long	1097011920
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <iostream>
#include <cmath>
#include <chrono>
#include <random>
#include <limits>
#include <hip/hip_runtime.h>
typedef std::chrono::high_resolution_clock Clock;

#define NUM_TEST 10000000
#define NUM_BLOCKS 1
#define K 100

using namespace std;
  

// Helper function for modular exponentiation.
// Returns a^e (mode n)
__device__ unsigned long long modexp(unsigned long long a, unsigned long long e, unsigned long long n) {
    unsigned long long res = 1;
 
    a = a % n;  // Compute a mod n first (if a > n)
 
    while (e > 0) 
    {
        // exponent is odd
        if (e & 1) 
            res = (res * a) % n;
 
        // exponent is even
        e = e >> 1; // Shift right one (divide by 2)
        a = (a * a) % n;  // Set a = a^2 mod n
    }
    return res;
}
  
// Called each iteration of witness loop.
// Returns false if composite or true if probably prime
__global__ void witnessTest(float *d_random_nums, volatile bool *shared_result, unsigned long long d, unsigned long long n) {
    if (!(*shared_result)) return;
    // Pick a random number in [2..n-2]
    unsigned long long a = 2 + d_random_nums[threadIdx.x] * (n-4);
    unsigned long long x = modexp(a, d, n); 

    if (x == 1  || x == n-1) {
        return;
    }
  
    // Iterate r times (2^r * d = n - 1)
    while (d != n-1) { 
        x = (x * x) % n; 
        d *= 2; 
  
        if (x == 1) {
            *shared_result = false;
            return;
        } 
        if (x == n-1) {
            return;
        } 
    } 
  
    // Return composite 
    *shared_result = false;
}
  
// See: https://en.wikipedia.org/wiki/Miller%E2%80%93Rabin_primality_test
// Returns true if k-probably prime (k is a parameter that determines accuracy)
// Returns false if composite
bool millerRabinPrimalityTest(unsigned long long n, unsigned long long k, float *random_nums) {
    if (n == 4) return false; 
    if (n <= 3) return true; 
  
    // Find r such that n = 2^d * r + 1 for some r >= 1 
    unsigned long long d = n - 1; 
    while (d % 2 == 0) {
        d /= 2; 
    }

    volatile bool *d_result;
    float *d_random_nums;
    bool result = true;

    hipMalloc((void **) &d_result, sizeof(bool));
    hipMalloc((void **) &d_random_nums, K * sizeof(float));

    hipMemcpy((void *) d_result, &result, sizeof(bool), hipMemcpyHostToDevice);
    hipMemcpy((void *) d_random_nums, random_nums, K * sizeof(float), hipMemcpyHostToDevice);

    // Witness loop to repeat k times
    // As long as K <= 256, run on 1 block
    witnessTest<<<NUM_BLOCKS, K>>>(d_random_nums, d_result, d, n);

    hipMemcpy(&result, (void *) d_result, sizeof(bool), hipMemcpyDeviceToHost);
    
    hipFree((void *) d_result);
    hipFree(d_random_nums);

    return result;
}

// void random_test() {
//     random_device rd;
//     mt19937_64 eng(rd());
//     uniform_int_distribution<unsigned long long> distr;

//     cout << "Starting Miller-Rabin CUDA test for " << NUM_TEST << " numbers with parameter k = " << K << ". Tests primality with accuracy " << (1 - (1/pow(4, K))) << "." << endl;

//     auto begin = Clock::now();
//     for (int i = 0; i < NUM_TEST; i++) {
//         millerRabinPrimalityTest(distr(eng), K, );
//     }
//     auto end = Clock::now();

//     auto totalDuration = chrono::duration_cast<chrono::nanoseconds>(end - begin).count();
//     auto avgDuration = ((double) totalDuration) / NUM_TEST;

//     cout << "Total Time: " << totalDuration << " nanoseconds" << endl;
//     cout << "Average Time per iteration: " << avgDuration << " nanoseconds" << endl;
// }

void single_test() {
    random_device rd;
    mt19937_64 eng(rd());
    uniform_int_distribution<unsigned long> distr;

    float *random_nums = new float[K];
    for (int i=0; i<K; i++) {
        random_nums[i] = (float) distr(eng) / (ULONG_MAX);
    }
    int numTest = 10000000;

    cout << "Starting Miller-Rabin CUDA test for " << numTest << " numbers with parameter k = " << K << ". Tests primality with accuracy " << (1 - (1/pow(4, K))) << "." << endl;

    auto begin = Clock::now();
    for (int i = 0; i < numTest; i++) {
        millerRabinPrimalityTest(distr(eng), K, random_nums);
    }
    auto end = Clock::now();

    auto totalDuration = chrono::duration_cast<chrono::nanoseconds>(end - begin).count();
    auto avgDuration = ((double) totalDuration) / numTest;

    cout << "Total Time: " << totalDuration << " nanoseconds" << endl;
    cout << "Average Time per iteration: " << avgDuration << " nanoseconds" << endl;
}

int main(int argc, char const *argv[]) {
    single_test();
    return 0;
}

	.text
	.file	"miller-rabin-old.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z26__device_stub__witnessTestPfPVbyy # -- Begin function _Z26__device_stub__witnessTestPfPVbyy
	.type	_Z26__device_stub__witnessTestPfPVbyy,@function
_Z26__device_stub__witnessTestPfPVbyy:  # @_Z26__device_stub__witnessTestPfPVbyy
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	16(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11witnessTestPfPVbyy, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z26__device_stub__witnessTestPfPVbyy, .Lfunc_end0-_Z26__device_stub__witnessTestPfPVbyy
	.cfi_endproc
                                        # -- End function
	.globl	_Z24millerRabinPrimalityTestyyPf # -- Begin function _Z24millerRabinPrimalityTestyyPf
	.type	_Z24millerRabinPrimalityTestyyPf,@function
_Z24millerRabinPrimalityTestyyPf:       # @_Z24millerRabinPrimalityTestyyPf
	.cfi_startproc
# %bb.0:
	cmpq	$4, %rdi
	jne	.LBB1_2
# %bb.1:
	xorl	%eax, %eax
.LBB1_8:
                                        # kill: def $al killed $al killed $eax
	retq
.LBB1_2:
	movb	$1, %al
	jb	.LBB1_8
# %bb.3:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, %r15
	movq	%rdi, %rbx
	leaq	-1(%rdi), %rax
.LBB1_4:                                # =>This Inner Loop Header: Depth=1
	movq	%rax, %r14
	shrq	%rax
	testb	$1, %r14b
	je	.LBB1_4
# %bb.5:
	leaq	7(%rsp), %r12
	movb	$1, (%r12)
	leaq	8(%rsp), %r13
	movl	$1, %esi
	movq	%r13, %rdi
	callq	hipMalloc
	leaq	16(%rsp), %rbp
	movl	$400, %esi                      # imm = 0x190
	movq	%rbp, %rdi
	callq	hipMalloc
	movq	(%r13), %rdi
	movl	$1, %edx
	movq	%r12, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbp), %rdi
	movl	$400, %edx                      # imm = 0x190
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	leaq	99(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_7
# %bb.6:
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	movq	%r14, %rdx
	movq	%rbx, %rcx
	callq	_Z26__device_stub__witnessTestPfPVbyy
.LBB1_7:
	movq	8(%rsp), %rsi
	leaq	7(%rsp), %rbx
	movl	$1, %edx
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	cmpb	$0, (%rbx)
	setne	%al
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r12
	.cfi_restore %r13
	.cfi_restore %r14
	.cfi_restore %r15
	.cfi_restore %rbp
                                        # kill: def $al killed $al killed $eax
	retq
.Lfunc_end1:
	.size	_Z24millerRabinPrimalityTestyyPf, .Lfunc_end1-_Z24millerRabinPrimalityTestyyPf
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z11single_testv
.LCPI2_0:
	.long	0x1f800000                      # float 5.42101086E-20
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI2_1:
	.quad	0x3ff0000000000000              # double 1
.LCPI2_2:
	.quad	0x416312d000000000              # double 1.0E+7
	.text
	.globl	_Z11single_testv
	.type	_Z11single_testv,@function
_Z11single_testv:                       # @_Z11single_testv
.Lfunc_begin0:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception0
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$7520, %rsp                     # imm = 0x1D60
	.cfi_def_cfa_offset 7568
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	leaq	2520(%rsp), %rbx
	movq	%rbx, %rdi
	callq	_ZNSt13random_deviceC2Ev
.Ltmp0:
	movq	%rbx, %rdi
	callq	_ZNSt13random_device9_M_getvalEv
.Ltmp1:
# %bb.1:                                # %_ZNSt13random_deviceclEv.exit
	movl	%eax, %esi
	movq	%rsi, 16(%rsp)
	movl	$1, %eax
	movabsq	$6364136223846793005, %rcx      # imm = 0x5851F42D4C957F2D
	movq	%rsi, %rdx
.LBB2_2:                                # =>This Inner Loop Header: Depth=1
	shrq	$62, %rdx
	xorq	%rsi, %rdx
	imulq	%rcx, %rdx
	addq	%rax, %rdx
	movq	%rdx, 16(%rsp,%rax,8)
	incq	%rax
	movq	%rdx, %rsi
	cmpq	$312, %rax                      # imm = 0x138
	jne	.LBB2_2
# %bb.3:
	movq	$312, 2512(%rsp)                # imm = 0x138
	movq	$0, (%rsp)
	movq	$-1, 8(%rsp)
.Ltmp3:
	movl	$400, %edi                      # imm = 0x190
	callq	_Znam
.Ltmp4:
# %bb.4:                                # %.preheader.preheader
	movq	%rax, %rbx
	xorl	%r12d, %r12d
	leaq	16(%rsp), %r14
	movq	%rsp, %r15
.LBB2_5:                                # %.preheader
                                        # =>This Inner Loop Header: Depth=1
.Ltmp6:
	movq	%r15, %rdi
	movq	%r14, %rsi
	movq	%r15, %rdx
	callq	_ZNSt24uniform_int_distributionImEclISt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEEEmRT_RKNS0_10param_typeE
.Ltmp7:
# %bb.6:                                # %_ZNSt24uniform_int_distributionImEclISt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEEEmRT_.exit
                                        #   in Loop: Header=BB2_5 Depth=1
	testq	%rax, %rax
	js	.LBB2_8
# %bb.7:                                # %_ZNSt24uniform_int_distributionImEclISt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEEEmRT_.exit
                                        #   in Loop: Header=BB2_5 Depth=1
	xorps	%xmm0, %xmm0
	cvtsi2ss	%rax, %xmm0
	jmp	.LBB2_9
.LBB2_8:                                #   in Loop: Header=BB2_5 Depth=1
	movq	%rax, %rcx
	shrq	%rcx
	andl	$1, %eax
	orq	%rcx, %rax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%rax, %xmm0
	addss	%xmm0, %xmm0
.LBB2_9:                                # %_ZNSt24uniform_int_distributionImEclISt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEEEmRT_.exit
                                        #   in Loop: Header=BB2_5 Depth=1
	mulss	.LCPI2_0(%rip), %xmm0
	movss	%xmm0, (%rbx,%r12,4)
	incq	%r12
	cmpq	$100, %r12
	jne	.LBB2_5
# %bb.10:
.Ltmp9:
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$36, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp10:
# %bb.11:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
.Ltmp11:
	movl	$_ZSt4cout, %edi
	movl	$10000000, %esi                 # imm = 0x989680
	callq	_ZNSolsEi
.Ltmp12:
# %bb.12:
.Ltmp13:
	movq	%rax, %r14
	movl	$.L.str.1, %esi
	movl	$28, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp14:
# %bb.13:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit30
.Ltmp15:
	movq	%r14, %rdi
	movl	$100, %esi
	callq	_ZNSolsEi
.Ltmp16:
# %bb.14:
.Ltmp17:
	movq	%rax, %r14
	movl	$.L.str.2, %esi
	movl	$32, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp18:
# %bb.15:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit31
.Ltmp19:
	movsd	.LCPI2_1(%rip), %xmm0           # xmm0 = mem[0],zero
	movq	%r14, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
.Ltmp20:
# %bb.16:                               # %_ZNSolsEd.exit
.Ltmp21:
	movq	%rax, %r14
	movl	$.L.str.3, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp22:
# %bb.17:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit32
	movq	(%r14), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
.Ltmp23:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp24:
# %bb.18:                               # %.noexc
.Ltmp25:
	movsbl	%al, %esi
	movq	%r14, %rdi
	callq	_ZNSo3putEc
.Ltmp26:
# %bb.19:                               # %.noexc42
.Ltmp27:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp28:
# %bb.20:                               # %_ZNSolsEPFRSoS_E.exit
	movl	$10000000, %ebp                 # imm = 0x989680
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, %r14
	leaq	16(%rsp), %r15
	movq	%rsp, %r12
.LBB2_21:                               # =>This Inner Loop Header: Depth=1
.Ltmp30:
	movq	%r12, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	callq	_ZNSt24uniform_int_distributionImEclISt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEEEmRT_RKNS0_10param_typeE
.Ltmp31:
# %bb.22:                               # %_ZNSt24uniform_int_distributionImEclISt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEEEmRT_.exit33
                                        #   in Loop: Header=BB2_21 Depth=1
.Ltmp32:
	movq	%rax, %rdi
	movq	%rbx, %rdx
	callq	_Z24millerRabinPrimalityTestyyPf
.Ltmp33:
# %bb.23:                               #   in Loop: Header=BB2_21 Depth=1
	decl	%ebp
	jne	.LBB2_21
# %bb.24:
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, %rbx
.Ltmp35:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.4, %esi
	movl	$12, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp36:
# %bb.25:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit34
.Ltmp37:
	subq	%r14, %rbx
	movl	$_ZSt4cout, %edi
	movq	%rbx, %rsi
	callq	_ZNSo9_M_insertIlEERSoT_
.Ltmp38:
# %bb.26:                               # %_ZNSolsEl.exit
.Ltmp39:
	movq	%rax, %r14
	movl	$.L.str.5, %esi
	movl	$12, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp40:
# %bb.27:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit35
	movq	(%r14), %rax
	movq	-24(%rax), %rdi
	addq	%r14, %rdi
.Ltmp41:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp42:
# %bb.28:                               # %.noexc44
.Ltmp43:
	movsbl	%al, %esi
	movq	%r14, %rdi
	callq	_ZNSo3putEc
.Ltmp44:
# %bb.29:                               # %.noexc45
.Ltmp45:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp46:
# %bb.30:                               # %_ZNSolsEPFRSoS_E.exit36
.Ltmp47:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.6, %esi
	movl	$28, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp48:
# %bb.31:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit37
.Ltmp49:
	cvtsi2sd	%rbx, %xmm0
	divsd	.LCPI2_2(%rip), %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
.Ltmp50:
# %bb.32:                               # %_ZNSolsEd.exit38
.Ltmp51:
	movq	%rax, %rbx
	movl	$.L.str.5, %esi
	movl	$12, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
.Ltmp52:
# %bb.33:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit39
	movq	(%rbx), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
.Ltmp53:
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
.Ltmp54:
# %bb.34:                               # %.noexc48
.Ltmp55:
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
.Ltmp56:
# %bb.35:                               # %.noexc49
.Ltmp57:
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.Ltmp58:
# %bb.36:                               # %_ZNSolsEPFRSoS_E.exit40
.Ltmp63:
	leaq	2520(%rsp), %rdi
	callq	_ZNSt13random_device7_M_finiEv
.Ltmp64:
# %bb.37:                               # %_ZNSt13random_deviceD2Ev.exit
	addq	$7520, %rsp                     # imm = 0x1D60
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB2_38:
	.cfi_def_cfa_offset 7568
.Ltmp65:
	jmp	.LBB2_39
.LBB2_40:
.Ltmp5:
	jmp	.LBB2_46
.LBB2_41:
.Ltmp2:
	jmp	.LBB2_46
.LBB2_42:
.Ltmp29:
	jmp	.LBB2_46
.LBB2_43:
.Ltmp59:
	jmp	.LBB2_46
.LBB2_44:
.Ltmp8:
	jmp	.LBB2_46
.LBB2_45:
.Ltmp34:
.LBB2_46:
	movq	%rax, %rbx
.Ltmp60:
	leaq	2520(%rsp), %rdi
	callq	_ZNSt13random_device7_M_finiEv
.Ltmp61:
# %bb.47:                               # %_ZNSt13random_deviceD2Ev.exit41
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.LBB2_48:
.Ltmp62:
.LBB2_39:
	movq	%rax, %rdi
	callq	__clang_call_terminate
.Lfunc_end2:
	.size	_Z11single_testv, .Lfunc_end2-_Z11single_testv
	.cfi_endproc
	.section	.gcc_except_table,"a",@progbits
	.p2align	2, 0x0
GCC_except_table2:
.Lexception0:
	.byte	255                             # @LPStart Encoding = omit
	.byte	3                               # @TType Encoding = udata4
	.uleb128 .Lttbase0-.Lttbaseref0
.Lttbaseref0:
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end0-.Lcst_begin0
.Lcst_begin0:
	.uleb128 .Lfunc_begin0-.Lfunc_begin0    # >> Call Site 1 <<
	.uleb128 .Ltmp0-.Lfunc_begin0           #   Call between .Lfunc_begin0 and .Ltmp0
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp0-.Lfunc_begin0           # >> Call Site 2 <<
	.uleb128 .Ltmp1-.Ltmp0                  #   Call between .Ltmp0 and .Ltmp1
	.uleb128 .Ltmp2-.Lfunc_begin0           #     jumps to .Ltmp2
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp3-.Lfunc_begin0           # >> Call Site 3 <<
	.uleb128 .Ltmp4-.Ltmp3                  #   Call between .Ltmp3 and .Ltmp4
	.uleb128 .Ltmp5-.Lfunc_begin0           #     jumps to .Ltmp5
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp6-.Lfunc_begin0           # >> Call Site 4 <<
	.uleb128 .Ltmp7-.Ltmp6                  #   Call between .Ltmp6 and .Ltmp7
	.uleb128 .Ltmp8-.Lfunc_begin0           #     jumps to .Ltmp8
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp9-.Lfunc_begin0           # >> Call Site 5 <<
	.uleb128 .Ltmp28-.Ltmp9                 #   Call between .Ltmp9 and .Ltmp28
	.uleb128 .Ltmp29-.Lfunc_begin0          #     jumps to .Ltmp29
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp30-.Lfunc_begin0          # >> Call Site 6 <<
	.uleb128 .Ltmp33-.Ltmp30                #   Call between .Ltmp30 and .Ltmp33
	.uleb128 .Ltmp34-.Lfunc_begin0          #     jumps to .Ltmp34
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp35-.Lfunc_begin0          # >> Call Site 7 <<
	.uleb128 .Ltmp58-.Ltmp35                #   Call between .Ltmp35 and .Ltmp58
	.uleb128 .Ltmp59-.Lfunc_begin0          #     jumps to .Ltmp59
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp63-.Lfunc_begin0          # >> Call Site 8 <<
	.uleb128 .Ltmp64-.Ltmp63                #   Call between .Ltmp63 and .Ltmp64
	.uleb128 .Ltmp65-.Lfunc_begin0          #     jumps to .Ltmp65
	.byte	1                               #   On action: 1
	.uleb128 .Ltmp60-.Lfunc_begin0          # >> Call Site 9 <<
	.uleb128 .Ltmp61-.Ltmp60                #   Call between .Ltmp60 and .Ltmp61
	.uleb128 .Ltmp62-.Lfunc_begin0          #     jumps to .Ltmp62
	.byte	1                               #   On action: 1
	.uleb128 .Ltmp61-.Lfunc_begin0          # >> Call Site 10 <<
	.uleb128 .Lfunc_end2-.Ltmp61            #   Call between .Ltmp61 and .Lfunc_end2
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end0:
	.byte	1                               # >> Action Record 1 <<
                                        #   Catch TypeInfo 1
	.byte	0                               #   No further actions
	.p2align	2, 0x0
                                        # >> Catch TypeInfos <<
	.long	0                               # TypeInfo 1
.Lttbase0:
	.p2align	2, 0x0
                                        # -- End function
	.section	.text._ZNSt13random_deviceC2Ev,"axG",@progbits,_ZNSt13random_deviceC2Ev,comdat
	.weak	_ZNSt13random_deviceC2Ev        # -- Begin function _ZNSt13random_deviceC2Ev
	.p2align	1, 0x90
	.type	_ZNSt13random_deviceC2Ev,@function
_ZNSt13random_deviceC2Ev:               # @_ZNSt13random_deviceC2Ev
.Lfunc_begin1:
	.cfi_startproc
	.cfi_personality 3, __gxx_personality_v0
	.cfi_lsda 3, .Lexception1
# %bb.0:                                # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_.exit
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %rbx
	leaq	16(%rsp), %r15
	movq	%r15, -16(%r15)
	movq	%rsp, %r14
	movl	$.L.str.7, %esi
	movl	$.L.str.7+7, %edx
	movq	%r14, %rdi
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
.Ltmp66:
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	_ZNSt13random_device7_M_initERKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
.Ltmp67:
# %bb.1:
	movq	(%rsp), %rdi
	cmpq	%r15, %rdi
	je	.LBB3_3
# %bb.2:                                # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i
	callq	_ZdlPv
.LBB3_3:                                # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB3_4:
	.cfi_def_cfa_offset 64
.Ltmp68:
	movq	%rax, %rbx
	movq	(%rsp), %rdi
	cmpq	%r15, %rdi
	je	.LBB3_6
# %bb.5:                                # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i4
	callq	_ZdlPv
.LBB3_6:                                # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit6
	movq	%rbx, %rdi
	callq	_Unwind_Resume@PLT
.Lfunc_end3:
	.size	_ZNSt13random_deviceC2Ev, .Lfunc_end3-_ZNSt13random_deviceC2Ev
	.cfi_endproc
	.section	.gcc_except_table._ZNSt13random_deviceC2Ev,"aG",@progbits,_ZNSt13random_deviceC2Ev,comdat
	.p2align	2, 0x0
GCC_except_table3:
.Lexception1:
	.byte	255                             # @LPStart Encoding = omit
	.byte	255                             # @TType Encoding = omit
	.byte	1                               # Call site Encoding = uleb128
	.uleb128 .Lcst_end1-.Lcst_begin1
.Lcst_begin1:
	.uleb128 .Lfunc_begin1-.Lfunc_begin1    # >> Call Site 1 <<
	.uleb128 .Ltmp66-.Lfunc_begin1          #   Call between .Lfunc_begin1 and .Ltmp66
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp66-.Lfunc_begin1          # >> Call Site 2 <<
	.uleb128 .Ltmp67-.Ltmp66                #   Call between .Ltmp66 and .Ltmp67
	.uleb128 .Ltmp68-.Lfunc_begin1          #     jumps to .Ltmp68
	.byte	0                               #   On action: cleanup
	.uleb128 .Ltmp67-.Lfunc_begin1          # >> Call Site 3 <<
	.uleb128 .Lfunc_end3-.Ltmp67            #   Call between .Ltmp67 and .Lfunc_end3
	.byte	0                               #     has no landing pad
	.byte	0                               #   On action: cleanup
.Lcst_end1:
	.p2align	2, 0x0
                                        # -- End function
	.text
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	_Z11single_testv
	xorl	%eax, %eax
	popq	%rcx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	main, .Lfunc_end4-main
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag,"axG",@progbits,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag,comdat
	.weak	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag # -- Begin function _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
	.p2align	1, 0x90
	.type	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag,@function
_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag: # @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdx, %r14
	movq	%rsi, %r15
	movq	%rdi, %rbx
	subq	%rsi, %r14
	movq	%r14, (%rsp)
	cmpq	$15, %r14
	jbe	.LBB5_1
# %bb.2:
	movq	%rsp, %r12
	movq	%rbx, %rdi
	movq	%r12, %rsi
	xorl	%edx, %edx
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_createERmm
	movq	%rax, (%rbx)
	movq	(%r12), %rcx
	movq	%rcx, 16(%rbx)
	jmp	.LBB5_3
.LBB5_1:                                # %._crit_edge
	movq	(%rbx), %rax
.LBB5_3:
	testq	%r14, %r14
	je	.LBB5_7
# %bb.4:
	cmpq	$1, %r14
	jne	.LBB5_6
# %bb.5:
	movb	(%r15), %cl
	movb	%cl, (%rax)
	jmp	.LBB5_7
.LBB5_6:
	movq	%rax, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	callq	memcpy@PLT
.LBB5_7:                                # %_ZZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tagEN6_GuardD2Ev.exit
	movq	(%rsp), %rax
	movq	%rax, 8(%rbx)
	movq	(%rbx), %rcx
	movb	$0, (%rcx,%rax)
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag, .Lfunc_end5-_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
	.cfi_endproc
                                        # -- End function
	.section	.text.__clang_call_terminate,"axG",@progbits,__clang_call_terminate,comdat
	.hidden	__clang_call_terminate          # -- Begin function __clang_call_terminate
	.weak	__clang_call_terminate
	.type	__clang_call_terminate,@function
__clang_call_terminate:                 # @__clang_call_terminate
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__cxa_begin_catch
	callq	_ZSt9terminatev
.Lfunc_end6:
	.size	__clang_call_terminate, .Lfunc_end6-__clang_call_terminate
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt24uniform_int_distributionImEclISt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEEEmRT_RKNS0_10param_typeE,"axG",@progbits,_ZNSt24uniform_int_distributionImEclISt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEEEmRT_RKNS0_10param_typeE,comdat
	.weak	_ZNSt24uniform_int_distributionImEclISt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEEEmRT_RKNS0_10param_typeE # -- Begin function _ZNSt24uniform_int_distributionImEclISt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEEEmRT_RKNS0_10param_typeE
	.p2align	1, 0x90
	.type	_ZNSt24uniform_int_distributionImEclISt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEEEmRT_RKNS0_10param_typeE,@function
_ZNSt24uniform_int_distributionImEclISt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEEEmRT_RKNS0_10param_typeE: # @_ZNSt24uniform_int_distributionImEclISt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEEEmRT_RKNS0_10param_typeE
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rdx, %rbx
	movq	%rsi, %rdi
	movq	8(%rdx), %rsi
	subq	(%rdx), %rsi
	cmpq	$-1, %rsi
	je	.LBB7_2
# %bb.1:
	incq	%rsi
	callq	_ZNSt24uniform_int_distributionImE5_S_ndIoSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEmEET1_RT0_S4_
	jmp	.LBB7_3
.LBB7_2:
	callq	_ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEclEv
.LBB7_3:
	addq	(%rbx), %rax
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	_ZNSt24uniform_int_distributionImEclISt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEEEmRT_RKNS0_10param_typeE, .Lfunc_end7-_ZNSt24uniform_int_distributionImEclISt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEEEmRT_RKNS0_10param_typeE
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt24uniform_int_distributionImE5_S_ndIoSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEmEET1_RT0_S4_,"axG",@progbits,_ZNSt24uniform_int_distributionImE5_S_ndIoSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEmEET1_RT0_S4_,comdat
	.weak	_ZNSt24uniform_int_distributionImE5_S_ndIoSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEmEET1_RT0_S4_ # -- Begin function _ZNSt24uniform_int_distributionImE5_S_ndIoSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEmEET1_RT0_S4_
	.p2align	1, 0x90
	.type	_ZNSt24uniform_int_distributionImE5_S_ndIoSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEmEET1_RT0_S4_,@function
_ZNSt24uniform_int_distributionImE5_S_ndIoSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEmEET1_RT0_S4_: # @_ZNSt24uniform_int_distributionImE5_S_ndIoSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEmEET1_RT0_S4_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rsi, %rbx
	movq	%rdi, %r14
	callq	_ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEclEv
	mulq	%rbx
	movq	%rdx, %rcx
	cmpq	%rbx, %rax
	jae	.LBB8_5
# %bb.1:
	movq	%rax, %rsi
	movq	%rbx, %rax
	negq	%rax
	xorl	%edx, %edx
	divq	%rbx
	cmpq	%rsi, %rdx
	jbe	.LBB8_5
# %bb.2:                                # %.lr.ph.preheader
	movq	%rdx, %r15
.LBB8_3:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movq	%r14, %rdi
	callq	_ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEclEv
	mulq	%rbx
	cmpq	%rax, %r15
	ja	.LBB8_3
# %bb.4:                                # %..loopexit_crit_edge
	movq	%rdx, %rcx
.LBB8_5:                                # %.loopexit
	movq	%rcx, %rax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	_ZNSt24uniform_int_distributionImE5_S_ndIoSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEmEET1_RT0_S4_, .Lfunc_end8-_ZNSt24uniform_int_distributionImE5_S_ndIoSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEmEET1_RT0_S4_
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEclEv,"axG",@progbits,_ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEclEv,comdat
	.weak	_ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEclEv # -- Begin function _ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEclEv
	.p2align	1, 0x90
	.type	_ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEclEv,@function
_ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEclEv: # @_ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEclEv
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rdi, %rbx
	movq	2496(%rdi), %rax
	cmpq	$312, %rax                      # imm = 0x138
	jb	.LBB9_2
# %bb.1:
	movq	%rbx, %rdi
	callq	_ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EE11_M_gen_randEv
	movq	2496(%rbx), %rax
.LBB9_2:
	leaq	1(%rax), %rcx
	movq	%rcx, 2496(%rbx)
	movq	(%rbx,%rax,8), %rax
	movq	%rax, %rcx
	shrq	$29, %rcx
	movabsq	$22906492245, %rdx              # imm = 0x555555555
	andq	%rcx, %rdx
	xorq	%rax, %rdx
	movq	%rdx, %rax
	shlq	$17, %rax
	movabsq	$8202884508482404352, %rcx      # imm = 0x71D67FFFEDA60000
	andq	%rax, %rcx
	xorq	%rdx, %rcx
	movl	%ecx, %edx
	andl	$134201207, %edx                # imm = 0x7FFBF77
	shlq	$37, %rdx
	xorq	%rcx, %rdx
	movq	%rdx, %rax
	shrq	$43, %rax
	xorq	%rdx, %rax
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end9:
	.size	_ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEclEv, .Lfunc_end9-_ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EEclEv
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EE11_M_gen_randEv,"axG",@progbits,_ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EE11_M_gen_randEv,comdat
	.weak	_ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EE11_M_gen_randEv # -- Begin function _ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EE11_M_gen_randEv
	.p2align	1, 0x90
	.type	_ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EE11_M_gen_randEv,@function
_ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EE11_M_gen_randEv: # @_ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EE11_M_gen_randEv
	.cfi_startproc
# %bb.0:
	movabsq	$-5403634167711393303, %rax     # imm = 0xB5026F5AA96619E9
	movq	(%rdi), %rdx
	xorl	%ecx, %ecx
.LBB10_1:                               # =>This Inner Loop Header: Depth=1
	andq	$-2147483648, %rdx              # imm = 0x80000000
	movq	8(%rdi,%rcx,8), %rsi
	movl	%esi, %r8d
	andl	$2147483646, %r8d               # imm = 0x7FFFFFFE
	orq	%rdx, %r8
	shrq	%r8
	xorq	1248(%rdi,%rcx,8), %r8
	movq	%rsi, %rdx
                                        # kill: def $esi killed $esi killed $rsi def $rsi
	andl	$1, %esi
	negq	%rsi
	andq	%rax, %rsi
	xorq	%r8, %rsi
	movq	%rsi, (%rdi,%rcx,8)
	leaq	1(%rcx), %rsi
	movq	%rsi, %rcx
	cmpq	$156, %rsi
	jne	.LBB10_1
# %bb.2:                                # %.preheader.preheader
	movq	1248(%rdi), %rdx
	movl	$157, %ecx
.LBB10_3:                               # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	andq	$-2147483648, %rdx              # imm = 0x80000000
	movq	(%rdi,%rcx,8), %rsi
	movl	%esi, %r8d
	andl	$2147483646, %r8d               # imm = 0x7FFFFFFE
	orq	%rdx, %r8
	shrq	%r8
	xorq	-1256(%rdi,%rcx,8), %r8
	movq	%rsi, %rdx
                                        # kill: def $esi killed $esi killed $rsi def $rsi
	andl	$1, %esi
	negq	%rsi
	andq	%rax, %rsi
	xorq	%r8, %rsi
	movq	%rsi, -8(%rdi,%rcx,8)
	incq	%rcx
	cmpq	$312, %rcx                      # imm = 0x138
	jne	.LBB10_3
# %bb.4:
	movq	$-2147483648, %rcx              # imm = 0x80000000
	andq	2488(%rdi), %rcx
	movq	(%rdi), %rdx
	movl	%edx, %esi
	andl	$2147483646, %esi               # imm = 0x7FFFFFFE
	orq	%rcx, %rsi
	shrq	%rsi
	xorq	1240(%rdi), %rsi
	andl	$1, %edx
	negq	%rdx
	andq	%rax, %rdx
	xorq	%rsi, %rdx
	movq	%rdx, 2488(%rdi)
	movq	$0, 2496(%rdi)
	retq
.Lfunc_end10:
	.size	_ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EE11_M_gen_randEv, .Lfunc_end10-_ZNSt23mersenne_twister_engineImLm64ELm312ELm156ELm31ELm13043109905998158313ELm29ELm6148914691236517205ELm17ELm8202884508482404352ELm37ELm18444473444759240704ELm43ELm6364136223846793005EE11_M_gen_randEv
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB11_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB11_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11witnessTestPfPVbyy, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end11:
	.size	__hip_module_ctor, .Lfunc_end11-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB12_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB12_2:
	retq
.Lfunc_end12:
	.size	__hip_module_dtor, .Lfunc_end12-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z11witnessTestPfPVbyy,@object  # @_Z11witnessTestPfPVbyy
	.section	.rodata,"a",@progbits
	.globl	_Z11witnessTestPfPVbyy
	.p2align	3, 0x0
_Z11witnessTestPfPVbyy:
	.quad	_Z26__device_stub__witnessTestPfPVbyy
	.size	_Z11witnessTestPfPVbyy, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Starting Miller-Rabin CUDA test for "
	.size	.L.str, 37

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	" numbers with parameter k = "
	.size	.L.str.1, 29

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	". Tests primality with accuracy "
	.size	.L.str.2, 33

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"."
	.size	.L.str.3, 2

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Total Time: "
	.size	.L.str.4, 13

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	" nanoseconds"
	.size	.L.str.5, 13

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Average Time per iteration: "
	.size	.L.str.6, 29

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"default"
	.size	.L.str.7, 8

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z11witnessTestPfPVbyy"
	.size	.L__unnamed_1, 23

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z26__device_stub__witnessTestPfPVbyy
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Unwind_Resume
	.addrsig_sym _Z11witnessTestPfPVbyy
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z11witnessTestPfPVbyy  ; -- Begin function _Z11witnessTestPfPVbyy
	.globl	_Z11witnessTestPfPVbyy
	.p2align	8
	.type	_Z11witnessTestPfPVbyy,@function
_Z11witnessTestPfPVbyy:                 ; @_Z11witnessTestPfPVbyy
; %bb.0:
	s_load_b256 s[0:7], s[0:1], 0x0
	s_mov_b32 s8, exec_lo
	s_waitcnt lgkmcnt(0)
	v_dual_mov_b32 v1, s2 :: v_dual_mov_b32 v2, s3
	flat_load_u8 v1, v[1:2] glc dlc
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_cmpx_ne_u16_e32 0, v1
	s_cbranch_execz .LBB0_18
; %bb.1:
	s_cmp_eq_u64 s[4:5], 0
	s_cbranch_scc1 .LBB0_6
; %bb.2:                                ; %.lr.ph.i.preheader
	v_cvt_f32_u32_e32 v1, s6
	v_cvt_f32_u32_e32 v2, s7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)
	v_dual_fmamk_f32 v1, v2, 0x4f800000, v1 :: v_dual_lshlrev_b32 v0, 2, v0
	global_load_b32 v0, v0, s[0:1]
	s_add_u32 s0, s6, -4
	s_addc_u32 s1, s7, -1
	s_clz_i32_u32 s8, s1
	v_rcp_f32_e32 v1, v1
	s_min_u32 s8, s8, 32
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[0:1], s8
	s_min_u32 s0, s0, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	s_or_b32 s0, s1, s0
	s_mov_b32 s1, 0
	v_cvt_f32_u32_e32 v2, s0
	s_sub_i32 s0, 32, s8
	s_mov_b64 s[8:9], s[4:5]
	v_ldexp_f32 v2, v2, s0
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fma_f32 v0, v0, v2, 2.0
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v2, 0x5f7ffffc, v1
	v_trunc_f32_e32 v5, v0
	v_dual_mul_f32 v0, 0x2f800000, v2 :: v_dual_mul_f32 v1, 0x2f800000, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_trunc_f32_e32 v6, v0
	v_floor_f32_e32 v3, v1
	v_mov_b32_e32 v0, 1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_mov_b32 v1, 0 :: v_dual_fmac_f32 v2, 0xcf800000, v6
	v_fmac_f32_e32 v5, 0xcf800000, v3
	v_cvt_u32_f32_e32 v3, v3
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cvt_u32_f32_e32 v4, v2
	v_cvt_u32_f32_e32 v2, v5
	v_cvt_u32_f32_e32 v5, v6
.LBB0_3:                                ; %.lr.ph.i
                                        ; =>This Inner Loop Header: Depth=1
	s_sub_u32 s0, 0, s6
	s_subb_u32 s10, 0, s7
	v_mul_hi_u32 v6, s0, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v7, s0, v5
	v_mul_lo_u32 v8, s10, v4
	v_add_nc_u32_e32 v6, v6, v7
	v_mul_lo_u32 v7, s0, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v6, v6, v8
	v_mul_hi_u32 v8, v4, v7
	s_delay_alu instid0(VALU_DEP_2)
	v_mul_lo_u32 v9, v4, v6
	v_mul_hi_u32 v10, v4, v6
	v_mul_hi_u32 v11, v5, v7
	v_mul_lo_u32 v7, v5, v7
	v_mul_hi_u32 v12, v5, v6
	v_mul_lo_u32 v6, v5, v6
	v_add_co_u32 v8, vcc_lo, v8, v9
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v7, vcc_lo, v8, v7
	v_add_co_ci_u32_e32 v7, vcc_lo, v9, v11, vcc_lo
	v_add_co_ci_u32_e32 v8, vcc_lo, 0, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v7, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v4, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, v5, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_hi_u32 v8, s0, v6
	v_mul_lo_u32 v10, s10, v6
	v_mul_lo_u32 v9, s0, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v8, v8, v9
	v_mul_lo_u32 v9, s0, v6
	v_add_nc_u32_e32 v8, v8, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v10, v6, v9
	v_mul_lo_u32 v11, v6, v8
	v_mul_hi_u32 v12, v6, v8
	v_mul_hi_u32 v13, v7, v9
	v_mul_lo_u32 v9, v7, v9
	v_mul_hi_u32 v14, v7, v8
	v_mul_lo_u32 v8, v7, v8
	v_add_co_u32 v10, vcc_lo, v10, v11
	v_add_co_ci_u32_e32 v11, vcc_lo, 0, v12, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v9, vcc_lo, v10, v9
	v_add_co_ci_u32_e32 v9, vcc_lo, v11, v13, vcc_lo
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v14, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v9, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v10, vcc_lo, v6, v8
	v_add_co_ci_u32_e32 v12, vcc_lo, v7, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_hi_u32 v13, v2, v10
	v_mad_u64_u32 v[8:9], null, v3, v10, 0
	v_mad_u64_u32 v[6:7], null, v2, v12, 0
	v_mad_u64_u32 v[10:11], null, v3, v12, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v6, vcc_lo, v13, v6
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v6, v8
	v_add_co_ci_u32_e32 v6, vcc_lo, v7, v9, vcc_lo
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v11, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, v6, v10
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v10, s7, v8
	v_mad_u64_u32 v[6:7], null, s6, v8, 0
	v_mul_lo_u32 v8, s6, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_co_u32 v6, vcc_lo, v2, v6
	v_add3_u32 v7, v7, v8, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v8, v3, v7
	v_subrev_co_ci_u32_e64 v2, s0, s7, v8, vcc_lo
	v_sub_co_ci_u32_e32 v3, vcc_lo, v3, v7, vcc_lo
	v_sub_co_u32 v7, vcc_lo, v6, s6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_subrev_co_ci_u32_e64 v8, s0, 0, v2, vcc_lo
	v_cmp_le_u32_e64 s0, s6, v6
	v_subrev_co_ci_u32_e32 v2, vcc_lo, s7, v2, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s7, v3
	v_cndmask_b32_e64 v9, 0, -1, s0
	v_cmp_le_u32_e64 s0, s6, v7
	v_cndmask_b32_e64 v12, 0, -1, vcc_lo
	v_cmp_eq_u32_e32 vcc_lo, s7, v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cndmask_b32_e64 v10, 0, -1, s0
	v_cmp_le_u32_e64 s0, s7, v8
	v_cndmask_b32_e64 v11, 0, -1, s0
	v_cmp_eq_u32_e64 s0, s7, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v10, v11, v10, vcc_lo
	v_sub_co_u32 v11, vcc_lo, v7, s6
	v_subrev_co_ci_u32_e32 v2, vcc_lo, 0, v2, vcc_lo
	v_cmp_ne_u32_e32 vcc_lo, 0, v10
	v_cndmask_b32_e64 v9, v12, v9, s0
	s_and_b32 s0, s8, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	s_cmp_eq_u64 s[0:1], 0
	v_dual_cndmask_b32 v7, v7, v11 :: v_dual_cndmask_b32 v2, v8, v2
	v_cmp_ne_u32_e32 vcc_lo, 0, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cndmask_b32_e32 v2, v3, v2, vcc_lo
	v_cndmask_b32_e32 v6, v6, v7, vcc_lo
	s_cbranch_scc1 .LBB0_5
; %bb.4:                                ;   in Loop: Header=BB0_3 Depth=1
	s_sub_u32 s0, 0, s6
	s_subb_u32 s10, 0, s7
	v_mul_hi_u32 v3, s0, v4
	v_mul_lo_u32 v7, s0, v5
	v_mul_lo_u32 v8, s10, v4
	v_mul_lo_u32 v1, v6, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v3, v7
	v_mul_lo_u32 v7, s0, v4
	v_add_nc_u32_e32 v3, v3, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v8, v4, v7
	v_mul_lo_u32 v9, v4, v3
	v_mul_hi_u32 v10, v4, v3
	v_mul_hi_u32 v11, v5, v7
	v_mul_lo_u32 v7, v5, v7
	v_mul_hi_u32 v12, v5, v3
	v_mul_lo_u32 v3, v5, v3
	v_add_co_u32 v8, vcc_lo, v8, v9
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v7, vcc_lo, v8, v7
	v_add_co_ci_u32_e32 v7, vcc_lo, v9, v11, vcc_lo
	v_add_co_ci_u32_e32 v8, vcc_lo, 0, v12, vcc_lo
	v_mul_lo_u32 v12, v2, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v3, vcc_lo, v7, v3
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v4, v3
	v_add_co_ci_u32_e32 v9, vcc_lo, v5, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_hi_u32 v7, s0, v3
	v_mul_lo_u32 v10, s10, v3
	v_mul_lo_u32 v8, s0, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v7, v7, v8
	v_mul_lo_u32 v8, s0, v3
	v_add_nc_u32_e32 v7, v7, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v10, v3, v8
	v_mul_lo_u32 v11, v3, v7
	v_mul_hi_u32 v13, v3, v7
	v_mul_hi_u32 v14, v9, v8
	v_mul_lo_u32 v8, v9, v8
	v_mul_hi_u32 v15, v9, v7
	v_add_co_u32 v10, vcc_lo, v10, v11
	v_add_co_ci_u32_e32 v11, vcc_lo, 0, v13, vcc_lo
	v_mul_lo_u32 v13, v9, v7
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v7, vcc_lo, v10, v8
	v_add_co_ci_u32_e32 v10, vcc_lo, v11, v14, vcc_lo
	v_add_co_ci_u32_e32 v11, vcc_lo, 0, v15, vcc_lo
	v_mad_u64_u32 v[7:8], null, v6, v0, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v0, vcc_lo, v10, v13
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v11, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, v3, v0
	v_add_co_ci_u32_e32 v13, vcc_lo, v9, v10, vcc_lo
	v_add3_u32 v12, v8, v1, v12
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_hi_u32 v14, v7, v3
	v_mad_u64_u32 v[0:1], null, v7, v13, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mad_u64_u32 v[8:9], null, v12, v3, 0
	v_mad_u64_u32 v[10:11], null, v12, v13, 0
	v_add_co_u32 v0, vcc_lo, v14, v0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, v0, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v0, vcc_lo, v1, v9, vcc_lo
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v11, vcc_lo
	v_add_co_u32 v3, vcc_lo, v0, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v8, vcc_lo, 0, v1, vcc_lo
	v_mul_lo_u32 v9, s7, v3
	v_mad_u64_u32 v[0:1], null, s6, v3, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v3, s6, v8
	v_sub_co_u32 v0, vcc_lo, v7, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v1, v1, v3, v9
	v_sub_nc_u32_e32 v3, v12, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_subrev_co_ci_u32_e64 v3, s0, s7, v3, vcc_lo
	v_sub_co_ci_u32_e32 v1, vcc_lo, v12, v1, vcc_lo
	v_sub_co_u32 v7, vcc_lo, v0, s6
	v_subrev_co_ci_u32_e64 v8, s0, 0, v3, vcc_lo
	v_cmp_le_u32_e64 s0, s6, v0
	v_subrev_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s7, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v9, 0, -1, s0
	v_cmp_le_u32_e64 s0, s6, v7
	v_cndmask_b32_e64 v12, 0, -1, vcc_lo
	v_cmp_eq_u32_e32 vcc_lo, s7, v8
	v_cndmask_b32_e64 v10, 0, -1, s0
	v_cmp_le_u32_e64 s0, s7, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v11, 0, -1, s0
	v_cmp_eq_u32_e64 s0, s7, v1
	v_cndmask_b32_e32 v10, v11, v10, vcc_lo
	v_sub_co_u32 v11, vcc_lo, v7, s6
	v_subrev_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_cmp_ne_u32_e32 vcc_lo, 0, v10
	v_cndmask_b32_e64 v9, v12, v9, s0
	v_cndmask_b32_e32 v3, v8, v3, vcc_lo
	v_cndmask_b32_e32 v7, v7, v11, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_ne_u32_e32 vcc_lo, 0, v9
	v_cndmask_b32_e32 v1, v1, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_cndmask_b32_e32 v0, v0, v7, vcc_lo
.LBB0_5:                                ;   in Loop: Header=BB0_3 Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v7, v6, v2
	v_mad_u64_u32 v[2:3], null, v6, v6, 0
	v_cmp_gt_u64_e64 s0, s[8:9], 1
	s_lshr_b64 s[8:9], s[8:9], 1
	s_and_b32 vcc_lo, exec_lo, s0
	s_delay_alu instid0(VALU_DEP_2)
	v_add3_u32 v3, v3, v7, v7
	s_cbranch_vccnz .LBB0_3
	s_branch .LBB0_7
.LBB0_6:
	v_mov_b32_e32 v0, 1
	v_mov_b32_e32 v1, 0
.LBB0_7:                                ; %_Z6modexpyyy.exit
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u64_e32 vcc_lo, 1, v[0:1]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_18
; %bb.8:
	s_add_u32 s8, s6, -1
	s_addc_u32 s9, s7, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cmp_ne_u64_e32 vcc_lo, s[8:9], v[0:1]
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_18
; %bb.9:                                ; %.preheader.preheader
	v_cvt_f32_u32_e32 v2, s6
	v_cvt_f32_u32_e32 v3, s7
	s_mov_b32 s1, 0
                                        ; implicit-def: $sgpr10
                                        ; implicit-def: $sgpr0
                                        ; implicit-def: $sgpr11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v2, 0x4f800000, v3
	v_rcp_f32_e32 v2, v2
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v2, 0x5f7ffffc, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v3, 0x2f800000, v2
	v_trunc_f32_e32 v3, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v2, 0xcf800000, v3
	v_cvt_u32_f32_e32 v3, v3
	v_cvt_u32_f32_e32 v2, v2
.LBB0_10:                               ; %.preheader
                                        ; =>This Inner Loop Header: Depth=1
	s_or_b32 s11, s11, exec_lo
	s_or_b32 s0, s0, exec_lo
	s_cmp_eq_u64 s[4:5], s[8:9]
	s_cbranch_scc1 .LBB0_14
; %bb.11:                               ;   in Loop: Header=BB0_10 Depth=1
	s_sub_u32 s0, 0, s6
	s_subb_u32 s12, 0, s7
	v_mul_hi_u32 v4, s0, v2
	v_mul_lo_u32 v5, s0, v3
	v_mul_lo_u32 v6, s12, v2
	v_mul_lo_u32 v1, v0, v1
	s_mov_b32 s13, exec_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v4, v5
	v_mul_lo_u32 v5, s0, v2
	v_add_nc_u32_e32 v4, v4, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v6, v2, v5
	v_mul_lo_u32 v7, v2, v4
	v_mul_hi_u32 v8, v2, v4
	v_mul_hi_u32 v9, v3, v5
	v_mul_lo_u32 v5, v3, v5
	v_mul_hi_u32 v10, v3, v4
	v_mul_lo_u32 v4, v3, v4
	v_add_co_u32 v6, vcc_lo, v6, v7
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, v6, v5
	v_add_co_ci_u32_e32 v5, vcc_lo, v7, v9, vcc_lo
	v_add_co_ci_u32_e32 v6, vcc_lo, 0, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, v5, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v6, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v6, vcc_lo, v2, v4
	v_add_co_ci_u32_e32 v7, vcc_lo, v3, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_hi_u32 v4, s0, v6
	v_mul_lo_u32 v8, s12, v6
	v_mul_lo_u32 v5, s0, v7
	s_mov_b32 s12, -1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v4, v4, v5
	v_mul_lo_u32 v5, s0, v6
	v_add_nc_u32_e32 v4, v4, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_hi_u32 v8, v6, v5
	v_mul_lo_u32 v9, v6, v4
	v_mul_hi_u32 v10, v6, v4
	v_mul_hi_u32 v11, v7, v5
	v_mul_lo_u32 v5, v7, v5
	v_mul_hi_u32 v12, v7, v4
	v_add_co_u32 v8, vcc_lo, v8, v9
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v10, vcc_lo
	v_mul_lo_u32 v10, v7, v4
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v4, vcc_lo, v8, v5
	v_add_co_ci_u32_e32 v8, vcc_lo, v9, v11, vcc_lo
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v12, vcc_lo
	v_mad_u64_u32 v[4:5], null, v0, v0, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v0, vcc_lo, v8, v10
	v_add_co_ci_u32_e32 v8, vcc_lo, 0, v9, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v9, vcc_lo, v6, v0
	v_add_co_ci_u32_e32 v10, vcc_lo, v7, v8, vcc_lo
	v_add3_u32 v11, v5, v1, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_hi_u32 v12, v4, v9
	v_mad_u64_u32 v[0:1], null, v4, v10, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mad_u64_u32 v[5:6], null, v11, v9, 0
	v_mad_u64_u32 v[7:8], null, v11, v10, 0
	v_add_co_u32 v0, vcc_lo, v12, v0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, v0, v5
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v0, vcc_lo, v1, v6, vcc_lo
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v8, vcc_lo
	v_add_co_u32 v5, vcc_lo, v0, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e32 v6, vcc_lo, 0, v1, vcc_lo
	v_mul_lo_u32 v7, s7, v5
	v_mad_u64_u32 v[0:1], null, s6, v5, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v5, s6, v6
	v_sub_co_u32 v0, vcc_lo, v4, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v1, v1, v5, v7
	v_sub_nc_u32_e32 v5, v11, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_subrev_co_ci_u32_e64 v4, s0, s7, v5, vcc_lo
	v_sub_co_ci_u32_e32 v1, vcc_lo, v11, v1, vcc_lo
	v_sub_co_u32 v5, vcc_lo, v0, s6
	v_subrev_co_ci_u32_e64 v6, s0, 0, v4, vcc_lo
	v_cmp_le_u32_e64 s0, s6, v0
	v_subrev_co_ci_u32_e32 v4, vcc_lo, s7, v4, vcc_lo
	v_cmp_le_u32_e32 vcc_lo, s7, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_cndmask_b32_e64 v7, 0, -1, s0
	v_cmp_le_u32_e64 s0, s6, v5
	v_cndmask_b32_e64 v10, 0, -1, vcc_lo
	v_cmp_eq_u32_e32 vcc_lo, s7, v6
	v_cndmask_b32_e64 v8, 0, -1, s0
	v_cmp_le_u32_e64 s0, s7, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_cndmask_b32_e64 v9, 0, -1, s0
	v_cmp_eq_u32_e64 s0, s7, v1
	v_cndmask_b32_e32 v8, v9, v8, vcc_lo
	v_sub_co_u32 v9, vcc_lo, v5, s6
	v_subrev_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_cmp_ne_u32_e32 vcc_lo, 0, v8
	v_cndmask_b32_e64 v7, v10, v7, s0
	s_mov_b32 s0, -1
	v_dual_cndmask_b32 v5, v5, v9 :: v_dual_cndmask_b32 v4, v6, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_ne_u32_e32 vcc_lo, 0, v7
	v_dual_cndmask_b32 v1, v1, v4 :: v_dual_cndmask_b32 v0, v0, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ne_u64_e32 1, v[0:1]
; %bb.12:                               ;   in Loop: Header=BB0_10 Depth=1
	v_cmp_eq_u64_e32 vcc_lo, s[8:9], v[0:1]
	s_lshl_b64 s[4:5], s[4:5], 1
	s_xor_b32 s12, exec_lo, -1
	s_or_not1_b32 s0, vcc_lo, exec_lo
; %bb.13:                               ; %Flow38
                                        ;   in Loop: Header=BB0_10 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	s_and_not1_b32 s11, s11, exec_lo
	s_and_b32 s12, s12, exec_lo
	s_or_b32 s11, s11, s12
	s_branch .LBB0_15
.LBB0_14:                               ;   in Loop: Header=BB0_10 Depth=1
                                        ; implicit-def: $vgpr0_vgpr1
.LBB0_15:                               ; %Flow37
                                        ;   in Loop: Header=BB0_10 Depth=1
	s_and_b32 s12, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_or_b32 s1, s12, s1
	s_and_not1_b32 s10, s10, exec_lo
	s_and_b32 s12, s11, exec_lo
	s_or_b32 s10, s10, s12
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB0_10
; %bb.16:                               ; %loop.exit.guard
	s_or_b32 exec_lo, exec_lo, s1
	s_and_saveexec_b32 s0, s10
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s0, exec_lo, s0
	s_cbranch_execz .LBB0_18
; %bb.17:                               ; %.loopexit.sink.split
	v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
	v_mov_b32_e32 v2, 0
	flat_store_b8 v[0:1], v2 dlc
	s_waitcnt_vscnt null, 0x0
.LBB0_18:                               ; %.loopexit
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11witnessTestPfPVbyy
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 32
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 16
		.amdhsa_next_free_sgpr 14
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z11witnessTestPfPVbyy, .Lfunc_end0-_Z11witnessTestPfPVbyy
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2656
; NumSgprs: 16
; NumVgprs: 16
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 1
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 16
; NumVGPRsForWavesPerEU: 16
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           8
        .value_kind:     by_value
      - .offset:         24
        .size:           8
        .value_kind:     by_value
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 32
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11witnessTestPfPVbyy
    .private_segment_fixed_size: 0
    .sgpr_count:     16
    .sgpr_spill_count: 0
    .symbol:         _Z11witnessTestPfPVbyy.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     16
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
