/*  Molecular dynamics simulation linear code for binary Lennard-Jones liquid
   under NVE ensemble; Author: You-Liang Zhu, Email: youliangzhu@ciac.ac.cn
    Copyright: You-Liang Zhu
    This code is free: you can redistribute it and/or modify it under the terms
   of the GNU General Public License.*/
#include <ctype.h>
#include <cuda_runtime.h>
#include <math.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <sys/time.h>

// catch the error thrown by CUDA
void checkCUDAError(const char *msg) {
  cudaError_t err = cudaGetLastError();
  if (cudaSuccess != err) {
    fprintf(stderr, "Cuda error: %s: %s.\n", msg, cudaGetErrorString(err));
    exit(-1);
  }
}

// implement periodic boundary condition
__host__ __device__ float pbc(float x, float box_len) {
  float box_half = box_len * 0.5;
  if (x > box_half)
    x -= box_len;
  else if (x < -box_half)
    x += box_len;
  return x;
}

// random number generator [0.0-1.0)
float R2S() {
  int ran = rand();
  float fran = (float)ran / (float)RAND_MAX;
  return fran;
}

// initially generate the position and mass of particles
void init(unsigned int np, float4 *r, float4 *v, float3 box, float min_dis) {
  for (unsigned int i = 0; i < np; i++) {
    bool find_pos = false;
    float4 ri;
    while (!find_pos) {
      ri.x = (R2S() - 0.5) * box.x;
      ri.y = (R2S() - 0.5) * box.y;
      ri.z = (R2S() - 0.5) * box.z;
      find_pos = true;

      for (unsigned int j = 0; j < i; j++) {
        float dx = pbc(ri.x - r[j].x, box.x);
        float dy = pbc(ri.y - r[j].y, box.y);
        float dz = pbc(ri.z - r[j].z, box.z);
        float r = sqrt(dx * dx + dy * dy + dz * dz);
        // a minimum safe distance to avoid the overlap of LJ particles
        if (r < min_dis) {
          find_pos = false;
          break;
        }
      }
    }
    // randomly generate the type of particle, 1.0 represent type A and 2.0
    // represent type B
    ri.w = R2S() > 0.5 ? 1.0 : 2.0;

    r[i] = ri;
    v[i].w = 1.0;
  }
}

// first step integration of velocity verlet algorithm
extern "C" __global__ void first_integration_kernel(unsigned int np, float dt,
                                                    float3 box, float4 *r,
                                                    float4 *v, float4 *f) {
  // calculate the global index of thread
  int i = blockIdx.x * blockDim.x + threadIdx.x;
  if (i < np) {
    float4 ri = r[i];
    float mass = v[i].w;

    v[i].x += 0.5 * dt * f[i].x / mass;
    v[i].y += 0.5 * dt * f[i].y / mass;
    v[i].z += 0.5 * dt * f[i].z / mass;

    ri.x += dt * v[i].x;
    ri.y += dt * v[i].y;
    ri.z += dt * v[i].z;

    r[i].x = pbc(ri.x, box.x);
    r[i].y = pbc(ri.y, box.y);
    r[i].z = pbc(ri.z, box.z);
  }
}

void first_integration(unsigned int np, float dt, float3 box, float4 *r,
                       float4 *v, float4 *f, unsigned int nthreads) {
  dim3 grid((np / nthreads) + 1, 1, 1);
  dim3 block(nthreads, 1, 1);

  first_integration_kernel<<<grid, block>>>(np, dt, box, r, v, f);
  // block until the device has complete
  cudaDeviceSynchronize();

  // check if kernel function execution throw out an error
  checkCUDAError("Kernel execution");
}

// non-bonded force calculation
extern "C" __global__ void force_calculation_kernel(unsigned int np, float3 box,
                                                    float3 lj1, float3 lj2,
                                                    float4 *r, float4 *f,
                                                    float rcutsq) {
  // declare an shared array
  extern __shared__ float4 spos[];
  // declare i for global thread index
  int i = blockIdx.x * blockDim.x + threadIdx.x;

  float4 force = make_float4(0.0, 0.0, 0.0, 0.0);
  float4 ri = make_float4(0.0, 0.0, 0.0, 0.0);

  // if index is less than the index of particles
  if (i < np)
    ri = r[i];

  // copy data from global memory to shared memory by one block of data at a
  // time
  for (int start = 0; start < np; start += blockDim.x) {
    float4 pos = make_float4(0.0, 0.0, 0.0, 0.0);
    // the thread with ID x will copy the data with global ID
    // (threadIdx.x + start)th to its block's shared memory
    if (start + threadIdx.x < np)
      pos = r[start + threadIdx.x];
    __syncthreads();
    spos[threadIdx.x] = pos;
    __syncthreads();

    // end_offset is the biggest offset of last block
    int end_offset = min(blockDim.x, np - start);

    if (i < np) {
      for (unsigned int offset = 0; offset < end_offset; offset++) {
        int j = start + offset;

        /* particles have no interactions with themselves */
        if (i == j)
          continue;

        float4 rj = spos[offset];

        /* calculated the shortest distance between particle i and j */
        float dx = pbc(ri.x - rj.x, box.x);
        float dy = pbc(ri.y - rj.y, box.y);
        float dz = pbc(ri.z - rj.z, box.z);
        float type = ri.w + rj.w;

        float rsq = dx * dx + dy * dy + dz * dz;

        /* compute force and energy if within cutoff */
        if (rsq < rcutsq) {
          float lj1_ij, lj2_ij;
          if (type == 2.0) // i=1.0, j=1.0
          {
            lj1_ij = lj1.x;
            lj2_ij = lj2.x;
          } else if (type == 3.0) // i=1.0, j=2.0; or i=2.0, j=1.0
          {
            lj1_ij = lj1.y;
            lj2_ij = lj2.y;
          } else if (type == 4.0) // i=2.0, j=2.0
          {
            lj1_ij = lj1.z;
            lj2_ij = lj2.z;
          }

          // force transform to float is necessary here
          // float calculation is much faster than double
          float r2inv = float(1.0) / rsq;
          float r6inv = r2inv * r2inv * r2inv;

          float ffac = r2inv * r6inv *
                       (float(12.0) * lj1_ij * r6inv - float(6.0) * lj2_ij);
          float epot = r6inv * (lj1_ij * r6inv - lj2_ij);

          force.x += ffac * dx;
          force.y += ffac * dy;
          force.z += ffac * dz;
          force.w += epot;
        }
      }
    }
  }
  if (i < np)
    f[i] = force;
}

void force_calculation(unsigned int np, float3 box, float3 lj1, float3 lj2,
                       float4 *r, float4 *f, float rcutsq,
                       unsigned int nthreads) {
  dim3 grid((np / nthreads) + 1, 1, 1);
  dim3 block(nthreads, 1, 1);

  unsigned int shared_bytes = nthreads * sizeof(float4);
  force_calculation_kernel<<<grid, block, shared_bytes>>>(np, box, lj1, lj2, r,
                                                          f, rcutsq);
  cudaDeviceSynchronize();
  checkCUDAError("Kernel execution");
}

// second step integration of velocity verlet algorithm
__global__ void second_integration_kernel(unsigned int np, float dt, float4 *v,
                                          float4 *f) {
  int i = blockIdx.x * blockDim.x + threadIdx.x;
  if (i < np) {
    float mass = v[i].w;
    v[i].x += 0.5 * dt * f[i].x / mass;
    v[i].y += 0.5 * dt * f[i].y / mass;
    v[i].z += 0.5 * dt * f[i].z / mass;
  }
}

void second_integration(unsigned int np, float dt, float4 *v, float4 *f,
                        unsigned int nthreads) {
  dim3 grid((np / nthreads) + 1, 1, 1);
  dim3 block(nthreads, 1, 1);

  second_integration_kernel<<<grid, block>>>(np, dt, v, f);

  cudaDeviceSynchronize();
  checkCUDAError("Kernel execution");
}

// system information collection for temperature, kinetic energy, potential and
// total energy
__global__ void compute_info_threads(unsigned int np, float4 *v, float4 *f,
                                     float2 *scratch) {
  extern __shared__ float2 sdata[];
  int i = blockIdx.x * blockDim.x * 2 + threadIdx.x;

  float2 temp = make_float2(0.0, 0.0);
  if (i < np) {
    float4 vi = v[i];
    temp.x = vi.w * (vi.x * vi.x + vi.y * vi.y + vi.z * vi.z);
    temp.y = f[i].w;
  }

  if (i + blockDim.x < np) {
    float4 vi = v[i + blockDim.x];
    temp.x += vi.w * (vi.x * vi.x + vi.y * vi.y + vi.z * vi.z);
    temp.y += f[i + blockDim.x].w;
  }

  sdata[threadIdx.x] = temp;
  __syncthreads();

  // divide and rule
  int offset = blockDim.x >> 1;
  while (offset > 0) {
    if (threadIdx.x < offset) {
      sdata[threadIdx.x].x += sdata[threadIdx.x + offset].x;
      sdata[threadIdx.x].y += sdata[threadIdx.x + offset].y;
    }
    offset >>= 1;
    __syncthreads();
  }

  if (threadIdx.x == 0) {
    scratch[blockIdx.x].x = sdata[0].x;
    scratch[blockIdx.x].y = sdata[0].y;
  }
}

__global__ void compute_info_blocks(unsigned int np, float *info,
                                    float2 *scratch, unsigned int nblocks) {
  extern __shared__ float2 sdata[];
  float2 final_sum = make_float2(0.0, 0.0);

  for (int start = 0; start < nblocks; start += blockDim.x * 2) {
    float2 temp = make_float2(0.0, 0.0);
    if (start + threadIdx.x < nblocks) {
      temp.x = scratch[start + threadIdx.x].x;
      temp.y = scratch[start + threadIdx.x].y;
      if (start + threadIdx.x + blockDim.x < nblocks) {
        temp.x = scratch[start + threadIdx.x + blockDim.x].x;
        temp.y = scratch[start + threadIdx.x + blockDim.x].y;
      }
    }

    sdata[threadIdx.x] = temp;
    __syncthreads();

    int offset = blockDim.x >> 1;
    while (offset > 0) {
      if (threadIdx.x < offset) {
        sdata[threadIdx.x].x += sdata[threadIdx.x + offset].x;
        sdata[threadIdx.x].y += sdata[threadIdx.x + offset].y;
      }
      offset >>= 1;
      __syncthreads();
    }

    if (threadIdx.x == 0) {
      final_sum.x += sdata[0].x;
      final_sum.y += sdata[0].y;
    }
  }

  if (threadIdx.x == 0) {
    float ekin = 0.5 * final_sum.x;
    float potential = 0.5 * final_sum.y;
    unsigned int nfreedom = 3 * np - 3;
    float temper = 2.0 * ekin / float(nfreedom);
    float energy = ekin + potential;

    info[0] = temper;
    info[1] = potential;
    info[2] = energy;
  }
}

void compute_info(unsigned int np, float4 *v, float4 *f, float *info,
                  float2 *scratch, unsigned int nthreads,
                  unsigned int nblocks) {
  dim3 grid(nblocks, 1, 1);
  dim3 block(nthreads >> 1, 1, 1);
  unsigned int shared_bytes = sizeof(float2) * nthreads >> 1;

  compute_info_threads<<<grid, block, shared_bytes>>>(np, v, f, scratch);
  cudaDeviceSynchronize();
  checkCUDAError("kernel execution");

  int offset = 0;
  int temp = nblocks;
  while (temp > 0) {
    temp >>= 1;
    offset += 1;
  }
  unsigned int final_nthreads = 512;
  shared_bytes = sizeof(float2) * final_nthreads;
  grid = dim3(1, 1, 1);
  block = dim3(final_nthreads, 1, 1);

  compute_info_blocks<<<grid, block, shared_bytes>>>(np, info, scratch,
                                                     nblocks);
  cudaDeviceSynchronize();
  checkCUDAError("kernel execution");
}

// output system information and frame in XYZ formation which can be read by VMD
void output(FILE *traj, unsigned int step, float *info, float4 *r,
            unsigned int np) {
  float temp = info[0];
  float potential = info[1];
  float energy = info[2];

  fprintf(traj, "%d\n  step=%d  temp=%20.8f  pot=%20.8f  ener=%20.8f\n", np,
          step, temp, potential, energy);
  for (unsigned int i = 0; i < np; i++) {
    float4 ri = r[i];
    if (ri.w == 1.0)
      fprintf(traj, "A  %20.8f %20.8f %20.8f\n", ri.x, ri.y, ri.z);
    else if (ri.w == 2.0)
      fprintf(traj, "B  %20.8f %20.8f %20.8f\n", ri.x, ri.y, ri.z);
  }
}

// main function
int main(int argc, char **argv) {
  // running parameters
  unsigned int np = 2700;    // the number of particles
  unsigned int nsteps = 500; // the number of time steps
  float dt = 0.001;          // integration time step
  float rcut = 3.0;          // the cutoff radius of interactions
  // float temperature = 1.0;// target temperature
  unsigned int nprint = 100; //  period for data output

  timeval start; // start time
  timeval end;   // end time

  // box size in x, y, and z directions
  float3 box = make_float3(15.0, 15.0, 15.0);
  // epsilon.x for type 1.0 and 1.0; epsilon.y for
  // type 1.0 and 2.0; epsilon.z for type 1.0 and 2.0
  float3 epsilon = make_float3(1.0, 0.5, 1.0);
  // sigma.x for type 1.0 and 1.0; sigma.y for
  // type 1.0 and 2.0; sigma.z for type 1.0 and 2.0
  float3 sigma = make_float3(1.0, 1.0, 1.0);
  // the minimum distance between particles for system generation
  float min_dis = sigma.x * 0.9;

  float3 lj1, lj2;

  // calculate these constants firstly
  lj1.x = 4.0 * epsilon.x * pow(sigma.x, int(12));
  lj1.y = 4.0 * epsilon.y * pow(sigma.y, int(12));
  lj1.z = 4.0 * epsilon.z * pow(sigma.z, int(12));

  lj2.x = 4.0 * epsilon.x * pow(sigma.x, int(6));
  lj2.y = 4.0 * epsilon.y * pow(sigma.y, int(6));
  lj2.z = 4.0 * epsilon.z * pow(sigma.z, int(6));

  // announce GPU device ID
  cudaSetDevice(0);

  // number of threads per block
  unsigned int nthreads = 64;
  // number of blocks
  unsigned int nblocks = (int)ceil((float)np / (float)nthreads);
  // memory size
  size_t memSize = np * sizeof(float4);

  // memory allocation
  float4 *r = (float4 *)malloc(memSize); // rx, ry, rz, type(0, 1, 2 ...)
  float4 *v = (float4 *)malloc(memSize); // vx, vy, vz, mass
  float4 *f = (float4 *)malloc(memSize); // fx, fy, fz, potential
  float *info =
      (float *)malloc(16 * sizeof(float)); // temperature, potential, energy ...

  float4 *r_d = NULL;
  float4 *v_d = NULL;
  float4 *f_d = NULL;
  float *info_d = NULL;
  float2 *scratch_d = NULL;
  // memory allocation in GPU memory
  cudaMalloc((void **)&r_d, memSize);
  cudaMalloc((void **)&v_d, memSize);
  cudaMalloc((void **)&f_d, memSize);
  cudaMalloc((void **)&info_d, 16 * sizeof(float));
  cudaMalloc((void **)&scratch_d, nblocks * sizeof(float));

  // trajectory file in XYZ format that can be open by VMD
  FILE *traj = fopen("traj.cu.xyz", "w");

  /* generate system information */
  printf("Starting simulation with %d atoms for %d steps.\n", np, nsteps);
  printf("Generating system.\n");

  // initiate some particles in box
  init(np, r, v, box, min_dis);

  // copy location and velocity into GPU memory
  cudaMemcpy(r_d, r, memSize, cudaMemcpyHostToDevice);
  cudaMemcpy(v_d, v, memSize, cudaMemcpyHostToDevice);
  checkCUDAError("cudaMemcpy");

  // get start time
  gettimeofday(&start, NULL);

  /* main MD loop */
  printf("Running simulation.\n");
  for (unsigned int step = 0; step <= nsteps; step++) // running simulation loop
  {
    /* first integration for velverlet */
    first_integration(np, dt, box, r_d, v_d, f_d, nthreads);

    /* force calculation */
    force_calculation(np, box, lj1, lj2, r_d, f_d, rcut * rcut, nthreads);

    /* compute temperature and potential */
    compute_info(np, v_d, f_d, info_d, scratch_d, nthreads, nblocks);

    /* second integration for velverlet */
    second_integration(np, dt, v_d, f_d, nthreads);

    /* write output frames and system information, if requested */
    if ((step % nprint) == 0) {
      cudaMemcpy(r, r_d, memSize, cudaMemcpyDeviceToHost);
      cudaMemcpy(info, info_d, 16 * sizeof(float), cudaMemcpyDeviceToHost);
      checkCUDAError("cudaMemcpy");
      output(traj, step, info, r, np);
      printf("time step %d \n", step);
    }
  }

  gettimeofday(&end, NULL); // get end time
  long timeusr =
      (end.tv_sec - start.tv_sec) * 1000000 + (end.tv_usec - start.tv_usec);
  printf("time is %ld  microseconds\n",
         timeusr); // the spending time on simulation in microseconds

  // free memories and close files
  fclose(traj);
  free(r);
  free(v);
  free(f);
  free(info);
  cudaFree(r_d);
  cudaFree(v_d);
  cudaFree(f_d);
  cudaFree(info_d);
  cudaFree(scratch_d);
  return 0;
}

	.file	"tmpxft_00322de3_00000000-6_md.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2039:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2039:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Cuda error: %s: %s.\n"
	.text
	.globl	_Z14checkCUDAErrorPKc
	.type	_Z14checkCUDAErrorPKc, @function
_Z14checkCUDAErrorPKc:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	call	cudaGetLastError@PLT
	testl	%eax, %eax
	je	.L2
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	movq	stderr(%rip), %rdi
	movq	%rbx, %rcx
	leaq	.LC0(%rip), %rdx
	movq	%rax, %r8
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	orl	$-1, %edi
	call	exit@PLT
.L2:
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z14checkCUDAErrorPKc, .-_Z14checkCUDAErrorPKc
	.globl	_Z3pbcff
	.type	_Z3pbcff, @function
_Z3pbcff:
.LFB2028:
	.cfi_startproc
	endbr64
	movss	.LC1(%rip), %xmm2
	mulss	%xmm1, %xmm2
	comiss	%xmm2, %xmm0
	jbe	.L13
	subss	%xmm1, %xmm0
	ret
.L13:
	xorps	.LC2(%rip), %xmm2
	comiss	%xmm0, %xmm2
	jbe	.L9
	addss	%xmm1, %xmm0
.L9:
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z3pbcff, .-_Z3pbcff
	.globl	_Z3R2Sv
	.type	_Z3R2Sv, @function
_Z3R2Sv:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC3(%rip), %xmm0
	popq	%rdx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z3R2Sv, .-_Z3R2Sv
	.globl	_Z4initjP6float4S0_6float3f
	.type	_Z4initjP6float4S0_6float3f, @function
_Z4initjP6float4S0_6float3f:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rsi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	xorl	%r13d, %r13d
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rdx, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movl	%edi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	salq	$4, %rbp
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movq	%xmm0, 32(%rsp)
	movss	32(%rsp), %xmm6
	movss	36(%rsp), %xmm7
	movss	%xmm1, 4(%rsp)
	movss	%xmm2, 28(%rsp)
	movss	%xmm1, 40(%rsp)
	movss	%xmm6, 20(%rsp)
	movss	%xmm7, 24(%rsp)
.L17:
	cmpq	%rbp, %r13
	je	.L32
.L19:
	call	_Z3R2Sv
	cvtss2sd	20(%rsp), %xmm1
	movq	%r14, %rbx
	leaq	(%r14,%r13), %r15
	cvtss2sd	%xmm0, %xmm0
	subsd	.LC6(%rip), %xmm0
	mulsd	%xmm1, %xmm0
	cvtsd2ss	%xmm0, %xmm5
	movss	%xmm5, 8(%rsp)
	call	_Z3R2Sv
	cvtss2sd	24(%rsp), %xmm1
	cvtss2sd	%xmm0, %xmm0
	subsd	.LC6(%rip), %xmm0
	mulsd	%xmm1, %xmm0
	cvtsd2ss	%xmm0, %xmm6
	movss	%xmm6, 12(%rsp)
	call	_Z3R2Sv
	cvtss2sd	4(%rsp), %xmm1
	cvtss2sd	%xmm0, %xmm0
	subsd	.LC6(%rip), %xmm0
	mulsd	%xmm1, %xmm0
	cvtsd2ss	%xmm0, %xmm7
	movss	%xmm7, 16(%rsp)
.L18:
	cmpq	%r15, %rbx
	je	.L33
	movss	8(%rsp), %xmm0
	subss	(%rbx), %xmm0
	addq	$16, %rbx
	movss	20(%rsp), %xmm1
	call	_Z3pbcff
	movss	24(%rsp), %xmm1
	movaps	%xmm0, %xmm3
	movss	12(%rsp), %xmm0
	subss	-12(%rbx), %xmm0
	mulss	%xmm3, %xmm3
	call	_Z3pbcff
	movss	4(%rsp), %xmm1
	movaps	%xmm0, %xmm4
	movss	16(%rsp), %xmm0
	subss	-8(%rbx), %xmm0
	mulss	%xmm4, %xmm4
	call	_Z3pbcff
	mulss	%xmm0, %xmm0
	addss	%xmm4, %xmm3
	addss	%xmm3, %xmm0
	call	sqrtf@PLT
	movss	28(%rsp), %xmm2
	comiss	%xmm0, %xmm2
	jbe	.L18
	jmp	.L19
.L33:
	call	_Z3R2Sv
	comiss	.LC1(%rip), %xmm0
	movss	.LC4(%rip), %xmm1
	ja	.L34
	movss	.LC5(%rip), %xmm0
.L22:
	movss	8(%rsp), %xmm4
	movss	12(%rsp), %xmm5
	movss	%xmm0, 12(%r14,%r13)
	movss	16(%rsp), %xmm6
	movss	%xmm4, (%r14,%r13)
	movss	%xmm5, 4(%r14,%r13)
	movss	%xmm6, 8(%r14,%r13)
	movss	%xmm1, 12(%r12,%r13)
	addq	$16, %r13
	jmp	.L17
.L34:
	movaps	%xmm1, %xmm0
	jmp	.L22
.L32:
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2030:
	.size	_Z4initjP6float4S0_6float3f, .-_Z4initjP6float4S0_6float3f
	.section	.rodata.str1.1
.LC7:
	.string	"%d\n  step=%d  temp=%20.8f  pot=%20.8f  ener=%20.8f\n"
.LC8:
	.string	"A  %20.8f %20.8f %20.8f\n"
.LC9:
	.string	"B  %20.8f %20.8f %20.8f\n"
	.text
	.globl	_Z6outputP8_IO_FILEjPfP6float4j
	.type	_Z6outputP8_IO_FILEjPfP6float4j, @function
_Z6outputP8_IO_FILEjPfP6float4j:
.LFB2035:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movb	$3, %al
	movq	%rdi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movl	%r8d, %ebp
	movl	%esi, %r8d
	movl	$2, %esi
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	movq	%rcx, %rbx
	cvtss2sd	(%rdx), %xmm0
	movl	%ebp, %ecx
	cvtss2sd	8(%rdx), %xmm2
	cvtss2sd	4(%rdx), %xmm1
	salq	$4, %rbp
	leaq	.LC7(%rip), %rdx
	addq	%rbx, %rbp
	call	__fprintf_chk@PLT
.L36:
	cmpq	%rbp, %rbx
	je	.L46
	movss	12(%rbx), %xmm3
	ucomiss	.LC4(%rip), %xmm3
	movss	(%rbx), %xmm0
	movss	4(%rbx), %xmm1
	movss	8(%rbx), %xmm2
	jp	.L37
	jne	.L37
	leaq	.LC8(%rip), %rdx
	cvtss2sd	%xmm0, %xmm0
	cvtss2sd	%xmm2, %xmm2
	cvtss2sd	%xmm1, %xmm1
	jmp	.L45
.L37:
	ucomiss	.LC5(%rip), %xmm3
	jp	.L39
	jne	.L39
	leaq	.LC9(%rip), %rdx
	cvtss2sd	%xmm0, %xmm0
	cvtss2sd	%xmm2, %xmm2
	cvtss2sd	%xmm1, %xmm1
.L45:
	movl	$2, %esi
	movq	%r12, %rdi
	movb	$3, %al
	call	__fprintf_chk@PLT
.L39:
	addq	$16, %rbx
	jmp	.L36
.L46:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2035:
	.size	_Z6outputP8_IO_FILEjPfP6float4j, .-_Z6outputP8_IO_FILEjPfP6float4j
	.globl	_Z65__device_stub__Z24first_integration_kerneljf6float3P6float4S1_S1_jfR6float3P6float4S2_S2_
	.type	_Z65__device_stub__Z24first_integration_kerneljf6float3P6float4S1_S1_jfR6float3P6float4S2_S2_, @function
_Z65__device_stub__Z24first_integration_kerneljf6float3P6float4S1_S1_jfR6float3P6float4S2_S2_:
.LFB2061:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movl	%edi, 28(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rdx, 16(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, 8(%rsp)
	leaq	48(%rsp), %rcx
	movq	%r8, (%rsp)
	movss	%xmm0, 24(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movq	%rsi, 120(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 136(%rsp)
	movq	%rsp, %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movl	$1, 64(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L47
	pushq	48(%rsp)
	.cfi_def_cfa_offset 184
	leaq	first_integration_kernel(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 192
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L47:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L49
	call	__stack_chk_fail@PLT
.L49:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2061:
	.size	_Z65__device_stub__Z24first_integration_kerneljf6float3P6float4S1_S1_jfR6float3P6float4S2_S2_, .-_Z65__device_stub__Z24first_integration_kerneljf6float3P6float4S1_S1_jfR6float3P6float4S2_S2_
	.globl	first_integration_kernel
	.type	first_integration_kernel, @function
first_integration_kernel:
.LFB2062:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rcx, %r8
	movq	%rdx, %rcx
	movq	%rsi, %rdx
	movq	%rsp, %rax
	movq	%xmm1, (%rsp)
	movq	%rax, %rsi
	movss	%xmm2, 8(%rsp)
	call	_Z65__device_stub__Z24first_integration_kerneljf6float3P6float4S1_S1_jfR6float3P6float4S2_S2_
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2062:
	.size	first_integration_kernel, .-first_integration_kernel
	.section	.rodata.str1.1
.LC10:
	.string	"Kernel execution"
	.text
	.globl	_Z17first_integrationjf6float3P6float4S1_S1_j
	.type	_Z17first_integrationjf6float3P6float4S1_S1_j, @function
_Z17first_integrationjf6float3P6float4S1_S1_j:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movq	%rcx, %r13
	xorl	%r9d, %r9d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rdx, %r12
	xorl	%edx, %edx
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rsi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movl	%edi, %ebx
	subq	$88, %rsp
	.cfi_def_cfa_offset 128
	movss	%xmm0, 12(%rsp)
	movq	%xmm1, 16(%rsp)
	movss	%xmm2, 24(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	movl	%edi, %eax
	movl	%r8d, 48(%rsp)
	divl	%r8d
	xorl	%r8d, %r8d
	incl	%eax
	movl	%eax, 36(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	36(%rsp), %rdi
	movq	%rax, 52(%rsp)
	movl	44(%rsp), %esi
	movl	56(%rsp), %ecx
	movq	48(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	movss	12(%rsp), %xmm0
	testl	%eax, %eax
	jne	.L54
	movq	16(%rsp), %rax
	leaq	60(%rsp), %rsi
	movq	%r13, %r8
	movq	%r12, %rcx
	movq	%rbp, %rdx
	movl	%ebx, %edi
	movq	%rax, 60(%rsp)
	movl	24(%rsp), %eax
	movl	%eax, 68(%rsp)
	call	_Z65__device_stub__Z24first_integration_kerneljf6float3P6float4S1_S1_jfR6float3P6float4S2_S2_
.L54:
	call	cudaDeviceSynchronize@PLT
	movq	72(%rsp), %rax
	subq	%fs:40, %rax
	je	.L55
	call	__stack_chk_fail@PLT
.L55:
	addq	$88, %rsp
	.cfi_def_cfa_offset 40
	leaq	.LC10(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	_Z14checkCUDAErrorPKc
	.cfi_endproc
.LFE2031:
	.size	_Z17first_integrationjf6float3P6float4S1_S1_j, .-_Z17first_integrationjf6float3P6float4S1_S1_j
	.globl	_Z66__device_stub__Z24force_calculation_kernelj6float3S_S_P6float4S1_fjR6float3S0_S0_P6float4S2_f
	.type	_Z66__device_stub__Z24force_calculation_kernelj6float3S_S_P6float4S1_fjR6float3S0_S0_P6float4S2_f, @function
_Z66__device_stub__Z24force_calculation_kernelj6float3S_S_P6float4S1_fjR6float3S0_S0_P6float4S2_f:
.LFB2063:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movl	%edi, 28(%rsp)
	leaq	48(%rsp), %rdi
	movq	%r8, 16(%rsp)
	movq	%r9, 8(%rsp)
	movss	%xmm0, 24(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movq	%rsi, 104(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	24(%rsp), %rax
	movq	%rdx, 112(%rsp)
	leaq	32(%rsp), %rdx
	movq	%rcx, 120(%rsp)
	leaq	40(%rsp), %rcx
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movl	$1, 56(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L58
	pushq	40(%rsp)
	.cfi_def_cfa_offset 184
	leaq	force_calculation_kernel(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 192
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L58:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L60
	call	__stack_chk_fail@PLT
.L60:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2063:
	.size	_Z66__device_stub__Z24force_calculation_kernelj6float3S_S_P6float4S1_fjR6float3S0_S0_P6float4S2_f, .-_Z66__device_stub__Z24force_calculation_kernelj6float3S_S_P6float4S1_fjR6float3S0_S0_P6float4S2_f
	.globl	force_calculation_kernel
	.type	force_calculation_kernel, @function
force_calculation_kernel:
.LFB2064:
	.cfi_startproc
	endbr64
	subq	$56, %rsp
	.cfi_def_cfa_offset 64
	movaps	%xmm0, %xmm7
	movq	%rsi, %r8
	movq	%rdx, %r9
	leaq	32(%rsp), %rsi
	leaq	16(%rsp), %rdx
	movaps	%xmm6, %xmm0
	movq	%rsp, %rcx
	movq	%xmm7, 32(%rsp)
	movss	%xmm1, 40(%rsp)
	movq	%xmm2, 16(%rsp)
	movss	%xmm3, 24(%rsp)
	movq	%xmm4, (%rsp)
	movss	%xmm5, 8(%rsp)
	call	_Z66__device_stub__Z24force_calculation_kernelj6float3S_S_P6float4S1_fjR6float3S0_S0_P6float4S2_f
	addq	$56, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2064:
	.size	force_calculation_kernel, .-force_calculation_kernel
	.globl	_Z17force_calculationj6float3S_S_P6float4S1_fj
	.type	_Z17force_calculationj6float3S_S_P6float4S1_fj, @function
_Z17force_calculationj6float3S_S_P6float4S1_fj:
.LFB2032:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movl	%ecx, %r8d
	xorl	%r9d, %r9d
	movd	%xmm6, %r14d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rdx, %r12
	xorl	%edx, %edx
	sall	$4, %r8d
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movq	%rsi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movl	%edi, %ebx
	subq	$136, %rsp
	.cfi_def_cfa_offset 176
	movq	%xmm0, 32(%rsp)
	movss	%xmm1, 40(%rsp)
	movq	%xmm2, 16(%rsp)
	movss	%xmm3, 24(%rsp)
	movq	%xmm4, (%rsp)
	movss	%xmm5, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	movl	%edi, %eax
	movl	%ecx, 72(%rsp)
	divl	%ecx
	incl	%eax
	movl	%eax, 60(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	60(%rsp), %rdi
	movq	%rax, 76(%rsp)
	movl	68(%rsp), %esi
	movl	80(%rsp), %ecx
	movq	72(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L65
	movq	32(%rsp), %rax
	leaq	108(%rsp), %rcx
	movq	%r12, %r9
	movq	%rbp, %r8
	leaq	96(%rsp), %rdx
	leaq	84(%rsp), %rsi
	movd	%r14d, %xmm0
	movl	%ebx, %edi
	movq	%rax, 84(%rsp)
	movl	40(%rsp), %eax
	movl	%eax, 92(%rsp)
	movq	16(%rsp), %rax
	movq	%rax, 96(%rsp)
	movl	24(%rsp), %eax
	movl	%eax, 104(%rsp)
	movq	(%rsp), %rax
	movq	%rax, 108(%rsp)
	movl	8(%rsp), %eax
	movl	%eax, 116(%rsp)
	call	_Z66__device_stub__Z24force_calculation_kernelj6float3S_S_P6float4S1_fjR6float3S0_S0_P6float4S2_f
.L65:
	call	cudaDeviceSynchronize@PLT
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L66
	call	__stack_chk_fail@PLT
.L66:
	addq	$136, %rsp
	.cfi_def_cfa_offset 40
	leaq	.LC10(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	_Z14checkCUDAErrorPKc
	.cfi_endproc
.LFE2032:
	.size	_Z17force_calculationj6float3S_S_P6float4S1_fj, .-_Z17force_calculationj6float3S_S_P6float4S1_fj
	.globl	_Z56__device_stub__Z25second_integration_kerneljfP6float4S0_jfP6float4S0_
	.type	_Z56__device_stub__Z25second_integration_kerneljfP6float4S0_jfP6float4S0_, @function
_Z56__device_stub__Z25second_integration_kerneljfP6float4S0_jfP6float4S0_:
.LFB2065:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movl	%edi, 28(%rsp)
	leaq	48(%rsp), %rcx
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movss	%xmm0, 24(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L69
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z25second_integration_kerneljfP6float4S0_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L69:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L71
	call	__stack_chk_fail@PLT
.L71:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2065:
	.size	_Z56__device_stub__Z25second_integration_kerneljfP6float4S0_jfP6float4S0_, .-_Z56__device_stub__Z25second_integration_kerneljfP6float4S0_jfP6float4S0_
	.globl	_Z25second_integration_kerneljfP6float4S0_
	.type	_Z25second_integration_kerneljfP6float4S0_, @function
_Z25second_integration_kerneljfP6float4S0_:
.LFB2066:
	.cfi_startproc
	endbr64
	jmp	_Z56__device_stub__Z25second_integration_kerneljfP6float4S0_jfP6float4S0_
	.cfi_endproc
.LFE2066:
	.size	_Z25second_integration_kerneljfP6float4S0_, .-_Z25second_integration_kerneljfP6float4S0_
	.globl	_Z18second_integrationjfP6float4S0_j
	.type	_Z18second_integrationjfP6float4S0_j, @function
_Z18second_integrationjfP6float4S0_j:
.LFB2033:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movl	%edi, %eax
	movq	%rdx, %r12
	xorl	%edx, %edx
	divl	%ecx
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$48, %rsp
	.cfi_def_cfa_offset 80
	movl	%edi, %ebx
	movq	%rsi, %rbp
	xorl	%r9d, %r9d
	movl	%ecx, 36(%rsp)
	xorl	%r8d, %r8d
	movss	%xmm0, 12(%rsp)
	incl	%eax
	movl	%eax, 24(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 28(%rsp)
	movq	24(%rsp), %rdi
	movq	%rax, 40(%rsp)
	movl	32(%rsp), %esi
	movl	44(%rsp), %ecx
	movq	36(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	movss	12(%rsp), %xmm0
	testl	%eax, %eax
	jne	.L75
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movl	%ebx, %edi
	call	_Z56__device_stub__Z25second_integration_kerneljfP6float4S0_jfP6float4S0_
.L75:
	call	cudaDeviceSynchronize@PLT
	addq	$48, %rsp
	.cfi_def_cfa_offset 32
	leaq	.LC10(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	jmp	_Z14checkCUDAErrorPKc
	.cfi_endproc
.LFE2033:
	.size	_Z18second_integrationjfP6float4S0_j, .-_Z18second_integrationjfP6float4S0_j
	.globl	_Z58__device_stub__Z20compute_info_threadsjP6float4S0_P6float2jP6float4S0_P6float2
	.type	_Z58__device_stub__Z20compute_info_threadsjP6float4S0_P6float2jP6float4S0_P6float2, @function
_Z58__device_stub__Z20compute_info_threadsjP6float4S0_P6float2jP6float4S0_P6float2:
.LFB2067:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movl	%edi, 28(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L77
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z20compute_info_threadsjP6float4S0_P6float2(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L77:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L79
	call	__stack_chk_fail@PLT
.L79:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2067:
	.size	_Z58__device_stub__Z20compute_info_threadsjP6float4S0_P6float2jP6float4S0_P6float2, .-_Z58__device_stub__Z20compute_info_threadsjP6float4S0_P6float2jP6float4S0_P6float2
	.globl	_Z20compute_info_threadsjP6float4S0_P6float2
	.type	_Z20compute_info_threadsjP6float4S0_P6float2, @function
_Z20compute_info_threadsjP6float4S0_P6float2:
.LFB2068:
	.cfi_startproc
	endbr64
	jmp	_Z58__device_stub__Z20compute_info_threadsjP6float4S0_P6float2jP6float4S0_P6float2
	.cfi_endproc
.LFE2068:
	.size	_Z20compute_info_threadsjP6float4S0_P6float2, .-_Z20compute_info_threadsjP6float4S0_P6float2
	.globl	_Z49__device_stub__Z19compute_info_blocksjPfP6float2jjPfP6float2j
	.type	_Z49__device_stub__Z19compute_info_blocksjPfP6float2jjPfP6float2j, @function
_Z49__device_stub__Z19compute_info_blocksjPfP6float2jjPfP6float2j:
.LFB2069:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movl	%edi, 28(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 24(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	28(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L82
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z19compute_info_blocksjPfP6float2j(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L82:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L84
	call	__stack_chk_fail@PLT
.L84:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2069:
	.size	_Z49__device_stub__Z19compute_info_blocksjPfP6float2jjPfP6float2j, .-_Z49__device_stub__Z19compute_info_blocksjPfP6float2jjPfP6float2j
	.globl	_Z19compute_info_blocksjPfP6float2j
	.type	_Z19compute_info_blocksjPfP6float2j, @function
_Z19compute_info_blocksjPfP6float2j:
.LFB2070:
	.cfi_startproc
	endbr64
	jmp	_Z49__device_stub__Z19compute_info_blocksjPfP6float2jjPfP6float2j
	.cfi_endproc
.LFE2070:
	.size	_Z19compute_info_blocksjPfP6float2j, .-_Z19compute_info_blocksjPfP6float2j
	.section	.rodata.str1.1
.LC11:
	.string	"kernel execution"
	.text
	.globl	_Z12compute_infojP6float4S0_PfP6float2jj
	.type	_Z12compute_infojP6float4S0_PfP6float2jj, @function
_Z12compute_infojP6float4S0_PfP6float2jj:
.LFB2034:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	%r9d, %eax
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rdx, %r14
	movabsq	$4294967297, %rdx
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rsi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%rcx, %r12
	movl	%r9d, %ecx
	xorl	%r9d, %r9d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	shrl	%ecx
	movq	%r8, %rbp
	leal	0(,%rax,4), %r8d
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movl	%edi, %ebx
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	movl	96(%rsp), %r15d
	movq	%rdx, 12(%rsp)
	movl	%ecx, 20(%rsp)
	movl	16(%rsp), %esi
	movq	%rdx, 24(%rsp)
	movl	28(%rsp), %ecx
	movl	%r15d, 8(%rsp)
	movq	20(%rsp), %rdx
	movq	8(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L88
	movq	%rbp, %rcx
	movq	%r14, %rdx
	movq	%r13, %rsi
	movl	%ebx, %edi
	call	_Z58__device_stub__Z20compute_info_threadsjP6float4S0_P6float2jP6float4S0_P6float2
.L88:
	call	cudaDeviceSynchronize@PLT
	leaq	.LC11(%rip), %r13
	movq	%r13, %rdi
	call	_Z14checkCUDAErrorPKc
	movl	28(%rsp), %ecx
	movl	16(%rsp), %esi
	xorl	%r9d, %r9d
	movl	$1, 8(%rsp)
	movq	8(%rsp), %rdi
	movl	$4096, %r8d
	movl	$512, 20(%rsp)
	movq	20(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L89
	movl	%r15d, %ecx
	movq	%rbp, %rdx
	movq	%r12, %rsi
	movl	%ebx, %edi
	call	_Z49__device_stub__Z19compute_info_blocksjPfP6float2jjPfP6float2j
.L89:
	call	cudaDeviceSynchronize@PLT
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	movq	%r13, %rdi
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z14checkCUDAErrorPKc
	.cfi_endproc
.LFE2034:
	.size	_Z12compute_infojP6float4S0_PfP6float2jj, .-_Z12compute_infojP6float4S0_PfP6float2jj
	.section	.rodata.str1.1
.LC14:
	.string	"w"
.LC15:
	.string	"traj.cu.xyz"
.LC16:
	.string	"Starting simulation with %d atoms for %d steps.\n"
.LC17:
	.string	"Generating system.\n"
.LC19:
	.string	"cudaMemcpy"
.LC20:
	.string	"Running simulation.\n"
.LC23:
	.string	"time step %d \n"
.LC24:
	.string	"time is %ld  microseconds\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2036:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	xorl	%edi, %edi
	xorl	%r14d, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	addq	$-128, %rsp
	.cfi_def_cfa_offset 176
	movss	.LC13(%rip), %xmm0
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	movabsq	$4715268810954768384, %rax
	movl	$0x41700000, 60(%rsp)
	movss	%xmm0, 72(%rsp)
	movss	%xmm0, 84(%rsp)
	movq	%rax, 52(%rsp)
	movabsq	$4611686019509518336, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	call	cudaSetDevice@PLT
	movl	$43200, %edi
	call	malloc@PLT
	movl	$43200, %edi
	movq	%rax, %rbx
	call	malloc@PLT
	movl	$64, %edi
	movq	%rax, %r12
	call	malloc@PLT
	xorl	%esi, %esi
	leaq	8(%rsp), %rdi
	movq	%rsi, 8(%rsp)
	movq	%rax, %rbp
	movq	%rsi, 16(%rsp)
	movq	%rsi, 24(%rsp)
	movq	%rsi, 32(%rsp)
	movq	%rsi, 40(%rsp)
	movl	$43200, %esi
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$43200, %esi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$43200, %esi
	call	cudaMalloc@PLT
	leaq	32(%rsp), %rdi
	movl	$64, %esi
	call	cudaMalloc@PLT
	leaq	40(%rsp), %rdi
	movl	$172, %esi
	call	cudaMalloc@PLT
	leaq	.LC14(%rip), %rsi
	leaq	.LC15(%rip), %rdi
	call	fopen@PLT
	movl	$500, %ecx
	movl	$2700, %edx
	leaq	.LC16(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %r13
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC17(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%r12, %rdx
	movq	%rbx, %rsi
	movl	$2700, %edi
	movss	.LC18(%rip), %xmm2
	movq	52(%rsp), %xmm0
	movss	60(%rsp), %xmm1
	call	_Z4initjP6float4S0_6float3f
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$43200, %edx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$43200, %edx
	call	cudaMemcpy@PLT
	leaq	.LC19(%rip), %rdi
	call	_Z14checkCUDAErrorPKc
	leaq	88(%rsp), %rdi
	xorl	%esi, %esi
	call	gettimeofday@PLT
	leaq	.LC20(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L93:
	movq	24(%rsp), %rcx
	movq	16(%rsp), %rdx
	movl	$64, %r8d
	movl	$2700, %edi
	movq	8(%rsp), %rsi
	movq	52(%rsp), %xmm1
	movss	60(%rsp), %xmm2
	movss	.LC21(%rip), %xmm0
	call	_Z17first_integrationjf6float3P6float4S1_S1_j
	movss	84(%rsp), %xmm5
	movq	24(%rsp), %rdx
	movl	$64, %ecx
	movq	76(%rsp), %xmm4
	movq	64(%rsp), %xmm2
	movl	$2700, %edi
	movss	72(%rsp), %xmm3
	movq	52(%rsp), %xmm0
	movss	60(%rsp), %xmm1
	movq	8(%rsp), %rsi
	movss	.LC22(%rip), %xmm6
	call	_Z17force_calculationj6float3S_S_P6float4S1_fj
	movl	$64, %r9d
	movl	$2700, %edi
	pushq	%rax
	.cfi_def_cfa_offset 184
	pushq	$43
	.cfi_def_cfa_offset 192
	movq	56(%rsp), %r8
	movq	32(%rsp), %rsi
	movq	48(%rsp), %rcx
	movq	40(%rsp), %rdx
	call	_Z12compute_infojP6float4S0_PfP6float2jj
	popq	%rdx
	.cfi_def_cfa_offset 184
	popq	%rcx
	.cfi_def_cfa_offset 176
	movl	$2700, %edi
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movl	$64, %ecx
	movss	.LC21(%rip), %xmm0
	call	_Z18second_integrationjfP6float4S0_j
	movl	$100, %ecx
	movl	%r14d, %eax
	xorl	%edx, %edx
	divl	%ecx
	testl	%edx, %edx
	jne	.L92
	movq	8(%rsp), %rsi
	movl	$2, %ecx
	movl	$43200, %edx
	movq	%rbx, %rdi
	call	cudaMemcpy@PLT
	movq	32(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbp, %rdi
	movl	$64, %edx
	call	cudaMemcpy@PLT
	leaq	.LC19(%rip), %rdi
	call	_Z14checkCUDAErrorPKc
	movq	%rbp, %rdx
	movl	%r14d, %esi
	movq	%r13, %rdi
	movl	$2700, %r8d
	movq	%rbx, %rcx
	call	_Z6outputP8_IO_FILEjPfP6float4j
	movl	%r14d, %edx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC23(%rip), %rsi
	call	__printf_chk@PLT
.L92:
	incl	%r14d
	cmpl	$501, %r14d
	jne	.L93
	xorl	%esi, %esi
	leaq	104(%rsp), %rdi
	call	gettimeofday@PLT
	movq	104(%rsp), %rdx
	subq	88(%rsp), %rdx
	xorl	%eax, %eax
	leaq	.LC24(%rip), %rsi
	movl	$2, %edi
	imulq	$1000000, %rdx, %rdx
	addq	112(%rsp), %rdx
	subq	96(%rsp), %rdx
	call	__printf_chk@PLT
	movq	%r13, %rdi
	call	fclose@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L94
	call	__stack_chk_fail@PLT
.L94:
	subq	$-128, %rsp
	.cfi_def_cfa_offset 48
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2036:
	.size	main, .-main
	.section	.rodata.str1.1
.LC25:
	.string	"_Z19compute_info_blocksjPfP6float2j"
.LC26:
	.string	"_Z20compute_info_threadsjP6float4S0_P6float2"
.LC27:
	.string	"_Z25second_integration_kerneljfP6float4S0_"
.LC28:
	.string	"force_calculation_kernel"
.LC29:
	.string	"first_integration_kernel"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2072:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC25(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z19compute_info_blocksjPfP6float2j(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC26(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z20compute_info_threadsjP6float4S0_P6float2(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC27(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z25second_integration_kerneljfP6float4S0_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC28(%rip), %rdx
	orl	$-1, %r8d
	leaq	force_calculation_kernel(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC29(%rip), %rdx
	orl	$-1, %r8d
	leaq	first_integration_kernel(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2072:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC1:
	.long	1056964608
	.section	.rodata.cst16,"aM",@progbits,16
	.align 16
.LC2:
	.long	-2147483648
	.long	0
	.long	0
	.long	0
	.section	.rodata.cst4
	.align 4
.LC3:
	.long	805306368
	.align 4
.LC4:
	.long	1065353216
	.align 4
.LC5:
	.long	1073741824
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC6:
	.long	0
	.long	1071644672
	.section	.rodata.cst4
	.align 4
.LC13:
	.long	1082130432
	.align 4
.LC18:
	.long	1063675494
	.align 4
.LC21:
	.long	981668463
	.align 4
.LC22:
	.long	1091567616
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/*  Molecular dynamics simulation linear code for binary Lennard-Jones liquid
   under NVE ensemble; Author: You-Liang Zhu, Email: youliangzhu@ciac.ac.cn
    Copyright: You-Liang Zhu
    This code is free: you can redistribute it and/or modify it under the terms
   of the GNU General Public License.*/
#include <ctype.h>
#include <hip/hip_runtime.h>
#include <math.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <sys/time.h>

// catch the error thrown by CUDA
void checkCUDAError(const char *msg) {
  hipError_t err = hipGetLastError();
  if (hipSuccess != err) {
    fprintf(stderr, "Cuda error: %s: %s.\n", msg, hipGetErrorString(err));
    exit(-1);
  }
}

// implement periodic boundary condition
__host__ __device__ float pbc(float x, float box_len) {
  float box_half = box_len * 0.5;
  if (x > box_half)
    x -= box_len;
  else if (x < -box_half)
    x += box_len;
  return x;
}

// random number generator [0.0-1.0)
float R2S() {
  int ran = rand();
  float fran = (float)ran / (float)RAND_MAX;
  return fran;
}

// initially generate the position and mass of particles
void init(unsigned int np, float4 *r, float4 *v, float3 box, float min_dis) {
  for (unsigned int i = 0; i < np; i++) {
    bool find_pos = false;
    float4 ri;
    while (!find_pos) {
      ri.x = (R2S() - 0.5) * box.x;
      ri.y = (R2S() - 0.5) * box.y;
      ri.z = (R2S() - 0.5) * box.z;
      find_pos = true;

      for (unsigned int j = 0; j < i; j++) {
        float dx = pbc(ri.x - r[j].x, box.x);
        float dy = pbc(ri.y - r[j].y, box.y);
        float dz = pbc(ri.z - r[j].z, box.z);
        float r = sqrt(dx * dx + dy * dy + dz * dz);
        // a minimum safe distance to avoid the overlap of LJ particles
        if (r < min_dis) {
          find_pos = false;
          break;
        }
      }
    }
    // randomly generate the type of particle, 1.0 represent type A and 2.0
    // represent type B
    ri.w = R2S() > 0.5 ? 1.0 : 2.0;

    r[i] = ri;
    v[i].w = 1.0;
  }
}

// first step integration of velocity verlet algorithm
extern "C" __global__ void first_integration_kernel(unsigned int np, float dt,
                                                    float3 box, float4 *r,
                                                    float4 *v, float4 *f) {
  // calculate the global index of thread
  int i = blockIdx.x * blockDim.x + threadIdx.x;
  if (i < np) {
    float4 ri = r[i];
    float mass = v[i].w;

    v[i].x += 0.5 * dt * f[i].x / mass;
    v[i].y += 0.5 * dt * f[i].y / mass;
    v[i].z += 0.5 * dt * f[i].z / mass;

    ri.x += dt * v[i].x;
    ri.y += dt * v[i].y;
    ri.z += dt * v[i].z;

    r[i].x = pbc(ri.x, box.x);
    r[i].y = pbc(ri.y, box.y);
    r[i].z = pbc(ri.z, box.z);
  }
}

void first_integration(unsigned int np, float dt, float3 box, float4 *r,
                       float4 *v, float4 *f, unsigned int nthreads) {
  dim3 grid((np / nthreads) + 1, 1, 1);
  dim3 block(nthreads, 1, 1);

  first_integration_kernel<<<grid, block>>>(np, dt, box, r, v, f);
  // block until the device has complete
  hipDeviceSynchronize();

  // check if kernel function execution throw out an error
  checkCUDAError("Kernel execution");
}

// non-bonded force calculation
extern "C" __global__ void force_calculation_kernel(unsigned int np, float3 box,
                                                    float3 lj1, float3 lj2,
                                                    float4 *r, float4 *f,
                                                    float rcutsq) {
  // declare an shared array
  extern __shared__ float4 spos[];
  // declare i for global thread index
  int i = blockIdx.x * blockDim.x + threadIdx.x;

  float4 force = make_float4(0.0, 0.0, 0.0, 0.0);
  float4 ri = make_float4(0.0, 0.0, 0.0, 0.0);

  // if index is less than the index of particles
  if (i < np)
    ri = r[i];

  // copy data from global memory to shared memory by one block of data at a
  // time
  for (int start = 0; start < np; start += blockDim.x) {
    float4 pos = make_float4(0.0, 0.0, 0.0, 0.0);
    // the thread with ID x will copy the data with global ID
    // (threadIdx.x + start)th to its block's shared memory
    if (start + threadIdx.x < np)
      pos = r[start + threadIdx.x];
    __syncthreads();
    spos[threadIdx.x] = pos;
    __syncthreads();

    // end_offset is the biggest offset of last block
    int end_offset = min(blockDim.x, np - start);

    if (i < np) {
      for (unsigned int offset = 0; offset < end_offset; offset++) {
        int j = start + offset;

        /* particles have no interactions with themselves */
        if (i == j)
          continue;

        float4 rj = spos[offset];

        /* calculated the shortest distance between particle i and j */
        float dx = pbc(ri.x - rj.x, box.x);
        float dy = pbc(ri.y - rj.y, box.y);
        float dz = pbc(ri.z - rj.z, box.z);
        float type = ri.w + rj.w;

        float rsq = dx * dx + dy * dy + dz * dz;

        /* compute force and energy if within cutoff */
        if (rsq < rcutsq) {
          float lj1_ij, lj2_ij;
          if (type == 2.0) // i=1.0, j=1.0
          {
            lj1_ij = lj1.x;
            lj2_ij = lj2.x;
          } else if (type == 3.0) // i=1.0, j=2.0; or i=2.0, j=1.0
          {
            lj1_ij = lj1.y;
            lj2_ij = lj2.y;
          } else if (type == 4.0) // i=2.0, j=2.0
          {
            lj1_ij = lj1.z;
            lj2_ij = lj2.z;
          }

          // force transform to float is necessary here
          // float calculation is much faster than double
          float r2inv = float(1.0) / rsq;
          float r6inv = r2inv * r2inv * r2inv;

          float ffac = r2inv * r6inv *
                       (float(12.0) * lj1_ij * r6inv - float(6.0) * lj2_ij);
          float epot = r6inv * (lj1_ij * r6inv - lj2_ij);

          force.x += ffac * dx;
          force.y += ffac * dy;
          force.z += ffac * dz;
          force.w += epot;
        }
      }
    }
  }
  if (i < np)
    f[i] = force;
}

void force_calculation(unsigned int np, float3 box, float3 lj1, float3 lj2,
                       float4 *r, float4 *f, float rcutsq,
                       unsigned int nthreads) {
  dim3 grid((np / nthreads) + 1, 1, 1);
  dim3 block(nthreads, 1, 1);

  unsigned int shared_bytes = nthreads * sizeof(float4);
  force_calculation_kernel<<<grid, block, shared_bytes>>>(np, box, lj1, lj2, r,
                                                          f, rcutsq);
  hipDeviceSynchronize();
  checkCUDAError("Kernel execution");
}

// second step integration of velocity verlet algorithm
__global__ void second_integration_kernel(unsigned int np, float dt, float4 *v,
                                          float4 *f) {
  int i = blockIdx.x * blockDim.x + threadIdx.x;
  if (i < np) {
    float mass = v[i].w;
    v[i].x += 0.5 * dt * f[i].x / mass;
    v[i].y += 0.5 * dt * f[i].y / mass;
    v[i].z += 0.5 * dt * f[i].z / mass;
  }
}

void second_integration(unsigned int np, float dt, float4 *v, float4 *f,
                        unsigned int nthreads) {
  dim3 grid((np / nthreads) + 1, 1, 1);
  dim3 block(nthreads, 1, 1);

  second_integration_kernel<<<grid, block>>>(np, dt, v, f);

  hipDeviceSynchronize();
  checkCUDAError("Kernel execution");
}

// system information collection for temperature, kinetic energy, potential and
// total energy
__global__ void compute_info_threads(unsigned int np, float4 *v, float4 *f,
                                     float2 *scratch) {
  extern __shared__ float2 sdata[];
  int i = blockIdx.x * blockDim.x * 2 + threadIdx.x;

  float2 temp = make_float2(0.0, 0.0);
  if (i < np) {
    float4 vi = v[i];
    temp.x = vi.w * (vi.x * vi.x + vi.y * vi.y + vi.z * vi.z);
    temp.y = f[i].w;
  }

  if (i + blockDim.x < np) {
    float4 vi = v[i + blockDim.x];
    temp.x += vi.w * (vi.x * vi.x + vi.y * vi.y + vi.z * vi.z);
    temp.y += f[i + blockDim.x].w;
  }

  sdata[threadIdx.x] = temp;
  __syncthreads();

  // divide and rule
  int offset = blockDim.x >> 1;
  while (offset > 0) {
    if (threadIdx.x < offset) {
      sdata[threadIdx.x].x += sdata[threadIdx.x + offset].x;
      sdata[threadIdx.x].y += sdata[threadIdx.x + offset].y;
    }
    offset >>= 1;
    __syncthreads();
  }

  if (threadIdx.x == 0) {
    scratch[blockIdx.x].x = sdata[0].x;
    scratch[blockIdx.x].y = sdata[0].y;
  }
}

__global__ void compute_info_blocks(unsigned int np, float *info,
                                    float2 *scratch, unsigned int nblocks) {
  extern __shared__ float2 sdata[];
  float2 final_sum = make_float2(0.0, 0.0);

  for (int start = 0; start < nblocks; start += blockDim.x * 2) {
    float2 temp = make_float2(0.0, 0.0);
    if (start + threadIdx.x < nblocks) {
      temp.x = scratch[start + threadIdx.x].x;
      temp.y = scratch[start + threadIdx.x].y;
      if (start + threadIdx.x + blockDim.x < nblocks) {
        temp.x = scratch[start + threadIdx.x + blockDim.x].x;
        temp.y = scratch[start + threadIdx.x + blockDim.x].y;
      }
    }

    sdata[threadIdx.x] = temp;
    __syncthreads();

    int offset = blockDim.x >> 1;
    while (offset > 0) {
      if (threadIdx.x < offset) {
        sdata[threadIdx.x].x += sdata[threadIdx.x + offset].x;
        sdata[threadIdx.x].y += sdata[threadIdx.x + offset].y;
      }
      offset >>= 1;
      __syncthreads();
    }

    if (threadIdx.x == 0) {
      final_sum.x += sdata[0].x;
      final_sum.y += sdata[0].y;
    }
  }

  if (threadIdx.x == 0) {
    float ekin = 0.5 * final_sum.x;
    float potential = 0.5 * final_sum.y;
    unsigned int nfreedom = 3 * np - 3;
    float temper = 2.0 * ekin / float(nfreedom);
    float energy = ekin + potential;

    info[0] = temper;
    info[1] = potential;
    info[2] = energy;
  }
}

void compute_info(unsigned int np, float4 *v, float4 *f, float *info,
                  float2 *scratch, unsigned int nthreads,
                  unsigned int nblocks) {
  dim3 grid(nblocks, 1, 1);
  dim3 block(nthreads >> 1, 1, 1);
  unsigned int shared_bytes = sizeof(float2) * nthreads >> 1;

  compute_info_threads<<<grid, block, shared_bytes>>>(np, v, f, scratch);
  hipDeviceSynchronize();
  checkCUDAError("kernel execution");

  int offset = 0;
  int temp = nblocks;
  while (temp > 0) {
    temp >>= 1;
    offset += 1;
  }
  unsigned int final_nthreads = 512;
  shared_bytes = sizeof(float2) * final_nthreads;
  grid = dim3(1, 1, 1);
  block = dim3(final_nthreads, 1, 1);

  compute_info_blocks<<<grid, block, shared_bytes>>>(np, info, scratch,
                                                     nblocks);
  hipDeviceSynchronize();
  checkCUDAError("kernel execution");
}

// output system information and frame in XYZ formation which can be read by VMD
void output(FILE *traj, unsigned int step, float *info, float4 *r,
            unsigned int np) {
  float temp = info[0];
  float potential = info[1];
  float energy = info[2];

  fprintf(traj, "%d\n  step=%d  temp=%20.8f  pot=%20.8f  ener=%20.8f\n", np,
          step, temp, potential, energy);
  for (unsigned int i = 0; i < np; i++) {
    float4 ri = r[i];
    if (ri.w == 1.0)
      fprintf(traj, "A  %20.8f %20.8f %20.8f\n", ri.x, ri.y, ri.z);
    else if (ri.w == 2.0)
      fprintf(traj, "B  %20.8f %20.8f %20.8f\n", ri.x, ri.y, ri.z);
  }
}

// main function
int main(int argc, char **argv) {
  // running parameters
  unsigned int np = 2700;    // the number of particles
  unsigned int nsteps = 500; // the number of time steps
  float dt = 0.001;          // integration time step
  float rcut = 3.0;          // the cutoff radius of interactions
  // float temperature = 1.0;// target temperature
  unsigned int nprint = 100; //  period for data output

  timeval start; // start time
  timeval end;   // end time

  // box size in x, y, and z directions
  float3 box = make_float3(15.0, 15.0, 15.0);
  // epsilon.x for type 1.0 and 1.0; epsilon.y for
  // type 1.0 and 2.0; epsilon.z for type 1.0 and 2.0
  float3 epsilon = make_float3(1.0, 0.5, 1.0);
  // sigma.x for type 1.0 and 1.0; sigma.y for
  // type 1.0 and 2.0; sigma.z for type 1.0 and 2.0
  float3 sigma = make_float3(1.0, 1.0, 1.0);
  // the minimum distance between particles for system generation
  float min_dis = sigma.x * 0.9;

  float3 lj1, lj2;

  // calculate these constants firstly
  lj1.x = 4.0 * epsilon.x * pow(sigma.x, int(12));
  lj1.y = 4.0 * epsilon.y * pow(sigma.y, int(12));
  lj1.z = 4.0 * epsilon.z * pow(sigma.z, int(12));

  lj2.x = 4.0 * epsilon.x * pow(sigma.x, int(6));
  lj2.y = 4.0 * epsilon.y * pow(sigma.y, int(6));
  lj2.z = 4.0 * epsilon.z * pow(sigma.z, int(6));

  // announce GPU device ID
  hipSetDevice(0);

  // number of threads per block
  unsigned int nthreads = 64;
  // number of blocks
  unsigned int nblocks = (int)ceil((float)np / (float)nthreads);
  // memory size
  size_t memSize = np * sizeof(float4);

  // memory allocation
  float4 *r = (float4 *)malloc(memSize); // rx, ry, rz, type(0, 1, 2 ...)
  float4 *v = (float4 *)malloc(memSize); // vx, vy, vz, mass
  float4 *f = (float4 *)malloc(memSize); // fx, fy, fz, potential
  float *info =
      (float *)malloc(16 * sizeof(float)); // temperature, potential, energy ...

  float4 *r_d = NULL;
  float4 *v_d = NULL;
  float4 *f_d = NULL;
  float *info_d = NULL;
  float2 *scratch_d = NULL;
  // memory allocation in GPU memory
  hipMalloc((void **)&r_d, memSize);
  hipMalloc((void **)&v_d, memSize);
  hipMalloc((void **)&f_d, memSize);
  hipMalloc((void **)&info_d, 16 * sizeof(float));
  hipMalloc((void **)&scratch_d, nblocks * sizeof(float));

  // trajectory file in XYZ format that can be open by VMD
  FILE *traj = fopen("traj.cu.xyz", "w");

  /* generate system information */
  printf("Starting simulation with %d atoms for %d steps.\n", np, nsteps);
  printf("Generating system.\n");

  // initiate some particles in box
  init(np, r, v, box, min_dis);

  // copy location and velocity into GPU memory
  hipMemcpy(r_d, r, memSize, hipMemcpyHostToDevice);
  hipMemcpy(v_d, v, memSize, hipMemcpyHostToDevice);
  checkCUDAError("hipMemcpy");

  // get start time
  gettimeofday(&start, NULL);

  /* main MD loop */
  printf("Running simulation.\n");
  for (unsigned int step = 0; step <= nsteps; step++) // running simulation loop
  {
    /* first integration for velverlet */
    first_integration(np, dt, box, r_d, v_d, f_d, nthreads);

    /* force calculation */
    force_calculation(np, box, lj1, lj2, r_d, f_d, rcut * rcut, nthreads);

    /* compute temperature and potential */
    compute_info(np, v_d, f_d, info_d, scratch_d, nthreads, nblocks);

    /* second integration for velverlet */
    second_integration(np, dt, v_d, f_d, nthreads);

    /* write output frames and system information, if requested */
    if ((step % nprint) == 0) {
      hipMemcpy(r, r_d, memSize, hipMemcpyDeviceToHost);
      hipMemcpy(info, info_d, 16 * sizeof(float), hipMemcpyDeviceToHost);
      checkCUDAError("hipMemcpy");
      output(traj, step, info, r, np);
      printf("time step %d \n", step);
    }
  }

  gettimeofday(&end, NULL); // get end time
  long timeusr =
      (end.tv_sec - start.tv_sec) * 1000000 + (end.tv_usec - start.tv_usec);
  printf("time is %ld  microseconds\n",
         timeusr); // the spending time on simulation in microseconds

  // free memories and close files
  fclose(traj);
  free(r);
  free(v);
  free(f);
  free(info);
  hipFree(r_d);
  hipFree(v_d);
  hipFree(f_d);
  hipFree(info_d);
  hipFree(scratch_d);
  return 0;
}

	.text
	.file	"md.hip"
	.globl	_Z14checkCUDAErrorPKc           # -- Begin function _Z14checkCUDAErrorPKc
	.type	_Z14checkCUDAErrorPKc,@function
_Z14checkCUDAErrorPKc:                  # @_Z14checkCUDAErrorPKc
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	pushq	%rax
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movq	%rdi, %rbx
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB0_2
# %bb.1:
	addq	$8, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.LBB0_2:
	.cfi_def_cfa_offset 32
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	movq	%r14, %rdi
	movq	%rbx, %rdx
	movq	%rax, %rcx
	xorl	%eax, %eax
	callq	fprintf
	movl	$-1, %edi
	callq	exit
.Lfunc_end0:
	.size	_Z14checkCUDAErrorPKc, .Lfunc_end0-_Z14checkCUDAErrorPKc
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z3pbcff
.LCPI1_0:
	.long	0x3f000000                      # float 0.5
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0
.LCPI1_1:
	.long	0x80000000                      # float -0
	.long	0x80000000                      # float -0
	.long	0x80000000                      # float -0
	.long	0x80000000                      # float -0
	.text
	.globl	_Z3pbcff
	.type	_Z3pbcff,@function
_Z3pbcff:                               # @_Z3pbcff
	.cfi_startproc
# %bb.0:
	movss	.LCPI1_0(%rip), %xmm2           # xmm2 = mem[0],zero,zero,zero
	mulss	%xmm1, %xmm2
	ucomiss	%xmm2, %xmm0
	jbe	.LBB1_2
# %bb.1:
	subss	%xmm1, %xmm0
	retq
.LBB1_2:
	xorps	.LCPI1_1(%rip), %xmm2
	ucomiss	%xmm0, %xmm2
	jbe	.LBB1_4
# %bb.3:
	addss	%xmm1, %xmm0
.LBB1_4:
	retq
.Lfunc_end1:
	.size	_Z3pbcff, .Lfunc_end1-_Z3pbcff
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z3R2Sv
.LCPI2_0:
	.long	0x30000000                      # float 4.65661287E-10
	.text
	.globl	_Z3R2Sv
	.type	_Z3R2Sv,@function
_Z3R2Sv:                                # @_Z3R2Sv
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	rand
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI2_0(%rip), %xmm0
	popq	%rax
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z3R2Sv, .Lfunc_end2-_Z3R2Sv
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z4initjP15HIP_vector_typeIfLj4EES1_S_IfLj3EEf
.LCPI3_0:
	.long	0x3f000000                      # float 0.5
.LCPI3_2:
	.long	0x30000000                      # float 4.65661287E-10
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0
.LCPI3_1:
	.long	0x80000000                      # float -0
	.long	0x80000000                      # float -0
	.long	0x80000000                      # float -0
	.long	0x80000000                      # float -0
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI3_3:
	.quad	0xbfe0000000000000              # double -0.5
.LCPI3_4:
	.long	0x40000000                      # float 2
	.long	0x3f800000                      # float 1
	.text
	.globl	_Z4initjP15HIP_vector_typeIfLj4EES1_S_IfLj3EEf
	.type	_Z4initjP15HIP_vector_typeIfLj4EES1_S_IfLj3EEf,@function
_Z4initjP15HIP_vector_typeIfLj4EES1_S_IfLj3EEf: # @_Z4initjP15HIP_vector_typeIfLj4EES1_S_IfLj3EEf
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$200, %rsp
	.cfi_def_cfa_offset 256
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, 32(%rsp)                  # 8-byte Spill
	testl	%edi, %edi
	je	.LBB3_19
# %bb.1:                                # %.preheader.lr.ph
	movq	%rsi, %r14
	addq	$12, 32(%rsp)                   # 8-byte Folded Spill
	cvtss2sd	%xmm0, %xmm3
	movsd	%xmm3, 56(%rsp)                 # 8-byte Spill
	movaps	%xmm0, %xmm6
	shufps	$85, %xmm0, %xmm6               # xmm6 = xmm6[1,1],xmm0[1,1]
	xorps	%xmm3, %xmm3
	cvtss2sd	%xmm6, %xmm3
	movsd	%xmm3, 48(%rsp)                 # 8-byte Spill
	xorps	%xmm3, %xmm3
	cvtss2sd	%xmm1, %xmm3
	movsd	%xmm3, 40(%rsp)                 # 8-byte Spill
	movss	.LCPI3_0(%rip), %xmm3           # xmm3 = mem[0],zero,zero,zero
	movaps	%xmm0, %xmm7
	mulss	%xmm3, %xmm7
	movaps	.LCPI3_1(%rip), %xmm8           # xmm8 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0]
	movaps	%xmm7, %xmm9
	xorps	%xmm8, %xmm9
	movaps	%xmm6, %xmm10
	mulss	%xmm3, %xmm10
	movaps	%xmm10, %xmm11
	xorps	%xmm8, %xmm11
	movaps	%xmm1, %xmm12
	mulss	%xmm3, %xmm12
	xorps	%xmm12, %xmm8
	movl	%edi, %r12d
	xorl	%r13d, %r13d
	xorl	%ebx, %ebx
	movss	%xmm2, 28(%rsp)                 # 4-byte Spill
	movss	%xmm1, 24(%rsp)                 # 4-byte Spill
	movaps	%xmm0, 176(%rsp)                # 16-byte Spill
	movaps	%xmm6, 160(%rsp)                # 16-byte Spill
	movaps	%xmm7, 144(%rsp)                # 16-byte Spill
	movaps	%xmm8, 128(%rsp)                # 16-byte Spill
	movaps	%xmm9, 112(%rsp)                # 16-byte Spill
	movaps	%xmm10, 96(%rsp)                # 16-byte Spill
	movaps	%xmm11, 80(%rsp)                # 16-byte Spill
	movaps	%xmm12, 64(%rsp)                # 16-byte Spill
.LBB3_2:                                # %._crit_edge
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_5 Depth 2
	callq	rand
	movl	%eax, %ebp
	callq	rand
	movl	%eax, %r15d
	callq	rand
	movaps	64(%rsp), %xmm12                # 16-byte Reload
	movaps	80(%rsp), %xmm11                # 16-byte Reload
	movaps	96(%rsp), %xmm10                # 16-byte Reload
	movaps	112(%rsp), %xmm9                # 16-byte Reload
	movaps	128(%rsp), %xmm8                # 16-byte Reload
	movaps	144(%rsp), %xmm7                # 16-byte Reload
	movaps	160(%rsp), %xmm6                # 16-byte Reload
	movaps	176(%rsp), %xmm0                # 16-byte Reload
	movss	24(%rsp), %xmm1                 # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	movss	28(%rsp), %xmm2                 # 4-byte Reload
                                        # xmm2 = mem[0],zero,zero,zero
	xorps	%xmm3, %xmm3
	cvtsi2ss	%ebp, %xmm3
	movss	.LCPI3_2(%rip), %xmm5           # xmm5 = mem[0],zero,zero,zero
	mulss	%xmm5, %xmm3
	xorps	%xmm4, %xmm4
	cvtss2sd	%xmm3, %xmm4
	movsd	.LCPI3_3(%rip), %xmm13          # xmm13 = mem[0],zero
	addsd	%xmm13, %xmm4
	mulsd	56(%rsp), %xmm4                 # 8-byte Folded Reload
	xorps	%xmm3, %xmm3
	cvtsi2ss	%r15d, %xmm3
	xorps	%xmm14, %xmm14
	cvtsd2ss	%xmm4, %xmm14
	mulss	%xmm5, %xmm3
	cvtss2sd	%xmm3, %xmm3
	addsd	%xmm13, %xmm3
	mulsd	48(%rsp), %xmm3                 # 8-byte Folded Reload
	xorps	%xmm15, %xmm15
	cvtsd2ss	%xmm3, %xmm15
	xorps	%xmm3, %xmm3
	cvtsi2ss	%eax, %xmm3
	mulss	%xmm5, %xmm3
	cvtss2sd	%xmm3, %xmm3
	addsd	%xmm13, %xmm3
	mulsd	40(%rsp), %xmm3                 # 8-byte Folded Reload
	xorps	%xmm13, %xmm13
	cvtsd2ss	%xmm3, %xmm13
	testq	%rbx, %rbx
	je	.LBB3_18
# %bb.3:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB3_2 Depth=1
	xorl	%eax, %eax
.LBB3_5:                                # %.lr.ph
                                        #   Parent Loop BB3_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movaps	%xmm14, %xmm5
	subss	(%r14,%rax), %xmm5
	ucomiss	%xmm7, %xmm5
	jbe	.LBB3_7
# %bb.6:                                #   in Loop: Header=BB3_5 Depth=2
	subss	%xmm0, %xmm5
	jmp	.LBB3_9
.LBB3_7:                                #   in Loop: Header=BB3_5 Depth=2
	ucomiss	%xmm5, %xmm9
	jbe	.LBB3_9
# %bb.8:                                #   in Loop: Header=BB3_5 Depth=2
	addss	%xmm0, %xmm5
.LBB3_9:                                # %_Z3pbcff.exit
                                        #   in Loop: Header=BB3_5 Depth=2
	movaps	%xmm15, %xmm4
	subss	4(%r14,%rax), %xmm4
	ucomiss	%xmm10, %xmm4
	jbe	.LBB3_11
# %bb.10:                               #   in Loop: Header=BB3_5 Depth=2
	subss	%xmm6, %xmm4
	jmp	.LBB3_13
.LBB3_11:                               #   in Loop: Header=BB3_5 Depth=2
	ucomiss	%xmm4, %xmm11
	jbe	.LBB3_13
# %bb.12:                               #   in Loop: Header=BB3_5 Depth=2
	addss	%xmm6, %xmm4
.LBB3_13:                               # %_Z3pbcff.exit37
                                        #   in Loop: Header=BB3_5 Depth=2
	movaps	%xmm13, %xmm3
	subss	8(%r14,%rax), %xmm3
	ucomiss	%xmm12, %xmm3
	jbe	.LBB3_15
# %bb.14:                               #   in Loop: Header=BB3_5 Depth=2
	subss	%xmm1, %xmm3
	jmp	.LBB3_17
.LBB3_15:                               #   in Loop: Header=BB3_5 Depth=2
	ucomiss	%xmm3, %xmm8
	jbe	.LBB3_17
# %bb.16:                               #   in Loop: Header=BB3_5 Depth=2
	addss	%xmm1, %xmm3
.LBB3_17:                               # %_Z3pbcff.exit39
                                        #   in Loop: Header=BB3_5 Depth=2
	mulss	%xmm5, %xmm5
	mulss	%xmm4, %xmm4
	addss	%xmm5, %xmm4
	mulss	%xmm3, %xmm3
	addss	%xmm4, %xmm3
	sqrtss	%xmm3, %xmm3
	ucomiss	%xmm3, %xmm2
	ja	.LBB3_2
# %bb.4:                                #   in Loop: Header=BB3_5 Depth=2
	addq	$16, %rax
	cmpq	%rax, %r13
	jne	.LBB3_5
.LBB3_18:                               # %.loopexit
                                        #   in Loop: Header=BB3_2 Depth=1
	movss	%xmm14, 12(%rsp)                # 4-byte Spill
	movss	%xmm15, 16(%rsp)                # 4-byte Spill
	movss	%xmm13, 20(%rsp)                # 4-byte Spill
	callq	rand
	xorps	%xmm3, %xmm3
	cvtsi2ss	%eax, %xmm3
	mulss	.LCPI3_2(%rip), %xmm3
	xorl	%eax, %eax
	ucomiss	.LCPI3_0(%rip), %xmm3
	seta	%al
	movss	.LCPI3_4(,%rax,4), %xmm3        # xmm3 = mem[0],zero,zero,zero
	movq	%rbx, %rax
	shlq	$4, %rax
	movss	12(%rsp), %xmm4                 # 4-byte Reload
                                        # xmm4 = mem[0],zero,zero,zero
	movss	%xmm4, (%r14,%rax)
	movss	16(%rsp), %xmm4                 # 4-byte Reload
                                        # xmm4 = mem[0],zero,zero,zero
	movss	%xmm4, 4(%r14,%rax)
	movss	20(%rsp), %xmm4                 # 4-byte Reload
                                        # xmm4 = mem[0],zero,zero,zero
	movss	%xmm4, 8(%r14,%rax)
	movss	%xmm3, 12(%r14,%rax)
	movq	32(%rsp), %rcx                  # 8-byte Reload
	movl	$1065353216, (%rcx,%rax)        # imm = 0x3F800000
	incq	%rbx
	addq	$16, %r13
	cmpq	%r12, %rbx
	jne	.LBB3_2
.LBB3_19:                               # %._crit_edge43
	addq	$200, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z4initjP15HIP_vector_typeIfLj4EES1_S_IfLj3EEf, .Lfunc_end3-_Z4initjP15HIP_vector_typeIfLj4EES1_S_IfLj3EEf
	.cfi_endproc
                                        # -- End function
	.globl	__device_stub__first_integration_kernel # -- Begin function __device_stub__first_integration_kernel
	.type	__device_stub__first_integration_kernel,@function
__device_stub__first_integration_kernel: # @__device_stub__first_integration_kernel
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	80(%rsp), %rax
	movlps	%xmm1, (%rax)
	movss	%xmm2, 8(%rax)
	leaq	4(%rsp), %r8
	movl	%edi, (%r8)
	movq	%rsp, %rdi
	movss	%xmm0, (%rdi)
	leaq	40(%rsp), %r9
	movq	%rsi, (%r9)
	leaq	32(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	24(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	96(%rsp), %rbx
	movq	%r8, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rax, 16(%rbx)
	movq	%r9, 24(%rbx)
	movq	%rsi, 32(%rbx)
	movq	%rdx, 40(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$first_integration_kernel, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	__device_stub__first_integration_kernel, .Lfunc_end4-__device_stub__first_integration_kernel
	.cfi_endproc
                                        # -- End function
	.globl	_Z17first_integrationjf15HIP_vector_typeIfLj3EEPS_IfLj4EES2_S2_j # -- Begin function _Z17first_integrationjf15HIP_vector_typeIfLj3EEPS_IfLj4EES2_S2_j
	.type	_Z17first_integrationjf15HIP_vector_typeIfLj3EEPS_IfLj4EES2_S2_j,@function
_Z17first_integrationjf15HIP_vector_typeIfLj3EEPS_IfLj4EES2_S2_j: # @_Z17first_integrationjf15HIP_vector_typeIfLj3EEPS_IfLj4EES2_S2_j
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$40, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rcx, %rbx
	movq	%rdx, %r14
	movq	%rsi, %r15
	movss	%xmm2, 12(%rsp)                 # 4-byte Spill
	movaps	%xmm1, 16(%rsp)                 # 16-byte Spill
	movss	%xmm0, 8(%rsp)                  # 4-byte Spill
	movl	%edi, %ebp
	movl	%edi, %eax
	xorl	%edx, %edx
	divl	%r8d
                                        # kill: def $eax killed $eax def $rax
	leal	1(%rax), %edi
	btsq	$32, %rdi
	movl	%r8d, %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_2
# %bb.1:
	movl	%ebp, %edi
	movss	8(%rsp), %xmm0                  # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movaps	16(%rsp), %xmm1                 # 16-byte Reload
	movss	12(%rsp), %xmm2                 # 4-byte Reload
                                        # xmm2 = mem[0],zero,zero,zero
	movq	%r15, %rsi
	movq	%r14, %rdx
	movq	%rbx, %rcx
	callq	__device_stub__first_integration_kernel
.LBB5_2:
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z14checkCUDAErrorPKc           # TAILCALL
.Lfunc_end5:
	.size	_Z17first_integrationjf15HIP_vector_typeIfLj3EEPS_IfLj4EES2_S2_j, .Lfunc_end5-_Z17first_integrationjf15HIP_vector_typeIfLj3EEPS_IfLj4EES2_S2_j
	.cfi_endproc
                                        # -- End function
	.globl	__device_stub__force_calculation_kernel # -- Begin function __device_stub__force_calculation_kernel
	.type	__device_stub__force_calculation_kernel,@function
__device_stub__force_calculation_kernel: # @__device_stub__force_calculation_kernel
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$192, %rsp
	.cfi_def_cfa_offset 240
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	112(%rsp), %rax
	movlps	%xmm0, (%rax)
	movss	%xmm1, 8(%rax)
	leaq	96(%rsp), %rcx
	movlps	%xmm2, (%rcx)
	movss	%xmm3, 8(%rcx)
	leaq	80(%rsp), %r8
	movlps	%xmm4, (%r8)
	movss	%xmm5, 8(%r8)
	leaq	12(%rsp), %r9
	movl	%edi, (%r9)
	leaq	40(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	32(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	8(%rsp), %rdx
	movss	%xmm6, (%rdx)
	leaq	128(%rsp), %rbx
	movq	%r9, (%rbx)
	movq	%rax, 8(%rbx)
	movq	%rcx, 16(%rbx)
	movq	%r8, 24(%rbx)
	movq	%rdi, 32(%rbx)
	movq	%rsi, 40(%rbx)
	movq	%rdx, 48(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$force_calculation_kernel, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$208, %rsp
	.cfi_adjust_cfa_offset -208
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	__device_stub__force_calculation_kernel, .Lfunc_end6-__device_stub__force_calculation_kernel
	.cfi_endproc
                                        # -- End function
	.globl	_Z17force_calculationj15HIP_vector_typeIfLj3EES0_S0_PS_IfLj4EES2_fj # -- Begin function _Z17force_calculationj15HIP_vector_typeIfLj3EES0_S0_PS_IfLj4EES2_fj
	.type	_Z17force_calculationj15HIP_vector_typeIfLj3EES0_S0_PS_IfLj4EES2_fj,@function
_Z17force_calculationj15HIP_vector_typeIfLj3EES0_S0_PS_IfLj4EES2_fj: # @_Z17force_calculationj15HIP_vector_typeIfLj3EES0_S0_PS_IfLj4EES2_fj
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$64, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	movl	%ecx, %r8d
	movss	%xmm6, 12(%rsp)                 # 4-byte Spill
	movq	%rdx, %rbx
	movq	%rsi, %r14
	movss	%xmm5, 8(%rsp)                  # 4-byte Spill
	movaps	%xmm4, 48(%rsp)                 # 16-byte Spill
	movss	%xmm3, 4(%rsp)                  # 4-byte Spill
	movaps	%xmm2, 32(%rsp)                 # 16-byte Spill
	movss	%xmm1, (%rsp)                   # 4-byte Spill
	movaps	%xmm0, 16(%rsp)                 # 16-byte Spill
	movl	%edi, %ebp
	movl	%edi, %eax
	xorl	%edx, %edx
	divl	%ecx
                                        # kill: def $eax killed $eax def $rax
	leal	1(%rax), %edi
	btsq	$32, %rdi
	movl	%ecx, %edx
	btsq	$32, %rdx
	shll	$4, %r8d
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_2
# %bb.1:
	movl	%ebp, %edi
	movaps	16(%rsp), %xmm0                 # 16-byte Reload
	movss	(%rsp), %xmm1                   # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	movaps	32(%rsp), %xmm2                 # 16-byte Reload
	movss	4(%rsp), %xmm3                  # 4-byte Reload
                                        # xmm3 = mem[0],zero,zero,zero
	movaps	48(%rsp), %xmm4                 # 16-byte Reload
	movss	8(%rsp), %xmm5                  # 4-byte Reload
                                        # xmm5 = mem[0],zero,zero,zero
	movq	%r14, %rsi
	movq	%rbx, %rdx
	movss	12(%rsp), %xmm6                 # 4-byte Reload
                                        # xmm6 = mem[0],zero,zero,zero
	callq	__device_stub__force_calculation_kernel
.LBB7_2:
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %edi
	addq	$64, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z14checkCUDAErrorPKc           # TAILCALL
.Lfunc_end7:
	.size	_Z17force_calculationj15HIP_vector_typeIfLj3EES0_S0_PS_IfLj4EES2_fj, .Lfunc_end7-_Z17force_calculationj15HIP_vector_typeIfLj3EES0_S0_PS_IfLj4EES2_fj
	.cfi_endproc
                                        # -- End function
	.globl	_Z40__device_stub__second_integration_kerneljfP15HIP_vector_typeIfLj4EES1_ # -- Begin function _Z40__device_stub__second_integration_kerneljfP15HIP_vector_typeIfLj4EES1_
	.type	_Z40__device_stub__second_integration_kerneljfP15HIP_vector_typeIfLj4EES1_,@function
_Z40__device_stub__second_integration_kerneljfP15HIP_vector_typeIfLj4EES1_: # @_Z40__device_stub__second_integration_kerneljfP15HIP_vector_typeIfLj4EES1_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	8(%rsp), %rcx
	movss	%xmm0, (%rcx)
	leaq	40(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	32(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rdi, 16(%rbx)
	movq	%rsi, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z25second_integration_kerneljfP15HIP_vector_typeIfLj4EES1_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end8:
	.size	_Z40__device_stub__second_integration_kerneljfP15HIP_vector_typeIfLj4EES1_, .Lfunc_end8-_Z40__device_stub__second_integration_kerneljfP15HIP_vector_typeIfLj4EES1_
	.cfi_endproc
                                        # -- End function
	.globl	_Z18second_integrationjfP15HIP_vector_typeIfLj4EES1_j # -- Begin function _Z18second_integrationjfP15HIP_vector_typeIfLj4EES1_j
	.type	_Z18second_integrationjfP15HIP_vector_typeIfLj4EES1_j,@function
_Z18second_integrationjfP15HIP_vector_typeIfLj4EES1_j: # @_Z18second_integrationjfP15HIP_vector_typeIfLj4EES1_j
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	movq	%rdx, %rbx
	movq	%rsi, %r14
	movss	%xmm0, 12(%rsp)                 # 4-byte Spill
	movl	%edi, %ebp
	movl	%edi, %eax
	xorl	%edx, %edx
	divl	%ecx
                                        # kill: def $eax killed $eax def $rax
	leal	1(%rax), %edi
	btsq	$32, %rdi
	movl	%ecx, %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB9_2
# %bb.1:
	movl	%ebp, %edi
	movss	12(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	movq	%r14, %rsi
	movq	%rbx, %rdx
	callq	_Z40__device_stub__second_integration_kerneljfP15HIP_vector_typeIfLj4EES1_
.LBB9_2:
	callq	hipDeviceSynchronize
	movl	$.L.str.1, %edi
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z14checkCUDAErrorPKc           # TAILCALL
.Lfunc_end9:
	.size	_Z18second_integrationjfP15HIP_vector_typeIfLj4EES1_j, .Lfunc_end9-_Z18second_integrationjfP15HIP_vector_typeIfLj4EES1_j
	.cfi_endproc
                                        # -- End function
	.globl	_Z35__device_stub__compute_info_threadsjP15HIP_vector_typeIfLj4EES1_PS_IfLj2EE # -- Begin function _Z35__device_stub__compute_info_threadsjP15HIP_vector_typeIfLj4EES1_PS_IfLj2EE
	.type	_Z35__device_stub__compute_info_threadsjP15HIP_vector_typeIfLj4EES1_PS_IfLj2EE,@function
_Z35__device_stub__compute_info_threadsjP15HIP_vector_typeIfLj4EES1_PS_IfLj2EE: # @_Z35__device_stub__compute_info_threadsjP15HIP_vector_typeIfLj4EES1_PS_IfLj2EE
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	4(%rsp), %rax
	movl	%edi, (%rax)
	leaq	40(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	32(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	24(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z20compute_info_threadsjP15HIP_vector_typeIfLj4EES1_PS_IfLj2EE, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end10:
	.size	_Z35__device_stub__compute_info_threadsjP15HIP_vector_typeIfLj4EES1_PS_IfLj2EE, .Lfunc_end10-_Z35__device_stub__compute_info_threadsjP15HIP_vector_typeIfLj4EES1_PS_IfLj2EE
	.cfi_endproc
                                        # -- End function
	.globl	_Z34__device_stub__compute_info_blocksjPfP15HIP_vector_typeIfLj2EEj # -- Begin function _Z34__device_stub__compute_info_blocksjPfP15HIP_vector_typeIfLj2EEj
	.type	_Z34__device_stub__compute_info_blocksjPfP15HIP_vector_typeIfLj2EEj,@function
_Z34__device_stub__compute_info_blocksjPfP15HIP_vector_typeIfLj2EEj: # @_Z34__device_stub__compute_info_blocksjPfP15HIP_vector_typeIfLj2EEj
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	12(%rsp), %rax
	movl	%edi, (%rax)
	leaq	40(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	32(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z19compute_info_blocksjPfP15HIP_vector_typeIfLj2EEj, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end11:
	.size	_Z34__device_stub__compute_info_blocksjPfP15HIP_vector_typeIfLj2EEj, .Lfunc_end11-_Z34__device_stub__compute_info_blocksjPfP15HIP_vector_typeIfLj2EEj
	.cfi_endproc
                                        # -- End function
	.globl	_Z12compute_infojP15HIP_vector_typeIfLj4EES1_PfPS_IfLj2EEjj # -- Begin function _Z12compute_infojP15HIP_vector_typeIfLj4EES1_PfPS_IfLj2EEjj
	.type	_Z12compute_infojP15HIP_vector_typeIfLj4EES1_PfPS_IfLj2EEjj,@function
_Z12compute_infojP15HIP_vector_typeIfLj4EES1_PfPS_IfLj2EEjj: # @_Z12compute_infojP15HIP_vector_typeIfLj4EES1_PfPS_IfLj2EEjj
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
                                        # kill: def $r9d killed $r9d def $r9
	movq	%r8, %rbx
	movq	%rcx, (%rsp)                    # 8-byte Spill
	movq	%rdx, %r13
	movq	%rsi, %r14
	movl	%edi, %ebp
	movl	64(%rsp), %r15d
	movabsq	$4294967296, %r12               # imm = 0x100000000
	movq	%r15, %rdi
	btsq	$32, %rdi
	leal	(,%r9,4), %r8d
	movl	%r9d, %edx
	shrl	%edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB12_2
# %bb.1:
	movl	%ebp, %edi
	movq	%r14, %rsi
	movq	%r13, %rdx
	movq	%rbx, %rcx
	callq	_Z35__device_stub__compute_info_threadsjP15HIP_vector_typeIfLj4EES1_PS_IfLj2EE
.LBB12_2:
	callq	hipDeviceSynchronize
	movl	$.L.str.2, %edi
	callq	_Z14checkCUDAErrorPKc
	leaq	1(%r12), %rdi
	addq	$512, %r12                      # imm = 0x200
	movl	$4096, %r8d                     # imm = 0x1000
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB12_4
# %bb.3:
	movl	%ebp, %edi
	movq	(%rsp), %rsi                    # 8-byte Reload
	movq	%rbx, %rdx
	movl	%r15d, %ecx
	callq	_Z34__device_stub__compute_info_blocksjPfP15HIP_vector_typeIfLj2EEj
.LBB12_4:
	callq	hipDeviceSynchronize
	movl	$.L.str.2, %edi
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z14checkCUDAErrorPKc           # TAILCALL
.Lfunc_end12:
	.size	_Z12compute_infojP15HIP_vector_typeIfLj4EES1_PfPS_IfLj2EEjj, .Lfunc_end12-_Z12compute_infojP15HIP_vector_typeIfLj4EES1_PfPS_IfLj2EEjj
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z6outputP8_IO_FILEjPfP15HIP_vector_typeIfLj4EEj
.LCPI13_0:
	.long	0x3f800000                      # float 1
.LCPI13_1:
	.long	0x40000000                      # float 2
	.text
	.globl	_Z6outputP8_IO_FILEjPfP15HIP_vector_typeIfLj4EEj
	.type	_Z6outputP8_IO_FILEjPfP15HIP_vector_typeIfLj4EEj,@function
_Z6outputP8_IO_FILEjPfP15HIP_vector_typeIfLj4EEj: # @_Z6outputP8_IO_FILEjPfP15HIP_vector_typeIfLj4EEj
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r8d, %ebp
	movq	%rcx, %rbx
	movl	%esi, %ecx
	movq	%rdi, %r14
	cvtss2sd	(%rdx), %xmm0
	cvtss2sd	4(%rdx), %xmm1
	cvtss2sd	8(%rdx), %xmm2
	movl	$.L.str.3, %esi
	movl	%r8d, %edx
	movb	$3, %al
	callq	fprintf
	testl	%ebp, %ebp
	je	.LBB13_6
# %bb.1:                                # %.lr.ph.preheader
	movl	%ebp, %r15d
	shlq	$4, %r15
	xorl	%r12d, %r12d
.LBB13_2:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movss	(%rbx,%r12), %xmm0              # xmm0 = mem[0],zero,zero,zero
	movss	4(%rbx,%r12), %xmm1             # xmm1 = mem[0],zero,zero,zero
	movss	8(%rbx,%r12), %xmm2             # xmm2 = mem[0],zero,zero,zero
	movss	12(%rbx,%r12), %xmm3            # xmm3 = mem[0],zero,zero,zero
	movl	$.L.str.4, %esi
	ucomiss	.LCPI13_0(%rip), %xmm3
	jne	.LBB13_3
	jnp	.LBB13_4
.LBB13_3:                               #   in Loop: Header=BB13_2 Depth=1
	movl	$.L.str.5, %esi
	ucomiss	.LCPI13_1(%rip), %xmm3
	jne	.LBB13_5
	jp	.LBB13_5
.LBB13_4:                               # %.sink.split
                                        #   in Loop: Header=BB13_2 Depth=1
	cvtss2sd	%xmm0, %xmm0
	cvtss2sd	%xmm1, %xmm1
	cvtss2sd	%xmm2, %xmm2
	movq	%r14, %rdi
	movb	$3, %al
	callq	fprintf
.LBB13_5:                               #   in Loop: Header=BB13_2 Depth=1
	addq	$16, %r12
	cmpq	%r12, %r15
	jne	.LBB13_2
.LBB13_6:                               # %._crit_edge
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end13:
	.size	_Z6outputP8_IO_FILEjPfP15HIP_vector_typeIfLj4EEj, .Lfunc_end13-_Z6outputP8_IO_FILEjPfP15HIP_vector_typeIfLj4EEj
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0                          # -- Begin function main
.LCPI14_0:
	.long	0x41700000                      # float 15
	.long	0x41700000                      # float 15
	.zero	4
	.zero	4
.LCPI14_4:
	.long	0x40800000                      # float 4
	.long	0x40000000                      # float 2
	.zero	4
	.zero	4
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0
.LCPI14_1:
	.long	0x41700000                      # float 15
.LCPI14_2:
	.long	0x3f666666                      # float 0.899999976
.LCPI14_3:
	.long	0x3a83126f                      # float 0.00100000005
.LCPI14_5:
	.long	0x40800000                      # float 4
.LCPI14_6:
	.long	0x41100000                      # float 9
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	xorl	%ebp, %ebp
	xorl	%edi, %edi
	callq	hipSetDevice
	movl	$43200, %edi                    # imm = 0xA8C0
	callq	malloc
	movq	%rax, %rbx
	movl	$43200, %edi                    # imm = 0xA8C0
	callq	malloc
	movq	%rax, %r13
	movl	$64, %edi
	callq	malloc
	movq	%rax, %r15
	leaq	16(%rsp), %rax
	movq	%rbp, (%rax)
	movq	%rax, %rdi
	leaq	32(%rsp), %r14
	movq	%rbp, (%r14)
	leaq	8(%rsp), %r12
	movq	%rbp, (%r12)
	leaq	24(%rsp), %rax
	movq	%rbp, (%rax)
	leaq	40(%rsp), %rax
	movq	%rbp, (%rax)
	movq	%rax, %rbp
	movl	$43200, %esi                    # imm = 0xA8C0
	callq	hipMalloc
	movl	$43200, %esi                    # imm = 0xA8C0
	movq	%r14, %rdi
	callq	hipMalloc
	movl	$43200, %esi                    # imm = 0xA8C0
	movq	%r12, %rdi
	callq	hipMalloc
	movl	$64, %esi
	leaq	24(%rsp), %rdi
	callq	hipMalloc
	movl	$172, %esi
	movq	%rbp, %rdi
	callq	hipMalloc
	movl	$.L.str.6, %edi
	movl	$.L.str.7, %esi
	callq	fopen
	movq	%rax, %r12
	movl	$.L.str.8, %edi
	movl	$2700, %esi                     # imm = 0xA8C
	movl	$500, %edx                      # imm = 0x1F4
	xorl	%eax, %eax
	callq	printf
	movl	$.Lstr, %edi
	callq	puts@PLT
	movaps	.LCPI14_0(%rip), %xmm0          # xmm0 = <1.5E+1,1.5E+1,u,u>
	movss	.LCPI14_1(%rip), %xmm1          # xmm1 = mem[0],zero,zero,zero
	movss	.LCPI14_2(%rip), %xmm2          # xmm2 = mem[0],zero,zero,zero
	movl	$2700, %edi                     # imm = 0xA8C
	movq	%rbx, %rsi
	movq	%r13, %rdx
	callq	_Z4initjP15HIP_vector_typeIfLj4EES1_S_IfLj3EEf
	leaq	16(%rsp), %rax
	movq	(%rax), %rdi
	movl	$43200, %edx                    # imm = 0xA8C0
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r14), %rdi
	movl	$43200, %edx                    # imm = 0xA8C0
	movq	%r13, 48(%rsp)                  # 8-byte Spill
	movq	%r13, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$.L.str.10, %edi
	callq	_Z14checkCUDAErrorPKc
	leaq	56(%rsp), %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	xorl	%ebp, %ebp
.LBB14_1:                               # =>This Inner Loop Header: Depth=1
	movzwl	%bp, %r14d
	movl	%r14d, %eax
	shrl	$2, %eax
	imull	$5243, %eax, %eax               # imm = 0x147B
	shrl	$17, %eax
	imull	$-100, %eax, %r13d
	movq	16(%rsp), %rsi
	movq	32(%rsp), %rdx
	movq	8(%rsp), %rcx
	movl	$2700, %edi                     # imm = 0xA8C
	movss	.LCPI14_3(%rip), %xmm0          # xmm0 = mem[0],zero,zero,zero
	movaps	.LCPI14_0(%rip), %xmm1          # xmm1 = <1.5E+1,1.5E+1,u,u>
	movss	.LCPI14_1(%rip), %xmm2          # xmm2 = mem[0],zero,zero,zero
	movl	$64, %r8d
	callq	_Z17first_integrationjf15HIP_vector_typeIfLj3EEPS_IfLj4EES2_S2_j
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	movl	$2700, %edi                     # imm = 0xA8C
	movaps	.LCPI14_0(%rip), %xmm0          # xmm0 = <1.5E+1,1.5E+1,u,u>
	movss	.LCPI14_1(%rip), %xmm1          # xmm1 = mem[0],zero,zero,zero
	movaps	.LCPI14_4(%rip), %xmm2          # xmm2 = <4.0E+0,2.0E+0,u,u>
	movss	.LCPI14_5(%rip), %xmm3          # xmm3 = mem[0],zero,zero,zero
	movaps	%xmm2, %xmm4
	movaps	%xmm3, %xmm5
	movss	.LCPI14_6(%rip), %xmm6          # xmm6 = mem[0],zero,zero,zero
	movl	$64, %ecx
	callq	_Z17force_calculationj15HIP_vector_typeIfLj3EES0_S0_PS_IfLj4EES2_fj
	movq	32(%rsp), %rsi
	movq	8(%rsp), %rdx
	movq	24(%rsp), %rcx
	movq	40(%rsp), %r8
	movl	$43, (%rsp)
	movl	$2700, %edi                     # imm = 0xA8C
	movl	$64, %r9d
	callq	_Z12compute_infojP15HIP_vector_typeIfLj4EES1_PfPS_IfLj2EEjj
	movq	32(%rsp), %rsi
	movq	8(%rsp), %rdx
	movl	$2700, %edi                     # imm = 0xA8C
	movss	.LCPI14_3(%rip), %xmm0          # xmm0 = mem[0],zero,zero,zero
	movl	$64, %ecx
	callq	_Z18second_integrationjfP15HIP_vector_typeIfLj4EES1_j
	addw	%r13w, %r14w
	jne	.LBB14_3
# %bb.2:                                #   in Loop: Header=BB14_1 Depth=1
	movq	16(%rsp), %rsi
	movl	$43200, %edx                    # imm = 0xA8C0
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rsi
	movl	$64, %edx
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$.L.str.10, %edi
	callq	_Z14checkCUDAErrorPKc
	movq	%r12, %rdi
	movl	%ebp, %esi
	movq	%r15, %rdx
	movq	%rbx, %rcx
	movl	$2700, %r8d                     # imm = 0xA8C
	callq	_Z6outputP8_IO_FILEjPfP15HIP_vector_typeIfLj4EEj
	movl	$.L.str.12, %edi
	movl	%ebp, %esi
	xorl	%eax, %eax
	callq	printf
.LBB14_3:                               #   in Loop: Header=BB14_1 Depth=1
	incl	%ebp
	cmpl	$501, %ebp                      # imm = 0x1F5
	jne	.LBB14_1
# %bb.4:
	leaq	72(%rsp), %r14
	movq	%r14, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	(%r14), %rax
	movq	8(%r14), %rsi
	subq	56(%rsp), %rax
	imulq	$1000000, %rax, %rax            # imm = 0xF4240
	subq	64(%rsp), %rsi
	addq	%rax, %rsi
	movl	$.L.str.13, %edi
	xorl	%eax, %eax
	callq	printf
	movq	%r12, %rdi
	callq	fclose
	movq	%rbx, %rdi
	callq	free
	movq	48(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	%r15, %rdi
	callq	free
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	40(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end14:
	.size	main, .Lfunc_end14-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB15_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB15_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$first_integration_kernel, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$force_calculation_kernel, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z25second_integration_kerneljfP15HIP_vector_typeIfLj4EES1_, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z20compute_info_threadsjP15HIP_vector_typeIfLj4EES1_PS_IfLj2EE, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z19compute_info_blocksjPfP15HIP_vector_typeIfLj2EEj, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end15:
	.size	__hip_module_ctor, .Lfunc_end15-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB16_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB16_2:
	retq
.Lfunc_end16:
	.size	__hip_module_dtor, .Lfunc_end16-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Cuda error: %s: %s.\n"
	.size	.L.str, 21

	.type	first_integration_kernel,@object # @first_integration_kernel
	.section	.rodata,"a",@progbits
	.globl	first_integration_kernel
	.p2align	3, 0x0
first_integration_kernel:
	.quad	__device_stub__first_integration_kernel
	.size	first_integration_kernel, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"Kernel execution"
	.size	.L.str.1, 17

	.type	force_calculation_kernel,@object # @force_calculation_kernel
	.section	.rodata,"a",@progbits
	.globl	force_calculation_kernel
	.p2align	3, 0x0
force_calculation_kernel:
	.quad	__device_stub__force_calculation_kernel
	.size	force_calculation_kernel, 8

	.type	_Z25second_integration_kerneljfP15HIP_vector_typeIfLj4EES1_,@object # @_Z25second_integration_kerneljfP15HIP_vector_typeIfLj4EES1_
	.globl	_Z25second_integration_kerneljfP15HIP_vector_typeIfLj4EES1_
	.p2align	3, 0x0
_Z25second_integration_kerneljfP15HIP_vector_typeIfLj4EES1_:
	.quad	_Z40__device_stub__second_integration_kerneljfP15HIP_vector_typeIfLj4EES1_
	.size	_Z25second_integration_kerneljfP15HIP_vector_typeIfLj4EES1_, 8

	.type	_Z20compute_info_threadsjP15HIP_vector_typeIfLj4EES1_PS_IfLj2EE,@object # @_Z20compute_info_threadsjP15HIP_vector_typeIfLj4EES1_PS_IfLj2EE
	.globl	_Z20compute_info_threadsjP15HIP_vector_typeIfLj4EES1_PS_IfLj2EE
	.p2align	3, 0x0
_Z20compute_info_threadsjP15HIP_vector_typeIfLj4EES1_PS_IfLj2EE:
	.quad	_Z35__device_stub__compute_info_threadsjP15HIP_vector_typeIfLj4EES1_PS_IfLj2EE
	.size	_Z20compute_info_threadsjP15HIP_vector_typeIfLj4EES1_PS_IfLj2EE, 8

	.type	_Z19compute_info_blocksjPfP15HIP_vector_typeIfLj2EEj,@object # @_Z19compute_info_blocksjPfP15HIP_vector_typeIfLj2EEj
	.globl	_Z19compute_info_blocksjPfP15HIP_vector_typeIfLj2EEj
	.p2align	3, 0x0
_Z19compute_info_blocksjPfP15HIP_vector_typeIfLj2EEj:
	.quad	_Z34__device_stub__compute_info_blocksjPfP15HIP_vector_typeIfLj2EEj
	.size	_Z19compute_info_blocksjPfP15HIP_vector_typeIfLj2EEj, 8

	.type	.L.str.2,@object                # @.str.2
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.2:
	.asciz	"kernel execution"
	.size	.L.str.2, 17

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"%d\n  step=%d  temp=%20.8f  pot=%20.8f  ener=%20.8f\n"
	.size	.L.str.3, 52

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"A  %20.8f %20.8f %20.8f\n"
	.size	.L.str.4, 25

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"B  %20.8f %20.8f %20.8f\n"
	.size	.L.str.5, 25

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"traj.cu.xyz"
	.size	.L.str.6, 12

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"w"
	.size	.L.str.7, 2

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"Starting simulation with %d atoms for %d steps.\n"
	.size	.L.str.8, 49

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"hipMemcpy"
	.size	.L.str.10, 10

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"time step %d \n"
	.size	.L.str.12, 15

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	"time is %ld  microseconds\n"
	.size	.L.str.13, 27

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"first_integration_kernel"
	.size	.L__unnamed_1, 25

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"force_calculation_kernel"
	.size	.L__unnamed_2, 25

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z25second_integration_kerneljfP15HIP_vector_typeIfLj4EES1_"
	.size	.L__unnamed_3, 60

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z20compute_info_threadsjP15HIP_vector_typeIfLj4EES1_PS_IfLj2EE"
	.size	.L__unnamed_4, 64

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"_Z19compute_info_blocksjPfP15HIP_vector_typeIfLj2EEj"
	.size	.L__unnamed_5, 53

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Generating system."
	.size	.Lstr, 19

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"Running simulation."
	.size	.Lstr.1, 20

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __device_stub__first_integration_kernel
	.addrsig_sym __device_stub__force_calculation_kernel
	.addrsig_sym _Z40__device_stub__second_integration_kerneljfP15HIP_vector_typeIfLj4EES1_
	.addrsig_sym _Z35__device_stub__compute_info_threadsjP15HIP_vector_typeIfLj4EES1_PS_IfLj2EE
	.addrsig_sym _Z34__device_stub__compute_info_blocksjPfP15HIP_vector_typeIfLj2EEj
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym first_integration_kernel
	.addrsig_sym force_calculation_kernel
	.addrsig_sym _Z25second_integration_kerneljfP15HIP_vector_typeIfLj4EES1_
	.addrsig_sym _Z20compute_info_threadsjP15HIP_vector_typeIfLj4EES1_PS_IfLj2EE
	.addrsig_sym _Z19compute_info_blocksjPfP15HIP_vector_typeIfLj2EEj
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	first_integration_kernel ; -- Begin function first_integration_kernel
	.globl	first_integration_kernel
	.p2align	8
	.type	first_integration_kernel,@function
first_integration_kernel:               ; @first_integration_kernel
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x3c
	s_load_b128 s[4:7], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_u32_e64 s4, v1
	s_cbranch_execz .LBB0_20
; %bb.1:
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x28
	s_load_b128 s[8:11], s[0:1], 0x18
	v_ashrrev_i32_e32 v2, 31, v1
	s_load_b32 s0, s[0:1], 0x10
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[0:1], 4, v[1:2]
	v_cvt_f64_f32_e32 v[2:3], s5
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v9, vcc_lo, s2, v0
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v10, vcc_lo, s3, v1, vcc_lo
	v_add_co_u32 v11, vcc_lo, s10, v0
	v_add_co_ci_u32_e32 v12, vcc_lo, s11, v1, vcc_lo
	global_load_b32 v4, v[9:10], off
	global_load_b128 v[5:8], v[11:12], off
	v_mul_f64 v[13:14], v[2:3], 0.5
	s_waitcnt vmcnt(1)
	v_cvt_f64_f32_e32 v[2:3], v4
	s_waitcnt vmcnt(0)
	v_cvt_f64_f32_e32 v[15:16], v8
	v_cvt_f64_f32_e32 v[4:5], v5
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[2:3], v[13:14], v[2:3]
	v_div_scale_f64 v[17:18], null, v[15:16], v[15:16], v[2:3]
	v_div_scale_f64 v[23:24], vcc_lo, v[2:3], v[15:16], v[2:3]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[19:20], v[17:18]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[21:22], -v[17:18], v[19:20], 1.0
	v_fma_f64 v[19:20], v[19:20], v[21:22], v[19:20]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[21:22], -v[17:18], v[19:20], 1.0
	v_fma_f64 v[19:20], v[19:20], v[21:22], v[19:20]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[21:22], v[23:24], v[19:20]
	v_fma_f64 v[17:18], -v[17:18], v[21:22], v[23:24]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[17:18], v[17:18], v[19:20], v[21:22]
	v_div_fixup_f64 v[2:3], v[17:18], v[15:16], v[2:3]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[2:3], v[2:3], v[4:5]
	v_cvt_f32_f64_e32 v27, v[2:3]
	v_add_co_u32 v3, vcc_lo, s8, v0
	v_add_co_ci_u32_e32 v4, vcc_lo, s9, v1, vcc_lo
	global_load_b96 v[0:2], v[3:4], off
	global_store_b32 v[11:12], v27, off
	global_load_b32 v5, v[9:10], off offset:4
	s_waitcnt vmcnt(0)
	v_cvt_f64_f32_e32 v[17:18], v5
	v_cvt_f64_f32_e32 v[5:6], v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[17:18], v[13:14], v[17:18]
	v_div_scale_f64 v[19:20], null, v[15:16], v[15:16], v[17:18]
	v_div_scale_f64 v[25:26], vcc_lo, v[17:18], v[15:16], v[17:18]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[21:22], v[19:20]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[23:24], -v[19:20], v[21:22], 1.0
	v_fma_f64 v[21:22], v[21:22], v[23:24], v[21:22]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[23:24], -v[19:20], v[21:22], 1.0
	v_fma_f64 v[21:22], v[21:22], v[23:24], v[21:22]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[23:24], v[25:26], v[21:22]
	v_fma_f64 v[19:20], -v[19:20], v[23:24], v[25:26]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[19:20], v[19:20], v[21:22], v[23:24]
	v_div_fixup_f64 v[17:18], v[19:20], v[15:16], v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[5:6], v[17:18], v[5:6]
	v_cvt_f32_f64_e32 v6, v[5:6]
	global_store_b32 v[11:12], v6, off offset:4
	global_load_b32 v5, v[9:10], off offset:8
	s_waitcnt vmcnt(0)
	v_cvt_f64_f32_e32 v[8:9], v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[8:9], v[13:14], v[8:9]
	v_div_scale_f64 v[13:14], null, v[15:16], v[15:16], v[8:9]
	v_div_scale_f64 v[21:22], vcc_lo, v[8:9], v[15:16], v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[17:18], v[13:14]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[19:20], -v[13:14], v[17:18], 1.0
	v_fma_f64 v[17:18], v[17:18], v[19:20], v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[19:20], -v[13:14], v[17:18], 1.0
	v_fma_f64 v[17:18], v[17:18], v[19:20], v[17:18]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[19:20], v[21:22], v[17:18]
	v_fma_f64 v[13:14], -v[13:14], v[19:20], v[21:22]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[13:14], v[13:14], v[17:18], v[19:20]
	v_div_fixup_f64 v[8:9], v[13:14], v[15:16], v[8:9]
	v_cvt_f64_f32_e32 v[13:14], v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[7:8], v[8:9], v[13:14]
	v_cvt_f32_f64_e32 v5, v[7:8]
	v_fma_f32 v7, s5, v27, v0
	v_mul_f32_e64 v0, s6, 0.5
	global_store_b32 v[11:12], v5, off offset:8
	v_cmpx_nlt_f32_e32 v0, v7
	s_xor_b32 s1, exec_lo, s1
	s_cbranch_execz .LBB0_5
; %bb.2:
	s_mov_b32 s2, exec_lo
	v_cmpx_lt_f32_e64 v7, -v0
; %bb.3:
	v_add_f32_e32 v7, s6, v7
; %bb.4:                                ; %Flow73
	s_or_b32 exec_lo, exec_lo, s2
.LBB0_5:                                ; %Flow74
	s_and_not1_saveexec_b32 s1, s1
; %bb.6:
	s_delay_alu instid0(VALU_DEP_1)
	v_subrev_f32_e32 v7, s6, v7
; %bb.7:                                ; %_Z3pbcff.exit
	s_or_b32 exec_lo, exec_lo, s1
	v_fma_f32 v0, s5, v6, v1
	v_mul_f32_e64 v1, s7, 0.5
	s_mov_b32 s1, exec_lo
	global_store_b32 v[3:4], v7, off
	v_cmpx_nlt_f32_e32 v1, v0
	s_xor_b32 s1, exec_lo, s1
	s_cbranch_execz .LBB0_11
; %bb.8:
	s_mov_b32 s2, exec_lo
	v_cmpx_lt_f32_e64 v0, -v1
; %bb.9:
	v_add_f32_e32 v0, s7, v0
; %bb.10:                               ; %Flow71
	s_or_b32 exec_lo, exec_lo, s2
.LBB0_11:                               ; %Flow72
	s_and_not1_saveexec_b32 s1, s1
; %bb.12:
	s_delay_alu instid0(VALU_DEP_1)
	v_subrev_f32_e32 v0, s7, v0
; %bb.13:                               ; %_Z3pbcff.exit46
	s_or_b32 exec_lo, exec_lo, s1
	v_fmac_f32_e32 v2, s5, v5
	v_mul_f32_e64 v1, s0, 0.5
	s_mov_b32 s1, exec_lo
	global_store_b32 v[3:4], v0, off offset:4
	v_cmpx_nlt_f32_e32 v1, v2
	s_xor_b32 s1, exec_lo, s1
	s_cbranch_execz .LBB0_17
; %bb.14:
	s_mov_b32 s2, exec_lo
	v_cmpx_lt_f32_e64 v2, -v1
; %bb.15:
	v_add_f32_e32 v2, s0, v2
; %bb.16:                               ; %Flow
	s_or_b32 exec_lo, exec_lo, s2
.LBB0_17:                               ; %Flow70
	s_and_not1_saveexec_b32 s1, s1
; %bb.18:
	s_delay_alu instid0(VALU_DEP_1)
	v_subrev_f32_e32 v2, s0, v2
; %bb.19:                               ; %_Z3pbcff.exit48
	s_or_b32 exec_lo, exec_lo, s1
	global_store_b32 v[3:4], v2, off offset:8
.LBB0_20:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel first_integration_kernel
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 28
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	first_integration_kernel, .Lfunc_end0-first_integration_kernel
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 900
; NumSgprs: 18
; NumVgprs: 28
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 28
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	force_calculation_kernel ; -- Begin function force_calculation_kernel
	.globl	force_calculation_kernel
	.p2align	8
	.type	force_calculation_kernel,@function
force_calculation_kernel:               ; @force_calculation_kernel
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x4c
	s_load_b256 s[4:11], s[0:1], 0x0
	s_load_b128 s[16:19], s[0:1], 0x28
	v_dual_mov_b32 v3, 0 :: v_dual_mov_b32 v4, 0
	s_mov_b32 s12, 0
	v_mov_b32_e32 v2, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mad_u64_u32 v[13:14], null, s15, s3, v[0:1]
	v_mov_b32_e32 v1, 0
	v_cmp_gt_u32_e64 s2, s4, v13
	s_delay_alu instid0(VALU_DEP_1)
	s_and_saveexec_b32 s13, s2
	s_cbranch_execz .LBB1_2
; %bb.1:
	v_ashrrev_i32_e32 v14, 31, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 4, v[13:14]
	v_add_co_u32 v1, vcc_lo, s16, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s17, v2, vcc_lo
	global_load_b128 v[1:4], v[1:2], off
.LBB1_2:
	s_or_b32 exec_lo, exec_lo, s13
	s_mov_b32 s13, s12
	s_mov_b32 s14, s12
	s_mov_b32 s15, s12
	v_dual_mov_b32 v5, s12 :: v_dual_mov_b32 v6, s13
	v_dual_mov_b32 v7, s14 :: v_dual_mov_b32 v8, s15
	s_cmp_eq_u32 s4, 0
	s_cbranch_scc1 .LBB1_38
; %bb.3:                                ; %.lr.ph105
	s_clause 0x1
	s_load_b64 s[20:21], s[0:1], 0x20
	s_load_b32 s0, s[0:1], 0x38
	s_mov_b32 s13, s12
	s_mov_b32 s14, s12
	s_mov_b32 s15, s12
	v_dual_mov_b32 v5, s12 :: v_dual_mov_b32 v6, s13
	v_lshl_add_u32 v16, v0, 4, 0
	v_mul_f32_e64 v17, s5, 0.5
	v_mul_f32_e64 v18, s6, 0.5
	v_mul_f32_e64 v19, s7, 0.5
	v_dual_mov_b32 v7, s14 :: v_dual_mov_b32 v8, s15
	v_dual_mov_b32 v15, 0 :: v_dual_mov_b32 v20, v13
	s_mov_b32 s1, s4
                                        ; implicit-def: $vgpr21
                                        ; implicit-def: $vgpr22
.LBB1_4:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_8 Depth 2
	v_dual_mov_b32 v9, 0 :: v_dual_add_nc_u32 v14, s12, v0
	v_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, 0
	v_mov_b32_e32 v12, 0
	s_mov_b32 s13, exec_lo
	s_delay_alu instid0(VALU_DEP_3)
	v_cmpx_gt_u32_e64 s4, v14
	s_cbranch_execz .LBB1_6
; %bb.5:                                ;   in Loop: Header=BB1_4 Depth=1
	v_lshlrev_b64 v[9:10], 4, v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v9, vcc_lo, s16, v9
	v_add_co_ci_u32_e32 v10, vcc_lo, s17, v10, vcc_lo
	global_load_b128 v[9:12], v[9:10], off
.LBB1_6:                                ;   in Loop: Header=BB1_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
	s_sub_i32 s13, s4, s12
	s_waitcnt vmcnt(0) lgkmcnt(0)
	s_min_u32 s13, s3, s13
	s_barrier
	s_cmp_lg_u32 s13, 0
	buffer_gl0_inv
	s_cselect_b32 s13, -1, 0
	ds_store_b128 v16, v[9:12]
	s_and_b32 s14, s2, s13
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s13, s14
	s_cbranch_execz .LBB1_37
; %bb.7:                                ; %.lr.ph.preheader
                                        ;   in Loop: Header=BB1_4 Depth=1
	v_mov_b32_e32 v14, v20
	s_min_u32 s14, s1, s3
	s_mov_b32 s15, 0
.LBB1_8:                                ; %.lr.ph
                                        ;   Parent Loop BB1_4 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_mov_b32 s22, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_ne_u32_e32 0, v14
	s_cbranch_execz .LBB1_36
; %bb.9:                                ;   in Loop: Header=BB1_8 Depth=2
	v_mov_b32_e32 v9, s15
	s_mov_b32 s23, exec_lo
	ds_load_b128 v[9:12], v9
	s_waitcnt lgkmcnt(0)
	v_sub_f32_e32 v9, v1, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_nlt_f32_e32 v17, v9
	s_xor_b32 s23, exec_lo, s23
	s_cbranch_execz .LBB1_13
; %bb.10:                               ;   in Loop: Header=BB1_8 Depth=2
	s_mov_b32 s24, exec_lo
	v_cmpx_lt_f32_e64 v9, -v17
; %bb.11:                               ;   in Loop: Header=BB1_8 Depth=2
	v_add_f32_e32 v9, s5, v9
; %bb.12:                               ; %Flow155
                                        ;   in Loop: Header=BB1_8 Depth=2
	s_or_b32 exec_lo, exec_lo, s24
.LBB1_13:                               ; %Flow156
                                        ;   in Loop: Header=BB1_8 Depth=2
	s_and_not1_saveexec_b32 s23, s23
; %bb.14:                               ;   in Loop: Header=BB1_8 Depth=2
	s_delay_alu instid0(VALU_DEP_1)
	v_subrev_f32_e32 v9, s5, v9
; %bb.15:                               ; %_Z3pbcff.exit
                                        ;   in Loop: Header=BB1_8 Depth=2
	s_or_b32 exec_lo, exec_lo, s23
	v_sub_f32_e32 v10, v2, v10
	s_mov_b32 s23, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_nlt_f32_e32 v18, v10
	s_xor_b32 s23, exec_lo, s23
	s_cbranch_execz .LBB1_19
; %bb.16:                               ;   in Loop: Header=BB1_8 Depth=2
	s_mov_b32 s24, exec_lo
	v_cmpx_lt_f32_e64 v10, -v18
; %bb.17:                               ;   in Loop: Header=BB1_8 Depth=2
	v_add_f32_e32 v10, s6, v10
; %bb.18:                               ; %Flow153
                                        ;   in Loop: Header=BB1_8 Depth=2
	s_or_b32 exec_lo, exec_lo, s24
.LBB1_19:                               ; %Flow154
                                        ;   in Loop: Header=BB1_8 Depth=2
	s_and_not1_saveexec_b32 s23, s23
; %bb.20:                               ;   in Loop: Header=BB1_8 Depth=2
	s_delay_alu instid0(VALU_DEP_1)
	v_subrev_f32_e32 v10, s6, v10
; %bb.21:                               ; %_Z3pbcff.exit91
                                        ;   in Loop: Header=BB1_8 Depth=2
	s_or_b32 exec_lo, exec_lo, s23
	v_sub_f32_e32 v11, v3, v11
	s_mov_b32 s23, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_nlt_f32_e32 v19, v11
	s_xor_b32 s23, exec_lo, s23
	s_cbranch_execz .LBB1_25
; %bb.22:                               ;   in Loop: Header=BB1_8 Depth=2
	s_mov_b32 s24, exec_lo
	v_cmpx_lt_f32_e64 v11, -v19
; %bb.23:                               ;   in Loop: Header=BB1_8 Depth=2
	v_add_f32_e32 v11, s7, v11
; %bb.24:                               ; %Flow151
                                        ;   in Loop: Header=BB1_8 Depth=2
	s_or_b32 exec_lo, exec_lo, s24
.LBB1_25:                               ; %Flow152
                                        ;   in Loop: Header=BB1_8 Depth=2
	s_and_not1_saveexec_b32 s23, s23
; %bb.26:                               ;   in Loop: Header=BB1_8 Depth=2
	s_delay_alu instid0(VALU_DEP_1)
	v_subrev_f32_e32 v11, s7, v11
; %bb.27:                               ; %_Z3pbcff.exit93
                                        ;   in Loop: Header=BB1_8 Depth=2
	s_or_b32 exec_lo, exec_lo, s23
	v_mul_f32_e32 v23, v10, v10
	s_mov_b32 s23, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v23, v9, v9
	v_fmac_f32_e32 v23, v11, v11
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_f32_e32 s0, v23
	s_cbranch_execz .LBB1_35
; %bb.28:                               ;   in Loop: Header=BB1_8 Depth=2
	v_dual_add_f32 v25, v4, v12 :: v_dual_mov_b32 v12, s8
	v_mov_b32_e32 v24, s11
	s_mov_b32 s24, exec_lo
	s_delay_alu instid0(VALU_DEP_2)
	v_cmpx_neq_f32_e32 2.0, v25
	s_cbranch_execz .LBB1_34
; %bb.29:                               ;   in Loop: Header=BB1_8 Depth=2
	v_mov_b32_e32 v24, s20
	v_mov_b32_e32 v12, s9
	s_mov_b32 s25, exec_lo
	v_cmpx_neq_f32_e32 0x40400000, v25
	s_cbranch_execz .LBB1_33
; %bb.30:                               ;   in Loop: Header=BB1_8 Depth=2
	s_mov_b32 s26, exec_lo
	v_cmpx_eq_f32_e32 4.0, v25
; %bb.31:                               ;   in Loop: Header=BB1_8 Depth=2
	v_dual_mov_b32 v21, s21 :: v_dual_mov_b32 v22, s10
; %bb.32:                               ; %Flow
                                        ;   in Loop: Header=BB1_8 Depth=2
	s_or_b32 exec_lo, exec_lo, s26
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v24, v21
	v_mov_b32_e32 v12, v22
.LBB1_33:                               ; %Flow149
                                        ;   in Loop: Header=BB1_8 Depth=2
	s_or_b32 exec_lo, exec_lo, s25
.LBB1_34:                               ;   in Loop: Header=BB1_8 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	s_or_b32 exec_lo, exec_lo, s24
	v_div_scale_f32 v21, null, v23, v23, 1.0
	v_div_scale_f32 v26, vcc_lo, 1.0, v23, 1.0
	v_rcp_f32_e32 v22, v21
	s_waitcnt_depctr 0xfff
	v_fma_f32 v25, -v21, v22, 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v22, v25, v22
	v_mul_f32_e32 v25, v26, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v27, -v21, v25, v26
	v_fmac_f32_e32 v25, v27, v22
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v21, -v21, v25, v26
	v_div_fmas_f32 v21, v21, v22, v25
	v_mul_f32_e32 v25, 0xc0c00000, v24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fixup_f32 v21, v21, v23, 1.0
	v_dual_mul_f32 v23, 0x41400000, v12 :: v_dual_mul_f32 v22, v21, v21
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f32_e32 v22, v21, v22
	v_mul_f32_e32 v21, v21, v22
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v25, v22, v23
	v_fma_f32 v23, v22, v12, -v24
	v_fmac_f32_e32 v8, v22, v23
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_dual_mov_b32 v22, v12 :: v_dual_mul_f32 v25, v21, v25
	v_mov_b32_e32 v21, v24
	v_fma_f32 v5, v9, v25, v5
	v_fma_f32 v6, v10, v25, v6
	v_fma_f32 v7, v11, v25, v7
.LBB1_35:                               ; %Flow150
                                        ;   in Loop: Header=BB1_8 Depth=2
	s_or_b32 exec_lo, exec_lo, s23
.LBB1_36:                               ; %Flow157
                                        ;   in Loop: Header=BB1_8 Depth=2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s22
	v_add_nc_u32_e32 v14, -1, v14
	s_add_i32 s14, s14, -1
	s_add_i32 s15, s15, 16
	s_cmp_lg_u32 s14, 0
	s_cbranch_scc1 .LBB1_8
.LBB1_37:                               ; %Flow159
                                        ;   in Loop: Header=BB1_4 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
	v_subrev_nc_u32_e32 v20, s3, v20
	s_add_i32 s12, s12, s3
	s_sub_i32 s1, s1, s3
	s_cmp_ge_u32 s12, s4
	s_cbranch_scc0 .LBB1_4
.LBB1_38:                               ; %Flow161
	s_and_saveexec_b32 s0, s2
	s_cbranch_execz .LBB1_40
; %bb.39:
	v_ashrrev_i32_e32 v14, 31, v13
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 4, v[13:14]
	v_add_co_u32 v0, vcc_lo, s18, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s19, v1, vcc_lo
	global_store_b128 v[0:1], v[5:8], off
.LBB1_40:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel force_calculation_kernel
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 320
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 28
		.amdhsa_next_free_sgpr 27
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	force_calculation_kernel, .Lfunc_end1-force_calculation_kernel
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1064
; NumSgprs: 29
; NumVgprs: 28
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 29
; NumVGPRsForWavesPerEU: 28
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z25second_integration_kerneljfP15HIP_vector_typeIfLj4EES1_ ; -- Begin function _Z25second_integration_kerneljfP15HIP_vector_typeIfLj4EES1_
	.globl	_Z25second_integration_kerneljfP15HIP_vector_typeIfLj4EES1_
	.p2align	8
	.type	_Z25second_integration_kerneljfP15HIP_vector_typeIfLj4EES1_,@function
_Z25second_integration_kerneljfP15HIP_vector_typeIfLj4EES1_: ; @_Z25second_integration_kerneljfP15HIP_vector_typeIfLj4EES1_
; %bb.0:
	s_clause 0x1
	s_load_b32 s4, s[0:1], 0x24
	s_load_b64 s[2:3], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	v_cmp_gt_u32_e32 vcc_lo, s2, v1
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB2_2
; %bb.1:
	s_load_b128 s[4:7], s[0:1], 0x8
	v_ashrrev_i32_e32 v2, 31, v1
	v_cvt_f64_f32_e32 v[8:9], s3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 4, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v4, vcc_lo, s6, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v1, vcc_lo
	v_add_co_u32 v6, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v1, vcc_lo
	global_load_b32 v10, v[4:5], off
	global_load_b128 v[0:3], v[6:7], off
	v_mul_f64 v[8:9], v[8:9], 0.5
	s_waitcnt vmcnt(1)
	v_cvt_f64_f32_e32 v[10:11], v10
	s_waitcnt vmcnt(0)
	v_cvt_f64_f32_e32 v[12:13], v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[10:11], v[8:9], v[10:11]
	v_div_scale_f64 v[14:15], null, v[12:13], v[12:13], v[10:11]
	v_div_scale_f64 v[20:21], vcc_lo, v[10:11], v[12:13], v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[16:17], v[14:15]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[18:19], -v[14:15], v[16:17], 1.0
	v_fma_f64 v[16:17], v[16:17], v[18:19], v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[18:19], -v[14:15], v[16:17], 1.0
	v_fma_f64 v[16:17], v[16:17], v[18:19], v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[18:19], v[20:21], v[16:17]
	v_fma_f64 v[14:15], -v[14:15], v[18:19], v[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_div_fmas_f64 v[14:15], v[14:15], v[16:17], v[18:19]
	v_cvt_f64_f32_e32 v[16:17], v0
	v_div_fixup_f64 v[10:11], v[14:15], v[12:13], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[10:11], v[10:11], v[16:17]
	v_cvt_f32_f64_e32 v0, v[10:11]
	global_store_b32 v[6:7], v0, off
	global_load_b32 v0, v[4:5], off offset:4
	s_waitcnt vmcnt(0)
	v_cvt_f64_f32_e32 v[10:11], v0
	v_cvt_f64_f32_e32 v[0:1], v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[10:11], v[8:9], v[10:11]
	v_div_scale_f64 v[14:15], null, v[12:13], v[12:13], v[10:11]
	v_div_scale_f64 v[20:21], vcc_lo, v[10:11], v[12:13], v[10:11]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[16:17], v[14:15]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[18:19], -v[14:15], v[16:17], 1.0
	v_fma_f64 v[16:17], v[16:17], v[18:19], v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[18:19], -v[14:15], v[16:17], 1.0
	v_fma_f64 v[16:17], v[16:17], v[18:19], v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[18:19], v[20:21], v[16:17]
	v_fma_f64 v[14:15], -v[14:15], v[18:19], v[20:21]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[14:15], v[14:15], v[16:17], v[18:19]
	v_div_fixup_f64 v[10:11], v[14:15], v[12:13], v[10:11]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[0:1], v[10:11], v[0:1]
	v_cvt_f32_f64_e32 v0, v[0:1]
	global_store_b32 v[6:7], v0, off offset:4
	global_load_b32 v0, v[4:5], off offset:8
	s_waitcnt vmcnt(0)
	v_cvt_f64_f32_e32 v[0:1], v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[0:1], v[8:9], v[0:1]
	v_div_scale_f64 v[3:4], null, v[12:13], v[12:13], v[0:1]
	v_div_scale_f64 v[14:15], vcc_lo, v[0:1], v[12:13], v[0:1]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[8:9], v[3:4]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[10:11], -v[3:4], v[8:9], 1.0
	v_fma_f64 v[8:9], v[8:9], v[10:11], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[10:11], -v[3:4], v[8:9], 1.0
	v_fma_f64 v[8:9], v[8:9], v[10:11], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[10:11], v[14:15], v[8:9]
	v_fma_f64 v[3:4], -v[3:4], v[10:11], v[14:15]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[3:4], v[3:4], v[8:9], v[10:11]
	v_div_fixup_f64 v[0:1], v[3:4], v[12:13], v[0:1]
	v_cvt_f64_f32_e32 v[2:3], v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[0:1], v[0:1], v[2:3]
	v_cvt_f32_f64_e32 v0, v[0:1]
	global_store_b32 v[6:7], v0, off offset:8
.LBB2_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z25second_integration_kerneljfP15HIP_vector_typeIfLj4EES1_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 22
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z25second_integration_kerneljfP15HIP_vector_typeIfLj4EES1_, .Lfunc_end2-_Z25second_integration_kerneljfP15HIP_vector_typeIfLj4EES1_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 632
; NumSgprs: 18
; NumVgprs: 22
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 22
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z20compute_info_threadsjP15HIP_vector_typeIfLj4EES1_PS_IfLj2EE ; -- Begin function _Z20compute_info_threadsjP15HIP_vector_typeIfLj4EES1_PS_IfLj2EE
	.globl	_Z20compute_info_threadsjP15HIP_vector_typeIfLj4EES1_PS_IfLj2EE
	.p2align	8
	.type	_Z20compute_info_threadsjP15HIP_vector_typeIfLj4EES1_PS_IfLj2EE,@function
_Z20compute_info_threadsjP15HIP_vector_typeIfLj4EES1_PS_IfLj2EE: ; @_Z20compute_info_threadsjP15HIP_vector_typeIfLj4EES1_PS_IfLj2EE
; %bb.0:
	s_clause 0x2
	s_load_b32 s3, s[0:1], 0x2c
	s_load_b32 s8, s[0:1], 0x0
	s_load_b128 s[4:7], s[0:1], 0x8
	v_mov_b32_e32 v1, 0
	s_mov_b32 s2, s15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	v_mov_b32_e32 v2, v1
	s_waitcnt lgkmcnt(0)
	s_and_b32 s3, s3, 0xffff
	s_mul_i32 s9, s15, s3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshl_add_u32 v3, s9, 1, v0
	s_mov_b32 s9, exec_lo
	v_cmpx_gt_u32_e64 s8, v3
	s_cbranch_execz .LBB3_2
; %bb.1:
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 4, v[3:4]
	v_add_co_u32 v4, vcc_lo, s4, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v2, vcc_lo
	v_add_co_u32 v1, vcc_lo, s6, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s7, v2, vcc_lo
	global_load_b128 v[4:7], v[4:5], off
	global_load_b32 v2, v[1:2], off offset:12
	s_waitcnt vmcnt(1)
	v_mul_f32_e32 v1, v5, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v1, v4, v4
	v_fmac_f32_e32 v1, v6, v6
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f32_e32 v1, v7, v1
.LBB3_2:
	s_or_b32 exec_lo, exec_lo, s9
	v_add_nc_u32_e32 v3, s3, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_u32_e32 vcc_lo, s8, v3
	s_and_saveexec_b32 s8, vcc_lo
	s_cbranch_execz .LBB3_4
; %bb.3:
	v_mov_b32_e32 v4, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[7:8], 4, v[3:4]
	v_add_co_u32 v3, vcc_lo, s4, v7
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v8, vcc_lo
	v_add_co_u32 v7, vcc_lo, s6, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v8, vcc_lo
	global_load_b128 v[3:6], v[3:4], off
	global_load_b32 v7, v[7:8], off offset:12
	s_waitcnt vmcnt(1)
	v_mul_f32_e32 v4, v4, v4
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v2, v2, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v4, v3, v3
	v_fmac_f32_e32 v4, v5, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v1, v6, v4
.LBB3_4:
	s_or_b32 exec_lo, exec_lo, s8
	v_lshl_add_u32 v3, v0, 3, 0
	s_cmp_lt_u32 s3, 2
	s_waitcnt vmcnt(0)
	ds_store_b64 v3, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB3_8
.LBB3_5:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	s_lshr_b32 s4, s3, 1
	s_mov_b32 s5, exec_lo
	v_cmpx_gt_u32_e64 s4, v0
	s_cbranch_execz .LBB3_7
; %bb.6:                                ;   in Loop: Header=BB3_5 Depth=1
	v_lshl_add_u32 v1, s4, 3, v3
	ds_load_b64 v[1:2], v1
	ds_load_b64 v[4:5], v3
	s_waitcnt lgkmcnt(0)
	v_dual_add_f32 v1, v1, v4 :: v_dual_add_f32 v2, v2, v5
	ds_store_b64 v3, v[1:2]
.LBB3_7:                                ;   in Loop: Header=BB3_5 Depth=1
	s_or_b32 exec_lo, exec_lo, s5
	s_cmp_gt_u32 s3, 3
	s_mov_b32 s3, s4
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB3_5
.LBB3_8:                                ; %._crit_edge
	s_mov_b32 s3, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB3_10
; %bb.9:
	v_mov_b32_e32 v2, 0
	s_load_b64 s[0:1], s[0:1], 0x18
	s_mov_b32 s3, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[2:3], s[2:3], 3
	ds_load_b64 v[0:1], v2
	s_waitcnt lgkmcnt(0)
	s_add_u32 s0, s0, s2
	s_addc_u32 s1, s1, s3
	global_store_b64 v2, v[0:1], s[0:1]
.LBB3_10:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z20compute_info_threadsjP15HIP_vector_typeIfLj4EES1_PS_IfLj2EE
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z20compute_info_threadsjP15HIP_vector_typeIfLj4EES1_PS_IfLj2EE, .Lfunc_end3-_Z20compute_info_threadsjP15HIP_vector_typeIfLj4EES1_PS_IfLj2EE
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 516
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z19compute_info_blocksjPfP15HIP_vector_typeIfLj2EEj ; -- Begin function _Z19compute_info_blocksjPfP15HIP_vector_typeIfLj2EEj
	.globl	_Z19compute_info_blocksjPfP15HIP_vector_typeIfLj2EEj
	.p2align	8
	.type	_Z19compute_info_blocksjPfP15HIP_vector_typeIfLj2EEj,@function
_Z19compute_info_blocksjPfP15HIP_vector_typeIfLj2EEj: ; @_Z19compute_info_blocksjPfP15HIP_vector_typeIfLj2EEj
; %bb.0:
	s_clause 0x1
	s_load_b32 s3, s[0:1], 0x18
	s_load_b128 s[4:7], s[0:1], 0x8
	v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v2, 0
	v_cmp_eq_u32_e64 s2, 0, v0
	s_mov_b32 s8, 0
	s_waitcnt lgkmcnt(0)
	s_cmp_eq_u32 s3, 0
	s_cbranch_scc1 .LBB4_14
; %bb.1:                                ; %.lr.ph47
	s_load_b32 s9, s[0:1], 0x2c
	v_lshl_add_u32 v5, v0, 3, 0
	v_dual_mov_b32 v6, 0 :: v_dual_mov_b32 v7, 0
	v_mov_b32_e32 v2, 0
	v_mov_b32_e32 v8, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s9, s9, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_gt_u32 s9, 1
	s_cselect_b32 s10, -1, 0
	s_lshl_b32 s11, s9, 1
.LBB4_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB4_7 Depth 2
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v1, s8, v0
	v_mov_b32_e32 v3, 0
	s_mov_b32 s12, exec_lo
	s_delay_alu instid0(VALU_DEP_2)
	v_cmpx_gt_u32_e64 s3, v1
	s_cbranch_execz .LBB4_6
; %bb.3:                                ;   in Loop: Header=BB4_2 Depth=1
	v_lshlrev_b64 v[3:4], 3, v[1:2]
	v_add_nc_u32_e32 v1, s9, v1
	s_mov_b32 s13, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v3, vcc_lo, s6, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s7, v4, vcc_lo
	global_load_b64 v[3:4], v[3:4], off
	v_cmpx_gt_u32_e64 s3, v1
	s_cbranch_execz .LBB4_5
; %bb.4:                                ;   in Loop: Header=BB4_2 Depth=1
	s_waitcnt vmcnt(0)
	v_lshlrev_b64 v[3:4], 3, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v3, vcc_lo, s6, v3
	v_add_co_ci_u32_e32 v4, vcc_lo, s7, v4, vcc_lo
	global_load_b64 v[3:4], v[3:4], off
.LBB4_5:                                ; %Flow62
                                        ;   in Loop: Header=BB4_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
.LBB4_6:                                ;   in Loop: Header=BB4_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s12
	s_and_not1_b32 vcc_lo, exec_lo, s10
	s_mov_b32 s12, s9
	s_waitcnt vmcnt(0)
	ds_store_b64 v5, v[3:4]
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_vccnz .LBB4_10
.LBB4_7:                                ; %.lr.ph
                                        ;   Parent Loop BB4_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_lshr_b32 s13, s12, 1
	s_mov_b32 s14, exec_lo
	v_cmpx_gt_u32_e64 s13, v0
	s_cbranch_execz .LBB4_9
; %bb.8:                                ;   in Loop: Header=BB4_7 Depth=2
	v_lshl_add_u32 v1, s13, 3, v5
	ds_load_b64 v[3:4], v1
	ds_load_b64 v[9:10], v5
	s_waitcnt lgkmcnt(0)
	v_dual_add_f32 v3, v3, v9 :: v_dual_add_f32 v4, v4, v10
	ds_store_b64 v5, v[3:4]
.LBB4_9:                                ;   in Loop: Header=BB4_7 Depth=2
	s_or_b32 exec_lo, exec_lo, s14
	s_cmp_gt_u32 s12, 3
	s_mov_b32 s12, s13
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB4_7
.LBB4_10:                               ; %._crit_edge
                                        ;   in Loop: Header=BB4_2 Depth=1
	s_and_saveexec_b32 s12, s2
	s_cbranch_execz .LBB4_12
; %bb.11:                               ;   in Loop: Header=BB4_2 Depth=1
	ds_load_b64 v[3:4], v6
	s_waitcnt lgkmcnt(0)
	v_dual_add_f32 v8, v8, v3 :: v_dual_add_f32 v7, v7, v4
.LBB4_12:                               ;   in Loop: Header=BB4_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s12
	s_add_i32 s8, s11, s8
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_ge_u32 s8, s3
	s_cbranch_scc0 .LBB4_2
; %bb.13:                               ; %._crit_edge48.loopexit
	v_dual_mul_f32 v2, 0.5, v8 :: v_dual_mul_f32 v1, 0.5, v7
.LBB4_14:                               ; %Flow63
	s_mov_b32 s2, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB4_16
; %bb.15:
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
	v_cvt_f64_f32_e32 v[3:4], v2
	s_load_b32 s0, s[0:1], 0x0
	v_add_f32_e32 v2, v2, v1
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s0, s0, 3
	s_add_i32 s0, s0, -3
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f32_u32_e32 v0, s0
	v_cvt_f64_f32_e32 v[5:6], v0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f64 v[3:4], v[3:4], v[3:4]
	v_div_scale_f64 v[7:8], null, v[5:6], v[5:6], v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[9:10], v[7:8]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[11:12], -v[7:8], v[9:10], 1.0
	v_fma_f64 v[9:10], v[9:10], v[11:12], v[9:10]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[11:12], -v[7:8], v[9:10], 1.0
	v_fma_f64 v[9:10], v[9:10], v[11:12], v[9:10]
	v_div_scale_f64 v[11:12], vcc_lo, v[3:4], v[5:6], v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[13:14], v[11:12], v[9:10]
	v_fma_f64 v[7:8], -v[7:8], v[13:14], v[11:12]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[7:8], v[7:8], v[9:10], v[13:14]
	v_div_fixup_f64 v[3:4], v[7:8], v[5:6], v[3:4]
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_f32_f64_e32 v0, v[3:4]
	v_mov_b32_e32 v3, 0
	global_store_b96 v3, v[0:2], s[4:5]
.LBB4_16:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z19compute_info_blocksjPfP15HIP_vector_typeIfLj2EEj
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 15
		.amdhsa_next_free_sgpr 15
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end4:
	.size	_Z19compute_info_blocksjPfP15HIP_vector_typeIfLj2EEj, .Lfunc_end4-_Z19compute_info_blocksjPfP15HIP_vector_typeIfLj2EEj
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 640
; NumSgprs: 17
; NumVgprs: 15
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 17
; NumVGPRsForWavesPerEU: 15
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
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amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
