#include <cstdlib>
#include <cstdio>
#include <iostream>

using namespace std;

const int ALIVE = 1;
const int DEAD = 0;

/* prints the table passed into the the function and its generation */
void printTable(int* table, int gen, int N2){
	cout << "Generation " << gen << ":\n";
	for (int i = 0; i < N2; i++) {
		for (int j = 0; j < N2; j++) {
			cout << table[N2 * i + j] << " ";
		}
		cout << "\n";
	}
}

/* modifies the nextGen table to represent the next generation of The Game of Life */
__global__
void nextGeneration(int* table, int* nextGen, int N2) {

	int j = blockDim.x * blockIdx.x + threadIdx.x + 1;

	for (int i = 1; i < N2-1; i++){
		if (j < N2-1) {
			int localChange = 0;
			int neighbors = 0;
			neighbors += table[N2 * (i-1) + j];
			neighbors += table[N2 * (i-1) + (j-1)];
			neighbors += table[N2 * (i-1) + (j+1)];
			neighbors += table[N2 * (i+1) + j];
			neighbors += table[N2 * (i+1) + (j-1)];
			neighbors += table[N2 * (i+1) + (j+1)];
			neighbors += table[N2 * i + (j+1)];
			neighbors += table[N2 * i + (j-1)];

			if (table[N2 * i + j] == DEAD && neighbors == 3) {
				nextGen[N2 * i + j] = ALIVE;
				localChange = 1;
			}

			if (neighbors <= 1 || neighbors >= 4) {
				if (table[N2 * i + j] == ALIVE) {
					nextGen[N2 * i + j] = DEAD;
					localChange = 1;
				}
			}

			/* this is used to make sure the two tables stay up to date with each other over the generations since they are being swapped after each iteration */
			if(localChange == 0) {
				nextGen[N2 * i + j] = table[N2 * i + j];
			}

		}
	}
}

/* initializes a table according to the size provided by the user with each element being randomized to be alive or dead */
void initTable(int* table, int N2){
	for (int i = 0; i < N2; i++) {
		for (int j = 0; j < N2; j++) {
			if (i == N2 - 1 || j == N2 - 1 || i == 0 || j == 0) {
				table[N2 * i + j] = DEAD;
			}
			else {
				if (rand() % 2 < 1) {
					table[N2 * i + j] = ALIVE;
				}
				else {
					table[N2 * i + j] = DEAD;
				}
			}

		}
	}
}

int main(int argc, char *argv[]){
	clock_t starttime, endtime;
	int N = atoi(argv[1]);
	int maxGen = atoi(argv[2]);
	srand(time(NULL));

	//freopen("output2.txt", "w", stdout);

	const int N2 = N + 2;

	int *table;
	int *nextGen;

	cudaMallocManaged((void **)&table, N2 * N2 * sizeof(int));
	cudaMallocManaged((void **)&nextGen, N2 * N2 * sizeof(int));

	initTable(table, N2);

	/* copying the initial values of the table into the nextGen table */
	for (int i = 0; i < N2; i++) {
		for (int j = 0; j < N2; j++) {
			nextGen[N2 * i + j] = table[N2 * i + j];
		}
	}

	int blockSize = 128;
	int numBlocks = (N + blockSize - 1) / blockSize;

	starttime = clock();

	/* the main game loop that continues until the max generation or the game over condition has been met */
	for(int i = 0; i < maxGen; i++){
		//printTable(table, i, N2);
		nextGeneration <<<numBlocks, blockSize>>> (table, nextGen, N2);
		cudaDeviceSynchronize();
		swap(table, nextGen);
	}

	endtime = clock();
	printf("Time taken = %lf seconds\n", ((double) endtime - starttime) / CLOCKS_PER_SEC);

	cudaFree(table);
	cudaFree(nextGen);

	return 0;
}

	.file	"tmpxft_0023414a_00000000-6_gol.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3641:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3641:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Generation "
.LC1:
	.string	":\n"
.LC2:
	.string	" "
.LC3:
	.string	"\n"
	.text
	.globl	_Z10printTablePiii
	.type	_Z10printTablePiii, @function
_Z10printTablePiii:
.LFB3635:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leaq	.LC2(%rip), %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movslq	%edx, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%esi, %r12d
	leaq	.LC0(%rip), %rsi
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%r13, %rbp
	salq	$2, %r13
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdi, %rbx
	leaq	_ZSt4cout(%rip), %rdi
	pushq	%rcx
	.cfi_def_cfa_offset 64
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	%r12d, %esi
	xorl	%r12d, %r12d
	movq	%rax, %rdi
	call	_ZNSolsEi@PLT
	leaq	.LC1(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
.L3:
	cmpl	%ebp, %r12d
	jge	.L9
	leaq	(%rbx,%r13), %r14
.L4:
	movl	(%rbx), %esi
	leaq	_ZSt4cout(%rip), %rdi
	addq	$4, %rbx
	call	_ZNSolsEi@PLT
	movq	%r15, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cmpq	%r14, %rbx
	jne	.L4
	leaq	.LC3(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	incl	%r12d
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	jmp	.L3
.L9:
	popq	%rax
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3635:
	.size	_Z10printTablePiii, .-_Z10printTablePiii
	.globl	_Z9initTablePii
	.type	_Z9initTablePii, @function
_Z9initTablePii:
.LFB3636:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movslq	%esi, %rax
	movq	%rdi, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	xorl	%r14d, %r14d
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	xorl	%r12d, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rax, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	movq	%rax, (%rsp)
.L11:
	cmpl	%ebp, %r14d
	jge	.L21
	xorl	%r13d, %r13d
	leal	-1(%rbp), %esi
.L17:
	cmpl	%r13d, %esi
	leal	(%r12,%r13), %ebx
	je	.L12
	cmpl	%r14d, %esi
	je	.L12
	testl	%r14d, %r14d
	je	.L12
	testl	%r13d, %r13d
	jne	.L13
.L12:
	movslq	%ebx, %rbx
	jmp	.L16
.L13:
	movl	%esi, 12(%rsp)
	movslq	%ebx, %rbx
	call	rand@PLT
	movl	$2, %edi
	movl	12(%rsp), %esi
	cltd
	idivl	%edi
	decl	%edx
	je	.L16
	movl	$1, (%r15,%rbx,4)
	jmp	.L15
.L16:
	xorl	%eax, %eax
	movl	%eax, (%r15,%rbx,4)
.L15:
	incq	%r13
	cmpq	%r13, (%rsp)
	jne	.L17
	incl	%r14d
	addl	%ebp, %r12d
	jmp	.L11
.L21:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3636:
	.size	_Z9initTablePii, .-_Z9initTablePii
	.globl	_Z37__device_stub__Z14nextGenerationPiS_iPiS_i
	.type	_Z37__device_stub__Z14nextGenerationPiS_iPiS_i, @function
_Z37__device_stub__Z14nextGenerationPiS_iPiS_i:
.LFB3663:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L22
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z14nextGenerationPiS_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L22:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L24
	call	__stack_chk_fail@PLT
.L24:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3663:
	.size	_Z37__device_stub__Z14nextGenerationPiS_iPiS_i, .-_Z37__device_stub__Z14nextGenerationPiS_iPiS_i
	.globl	_Z14nextGenerationPiS_i
	.type	_Z14nextGenerationPiS_i, @function
_Z14nextGenerationPiS_i:
.LFB3664:
	.cfi_startproc
	endbr64
	jmp	_Z37__device_stub__Z14nextGenerationPiS_iPiS_i
	.cfi_endproc
.LFE3664:
	.size	_Z14nextGenerationPiS_i, .-_Z14nextGenerationPiS_i
	.section	.rodata.str1.1
.LC5:
	.string	"Time taken = %lf seconds\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3637:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rsi, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	movq	8(%rsi), %rdi
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	call	atoi@PLT
	movq	16(%rbp), %rdi
	movl	%eax, %ebx
	call	atoi@PLT
	leal	2(%rbx), %ebp
	xorl	%edi, %edi
	movl	%ebp, %r12d
	movl	%eax, %r13d
	call	time@PLT
	imull	%ebp, %r12d
	movl	%eax, %edi
	call	srand@PLT
	movq	%rsp, %rdi
	movl	$1, %edx
	movslq	%r12d, %r12
	salq	$2, %r12
	movq	%r12, %rsi
	call	cudaMallocManaged@PLT
	movl	$1, %edx
	leaq	8(%rsp), %rdi
	movq	%r12, %rsi
	call	cudaMallocManaged@PLT
	movq	(%rsp), %rdi
	movl	%ebp, %esi
	call	_Z9initTablePii
	movslq	%ebp, %rsi
	movq	(%rsp), %r8
	xorl	%ecx, %ecx
	movq	8(%rsp), %r9
	salq	$2, %rsi
	xorl	%edx, %edx
.L28:
	cmpl	%ebp, %edx
	jge	.L37
	movq	%rcx, %rax
	xorl	%edi, %edi
.L29:
	movl	(%r8,%rax), %r10d
	incl	%edi
	movl	%r10d, (%r9,%rax)
	addq	$4, %rax
	cmpl	%edi, %ebp
	jg	.L29
	incl	%edx
	addq	%rsi, %rcx
	jmp	.L28
.L37:
	addl	$127, %ebx
	movl	$128, %ecx
	xorl	%r14d, %r14d
	movabsq	$4294967424, %r15
	movl	%ebx, %eax
	cltd
	idivl	%ecx
	movl	%eax, %ebx
	call	clock@PLT
	movq	%rax, %r12
.L30:
	cmpl	%r13d, %r14d
	jge	.L38
	movl	%ebx, 16(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r15, %rdx
	movabsq	$4294967297, %rax
	movl	$1, %ecx
	movq	%rax, 20(%rsp)
	movq	16(%rsp), %rdi
	movl	24(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L31
	movq	8(%rsp), %rsi
	movq	(%rsp), %rdi
	movl	%ebp, %edx
	call	_Z37__device_stub__Z14nextGenerationPiS_iPiS_i
.L31:
	call	cudaDeviceSynchronize@PLT
	movq	(%rsp), %rax
	movq	8(%rsp), %rdx
	incl	%r14d
	movq	%rdx, (%rsp)
	movq	%rax, 8(%rsp)
	jmp	.L30
.L38:
	call	clock@PLT
	cvtsi2sdq	%r12, %xmm1
	movl	$2, %edi
	leaq	.LC5(%rip), %rsi
	cvtsi2sdq	%rax, %xmm0
	movb	$1, %al
	subsd	%xmm1, %xmm0
	divsd	.LC4(%rip), %xmm0
	call	__printf_chk@PLT
	movq	(%rsp), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L33
	call	__stack_chk_fail@PLT
.L33:
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3637:
	.size	main, .-main
	.section	.rodata.str1.1
.LC6:
	.string	"_Z14nextGenerationPiS_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3666:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC6(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z14nextGenerationPiS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3666:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC4:
	.long	0
	.long	1093567616
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <cstdlib>
#include <cstdio>
#include <iostream>

using namespace std;

const int ALIVE = 1;
const int DEAD = 0;

/* prints the table passed into the the function and its generation */
void printTable(int* table, int gen, int N2){
	cout << "Generation " << gen << ":\n";
	for (int i = 0; i < N2; i++) {
		for (int j = 0; j < N2; j++) {
			cout << table[N2 * i + j] << " ";
		}
		cout << "\n";
	}
}

/* modifies the nextGen table to represent the next generation of The Game of Life */
__global__
void nextGeneration(int* table, int* nextGen, int N2) {

	int j = blockDim.x * blockIdx.x + threadIdx.x + 1;

	for (int i = 1; i < N2-1; i++){
		if (j < N2-1) {
			int localChange = 0;
			int neighbors = 0;
			neighbors += table[N2 * (i-1) + j];
			neighbors += table[N2 * (i-1) + (j-1)];
			neighbors += table[N2 * (i-1) + (j+1)];
			neighbors += table[N2 * (i+1) + j];
			neighbors += table[N2 * (i+1) + (j-1)];
			neighbors += table[N2 * (i+1) + (j+1)];
			neighbors += table[N2 * i + (j+1)];
			neighbors += table[N2 * i + (j-1)];

			if (table[N2 * i + j] == DEAD && neighbors == 3) {
				nextGen[N2 * i + j] = ALIVE;
				localChange = 1;
			}

			if (neighbors <= 1 || neighbors >= 4) {
				if (table[N2 * i + j] == ALIVE) {
					nextGen[N2 * i + j] = DEAD;
					localChange = 1;
				}
			}

			/* this is used to make sure the two tables stay up to date with each other over the generations since they are being swapped after each iteration */
			if(localChange == 0) {
				nextGen[N2 * i + j] = table[N2 * i + j];
			}

		}
	}
}

/* initializes a table according to the size provided by the user with each element being randomized to be alive or dead */
void initTable(int* table, int N2){
	for (int i = 0; i < N2; i++) {
		for (int j = 0; j < N2; j++) {
			if (i == N2 - 1 || j == N2 - 1 || i == 0 || j == 0) {
				table[N2 * i + j] = DEAD;
			}
			else {
				if (rand() % 2 < 1) {
					table[N2 * i + j] = ALIVE;
				}
				else {
					table[N2 * i + j] = DEAD;
				}
			}

		}
	}
}

int main(int argc, char *argv[]){
	clock_t starttime, endtime;
	int N = atoi(argv[1]);
	int maxGen = atoi(argv[2]);
	srand(time(NULL));

	//freopen("output2.txt", "w", stdout);

	const int N2 = N + 2;

	int *table;
	int *nextGen;

	hipMallocManaged((void **)&table, N2 * N2 * sizeof(int));
	hipMallocManaged((void **)&nextGen, N2 * N2 * sizeof(int));

	initTable(table, N2);

	/* copying the initial values of the table into the nextGen table */
	for (int i = 0; i < N2; i++) {
		for (int j = 0; j < N2; j++) {
			nextGen[N2 * i + j] = table[N2 * i + j];
		}
	}

	int blockSize = 128;
	int numBlocks = (N + blockSize - 1) / blockSize;

	starttime = clock();

	/* the main game loop that continues until the max generation or the game over condition has been met */
	for(int i = 0; i < maxGen; i++){
		//printTable(table, i, N2);
		nextGeneration <<<numBlocks, blockSize>>> (table, nextGen, N2);
		hipDeviceSynchronize();
		swap(table, nextGen);
	}

	endtime = clock();
	printf("Time taken = %lf seconds\n", ((double) endtime - starttime) / CLOCKS_PER_SEC);

	hipFree(table);
	hipFree(nextGen);

	return 0;
}

	.text
	.file	"gol.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z10printTablePiii              # -- Begin function _Z10printTablePiii
	.type	_Z10printTablePiii,@function
_Z10printTablePiii:                     # @_Z10printTablePiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%edx, %ebx
	movl	%esi, %ebp
	movq	%rdi, (%rsp)                    # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	movl	$11, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	%ebp, %esi
	callq	_ZNSolsEi
	movl	$.L.str.1, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	testl	%ebx, %ebx
	jle	.LBB0_5
# %bb.1:                                # %.preheader.lr.ph
	movl	%ebx, %r15d
	xorl	%r12d, %r12d
	xorl	%r13d, %r13d
.LBB0_2:                                # %.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_3 Depth 2
	movl	%r12d, %eax
	movq	(%rsp), %rcx                    # 8-byte Reload
	leaq	(%rcx,%rax,4), %rbp
	xorl	%r14d, %r14d
.LBB0_3:                                #   Parent Loop BB0_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%rbp,%r14,4), %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSolsEi
	movl	$.L.str.2, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	incq	%r14
	cmpq	%r14, %r15
	jne	.LBB0_3
# %bb.4:                                # %._crit_edge
                                        #   in Loop: Header=BB0_2 Depth=1
	movl	$_ZSt4cout, %edi
	movl	$.L.str.3, %esi
	movl	$1, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	incq	%r13
	addl	%ebx, %r12d
	cmpq	%r15, %r13
	jne	.LBB0_2
.LBB0_5:                                # %._crit_edge14
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z10printTablePiii, .Lfunc_end0-_Z10printTablePiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z29__device_stub__nextGenerationPiS_i # -- Begin function _Z29__device_stub__nextGenerationPiS_i
	.type	_Z29__device_stub__nextGenerationPiS_i,@function
_Z29__device_stub__nextGenerationPiS_i: # @_Z29__device_stub__nextGenerationPiS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14nextGenerationPiS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z29__device_stub__nextGenerationPiS_i, .Lfunc_end1-_Z29__device_stub__nextGenerationPiS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z9initTablePii                 # -- Begin function _Z9initTablePii
	.type	_Z9initTablePii,@function
_Z9initTablePii:                        # @_Z9initTablePii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
                                        # kill: def $esi killed $esi def $rsi
	movq	%rdi, 16(%rsp)                  # 8-byte Spill
	movq	%rsi, 8(%rsp)                   # 8-byte Spill
	testl	%esi, %esi
	jle	.LBB2_10
# %bb.1:                                # %.preheader.lr.ph
	movq	8(%rsp), %rax                   # 8-byte Reload
	leal	-1(%rax), %r15d
	movl	%eax, %r12d
	xorl	%r13d, %r13d
	xorl	%ebp, %ebp
.LBB2_2:                                # %.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_3 Depth 2
	movl	%r13d, %eax
	movq	16(%rsp), %rcx                  # 8-byte Reload
	leaq	(%rcx,%rax,4), %r14
	xorl	%ebx, %ebx
.LBB2_3:                                #   Parent Loop BB2_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorl	%ecx, %ecx
	cmpq	%r15, %rbp
	je	.LBB2_8
# %bb.4:                                #   in Loop: Header=BB2_3 Depth=2
	testq	%rbx, %rbx
	je	.LBB2_8
# %bb.5:                                #   in Loop: Header=BB2_3 Depth=2
	testq	%rbp, %rbp
	je	.LBB2_8
# %bb.6:                                #   in Loop: Header=BB2_3 Depth=2
	cmpq	%rbx, %r15
	je	.LBB2_8
# %bb.7:                                #   in Loop: Header=BB2_3 Depth=2
	callq	rand
	movl	%eax, %ecx
	shrl	$31, %ecx
	addl	%eax, %ecx
	andl	$-2, %ecx
	subl	%ecx, %eax
	xorl	%ecx, %ecx
	testl	%eax, %eax
	setle	%cl
.LBB2_8:                                #   in Loop: Header=BB2_3 Depth=2
	movl	%ecx, (%r14,%rbx,4)
	incq	%rbx
	cmpq	%rbx, %r12
	jne	.LBB2_3
# %bb.9:                                # %._crit_edge
                                        #   in Loop: Header=BB2_2 Depth=1
	incq	%rbp
	addl	8(%rsp), %r13d                  # 4-byte Folded Reload
	cmpq	%r12, %rbp
	jne	.LBB2_2
.LBB2_10:                               # %._crit_edge31
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z9initTablePii, .Lfunc_end2-_Z9initTablePii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI3_0:
	.quad	0x412e848000000000              # double 1.0E+6
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$16, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %r14
	movq	8(%rsi), %rdi
	callq	atoi
	movl	%eax, %ebx
	movq	16(%r14), %rdi
	callq	atoi
	movl	%eax, %ebp
	xorl	%edi, %edi
	callq	time
	movl	%eax, %edi
	callq	srand
	leal	2(%rbx), %r14d
	movl	%r14d, %r15d
	imull	%r15d, %r15d
	shlq	$2, %r15
	leaq	8(%rsp), %r12
	movq	%r12, %rdi
	movq	%r15, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
	movq	%rsp, %rdi
	movq	%r15, %rsi
	movl	$1, %edx
	callq	hipMallocManaged
	movq	(%r12), %rdi
	movl	%r14d, %esi
	callq	_Z9initTablePii
	cmpl	$-1, %ebx
	jl	.LBB3_5
# %bb.1:                                # %.preheader.lr.ph
	movq	8(%rsp), %rax
	movq	(%rsp), %rcx
	movl	%r14d, %edx
	leaq	(,%rdx,4), %rsi
	xorl	%edi, %edi
.LBB3_2:                                # %.lr.ph
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_3 Depth 2
	xorl	%r8d, %r8d
.LBB3_3:                                #   Parent Loop BB3_2 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%rax,%r8,4), %r9d
	movl	%r9d, (%rcx,%r8,4)
	incq	%r8
	cmpq	%r8, %rdx
	jne	.LBB3_3
# %bb.4:                                # %._crit_edge
                                        #   in Loop: Header=BB3_2 Depth=1
	incq	%rdi
	addq	%rsi, %rax
	addq	%rsi, %rcx
	cmpq	%rdx, %rdi
	jne	.LBB3_2
.LBB3_5:                                # %._crit_edge41
	callq	clock
	movq	%rax, %r15
	testl	%ebp, %ebp
	jle	.LBB3_10
# %bb.6:                                # %.lr.ph44
	leal	127(%rbx), %eax
	addl	$254, %ebx
	testl	%eax, %eax
	cmovnsl	%eax, %ebx
	movabsq	$4294967296, %r12               # imm = 0x100000000
	sarl	$7, %ebx
	btsq	$32, %rbx
	subq	$-128, %r12
.LBB3_7:                                # =>This Inner Loop Header: Depth=1
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_9
# %bb.8:                                #   in Loop: Header=BB3_7 Depth=1
	movq	8(%rsp), %rdi
	movq	(%rsp), %rsi
	movl	%r14d, %edx
	callq	_Z29__device_stub__nextGenerationPiS_i
.LBB3_9:                                #   in Loop: Header=BB3_7 Depth=1
	callq	hipDeviceSynchronize
	movq	8(%rsp), %rax
	movq	(%rsp), %rcx
	movq	%rcx, 8(%rsp)
	movq	%rax, (%rsp)
	decl	%ebp
	jne	.LBB3_7
.LBB3_10:                               # %._crit_edge45
	callq	clock
	cvtsi2sd	%rax, %xmm0
	cvtsi2sd	%r15, %xmm1
	subsd	%xmm1, %xmm0
	divsd	.LCPI3_0(%rip), %xmm0
	movl	$.L.str.4, %edi
	movb	$1, %al
	callq	printf
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$16, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14nextGenerationPiS_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Generation "
	.size	.L.str, 12

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	":\n"
	.size	.L.str.1, 3

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	" "
	.size	.L.str.2, 2

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"\n"
	.size	.L.str.3, 2

	.type	_Z14nextGenerationPiS_i,@object # @_Z14nextGenerationPiS_i
	.section	.rodata,"a",@progbits
	.globl	_Z14nextGenerationPiS_i
	.p2align	3, 0x0
_Z14nextGenerationPiS_i:
	.quad	_Z29__device_stub__nextGenerationPiS_i
	.size	_Z14nextGenerationPiS_i, 8

	.type	.L.str.4,@object                # @.str.4
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.4:
	.asciz	"Time taken = %lf seconds\n"
	.size	.L.str.4, 26

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z14nextGenerationPiS_i"
	.size	.L__unnamed_1, 24

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z29__device_stub__nextGenerationPiS_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _ZSt4cout
	.addrsig_sym _Z14nextGenerationPiS_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z14nextGenerationPiS_i ; -- Begin function _Z14nextGenerationPiS_i
	.globl	_Z14nextGenerationPiS_i
	.p2align	8
	.type	_Z14nextGenerationPiS_i,@function
_Z14nextGenerationPiS_i:                ; @_Z14nextGenerationPiS_i
; %bb.0:
	s_load_b32 s2, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s2, 3
	s_cbranch_scc1 .LBB0_15
; %bb.1:                                ; %.lr.ph
	s_clause 0x1
	s_load_b32 s3, s[0:1], 0x24
	s_load_b128 s[4:7], s[0:1], 0x0
	v_mov_b32_e32 v6, 1
	v_mov_b32_e32 v8, 0
	s_lshl_b32 s8, s2, 1
	s_mov_b32 s9, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s0, s3, 0xffff
	s_add_i32 s3, s2, -1
	v_mad_u64_u32 v[1:2], null, s15, s0, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_mov_b32 v2, 1 :: v_dual_add_nc_u32 v7, 2, v1
	v_add_nc_u32_e32 v0, 1, v1
	v_cmp_le_i32_e32 vcc_lo, s3, v0
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_add_nc_u32_e32 v9, 1, v2
	s_and_saveexec_b32 s0, vcc_lo
	s_xor_b32 s0, exec_lo, s0
; %bb.3:                                ; %._crit_edge81
                                        ;   in Loop: Header=BB0_2 Depth=1
	v_add_nc_u32_e32 v9, 1, v2
                                        ; implicit-def: $vgpr2
; %bb.4:                                ; %Flow90
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_and_not1_saveexec_b32 s10, s0
	s_cbranch_execz .LBB0_14
; %bb.5:                                ;   in Loop: Header=BB0_2 Depth=1
	v_add_nc_u32_e32 v3, -1, v2
	v_mul_lo_u32 v22, v2, s2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_lo_u32 v4, v3, s2
	v_add_nc_u32_e32 v18, v22, v7
	v_add_nc_u32_e32 v20, v22, v1
	v_add_nc_u32_e32 v22, v22, v0
	s_delay_alu instid0(VALU_DEP_4)
	v_add_nc_u32_e32 v3, v4, v0
	v_add_nc_u32_e32 v10, v4, v1
	v_add_nc_u32_e32 v5, s8, v4
	v_add_nc_u32_e32 v12, v4, v7
	v_ashrrev_i32_e32 v19, 31, v18
	v_ashrrev_i32_e32 v4, 31, v3
	v_ashrrev_i32_e32 v11, 31, v10
	v_add_nc_u32_e32 v14, v5, v0
	v_add_nc_u32_e32 v2, v5, v1
	v_add_nc_u32_e32 v16, v5, v7
	v_lshlrev_b64 v[4:5], 2, v[3:4]
	v_ashrrev_i32_e32 v13, 31, v12
	v_lshlrev_b64 v[10:11], 2, v[10:11]
	v_ashrrev_i32_e32 v15, 31, v14
	v_ashrrev_i32_e32 v3, 31, v2
	v_ashrrev_i32_e32 v17, 31, v16
	v_lshlrev_b64 v[12:13], 2, v[12:13]
	v_add_co_u32 v4, s0, s4, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v5, s0, s5, v5, s0
	v_lshlrev_b64 v[14:15], 2, v[14:15]
	v_add_co_u32 v10, s0, s4, v10
	v_add_co_ci_u32_e64 v11, s0, s5, v11, s0
	v_add_co_u32 v12, s0, s4, v12
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	v_add_co_ci_u32_e64 v13, s0, s5, v13, s0
	v_add_co_u32 v14, s0, s4, v14
	v_lshlrev_b64 v[16:17], 2, v[16:17]
	v_add_co_ci_u32_e64 v15, s0, s5, v15, s0
	v_add_co_u32 v2, s0, s4, v2
	v_lshlrev_b64 v[18:19], 2, v[18:19]
	v_ashrrev_i32_e32 v21, 31, v20
	v_add_co_ci_u32_e64 v3, s0, s5, v3, s0
	v_add_co_u32 v16, s0, s4, v16
	v_ashrrev_i32_e32 v23, 31, v22
	v_add_co_ci_u32_e64 v17, s0, s5, v17, s0
	v_lshlrev_b64 v[20:21], 2, v[20:21]
	v_add_co_u32 v18, s0, s4, v18
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v19, s0, s5, v19, s0
	s_clause 0x6
	global_load_b32 v24, v[4:5], off
	global_load_b32 v25, v[10:11], off
	global_load_b32 v12, v[12:13], off
	global_load_b32 v13, v[14:15], off
	global_load_b32 v14, v[2:3], off
	global_load_b32 v15, v[16:17], off
	global_load_b32 v16, v[18:19], off
	v_lshlrev_b64 v[2:3], 2, v[22:23]
	v_add_co_u32 v10, s0, s4, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v11, s0, s5, v21, s0
	v_add_co_u32 v4, s0, s4, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v5, s0, s5, v3, s0
	s_clause 0x1
	global_load_b32 v10, v[10:11], off
	global_load_b32 v17, v[4:5], off
	s_waitcnt vmcnt(7)
	v_add_nc_u32_e32 v11, v25, v24
	s_waitcnt vmcnt(5)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add3_u32 v11, v11, v12, v13
	s_waitcnt vmcnt(3)
	v_add3_u32 v11, v11, v14, v15
	s_waitcnt vmcnt(1)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_add3_u32 v11, v11, v16, v10
	v_mov_b32_e32 v10, 0
	s_waitcnt vmcnt(0)
	v_cmp_eq_u32_e64 s0, 0, v17
	v_cmp_eq_u32_e64 s1, 3, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, s0, s1
	s_and_saveexec_b32 s1, s0
	s_cbranch_execz .LBB0_7
; %bb.6:                                ;   in Loop: Header=BB0_2 Depth=1
	v_add_co_u32 v12, s0, s6, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v13, s0, s7, v3, s0
	v_mov_b32_e32 v10, 1
	global_store_b32 v[12:13], v6, off
.LBB0_7:                                ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	v_add_nc_u32_e32 v11, -4, v11
	s_mov_b32 s1, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_u32_e32 -2, v11
	s_cbranch_execz .LBB0_11
; %bb.8:                                ;   in Loop: Header=BB0_2 Depth=1
	global_load_b32 v11, v[4:5], off
	s_mov_b32 s11, exec_lo
	s_waitcnt vmcnt(0)
	v_cmpx_eq_u32_e32 1, v11
	s_cbranch_execz .LBB0_10
; %bb.9:                                ;   in Loop: Header=BB0_2 Depth=1
	v_add_co_u32 v11, s0, s6, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v12, s0, s7, v3, s0
	v_mov_b32_e32 v10, 1
	global_store_b32 v[11:12], v8, off
.LBB0_10:                               ; %Flow89
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s11
.LBB0_11:                               ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s1
	s_mov_b32 s1, exec_lo
	v_cmpx_eq_u32_e32 0, v10
	s_cbranch_execz .LBB0_13
; %bb.12:                               ;   in Loop: Header=BB0_2 Depth=1
	global_load_b32 v4, v[4:5], off
	v_add_co_u32 v2, s0, s6, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v3, s0, s7, v3, s0
	s_waitcnt vmcnt(0)
	global_store_b32 v[2:3], v4, off
.LBB0_13:                               ; %Flow
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
.LBB0_14:                               ; %Flow91
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_or_b32 exec_lo, exec_lo, s10
	v_cmp_eq_u32_e64 s0, s3, v9
	v_mov_b32_e32 v2, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s9, s0, s9
	s_and_not1_b32 exec_lo, exec_lo, s9
	s_cbranch_execnz .LBB0_2
.LBB0_15:                               ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14nextGenerationPiS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 26
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z14nextGenerationPiS_i, .Lfunc_end0-_Z14nextGenerationPiS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 864
; NumSgprs: 18
; NumVgprs: 26
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 3
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 26
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z14nextGenerationPiS_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z14nextGenerationPiS_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     26
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
