/**
 * Sensitivity Encoding (SENSE) Reconstruction
 * SENSE is a Parallel MRI reconstruction method. The inputs of SENSE reconstruction are aliased data from MRI scanner and
 * receiver coil sensitivity encoding matrices.   
 * The output of SENSE reconstruction is reconstructed MR image for clinical usage.
 * 
 * Mathematically, SENSE can be represented as: U = C x M  (1), where U is the aliased image obtained from scanner, M is MR image to be 
 * reconstructed and C is receiver coil sensitivity encoding matrix.
 * In order to find M, the above equation can be written as:  M = inv(C) x U   (2).
 * To solve equation 2, there is requirement to invert large number of small encoding matrices (in this simpler case the order of small matrices will be 2x2). 
 * To perform this task iteratively significant computation time is involved. Parallel implementation of SENSE using GPU is presented in this work where 
 * number of CUDA threads are launched as per required matrix inversions to perform the tasks in parallel hence reducing the computation
 * time (one of the main limitation in MRI). The GPU implementation using NVIDIA Titan XP GPU is more than 10x faster compared to CPU implementation
 * (core i7 with 8GB RAM)
 * In this work, the size of U, C and M are 128x256x2, 256x256x2 and 256x256 
 *
 * Note: The data in all the matrices is complex, therefore real part and imaginary part are handled separately in the code given below
 * 
 */

//declaration of header files
#include <stdio.h>
#include <cuda.h>
#include <stdlib.h>

#define N 128
using namespace std;

//start of CUDA kernel "sense". 
 __global__ void sense( float * d_i1imag, float * d_i2imag, float * d_i1real, float * d_i2real, float * d_c1imag, float * d_c2imag, float * d_c1real, float * d_c2real, float * d_rmreal, float * d_rmimag) 
{
	float d_detreal;				// determinant real part
	float d_detimag;				// determinant imaginary part
	float d_divtemp;				// complex determinant
	float d_sreal[2][2];				//encoding matrix of size 2x2 real part
	float d_simag[2][2];				//encoding matrix of size 2x2 imaginary part
	float d_rpreal[2];				//reconstructed pixels real part 
	float d_rpimag[2];				//reconstructed pixels imaginary part
	float d_sinreal[2][2];				// to find inverse of 2x2 matrix (real part)
	float d_sinimag[2][2];				// to find inverse of 2x2 matrix (imaginary part)

	//CUDA thread index calculation 
	int col = blockIdx.x * blockDim.x + threadIdx.x;
	int row = blockIdx.y * blockDim.y +threadIdx.y;
	int index=col+row*N;

	//copying data from input receiver coil sensitivty matrix (real part)
	d_sreal[0][0] = d_c1real[index];
	d_sreal[0][1] = d_c1real[index+32768];
	d_sreal[1][0] = d_c2real[index];
	d_sreal[1][1] = d_c2real[index+32768];

	//copying data from input receiver coil sensitivty matrix (imaginary part)
	d_simag[0][0] = d_c1imag[index];
	d_simag[0][1] = d_c1imag[index+32768];
	d_simag[1][0] = d_c2imag[index];
	d_simag[1][1] = d_c2imag[index+32768];

	//calculation of complex determinant
	d_detreal = ((d_sreal[0][0]*d_sreal[1][1])-(d_simag[0][0] *d_simag[1][1]))-((d_sreal[0][1] * d_sreal[1][0]) - (d_simag[0][1] *d_simag[1][0]));
	d_detimag = ((d_simag[0][0]*d_sreal[1][1])+(d_sreal[0][0] *d_simag[1][1]))-((d_simag[0][1] * d_sreal[1][0]) + (d_sreal[0][1] *d_simag[1][0]));
	d_divtemp = (d_detreal*d_detreal) + (d_detimag * d_detimag);

	//dividing the adjoint of matrix with the determinant (real part)
	d_sinreal[0][0] = ((d_sreal[1][1] * d_detreal)   - (d_simag[1][1]*(-d_detimag)))  /d_divtemp;
	d_sinreal[0][1] = -(((d_sreal[0][1] * d_detreal) - (d_simag[0][1]*(-d_detimag)))) /d_divtemp;
	d_sinreal[1][0] = -(((d_sreal[1][0] * d_detreal) - (d_simag[1][0]*(-d_detimag)))) /d_divtemp;
	d_sinreal[1][1] = ((d_sreal[0][0] * d_detreal)   - (d_simag[0][0]*(-d_detimag)))  /d_divtemp;
	
	//dividing the adjoint of matrix with the determinant (imaginary part)
	d_sinimag[0][0] = ((d_simag[1][1] * d_detreal) + (d_sreal[1][1]*(-d_detimag)))/d_divtemp;
	d_sinimag[0][1] = -(((d_simag[0][1] * d_detreal) + (d_sreal[0][1]*(-d_detimag))))/d_divtemp;
	d_sinimag[1][0] = -(((d_simag[1][0] * d_detreal) + (d_sreal[1][0]*(-d_detimag))))/d_divtemp;
	d_sinimag[1][1] = ((d_simag[0][0] * d_detreal) + (d_sreal[0][0]*(-d_detimag)))/d_divtemp;
	
	//Multiplying the inverse of 2x2 encoding matrix (calculated above) with 
	//2x1 matrix of input aliased matrix (from scanner) real part 	
	d_rpreal[0] = ((d_i1real[index] * d_sinreal[0][0]) - (d_i1imag[index] * d_sinimag[0][0])) + ((d_i2real[index] * d_sinreal[0][1]) - (d_i2imag[index] * d_sinimag[0][1]));
	d_rpreal[1] = ((d_i1real[index] * d_sinreal[1][0]) - (d_i1imag[index] * d_sinimag[1][0])) + ((d_i2real[index] * d_sinreal[1][1]) - (d_i2imag[index] * d_sinimag[1][1]));
	
	//Multiplying the inverse of 2x2 encoding matrix (calculated above) with 
	//2x1 matrix of input aliased matrix (from scanner) imaginary part
	d_rpimag[0] = ((d_i1real[index] * d_sinimag[0][0]) + (d_i1imag[index] * d_sinreal[0][0])) + ((d_i2real[index] * d_sinimag[0][1]) + (d_i2imag[index] * d_sinreal[0][1]));
	d_rpimag[1] = ((d_i1real[index] * d_sinimag[1][0]) + (d_i1imag[index] * d_sinreal[1][0])) + ((d_i2real[index] * d_sinimag[1][1]) + (d_i2imag[index] * d_sinreal[1][1]));

	//Copying the resulting real and imaginary numbers to the final reconstructed image  
	d_rmreal[index] = d_rpreal[0]; 
	d_rmreal[index+32768] = d_rpreal[1];
	d_rmimag[index] = d_rpimag[0];
	d_rmimag[index+32768] = d_rpimag[1];
}


int main ()
{
	float temp;				    //temparary variable
	int i,j,k;				    //index variables 
	int maxx, maxim;		    //maxx is size of unaliased image i.e.256x256, maxim is size of aliased image i.e. 128x256 
	float * h_coil1imag;		//pointer for receiver coil 1 matrix imaginary part
	float * h_coil1real;		//pointer for receiver coil 1 matrix real part
	float * h_coil2imag;		//pointer for receiver coil 2 matrix imaginary part
	float * h_coil2real;		//pointer for receiver coil 2 matrix real part

	float * h_im1real;		//pointer for aliased image 1 matrix real part
	float * h_im1imag;		//pointer for aliased image 1 matrix imaginary part
	float * h_im2real;		//pointer for aliased image 2 matrix real part
	float * h_im2imag;		//pointer for aliased image 3 matrix imaginary part

	float * h_rimreal;		//pointer for reconstructed image matrix real part
	float * h_rimimag;		//pointer for reconstructed image matrix imaginary part
	
	maxim = 128*256;		//maxim is size of aliased image i.e. 128x256
	maxx  = 256*256;		//maxx is size of unaliased image i.e.256x256
	const int ARRAY_BYTES1 = maxx  * sizeof(float);		//it will be used for reconstructed image and receiver coils matrices
	const int ARRAY_BYTES2 = maxim * sizeof(float);		//it will be used for aliased image
	
	dim3 grid(1,128);		//dimensions of blocks in a grid
	dim3 block(128,2);		//dimensions of threads in a block

	//memory allocation for reconstructed image real and imaginary parts respectively
	h_rimreal = (float*) calloc (maxx,sizeof(float));
	if (h_rimreal==NULL) exit (1);			//exception handling
	h_rimimag = (float*) calloc (maxx,sizeof(float));
	if (h_rimimag==NULL) exit (1);			//exception handling
	
	//memory allocation for receiver coils matrices real and imaginary parts respectively
	h_coil1imag = (float*) calloc (maxx,sizeof(float));
	if (h_coil1imag==NULL) exit (1);

	h_coil1real = (float*) calloc (maxx,sizeof(float));
	if (h_coil1real==NULL) exit (1);

	h_coil2imag = (float*) calloc (maxx,sizeof(float));
	if (h_coil2imag==NULL) exit (1);

	h_coil2real = (float*) calloc (maxx,sizeof(float));
	if (h_coil2real==NULL) exit (1);
	
	//memory allocation for aliased images real and imaginary parts respectively

	h_im1real = (float*) calloc (maxim,sizeof(float));
	if (h_im1real==NULL) exit (1); 
	
	h_im1imag = (float*) calloc (maxim,sizeof(float));
	if (h_im1imag==NULL) exit (1);

	h_im2real = (float*) calloc (maxim,sizeof(float));
	if (h_im2real==NULL) exit (1);

	h_im2imag = (float*) calloc (maxim,sizeof(float));
	if (h_im2imag==NULL) exit (1);

	//Copying data from file for aliased image1 real  data 
	FILE *fptr5;
	fptr5 = fopen ("im1real.txt", "r");
	k=0;
	for(i=0;i<=127;i++)
	{
		for(j=0;j<=255;j++)
		{
			fscanf(fptr5, "%f,  ",&temp  );
			h_im1real[k] = temp; 
			k=k+1;
		}	
	}
	fclose (fptr5);

	//Copying data from file for aliased image1 imaginary  data 
	FILE *fptr6;
	fptr6 = fopen ("im1imag.txt", "r");
	k=0;
	for(i=0;i<=127;i++)
	{
		for(j=0;j<=255;j++)
		{
			fscanf(fptr6, "%f,  ",&temp  );
			h_im1imag[k] = temp; 
			k=k+1;
		}	
	}
	fclose (fptr6);

	//Copying data from file for  aliased image2 real data 
	FILE *fptr7;
	fptr7 = fopen ("im2real.txt", "r");
	k=0;
	for(i=0;i<=127;i++)
	{ 
		for(j=0;j<=255;j++)
		{
			fscanf(fptr7, "%f,  ",&temp  );
			h_im2real[k] = temp; 
			k=k+1;
		}	
	}
	fclose (fptr7);	

	//Copying data from file for aliased image2 imaginary  data 
	FILE *fptr8;
	fptr8 = fopen ("im2imag.txt", "r");
	k=0;
	for(i=0;i<=127;i++)
	{
		for(j=0;j<=255;j++)
		{
			fscanf(fptr8, "%f,  ",&temp  );
			h_im2imag[k] = temp; 
			k=k+1;
		}	
	}
	fclose (fptr8);
	
	//Copying data from file for rceiver coil 1 imaginary  data 
	FILE *fptr1;
	fptr1 = fopen ("coil1imag.txt", "r");
	k=0;
	for(i=0;i<=255;i++)
	{
		for(j=0;j<=255;j++)
		{
			fscanf(fptr1, "%f,  ",&temp  );
			h_coil1imag[k] = temp; 
			k=k+1;
		}	
	}
	fclose (fptr1);
		
	//Copying data from file for rceiver coil 1 real data 
	FILE *fptr2;
	fptr2 = fopen ("coil1real.txt", "r");
	k=0;
	for(i=0;i<=255;i++)
	{
		for(j=0;j<=255;j++)
		{
			fscanf(fptr2, "%f,  ",&temp  );
			h_coil1real[k] = temp; 
			k=k+1;
		}	
	}
	fclose (fptr2);

	//Copying data from file for rceiver coil 2 imaginary  data 
	FILE *fptr3;
	fptr3 = fopen ("coil2imag.txt", "r");
	k=0;
	for(i=0;i<=255;i++)
	{
		for(j=0;j<=255;j++)
		{
			fscanf(fptr3, "%f,  ",&temp  );
			h_coil2imag[k] = temp; 
			k=k+1;
		}	
	}
	fclose (fptr3);

	//Copying data from file for rceiver coil 2 real data 
	FILE *fptr4;
	fptr4 = fopen ("coil2real.txt", "r");
	k=0;
	for(i=0;i<=255;i++)
	{
		for(j=0;j<=255;j++)
		{
			fscanf(fptr4, "%f,  ",&temp  );
			h_coil2real[k] = temp; 
			k=k+1;
		}	
	}
	fclose (fptr4);
	
	// declaration of GPU memory pointers
	float * d_c1imag;  //device pointer for coil 1 matrix imaginary part
	float * d_c1real;  //device pointer for coil 1 matrix real part
	float * d_c2imag;  //device pointer for coil 2 matrix imaginary part
	float * d_c2real;  //device pointer for coil 2 matrix real part	
	float * d_i1real;  //device pointer for aliased image 1 matrix real part
	float * d_i1imag;  //device pointer for aliased image 1 matrix imaginary part
	float * d_i2real;  //device pointer for aliased image 2 matrix real part
	float * d_i2imag;  //device pointer for aliased image 2 matrix imaginary part
	float * d_rmreal;  //device pointer for image matrix to be reconstructed real part
	float * d_rmimag;  //device pointer for image matrix to be reconstructed imaginary part


	// Allocation of memory in device memory using CUDA Malloc function
	cudaMalloc( (void**) &d_rmreal, ARRAY_BYTES1); // for image to be reconstructed real part 
	cudaMalloc( (void**) &d_rmimag, ARRAY_BYTES1); // for image to be reconstructed imaginary part
	cudaMalloc( (void**) &d_c1imag, ARRAY_BYTES1); // for coil 1 imaginary part
	cudaMalloc( (void**) &d_c1real, ARRAY_BYTES1); // for coil 1 real part
	cudaMalloc( (void**) &d_c2imag, ARRAY_BYTES1); // for coil 2 imaginary part
	cudaMalloc( (void**) &d_c2real, ARRAY_BYTES1); // for coil 2 real part
	cudaMalloc( (void**) &d_i1real, ARRAY_BYTES2); // for aliased image 1 real part
	cudaMalloc( (void**) &d_i1imag, ARRAY_BYTES2); // for aliased image 1 imaginary part
	cudaMalloc( (void**) &d_i2real, ARRAY_BYTES2); // for aliased image 1 real part
	cudaMalloc( (void**) &d_i2imag, ARRAY_BYTES2); // for aliased image 1 imaginary part

	//Copying data from host memory to device memory
	cudaMemcpy(d_i1imag, h_im1imag, ARRAY_BYTES2, cudaMemcpyHostToDevice); //for image 1 imaginary part
	cudaMemcpy(d_i2imag, h_im2imag, ARRAY_BYTES2, cudaMemcpyHostToDevice); //for image 2 imaginary part
	cudaMemcpy(d_i1real, h_im1real, ARRAY_BYTES2, cudaMemcpyHostToDevice); //for image 1 real part
	cudaMemcpy(d_i2real, h_im2real, ARRAY_BYTES2, cudaMemcpyHostToDevice); //for image 2 real part
	cudaMemcpy(d_c1imag, h_coil1imag, ARRAY_BYTES1, cudaMemcpyHostToDevice); //for coil 1 imaginary part
	cudaMemcpy(d_c2imag, h_coil2imag, ARRAY_BYTES1, cudaMemcpyHostToDevice); //for coil 2 imaginary part
	cudaMemcpy(d_c1real, h_coil1real, ARRAY_BYTES1, cudaMemcpyHostToDevice); //for coil 1 real part
	cudaMemcpy(d_c2real, h_coil2real, ARRAY_BYTES1, cudaMemcpyHostToDevice); //for coil 2 real part
	cudaMemcpy(d_rmreal, h_rimreal, ARRAY_BYTES1, cudaMemcpyHostToDevice); //for image to be reconstructed real part
	cudaMemcpy(d_rmimag, h_rimimag, ARRAY_BYTES1, cudaMemcpyHostToDevice); //for image to be reconstructed imaginary part
	
	//initiation of CUDA timer's event to estimate the computation time of kernel
	float time; 
	cudaEvent_t start, stop;
	cudaEventCreate(&start);
	cudaEventCreate(&stop);
	cudaEventRecord(start, 0);
	
	//Launching the Kernel
	sense<<<grid,block>>>( d_i1imag, d_i2imag, d_i1real, d_i2real, d_c1imag, d_c2imag, d_c1real, d_c2real, d_rmreal, d_rmimag);

	cudaDeviceSynchronize(); //synchronization of threads
	
	//CUDA timer's events to estimate the computation time
	cudaEventRecord(stop, 0); 
	cudaEventSynchronize(stop) ;
	cudaEventElapsedTime(&time, start, stop) ;
	printf("Time for SENSE reconstruction:  %3.1f ms \n", time);
	
	//copying the results from device memory to host memory
	cudaMemcpy(h_rimreal, d_rmreal, ARRAY_BYTES1, cudaMemcpyDeviceToHost); //image to be reconstructed real part
	cudaMemcpy(h_rimimag, d_rmimag, ARRAY_BYTES1, cudaMemcpyDeviceToHost); //image to be reconstructed imaginary part

	//storing the results in output file (real part)
	FILE *fptr45;
	fptr45 = fopen ("reconstructionreal.txt", "w");
	k=0;
	for(i=0;i<=255;i++)
	{
		for(j=0;j<=255;j++)
		{
			fprintf(fptr45, " %f \t",h_rimreal[k]);			
			k=k+1;
		}
		fprintf(fptr45, " \n");
	}
	fclose (fptr45);
	//storing the results in output file (imaginary part)
	FILE *fptr445;
	fptr445 = fopen ("reconstructionimag.txt", "w");
	k=0;
	for(i=0;i<=255;i++)
	{
		for(j=0;j<=255;j++)
		{
			fprintf(fptr445, " %f \t",h_rimimag[k]);			
			k=k+1;
		}	
		fprintf(fptr445, " \n");
	}
	fclose (fptr445);
	
	printf("\n SENSE reconstruction is finished successfully \n");
	// free the host memory	
	free (h_coil1imag);
	free (h_coil1real);
	free (h_coil2imag);
	free (h_coil2real);
	free (h_im1real);
	free (h_im1imag);
	free (h_im2real);
	free (h_im2imag);
	free (h_rimreal);
	free (h_rimimag);

	// free the device memory
	cudaFree (d_c1imag);
	cudaFree (d_c1real);
	cudaFree (d_c2imag);
	cudaFree (d_c2real);
	cudaFree (d_i1real);
	cudaFree (d_i1imag);
	cudaFree (d_i2real);
	cudaFree (d_i2imag);
	cudaFree (d_rmreal);
	cudaFree (d_rmimag);

	getchar();
	return 0;
}

	.file	"tmpxft_003aeb42_00000000-6_SENSE.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z42__device_stub__Z5sensePfS_S_S_S_S_S_S_S_S_PfS_S_S_S_S_S_S_S_S_
	.type	_Z42__device_stub__Z5sensePfS_S_S_S_S_S_S_S_S_PfS_S_S_S_S_S_S_S_S_, @function
_Z42__device_stub__Z5sensePfS_S_S_S_S_S_S_S_S_PfS_S_S_S_S_S_S_S_S_:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$248, %rsp
	.cfi_def_cfa_offset 256
	movq	256(%rsp), %rax
	movq	%rdi, 72(%rsp)
	leaq	104(%rsp), %rdi
	movq	%rsi, 64(%rsp)
	leaq	116(%rsp), %rsi
	movq	%rax, 24(%rsp)
	movq	264(%rsp), %rax
	movq	%rdx, 56(%rsp)
	leaq	88(%rsp), %rdx
	movq	%rax, 16(%rsp)
	movq	272(%rsp), %rax
	movq	%rcx, 48(%rsp)
	leaq	96(%rsp), %rcx
	movq	%rax, 8(%rsp)
	movq	280(%rsp), %rax
	movq	%r8, 40(%rsp)
	movq	%r9, 32(%rsp)
	movq	%rax, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 232(%rsp)
	xorl	%eax, %eax
	leaq	72(%rsp), %rax
	movl	$1, 112(%rsp)
	movq	%rax, 152(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 176(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 208(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 216(%rsp)
	movq	%rsp, %rax
	movq	%rax, 224(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 104(%rsp)
	movq	%rax, 116(%rsp)
	movl	$1, 124(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	96(%rsp)
	.cfi_def_cfa_offset 264
	leaq	_Z5sensePfS_S_S_S_S_S_S_S_S_(%rip), %rdi
	pushq	96(%rsp)
	.cfi_def_cfa_offset 272
	movq	132(%rsp), %rcx
	movl	140(%rsp), %r8d
	movq	120(%rsp), %rsi
	movl	128(%rsp), %edx
	leaq	168(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 264
	popq	%rdx
	.cfi_def_cfa_offset 256
.L2:
	movq	232(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$248, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z42__device_stub__Z5sensePfS_S_S_S_S_S_S_S_S_PfS_S_S_S_S_S_S_S_S_, .-_Z42__device_stub__Z5sensePfS_S_S_S_S_S_S_S_S_PfS_S_S_S_S_S_S_S_S_
	.globl	_Z5sensePfS_S_S_S_S_S_S_S_S_
	.type	_Z5sensePfS_S_S_S_S_S_S_S_S_, @function
_Z5sensePfS_S_S_S_S_S_S_S_S_:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z42__device_stub__Z5sensePfS_S_S_S_S_S_S_S_S_PfS_S_S_S_S_S_S_S_S_
	.cfi_endproc
.LFE2053:
	.size	_Z5sensePfS_S_S_S_S_S_S_S_S_, .-_Z5sensePfS_S_S_S_S_S_S_S_S_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"r"
.LC1:
	.string	"im1real.txt"
.LC2:
	.string	"%f,  "
.LC3:
	.string	"im1imag.txt"
.LC4:
	.string	"im2real.txt"
.LC5:
	.string	"im2imag.txt"
.LC6:
	.string	"coil1imag.txt"
.LC7:
	.string	"coil1real.txt"
.LC8:
	.string	"coil2imag.txt"
.LC9:
	.string	"coil2real.txt"
.LC10:
	.string	"Time for SENSE reconstruction:  %3.1f ms \n"
.LC11:
	.string	"w"
.LC12:
	.string	"reconstructionreal.txt"
.LC13:
	.string	" %f \t"
.LC14:
	.string	" \n"
.LC15:
	.string	"reconstructionimag.txt"
.LC16:
	.string	"\n SENSE reconstruction is finished successfully \n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$4, %esi
	movl	$65536, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$216, %rsp
	.cfi_def_cfa_offset 272
	movq	%fs:40, %rax
	movq	%rax, 200(%rsp)
	movabsq	$549755813889, %rax
	movl	$1, 184(%rsp)
	movl	$1, 196(%rsp)
	movq	%rax, 176(%rsp)
	movl	$67108865, %eax
	salq	$7, %rax
	movq	%rax, 188(%rsp)
	call	calloc@PLT
	movq	%rax, 8(%rsp)
	testq	%rax, %rax
	jne	.L9
.L10:
	movl	$1, %edi
	call	exit@PLT
.L9:
	movl	$4, %esi
	movl	$65536, %edi
	call	calloc@PLT
	movq	%rax, 16(%rsp)
	testq	%rax, %rax
	je	.L10
	movl	$4, %esi
	movl	$65536, %edi
	call	calloc@PLT
	movq	%rax, %r13
	testq	%rax, %rax
	je	.L10
	movl	$4, %esi
	movl	$65536, %edi
	call	calloc@PLT
	movq	%rax, %r12
	testq	%rax, %rax
	je	.L10
	movl	$4, %esi
	movl	$65536, %edi
	call	calloc@PLT
	movq	%rax, %rbp
	testq	%rax, %rax
	je	.L10
	movl	$4, %esi
	movl	$65536, %edi
	call	calloc@PLT
	movq	%rax, %rbx
	testq	%rax, %rax
	je	.L10
	movl	$4, %esi
	movl	$32768, %edi
	call	calloc@PLT
	movq	%rax, 24(%rsp)
	testq	%rax, %rax
	je	.L10
	movl	$4, %esi
	movl	$32768, %edi
	call	calloc@PLT
	movq	%rax, 32(%rsp)
	testq	%rax, %rax
	je	.L10
	movl	$4, %esi
	movl	$32768, %edi
	call	calloc@PLT
	movq	%rax, 40(%rsp)
	testq	%rax, %rax
	je	.L10
	movl	$4, %esi
	movl	$32768, %edi
	call	calloc@PLT
	movq	%rax, 48(%rsp)
	testq	%rax, %rax
	je	.L10
	leaq	.LC1(%rip), %rdi
	leaq	.LC0(%rip), %rsi
	xorl	%r14d, %r14d
	call	fopen@PLT
	movq	%rax, %rdi
.L11:
	movq	%r14, %r15
.L12:
	xorl	%eax, %eax
	leaq	72(%rsp), %rdx
	movq	%rdi, 56(%rsp)
	leaq	.LC2(%rip), %rsi
	call	__isoc23_fscanf@PLT
	movq	24(%rsp), %rax
	movss	72(%rsp), %xmm0
	movq	56(%rsp), %rdi
	movss	%xmm0, (%rax,%r15,4)
	incq	%r15
	leaq	256(%r14), %rax
	cmpq	%rax, %r15
	jne	.L12
	cmpq	$32768, %r15
	je	.L13
	movq	%r15, %r14
	jmp	.L11
.L13:
	call	fclose@PLT
	leaq	.LC3(%rip), %rdi
	leaq	.LC0(%rip), %rsi
	xorl	%r14d, %r14d
	call	fopen@PLT
	movq	%rax, %rdi
.L14:
	movq	%r14, %r15
.L15:
	xorl	%eax, %eax
	leaq	72(%rsp), %rdx
	movq	%rdi, 56(%rsp)
	leaq	.LC2(%rip), %rsi
	call	__isoc23_fscanf@PLT
	movq	32(%rsp), %rax
	movss	72(%rsp), %xmm0
	movq	56(%rsp), %rdi
	movss	%xmm0, (%rax,%r15,4)
	incq	%r15
	leaq	256(%r14), %rax
	cmpq	%r15, %rax
	jne	.L15
	cmpq	$32768, %r15
	je	.L16
	movq	%r15, %r14
	jmp	.L14
.L16:
	call	fclose@PLT
	leaq	.LC4(%rip), %rdi
	leaq	.LC0(%rip), %rsi
	xorl	%r14d, %r14d
	call	fopen@PLT
	movq	%rax, %rdi
.L17:
	movq	%r14, %r15
.L18:
	xorl	%eax, %eax
	leaq	72(%rsp), %rdx
	movq	%rdi, 56(%rsp)
	leaq	.LC2(%rip), %rsi
	call	__isoc23_fscanf@PLT
	movq	40(%rsp), %rax
	movss	72(%rsp), %xmm0
	movq	56(%rsp), %rdi
	movss	%xmm0, (%rax,%r15,4)
	incq	%r15
	leaq	256(%r14), %rax
	cmpq	%r15, %rax
	jne	.L18
	cmpq	$32768, %r15
	je	.L19
	movq	%r15, %r14
	jmp	.L17
.L19:
	call	fclose@PLT
	leaq	.LC5(%rip), %rdi
	leaq	.LC0(%rip), %rsi
	xorl	%r14d, %r14d
	call	fopen@PLT
	movq	%rax, %rdi
.L20:
	movq	%r14, %r15
.L21:
	xorl	%eax, %eax
	leaq	72(%rsp), %rdx
	movq	%rdi, 56(%rsp)
	leaq	.LC2(%rip), %rsi
	call	__isoc23_fscanf@PLT
	movq	48(%rsp), %rax
	movss	72(%rsp), %xmm0
	movq	56(%rsp), %rdi
	movss	%xmm0, (%rax,%r15,4)
	incq	%r15
	leaq	256(%r14), %rax
	cmpq	%rax, %r15
	jne	.L21
	cmpq	$32768, %r15
	je	.L22
	movq	%r15, %r14
	jmp	.L20
.L22:
	call	fclose@PLT
	leaq	.LC6(%rip), %rdi
	leaq	.LC0(%rip), %rsi
	xorl	%r14d, %r14d
	call	fopen@PLT
	movq	%rax, %rdi
.L23:
	movq	%r14, %r15
.L24:
	xorl	%eax, %eax
	leaq	72(%rsp), %rdx
	movq	%rdi, 56(%rsp)
	leaq	.LC2(%rip), %rsi
	call	__isoc23_fscanf@PLT
	movss	72(%rsp), %xmm0
	movq	56(%rsp), %rdi
	leaq	256(%r14), %rax
	movss	%xmm0, 0(%r13,%r15,4)
	incq	%r15
	cmpq	%r15, %rax
	jne	.L24
	cmpq	$65536, %r15
	je	.L25
	movq	%r15, %r14
	jmp	.L23
.L25:
	call	fclose@PLT
	leaq	.LC7(%rip), %rdi
	leaq	.LC0(%rip), %rsi
	xorl	%r14d, %r14d
	call	fopen@PLT
	movq	%rax, %rdi
.L26:
	movq	%r14, %r15
.L27:
	xorl	%eax, %eax
	leaq	72(%rsp), %rdx
	movq	%rdi, 56(%rsp)
	leaq	.LC2(%rip), %rsi
	call	__isoc23_fscanf@PLT
	movss	72(%rsp), %xmm0
	movq	56(%rsp), %rdi
	leaq	256(%r14), %rax
	movss	%xmm0, (%r12,%r15,4)
	incq	%r15
	cmpq	%r15, %rax
	jne	.L27
	cmpq	$65536, %r15
	je	.L28
	movq	%r15, %r14
	jmp	.L26
.L28:
	call	fclose@PLT
	leaq	.LC8(%rip), %rdi
	leaq	.LC0(%rip), %rsi
	xorl	%r14d, %r14d
	call	fopen@PLT
	movq	%rax, %rdi
.L29:
	movq	%r14, %r15
.L30:
	xorl	%eax, %eax
	leaq	72(%rsp), %rdx
	movq	%rdi, 56(%rsp)
	leaq	.LC2(%rip), %rsi
	call	__isoc23_fscanf@PLT
	movss	72(%rsp), %xmm0
	movq	56(%rsp), %rdi
	leaq	256(%r14), %rax
	movss	%xmm0, 0(%rbp,%r15,4)
	incq	%r15
	cmpq	%r15, %rax
	jne	.L30
	cmpq	$65536, %r15
	je	.L31
	movq	%r15, %r14
	jmp	.L29
.L31:
	call	fclose@PLT
	leaq	.LC9(%rip), %rdi
	leaq	.LC0(%rip), %rsi
	xorl	%r14d, %r14d
	call	fopen@PLT
	movq	%rax, %rdi
.L32:
	movq	%r14, %r15
.L33:
	xorl	%eax, %eax
	leaq	72(%rsp), %rdx
	movq	%rdi, 56(%rsp)
	leaq	.LC2(%rip), %rsi
	call	__isoc23_fscanf@PLT
	movss	72(%rsp), %xmm0
	movq	56(%rsp), %rdi
	leaq	256(%r14), %rax
	movss	%xmm0, (%rbx,%r15,4)
	incq	%r15
	cmpq	%r15, %rax
	jne	.L33
	cmpq	$65536, %r15
	je	.L34
	movq	%r15, %r14
	jmp	.L32
.L34:
	call	fclose@PLT
	leaq	144(%rsp), %rdi
	movl	$262144, %esi
	call	cudaMalloc@PLT
	leaq	152(%rsp), %rdi
	movl	$262144, %esi
	call	cudaMalloc@PLT
	leaq	80(%rsp), %rdi
	movl	$262144, %esi
	call	cudaMalloc@PLT
	leaq	88(%rsp), %rdi
	movl	$262144, %esi
	call	cudaMalloc@PLT
	leaq	96(%rsp), %rdi
	movl	$262144, %esi
	call	cudaMalloc@PLT
	leaq	104(%rsp), %rdi
	movl	$262144, %esi
	call	cudaMalloc@PLT
	leaq	112(%rsp), %rdi
	movl	$131072, %esi
	call	cudaMalloc@PLT
	leaq	120(%rsp), %rdi
	movl	$131072, %esi
	call	cudaMalloc@PLT
	leaq	128(%rsp), %rdi
	movl	$131072, %esi
	call	cudaMalloc@PLT
	leaq	136(%rsp), %rdi
	movl	$131072, %esi
	call	cudaMalloc@PLT
	movq	32(%rsp), %rsi
	movq	120(%rsp), %rdi
	movl	$1, %ecx
	movl	$131072, %edx
	call	cudaMemcpy@PLT
	movq	48(%rsp), %rsi
	movl	$1, %ecx
	movq	136(%rsp), %rdi
	movl	$131072, %edx
	call	cudaMemcpy@PLT
	movq	24(%rsp), %rsi
	movq	112(%rsp), %rdi
	movl	$1, %ecx
	movl	$131072, %edx
	call	cudaMemcpy@PLT
	movq	40(%rsp), %rsi
	movl	$1, %ecx
	movq	128(%rsp), %rdi
	movl	$131072, %edx
	call	cudaMemcpy@PLT
	movq	80(%rsp), %rdi
	movl	$1, %ecx
	movq	%r13, %rsi
	movl	$262144, %edx
	call	cudaMemcpy@PLT
	movq	96(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$262144, %edx
	call	cudaMemcpy@PLT
	movq	88(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$262144, %edx
	call	cudaMemcpy@PLT
	movq	104(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$262144, %edx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rsi
	movl	$1, %ecx
	movq	144(%rsp), %rdi
	movl	$262144, %edx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rsi
	movl	$1, %ecx
	movq	152(%rsp), %rdi
	movl	$262144, %edx
	call	cudaMemcpy@PLT
	leaq	160(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	168(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	160(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	196(%rsp), %ecx
	xorl	%r9d, %r9d
	movq	188(%rsp), %rdx
	movq	176(%rsp), %rdi
	movl	184(%rsp), %esi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L35
	pushq	152(%rsp)
	.cfi_def_cfa_offset 280
	pushq	152(%rsp)
	.cfi_def_cfa_offset 288
	pushq	120(%rsp)
	.cfi_def_cfa_offset 296
	pushq	112(%rsp)
	.cfi_def_cfa_offset 304
	movq	128(%rsp), %r9
	movq	112(%rsp), %r8
	movq	160(%rsp), %rcx
	movq	144(%rsp), %rdx
	movq	168(%rsp), %rsi
	movq	152(%rsp), %rdi
	call	_Z42__device_stub__Z5sensePfS_S_S_S_S_S_S_S_S_PfS_S_S_S_S_S_S_S_S_
	addq	$32, %rsp
	.cfi_def_cfa_offset 272
.L35:
	call	cudaDeviceSynchronize@PLT
	movq	168(%rsp), %rdi
	xorl	%esi, %esi
	xorl	%r15d, %r15d
	call	cudaEventRecord@PLT
	movq	168(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	168(%rsp), %rdx
	leaq	76(%rsp), %rdi
	movq	160(%rsp), %rsi
	call	cudaEventElapsedTime@PLT
	leaq	.LC10(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	76(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	8(%rsp), %rdi
	movq	144(%rsp), %rsi
	movl	$2, %ecx
	movl	$262144, %edx
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	movl	$2, %ecx
	movq	152(%rsp), %rsi
	movl	$262144, %edx
	call	cudaMemcpy@PLT
	leaq	.LC11(%rip), %rsi
	leaq	.LC12(%rip), %rdi
	call	fopen@PLT
	movq	%rax, 56(%rsp)
.L36:
	movq	%r15, %r14
.L37:
	movq	8(%rsp), %rax
	movq	56(%rsp), %rdi
	movl	$2, %esi
	leaq	.LC13(%rip), %rdx
	cvtss2sd	(%rax,%r14,4), %xmm0
	movb	$1, %al
	incq	%r14
	call	__fprintf_chk@PLT
	leaq	256(%r15), %rax
	cmpq	%r14, %rax
	jne	.L37
	movq	56(%rsp), %rdi
	xorl	%eax, %eax
	movl	$2, %esi
	leaq	.LC14(%rip), %rdx
	call	__fprintf_chk@PLT
	cmpq	$65536, %r14
	je	.L38
	movq	%r14, %r15
	jmp	.L36
.L38:
	movq	56(%rsp), %rdi
	xorl	%r15d, %r15d
	call	fclose@PLT
	leaq	.LC11(%rip), %rsi
	leaq	.LC15(%rip), %rdi
	call	fopen@PLT
	movq	%rax, 56(%rsp)
.L39:
	movq	%r15, %r14
.L40:
	movq	16(%rsp), %rax
	movq	56(%rsp), %rdi
	movl	$2, %esi
	leaq	.LC13(%rip), %rdx
	cvtss2sd	(%rax,%r14,4), %xmm0
	movb	$1, %al
	incq	%r14
	call	__fprintf_chk@PLT
	leaq	256(%r15), %rax
	cmpq	%r14, %rax
	jne	.L40
	movq	56(%rsp), %rdi
	xorl	%eax, %eax
	movl	$2, %esi
	leaq	.LC14(%rip), %rdx
	call	__fprintf_chk@PLT
	cmpq	$65536, %r14
	je	.L41
	movq	%r14, %r15
	jmp	.L39
.L41:
	movq	56(%rsp), %rdi
	call	fclose@PLT
	leaq	.LC16(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%r13, %rdi
	call	free@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	24(%rsp), %rdi
	call	free@PLT
	movq	32(%rsp), %rdi
	call	free@PLT
	movq	40(%rsp), %rdi
	call	free@PLT
	movq	48(%rsp), %rdi
	call	free@PLT
	movq	8(%rsp), %rdi
	call	free@PLT
	movq	16(%rsp), %rdi
	call	free@PLT
	movq	80(%rsp), %rdi
	call	cudaFree@PLT
	movq	88(%rsp), %rdi
	call	cudaFree@PLT
	movq	96(%rsp), %rdi
	call	cudaFree@PLT
	movq	104(%rsp), %rdi
	call	cudaFree@PLT
	movq	112(%rsp), %rdi
	call	cudaFree@PLT
	movq	120(%rsp), %rdi
	call	cudaFree@PLT
	movq	128(%rsp), %rdi
	call	cudaFree@PLT
	movq	136(%rsp), %rdi
	call	cudaFree@PLT
	movq	144(%rsp), %rdi
	call	cudaFree@PLT
	movq	152(%rsp), %rdi
	call	cudaFree@PLT
	call	getchar@PLT
	movq	200(%rsp), %rax
	subq	%fs:40, %rax
	je	.L42
	call	__stack_chk_fail@PLT
.L42:
	addq	$216, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC17:
	.string	"_Z5sensePfS_S_S_S_S_S_S_S_S_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC17(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z5sensePfS_S_S_S_S_S_S_S_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/**
 * Sensitivity Encoding (SENSE) Reconstruction
 * SENSE is a Parallel MRI reconstruction method. The inputs of SENSE reconstruction are aliased data from MRI scanner and
 * receiver coil sensitivity encoding matrices.   
 * The output of SENSE reconstruction is reconstructed MR image for clinical usage.
 * 
 * Mathematically, SENSE can be represented as: U = C x M  (1), where U is the aliased image obtained from scanner, M is MR image to be 
 * reconstructed and C is receiver coil sensitivity encoding matrix.
 * In order to find M, the above equation can be written as:  M = inv(C) x U   (2).
 * To solve equation 2, there is requirement to invert large number of small encoding matrices (in this simpler case the order of small matrices will be 2x2). 
 * To perform this task iteratively significant computation time is involved. Parallel implementation of SENSE using GPU is presented in this work where 
 * number of CUDA threads are launched as per required matrix inversions to perform the tasks in parallel hence reducing the computation
 * time (one of the main limitation in MRI). The GPU implementation using NVIDIA Titan XP GPU is more than 10x faster compared to CPU implementation
 * (core i7 with 8GB RAM)
 * In this work, the size of U, C and M are 128x256x2, 256x256x2 and 256x256 
 *
 * Note: The data in all the matrices is complex, therefore real part and imaginary part are handled separately in the code given below
 * 
 */

//declaration of header files
#include <stdio.h>
#include <hip/hip_runtime.h>
#include <stdlib.h>

#define N 128
using namespace std;

//start of CUDA kernel "sense". 
 __global__ void sense( float * d_i1imag, float * d_i2imag, float * d_i1real, float * d_i2real, float * d_c1imag, float * d_c2imag, float * d_c1real, float * d_c2real, float * d_rmreal, float * d_rmimag) 
{
	float d_detreal;				// determinant real part
	float d_detimag;				// determinant imaginary part
	float d_divtemp;				// complex determinant
	float d_sreal[2][2];				//encoding matrix of size 2x2 real part
	float d_simag[2][2];				//encoding matrix of size 2x2 imaginary part
	float d_rpreal[2];				//reconstructed pixels real part 
	float d_rpimag[2];				//reconstructed pixels imaginary part
	float d_sinreal[2][2];				// to find inverse of 2x2 matrix (real part)
	float d_sinimag[2][2];				// to find inverse of 2x2 matrix (imaginary part)

	//CUDA thread index calculation 
	int col = blockIdx.x * blockDim.x + threadIdx.x;
	int row = blockIdx.y * blockDim.y +threadIdx.y;
	int index=col+row*N;

	//copying data from input receiver coil sensitivty matrix (real part)
	d_sreal[0][0] = d_c1real[index];
	d_sreal[0][1] = d_c1real[index+32768];
	d_sreal[1][0] = d_c2real[index];
	d_sreal[1][1] = d_c2real[index+32768];

	//copying data from input receiver coil sensitivty matrix (imaginary part)
	d_simag[0][0] = d_c1imag[index];
	d_simag[0][1] = d_c1imag[index+32768];
	d_simag[1][0] = d_c2imag[index];
	d_simag[1][1] = d_c2imag[index+32768];

	//calculation of complex determinant
	d_detreal = ((d_sreal[0][0]*d_sreal[1][1])-(d_simag[0][0] *d_simag[1][1]))-((d_sreal[0][1] * d_sreal[1][0]) - (d_simag[0][1] *d_simag[1][0]));
	d_detimag = ((d_simag[0][0]*d_sreal[1][1])+(d_sreal[0][0] *d_simag[1][1]))-((d_simag[0][1] * d_sreal[1][0]) + (d_sreal[0][1] *d_simag[1][0]));
	d_divtemp = (d_detreal*d_detreal) + (d_detimag * d_detimag);

	//dividing the adjoint of matrix with the determinant (real part)
	d_sinreal[0][0] = ((d_sreal[1][1] * d_detreal)   - (d_simag[1][1]*(-d_detimag)))  /d_divtemp;
	d_sinreal[0][1] = -(((d_sreal[0][1] * d_detreal) - (d_simag[0][1]*(-d_detimag)))) /d_divtemp;
	d_sinreal[1][0] = -(((d_sreal[1][0] * d_detreal) - (d_simag[1][0]*(-d_detimag)))) /d_divtemp;
	d_sinreal[1][1] = ((d_sreal[0][0] * d_detreal)   - (d_simag[0][0]*(-d_detimag)))  /d_divtemp;
	
	//dividing the adjoint of matrix with the determinant (imaginary part)
	d_sinimag[0][0] = ((d_simag[1][1] * d_detreal) + (d_sreal[1][1]*(-d_detimag)))/d_divtemp;
	d_sinimag[0][1] = -(((d_simag[0][1] * d_detreal) + (d_sreal[0][1]*(-d_detimag))))/d_divtemp;
	d_sinimag[1][0] = -(((d_simag[1][0] * d_detreal) + (d_sreal[1][0]*(-d_detimag))))/d_divtemp;
	d_sinimag[1][1] = ((d_simag[0][0] * d_detreal) + (d_sreal[0][0]*(-d_detimag)))/d_divtemp;
	
	//Multiplying the inverse of 2x2 encoding matrix (calculated above) with 
	//2x1 matrix of input aliased matrix (from scanner) real part 	
	d_rpreal[0] = ((d_i1real[index] * d_sinreal[0][0]) - (d_i1imag[index] * d_sinimag[0][0])) + ((d_i2real[index] * d_sinreal[0][1]) - (d_i2imag[index] * d_sinimag[0][1]));
	d_rpreal[1] = ((d_i1real[index] * d_sinreal[1][0]) - (d_i1imag[index] * d_sinimag[1][0])) + ((d_i2real[index] * d_sinreal[1][1]) - (d_i2imag[index] * d_sinimag[1][1]));
	
	//Multiplying the inverse of 2x2 encoding matrix (calculated above) with 
	//2x1 matrix of input aliased matrix (from scanner) imaginary part
	d_rpimag[0] = ((d_i1real[index] * d_sinimag[0][0]) + (d_i1imag[index] * d_sinreal[0][0])) + ((d_i2real[index] * d_sinimag[0][1]) + (d_i2imag[index] * d_sinreal[0][1]));
	d_rpimag[1] = ((d_i1real[index] * d_sinimag[1][0]) + (d_i1imag[index] * d_sinreal[1][0])) + ((d_i2real[index] * d_sinimag[1][1]) + (d_i2imag[index] * d_sinreal[1][1]));

	//Copying the resulting real and imaginary numbers to the final reconstructed image  
	d_rmreal[index] = d_rpreal[0]; 
	d_rmreal[index+32768] = d_rpreal[1];
	d_rmimag[index] = d_rpimag[0];
	d_rmimag[index+32768] = d_rpimag[1];
}


int main ()
{
	float temp;				    //temparary variable
	int i,j,k;				    //index variables 
	int maxx, maxim;		    //maxx is size of unaliased image i.e.256x256, maxim is size of aliased image i.e. 128x256 
	float * h_coil1imag;		//pointer for receiver coil 1 matrix imaginary part
	float * h_coil1real;		//pointer for receiver coil 1 matrix real part
	float * h_coil2imag;		//pointer for receiver coil 2 matrix imaginary part
	float * h_coil2real;		//pointer for receiver coil 2 matrix real part

	float * h_im1real;		//pointer for aliased image 1 matrix real part
	float * h_im1imag;		//pointer for aliased image 1 matrix imaginary part
	float * h_im2real;		//pointer for aliased image 2 matrix real part
	float * h_im2imag;		//pointer for aliased image 3 matrix imaginary part

	float * h_rimreal;		//pointer for reconstructed image matrix real part
	float * h_rimimag;		//pointer for reconstructed image matrix imaginary part
	
	maxim = 128*256;		//maxim is size of aliased image i.e. 128x256
	maxx  = 256*256;		//maxx is size of unaliased image i.e.256x256
	const int ARRAY_BYTES1 = maxx  * sizeof(float);		//it will be used for reconstructed image and receiver coils matrices
	const int ARRAY_BYTES2 = maxim * sizeof(float);		//it will be used for aliased image
	
	dim3 grid(1,128);		//dimensions of blocks in a grid
	dim3 block(128,2);		//dimensions of threads in a block

	//memory allocation for reconstructed image real and imaginary parts respectively
	h_rimreal = (float*) calloc (maxx,sizeof(float));
	if (h_rimreal==NULL) exit (1);			//exception handling
	h_rimimag = (float*) calloc (maxx,sizeof(float));
	if (h_rimimag==NULL) exit (1);			//exception handling
	
	//memory allocation for receiver coils matrices real and imaginary parts respectively
	h_coil1imag = (float*) calloc (maxx,sizeof(float));
	if (h_coil1imag==NULL) exit (1);

	h_coil1real = (float*) calloc (maxx,sizeof(float));
	if (h_coil1real==NULL) exit (1);

	h_coil2imag = (float*) calloc (maxx,sizeof(float));
	if (h_coil2imag==NULL) exit (1);

	h_coil2real = (float*) calloc (maxx,sizeof(float));
	if (h_coil2real==NULL) exit (1);
	
	//memory allocation for aliased images real and imaginary parts respectively

	h_im1real = (float*) calloc (maxim,sizeof(float));
	if (h_im1real==NULL) exit (1); 
	
	h_im1imag = (float*) calloc (maxim,sizeof(float));
	if (h_im1imag==NULL) exit (1);

	h_im2real = (float*) calloc (maxim,sizeof(float));
	if (h_im2real==NULL) exit (1);

	h_im2imag = (float*) calloc (maxim,sizeof(float));
	if (h_im2imag==NULL) exit (1);

	//Copying data from file for aliased image1 real  data 
	FILE *fptr5;
	fptr5 = fopen ("im1real.txt", "r");
	k=0;
	for(i=0;i<=127;i++)
	{
		for(j=0;j<=255;j++)
		{
			fscanf(fptr5, "%f,  ",&temp  );
			h_im1real[k] = temp; 
			k=k+1;
		}	
	}
	fclose (fptr5);

	//Copying data from file for aliased image1 imaginary  data 
	FILE *fptr6;
	fptr6 = fopen ("im1imag.txt", "r");
	k=0;
	for(i=0;i<=127;i++)
	{
		for(j=0;j<=255;j++)
		{
			fscanf(fptr6, "%f,  ",&temp  );
			h_im1imag[k] = temp; 
			k=k+1;
		}	
	}
	fclose (fptr6);

	//Copying data from file for  aliased image2 real data 
	FILE *fptr7;
	fptr7 = fopen ("im2real.txt", "r");
	k=0;
	for(i=0;i<=127;i++)
	{ 
		for(j=0;j<=255;j++)
		{
			fscanf(fptr7, "%f,  ",&temp  );
			h_im2real[k] = temp; 
			k=k+1;
		}	
	}
	fclose (fptr7);	

	//Copying data from file for aliased image2 imaginary  data 
	FILE *fptr8;
	fptr8 = fopen ("im2imag.txt", "r");
	k=0;
	for(i=0;i<=127;i++)
	{
		for(j=0;j<=255;j++)
		{
			fscanf(fptr8, "%f,  ",&temp  );
			h_im2imag[k] = temp; 
			k=k+1;
		}	
	}
	fclose (fptr8);
	
	//Copying data from file for rceiver coil 1 imaginary  data 
	FILE *fptr1;
	fptr1 = fopen ("coil1imag.txt", "r");
	k=0;
	for(i=0;i<=255;i++)
	{
		for(j=0;j<=255;j++)
		{
			fscanf(fptr1, "%f,  ",&temp  );
			h_coil1imag[k] = temp; 
			k=k+1;
		}	
	}
	fclose (fptr1);
		
	//Copying data from file for rceiver coil 1 real data 
	FILE *fptr2;
	fptr2 = fopen ("coil1real.txt", "r");
	k=0;
	for(i=0;i<=255;i++)
	{
		for(j=0;j<=255;j++)
		{
			fscanf(fptr2, "%f,  ",&temp  );
			h_coil1real[k] = temp; 
			k=k+1;
		}	
	}
	fclose (fptr2);

	//Copying data from file for rceiver coil 2 imaginary  data 
	FILE *fptr3;
	fptr3 = fopen ("coil2imag.txt", "r");
	k=0;
	for(i=0;i<=255;i++)
	{
		for(j=0;j<=255;j++)
		{
			fscanf(fptr3, "%f,  ",&temp  );
			h_coil2imag[k] = temp; 
			k=k+1;
		}	
	}
	fclose (fptr3);

	//Copying data from file for rceiver coil 2 real data 
	FILE *fptr4;
	fptr4 = fopen ("coil2real.txt", "r");
	k=0;
	for(i=0;i<=255;i++)
	{
		for(j=0;j<=255;j++)
		{
			fscanf(fptr4, "%f,  ",&temp  );
			h_coil2real[k] = temp; 
			k=k+1;
		}	
	}
	fclose (fptr4);
	
	// declaration of GPU memory pointers
	float * d_c1imag;  //device pointer for coil 1 matrix imaginary part
	float * d_c1real;  //device pointer for coil 1 matrix real part
	float * d_c2imag;  //device pointer for coil 2 matrix imaginary part
	float * d_c2real;  //device pointer for coil 2 matrix real part	
	float * d_i1real;  //device pointer for aliased image 1 matrix real part
	float * d_i1imag;  //device pointer for aliased image 1 matrix imaginary part
	float * d_i2real;  //device pointer for aliased image 2 matrix real part
	float * d_i2imag;  //device pointer for aliased image 2 matrix imaginary part
	float * d_rmreal;  //device pointer for image matrix to be reconstructed real part
	float * d_rmimag;  //device pointer for image matrix to be reconstructed imaginary part


	// Allocation of memory in device memory using CUDA Malloc function
	hipMalloc( (void**) &d_rmreal, ARRAY_BYTES1); // for image to be reconstructed real part 
	hipMalloc( (void**) &d_rmimag, ARRAY_BYTES1); // for image to be reconstructed imaginary part
	hipMalloc( (void**) &d_c1imag, ARRAY_BYTES1); // for coil 1 imaginary part
	hipMalloc( (void**) &d_c1real, ARRAY_BYTES1); // for coil 1 real part
	hipMalloc( (void**) &d_c2imag, ARRAY_BYTES1); // for coil 2 imaginary part
	hipMalloc( (void**) &d_c2real, ARRAY_BYTES1); // for coil 2 real part
	hipMalloc( (void**) &d_i1real, ARRAY_BYTES2); // for aliased image 1 real part
	hipMalloc( (void**) &d_i1imag, ARRAY_BYTES2); // for aliased image 1 imaginary part
	hipMalloc( (void**) &d_i2real, ARRAY_BYTES2); // for aliased image 1 real part
	hipMalloc( (void**) &d_i2imag, ARRAY_BYTES2); // for aliased image 1 imaginary part

	//Copying data from host memory to device memory
	hipMemcpy(d_i1imag, h_im1imag, ARRAY_BYTES2, hipMemcpyHostToDevice); //for image 1 imaginary part
	hipMemcpy(d_i2imag, h_im2imag, ARRAY_BYTES2, hipMemcpyHostToDevice); //for image 2 imaginary part
	hipMemcpy(d_i1real, h_im1real, ARRAY_BYTES2, hipMemcpyHostToDevice); //for image 1 real part
	hipMemcpy(d_i2real, h_im2real, ARRAY_BYTES2, hipMemcpyHostToDevice); //for image 2 real part
	hipMemcpy(d_c1imag, h_coil1imag, ARRAY_BYTES1, hipMemcpyHostToDevice); //for coil 1 imaginary part
	hipMemcpy(d_c2imag, h_coil2imag, ARRAY_BYTES1, hipMemcpyHostToDevice); //for coil 2 imaginary part
	hipMemcpy(d_c1real, h_coil1real, ARRAY_BYTES1, hipMemcpyHostToDevice); //for coil 1 real part
	hipMemcpy(d_c2real, h_coil2real, ARRAY_BYTES1, hipMemcpyHostToDevice); //for coil 2 real part
	hipMemcpy(d_rmreal, h_rimreal, ARRAY_BYTES1, hipMemcpyHostToDevice); //for image to be reconstructed real part
	hipMemcpy(d_rmimag, h_rimimag, ARRAY_BYTES1, hipMemcpyHostToDevice); //for image to be reconstructed imaginary part
	
	//initiation of CUDA timer's event to estimate the computation time of kernel
	float time; 
	hipEvent_t start, stop;
	hipEventCreate(&start);
	hipEventCreate(&stop);
	hipEventRecord(start, 0);
	
	//Launching the Kernel
	sense<<<grid,block>>>( d_i1imag, d_i2imag, d_i1real, d_i2real, d_c1imag, d_c2imag, d_c1real, d_c2real, d_rmreal, d_rmimag);

	hipDeviceSynchronize(); //synchronization of threads
	
	//CUDA timer's events to estimate the computation time
	hipEventRecord(stop, 0); 
	hipEventSynchronize(stop) ;
	hipEventElapsedTime(&time, start, stop) ;
	printf("Time for SENSE reconstruction:  %3.1f ms \n", time);
	
	//copying the results from device memory to host memory
	hipMemcpy(h_rimreal, d_rmreal, ARRAY_BYTES1, hipMemcpyDeviceToHost); //image to be reconstructed real part
	hipMemcpy(h_rimimag, d_rmimag, ARRAY_BYTES1, hipMemcpyDeviceToHost); //image to be reconstructed imaginary part

	//storing the results in output file (real part)
	FILE *fptr45;
	fptr45 = fopen ("reconstructionreal.txt", "w");
	k=0;
	for(i=0;i<=255;i++)
	{
		for(j=0;j<=255;j++)
		{
			fprintf(fptr45, " %f \t",h_rimreal[k]);			
			k=k+1;
		}
		fprintf(fptr45, " \n");
	}
	fclose (fptr45);
	//storing the results in output file (imaginary part)
	FILE *fptr445;
	fptr445 = fopen ("reconstructionimag.txt", "w");
	k=0;
	for(i=0;i<=255;i++)
	{
		for(j=0;j<=255;j++)
		{
			fprintf(fptr445, " %f \t",h_rimimag[k]);			
			k=k+1;
		}	
		fprintf(fptr445, " \n");
	}
	fclose (fptr445);
	
	printf("\n SENSE reconstruction is finished successfully \n");
	// free the host memory	
	free (h_coil1imag);
	free (h_coil1real);
	free (h_coil2imag);
	free (h_coil2real);
	free (h_im1real);
	free (h_im1imag);
	free (h_im2real);
	free (h_im2imag);
	free (h_rimreal);
	free (h_rimimag);

	// free the device memory
	hipFree (d_c1imag);
	hipFree (d_c1real);
	hipFree (d_c2imag);
	hipFree (d_c2real);
	hipFree (d_i1real);
	hipFree (d_i1imag);
	hipFree (d_i2real);
	hipFree (d_i2imag);
	hipFree (d_rmreal);
	hipFree (d_rmimag);

	getchar();
	return 0;
}

	.text
	.file	"SENSE.hip"
	.globl	_Z20__device_stub__sensePfS_S_S_S_S_S_S_S_S_ # -- Begin function _Z20__device_stub__sensePfS_S_S_S_S_S_S_S_S_
	.type	_Z20__device_stub__sensePfS_S_S_S_S_S_S_S_S_,@function
_Z20__device_stub__sensePfS_S_S_S_S_S_S_S_S_: # @_Z20__device_stub__sensePfS_S_S_S_S_S_S_S_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$176, %rsp
	.cfi_def_cfa_offset 224
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	16(%rsp), %r8
	movq	%r9, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	224(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	232(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	240(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	248(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z5sensePfS_S_S_S_S_S_S_S_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$192, %rsp
	.cfi_adjust_cfa_offset -192
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z20__device_stub__sensePfS_S_S_S_S_S_S_S_S_, .Lfunc_end0-_Z20__device_stub__sensePfS_S_S_S_S_S_S_S_S_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$200, %rsp
	.cfi_def_cfa_offset 256
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$65536, %edi                    # imm = 0x10000
	movl	$4, %esi
	callq	calloc
	testq	%rax, %rax
	je	.LBB1_53
# %bb.1:
	movq	%rax, %r13
	movl	$65536, %edi                    # imm = 0x10000
	movl	$4, %esi
	callq	calloc
	testq	%rax, %rax
	je	.LBB1_53
# %bb.2:
	movq	%rax, %rbx
	movl	$65536, %edi                    # imm = 0x10000
	movl	$4, %esi
	callq	calloc
	movq	%rax, 80(%rsp)                  # 8-byte Spill
	testq	%rax, %rax
	je	.LBB1_53
# %bb.3:
	movl	$65536, %edi                    # imm = 0x10000
	movl	$4, %esi
	callq	calloc
	movq	%rax, 72(%rsp)                  # 8-byte Spill
	testq	%rax, %rax
	je	.LBB1_53
# %bb.4:
	movl	$65536, %edi                    # imm = 0x10000
	movl	$4, %esi
	callq	calloc
	movq	%rax, 64(%rsp)                  # 8-byte Spill
	testq	%rax, %rax
	je	.LBB1_53
# %bb.5:
	movl	$65536, %edi                    # imm = 0x10000
	movl	$4, %esi
	callq	calloc
	movq	%rax, 56(%rsp)                  # 8-byte Spill
	testq	%rax, %rax
	je	.LBB1_53
# %bb.6:
	movl	$32768, %edi                    # imm = 0x8000
	movl	$4, %esi
	callq	calloc
	testq	%rax, %rax
	je	.LBB1_53
# %bb.7:
	movq	%rax, %r15
	movl	$32768, %edi                    # imm = 0x8000
	movl	$4, %esi
	callq	calloc
	movq	%rax, 48(%rsp)                  # 8-byte Spill
	testq	%rax, %rax
	je	.LBB1_53
# %bb.8:
	movl	$32768, %edi                    # imm = 0x8000
	movl	$4, %esi
	callq	calloc
	movq	%rax, 40(%rsp)                  # 8-byte Spill
	testq	%rax, %rax
	je	.LBB1_53
# %bb.9:
	movq	%rbx, 176(%rsp)                 # 8-byte Spill
	movl	$32768, %edi                    # imm = 0x8000
	movl	$4, %esi
	callq	calloc
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	testq	%rax, %rax
	je	.LBB1_53
# %bb.10:
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	callq	fopen
	movq	%rax, %rbx
	leaq	12(%rsp), %r14
	movq	%r15, 112(%rsp)                 # 8-byte Spill
	xorl	%ebp, %ebp
.LBB1_11:                               # %.preheader203
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_12 Depth 2
	xorl	%r12d, %r12d
.LBB1_12:                               #   Parent Loop BB1_11 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	$.L.str.2, %esi
	movq	%rbx, %rdi
	movq	%r14, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movss	12(%rsp), %xmm0                 # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, (%r15,%r12,4)
	incq	%r12
	cmpl	$256, %r12d                     # imm = 0x100
	jne	.LBB1_12
# %bb.13:                               #   in Loop: Header=BB1_11 Depth=1
	incl	%ebp
	addq	$1024, %r15                     # imm = 0x400
	cmpl	$128, %ebp
	jne	.LBB1_11
# %bb.14:
	movq	%rbx, %rdi
	callq	fclose
	movl	$.L.str.3, %edi
	movl	$.L.str.1, %esi
	callq	fopen
	movq	%rax, %rbx
	leaq	12(%rsp), %r14
	movq	48(%rsp), %r15                  # 8-byte Reload
	xorl	%ebp, %ebp
.LBB1_15:                               # %.preheader202
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_16 Depth 2
	xorl	%r12d, %r12d
.LBB1_16:                               #   Parent Loop BB1_15 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	$.L.str.2, %esi
	movq	%rbx, %rdi
	movq	%r14, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movss	12(%rsp), %xmm0                 # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, (%r15,%r12,4)
	incq	%r12
	cmpl	$256, %r12d                     # imm = 0x100
	jne	.LBB1_16
# %bb.17:                               #   in Loop: Header=BB1_15 Depth=1
	incl	%ebp
	addq	$1024, %r15                     # imm = 0x400
	cmpl	$128, %ebp
	jne	.LBB1_15
# %bb.18:
	movq	%rbx, %rdi
	callq	fclose
	movl	$.L.str.4, %edi
	movl	$.L.str.1, %esi
	callq	fopen
	movq	%rax, %rbx
	leaq	12(%rsp), %r14
	movq	40(%rsp), %r15                  # 8-byte Reload
	xorl	%ebp, %ebp
.LBB1_19:                               # %.preheader201
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_20 Depth 2
	xorl	%r12d, %r12d
.LBB1_20:                               #   Parent Loop BB1_19 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	$.L.str.2, %esi
	movq	%rbx, %rdi
	movq	%r14, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movss	12(%rsp), %xmm0                 # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, (%r15,%r12,4)
	incq	%r12
	cmpl	$256, %r12d                     # imm = 0x100
	jne	.LBB1_20
# %bb.21:                               #   in Loop: Header=BB1_19 Depth=1
	incl	%ebp
	addq	$1024, %r15                     # imm = 0x400
	cmpl	$128, %ebp
	jne	.LBB1_19
# %bb.22:
	movq	%rbx, %rdi
	callq	fclose
	movl	$.L.str.5, %edi
	movl	$.L.str.1, %esi
	callq	fopen
	movq	%rax, %rbx
	leaq	12(%rsp), %r14
	movq	32(%rsp), %r15                  # 8-byte Reload
	xorl	%ebp, %ebp
.LBB1_23:                               # %.preheader200
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_24 Depth 2
	xorl	%r12d, %r12d
.LBB1_24:                               #   Parent Loop BB1_23 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	$.L.str.2, %esi
	movq	%rbx, %rdi
	movq	%r14, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movss	12(%rsp), %xmm0                 # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, (%r15,%r12,4)
	incq	%r12
	cmpl	$256, %r12d                     # imm = 0x100
	jne	.LBB1_24
# %bb.25:                               #   in Loop: Header=BB1_23 Depth=1
	incl	%ebp
	addq	$1024, %r15                     # imm = 0x400
	cmpl	$128, %ebp
	jne	.LBB1_23
# %bb.26:
	movq	%rbx, %rdi
	callq	fclose
	movl	$.L.str.6, %edi
	movl	$.L.str.1, %esi
	callq	fopen
	movq	%rax, %rbx
	leaq	12(%rsp), %r14
	movq	80(%rsp), %r15                  # 8-byte Reload
	xorl	%ebp, %ebp
.LBB1_27:                               # %.preheader199
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_28 Depth 2
	xorl	%r12d, %r12d
.LBB1_28:                               #   Parent Loop BB1_27 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	$.L.str.2, %esi
	movq	%rbx, %rdi
	movq	%r14, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movss	12(%rsp), %xmm0                 # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, (%r15,%r12,4)
	incq	%r12
	cmpl	$256, %r12d                     # imm = 0x100
	jne	.LBB1_28
# %bb.29:                               #   in Loop: Header=BB1_27 Depth=1
	incl	%ebp
	addq	$1024, %r15                     # imm = 0x400
	cmpl	$256, %ebp                      # imm = 0x100
	jne	.LBB1_27
# %bb.30:
	movq	%rbx, %rdi
	callq	fclose
	movl	$.L.str.7, %edi
	movl	$.L.str.1, %esi
	callq	fopen
	movq	%rax, %rbx
	leaq	12(%rsp), %r14
	movq	72(%rsp), %r15                  # 8-byte Reload
	xorl	%ebp, %ebp
.LBB1_31:                               # %.preheader198
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_32 Depth 2
	xorl	%r12d, %r12d
.LBB1_32:                               #   Parent Loop BB1_31 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	$.L.str.2, %esi
	movq	%rbx, %rdi
	movq	%r14, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movss	12(%rsp), %xmm0                 # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, (%r15,%r12,4)
	incq	%r12
	cmpl	$256, %r12d                     # imm = 0x100
	jne	.LBB1_32
# %bb.33:                               #   in Loop: Header=BB1_31 Depth=1
	incl	%ebp
	addq	$1024, %r15                     # imm = 0x400
	cmpl	$256, %ebp                      # imm = 0x100
	jne	.LBB1_31
# %bb.34:
	movq	%rbx, %rdi
	callq	fclose
	movl	$.L.str.8, %edi
	movl	$.L.str.1, %esi
	callq	fopen
	movq	%rax, %rbx
	leaq	12(%rsp), %r14
	movq	64(%rsp), %r15                  # 8-byte Reload
	xorl	%ebp, %ebp
.LBB1_35:                               # %.preheader197
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_36 Depth 2
	xorl	%r12d, %r12d
.LBB1_36:                               #   Parent Loop BB1_35 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	$.L.str.2, %esi
	movq	%rbx, %rdi
	movq	%r14, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movss	12(%rsp), %xmm0                 # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, (%r15,%r12,4)
	incq	%r12
	cmpl	$256, %r12d                     # imm = 0x100
	jne	.LBB1_36
# %bb.37:                               #   in Loop: Header=BB1_35 Depth=1
	incl	%ebp
	addq	$1024, %r15                     # imm = 0x400
	cmpl	$256, %ebp                      # imm = 0x100
	jne	.LBB1_35
# %bb.38:
	movq	%r13, 168(%rsp)                 # 8-byte Spill
	movq	%rbx, %rdi
	callq	fclose
	movl	$.L.str.9, %edi
	movl	$.L.str.1, %esi
	callq	fopen
	movq	%rax, %rbx
	leaq	12(%rsp), %r14
	movq	56(%rsp), %r15                  # 8-byte Reload
	xorl	%ebp, %ebp
.LBB1_39:                               # %.preheader196
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_40 Depth 2
	xorl	%r12d, %r12d
.LBB1_40:                               #   Parent Loop BB1_39 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	$.L.str.2, %esi
	movq	%rbx, %rdi
	movq	%r14, %rdx
	xorl	%eax, %eax
	callq	__isoc23_fscanf
	movss	12(%rsp), %xmm0                 # xmm0 = mem[0],zero,zero,zero
	movss	%xmm0, (%r15,%r12,4)
	incq	%r12
	cmpl	$256, %r12d                     # imm = 0x100
	jne	.LBB1_40
# %bb.41:                               #   in Loop: Header=BB1_39 Depth=1
	incl	%ebp
	addq	$1024, %r15                     # imm = 0x400
	cmpl	$256, %ebp                      # imm = 0x100
	jne	.LBB1_39
# %bb.42:
	movq	%rbx, %rdi
	callq	fclose
	leaq	24(%rsp), %rdi
	movl	$262144, %esi                   # imm = 0x40000
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movl	$262144, %esi                   # imm = 0x40000
	callq	hipMalloc
	leaq	160(%rsp), %rbx
	movl	$262144, %esi                   # imm = 0x40000
	movq	%rbx, %rdi
	callq	hipMalloc
	leaq	104(%rsp), %rdi
	movl	$262144, %esi                   # imm = 0x40000
	callq	hipMalloc
	leaq	152(%rsp), %r14
	movl	$262144, %esi                   # imm = 0x40000
	movq	%r14, %rdi
	callq	hipMalloc
	leaq	96(%rsp), %rdi
	movl	$262144, %esi                   # imm = 0x40000
	callq	hipMalloc
	leaq	144(%rsp), %r15
	movl	$131072, %esi                   # imm = 0x20000
	movq	%r15, %rdi
	callq	hipMalloc
	leaq	136(%rsp), %r13
	movl	$131072, %esi                   # imm = 0x20000
	movq	%r13, %rdi
	callq	hipMalloc
	leaq	128(%rsp), %r12
	movl	$131072, %esi                   # imm = 0x20000
	movq	%r12, %rdi
	callq	hipMalloc
	leaq	120(%rsp), %rbp
	movl	$131072, %esi                   # imm = 0x20000
	movq	%rbp, %rdi
	callq	hipMalloc
	movq	(%r13), %rdi
	movl	$131072, %edx                   # imm = 0x20000
	movq	48(%rsp), %rsi                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbp), %rdi
	movl	$131072, %edx                   # imm = 0x20000
	movq	32(%rsp), %rsi                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r15), %rdi
	movl	$131072, %edx                   # imm = 0x20000
	movq	112(%rsp), %rsi                 # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r12), %rdi
	movl	$131072, %edx                   # imm = 0x20000
	movq	40(%rsp), %rsi                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%rbx), %rdi
	movl	$262144, %edx                   # imm = 0x40000
	movq	80(%rsp), %rsi                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	movq	(%r14), %rdi
	movl	$262144, %edx                   # imm = 0x40000
	movq	64(%rsp), %rsi                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	104(%rsp), %rax
	movq	(%rax), %rdi
	movl	$262144, %edx                   # imm = 0x40000
	movq	72(%rsp), %rsi                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	96(%rsp), %rax
	movq	(%rax), %rdi
	movl	$262144, %edx                   # imm = 0x40000
	movq	56(%rsp), %rsi                  # 8-byte Reload
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	24(%rsp), %rax
	movq	(%rax), %rdi
	movl	$262144, %edx                   # imm = 0x40000
	movq	168(%rsp), %r13                 # 8-byte Reload
	movq	%r13, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	16(%rsp), %rax
	movq	(%rax), %rdi
	movl	$262144, %edx                   # imm = 0x40000
	movq	176(%rsp), %rbp                 # 8-byte Reload
	movq	%rbp, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	184(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventCreate
	leaq	88(%rsp), %rdi
	callq	hipEventCreate
	movq	(%rbx), %rdi
	xorl	%r14d, %r14d
	xorl	%esi, %esi
	callq	hipEventRecord
	movabsq	$549755813889, %rdi             # imm = 0x8000000001
	movabsq	$8589934720, %rdx               # imm = 0x200000080
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_44
# %bb.43:
	movq	136(%rsp), %rdi
	movq	120(%rsp), %rsi
	movq	144(%rsp), %rdx
	movq	128(%rsp), %rcx
	movq	160(%rsp), %r8
	movq	152(%rsp), %r9
	pushq	16(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	32(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	112(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	128(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	_Z20__device_stub__sensePfS_S_S_S_S_S_S_S_S_
	addq	$32, %rsp
	.cfi_adjust_cfa_offset -32
.LBB1_44:
	callq	hipDeviceSynchronize
	movq	88(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	88(%rsp), %rdi
	callq	hipEventSynchronize
	movq	184(%rsp), %rsi
	movq	88(%rsp), %rdx
	leaq	196(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	cvtss2sd	(%rbx), %xmm0
	movl	$.L.str.10, %edi
	movb	$1, %al
	callq	printf
	movq	24(%rsp), %rsi
	movl	$262144, %edx                   # imm = 0x40000
	movq	%r13, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rsi
	movl	$262144, %edx                   # imm = 0x40000
	movq	%rbp, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$.L.str.11, %edi
	movl	$.L.str.12, %esi
	callq	fopen
	movq	%rax, %rbx
	movq	%r13, %r15
.LBB1_45:                               # %.preheader195
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_46 Depth 2
	xorl	%r12d, %r12d
.LBB1_46:                               #   Parent Loop BB1_45 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r15,%r12,4), %xmm0
	movl	$.L.str.13, %esi
	movq	%rbx, %rdi
	movb	$1, %al
	callq	fprintf
	incq	%r12
	cmpl	$256, %r12d                     # imm = 0x100
	jne	.LBB1_46
# %bb.47:                               #   in Loop: Header=BB1_45 Depth=1
	movl	$.L.str.14, %edi
	movl	$2, %esi
	movl	$1, %edx
	movq	%rbx, %rcx
	callq	fwrite@PLT
	incl	%r14d
	addq	$1024, %r15                     # imm = 0x400
	cmpl	$256, %r14d                     # imm = 0x100
	jne	.LBB1_45
# %bb.48:
	movq	%rbx, %rdi
	callq	fclose
	movl	$.L.str.15, %edi
	movl	$.L.str.12, %esi
	callq	fopen
	movq	%rax, %rbx
	xorl	%r14d, %r14d
	movq	%rbp, %r15
.LBB1_49:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_50 Depth 2
	xorl	%r12d, %r12d
.LBB1_50:                               #   Parent Loop BB1_49 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r15,%r12,4), %xmm0
	movl	$.L.str.13, %esi
	movq	%rbx, %rdi
	movb	$1, %al
	callq	fprintf
	incq	%r12
	cmpl	$256, %r12d                     # imm = 0x100
	jne	.LBB1_50
# %bb.51:                               #   in Loop: Header=BB1_49 Depth=1
	movl	$.L.str.14, %edi
	movl	$2, %esi
	movl	$1, %edx
	movq	%rbx, %rcx
	callq	fwrite@PLT
	incl	%r14d
	addq	$1024, %r15                     # imm = 0x400
	cmpl	$256, %r14d                     # imm = 0x100
	jne	.LBB1_49
# %bb.52:
	movq	%rbx, %rdi
	callq	fclose
	movl	$.Lstr, %edi
	callq	puts@PLT
	movq	80(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	72(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	64(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	56(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	112(%rsp), %rdi                 # 8-byte Reload
	callq	free
	movq	48(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	40(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	32(%rsp), %rdi                  # 8-byte Reload
	callq	free
	movq	%r13, %rdi
	callq	free
	movq	%rbp, %rdi
	callq	free
	movq	160(%rsp), %rdi
	callq	hipFree
	movq	104(%rsp), %rdi
	callq	hipFree
	movq	152(%rsp), %rdi
	callq	hipFree
	movq	96(%rsp), %rdi
	callq	hipFree
	movq	144(%rsp), %rdi
	callq	hipFree
	movq	136(%rsp), %rdi
	callq	hipFree
	movq	128(%rsp), %rdi
	callq	hipFree
	movq	120(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	callq	getchar
	xorl	%eax, %eax
	addq	$200, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB1_53:
	.cfi_def_cfa_offset 256
	movl	$1, %edi
	callq	exit
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z5sensePfS_S_S_S_S_S_S_S_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z5sensePfS_S_S_S_S_S_S_S_S_,@object # @_Z5sensePfS_S_S_S_S_S_S_S_S_
	.section	.rodata,"a",@progbits
	.globl	_Z5sensePfS_S_S_S_S_S_S_S_S_
	.p2align	3, 0x0
_Z5sensePfS_S_S_S_S_S_S_S_S_:
	.quad	_Z20__device_stub__sensePfS_S_S_S_S_S_S_S_S_
	.size	_Z5sensePfS_S_S_S_S_S_S_S_S_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"im1real.txt"
	.size	.L.str, 12

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"r"
	.size	.L.str.1, 2

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"%f,  "
	.size	.L.str.2, 6

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"im1imag.txt"
	.size	.L.str.3, 12

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"im2real.txt"
	.size	.L.str.4, 12

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"im2imag.txt"
	.size	.L.str.5, 12

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"coil1imag.txt"
	.size	.L.str.6, 14

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"coil1real.txt"
	.size	.L.str.7, 14

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"coil2imag.txt"
	.size	.L.str.8, 14

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"coil2real.txt"
	.size	.L.str.9, 14

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"Time for SENSE reconstruction:  %3.1f ms \n"
	.size	.L.str.10, 43

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"reconstructionreal.txt"
	.size	.L.str.11, 23

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"w"
	.size	.L.str.12, 2

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	" %f \t"
	.size	.L.str.13, 6

	.type	.L.str.14,@object               # @.str.14
.L.str.14:
	.asciz	" \n"
	.size	.L.str.14, 3

	.type	.L.str.15,@object               # @.str.15
.L.str.15:
	.asciz	"reconstructionimag.txt"
	.size	.L.str.15, 23

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z5sensePfS_S_S_S_S_S_S_S_S_"
	.size	.L__unnamed_1, 29

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"\n SENSE reconstruction is finished successfully "
	.size	.Lstr, 49

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z20__device_stub__sensePfS_S_S_S_S_S_S_S_S_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z5sensePfS_S_S_S_S_S_S_S_S_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z5sensePfS_S_S_S_S_S_S_S_S_ ; -- Begin function _Z5sensePfS_S_S_S_S_S_S_S_S_
	.globl	_Z5sensePfS_S_S_S_S_S_S_S_S_
	.p2align	8
	.type	_Z5sensePfS_S_S_S_S_S_S_S_S_,@function
_Z5sensePfS_S_S_S_S_S_S_S_S_:           ; @_Z5sensePfS_S_S_S_S_S_S_S_S_
; %bb.0:
	s_load_b32 s2, s[0:1], 0x5c
	v_bfe_u32 v1, v0, 10, 10
	v_and_b32_e32 v0, 0x3ff, v0
	s_load_b512 s[16:31], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s3, s2, 16
	s_and_b32 s2, s2, 0xffff
	s_mul_i32 s15, s15, s3
	s_mul_i32 s14, s14, s2
	v_add_lshl_u32 v1, s15, v1, 7
	s_load_b128 s[0:3], s[0:1], 0x40
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add3_u32 v0, s14, v0, v1
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_add_co_u32 v2, vcc_lo, s28, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s29, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s30, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s31, v1, vcc_lo
	v_add_co_u32 v6, vcc_lo, s24, v0
	v_add_co_ci_u32_e32 v7, vcc_lo, s25, v1, vcc_lo
	v_add_co_u32 v8, vcc_lo, s26, v0
	v_add_co_ci_u32_e32 v9, vcc_lo, s27, v1, vcc_lo
	v_add_co_u32 v10, vcc_lo, 0x20000, v2
	v_add_co_ci_u32_e32 v11, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v12, vcc_lo, 0x20000, v8
	v_add_co_ci_u32_e32 v13, vcc_lo, 0, v9, vcc_lo
	v_add_co_u32 v14, vcc_lo, 0x20000, v6
	v_add_co_ci_u32_e32 v15, vcc_lo, 0, v7, vcc_lo
	s_clause 0x1
	global_load_b32 v16, v[2:3], off
	global_load_b32 v10, v[10:11], off
	s_clause 0x1
	global_load_b32 v8, v[8:9], off
	global_load_b32 v9, v[12:13], off
	v_add_co_u32 v2, vcc_lo, 0x20000, v4
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v5, vcc_lo
	s_clause 0x1
	global_load_b32 v6, v[6:7], off
	global_load_b32 v7, v[14:15], off
	s_clause 0x1
	global_load_b32 v11, v[2:3], off
	global_load_b32 v12, v[4:5], off
	v_add_co_u32 v2, vcc_lo, s16, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s17, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s18, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s19, v1, vcc_lo
	global_load_b32 v13, v[2:3], off
	global_load_b32 v14, v[4:5], off
	v_add_co_u32 v2, vcc_lo, s20, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s21, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s22, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s23, v1, vcc_lo
	global_load_b32 v15, v[2:3], off
	global_load_b32 v17, v[4:5], off
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	s_waitcnt vmcnt(8)
	v_dual_mul_f32 v5, v10, v8 :: v_dual_mul_f32 v4, v16, v9
	s_waitcnt vmcnt(6)
	v_dual_mul_f32 v18, v6, v9 :: v_dual_mul_f32 v19, v7, v8
	s_waitcnt vmcnt(4)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v4, v11, v6 :: v_dual_fmac_f32 v5, v12, v7
	v_fma_f32 v18, v16, v11, -v18
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f32 v19, v10, v12, -v19
	v_sub_f32_e32 v18, v18, v19
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_sub_f32_e32 v20, v4, v5
	v_add_co_u32 v4, vcc_lo, 0x20000, v2
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v3, vcc_lo
	v_mul_f32_e32 v19, v20, v20
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_fmac_f32_e32 v19, v18, v18
	v_mul_f32_e32 v21, v9, v20
	v_mul_f32_e32 v23, v8, v20
	v_mul_f32_e32 v22, v7, v20
	v_mul_f32_e32 v27, v12, v20
	v_dual_mul_f32 v24, v6, v20 :: v_dual_fmac_f32 v21, v11, v18
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fmac_f32_e32 v23, v12, v18
	v_dual_fmac_f32 v22, v10, v18 :: v_dual_mul_f32 v25, v11, v20
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fmac_f32_e32 v24, v16, v18
	v_div_scale_f32 v11, vcc_lo, v21, v19, v21
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_div_scale_f32 v12, null, v19, v19, -v22
	v_fma_f32 v9, v9, v18, -v25
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_div_scale_f32 v25, null, v19, v19, v24
	v_rcp_f32_e32 v35, v12
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_div_scale_f32 v28, s3, v9, v19, v9
	v_rcp_f32_e32 v37, v25
	s_waitcnt_depctr 0xfff
	v_fma_f32 v44, -v12, v35, 1.0
	v_mul_f32_e32 v26, v10, v20
	v_div_scale_f32 v10, null, v19, v19, v21
	v_fma_f32 v46, -v25, v37, 1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fmac_f32_e32 v35, v44, v35
	v_mul_f32_e32 v20, v16, v20
	v_rcp_f32_e32 v34, v10
	v_fma_f32 v7, v7, v18, -v26
	v_fmac_f32_e32 v37, v46, v37
	v_div_scale_f32 v16, s0, -v22, v19, -v22
	v_fma_f32 v6, v6, v18, -v20
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(TRANS32_DEP_1)
	v_div_scale_f32 v29, null, v19, v19, -v7
	v_div_scale_f32 v20, s1, -v23, v19, -v23
	v_fma_f32 v43, -v10, v34, 1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_div_scale_f32 v33, null, v19, v19, v6
	v_rcp_f32_e32 v39, v29
	v_div_scale_f32 v26, s2, v24, v19, v24
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v34, v43, v34
	v_fma_f32 v8, v8, v18, -v27
	v_div_scale_f32 v18, null, v19, v19, -v23
	v_div_scale_f32 v27, null, v19, v19, v9
	v_div_scale_f32 v31, null, v19, v19, -v8
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_rcp_f32_e32 v36, v18
	v_rcp_f32_e32 v38, v27
	v_rcp_f32_e32 v41, v33
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_rcp_f32_e32 v40, v31
	v_mul_f32_e32 v43, v11, v34
	v_fma_f32 v48, -v29, v39, 1.0
	v_div_scale_f32 v30, s4, -v7, v19, -v7
	v_mul_f32_e32 v46, v26, v37
	v_fma_f32 v51, -v10, v43, v11
	v_fma_f32 v45, -v18, v36, 1.0
	s_delay_alu instid0(TRANS32_DEP_3) | instskip(SKIP_1) | instid1(TRANS32_DEP_1)
	v_fma_f32 v47, -v27, v38, 1.0
	v_mul_f32_e32 v44, v16, v35
	v_fma_f32 v49, -v31, v40, 1.0
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_dual_fmac_f32 v43, v51, v34 :: v_dual_fmac_f32 v36, v45, v36
	v_fmac_f32_e32 v39, v48, v39
	v_fma_f32 v50, -v33, v41, 1.0
	v_fmac_f32_e32 v40, v49, v40
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_dual_fmac_f32 v38, v47, v38 :: v_dual_mul_f32 v45, v20, v36
	v_div_scale_f32 v32, s5, -v8, v19, -v8
	v_fma_f32 v52, -v12, v44, v16
	v_fmac_f32_e32 v41, v50, v41
	v_dual_mul_f32 v47, v28, v38 :: v_dual_mul_f32 v48, v30, v39
	v_div_scale_f32 v42, s6, v6, v19, v6
	v_fma_f32 v53, -v18, v45, v20
	v_fma_f32 v54, -v25, v46, v26
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_mul_f32 v49, v32, v40 :: v_dual_mul_f32 v50, v42, v41
	v_dual_fmac_f32 v44, v52, v35 :: v_dual_fmac_f32 v45, v53, v36
	v_fma_f32 v55, -v27, v47, v28
	v_fma_f32 v10, -v10, v43, v11
	v_fma_f32 v56, -v29, v48, v30
	v_fmac_f32_e32 v46, v54, v37
	v_fma_f32 v57, -v31, v49, v32
	v_fmac_f32_e32 v47, v55, v38
	v_fma_f32 v11, -v12, v44, v16
	v_fma_f32 v58, -v33, v50, v42
	v_fma_f32 v12, -v18, v45, v20
	v_div_fmas_f32 v10, v10, v34, v43
	v_dual_fmac_f32 v48, v56, v39 :: v_dual_fmac_f32 v49, v57, v40
	s_mov_b32 vcc_lo, s0
	v_fma_f32 v16, -v25, v46, v26
	v_div_fmas_f32 v11, v11, v35, v44
	s_mov_b32 vcc_lo, s1
	v_fma_f32 v18, -v27, v47, v28
	v_div_fmas_f32 v12, v12, v36, v45
	v_div_fixup_f32 v10, v10, v19, v21
	v_fmac_f32_e32 v50, v58, v41
	s_mov_b32 vcc_lo, s2
	v_fma_f32 v20, -v29, v48, v30
	v_div_fmas_f32 v16, v16, v37, v46
	s_waitcnt vmcnt(3)
	v_mul_f32_e32 v21, v13, v10
	s_mov_b32 vcc_lo, s3
	v_fma_f32 v25, -v31, v49, v32
	v_div_fmas_f32 v18, v18, v38, v47
	s_mov_b32 vcc_lo, s4
	v_fma_f32 v26, -v33, v50, v42
	v_div_fmas_f32 v20, v20, v39, v48
	s_mov_b32 vcc_lo, s5
	v_div_fixup_f32 v11, v11, v19, -v22
	v_div_fmas_f32 v22, v25, v40, v49
	s_mov_b32 vcc_lo, s6
	v_div_fixup_f32 v12, v12, v19, -v23
	v_div_fixup_f32 v9, v18, v19, v9
	v_div_fmas_f32 v18, v26, v41, v50
	v_div_fixup_f32 v16, v16, v19, v24
	v_div_fixup_f32 v7, v20, v19, -v7
	s_waitcnt vmcnt(2)
	v_dual_mul_f32 v23, v14, v11 :: v_dual_mul_f32 v24, v13, v12
	v_div_fixup_f32 v8, v22, v19, -v8
	v_div_fixup_f32 v6, v18, v19, v6
	s_waitcnt vmcnt(1)
	v_dual_mul_f32 v20, v14, v16 :: v_dual_fmac_f32 v21, v15, v9
	v_dual_mul_f32 v22, v13, v9 :: v_dual_mul_f32 v9, v14, v7
	s_waitcnt vmcnt(0)
	v_dual_fmac_f32 v23, v17, v7 :: v_dual_fmac_f32 v24, v15, v8
	v_dual_mul_f32 v7, v13, v8 :: v_dual_mul_f32 v8, v14, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fma_f32 v10, v15, v10, -v22
	v_fma_f32 v9, v17, v11, -v9
	v_fmac_f32_e32 v20, v17, v6
	v_fma_f32 v11, v15, v12, -v7
	v_fma_f32 v8, v17, v16, -v8
	v_add_co_u32 v6, vcc_lo, 0x20000, v0
	v_dual_add_f32 v9, v10, v9 :: v_dual_add_f32 v10, v21, v23
	s_delay_alu instid0(VALU_DEP_3)
	v_add_f32_e32 v8, v11, v8
	v_add_f32_e32 v11, v24, v20
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v1, vcc_lo
	s_clause 0x1
	global_store_b32 v[2:3], v9, off
	global_store_b32 v[4:5], v8, off
	s_clause 0x1
	global_store_b32 v[0:1], v10, off
	global_store_b32 v[6:7], v11, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z5sensePfS_S_S_S_S_S_S_S_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 336
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 59
		.amdhsa_next_free_sgpr 32
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z5sensePfS_S_S_S_S_S_S_S_S_, .Lfunc_end0-_Z5sensePfS_S_S_S_S_S_S_S_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1444
; NumSgprs: 34
; NumVgprs: 59
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 4
; VGPRBlocks: 7
; NumSGPRsForWavesPerEU: 34
; NumVGPRsForWavesPerEU: 59
; Occupancy: 16
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         56
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         64
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         72
        .size:           8
        .value_kind:     global_buffer
      - .offset:         80
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         84
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         88
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         92
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         94
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         96
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         98
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         100
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         102
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         120
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         128
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         136
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         144
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 336
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z5sensePfS_S_S_S_S_S_S_S_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     34
    .sgpr_spill_count: 0
    .symbol:         _Z5sensePfS_S_S_S_S_S_S_S_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     59
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
