/**
 * Parallel computing (2015-2016 course)
 *
 * Antennas setup
 * CUDA implementation
 *
 * @author Hector Del Campo Pando
 * @author Alberto Gutierrez Perez
 */

// Includes generales
#include <stdlib.h>
#include <stdio.h>
#include <limits.h>


// Include para las utilidades de computación paralela
#include <time.h>
#include <cuda.h>
#include <math.h>

/**
 * Estructura antena
 */
typedef struct {
	int y;
	int x;
} Antena;

/**
 * Estructura para guardar la informacion del numero maximo global
 */
typedef struct {
	int max;
	int pos;
} Max_data;


/**
 * Macros para acceder al maximo y su posicion
 */
#define valor(m) m->max
#define pos(max) max->pos

/**
 * Macro para acceder a las posiciones del mapa
 */
#define m(y,x) mapa[ (y * cols) + x ]
#define posicion(y,x) (y * cols) + x
#define row(n)	((int)n) / cols
#define col(n)	n % cols

/**
 * Macro para la funcion manhattan
 */
#define manhattan(a, i, j) (abs(a.x -j) + abs(a.y - i)) * (abs(a.x -j) + abs(a.y - i))
#define nueva_antena(n)	{row(n), col(n)}

#define posicion_thread() (blockIdx.x + blockIdx.y * gridDim.x) * (blockDim.x * blockDim.y) + (threadIdx.x + threadIdx.y * blockDim.x)

/**
 * Macros para la reduccion
 */
#define MAX_THREADS 1024
#define NUM_THREADS_BLOCK 256
#define NUM_BLOCKS ((int)rows*cols/NUM_THREADS_BLOCK + 1)

__global__ void iniciarMapa(int *mapa, int rows, int cols){
	int posicion = posicion_thread();
	if(posicion < rows*cols)
		mapa[posicion] = INT_MAX;
}


template <unsigned int blockSize>
__global__ void max_kernel(int *entrada_max, int *entrada_pos, int *salida_max, int *salida_pos, int size){
	extern __shared__ int s[];

	unsigned int nHilos = blockDim.x;
	unsigned int id = threadIdx.x;	//id thread en bloque
	unsigned int idBloque = blockIdx.x;	//id del bloque en grid
	unsigned int posicion = id + idBloque*nHilos;	//Posicion en el mapa

	int *maximos = (int*)s;
	int *posiciones = (int*)&maximos[nHilos];

	int myMax = INT_MIN, pos = INT_MAX;

	if(entrada_pos == NULL){
		while(posicion < size){
			if(entrada_max[posicion] > myMax){
				myMax = entrada_max[posicion];
				pos = posicion;
			}
			posicion+=(nHilos*gridDim.x);
		}
	}else{
		while(posicion < size){
			if(entrada_max[posicion] > myMax){
				myMax = entrada_max[posicion];
				pos = entrada_pos[posicion];
			}
			posicion+=(nHilos*gridDim.x);
		}
	}

	maximos[id] = myMax;
	posiciones[id] = pos;
	__syncthreads();



	if(blockSize>= 1024){
		if( id < 512)
			if(maximos[id + 512] > maximos[id] || (maximos[id + 512] == maximos[id] && posiciones[id+512] < posiciones[id])){
				maximos[id] = maximos[id+512];
				posiciones[id] = posiciones[id+512];
			}
			__syncthreads();
	}
	if(blockSize>= 512){
		if( id < 256)
			if(maximos[id + 256] > maximos[id] || (maximos[id + 256] == maximos[id] && posiciones[id+256] < posiciones[id])){
				maximos[id] = maximos[id+256];
				posiciones[id] = posiciones[id+256];
			}
			__syncthreads();
	}
	if(blockSize>= 256){
		if( id < 128)
			if(maximos[id + 128] > maximos[id] || (maximos[id + 128] == maximos[id] && posiciones[id+128] < posiciones[id])){
				maximos[id] = maximos[id+128];
				posiciones[id] = posiciones[id+128];
			}			
		__syncthreads();
	}
	if(blockSize>= 128){
		if( id < 64)
			if(maximos[id + 64] > maximos[id] || (maximos[id + 64] == maximos[id] && posiciones[id+64] < posiciones[id])){
				maximos[id] = maximos[id+64];
				posiciones[id] = posiciones[id+64];
			}
			__syncthreads();
	}

	if(id < 32){
		if(blockSize>= 64){	if((maximos[id + 32] > maximos[id] || (maximos[id + 32] == maximos[id] && posiciones[id+32] < posiciones[id]))){maximos[id] = maximos[id+32]; posiciones[id] = posiciones[id+32];}}
		if(blockSize>=32){	if((maximos[id + 16] > maximos[id] || (maximos[id + 16] == maximos[id] && posiciones[id+16] < posiciones[id]))){maximos[id] = maximos[id+16]; posiciones[id] = posiciones[id+16];}}
		if(blockSize>=16){	if((maximos[id + 8] > maximos[id] || (maximos[id + 8] == maximos[id] && posiciones[id+8] < posiciones[id]))){maximos[id] = maximos[id+8]; posiciones[id] = posiciones[id+8];}}
		if(blockSize>=8){	if((maximos[id + 4] > maximos[id] || (maximos[id + 4] == maximos[id] && posiciones[id+4] < posiciones[id]))){maximos[id] = maximos[id+4]; posiciones[id] = posiciones[id+4];}}
		if(blockSize>=4){	if((maximos[id + 2] > maximos[id] || (maximos[id + 2] == maximos[id] && posiciones[id+2] < posiciones[id]))){maximos[id] = maximos[id+2]; posiciones[id] = posiciones[id+2];}}
		if(blockSize>=2){	if((maximos[id + 1] > maximos[id] || (maximos[id + 1] == maximos[id] && posiciones[id+1] < posiciones[id]))){maximos[id] = maximos[id+1]; posiciones[id] = posiciones[id+1];}}
	}

	if(id == 0){
		salida_max[idBloque] = maximos[0];
		salida_pos[idBloque] = posiciones[0];
	}

}

__global__ void actualizar_kernel( int *mapa, Antena antena, int rows, int cols){
	m(antena.y, antena.x) = 0;
	int nuevadist;
	unsigned int desplHor = threadIdx.x + blockIdx.x*blockDim.x;
	unsigned int desplVer = threadIdx.y + blockIdx.y*blockDim.y;
	int j;

	for(int i = antena.y - desplVer; i >= 0; i-=blockDim.y){
		j = antena.x + desplHor;
		nuevadist = manhattan(antena,i,j);
		if(nuevadist > m(i,j))	break;
		for(; j < cols; j+=blockDim.x){
			nuevadist = manhattan(antena,i,j);
			if(nuevadist > m(i,j))	break;
			m(i,j) = nuevadist;
		}
	}

	for(int i = antena.y + desplVer; i < rows; i+=blockDim.y){
		j = antena.x - desplHor;
		nuevadist = manhattan(antena,i,j);
		if(nuevadist > m(i,j))	break;
		for(; j >= 0; j-=blockDim.x){
			nuevadist = manhattan(antena,i,j);
			if(nuevadist > m(i,j))	break;
			m(i,j) = nuevadist;
		}
	}

	for(int i = antena.y + desplVer; i < rows; i+=blockDim.y){
		j = antena.x + desplHor;
		nuevadist = manhattan(antena,i,j);
		if(nuevadist > m(i,j))	break;
		for(; j < cols; j+=blockDim.x){
			nuevadist = manhattan(antena,i,j);
			if(nuevadist > m(i,j))	break;
			m(i,j) = nuevadist;
		}
	}

	for(int i = antena.y - desplVer; i >= 0; i-=blockDim.y){
		j = antena.x - desplHor;
		nuevadist = manhattan(antena,i,j);
		if(nuevadist > m(i,j))	break;
		for(; j >= 0; j-=blockDim.x){
			nuevadist = manhattan(antena,i,j);
			if(nuevadist > m(i,j))	break;
			m(i,j) = nuevadist;
		}
	}
}

/**
 * Función de ayuda para imprimir el mapa
 */
void print_mapa(int * mapa, int rows, int cols, Antena * a){


	if(rows > 50 || cols > 30){
		printf("Mapa muy grande para imprimir\n");
		return;
	};

	#define ANSI_COLOR_RED     "\x1b[31m"
	#define ANSI_COLOR_GREEN   "\x1b[32m"
	#define ANSI_COLOR_RESET   "\x1b[0m"

	printf("Mapa [%d,%d]\n",rows,cols);
	for(int i=0; i<rows; i++){
		for(int j=0; j<cols; j++){

			int val = m(i,j);

			if(val == 0){
				if(a != NULL && a->x == j && a->y == i){
					printf( ANSI_COLOR_RED "   A"  ANSI_COLOR_RESET);
				} else { 
					printf( ANSI_COLOR_GREEN "   A"  ANSI_COLOR_RESET);
				}
			} else {
				printf("%4d",val);
			}
		}
		printf("\n");
	}
	printf("\n");
}

/**
 * Funcion depuracion para CUDA
 */
void print_mapa_cuda(int *mapa, int rows, int cols){
		int *m = (int*)malloc(sizeof(int)*rows*cols);
		cudaMemcpy(m, mapa, sizeof(int)*rows*cols, cudaMemcpyDeviceToHost);
		print_mapa(m,rows,cols,NULL);
		free(m);
		getchar();
}

/**
 * Actualizar el mapa con la nueva antena
 */
void actualizar(int *mapa, Antena antena, int rows, int cols){
	dim3 hilos(6,6);
	dim3 bloques(32);
	actualizar_kernel<<<bloques, hilos>>>(mapa,antena,rows,cols);
}



/**
 * Calcular la distancia máxima en el mapa
 */
Max_data calcular_max(int * mapa, int *maximos, int *posiciones, int rows, int cols){
	int posicion;
	int maximo;
	int aux = NUM_BLOCKS, nBloques = NUM_BLOCKS;

	//reduccion por bloques
	max_kernel<NUM_THREADS_BLOCK><<<nBloques, NUM_THREADS_BLOCK, sizeof(int)*NUM_THREADS_BLOCK*2>>>(mapa, NULL, maximos, posiciones,rows*cols);

	//reduccion de los bloques
	nBloques = (nBloques - 1)/NUM_THREADS_BLOCK + 1;

	while(aux != 1){
		max_kernel<NUM_THREADS_BLOCK><<<nBloques, NUM_THREADS_BLOCK, sizeof(int)*2*NUM_THREADS_BLOCK>>>(maximos, posiciones, maximos, posiciones, aux);
		aux = nBloques;
		nBloques = (nBloques - 1)/NUM_THREADS_BLOCK + 1;
	}
	//Fin reduccion bloques

	cudaMemcpy(&maximo, &maximos[0], sizeof(int), cudaMemcpyDeviceToHost);
	cudaMemcpy(&posicion, &posiciones[0], sizeof(int), cudaMemcpyDeviceToHost);

	Max_data max_global = {maximo, posicion};
	return max_global;
}


/**
 * Función principal
 */
int main(int nargs, char ** vargs){

	//
	// 1. LEER DATOS DE ENTRADA
	//

	// Comprobar número de argumentos
	if(nargs < 7){
		fprintf(stderr,"Uso: %s rows cols distMax nAntenas x0 y0 [x1 y1, ...]\n",vargs[0]);
		return -1;
	}

	// Leer los argumentos de entrada
	int rows = atoi(vargs[1]);
	int cols = atoi(vargs[2]);
	int distMax = atoi(vargs[3]);
	int nAntenas = atoi(vargs[4]);

	if(nAntenas<1 || nargs != (nAntenas*2+5)){
		fprintf(stderr,"Error en la lista de antenas\n");
		return -1;
	}


	// Mensaje
	printf("Calculando el número de antenas necesarias para cubrir un mapa de"
	   " (%d x %d)\ncon una distancia máxima no superior a %d "
	   "y con %d antenas iniciales\n\n",rows,cols,distMax,nAntenas);

	// Reservar memoria para las antenas
	Antena *antenas = (Antena*)malloc(sizeof(Antena) * (size_t) nAntenas);
	if(!antenas){
		fprintf(stderr,"Error al reservar memoria para las antenas inicales\n");
		return -1;
	}	
	
	// Leer antenas
	for(int i=0; i<nAntenas; i++){
		antenas[i].x = atoi(vargs[5+i*2]);
		antenas[i].y = atoi(vargs[6+i*2]);

		if(antenas[i].y<0 || antenas[i].y>=rows || antenas[i].x<0 || antenas[i].x>=cols ){
			fprintf(stderr,"Antena #%d está fuera del mapa\n",i);
			return -1;
		}
	}


	//
	// 2. INICIACIÓN
	//

	// Medir el tiempo
	clock_t reloj = clock();
	double tiempo;
	cudaSetDevice(0);

	// Crear el mapa
	int * mapa;
	cudaMalloc((void**) &mapa , (rows*cols) * sizeof(int) );

	// Iniciar el mapa con el valor MAX INT
	iniciarMapa<<<NUM_BLOCKS, NUM_THREADS_BLOCK>>>(mapa,rows,cols);

	// Colocar las antenas iniciales
	for(int i=0; i<nAntenas; i++){
		actualizar(mapa, antenas[i], rows, cols);
	}

	// Debug
#ifdef DEBUG
	print_mapa(mapa,rows,cols,NULL);
#endif


	//
	// 3. CALCULO DE LAS NUEVAS ANTENAS
	//

	// Contador de antenas
	int nuevas = 0;
	Max_data max;

	// Variables para CUDA
	int nBloques = NUM_BLOCKS;
	
	int *posiciones;
	int *maximos;
	cudaMalloc((void**) &posiciones, nBloques * sizeof(int));
	cudaMalloc((void**) &maximos, nBloques * sizeof(int));

	while(1){

		// Calcular el máximo
		max = calcular_max(mapa,maximos,posiciones,rows,cols);

		// Salimos si ya hemos cumplido el maximo
		if (max.max <= distMax) break;	

		// Incrementamos el contador
		nuevas++;
		
		// Calculo de la nueva antena y actualización del mapa
		Antena antena = nueva_antena(max.pos);
		actualizar(mapa,antena,rows,cols);

	}

	reloj = clock() - reloj;

	// Debug
#ifdef DEBUG
	print_mapa(mapa,rows,cols,NULL);
#endif
	
	//Liberar recursos en el host
	cudaFree(mapa);
	cudaFree(posiciones);
	cudaFree(maximos);

	cudaDeviceReset();

	//
	// 4. MOSTRAR RESULTADOS
	//

	// tiempo
	tiempo = (double)reloj / CLOCKS_PER_SEC ;

	// Salida
	printf("Result: %d\n",nuevas);
	printf("Time: %f\n",tiempo);


	return 0;
}





	.file	"tmpxft_003395fa_00000000-6_antenas.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2036:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2036:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.type	_Z33__wrapper__device_stub_max_kernelILj256EEvRPiS1_S1_S1_Ri.isra.0, @function
_Z33__wrapper__device_stub_max_kernelILj256EEvRPiS1_S1_S1_Ri.isra.0:
.LFB2184:
	.cfi_startproc
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	16(%rsp), %rax
	movq	%rdi, 16(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rax, 112(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	12(%rsp), %rax
	movq	%rsi, 24(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 32(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 40(%rsp)
	leaq	56(%rsp), %rcx
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movl	%r8d, 12(%rsp)
	movq	%rax, 64(%rsp)
	movl	$1, 72(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	56(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z10max_kernelILj256EEvPiS0_S0_S0_i(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 192
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L2:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2184:
	.size	_Z33__wrapper__device_stub_max_kernelILj256EEvRPiS1_S1_S1_Ri.isra.0, .-_Z33__wrapper__device_stub_max_kernelILj256EEvRPiS1_S1_S1_Ri.isra.0
	.section	.text._Z10max_kernelILj256EEvPiS0_S0_S0_i,"axG",@progbits,_Z10max_kernelILj256EEvPiS0_S0_S0_i,comdat
	.weak	_Z10max_kernelILj256EEvPiS0_S0_S0_i
	.type	_Z10max_kernelILj256EEvPiS0_S0_S0_i, @function
_Z10max_kernelILj256EEvPiS0_S0_S0_i:
.LFB2111:
	.cfi_startproc
	endbr64
	jmp	_Z33__wrapper__device_stub_max_kernelILj256EEvRPiS1_S1_S1_Ri.isra.0
	.cfi_endproc
.LFE2111:
	.size	_Z10max_kernelILj256EEvPiS0_S0_S0_i, .-_Z10max_kernelILj256EEvPiS0_S0_S0_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Mapa muy grande para imprimir\n"
.LC1:
	.string	"Mapa [%d,%d]\n"
.LC2:
	.string	"\033[31m   A\033[0m"
.LC3:
	.string	"\033[32m   A\033[0m"
.LC4:
	.string	"%4d"
.LC5:
	.string	"\n"
	.text
	.globl	_Z10print_mapaPiiiP6Antena
	.type	_Z10print_mapaPiiiP6Antena, @function
_Z10print_mapaPiiiP6Antena:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	movq	%rdi, 8(%rsp)
	cmpl	$50, %esi
	jg	.L18
	movl	%edx, %ebx
	cmpl	$30, %edx
	jle	.L9
.L18:
	leaq	.LC0(%rip), %rsi
	jmp	.L24
.L9:
	movl	%esi, %r12d
	movq	%rcx, %r13
	movl	$2, %edi
	movl	%edx, %ecx
	xorl	%eax, %eax
	movl	%esi, %edx
	leaq	.LC1(%rip), %rsi
	xorl	%r15d, %r15d
	call	__printf_chk@PLT
	xorl	%r14d, %r14d
.L11:
	cmpl	%r14d, %r12d
	jle	.L16
	movq	8(%rsp), %rcx
	movslq	%r15d, %rax
	xorl	%ebp, %ebp
	leaq	(%rcx,%rax,4), %rax
	movq	%rax, (%rsp)
.L17:
	movl	%ebp, %eax
	cmpl	%ebp, %ebx
	jle	.L25
	movq	(%rsp), %rcx
	movl	(%rcx,%rbp,4), %edx
	testl	%edx, %edx
	jne	.L12
	testq	%r13, %r13
	je	.L13
	cmpl	%eax, 4(%r13)
	jne	.L13
	leaq	.LC2(%rip), %rsi
	cmpl	0(%r13), %r14d
	je	.L23
.L13:
	leaq	.LC3(%rip), %rsi
.L23:
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L14
.L12:
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L14:
	incq	%rbp
	jmp	.L17
.L25:
	leaq	.LC5(%rip), %rsi
	xorl	%eax, %eax
	incl	%r14d
	addl	%ebx, %r15d
	movl	$2, %edi
	call	__printf_chk@PLT
	jmp	.L11
.L16:
	leaq	.LC5(%rip), %rsi
.L24:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	movl	$2, %edi
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	__printf_chk@PLT
	.cfi_endproc
.LFE2029:
	.size	_Z10print_mapaPiiiP6Antena, .-_Z10print_mapaPiiiP6Antena
	.globl	_Z15print_mapa_cudaPiii
	.type	_Z15print_mapa_cudaPiii, @function
_Z15print_mapa_cudaPiii:
.LFB2030:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movslq	%edx, %rax
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	movq	%rdi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%rax, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movslq	%esi, %rbx
	movq	%rbx, %rbp
	imulq	%rax, %rbx
	salq	$2, %rbx
	movq	%rbx, %rdi
	call	malloc@PLT
	movq	%rbx, %rdx
	movq	%r13, %rsi
	movl	$2, %ecx
	movq	%rax, %r14
	movq	%rax, %rdi
	call	cudaMemcpy@PLT
	movl	%r12d, %edx
	movl	%ebp, %esi
	movq	%r14, %rdi
	xorl	%ecx, %ecx
	call	_Z10print_mapaPiiiP6Antena
	movq	%r14, %rdi
	call	free@PLT
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	jmp	getchar@PLT
	.cfi_endproc
.LFE2030:
	.size	_Z15print_mapa_cudaPiii, .-_Z15print_mapa_cudaPiii
	.globl	_Z12calcular_maxPiS_S_ii
	.type	_Z12calcular_maxPiS_S_ii, @function
_Z12calcular_maxPiS_S_ii:
.LFB2032:
	.cfi_startproc
	endbr64
	pushq	%r14
	.cfi_def_cfa_offset 16
	.cfi_offset 14, -16
	movq	%rdi, %r14
	xorl	%r9d, %r9d
	pushq	%r13
	.cfi_def_cfa_offset 24
	.cfi_offset 13, -24
	pushq	%r12
	.cfi_def_cfa_offset 32
	.cfi_offset 12, -32
	movq	%rsi, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 40
	.cfi_offset 6, -40
	movq	%rdx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset 3, -48
	movl	%ecx, %ebx
	movl	$256, %ecx
	imull	%r8d, %ebx
	movl	$2048, %r8d
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	movq	%fs:40, %rax
	movq	%rax, 24(%rsp)
	xorl	%eax, %eax
	movl	%ebx, %eax
	movl	$1, 20(%rsp)
	cltd
	idivl	%ecx
	movl	$16777217, %edx
	movl	$1, %ecx
	salq	$8, %rdx
	movq	%rdx, 12(%rsp)
	leal	1(%rax), %r13d
	movabsq	$4294967297, %rax
	movq	%rax, 4(%rsp)
	movl	8(%rsp), %esi
	movl	%r13d, (%rsp)
	movq	(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L29
	movl	%ebx, %r8d
	movq	%rbp, %rcx
	movq	%r12, %rdx
	xorl	%esi, %esi
	movq	%r14, %rdi
	call	_Z33__wrapper__device_stub_max_kernelILj256EEvRPiS1_S1_S1_Ri.isra.0
.L29:
	movl	%ebx, %eax
	movl	$65536, %ecx
	movabsq	$4294967552, %r14
	cltd
	idivl	%ecx
	movl	%eax, %ebx
	incl	%ebx
.L30:
	cmpl	$1, %r13d
	je	.L35
	movl	%ebx, (%rsp)
	xorl	%r9d, %r9d
	movl	$2048, %r8d
	movq	%r14, %rdx
	movabsq	$4294967297, %rax
	movl	$1, %ecx
	movq	%r14, 12(%rsp)
	movq	%rax, 4(%rsp)
	movq	(%rsp), %rdi
	movl	8(%rsp), %esi
	movl	$1, 20(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L31
	movl	%r13d, %r8d
	movq	%rbp, %rcx
	movq	%r12, %rdx
	movq	%rbp, %rsi
	movq	%r12, %rdi
	call	_Z33__wrapper__device_stub_max_kernelILj256EEvRPiS1_S1_S1_Ri.isra.0
.L31:
	leal	-1(%rbx), %eax
	movl	$256, %ecx
	movl	%ebx, %r13d
	cltd
	idivl	%ecx
	leal	1(%rax), %ebx
	jmp	.L30
.L35:
	leaq	12(%rsp), %rdi
	movl	$2, %ecx
	movl	$4, %edx
	movq	%r12, %rsi
	call	cudaMemcpy@PLT
	movl	$4, %edx
	movq	%rsp, %rdi
	movq	%rbp, %rsi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	movl	(%rsp), %edx
	movl	12(%rsp), %eax
	salq	$32, %rdx
	orq	%rdx, %rax
	movq	24(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L33
	call	__stack_chk_fail@PLT
.L33:
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%rbp
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r13
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2032:
	.size	_Z12calcular_maxPiS_S_ii, .-_Z12calcular_maxPiS_S_ii
	.globl	_Z33__device_stub__Z11iniciarMapaPiiiPiii
	.type	_Z33__device_stub__Z11iniciarMapaPiiiPiii, @function
_Z33__device_stub__Z11iniciarMapaPiiiPiii:
.LFB2058:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	24(%rsp), %rcx
	leaq	32(%rsp), %rdi
	movl	%esi, 4(%rsp)
	leaq	44(%rsp), %rsi
	movl	%edx, (%rsp)
	leaq	16(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 40(%rsp)
	movq	%rax, 80(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 32(%rsp)
	movq	%rax, 44(%rsp)
	movl	$1, 52(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L36
	pushq	24(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z11iniciarMapaPiii(%rip), %rdi
	pushq	24(%rsp)
	.cfi_def_cfa_offset 144
	movq	60(%rsp), %rcx
	movl	68(%rsp), %r8d
	movq	48(%rsp), %rsi
	movl	56(%rsp), %edx
	leaq	96(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L36:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L38
	call	__stack_chk_fail@PLT
.L38:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2058:
	.size	_Z33__device_stub__Z11iniciarMapaPiiiPiii, .-_Z33__device_stub__Z11iniciarMapaPiiiPiii
	.globl	_Z11iniciarMapaPiii
	.type	_Z11iniciarMapaPiii, @function
_Z11iniciarMapaPiii:
.LFB2059:
	.cfi_startproc
	endbr64
	jmp	_Z33__device_stub__Z11iniciarMapaPiiiPiii
	.cfi_endproc
.LFE2059:
	.size	_Z11iniciarMapaPiii, .-_Z11iniciarMapaPiii
	.globl	_Z46__device_stub__Z17actualizar_kernelPi6AntenaiiPiR6Antenaii
	.type	_Z46__device_stub__Z17actualizar_kernelPi6AntenaiiPiR6Antenaii, @function
_Z46__device_stub__Z17actualizar_kernelPi6AntenaiiPiR6Antenaii:
.LFB2060:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 8(%rsp)
	leaq	40(%rsp), %rdi
	movl	%edx, 4(%rsp)
	leaq	24(%rsp), %rdx
	movl	%ecx, (%rsp)
	leaq	32(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movq	%rsi, 96(%rsp)
	leaq	52(%rsp), %rsi
	movq	%rax, 88(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 104(%rsp)
	movq	%rsp, %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movl	$1, 48(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L41
	pushq	32(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z17actualizar_kernelPi6Antenaii(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 160
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L41:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L43
	call	__stack_chk_fail@PLT
.L43:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2060:
	.size	_Z46__device_stub__Z17actualizar_kernelPi6AntenaiiPiR6Antenaii, .-_Z46__device_stub__Z17actualizar_kernelPi6AntenaiiPiR6Antenaii
	.globl	_Z17actualizar_kernelPi6Antenaii
	.type	_Z17actualizar_kernelPi6Antenaii, @function
_Z17actualizar_kernelPi6Antenaii:
.LFB2061:
	.cfi_startproc
	endbr64
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movq	%rsi, 8(%rsp)
	leaq	8(%rsp), %rsi
	call	_Z46__device_stub__Z17actualizar_kernelPi6AntenaiiPiR6Antenaii
	addq	$24, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2061:
	.size	_Z17actualizar_kernelPi6Antenaii, .-_Z17actualizar_kernelPi6Antenaii
	.globl	_Z10actualizarPi6Antenaii
	.type	_Z10actualizarPi6Antenaii, @function
_Z10actualizarPi6Antenaii:
.LFB2031:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	xorl	%r9d, %r9d
	movq	%rsi, %r13
	xorl	%r8d, %r8d
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movl	$1, %esi
	movl	%ecx, %r12d
	movl	$1, %ecx
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movl	%edx, %ebp
	movabsq	$25769803782, %rdx
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	movq	%rdi, %rbx
	movl	$134217729, %edi
	salq	$5, %rdi
	subq	$56, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 40(%rsp)
	xorl	%eax, %eax
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L47
	leaq	8(%rsp), %rsi
	movl	%r12d, %ecx
	movl	%ebp, %edx
	movq	%rbx, %rdi
	movq	%r13, 8(%rsp)
	call	_Z46__device_stub__Z17actualizar_kernelPi6AntenaiiPiR6Antenaii
.L47:
	movq	40(%rsp), %rax
	subq	%fs:40, %rax
	je	.L49
	call	__stack_chk_fail@PLT
.L49:
	addq	$56, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2031:
	.size	_Z10actualizarPi6Antenaii, .-_Z10actualizarPi6Antenaii
	.section	.rodata.str1.1
.LC6:
	.string	"Uso: %s rows cols distMax nAntenas x0 y0 [x1 y1, ...]\n"
.LC7:
	.string	"Error en la lista de antenas\n"
.LC8:
	.string	"Calculando el n\303\272mero de antenas necesarias para cubrir un mapa de (%d x %d)\ncon una distancia m\303\241xima no superior a %d y con %d antenas iniciales\n\n"
.LC9:
	.string	"Error al reservar memoria para las antenas inicales\n"
.LC10:
	.string	"Antena #%d est\303\241 fuera del mapa\n"
.LC12:
	.string	"Result: %d\n"
.LC13:
	.string	"Time: %f\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2033:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rsi, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$72, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	cmpl	$6, %edi
	jg	.L52
	movq	(%rsi), %rcx
	movq	stderr(%rip), %rdi
	leaq	.LC6(%rip), %rdx
	movl	$2, %esi
	call	__fprintf_chk@PLT
	jmp	.L53
.L52:
	movl	%edi, %ebp
	movq	8(%rsi), %rdi
	call	atoi@PLT
	movq	16(%r14), %rdi
	movl	%eax, %r13d
	call	atoi@PLT
	movq	24(%r14), %rdi
	movl	%eax, %r12d
	call	atoi@PLT
	movq	32(%r14), %rdi
	movl	%eax, 8(%rsp)
	call	atoi@PLT
	movl	%eax, %ebx
	testl	%eax, %eax
	jle	.L54
	leal	5(%rax,%rax), %eax
	cmpl	%ebp, %eax
	je	.L55
.L54:
	leaq	.LC7(%rip), %rdx
.L71:
	movq	stderr(%rip), %rdi
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
.L53:
	orl	$-1, %eax
	jmp	.L51
.L55:
	movl	8(%rsp), %r8d
	movl	%r13d, %edx
	movl	%ebx, %r9d
	movl	%r12d, %ecx
	leaq	.LC8(%rip), %rsi
	xorl	%eax, %eax
	addq	$40, %r14
	xorl	%r15d, %r15d
	movl	$2, %edi
	call	__printf_chk@PLT
	movslq	%ebx, %rax
	salq	$3, %rax
	movq	%rax, %rdi
	movq	%rax, (%rsp)
	call	malloc@PLT
	leaq	.LC9(%rip), %rdx
	movq	%rax, %rbp
	testq	%rax, %rax
	je	.L71
.L60:
	movq	(%r14), %rdi
	call	atoi@PLT
	movq	8(%r14), %rdi
	movl	%eax, 4(%rbp,%r15,8)
	movl	%eax, 12(%rsp)
	call	atoi@PLT
	movl	12(%rsp), %ecx
	movl	%eax, 0(%rbp,%r15,8)
	movl	%ecx, %esi
	orl	%eax, %esi
	shrl	$31, %esi
	cmpl	%r13d, %eax
	setge	%al
	orb	%sil, %al
	jne	.L66
	cmpl	%r12d, %ecx
	jl	.L58
.L66:
	movq	stderr(%rip), %rdi
	movl	%r15d, %ecx
	movl	$2, %esi
	xorl	%eax, %eax
	leaq	.LC10(%rip), %rdx
	call	__fprintf_chk@PLT
	jmp	.L53
.L58:
	incq	%r15
	addq	$16, %r14
	cmpl	%r15d, %ebx
	jg	.L60
	call	clock@PLT
	movl	%r13d, %ebx
	xorl	%edi, %edi
	imull	%r12d, %ebx
	movq	%rax, %r15
	call	cudaSetDevice@PLT
	leaq	16(%rsp), %rdi
	movslq	%ebx, %rsi
	salq	$2, %rsi
	call	cudaMalloc@PLT
	movl	%ebx, %eax
	movl	$256, %esi
	xorl	%r9d, %r9d
	cltd
	movl	$16777217, %ecx
	xorl	%r8d, %r8d
	movl	$1, 48(%rsp)
	idivl	%esi
	salq	$8, %rcx
	movq	%rcx, 40(%rsp)
	movq	%rcx, %rdx
	movl	$1, %ecx
	movl	%eax, %ebx
	movabsq	$4294967297, %rax
	incl	%ebx
	movq	%rax, 28(%rsp)
	movl	32(%rsp), %esi
	movl	%ebx, 24(%rsp)
	movq	24(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L61
	movq	16(%rsp), %rdi
	movl	%r12d, %edx
	movl	%r13d, %esi
	call	_Z33__device_stub__Z11iniciarMapaPiiiPiii
.L61:
	movq	(%rsp), %r14
	addq	%rbp, %r14
.L62:
	movq	0(%rbp), %rsi
	movq	16(%rsp), %rdi
	movl	%r12d, %ecx
	movl	%r13d, %edx
	addq	$8, %rbp
	call	_Z10actualizarPi6Antenaii
	cmpq	%rbp, %r14
	jne	.L62
	movslq	%ebx, %rbx
	leaq	24(%rsp), %rdi
	salq	$2, %rbx
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
	movq	%rbx, %rsi
	leaq	40(%rsp), %rdi
	xorl	%ebx, %ebx
	call	cudaMalloc@PLT
.L64:
	movq	24(%rsp), %rdx
	movq	40(%rsp), %rsi
	movl	%r12d, %r8d
	movl	%r13d, %ecx
	movq	16(%rsp), %rdi
	call	_Z12calcular_maxPiS_S_ii
	movq	%rax, %rdx
	shrq	$32, %rax
	cmpl	%edx, 8(%rsp)
	jge	.L63
	cltd
	movq	16(%rsp), %rdi
	movl	%r12d, %ecx
	incl	%ebx
	idivl	%r12d
	salq	$32, %rdx
	orq	%rdx, %rax
	movl	%r13d, %edx
	movq	%rax, %rsi
	call	_Z10actualizarPi6Antenaii
	jmp	.L64
.L63:
	call	clock@PLT
	movq	16(%rsp), %rdi
	subq	%r15, %rax
	movq	%rax, %rbp
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	call	cudaDeviceReset@PLT
	movl	%ebx, %edx
	leaq	.LC12(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	cvtsi2sdq	%rbp, %xmm0
	divsd	.LC11(%rip), %xmm0
	movsd	%xmm0, (%rsp)
	call	__printf_chk@PLT
	movsd	(%rsp), %xmm0
	leaq	.LC13(%rip), %rsi
	movb	$1, %al
	movl	$2, %edi
	call	__printf_chk@PLT
	xorl	%eax, %eax
.L51:
	movq	56(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L65
	call	__stack_chk_fail@PLT
.L65:
	addq	$72, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2033:
	.size	main, .-main
	.section	.rodata.str1.1
.LC14:
	.string	"_Z10max_kernelILj256EEvPiS0_S0_S0_i"
.LC15:
	.string	"_Z17actualizar_kernelPi6Antenaii"
.LC16:
	.string	"_Z11iniciarMapaPiii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2065:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC14(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z10max_kernelILj256EEvPiS0_S0_S0_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC15(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z17actualizar_kernelPi6Antenaii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC16(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z11iniciarMapaPiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2065:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC11:
	.long	0
	.long	1093567616
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/**
 * Parallel computing (2015-2016 course)
 *
 * Antennas setup
 * CUDA implementation
 *
 * @author Hector Del Campo Pando
 * @author Alberto Gutierrez Perez
 */

// Includes generales
#include <stdlib.h>
#include <stdio.h>
#include <limits.h>


// Include para las utilidades de computación paralela
#include <time.h>
#include <hip/hip_runtime.h>
#include <math.h>

/**
 * Estructura antena
 */
typedef struct {
	int y;
	int x;
} Antena;

/**
 * Estructura para guardar la informacion del numero maximo global
 */
typedef struct {
	int max;
	int pos;
} Max_data;


/**
 * Macros para acceder al maximo y su posicion
 */
#define valor(m) m->max
#define pos(max) max->pos

/**
 * Macro para acceder a las posiciones del mapa
 */
#define m(y,x) mapa[ (y * cols) + x ]
#define posicion(y,x) (y * cols) + x
#define row(n)	((int)n) / cols
#define col(n)	n % cols

/**
 * Macro para la funcion manhattan
 */
#define manhattan(a, i, j) (abs(a.x -j) + abs(a.y - i)) * (abs(a.x -j) + abs(a.y - i))
#define nueva_antena(n)	{row(n), col(n)}

#define posicion_thread() (blockIdx.x + blockIdx.y * gridDim.x) * (blockDim.x * blockDim.y) + (threadIdx.x + threadIdx.y * blockDim.x)

/**
 * Macros para la reduccion
 */
#define MAX_THREADS 1024
#define NUM_THREADS_BLOCK 256
#define NUM_BLOCKS ((int)rows*cols/NUM_THREADS_BLOCK + 1)

__global__ void iniciarMapa(int *mapa, int rows, int cols){
	int posicion = posicion_thread();
	if(posicion < rows*cols)
		mapa[posicion] = INT_MAX;
}


template <unsigned int blockSize>
__global__ void max_kernel(int *entrada_max, int *entrada_pos, int *salida_max, int *salida_pos, int size){
	extern __shared__ int s[];

	unsigned int nHilos = blockDim.x;
	unsigned int id = threadIdx.x;	//id thread en bloque
	unsigned int idBloque = blockIdx.x;	//id del bloque en grid
	unsigned int posicion = id + idBloque*nHilos;	//Posicion en el mapa

	int *maximos = (int*)s;
	int *posiciones = (int*)&maximos[nHilos];

	int myMax = INT_MIN, pos = INT_MAX;

	if(entrada_pos == NULL){
		while(posicion < size){
			if(entrada_max[posicion] > myMax){
				myMax = entrada_max[posicion];
				pos = posicion;
			}
			posicion+=(nHilos*gridDim.x);
		}
	}else{
		while(posicion < size){
			if(entrada_max[posicion] > myMax){
				myMax = entrada_max[posicion];
				pos = entrada_pos[posicion];
			}
			posicion+=(nHilos*gridDim.x);
		}
	}

	maximos[id] = myMax;
	posiciones[id] = pos;
	__syncthreads();



	if(blockSize>= 1024){
		if( id < 512)
			if(maximos[id + 512] > maximos[id] || (maximos[id + 512] == maximos[id] && posiciones[id+512] < posiciones[id])){
				maximos[id] = maximos[id+512];
				posiciones[id] = posiciones[id+512];
			}
			__syncthreads();
	}
	if(blockSize>= 512){
		if( id < 256)
			if(maximos[id + 256] > maximos[id] || (maximos[id + 256] == maximos[id] && posiciones[id+256] < posiciones[id])){
				maximos[id] = maximos[id+256];
				posiciones[id] = posiciones[id+256];
			}
			__syncthreads();
	}
	if(blockSize>= 256){
		if( id < 128)
			if(maximos[id + 128] > maximos[id] || (maximos[id + 128] == maximos[id] && posiciones[id+128] < posiciones[id])){
				maximos[id] = maximos[id+128];
				posiciones[id] = posiciones[id+128];
			}			
		__syncthreads();
	}
	if(blockSize>= 128){
		if( id < 64)
			if(maximos[id + 64] > maximos[id] || (maximos[id + 64] == maximos[id] && posiciones[id+64] < posiciones[id])){
				maximos[id] = maximos[id+64];
				posiciones[id] = posiciones[id+64];
			}
			__syncthreads();
	}

	if(id < 32){
		if(blockSize>= 64){	if((maximos[id + 32] > maximos[id] || (maximos[id + 32] == maximos[id] && posiciones[id+32] < posiciones[id]))){maximos[id] = maximos[id+32]; posiciones[id] = posiciones[id+32];}}
		if(blockSize>=32){	if((maximos[id + 16] > maximos[id] || (maximos[id + 16] == maximos[id] && posiciones[id+16] < posiciones[id]))){maximos[id] = maximos[id+16]; posiciones[id] = posiciones[id+16];}}
		if(blockSize>=16){	if((maximos[id + 8] > maximos[id] || (maximos[id + 8] == maximos[id] && posiciones[id+8] < posiciones[id]))){maximos[id] = maximos[id+8]; posiciones[id] = posiciones[id+8];}}
		if(blockSize>=8){	if((maximos[id + 4] > maximos[id] || (maximos[id + 4] == maximos[id] && posiciones[id+4] < posiciones[id]))){maximos[id] = maximos[id+4]; posiciones[id] = posiciones[id+4];}}
		if(blockSize>=4){	if((maximos[id + 2] > maximos[id] || (maximos[id + 2] == maximos[id] && posiciones[id+2] < posiciones[id]))){maximos[id] = maximos[id+2]; posiciones[id] = posiciones[id+2];}}
		if(blockSize>=2){	if((maximos[id + 1] > maximos[id] || (maximos[id + 1] == maximos[id] && posiciones[id+1] < posiciones[id]))){maximos[id] = maximos[id+1]; posiciones[id] = posiciones[id+1];}}
	}

	if(id == 0){
		salida_max[idBloque] = maximos[0];
		salida_pos[idBloque] = posiciones[0];
	}

}

__global__ void actualizar_kernel( int *mapa, Antena antena, int rows, int cols){
	m(antena.y, antena.x) = 0;
	int nuevadist;
	unsigned int desplHor = threadIdx.x + blockIdx.x*blockDim.x;
	unsigned int desplVer = threadIdx.y + blockIdx.y*blockDim.y;
	int j;

	for(int i = antena.y - desplVer; i >= 0; i-=blockDim.y){
		j = antena.x + desplHor;
		nuevadist = manhattan(antena,i,j);
		if(nuevadist > m(i,j))	break;
		for(; j < cols; j+=blockDim.x){
			nuevadist = manhattan(antena,i,j);
			if(nuevadist > m(i,j))	break;
			m(i,j) = nuevadist;
		}
	}

	for(int i = antena.y + desplVer; i < rows; i+=blockDim.y){
		j = antena.x - desplHor;
		nuevadist = manhattan(antena,i,j);
		if(nuevadist > m(i,j))	break;
		for(; j >= 0; j-=blockDim.x){
			nuevadist = manhattan(antena,i,j);
			if(nuevadist > m(i,j))	break;
			m(i,j) = nuevadist;
		}
	}

	for(int i = antena.y + desplVer; i < rows; i+=blockDim.y){
		j = antena.x + desplHor;
		nuevadist = manhattan(antena,i,j);
		if(nuevadist > m(i,j))	break;
		for(; j < cols; j+=blockDim.x){
			nuevadist = manhattan(antena,i,j);
			if(nuevadist > m(i,j))	break;
			m(i,j) = nuevadist;
		}
	}

	for(int i = antena.y - desplVer; i >= 0; i-=blockDim.y){
		j = antena.x - desplHor;
		nuevadist = manhattan(antena,i,j);
		if(nuevadist > m(i,j))	break;
		for(; j >= 0; j-=blockDim.x){
			nuevadist = manhattan(antena,i,j);
			if(nuevadist > m(i,j))	break;
			m(i,j) = nuevadist;
		}
	}
}

/**
 * Función de ayuda para imprimir el mapa
 */
void print_mapa(int * mapa, int rows, int cols, Antena * a){


	if(rows > 50 || cols > 30){
		printf("Mapa muy grande para imprimir\n");
		return;
	};

	#define ANSI_COLOR_RED     "\x1b[31m"
	#define ANSI_COLOR_GREEN   "\x1b[32m"
	#define ANSI_COLOR_RESET   "\x1b[0m"

	printf("Mapa [%d,%d]\n",rows,cols);
	for(int i=0; i<rows; i++){
		for(int j=0; j<cols; j++){

			int val = m(i,j);

			if(val == 0){
				if(a != NULL && a->x == j && a->y == i){
					printf( ANSI_COLOR_RED "   A"  ANSI_COLOR_RESET);
				} else { 
					printf( ANSI_COLOR_GREEN "   A"  ANSI_COLOR_RESET);
				}
			} else {
				printf("%4d",val);
			}
		}
		printf("\n");
	}
	printf("\n");
}

/**
 * Funcion depuracion para CUDA
 */
void print_mapa_cuda(int *mapa, int rows, int cols){
		int *m = (int*)malloc(sizeof(int)*rows*cols);
		hipMemcpy(m, mapa, sizeof(int)*rows*cols, hipMemcpyDeviceToHost);
		print_mapa(m,rows,cols,NULL);
		free(m);
		getchar();
}

/**
 * Actualizar el mapa con la nueva antena
 */
void actualizar(int *mapa, Antena antena, int rows, int cols){
	dim3 hilos(6,6);
	dim3 bloques(32);
	actualizar_kernel<<<bloques, hilos>>>(mapa,antena,rows,cols);
}



/**
 * Calcular la distancia máxima en el mapa
 */
Max_data calcular_max(int * mapa, int *maximos, int *posiciones, int rows, int cols){
	int posicion;
	int maximo;
	int aux = NUM_BLOCKS, nBloques = NUM_BLOCKS;

	//reduccion por bloques
	max_kernel<NUM_THREADS_BLOCK><<<nBloques, NUM_THREADS_BLOCK, sizeof(int)*NUM_THREADS_BLOCK*2>>>(mapa, NULL, maximos, posiciones,rows*cols);

	//reduccion de los bloques
	nBloques = (nBloques - 1)/NUM_THREADS_BLOCK + 1;

	while(aux != 1){
		max_kernel<NUM_THREADS_BLOCK><<<nBloques, NUM_THREADS_BLOCK, sizeof(int)*2*NUM_THREADS_BLOCK>>>(maximos, posiciones, maximos, posiciones, aux);
		aux = nBloques;
		nBloques = (nBloques - 1)/NUM_THREADS_BLOCK + 1;
	}
	//Fin reduccion bloques

	hipMemcpy(&maximo, &maximos[0], sizeof(int), hipMemcpyDeviceToHost);
	hipMemcpy(&posicion, &posiciones[0], sizeof(int), hipMemcpyDeviceToHost);

	Max_data max_global = {maximo, posicion};
	return max_global;
}


/**
 * Función principal
 */
int main(int nargs, char ** vargs){

	//
	// 1. LEER DATOS DE ENTRADA
	//

	// Comprobar número de argumentos
	if(nargs < 7){
		fprintf(stderr,"Uso: %s rows cols distMax nAntenas x0 y0 [x1 y1, ...]\n",vargs[0]);
		return -1;
	}

	// Leer los argumentos de entrada
	int rows = atoi(vargs[1]);
	int cols = atoi(vargs[2]);
	int distMax = atoi(vargs[3]);
	int nAntenas = atoi(vargs[4]);

	if(nAntenas<1 || nargs != (nAntenas*2+5)){
		fprintf(stderr,"Error en la lista de antenas\n");
		return -1;
	}


	// Mensaje
	printf("Calculando el número de antenas necesarias para cubrir un mapa de"
	   " (%d x %d)\ncon una distancia máxima no superior a %d "
	   "y con %d antenas iniciales\n\n",rows,cols,distMax,nAntenas);

	// Reservar memoria para las antenas
	Antena *antenas = (Antena*)malloc(sizeof(Antena) * (size_t) nAntenas);
	if(!antenas){
		fprintf(stderr,"Error al reservar memoria para las antenas inicales\n");
		return -1;
	}	
	
	// Leer antenas
	for(int i=0; i<nAntenas; i++){
		antenas[i].x = atoi(vargs[5+i*2]);
		antenas[i].y = atoi(vargs[6+i*2]);

		if(antenas[i].y<0 || antenas[i].y>=rows || antenas[i].x<0 || antenas[i].x>=cols ){
			fprintf(stderr,"Antena #%d está fuera del mapa\n",i);
			return -1;
		}
	}


	//
	// 2. INICIACIÓN
	//

	// Medir el tiempo
	clock_t reloj = clock();
	double tiempo;
	hipSetDevice(0);

	// Crear el mapa
	int * mapa;
	hipMalloc((void**) &mapa , (rows*cols) * sizeof(int) );

	// Iniciar el mapa con el valor MAX INT
	iniciarMapa<<<NUM_BLOCKS, NUM_THREADS_BLOCK>>>(mapa,rows,cols);

	// Colocar las antenas iniciales
	for(int i=0; i<nAntenas; i++){
		actualizar(mapa, antenas[i], rows, cols);
	}

	// Debug
#ifdef DEBUG
	print_mapa(mapa,rows,cols,NULL);
#endif


	//
	// 3. CALCULO DE LAS NUEVAS ANTENAS
	//

	// Contador de antenas
	int nuevas = 0;
	Max_data max;

	// Variables para CUDA
	int nBloques = NUM_BLOCKS;
	
	int *posiciones;
	int *maximos;
	hipMalloc((void**) &posiciones, nBloques * sizeof(int));
	hipMalloc((void**) &maximos, nBloques * sizeof(int));

	while(1){

		// Calcular el máximo
		max = calcular_max(mapa,maximos,posiciones,rows,cols);

		// Salimos si ya hemos cumplido el maximo
		if (max.max <= distMax) break;	

		// Incrementamos el contador
		nuevas++;
		
		// Calculo de la nueva antena y actualización del mapa
		Antena antena = nueva_antena(max.pos);
		actualizar(mapa,antena,rows,cols);

	}

	reloj = clock() - reloj;

	// Debug
#ifdef DEBUG
	print_mapa(mapa,rows,cols,NULL);
#endif
	
	//Liberar recursos en el host
	hipFree(mapa);
	hipFree(posiciones);
	hipFree(maximos);

	hipDeviceReset();

	//
	// 4. MOSTRAR RESULTADOS
	//

	// tiempo
	tiempo = (double)reloj / CLOCKS_PER_SEC ;

	// Salida
	printf("Result: %d\n",nuevas);
	printf("Time: %f\n",tiempo);


	return 0;
}





	.text
	.file	"antenas.hip"
	.globl	_Z26__device_stub__iniciarMapaPiii # -- Begin function _Z26__device_stub__iniciarMapaPiii
	.type	_Z26__device_stub__iniciarMapaPiii,@function
_Z26__device_stub__iniciarMapaPiii:     # @_Z26__device_stub__iniciarMapaPiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$96, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rcx
	movl	%esi, (%rcx)
	movq	%rsp, %rsi
	movl	%edx, (%rsi)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11iniciarMapaPiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$112, %rsp
	.cfi_adjust_cfa_offset -112
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z26__device_stub__iniciarMapaPiii, .Lfunc_end0-_Z26__device_stub__iniciarMapaPiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z32__device_stub__actualizar_kernelPi6Antenaii # -- Begin function _Z32__device_stub__actualizar_kernelPi6Antenaii
	.type	_Z32__device_stub__actualizar_kernelPi6Antenaii,@function
_Z32__device_stub__actualizar_kernelPi6Antenaii: # @_Z32__device_stub__actualizar_kernelPi6Antenaii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rsi, (%rax)
	leaq	32(%rsp), %rsi
	movq	%rdi, (%rsi)
	leaq	12(%rsp), %rdi
	movl	%edx, (%rdi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rsi, (%rbx)
	movq	%rax, 8(%rbx)
	movq	%rdi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17actualizar_kernelPi6Antenaii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z32__device_stub__actualizar_kernelPi6Antenaii, .Lfunc_end1-_Z32__device_stub__actualizar_kernelPi6Antenaii
	.cfi_endproc
                                        # -- End function
	.globl	_Z10print_mapaPiiiP6Antena      # -- Begin function _Z10print_mapaPiiiP6Antena
	.type	_Z10print_mapaPiiiP6Antena,@function
_Z10print_mapaPiiiP6Antena:             # @_Z10print_mapaPiiiP6Antena
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdi, 8(%rsp)                   # 8-byte Spill
	cmpl	$50, %esi
	jg	.LBB2_17
# %bb.1:
	movl	%edx, %ebp
	cmpl	$31, %edx
	jge	.LBB2_17
# %bb.2:
	movq	%rcx, %rbx
	movl	%esi, %r15d
	movl	$.L.str.1, %edi
	movl	%ebp, %edx
	xorl	%eax, %eax
	callq	printf
	testl	%r15d, %r15d
	jle	.LBB2_13
# %bb.3:                                # %.preheader.lr.ph
	movl	%r15d, %eax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movl	%ebp, %r12d
	xorl	%r13d, %r13d
	xorl	%r14d, %r14d
	movl	%ebp, 4(%rsp)                   # 4-byte Spill
.LBB2_4:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_6 Depth 2
	testl	%ebp, %ebp
	jle	.LBB2_12
# %bb.5:                                # %.lr.ph
                                        #   in Loop: Header=BB2_4 Depth=1
	movl	%r13d, %eax
	movq	8(%rsp), %rcx                   # 8-byte Reload
	leaq	(%rcx,%rax,4), %r15
	xorl	%ebp, %ebp
.LBB2_6:                                #   Parent Loop BB2_4 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%r15,%rbp,4), %esi
	testl	%esi, %esi
	je	.LBB2_7
# %bb.15:                               #   in Loop: Header=BB2_6 Depth=2
	movl	$.L.str.4, %edi
	xorl	%eax, %eax
	callq	printf
	jmp	.LBB2_16
.LBB2_7:                                #   in Loop: Header=BB2_6 Depth=2
	testq	%rbx, %rbx
	je	.LBB2_14
# %bb.8:                                #   in Loop: Header=BB2_6 Depth=2
	movl	4(%rbx), %eax
	cmpq	%rax, %rbp
	jne	.LBB2_14
# %bb.9:                                #   in Loop: Header=BB2_6 Depth=2
	movl	(%rbx), %eax
	cmpq	%rax, %r14
	jne	.LBB2_14
# %bb.10:                               #   in Loop: Header=BB2_6 Depth=2
	movl	$.L.str.2, %edi
	jmp	.LBB2_11
.LBB2_14:                               #   in Loop: Header=BB2_6 Depth=2
	movl	$.L.str.3, %edi
.LBB2_11:                               #   in Loop: Header=BB2_6 Depth=2
	xorl	%eax, %eax
	callq	printf
.LBB2_16:                               #   in Loop: Header=BB2_6 Depth=2
	incq	%rbp
	cmpq	%rbp, %r12
	jne	.LBB2_6
.LBB2_12:                               # %._crit_edge
                                        #   in Loop: Header=BB2_4 Depth=1
	movl	$10, %edi
	callq	putchar@PLT
	incq	%r14
	movl	4(%rsp), %ebp                   # 4-byte Reload
	addl	%ebp, %r13d
	cmpq	16(%rsp), %r14                  # 8-byte Folded Reload
	jne	.LBB2_4
.LBB2_13:                               # %._crit_edge30
	movl	$10, %edi
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	putchar@PLT                     # TAILCALL
.LBB2_17:
	.cfi_def_cfa_offset 80
	movl	$.Lstr, %edi
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	puts@PLT                        # TAILCALL
.Lfunc_end2:
	.size	_Z10print_mapaPiiiP6Antena, .Lfunc_end2-_Z10print_mapaPiiiP6Antena
	.cfi_endproc
                                        # -- End function
	.globl	_Z15print_mapa_cudaPiii         # -- Begin function _Z15print_mapa_cudaPiii
	.type	_Z15print_mapa_cudaPiii,@function
_Z15print_mapa_cudaPiii:                # @_Z15print_mapa_cudaPiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdi, %rbx
	movslq	%esi, %r14
	movslq	%edx, %r15
	movq	%r14, %r12
	imulq	%r15, %r12
	shlq	$2, %r12
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, %r13
	movq	%rax, %rdi
	movq	%rbx, %rsi
	movq	%r12, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	%r13, %rdi
	movl	%r14d, %esi
	movl	%r15d, %edx
	xorl	%ecx, %ecx
	callq	_Z10print_mapaPiiiP6Antena
	movq	%r13, %rdi
	callq	free
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	getchar                         # TAILCALL
.Lfunc_end3:
	.size	_Z15print_mapa_cudaPiii, .Lfunc_end3-_Z15print_mapa_cudaPiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z10actualizarPi6Antenaii       # -- Begin function _Z10actualizarPi6Antenaii
	.type	_Z10actualizarPi6Antenaii,@function
_Z10actualizarPi6Antenaii:              # @_Z10actualizarPi6Antenaii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%ecx, %ebx
	movl	%edx, %ebp
	movq	%rsi, %r14
	movq	%rdi, %r15
	movabsq	$4294967328, %rdi               # imm = 0x100000020
	movabsq	$25769803782, %rdx              # imm = 0x600000006
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	je	.LBB4_2
# %bb.1:
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB4_2:
	.cfi_def_cfa_offset 48
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	%ebp, %edx
	movl	%ebx, %ecx
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z32__device_stub__actualizar_kernelPi6Antenaii # TAILCALL
.Lfunc_end4:
	.size	_Z10actualizarPi6Antenaii, .Lfunc_end4-_Z10actualizarPi6Antenaii
	.cfi_endproc
                                        # -- End function
	.globl	_Z12calcular_maxPiS_S_ii        # -- Begin function _Z12calcular_maxPiS_S_ii
	.type	_Z12calcular_maxPiS_S_ii,@function
_Z12calcular_maxPiS_S_ii:               # @_Z12calcular_maxPiS_S_ii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%ecx, %r15d
	movq	%rdx, %rbx
	movq	%rsi, %r14
	movq	%rdi, %rbp
	movabsq	$4294967296, %rax               # imm = 0x100000000
	imull	%r8d, %r15d
	leal	255(%r15), %r13d
	testl	%r15d, %r15d
	movl	%r15d, %r12d
	cmovsl	%r13d, %r12d
	sarl	$8, %r12d
	incl	%r12d
	movq	%r12, %rdi
	btsq	$32, %rdi
	leaq	256(%rax), %rdx
	movl	$2048, %r8d                     # imm = 0x800
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_2
# %bb.1:
	movq	%rbp, %rdi
	xorl	%esi, %esi
	movq	%r14, %rdx
	movq	%rbx, %rcx
	movl	%r15d, %r8d
	callq	_Z25__device_stub__max_kernelILj256EEvPiS0_S0_S0_i
.LBB5_2:
	cmpl	$511, %r13d                     # imm = 0x1FF
	jb	.LBB5_7
# %bb.3:                                # %.lr.ph.preheader
	leal	65535(%r15), %r13d
	testl	%r15d, %r15d
	cmovnsl	%r15d, %r13d
	sarl	$16, %r13d
	movabsq	$4294967296, %rax               # imm = 0x100000000
	leaq	256(%rax), %rbp
.LBB5_4:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	leal	1(%r13), %r15d
	movq	%r15, %rdi
	movabsq	$4294967296, %rax               # imm = 0x100000000
	orq	%rax, %rdi
	movl	$2048, %r8d                     # imm = 0x800
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_6
# %bb.5:                                #   in Loop: Header=BB5_4 Depth=1
	movq	%r14, %rdi
	movq	%rbx, %rsi
	movq	%r14, %rdx
	movq	%rbx, %rcx
	movl	%r12d, %r8d
	callq	_Z25__device_stub__max_kernelILj256EEvPiS0_S0_S0_i
.LBB5_6:                                #   in Loop: Header=BB5_4 Depth=1
	leal	255(%r13), %eax
	testl	%r13d, %r13d
	cmovnsl	%r13d, %eax
	sarl	$8, %eax
	movl	%r15d, %r12d
	testl	%r13d, %r13d
	movl	%eax, %r13d
	jne	.LBB5_4
.LBB5_7:                                # %._crit_edge
	movq	%rsp, %r15
	movl	$4, %edx
	movq	%r15, %rdi
	movq	%r14, %rsi
	movl	$2, %ecx
	callq	hipMemcpy
	leaq	4(%rsp), %r14
	movl	$4, %edx
	movq	%r14, %rdi
	movq	%rbx, %rsi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	(%r15), %ecx
	movl	(%r14), %eax
	shlq	$32, %rax
	orq	%rcx, %rax
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z12calcular_maxPiS_S_ii, .Lfunc_end5-_Z12calcular_maxPiS_S_ii
	.cfi_endproc
                                        # -- End function
	.section	.text._Z25__device_stub__max_kernelILj256EEvPiS0_S0_S0_i,"axG",@progbits,_Z25__device_stub__max_kernelILj256EEvPiS0_S0_S0_i,comdat
	.weak	_Z25__device_stub__max_kernelILj256EEvPiS0_S0_S0_i # -- Begin function _Z25__device_stub__max_kernelILj256EEvPiS0_S0_S0_i
	.type	_Z25__device_stub__max_kernelILj256EEvPiS0_S0_S0_i,@function
_Z25__device_stub__max_kernelILj256EEvPiS0_S0_S0_i: # @_Z25__device_stub__max_kernelILj256EEvPiS0_S0_S0_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10max_kernelILj256EEvPiS0_S0_S0_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z25__device_stub__max_kernelILj256EEvPiS0_S0_S0_i, .Lfunc_end6-_Z25__device_stub__max_kernelILj256EEvPiS0_S0_S0_i
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI7_0:
	.quad	0x412e848000000000              # double 1.0E+6
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %r15
	cmpl	$6, %edi
	jle	.LBB7_21
# %bb.1:
	movl	%edi, %r12d
	movq	8(%r15), %rdi
	callq	atoi
	movl	%eax, %r14d
	movq	16(%r15), %rdi
	callq	atoi
	movl	%eax, %ebp
	movq	24(%r15), %rdi
	callq	atoi
	movl	%eax, 20(%rsp)                  # 4-byte Spill
	movq	32(%r15), %rdi
	callq	atoi
	testl	%eax, %eax
	jle	.LBB7_19
# %bb.2:
	movl	%eax, %ebx
	leal	5(,%rbx,2), %eax
	cmpl	%r12d, %eax
	jne	.LBB7_19
# %bb.3:
	movl	$.L.str.8, %edi
	movl	%r14d, %esi
	movl	%ebp, %edx
	movl	20(%rsp), %ecx                  # 4-byte Reload
	movl	%ebx, %r8d
	xorl	%eax, %eax
	callq	printf
	movq	%rbx, 48(%rsp)                  # 8-byte Spill
	movl	%ebx, %ebx
	leaq	(,%rbx,8), %rdi
	callq	malloc
	testq	%rax, %rax
	je	.LBB7_22
# %bb.4:                                # %.lr.ph.preheader
	movq	%rax, %r13
	movl	%r14d, (%rsp)                   # 4-byte Spill
	addq	$48, %r15
	xorl	%r12d, %r12d
.LBB7_5:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movq	-8(%r15), %rdi
	callq	atoi
	movl	%eax, %r14d
	movl	%eax, 4(%r13,%r12,8)
	movq	(%r15), %rdi
	callq	atoi
	movl	%eax, (%r13,%r12,8)
	testl	%eax, %eax
	js	.LBB7_20
# %bb.6:                                # %.lr.ph
                                        #   in Loop: Header=BB7_5 Depth=1
	cmpl	(%rsp), %eax                    # 4-byte Folded Reload
	jge	.LBB7_20
# %bb.7:                                #   in Loop: Header=BB7_5 Depth=1
	testl	%r14d, %r14d
	js	.LBB7_20
# %bb.8:                                #   in Loop: Header=BB7_5 Depth=1
	cmpl	%ebp, %r14d
	jge	.LBB7_20
# %bb.9:                                #   in Loop: Header=BB7_5 Depth=1
	incq	%r12
	addq	$16, %r15
	cmpq	%r12, %rbx
	jne	.LBB7_5
# %bb.10:                               # %._crit_edge
	callq	clock
	movq	%rax, 40(%rsp)                  # 8-byte Spill
	xorl	%edi, %edi
	callq	hipSetDevice
	movl	%ebp, %eax
	imull	(%rsp), %eax                    # 4-byte Folded Reload
	movslq	%eax, %rbx
	leaq	(,%rbx,4), %rsi
	leaq	8(%rsp), %rdi
	callq	hipMalloc
	leal	255(%rbx), %r14d
	testl	%ebx, %ebx
	cmovnsl	%ebx, %r14d
	sarl	$8, %r14d
	incl	%r14d
	movq	%r14, %rdi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$256, %rdx                      # imm = 0x100
	movl	$1, %ebx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_12
# %bb.11:
	movq	8(%rsp), %rdi
	movl	(%rsp), %esi                    # 4-byte Reload
	movl	%ebp, %edx
	callq	_Z26__device_stub__iniciarMapaPiii
.LBB7_12:                               # %.lr.ph101.preheader
	movq	48(%rsp), %rax                  # 8-byte Reload
	cmpl	$2, %eax
	cmovgel	%eax, %ebx
	xorl	%r12d, %r12d
	movl	(%rsp), %r15d                   # 4-byte Reload
.LBB7_13:                               # %.lr.ph101
                                        # =>This Inner Loop Header: Depth=1
	movq	8(%rsp), %rdi
	movq	(%r13,%r12,8), %rsi
	movl	%r15d, %edx
	movl	%ebp, %ecx
	callq	_Z10actualizarPi6Antenaii
	incq	%r12
	cmpq	%r12, %rbx
	jne	.LBB7_13
# %bb.14:                               # %._crit_edge102
	movslq	%r14d, %r14
	shlq	$2, %r14
	leaq	32(%rsp), %r12
	movq	%r12, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	leaq	24(%rsp), %r13
	movq	%r13, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movq	8(%rsp), %rdi
	movq	(%r13), %rsi
	movq	(%r12), %rdx
	movl	%r15d, %ecx
	movl	%ebp, %r8d
	callq	_Z12calcular_maxPiS_S_ii
	xorl	%r12d, %r12d
	movl	$0, %r13d
	movl	20(%rsp), %r14d                 # 4-byte Reload
	cmpl	%eax, %r14d
	jge	.LBB7_17
# %bb.15:                               # %.lr.ph107.preheader
	xorl	%r13d, %r13d
.LBB7_16:                               # %.lr.ph107
                                        # =>This Inner Loop Header: Depth=1
	shrq	$32, %rax
                                        # kill: def $eax killed $eax killed $rax
	cltd
	idivl	%ebp
                                        # kill: def $eax killed $eax def $rax
                                        # kill: def $edx killed $edx def $rdx
	incl	%r13d
	movq	8(%rsp), %rdi
	shlq	$32, %rdx
	leaq	(%rax,%rdx), %rsi
	movl	%r15d, %edx
	movl	%ebp, %ecx
	callq	_Z10actualizarPi6Antenaii
	movq	8(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	32(%rsp), %rdx
	movl	%r15d, %ecx
	movl	%ebp, %r8d
	callq	_Z12calcular_maxPiS_S_ii
	cmpl	%eax, %r14d
	jl	.LBB7_16
.LBB7_17:                               # %._crit_edge108
	callq	clock
	movq	%rax, %rbx
	subq	40(%rsp), %rbx                  # 8-byte Folded Reload
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	callq	hipDeviceReset
	cvtsi2sd	%rbx, %xmm0
	divsd	.LCPI7_0(%rip), %xmm0
	movsd	%xmm0, (%rsp)                   # 8-byte Spill
	movl	$.L.str.11, %edi
	movl	%r13d, %esi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.12, %edi
	movsd	(%rsp), %xmm0                   # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movb	$1, %al
	callq	printf
	jmp	.LBB7_18
.LBB7_19:
	movq	stderr(%rip), %rcx
	movl	$.L.str.7, %edi
	movl	$29, %esi
	jmp	.LBB7_23
.LBB7_20:                               # %.thread
	movq	stderr(%rip), %rdi
	movl	$.L.str.10, %esi
	movl	%r12d, %edx
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB7_24
.LBB7_21:
	movq	stderr(%rip), %rdi
	movq	(%r15), %rdx
	movl	$.L.str.6, %esi
	xorl	%eax, %eax
	callq	fprintf
	jmp	.LBB7_24
.LBB7_22:
	movq	stderr(%rip), %rcx
	movl	$.L.str.9, %edi
	movl	$52, %esi
.LBB7_23:
	movl	$1, %edx
	callq	fwrite@PLT
.LBB7_24:
	movl	$-1, %r12d
.LBB7_18:
	movl	%r12d, %eax
	addq	$56, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	main, .Lfunc_end7-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB8_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB8_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11iniciarMapaPiii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17actualizar_kernelPi6Antenaii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10max_kernelILj256EEvPiS0_S0_S0_i, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end8:
	.size	__hip_module_ctor, .Lfunc_end8-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB9_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB9_2:
	retq
.Lfunc_end9:
	.size	__hip_module_dtor, .Lfunc_end9-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z11iniciarMapaPiii,@object     # @_Z11iniciarMapaPiii
	.section	.rodata,"a",@progbits
	.globl	_Z11iniciarMapaPiii
	.p2align	3, 0x0
_Z11iniciarMapaPiii:
	.quad	_Z26__device_stub__iniciarMapaPiii
	.size	_Z11iniciarMapaPiii, 8

	.type	_Z17actualizar_kernelPi6Antenaii,@object # @_Z17actualizar_kernelPi6Antenaii
	.globl	_Z17actualizar_kernelPi6Antenaii
	.p2align	3, 0x0
_Z17actualizar_kernelPi6Antenaii:
	.quad	_Z32__device_stub__actualizar_kernelPi6Antenaii
	.size	_Z17actualizar_kernelPi6Antenaii, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"Mapa [%d,%d]\n"
	.size	.L.str.1, 14

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"\033[31m   A\033[0m"
	.size	.L.str.2, 14

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"\033[32m   A\033[0m"
	.size	.L.str.3, 14

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"%4d"
	.size	.L.str.4, 4

	.type	_Z10max_kernelILj256EEvPiS0_S0_S0_i,@object # @_Z10max_kernelILj256EEvPiS0_S0_S0_i
	.section	.rodata._Z10max_kernelILj256EEvPiS0_S0_S0_i,"aG",@progbits,_Z10max_kernelILj256EEvPiS0_S0_S0_i,comdat
	.weak	_Z10max_kernelILj256EEvPiS0_S0_S0_i
	.p2align	3, 0x0
_Z10max_kernelILj256EEvPiS0_S0_S0_i:
	.quad	_Z25__device_stub__max_kernelILj256EEvPiS0_S0_S0_i
	.size	_Z10max_kernelILj256EEvPiS0_S0_S0_i, 8

	.type	.L.str.6,@object                # @.str.6
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.6:
	.asciz	"Uso: %s rows cols distMax nAntenas x0 y0 [x1 y1, ...]\n"
	.size	.L.str.6, 55

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"Error en la lista de antenas\n"
	.size	.L.str.7, 30

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"Calculando el n\303\272mero de antenas necesarias para cubrir un mapa de (%d x %d)\ncon una distancia m\303\241xima no superior a %d y con %d antenas iniciales\n\n"
	.size	.L.str.8, 149

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"Error al reservar memoria para las antenas inicales\n"
	.size	.L.str.9, 53

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"Antena #%d est\303\241 fuera del mapa\n"
	.size	.L.str.10, 33

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"Result: %d\n"
	.size	.L.str.11, 12

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"Time: %f\n"
	.size	.L.str.12, 10

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z11iniciarMapaPiii"
	.size	.L__unnamed_1, 20

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z17actualizar_kernelPi6Antenaii"
	.size	.L__unnamed_2, 33

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z10max_kernelILj256EEvPiS0_S0_S0_i"
	.size	.L__unnamed_3, 36

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Mapa muy grande para imprimir"
	.size	.Lstr, 30

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z26__device_stub__iniciarMapaPiii
	.addrsig_sym _Z32__device_stub__actualizar_kernelPi6Antenaii
	.addrsig_sym _Z25__device_stub__max_kernelILj256EEvPiS0_S0_S0_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z11iniciarMapaPiii
	.addrsig_sym _Z17actualizar_kernelPi6Antenaii
	.addrsig_sym _Z10max_kernelILj256EEvPiS0_S0_S0_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z11iniciarMapaPiii     ; -- Begin function _Z11iniciarMapaPiii
	.globl	_Z11iniciarMapaPiii
	.p2align	8
	.type	_Z11iniciarMapaPiii,@function
_Z11iniciarMapaPiii:                    ; @_Z11iniciarMapaPiii
; %bb.0:
	s_clause 0x2
	s_load_b32 s4, s[0:1], 0x10
	s_load_b32 s5, s[0:1], 0x1c
	s_load_b64 s[2:3], s[0:1], 0x8
	v_bfe_u32 v1, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s4, s4, s15
	s_lshr_b32 s6, s5, 16
	s_add_i32 s4, s4, s14
	s_mul_i32 s2, s3, s2
	v_mad_u64_u32 v[2:3], null, s4, s6, v[1:2]
	v_and_b32_e32 v3, 0x3ff, v0
	s_and_b32 s4, s5, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, v2, s4, v[3:4]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_i32_e32 vcc_lo, s2, v0
	s_and_saveexec_b32 s2, vcc_lo
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b64 s[0:1], s[0:1], 0x0
	v_ashrrev_i32_e32 v1, 31, v0
	v_bfrev_b32_e32 v2, -2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11iniciarMapaPiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 5
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z11iniciarMapaPiii, .Lfunc_end0-_Z11iniciarMapaPiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 176
; NumSgprs: 18
; NumVgprs: 5
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 5
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z17actualizar_kernelPi6Antenaii ; -- Begin function _Z17actualizar_kernelPi6Antenaii
	.globl	_Z17actualizar_kernelPi6Antenaii
	.p2align	8
	.type	_Z17actualizar_kernelPi6Antenaii,@function
_Z17actualizar_kernelPi6Antenaii:       ; @_Z17actualizar_kernelPi6Antenaii
; %bb.0:
	s_clause 0x2
	s_load_b128 s[4:7], s[0:1], 0x8
	s_load_b64 s[2:3], s[0:1], 0x0
	s_load_b32 s9, s[0:1], 0x24
	v_and_b32_e32 v4, 0x3ff, v0
	v_bfe_u32 v0, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s0, s4, s7
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s0, s0, s5
	s_ashr_i32 s1, s0, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[0:1], 2
	s_add_u32 s0, s2, s0
	s_addc_u32 s1, s3, s1
	s_lshr_b32 s8, s9, 16
	s_and_b32 s9, s9, 0xffff
	v_mad_u64_u32 v[2:3], null, s15, s8, v[0:1]
	v_mov_b32_e32 v3, 0
	v_mad_u64_u32 v[0:1], null, s14, s9, v[4:5]
	s_mul_i32 s10, s7, s8
	global_store_b32 v3, v3, s[0:1]
	v_sub_nc_u32_e32 v5, s4, v2
	v_sub_nc_u32_e32 v8, 0, v0
	v_add_nc_u32_e32 v1, s5, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_mul_lo_u32 v6, s7, v5
	v_cmp_lt_i32_e32 vcc_lo, -1, v5
	v_max_i32_e32 v7, v0, v8
	s_and_saveexec_b32 s11, vcc_lo
	s_cbranch_execz .LBB1_10
; %bb.1:                                ; %.lr.ph186
	v_mul_lo_u32 v9, s7, v5
	v_cmp_gt_i32_e64 s0, s7, v1
	v_sub_nc_u32_e32 v10, 0, v0
	v_mov_b32_e32 v11, v5
	s_mov_b32 s12, 0
                                        ; implicit-def: $sgpr13
.LBB1_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_5 Depth 2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, v11, s7, v[1:2]
	s_or_b32 s13, s13, exec_lo
	s_mov_b32 s14, exec_lo
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s1, s2, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s1, s3, v4, s1
	global_load_b32 v3, v[3:4], off
	v_sub_nc_u32_e32 v4, s4, v11
	v_sub_nc_u32_e32 v12, 0, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_i32_e32 v12, v4, v12
	v_add_nc_u32_e32 v4, v12, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v4, v4, v4
	s_waitcnt vmcnt(0)
	v_cmpx_le_i32_e64 v4, v3
	s_cbranch_execz .LBB1_9
; %bb.3:                                ; %.preheader181
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_and_saveexec_b32 s15, s0
	s_cbranch_execz .LBB1_8
; %bb.4:                                ; %.lr.ph.preheader
                                        ;   in Loop: Header=BB1_2 Depth=1
	v_dual_mov_b32 v13, v10 :: v_dual_mov_b32 v14, v1
	s_mov_b32 s16, 0
                                        ; implicit-def: $sgpr17
.LBB1_5:                                ; %.lr.ph
                                        ;   Parent Loop BB1_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v9, v14
	v_sub_nc_u32_e32 v15, 0, v13
	s_or_b32 s17, s17, exec_lo
	s_mov_b32 s18, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v4, 31, v3
	v_max_i32_e32 v15, v13, v15
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_nc_u32_e32 v15, v15, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v15, v15, v15
	v_add_co_u32 v3, s1, s2, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s1, s3, v4, s1
	global_load_b32 v16, v[3:4], off
	s_waitcnt vmcnt(0)
	v_cmpx_le_i32_e64 v15, v16
	s_cbranch_execz .LBB1_7
; %bb.6:                                ;   in Loop: Header=BB1_5 Depth=2
	v_add_nc_u32_e32 v14, s9, v14
	v_subrev_nc_u32_e32 v13, s9, v13
	s_and_not1_b32 s17, s17, exec_lo
	global_store_b32 v[3:4], v15, off
	v_cmp_le_i32_e64 s1, s7, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, s1, exec_lo
	s_or_b32 s17, s17, s1
.LBB1_7:                                ; %Flow263
                                        ;   in Loop: Header=BB1_5 Depth=2
	s_or_b32 exec_lo, exec_lo, s18
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, exec_lo, s17
	s_or_b32 s16, s1, s16
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s16
	s_cbranch_execnz .LBB1_5
.LBB1_8:                                ; %Flow265
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s15
	v_subrev_nc_u32_e32 v11, s8, v11
	v_subrev_nc_u32_e32 v9, s10, v9
	s_and_not1_b32 s13, s13, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s1, 0, v11
	s_and_b32 s1, s1, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s13, s13, s1
.LBB1_9:                                ; %Flow267
                                        ;   in Loop: Header=BB1_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s14
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, exec_lo, s13
	s_or_b32 s12, s1, s12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s12
	s_cbranch_execnz .LBB1_2
.LBB1_10:                               ; %Flow269
	s_or_b32 exec_lo, exec_lo, s11
	v_add_nc_u32_e32 v9, s4, v2
	v_sub_nc_u32_e32 v2, s5, v0
	s_mov_b32 s5, exec_lo
	s_delay_alu instid0(VALU_DEP_2)
	v_cmpx_gt_i32_e64 s6, v9
	s_cbranch_execz .LBB1_29
; %bb.11:                               ; %.lr.ph195
	v_mul_lo_u32 v10, s7, v9
	v_cmp_lt_i32_e64 s0, -1, v2
	s_mov_b32 s11, 0
                                        ; implicit-def: $sgpr12
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_mov_b32 v12, v9 :: v_dual_mov_b32 v11, v10
.LBB1_12:                               ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_15 Depth 2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[3:4], null, v12, s7, v[2:3]
	s_or_b32 s12, s12, exec_lo
	s_mov_b32 s13, exec_lo
	v_ashrrev_i32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_co_u32 v3, s1, s2, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s1, s3, v4, s1
	global_load_b32 v3, v[3:4], off
	v_sub_nc_u32_e32 v4, s4, v12
	v_sub_nc_u32_e32 v13, 0, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_i32_e32 v13, v4, v13
	v_add_nc_u32_e32 v4, v13, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v4, v4, v4
	s_waitcnt vmcnt(0)
	v_cmpx_le_i32_e64 v4, v3
	s_cbranch_execz .LBB1_19
; %bb.13:                               ; %.preheader180
                                        ;   in Loop: Header=BB1_12 Depth=1
	s_and_saveexec_b32 s14, s0
	s_cbranch_execz .LBB1_18
; %bb.14:                               ; %.lr.ph190.preheader
                                        ;   in Loop: Header=BB1_12 Depth=1
	v_dual_mov_b32 v14, v0 :: v_dual_mov_b32 v15, v2
	s_mov_b32 s15, 0
                                        ; implicit-def: $sgpr16
.LBB1_15:                               ; %.lr.ph190
                                        ;   Parent Loop BB1_12 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v11, v15
	v_sub_nc_u32_e32 v16, 0, v14
	s_or_b32 s16, s16, exec_lo
	s_mov_b32 s17, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v4, 31, v3
	v_max_i32_e32 v16, v14, v16
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_nc_u32_e32 v16, v16, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v16, v16, v16
	v_add_co_u32 v3, s1, s2, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s1, s3, v4, s1
	global_load_b32 v17, v[3:4], off
	s_waitcnt vmcnt(0)
	v_cmpx_le_i32_e64 v16, v17
	s_cbranch_execz .LBB1_17
; %bb.16:                               ;   in Loop: Header=BB1_15 Depth=2
	v_subrev_nc_u32_e32 v15, s9, v15
	v_add_nc_u32_e32 v14, s9, v14
	s_and_not1_b32 s16, s16, exec_lo
	global_store_b32 v[3:4], v16, off
	v_cmp_gt_i32_e64 s1, 0, v15
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, s1, exec_lo
	s_or_b32 s16, s16, s1
.LBB1_17:                               ; %Flow256
                                        ;   in Loop: Header=BB1_15 Depth=2
	s_or_b32 exec_lo, exec_lo, s17
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, exec_lo, s16
	s_or_b32 s15, s1, s15
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s15
	s_cbranch_execnz .LBB1_15
.LBB1_18:                               ; %Flow258
                                        ;   in Loop: Header=BB1_12 Depth=1
	s_or_b32 exec_lo, exec_lo, s14
	v_add_nc_u32_e32 v12, s8, v12
	v_add_nc_u32_e32 v11, s10, v11
	s_and_not1_b32 s12, s12, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_i32_e64 s1, s6, v12
	s_and_b32 s1, s1, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s12, s12, s1
.LBB1_19:                               ; %Flow260
                                        ;   in Loop: Header=BB1_12 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, exec_lo, s12
	s_or_b32 s11, s1, s11
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB1_12
; %bb.20:                               ; %._crit_edge196
	s_or_b32 exec_lo, exec_lo, s11
	v_cmp_gt_i32_e64 s0, s7, v1
	s_mov_b32 s11, 0
                                        ; implicit-def: $sgpr12
.LBB1_21:                               ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_24 Depth 2
	v_mad_u64_u32 v[3:4], null, v9, s7, v[1:2]
	s_or_b32 s12, s12, exec_lo
	s_mov_b32 s13, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v3, s1, s2, v3
	v_add_co_ci_u32_e64 v4, s1, s3, v4, s1
	global_load_b32 v3, v[3:4], off
	v_sub_nc_u32_e32 v4, s4, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v11, 0, v4
	v_max_i32_e32 v11, v4, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v4, v11, v7
	v_mul_lo_u32 v4, v4, v4
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_le_i32_e64 v4, v3
	s_cbranch_execz .LBB1_28
; %bb.22:                               ; %.preheader179
                                        ;   in Loop: Header=BB1_21 Depth=1
	s_and_saveexec_b32 s14, s0
	s_cbranch_execz .LBB1_27
; %bb.23:                               ; %.lr.ph199.preheader
                                        ;   in Loop: Header=BB1_21 Depth=1
	v_dual_mov_b32 v12, v8 :: v_dual_mov_b32 v13, v1
	s_mov_b32 s15, 0
                                        ; implicit-def: $sgpr16
.LBB1_24:                               ; %.lr.ph199
                                        ;   Parent Loop BB1_21 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v10, v13
	v_sub_nc_u32_e32 v14, 0, v12
	s_or_b32 s16, s16, exec_lo
	s_mov_b32 s17, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v4, 31, v3
	v_max_i32_e32 v14, v12, v14
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_nc_u32_e32 v14, v14, v11
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v14, v14, v14
	v_add_co_u32 v3, s1, s2, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s1, s3, v4, s1
	global_load_b32 v15, v[3:4], off
	s_waitcnt vmcnt(0)
	v_cmpx_le_i32_e64 v14, v15
	s_cbranch_execz .LBB1_26
; %bb.25:                               ;   in Loop: Header=BB1_24 Depth=2
	v_add_nc_u32_e32 v13, s9, v13
	v_subrev_nc_u32_e32 v12, s9, v12
	s_and_not1_b32 s16, s16, exec_lo
	global_store_b32 v[3:4], v14, off
	v_cmp_le_i32_e64 s1, s7, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, s1, exec_lo
	s_or_b32 s16, s16, s1
.LBB1_26:                               ; %Flow249
                                        ;   in Loop: Header=BB1_24 Depth=2
	s_or_b32 exec_lo, exec_lo, s17
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, exec_lo, s16
	s_or_b32 s15, s1, s15
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s15
	s_cbranch_execnz .LBB1_24
.LBB1_27:                               ; %Flow251
                                        ;   in Loop: Header=BB1_21 Depth=1
	s_or_b32 exec_lo, exec_lo, s14
	v_add_nc_u32_e32 v9, s8, v9
	v_add_nc_u32_e32 v10, s10, v10
	s_and_not1_b32 s12, s12, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_le_i32_e64 s1, s6, v9
	s_and_b32 s1, s1, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s12, s12, s1
.LBB1_28:                               ; %Flow253
                                        ;   in Loop: Header=BB1_21 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s1, exec_lo, s12
	s_or_b32 s11, s1, s11
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB1_21
.LBB1_29:                               ; %Flow261
	s_or_b32 exec_lo, exec_lo, s5
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB1_39
; %bb.30:                               ; %.lr.ph213
	v_cmp_lt_i32_e32 vcc_lo, -1, v2
	s_mov_b32 s1, 0
                                        ; implicit-def: $sgpr5
.LBB1_31:                               ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_34 Depth 2
	v_mad_u64_u32 v[3:4], null, v5, s7, v[2:3]
	v_sub_nc_u32_e32 v1, s4, v5
	s_or_b32 s5, s5, exec_lo
	s_mov_b32 s6, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v4, 31, v3
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_co_u32 v3, s0, s2, v3
	v_add_co_ci_u32_e64 v4, s0, s3, v4, s0
	global_load_b32 v3, v[3:4], off
	v_sub_nc_u32_e32 v4, 0, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_i32_e32 v1, v1, v4
	v_add_nc_u32_e32 v4, v1, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v4, v4, v4
	s_waitcnt vmcnt(0)
	v_cmpx_le_i32_e64 v4, v3
	s_cbranch_execz .LBB1_38
; %bb.32:                               ; %.preheader
                                        ;   in Loop: Header=BB1_31 Depth=1
	s_and_saveexec_b32 s11, vcc_lo
	s_cbranch_execz .LBB1_37
; %bb.33:                               ; %.lr.ph208.preheader
                                        ;   in Loop: Header=BB1_31 Depth=1
	v_dual_mov_b32 v8, v0 :: v_dual_mov_b32 v9, v2
	s_mov_b32 s12, 0
                                        ; implicit-def: $sgpr13
.LBB1_34:                               ; %.lr.ph208
                                        ;   Parent Loop BB1_31 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v6, v9
	v_sub_nc_u32_e32 v10, 0, v8
	s_or_b32 s13, s13, exec_lo
	s_mov_b32 s14, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v4, 31, v3
	v_max_i32_e32 v10, v8, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[3:4], 2, v[3:4]
	v_add_nc_u32_e32 v10, v10, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_lo_u32 v10, v10, v10
	v_add_co_u32 v3, s0, s2, v3
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v4, s0, s3, v4, s0
	global_load_b32 v11, v[3:4], off
	s_waitcnt vmcnt(0)
	v_cmpx_le_i32_e64 v10, v11
	s_cbranch_execz .LBB1_36
; %bb.35:                               ;   in Loop: Header=BB1_34 Depth=2
	v_subrev_nc_u32_e32 v9, s9, v9
	v_add_nc_u32_e32 v8, s9, v8
	s_and_not1_b32 s13, s13, exec_lo
	global_store_b32 v[3:4], v10, off
	v_cmp_gt_i32_e64 s0, 0, v9
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, s0, exec_lo
	s_or_b32 s13, s13, s0
.LBB1_36:                               ; %Flow
                                        ;   in Loop: Header=BB1_34 Depth=2
	s_or_b32 exec_lo, exec_lo, s14
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, exec_lo, s13
	s_or_b32 s12, s0, s12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s12
	s_cbranch_execnz .LBB1_34
.LBB1_37:                               ; %Flow243
                                        ;   in Loop: Header=BB1_31 Depth=1
	s_or_b32 exec_lo, exec_lo, s11
	v_subrev_nc_u32_e32 v5, s8, v5
	v_subrev_nc_u32_e32 v6, s10, v6
	s_and_not1_b32 s5, s5, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_gt_i32_e64 s0, 0, v5
	s_and_b32 s0, s0, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s5, s5, s0
.LBB1_38:                               ; %Flow245
                                        ;   in Loop: Header=BB1_31 Depth=1
	s_or_b32 exec_lo, exec_lo, s6
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s0, exec_lo, s5
	s_or_b32 s1, s0, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB1_31
.LBB1_39:                               ; %._crit_edge214
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17actualizar_kernelPi6Antenaii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 18
		.amdhsa_next_free_sgpr 19
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z17actualizar_kernelPi6Antenaii, .Lfunc_end1-_Z17actualizar_kernelPi6Antenaii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1788
; NumSgprs: 21
; NumVgprs: 18
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 21
; NumVGPRsForWavesPerEU: 18
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.section	.text._Z10max_kernelILj256EEvPiS0_S0_S0_i,"axG",@progbits,_Z10max_kernelILj256EEvPiS0_S0_S0_i,comdat
	.protected	_Z10max_kernelILj256EEvPiS0_S0_S0_i ; -- Begin function _Z10max_kernelILj256EEvPiS0_S0_S0_i
	.globl	_Z10max_kernelILj256EEvPiS0_S0_S0_i
	.p2align	8
	.type	_Z10max_kernelILj256EEvPiS0_S0_S0_i,@function
_Z10max_kernelILj256EEvPiS0_S0_S0_i:    ; @_Z10max_kernelILj256EEvPiS0_S0_S0_i
; %bb.0:
	s_clause 0x3
	s_load_b32 s13, s[0:1], 0x34
	s_load_b32 s3, s[0:1], 0x20
	s_load_b256 s[4:11], s[0:1], 0x0
	s_load_b32 s12, s[0:1], 0x28
	s_mov_b32 s2, s15
	s_waitcnt lgkmcnt(0)
	s_and_b32 s1, s13, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s2, s1, v[0:1]
	s_cmp_eq_u64 s[6:7], 0
	v_cmp_gt_u32_e64 s0, s3, v1
	s_cbranch_scc1 .LBB2_8
; %bb.1:                                ; %.preheader235
	v_bfrev_b32_e32 v6, -2
	v_bfrev_b32_e32 v7, 1
	s_delay_alu instid0(VALU_DEP_3)
	s_and_saveexec_b32 s13, s0
	s_cbranch_execz .LBB2_7
; %bb.2:                                ; %.lr.ph
	v_bfrev_b32_e32 v6, -2
	v_bfrev_b32_e32 v7, 1
	v_dual_mov_b32 v3, 0 :: v_dual_mov_b32 v2, v1
	s_mul_i32 s15, s12, s1
	s_mov_b32 s14, 0
.LBB2_3:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[4:5], 2, v[2:3]
	s_mov_b32 s16, exec_lo
	v_add_co_u32 v8, vcc_lo, s4, v4
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v9, vcc_lo, s5, v5, vcc_lo
	global_load_b32 v8, v[8:9], off
	s_waitcnt vmcnt(0)
	v_cmpx_gt_i32_e64 v8, v7
	s_cbranch_execz .LBB2_5
; %bb.4:                                ;   in Loop: Header=BB2_3 Depth=1
	v_add_co_u32 v4, vcc_lo, s6, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s7, v5, vcc_lo
	v_mov_b32_e32 v7, v8
	global_load_b32 v6, v[4:5], off
.LBB2_5:                                ;   in Loop: Header=BB2_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s16
	v_add_nc_u32_e32 v2, s15, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_le_u32_e32 vcc_lo, s3, v2
	s_or_b32 s14, vcc_lo, s14
	s_and_not1_b32 exec_lo, exec_lo, s14
	s_cbranch_execnz .LBB2_3
; %bb.6:                                ; %Flow322
	s_or_b32 exec_lo, exec_lo, s14
.LBB2_7:                                ; %Flow323
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s13
	s_mov_b32 s6, 0
	s_branch .LBB2_9
.LBB2_8:
	s_mov_b32 s6, -1
                                        ; implicit-def: $vgpr6
                                        ; implicit-def: $vgpr7
.LBB2_9:                                ; %Flow326
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s6
	s_cbranch_vccnz .LBB2_15
; %bb.10:                               ; %.preheader
	s_waitcnt vmcnt(0)
	v_bfrev_b32_e32 v6, -2
	v_bfrev_b32_e32 v7, 1
	s_and_saveexec_b32 s6, s0
	s_cbranch_execz .LBB2_14
; %bb.11:                               ; %.lr.ph244
	v_bfrev_b32_e32 v6, -2
	v_bfrev_b32_e32 v7, 1
	v_mov_b32_e32 v2, 0
	s_mul_i32 s12, s12, s1
	s_mov_b32 s0, 0
.LBB2_12:                               ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[1:2]
	v_add_co_u32 v3, vcc_lo, s4, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s5, v4, vcc_lo
	global_load_b32 v3, v[3:4], off
	s_waitcnt vmcnt(0)
	v_cmp_gt_i32_e32 vcc_lo, v3, v7
	v_max_i32_e32 v7, v3, v7
	v_cndmask_b32_e32 v6, v6, v1, vcc_lo
	v_add_nc_u32_e32 v1, s12, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_le_u32_e32 vcc_lo, s3, v1
	s_or_b32 s0, vcc_lo, s0
	s_and_not1_b32 exec_lo, exec_lo, s0
	s_cbranch_execnz .LBB2_12
; %bb.13:                               ; %Flow324
	s_or_b32 exec_lo, exec_lo, s0
.LBB2_14:                               ; %Flow325
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s6
.LBB2_15:                               ; %.loopexit
	v_lshlrev_b32_e32 v1, 2, v0
	s_lshl_b32 s0, s1, 2
	s_mov_b32 s3, 0
	s_add_i32 s0, s0, 0
	s_mov_b32 s1, exec_lo
	v_add_nc_u32_e32 v3, 0, v1
	v_add_nc_u32_e32 v4, s0, v1
	ds_store_b32 v3, v7
	s_waitcnt vmcnt(0)
	ds_store_b32 v4, v6
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e32 0x80, v0
	s_cbranch_execz .LBB2_24
; %bb.16:
	v_or_b32_e32 v5, 0x80, v0
	s_mov_b32 s4, exec_lo
                                        ; implicit-def: $vgpr2
	s_delay_alu instid0(VALU_DEP_1)
	v_lshl_add_u32 v1, v5, 2, 0
	ds_load_b32 v1, v1
	ds_load_b32 v6, v3
	s_waitcnt lgkmcnt(0)
	v_cmpx_le_i32_e64 v1, v6
	s_xor_b32 s4, exec_lo, s4
	s_cbranch_execz .LBB2_20
; %bb.17:
	s_mov_b32 s5, exec_lo
                                        ; implicit-def: $vgpr2
	v_cmpx_eq_u32_e64 v1, v6
	s_xor_b32 s5, exec_lo, s5
	s_cbranch_execz .LBB2_19
; %bb.18:
	v_lshl_add_u32 v2, v5, 2, s0
	ds_load_b32 v2, v2
	ds_load_b32 v5, v4
	s_waitcnt lgkmcnt(0)
	v_cmp_lt_i32_e32 vcc_lo, v2, v5
	s_and_b32 s3, vcc_lo, exec_lo
.LBB2_19:                               ; %Flow319
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s3, s3, exec_lo
                                        ; implicit-def: $vgpr5
.LBB2_20:                               ; %Flow318
	s_and_not1_saveexec_b32 s4, s4
	s_cbranch_execz .LBB2_22
; %bb.21:                               ; %._crit_edge
	v_lshl_add_u32 v2, v5, 2, s0
	s_or_b32 s3, s3, exec_lo
	ds_load_b32 v2, v2
.LBB2_22:                               ; %Flow320
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s3
	s_cbranch_execz .LBB2_24
; %bb.23:
	ds_store_b32 v3, v1
	s_waitcnt lgkmcnt(1)
	ds_store_b32 v4, v2
.LBB2_24:
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s1, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e32 64, v0
	s_cbranch_execz .LBB2_33
; %bb.25:
	v_or_b32_e32 v5, 64, v0
	s_mov_b32 s3, 0
	s_mov_b32 s4, exec_lo
                                        ; implicit-def: $vgpr2
	s_delay_alu instid0(VALU_DEP_1)
	v_lshl_add_u32 v1, v5, 2, 0
	ds_load_b32 v1, v1
	ds_load_b32 v6, v3
	s_waitcnt lgkmcnt(0)
	v_cmpx_le_i32_e64 v1, v6
	s_xor_b32 s4, exec_lo, s4
	s_cbranch_execz .LBB2_29
; %bb.26:
	s_mov_b32 s5, exec_lo
                                        ; implicit-def: $vgpr2
	v_cmpx_eq_u32_e64 v1, v6
	s_xor_b32 s5, exec_lo, s5
	s_cbranch_execz .LBB2_28
; %bb.27:
	v_lshl_add_u32 v2, v5, 2, s0
	ds_load_b32 v2, v2
	ds_load_b32 v5, v4
	s_waitcnt lgkmcnt(0)
	v_cmp_lt_i32_e32 vcc_lo, v2, v5
	s_and_b32 s3, vcc_lo, exec_lo
.LBB2_28:                               ; %Flow315
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s3, s3, exec_lo
                                        ; implicit-def: $vgpr5
.LBB2_29:                               ; %Flow314
	s_and_not1_saveexec_b32 s4, s4
	s_cbranch_execz .LBB2_31
; %bb.30:                               ; %._crit_edge248
	v_lshl_add_u32 v2, v5, 2, s0
	s_or_b32 s3, s3, exec_lo
	ds_load_b32 v2, v2
.LBB2_31:                               ; %Flow316
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s3
	s_cbranch_execz .LBB2_33
; %bb.32:
	ds_store_b32 v3, v1
	s_waitcnt lgkmcnt(1)
	ds_store_b32 v4, v2
.LBB2_33:
	s_or_b32 exec_lo, exec_lo, s1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mov_b32 s1, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e32 32, v0
	s_cbranch_execz .LBB2_82
; %bb.34:
	v_or_b32_e32 v6, 32, v0
	s_mov_b32 s3, 0
	s_mov_b32 s4, exec_lo
                                        ; implicit-def: $vgpr2
	s_delay_alu instid0(VALU_DEP_1)
	v_lshl_add_u32 v1, v6, 2, 0
	ds_load_b32 v1, v1
	ds_load_b32 v5, v3
	s_waitcnt lgkmcnt(0)
	v_cmpx_le_i32_e64 v1, v5
	s_xor_b32 s4, exec_lo, s4
	s_cbranch_execz .LBB2_38
; %bb.35:
	s_mov_b32 s5, 0
	s_mov_b32 s3, exec_lo
                                        ; implicit-def: $vgpr2
	v_cmpx_eq_u32_e64 v1, v5
	s_xor_b32 s3, exec_lo, s3
	s_cbranch_execz .LBB2_37
; %bb.36:
	v_lshl_add_u32 v2, v6, 2, s0
	ds_load_b32 v2, v2
	ds_load_b32 v5, v4
	s_waitcnt lgkmcnt(0)
	v_cmp_lt_i32_e32 vcc_lo, v2, v5
	v_mov_b32_e32 v5, v1
	s_and_b32 s5, vcc_lo, exec_lo
.LBB2_37:                               ; %Flow311
	s_or_b32 exec_lo, exec_lo, s3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s3, s5, exec_lo
                                        ; implicit-def: $vgpr6
.LBB2_38:                               ; %Flow310
	s_and_not1_saveexec_b32 s4, s4
	s_cbranch_execz .LBB2_40
; %bb.39:                               ; %._crit_edge251
	v_lshl_add_u32 v2, v6, 2, s0
	s_or_b32 s3, s3, exec_lo
                                        ; implicit-def: $vgpr5
	ds_load_b32 v2, v2
.LBB2_40:                               ; %Flow312
	s_or_b32 exec_lo, exec_lo, s4
	s_and_saveexec_b32 s4, s3
	s_cbranch_execz .LBB2_42
; %bb.41:
	ds_store_b32 v3, v1
	s_waitcnt lgkmcnt(1)
	ds_store_b32 v4, v2
	ds_load_b32 v5, v3
.LBB2_42:
	s_or_b32 exec_lo, exec_lo, s4
	ds_load_b32 v6, v3 offset:64
	s_mov_b32 s3, 0
	s_mov_b32 s4, exec_lo
                                        ; implicit-def: $vgpr2
	s_waitcnt lgkmcnt(0)
	v_cmpx_le_i32_e64 v6, v5
	s_xor_b32 s4, exec_lo, s4
	s_cbranch_execz .LBB2_46
; %bb.43:
	s_mov_b32 s5, exec_lo
                                        ; implicit-def: $vgpr2
	v_cmpx_eq_u32_e64 v6, v5
	s_xor_b32 s5, exec_lo, s5
	s_cbranch_execz .LBB2_45
; %bb.44:
	ds_load_2addr_b32 v[1:2], v4 offset1:16
	s_waitcnt lgkmcnt(0)
	v_cmp_lt_i32_e32 vcc_lo, v2, v1
	s_and_b32 s3, vcc_lo, exec_lo
.LBB2_45:                               ; %Flow308
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s3, s3, exec_lo
.LBB2_46:                               ; %Flow307
	s_and_not1_saveexec_b32 s4, s4
	s_cbranch_execz .LBB2_48
; %bb.47:                               ; %._crit_edge255
	ds_load_b32 v2, v4 offset:64
	s_or_b32 s3, s3, exec_lo
                                        ; implicit-def: $vgpr5
.LBB2_48:                               ; %Flow309
	s_or_b32 exec_lo, exec_lo, s4
	s_and_saveexec_b32 s4, s3
	s_cbranch_execz .LBB2_50
; %bb.49:
	ds_store_b32 v3, v6
	s_waitcnt lgkmcnt(1)
	ds_store_b32 v4, v2
	ds_load_b32 v5, v3
.LBB2_50:
	s_or_b32 exec_lo, exec_lo, s4
	ds_load_b32 v6, v3 offset:32
	s_mov_b32 s3, 0
	s_mov_b32 s4, exec_lo
                                        ; implicit-def: $vgpr2
	s_waitcnt lgkmcnt(0)
	v_cmpx_le_i32_e64 v6, v5
	s_xor_b32 s4, exec_lo, s4
	s_cbranch_execz .LBB2_54
; %bb.51:
	s_mov_b32 s5, exec_lo
                                        ; implicit-def: $vgpr2
	v_cmpx_eq_u32_e64 v6, v5
	s_xor_b32 s5, exec_lo, s5
	s_cbranch_execz .LBB2_53
; %bb.52:
	ds_load_2addr_b32 v[1:2], v4 offset1:8
	s_waitcnt lgkmcnt(0)
	v_cmp_lt_i32_e32 vcc_lo, v2, v1
	s_and_b32 s3, vcc_lo, exec_lo
.LBB2_53:                               ; %Flow305
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s3, s3, exec_lo
.LBB2_54:                               ; %Flow304
	s_and_not1_saveexec_b32 s4, s4
	s_cbranch_execz .LBB2_56
; %bb.55:                               ; %._crit_edge259
	ds_load_b32 v2, v4 offset:32
	s_or_b32 s3, s3, exec_lo
                                        ; implicit-def: $vgpr5
.LBB2_56:                               ; %Flow306
	s_or_b32 exec_lo, exec_lo, s4
	s_and_saveexec_b32 s4, s3
	s_cbranch_execz .LBB2_58
; %bb.57:
	ds_store_b32 v3, v6
	s_waitcnt lgkmcnt(1)
	ds_store_b32 v4, v2
	ds_load_b32 v5, v3
.LBB2_58:
	s_or_b32 exec_lo, exec_lo, s4
	ds_load_b32 v6, v3 offset:16
	s_mov_b32 s3, 0
	s_mov_b32 s4, exec_lo
                                        ; implicit-def: $vgpr2
	s_waitcnt lgkmcnt(0)
	v_cmpx_le_i32_e64 v6, v5
	s_xor_b32 s4, exec_lo, s4
	s_cbranch_execz .LBB2_62
; %bb.59:
	s_mov_b32 s5, exec_lo
                                        ; implicit-def: $vgpr2
	v_cmpx_eq_u32_e64 v6, v5
	s_xor_b32 s5, exec_lo, s5
	s_cbranch_execz .LBB2_61
; %bb.60:
	ds_load_2addr_b32 v[1:2], v4 offset1:4
	s_waitcnt lgkmcnt(0)
	v_cmp_lt_i32_e32 vcc_lo, v2, v1
	s_and_b32 s3, vcc_lo, exec_lo
.LBB2_61:                               ; %Flow302
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s3, s3, exec_lo
.LBB2_62:                               ; %Flow301
	s_and_not1_saveexec_b32 s4, s4
	s_cbranch_execz .LBB2_64
; %bb.63:                               ; %._crit_edge263
	ds_load_b32 v2, v4 offset:16
	s_or_b32 s3, s3, exec_lo
                                        ; implicit-def: $vgpr5
.LBB2_64:                               ; %Flow303
	s_or_b32 exec_lo, exec_lo, s4
	s_and_saveexec_b32 s4, s3
	s_cbranch_execz .LBB2_66
; %bb.65:
	ds_store_b32 v3, v6
	s_waitcnt lgkmcnt(1)
	ds_store_b32 v4, v2
	ds_load_b32 v5, v3
.LBB2_66:
	s_or_b32 exec_lo, exec_lo, s4
	ds_load_b32 v6, v3 offset:8
	s_mov_b32 s3, 0
	s_mov_b32 s4, exec_lo
                                        ; implicit-def: $vgpr2
	s_waitcnt lgkmcnt(0)
	v_cmpx_le_i32_e64 v6, v5
	s_xor_b32 s4, exec_lo, s4
	s_cbranch_execz .LBB2_70
; %bb.67:
	s_mov_b32 s5, exec_lo
                                        ; implicit-def: $vgpr2
	v_cmpx_eq_u32_e64 v6, v5
	s_xor_b32 s5, exec_lo, s5
	s_cbranch_execz .LBB2_69
; %bb.68:
	ds_load_2addr_b32 v[1:2], v4 offset1:2
	s_waitcnt lgkmcnt(0)
	v_cmp_lt_i32_e32 vcc_lo, v2, v1
	s_and_b32 s3, vcc_lo, exec_lo
.LBB2_69:                               ; %Flow299
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s3, s3, exec_lo
.LBB2_70:                               ; %Flow298
	s_and_not1_saveexec_b32 s4, s4
	s_cbranch_execz .LBB2_72
; %bb.71:                               ; %._crit_edge267
	ds_load_b32 v2, v4 offset:8
	s_or_b32 s3, s3, exec_lo
                                        ; implicit-def: $vgpr5
.LBB2_72:                               ; %Flow300
	s_or_b32 exec_lo, exec_lo, s4
	s_and_saveexec_b32 s4, s3
	s_cbranch_execz .LBB2_74
; %bb.73:
	ds_store_b32 v3, v6
	s_waitcnt lgkmcnt(1)
	ds_store_b32 v4, v2
	ds_load_b32 v5, v3
.LBB2_74:
	s_or_b32 exec_lo, exec_lo, s4
	ds_load_b32 v6, v3 offset:4
	s_mov_b32 s3, 0
	s_mov_b32 s4, exec_lo
                                        ; implicit-def: $vgpr2
	s_waitcnt lgkmcnt(0)
	v_cmpx_le_i32_e64 v6, v5
	s_xor_b32 s4, exec_lo, s4
	s_cbranch_execz .LBB2_78
; %bb.75:
	s_mov_b32 s5, exec_lo
                                        ; implicit-def: $vgpr2
	v_cmpx_eq_u32_e64 v6, v5
	s_xor_b32 s5, exec_lo, s5
	s_cbranch_execz .LBB2_77
; %bb.76:
	ds_load_2addr_b32 v[1:2], v4 offset1:1
	s_waitcnt lgkmcnt(0)
	v_cmp_lt_i32_e32 vcc_lo, v2, v1
	s_and_b32 s3, vcc_lo, exec_lo
.LBB2_77:                               ; %Flow295
	s_or_b32 exec_lo, exec_lo, s5
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 s3, s3, exec_lo
.LBB2_78:                               ; %Flow
	s_and_not1_saveexec_b32 s4, s4
	s_cbranch_execz .LBB2_80
; %bb.79:                               ; %._crit_edge271
	ds_load_b32 v2, v4 offset:4
	s_or_b32 s3, s3, exec_lo
.LBB2_80:                               ; %Flow296
	s_or_b32 exec_lo, exec_lo, s4
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_b32 exec_lo, exec_lo, s3
	s_cbranch_execz .LBB2_82
; %bb.81:
	ds_store_b32 v3, v6
	s_waitcnt lgkmcnt(1)
	ds_store_b32 v4, v2
.LBB2_82:                               ; %Flow313
	s_or_b32 exec_lo, exec_lo, s1
	s_mov_b32 s3, 0
	s_mov_b32 s1, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB2_84
; %bb.83:
	v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, s0
	s_lshl_b64 s[0:1], s[2:3], 2
	s_waitcnt lgkmcnt(0)
	ds_load_b32 v2, v0
	ds_load_b32 v1, v1
	s_add_u32 s2, s10, s0
	s_addc_u32 s3, s11, s1
	s_add_u32 s0, s8, s0
	s_addc_u32 s1, s9, s1
	s_waitcnt lgkmcnt(1)
	global_store_b32 v0, v2, s[0:1]
	s_waitcnt lgkmcnt(0)
	global_store_b32 v0, v1, s[2:3]
.LBB2_84:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10max_kernelILj256EEvPiS0_S0_S0_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 17
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.section	.text._Z10max_kernelILj256EEvPiS0_S0_S0_i,"axG",@progbits,_Z10max_kernelILj256EEvPiS0_S0_S0_i,comdat
.Lfunc_end2:
	.size	_Z10max_kernelILj256EEvPiS0_S0_S0_i, .Lfunc_end2-_Z10max_kernelILj256EEvPiS0_S0_S0_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1992
; NumSgprs: 19
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 19
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .offset:         12
        .size:           4
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11iniciarMapaPiii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z11iniciarMapaPiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     5
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           8
        .value_kind:     by_value
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z17actualizar_kernelPi6Antenaii
    .private_segment_fixed_size: 0
    .sgpr_count:     21
    .sgpr_spill_count: 0
    .symbol:         _Z17actualizar_kernelPi6Antenaii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     18
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         160
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10max_kernelILj256EEvPiS0_S0_S0_i
    .private_segment_fixed_size: 0
    .sgpr_count:     19
    .sgpr_spill_count: 0
    .symbol:         _Z10max_kernelILj256EEvPiS0_S0_S0_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     10
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
