// Date March 26 2029
//Programer: Hemanta Bhattarai
// Progarm : To add two arrays and compare computation time in host and device

#include "cuda_runtime.h"
#include "device_launch_parameters.h"


#include <stdio.h>
#include <stdlib.h> //for random numbers

#include <time.h>
#include <sys/time.h>

#define gpuErrchk(ans){ gpuAssert((ans),__FILE__, __LINE__);}


inline void gpuAssert(cudaError_t code, const char *file, int line, bool abort = true)
{
	if(code != cudaSuccess)
	{
		fprintf(stderr, "GPUassert : %s %s %d\n", cudaGetErrorString(code), file, line);
		if(abort) exit(code);
	}
}





// device kernal
__global__ void vecAdd(int *A, int *B, int *C, int *D, int array_size)
{
	int i = threadIdx.x + blockDim.x * blockIdx.x;
	
	if(i < array_size) D[i] = A[i] + B[i] + C[i];
}



int main()
{	
	// host function definition
	int get_random();
	
	//variable definition
	int *hA, *hB, *hC, *hD, *hE, *dA, *dB, *dC, *dD;
	int size_of_array;
	
	

	
	//define size of array
	printf("Enter the size of array");
	scanf("%d",&size_of_array);
	dim3 grid(1024);
	dim3 block((size_of_array/grid.x)+1);	
	int size = sizeof(int) * size_of_array;

	//memory allocation in host
	hA = (int*)malloc(size);
	hB = (int*)malloc(size);
	hC = (int*)malloc(size);
	hD = (int*)malloc(size);
	hE = (int*)malloc(size);
	
	//memory allocation in device
	gpuErrchk(cudaMalloc(&dA,size));
	gpuErrchk(cudaMalloc(&dB,size));
	gpuErrchk(cudaMalloc(&dC,size));
	gpuErrchk(cudaMalloc(&dD,size));


	//array initilization 
	for(int i=0; i<size_of_array; ++i) hA[i] = get_random();
	for(int i=0; i<size_of_array; ++i) hB[i] = get_random();
	for(int i=0; i<size_of_array; ++i) hC[i] = get_random();
	
	
	clock_t host_begin, host_end;
	//record begin of host computation
	host_begin = clock();

	//add vectors in host
	for(int i=0; i<size_of_array; ++i) hE[i] = hA[i] + hB[i] + hC[i];

	//record end of host computation
	host_end = clock();


	
	clock_t device_begin, device_end;
	
	
	//record of device computation
	device_begin = clock();


	//copy host data to memory
	gpuErrchk(cudaMemcpy(dA, hA, size, cudaMemcpyHostToDevice));
	gpuErrchk(cudaMemcpy(dB, hB, size, cudaMemcpyHostToDevice));
	gpuErrchk(cudaMemcpy(dC, hC, size, cudaMemcpyHostToDevice));
	gpuErrchk(cudaMemcpy(dD, hD, size, cudaMemcpyHostToDevice));
	
	//record start of device computation

	// add array in device
	vecAdd<<<block,grid>>>(dA, dB, dC, dD, size_of_array);


	//record end of device computation
	device_end = clock();


	//copy data from device to host
	gpuErrchk(cudaMemcpy(hD, dD, size, cudaMemcpyDeviceToHost));

	double host_time, device_time;
	host_time = (double)((double)(host_end - host_begin)/(CLOCKS_PER_SEC));
	device_time = (double)((double)(device_end - device_begin)/(CLOCKS_PER_SEC));

	//print the time of host and device computation
	printf("Host computation time: %f\n",host_time);
	printf("Device computation time: %f\n",device_time);

	//display the devation of device and host result
	int sum = 0;
	for(int i=0; i< size_of_array; ++i) sum += hE[i] - hD[i];
	printf("The deviation of host and device result is %d\n",sum);

	//free host memory
	free(hA);
	free(hB);
	free(hC);
	free(hD);
	free(hE);

	//free device memory
	gpuErrchk(cudaFree(dA));
	gpuErrchk(cudaFree(dB));
	gpuErrchk(cudaFree(dC));
	gpuErrchk(cudaFree(dD));

	

}

//random number generator
int get_random()
{
	return rand() % 100 + 1;
}


	.file	"tmpxft_00288c70_00000000-6_vecAddErrorHandle.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2032:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2032:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata._Z9gpuAssert9cudaErrorPKcib.str1.1,"aMS",@progbits,1
.LC0:
	.string	"GPUassert : %s %s %d\n"
	.section	.text._Z9gpuAssert9cudaErrorPKcib,"axG",@progbits,_Z9gpuAssert9cudaErrorPKcib,comdat
	.weak	_Z9gpuAssert9cudaErrorPKcib
	.type	_Z9gpuAssert9cudaErrorPKcib, @function
_Z9gpuAssert9cudaErrorPKcib:
.LFB2027:
	.cfi_startproc
	endbr64
	testl	%edi, %edi
	je	.L8
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	%ecx, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movl	%edi, %ebx
	subq	$24, %rsp
	.cfi_def_cfa_offset 48
	movl	%edx, 12(%rsp)
	movq	%rsi, (%rsp)
	call	cudaGetErrorString@PLT
	movl	12(%rsp), %r9d
	movq	(%rsp), %r8
	leaq	.LC0(%rip), %rdx
	movq	stderr(%rip), %rdi
	movq	%rax, %rcx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	testb	%bpl, %bpl
	je	.L2
	movl	%ebx, %edi
	call	exit@PLT
.L2:
	addq	$24, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
.L8:
	.cfi_restore 3
	.cfi_restore 6
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z9gpuAssert9cudaErrorPKcib, .-_Z9gpuAssert9cudaErrorPKcib
	.text
	.globl	_Z10get_randomv
	.type	_Z10get_randomv, @function
_Z10get_randomv:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	call	rand@PLT
	movl	$100, %ecx
	cltd
	idivl	%ecx
	leal	1(%rdx), %eax
	popq	%rdx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z10get_randomv, .-_Z10get_randomv
	.globl	_Z32__device_stub__Z6vecAddPiS_S_S_iPiS_S_S_i
	.type	_Z32__device_stub__Z6vecAddPiS_S_S_iPiS_S_S_i, @function
_Z32__device_stub__Z6vecAddPiS_S_S_iPiS_S_S_i:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$168, %rsp
	.cfi_def_cfa_offset 176
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 152(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 144(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L14
	pushq	56(%rsp)
	.cfi_def_cfa_offset 184
	leaq	_Z6vecAddPiS_S_S_i(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 192
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L14:
	movq	152(%rsp), %rax
	subq	%fs:40, %rax
	je	.L16
	call	__stack_chk_fail@PLT
.L16:
	addq	$168, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z32__device_stub__Z6vecAddPiS_S_S_iPiS_S_S_i, .-_Z32__device_stub__Z6vecAddPiS_S_S_iPiS_S_S_i
	.globl	_Z6vecAddPiS_S_S_i
	.type	_Z6vecAddPiS_S_S_i, @function
_Z6vecAddPiS_S_S_i:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z32__device_stub__Z6vecAddPiS_S_S_iPiS_S_S_i
	.cfi_endproc
.LFE2055:
	.size	_Z6vecAddPiS_S_S_i, .-_Z6vecAddPiS_S_S_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"Enter the size of array"
.LC2:
	.string	"%d"
.LC3:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/Hemanta-Bhattarai/Self_Learning/master/CUDA/vector_operations/vecAddErrorHandle.cu"
.LC5:
	.string	"Host computation time: %f\n"
.LC6:
	.string	"Device computation time: %f\n"
.LC7:
	.string	"The deviation of host and device result is %d\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	leaq	.LC3(%rip), %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	44(%rsp), %rsi
	leaq	.LC2(%rip), %rdi
	xorl	%eax, %eax
	call	__isoc23_scanf@PLT
	movl	44(%rsp), %eax
	movabsq	$4294967297, %rcx
	movq	%rcx, 84(%rsp)
	movl	%eax, %edx
	sall	$2, %eax
	movq	%rcx, 96(%rsp)
	cltq
	shrl	$10, %edx
	incl	%edx
	movq	%rax, %rdi
	movq	%rax, (%rsp)
	movl	%edx, 92(%rsp)
	call	malloc@PLT
	movq	(%rsp), %rdi
	movq	%rax, %r12
	call	malloc@PLT
	movq	(%rsp), %rdi
	movq	%rax, %rbp
	call	malloc@PLT
	movq	(%rsp), %rdi
	movq	%rax, %rbx
	call	malloc@PLT
	movq	(%rsp), %rdi
	movq	%rax, 8(%rsp)
	call	malloc@PLT
	movq	(%rsp), %rsi
	leaq	48(%rsp), %rdi
	movq	%rax, %r13
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$68, %edx
	movq	%r14, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	(%rsp), %rsi
	leaq	56(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$69, %edx
	movq	%r14, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	(%rsp), %rsi
	leaq	64(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	$1, %ecx
	movl	$70, %edx
	movq	%r14, %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	(%rsp), %rsi
	leaq	72(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	%r14, %rsi
	movl	$1, %ecx
	xorl	%r14d, %r14d
	movl	%eax, %edi
	movl	$71, %edx
	call	_Z9gpuAssert9cudaErrorPKcib
.L20:
	cmpl	%r14d, 44(%rsp)
	jle	.L33
	call	_Z10get_randomv
	movl	%eax, (%r12,%r14,4)
	incq	%r14
	jmp	.L20
.L33:
	xorl	%r14d, %r14d
.L22:
	cmpl	%r14d, 44(%rsp)
	jle	.L34
	call	_Z10get_randomv
	movl	%eax, 0(%rbp,%r14,4)
	incq	%r14
	jmp	.L22
.L34:
	xorl	%r14d, %r14d
.L24:
	cmpl	%r14d, 44(%rsp)
	jle	.L35
	call	_Z10get_randomv
	movl	%eax, (%rbx,%r14,4)
	incq	%r14
	jmp	.L24
.L35:
	call	clock@PLT
	movl	44(%rsp), %ecx
	movq	%rax, 16(%rsp)
	xorl	%eax, %eax
.L26:
	cmpl	%eax, %ecx
	jle	.L36
	movl	0(%rbp,%rax,4), %edx
	addl	(%r12,%rax,4), %edx
	addl	(%rbx,%rax,4), %edx
	movl	%edx, 0(%r13,%rax,4)
	incq	%rax
	jmp	.L26
.L36:
	call	clock@PLT
	movq	%rax, 24(%rsp)
	call	clock@PLT
	movq	(%rsp), %rdx
	movq	48(%rsp), %rdi
	movq	%r12, %rsi
	movl	$1, %ecx
	movq	%rax, %r15
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movl	$100, %edx
	leaq	.LC3(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	(%rsp), %rdx
	movq	56(%rsp), %rdi
	movq	%rbp, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movl	$101, %edx
	leaq	.LC3(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	(%rsp), %rdx
	movq	64(%rsp), %rdi
	movq	%rbx, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movl	$102, %edx
	leaq	.LC3(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	(%rsp), %rdx
	movq	8(%rsp), %rsi
	movl	$1, %ecx
	movq	72(%rsp), %rdi
	call	cudaMemcpy@PLT
	movl	$1, %ecx
	movl	$103, %edx
	leaq	.LC3(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movl	88(%rsp), %ecx
	movl	100(%rsp), %esi
	xorl	%r9d, %r9d
	movl	$1024, 80(%rsp)
	movq	92(%rsp), %rdi
	xorl	%r8d, %r8d
	movq	80(%rsp), %rdx
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L28
	movl	44(%rsp), %r8d
	movq	72(%rsp), %rcx
	movq	64(%rsp), %rdx
	movq	56(%rsp), %rsi
	movq	48(%rsp), %rdi
	call	_Z32__device_stub__Z6vecAddPiS_S_S_iPiS_S_S_i
.L28:
	call	clock@PLT
	movq	(%rsp), %rdx
	movq	72(%rsp), %rsi
	movl	$2, %ecx
	movq	8(%rsp), %rdi
	movq	%rax, %r14
	subq	%r15, %r14
	call	cudaMemcpy@PLT
	movl	$116, %edx
	movl	$1, %ecx
	leaq	.LC3(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	cvtsi2sdq	%r14, %xmm0
	movq	16(%rsp), %rcx
	movsd	.LC4(%rip), %xmm1
	movq	24(%rsp), %rax
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	subq	%rcx, %rax
	divsd	%xmm1, %xmm0
	movq	%xmm0, %r14
	cvtsi2sdq	%rax, %xmm0
	movb	$1, %al
	divsd	%xmm1, %xmm0
	call	__printf_chk@PLT
	movq	%r14, %xmm0
	leaq	.LC6(%rip), %rsi
	movb	$1, %al
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	44(%rsp), %ecx
	xorl	%eax, %eax
	xorl	%edx, %edx
.L29:
	cmpl	%eax, %ecx
	jle	.L37
	movq	8(%rsp), %rsi
	addl	0(%r13,%rax,4), %edx
	subl	(%rsi,%rax,4), %edx
	incq	%rax
	jmp	.L29
.L37:
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	8(%rsp), %rdi
	call	free@PLT
	movq	%r13, %rdi
	call	free@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movl	$1, %ecx
	movl	$139, %edx
	leaq	.LC3(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movl	$1, %ecx
	movl	$140, %edx
	leaq	.LC3(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	movl	$1, %ecx
	movl	$141, %edx
	leaq	.LC3(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	72(%rsp), %rdi
	call	cudaFree@PLT
	movl	$1, %ecx
	movl	$142, %edx
	leaq	.LC3(%rip), %rsi
	movl	%eax, %edi
	call	_Z9gpuAssert9cudaErrorPKcib
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L31
	call	__stack_chk_fail@PLT
.L31:
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	main, .-main
	.section	.rodata.str1.1
.LC8:
	.string	"_Z6vecAddPiS_S_S_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2057:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC8(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z6vecAddPiS_S_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2057:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC4:
	.long	0
	.long	1093567616
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

// Date March 26 2029
//Programer: Hemanta Bhattarai
// Progarm : To add two arrays and compare computation time in host and device

#include "hip/hip_runtime.h"



#include <stdio.h>
#include <stdlib.h> //for random numbers

#include <time.h>
#include <sys/time.h>

#define gpuErrchk(ans){ gpuAssert((ans),__FILE__, __LINE__);}


inline void gpuAssert(hipError_t code, const char *file, int line, bool abort = true)
{
	if(code != hipSuccess)
	{
		fprintf(stderr, "GPUassert : %s %s %d\n", hipGetErrorString(code), file, line);
		if(abort) exit(code);
	}
}





// device kernal
__global__ void vecAdd(int *A, int *B, int *C, int *D, int array_size)
{
	int i = threadIdx.x + blockDim.x * blockIdx.x;
	
	if(i < array_size) D[i] = A[i] + B[i] + C[i];
}



int main()
{	
	// host function definition
	int get_random();
	
	//variable definition
	int *hA, *hB, *hC, *hD, *hE, *dA, *dB, *dC, *dD;
	int size_of_array;
	
	

	
	//define size of array
	printf("Enter the size of array");
	scanf("%d",&size_of_array);
	dim3 grid(1024);
	dim3 block((size_of_array/grid.x)+1);	
	int size = sizeof(int) * size_of_array;

	//memory allocation in host
	hA = (int*)malloc(size);
	hB = (int*)malloc(size);
	hC = (int*)malloc(size);
	hD = (int*)malloc(size);
	hE = (int*)malloc(size);
	
	//memory allocation in device
	gpuErrchk(hipMalloc(&dA,size));
	gpuErrchk(hipMalloc(&dB,size));
	gpuErrchk(hipMalloc(&dC,size));
	gpuErrchk(hipMalloc(&dD,size));


	//array initilization 
	for(int i=0; i<size_of_array; ++i) hA[i] = get_random();
	for(int i=0; i<size_of_array; ++i) hB[i] = get_random();
	for(int i=0; i<size_of_array; ++i) hC[i] = get_random();
	
	
	clock_t host_begin, host_end;
	//record begin of host computation
	host_begin = clock();

	//add vectors in host
	for(int i=0; i<size_of_array; ++i) hE[i] = hA[i] + hB[i] + hC[i];

	//record end of host computation
	host_end = clock();


	
	clock_t device_begin, device_end;
	
	
	//record of device computation
	device_begin = clock();


	//copy host data to memory
	gpuErrchk(hipMemcpy(dA, hA, size, hipMemcpyHostToDevice));
	gpuErrchk(hipMemcpy(dB, hB, size, hipMemcpyHostToDevice));
	gpuErrchk(hipMemcpy(dC, hC, size, hipMemcpyHostToDevice));
	gpuErrchk(hipMemcpy(dD, hD, size, hipMemcpyHostToDevice));
	
	//record start of device computation

	// add array in device
	vecAdd<<<block,grid>>>(dA, dB, dC, dD, size_of_array);


	//record end of device computation
	device_end = clock();


	//copy data from device to host
	gpuErrchk(hipMemcpy(hD, dD, size, hipMemcpyDeviceToHost));

	double host_time, device_time;
	host_time = (double)((double)(host_end - host_begin)/(CLOCKS_PER_SEC));
	device_time = (double)((double)(device_end - device_begin)/(CLOCKS_PER_SEC));

	//print the time of host and device computation
	printf("Host computation time: %f\n",host_time);
	printf("Device computation time: %f\n",device_time);

	//display the devation of device and host result
	int sum = 0;
	for(int i=0; i< size_of_array; ++i) sum += hE[i] - hD[i];
	printf("The deviation of host and device result is %d\n",sum);

	//free host memory
	free(hA);
	free(hB);
	free(hC);
	free(hD);
	free(hE);

	//free device memory
	gpuErrchk(hipFree(dA));
	gpuErrchk(hipFree(dB));
	gpuErrchk(hipFree(dC));
	gpuErrchk(hipFree(dD));

	

}

//random number generator
int get_random()
{
	return rand() % 100 + 1;
}


	.text
	.file	"vecAddErrorHandle.hip"
	.globl	_Z21__device_stub__vecAddPiS_S_S_i # -- Begin function _Z21__device_stub__vecAddPiS_S_S_i
	.type	_Z21__device_stub__vecAddPiS_S_S_i,@function
_Z21__device_stub__vecAddPiS_S_S_i:     # @_Z21__device_stub__vecAddPiS_S_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6vecAddPiS_S_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z21__device_stub__vecAddPiS_S_S_i, .Lfunc_end0-_Z21__device_stub__vecAddPiS_S_S_i
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI1_0:
	.quad	0x412e848000000000              # double 1.0E+6
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$.L.str, %edi
	xorl	%eax, %eax
	callq	printf
	leaq	12(%rsp), %rbx
	movl	$.L.str.1, %edi
	movq	%rbx, %rsi
	xorl	%eax, %eax
	callq	__isoc23_scanf
	movl	(%rbx), %eax
	movq	%rax, 80(%rsp)                  # 8-byte Spill
	leal	(,%rax,4), %eax
	movslq	%eax, %rbp
	movq	%rbp, %rdi
	callq	malloc
	movq	%rax, %rbx
	movq	%rbp, %rdi
	callq	malloc
	movq	%rax, %r14
	movq	%rbp, %rdi
	callq	malloc
	movq	%rax, %r15
	movq	%rbp, %rdi
	callq	malloc
	movq	%rax, %r12
	movq	%rbp, %rdi
	callq	malloc
	movq	%rax, %r13
	leaq	48(%rsp), %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_1
# %bb.3:                                # %_Z9gpuAssert10hipError_tPKcib.exit
	leaq	40(%rsp), %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_4
# %bb.5:                                # %_Z9gpuAssert10hipError_tPKcib.exit72
	leaq	32(%rsp), %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_6
# %bb.7:                                # %_Z9gpuAssert10hipError_tPKcib.exit74
	leaq	24(%rsp), %rdi
	movq	%rbp, 16(%rsp)                  # 8-byte Spill
	movq	%rbp, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_46
# %bb.8:                                # %_Z9gpuAssert10hipError_tPKcib.exit76.preheader
	cmpl	$0, 12(%rsp)
	jle	.LBB1_17
# %bb.9:                                # %_Z9gpuAssert10hipError_tPKcib.exit76.preheader137
	xorl	%ebp, %ebp
.LBB1_10:                               # %_Z9gpuAssert10hipError_tPKcib.exit76
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$1374389535, %rax, %rcx         # imm = 0x51EB851F
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$37, %rcx
	addl	%edx, %ecx
	imull	$100, %ecx, %ecx
	negl	%ecx
	addl	%ecx, %eax
	incl	%eax
	movl	%eax, (%rbx,%rbp,4)
	incq	%rbp
	movslq	12(%rsp), %rax
	cmpq	%rax, %rbp
	jl	.LBB1_10
# %bb.11:                               # %.preheader97
	testl	%eax, %eax
	jle	.LBB1_17
# %bb.12:                               # %.lr.ph100.preheader
	xorl	%ebp, %ebp
.LBB1_13:                               # %.lr.ph100
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$1374389535, %rax, %rcx         # imm = 0x51EB851F
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$37, %rcx
	addl	%edx, %ecx
	imull	$100, %ecx, %ecx
	negl	%ecx
	addl	%ecx, %eax
	incl	%eax
	movl	%eax, (%r14,%rbp,4)
	incq	%rbp
	movslq	12(%rsp), %rax
	cmpq	%rax, %rbp
	jl	.LBB1_13
# %bb.14:                               # %.preheader
	testl	%eax, %eax
	jle	.LBB1_17
# %bb.15:                               # %.lr.ph102.preheader
	xorl	%ebp, %ebp
.LBB1_16:                               # %.lr.ph102
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$1374389535, %rax, %rcx         # imm = 0x51EB851F
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$37, %rcx
	addl	%edx, %ecx
	imull	$100, %ecx, %ecx
	negl	%ecx
	addl	%ecx, %eax
	incl	%eax
	movl	%eax, (%r15,%rbp,4)
	incq	%rbp
	movslq	12(%rsp), %rax
	cmpq	%rax, %rbp
	jl	.LBB1_16
.LBB1_17:                               # %._crit_edge
	callq	clock
	movq	%rax, 72(%rsp)                  # 8-byte Spill
	movl	12(%rsp), %eax
	testl	%eax, %eax
	jle	.LBB1_20
# %bb.18:                               # %.lr.ph105.preheader
	xorl	%ecx, %ecx
.LBB1_19:                               # %.lr.ph105
                                        # =>This Inner Loop Header: Depth=1
	movl	(%r14,%rcx,4), %edx
	addl	(%rbx,%rcx,4), %edx
	addl	(%r15,%rcx,4), %edx
	movl	%edx, (%r13,%rcx,4)
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB1_19
.LBB1_20:                               # %._crit_edge106
	callq	clock
	movq	%rax, 56(%rsp)                  # 8-byte Spill
	callq	clock
	movq	%rax, 64(%rsp)                  # 8-byte Spill
	movq	48(%rsp), %rdi
	movq	%rbx, %rsi
	movq	16(%rsp), %rbp                  # 8-byte Reload
	movq	%rbp, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_21
# %bb.22:                               # %_Z9gpuAssert10hipError_tPKcib.exit78
	movq	40(%rsp), %rdi
	movq	%r14, %rsi
	movq	%rbp, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_23
# %bb.24:                               # %_Z9gpuAssert10hipError_tPKcib.exit80
	movq	32(%rsp), %rdi
	movq	%r15, %rsi
	movq	%rbp, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_25
# %bb.26:                               # %_Z9gpuAssert10hipError_tPKcib.exit82
	movq	24(%rsp), %rdi
	movq	%r12, %rsi
	movq	%rbp, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_27
# %bb.28:                               # %_Z9gpuAssert10hipError_tPKcib.exit84
	movq	80(%rsp), %rax                  # 8-byte Reload
	shrl	$10, %eax
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	leaq	(%rax,%rdx), %rdi
	incq	%rdi
	addq	$1024, %rdx                     # imm = 0x400
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_30
# %bb.29:
	movq	48(%rsp), %rdi
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdx
	movq	24(%rsp), %rcx
	movl	12(%rsp), %r8d
	callq	_Z21__device_stub__vecAddPiS_S_S_i
.LBB1_30:
	callq	clock
	movq	%rax, %rbp
	movq	24(%rsp), %rsi
	movq	%r12, %rdi
	movq	16(%rsp), %rdx                  # 8-byte Reload
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_31
# %bb.32:                               # %_Z9gpuAssert10hipError_tPKcib.exit86
	movq	56(%rsp), %rax                  # 8-byte Reload
	subq	72(%rsp), %rax                  # 8-byte Folded Reload
	cvtsi2sd	%rax, %xmm0
	movsd	.LCPI1_0(%rip), %xmm1           # xmm1 = mem[0],zero
	divsd	%xmm1, %xmm0
	subq	64(%rsp), %rbp                  # 8-byte Folded Reload
	cvtsi2sd	%rbp, %xmm2
	divsd	%xmm1, %xmm2
	movsd	%xmm2, 16(%rsp)                 # 8-byte Spill
	movl	$.L.str.3, %edi
	movb	$1, %al
	callq	printf
	movl	$.L.str.4, %edi
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movb	$1, %al
	callq	printf
	movl	12(%rsp), %eax
	testl	%eax, %eax
	jle	.LBB1_33
# %bb.44:                               # %.lr.ph109.preheader
	xorl	%ecx, %ecx
	xorl	%esi, %esi
.LBB1_45:                               # %.lr.ph109
                                        # =>This Inner Loop Header: Depth=1
	addl	(%r13,%rcx,4), %esi
	subl	(%r12,%rcx,4), %esi
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB1_45
	jmp	.LBB1_34
.LBB1_33:
	xorl	%esi, %esi
.LBB1_34:                               # %._crit_edge110
	movl	$.L.str.5, %edi
	xorl	%eax, %eax
	callq	printf
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	movq	%r12, %rdi
	callq	free
	movq	%r13, %rdi
	callq	free
	movq	48(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB1_35
# %bb.37:                               # %_Z9gpuAssert10hipError_tPKcib.exit88
	movq	40(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB1_38
# %bb.39:                               # %_Z9gpuAssert10hipError_tPKcib.exit90
	movq	32(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB1_40
# %bb.41:                               # %_Z9gpuAssert10hipError_tPKcib.exit92
	movq	24(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB1_42
# %bb.43:                               # %_Z9gpuAssert10hipError_tPKcib.exit94
	xorl	%eax, %eax
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB1_1:
	.cfi_def_cfa_offset 144
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	movl	%eax, %ebp
	callq	hipGetErrorString
	movl	$.L.str.6, %esi
	movl	$.L.str.2, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$68, %r8d
	jmp	.LBB1_2
.LBB1_4:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	movl	%eax, %ebp
	callq	hipGetErrorString
	movl	$.L.str.6, %esi
	movl	$.L.str.2, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$69, %r8d
	jmp	.LBB1_2
.LBB1_6:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	movl	%eax, %ebp
	callq	hipGetErrorString
	movl	$.L.str.6, %esi
	movl	$.L.str.2, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$70, %r8d
	jmp	.LBB1_2
.LBB1_46:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %esi
	movl	$.L.str.2, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$71, %r8d
	jmp	.LBB1_2
.LBB1_21:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	movl	%eax, %ebp
	callq	hipGetErrorString
	movl	$.L.str.6, %esi
	movl	$.L.str.2, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$100, %r8d
	jmp	.LBB1_2
.LBB1_23:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	movl	%eax, %ebp
	callq	hipGetErrorString
	movl	$.L.str.6, %esi
	movl	$.L.str.2, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$101, %r8d
	jmp	.LBB1_2
.LBB1_25:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	movl	%eax, %ebp
	callq	hipGetErrorString
	movl	$.L.str.6, %esi
	movl	$.L.str.2, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$102, %r8d
	jmp	.LBB1_2
.LBB1_27:
	movl	%eax, %ebp
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %esi
	movl	$.L.str.2, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$103, %r8d
	jmp	.LBB1_2
.LBB1_31:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	movl	%eax, %ebp
	callq	hipGetErrorString
	movl	$.L.str.6, %esi
	movl	$.L.str.2, %ecx
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$116, %r8d
.LBB1_2:
	xorl	%eax, %eax
	callq	fprintf
	movl	%ebp, %edi
	callq	exit
.LBB1_35:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %esi
	movl	$.L.str.2, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$139, %r8d
	jmp	.LBB1_36
.LBB1_38:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %esi
	movl	$.L.str.2, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$140, %r8d
	jmp	.LBB1_36
.LBB1_40:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %esi
	movl	$.L.str.2, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$141, %r8d
	jmp	.LBB1_36
.LBB1_42:
	movl	%eax, %ebx
	movq	stderr(%rip), %r14
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %esi
	movl	$.L.str.2, %ecx
	movq	%r14, %rdi
	movq	%rax, %rdx
	movl	$142, %r8d
.LBB1_36:
	xorl	%eax, %eax
	callq	fprintf
	movl	%ebx, %edi
	callq	exit
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.globl	_Z10get_randomv                 # -- Begin function _Z10get_randomv
	.type	_Z10get_randomv,@function
_Z10get_randomv:                        # @_Z10get_randomv
	.cfi_startproc
# %bb.0:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	rand
	cltq
	imulq	$1374389535, %rax, %rcx         # imm = 0x51EB851F
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$37, %rcx
	addl	%edx, %ecx
	imull	$100, %ecx, %ecx
	negl	%ecx
	addl	%ecx, %eax
	incl	%eax
	popq	%rcx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z10get_randomv, .Lfunc_end2-_Z10get_randomv
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6vecAddPiS_S_S_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z6vecAddPiS_S_S_i,@object      # @_Z6vecAddPiS_S_S_i
	.section	.rodata,"a",@progbits
	.globl	_Z6vecAddPiS_S_S_i
	.p2align	3, 0x0
_Z6vecAddPiS_S_S_i:
	.quad	_Z21__device_stub__vecAddPiS_S_S_i
	.size	_Z6vecAddPiS_S_S_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Enter the size of array"
	.size	.L.str, 24

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"%d"
	.size	.L.str.1, 3

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/Hemanta-Bhattarai/Self_Learning/master/CUDA/vector_operations/vecAddErrorHandle.hip"
	.size	.L.str.2, 146

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Host computation time: %f\n"
	.size	.L.str.3, 27

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Device computation time: %f\n"
	.size	.L.str.4, 29

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"The deviation of host and device result is %d\n"
	.size	.L.str.5, 47

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"GPUassert : %s %s %d\n"
	.size	.L.str.6, 22

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z6vecAddPiS_S_S_i"
	.size	.L__unnamed_1, 19

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__vecAddPiS_S_S_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z6vecAddPiS_S_S_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z6vecAddPiS_S_S_i      ; -- Begin function _Z6vecAddPiS_S_S_i
	.globl	_Z6vecAddPiS_S_S_i
	.p2align	8
	.type	_Z6vecAddPiS_S_S_i,@function
_Z6vecAddPiS_S_S_i:                     ; @_Z6vecAddPiS_S_S_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x34
	s_load_b32 s3, s[0:1], 0x20
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_mov_b32 s2, exec_lo
	v_cmpx_gt_i32_e64 s3, v1
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_load_b256 s[0:7], s[0:1], 0x0
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v2, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s1, v1, vcc_lo
	v_add_co_u32 v4, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v1, vcc_lo
	v_add_co_u32 v6, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v7, vcc_lo, s5, v1, vcc_lo
	global_load_b32 v2, v[2:3], off
	global_load_b32 v3, v[4:5], off
	global_load_b32 v4, v[6:7], off
	v_add_co_u32 v0, vcc_lo, s6, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo
	s_waitcnt vmcnt(0)
	v_add3_u32 v2, v3, v2, v4
	global_store_b32 v[0:1], v2, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6vecAddPiS_S_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z6vecAddPiS_S_S_i, .Lfunc_end0-_Z6vecAddPiS_S_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 196
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6vecAddPiS_S_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z6vecAddPiS_S_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
