#include <cuda.h>
#include <stdio.h>
#include <stdint.h>
#include <stdlib.h>
#include <time.h>


#define THREADS 32
#define BLOCKS 1
#define N (THREADS*BLOCKS)
#define BIT 32

__host__ void cpuRadixSort(uint32_t* array, uint32_t length)
{
    static uint32_t cpu_temp0[N];
    static uint32_t cpu_temp1[N];

    for(int bit=0;bit<BIT;bit++){
        uint32_t base_cnt0 = 0;
        uint32_t base_cnt1 = 0;

        for(int i=0;i<N;i++){
            const uint32_t elem = array[i];
            const uint32_t bit_mask = (1 << bit);

            if((elem & bit_mask) > 0){
                cpu_temp1[base_cnt1] = elem;
                base_cnt1++;
            }else{
                cpu_temp0[base_cnt0] = elem;
                base_cnt0++;
            }
        }

        for(int i=0;i<base_cnt0;i++){
            array[i] = cpu_temp0[i];
        }
        for(int i=0;i<base_cnt1;i++){
            array[i+base_cnt0] = cpu_temp1[i];
        }
    }
}

__device__ void gpuRadixSort(uint32_t* const array,
                             uint32_t* const sort_tmp0,
                             uint32_t* const sort_tmp1,
                             const uint32_t num_list,
                             const uint32_t num_elements,
                             const uint32_t tid)
{
    for(int bit=0;bit<N;bit++){
        uint32_t base_cnt0 = 0;
        uint32_t base_cnt1 = 0;

        for(int i=0;i<num_elements;i+=num_list){
            const uint32_t elem = array[i + tid];
            const uint32_t bit_mask = (1 << bit);

            if((elem & bit_mask) > 0){
                sort_tmp1[base_cnt1 + tid] = elem;
                base_cnt1+=num_list;
            }else{
                sort_tmp0[base_cnt0 + tid] = elem;
                base_cnt0+=num_list;
            }
        }

        for(int i=0;i<base_cnt0;i+=num_list){
            array[i+tid] = sort_tmp0[i+tid];
        }
        for(int i=0;i<base_cnt1;i+=num_list){
            array[base_cnt0+i+tid] = sort_tmp1[i+tid];
        }

    }
    __syncthreads();
}

__global__ void kernel_RadixSort(uint32_t* array, uint32_t* sort_tmp0, uint32_t* sort_tmp1, uint32_t num_elements){
    uint32_t idx = blockDim.x * blockIdx.x + threadIdx.x;
    gpuRadixSort(array, sort_tmp0, sort_tmp1, (int)BIT, (int)N, idx);
}

int main(int argc, char** argv){
    srand(time(NULL));

    uint32_t* array = (uint32_t*)malloc(N*sizeof(uint32_t));

    for(int i=0;i<N;i++){
        array[i] = rand()%256;
    }

    for(int i=0;i<N;i++){
        printf("%d\n", array[i]);
    }
//  CPU
    // cpuRadixSort(array, N);

//  GPU
    uint32_t* d_array; cudaMalloc((void**)&d_array, N*sizeof(uint32_t));
    uint32_t* d_sort_tmp0; cudaMalloc((void**)&d_sort_tmp0, N*sizeof(uint32_t));
    uint32_t* d_sort_tmp1; cudaMalloc((void**)&d_sort_tmp1, N*sizeof(uint32_t));

    cudaMemcpy(d_array, array, N*sizeof(uint32_t), cudaMemcpyHostToDevice);

    kernel_RadixSort <<<BLOCKS, THREADS>>> (d_array, d_sort_tmp0, d_sort_tmp0, (uint32_t)N);

    cudaMemcpy(array, d_array, N*sizeof(uint32_t), cudaMemcpyDeviceToHost);

    printf("\n\n");


    for(int i=0;i<N;i++){
        printf("%d\n", array[i]);
    }

    cudaFree(d_array);
    cudaFree(d_sort_tmp0);
    cudaFree(d_sort_tmp1);
    free(array);
    return 0;
}

	.file	"tmpxft_00219cca_00000000-6_Main.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2032:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2032:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z12cpuRadixSortPjj
	.type	_Z12cpuRadixSortPjj, @function
_Z12cpuRadixSortPjj:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movq	%rdi, %rdx
	xorl	%ecx, %ecx
	leaq	_ZZ12cpuRadixSortPjjE9cpu_temp0(%rip), %r9
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	leaq	_ZZ12cpuRadixSortPjjE9cpu_temp1(%rip), %r10
	movl	$1, %ebx
.L3:
	movl	%ebx, %r11d
	xorl	%esi, %esi
	xorl	%edi, %edi
	xorl	%eax, %eax
	sall	%cl, %r11d
.L6:
	movl	(%rdx,%rsi,4), %r8d
	testl	%r11d, %r8d
	je	.L4
	movl	%edi, %ebp
	incl	%edi
	movl	%r8d, (%r10,%rbp,4)
	jmp	.L5
.L4:
	movl	%eax, %ebp
	incl	%eax
	movl	%r8d, (%r9,%rbp,4)
.L5:
	incq	%rsi
	cmpq	$32, %rsi
	jne	.L6
	xorl	%esi, %esi
.L7:
	cmpl	%eax, %esi
	jnb	.L15
	movl	(%r9,%rsi,4), %r8d
	movl	%r8d, (%rdx,%rsi,4)
	incq	%rsi
	jmp	.L7
.L15:
	leaq	(%rdx,%rax,4), %rsi
	xorl	%eax, %eax
.L9:
	cmpl	%edi, %eax
	jnb	.L16
	movl	(%r10,%rax,4), %r8d
	movl	%r8d, (%rsi,%rax,4)
	incq	%rax
	jmp	.L9
.L16:
	incl	%ecx
	cmpl	$32, %ecx
	jne	.L3
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z12cpuRadixSortPjj, .-_Z12cpuRadixSortPjj
	.globl	_Z12gpuRadixSortPjS_S_jjj
	.type	_Z12gpuRadixSortPjS_S_jjj, @function
_Z12gpuRadixSortPjS_S_jjj:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2028:
	.size	_Z12gpuRadixSortPjS_S_jjj, .-_Z12gpuRadixSortPjS_S_jjj
	.globl	_Z41__device_stub__Z16kernel_RadixSortPjS_S_jPjS_S_j
	.type	_Z41__device_stub__Z16kernel_RadixSortPjS_S_jPjS_S_j, @function
_Z41__device_stub__Z16kernel_RadixSortPjS_S_jPjS_S_j:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L19
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z16kernel_RadixSortPjS_S_j(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L19:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L21
	call	__stack_chk_fail@PLT
.L21:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z41__device_stub__Z16kernel_RadixSortPjS_S_jPjS_S_j, .-_Z41__device_stub__Z16kernel_RadixSortPjS_S_jPjS_S_j
	.globl	_Z16kernel_RadixSortPjS_S_j
	.type	_Z16kernel_RadixSortPjS_S_j, @function
_Z16kernel_RadixSortPjS_S_j:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z41__device_stub__Z16kernel_RadixSortPjS_S_jPjS_S_j
	.cfi_endproc
.LFE2055:
	.size	_Z16kernel_RadixSortPjS_S_j, .-_Z16kernel_RadixSortPjS_S_j
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"%d\n"
.LC1:
	.string	"\n\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2029:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	xorl	%edi, %edi
	movl	$256, %r12d
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	xorl	%ebp, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$64, %rsp
	.cfi_def_cfa_offset 96
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	time@PLT
	movl	%eax, %edi
	call	srand@PLT
	movl	$128, %edi
	call	malloc@PLT
	movq	%rax, %rbx
.L25:
	call	rand@PLT
	cltd
	idivl	%r12d
	movl	%edx, (%rbx,%rbp,4)
	incq	%rbp
	cmpq	$32, %rbp
	jne	.L25
	xorl	%ebp, %ebp
	leaq	.LC0(%rip), %r12
.L26:
	movl	(%rbx,%rbp,4), %edx
	movq	%r12, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%rbp
	call	__printf_chk@PLT
	cmpq	$32, %rbp
	jne	.L26
	leaq	8(%rsp), %rdi
	movl	$128, %esi
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$128, %esi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$128, %esi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$128, %edx
	call	cudaMemcpy@PLT
	movl	$134217729, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$5, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$4294967297, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L27
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdi
	movl	$32, %ecx
	movq	%rsi, %rdx
	call	_Z41__device_stub__Z16kernel_RadixSortPjS_S_jPjS_S_j
.L27:
	movq	8(%rsp), %rsi
	movl	$2, %ecx
	movq	%rbx, %rdi
	xorl	%ebp, %ebp
	movl	$128, %edx
	call	cudaMemcpy@PLT
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L28:
	movl	(%rbx,%rbp,4), %edx
	movq	%r12, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%rbp
	call	__printf_chk@PLT
	cmpq	$32, %rbp
	jne	.L28
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L29
	call	__stack_chk_fail@PLT
.L29:
	addq	$64, %rsp
	.cfi_def_cfa_offset 32
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	main, .-main
	.section	.rodata.str1.1
.LC2:
	.string	"_Z16kernel_RadixSortPjS_S_j"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2057:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC2(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z16kernel_RadixSortPjS_S_j(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2057:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZZ12cpuRadixSortPjjE9cpu_temp1
	.comm	_ZZ12cpuRadixSortPjjE9cpu_temp1,128,32
	.local	_ZZ12cpuRadixSortPjjE9cpu_temp0
	.comm	_ZZ12cpuRadixSortPjjE9cpu_temp0,128,32
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdint.h>
#include <stdlib.h>
#include <time.h>


#define THREADS 32
#define BLOCKS 1
#define N (THREADS*BLOCKS)
#define BIT 32

__host__ void cpuRadixSort(uint32_t* array, uint32_t length)
{
    static uint32_t cpu_temp0[N];
    static uint32_t cpu_temp1[N];

    for(int bit=0;bit<BIT;bit++){
        uint32_t base_cnt0 = 0;
        uint32_t base_cnt1 = 0;

        for(int i=0;i<N;i++){
            const uint32_t elem = array[i];
            const uint32_t bit_mask = (1 << bit);

            if((elem & bit_mask) > 0){
                cpu_temp1[base_cnt1] = elem;
                base_cnt1++;
            }else{
                cpu_temp0[base_cnt0] = elem;
                base_cnt0++;
            }
        }

        for(int i=0;i<base_cnt0;i++){
            array[i] = cpu_temp0[i];
        }
        for(int i=0;i<base_cnt1;i++){
            array[i+base_cnt0] = cpu_temp1[i];
        }
    }
}

__device__ void gpuRadixSort(uint32_t* const array,
                             uint32_t* const sort_tmp0,
                             uint32_t* const sort_tmp1,
                             const uint32_t num_list,
                             const uint32_t num_elements,
                             const uint32_t tid)
{
    for(int bit=0;bit<N;bit++){
        uint32_t base_cnt0 = 0;
        uint32_t base_cnt1 = 0;

        for(int i=0;i<num_elements;i+=num_list){
            const uint32_t elem = array[i + tid];
            const uint32_t bit_mask = (1 << bit);

            if((elem & bit_mask) > 0){
                sort_tmp1[base_cnt1 + tid] = elem;
                base_cnt1+=num_list;
            }else{
                sort_tmp0[base_cnt0 + tid] = elem;
                base_cnt0+=num_list;
            }
        }

        for(int i=0;i<base_cnt0;i+=num_list){
            array[i+tid] = sort_tmp0[i+tid];
        }
        for(int i=0;i<base_cnt1;i+=num_list){
            array[base_cnt0+i+tid] = sort_tmp1[i+tid];
        }

    }
    __syncthreads();
}

__global__ void kernel_RadixSort(uint32_t* array, uint32_t* sort_tmp0, uint32_t* sort_tmp1, uint32_t num_elements){
    uint32_t idx = blockDim.x * blockIdx.x + threadIdx.x;
    gpuRadixSort(array, sort_tmp0, sort_tmp1, (int)BIT, (int)N, idx);
}

int main(int argc, char** argv){
    srand(time(NULL));

    uint32_t* array = (uint32_t*)malloc(N*sizeof(uint32_t));

    for(int i=0;i<N;i++){
        array[i] = rand()%256;
    }

    for(int i=0;i<N;i++){
        printf("%d\n", array[i]);
    }
//  CPU
    // cpuRadixSort(array, N);

//  GPU
    uint32_t* d_array; hipMalloc((void**)&d_array, N*sizeof(uint32_t));
    uint32_t* d_sort_tmp0; hipMalloc((void**)&d_sort_tmp0, N*sizeof(uint32_t));
    uint32_t* d_sort_tmp1; hipMalloc((void**)&d_sort_tmp1, N*sizeof(uint32_t));

    hipMemcpy(d_array, array, N*sizeof(uint32_t), hipMemcpyHostToDevice);

    kernel_RadixSort <<<BLOCKS, THREADS>>> (d_array, d_sort_tmp0, d_sort_tmp0, (uint32_t)N);

    hipMemcpy(array, d_array, N*sizeof(uint32_t), hipMemcpyDeviceToHost);

    printf("\n\n");


    for(int i=0;i<N;i++){
        printf("%d\n", array[i]);
    }

    hipFree(d_array);
    hipFree(d_sort_tmp0);
    hipFree(d_sort_tmp1);
    free(array);
    return 0;
}

	.text
	.file	"Main.hip"
	.globl	_Z12cpuRadixSortPjj             # -- Begin function _Z12cpuRadixSortPjj
	.type	_Z12cpuRadixSortPjj,@function
_Z12cpuRadixSortPjj:                    # @_Z12cpuRadixSortPjj
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdi, %rbx
	xorl	%r14d, %r14d
.LBB0_1:                                # %.preheader34
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB0_2 Depth 2
                                        #     Child Loop BB0_8 Depth 2
	movl	$1, %eax
	movl	%r14d, %ecx
	shll	%cl, %eax
	xorl	%edx, %edx
	xorl	%ebp, %ebp
	xorl	%ecx, %ecx
.LBB0_2:                                #   Parent Loop BB0_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	(%rbx,%rdx,4), %esi
	testl	%eax, %esi
	je	.LBB0_11
# %bb.3:                                #   in Loop: Header=BB0_2 Depth=2
	movl	%ebp, %edi
	movl	%esi, _ZZ12cpuRadixSortPjjE9cpu_temp1(,%rdi,4)
	incl	%ebp
	jmp	.LBB0_12
.LBB0_11:                               #   in Loop: Header=BB0_2 Depth=2
	movl	%ecx, %edi
	movl	%esi, _ZZ12cpuRadixSortPjjE9cpu_temp0(,%rdi,4)
	incl	%ecx
.LBB0_12:                               #   in Loop: Header=BB0_2 Depth=2
	incq	%rdx
	cmpq	$32, %rdx
	jne	.LBB0_2
# %bb.4:                                # %.preheader33
                                        #   in Loop: Header=BB0_1 Depth=1
	movl	%ecx, %r15d
	testl	%ecx, %ecx
	je	.LBB0_6
# %bb.5:                                # %.lr.ph.preheader
                                        #   in Loop: Header=BB0_1 Depth=1
	leaq	(,%r15,4), %rdx
	movl	$_ZZ12cpuRadixSortPjjE9cpu_temp0, %esi
	movq	%rbx, %rdi
	callq	memcpy@PLT
.LBB0_6:                                # %.preheader
                                        #   in Loop: Header=BB0_1 Depth=1
	testl	%ebp, %ebp
	je	.LBB0_9
# %bb.7:                                # %.lr.ph40.preheader
                                        #   in Loop: Header=BB0_1 Depth=1
	movl	%ebp, %eax
	xorl	%ecx, %ecx
.LBB0_8:                                # %.lr.ph40
                                        #   Parent Loop BB0_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	_ZZ12cpuRadixSortPjjE9cpu_temp1(,%rcx,4), %edx
	leal	(%r15,%rcx), %esi
	movl	%edx, (%rbx,%rsi,4)
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB0_8
.LBB0_9:                                # %._crit_edge
                                        #   in Loop: Header=BB0_1 Depth=1
	incl	%r14d
	cmpl	$32, %r14d
	jne	.LBB0_1
# %bb.10:
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z12cpuRadixSortPjj, .Lfunc_end0-_Z12cpuRadixSortPjj
	.cfi_endproc
                                        # -- End function
	.globl	_Z31__device_stub__kernel_RadixSortPjS_S_j # -- Begin function _Z31__device_stub__kernel_RadixSortPjS_S_j
	.type	_Z31__device_stub__kernel_RadixSortPjS_S_j,@function
_Z31__device_stub__kernel_RadixSortPjS_S_j: # @_Z31__device_stub__kernel_RadixSortPjS_S_j
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16kernel_RadixSortPjS_S_j, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z31__device_stub__kernel_RadixSortPjS_S_j, .Lfunc_end1-_Z31__device_stub__kernel_RadixSortPjS_S_j
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	subq	$24, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	xorl	%r14d, %r14d
	xorl	%edi, %edi
	callq	time
	movl	%eax, %edi
	callq	srand
	movl	$128, %edi
	callq	malloc
	movq	%rax, %rbx
.LBB2_1:                                # =>This Inner Loop Header: Depth=1
	callq	rand
                                        # kill: def $eax killed $eax def $rax
	leal	255(%rax), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	andl	$-256, %ecx
	subl	%ecx, %eax
	movl	%eax, (%rbx,%r14,4)
	incq	%r14
	cmpq	$32, %r14
	jne	.LBB2_1
# %bb.2:                                # %.preheader.preheader
	xorl	%r14d, %r14d
.LBB2_3:                                # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	movl	(%rbx,%r14,4), %esi
	movl	$.L.str, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%r14
	cmpq	$32, %r14
	jne	.LBB2_3
# %bb.4:
	movq	%rsp, %r14
	movl	$128, %esi
	movq	%r14, %rdi
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movl	$128, %esi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movl	$128, %esi
	callq	hipMalloc
	movq	(%r14), %rdi
	movl	$128, %edx
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movabsq	$4294967297, %rdi               # imm = 0x100000001
	leaq	31(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_6
# %bb.5:
	movq	(%rsp), %rdi
	movq	8(%rsp), %rdx
	movq	%rdx, %rsi
	movl	$32, %ecx
	callq	_Z31__device_stub__kernel_RadixSortPjS_S_j
.LBB2_6:
	movq	(%rsp), %rsi
	movl	$128, %edx
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	$.Lstr, %edi
	callq	puts@PLT
	xorl	%r14d, %r14d
.LBB2_7:                                # =>This Inner Loop Header: Depth=1
	movl	(%rbx,%r14,4), %esi
	movl	$.L.str, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%r14
	cmpq	$32, %r14
	jne	.LBB2_7
# %bb.8:
	movq	(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	free
	xorl	%eax, %eax
	addq	$24, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16kernel_RadixSortPjS_S_j, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_ZZ12cpuRadixSortPjjE9cpu_temp0,@object # @_ZZ12cpuRadixSortPjjE9cpu_temp0
	.local	_ZZ12cpuRadixSortPjjE9cpu_temp0
	.comm	_ZZ12cpuRadixSortPjjE9cpu_temp0,128,16
	.type	_ZZ12cpuRadixSortPjjE9cpu_temp1,@object # @_ZZ12cpuRadixSortPjjE9cpu_temp1
	.local	_ZZ12cpuRadixSortPjjE9cpu_temp1
	.comm	_ZZ12cpuRadixSortPjjE9cpu_temp1,128,16
	.type	_Z16kernel_RadixSortPjS_S_j,@object # @_Z16kernel_RadixSortPjS_S_j
	.section	.rodata,"a",@progbits
	.globl	_Z16kernel_RadixSortPjS_S_j
	.p2align	3, 0x0
_Z16kernel_RadixSortPjS_S_j:
	.quad	_Z31__device_stub__kernel_RadixSortPjS_S_j
	.size	_Z16kernel_RadixSortPjS_S_j, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"%d\n"
	.size	.L.str, 4

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z16kernel_RadixSortPjS_S_j"
	.size	.L__unnamed_1, 28

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"\n"
	.size	.Lstr, 2

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z31__device_stub__kernel_RadixSortPjS_S_j
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z16kernel_RadixSortPjS_S_j
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z16kernel_RadixSortPjS_S_j ; -- Begin function _Z16kernel_RadixSortPjS_S_j
	.globl	_Z16kernel_RadixSortPjS_S_j
	.p2align	8
	.type	_Z16kernel_RadixSortPjS_S_j,@function
_Z16kernel_RadixSortPjS_S_j:            ; @_Z16kernel_RadixSortPjS_S_j
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	v_mov_b32_e32 v6, s6
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v5, s7
	s_mov_b32 s2, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	v_add_co_u32 v2, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo
	global_load_b32 v4, v[2:3], off
.LBB0_1:                                ; %.preheader51.i
                                        ; =>This Inner Loop Header: Depth=1
	s_waitcnt vmcnt(0)
	v_bfe_u32 v7, v4, s2, 1
	s_add_i32 s2, s2, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_lg_u32 s2, 32
	v_cmp_eq_u32_e32 vcc_lo, 0, v7
	v_cndmask_b32_e32 v7, s0, v6, vcc_lo
	v_cndmask_b32_e32 v8, s1, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v7, vcc_lo, v7, v0
	v_add_co_ci_u32_e32 v8, vcc_lo, v8, v1, vcc_lo
	global_store_b32 v[7:8], v4, off
	global_store_b32 v[2:3], v4, off
	s_cbranch_scc1 .LBB0_1
; %bb.2:                                ; %_Z12gpuRadixSortPjS_S_jjj.exit
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16kernel_RadixSortPjS_S_j
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z16kernel_RadixSortPjS_S_j, .Lfunc_end0-_Z16kernel_RadixSortPjS_S_j
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 192
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z16kernel_RadixSortPjS_S_j
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z16kernel_RadixSortPjS_S_j.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
