#include <iostream>
#include <cuda_runtime_api.h>
#include <chrono>

//#define DEBUG_DEV

#ifdef DEBUG_DEV
#define getErrorCuda(command)\
        command;\
        cudaDeviceSynchronize();\
        cudaThreadSynchronize();\
        if (cudaPeekAtLastError() != cudaSuccess){\
            std::cout << #command << " : " << cudaGetErrorString(cudaGetLastError())\
             << " in file " << __FILE__ << " at line " << __LINE__ << std::endl;\
            exit(1);\
        }
#endif
#ifndef DEBUG_DEV
#define getErrorCuda(command) command;
#endif

__constant__ float const_stencilWeight[21];


// base case
__global__ void stencil(float *src, float *dst, int size, float *stencilWeight)
{
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    idx += 11;
    if (idx >= size)
        return;
    float out = 0;
    #pragma unroll
    for(int i = -10;i <= 10; i++)
    {
        out += src[idx+i] * stencilWeight[i+10];
    }
    dst[idx] = out;
}

// read only cache stencil coefficients
__global__ void stencilReadOnly1(float *src, float *dst, int size, float* stencilWeight)
{
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    idx += 11;
    if (idx >= size)
        return;
    float out = 0;
    #pragma unroll
    for(int i = -10;i <= 10; i++)
    {
        out += src[idx+i] * __ldg(&stencilWeight[i+10]);
    }
    dst[idx] = out;
}

// read only data
__global__ void stencilReadOnly2(float *src, float *dst, int size, float* stencilWeight)
{
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    idx += 11;
    if (idx >= size)
        return;
    float out = 0;
    #pragma unroll
    for(int i = -10;i <= 10; i++)
    {
        out += __ldg(&src[idx+i]) * stencilWeight[i+10];
    }
    dst[idx] = out;
}

// read only coefficients and data
__global__ void stencilReadOnly3(float *src, float *dst, int size, float* stencilWeight)
{
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    idx += 11;
    if (idx >= size)
        return;
    float out = 0;
    #pragma unroll
    for(int i = -10;i <= 10; i++)
    {
        out += __ldg(&src[idx+i]) * __ldg(&stencilWeight[i+10]);
    }
    dst[idx] = out;
}

// constat memory coefficients
__global__ void stencilConst1(float *src, float *dst, int size)
{
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    idx += 11;
    if (idx >= size)
        return;
    float out = 0;
    #pragma unroll
    for(int i = -10;i <= 10; i++)
    {
        out += src[idx+i] * const_stencilWeight[i+10];
    }
    dst[idx] = out;
}

// constant memory coefficients and data through read only cache
__global__ void stencilConst2(float *src, float *dst, int size)
{
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    idx += 11;
    if (idx >= size)
        return;
    float out = 0;
    #pragma unroll
    for(int i = -10;i <= 10; i++)
    {
        out += __ldg(&src[idx+i]) * const_stencilWeight[i+10];
    }
    dst[idx] = out;
}

// constant memory coefficients and data from shared
__global__ void stencilShared1(float *src, float *dst, int size)
{
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    __shared__ float buffer[1024+21];
    for(int i = threadIdx.x; i < 1024+21; i = i + 1024)
    {
        buffer[i] = src[idx+i];
    }
    idx += 11;
    if (idx >= size)
        return;
   
    __syncthreads();
    float out = 0;
    #pragma unroll
    for(int i = -10;i <= 10; i++)
    {
        out += buffer[threadIdx.x+10+i] * const_stencilWeight[i+10];
    }
    dst[idx] = out;
}

// constant memory coefficients and data from shared thorugh read only
__global__ void stencilShared2(float *src, float *dst, int size)
{
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    __shared__ float buffer[1024+21];
    for(int i = threadIdx.x; i < 1024+21; i = i + 1024)
    {
        buffer[i] = __ldg(&src[idx+i]);
    }
    idx += 11;
    if (idx >= size)
        return;
   
    __syncthreads();
    float out = 0;
    #pragma unroll
    for(int i = -10;i <= 10; i++)
    {
        out += buffer[threadIdx.x+10+i] * const_stencilWeight[i+10];
    }
    dst[idx] = out;
}

void verify(float *arr, float *corr, int count)
{
    for(int i = 40; i < count; i++)
    {
        if(arr[i] != corr[i])
        {
            std::cout << "error verifying resutls" << std::endl;
            exit(1);
        }
    }
}

int main()
{
    float *a;
    float *b;
    float *bOut;
    float *bCorr;
    float *weights;
    getErrorCuda(cudaMalloc(&a, sizeof(float)*102400000));
    getErrorCuda(cudaMalloc(&b, sizeof(float)*102400000));
    getErrorCuda(cudaMallocHost(&bOut, sizeof(float)*102400000));
    getErrorCuda(cudaMallocManaged(&bCorr, sizeof(float)*102400000));
    getErrorCuda(cudaMallocManaged(&weights, sizeof(float)*21));

    cudaDeviceSynchronize();   

    for(int i = 0; i < 102400000;i++)
    {
        //a[i] = 0;
        //b[i] = 0;
        bCorr[i] = 0;
    }
    cudaDeviceSynchronize();   
   
    int blockSize = 1024;
    int blocks = 10000;
    for(int i = 0; i < 21;i++)
        weights[i] = i-10;
   
   
    cudaDeviceSynchronize();   
   
    cudaMemcpyToSymbol(const_stencilWeight, weights, sizeof(float)*21);

    stencil<<<blocks, blockSize>>>(a, bCorr, 10240000-11, weights);
    cudaDeviceSynchronize();   

    stencil<<<blocks, blockSize>>>(a, b, 10240000-11, weights);
    cudaDeviceSynchronize();
    getErrorCuda(cudaMemcpy(bOut, b, sizeof(float)*10240000, cudaMemcpyDefault));
    verify(bOut, bCorr, 1000);

    cudaSetDevice(0);


    float minTime = 10000;
    for(int i  = 0; i < 100; i++)
    {
        std::chrono::time_point<std::chrono::system_clock> start, end;
        start = std::chrono::system_clock::now();
        stencil<<<blocks, blockSize>>>(a, b, 10240000-11, weights);
        cudaDeviceSynchronize();   
        end = std::chrono::system_clock::now();
       
        getErrorCuda(cudaMemcpy(bOut, b, sizeof(float)*10240000, cudaMemcpyDefault));
        verify(bOut, bCorr, 1000); 

        std::chrono::duration<float> elapsed_seconds = end-start;
        minTime = std::min(elapsed_seconds.count(), minTime);
    }
    std::cout << "Non optimized time " << (blockSize*blocks)/minTime << " elem/s" << " Read BW " << (21*blockSize*blocks*sizeof(float)/1000.0/1000.0/1000.0 )/minTime << " GB/s" <<   std::endl;
    minTime = 10000;
    std::cout << std::endl;

    for(int i  = 0; i < 100; i++)
    {
        cudaDeviceSynchronize(); 
        std::chrono::time_point<std::chrono::system_clock> start, end;
        start = std::chrono::system_clock::now();
        stencilReadOnly1<<<blocks, blockSize>>>(a, b, 10240000-11, weights);
        cudaDeviceSynchronize(); 
        end = std::chrono::system_clock::now();
       
        getErrorCuda(cudaMemcpy(bOut, b, sizeof(float)*10240000, cudaMemcpyDefault));
        verify(bOut, bCorr, 1000); 
       
        std::chrono::duration<float> elapsed_seconds = end-start;
        minTime = std::min(elapsed_seconds.count(), minTime);
    }
    std::cout << "read only cache stencil coefficients time " <<(blockSize*blocks)/minTime << " elem/s" << " Read BW " << (21*blockSize*blocks*sizeof(float)/1000.0/1000.0/1000.0 )/minTime << " GB/s" <<   std::endl;
    minTime = 10000;
    for(int i  = 0; i < 100; i++)
    {
        cudaDeviceSynchronize(); 
        std::chrono::time_point<std::chrono::system_clock> start, end;
        start = std::chrono::system_clock::now();
        stencilReadOnly2<<<blocks, blockSize>>>(a, b, 10240000-11, weights);
        cudaDeviceSynchronize(); 
        end = std::chrono::system_clock::now();
       
        getErrorCuda(cudaMemcpy(bOut, b, sizeof(float)*10240000, cudaMemcpyDefault));
        verify(bOut, bCorr, 1000); 
       
        std::chrono::duration<float> elapsed_seconds = end-start;
        minTime = std::min(elapsed_seconds.count(), minTime);
    }
    std::cout << "read only data time " << (blockSize*blocks)/minTime << " elem/s" << " Read BW " << (21*blockSize*blocks*sizeof(float)/1000.0/1000.0/1000.0 )/minTime << " GB/s" <<   std::endl;
    minTime = 10000;
        for(int i  = 0; i < 100; i++)
    {
        cudaDeviceSynchronize(); 
        std::chrono::time_point<std::chrono::system_clock> start, end;
        start = std::chrono::system_clock::now();
        stencilReadOnly3<<<blocks, blockSize>>>(a, b, 10240000-11, weights);
        cudaDeviceSynchronize(); 
        end = std::chrono::system_clock::now();
       
        getErrorCuda(cudaMemcpy(bOut, b, sizeof(float)*10240000, cudaMemcpyDefault));
        verify(bOut, bCorr, 1000); 
       
        std::chrono::duration<float> elapsed_seconds = end-start;
        minTime = std::min(elapsed_seconds.count(), minTime);
    }
    std::cout << "read only coefficients and data time " << (blockSize*blocks)/minTime << " elem/s" << " Read BW " << (21*blockSize*blocks*sizeof(float)/1000.0/1000.0/1000.0 )/minTime << " GB/s" <<   std::endl;
    minTime = 10000;

    std::cout << std::endl;

        for(int i  = 0; i < 100; i++)
    {
        cudaDeviceSynchronize(); 
       
        std::chrono::time_point<std::chrono::system_clock> start, end;
        start = std::chrono::system_clock::now();
        stencilConst1<<<blocks, blockSize>>>(a, b, 10240000);
        cudaDeviceSynchronize();   
        end = std::chrono::system_clock::now();

        getErrorCuda(cudaMemcpy(bOut, b, sizeof(float)*10240000, cudaMemcpyDefault));
        verify(bOut, bCorr, 1000); 
        std::chrono::duration<float> elapsed_seconds = end-start;
        minTime = std::min(elapsed_seconds.count(), minTime);
    }
    std::cout << "constant memory coefficients " << (blockSize*blocks)/minTime << " elem/s" << " Read BW " << (21*blockSize*blocks*sizeof(float)/1000.0/1000.0/1000.0 )/minTime << " GB/s" <<   std::endl;

    minTime = 10000;


        for(int i  = 0; i < 100; i++)
    {
        cudaDeviceSynchronize(); 
       
        std::chrono::time_point<std::chrono::system_clock> start, end;
        start = std::chrono::system_clock::now();
        stencilConst2<<<blocks, blockSize>>>(a, b, 10240000);
        cudaDeviceSynchronize();   
        end = std::chrono::system_clock::now();

        getErrorCuda(cudaMemcpy(bOut, b, sizeof(float)*10240000, cudaMemcpyDefault));
        verify(bOut, bCorr, 1000); 
        std::chrono::duration<float> elapsed_seconds = end-start;
        minTime = std::min(elapsed_seconds.count(), minTime);
    }
    std::cout << "constant memory coefficients and data through read only cache time " << (blockSize*blocks)/minTime << " elem/s" << " Read BW " << (21*blockSize*blocks*sizeof(float)/1000.0/1000.0/1000.0 )/minTime << " GB/s" <<   std::endl;
    std::cout << std::endl;


    minTime = 10000;
            for(int i  = 0; i < 100; i++)
    {
        cudaDeviceSynchronize(); 
       
        std::chrono::time_point<std::chrono::system_clock> start, end;
        start = std::chrono::system_clock::now();
        stencilShared1<<<blocks, blockSize>>>(a, b, 10240000);
        cudaDeviceSynchronize();   
        end = std::chrono::system_clock::now();
       
        getErrorCuda(cudaMemcpy(bOut, b, sizeof(float)*10240000, cudaMemcpyDefault));
        verify(bOut, bCorr, 1000); 
        std::chrono::duration<float> elapsed_seconds = end-start;
        minTime = std::min(elapsed_seconds.count(), minTime);
    }
    std::cout << "constant memory coefficients and data from shared time " << (blockSize*blocks)/minTime << " elem/s" << " Read BW " << (21*blockSize*blocks*sizeof(float)/1000.0/1000.0/1000.0 )/minTime << " GB/s" <<   std::endl;
    minTime = 10000;
        minTime = 10000;
            for(int i  = 0; i < 100; i++)
    {
        cudaDeviceSynchronize(); 
       
        std::chrono::time_point<std::chrono::system_clock> start, end;
        start = std::chrono::system_clock::now();
        stencilShared2<<<blocks, blockSize>>>(a, b, 10240000);
        cudaDeviceSynchronize();   
        end = std::chrono::system_clock::now();
       
        getErrorCuda(cudaMemcpy(bOut, b, sizeof(float)*10240000, cudaMemcpyDefault));
        verify(bOut, bCorr, 1000); 
        std::chrono::duration<float> elapsed_seconds = end-start;
        minTime = std::min(elapsed_seconds.count(), minTime);
    }
    std::cout << "constant memory coefficients and data from shared thorugh read only time " << (blockSize*blocks)/minTime << " elem/s" << " Read BW " << (21*blockSize*blocks*sizeof(float)/1000.0/1000.0/1000.0 )/minTime << " GB/s" <<   std::endl;
    minTime = 10000;


}

	.file	"tmpxft_0024232d_00000000-6_stencil.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3746:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3746:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.align 2
	.type	_ZNSolsEPFRSoS_E.isra.0, @function
_ZNSolsEPFRSoS_E.isra.0:
.LFB4474:
	.cfi_startproc
	jmp	*%rsi
	.cfi_endproc
.LFE4474:
	.size	_ZNSolsEPFRSoS_E.isra.0, .-_ZNSolsEPFRSoS_E.isra.0
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"error verifying resutls"
	.text
	.globl	_Z6verifyPfS_i
	.type	_Z6verifyPfS_i, @function
_Z6verifyPfS_i:
.LFB3734:
	.cfi_startproc
	endbr64
	movl	$40, %eax
.L4:
	cmpl	%eax, %edx
	jle	.L12
	movss	(%rdi,%rax,4), %xmm0
	incq	%rax
	ucomiss	-4(%rsi,%rax,4), %xmm0
	jp	.L7
	je	.L4
.L7:
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	.LC0(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movl	$1, %edi
	call	exit@PLT
.L12:
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3734:
	.size	_Z6verifyPfS_i, .-_Z6verifyPfS_i
	.globl	_Z31__device_stub__Z7stencilPfS_iS_PfS_iS_
	.type	_Z31__device_stub__Z7stencilPfS_iS_PfS_iS_, @function
_Z31__device_stub__Z7stencilPfS_iS_PfS_iS_:
.LFB3768:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L13
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z7stencilPfS_iS_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L13:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L15
	call	__stack_chk_fail@PLT
.L15:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3768:
	.size	_Z31__device_stub__Z7stencilPfS_iS_PfS_iS_, .-_Z31__device_stub__Z7stencilPfS_iS_PfS_iS_
	.globl	_Z7stencilPfS_iS_
	.type	_Z7stencilPfS_iS_, @function
_Z7stencilPfS_iS_:
.LFB3769:
	.cfi_startproc
	endbr64
	jmp	_Z31__device_stub__Z7stencilPfS_iS_PfS_iS_
	.cfi_endproc
.LFE3769:
	.size	_Z7stencilPfS_iS_, .-_Z7stencilPfS_iS_
	.globl	_Z41__device_stub__Z16stencilReadOnly1PfS_iS_PfS_iS_
	.type	_Z41__device_stub__Z16stencilReadOnly1PfS_iS_PfS_iS_, @function
_Z41__device_stub__Z16stencilReadOnly1PfS_iS_PfS_iS_:
.LFB3770:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L18
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z16stencilReadOnly1PfS_iS_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L18:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L20
	call	__stack_chk_fail@PLT
.L20:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3770:
	.size	_Z41__device_stub__Z16stencilReadOnly1PfS_iS_PfS_iS_, .-_Z41__device_stub__Z16stencilReadOnly1PfS_iS_PfS_iS_
	.globl	_Z16stencilReadOnly1PfS_iS_
	.type	_Z16stencilReadOnly1PfS_iS_, @function
_Z16stencilReadOnly1PfS_iS_:
.LFB3771:
	.cfi_startproc
	endbr64
	jmp	_Z41__device_stub__Z16stencilReadOnly1PfS_iS_PfS_iS_
	.cfi_endproc
.LFE3771:
	.size	_Z16stencilReadOnly1PfS_iS_, .-_Z16stencilReadOnly1PfS_iS_
	.globl	_Z41__device_stub__Z16stencilReadOnly2PfS_iS_PfS_iS_
	.type	_Z41__device_stub__Z16stencilReadOnly2PfS_iS_PfS_iS_, @function
_Z41__device_stub__Z16stencilReadOnly2PfS_iS_PfS_iS_:
.LFB3772:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L23
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z16stencilReadOnly2PfS_iS_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L23:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L25
	call	__stack_chk_fail@PLT
.L25:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3772:
	.size	_Z41__device_stub__Z16stencilReadOnly2PfS_iS_PfS_iS_, .-_Z41__device_stub__Z16stencilReadOnly2PfS_iS_PfS_iS_
	.globl	_Z16stencilReadOnly2PfS_iS_
	.type	_Z16stencilReadOnly2PfS_iS_, @function
_Z16stencilReadOnly2PfS_iS_:
.LFB3773:
	.cfi_startproc
	endbr64
	jmp	_Z41__device_stub__Z16stencilReadOnly2PfS_iS_PfS_iS_
	.cfi_endproc
.LFE3773:
	.size	_Z16stencilReadOnly2PfS_iS_, .-_Z16stencilReadOnly2PfS_iS_
	.globl	_Z41__device_stub__Z16stencilReadOnly3PfS_iS_PfS_iS_
	.type	_Z41__device_stub__Z16stencilReadOnly3PfS_iS_PfS_iS_, @function
_Z41__device_stub__Z16stencilReadOnly3PfS_iS_PfS_iS_:
.LFB3774:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	40(%rsp), %rdx
	movq	%rcx, (%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L28
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z16stencilReadOnly3PfS_iS_(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L28:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L30
	call	__stack_chk_fail@PLT
.L30:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3774:
	.size	_Z41__device_stub__Z16stencilReadOnly3PfS_iS_PfS_iS_, .-_Z41__device_stub__Z16stencilReadOnly3PfS_iS_PfS_iS_
	.globl	_Z16stencilReadOnly3PfS_iS_
	.type	_Z16stencilReadOnly3PfS_iS_, @function
_Z16stencilReadOnly3PfS_iS_:
.LFB3775:
	.cfi_startproc
	endbr64
	jmp	_Z41__device_stub__Z16stencilReadOnly3PfS_iS_PfS_iS_
	.cfi_endproc
.LFE3775:
	.size	_Z16stencilReadOnly3PfS_iS_, .-_Z16stencilReadOnly3PfS_iS_
	.globl	_Z36__device_stub__Z13stencilConst1PfS_iPfS_i
	.type	_Z36__device_stub__Z13stencilConst1PfS_iPfS_i, @function
_Z36__device_stub__Z13stencilConst1PfS_iPfS_i:
.LFB3776:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L33
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z13stencilConst1PfS_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L33:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L35
	call	__stack_chk_fail@PLT
.L35:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3776:
	.size	_Z36__device_stub__Z13stencilConst1PfS_iPfS_i, .-_Z36__device_stub__Z13stencilConst1PfS_iPfS_i
	.globl	_Z13stencilConst1PfS_i
	.type	_Z13stencilConst1PfS_i, @function
_Z13stencilConst1PfS_i:
.LFB3777:
	.cfi_startproc
	endbr64
	jmp	_Z36__device_stub__Z13stencilConst1PfS_iPfS_i
	.cfi_endproc
.LFE3777:
	.size	_Z13stencilConst1PfS_i, .-_Z13stencilConst1PfS_i
	.globl	_Z36__device_stub__Z13stencilConst2PfS_iPfS_i
	.type	_Z36__device_stub__Z13stencilConst2PfS_iPfS_i, @function
_Z36__device_stub__Z13stencilConst2PfS_iPfS_i:
.LFB3778:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L38
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z13stencilConst2PfS_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L38:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L40
	call	__stack_chk_fail@PLT
.L40:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3778:
	.size	_Z36__device_stub__Z13stencilConst2PfS_iPfS_i, .-_Z36__device_stub__Z13stencilConst2PfS_iPfS_i
	.globl	_Z13stencilConst2PfS_i
	.type	_Z13stencilConst2PfS_i, @function
_Z13stencilConst2PfS_i:
.LFB3779:
	.cfi_startproc
	endbr64
	jmp	_Z36__device_stub__Z13stencilConst2PfS_iPfS_i
	.cfi_endproc
.LFE3779:
	.size	_Z13stencilConst2PfS_i, .-_Z13stencilConst2PfS_i
	.globl	_Z37__device_stub__Z14stencilShared1PfS_iPfS_i
	.type	_Z37__device_stub__Z14stencilShared1PfS_iPfS_i, @function
_Z37__device_stub__Z14stencilShared1PfS_iPfS_i:
.LFB3780:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L43
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z14stencilShared1PfS_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L43:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L45
	call	__stack_chk_fail@PLT
.L45:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3780:
	.size	_Z37__device_stub__Z14stencilShared1PfS_iPfS_i, .-_Z37__device_stub__Z14stencilShared1PfS_iPfS_i
	.globl	_Z14stencilShared1PfS_i
	.type	_Z14stencilShared1PfS_i, @function
_Z14stencilShared1PfS_i:
.LFB3781:
	.cfi_startproc
	endbr64
	jmp	_Z37__device_stub__Z14stencilShared1PfS_iPfS_i
	.cfi_endproc
.LFE3781:
	.size	_Z14stencilShared1PfS_i, .-_Z14stencilShared1PfS_i
	.globl	_Z37__device_stub__Z14stencilShared2PfS_iPfS_i
	.type	_Z37__device_stub__Z14stencilShared2PfS_iPfS_i, @function
_Z37__device_stub__Z14stencilShared2PfS_iPfS_i:
.LFB3782:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L48
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z14stencilShared2PfS_i(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L48:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L50
	call	__stack_chk_fail@PLT
.L50:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3782:
	.size	_Z37__device_stub__Z14stencilShared2PfS_iPfS_i, .-_Z37__device_stub__Z14stencilShared2PfS_iPfS_i
	.globl	_Z14stencilShared2PfS_i
	.type	_Z14stencilShared2PfS_i, @function
_Z14stencilShared2PfS_i:
.LFB3783:
	.cfi_startproc
	endbr64
	jmp	_Z37__device_stub__Z14stencilShared2PfS_iPfS_i
	.cfi_endproc
.LFE3783:
	.size	_Z14stencilShared2PfS_i, .-_Z14stencilShared2PfS_i
	.section	.rodata.str1.1
.LC1:
	.string	"_Z14stencilShared2PfS_i"
.LC2:
	.string	"_Z14stencilShared1PfS_i"
.LC3:
	.string	"_Z13stencilConst2PfS_i"
.LC4:
	.string	"_Z13stencilConst1PfS_i"
.LC5:
	.string	"_Z16stencilReadOnly3PfS_iS_"
.LC6:
	.string	"_Z16stencilReadOnly2PfS_iS_"
.LC7:
	.string	"_Z16stencilReadOnly1PfS_iS_"
.LC8:
	.string	"_Z7stencilPfS_iS_"
.LC9:
	.string	"const_stencilWeight"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3785:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC1(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z14stencilShared2PfS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC2(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z14stencilShared1PfS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC3(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z13stencilConst2PfS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC4(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z13stencilConst1PfS_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC5(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z16stencilReadOnly3PfS_iS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC6(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z16stencilReadOnly2PfS_iS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC7(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z16stencilReadOnly1PfS_iS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC8(%rip), %rdx
	movq	%rbx, %rdi
	leaq	_Z7stencilPfS_iS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	leaq	.LC9(%rip), %rdx
	pushq	$0
	.cfi_def_cfa_offset 24
	movq	%rdx, %rcx
	movl	$84, %r9d
	xorl	%r8d, %r8d
	pushq	$1
	.cfi_def_cfa_offset 32
	leaq	_ZL19const_stencilWeight(%rip), %rsi
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3785:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.text._ZNSt6chrono8durationIfSt5ratioILl1ELl1EEEC2IlS1_ILl1ELl1000000000EEvEERKNS0_IT_T0_EE,"axG",@progbits,_ZNSt6chrono8durationIfSt5ratioILl1ELl1EEEC5IlS1_ILl1ELl1000000000EEvEERKNS0_IT_T0_EE,comdat
	.align 2
	.weak	_ZNSt6chrono8durationIfSt5ratioILl1ELl1EEEC2IlS1_ILl1ELl1000000000EEvEERKNS0_IT_T0_EE
	.type	_ZNSt6chrono8durationIfSt5ratioILl1ELl1EEEC2IlS1_ILl1ELl1000000000EEvEERKNS0_IT_T0_EE, @function
_ZNSt6chrono8durationIfSt5ratioILl1ELl1EEEC2IlS1_ILl1ELl1000000000EEvEERKNS0_IT_T0_EE:
.LFB4119:
	.cfi_startproc
	endbr64
	cvtsi2ssq	(%rsi), %xmm0
	divss	.LC10(%rip), %xmm0
	movss	%xmm0, (%rdi)
	ret
	.cfi_endproc
.LFE4119:
	.size	_ZNSt6chrono8durationIfSt5ratioILl1ELl1EEEC2IlS1_ILl1ELl1000000000EEvEERKNS0_IT_T0_EE, .-_ZNSt6chrono8durationIfSt5ratioILl1ELl1EEEC2IlS1_ILl1ELl1000000000EEvEERKNS0_IT_T0_EE
	.weak	_ZNSt6chrono8durationIfSt5ratioILl1ELl1EEEC1IlS1_ILl1ELl1000000000EEvEERKNS0_IT_T0_EE
	.set	_ZNSt6chrono8durationIfSt5ratioILl1ELl1EEEC1IlS1_ILl1ELl1000000000EEvEERKNS0_IT_T0_EE,_ZNSt6chrono8durationIfSt5ratioILl1ELl1EEEC2IlS1_ILl1ELl1000000000EEvEERKNS0_IT_T0_EE
	.section	.rodata.str1.1
.LC12:
	.string	"Non optimized time "
.LC14:
	.string	" elem/s"
.LC15:
	.string	" Read BW "
.LC17:
	.string	" GB/s"
.LC18:
	.string	"read only cache stencil coefficients time "
.LC19:
	.string	"read only data time "
.LC20:
	.string	"read only coefficients and data time "
.LC21:
	.string	"constant memory coefficients "
.LC22:
	.string	"constant memory coefficients and data through read only cache time "
.LC23:
	.string	"constant memory coefficients and data from shared time "
.LC24:
	.string	"constant memory coefficients and data from shared thorugh read only time "
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB3735:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$409600000, %esi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	leaq	16(%rsp), %rdi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$409600000, %esi
	call	cudaMalloc@PLT
	leaq	32(%rsp), %rdi
	xorl	%edx, %edx
	movl	$409600000, %esi
	call	cudaHostAlloc@PLT
	leaq	40(%rsp), %rdi
	movl	$1, %edx
	movl	$409600000, %esi
	call	cudaMallocManaged@PLT
	movl	$1, %edx
	leaq	48(%rsp), %rdi
	movl	$84, %esi
	call	cudaMallocManaged@PLT
	call	cudaDeviceSynchronize@PLT
	movq	40(%rsp), %rdi
	xorl	%eax, %eax
	movl	$102400000, %ecx
	rep stosl
	call	cudaDeviceSynchronize@PLT
	movq	48(%rsp), %rdx
	xorl	%eax, %eax
.L57:
	leal	-10(%rax), %ecx
	cvtsi2ssl	%ecx, %xmm0
	movss	%xmm0, (%rdx,%rax,4)
	incq	%rax
	cmpq	$21, %rax
	jne	.L57
	call	cudaDeviceSynchronize@PLT
	movq	48(%rsp), %rsi
	xorl	%ecx, %ecx
	movl	$1, %r8d
	movl	$84, %edx
	leaq	_ZL19const_stencilWeight(%rip), %rdi
	call	cudaMemcpyToSymbol@PLT
	movl	$4194305, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$268436081, %edi
	salq	$10, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	salq	$4, %rdi
	movq	%rdx, 72(%rsp)
	movl	$1, 80(%rsp)
	movq	%rdi, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L58
	movq	48(%rsp), %rcx
	movq	40(%rsp), %rsi
	movl	$10239989, %edx
	movq	16(%rsp), %rdi
	call	_Z31__device_stub__Z7stencilPfS_iS_PfS_iS_
.L58:
	call	cudaDeviceSynchronize@PLT
	movl	$4194305, %edx
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$268436081, %edi
	salq	$10, %rdx
	movl	$1, %ecx
	movl	$1, %esi
	salq	$4, %rdi
	movq	%rdx, 72(%rsp)
	movl	$1, 80(%rsp)
	movq	%rdi, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L59
	movq	48(%rsp), %rcx
	movq	24(%rsp), %rsi
	movl	$10239989, %edx
	movq	16(%rsp), %rdi
	call	_Z31__device_stub__Z7stencilPfS_iS_PfS_iS_
.L59:
	call	cudaDeviceSynchronize@PLT
	movq	24(%rsp), %rsi
	movq	32(%rsp), %rdi
	movl	$4, %ecx
	movl	$40960000, %edx
	movl	$100, %r12d
	movabsq	$4294968320, %r13
	call	cudaMemcpy@PLT
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdi
	movl	$1000, %edx
	call	_Z6verifyPfS_i
	xorl	%edi, %edi
	call	cudaSetDevice@PLT
	movss	.LC11(%rip), %xmm4
	movss	%xmm4, 12(%rsp)
.L63:
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	movl	$268436081, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$4, %rdi
	movq	%r13, %rdx
	movl	$1, %ecx
	movq	%rax, %rbp
	movl	$1, %esi
	movq	%r13, 72(%rsp)
	movl	$1, 80(%rsp)
	movq	%rdi, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L60
	movq	48(%rsp), %rcx
	movq	24(%rsp), %rsi
	movl	$10239989, %edx
	movq	16(%rsp), %rdi
	call	_Z31__device_stub__Z7stencilPfS_iS_PfS_iS_
.L60:
	call	cudaDeviceSynchronize@PLT
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	movq	24(%rsp), %rsi
	movq	32(%rsp), %rdi
	movl	$4, %ecx
	movl	$40960000, %edx
	movq	%rax, %rbx
	call	cudaMemcpy@PLT
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdi
	subq	%rbp, %rbx
	movl	$1000, %edx
	leaq	72(%rsp), %rbp
	call	_Z6verifyPfS_i
	movq	%rbx, 72(%rsp)
	leaq	60(%rsp), %rbx
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	call	_ZNSt6chrono8durationIfSt5ratioILl1ELl1EEEC1IlS1_ILl1ELl1000000000EEvEERKNS0_IT_T0_EE
	movss	12(%rsp), %xmm2
	minss	60(%rsp), %xmm2
	movss	%xmm2, 12(%rsp)
	decl	%r12d
	jne	.L63
	leaq	.LC12(%rip), %rsi
	movl	$100, %r13d
	leaq	_ZSt4cout(%rip), %rdi
	movabsq	$4294968320, %r15
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movss	.LC13(%rip), %xmm0
	divss	12(%rsp), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC14(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC15(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	.LC16(%rip), %xmm1
	cvtss2sd	12(%rsp), %xmm0
	movq	%rax, %rdi
	divsd	%xmm0, %xmm1
	movaps	%xmm1, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC17(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movl	$0x461c4000, 12(%rsp)
.L67:
	call	cudaDeviceSynchronize@PLT
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	movl	$268436081, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$4, %rdi
	movq	%r15, %rdx
	movl	$1, %ecx
	movq	%rax, %r14
	movl	$1, %esi
	movq	%r15, 72(%rsp)
	movl	$1, 80(%rsp)
	movq	%rdi, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L64
	movq	48(%rsp), %rcx
	movq	24(%rsp), %rsi
	movl	$10239989, %edx
	movq	16(%rsp), %rdi
	call	_Z41__device_stub__Z16stencilReadOnly1PfS_iS_PfS_iS_
.L64:
	call	cudaDeviceSynchronize@PLT
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	movq	24(%rsp), %rsi
	movq	32(%rsp), %rdi
	movl	$4, %ecx
	movl	$40960000, %edx
	movq	%rax, %r12
	call	cudaMemcpy@PLT
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdi
	subq	%r14, %r12
	movl	$1000, %edx
	call	_Z6verifyPfS_i
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	movq	%r12, 72(%rsp)
	call	_ZNSt6chrono8durationIfSt5ratioILl1ELl1EEEC1IlS1_ILl1ELl1000000000EEvEERKNS0_IT_T0_EE
	movss	12(%rsp), %xmm3
	minss	60(%rsp), %xmm3
	movss	%xmm3, 12(%rsp)
	decl	%r13d
	jne	.L67
	leaq	.LC18(%rip), %rsi
	movl	$100, %r13d
	leaq	_ZSt4cout(%rip), %rdi
	movabsq	$4294968320, %r15
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movss	.LC13(%rip), %xmm0
	divss	12(%rsp), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC14(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC15(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	.LC16(%rip), %xmm1
	cvtss2sd	12(%rsp), %xmm0
	movq	%rax, %rdi
	divsd	%xmm0, %xmm1
	movaps	%xmm1, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC17(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movl	$0x461c4000, 12(%rsp)
.L71:
	call	cudaDeviceSynchronize@PLT
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	movl	$268436081, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$4, %rdi
	movq	%r15, %rdx
	movl	$1, %ecx
	movq	%rax, %r14
	movl	$1, %esi
	movq	%r15, 72(%rsp)
	movl	$1, 80(%rsp)
	movq	%rdi, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L68
	movq	48(%rsp), %rcx
	movq	24(%rsp), %rsi
	movl	$10239989, %edx
	movq	16(%rsp), %rdi
	call	_Z41__device_stub__Z16stencilReadOnly2PfS_iS_PfS_iS_
.L68:
	call	cudaDeviceSynchronize@PLT
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	movq	24(%rsp), %rsi
	movq	32(%rsp), %rdi
	movl	$4, %ecx
	movl	$40960000, %edx
	movq	%rax, %r12
	call	cudaMemcpy@PLT
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdi
	subq	%r14, %r12
	movl	$1000, %edx
	call	_Z6verifyPfS_i
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	movq	%r12, 72(%rsp)
	call	_ZNSt6chrono8durationIfSt5ratioILl1ELl1EEEC1IlS1_ILl1ELl1000000000EEvEERKNS0_IT_T0_EE
	movss	12(%rsp), %xmm4
	minss	60(%rsp), %xmm4
	movss	%xmm4, 12(%rsp)
	decl	%r13d
	jne	.L71
	leaq	.LC19(%rip), %rsi
	movl	$100, %r13d
	leaq	_ZSt4cout(%rip), %rdi
	movabsq	$4294968320, %r15
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movss	.LC13(%rip), %xmm0
	divss	12(%rsp), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC14(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC15(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	.LC16(%rip), %xmm1
	cvtss2sd	12(%rsp), %xmm0
	movq	%rax, %rdi
	divsd	%xmm0, %xmm1
	movaps	%xmm1, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC17(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movl	$0x461c4000, 12(%rsp)
.L75:
	call	cudaDeviceSynchronize@PLT
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	movl	$268436081, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$4, %rdi
	movq	%r15, %rdx
	movl	$1, %ecx
	movq	%rax, %r14
	movl	$1, %esi
	movq	%r15, 72(%rsp)
	movl	$1, 80(%rsp)
	movq	%rdi, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L72
	movq	48(%rsp), %rcx
	movq	24(%rsp), %rsi
	movl	$10239989, %edx
	movq	16(%rsp), %rdi
	call	_Z41__device_stub__Z16stencilReadOnly3PfS_iS_PfS_iS_
.L72:
	call	cudaDeviceSynchronize@PLT
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	movq	24(%rsp), %rsi
	movq	32(%rsp), %rdi
	movl	$4, %ecx
	movl	$40960000, %edx
	movq	%rax, %r12
	call	cudaMemcpy@PLT
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdi
	subq	%r14, %r12
	movl	$1000, %edx
	call	_Z6verifyPfS_i
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	movq	%r12, 72(%rsp)
	call	_ZNSt6chrono8durationIfSt5ratioILl1ELl1EEEC1IlS1_ILl1ELl1000000000EEvEERKNS0_IT_T0_EE
	movss	12(%rsp), %xmm5
	minss	60(%rsp), %xmm5
	movss	%xmm5, 12(%rsp)
	decl	%r13d
	jne	.L75
	leaq	.LC20(%rip), %rsi
	movl	$100, %r13d
	leaq	_ZSt4cout(%rip), %rdi
	movabsq	$4294968320, %r15
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movss	.LC13(%rip), %xmm0
	divss	12(%rsp), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC14(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC15(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	.LC16(%rip), %xmm1
	cvtss2sd	12(%rsp), %xmm0
	movq	%rax, %rdi
	divsd	%xmm0, %xmm1
	movaps	%xmm1, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC17(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movl	$0x461c4000, 12(%rsp)
.L79:
	call	cudaDeviceSynchronize@PLT
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	movl	$268436081, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$4, %rdi
	movq	%r15, %rdx
	movl	$1, %ecx
	movq	%rax, %r14
	movl	$1, %esi
	movq	%r15, 72(%rsp)
	movl	$1, 80(%rsp)
	movq	%rdi, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L76
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	movl	$10240000, %edx
	call	_Z36__device_stub__Z13stencilConst1PfS_iPfS_i
.L76:
	call	cudaDeviceSynchronize@PLT
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	movq	24(%rsp), %rsi
	movq	32(%rsp), %rdi
	movl	$4, %ecx
	movl	$40960000, %edx
	movq	%rax, %r12
	call	cudaMemcpy@PLT
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdi
	subq	%r14, %r12
	movl	$1000, %edx
	call	_Z6verifyPfS_i
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	movq	%r12, 72(%rsp)
	call	_ZNSt6chrono8durationIfSt5ratioILl1ELl1EEEC1IlS1_ILl1ELl1000000000EEvEERKNS0_IT_T0_EE
	movss	12(%rsp), %xmm6
	minss	60(%rsp), %xmm6
	movss	%xmm6, 12(%rsp)
	decl	%r13d
	jne	.L79
	leaq	.LC21(%rip), %rsi
	movl	$100, %r13d
	leaq	_ZSt4cout(%rip), %rdi
	movabsq	$4294968320, %r15
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movss	.LC13(%rip), %xmm0
	divss	12(%rsp), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC14(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC15(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	.LC16(%rip), %xmm1
	cvtss2sd	12(%rsp), %xmm0
	movq	%rax, %rdi
	divsd	%xmm0, %xmm1
	movaps	%xmm1, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC17(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movl	$0x461c4000, 12(%rsp)
.L83:
	call	cudaDeviceSynchronize@PLT
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	movl	$268436081, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$4, %rdi
	movq	%r15, %rdx
	movl	$1, %ecx
	movq	%rax, %r14
	movl	$1, %esi
	movq	%r15, 72(%rsp)
	movl	$1, 80(%rsp)
	movq	%rdi, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L80
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	movl	$10240000, %edx
	call	_Z36__device_stub__Z13stencilConst2PfS_iPfS_i
.L80:
	call	cudaDeviceSynchronize@PLT
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	movq	24(%rsp), %rsi
	movq	32(%rsp), %rdi
	movl	$4, %ecx
	movl	$40960000, %edx
	movq	%rax, %r12
	call	cudaMemcpy@PLT
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdi
	subq	%r14, %r12
	movl	$1000, %edx
	call	_Z6verifyPfS_i
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	movq	%r12, 72(%rsp)
	call	_ZNSt6chrono8durationIfSt5ratioILl1ELl1EEEC1IlS1_ILl1ELl1000000000EEvEERKNS0_IT_T0_EE
	movss	12(%rsp), %xmm7
	minss	60(%rsp), %xmm7
	movss	%xmm7, 12(%rsp)
	decl	%r13d
	jne	.L83
	leaq	.LC22(%rip), %rsi
	movl	$100, %r13d
	leaq	_ZSt4cout(%rip), %rdi
	movabsq	$4294968320, %r15
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movss	.LC13(%rip), %xmm0
	divss	12(%rsp), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC14(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC15(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	.LC16(%rip), %xmm1
	cvtss2sd	12(%rsp), %xmm0
	movq	%rax, %rdi
	divsd	%xmm0, %xmm1
	movaps	%xmm1, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC17(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movl	$0x461c4000, 12(%rsp)
.L87:
	call	cudaDeviceSynchronize@PLT
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	movl	$268436081, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$4, %rdi
	movq	%r15, %rdx
	movl	$1, %ecx
	movq	%rax, %r14
	movl	$1, %esi
	movq	%r15, 72(%rsp)
	movl	$1, 80(%rsp)
	movq	%rdi, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L84
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	movl	$10240000, %edx
	call	_Z37__device_stub__Z14stencilShared1PfS_iPfS_i
.L84:
	call	cudaDeviceSynchronize@PLT
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	movq	24(%rsp), %rsi
	movq	32(%rsp), %rdi
	movl	$4, %ecx
	movl	$40960000, %edx
	movq	%rax, %r12
	call	cudaMemcpy@PLT
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdi
	subq	%r14, %r12
	movl	$1000, %edx
	call	_Z6verifyPfS_i
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	movq	%r12, 72(%rsp)
	call	_ZNSt6chrono8durationIfSt5ratioILl1ELl1EEEC1IlS1_ILl1ELl1000000000EEvEERKNS0_IT_T0_EE
	movss	12(%rsp), %xmm2
	minss	60(%rsp), %xmm2
	movss	%xmm2, 12(%rsp)
	decl	%r13d
	jne	.L87
	leaq	.LC23(%rip), %rsi
	movl	$100, %r13d
	leaq	_ZSt4cout(%rip), %rdi
	movabsq	$4294968320, %r15
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movss	.LC13(%rip), %xmm0
	divss	12(%rsp), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC14(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC15(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	.LC16(%rip), %xmm1
	cvtss2sd	12(%rsp), %xmm0
	movq	%rax, %rdi
	divsd	%xmm0, %xmm1
	movaps	%xmm1, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC17(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movl	$0x461c4000, 12(%rsp)
.L91:
	call	cudaDeviceSynchronize@PLT
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	movl	$268436081, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$4, %rdi
	movq	%r15, %rdx
	movl	$1, %ecx
	movq	%rax, %r14
	movl	$1, %esi
	movq	%r15, 72(%rsp)
	movl	$1, 80(%rsp)
	movq	%rdi, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L88
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdi
	movl	$10240000, %edx
	call	_Z37__device_stub__Z14stencilShared2PfS_iPfS_i
.L88:
	call	cudaDeviceSynchronize@PLT
	call	_ZNSt6chrono3_V212system_clock3nowEv@PLT
	movq	24(%rsp), %rsi
	movq	32(%rsp), %rdi
	movl	$4, %ecx
	movl	$40960000, %edx
	movq	%rax, %r12
	call	cudaMemcpy@PLT
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdi
	subq	%r14, %r12
	movl	$1000, %edx
	call	_Z6verifyPfS_i
	movq	%rbp, %rsi
	movq	%rbx, %rdi
	movq	%r12, 72(%rsp)
	call	_ZNSt6chrono8durationIfSt5ratioILl1ELl1EEEC1IlS1_ILl1ELl1000000000EEvEERKNS0_IT_T0_EE
	movss	12(%rsp), %xmm3
	minss	60(%rsp), %xmm3
	movss	%xmm3, 12(%rsp)
	decl	%r13d
	jne	.L91
	leaq	.LC24(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movss	.LC13(%rip), %xmm0
	divss	12(%rsp), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC14(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC15(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	.LC16(%rip), %xmm0
	cvtss2sd	12(%rsp), %xmm1
	movq	%rax, %rdi
	divsd	%xmm1, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC17(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@GOTPCREL(%rip), %rsi
	movq	%rax, %rdi
	call	_ZNSolsEPFRSoS_E.isra.0
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L92
	call	__stack_chk_fail@PLT
.L92:
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3735:
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.local	_ZL19const_stencilWeight
	.comm	_ZL19const_stencilWeight,84,32
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC10:
	.long	1315859240
	.align 4
.LC11:
	.long	1176256512
	.align 4
.LC13:
	.long	1260142592
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC16:
	.long	1135245755
	.long	1072399982
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <iostream>
#include <hip/hip_runtime_api.h>
#include <chrono>

//#define DEBUG_DEV

#ifdef DEBUG_DEV
#define getErrorCuda(command)\
        command;\
        hipDeviceSynchronize();\
        hipDeviceSynchronize();\
        if (hipPeekAtLastError() != hipSuccess){\
            std::cout << #command << " : " << hipGetErrorString(hipGetLastError())\
             << " in file " << __FILE__ << " at line " << __LINE__ << std::endl;\
            exit(1);\
        }
#endif
#ifndef DEBUG_DEV
#define getErrorCuda(command) command;
#endif

__constant__ float const_stencilWeight[21];


// base case
__global__ void stencil(float *src, float *dst, int size, float *stencilWeight)
{
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    idx += 11;
    if (idx >= size)
        return;
    float out = 0;
    #pragma unroll
    for(int i = -10;i <= 10; i++)
    {
        out += src[idx+i] * stencilWeight[i+10];
    }
    dst[idx] = out;
}

// read only cache stencil coefficients
__global__ void stencilReadOnly1(float *src, float *dst, int size, float* stencilWeight)
{
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    idx += 11;
    if (idx >= size)
        return;
    float out = 0;
    #pragma unroll
    for(int i = -10;i <= 10; i++)
    {
        out += src[idx+i] * __ldg(&stencilWeight[i+10]);
    }
    dst[idx] = out;
}

// read only data
__global__ void stencilReadOnly2(float *src, float *dst, int size, float* stencilWeight)
{
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    idx += 11;
    if (idx >= size)
        return;
    float out = 0;
    #pragma unroll
    for(int i = -10;i <= 10; i++)
    {
        out += __ldg(&src[idx+i]) * stencilWeight[i+10];
    }
    dst[idx] = out;
}

// read only coefficients and data
__global__ void stencilReadOnly3(float *src, float *dst, int size, float* stencilWeight)
{
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    idx += 11;
    if (idx >= size)
        return;
    float out = 0;
    #pragma unroll
    for(int i = -10;i <= 10; i++)
    {
        out += __ldg(&src[idx+i]) * __ldg(&stencilWeight[i+10]);
    }
    dst[idx] = out;
}

// constat memory coefficients
__global__ void stencilConst1(float *src, float *dst, int size)
{
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    idx += 11;
    if (idx >= size)
        return;
    float out = 0;
    #pragma unroll
    for(int i = -10;i <= 10; i++)
    {
        out += src[idx+i] * const_stencilWeight[i+10];
    }
    dst[idx] = out;
}

// constant memory coefficients and data through read only cache
__global__ void stencilConst2(float *src, float *dst, int size)
{
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    idx += 11;
    if (idx >= size)
        return;
    float out = 0;
    #pragma unroll
    for(int i = -10;i <= 10; i++)
    {
        out += __ldg(&src[idx+i]) * const_stencilWeight[i+10];
    }
    dst[idx] = out;
}

// constant memory coefficients and data from shared
__global__ void stencilShared1(float *src, float *dst, int size)
{
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    __shared__ float buffer[1024+21];
    for(int i = threadIdx.x; i < 1024+21; i = i + 1024)
    {
        buffer[i] = src[idx+i];
    }
    idx += 11;
    if (idx >= size)
        return;
   
    __syncthreads();
    float out = 0;
    #pragma unroll
    for(int i = -10;i <= 10; i++)
    {
        out += buffer[threadIdx.x+10+i] * const_stencilWeight[i+10];
    }
    dst[idx] = out;
}

// constant memory coefficients and data from shared thorugh read only
__global__ void stencilShared2(float *src, float *dst, int size)
{
    int idx = blockIdx.x * blockDim.x + threadIdx.x;
    __shared__ float buffer[1024+21];
    for(int i = threadIdx.x; i < 1024+21; i = i + 1024)
    {
        buffer[i] = __ldg(&src[idx+i]);
    }
    idx += 11;
    if (idx >= size)
        return;
   
    __syncthreads();
    float out = 0;
    #pragma unroll
    for(int i = -10;i <= 10; i++)
    {
        out += buffer[threadIdx.x+10+i] * const_stencilWeight[i+10];
    }
    dst[idx] = out;
}

void verify(float *arr, float *corr, int count)
{
    for(int i = 40; i < count; i++)
    {
        if(arr[i] != corr[i])
        {
            std::cout << "error verifying resutls" << std::endl;
            exit(1);
        }
    }
}

int main()
{
    float *a;
    float *b;
    float *bOut;
    float *bCorr;
    float *weights;
    getErrorCuda(hipMalloc(&a, sizeof(float)*102400000));
    getErrorCuda(hipMalloc(&b, sizeof(float)*102400000));
    getErrorCuda(hipHostMalloc(&bOut, sizeof(float)*102400000, hipHostMallocDefault));
    getErrorCuda(hipMallocManaged(&bCorr, sizeof(float)*102400000));
    getErrorCuda(hipMallocManaged(&weights, sizeof(float)*21));

    hipDeviceSynchronize();   

    for(int i = 0; i < 102400000;i++)
    {
        //a[i] = 0;
        //b[i] = 0;
        bCorr[i] = 0;
    }
    hipDeviceSynchronize();   
   
    int blockSize = 1024;
    int blocks = 10000;
    for(int i = 0; i < 21;i++)
        weights[i] = i-10;
   
   
    hipDeviceSynchronize();   
   
    hipMemcpyToSymbol(HIP_SYMBOL(const_stencilWeight), weights, sizeof(float)*21);

    stencil<<<blocks, blockSize>>>(a, bCorr, 10240000-11, weights);
    hipDeviceSynchronize();   

    stencil<<<blocks, blockSize>>>(a, b, 10240000-11, weights);
    hipDeviceSynchronize();
    getErrorCuda(hipMemcpy(bOut, b, sizeof(float)*10240000, hipMemcpyDefault));
    verify(bOut, bCorr, 1000);

    hipSetDevice(0);


    float minTime = 10000;
    for(int i  = 0; i < 100; i++)
    {
        std::chrono::time_point<std::chrono::system_clock> start, end;
        start = std::chrono::system_clock::now();
        stencil<<<blocks, blockSize>>>(a, b, 10240000-11, weights);
        hipDeviceSynchronize();   
        end = std::chrono::system_clock::now();
       
        getErrorCuda(hipMemcpy(bOut, b, sizeof(float)*10240000, hipMemcpyDefault));
        verify(bOut, bCorr, 1000); 

        std::chrono::duration<float> elapsed_seconds = end-start;
        minTime = std::min(elapsed_seconds.count(), minTime);
    }
    std::cout << "Non optimized time " << (blockSize*blocks)/minTime << " elem/s" << " Read BW " << (21*blockSize*blocks*sizeof(float)/1000.0/1000.0/1000.0 )/minTime << " GB/s" <<   std::endl;
    minTime = 10000;
    std::cout << std::endl;

    for(int i  = 0; i < 100; i++)
    {
        hipDeviceSynchronize(); 
        std::chrono::time_point<std::chrono::system_clock> start, end;
        start = std::chrono::system_clock::now();
        stencilReadOnly1<<<blocks, blockSize>>>(a, b, 10240000-11, weights);
        hipDeviceSynchronize(); 
        end = std::chrono::system_clock::now();
       
        getErrorCuda(hipMemcpy(bOut, b, sizeof(float)*10240000, hipMemcpyDefault));
        verify(bOut, bCorr, 1000); 
       
        std::chrono::duration<float> elapsed_seconds = end-start;
        minTime = std::min(elapsed_seconds.count(), minTime);
    }
    std::cout << "read only cache stencil coefficients time " <<(blockSize*blocks)/minTime << " elem/s" << " Read BW " << (21*blockSize*blocks*sizeof(float)/1000.0/1000.0/1000.0 )/minTime << " GB/s" <<   std::endl;
    minTime = 10000;
    for(int i  = 0; i < 100; i++)
    {
        hipDeviceSynchronize(); 
        std::chrono::time_point<std::chrono::system_clock> start, end;
        start = std::chrono::system_clock::now();
        stencilReadOnly2<<<blocks, blockSize>>>(a, b, 10240000-11, weights);
        hipDeviceSynchronize(); 
        end = std::chrono::system_clock::now();
       
        getErrorCuda(hipMemcpy(bOut, b, sizeof(float)*10240000, hipMemcpyDefault));
        verify(bOut, bCorr, 1000); 
       
        std::chrono::duration<float> elapsed_seconds = end-start;
        minTime = std::min(elapsed_seconds.count(), minTime);
    }
    std::cout << "read only data time " << (blockSize*blocks)/minTime << " elem/s" << " Read BW " << (21*blockSize*blocks*sizeof(float)/1000.0/1000.0/1000.0 )/minTime << " GB/s" <<   std::endl;
    minTime = 10000;
        for(int i  = 0; i < 100; i++)
    {
        hipDeviceSynchronize(); 
        std::chrono::time_point<std::chrono::system_clock> start, end;
        start = std::chrono::system_clock::now();
        stencilReadOnly3<<<blocks, blockSize>>>(a, b, 10240000-11, weights);
        hipDeviceSynchronize(); 
        end = std::chrono::system_clock::now();
       
        getErrorCuda(hipMemcpy(bOut, b, sizeof(float)*10240000, hipMemcpyDefault));
        verify(bOut, bCorr, 1000); 
       
        std::chrono::duration<float> elapsed_seconds = end-start;
        minTime = std::min(elapsed_seconds.count(), minTime);
    }
    std::cout << "read only coefficients and data time " << (blockSize*blocks)/minTime << " elem/s" << " Read BW " << (21*blockSize*blocks*sizeof(float)/1000.0/1000.0/1000.0 )/minTime << " GB/s" <<   std::endl;
    minTime = 10000;

    std::cout << std::endl;

        for(int i  = 0; i < 100; i++)
    {
        hipDeviceSynchronize(); 
       
        std::chrono::time_point<std::chrono::system_clock> start, end;
        start = std::chrono::system_clock::now();
        stencilConst1<<<blocks, blockSize>>>(a, b, 10240000);
        hipDeviceSynchronize();   
        end = std::chrono::system_clock::now();

        getErrorCuda(hipMemcpy(bOut, b, sizeof(float)*10240000, hipMemcpyDefault));
        verify(bOut, bCorr, 1000); 
        std::chrono::duration<float> elapsed_seconds = end-start;
        minTime = std::min(elapsed_seconds.count(), minTime);
    }
    std::cout << "constant memory coefficients " << (blockSize*blocks)/minTime << " elem/s" << " Read BW " << (21*blockSize*blocks*sizeof(float)/1000.0/1000.0/1000.0 )/minTime << " GB/s" <<   std::endl;

    minTime = 10000;


        for(int i  = 0; i < 100; i++)
    {
        hipDeviceSynchronize(); 
       
        std::chrono::time_point<std::chrono::system_clock> start, end;
        start = std::chrono::system_clock::now();
        stencilConst2<<<blocks, blockSize>>>(a, b, 10240000);
        hipDeviceSynchronize();   
        end = std::chrono::system_clock::now();

        getErrorCuda(hipMemcpy(bOut, b, sizeof(float)*10240000, hipMemcpyDefault));
        verify(bOut, bCorr, 1000); 
        std::chrono::duration<float> elapsed_seconds = end-start;
        minTime = std::min(elapsed_seconds.count(), minTime);
    }
    std::cout << "constant memory coefficients and data through read only cache time " << (blockSize*blocks)/minTime << " elem/s" << " Read BW " << (21*blockSize*blocks*sizeof(float)/1000.0/1000.0/1000.0 )/minTime << " GB/s" <<   std::endl;
    std::cout << std::endl;


    minTime = 10000;
            for(int i  = 0; i < 100; i++)
    {
        hipDeviceSynchronize(); 
       
        std::chrono::time_point<std::chrono::system_clock> start, end;
        start = std::chrono::system_clock::now();
        stencilShared1<<<blocks, blockSize>>>(a, b, 10240000);
        hipDeviceSynchronize();   
        end = std::chrono::system_clock::now();
       
        getErrorCuda(hipMemcpy(bOut, b, sizeof(float)*10240000, hipMemcpyDefault));
        verify(bOut, bCorr, 1000); 
        std::chrono::duration<float> elapsed_seconds = end-start;
        minTime = std::min(elapsed_seconds.count(), minTime);
    }
    std::cout << "constant memory coefficients and data from shared time " << (blockSize*blocks)/minTime << " elem/s" << " Read BW " << (21*blockSize*blocks*sizeof(float)/1000.0/1000.0/1000.0 )/minTime << " GB/s" <<   std::endl;
    minTime = 10000;
        minTime = 10000;
            for(int i  = 0; i < 100; i++)
    {
        hipDeviceSynchronize(); 
       
        std::chrono::time_point<std::chrono::system_clock> start, end;
        start = std::chrono::system_clock::now();
        stencilShared2<<<blocks, blockSize>>>(a, b, 10240000);
        hipDeviceSynchronize();   
        end = std::chrono::system_clock::now();
       
        getErrorCuda(hipMemcpy(bOut, b, sizeof(float)*10240000, hipMemcpyDefault));
        verify(bOut, bCorr, 1000); 
        std::chrono::duration<float> elapsed_seconds = end-start;
        minTime = std::min(elapsed_seconds.count(), minTime);
    }
    std::cout << "constant memory coefficients and data from shared thorugh read only time " << (blockSize*blocks)/minTime << " elem/s" << " Read BW " << (21*blockSize*blocks*sizeof(float)/1000.0/1000.0/1000.0 )/minTime << " GB/s" <<   std::endl;
    minTime = 10000;


}

	.text
	.file	"stencil.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z22__device_stub__stencilPfS_iS_ # -- Begin function _Z22__device_stub__stencilPfS_iS_
	.type	_Z22__device_stub__stencilPfS_iS_,@function
_Z22__device_stub__stencilPfS_iS_:      # @_Z22__device_stub__stencilPfS_iS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	4(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	24(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7stencilPfS_iS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z22__device_stub__stencilPfS_iS_, .Lfunc_end0-_Z22__device_stub__stencilPfS_iS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z31__device_stub__stencilReadOnly1PfS_iS_ # -- Begin function _Z31__device_stub__stencilReadOnly1PfS_iS_
	.type	_Z31__device_stub__stencilReadOnly1PfS_iS_,@function
_Z31__device_stub__stencilReadOnly1PfS_iS_: # @_Z31__device_stub__stencilReadOnly1PfS_iS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	4(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	24(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16stencilReadOnly1PfS_iS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z31__device_stub__stencilReadOnly1PfS_iS_, .Lfunc_end1-_Z31__device_stub__stencilReadOnly1PfS_iS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z31__device_stub__stencilReadOnly2PfS_iS_ # -- Begin function _Z31__device_stub__stencilReadOnly2PfS_iS_
	.type	_Z31__device_stub__stencilReadOnly2PfS_iS_,@function
_Z31__device_stub__stencilReadOnly2PfS_iS_: # @_Z31__device_stub__stencilReadOnly2PfS_iS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	4(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	24(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16stencilReadOnly2PfS_iS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z31__device_stub__stencilReadOnly2PfS_iS_, .Lfunc_end2-_Z31__device_stub__stencilReadOnly2PfS_iS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z31__device_stub__stencilReadOnly3PfS_iS_ # -- Begin function _Z31__device_stub__stencilReadOnly3PfS_iS_
	.type	_Z31__device_stub__stencilReadOnly3PfS_iS_,@function
_Z31__device_stub__stencilReadOnly3PfS_iS_: # @_Z31__device_stub__stencilReadOnly3PfS_iS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	4(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	24(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z16stencilReadOnly3PfS_iS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z31__device_stub__stencilReadOnly3PfS_iS_, .Lfunc_end3-_Z31__device_stub__stencilReadOnly3PfS_iS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z28__device_stub__stencilConst1PfS_i # -- Begin function _Z28__device_stub__stencilConst1PfS_i
	.type	_Z28__device_stub__stencilConst1PfS_i,@function
_Z28__device_stub__stencilConst1PfS_i:  # @_Z28__device_stub__stencilConst1PfS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13stencilConst1PfS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z28__device_stub__stencilConst1PfS_i, .Lfunc_end4-_Z28__device_stub__stencilConst1PfS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z28__device_stub__stencilConst2PfS_i # -- Begin function _Z28__device_stub__stencilConst2PfS_i
	.type	_Z28__device_stub__stencilConst2PfS_i,@function
_Z28__device_stub__stencilConst2PfS_i:  # @_Z28__device_stub__stencilConst2PfS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13stencilConst2PfS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z28__device_stub__stencilConst2PfS_i, .Lfunc_end5-_Z28__device_stub__stencilConst2PfS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z29__device_stub__stencilShared1PfS_i # -- Begin function _Z29__device_stub__stencilShared1PfS_i
	.type	_Z29__device_stub__stencilShared1PfS_i,@function
_Z29__device_stub__stencilShared1PfS_i: # @_Z29__device_stub__stencilShared1PfS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14stencilShared1PfS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z29__device_stub__stencilShared1PfS_i, .Lfunc_end6-_Z29__device_stub__stencilShared1PfS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z29__device_stub__stencilShared2PfS_i # -- Begin function _Z29__device_stub__stencilShared2PfS_i
	.type	_Z29__device_stub__stencilShared2PfS_i,@function
_Z29__device_stub__stencilShared2PfS_i: # @_Z29__device_stub__stencilShared2PfS_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z14stencilShared2PfS_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	_Z29__device_stub__stencilShared2PfS_i, .Lfunc_end7-_Z29__device_stub__stencilShared2PfS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z6verifyPfS_i                  # -- Begin function _Z6verifyPfS_i
	.type	_Z6verifyPfS_i,@function
_Z6verifyPfS_i:                         # @_Z6verifyPfS_i
	.cfi_startproc
# %bb.0:
	cmpl	$41, %edx
	jl	.LBB8_5
# %bb.1:                                # %.lr.ph.preheader
	movl	%edx, %eax
	movl	$40, %ecx
.LBB8_3:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movss	(%rdi,%rcx,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	ucomiss	(%rsi,%rcx,4), %xmm0
	jne	.LBB8_4
	jp	.LBB8_4
# %bb.2:                                #   in Loop: Header=BB8_3 Depth=1
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB8_3
.LBB8_5:                                # %._crit_edge
	retq
.LBB8_4:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movl	$_ZSt4cout, %edi
	movl	$.L.str, %esi
	callq	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc
	movq	%rax, %rdi
	callq	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_
	movl	$1, %edi
	callq	exit
.Lfunc_end8:
	.size	_Z6verifyPfS_i, .Lfunc_end8-_Z6verifyPfS_i
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI9_0:
	.long	0x461c4000                      # float 1.0E+4
.LCPI9_1:
	.long	0x4e6e6b28                      # float 1.0E+9
.LCPI9_2:
	.long	0x4b1c4000                      # float 1.024E+7
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI9_3:
	.quad	0x3feb866e43aa79bb              # double 0.86015999999999992
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$48, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	leaq	32(%rsp), %rdi
	movl	$409600000, %esi                # imm = 0x186A0000
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movl	$409600000, %esi                # imm = 0x186A0000
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	xorl	%r15d, %r15d
	movl	$409600000, %esi                # imm = 0x186A0000
	xorl	%edx, %edx
	callq	hipHostMalloc
	leaq	24(%rsp), %rbx
	movl	$409600000, %esi                # imm = 0x186A0000
	movq	%rbx, %rdi
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	40(%rsp), %r14
	movl	$84, %esi
	movq	%r14, %rdi
	movl	$1, %edx
	callq	hipMallocManaged
	callq	hipDeviceSynchronize
	movq	(%rbx), %rdi
	movl	$409600000, %edx                # imm = 0x186A0000
	xorl	%esi, %esi
	callq	memset@PLT
	callq	hipDeviceSynchronize
	movq	(%r14), %rax
.LBB9_1:                                # =>This Inner Loop Header: Depth=1
	leal	-10(%r15), %ecx
	xorps	%xmm0, %xmm0
	cvtsi2ss	%ecx, %xmm0
	movss	%xmm0, (%rax,%r15,4)
	incq	%r15
	cmpq	$21, %r15
	jne	.LBB9_1
# %bb.2:
	movabsq	$4294968320, %rbx               # imm = 0x100000400
	callq	hipDeviceSynchronize
	movq	40(%rsp), %rsi
	movl	$const_stencilWeight, %edi
	movl	$84, %edx
	xorl	%ecx, %ecx
	movl	$1, %r8d
	callq	hipMemcpyToSymbol
	leaq	8976(%rbx), %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB9_4
# %bb.3:
	movq	32(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	40(%rsp), %rcx
	movl	$10239989, %edx                 # imm = 0x9C3FF5
	callq	_Z22__device_stub__stencilPfS_iS_
.LBB9_4:
	callq	hipDeviceSynchronize
	leaq	8976(%rbx), %r14
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB9_6
# %bb.5:
	movq	32(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	40(%rsp), %rcx
	movl	$10239989, %edx                 # imm = 0x9C3FF5
	callq	_Z22__device_stub__stencilPfS_iS_
.LBB9_6:
	callq	hipDeviceSynchronize
	movq	8(%rsp), %rdi
	movq	16(%rsp), %rsi
	movl	$40960000, %edx                 # imm = 0x2710000
	movl	$4, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	movq	24(%rsp), %rsi
	movl	$1000, %edx                     # imm = 0x3E8
	callq	_Z6verifyPfS_i
	xorl	%edi, %edi
	callq	hipSetDevice
	movss	.LCPI9_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	movl	$100, %ebp
.LBB9_7:                                # =>This Inner Loop Header: Depth=1
	movss	%xmm0, 4(%rsp)                  # 4-byte Spill
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, %r15
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB9_9
# %bb.8:                                #   in Loop: Header=BB9_7 Depth=1
	movq	32(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	40(%rsp), %rcx
	movl	$10239989, %edx                 # imm = 0x9C3FF5
	callq	_Z22__device_stub__stencilPfS_iS_
.LBB9_9:                                #   in Loop: Header=BB9_7 Depth=1
	callq	hipDeviceSynchronize
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, %r12
	movq	8(%rsp), %rdi
	movq	16(%rsp), %rsi
	movl	$40960000, %edx                 # imm = 0x2710000
	movl	$4, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	movq	24(%rsp), %rsi
	movl	$1000, %edx                     # imm = 0x3E8
	callq	_Z6verifyPfS_i
	subq	%r15, %r12
	xorps	%xmm1, %xmm1
	cvtsi2ss	%r12, %xmm1
	divss	.LCPI9_1(%rip), %xmm1
	minss	4(%rsp), %xmm1                  # 4-byte Folded Reload
	movaps	%xmm1, %xmm0
	decl	%ebp
	jne	.LBB9_7
# %bb.10:
	movl	$_ZSt4cout, %r12d
	movl	$_ZSt4cout, %edi
	movl	$.L.str.1, %esi
	movl	$19, %edx
	movss	%xmm1, 4(%rsp)                  # 4-byte Spill
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movss	.LCPI9_2(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	divss	4(%rsp), %xmm0                  # 4-byte Folded Reload
	cvtss2sd	%xmm0, %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r15
	movl	$.L.str.2, %esi
	movl	$7, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$.L.str.3, %esi
	movl	$9, %edx
	movq	%r15, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm1, %xmm1
	cvtss2sd	4(%rsp), %xmm1                  # 4-byte Folded Reload
	movsd	.LCPI9_3(%rip), %xmm0           # xmm0 = mem[0],zero
	divsd	%xmm1, %xmm0
	movq	%r15, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r15
	movl	$.L.str.4, %esi
	movl	$5, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%r15), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r15, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movss	.LCPI9_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	movl	$100, %ebp
.LBB9_11:                               # =>This Inner Loop Header: Depth=1
	movss	%xmm0, 4(%rsp)                  # 4-byte Spill
	callq	hipDeviceSynchronize
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, %r15
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB9_13
# %bb.12:                               #   in Loop: Header=BB9_11 Depth=1
	movq	32(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	40(%rsp), %rcx
	movl	$10239989, %edx                 # imm = 0x9C3FF5
	callq	_Z31__device_stub__stencilReadOnly1PfS_iS_
.LBB9_13:                               #   in Loop: Header=BB9_11 Depth=1
	callq	hipDeviceSynchronize
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, %r12
	movq	8(%rsp), %rdi
	movq	16(%rsp), %rsi
	movl	$40960000, %edx                 # imm = 0x2710000
	movl	$4, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	movq	24(%rsp), %rsi
	movl	$1000, %edx                     # imm = 0x3E8
	callq	_Z6verifyPfS_i
	subq	%r15, %r12
	xorps	%xmm1, %xmm1
	cvtsi2ss	%r12, %xmm1
	divss	.LCPI9_1(%rip), %xmm1
	minss	4(%rsp), %xmm1                  # 4-byte Folded Reload
	movaps	%xmm1, %xmm0
	decl	%ebp
	jne	.LBB9_11
# %bb.14:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.5, %esi
	movl	$42, %edx
	movss	%xmm1, 4(%rsp)                  # 4-byte Spill
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movss	.LCPI9_2(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	divss	4(%rsp), %xmm0                  # 4-byte Folded Reload
	cvtss2sd	%xmm0, %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r15
	movl	$.L.str.2, %esi
	movl	$7, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$.L.str.3, %esi
	movl	$9, %edx
	movq	%r15, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm1, %xmm1
	cvtss2sd	4(%rsp), %xmm1                  # 4-byte Folded Reload
	movsd	.LCPI9_3(%rip), %xmm0           # xmm0 = mem[0],zero
	divsd	%xmm1, %xmm0
	movq	%r15, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r15
	movl	$.L.str.4, %esi
	movl	$5, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%r15), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r15, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movss	.LCPI9_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	movl	$100, %ebp
.LBB9_15:                               # =>This Inner Loop Header: Depth=1
	movss	%xmm0, 4(%rsp)                  # 4-byte Spill
	callq	hipDeviceSynchronize
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, %r15
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB9_17
# %bb.16:                               #   in Loop: Header=BB9_15 Depth=1
	movq	32(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	40(%rsp), %rcx
	movl	$10239989, %edx                 # imm = 0x9C3FF5
	callq	_Z31__device_stub__stencilReadOnly2PfS_iS_
.LBB9_17:                               #   in Loop: Header=BB9_15 Depth=1
	callq	hipDeviceSynchronize
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, %r12
	movq	8(%rsp), %rdi
	movq	16(%rsp), %rsi
	movl	$40960000, %edx                 # imm = 0x2710000
	movl	$4, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	movq	24(%rsp), %rsi
	movl	$1000, %edx                     # imm = 0x3E8
	callq	_Z6verifyPfS_i
	subq	%r15, %r12
	xorps	%xmm1, %xmm1
	cvtsi2ss	%r12, %xmm1
	divss	.LCPI9_1(%rip), %xmm1
	minss	4(%rsp), %xmm1                  # 4-byte Folded Reload
	movaps	%xmm1, %xmm0
	decl	%ebp
	jne	.LBB9_15
# %bb.18:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.6, %esi
	movl	$20, %edx
	movss	%xmm1, 4(%rsp)                  # 4-byte Spill
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movss	.LCPI9_2(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	divss	4(%rsp), %xmm0                  # 4-byte Folded Reload
	cvtss2sd	%xmm0, %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r15
	movl	$.L.str.2, %esi
	movl	$7, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$.L.str.3, %esi
	movl	$9, %edx
	movq	%r15, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm1, %xmm1
	cvtss2sd	4(%rsp), %xmm1                  # 4-byte Folded Reload
	movsd	.LCPI9_3(%rip), %xmm0           # xmm0 = mem[0],zero
	divsd	%xmm1, %xmm0
	movq	%r15, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r15
	movl	$.L.str.4, %esi
	movl	$5, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%r15), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r15, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movss	.LCPI9_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	movl	$100, %ebp
.LBB9_19:                               # =>This Inner Loop Header: Depth=1
	movss	%xmm0, 4(%rsp)                  # 4-byte Spill
	callq	hipDeviceSynchronize
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, %r15
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB9_21
# %bb.20:                               #   in Loop: Header=BB9_19 Depth=1
	movq	32(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	40(%rsp), %rcx
	movl	$10239989, %edx                 # imm = 0x9C3FF5
	callq	_Z31__device_stub__stencilReadOnly3PfS_iS_
.LBB9_21:                               #   in Loop: Header=BB9_19 Depth=1
	callq	hipDeviceSynchronize
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, %r12
	movq	8(%rsp), %rdi
	movq	16(%rsp), %rsi
	movl	$40960000, %edx                 # imm = 0x2710000
	movl	$4, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	movq	24(%rsp), %rsi
	movl	$1000, %edx                     # imm = 0x3E8
	callq	_Z6verifyPfS_i
	subq	%r15, %r12
	xorps	%xmm1, %xmm1
	cvtsi2ss	%r12, %xmm1
	divss	.LCPI9_1(%rip), %xmm1
	minss	4(%rsp), %xmm1                  # 4-byte Folded Reload
	movaps	%xmm1, %xmm0
	decl	%ebp
	jne	.LBB9_19
# %bb.22:
	movl	$_ZSt4cout, %r12d
	movl	$_ZSt4cout, %edi
	movl	$.L.str.7, %esi
	movl	$37, %edx
	movss	%xmm1, 4(%rsp)                  # 4-byte Spill
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movss	.LCPI9_2(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	divss	4(%rsp), %xmm0                  # 4-byte Folded Reload
	cvtss2sd	%xmm0, %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r15
	movl	$.L.str.2, %esi
	movl	$7, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$.L.str.3, %esi
	movl	$9, %edx
	movq	%r15, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm1, %xmm1
	cvtss2sd	4(%rsp), %xmm1                  # 4-byte Folded Reload
	movsd	.LCPI9_3(%rip), %xmm0           # xmm0 = mem[0],zero
	divsd	%xmm1, %xmm0
	movq	%r15, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r15
	movl	$.L.str.4, %esi
	movl	$5, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%r15), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r15, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movss	.LCPI9_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	movl	$100, %ebp
.LBB9_23:                               # =>This Inner Loop Header: Depth=1
	movss	%xmm0, 4(%rsp)                  # 4-byte Spill
	callq	hipDeviceSynchronize
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, %r15
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB9_25
# %bb.24:                               #   in Loop: Header=BB9_23 Depth=1
	movq	32(%rsp), %rdi
	movq	16(%rsp), %rsi
	movl	$10240000, %edx                 # imm = 0x9C4000
	callq	_Z28__device_stub__stencilConst1PfS_i
.LBB9_25:                               #   in Loop: Header=BB9_23 Depth=1
	callq	hipDeviceSynchronize
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, %r12
	movq	8(%rsp), %rdi
	movq	16(%rsp), %rsi
	movl	$40960000, %edx                 # imm = 0x2710000
	movl	$4, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	movq	24(%rsp), %rsi
	movl	$1000, %edx                     # imm = 0x3E8
	callq	_Z6verifyPfS_i
	subq	%r15, %r12
	xorps	%xmm1, %xmm1
	cvtsi2ss	%r12, %xmm1
	divss	.LCPI9_1(%rip), %xmm1
	minss	4(%rsp), %xmm1                  # 4-byte Folded Reload
	movaps	%xmm1, %xmm0
	decl	%ebp
	jne	.LBB9_23
# %bb.26:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.8, %esi
	movl	$29, %edx
	movss	%xmm1, 4(%rsp)                  # 4-byte Spill
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movss	.LCPI9_2(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	divss	4(%rsp), %xmm0                  # 4-byte Folded Reload
	cvtss2sd	%xmm0, %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r15
	movl	$.L.str.2, %esi
	movl	$7, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$.L.str.3, %esi
	movl	$9, %edx
	movq	%r15, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm1, %xmm1
	cvtss2sd	4(%rsp), %xmm1                  # 4-byte Folded Reload
	movsd	.LCPI9_3(%rip), %xmm0           # xmm0 = mem[0],zero
	divsd	%xmm1, %xmm0
	movq	%r15, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r15
	movl	$.L.str.4, %esi
	movl	$5, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%r15), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r15, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movss	.LCPI9_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	movl	$100, %ebp
.LBB9_27:                               # =>This Inner Loop Header: Depth=1
	movss	%xmm0, 4(%rsp)                  # 4-byte Spill
	callq	hipDeviceSynchronize
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, %r15
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB9_29
# %bb.28:                               #   in Loop: Header=BB9_27 Depth=1
	movq	32(%rsp), %rdi
	movq	16(%rsp), %rsi
	movl	$10240000, %edx                 # imm = 0x9C4000
	callq	_Z28__device_stub__stencilConst2PfS_i
.LBB9_29:                               #   in Loop: Header=BB9_27 Depth=1
	callq	hipDeviceSynchronize
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, %r12
	movq	8(%rsp), %rdi
	movq	16(%rsp), %rsi
	movl	$40960000, %edx                 # imm = 0x2710000
	movl	$4, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	movq	24(%rsp), %rsi
	movl	$1000, %edx                     # imm = 0x3E8
	callq	_Z6verifyPfS_i
	subq	%r15, %r12
	xorps	%xmm1, %xmm1
	cvtsi2ss	%r12, %xmm1
	divss	.LCPI9_1(%rip), %xmm1
	minss	4(%rsp), %xmm1                  # 4-byte Folded Reload
	movaps	%xmm1, %xmm0
	decl	%ebp
	jne	.LBB9_27
# %bb.30:
	movl	$_ZSt4cout, %r12d
	movl	$_ZSt4cout, %edi
	movl	$.L.str.9, %esi
	movl	$67, %edx
	movss	%xmm1, 4(%rsp)                  # 4-byte Spill
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movss	.LCPI9_2(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	divss	4(%rsp), %xmm0                  # 4-byte Folded Reload
	cvtss2sd	%xmm0, %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r15
	movl	$.L.str.2, %esi
	movl	$7, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$.L.str.3, %esi
	movl	$9, %edx
	movq	%r15, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm1, %xmm1
	cvtss2sd	4(%rsp), %xmm1                  # 4-byte Folded Reload
	movsd	.LCPI9_3(%rip), %xmm0           # xmm0 = mem[0],zero
	divsd	%xmm1, %xmm0
	movq	%r15, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r15
	movl	$.L.str.4, %esi
	movl	$5, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%r15), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r15, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movq	_ZSt4cout(%rip), %rax
	movq	-24(%rax), %rdi
	addq	%r12, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cout, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movss	.LCPI9_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	movl	$100, %ebp
.LBB9_31:                               # =>This Inner Loop Header: Depth=1
	movss	%xmm0, 4(%rsp)                  # 4-byte Spill
	callq	hipDeviceSynchronize
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, %r15
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB9_33
# %bb.32:                               #   in Loop: Header=BB9_31 Depth=1
	movq	32(%rsp), %rdi
	movq	16(%rsp), %rsi
	movl	$10240000, %edx                 # imm = 0x9C4000
	callq	_Z29__device_stub__stencilShared1PfS_i
.LBB9_33:                               #   in Loop: Header=BB9_31 Depth=1
	callq	hipDeviceSynchronize
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, %r12
	movq	8(%rsp), %rdi
	movq	16(%rsp), %rsi
	movl	$40960000, %edx                 # imm = 0x2710000
	movl	$4, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	movq	24(%rsp), %rsi
	movl	$1000, %edx                     # imm = 0x3E8
	callq	_Z6verifyPfS_i
	subq	%r15, %r12
	xorps	%xmm1, %xmm1
	cvtsi2ss	%r12, %xmm1
	divss	.LCPI9_1(%rip), %xmm1
	minss	4(%rsp), %xmm1                  # 4-byte Folded Reload
	movaps	%xmm1, %xmm0
	decl	%ebp
	jne	.LBB9_31
# %bb.34:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.10, %esi
	movl	$55, %edx
	movss	%xmm1, 4(%rsp)                  # 4-byte Spill
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movss	.LCPI9_2(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	divss	4(%rsp), %xmm0                  # 4-byte Folded Reload
	cvtss2sd	%xmm0, %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r15
	movl	$.L.str.2, %esi
	movl	$7, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$.L.str.3, %esi
	movl	$9, %edx
	movq	%r15, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm1, %xmm1
	cvtss2sd	4(%rsp), %xmm1                  # 4-byte Folded Reload
	movsd	.LCPI9_3(%rip), %xmm0           # xmm0 = mem[0],zero
	divsd	%xmm1, %xmm0
	movq	%r15, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %r15
	movl	$.L.str.4, %esi
	movl	$5, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%r15), %rax
	movq	-24(%rax), %rdi
	addq	%r15, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%r15, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	movss	.LCPI9_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	movl	$100, %ebp
.LBB9_35:                               # =>This Inner Loop Header: Depth=1
	movss	%xmm0, 4(%rsp)                  # 4-byte Spill
	callq	hipDeviceSynchronize
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, %r15
	movq	%r14, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB9_37
# %bb.36:                               #   in Loop: Header=BB9_35 Depth=1
	movq	32(%rsp), %rdi
	movq	16(%rsp), %rsi
	movl	$10240000, %edx                 # imm = 0x9C4000
	callq	_Z29__device_stub__stencilShared2PfS_i
.LBB9_37:                               #   in Loop: Header=BB9_35 Depth=1
	callq	hipDeviceSynchronize
	callq	_ZNSt6chrono3_V212system_clock3nowEv
	movq	%rax, %r12
	movq	8(%rsp), %rdi
	movq	16(%rsp), %rsi
	movl	$40960000, %edx                 # imm = 0x2710000
	movl	$4, %ecx
	callq	hipMemcpy
	movq	8(%rsp), %rdi
	movq	24(%rsp), %rsi
	movl	$1000, %edx                     # imm = 0x3E8
	callq	_Z6verifyPfS_i
	subq	%r15, %r12
	xorps	%xmm1, %xmm1
	cvtsi2ss	%r12, %xmm1
	divss	.LCPI9_1(%rip), %xmm1
	minss	4(%rsp), %xmm1                  # 4-byte Folded Reload
	movaps	%xmm1, %xmm0
	decl	%ebp
	jne	.LBB9_35
# %bb.38:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.11, %esi
	movl	$73, %edx
	movss	%xmm1, 4(%rsp)                  # 4-byte Spill
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movss	.LCPI9_2(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
	divss	4(%rsp), %xmm0                  # 4-byte Folded Reload
	cvtss2sd	%xmm0, %xmm0
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.2, %esi
	movl	$7, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$.L.str.3, %esi
	movl	$9, %edx
	movq	%rbx, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm1, %xmm1
	cvtss2sd	4(%rsp), %xmm1                  # 4-byte Folded Reload
	movsd	.LCPI9_3(%rip), %xmm0           # xmm0 = mem[0],zero
	divsd	%xmm1, %xmm0
	movq	%rbx, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.4, %esi
	movl	$5, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%rbx), %rax
	movq	-24(%rax), %rdi
	addq	%rbx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movq	%rbx, %rdi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
	xorl	%eax, %eax
	addq	$48, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end9:
	.size	main, .Lfunc_end9-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB10_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB10_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7stencilPfS_iS_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16stencilReadOnly1PfS_iS_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16stencilReadOnly2PfS_iS_, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z16stencilReadOnly3PfS_iS_, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13stencilConst1PfS_i, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13stencilConst2PfS_i, %esi
	movl	$.L__unnamed_6, %edx
	movl	$.L__unnamed_6, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14stencilShared1PfS_i, %esi
	movl	$.L__unnamed_7, %edx
	movl	$.L__unnamed_7, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z14stencilShared2PfS_i, %esi
	movl	$.L__unnamed_8, %edx
	movl	$.L__unnamed_8, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$0, 8(%rsp)
	movl	$1, (%rsp)
	movl	$const_stencilWeight, %esi
	movl	$.L__unnamed_9, %edx
	movl	$.L__unnamed_9, %ecx
	movl	$84, %r9d
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	callq	__hipRegisterVar
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end10:
	.size	__hip_module_ctor, .Lfunc_end10-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB11_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB11_2:
	retq
.Lfunc_end11:
	.size	__hip_module_dtor, .Lfunc_end11-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	const_stencilWeight,@object     # @const_stencilWeight
	.local	const_stencilWeight
	.comm	const_stencilWeight,84,16
	.type	_Z7stencilPfS_iS_,@object       # @_Z7stencilPfS_iS_
	.section	.rodata,"a",@progbits
	.globl	_Z7stencilPfS_iS_
	.p2align	3, 0x0
_Z7stencilPfS_iS_:
	.quad	_Z22__device_stub__stencilPfS_iS_
	.size	_Z7stencilPfS_iS_, 8

	.type	_Z16stencilReadOnly1PfS_iS_,@object # @_Z16stencilReadOnly1PfS_iS_
	.globl	_Z16stencilReadOnly1PfS_iS_
	.p2align	3, 0x0
_Z16stencilReadOnly1PfS_iS_:
	.quad	_Z31__device_stub__stencilReadOnly1PfS_iS_
	.size	_Z16stencilReadOnly1PfS_iS_, 8

	.type	_Z16stencilReadOnly2PfS_iS_,@object # @_Z16stencilReadOnly2PfS_iS_
	.globl	_Z16stencilReadOnly2PfS_iS_
	.p2align	3, 0x0
_Z16stencilReadOnly2PfS_iS_:
	.quad	_Z31__device_stub__stencilReadOnly2PfS_iS_
	.size	_Z16stencilReadOnly2PfS_iS_, 8

	.type	_Z16stencilReadOnly3PfS_iS_,@object # @_Z16stencilReadOnly3PfS_iS_
	.globl	_Z16stencilReadOnly3PfS_iS_
	.p2align	3, 0x0
_Z16stencilReadOnly3PfS_iS_:
	.quad	_Z31__device_stub__stencilReadOnly3PfS_iS_
	.size	_Z16stencilReadOnly3PfS_iS_, 8

	.type	_Z13stencilConst1PfS_i,@object  # @_Z13stencilConst1PfS_i
	.globl	_Z13stencilConst1PfS_i
	.p2align	3, 0x0
_Z13stencilConst1PfS_i:
	.quad	_Z28__device_stub__stencilConst1PfS_i
	.size	_Z13stencilConst1PfS_i, 8

	.type	_Z13stencilConst2PfS_i,@object  # @_Z13stencilConst2PfS_i
	.globl	_Z13stencilConst2PfS_i
	.p2align	3, 0x0
_Z13stencilConst2PfS_i:
	.quad	_Z28__device_stub__stencilConst2PfS_i
	.size	_Z13stencilConst2PfS_i, 8

	.type	_Z14stencilShared1PfS_i,@object # @_Z14stencilShared1PfS_i
	.globl	_Z14stencilShared1PfS_i
	.p2align	3, 0x0
_Z14stencilShared1PfS_i:
	.quad	_Z29__device_stub__stencilShared1PfS_i
	.size	_Z14stencilShared1PfS_i, 8

	.type	_Z14stencilShared2PfS_i,@object # @_Z14stencilShared2PfS_i
	.globl	_Z14stencilShared2PfS_i
	.p2align	3, 0x0
_Z14stencilShared2PfS_i:
	.quad	_Z29__device_stub__stencilShared2PfS_i
	.size	_Z14stencilShared2PfS_i, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"error verifying resutls"
	.size	.L.str, 24

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Non optimized time "
	.size	.L.str.1, 20

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	" elem/s"
	.size	.L.str.2, 8

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	" Read BW "
	.size	.L.str.3, 10

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	" GB/s"
	.size	.L.str.4, 6

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"read only cache stencil coefficients time "
	.size	.L.str.5, 43

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"read only data time "
	.size	.L.str.6, 21

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"read only coefficients and data time "
	.size	.L.str.7, 38

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"constant memory coefficients "
	.size	.L.str.8, 30

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"constant memory coefficients and data through read only cache time "
	.size	.L.str.9, 68

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"constant memory coefficients and data from shared time "
	.size	.L.str.10, 56

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"constant memory coefficients and data from shared thorugh read only time "
	.size	.L.str.11, 74

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z7stencilPfS_iS_"
	.size	.L__unnamed_1, 18

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z16stencilReadOnly1PfS_iS_"
	.size	.L__unnamed_2, 28

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z16stencilReadOnly2PfS_iS_"
	.size	.L__unnamed_3, 28

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z16stencilReadOnly3PfS_iS_"
	.size	.L__unnamed_4, 28

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"_Z13stencilConst1PfS_i"
	.size	.L__unnamed_5, 23

	.type	.L__unnamed_6,@object           # @5
.L__unnamed_6:
	.asciz	"_Z13stencilConst2PfS_i"
	.size	.L__unnamed_6, 23

	.type	.L__unnamed_7,@object           # @6
.L__unnamed_7:
	.asciz	"_Z14stencilShared1PfS_i"
	.size	.L__unnamed_7, 24

	.type	.L__unnamed_8,@object           # @7
.L__unnamed_8:
	.asciz	"_Z14stencilShared2PfS_i"
	.size	.L__unnamed_8, 24

	.type	.L__unnamed_9,@object           # @8
.L__unnamed_9:
	.asciz	"const_stencilWeight"
	.size	.L__unnamed_9, 20

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z22__device_stub__stencilPfS_iS_
	.addrsig_sym _Z31__device_stub__stencilReadOnly1PfS_iS_
	.addrsig_sym _Z31__device_stub__stencilReadOnly2PfS_iS_
	.addrsig_sym _Z31__device_stub__stencilReadOnly3PfS_iS_
	.addrsig_sym _Z28__device_stub__stencilConst1PfS_i
	.addrsig_sym _Z28__device_stub__stencilConst2PfS_i
	.addrsig_sym _Z29__device_stub__stencilShared1PfS_i
	.addrsig_sym _Z29__device_stub__stencilShared2PfS_i
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym const_stencilWeight
	.addrsig_sym _Z7stencilPfS_iS_
	.addrsig_sym _Z16stencilReadOnly1PfS_iS_
	.addrsig_sym _Z16stencilReadOnly2PfS_iS_
	.addrsig_sym _Z16stencilReadOnly3PfS_iS_
	.addrsig_sym _Z13stencilConst1PfS_i
	.addrsig_sym _Z13stencilConst2PfS_i
	.addrsig_sym _Z14stencilShared1PfS_i
	.addrsig_sym _Z14stencilShared2PfS_i
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z7stencilPfS_iS_       ; -- Begin function _Z7stencilPfS_iS_
	.globl	_Z7stencilPfS_iS_
	.p2align	8
	.type	_Z7stencilPfS_iS_,@function
_Z7stencilPfS_iS_:                      ; @_Z7stencilPfS_iS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_mul_i32 s15, s15, s2
	s_mov_b32 s2, exec_lo
	v_add3_u32 v0, v0, s15, 11
	v_cmpx_gt_i32_e64 s3, v0
	s_cbranch_execz .LBB0_2
; %bb.1:                                ; %.preheader
	s_clause 0x1
	s_load_b128 s[16:19], s[0:1], 0x0
	s_load_b64 s[20:21], s[0:1], 0x18
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[20:21], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v22, vcc_lo, s16, v20
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v23, vcc_lo, s17, v21, vcc_lo
	s_clause 0x5
	global_load_b128 v[0:3], v[22:23], off offset:-40
	global_load_b128 v[4:7], v[22:23], off offset:-24
	global_load_b128 v[8:11], v[22:23], off offset:-8
	global_load_b128 v[12:15], v[22:23], off offset:8
	global_load_b128 v[16:19], v[22:23], off offset:24
	global_load_b32 v22, v[22:23], off offset:40
	s_load_b512 s[0:15], s[20:21], 0x0
	s_waitcnt vmcnt(5) lgkmcnt(0)
	v_fma_f32 v23, v0, s0, 0
	v_add_co_u32 v0, vcc_lo, s18, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v23, s1, v1
	v_add_co_ci_u32_e32 v1, vcc_lo, s19, v21, vcc_lo
	v_fmac_f32_e32 v23, s2, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v23, s3, v3
	s_load_b128 s[0:3], s[20:21], 0x40
	s_waitcnt vmcnt(4)
	v_fmac_f32_e32 v23, s4, v4
	s_load_b32 s4, s[20:21], 0x50
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v23, s5, v5
	v_fmac_f32_e32 v23, s6, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v23, s7, v7
	s_waitcnt vmcnt(3)
	v_fmac_f32_e32 v23, s8, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v23, s9, v9
	v_fmac_f32_e32 v23, s10, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v23, s11, v11
	s_waitcnt vmcnt(2)
	v_fmac_f32_e32 v23, s12, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v23, s13, v13
	v_fmac_f32_e32 v23, s14, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v23, s15, v15
	s_waitcnt vmcnt(1) lgkmcnt(0)
	v_fmac_f32_e32 v23, s0, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v23, s1, v17
	v_fmac_f32_e32 v23, s2, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v23, s3, v19
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v23, s4, v22
	global_store_b32 v[0:1], v23, off
.LBB0_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7stencilPfS_iS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 24
		.amdhsa_next_free_sgpr 22
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z7stencilPfS_iS_, .Lfunc_end0-_Z7stencilPfS_iS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 380
; NumSgprs: 24
; NumVgprs: 24
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 24
; NumVGPRsForWavesPerEU: 24
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z16stencilReadOnly1PfS_iS_ ; -- Begin function _Z16stencilReadOnly1PfS_iS_
	.globl	_Z16stencilReadOnly1PfS_iS_
	.p2align	8
	.type	_Z16stencilReadOnly1PfS_iS_,@function
_Z16stencilReadOnly1PfS_iS_:            ; @_Z16stencilReadOnly1PfS_iS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_mul_i32 s15, s15, s2
	s_mov_b32 s2, exec_lo
	v_add3_u32 v0, v0, s15, 11
	v_cmpx_gt_i32_e64 s3, v0
	s_cbranch_execz .LBB1_2
; %bb.1:                                ; %.preheader
	s_clause 0x1
	s_load_b128 s[16:19], s[0:1], 0x0
	s_load_b64 s[20:21], s[0:1], 0x18
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[20:21], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v22, vcc_lo, s16, v20
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v23, vcc_lo, s17, v21, vcc_lo
	s_clause 0x5
	global_load_b128 v[0:3], v[22:23], off offset:-40
	global_load_b128 v[4:7], v[22:23], off offset:-24
	global_load_b128 v[8:11], v[22:23], off offset:-8
	global_load_b128 v[12:15], v[22:23], off offset:8
	global_load_b128 v[16:19], v[22:23], off offset:24
	global_load_b32 v22, v[22:23], off offset:40
	s_load_b512 s[0:15], s[20:21], 0x0
	s_waitcnt vmcnt(5) lgkmcnt(0)
	v_fma_f32 v23, v0, s0, 0
	v_add_co_u32 v0, vcc_lo, s18, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v23, s1, v1
	v_add_co_ci_u32_e32 v1, vcc_lo, s19, v21, vcc_lo
	v_fmac_f32_e32 v23, s2, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v23, s3, v3
	s_load_b128 s[0:3], s[20:21], 0x40
	s_waitcnt vmcnt(4)
	v_fmac_f32_e32 v23, s4, v4
	s_load_b32 s4, s[20:21], 0x50
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v23, s5, v5
	v_fmac_f32_e32 v23, s6, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v23, s7, v7
	s_waitcnt vmcnt(3)
	v_fmac_f32_e32 v23, s8, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v23, s9, v9
	v_fmac_f32_e32 v23, s10, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v23, s11, v11
	s_waitcnt vmcnt(2)
	v_fmac_f32_e32 v23, s12, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v23, s13, v13
	v_fmac_f32_e32 v23, s14, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v23, s15, v15
	s_waitcnt vmcnt(1) lgkmcnt(0)
	v_fmac_f32_e32 v23, s0, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v23, s1, v17
	v_fmac_f32_e32 v23, s2, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v23, s3, v19
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v23, s4, v22
	global_store_b32 v[0:1], v23, off
.LBB1_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16stencilReadOnly1PfS_iS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 24
		.amdhsa_next_free_sgpr 22
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z16stencilReadOnly1PfS_iS_, .Lfunc_end1-_Z16stencilReadOnly1PfS_iS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 380
; NumSgprs: 24
; NumVgprs: 24
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 24
; NumVGPRsForWavesPerEU: 24
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z16stencilReadOnly2PfS_iS_ ; -- Begin function _Z16stencilReadOnly2PfS_iS_
	.globl	_Z16stencilReadOnly2PfS_iS_
	.p2align	8
	.type	_Z16stencilReadOnly2PfS_iS_,@function
_Z16stencilReadOnly2PfS_iS_:            ; @_Z16stencilReadOnly2PfS_iS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_mul_i32 s15, s15, s2
	s_mov_b32 s2, exec_lo
	v_add3_u32 v0, v0, s15, 11
	v_cmpx_gt_i32_e64 s3, v0
	s_cbranch_execz .LBB2_2
; %bb.1:                                ; %.preheader
	s_clause 0x1
	s_load_b128 s[16:19], s[0:1], 0x0
	s_load_b64 s[20:21], s[0:1], 0x18
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[20:21], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v22, vcc_lo, s16, v20
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v23, vcc_lo, s17, v21, vcc_lo
	s_clause 0x5
	global_load_b128 v[0:3], v[22:23], off offset:-40
	global_load_b128 v[4:7], v[22:23], off offset:-24
	global_load_b128 v[8:11], v[22:23], off offset:-8
	global_load_b128 v[12:15], v[22:23], off offset:8
	global_load_b128 v[16:19], v[22:23], off offset:24
	global_load_b32 v22, v[22:23], off offset:40
	s_load_b512 s[0:15], s[20:21], 0x0
	s_waitcnt vmcnt(5) lgkmcnt(0)
	v_fma_f32 v23, v0, s0, 0
	v_add_co_u32 v0, vcc_lo, s18, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v23, s1, v1
	v_add_co_ci_u32_e32 v1, vcc_lo, s19, v21, vcc_lo
	v_fmac_f32_e32 v23, s2, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v23, s3, v3
	s_load_b128 s[0:3], s[20:21], 0x40
	s_waitcnt vmcnt(4)
	v_fmac_f32_e32 v23, s4, v4
	s_load_b32 s4, s[20:21], 0x50
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v23, s5, v5
	v_fmac_f32_e32 v23, s6, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v23, s7, v7
	s_waitcnt vmcnt(3)
	v_fmac_f32_e32 v23, s8, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v23, s9, v9
	v_fmac_f32_e32 v23, s10, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v23, s11, v11
	s_waitcnt vmcnt(2)
	v_fmac_f32_e32 v23, s12, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v23, s13, v13
	v_fmac_f32_e32 v23, s14, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v23, s15, v15
	s_waitcnt vmcnt(1) lgkmcnt(0)
	v_fmac_f32_e32 v23, s0, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v23, s1, v17
	v_fmac_f32_e32 v23, s2, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v23, s3, v19
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v23, s4, v22
	global_store_b32 v[0:1], v23, off
.LBB2_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16stencilReadOnly2PfS_iS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 24
		.amdhsa_next_free_sgpr 22
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z16stencilReadOnly2PfS_iS_, .Lfunc_end2-_Z16stencilReadOnly2PfS_iS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 380
; NumSgprs: 24
; NumVgprs: 24
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 24
; NumVGPRsForWavesPerEU: 24
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z16stencilReadOnly3PfS_iS_ ; -- Begin function _Z16stencilReadOnly3PfS_iS_
	.globl	_Z16stencilReadOnly3PfS_iS_
	.p2align	8
	.type	_Z16stencilReadOnly3PfS_iS_,@function
_Z16stencilReadOnly3PfS_iS_:            ; @_Z16stencilReadOnly3PfS_iS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s3, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_mul_i32 s15, s15, s2
	s_mov_b32 s2, exec_lo
	v_add3_u32 v0, v0, s15, 11
	v_cmpx_gt_i32_e64 s3, v0
	s_cbranch_execz .LBB3_2
; %bb.1:                                ; %.preheader
	s_clause 0x1
	s_load_b128 s[16:19], s[0:1], 0x0
	s_load_b64 s[20:21], s[0:1], 0x18
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[20:21], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v22, vcc_lo, s16, v20
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v23, vcc_lo, s17, v21, vcc_lo
	s_clause 0x5
	global_load_b128 v[0:3], v[22:23], off offset:-40
	global_load_b128 v[4:7], v[22:23], off offset:-24
	global_load_b128 v[8:11], v[22:23], off offset:-8
	global_load_b128 v[12:15], v[22:23], off offset:8
	global_load_b128 v[16:19], v[22:23], off offset:24
	global_load_b32 v22, v[22:23], off offset:40
	s_load_b512 s[0:15], s[20:21], 0x0
	s_waitcnt vmcnt(5) lgkmcnt(0)
	v_fma_f32 v23, v0, s0, 0
	v_add_co_u32 v0, vcc_lo, s18, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v23, s1, v1
	v_add_co_ci_u32_e32 v1, vcc_lo, s19, v21, vcc_lo
	v_fmac_f32_e32 v23, s2, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v23, s3, v3
	s_load_b128 s[0:3], s[20:21], 0x40
	s_waitcnt vmcnt(4)
	v_fmac_f32_e32 v23, s4, v4
	s_load_b32 s4, s[20:21], 0x50
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v23, s5, v5
	v_fmac_f32_e32 v23, s6, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v23, s7, v7
	s_waitcnt vmcnt(3)
	v_fmac_f32_e32 v23, s8, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v23, s9, v9
	v_fmac_f32_e32 v23, s10, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v23, s11, v11
	s_waitcnt vmcnt(2)
	v_fmac_f32_e32 v23, s12, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v23, s13, v13
	v_fmac_f32_e32 v23, s14, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v23, s15, v15
	s_waitcnt vmcnt(1) lgkmcnt(0)
	v_fmac_f32_e32 v23, s0, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v23, s1, v17
	v_fmac_f32_e32 v23, s2, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v23, s3, v19
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v23, s4, v22
	global_store_b32 v[0:1], v23, off
.LBB3_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z16stencilReadOnly3PfS_iS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 24
		.amdhsa_next_free_sgpr 22
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z16stencilReadOnly3PfS_iS_, .Lfunc_end3-_Z16stencilReadOnly3PfS_iS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 380
; NumSgprs: 24
; NumVgprs: 24
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 24
; NumVGPRsForWavesPerEU: 24
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z13stencilConst1PfS_i  ; -- Begin function _Z13stencilConst1PfS_i
	.globl	_Z13stencilConst1PfS_i
	.p2align	8
	.type	_Z13stencilConst1PfS_i,@function
_Z13stencilConst1PfS_i:                 ; @_Z13stencilConst1PfS_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s3, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_mul_i32 s15, s15, s2
	s_mov_b32 s2, exec_lo
	v_add3_u32 v0, v0, s15, 11
	v_cmpx_gt_i32_e64 s3, v0
	s_cbranch_execz .LBB4_2
; %bb.1:                                ; %.preheader.preheader
	s_load_b128 s[16:19], s[0:1], 0x0
	v_ashrrev_i32_e32 v1, 31, v0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, const_stencilWeight@rel32@lo+4
	s_addc_u32 s1, s1, const_stencilWeight@rel32@hi+12
	s_load_b512 s[0:15], s[0:1], 0x0
	v_lshlrev_b64 v[20:21], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v22, vcc_lo, s16, v20
	v_add_co_ci_u32_e32 v23, vcc_lo, s17, v21, vcc_lo
	s_clause 0x5
	global_load_b128 v[0:3], v[22:23], off offset:-40
	global_load_b128 v[4:7], v[22:23], off offset:-24
	global_load_b128 v[8:11], v[22:23], off offset:-8
	global_load_b128 v[12:15], v[22:23], off offset:8
	global_load_b128 v[16:19], v[22:23], off offset:24
	global_load_b32 v22, v[22:23], off offset:40
	s_waitcnt vmcnt(5)
	v_fma_f32 v23, v0, s0, 0
	v_add_co_u32 v0, vcc_lo, s18, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v23, s1, v1
	v_add_co_ci_u32_e32 v1, vcc_lo, s19, v21, vcc_lo
	v_fmac_f32_e32 v23, s2, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v23, s3, v3
	s_waitcnt vmcnt(4)
	v_fmac_f32_e32 v23, s4, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v23, s5, v5
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, const_stencilWeight@rel32@lo+68
	s_addc_u32 s5, s5, const_stencilWeight@rel32@hi+76
	s_clause 0x1
	s_load_b128 s[0:3], s[4:5], 0x0
	s_load_b32 s4, s[4:5], 0x10
	v_fmac_f32_e32 v23, s6, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v23, s7, v7
	s_waitcnt vmcnt(3)
	v_fmac_f32_e32 v23, s8, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v23, s9, v9
	v_fmac_f32_e32 v23, s10, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v23, s11, v11
	s_waitcnt vmcnt(2)
	v_fmac_f32_e32 v23, s12, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v23, s13, v13
	v_fmac_f32_e32 v23, s14, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v23, s15, v15
	s_waitcnt vmcnt(1) lgkmcnt(0)
	v_fmac_f32_e32 v23, s0, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v23, s1, v17
	v_fmac_f32_e32 v23, s2, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v23, s3, v19
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v23, s4, v22
	global_store_b32 v[0:1], v23, off
.LBB4_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13stencilConst1PfS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 24
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end4:
	.size	_Z13stencilConst1PfS_i, .Lfunc_end4-_Z13stencilConst1PfS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 408
; NumSgprs: 22
; NumVgprs: 24
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 24
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z13stencilConst2PfS_i  ; -- Begin function _Z13stencilConst2PfS_i
	.globl	_Z13stencilConst2PfS_i
	.p2align	8
	.type	_Z13stencilConst2PfS_i,@function
_Z13stencilConst2PfS_i:                 ; @_Z13stencilConst2PfS_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b32 s3, s[0:1], 0x10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	s_mul_i32 s15, s15, s2
	s_mov_b32 s2, exec_lo
	v_add3_u32 v0, v0, s15, 11
	v_cmpx_gt_i32_e64 s3, v0
	s_cbranch_execz .LBB5_2
; %bb.1:                                ; %.preheader.preheader
	s_load_b128 s[16:19], s[0:1], 0x0
	v_ashrrev_i32_e32 v1, 31, v0
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, const_stencilWeight@rel32@lo+4
	s_addc_u32 s1, s1, const_stencilWeight@rel32@hi+12
	s_load_b512 s[0:15], s[0:1], 0x0
	v_lshlrev_b64 v[20:21], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v22, vcc_lo, s16, v20
	v_add_co_ci_u32_e32 v23, vcc_lo, s17, v21, vcc_lo
	s_clause 0x5
	global_load_b128 v[0:3], v[22:23], off offset:-40
	global_load_b128 v[4:7], v[22:23], off offset:-24
	global_load_b128 v[8:11], v[22:23], off offset:-8
	global_load_b128 v[12:15], v[22:23], off offset:8
	global_load_b128 v[16:19], v[22:23], off offset:24
	global_load_b32 v22, v[22:23], off offset:40
	s_waitcnt vmcnt(5)
	v_fma_f32 v23, v0, s0, 0
	v_add_co_u32 v0, vcc_lo, s18, v20
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v23, s1, v1
	v_add_co_ci_u32_e32 v1, vcc_lo, s19, v21, vcc_lo
	v_fmac_f32_e32 v23, s2, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v23, s3, v3
	s_waitcnt vmcnt(4)
	v_fmac_f32_e32 v23, s4, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v23, s5, v5
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, const_stencilWeight@rel32@lo+68
	s_addc_u32 s5, s5, const_stencilWeight@rel32@hi+76
	s_clause 0x1
	s_load_b128 s[0:3], s[4:5], 0x0
	s_load_b32 s4, s[4:5], 0x10
	v_fmac_f32_e32 v23, s6, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v23, s7, v7
	s_waitcnt vmcnt(3)
	v_fmac_f32_e32 v23, s8, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v23, s9, v9
	v_fmac_f32_e32 v23, s10, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v23, s11, v11
	s_waitcnt vmcnt(2)
	v_fmac_f32_e32 v23, s12, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v23, s13, v13
	v_fmac_f32_e32 v23, s14, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v23, s15, v15
	s_waitcnt vmcnt(1) lgkmcnt(0)
	v_fmac_f32_e32 v23, s0, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v23, s1, v17
	v_fmac_f32_e32 v23, s2, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v23, s3, v19
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v23, s4, v22
	global_store_b32 v[0:1], v23, off
.LBB5_2:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13stencilConst2PfS_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 24
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end5:
	.size	_Z13stencilConst2PfS_i, .Lfunc_end5-_Z13stencilConst2PfS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 408
; NumSgprs: 22
; NumVgprs: 24
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 24
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z14stencilShared1PfS_i ; -- Begin function _Z14stencilShared1PfS_i
	.globl	_Z14stencilShared1PfS_i
	.p2align	8
	.type	_Z14stencilShared1PfS_i,@function
_Z14stencilShared1PfS_i:                ; @_Z14stencilShared1PfS_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b128 s[16:19], s[0:1], 0x0
	v_or_b32_e32 v3, 0xfffffc00, v0
	v_lshlrev_b32_e32 v4, 2, v0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mul_i32 s15, s15, s2
	s_mov_b32 s2, 0
	v_lshl_add_u32 v1, v0, 1, s15
.LBB6_1:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v2, 31, v1
	v_add_nc_u32_e32 v3, 0x400, v3
	v_lshlrev_b64 v[5:6], 2, v[1:2]
	v_add_nc_u32_e32 v1, 0x400, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v5, vcc_lo, s16, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s17, v6, vcc_lo
	v_cmp_lt_u32_e32 vcc_lo, 20, v3
	global_load_b32 v2, v[5:6], off
	s_or_b32 s2, vcc_lo, s2
	s_waitcnt vmcnt(0)
	ds_store_b32 v4, v2
	v_add_nc_u32_e32 v4, 0x1000, v4
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB6_1
; %bb.2:
	s_or_b32 exec_lo, exec_lo, s2
	s_load_b32 s0, s[0:1], 0x10
	v_add_nc_u32_e32 v1, s15, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v2, 11, v1
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_i32_e32 vcc_lo, s0, v2
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB6_4
; %bb.3:
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, const_stencilWeight@rel32@lo+4
	s_addc_u32 s1, s1, const_stencilWeight@rel32@hi+12
	v_lshlrev_b32_e32 v0, 2, v0
	s_load_b512 s[0:15], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_2addr_b32 v[2:3], v0 offset1:1
	ds_load_2addr_b32 v[4:5], v0 offset0:2 offset1:3
	ds_load_2addr_b32 v[6:7], v0 offset0:4 offset1:5
	ds_load_2addr_b32 v[8:9], v0 offset0:6 offset1:7
	s_waitcnt lgkmcnt(3)
	v_fma_f32 v10, v2, s0, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v10, s1, v3
	ds_load_2addr_b32 v[2:3], v0 offset0:8 offset1:9
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v10, s2, v4
	v_fmac_f32_e32 v10, s3, v5
	ds_load_2addr_b32 v[4:5], v0 offset0:10 offset1:11
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v10, s4, v6
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v10, s5, v7
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, const_stencilWeight@rel32@lo+68
	s_addc_u32 s5, s5, const_stencilWeight@rel32@hi+76
	s_clause 0x1
	s_load_b128 s[0:3], s[4:5], 0x0
	s_load_b32 s4, s[4:5], 0x10
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v10, s6, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v10, s7, v9
	ds_load_2addr_b32 v[6:7], v0 offset0:12 offset1:13
	ds_load_2addr_b32 v[8:9], v0 offset0:14 offset1:15
	v_fmac_f32_e32 v10, s8, v2
	v_fmac_f32_e32 v10, s9, v3
	ds_load_2addr_b32 v[2:3], v0 offset0:16 offset1:17
	v_fmac_f32_e32 v10, s10, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v10, s11, v5
	ds_load_2addr_b32 v[4:5], v0 offset0:18 offset1:19
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v10, s12, v6
	ds_load_b32 v6, v0 offset:80
	v_fmac_f32_e32 v10, s13, v7
	s_waitcnt lgkmcnt(3)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v10, s14, v8
	v_fmac_f32_e32 v10, s15, v9
	s_waitcnt lgkmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v10, s0, v2
	v_ashrrev_i32_e32 v2, 31, v1
	v_fmac_f32_e32 v10, s1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(1)
	v_fmac_f32_e32 v10, s2, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v0, vcc_lo, s18, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s19, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v10, s3, v5
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v10, s4, v6
	global_store_b32 v[0:1], v10, off offset:44
.LBB6_4:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14stencilShared1PfS_i
		.amdhsa_group_segment_fixed_size 4180
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end6:
	.size	_Z14stencilShared1PfS_i, .Lfunc_end6-_Z14stencilShared1PfS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 576
; NumSgprs: 22
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 4180 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z14stencilShared2PfS_i ; -- Begin function _Z14stencilShared2PfS_i
	.globl	_Z14stencilShared2PfS_i
	.p2align	8
	.type	_Z14stencilShared2PfS_i,@function
_Z14stencilShared2PfS_i:                ; @_Z14stencilShared2PfS_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x24
	s_load_b128 s[16:19], s[0:1], 0x0
	v_or_b32_e32 v3, 0xfffffc00, v0
	v_lshlrev_b32_e32 v4, 2, v0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mul_i32 s15, s15, s2
	s_mov_b32 s2, 0
	v_lshl_add_u32 v1, v0, 1, s15
.LBB7_1:                                ; =>This Inner Loop Header: Depth=1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v2, 31, v1
	v_add_nc_u32_e32 v3, 0x400, v3
	v_lshlrev_b64 v[5:6], 2, v[1:2]
	v_add_nc_u32_e32 v1, 0x400, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v5, vcc_lo, s16, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s17, v6, vcc_lo
	v_cmp_lt_u32_e32 vcc_lo, 20, v3
	global_load_b32 v2, v[5:6], off
	s_or_b32 s2, vcc_lo, s2
	s_waitcnt vmcnt(0)
	ds_store_b32 v4, v2
	v_add_nc_u32_e32 v4, 0x1000, v4
	s_and_not1_b32 exec_lo, exec_lo, s2
	s_cbranch_execnz .LBB7_1
; %bb.2:
	s_or_b32 exec_lo, exec_lo, s2
	s_load_b32 s0, s[0:1], 0x10
	v_add_nc_u32_e32 v1, s15, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v2, 11, v1
	s_waitcnt lgkmcnt(0)
	v_cmp_gt_i32_e32 vcc_lo, s0, v2
	s_and_saveexec_b32 s0, vcc_lo
	s_cbranch_execz .LBB7_4
; %bb.3:
	s_getpc_b64 s[0:1]
	s_add_u32 s0, s0, const_stencilWeight@rel32@lo+4
	s_addc_u32 s1, s1, const_stencilWeight@rel32@hi+12
	v_lshlrev_b32_e32 v0, 2, v0
	s_load_b512 s[0:15], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_2addr_b32 v[2:3], v0 offset1:1
	ds_load_2addr_b32 v[4:5], v0 offset0:2 offset1:3
	ds_load_2addr_b32 v[6:7], v0 offset0:4 offset1:5
	ds_load_2addr_b32 v[8:9], v0 offset0:6 offset1:7
	s_waitcnt lgkmcnt(3)
	v_fma_f32 v10, v2, s0, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v10, s1, v3
	ds_load_2addr_b32 v[2:3], v0 offset0:8 offset1:9
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v10, s2, v4
	v_fmac_f32_e32 v10, s3, v5
	ds_load_2addr_b32 v[4:5], v0 offset0:10 offset1:11
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v10, s4, v6
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v10, s5, v7
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, const_stencilWeight@rel32@lo+68
	s_addc_u32 s5, s5, const_stencilWeight@rel32@hi+76
	s_clause 0x1
	s_load_b128 s[0:3], s[4:5], 0x0
	s_load_b32 s4, s[4:5], 0x10
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v10, s6, v8
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v10, s7, v9
	ds_load_2addr_b32 v[6:7], v0 offset0:12 offset1:13
	ds_load_2addr_b32 v[8:9], v0 offset0:14 offset1:15
	v_fmac_f32_e32 v10, s8, v2
	v_fmac_f32_e32 v10, s9, v3
	ds_load_2addr_b32 v[2:3], v0 offset0:16 offset1:17
	v_fmac_f32_e32 v10, s10, v4
	s_delay_alu instid0(VALU_DEP_1)
	v_fmac_f32_e32 v10, s11, v5
	ds_load_2addr_b32 v[4:5], v0 offset0:18 offset1:19
	s_waitcnt lgkmcnt(3)
	v_fmac_f32_e32 v10, s12, v6
	ds_load_b32 v6, v0 offset:80
	v_fmac_f32_e32 v10, s13, v7
	s_waitcnt lgkmcnt(3)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v10, s14, v8
	v_fmac_f32_e32 v10, s15, v9
	s_waitcnt lgkmcnt(2)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v10, s0, v2
	v_ashrrev_i32_e32 v2, 31, v1
	v_fmac_f32_e32 v10, s1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_waitcnt lgkmcnt(1)
	v_fmac_f32_e32 v10, s2, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v0, vcc_lo, s18, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s19, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v10, s3, v5
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v10, s4, v6
	global_store_b32 v[0:1], v10, off offset:44
.LBB7_4:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z14stencilShared2PfS_i
		.amdhsa_group_segment_fixed_size 4180
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end7:
	.size	_Z14stencilShared2PfS_i, .Lfunc_end7-_Z14stencilShared2PfS_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 576
; NumSgprs: 22
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 4180 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.protected	const_stencilWeight     ; @const_stencilWeight
	.type	const_stencilWeight,@object
	.section	.bss,"aw",@nobits
	.globl	const_stencilWeight
	.p2align	4, 0x0
const_stencilWeight:
	.zero	84
	.size	const_stencilWeight, 84

	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym const_stencilWeight
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z7stencilPfS_iS_
    .private_segment_fixed_size: 0
    .sgpr_count:     24
    .sgpr_spill_count: 0
    .symbol:         _Z7stencilPfS_iS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     24
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z16stencilReadOnly1PfS_iS_
    .private_segment_fixed_size: 0
    .sgpr_count:     24
    .sgpr_spill_count: 0
    .symbol:         _Z16stencilReadOnly1PfS_iS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     24
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z16stencilReadOnly2PfS_iS_
    .private_segment_fixed_size: 0
    .sgpr_count:     24
    .sgpr_spill_count: 0
    .symbol:         _Z16stencilReadOnly2PfS_iS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     24
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
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amdhsa.version:
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...

	.end_amdgpu_metadata
