#include <stdio.h>
#include "cuda.h"
#define max(x,y)  ((x) > (y)? (x) : (y))
#define min(x,y)  ((x) < (y)? (x) : (y))
#define ceil(a,b) ((a) % (b) == 0 ? (a) / (b) : ((a) / (b)) + 1)

void check_error (const char* message) {
	cudaError_t error = cudaGetLastError ();
	if (error != cudaSuccess) {
		printf ("CUDA error : %s, %s\n", message, cudaGetErrorString (error));
		exit(-1);
	}
}

__global__ void curvi (double * __restrict__ in_r1, double *__restrict__ in_u1, double * __restrict__ in_u2, double *__restrict__ in_u3, double * __restrict__ in_mu, double * __restrict__ in_la, double * __restrict__ in_met1, double * __restrict__ in_met2, double * __restrict__ in_met3, double * __restrict__ in_met4, double * strx, double * stry, double c1, double c2, int N) {
	//Determing the block's indices
	int blockdim_k= (int)(blockDim.x);
	int k0 = (int)(blockIdx.x)*(blockdim_k);
	int k = max (k0, 0) + (int)(threadIdx.x);
	int blockdim_i= (int)(blockDim.z);
	int i0 = (int)(blockIdx.z)*(blockdim_i);
	int i = max (i0, 0) + (int)(threadIdx.z);

	double (*u1)[304][304] = (double (*)[304][304])in_u1;
	double (*u2)[304][304] = (double (*)[304][304])in_u2;
	double (*u3)[304][304] = (double (*)[304][304])in_u3;
	double (*mu)[304][304] = (double (*)[304][304])in_mu;
	double (*la)[304][304] = (double (*)[304][304])in_la;
	double (*r1)[304][304] = (double (*)[304][304])in_r1;
	double (*met1)[304][304] = (double (*)[304][304])in_met1;
	double (*met2)[304][304] = (double (*)[304][304])in_met2;
	double (*met3)[304][304] = (double (*)[304][304])in_met3;
	double (*met4)[304][304] = (double (*)[304][304])in_met4;

	if (i>=2 & k>=2 & i<=N-3 & k<=N-3) {
		for (int j=2; j<=N-3; j++) {
double _t_87_ = u1[i+2][j][k+2];
double _t_8_ = u1[i+2][j][k+2];
_t_87_ -= u1[i+2][j][k-2];
double _t_27_ = u1[i+2][j][k-2];
double _t_84_ = c2 * _t_87_;
double _t_88_ = u1[i+2][j][k+1];
double _t_47_ = u1[i+2][j][k+1];
_t_88_ -= u1[i+2][j][k-1];
double _t_66_ = u1[i+2][j][k-1];
_t_84_ += c1 * _t_88_;
double _t_86_ = 2.0 * mu[i+2][j][k];
_t_86_ += la[i+2][j][k];
double _t_85_ = _t_86_ * met2[i+2][j][k];
double _t_83_ = _t_85_ * met1[i+2][j][k];
double _t_283_ = la[i+2][j][k] * met1[i+2][j][k];
double _t_82_ = _t_83_ * _t_84_;
double _t_81_ = _t_82_ * strx[i];
double _t_93_ = u2[i+2][j][k+2];
double _t_13_ = u2[i+2][j][k+2];
_t_93_ -= u2[i+2][j][k-2];
double _t_32_ = u2[i+2][j][k-2];
double _t_91_ = c2 * _t_93_;
double _t_94_ = u2[i+2][j][k+1];
double _t_52_ = u2[i+2][j][k+1];
_t_94_ -= u2[i+2][j][k-1];
double _t_71_ = u2[i+2][j][k-1];
_t_91_ += c1 * _t_94_;
double _t_92_ = la[i+2][j][k] * met3[i+2][j][k];
double _t_90_ = _t_92_ * met1[i+2][j][k];
double _t_89_ = _t_90_ * _t_91_;
_t_81_ += _t_89_ * stry[j];
double _t_98_ = u3[i+2][j][k+2];
double _t_19_ = u3[i+2][j][k+2];
_t_98_ -= u3[i+2][j][k-2];
double _t_38_ = u3[i+2][j][k-2];
double _t_96_ = c2 * _t_98_;
double _t_99_ = u3[i+2][j][k+1];
double _t_58_ = u3[i+2][j][k+1];
_t_99_ -= u3[i+2][j][k-1];
double _t_77_ = u3[i+2][j][k-1];
_t_96_ += c1 * _t_99_;
double _t_97_ = la[i+2][j][k] * met4[i+2][j][k];
double _t_95_ = _t_97_ * met1[i+2][j][k];
_t_81_ += _t_95_ * _t_96_;
double _t_105_ = u1[i-2][j][k+2];
_t_8_ -= u1[i-2][j][k+2];
_t_105_ -= u1[i-2][j][k-2];
_t_27_ -= u1[i-2][j][k-2];
double _t_102_ = c2 * _t_105_;
double _t_106_ = u1[i-2][j][k+1];
_t_47_ -= u1[i-2][j][k+1];
_t_106_ -= u1[i-2][j][k-1];
_t_66_ -= u1[i-2][j][k-1];
_t_102_ += c1 * _t_106_;
double _t_104_ = 2.0 * mu[i-2][j][k];
_t_104_ += la[i-2][j][k];
double _t_103_ = _t_104_ * met2[i-2][j][k];
double _t_101_ = _t_103_ * met1[i-2][j][k];
double _t_288_ = la[i-2][j][k] * met1[i-2][j][k];
double _t_100_ = _t_101_ * _t_102_;
_t_81_ += _t_100_ * strx[i];
double _t_111_ = u2[i-2][j][k+2];
_t_13_ -= u2[i-2][j][k+2];
_t_111_ -= u2[i-2][j][k-2];
_t_32_ -= u2[i-2][j][k-2];
double _t_109_ = c2 * _t_111_;
double _t_112_ = u2[i-2][j][k+1];
_t_52_ -= u2[i-2][j][k+1];
_t_112_ -= u2[i-2][j][k-1];
_t_71_ -= u2[i-2][j][k-1];
_t_109_ += c1 * _t_112_;
double _t_110_ = la[i-2][j][k] * met3[i-2][j][k];
double _t_108_ = _t_110_ * met1[i-2][j][k];
double _t_107_ = _t_108_ * _t_109_;
_t_81_ += _t_107_ * stry[j];
double _t_116_ = u3[i-2][j][k+2];
_t_19_ -= u3[i-2][j][k+2];
_t_116_ -= u3[i-2][j][k-2];
_t_38_ -= u3[i-2][j][k-2];
double _t_114_ = c2 * _t_116_;
double _t_117_ = u3[i-2][j][k+1];
_t_58_ -= u3[i-2][j][k+1];
_t_117_ -= u3[i-2][j][k-1];
_t_77_ -= u3[i-2][j][k-1];
_t_114_ += c1 * _t_117_;
double _t_115_ = la[i-2][j][k] * met4[i-2][j][k];
double _t_113_ = _t_115_ * met1[i-2][j][k];
_t_81_ += _t_113_ * _t_114_;
double _t_80_ = c2 * _t_81_;
double _t_124_ = u1[i+1][j][k+2];
double _t_9_ = u1[i+1][j][k+2];
_t_124_ -= u1[i+1][j][k-2];
double _t_28_ = u1[i+1][j][k-2];
double _t_121_ = c2 * _t_124_;
double _t_125_ = u1[i+1][j][k+1];
double _t_48_ = u1[i+1][j][k+1];
_t_125_ -= u1[i+1][j][k-1];
double _t_67_ = u1[i+1][j][k-1];
_t_121_ += c1 * _t_125_;
double _t_123_ = 2.0 * mu[i+1][j][k];
_t_123_ += la[i+1][j][k];
double _t_122_ = _t_123_ * met2[i+1][j][k];
double _t_120_ = _t_122_ * met1[i+1][j][k];
double _t_294_ = la[i+1][j][k] * met1[i+1][j][k];
double _t_119_ = _t_120_ * _t_121_;
double _t_118_ = _t_119_ * strx[i];
double _t_130_ = u2[i+1][j][k+2];
double _t_14_ = u2[i+1][j][k+2];
_t_130_ -= u2[i+1][j][k-2];
double _t_33_ = u2[i+1][j][k-2];
double _t_128_ = c2 * _t_130_;
double _t_131_ = u2[i+1][j][k+1];
double _t_53_ = u2[i+1][j][k+1];
_t_131_ -= u2[i+1][j][k-1];
double _t_72_ = u2[i+1][j][k-1];
_t_128_ += c1 * _t_131_;
double _t_129_ = la[i+1][j][k] * met3[i+1][j][k];
double _t_127_ = _t_129_ * met1[i+1][j][k];
double _t_126_ = _t_127_ * _t_128_;
_t_118_ += _t_126_ * stry[j];
double _t_135_ = u3[i+1][j][k+2];
double _t_20_ = u3[i+1][j][k+2];
_t_135_ -= u3[i+1][j][k-2];
double _t_39_ = u3[i+1][j][k-2];
double _t_133_ = c2 * _t_135_;
double _t_136_ = u3[i+1][j][k+1];
double _t_59_ = u3[i+1][j][k+1];
_t_136_ -= u3[i+1][j][k-1];
double _t_78_ = u3[i+1][j][k-1];
_t_133_ += c1 * _t_136_;
double _t_134_ = la[i+1][j][k] * met4[i+1][j][k];
double _t_132_ = _t_134_ * met1[i+1][j][k];
_t_118_ += _t_132_ * _t_133_;
double _t_142_ = u1[i-1][j][k+2];
_t_9_ -= u1[i-1][j][k+2];
_t_142_ -= u1[i-1][j][k-2];
_t_28_ -= u1[i-1][j][k-2];
double _t_139_ = c2 * _t_142_;
double _t_143_ = u1[i-1][j][k+1];
_t_48_ -= u1[i-1][j][k+1];
_t_143_ -= u1[i-1][j][k-1];
_t_67_ -= u1[i-1][j][k-1];
_t_139_ += c1 * _t_143_;
double _t_141_ = 2.0 * mu[i-1][j][k];
_t_141_ += la[i-1][j][k];
double _t_140_ = _t_141_ * met2[i-1][j][k];
double _t_138_ = _t_140_ * met1[i-1][j][k];
double _t_299_ = la[i-1][j][k] * met1[i-1][j][k];
double _t_137_ = _t_138_ * _t_139_;
_t_118_ += _t_137_ * strx[i];
double _t_148_ = u2[i-1][j][k+2];
_t_14_ -= u2[i-1][j][k+2];
_t_148_ -= u2[i-1][j][k-2];
_t_33_ -= u2[i-1][j][k-2];
double _t_146_ = c2 * _t_148_;
double _t_149_ = u2[i-1][j][k+1];
_t_53_ -= u2[i-1][j][k+1];
_t_149_ -= u2[i-1][j][k-1];
_t_72_ -= u2[i-1][j][k-1];
_t_146_ += c1 * _t_149_;
double _t_147_ = la[i-1][j][k] * met3[i-1][j][k];
double _t_145_ = _t_147_ * met1[i-1][j][k];
double _t_144_ = _t_145_ * _t_146_;
_t_118_ += _t_144_ * stry[j];
double _t_153_ = u3[i-1][j][k+2];
_t_20_ -= u3[i-1][j][k+2];
_t_153_ -= u3[i-1][j][k-2];
_t_39_ -= u3[i-1][j][k-2];
double _t_151_ = c2 * _t_153_;
double _t_154_ = u3[i-1][j][k+1];
_t_59_ -= u3[i-1][j][k+1];
_t_154_ -= u3[i-1][j][k-1];
_t_78_ -= u3[i-1][j][k-1];
_t_151_ += c1 * _t_154_;
double _t_152_ = la[i-1][j][k] * met4[i-1][j][k];
double _t_150_ = _t_152_ * met1[i-1][j][k];
_t_118_ += _t_150_ * _t_151_;
_t_80_ += c1 * _t_118_;
double r1ic0jc0kc0 = r1[i][j][k];
r1ic0jc0kc0 += _t_80_ * stry[j];

double _t_17_ = c2 * _t_19_;
double _v_0_ = c2 * _t_8_;
double _v_3_ = c2 * _t_13_;
double _v_9_ = c2 * _t_27_;
double _v_12_ = c2 * _t_32_;
double _v_15_ = c2 * _t_38_;
double _v_25_ = c2 * _t_58_;
double _v_19_ = c2 * _t_47_;
double _v_22_ = c2 * _t_52_;
double _v_28_ = c2 * _t_66_;
double _v_31_ = c2 * _t_71_;
double _v_34_ = c2 * _t_77_;
_t_17_ += c1 * _t_20_;
double _v_1_ = c1 * _t_9_;
double _v_4_ = c1 * _t_14_;
double _v_10_ = c1 * _t_28_;
double _v_13_ = c1 * _t_33_;
double _v_16_ = c1 * _t_39_;
double _v_26_ = c1 * _t_59_;
double _v_20_ = c1 * _t_48_;
double _v_23_ = c1 * _t_53_;
double _v_29_ = c1 * _t_67_;
double _v_32_ = c1 * _t_72_;
double _v_35_ = c1 * _t_78_;
double _t_18_ = mu[i][j][k+2] * met4[i][j][k+2];
double _t_16_ = _t_18_ * met1[i][j][k+2];
double _t_15_ = _t_16_ * _t_17_;
double _t_1_ = _t_15_ * stry[j];
double _t_5_ = _v_0_;
_t_5_ += _v_1_;
double _t_7_ = 2.0 * mu[i][j][k+2];
double _t_12_ = mu[i][j][k+2] * met3[i][j][k+2];
_t_7_ += la[i][j][k+2];
double _t_6_ = _t_7_ * met2[i][j][k+2];
double _t_166_ = la[i][j][k+2] * met2[i][j][k+2];
double _t_4_ = _t_6_ * met1[i][j][k+2];
double _t_3_ = _t_4_ * _t_5_;
double _t_2_ = _t_3_ * strx[i];
_t_1_ += _t_2_ * stry[j];
double _t_11_ = _v_3_;
_t_11_ += _v_4_;
double _t_10_ = _t_12_ * met1[i][j][k+2];
_t_1_ += _t_10_ * _t_11_;
double _t_24_ = _v_9_;
_t_24_ += _v_10_;
double _t_26_ = 2.0 * mu[i][j][k-2];
_t_26_ += la[i][j][k-2];
double _t_25_ = _t_26_ * met2[i][j][k-2];
double _t_178_ = la[i][j][k-2] * met2[i][j][k-2];
double _t_23_ = _t_25_ * met1[i][j][k-2];
double _t_22_ = _t_23_ * _t_24_;
double _t_21_ = _t_22_ * strx[i];
_t_1_ += _t_21_ * stry[j];
double _t_30_ = _v_12_;
_t_30_ += _v_13_;
double _t_31_ = mu[i][j][k-2] * met3[i][j][k-2];
double _t_37_ = mu[i][j][k-2] * met4[i][j][k-2];
double _t_29_ = _t_31_ * met1[i][j][k-2];
_t_1_ += _t_29_ * _t_30_;
double _t_36_ = _v_15_;
_t_36_ += _v_16_;
double _t_35_ = _t_37_ * met1[i][j][k-2];
double _t_34_ = _t_35_ * _t_36_;
_t_1_ += _t_34_ * stry[j];
double _t_0_ = c2 * _t_1_;
double _t_56_ = _v_25_;
_t_56_ += _v_26_;
double _t_57_ = mu[i][j][k+1] * met4[i][j][k+1];
double _t_55_ = _t_57_ * met1[i][j][k+1];
double _t_54_ = _t_55_ * _t_56_;
double _t_40_ = _t_54_ * stry[j];
double _t_44_ = _v_19_;
_t_44_ += _v_20_;
double _t_46_ = 2.0 * mu[i][j][k+1];
double _t_51_ = mu[i][j][k+1] * met3[i][j][k+1];
_t_46_ += la[i][j][k+1];
double _t_45_ = _t_46_ * met2[i][j][k+1];
double _t_191_ = la[i][j][k+1] * met2[i][j][k+1];
double _t_43_ = _t_45_ * met1[i][j][k+1];
double _t_42_ = _t_43_ * _t_44_;
double _t_41_ = _t_42_ * strx[i+2];
_t_40_ += _t_41_ * stry[j];
double _t_50_ = _v_22_;
_t_50_ += _v_23_;
double _t_49_ = _t_51_ * met1[i][j][k+1];
_t_40_ += _t_49_ * _t_50_;
double _t_63_ = _v_28_;
_t_63_ += _v_29_;
double _t_65_ = 2.0 * mu[i][j][k-1];
_t_65_ += la[i][j][k-1];
double _t_64_ = _t_65_ * met2[i][j][k-1];
double _t_203_ = la[i][j][k-1] * met2[i][j][k-1];
double _t_62_ = _t_64_ * met1[i][j][k-1];
double _t_61_ = _t_62_ * _t_63_;
double _t_60_ = _t_61_ * strx[i-2];
_t_40_ += _t_60_ * stry[j];
double _t_69_ = _v_31_;
_t_69_ += _v_32_;
double _t_70_ = mu[i][j][k-1] * met3[i][j][k-1];
double _t_76_ = mu[i][j][k-1] * met4[i][j][k-1];
double _t_68_ = _t_70_ * met1[i][j][k-1];
_t_40_ += _t_68_ * _t_69_;
double _t_75_ = _v_34_;
_t_75_ += _v_35_;
double _t_74_ = _t_76_ * met1[i][j][k-1];
double _t_73_ = _t_74_ * _t_75_;
_t_40_ += _t_73_ * stry[j];
_t_0_ += c1 * _t_40_;
r1ic0jc0kc0 += _t_0_;
double _t_281_ = _t_283_ * met1[i+2][j][k];
double _t_286_ = _t_288_ * met1[i-2][j][k];
double _t_292_ = _t_294_ * met1[i+1][j][k];
double _t_297_ = _t_299_ * met1[i-1][j][k];

double _t_161_ = _t_12_;
double _t_159_ = _t_161_ * met1[i][j][k+2];
double _t_162_ = u1[i][j+2][k+2];
double _t_213_ = u1[i][j+2][k+2];
_t_162_ -= u1[i][j-2][k+2];
double _t_225_ = u1[i][j-2][k+2];
double _t_160_ = c2 * _t_162_;
double _t_163_ = u1[i][j+1][k+2];
double _t_238_ = u1[i][j+1][k+2];
_t_163_ -= u1[i][j-1][k+2];
double _t_250_ = u1[i][j-1][k+2];
_t_160_ += c1 * _t_163_;
double _t_158_ = _t_159_ * _t_160_;
double _t_157_ = _t_158_ * stry[j+2];
double _t_156_ = _t_157_ * strx[i];
double _t_164_ = _t_166_ * met1[i][j][k+2];
double _t_167_ = u2[i][j+2][k+2];
double _t_218_ = u2[i][j+2][k+2];
_t_167_ -= u2[i][j-2][k+2];
double _t_230_ = u2[i][j-2][k+2];
double _t_165_ = c2 * _t_167_;
double _t_168_ = u2[i][j+1][k+2];
double _t_243_ = u2[i][j+1][k+2];
_t_168_ -= u2[i][j-1][k+2];
double _t_255_ = u2[i][j-1][k+2];
_t_165_ += c1 * _t_168_;
_t_156_ += _t_164_ * _t_165_;
double _t_173_ = _t_31_;
double _t_171_ = _t_173_ * met1[i][j][k-2];
double _t_174_ = u1[i][j+2][k-2];
_t_213_ -= u1[i][j+2][k-2];
_t_174_ -= u1[i][j-2][k-2];
_t_225_ -= u1[i][j-2][k-2];
double _t_172_ = c2 * _t_174_;
double _t_175_ = u1[i][j+1][k-2];
_t_238_ -= u1[i][j+1][k-2];
_t_175_ -= u1[i][j-1][k-2];
_t_250_ -= u1[i][j-1][k-2];
_t_172_ += c1 * _t_175_;
double _t_170_ = _t_171_ * _t_172_;
double _t_169_ = _t_170_ * stry[j];
_t_156_ += _t_169_ * strx[i];
double _t_176_ = _t_178_ * met1[i][j][k-2];
double _t_179_ = u2[i][j+2][k-2];
_t_218_ -= u2[i][j+2][k-2];
_t_179_ -= u2[i][j-2][k-2];
_t_230_ -= u2[i][j-2][k-2];
double _t_177_ = c2 * _t_179_;
double _t_180_ = u2[i][j+1][k-2];
_t_243_ -= u2[i][j+1][k-2];
_t_180_ -= u2[i][j-1][k-2];
_t_255_ -= u2[i][j-1][k-2];
_t_177_ += c1 * _t_180_;
_t_156_ += _t_176_ * _t_177_;
double _t_155_ = c2 * _t_156_;
double _t_186_ = _t_51_;
double _t_184_ = _t_186_ * met1[i][j][k+1];
double _t_187_ = u1[i][j+2][k+1];
double _t_214_ = u1[i][j+2][k+1];
_t_187_ -= u1[i][j-2][k+1];
double _t_226_ = u1[i][j-2][k+1];
double _t_185_ = c2 * _t_187_;
double _t_188_ = u1[i][j+1][k+1];
double _t_239_ = u1[i][j+1][k+1];
_t_188_ -= u1[i][j-1][k+1];
double _t_251_ = u1[i][j-1][k+1];
_t_185_ += c1 * _t_188_;
double _t_183_ = _t_184_ * _t_185_;
double _t_182_ = _t_183_ * stry[j-2];
double _t_181_ = _t_182_ * strx[i];
double _t_189_ = _t_191_ * met1[i][j][k+1];
double _t_192_ = u2[i][j+2][k+1];
double _t_219_ = u2[i][j+2][k+1];
_t_192_ -= u2[i][j-2][k+1];
double _t_231_ = u2[i][j-2][k+1];
double _t_190_ = c2 * _t_192_;
double _t_193_ = u2[i][j+1][k+1];
double _t_244_ = u2[i][j+1][k+1];
_t_193_ -= u2[i][j-1][k+1];
double _t_256_ = u2[i][j-1][k+1];
_t_190_ += c1 * _t_193_;
_t_181_ += _t_189_ * _t_190_;
double _t_198_ = _t_70_;
double _t_196_ = _t_198_ * met1[i][j][k-1];
double _t_199_ = u1[i][j+2][k-1];
_t_214_ -= u1[i][j+2][k-1];
_t_199_ -= u1[i][j-2][k-1];
_t_226_ -= u1[i][j-2][k-1];
double _t_197_ = c2 * _t_199_;
double _t_200_ = u1[i][j+1][k-1];
_t_239_ -= u1[i][j+1][k-1];
_t_200_ -= u1[i][j-1][k-1];
_t_251_ -= u1[i][j-1][k-1];
_t_197_ += c1 * _t_200_;
double _t_195_ = _t_196_ * _t_197_;
double _t_194_ = _t_195_ * stry[j];
_t_181_ += _t_194_ * strx[i];
double _t_201_ = _t_203_ * met1[i][j][k-1];
double _t_204_ = u2[i][j+2][k-1];
_t_219_ -= u2[i][j+2][k-1];
_t_204_ -= u2[i][j-2][k-1];
_t_231_ -= u2[i][j-2][k-1];
double _t_202_ = c2 * _t_204_;
double _t_205_ = u2[i][j+1][k-1];
_t_244_ -= u2[i][j+1][k-1];
_t_205_ -= u2[i][j-1][k-1];
_t_256_ -= u2[i][j-1][k-1];
_t_202_ += c1 * _t_205_;
_t_181_ += _t_201_ * _t_202_;
_t_155_ += c1 * _t_181_;
r1ic0jc0kc0 += _t_155_;

double _t_211_ = c2 * _t_213_;
double _v_105_ = c2 * _t_218_;
double _v_108_ = c2 * _t_225_;
double _v_111_ = c2 * _t_230_;
double _v_115_ = c2 * _t_238_;
double _v_118_ = c2 * _t_243_;
double _v_121_ = c2 * _t_250_;
double _v_124_ = c2 * _t_255_;
_t_211_ += c1 * _t_214_;
double _v_106_ = c1 * _t_219_;
double _v_109_ = c1 * _t_226_;
double _v_112_ = c1 * _t_231_;
double _v_116_ = c1 * _t_239_;
double _v_119_ = c1 * _t_244_;
double _v_122_ = c1 * _t_251_;
double _v_125_ = c1 * _t_256_;
double _t_212_ = mu[i][j+2][k] * met3[i][j+2][k];
double _t_210_ = _t_212_ * met1[i][j+2][k];
double _t_209_ = _t_210_ * _t_211_;
double _t_208_ = _t_209_ * stry[j+1];
double _t_207_ = _t_208_ * strx[i];
double _t_216_ = _v_105_;
_t_216_ += _v_106_;
double _t_217_ = mu[i][j+2][k] * met2[i][j+2][k];
double _t_215_ = _t_217_ * met1[i][j+2][k];
_t_207_ += _t_215_ * _t_216_;
double _t_223_ = _v_108_;
_t_223_ += _v_109_;
double _t_224_ = mu[i][j-2][k] * met3[i][j-2][k];
double _t_222_ = _t_224_ * met1[i][j-2][k];
double _t_221_ = _t_222_ * _t_223_;
double _t_220_ = _t_221_ * stry[j];
_t_207_ += _t_220_ * strx[i];
double _t_228_ = _v_111_;
_t_228_ += _v_112_;
double _t_229_ = mu[i][j-2][k] * met2[i][j-2][k];
double _t_227_ = _t_229_ * met1[i][j-2][k];
_t_207_ += _t_227_ * _t_228_;
double _t_206_ = c2 * _t_207_;
double _t_236_ = _v_115_;
_t_236_ += _v_116_;
double _t_237_ = mu[i][j+1][k] * met3[i][j+1][k];
double _t_235_ = _t_237_ * met1[i][j+1][k];
double _t_234_ = _t_235_ * _t_236_;
double _t_233_ = _t_234_ * stry[j-1];
double _t_232_ = _t_233_ * strx[i];
double _t_241_ = _v_118_;
_t_241_ += _v_119_;
double _t_242_ = mu[i][j+1][k] * met2[i][j+1][k];
double _t_240_ = _t_242_ * met1[i][j+1][k];
_t_232_ += _t_240_ * _t_241_;
double _t_248_ = _v_121_;
_t_248_ += _v_122_;
double _t_249_ = mu[i][j-1][k] * met3[i][j-1][k];
double _t_247_ = _t_249_ * met1[i][j-1][k];
double _t_246_ = _t_247_ * _t_248_;
double _t_245_ = _t_246_ * stry[j];
_t_232_ += _t_245_ * strx[i];
double _t_253_ = _v_124_;
_t_253_ += _v_125_;
double _t_254_ = mu[i][j-1][k] * met2[i][j-1][k];
double _t_252_ = _t_254_ * met1[i][j-1][k];
_t_232_ += _t_252_ * _t_253_;
_t_206_ += c1 * _t_232_;
r1ic0jc0kc0 += _t_206_;

double _t_261_ = mu[i][j+2][k] * met1[i][j+2][k];
double _t_259_ = _t_261_ * met1[i][j+2][k];
double _t_262_ = u2[i+2][j+2][k];
_t_262_ -= u2[i-2][j+2][k];
double _t_284_ = u2[i+2][j+2][k];
_t_284_ -= u2[i+2][j-2][k];
double _t_289_ = u2[i-2][j+2][k];
_t_289_ -= u2[i-2][j-2][k];
double _t_267_ = u2[i+2][j-2][k];
_t_267_ -= u2[i-2][j-2][k];
double _t_260_ = c2 * _t_262_;
double _t_263_ = u2[i+1][j+2][k];
_t_263_ -= u2[i-1][j+2][k];
double _t_295_ = u2[i+1][j+2][k];
_t_295_ -= u2[i+1][j-2][k];
double _t_300_ = u2[i-1][j+2][k];
_t_300_ -= u2[i-1][j-2][k];
double _t_268_ = u2[i+1][j-2][k];
_t_268_ -= u2[i-1][j-2][k];
_t_260_ += c1 * _t_263_;
double _t_258_ = _t_259_ * _t_260_;
double _t_266_ = mu[i][j-2][k] * met1[i][j-2][k];
double _t_264_ = _t_266_ * met1[i][j-2][k];
double _t_265_ = c2 * _t_267_;
double _v_142_ = c2 * _t_284_;
double _v_145_ = c2 * _t_289_;
double _v_149_ = c2 * _t_295_;
double _v_152_ = c2 * _t_300_;
_t_265_ += c1 * _t_268_;
_t_258_ += _t_264_ * _t_265_;
double _t_257_ = c2 * _t_258_;
double _t_282_ = _v_142_;
double _t_285_ = u2[i+2][j+1][k];
_t_285_ -= u2[i+2][j-1][k];
double _t_273_ = u2[i+2][j+1][k];
_t_273_ -= u2[i-2][j+1][k];
double _t_278_ = u2[i+2][j-1][k];
_t_278_ -= u2[i-2][j-1][k];
double _t_290_ = u2[i-2][j+1][k];
_t_290_ -= u2[i-2][j-1][k];
_t_282_ += c1 * _t_285_;
double _t_280_ = _t_281_ * _t_282_;
double _t_287_ = _v_145_;
_t_287_ += c1 * _t_290_;
_t_280_ += _t_286_ * _t_287_;
_t_257_ += c2 * _t_280_;
double _t_272_ = mu[i][j+1][k] * met1[i][j+1][k];
double _t_270_ = _t_272_ * met1[i][j+1][k];
double _t_271_ = c2 * _t_273_;
double _v_138_ = c2 * _t_278_;
double _t_274_ = u2[i+1][j+1][k];
_t_274_ -= u2[i-1][j+1][k];
double _t_296_ = u2[i+1][j+1][k];
_t_296_ -= u2[i+1][j-1][k];
double _t_301_ = u2[i-1][j+1][k];
_t_301_ -= u2[i-1][j-1][k];
double _t_279_ = u2[i+1][j-1][k];
_t_279_ -= u2[i-1][j-1][k];
_t_271_ += c1 * _t_274_;
double _t_269_ = _t_270_ * _t_271_;
double _t_277_ = mu[i][j-1][k] * met1[i][j-1][k];
double _t_275_ = _t_277_ * met1[i][j-1][k];
double _t_276_ = _v_138_;
_t_276_ += c1 * _t_279_;
double _v_150_ = c1 * _t_296_;
double _v_153_ = c1 * _t_301_;
_t_269_ += _t_275_ * _t_276_;
_t_257_ += c1 * _t_269_;
double _t_293_ = _v_149_;
_t_293_ += _v_150_;
double _t_291_ = _t_292_ * _t_293_;
double _t_298_ = _v_152_;
_t_298_ += _v_153_;
_t_291_ += _t_297_ * _t_298_;
_t_257_ += c1 * _t_291_;
r1ic0jc0kc0 += _t_257_;

r1[i][j][k] = r1ic0jc0kc0;

		} 
	}
}

extern "C" void host_code (double *h_r1, double *h_u1, double *h_u2, double *h_u3,  double *h_mu, double *h_la, double *h_met1, double *h_met2, double *h_met3, double *h_met4, double *h_strx, double *h_stry, double c1, double c2, int N) {
	double *r1;
	cudaMalloc (&r1, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for r1\n");
	cudaMemcpy (r1, h_r1, sizeof(double)*N*N*N, cudaMemcpyHostToDevice);
	double *u1;
	cudaMalloc (&u1, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for u1\n");
	cudaMemcpy (u1, h_u1, sizeof(double)*N*N*N, cudaMemcpyHostToDevice);
	double *u2;
	cudaMalloc (&u2, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for u2\n");
	cudaMemcpy (u2, h_u2, sizeof(double)*N*N*N, cudaMemcpyHostToDevice);
	double *u3;
	cudaMalloc (&u3, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for u3\n");
	cudaMemcpy (u3, h_u3, sizeof(double)*N*N*N, cudaMemcpyHostToDevice);
	double *mu;
	cudaMalloc (&mu, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for mu\n");
	cudaMemcpy (mu, h_mu, sizeof(double)*N*N*N, cudaMemcpyHostToDevice);
	double *la;
	cudaMalloc (&la, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for la\n");
	cudaMemcpy (la, h_la, sizeof(double)*N*N*N, cudaMemcpyHostToDevice);
	double *met1;
	cudaMalloc (&met1, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for met1\n");
	cudaMemcpy (met1, h_met1, sizeof(double)*N*N*N, cudaMemcpyHostToDevice);
	double *met2;
	cudaMalloc (&met2, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for met2\n");
	cudaMemcpy (met2, h_met2, sizeof(double)*N*N*N, cudaMemcpyHostToDevice);
	double *met3;
	cudaMalloc (&met3, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for met3\n");
	cudaMemcpy (met3, h_met3, sizeof(double)*N*N*N, cudaMemcpyHostToDevice);
	double *met4;
	cudaMalloc (&met4, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for met4\n");
	cudaMemcpy (met4, h_met4, sizeof(double)*N*N*N, cudaMemcpyHostToDevice);
	double *strx;
	cudaMalloc (&strx, sizeof(double)*N);
	check_error ("Failed to allocate device memory for strx\n");
	cudaMemcpy (strx, h_strx, sizeof(double)*N, cudaMemcpyHostToDevice);
	double *stry;
	cudaMalloc (&stry, sizeof(double)*N);
	check_error ("Failed to allocate device memory for stry\n");
	cudaMemcpy (stry, h_stry, sizeof(double)*N, cudaMemcpyHostToDevice);

	dim3 blockconfig (16, 1, 8);
	dim3 gridconfig (ceil(N, blockconfig.x), 1, ceil(N, blockconfig.z));

	curvi <<<gridconfig, blockconfig>>> (r1, u1, u2, u3, mu, la, met1, met2, met3, met4, strx, stry, c1, c2, N);
	cudaMemcpy (h_r1, r1, sizeof(double)*N*N*N, cudaMemcpyDeviceToHost);
}

	.file	"tmpxft_0023eede_00000000-6_reordered-d.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.type	_Z10cudaMallocIdE9cudaErrorPPT_m.isra.0, @function
_Z10cudaMallocIdE9cudaErrorPPT_m.isra.0:
.LFB2173:
	.cfi_startproc
	jmp	cudaMalloc@PLT
	.cfi_endproc
.LFE2173:
	.size	_Z10cudaMallocIdE9cudaErrorPPT_m.isra.0, .-_Z10cudaMallocIdE9cudaErrorPPT_m.isra.0
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"CUDA error : %s, %s\n"
	.text
	.globl	_Z11check_errorPKc
	.type	_Z11check_errorPKc, @function
_Z11check_errorPKc:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rdi, %rbx
	call	cudaGetLastError@PLT
	testl	%eax, %eax
	je	.L3
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	movl	$2, %edi
	movq	%rbx, %rdx
	leaq	.LC0(%rip), %rsi
	movq	%rax, %rcx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	orl	$-1, %edi
	call	exit@PLT
.L3:
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z11check_errorPKc, .-_Z11check_errorPKc
	.globl	_Z49__device_stub__Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddiPdS_S_S_S_S_S_S_S_S_S_S_ddi
	.type	_Z49__device_stub__Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddiPdS_S_S_S_S_S_S_S_S_S_S_ddi, @function
_Z49__device_stub__Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddiPdS_S_S_S_S_S_S_S_S_S_S_ddi:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$312, %rsp
	.cfi_def_cfa_offset 320
	movq	352(%rsp), %rax
	movsd	%xmm0, 8(%rsp)
	movsd	%xmm1, (%rsp)
	movq	%rax, 24(%rsp)
	movq	360(%rsp), %rax
	movq	%rax, 16(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 296(%rsp)
	xorl	%eax, %eax
	leaq	32(%rsp), %rax
	movq	%rdi, 32(%rsp)
	leaq	128(%rsp), %rdi
	movq	%rax, 176(%rsp)
	leaq	40(%rsp), %rax
	movq	%rax, 184(%rsp)
	leaq	48(%rsp), %rax
	movq	%rax, 192(%rsp)
	leaq	56(%rsp), %rax
	movq	%rax, 200(%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 208(%rsp)
	leaq	72(%rsp), %rax
	movq	%rax, 216(%rsp)
	movq	320(%rsp), %rax
	movq	%rsi, 40(%rsp)
	leaq	140(%rsp), %rsi
	movq	%rax, 80(%rsp)
	leaq	80(%rsp), %rax
	movq	%rax, 224(%rsp)
	movq	328(%rsp), %rax
	movq	%rdx, 48(%rsp)
	leaq	112(%rsp), %rdx
	movq	%rax, 88(%rsp)
	leaq	88(%rsp), %rax
	movq	%rax, 232(%rsp)
	movq	336(%rsp), %rax
	movq	%rcx, 56(%rsp)
	leaq	120(%rsp), %rcx
	movq	%rax, 96(%rsp)
	leaq	96(%rsp), %rax
	movq	%rax, 240(%rsp)
	movq	344(%rsp), %rax
	movq	%r8, 64(%rsp)
	movq	%r9, 72(%rsp)
	movq	%rax, 104(%rsp)
	leaq	104(%rsp), %rax
	movq	%rax, 248(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 256(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 264(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 272(%rsp)
	movq	%rsp, %rax
	movq	%rax, 280(%rsp)
	leaq	368(%rsp), %rax
	movq	%rax, 288(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 128(%rsp)
	movl	$1, 136(%rsp)
	movq	%rax, 140(%rsp)
	movl	$1, 148(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L7
	pushq	120(%rsp)
	.cfi_def_cfa_offset 328
	leaq	_Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddi(%rip), %rdi
	pushq	120(%rsp)
	.cfi_def_cfa_offset 336
	movq	156(%rsp), %rcx
	movl	164(%rsp), %r8d
	movq	144(%rsp), %rsi
	movl	152(%rsp), %edx
	leaq	192(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 328
	popq	%rdx
	.cfi_def_cfa_offset 320
.L7:
	movq	296(%rsp), %rax
	subq	%fs:40, %rax
	je	.L9
	call	__stack_chk_fail@PLT
.L9:
	addq	$312, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z49__device_stub__Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddiPdS_S_S_S_S_S_S_S_S_S_S_ddi, .-_Z49__device_stub__Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddiPdS_S_S_S_S_S_S_S_S_S_S_ddi
	.globl	_Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddi
	.type	_Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddi, @function
_Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddi:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z49__device_stub__Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddiPdS_S_S_S_S_S_S_S_S_S_S_ddi
	.cfi_endproc
.LFE2054:
	.size	_Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddi, .-_Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddi
	.section	.rodata.str1.1
.LC1:
	.string	"Failed to allocate device memory for r1\n"
.LC2:
	.string	"Failed to allocate device memory for u1\n"
.LC3:
	.string	"Failed to allocate device memory for u2\n"
.LC4:
	.string	"Failed to allocate device memory for u3\n"
.LC5:
	.string	"Failed to allocate device memory for mu\n"
.LC6:
	.string	"Failed to allocate device memory for la\n"
.LC7:
	.string	"Failed to allocate device memory for met1\n"
.LC8:
	.string	"Failed to allocate device memory for met2\n"
.LC9:
	.string	"Failed to allocate device memory for met3\n"
.LC10:
	.string	"Failed to allocate device memory for met4\n"
.LC11:
	.string	"Failed to allocate device memory for strx\n"
.LC12:
	.string	"Failed to allocate device memory for stry\n"
	.text
	.globl	host_code
	.type	host_code, @function
host_code:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movq	%rsi, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	movq	%rdx, %r14
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rcx, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movq	%r8, %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$232, %rsp
	.cfi_def_cfa_offset 288
	movq	288(%rsp), %rax
	movq	%r9, 24(%rsp)
	movq	%rdi, 16(%rsp)
	movslq	336(%rsp), %rbp
	leaq	96(%rsp), %rdi
	movq	%rax, 32(%rsp)
	movq	296(%rsp), %rax
	movsd	%xmm0, 88(%rsp)
	movq	%rbp, %rbx
	movq	%rax, 40(%rsp)
	movq	304(%rsp), %rax
	movsd	%xmm1, 80(%rsp)
	movq	%rax, 48(%rsp)
	movq	312(%rsp), %rax
	movq	%rax, 56(%rsp)
	movq	320(%rsp), %rax
	movq	%rax, 64(%rsp)
	movq	328(%rsp), %rax
	movq	%rax, 72(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 216(%rsp)
	movq	%rbp, %rax
	imulq	%rbp, %rax
	imulq	%rbp, %rax
	salq	$3, %rax
	movq	%rax, %rsi
	movq	%rax, 8(%rsp)
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.isra.0
	leaq	.LC1(%rip), %rdi
	call	_Z11check_errorPKc
	movq	8(%rsp), %rdx
	movq	16(%rsp), %rsi
	movl	$1, %ecx
	movq	96(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rsi
	leaq	104(%rsp), %rdi
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.isra.0
	leaq	.LC2(%rip), %rdi
	call	_Z11check_errorPKc
	movq	8(%rsp), %rdx
	movq	104(%rsp), %rdi
	movq	%r15, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rsi
	leaq	112(%rsp), %rdi
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.isra.0
	leaq	.LC3(%rip), %rdi
	call	_Z11check_errorPKc
	movq	8(%rsp), %rdx
	movq	112(%rsp), %rdi
	movq	%r14, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rsi
	leaq	120(%rsp), %rdi
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.isra.0
	leaq	.LC4(%rip), %rdi
	call	_Z11check_errorPKc
	movq	8(%rsp), %rdx
	movq	120(%rsp), %rdi
	movq	%r13, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rsi
	leaq	128(%rsp), %rdi
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.isra.0
	leaq	.LC5(%rip), %rdi
	call	_Z11check_errorPKc
	movq	8(%rsp), %rdx
	movl	$1, %ecx
	movq	%r12, %rsi
	movq	128(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rsi
	leaq	136(%rsp), %rdi
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.isra.0
	leaq	.LC6(%rip), %rdi
	call	_Z11check_errorPKc
	movq	8(%rsp), %rdx
	movq	24(%rsp), %rsi
	movl	$1, %ecx
	movq	136(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rsi
	leaq	144(%rsp), %rdi
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.isra.0
	leaq	.LC7(%rip), %rdi
	call	_Z11check_errorPKc
	movq	8(%rsp), %rdx
	movq	32(%rsp), %rsi
	movl	$1, %ecx
	movq	144(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rsi
	leaq	152(%rsp), %rdi
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.isra.0
	leaq	.LC8(%rip), %rdi
	call	_Z11check_errorPKc
	movq	8(%rsp), %rdx
	movq	40(%rsp), %rsi
	movl	$1, %ecx
	movq	152(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rsi
	leaq	160(%rsp), %rdi
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.isra.0
	leaq	.LC9(%rip), %rdi
	call	_Z11check_errorPKc
	movq	8(%rsp), %rdx
	movq	48(%rsp), %rsi
	movl	$1, %ecx
	movq	160(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rsi
	leaq	168(%rsp), %rdi
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.isra.0
	leaq	.LC10(%rip), %rdi
	salq	$3, %rbp
	call	_Z11check_errorPKc
	movq	8(%rsp), %rdx
	movq	56(%rsp), %rsi
	movl	$1, %ecx
	movq	168(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	%rbp, %rsi
	leaq	176(%rsp), %rdi
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.isra.0
	leaq	.LC11(%rip), %rdi
	call	_Z11check_errorPKc
	movq	64(%rsp), %rsi
	movl	$1, %ecx
	movq	%rbp, %rdx
	movq	176(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	%rbp, %rsi
	leaq	184(%rsp), %rdi
	call	_Z10cudaMallocIdE9cudaErrorPPT_m.isra.0
	leaq	.LC12(%rip), %rdi
	call	_Z11check_errorPKc
	movq	72(%rsp), %rsi
	movl	$1, %ecx
	movq	%rbp, %rdx
	movq	184(%rsp), %rdi
	call	cudaMemcpy@PLT
	movl	%ebx, %eax
	movl	%ebx, %esi
	movl	%ebx, %edx
	andl	$7, %eax
	shrl	$3, %esi
	movl	$1, 196(%rsp)
	movl	$8, %ecx
	movl	$1, 208(%rsp)
	cmpl	$1, %eax
	movl	%ebx, %eax
	movl	$16, 192(%rsp)
	sbbl	$-1, %esi
	andl	$15, %edx
	shrl	$4, %eax
	cmpl	$1, %edx
	movq	192(%rsp), %rdx
	sbbl	$-1, %eax
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	%eax, 204(%rsp)
	movq	204(%rsp), %rdi
	call	__cudaPushCallConfiguration@PLT
	movsd	80(%rsp), %xmm1
	movsd	88(%rsp), %xmm0
	testl	%eax, %eax
	jne	.L15
	pushq	%rax
	.cfi_def_cfa_offset 296
	pushq	%rbx
	.cfi_def_cfa_offset 304
	pushq	200(%rsp)
	.cfi_def_cfa_offset 312
	pushq	200(%rsp)
	.cfi_def_cfa_offset 320
	pushq	200(%rsp)
	.cfi_def_cfa_offset 328
	pushq	200(%rsp)
	.cfi_def_cfa_offset 336
	pushq	200(%rsp)
	.cfi_def_cfa_offset 344
	pushq	200(%rsp)
	.cfi_def_cfa_offset 352
	movq	200(%rsp), %r9
	movq	192(%rsp), %r8
	movq	184(%rsp), %rcx
	movq	176(%rsp), %rdx
	movq	168(%rsp), %rsi
	movq	160(%rsp), %rdi
	call	_Z49__device_stub__Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddiPdS_S_S_S_S_S_S_S_S_S_S_ddi
	addq	$64, %rsp
	.cfi_def_cfa_offset 288
.L15:
	movq	8(%rsp), %rdx
	movq	96(%rsp), %rsi
	movl	$2, %ecx
	movq	16(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	216(%rsp), %rax
	subq	%fs:40, %rax
	je	.L16
	call	__stack_chk_fail@PLT
.L16:
	addq	$232, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	host_code, .-host_code
	.section	.rodata.str1.1
.LC13:
	.string	"_Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddi"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2056:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC13(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2056:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include "hip/hip_runtime.h"
#define max(x,y)  ((x) > (y)? (x) : (y))
#define min(x,y)  ((x) < (y)? (x) : (y))
#define ceil(a,b) ((a) % (b) == 0 ? (a) / (b) : ((a) / (b)) + 1)

void check_error (const char* message) {
	hipError_t error = hipGetLastError ();
	if (error != hipSuccess) {
		printf ("CUDA error : %s, %s\n", message, hipGetErrorString (error));
		exit(-1);
	}
}

__global__ void curvi (double * __restrict__ in_r1, double *__restrict__ in_u1, double * __restrict__ in_u2, double *__restrict__ in_u3, double * __restrict__ in_mu, double * __restrict__ in_la, double * __restrict__ in_met1, double * __restrict__ in_met2, double * __restrict__ in_met3, double * __restrict__ in_met4, double * strx, double * stry, double c1, double c2, int N) {
	//Determing the block's indices
	int blockdim_k= (int)(blockDim.x);
	int k0 = (int)(blockIdx.x)*(blockdim_k);
	int k = max (k0, 0) + (int)(threadIdx.x);
	int blockdim_i= (int)(blockDim.z);
	int i0 = (int)(blockIdx.z)*(blockdim_i);
	int i = max (i0, 0) + (int)(threadIdx.z);

	double (*u1)[304][304] = (double (*)[304][304])in_u1;
	double (*u2)[304][304] = (double (*)[304][304])in_u2;
	double (*u3)[304][304] = (double (*)[304][304])in_u3;
	double (*mu)[304][304] = (double (*)[304][304])in_mu;
	double (*la)[304][304] = (double (*)[304][304])in_la;
	double (*r1)[304][304] = (double (*)[304][304])in_r1;
	double (*met1)[304][304] = (double (*)[304][304])in_met1;
	double (*met2)[304][304] = (double (*)[304][304])in_met2;
	double (*met3)[304][304] = (double (*)[304][304])in_met3;
	double (*met4)[304][304] = (double (*)[304][304])in_met4;

	if (i>=2 & k>=2 & i<=N-3 & k<=N-3) {
		for (int j=2; j<=N-3; j++) {
double _t_87_ = u1[i+2][j][k+2];
double _t_8_ = u1[i+2][j][k+2];
_t_87_ -= u1[i+2][j][k-2];
double _t_27_ = u1[i+2][j][k-2];
double _t_84_ = c2 * _t_87_;
double _t_88_ = u1[i+2][j][k+1];
double _t_47_ = u1[i+2][j][k+1];
_t_88_ -= u1[i+2][j][k-1];
double _t_66_ = u1[i+2][j][k-1];
_t_84_ += c1 * _t_88_;
double _t_86_ = 2.0 * mu[i+2][j][k];
_t_86_ += la[i+2][j][k];
double _t_85_ = _t_86_ * met2[i+2][j][k];
double _t_83_ = _t_85_ * met1[i+2][j][k];
double _t_283_ = la[i+2][j][k] * met1[i+2][j][k];
double _t_82_ = _t_83_ * _t_84_;
double _t_81_ = _t_82_ * strx[i];
double _t_93_ = u2[i+2][j][k+2];
double _t_13_ = u2[i+2][j][k+2];
_t_93_ -= u2[i+2][j][k-2];
double _t_32_ = u2[i+2][j][k-2];
double _t_91_ = c2 * _t_93_;
double _t_94_ = u2[i+2][j][k+1];
double _t_52_ = u2[i+2][j][k+1];
_t_94_ -= u2[i+2][j][k-1];
double _t_71_ = u2[i+2][j][k-1];
_t_91_ += c1 * _t_94_;
double _t_92_ = la[i+2][j][k] * met3[i+2][j][k];
double _t_90_ = _t_92_ * met1[i+2][j][k];
double _t_89_ = _t_90_ * _t_91_;
_t_81_ += _t_89_ * stry[j];
double _t_98_ = u3[i+2][j][k+2];
double _t_19_ = u3[i+2][j][k+2];
_t_98_ -= u3[i+2][j][k-2];
double _t_38_ = u3[i+2][j][k-2];
double _t_96_ = c2 * _t_98_;
double _t_99_ = u3[i+2][j][k+1];
double _t_58_ = u3[i+2][j][k+1];
_t_99_ -= u3[i+2][j][k-1];
double _t_77_ = u3[i+2][j][k-1];
_t_96_ += c1 * _t_99_;
double _t_97_ = la[i+2][j][k] * met4[i+2][j][k];
double _t_95_ = _t_97_ * met1[i+2][j][k];
_t_81_ += _t_95_ * _t_96_;
double _t_105_ = u1[i-2][j][k+2];
_t_8_ -= u1[i-2][j][k+2];
_t_105_ -= u1[i-2][j][k-2];
_t_27_ -= u1[i-2][j][k-2];
double _t_102_ = c2 * _t_105_;
double _t_106_ = u1[i-2][j][k+1];
_t_47_ -= u1[i-2][j][k+1];
_t_106_ -= u1[i-2][j][k-1];
_t_66_ -= u1[i-2][j][k-1];
_t_102_ += c1 * _t_106_;
double _t_104_ = 2.0 * mu[i-2][j][k];
_t_104_ += la[i-2][j][k];
double _t_103_ = _t_104_ * met2[i-2][j][k];
double _t_101_ = _t_103_ * met1[i-2][j][k];
double _t_288_ = la[i-2][j][k] * met1[i-2][j][k];
double _t_100_ = _t_101_ * _t_102_;
_t_81_ += _t_100_ * strx[i];
double _t_111_ = u2[i-2][j][k+2];
_t_13_ -= u2[i-2][j][k+2];
_t_111_ -= u2[i-2][j][k-2];
_t_32_ -= u2[i-2][j][k-2];
double _t_109_ = c2 * _t_111_;
double _t_112_ = u2[i-2][j][k+1];
_t_52_ -= u2[i-2][j][k+1];
_t_112_ -= u2[i-2][j][k-1];
_t_71_ -= u2[i-2][j][k-1];
_t_109_ += c1 * _t_112_;
double _t_110_ = la[i-2][j][k] * met3[i-2][j][k];
double _t_108_ = _t_110_ * met1[i-2][j][k];
double _t_107_ = _t_108_ * _t_109_;
_t_81_ += _t_107_ * stry[j];
double _t_116_ = u3[i-2][j][k+2];
_t_19_ -= u3[i-2][j][k+2];
_t_116_ -= u3[i-2][j][k-2];
_t_38_ -= u3[i-2][j][k-2];
double _t_114_ = c2 * _t_116_;
double _t_117_ = u3[i-2][j][k+1];
_t_58_ -= u3[i-2][j][k+1];
_t_117_ -= u3[i-2][j][k-1];
_t_77_ -= u3[i-2][j][k-1];
_t_114_ += c1 * _t_117_;
double _t_115_ = la[i-2][j][k] * met4[i-2][j][k];
double _t_113_ = _t_115_ * met1[i-2][j][k];
_t_81_ += _t_113_ * _t_114_;
double _t_80_ = c2 * _t_81_;
double _t_124_ = u1[i+1][j][k+2];
double _t_9_ = u1[i+1][j][k+2];
_t_124_ -= u1[i+1][j][k-2];
double _t_28_ = u1[i+1][j][k-2];
double _t_121_ = c2 * _t_124_;
double _t_125_ = u1[i+1][j][k+1];
double _t_48_ = u1[i+1][j][k+1];
_t_125_ -= u1[i+1][j][k-1];
double _t_67_ = u1[i+1][j][k-1];
_t_121_ += c1 * _t_125_;
double _t_123_ = 2.0 * mu[i+1][j][k];
_t_123_ += la[i+1][j][k];
double _t_122_ = _t_123_ * met2[i+1][j][k];
double _t_120_ = _t_122_ * met1[i+1][j][k];
double _t_294_ = la[i+1][j][k] * met1[i+1][j][k];
double _t_119_ = _t_120_ * _t_121_;
double _t_118_ = _t_119_ * strx[i];
double _t_130_ = u2[i+1][j][k+2];
double _t_14_ = u2[i+1][j][k+2];
_t_130_ -= u2[i+1][j][k-2];
double _t_33_ = u2[i+1][j][k-2];
double _t_128_ = c2 * _t_130_;
double _t_131_ = u2[i+1][j][k+1];
double _t_53_ = u2[i+1][j][k+1];
_t_131_ -= u2[i+1][j][k-1];
double _t_72_ = u2[i+1][j][k-1];
_t_128_ += c1 * _t_131_;
double _t_129_ = la[i+1][j][k] * met3[i+1][j][k];
double _t_127_ = _t_129_ * met1[i+1][j][k];
double _t_126_ = _t_127_ * _t_128_;
_t_118_ += _t_126_ * stry[j];
double _t_135_ = u3[i+1][j][k+2];
double _t_20_ = u3[i+1][j][k+2];
_t_135_ -= u3[i+1][j][k-2];
double _t_39_ = u3[i+1][j][k-2];
double _t_133_ = c2 * _t_135_;
double _t_136_ = u3[i+1][j][k+1];
double _t_59_ = u3[i+1][j][k+1];
_t_136_ -= u3[i+1][j][k-1];
double _t_78_ = u3[i+1][j][k-1];
_t_133_ += c1 * _t_136_;
double _t_134_ = la[i+1][j][k] * met4[i+1][j][k];
double _t_132_ = _t_134_ * met1[i+1][j][k];
_t_118_ += _t_132_ * _t_133_;
double _t_142_ = u1[i-1][j][k+2];
_t_9_ -= u1[i-1][j][k+2];
_t_142_ -= u1[i-1][j][k-2];
_t_28_ -= u1[i-1][j][k-2];
double _t_139_ = c2 * _t_142_;
double _t_143_ = u1[i-1][j][k+1];
_t_48_ -= u1[i-1][j][k+1];
_t_143_ -= u1[i-1][j][k-1];
_t_67_ -= u1[i-1][j][k-1];
_t_139_ += c1 * _t_143_;
double _t_141_ = 2.0 * mu[i-1][j][k];
_t_141_ += la[i-1][j][k];
double _t_140_ = _t_141_ * met2[i-1][j][k];
double _t_138_ = _t_140_ * met1[i-1][j][k];
double _t_299_ = la[i-1][j][k] * met1[i-1][j][k];
double _t_137_ = _t_138_ * _t_139_;
_t_118_ += _t_137_ * strx[i];
double _t_148_ = u2[i-1][j][k+2];
_t_14_ -= u2[i-1][j][k+2];
_t_148_ -= u2[i-1][j][k-2];
_t_33_ -= u2[i-1][j][k-2];
double _t_146_ = c2 * _t_148_;
double _t_149_ = u2[i-1][j][k+1];
_t_53_ -= u2[i-1][j][k+1];
_t_149_ -= u2[i-1][j][k-1];
_t_72_ -= u2[i-1][j][k-1];
_t_146_ += c1 * _t_149_;
double _t_147_ = la[i-1][j][k] * met3[i-1][j][k];
double _t_145_ = _t_147_ * met1[i-1][j][k];
double _t_144_ = _t_145_ * _t_146_;
_t_118_ += _t_144_ * stry[j];
double _t_153_ = u3[i-1][j][k+2];
_t_20_ -= u3[i-1][j][k+2];
_t_153_ -= u3[i-1][j][k-2];
_t_39_ -= u3[i-1][j][k-2];
double _t_151_ = c2 * _t_153_;
double _t_154_ = u3[i-1][j][k+1];
_t_59_ -= u3[i-1][j][k+1];
_t_154_ -= u3[i-1][j][k-1];
_t_78_ -= u3[i-1][j][k-1];
_t_151_ += c1 * _t_154_;
double _t_152_ = la[i-1][j][k] * met4[i-1][j][k];
double _t_150_ = _t_152_ * met1[i-1][j][k];
_t_118_ += _t_150_ * _t_151_;
_t_80_ += c1 * _t_118_;
double r1ic0jc0kc0 = r1[i][j][k];
r1ic0jc0kc0 += _t_80_ * stry[j];

double _t_17_ = c2 * _t_19_;
double _v_0_ = c2 * _t_8_;
double _v_3_ = c2 * _t_13_;
double _v_9_ = c2 * _t_27_;
double _v_12_ = c2 * _t_32_;
double _v_15_ = c2 * _t_38_;
double _v_25_ = c2 * _t_58_;
double _v_19_ = c2 * _t_47_;
double _v_22_ = c2 * _t_52_;
double _v_28_ = c2 * _t_66_;
double _v_31_ = c2 * _t_71_;
double _v_34_ = c2 * _t_77_;
_t_17_ += c1 * _t_20_;
double _v_1_ = c1 * _t_9_;
double _v_4_ = c1 * _t_14_;
double _v_10_ = c1 * _t_28_;
double _v_13_ = c1 * _t_33_;
double _v_16_ = c1 * _t_39_;
double _v_26_ = c1 * _t_59_;
double _v_20_ = c1 * _t_48_;
double _v_23_ = c1 * _t_53_;
double _v_29_ = c1 * _t_67_;
double _v_32_ = c1 * _t_72_;
double _v_35_ = c1 * _t_78_;
double _t_18_ = mu[i][j][k+2] * met4[i][j][k+2];
double _t_16_ = _t_18_ * met1[i][j][k+2];
double _t_15_ = _t_16_ * _t_17_;
double _t_1_ = _t_15_ * stry[j];
double _t_5_ = _v_0_;
_t_5_ += _v_1_;
double _t_7_ = 2.0 * mu[i][j][k+2];
double _t_12_ = mu[i][j][k+2] * met3[i][j][k+2];
_t_7_ += la[i][j][k+2];
double _t_6_ = _t_7_ * met2[i][j][k+2];
double _t_166_ = la[i][j][k+2] * met2[i][j][k+2];
double _t_4_ = _t_6_ * met1[i][j][k+2];
double _t_3_ = _t_4_ * _t_5_;
double _t_2_ = _t_3_ * strx[i];
_t_1_ += _t_2_ * stry[j];
double _t_11_ = _v_3_;
_t_11_ += _v_4_;
double _t_10_ = _t_12_ * met1[i][j][k+2];
_t_1_ += _t_10_ * _t_11_;
double _t_24_ = _v_9_;
_t_24_ += _v_10_;
double _t_26_ = 2.0 * mu[i][j][k-2];
_t_26_ += la[i][j][k-2];
double _t_25_ = _t_26_ * met2[i][j][k-2];
double _t_178_ = la[i][j][k-2] * met2[i][j][k-2];
double _t_23_ = _t_25_ * met1[i][j][k-2];
double _t_22_ = _t_23_ * _t_24_;
double _t_21_ = _t_22_ * strx[i];
_t_1_ += _t_21_ * stry[j];
double _t_30_ = _v_12_;
_t_30_ += _v_13_;
double _t_31_ = mu[i][j][k-2] * met3[i][j][k-2];
double _t_37_ = mu[i][j][k-2] * met4[i][j][k-2];
double _t_29_ = _t_31_ * met1[i][j][k-2];
_t_1_ += _t_29_ * _t_30_;
double _t_36_ = _v_15_;
_t_36_ += _v_16_;
double _t_35_ = _t_37_ * met1[i][j][k-2];
double _t_34_ = _t_35_ * _t_36_;
_t_1_ += _t_34_ * stry[j];
double _t_0_ = c2 * _t_1_;
double _t_56_ = _v_25_;
_t_56_ += _v_26_;
double _t_57_ = mu[i][j][k+1] * met4[i][j][k+1];
double _t_55_ = _t_57_ * met1[i][j][k+1];
double _t_54_ = _t_55_ * _t_56_;
double _t_40_ = _t_54_ * stry[j];
double _t_44_ = _v_19_;
_t_44_ += _v_20_;
double _t_46_ = 2.0 * mu[i][j][k+1];
double _t_51_ = mu[i][j][k+1] * met3[i][j][k+1];
_t_46_ += la[i][j][k+1];
double _t_45_ = _t_46_ * met2[i][j][k+1];
double _t_191_ = la[i][j][k+1] * met2[i][j][k+1];
double _t_43_ = _t_45_ * met1[i][j][k+1];
double _t_42_ = _t_43_ * _t_44_;
double _t_41_ = _t_42_ * strx[i+2];
_t_40_ += _t_41_ * stry[j];
double _t_50_ = _v_22_;
_t_50_ += _v_23_;
double _t_49_ = _t_51_ * met1[i][j][k+1];
_t_40_ += _t_49_ * _t_50_;
double _t_63_ = _v_28_;
_t_63_ += _v_29_;
double _t_65_ = 2.0 * mu[i][j][k-1];
_t_65_ += la[i][j][k-1];
double _t_64_ = _t_65_ * met2[i][j][k-1];
double _t_203_ = la[i][j][k-1] * met2[i][j][k-1];
double _t_62_ = _t_64_ * met1[i][j][k-1];
double _t_61_ = _t_62_ * _t_63_;
double _t_60_ = _t_61_ * strx[i-2];
_t_40_ += _t_60_ * stry[j];
double _t_69_ = _v_31_;
_t_69_ += _v_32_;
double _t_70_ = mu[i][j][k-1] * met3[i][j][k-1];
double _t_76_ = mu[i][j][k-1] * met4[i][j][k-1];
double _t_68_ = _t_70_ * met1[i][j][k-1];
_t_40_ += _t_68_ * _t_69_;
double _t_75_ = _v_34_;
_t_75_ += _v_35_;
double _t_74_ = _t_76_ * met1[i][j][k-1];
double _t_73_ = _t_74_ * _t_75_;
_t_40_ += _t_73_ * stry[j];
_t_0_ += c1 * _t_40_;
r1ic0jc0kc0 += _t_0_;
double _t_281_ = _t_283_ * met1[i+2][j][k];
double _t_286_ = _t_288_ * met1[i-2][j][k];
double _t_292_ = _t_294_ * met1[i+1][j][k];
double _t_297_ = _t_299_ * met1[i-1][j][k];

double _t_161_ = _t_12_;
double _t_159_ = _t_161_ * met1[i][j][k+2];
double _t_162_ = u1[i][j+2][k+2];
double _t_213_ = u1[i][j+2][k+2];
_t_162_ -= u1[i][j-2][k+2];
double _t_225_ = u1[i][j-2][k+2];
double _t_160_ = c2 * _t_162_;
double _t_163_ = u1[i][j+1][k+2];
double _t_238_ = u1[i][j+1][k+2];
_t_163_ -= u1[i][j-1][k+2];
double _t_250_ = u1[i][j-1][k+2];
_t_160_ += c1 * _t_163_;
double _t_158_ = _t_159_ * _t_160_;
double _t_157_ = _t_158_ * stry[j+2];
double _t_156_ = _t_157_ * strx[i];
double _t_164_ = _t_166_ * met1[i][j][k+2];
double _t_167_ = u2[i][j+2][k+2];
double _t_218_ = u2[i][j+2][k+2];
_t_167_ -= u2[i][j-2][k+2];
double _t_230_ = u2[i][j-2][k+2];
double _t_165_ = c2 * _t_167_;
double _t_168_ = u2[i][j+1][k+2];
double _t_243_ = u2[i][j+1][k+2];
_t_168_ -= u2[i][j-1][k+2];
double _t_255_ = u2[i][j-1][k+2];
_t_165_ += c1 * _t_168_;
_t_156_ += _t_164_ * _t_165_;
double _t_173_ = _t_31_;
double _t_171_ = _t_173_ * met1[i][j][k-2];
double _t_174_ = u1[i][j+2][k-2];
_t_213_ -= u1[i][j+2][k-2];
_t_174_ -= u1[i][j-2][k-2];
_t_225_ -= u1[i][j-2][k-2];
double _t_172_ = c2 * _t_174_;
double _t_175_ = u1[i][j+1][k-2];
_t_238_ -= u1[i][j+1][k-2];
_t_175_ -= u1[i][j-1][k-2];
_t_250_ -= u1[i][j-1][k-2];
_t_172_ += c1 * _t_175_;
double _t_170_ = _t_171_ * _t_172_;
double _t_169_ = _t_170_ * stry[j];
_t_156_ += _t_169_ * strx[i];
double _t_176_ = _t_178_ * met1[i][j][k-2];
double _t_179_ = u2[i][j+2][k-2];
_t_218_ -= u2[i][j+2][k-2];
_t_179_ -= u2[i][j-2][k-2];
_t_230_ -= u2[i][j-2][k-2];
double _t_177_ = c2 * _t_179_;
double _t_180_ = u2[i][j+1][k-2];
_t_243_ -= u2[i][j+1][k-2];
_t_180_ -= u2[i][j-1][k-2];
_t_255_ -= u2[i][j-1][k-2];
_t_177_ += c1 * _t_180_;
_t_156_ += _t_176_ * _t_177_;
double _t_155_ = c2 * _t_156_;
double _t_186_ = _t_51_;
double _t_184_ = _t_186_ * met1[i][j][k+1];
double _t_187_ = u1[i][j+2][k+1];
double _t_214_ = u1[i][j+2][k+1];
_t_187_ -= u1[i][j-2][k+1];
double _t_226_ = u1[i][j-2][k+1];
double _t_185_ = c2 * _t_187_;
double _t_188_ = u1[i][j+1][k+1];
double _t_239_ = u1[i][j+1][k+1];
_t_188_ -= u1[i][j-1][k+1];
double _t_251_ = u1[i][j-1][k+1];
_t_185_ += c1 * _t_188_;
double _t_183_ = _t_184_ * _t_185_;
double _t_182_ = _t_183_ * stry[j-2];
double _t_181_ = _t_182_ * strx[i];
double _t_189_ = _t_191_ * met1[i][j][k+1];
double _t_192_ = u2[i][j+2][k+1];
double _t_219_ = u2[i][j+2][k+1];
_t_192_ -= u2[i][j-2][k+1];
double _t_231_ = u2[i][j-2][k+1];
double _t_190_ = c2 * _t_192_;
double _t_193_ = u2[i][j+1][k+1];
double _t_244_ = u2[i][j+1][k+1];
_t_193_ -= u2[i][j-1][k+1];
double _t_256_ = u2[i][j-1][k+1];
_t_190_ += c1 * _t_193_;
_t_181_ += _t_189_ * _t_190_;
double _t_198_ = _t_70_;
double _t_196_ = _t_198_ * met1[i][j][k-1];
double _t_199_ = u1[i][j+2][k-1];
_t_214_ -= u1[i][j+2][k-1];
_t_199_ -= u1[i][j-2][k-1];
_t_226_ -= u1[i][j-2][k-1];
double _t_197_ = c2 * _t_199_;
double _t_200_ = u1[i][j+1][k-1];
_t_239_ -= u1[i][j+1][k-1];
_t_200_ -= u1[i][j-1][k-1];
_t_251_ -= u1[i][j-1][k-1];
_t_197_ += c1 * _t_200_;
double _t_195_ = _t_196_ * _t_197_;
double _t_194_ = _t_195_ * stry[j];
_t_181_ += _t_194_ * strx[i];
double _t_201_ = _t_203_ * met1[i][j][k-1];
double _t_204_ = u2[i][j+2][k-1];
_t_219_ -= u2[i][j+2][k-1];
_t_204_ -= u2[i][j-2][k-1];
_t_231_ -= u2[i][j-2][k-1];
double _t_202_ = c2 * _t_204_;
double _t_205_ = u2[i][j+1][k-1];
_t_244_ -= u2[i][j+1][k-1];
_t_205_ -= u2[i][j-1][k-1];
_t_256_ -= u2[i][j-1][k-1];
_t_202_ += c1 * _t_205_;
_t_181_ += _t_201_ * _t_202_;
_t_155_ += c1 * _t_181_;
r1ic0jc0kc0 += _t_155_;

double _t_211_ = c2 * _t_213_;
double _v_105_ = c2 * _t_218_;
double _v_108_ = c2 * _t_225_;
double _v_111_ = c2 * _t_230_;
double _v_115_ = c2 * _t_238_;
double _v_118_ = c2 * _t_243_;
double _v_121_ = c2 * _t_250_;
double _v_124_ = c2 * _t_255_;
_t_211_ += c1 * _t_214_;
double _v_106_ = c1 * _t_219_;
double _v_109_ = c1 * _t_226_;
double _v_112_ = c1 * _t_231_;
double _v_116_ = c1 * _t_239_;
double _v_119_ = c1 * _t_244_;
double _v_122_ = c1 * _t_251_;
double _v_125_ = c1 * _t_256_;
double _t_212_ = mu[i][j+2][k] * met3[i][j+2][k];
double _t_210_ = _t_212_ * met1[i][j+2][k];
double _t_209_ = _t_210_ * _t_211_;
double _t_208_ = _t_209_ * stry[j+1];
double _t_207_ = _t_208_ * strx[i];
double _t_216_ = _v_105_;
_t_216_ += _v_106_;
double _t_217_ = mu[i][j+2][k] * met2[i][j+2][k];
double _t_215_ = _t_217_ * met1[i][j+2][k];
_t_207_ += _t_215_ * _t_216_;
double _t_223_ = _v_108_;
_t_223_ += _v_109_;
double _t_224_ = mu[i][j-2][k] * met3[i][j-2][k];
double _t_222_ = _t_224_ * met1[i][j-2][k];
double _t_221_ = _t_222_ * _t_223_;
double _t_220_ = _t_221_ * stry[j];
_t_207_ += _t_220_ * strx[i];
double _t_228_ = _v_111_;
_t_228_ += _v_112_;
double _t_229_ = mu[i][j-2][k] * met2[i][j-2][k];
double _t_227_ = _t_229_ * met1[i][j-2][k];
_t_207_ += _t_227_ * _t_228_;
double _t_206_ = c2 * _t_207_;
double _t_236_ = _v_115_;
_t_236_ += _v_116_;
double _t_237_ = mu[i][j+1][k] * met3[i][j+1][k];
double _t_235_ = _t_237_ * met1[i][j+1][k];
double _t_234_ = _t_235_ * _t_236_;
double _t_233_ = _t_234_ * stry[j-1];
double _t_232_ = _t_233_ * strx[i];
double _t_241_ = _v_118_;
_t_241_ += _v_119_;
double _t_242_ = mu[i][j+1][k] * met2[i][j+1][k];
double _t_240_ = _t_242_ * met1[i][j+1][k];
_t_232_ += _t_240_ * _t_241_;
double _t_248_ = _v_121_;
_t_248_ += _v_122_;
double _t_249_ = mu[i][j-1][k] * met3[i][j-1][k];
double _t_247_ = _t_249_ * met1[i][j-1][k];
double _t_246_ = _t_247_ * _t_248_;
double _t_245_ = _t_246_ * stry[j];
_t_232_ += _t_245_ * strx[i];
double _t_253_ = _v_124_;
_t_253_ += _v_125_;
double _t_254_ = mu[i][j-1][k] * met2[i][j-1][k];
double _t_252_ = _t_254_ * met1[i][j-1][k];
_t_232_ += _t_252_ * _t_253_;
_t_206_ += c1 * _t_232_;
r1ic0jc0kc0 += _t_206_;

double _t_261_ = mu[i][j+2][k] * met1[i][j+2][k];
double _t_259_ = _t_261_ * met1[i][j+2][k];
double _t_262_ = u2[i+2][j+2][k];
_t_262_ -= u2[i-2][j+2][k];
double _t_284_ = u2[i+2][j+2][k];
_t_284_ -= u2[i+2][j-2][k];
double _t_289_ = u2[i-2][j+2][k];
_t_289_ -= u2[i-2][j-2][k];
double _t_267_ = u2[i+2][j-2][k];
_t_267_ -= u2[i-2][j-2][k];
double _t_260_ = c2 * _t_262_;
double _t_263_ = u2[i+1][j+2][k];
_t_263_ -= u2[i-1][j+2][k];
double _t_295_ = u2[i+1][j+2][k];
_t_295_ -= u2[i+1][j-2][k];
double _t_300_ = u2[i-1][j+2][k];
_t_300_ -= u2[i-1][j-2][k];
double _t_268_ = u2[i+1][j-2][k];
_t_268_ -= u2[i-1][j-2][k];
_t_260_ += c1 * _t_263_;
double _t_258_ = _t_259_ * _t_260_;
double _t_266_ = mu[i][j-2][k] * met1[i][j-2][k];
double _t_264_ = _t_266_ * met1[i][j-2][k];
double _t_265_ = c2 * _t_267_;
double _v_142_ = c2 * _t_284_;
double _v_145_ = c2 * _t_289_;
double _v_149_ = c2 * _t_295_;
double _v_152_ = c2 * _t_300_;
_t_265_ += c1 * _t_268_;
_t_258_ += _t_264_ * _t_265_;
double _t_257_ = c2 * _t_258_;
double _t_282_ = _v_142_;
double _t_285_ = u2[i+2][j+1][k];
_t_285_ -= u2[i+2][j-1][k];
double _t_273_ = u2[i+2][j+1][k];
_t_273_ -= u2[i-2][j+1][k];
double _t_278_ = u2[i+2][j-1][k];
_t_278_ -= u2[i-2][j-1][k];
double _t_290_ = u2[i-2][j+1][k];
_t_290_ -= u2[i-2][j-1][k];
_t_282_ += c1 * _t_285_;
double _t_280_ = _t_281_ * _t_282_;
double _t_287_ = _v_145_;
_t_287_ += c1 * _t_290_;
_t_280_ += _t_286_ * _t_287_;
_t_257_ += c2 * _t_280_;
double _t_272_ = mu[i][j+1][k] * met1[i][j+1][k];
double _t_270_ = _t_272_ * met1[i][j+1][k];
double _t_271_ = c2 * _t_273_;
double _v_138_ = c2 * _t_278_;
double _t_274_ = u2[i+1][j+1][k];
_t_274_ -= u2[i-1][j+1][k];
double _t_296_ = u2[i+1][j+1][k];
_t_296_ -= u2[i+1][j-1][k];
double _t_301_ = u2[i-1][j+1][k];
_t_301_ -= u2[i-1][j-1][k];
double _t_279_ = u2[i+1][j-1][k];
_t_279_ -= u2[i-1][j-1][k];
_t_271_ += c1 * _t_274_;
double _t_269_ = _t_270_ * _t_271_;
double _t_277_ = mu[i][j-1][k] * met1[i][j-1][k];
double _t_275_ = _t_277_ * met1[i][j-1][k];
double _t_276_ = _v_138_;
_t_276_ += c1 * _t_279_;
double _v_150_ = c1 * _t_296_;
double _v_153_ = c1 * _t_301_;
_t_269_ += _t_275_ * _t_276_;
_t_257_ += c1 * _t_269_;
double _t_293_ = _v_149_;
_t_293_ += _v_150_;
double _t_291_ = _t_292_ * _t_293_;
double _t_298_ = _v_152_;
_t_298_ += _v_153_;
_t_291_ += _t_297_ * _t_298_;
_t_257_ += c1 * _t_291_;
r1ic0jc0kc0 += _t_257_;

r1[i][j][k] = r1ic0jc0kc0;

		} 
	}
}

extern "C" void host_code (double *h_r1, double *h_u1, double *h_u2, double *h_u3,  double *h_mu, double *h_la, double *h_met1, double *h_met2, double *h_met3, double *h_met4, double *h_strx, double *h_stry, double c1, double c2, int N) {
	double *r1;
	hipMalloc (&r1, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for r1\n");
	hipMemcpy (r1, h_r1, sizeof(double)*N*N*N, hipMemcpyHostToDevice);
	double *u1;
	hipMalloc (&u1, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for u1\n");
	hipMemcpy (u1, h_u1, sizeof(double)*N*N*N, hipMemcpyHostToDevice);
	double *u2;
	hipMalloc (&u2, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for u2\n");
	hipMemcpy (u2, h_u2, sizeof(double)*N*N*N, hipMemcpyHostToDevice);
	double *u3;
	hipMalloc (&u3, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for u3\n");
	hipMemcpy (u3, h_u3, sizeof(double)*N*N*N, hipMemcpyHostToDevice);
	double *mu;
	hipMalloc (&mu, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for mu\n");
	hipMemcpy (mu, h_mu, sizeof(double)*N*N*N, hipMemcpyHostToDevice);
	double *la;
	hipMalloc (&la, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for la\n");
	hipMemcpy (la, h_la, sizeof(double)*N*N*N, hipMemcpyHostToDevice);
	double *met1;
	hipMalloc (&met1, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for met1\n");
	hipMemcpy (met1, h_met1, sizeof(double)*N*N*N, hipMemcpyHostToDevice);
	double *met2;
	hipMalloc (&met2, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for met2\n");
	hipMemcpy (met2, h_met2, sizeof(double)*N*N*N, hipMemcpyHostToDevice);
	double *met3;
	hipMalloc (&met3, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for met3\n");
	hipMemcpy (met3, h_met3, sizeof(double)*N*N*N, hipMemcpyHostToDevice);
	double *met4;
	hipMalloc (&met4, sizeof(double)*N*N*N);
	check_error ("Failed to allocate device memory for met4\n");
	hipMemcpy (met4, h_met4, sizeof(double)*N*N*N, hipMemcpyHostToDevice);
	double *strx;
	hipMalloc (&strx, sizeof(double)*N);
	check_error ("Failed to allocate device memory for strx\n");
	hipMemcpy (strx, h_strx, sizeof(double)*N, hipMemcpyHostToDevice);
	double *stry;
	hipMalloc (&stry, sizeof(double)*N);
	check_error ("Failed to allocate device memory for stry\n");
	hipMemcpy (stry, h_stry, sizeof(double)*N, hipMemcpyHostToDevice);

	dim3 blockconfig (16, 1, 8);
	dim3 gridconfig (ceil(N, blockconfig.x), 1, ceil(N, blockconfig.z));

	curvi <<<gridconfig, blockconfig>>> (r1, u1, u2, u3, mu, la, met1, met2, met3, met4, strx, stry, c1, c2, N);
	hipMemcpy (h_r1, r1, sizeof(double)*N*N*N, hipMemcpyDeviceToHost);
}

	.text
	.file	"reordered-d.hip"
	.globl	_Z11check_errorPKc              # -- Begin function _Z11check_errorPKc
	.type	_Z11check_errorPKc,@function
_Z11check_errorPKc:                     # @_Z11check_errorPKc
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movq	%rdi, %rbx
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB0_2
# %bb.1:
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.LBB0_2:
	.cfi_def_cfa_offset 16
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movq	%rbx, %rsi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	printf
	movl	$-1, %edi
	callq	exit
.Lfunc_end0:
	.size	_Z11check_errorPKc, .Lfunc_end0-_Z11check_errorPKc
	.cfi_endproc
                                        # -- End function
	.globl	_Z20__device_stub__curviPdS_S_S_S_S_S_S_S_S_S_S_ddi # -- Begin function _Z20__device_stub__curviPdS_S_S_S_S_S_S_S_S_S_S_ddi
	.type	_Z20__device_stub__curviPdS_S_S_S_S_S_S_S_S_S_S_ddi,@function
_Z20__device_stub__curviPdS_S_S_S_S_S_S_S_S_S_S_ddi: # @_Z20__device_stub__curviPdS_S_S_S_S_S_S_S_S_S_S_ddi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$240, %rsp
	.cfi_def_cfa_offset 288
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	72(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	64(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	56(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	48(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	40(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	32(%rsp), %r8
	movq	%r9, (%r8)
	leaq	24(%rsp), %r9
	movsd	%xmm0, (%r9)
	leaq	16(%rsp), %r10
	movsd	%xmm1, (%r10)
	leaq	112(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	288(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	296(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	304(%rsp), %rax
	movq	%rax, 64(%rbx)
	leaq	312(%rsp), %rax
	movq	%rax, 72(%rbx)
	leaq	320(%rsp), %rax
	movq	%rax, 80(%rbx)
	leaq	328(%rsp), %rax
	movq	%rax, 88(%rbx)
	movq	%r9, 96(%rbx)
	movq	%r10, 104(%rbx)
	leaq	336(%rsp), %rax
	movq	%rax, 112(%rbx)
	leaq	96(%rsp), %r14
	leaq	80(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$256, %rsp                      # imm = 0x100
	.cfi_adjust_cfa_offset -256
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z20__device_stub__curviPdS_S_S_S_S_S_S_S_S_S_S_ddi, .Lfunc_end1-_Z20__device_stub__curviPdS_S_S_S_S_S_S_S_S_S_S_ddi
	.cfi_endproc
                                        # -- End function
	.globl	host_code                       # -- Begin function host_code
	.type	host_code,@function
host_code:                              # @host_code
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$152, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movsd	%xmm1, 16(%rsp)                 # 8-byte Spill
	movsd	%xmm0, 8(%rsp)                  # 8-byte Spill
	movq	%r9, 48(%rsp)                   # 8-byte Spill
	movq	%r8, 40(%rsp)                   # 8-byte Spill
	movq	%rcx, 32(%rsp)                  # 8-byte Spill
	movq	%rdx, 24(%rsp)                  # 8-byte Spill
	movq	%rsi, %r15
	movq	%rdi, %rbx
	movslq	256(%rsp), %rbp
	leaq	(,%rbp,8), %r12
	movq	%rbp, %r14
	imulq	%rbp, %r14
	imulq	%r12, %r14
	movq	%rsp, %r13
	movq	%r13, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movl	$.L.str.1, %edi
	callq	_Z11check_errorPKc
	movq	(%r13), %rdi
	movq	%rbx, 56(%rsp)                  # 8-byte Spill
	movq	%rbx, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	144(%rsp), %r13
	movq	%r13, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movl	$.L.str.2, %edi
	callq	_Z11check_errorPKc
	movq	(%r13), %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	136(%rsp), %r15
	movq	%r15, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movl	$.L.str.3, %edi
	callq	_Z11check_errorPKc
	movq	(%r15), %rdi
	movq	24(%rsp), %rsi                  # 8-byte Reload
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	128(%rsp), %rbx
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movl	$.L.str.4, %edi
	callq	_Z11check_errorPKc
	movq	(%rbx), %rdi
	movq	32(%rsp), %rsi                  # 8-byte Reload
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	120(%rsp), %rbx
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movl	$.L.str.5, %edi
	callq	_Z11check_errorPKc
	movq	(%rbx), %rdi
	movq	40(%rsp), %rsi                  # 8-byte Reload
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	112(%rsp), %rbx
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movl	$.L.str.6, %edi
	callq	_Z11check_errorPKc
	movq	(%rbx), %rdi
	movq	48(%rsp), %rsi                  # 8-byte Reload
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	104(%rsp), %rbx
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movl	$.L.str.7, %edi
	callq	_Z11check_errorPKc
	movq	(%rbx), %rdi
	movq	208(%rsp), %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	96(%rsp), %rbx
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movl	$.L.str.8, %edi
	callq	_Z11check_errorPKc
	movq	(%rbx), %rdi
	movq	216(%rsp), %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	88(%rsp), %rbx
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movl	$.L.str.9, %edi
	callq	_Z11check_errorPKc
	movq	(%rbx), %rdi
	movq	224(%rsp), %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	80(%rsp), %rbx
	movq	%rbx, %rdi
	movq	%r14, %rsi
	callq	hipMalloc
	movl	$.L.str.10, %edi
	callq	_Z11check_errorPKc
	movq	(%rbx), %rdi
	movq	232(%rsp), %rsi
	movq	%r14, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	72(%rsp), %rbx
	movq	%rbx, %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	movl	$.L.str.11, %edi
	callq	_Z11check_errorPKc
	movq	(%rbx), %rdi
	movq	240(%rsp), %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	leaq	64(%rsp), %rbx
	movq	%rbx, %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	movl	$.L.str.12, %edi
	callq	_Z11check_errorPKc
	movq	(%rbx), %rdi
	movq	248(%rsp), %rsi
	movq	%r12, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	%ebp, %eax
	andl	$15, %eax
	movl	%ebp, %edi
	shrl	$4, %edi
	cmpl	$1, %eax
	sbbl	$-1, %edi
	movl	%ebp, %eax
	andl	$7, %eax
	movl	%ebp, %esi
	shrl	$3, %esi
	cmpl	$1, %eax
	sbbl	$-1, %esi
	btsq	$32, %rdi
	movabsq	$4294967296, %rdx               # imm = 0x100000000
	orq	$16, %rdx
	movl	$8, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_2
# %bb.1:
	movq	(%rsp), %rdi
	movq	144(%rsp), %rsi
	movq	136(%rsp), %rdx
	movq	128(%rsp), %rcx
	movq	120(%rsp), %r8
	movq	112(%rsp), %r9
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movsd	16(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movsd	24(%rsp), %xmm1                 # 8-byte Reload
                                        # xmm1 = mem[0],zero
	pushq	%rbp
	.cfi_adjust_cfa_offset 8
	pushq	80(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	96(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	112(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	128(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	144(%rsp)
	.cfi_adjust_cfa_offset 8
	pushq	160(%rsp)
	.cfi_adjust_cfa_offset 8
	callq	_Z20__device_stub__curviPdS_S_S_S_S_S_S_S_S_S_S_ddi
	addq	$64, %rsp
	.cfi_adjust_cfa_offset -64
.LBB2_2:
	movq	(%rsp), %rsi
	movq	56(%rsp), %rdi                  # 8-byte Reload
	movq	%r14, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	addq	$152, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	host_code, .Lfunc_end2-host_code
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"CUDA error : %s, %s\n"
	.size	.L.str, 21

	.type	_Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddi,@object # @_Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddi
	.section	.rodata,"a",@progbits
	.globl	_Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddi
	.p2align	3, 0x0
_Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddi:
	.quad	_Z20__device_stub__curviPdS_S_S_S_S_S_S_S_S_S_S_ddi
	.size	_Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddi, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"Failed to allocate device memory for r1\n"
	.size	.L.str.1, 41

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Failed to allocate device memory for u1\n"
	.size	.L.str.2, 41

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Failed to allocate device memory for u2\n"
	.size	.L.str.3, 41

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Failed to allocate device memory for u3\n"
	.size	.L.str.4, 41

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"Failed to allocate device memory for mu\n"
	.size	.L.str.5, 41

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Failed to allocate device memory for la\n"
	.size	.L.str.6, 41

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"Failed to allocate device memory for met1\n"
	.size	.L.str.7, 43

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"Failed to allocate device memory for met2\n"
	.size	.L.str.8, 43

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"Failed to allocate device memory for met3\n"
	.size	.L.str.9, 43

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"Failed to allocate device memory for met4\n"
	.size	.L.str.10, 43

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"Failed to allocate device memory for strx\n"
	.size	.L.str.11, 43

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"Failed to allocate device memory for stry\n"
	.size	.L.str.12, 43

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddi"
	.size	.L__unnamed_1, 36

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z20__device_stub__curviPdS_S_S_S_S_S_S_S_S_S_S_ddi
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddi
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddi ; -- Begin function _Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddi
	.globl	_Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddi
	.p2align	8
	.type	_Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddi,@function
_Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddi:    ; @_Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddi
; %bb.0:
	s_clause 0x1
	s_load_b64 s[2:3], s[0:1], 0x84
	s_load_b32 s33, s[0:1], 0x70
	v_and_b32_e32 v1, 0x3ff, v0
	v_bfe_u32 v2, v0, 20, 10
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_and_b32 s3, s3, 0xffff
	s_mul_i32 s14, s14, s2
	s_mul_i32 s15, s15, s3
	s_max_i32 s2, s14, 0
	s_max_i32 s3, s15, 0
	v_add_nc_u32_e32 v0, s2, v1
	v_add_nc_u32_e32 v4, s3, v2
	s_add_i32 s2, s33, -3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_min_u32_e32 v1, v0, v4
	v_max_i32_e32 v2, v4, v0
	v_cmp_lt_u32_e32 vcc_lo, 1, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cmp_ge_i32_e64 s2, s2, v2
	s_and_b32 s2, s2, vcc_lo
	s_cmp_gt_i32 s33, 4
	s_cselect_b32 s3, -1, 0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, s3, s2
	s_and_saveexec_b32 s3, s2
	s_cbranch_execz .LBB0_3
; %bb.1:                                ; %.lr.ph
	v_dual_mov_b32 v9, 0 :: v_dual_add_nc_u32 v6, 2, v4
	s_load_b256 s[4:11], s[0:1], 0x50
	v_add_nc_u32_e32 v7, -1, v4
	v_mad_u64_u32 v[34:35], null, 0xb4800, v4, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_dual_mov_b32 v1, v9 :: v_dual_add_nc_u32 v8, 2, v0
	v_dual_mov_b32 v5, v9 :: v_dual_add_nc_u32 v22, 1, v0
	v_mad_i64_i32 v[2:3], null, 0xb4800, v7, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[20:21], 3, v[0:1]
	v_lshlrev_b64 v[0:1], 3, v[4:5]
	v_add_nc_u32_e32 v5, -2, v4
	v_mad_u64_u32 v[28:29], null, 0xb4800, v6, 0
	v_dual_mov_b32 v23, v9 :: v_dual_add_nc_u32 v10, 1, v4
	v_add_co_u32 v16, vcc_lo, v20, -16
	v_add_co_ci_u32_e32 v17, vcc_lo, -1, v21, vcc_lo
	v_add_co_u32 v12, vcc_lo, v20, -8
	v_add_co_ci_u32_e32 v13, vcc_lo, -1, v21, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s4, v0
	v_mad_i64_i32 v[30:31], null, 0xb4800, v5, 0
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	v_add_co_u32 v7, vcc_lo, v2, v20
	v_mad_u64_u32 v[32:33], null, 0xb4800, v10, 0
	v_add_co_ci_u32_e32 v6, vcc_lo, v3, v21, vcc_lo
	v_add_co_u32 v15, vcc_lo, v28, v20
	v_add_co_ci_u32_e32 v14, vcc_lo, v29, v21, vcc_lo
	v_add_co_u32 v11, vcc_lo, v30, v20
	v_lshlrev_b64 v[36:37], 3, v[8:9]
	v_add_co_ci_u32_e32 v10, vcc_lo, v31, v21, vcc_lo
	v_add_co_u32 v9, vcc_lo, v32, v20
	v_add_co_ci_u32_e32 v8, vcc_lo, v33, v21, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_add_co_u32 v19, vcc_lo, v34, v36
	v_lshlrev_b64 v[38:39], 3, v[22:23]
	v_add_co_ci_u32_e32 v18, vcc_lo, v35, v37, vcc_lo
	v_add_co_u32 v25, vcc_lo, v34, v16
	v_add_co_ci_u32_e32 v23, vcc_lo, v35, v17, vcc_lo
	v_add_co_u32 v24, vcc_lo, v34, v38
	v_add_co_ci_u32_e32 v22, vcc_lo, v35, v39, vcc_lo
	v_add_co_u32 v5, vcc_lo, v34, v20
	v_add_co_ci_u32_e32 v4, vcc_lo, v35, v21, vcc_lo
	v_add_co_u32 v27, vcc_lo, v34, v12
	v_add_co_ci_u32_e32 v26, vcc_lo, v35, v13, vcc_lo
	v_add_co_u32 v34, vcc_lo, v28, v36
	v_add_co_ci_u32_e32 v35, vcc_lo, v29, v37, vcc_lo
	v_add_co_u32 v40, vcc_lo, v28, v16
	v_add_co_ci_u32_e32 v41, vcc_lo, v29, v17, vcc_lo
	v_add_co_u32 v42, vcc_lo, v28, v38
	v_add_co_ci_u32_e32 v43, vcc_lo, v29, v39, vcc_lo
	v_add_co_u32 v28, vcc_lo, v28, v12
	v_add_co_ci_u32_e32 v29, vcc_lo, v29, v13, vcc_lo
	v_add_co_u32 v44, vcc_lo, v30, v36
	v_add_co_ci_u32_e32 v45, vcc_lo, v31, v37, vcc_lo
	v_add_co_u32 v46, vcc_lo, v30, v16
	v_add_co_ci_u32_e32 v47, vcc_lo, v31, v17, vcc_lo
	v_add_co_u32 v48, vcc_lo, v30, v38
	v_add_co_ci_u32_e32 v49, vcc_lo, v31, v39, vcc_lo
	v_add_co_u32 v30, vcc_lo, v30, v12
	v_add_co_ci_u32_e32 v31, vcc_lo, v31, v13, vcc_lo
	v_add_co_u32 v50, vcc_lo, v32, v36
	v_add_co_ci_u32_e32 v51, vcc_lo, v33, v37, vcc_lo
	v_add_co_u32 v52, vcc_lo, v32, v16
	v_add_co_ci_u32_e32 v53, vcc_lo, v33, v17, vcc_lo
	v_add_co_u32 v54, vcc_lo, v32, v38
	v_add_co_ci_u32_e32 v55, vcc_lo, v33, v39, vcc_lo
	v_add_co_u32 v32, vcc_lo, v32, v12
	v_add_co_ci_u32_e32 v33, vcc_lo, v33, v13, vcc_lo
	v_add_co_u32 v36, vcc_lo, v2, v36
	v_add_co_ci_u32_e32 v37, vcc_lo, v3, v37, vcc_lo
	v_add_co_u32 v38, vcc_lo, v2, v38
	v_add_co_ci_u32_e32 v39, vcc_lo, v3, v39, vcc_lo
	v_add_co_u32 v16, vcc_lo, v2, v16
	v_add_co_ci_u32_e32 v17, vcc_lo, v3, v17, vcc_lo
	v_add_co_u32 v2, vcc_lo, v2, v12
	v_add_co_ci_u32_e32 v3, vcc_lo, v3, v13, vcc_lo
	s_clause 0x2
	s_load_b256 s[20:27], s[0:1], 0x0
	s_load_b128 s[28:31], s[0:1], 0x40
	s_load_b256 s[12:19], s[0:1], 0x20
	global_load_b64 v[12:13], v[0:1], off offset:16
	s_add_u32 s34, s6, 16
	s_addc_u32 s35, s7, 0
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v113, s5, s24, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v114, s5, s25, v4, s5
	s_waitcnt vmcnt(0)
	scratch_store_b64 off, v[12:13], off offset:4 ; 8-byte Folded Spill
	s_clause 0x1
	global_load_b64 v[20:21], v[0:1], off
	global_load_b64 v[0:1], v[0:1], off offset:-16
	s_waitcnt vmcnt(0)
	scratch_store_b64 off, v[0:1], off offset:12 ; 8-byte Folded Spill
	v_add_co_u32 v0, vcc_lo, s24, v19
	scratch_store_b32 off, v0, off offset:20 ; 4-byte Folded Spill
	v_add_co_u32 v0, s0, s22, v19
	scratch_store_b32 off, v0, off offset:24 ; 4-byte Folded Spill
	v_add_co_ci_u32_e64 v0, s0, s23, v18, s0
	scratch_store_b32 off, v0, off offset:28 ; 4-byte Folded Spill
	v_add_co_ci_u32_e32 v0, vcc_lo, s25, v18, vcc_lo
	scratch_store_b32 off, v0, off offset:32 ; 4-byte Folded Spill
	v_add_co_u32 v0, vcc_lo, s24, v25
	scratch_store_b32 off, v0, off offset:36 ; 4-byte Folded Spill
	v_add_co_u32 v0, s0, s22, v25
	scratch_store_b32 off, v0, off offset:40 ; 4-byte Folded Spill
	v_add_co_ci_u32_e64 v0, s0, s23, v23, s0
	scratch_store_b32 off, v0, off offset:44 ; 4-byte Folded Spill
	v_add_co_ci_u32_e32 v0, vcc_lo, s25, v23, vcc_lo
	scratch_store_b32 off, v0, off offset:48 ; 4-byte Folded Spill
	v_add_co_u32 v0, vcc_lo, s24, v24
	scratch_store_b32 off, v0, off offset:52 ; 4-byte Folded Spill
	v_add_co_u32 v0, s0, s22, v24
	scratch_store_b32 off, v0, off offset:56 ; 4-byte Folded Spill
	v_add_co_ci_u32_e64 v0, s0, s23, v22, s0
	scratch_store_b32 off, v0, off offset:60 ; 4-byte Folded Spill
	v_add_co_ci_u32_e32 v0, vcc_lo, s25, v22, vcc_lo
	scratch_store_b32 off, v0, off offset:64 ; 4-byte Folded Spill
	v_add_co_u32 v0, vcc_lo, s24, v27
	scratch_store_b32 off, v0, off offset:68 ; 4-byte Folded Spill
	v_add_co_u32 v0, s0, s22, v27
	scratch_store_b32 off, v0, off offset:72 ; 4-byte Folded Spill
	v_add_co_ci_u32_e64 v0, s0, s23, v26, s0
	scratch_store_b32 off, v0, off offset:76 ; 4-byte Folded Spill
	v_add_co_ci_u32_e32 v0, vcc_lo, s25, v26, vcc_lo
	scratch_store_b32 off, v0, off offset:80 ; 4-byte Folded Spill
	v_add_co_u32 v0, vcc_lo, 0x1308, v5
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v12, vcc_lo, s30, v0
	v_add_co_u32 v0, s0, s14, v0
	s_clause 0x1
	scratch_store_b32 off, v12, off offset:84
	scratch_store_b32 off, v0, off offset:88
	v_add_co_ci_u32_e64 v0, s0, s15, v1, s0
	scratch_store_b32 off, v0, off offset:92 ; 4-byte Folded Spill
	v_add_co_ci_u32_e32 v0, vcc_lo, s31, v1, vcc_lo
	scratch_store_b32 off, v0, off offset:96 ; 4-byte Folded Spill
	v_add_co_u32 v0, vcc_lo, 0x1300, v34
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v35, vcc_lo
	v_add_co_u32 v12, vcc_lo, 0x1300, v40
	v_add_co_ci_u32_e32 v13, vcc_lo, 0, v41, vcc_lo
	v_add_co_u32 v18, vcc_lo, 0x1300, v42
	v_add_co_ci_u32_e32 v19, vcc_lo, 0, v43, vcc_lo
	v_add_co_u32 v22, vcc_lo, 0x1300, v28
	v_add_co_ci_u32_e32 v23, vcc_lo, 0, v29, vcc_lo
	v_add_co_u32 v24, vcc_lo, 0x1300, v15
	v_add_co_u32 v15, s0, s24, v15
	scratch_store_b32 off, v15, off offset:100 ; 4-byte Folded Spill
	v_add_co_ci_u32_e64 v15, s0, s25, v14, s0
	v_add_co_ci_u32_e32 v14, vcc_lo, 0, v14, vcc_lo
	scratch_store_b32 off, v15, off offset:104 ; 4-byte Folded Spill
	v_add_co_u32 v15, vcc_lo, s24, v0
	scratch_store_b32 off, v15, off offset:108 ; 4-byte Folded Spill
	v_add_co_u32 v15, s0, s26, v0
	v_add_co_u32 v0, s1, s22, v0
	s_clause 0x1
	scratch_store_b32 off, v15, off offset:112
	scratch_store_b32 off, v0, off offset:116
	v_add_co_ci_u32_e64 v0, s1, s23, v1, s1
	scratch_store_b32 off, v0, off offset:120 ; 4-byte Folded Spill
	v_add_co_ci_u32_e32 v0, vcc_lo, s25, v1, vcc_lo
	scratch_store_b32 off, v0, off offset:124 ; 4-byte Folded Spill
	v_add_co_ci_u32_e64 v0, vcc_lo, s27, v1, s0
	scratch_store_b32 off, v0, off offset:128 ; 4-byte Folded Spill
	v_add_co_u32 v0, vcc_lo, s24, v12
	scratch_store_b32 off, v0, off offset:132 ; 4-byte Folded Spill
	v_add_co_u32 v0, s0, s26, v12
	scratch_store_b32 off, v0, off offset:136 ; 4-byte Folded Spill
	v_add_co_u32 v0, s1, s22, v12
	scratch_store_b32 off, v0, off offset:140 ; 4-byte Folded Spill
	v_add_co_ci_u32_e64 v0, s1, s23, v13, s1
	scratch_store_b32 off, v0, off offset:144 ; 4-byte Folded Spill
	v_add_co_ci_u32_e32 v0, vcc_lo, s25, v13, vcc_lo
	scratch_store_b32 off, v0, off offset:148 ; 4-byte Folded Spill
	v_add_co_ci_u32_e64 v0, vcc_lo, s27, v13, s0
	scratch_store_b32 off, v0, off offset:152 ; 4-byte Folded Spill
	v_add_co_u32 v0, vcc_lo, s24, v18
	scratch_store_b32 off, v0, off offset:156 ; 4-byte Folded Spill
	v_add_co_u32 v0, s0, s26, v18
	scratch_store_b32 off, v0, off offset:160 ; 4-byte Folded Spill
	v_add_co_u32 v0, s1, s22, v18
	scratch_store_b32 off, v0, off offset:164 ; 4-byte Folded Spill
	v_add_co_ci_u32_e64 v0, s1, s23, v19, s1
	scratch_store_b32 off, v0, off offset:168 ; 4-byte Folded Spill
	v_add_co_ci_u32_e32 v0, vcc_lo, s25, v19, vcc_lo
	scratch_store_b32 off, v0, off offset:172 ; 4-byte Folded Spill
	v_add_co_ci_u32_e64 v0, vcc_lo, s27, v19, s0
	scratch_store_b32 off, v0, off offset:176 ; 4-byte Folded Spill
	v_add_co_u32 v0, vcc_lo, s24, v22
	scratch_store_b32 off, v0, off offset:180 ; 4-byte Folded Spill
	v_add_co_u32 v0, s0, s26, v22
	scratch_store_b32 off, v0, off offset:184 ; 4-byte Folded Spill
	v_add_co_u32 v0, s1, s22, v22
	scratch_store_b32 off, v0, off offset:188 ; 4-byte Folded Spill
	v_add_co_ci_u32_e64 v0, s1, s23, v23, s1
	scratch_store_b32 off, v0, off offset:192 ; 4-byte Folded Spill
	v_add_co_ci_u32_e32 v0, vcc_lo, s25, v23, vcc_lo
	scratch_store_b32 off, v0, off offset:196 ; 4-byte Folded Spill
	v_add_co_ci_u32_e64 v0, vcc_lo, s27, v23, s0
	scratch_store_b32 off, v0, off offset:200 ; 4-byte Folded Spill
	v_add_co_u32 v0, vcc_lo, s14, v24
	scratch_store_b32 off, v0, off offset:204 ; 4-byte Folded Spill
	v_add_co_u32 v0, s0, s18, v24
	scratch_store_b32 off, v0, off offset:208 ; 4-byte Folded Spill
	v_add_co_u32 v0, s1, s16, v24
	scratch_store_b32 off, v0, off offset:212 ; 4-byte Folded Spill
	v_add_co_u32 v0, s2, s28, v24
	scratch_store_b32 off, v0, off offset:216 ; 4-byte Folded Spill
	v_add_co_u32 v0, s3, s30, v24
	scratch_store_b32 off, v0, off offset:220 ; 4-byte Folded Spill
	v_add_co_u32 v0, s4, s12, v24
	scratch_store_b32 off, v0, off offset:224 ; 4-byte Folded Spill
	v_add_co_ci_u32_e64 v0, s4, s13, v14, s4
	scratch_store_b32 off, v0, off offset:228 ; 4-byte Folded Spill
	v_add_co_ci_u32_e32 v0, vcc_lo, s15, v14, vcc_lo
	scratch_store_b32 off, v0, off offset:232 ; 4-byte Folded Spill
	v_add_co_ci_u32_e64 v0, vcc_lo, s19, v14, s0
	scratch_store_b32 off, v0, off offset:236 ; 4-byte Folded Spill
	v_add_co_ci_u32_e64 v0, vcc_lo, s17, v14, s1
	scratch_store_b32 off, v0, off offset:240 ; 4-byte Folded Spill
	v_add_co_ci_u32_e64 v0, vcc_lo, s29, v14, s2
	scratch_store_b32 off, v0, off offset:244 ; 4-byte Folded Spill
	v_add_co_ci_u32_e64 v0, vcc_lo, s31, v14, s3
	scratch_store_b32 off, v0, off offset:248 ; 4-byte Folded Spill
	v_add_co_u32 v0, vcc_lo, 0x1300, v44
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v45, vcc_lo
	v_add_co_u32 v12, vcc_lo, 0x1300, v46
	v_add_co_ci_u32_e32 v13, vcc_lo, 0, v47, vcc_lo
	v_add_co_u32 v14, vcc_lo, 0x1300, v48
	v_add_co_ci_u32_e32 v15, vcc_lo, 0, v49, vcc_lo
	v_add_co_u32 v18, vcc_lo, 0x1300, v30
	v_add_co_ci_u32_e32 v19, vcc_lo, 0, v31, vcc_lo
	v_add_co_u32 v22, vcc_lo, 0x1300, v11
	v_add_co_u32 v11, s0, s24, v11
	scratch_store_b32 off, v11, off offset:252 ; 4-byte Folded Spill
	v_add_co_ci_u32_e64 v11, s0, s25, v10, s0
	v_add_co_ci_u32_e32 v10, vcc_lo, 0, v10, vcc_lo
	scratch_store_b32 off, v11, off offset:256 ; 4-byte Folded Spill
	v_add_co_u32 v11, vcc_lo, s24, v0
	scratch_store_b32 off, v11, off offset:260 ; 4-byte Folded Spill
	v_add_co_u32 v11, s0, s26, v0
	v_add_co_u32 v0, s1, s22, v0
	s_clause 0x1
	scratch_store_b32 off, v11, off offset:264
	scratch_store_b32 off, v0, off offset:268
	v_add_co_ci_u32_e64 v0, s1, s23, v1, s1
	scratch_store_b32 off, v0, off offset:272 ; 4-byte Folded Spill
	v_add_co_ci_u32_e32 v0, vcc_lo, s25, v1, vcc_lo
	scratch_store_b32 off, v0, off offset:276 ; 4-byte Folded Spill
	v_add_co_ci_u32_e64 v0, vcc_lo, s27, v1, s0
	scratch_store_b32 off, v0, off offset:280 ; 4-byte Folded Spill
	v_add_co_u32 v0, vcc_lo, s24, v12
	scratch_store_b32 off, v0, off offset:284 ; 4-byte Folded Spill
	v_add_co_u32 v0, s0, s26, v12
	scratch_store_b32 off, v0, off offset:288 ; 4-byte Folded Spill
	v_add_co_u32 v0, s1, s22, v12
	scratch_store_b32 off, v0, off offset:292 ; 4-byte Folded Spill
	v_add_co_ci_u32_e64 v0, s1, s23, v13, s1
	scratch_store_b32 off, v0, off offset:296 ; 4-byte Folded Spill
	v_add_co_ci_u32_e32 v0, vcc_lo, s25, v13, vcc_lo
	scratch_store_b32 off, v0, off offset:300 ; 4-byte Folded Spill
	v_add_co_ci_u32_e64 v0, vcc_lo, s27, v13, s0
	scratch_store_b32 off, v0, off offset:304 ; 4-byte Folded Spill
	v_add_co_u32 v0, vcc_lo, s24, v14
	scratch_store_b32 off, v0, off offset:308 ; 4-byte Folded Spill
	v_add_co_u32 v0, s0, s26, v14
	scratch_store_b32 off, v0, off offset:312 ; 4-byte Folded Spill
	v_add_co_u32 v0, s1, s22, v14
	scratch_store_b32 off, v0, off offset:316 ; 4-byte Folded Spill
	v_add_co_ci_u32_e64 v0, s1, s23, v15, s1
	scratch_store_b32 off, v0, off offset:320 ; 4-byte Folded Spill
	v_add_co_ci_u32_e32 v0, vcc_lo, s25, v15, vcc_lo
	scratch_store_b32 off, v0, off offset:324 ; 4-byte Folded Spill
	v_add_co_ci_u32_e64 v0, vcc_lo, s27, v15, s0
	scratch_store_b32 off, v0, off offset:328 ; 4-byte Folded Spill
	v_add_co_u32 v0, vcc_lo, s24, v18
	scratch_store_b32 off, v0, off offset:332 ; 4-byte Folded Spill
	v_add_co_u32 v0, s0, s26, v18
	scratch_store_b32 off, v0, off offset:336 ; 4-byte Folded Spill
	v_add_co_u32 v0, s1, s22, v18
	scratch_store_b32 off, v0, off offset:340 ; 4-byte Folded Spill
	v_add_co_ci_u32_e64 v0, s1, s23, v19, s1
	scratch_store_b32 off, v0, off offset:344 ; 4-byte Folded Spill
	v_add_co_ci_u32_e32 v0, vcc_lo, s25, v19, vcc_lo
	scratch_store_b32 off, v0, off offset:348 ; 4-byte Folded Spill
	v_add_co_ci_u32_e64 v0, vcc_lo, s27, v19, s0
	scratch_store_b32 off, v0, off offset:352 ; 4-byte Folded Spill
	v_add_co_u32 v0, vcc_lo, s14, v22
	scratch_store_b32 off, v0, off offset:356 ; 4-byte Folded Spill
	v_add_co_u32 v0, s0, s18, v22
	scratch_store_b32 off, v0, off offset:360 ; 4-byte Folded Spill
	v_add_co_u32 v0, s1, s16, v22
	scratch_store_b32 off, v0, off offset:364 ; 4-byte Folded Spill
	v_add_co_u32 v0, s2, s28, v22
	scratch_store_b32 off, v0, off offset:368 ; 4-byte Folded Spill
	v_add_co_u32 v0, s3, s30, v22
	scratch_store_b32 off, v0, off offset:372 ; 4-byte Folded Spill
	v_add_co_u32 v0, s4, s12, v22
	scratch_store_b32 off, v0, off offset:376 ; 4-byte Folded Spill
	v_add_co_ci_u32_e64 v0, s4, s13, v10, s4
	scratch_store_b32 off, v0, off offset:380 ; 4-byte Folded Spill
	v_add_co_ci_u32_e32 v0, vcc_lo, s15, v10, vcc_lo
	scratch_store_b32 off, v0, off offset:384 ; 4-byte Folded Spill
	v_add_co_ci_u32_e64 v0, vcc_lo, s19, v10, s0
	scratch_store_b32 off, v0, off offset:388 ; 4-byte Folded Spill
	v_add_co_ci_u32_e64 v0, vcc_lo, s17, v10, s1
	scratch_store_b32 off, v0, off offset:392 ; 4-byte Folded Spill
	v_add_co_ci_u32_e64 v0, vcc_lo, s29, v10, s2
	scratch_store_b32 off, v0, off offset:396 ; 4-byte Folded Spill
	v_add_co_ci_u32_e64 v0, vcc_lo, s31, v10, s3
	scratch_store_b32 off, v0, off offset:400 ; 4-byte Folded Spill
	v_add_co_u32 v0, vcc_lo, 0x1300, v50
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v51, vcc_lo
	v_add_co_u32 v10, vcc_lo, 0x1300, v52
	v_add_co_ci_u32_e32 v11, vcc_lo, 0, v53, vcc_lo
	v_add_co_u32 v12, vcc_lo, 0x1300, v54
	v_add_co_ci_u32_e32 v13, vcc_lo, 0, v55, vcc_lo
	v_add_co_u32 v14, vcc_lo, 0x1300, v32
	v_add_co_ci_u32_e32 v15, vcc_lo, 0, v33, vcc_lo
	v_add_co_u32 v24, vcc_lo, 0x1300, v9
	v_add_co_u32 v9, s0, s24, v9
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_u32 v73, s2, s28, v24
	scratch_store_b32 off, v9, off offset:404 ; 4-byte Folded Spill
	v_add_co_ci_u32_e64 v9, s0, s25, v8, s0
	v_add_co_ci_u32_e32 v8, vcc_lo, 0, v8, vcc_lo
	v_add_co_u32 v74, s3, s30, v24
	scratch_store_b32 off, v9, off offset:408 ; 4-byte Folded Spill
	v_add_co_u32 v9, vcc_lo, s24, v0
	v_add_co_u32 v75, s4, s12, v24
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v76, s4, s13, v8, s4
	scratch_store_b32 off, v9, off offset:412 ; 4-byte Folded Spill
	v_add_co_u32 v9, s0, s26, v0
	v_add_co_u32 v0, s1, s22, v0
	s_clause 0x1
	scratch_store_b32 off, v9, off offset:416
	scratch_store_b32 off, v0, off offset:420
	v_add_co_ci_u32_e64 v0, s1, s23, v1, s1
	scratch_store_b32 off, v0, off offset:424 ; 4-byte Folded Spill
	v_add_co_ci_u32_e32 v0, vcc_lo, s25, v1, vcc_lo
	scratch_store_b32 off, v0, off offset:428 ; 4-byte Folded Spill
	v_add_co_ci_u32_e64 v0, vcc_lo, s27, v1, s0
	scratch_store_b32 off, v0, off offset:432 ; 4-byte Folded Spill
	v_add_co_u32 v0, vcc_lo, s24, v10
	scratch_store_b32 off, v0, off offset:436 ; 4-byte Folded Spill
	v_add_co_u32 v0, s0, s26, v10
	scratch_store_b32 off, v0, off offset:440 ; 4-byte Folded Spill
	v_add_co_u32 v0, s1, s22, v10
	scratch_store_b32 off, v0, off offset:444 ; 4-byte Folded Spill
	v_add_co_ci_u32_e64 v0, s1, s23, v11, s1
	v_add_co_u32 v184, s1, s22, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v185, s1, s23, v13, s1
	scratch_store_b32 off, v0, off offset:448 ; 4-byte Folded Spill
	v_add_co_ci_u32_e32 v0, vcc_lo, s25, v11, vcc_lo
	v_add_co_u32 v190, s1, s22, v14
	v_add_co_ci_u32_e64 v191, s1, s23, v15, s1
	scratch_store_b32 off, v0, off offset:452 ; 4-byte Folded Spill
	v_add_co_ci_u32_e64 v0, vcc_lo, s27, v11, s0
	v_add_co_u32 v72, s1, s16, v24
	scratch_store_b32 off, v0, off offset:456 ; 4-byte Folded Spill
	v_add_co_u32 v0, vcc_lo, s24, v12
	v_add_co_ci_u32_e32 v186, vcc_lo, s25, v13, vcc_lo
	scratch_store_b32 off, v0, off offset:460 ; 4-byte Folded Spill
	v_add_co_u32 v0, s0, s26, v12
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v187, vcc_lo, s27, v13, s0
	v_add_co_u32 v188, vcc_lo, s24, v14
	v_add_co_u32 v189, s0, s26, v14
	v_add_co_ci_u32_e32 v18, vcc_lo, s25, v15, vcc_lo
	v_add_co_ci_u32_e64 v19, vcc_lo, s27, v15, s0
	v_add_co_u32 v22, vcc_lo, s14, v24
	v_add_co_u32 v23, s0, s18, v24
	v_add_co_ci_u32_e32 v77, vcc_lo, s15, v8, vcc_lo
	v_add_co_ci_u32_e64 v78, vcc_lo, s19, v8, s0
	v_add_co_ci_u32_e64 v79, vcc_lo, s17, v8, s1
	v_add_co_ci_u32_e64 v80, vcc_lo, s29, v8, s2
	v_add_co_ci_u32_e64 v81, vcc_lo, s31, v8, s3
	scratch_store_b32 off, v0, off offset:464 ; 4-byte Folded Spill
	v_add_co_u32 v0, vcc_lo, 0x1300, v36
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v37, vcc_lo
	v_add_co_u32 v8, vcc_lo, 0x1300, v16
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v17, vcc_lo
	v_add_co_u32 v10, vcc_lo, 0x1300, v38
	v_add_co_ci_u32_e32 v11, vcc_lo, 0, v39, vcc_lo
	v_add_co_u32 v2, vcc_lo, 0x1300, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	v_add_co_u32 v12, vcc_lo, 0x1300, v7
	v_add_co_u32 v82, s0, s24, v7
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e64 v83, s0, s25, v6, s0
	v_add_co_ci_u32_e32 v6, vcc_lo, 0, v6, vcc_lo
	v_add_co_u32 v84, vcc_lo, s24, v0
	v_add_co_u32 v85, s0, s26, v0
	v_add_co_u32 v86, s1, s22, v0
	v_add_co_ci_u32_e64 v87, s1, s23, v1, s1
	v_add_co_ci_u32_e32 v88, vcc_lo, s25, v1, vcc_lo
	v_add_co_ci_u32_e64 v89, vcc_lo, s27, v1, s0
	v_add_co_u32 v90, vcc_lo, s24, v8
	v_add_co_u32 v91, s0, s26, v8
	v_add_co_u32 v92, s1, s22, v8
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v93, s1, s23, v9, s1
	v_add_co_ci_u32_e32 v94, vcc_lo, s25, v9, vcc_lo
	v_add_co_ci_u32_e64 v95, vcc_lo, s27, v9, s0
	v_add_co_u32 v96, vcc_lo, s24, v10
	v_add_co_u32 v97, s0, s26, v10
	v_add_co_u32 v98, s1, s22, v10
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v99, s1, s23, v11, s1
	v_add_co_ci_u32_e32 v100, vcc_lo, s25, v11, vcc_lo
	v_add_co_ci_u32_e64 v101, vcc_lo, s27, v11, s0
	v_add_co_u32 v102, vcc_lo, s24, v2
	v_add_co_u32 v103, s0, s26, v2
	v_add_co_u32 v104, s1, s22, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v105, s1, s23, v3, s1
	v_add_co_ci_u32_e32 v106, vcc_lo, s25, v3, vcc_lo
	v_add_co_ci_u32_e64 v107, vcc_lo, s27, v3, s0
	v_add_co_u32 v108, vcc_lo, s22, v5
	v_add_co_u32 v109, s0, s18, v5
	v_add_co_u32 v110, s1, s28, v5
	v_add_co_u32 v111, s2, s16, v5
	v_add_co_u32 v112, s3, s12, v5
	v_add_co_u32 v0, s4, v5, s20
	v_add_co_ci_u32_e32 v115, vcc_lo, s23, v4, vcc_lo
	v_add_co_ci_u32_e64 v116, vcc_lo, s19, v4, s0
	v_add_co_ci_u32_e64 v117, vcc_lo, s29, v4, s1
	v_add_co_ci_u32_e64 v118, vcc_lo, s17, v4, s2
	v_add_co_ci_u32_e64 v119, vcc_lo, s13, v4, s3
	v_add_co_ci_u32_e64 v1, vcc_lo, s21, v4, s4
	v_add_co_u32 v120, vcc_lo, s14, v12
	v_add_co_u32 v121, s0, s18, v12
	v_add_co_u32 v122, s1, s16, v12
	v_add_co_u32 v123, s2, s28, v12
	v_add_co_u32 v124, s3, s30, v12
	v_add_co_ci_u32_e32 v127, vcc_lo, s15, v6, vcc_lo
	v_add_co_ci_u32_e64 v128, vcc_lo, s19, v6, s0
	v_add_co_ci_u32_e64 v129, vcc_lo, s17, v6, s1
	v_add_co_ci_u32_e64 v130, vcc_lo, s29, v6, s2
	v_add_co_ci_u32_e64 v131, vcc_lo, s31, v6, s3
	v_add_co_u32 v125, s4, s12, v12
	v_add_co_u32 v132, vcc_lo, 0x1300, v0
	v_add_co_ci_u32_e64 v126, s4, s13, v6, s4
	v_add_co_ci_u32_e32 v133, vcc_lo, 0, v1, vcc_lo
	s_add_i32 s16, s33, -4
	s_mov_b64 s[12:13], 0
.LBB0_2:                                ; =>This Inner Loop Header: Depth=1
	s_clause 0x1
	scratch_load_b32 v0, off, off offset:116
	scratch_load_b32 v1, off, off offset:120
	s_add_u32 s0, s34, -16
	s_addc_u32 s1, s35, -1
	s_waitcnt vmcnt(1)
	v_add_co_u32 v0, vcc_lo, v0, s12
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v1, vcc_lo, s13, v1, vcc_lo
	global_load_b64 v[0:1], v[0:1], off
	s_clause 0x3
	scratch_load_b32 v2, off, off offset:140
	scratch_load_b32 v3, off, off offset:144
	scratch_load_b32 v6, off, off offset:164
	scratch_load_b32 v7, off, off offset:168
	s_waitcnt vmcnt(3)
	v_add_co_u32 v2, vcc_lo, v2, s12
	s_waitcnt vmcnt(2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s13, v3, vcc_lo
	s_waitcnt vmcnt(1)
	v_add_co_u32 v6, vcc_lo, v6, s12
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v7, vcc_lo, s13, v7, vcc_lo
	s_clause 0x1
	global_load_b64 v[2:3], v[2:3], off
	global_load_b64 v[6:7], v[6:7], off
	s_clause 0x1
	scratch_load_b32 v8, off, off offset:188
	scratch_load_b32 v9, off, off offset:192
	s_waitcnt vmcnt(3)
	v_add_f64 v[4:5], v[0:1], -v[2:3]
	s_waitcnt vmcnt(1)
	v_add_co_u32 v8, vcc_lo, v8, s12
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v9, vcc_lo, s13, v9, vcc_lo
	global_load_b64 v[8:9], v[8:9], off
	s_waitcnt vmcnt(0)
	v_add_f64 v[10:11], v[6:7], -v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[10:11], v[10:11], s[8:9]
	v_fma_f64 v[4:5], v[4:5], s[10:11], v[10:11]
	s_clause 0x1
	scratch_load_b32 v10, off, off offset:224
	scratch_load_b32 v11, off, off offset:228
	s_waitcnt vmcnt(1)
	v_add_co_u32 v10, vcc_lo, v10, s12
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v11, vcc_lo, s13, v11, vcc_lo
	global_load_b64 v[10:11], v[10:11], off
	s_clause 0x1
	scratch_load_b32 v12, off, off offset:204
	scratch_load_b32 v13, off, off offset:232
	s_waitcnt vmcnt(1)
	v_add_co_u32 v12, vcc_lo, v12, s12
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v13, vcc_lo, s13, v13, vcc_lo
	global_load_b64 v[14:15], v[12:13], off
	s_clause 0x1
	scratch_load_b32 v12, off, off offset:208
	scratch_load_b32 v13, off, off offset:236
	s_waitcnt vmcnt(2)
	v_fma_f64 v[10:11], v[10:11], 2.0, v[14:15]
	s_waitcnt vmcnt(1)
	v_add_co_u32 v12, vcc_lo, v12, s12
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v13, vcc_lo, s13, v13, vcc_lo
	global_load_b64 v[12:13], v[12:13], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[12:13], v[10:11], v[12:13]
	s_clause 0x1
	scratch_load_b32 v10, off, off offset:212
	scratch_load_b32 v11, off, off offset:240
	s_waitcnt vmcnt(1)
	v_add_co_u32 v10, vcc_lo, v10, s12
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v11, vcc_lo, s13, v11, vcc_lo
	global_load_b64 v[10:11], v[10:11], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[16:17], v[12:13], v[10:11]
	v_mul_f64 v[12:13], v[14:15], v[10:11]
	s_delay_alu instid0(VALU_DEP_2)
	v_mul_f64 v[4:5], v[4:5], v[16:17]
	s_clause 0x1
	scratch_load_b32 v16, off, off offset:108
	scratch_load_b32 v17, off, off offset:124
	s_waitcnt vmcnt(1)
	v_add_co_u32 v16, vcc_lo, v16, s12
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v17, vcc_lo, s13, v17, vcc_lo
	global_load_b64 v[16:17], v[16:17], off
	s_clause 0x3
	scratch_load_b32 v24, off, off offset:132
	scratch_load_b32 v25, off, off offset:148
	scratch_load_b32 v28, off, off offset:156
	scratch_load_b32 v29, off, off offset:172
	s_waitcnt vmcnt(3)
	v_add_co_u32 v24, vcc_lo, v24, s12
	s_waitcnt vmcnt(2)
	v_add_co_ci_u32_e32 v25, vcc_lo, s13, v25, vcc_lo
	s_waitcnt vmcnt(1)
	v_add_co_u32 v28, vcc_lo, v28, s12
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v29, vcc_lo, s13, v29, vcc_lo
	s_clause 0x1
	global_load_b64 v[24:25], v[24:25], off
	global_load_b64 v[28:29], v[28:29], off
	s_clause 0x1
	scratch_load_b32 v30, off, off offset:180
	scratch_load_b32 v31, off, off offset:196
	s_waitcnt vmcnt(3)
	v_add_f64 v[26:27], v[16:17], -v[24:25]
	s_waitcnt vmcnt(1)
	v_add_co_u32 v30, vcc_lo, v30, s12
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v31, vcc_lo, s13, v31, vcc_lo
	global_load_b64 v[30:31], v[30:31], off
	s_waitcnt vmcnt(0)
	v_add_f64 v[32:33], v[28:29], -v[30:31]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[32:33], v[32:33], s[8:9]
	v_fma_f64 v[26:27], v[26:27], s[10:11], v[32:33]
	s_clause 0x1
	scratch_load_b32 v32, off, off offset:216
	scratch_load_b32 v33, off, off offset:244
	s_waitcnt vmcnt(1)
	v_add_co_u32 v32, vcc_lo, v32, s12
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v33, vcc_lo, s13, v33, vcc_lo
	global_load_b64 v[32:33], v[32:33], off
	s_clause 0x1
	s_load_b256 s[0:7], s[0:1], 0x0
	s_load_b64 s[14:15], s[34:35], 0x10
	s_add_u32 s34, s34, 8
	s_addc_u32 s35, s35, 0
	s_waitcnt vmcnt(0)
	v_mul_f64 v[32:33], v[14:15], v[32:33]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[32:33], v[10:11], v[32:33]
	v_mul_f64 v[26:27], v[32:33], v[26:27]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[26:27], s[4:5], v[26:27]
	v_fma_f64 v[4:5], v[20:21], v[4:5], v[26:27]
	s_clause 0x1
	scratch_load_b32 v26, off, off offset:112
	scratch_load_b32 v27, off, off offset:128
	s_waitcnt vmcnt(1)
	v_add_co_u32 v26, vcc_lo, v26, s12
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v27, vcc_lo, s13, v27, vcc_lo
	global_load_b64 v[26:27], v[26:27], off
	s_clause 0x3
	scratch_load_b32 v32, off, off offset:136
	scratch_load_b32 v33, off, off offset:152
	scratch_load_b32 v36, off, off offset:160
	scratch_load_b32 v37, off, off offset:176
	s_waitcnt vmcnt(3)
	v_add_co_u32 v32, vcc_lo, v32, s12
	s_waitcnt vmcnt(2)
	v_add_co_ci_u32_e32 v33, vcc_lo, s13, v33, vcc_lo
	s_waitcnt vmcnt(1)
	v_add_co_u32 v36, vcc_lo, v36, s12
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v37, vcc_lo, s13, v37, vcc_lo
	s_clause 0x1
	global_load_b64 v[32:33], v[32:33], off
	global_load_b64 v[36:37], v[36:37], off
	s_clause 0x1
	scratch_load_b32 v38, off, off offset:184
	scratch_load_b32 v39, off, off offset:200
	s_waitcnt vmcnt(3)
	v_add_f64 v[34:35], v[26:27], -v[32:33]
	s_waitcnt vmcnt(1)
	v_add_co_u32 v38, vcc_lo, v38, s12
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v39, vcc_lo, s13, v39, vcc_lo
	global_load_b64 v[38:39], v[38:39], off
	s_waitcnt vmcnt(0)
	v_add_f64 v[40:41], v[36:37], -v[38:39]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[40:41], v[40:41], s[8:9]
	v_fma_f64 v[34:35], v[34:35], s[10:11], v[40:41]
	s_clause 0x1
	scratch_load_b32 v40, off, off offset:220
	scratch_load_b32 v41, off, off offset:248
	s_waitcnt vmcnt(1)
	v_add_co_u32 v40, vcc_lo, v40, s12
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v41, vcc_lo, s13, v41, vcc_lo
	global_load_b64 v[40:41], v[40:41], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[14:15], v[14:15], v[40:41]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[14:15], v[10:11], v[14:15]
	v_fma_f64 v[4:5], v[14:15], v[34:35], v[4:5]
	s_clause 0x3
	scratch_load_b32 v14, off, off offset:268
	scratch_load_b32 v15, off, off offset:272
	scratch_load_b32 v34, off, off offset:292
	scratch_load_b32 v35, off, off offset:296
	s_waitcnt vmcnt(3)
	v_add_co_u32 v14, vcc_lo, v14, s12
	s_waitcnt vmcnt(2)
	v_add_co_ci_u32_e32 v15, vcc_lo, s13, v15, vcc_lo
	s_waitcnt vmcnt(1)
	v_add_co_u32 v34, vcc_lo, v34, s12
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v35, vcc_lo, s13, v35, vcc_lo
	s_clause 0x1
	global_load_b64 v[14:15], v[14:15], off
	global_load_b64 v[34:35], v[34:35], off
	s_waitcnt vmcnt(1)
	v_add_f64 v[0:1], v[0:1], -v[14:15]
	s_waitcnt vmcnt(0)
	v_add_f64 v[14:15], v[14:15], -v[34:35]
	v_add_f64 v[2:3], v[2:3], -v[34:35]
	s_clause 0x1
	scratch_load_b32 v34, off, off offset:316
	scratch_load_b32 v35, off, off offset:320
	s_waitcnt vmcnt(1)
	v_add_co_u32 v34, vcc_lo, v34, s12
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v35, vcc_lo, s13, v35, vcc_lo
	global_load_b64 v[34:35], v[34:35], off
	s_waitcnt vmcnt(0)
	v_add_f64 v[60:61], v[6:7], -v[34:35]
	s_clause 0x1
	scratch_load_b32 v6, off, off offset:340
	scratch_load_b32 v7, off, off offset:344
	s_waitcnt vmcnt(1)
	v_add_co_u32 v6, vcc_lo, v6, s12
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v7, vcc_lo, s13, v7, vcc_lo
	global_load_b64 v[6:7], v[6:7], off
	s_waitcnt vmcnt(0)
	v_add_f64 v[70:71], v[8:9], -v[6:7]
	s_clause 0x1
	scratch_load_b32 v8, off, off offset:376
	scratch_load_b32 v9, off, off offset:380
	v_add_f64 v[34:35], v[34:35], -v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[6:7], v[34:35], s[8:9]
	v_fma_f64 v[6:7], v[14:15], s[10:11], v[6:7]
	s_waitcnt vmcnt(1)
	v_add_co_u32 v8, vcc_lo, v8, s12
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v9, vcc_lo, s13, v9, vcc_lo
	global_load_b64 v[8:9], v[8:9], off
	s_clause 0x3
	scratch_load_b32 v14, off, off offset:356
	scratch_load_b32 v15, off, off offset:384
	scratch_load_b32 v35, off, off offset:388
	scratch_load_b32 v34, off, off offset:360
	s_waitcnt vmcnt(3)
	v_add_co_u32 v14, vcc_lo, v14, s12
	s_waitcnt vmcnt(2)
	v_add_co_ci_u32_e32 v15, vcc_lo, s13, v15, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_co_u32 v34, vcc_lo, v34, s12
	v_add_co_ci_u32_e32 v35, vcc_lo, s13, v35, vcc_lo
	global_load_b64 v[14:15], v[14:15], off
	global_load_b64 v[34:35], v[34:35], off
	s_waitcnt vmcnt(1)
	v_fma_f64 v[8:9], v[8:9], 2.0, v[14:15]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f64 v[8:9], v[8:9], v[34:35]
	s_clause 0x1
	scratch_load_b32 v34, off, off offset:364
	scratch_load_b32 v35, off, off offset:392
	s_waitcnt vmcnt(1)
	v_add_co_u32 v34, vcc_lo, v34, s12
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v35, vcc_lo, s13, v35, vcc_lo
	global_load_b64 v[146:147], v[34:35], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[8:9], v[8:9], v[146:147]
	v_mul_f64 v[148:149], v[14:15], v[146:147]
	s_delay_alu instid0(VALU_DEP_2)
	v_mul_f64 v[6:7], v[6:7], v[8:9]
	s_clause 0x1
	scratch_load_b32 v8, off, off offset:284
	scratch_load_b32 v9, off, off offset:300
	v_fma_f64 v[4:5], v[20:21], v[6:7], v[4:5]
	s_clause 0x1
	scratch_load_b32 v6, off, off offset:260
	scratch_load_b32 v7, off, off offset:276
	s_waitcnt vmcnt(1)
	v_add_co_u32 v6, vcc_lo, v6, s12
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v7, vcc_lo, s13, v7, vcc_lo
	v_add_co_u32 v8, vcc_lo, v8, s12
	v_add_co_ci_u32_e32 v9, vcc_lo, s13, v9, vcc_lo
	s_clause 0x1
	global_load_b64 v[6:7], v[6:7], off
	global_load_b64 v[8:9], v[8:9], off
	s_waitcnt vmcnt(1)
	v_add_f64 v[16:17], v[16:17], -v[6:7]
	s_waitcnt vmcnt(0)
	v_add_f64 v[6:7], v[6:7], -v[8:9]
	v_add_f64 v[138:139], v[24:25], -v[8:9]
	s_clause 0x3
	scratch_load_b32 v8, off, off offset:308
	scratch_load_b32 v9, off, off offset:324
	scratch_load_b32 v24, off, off offset:332
	scratch_load_b32 v25, off, off offset:348
	s_waitcnt vmcnt(3)
	v_add_co_u32 v8, vcc_lo, v8, s12
	s_waitcnt vmcnt(2)
	v_add_co_ci_u32_e32 v9, vcc_lo, s13, v9, vcc_lo
	s_waitcnt vmcnt(1)
	v_add_co_u32 v24, vcc_lo, v24, s12
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v25, vcc_lo, s13, v25, vcc_lo
	s_clause 0x1
	global_load_b64 v[8:9], v[8:9], off
	global_load_b64 v[24:25], v[24:25], off
	s_waitcnt vmcnt(1)
	v_add_f64 v[150:151], v[28:29], -v[8:9]
	s_waitcnt vmcnt(0)
	v_add_f64 v[8:9], v[8:9], -v[24:25]
	v_add_f64 v[152:153], v[30:31], -v[24:25]
	s_clause 0x1
	scratch_load_b32 v24, off, off offset:288
	scratch_load_b32 v25, off, off offset:304
	v_mul_f64 v[8:9], v[8:9], s[8:9]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[6:7], v[6:7], s[10:11], v[8:9]
	s_clause 0x1
	scratch_load_b32 v8, off, off offset:368
	scratch_load_b32 v9, off, off offset:396
	s_waitcnt vmcnt(1)
	v_add_co_u32 v8, vcc_lo, v8, s12
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v9, vcc_lo, s13, v9, vcc_lo
	global_load_b64 v[8:9], v[8:9], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[8:9], v[14:15], v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[8:9], v[146:147], v[8:9]
	v_mul_f64 v[6:7], v[8:9], v[6:7]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[4:5], s[4:5], v[6:7], v[4:5]
	s_clause 0x1
	scratch_load_b32 v6, off, off offset:264
	scratch_load_b32 v7, off, off offset:280
	s_waitcnt vmcnt(1)
	v_add_co_u32 v6, vcc_lo, v6, s12
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v7, vcc_lo, s13, v7, vcc_lo
	v_add_co_u32 v24, vcc_lo, v24, s12
	v_add_co_ci_u32_e32 v25, vcc_lo, s13, v25, vcc_lo
	s_clause 0x1
	global_load_b64 v[6:7], v[6:7], off
	global_load_b64 v[24:25], v[24:25], off
	s_waitcnt vmcnt(1)
	v_add_f64 v[8:9], v[26:27], -v[6:7]
	s_clause 0x1
	scratch_load_b32 v26, off, off offset:336
	scratch_load_b32 v27, off, off offset:352
	s_waitcnt vmcnt(2)
	v_add_f64 v[6:7], v[6:7], -v[24:25]
	v_add_f64 v[154:155], v[32:33], -v[24:25]
	s_clause 0x1
	scratch_load_b32 v24, off, off offset:312
	scratch_load_b32 v25, off, off offset:328
	s_waitcnt vmcnt(1)
	v_add_co_u32 v24, vcc_lo, v24, s12
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v25, vcc_lo, s13, v25, vcc_lo
	v_add_co_u32 v26, vcc_lo, v26, s12
	v_add_co_ci_u32_e32 v27, vcc_lo, s13, v27, vcc_lo
	s_clause 0x1
	global_load_b64 v[24:25], v[24:25], off
	global_load_b64 v[26:27], v[26:27], off
	s_waitcnt vmcnt(1)
	v_add_f64 v[156:157], v[36:37], -v[24:25]
	s_waitcnt vmcnt(0)
	v_add_f64 v[24:25], v[24:25], -v[26:27]
	v_add_f64 v[158:159], v[38:39], -v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[24:25], v[24:25], s[8:9]
	v_fma_f64 v[6:7], v[6:7], s[10:11], v[24:25]
	s_clause 0x1
	scratch_load_b32 v24, off, off offset:372
	scratch_load_b32 v25, off, off offset:400
	s_waitcnt vmcnt(1)
	v_add_co_u32 v24, vcc_lo, v24, s12
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v25, vcc_lo, s13, v25, vcc_lo
	global_load_b64 v[24:25], v[24:25], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[14:15], v[14:15], v[24:25]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[14:15], v[146:147], v[14:15]
	v_fma_f64 v[4:5], v[14:15], v[6:7], v[4:5]
	s_clause 0x1
	scratch_load_b32 v6, off, off offset:420
	scratch_load_b32 v7, off, off offset:424
	s_waitcnt vmcnt(1)
	v_add_co_u32 v6, vcc_lo, v6, s12
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v7, vcc_lo, s13, v7, vcc_lo
	global_load_b64 v[6:7], v[6:7], off
	s_clause 0x1
	scratch_load_b32 v14, off, off offset:444
	scratch_load_b32 v15, off, off offset:448
	s_waitcnt vmcnt(1)
	v_add_co_u32 v14, vcc_lo, v14, s12
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v15, vcc_lo, s13, v15, vcc_lo
	v_add_co_u32 v26, vcc_lo, v184, s12
	v_add_co_ci_u32_e32 v27, vcc_lo, s13, v185, vcc_lo
	v_add_co_u32 v28, vcc_lo, v190, s12
	v_add_co_ci_u32_e32 v29, vcc_lo, s13, v191, vcc_lo
	s_clause 0x2
	global_load_b64 v[14:15], v[14:15], off
	global_load_b64 v[26:27], v[26:27], off
	global_load_b64 v[28:29], v[28:29], off
	s_waitcnt vmcnt(2)
	v_add_f64 v[24:25], v[6:7], -v[14:15]
	s_waitcnt vmcnt(0)
	v_add_f64 v[30:31], v[26:27], -v[28:29]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[30:31], v[30:31], s[8:9]
	v_fma_f64 v[24:25], v[24:25], s[10:11], v[30:31]
	v_add_co_u32 v30, vcc_lo, v75, s12
	v_add_co_ci_u32_e32 v31, vcc_lo, s13, v76, vcc_lo
	v_add_co_u32 v32, vcc_lo, v22, s12
	v_add_co_ci_u32_e32 v33, vcc_lo, s13, v77, vcc_lo
	global_load_b64 v[30:31], v[30:31], off
	v_add_co_u32 v34, vcc_lo, v23, s12
	global_load_b64 v[32:33], v[32:33], off
	v_add_co_ci_u32_e32 v35, vcc_lo, s13, v78, vcc_lo
	global_load_b64 v[34:35], v[34:35], off
	s_waitcnt vmcnt(1)
	v_fma_f64 v[30:31], v[30:31], 2.0, v[32:33]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f64 v[30:31], v[30:31], v[34:35]
	v_add_co_u32 v34, vcc_lo, v72, s12
	v_add_co_ci_u32_e32 v35, vcc_lo, s13, v79, vcc_lo
	global_load_b64 v[160:161], v[34:35], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[30:31], v[30:31], v[160:161]
	v_mul_f64 v[162:163], v[32:33], v[160:161]
	s_delay_alu instid0(VALU_DEP_2)
	v_mul_f64 v[24:25], v[24:25], v[30:31]
	s_clause 0x1
	scratch_load_b32 v30, off, off offset:412
	scratch_load_b32 v31, off, off offset:428
	s_waitcnt vmcnt(1)
	v_add_co_u32 v30, vcc_lo, v30, s12
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v31, vcc_lo, s13, v31, vcc_lo
	global_load_b64 v[30:31], v[30:31], off
	s_clause 0x2
	scratch_load_b32 v34, off, off offset:436
	scratch_load_b32 v35, off, off offset:452
	scratch_load_b32 v38, off, off offset:460
	s_waitcnt vmcnt(2)
	v_add_co_u32 v34, vcc_lo, v34, s12
	s_waitcnt vmcnt(1)
	v_add_co_ci_u32_e32 v35, vcc_lo, s13, v35, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_co_u32 v38, vcc_lo, v38, s12
	v_add_co_ci_u32_e32 v39, vcc_lo, s13, v186, vcc_lo
	v_add_co_u32 v40, vcc_lo, v188, s12
	v_add_co_ci_u32_e32 v41, vcc_lo, s13, v18, vcc_lo
	s_clause 0x2
	global_load_b64 v[34:35], v[34:35], off
	global_load_b64 v[38:39], v[38:39], off
	global_load_b64 v[40:41], v[40:41], off
	s_waitcnt vmcnt(2)
	v_add_f64 v[36:37], v[30:31], -v[34:35]
	s_waitcnt vmcnt(0)
	v_add_f64 v[42:43], v[38:39], -v[40:41]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[42:43], v[42:43], s[8:9]
	v_fma_f64 v[36:37], v[36:37], s[10:11], v[42:43]
	v_add_co_u32 v42, vcc_lo, v73, s12
	v_add_co_ci_u32_e32 v43, vcc_lo, s13, v80, vcc_lo
	global_load_b64 v[42:43], v[42:43], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[42:43], v[32:33], v[42:43]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[42:43], v[160:161], v[42:43]
	v_mul_f64 v[36:37], v[42:43], v[36:37]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[36:37], s[4:5], v[36:37]
	v_fma_f64 v[24:25], v[20:21], v[24:25], v[36:37]
	s_clause 0x1
	scratch_load_b32 v36, off, off offset:416
	scratch_load_b32 v37, off, off offset:432
	s_waitcnt vmcnt(1)
	v_add_co_u32 v36, vcc_lo, v36, s12
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v37, vcc_lo, s13, v37, vcc_lo
	global_load_b64 v[36:37], v[36:37], off
	s_clause 0x2
	scratch_load_b32 v42, off, off offset:440
	scratch_load_b32 v43, off, off offset:456
	scratch_load_b32 v46, off, off offset:464
	s_waitcnt vmcnt(2)
	v_add_co_u32 v42, vcc_lo, v42, s12
	s_waitcnt vmcnt(1)
	v_add_co_ci_u32_e32 v43, vcc_lo, s13, v43, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_co_u32 v46, vcc_lo, v46, s12
	v_add_co_ci_u32_e32 v47, vcc_lo, s13, v187, vcc_lo
	v_add_co_u32 v48, vcc_lo, v189, s12
	v_add_co_ci_u32_e32 v49, vcc_lo, s13, v19, vcc_lo
	s_clause 0x2
	global_load_b64 v[42:43], v[42:43], off
	global_load_b64 v[46:47], v[46:47], off
	global_load_b64 v[48:49], v[48:49], off
	s_waitcnt vmcnt(2)
	v_add_f64 v[44:45], v[36:37], -v[42:43]
	s_waitcnt vmcnt(0)
	v_add_f64 v[50:51], v[46:47], -v[48:49]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[50:51], v[50:51], s[8:9]
	v_fma_f64 v[44:45], v[44:45], s[10:11], v[50:51]
	v_add_co_u32 v50, vcc_lo, v74, s12
	v_add_co_ci_u32_e32 v51, vcc_lo, s13, v81, vcc_lo
	global_load_b64 v[50:51], v[50:51], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[32:33], v[32:33], v[50:51]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[32:33], v[160:161], v[32:33]
	v_fma_f64 v[24:25], v[32:33], v[44:45], v[24:25]
	v_add_co_u32 v32, vcc_lo, v86, s12
	v_add_co_ci_u32_e32 v33, vcc_lo, s13, v87, vcc_lo
	v_add_co_u32 v44, vcc_lo, v92, s12
	v_add_co_ci_u32_e32 v45, vcc_lo, s13, v93, vcc_lo
	s_clause 0x1
	global_load_b64 v[32:33], v[32:33], off
	global_load_b64 v[44:45], v[44:45], off
	s_waitcnt vmcnt(1)
	v_add_f64 v[6:7], v[6:7], -v[32:33]
	s_waitcnt vmcnt(0)
	v_add_f64 v[32:33], v[32:33], -v[44:45]
	v_add_f64 v[14:15], v[14:15], -v[44:45]
	v_add_co_u32 v44, vcc_lo, v98, s12
	v_add_co_ci_u32_e32 v45, vcc_lo, s13, v99, vcc_lo
	v_add_co_u32 v50, vcc_lo, v104, s12
	v_add_co_ci_u32_e32 v51, vcc_lo, s13, v105, vcc_lo
	s_clause 0x1
	global_load_b64 v[44:45], v[44:45], off
	global_load_b64 v[50:51], v[50:51], off
	v_mul_f64 v[64:65], v[14:15], s[8:9]
	s_waitcnt vmcnt(1)
	v_add_f64 v[26:27], v[26:27], -v[44:45]
	s_waitcnt vmcnt(0)
	v_add_f64 v[44:45], v[44:45], -v[50:51]
	v_add_f64 v[28:29], v[28:29], -v[50:51]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[174:175], v[26:27], s[8:9]
	v_mul_f64 v[44:45], v[44:45], s[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[178:179], v[28:29], s[8:9]
	v_fma_f64 v[32:33], v[32:33], s[10:11], v[44:45]
	v_add_co_u32 v44, vcc_lo, v125, s12
	v_add_co_ci_u32_e32 v45, vcc_lo, s13, v126, vcc_lo
	v_add_co_u32 v50, vcc_lo, v120, s12
	v_add_co_ci_u32_e32 v51, vcc_lo, s13, v127, vcc_lo
	global_load_b64 v[44:45], v[44:45], off
	v_add_co_u32 v52, vcc_lo, v121, s12
	global_load_b64 v[50:51], v[50:51], off
	v_add_co_ci_u32_e32 v53, vcc_lo, s13, v128, vcc_lo
	global_load_b64 v[52:53], v[52:53], off
	s_waitcnt vmcnt(1)
	v_fma_f64 v[44:45], v[44:45], 2.0, v[50:51]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f64 v[44:45], v[44:45], v[52:53]
	v_add_co_u32 v52, vcc_lo, v122, s12
	v_add_co_ci_u32_e32 v53, vcc_lo, s13, v129, vcc_lo
	global_load_b64 v[164:165], v[52:53], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[44:45], v[44:45], v[164:165]
	v_mul_f64 v[166:167], v[50:51], v[164:165]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[32:33], v[32:33], v[44:45]
	v_fma_f64 v[24:25], v[20:21], v[32:33], v[24:25]
	v_add_co_u32 v32, vcc_lo, v84, s12
	v_add_co_ci_u32_e32 v33, vcc_lo, s13, v88, vcc_lo
	v_add_co_u32 v44, vcc_lo, v90, s12
	v_add_co_ci_u32_e32 v45, vcc_lo, s13, v94, vcc_lo
	s_clause 0x1
	global_load_b64 v[32:33], v[32:33], off
	global_load_b64 v[44:45], v[44:45], off
	s_waitcnt vmcnt(1)
	v_add_f64 v[30:31], v[30:31], -v[32:33]
	s_waitcnt vmcnt(0)
	v_add_f64 v[32:33], v[32:33], -v[44:45]
	v_add_f64 v[34:35], v[34:35], -v[44:45]
	v_add_co_u32 v44, vcc_lo, v96, s12
	v_add_co_ci_u32_e32 v45, vcc_lo, s13, v100, vcc_lo
	v_add_co_u32 v52, vcc_lo, v102, s12
	v_add_co_ci_u32_e32 v53, vcc_lo, s13, v106, vcc_lo
	s_clause 0x1
	global_load_b64 v[44:45], v[44:45], off
	global_load_b64 v[52:53], v[52:53], off
	v_mul_f64 v[62:63], v[30:31], s[8:9]
	v_mul_f64 v[140:141], v[34:35], s[8:9]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[16:17], v[16:17], s[10:11], v[62:63]
	s_waitcnt vmcnt(1)
	v_add_f64 v[38:39], v[38:39], -v[44:45]
	s_waitcnt vmcnt(0)
	v_add_f64 v[44:45], v[44:45], -v[52:53]
	v_add_f64 v[40:41], v[40:41], -v[52:53]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[176:177], v[38:39], s[8:9]
	v_mul_f64 v[44:45], v[44:45], s[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[180:181], v[40:41], s[8:9]
	v_fma_f64 v[32:33], v[32:33], s[10:11], v[44:45]
	v_add_co_u32 v44, vcc_lo, v123, s12
	v_add_co_ci_u32_e32 v45, vcc_lo, s13, v130, vcc_lo
	global_load_b64 v[44:45], v[44:45], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[44:45], v[50:51], v[44:45]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[44:45], v[164:165], v[44:45]
	v_mul_f64 v[32:33], v[44:45], v[32:33]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[24:25], s[4:5], v[32:33], v[24:25]
	v_add_co_u32 v32, vcc_lo, v85, s12
	v_add_co_ci_u32_e32 v33, vcc_lo, s13, v89, vcc_lo
	v_add_co_u32 v44, vcc_lo, v91, s12
	v_add_co_ci_u32_e32 v45, vcc_lo, s13, v95, vcc_lo
	s_clause 0x1
	global_load_b64 v[32:33], v[32:33], off
	global_load_b64 v[44:45], v[44:45], off
	s_waitcnt vmcnt(1)
	v_add_f64 v[36:37], v[36:37], -v[32:33]
	s_waitcnt vmcnt(0)
	v_add_f64 v[32:33], v[32:33], -v[44:45]
	v_add_f64 v[42:43], v[42:43], -v[44:45]
	v_add_co_u32 v44, vcc_lo, v97, s12
	v_add_co_ci_u32_e32 v45, vcc_lo, s13, v101, vcc_lo
	v_add_co_u32 v52, vcc_lo, v103, s12
	v_add_co_ci_u32_e32 v53, vcc_lo, s13, v107, vcc_lo
	s_clause 0x1
	global_load_b64 v[44:45], v[44:45], off
	global_load_b64 v[52:53], v[52:53], off
	v_mul_f64 v[170:171], v[42:43], s[8:9]
	s_waitcnt vmcnt(1)
	v_add_f64 v[46:47], v[46:47], -v[44:45]
	s_waitcnt vmcnt(0)
	v_add_f64 v[44:45], v[44:45], -v[52:53]
	v_add_f64 v[48:49], v[48:49], -v[52:53]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[172:173], v[46:47], s[8:9]
	v_mul_f64 v[44:45], v[44:45], s[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[182:183], v[48:49], s[8:9]
	v_fma_f64 v[32:33], v[32:33], s[10:11], v[44:45]
	v_add_co_u32 v44, vcc_lo, v124, s12
	v_add_co_ci_u32_e32 v45, vcc_lo, s13, v131, vcc_lo
	global_load_b64 v[44:45], v[44:45], off
	s_waitcnt vmcnt(0)
	v_mul_f64 v[44:45], v[50:51], v[44:45]
	v_mul_f64 v[50:51], v[6:7], s[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[44:45], v[164:165], v[44:45]
	v_fma_f64 v[0:1], v[0:1], s[10:11], v[50:51]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[24:25], v[44:45], v[32:33], v[24:25]
	v_mul_f64 v[24:25], v[24:25], s[8:9]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[4:5], v[4:5], s[10:11], v[24:25]
	v_add_co_u32 v24, vcc_lo, v132, s12
	v_add_co_ci_u32_e32 v25, vcc_lo, s13, v133, vcc_lo
	v_add_co_u32 v34, vcc_lo, v112, s12
	v_add_co_ci_u32_e32 v35, vcc_lo, s13, v119, vcc_lo
	global_load_b64 v[32:33], v[24:25], off
	v_add_co_u32 v38, vcc_lo, 0x1000, v34
	v_add_co_ci_u32_e32 v39, vcc_lo, 0, v35, vcc_lo
	s_waitcnt vmcnt(0)
	v_fma_f64 v[168:169], s[4:5], v[4:5], v[32:33]
	v_mul_f64 v[4:5], v[36:37], s[8:9]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[8:9], v[8:9], s[10:11], v[4:5]
	global_load_b128 v[26:29], v[38:39], off offset:776
	scratch_load_b32 v4, off, off offset:84 ; 4-byte Folded Reload
	s_waitcnt vmcnt(0)
	v_add_co_u32 v142, vcc_lo, v4, s12
	scratch_load_b32 v4, off, off offset:96 ; 4-byte Folded Reload
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v143, vcc_lo, s13, v4, vcc_lo
	v_add_co_u32 v36, vcc_lo, v111, s12
	v_add_co_ci_u32_e32 v37, vcc_lo, s13, v118, vcc_lo
	global_load_b128 v[30:33], v[142:143], off
	v_add_co_u32 v44, vcc_lo, 0x1000, v36
	v_add_co_ci_u32_e32 v45, vcc_lo, 0, v37, vcc_lo
	v_add_co_u32 v40, vcc_lo, v110, s12
	v_add_co_ci_u32_e32 v41, vcc_lo, s13, v117, vcc_lo
	global_load_b128 v[4:7], v[44:45], off offset:776
	v_add_co_u32 v46, vcc_lo, 0x1000, v40
	v_add_co_ci_u32_e32 v47, vcc_lo, 0, v41, vcc_lo
	global_load_b128 v[50:53], v[46:47], off offset:776
	s_waitcnt vmcnt(2)
	v_mul_f64 v[14:15], v[28:29], v[32:33]
	v_mul_f64 v[30:31], v[26:27], v[30:31]
	s_waitcnt vmcnt(0)
	v_mul_f64 v[32:33], v[28:29], v[52:53]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[14:15], v[14:15], v[6:7]
	v_mul_f64 v[30:31], v[30:31], v[4:5]
	s_delay_alu instid0(VALU_DEP_2)
	v_mul_f64 v[14:15], v[8:9], v[14:15]
	scratch_load_b32 v8, off, off offset:88 ; 4-byte Folded Reload
	s_waitcnt vmcnt(0)
	v_add_co_u32 v66, vcc_lo, v8, s12
	scratch_load_b32 v8, off, off offset:92 ; 4-byte Folded Reload
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v67, vcc_lo, s13, v8, vcc_lo
	v_add_co_u32 v42, vcc_lo, v109, s12
	v_add_co_ci_u32_e32 v43, vcc_lo, s13, v116, vcc_lo
	global_load_b128 v[52:55], v[66:67], off
	v_add_co_u32 v48, vcc_lo, 0x1000, v42
	v_add_co_ci_u32_e32 v49, vcc_lo, 0, v43, vcc_lo
	global_load_b128 v[56:59], v[48:49], off offset:776
	s_waitcnt vmcnt(1)
	v_fma_f64 v[8:9], v[28:29], 2.0, v[54:55]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[28:29], v[8:9], v[58:59]
	v_mul_f64 v[8:9], v[54:55], v[58:59]
	v_mul_f64 v[28:29], v[6:7], v[28:29]
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f64 v[0:1], v[0:1], v[28:29]
	v_fma_f64 v[28:29], v[2:3], s[10:11], v[64:65]
	global_load_b128 v[62:65], v[38:39], off offset:752
	global_load_b128 v[66:69], v[66:67], off offset:-24
	global_load_b128 v[134:137], v[48:49], off offset:752
	global_load_b128 v[142:145], v[142:143], off offset:-24
	v_mul_f64 v[0:1], v[20:21], v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[0:1], s[4:5], v[0:1]
	v_fma_f64 v[0:1], s[4:5], v[14:15], v[0:1]
	v_mul_f64 v[14:15], v[6:7], v[32:33]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[16:17], v[16:17], v[14:15], v[0:1]
	s_waitcnt vmcnt(2)
	v_fma_f64 v[0:1], v[62:63], 2.0, v[66:67]
	s_waitcnt vmcnt(1)
	v_mul_f64 v[58:59], v[66:67], v[134:135]
	s_waitcnt vmcnt(0)
	v_mul_f64 v[54:55], v[62:63], v[142:143]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_mul_f64 v[32:33], v[0:1], v[134:135]
	global_load_b128 v[0:3], v[44:45], off offset:752
	s_waitcnt vmcnt(0)
	v_mul_f64 v[32:33], v[32:33], v[0:1]
	v_mul_f64 v[28:29], v[28:29], v[32:33]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[28:29], v[20:21], v[28:29]
	v_fma_f64 v[16:17], s[4:5], v[28:29], v[16:17]
	v_fma_f64 v[28:29], v[138:139], s[10:11], v[140:141]
	global_load_b128 v[138:141], v[46:47], off offset:752
	s_waitcnt vmcnt(0)
	v_mul_f64 v[32:33], v[62:63], v[138:139]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f64 v[62:63], v[0:1], v[32:33]
	v_mul_f64 v[32:33], v[0:1], v[54:55]
	v_fma_f64 v[16:17], v[28:29], v[62:63], v[16:17]
	v_fma_f64 v[28:29], v[154:155], s[10:11], v[170:171]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[28:29], v[28:29], v[32:33]
	v_mul_f64 v[32:33], v[26:27], v[50:51]
	v_fma_f64 v[26:27], v[26:27], 2.0, v[52:53]
	v_fma_f64 v[16:17], s[4:5], v[28:29], v[16:17]
	v_fma_f64 v[28:29], v[156:157], s[10:11], v[172:173]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_mul_f64 v[26:27], v[26:27], v[56:57]
	v_mul_f64 v[56:57], v[52:53], v[56:57]
	v_mul_f64 v[52:53], v[68:69], v[136:137]
	v_mul_f64 v[28:29], v[28:29], v[30:31]
	v_fma_f64 v[30:31], v[60:61], s[10:11], v[174:175]
	v_mul_f64 v[26:27], v[4:5], v[26:27]
	v_mul_f64 v[60:61], v[4:5], v[32:33]
	v_mul_f64 v[32:33], v[64:65], v[144:145]
	v_mul_f64 v[4:5], v[4:5], v[56:57]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_mul_f64 v[26:27], v[30:31], v[26:27]
	scratch_load_b64 v[30:31], off, off offset:4 ; 8-byte Folded Reload
	s_waitcnt vmcnt(0)
	v_mul_f64 v[26:27], v[30:31], v[26:27]
	v_fma_f64 v[30:31], v[64:65], 2.0, v[68:69]
	v_mul_f64 v[26:27], s[4:5], v[26:27]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[30:31], v[30:31], v[136:137]
	v_fma_f64 v[26:27], s[4:5], v[28:29], v[26:27]
	v_fma_f64 v[28:29], v[150:151], s[10:11], v[176:177]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[30:31], v[30:31], v[2:3]
	v_fma_f64 v[26:27], v[28:29], v[60:61], v[26:27]
	v_fma_f64 v[28:29], v[70:71], s[10:11], v[178:179]
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f64 v[28:29], v[28:29], v[30:31]
	scratch_load_b64 v[30:31], off, off offset:12 ; 8-byte Folded Reload
	s_waitcnt vmcnt(0)
	v_mul_f64 v[28:29], v[30:31], v[28:29]
	v_mul_f64 v[30:31], v[64:65], v[140:141]
	v_mul_f64 v[140:141], v[6:7], v[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fma_f64 v[26:27], s[4:5], v[28:29], v[26:27]
	v_fma_f64 v[28:29], v[152:153], s[10:11], v[180:181]
	v_mul_f64 v[54:55], v[2:3], v[30:31]
	v_mul_f64 v[30:31], v[2:3], v[32:33]
	v_mul_f64 v[32:33], v[146:147], v[148:149]
	v_mul_f64 v[2:3], v[52:53], v[2:3]
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fma_f64 v[26:27], v[28:29], v[54:55], v[26:27]
	v_fma_f64 v[28:29], v[158:159], s[10:11], v[182:183]
	v_mul_f64 v[28:29], v[28:29], v[30:31]
	v_mul_f64 v[30:31], v[10:11], v[12:13]
	s_clause 0x1
	scratch_load_b32 v10, off, off offset:24
	scratch_load_b32 v11, off, off offset:28
	v_fma_f64 v[26:27], s[4:5], v[28:29], v[26:27]
	v_mul_f64 v[28:29], v[164:165], v[166:167]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[26:27], v[26:27], s[8:9]
	v_fma_f64 v[16:17], v[16:17], s[10:11], v[26:27]
	v_mul_f64 v[26:27], v[160:161], v[162:163]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_add_f64 v[50:51], v[168:169], v[16:17]
	s_waitcnt vmcnt(1)
	v_add_co_u32 v10, vcc_lo, v10, s12
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v11, vcc_lo, s13, v11, vcc_lo
	v_add_co_u32 v12, vcc_lo, 0x2000, v10
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v13, vcc_lo, 0, v11, vcc_lo
	v_add_co_u32 v70, vcc_lo, v108, s12
	v_add_co_ci_u32_e32 v71, vcc_lo, s13, v115, vcc_lo
	s_clause 0x1
	global_load_b64 v[66:67], v[12:13], off offset:1536
	global_load_b64 v[64:65], v[10:11], off
	v_add_co_u32 v138, vcc_lo, 0x1000, v70
	v_add_co_ci_u32_e32 v139, vcc_lo, 0, v71, vcc_lo
	s_clause 0x1
	global_load_b128 v[134:137], v[138:139], off offset:3208
	global_load_b128 v[10:13], v[70:71], off offset:2440
	s_clause 0x1
	scratch_load_b32 v6, off, off offset:20
	scratch_load_b32 v7, off, off offset:32
	s_waitcnt vmcnt(4)
	v_add_f64 v[16:17], v[66:67], -v[64:65]
	s_waitcnt vmcnt(2)
	v_add_f64 v[68:69], v[136:137], -v[12:13]
	s_waitcnt vmcnt(1)
	v_add_co_u32 v6, vcc_lo, v6, s12
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v7, vcc_lo, s13, v7, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v8, vcc_lo, 0x2000, v6
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v7, vcc_lo
	v_add_co_u32 v150, vcc_lo, v113, s12
	v_add_co_ci_u32_e32 v151, vcc_lo, s13, v114, vcc_lo
	s_clause 0x1
	global_load_b64 v[146:147], v[8:9], off offset:1536
	global_load_b64 v[148:149], v[6:7], off
	v_add_co_u32 v152, vcc_lo, 0x1000, v150
	v_add_co_ci_u32_e32 v153, vcc_lo, 0, v151, vcc_lo
	v_mul_f64 v[68:69], v[68:69], s[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[16:17], v[16:17], s[10:11], v[68:69]
	v_mul_f64 v[14:15], v[14:15], v[16:17]
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f64 v[68:69], s[14:15], v[14:15]
	s_clause 0x1
	global_load_b128 v[14:17], v[152:153], off offset:3208
	global_load_b128 v[6:9], v[150:151], off offset:2440
	s_waitcnt vmcnt(2)
	v_add_f64 v[142:143], v[146:147], -v[148:149]
	s_waitcnt vmcnt(0)
	v_add_f64 v[144:145], v[16:17], -v[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[144:145], v[144:145], s[8:9]
	v_fma_f64 v[142:143], v[142:143], s[10:11], v[144:145]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[140:141], v[140:141], v[142:143]
	v_fma_f64 v[154:155], v[20:21], v[68:69], v[140:141]
	scratch_load_b32 v68, off, off offset:40 ; 4-byte Folded Reload
	s_waitcnt vmcnt(0)
	v_add_co_u32 v140, vcc_lo, v68, s12
	scratch_load_b32 v68, off, off offset:44 ; 4-byte Folded Reload
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v141, vcc_lo, s13, v68, vcc_lo
	v_add_co_u32 v68, vcc_lo, 0x2000, v140
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v69, vcc_lo, 0, v141, vcc_lo
	global_load_b64 v[142:143], v[68:69], off offset:1536
	s_waitcnt vmcnt(0)
	v_add_f64 v[68:69], v[66:67], -v[142:143]
	s_clause 0x1
	global_load_b64 v[66:67], v[140:141], off
	global_load_b128 v[138:141], v[138:139], off offset:3184
	s_waitcnt vmcnt(1)
	v_add_f64 v[156:157], v[142:143], -v[66:67]
	global_load_b128 v[142:145], v[70:71], off offset:2416
	v_add_f64 v[66:67], v[64:65], -v[66:67]
	s_waitcnt vmcnt(1)
	v_add_f64 v[64:65], v[136:137], -v[138:139]
	s_waitcnt vmcnt(0)
	v_add_f64 v[136:137], v[138:139], -v[142:143]
	v_add_f64 v[70:71], v[12:13], -v[142:143]
	v_mul_f64 v[142:143], v[58:59], v[0:1]
	s_clause 0x1
	scratch_load_b32 v0, off, off offset:36
	scratch_load_b32 v1, off, off offset:48
	v_mul_f64 v[12:13], v[136:137], s[8:9]
	global_load_b128 v[136:139], v[152:153], off offset:3184
	v_fma_f64 v[12:13], v[156:157], s[10:11], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[12:13], v[62:63], v[12:13]
	v_mul_f64 v[12:13], s[4:5], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_fma_f64 v[62:63], v[20:21], v[12:13], v[154:155]
	s_waitcnt vmcnt(2)
	v_add_co_u32 v0, vcc_lo, v0, s12
	s_waitcnt vmcnt(1)
	v_add_co_ci_u32_e32 v1, vcc_lo, s13, v1, vcc_lo
	v_add_co_u32 v12, vcc_lo, 0x2000, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v13, vcc_lo, 0, v1, vcc_lo
	s_clause 0x1
	global_load_b64 v[0:1], v[0:1], off
	global_load_b64 v[58:59], v[12:13], off offset:1536
	s_waitcnt vmcnt(0)
	v_add_f64 v[12:13], v[146:147], -v[58:59]
	v_add_f64 v[154:155], v[58:59], -v[0:1]
	v_add_f64 v[58:59], v[148:149], -v[0:1]
	global_load_b128 v[146:149], v[150:151], off offset:2416
	v_add_f64 v[16:17], v[16:17], -v[136:137]
	v_add_f64 v[150:151], v[14:15], -v[6:7]
	v_add_f64 v[14:15], v[14:15], -v[138:139]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[150:151], v[150:151], s[8:9]
	v_mul_f64 v[14:15], v[14:15], s[8:9]
	s_waitcnt vmcnt(0)
	v_add_f64 v[136:137], v[136:137], -v[146:147]
	v_add_f64 v[0:1], v[8:9], -v[146:147]
	v_add_f64 v[146:147], v[134:135], -v[10:11]
	v_add_f64 v[6:7], v[6:7], -v[148:149]
	v_add_f64 v[10:11], v[10:11], -v[144:145]
	v_mul_f64 v[8:9], v[136:137], s[8:9]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[146:147], v[146:147], s[8:9]
	v_fma_f64 v[8:9], v[154:155], s[10:11], v[8:9]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[8:9], v[142:143], v[8:9], v[62:63]
	s_clause 0x1
	scratch_load_b32 v62, off, off offset:56
	scratch_load_b32 v63, off, off offset:60
	s_waitcnt vmcnt(1)
	v_add_co_u32 v62, vcc_lo, v62, s12
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v63, vcc_lo, s13, v63, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v136, vcc_lo, 0x2000, v62
	v_add_co_ci_u32_e32 v137, vcc_lo, 0, v63, vcc_lo
	s_clause 0x1
	global_load_b64 v[136:137], v[136:137], off offset:1536
	global_load_b64 v[62:63], v[62:63], off
	s_clause 0x1
	scratch_load_b32 v56, off, off offset:52
	scratch_load_b32 v57, off, off offset:64
	s_waitcnt vmcnt(2)
	v_add_f64 v[142:143], v[136:137], -v[62:63]
	s_waitcnt vmcnt(1)
	v_add_co_u32 v56, vcc_lo, v56, s12
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v57, vcc_lo, s13, v57, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[142:143], v[142:143], s[10:11], v[146:147]
	v_mul_f64 v[60:61], v[60:61], v[142:143]
	v_add_co_u32 v142, vcc_lo, 0x2000, v56
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v143, vcc_lo, 0, v57, vcc_lo
	s_clause 0x1
	global_load_b64 v[142:143], v[142:143], off offset:1536
	global_load_b64 v[56:57], v[56:57], off
	scratch_load_b32 v53, off, off offset:80 ; 4-byte Folded Reload
	v_mul_f64 v[60:61], s[0:1], v[60:61]
	s_waitcnt vmcnt(1)
	v_add_f64 v[146:147], v[142:143], -v[56:57]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[146:147], v[146:147], s[10:11], v[150:151]
	v_mul_f64 v[4:5], v[4:5], v[146:147]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[4:5], v[20:21], v[60:61], v[4:5]
	s_clause 0x2
	scratch_load_b32 v60, off, off offset:72
	scratch_load_b32 v61, off, off offset:76
	scratch_load_b32 v52, off, off offset:68
	s_waitcnt vmcnt(2)
	v_add_co_u32 v60, vcc_lo, v60, s12
	s_waitcnt vmcnt(1)
	v_add_co_ci_u32_e32 v61, vcc_lo, s13, v61, vcc_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v146, vcc_lo, 0x2000, v60
	v_add_co_ci_u32_e32 v147, vcc_lo, 0, v61, vcc_lo
	global_load_b64 v[60:61], v[60:61], off
	s_waitcnt vmcnt(1)
	v_add_co_u32 v52, vcc_lo, v52, s12
	global_load_b64 v[146:147], v[146:147], off offset:1536
	v_add_co_ci_u32_e32 v53, vcc_lo, s13, v53, vcc_lo
	s_waitcnt vmcnt(0)
	v_add_f64 v[136:137], v[136:137], -v[146:147]
	v_add_f64 v[146:147], v[146:147], -v[60:61]
	v_add_f64 v[60:61], v[62:63], -v[60:61]
	v_add_f64 v[62:63], v[134:135], -v[140:141]
	v_add_f64 v[134:135], v[140:141], -v[144:145]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[134:135], v[134:135], s[8:9]
	v_fma_f64 v[134:135], v[146:147], s[10:11], v[134:135]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[54:55], v[54:55], v[134:135]
	v_mul_f64 v[54:55], s[4:5], v[54:55]
	s_delay_alu instid0(VALU_DEP_1)
	v_fma_f64 v[4:5], v[20:21], v[54:55], v[4:5]
	v_add_co_u32 v54, vcc_lo, 0x2000, v52
	v_add_co_ci_u32_e32 v55, vcc_lo, 0, v53, vcc_lo
	s_clause 0x1
	global_load_b64 v[52:53], v[52:53], off
	global_load_b64 v[54:55], v[54:55], off offset:1536
	s_waitcnt vmcnt(0)
	v_add_f64 v[134:135], v[142:143], -v[54:55]
	v_add_f64 v[54:55], v[54:55], -v[52:53]
	v_add_f64 v[52:53], v[56:57], -v[52:53]
	v_add_f64 v[56:57], v[138:139], -v[148:149]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[52:53], v[52:53], s[8:9]
	v_mul_f64 v[56:57], v[56:57], s[8:9]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[54:55], v[54:55], s[10:11], v[56:57]
	v_mul_f64 v[56:57], v[10:11], s[8:9]
	v_fma_f64 v[2:3], v[2:3], v[54:55], v[4:5]
	v_mul_f64 v[54:55], v[62:63], s[8:9]
	v_mul_f64 v[4:5], v[134:135], s[8:9]
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[2:3], v[2:3], s[8:9]
	v_fma_f64 v[4:5], v[12:13], s[10:11], v[4:5]
	s_delay_alu instid0(VALU_DEP_2)
	v_fma_f64 v[2:3], v[8:9], s[10:11], v[2:3]
	v_mul_f64 v[8:9], v[60:61], s[8:9]
	v_mul_f64 v[60:61], v[6:7], s[8:9]
	v_add_co_u32 v6, vcc_lo, 0x2000, v34
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v35, vcc_lo
	global_load_b64 v[62:63], v[6:7], off offset:1536
	v_add_co_u32 v6, vcc_lo, 0x2000, v40
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v41, vcc_lo
	v_add_co_u32 v10, vcc_lo, 0x2000, v36
	v_add_co_ci_u32_e32 v11, vcc_lo, 0, v37, vcc_lo
	global_load_b64 v[6:7], v[6:7], off offset:1536
	v_add_f64 v[50:51], v[50:51], v[2:3]
	v_mul_f64 v[2:3], v[136:137], s[8:9]
	v_fma_f64 v[0:1], v[0:1], s[10:11], v[60:61]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_fma_f64 v[2:3], v[68:69], s[10:11], v[2:3]
	global_load_b64 v[68:69], v[10:11], off offset:1536
	s_waitcnt vmcnt(1)
	v_mul_f64 v[6:7], v[62:63], v[6:7]
	s_waitcnt vmcnt(0)
	v_mul_f64 v[6:7], v[6:7], v[68:69]
	s_delay_alu instid0(VALU_DEP_1)
	v_mul_f64 v[2:3], v[2:3], v[6:7]
	v_add_co_u32 v6, vcc_lo, 0x2000, v42
	v_add_co_ci_u32_e32 v7, vcc_lo, 0, v43, vcc_lo
	global_load_b64 v[6:7], v[6:7], off offset:1536
	v_mul_f64 v[2:3], s[6:7], v[2:3]
	s_waitcnt vmcnt(0)
	v_mul_f64 v[6:7], v[62:63], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[6:7], v[68:69], v[6:7]
	v_mul_f64 v[4:5], v[4:5], v[6:7]
	global_load_b64 v[10:11], v[34:35], off
	global_load_b64 v[6:7], v[40:41], off
	global_load_b64 v[12:13], v[36:37], off
	v_fma_f64 v[2:3], v[20:21], v[2:3], v[4:5]
	v_fma_f64 v[4:5], v[66:67], s[10:11], v[8:9]
	s_waitcnt vmcnt(1)
	v_mul_f64 v[6:7], v[10:11], v[6:7]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[6:7], v[6:7], v[12:13]
	v_mul_f64 v[4:5], v[4:5], v[6:7]
	global_load_b64 v[6:7], v[42:43], off
	v_mul_f64 v[4:5], s[4:5], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_fma_f64 v[2:3], v[20:21], v[4:5], v[2:3]
	v_fma_f64 v[4:5], v[58:59], s[10:11], v[52:53]
	s_waitcnt vmcnt(0)
	v_mul_f64 v[6:7], v[10:11], v[6:7]
	v_mul_f64 v[10:11], v[10:11], v[12:13]
	v_mul_f64 v[6:7], v[12:13], v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[10:11], v[12:13], v[10:11]
	v_fma_f64 v[52:53], v[4:5], v[6:7], v[2:3]
	global_load_b64 v[6:7], v[38:39], off offset:3200
	global_load_b64 v[4:5], v[46:47], off offset:3200
	global_load_b64 v[8:9], v[44:45], off offset:3200
	v_fma_f64 v[2:3], v[64:65], s[10:11], v[54:55]
	s_waitcnt vmcnt(1)
	v_mul_f64 v[4:5], v[6:7], v[4:5]
	s_waitcnt vmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[4:5], v[4:5], v[8:9]
	v_mul_f64 v[2:3], v[2:3], v[4:5]
	v_fma_f64 v[4:5], v[16:17], s[10:11], v[14:15]
	global_load_b64 v[14:15], v[48:49], off offset:3200
	v_fma_f64 v[16:17], v[70:71], s[10:11], v[56:57]
	v_mul_f64 v[2:3], s[2:3], v[2:3]
	s_waitcnt vmcnt(0)
	v_mul_f64 v[14:15], v[6:7], v[14:15]
	v_mul_f64 v[6:7], v[6:7], v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[14:15], v[8:9], v[14:15]
	v_mul_f64 v[6:7], v[8:9], v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[4:5], v[4:5], v[14:15]
	v_fma_f64 v[14:15], v[20:21], v[2:3], v[4:5]
	global_load_b64 v[2:3], v[34:35], off offset:2432
	global_load_b64 v[4:5], v[40:41], off offset:2432
	s_waitcnt vmcnt(0)
	v_mul_f64 v[34:35], v[2:3], v[4:5]
	global_load_b64 v[4:5], v[36:37], off offset:2432
	s_waitcnt vmcnt(0)
	v_mul_f64 v[34:35], v[34:35], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[16:17], v[16:17], v[34:35]
	v_mul_f64 v[16:17], s[4:5], v[16:17]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_2)
	v_fma_f64 v[14:15], v[20:21], v[16:17], v[14:15]
	global_load_b64 v[16:17], v[42:43], off offset:2432
	s_waitcnt vmcnt(0)
	v_mul_f64 v[16:17], v[2:3], v[16:17]
	v_mul_f64 v[2:3], v[2:3], v[4:5]
	v_mul_f64 v[16:17], v[4:5], v[16:17]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[2:3], v[4:5], v[2:3]
	v_fma_f64 v[0:1], v[0:1], v[16:17], v[14:15]
	scratch_load_b32 v16, off, off offset:100 ; 4-byte Folded Reload
	v_mul_f64 v[14:15], v[62:63], v[68:69]
	v_mul_f64 v[0:1], v[0:1], s[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f64 v[14:15], v[68:69], v[14:15]
	v_fma_f64 v[0:1], v[52:53], s[10:11], v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[0:1], v[50:51], v[0:1]
	s_waitcnt vmcnt(0)
	v_add_co_u32 v36, vcc_lo, v16, s12
	scratch_load_b32 v16, off, off offset:104 ; 4-byte Folded Reload
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v37, vcc_lo, s13, v16, vcc_lo
	v_add_co_u32 v16, vcc_lo, 0x2000, v36
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v17, vcc_lo, 0, v37, vcc_lo
	global_load_b64 v[16:17], v[16:17], off offset:1536
	scratch_load_b32 v34, off, off offset:252 ; 4-byte Folded Reload
	global_load_b64 v[42:43], v[36:37], off
	s_waitcnt vmcnt(1)
	v_add_co_u32 v38, vcc_lo, v34, s12
	scratch_load_b32 v34, off, off offset:256 ; 4-byte Folded Reload
	s_waitcnt vmcnt(1)
	v_add_f64 v[44:45], v[16:17], -v[42:43]
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v39, vcc_lo, s13, v34, vcc_lo
	v_add_co_u32 v34, vcc_lo, 0x2000, v38
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v35, vcc_lo, 0, v39, vcc_lo
	global_load_b64 v[34:35], v[34:35], off offset:1536
	s_waitcnt vmcnt(0)
	v_add_f64 v[40:41], v[16:17], -v[34:35]
	global_load_b64 v[16:17], v[38:39], off
	s_waitcnt vmcnt(0)
	v_add_f64 v[46:47], v[34:35], -v[16:17]
	v_add_f64 v[42:43], v[42:43], -v[16:17]
	scratch_load_b32 v16, off, off offset:404 ; 4-byte Folded Reload
	s_waitcnt vmcnt(0)
	v_add_co_u32 v48, vcc_lo, v16, s12
	scratch_load_b32 v16, off, off offset:408 ; 4-byte Folded Reload
	s_waitcnt vmcnt(0)
	v_add_co_ci_u32_e32 v49, vcc_lo, s13, v16, vcc_lo
	v_add_co_u32 v16, vcc_lo, 0x2000, v48
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v17, vcc_lo, 0, v49, vcc_lo
	v_add_co_u32 v50, vcc_lo, v82, s12
	v_add_co_ci_u32_e32 v51, vcc_lo, s13, v83, vcc_lo
	global_load_b64 v[16:17], v[16:17], off offset:1536
	v_add_co_u32 v34, vcc_lo, 0x2000, v50
	v_add_co_ci_u32_e32 v35, vcc_lo, 0, v51, vcc_lo
	s_clause 0x1
	global_load_b64 v[54:55], v[48:49], off
	global_load_b64 v[56:57], v[50:51], off
	s_add_u32 s12, s12, 0x980
	global_load_b64 v[34:35], v[34:35], off offset:1536
	s_addc_u32 s13, s13, 0
	s_add_i32 s16, s16, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_lg_u32 s16, 0
	s_waitcnt vmcnt(0)
	v_add_f64 v[52:53], v[16:17], -v[34:35]
	v_add_f64 v[16:17], v[16:17], -v[54:55]
	v_add_f64 v[54:55], v[54:55], -v[56:57]
	v_add_f64 v[34:35], v[34:35], -v[56:57]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[52:53], v[52:53], s[8:9]
	v_mul_f64 v[12:13], v[54:55], s[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[40:41], v[40:41], s[10:11], v[52:53]
	v_fma_f64 v[12:13], v[42:43], s[10:11], v[12:13]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_mul_f64 v[10:11], v[10:11], v[12:13]
	v_add_co_u32 v12, vcc_lo, 0x1000, v36
	v_add_co_ci_u32_e32 v13, vcc_lo, 0, v37, vcc_lo
	v_fma_f64 v[10:11], v[14:15], v[40:41], v[10:11]
	v_add_co_u32 v40, vcc_lo, 0x1000, v38
	v_add_co_ci_u32_e32 v41, vcc_lo, 0, v39, vcc_lo
	s_clause 0x2
	global_load_b64 v[12:13], v[12:13], off offset:3200
	global_load_b64 v[14:15], v[36:37], off offset:2432
	global_load_b64 v[38:39], v[38:39], off offset:2432
	v_add_co_u32 v8, vcc_lo, 0x1000, v48
	global_load_b64 v[40:41], v[40:41], off offset:3200
	v_add_co_ci_u32_e32 v9, vcc_lo, 0, v49, vcc_lo
	global_load_b64 v[8:9], v[8:9], off offset:3200
	s_waitcnt vmcnt(3)
	v_add_f64 v[36:37], v[12:13], -v[14:15]
	s_waitcnt vmcnt(2)
	v_add_f64 v[14:15], v[14:15], -v[38:39]
	s_waitcnt vmcnt(1)
	v_add_f64 v[38:39], v[40:41], -v[38:39]
	v_add_f64 v[12:13], v[12:13], -v[40:41]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[36:37], v[36:37], s[8:9]
	v_mul_f64 v[38:39], v[38:39], s[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[36:37], v[44:45], s[10:11], v[36:37]
	v_fma_f64 v[38:39], v[46:47], s[10:11], v[38:39]
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_mul_f64 v[32:33], v[32:33], v[38:39]
	global_load_b64 v[38:39], v[50:51], off offset:2432
	v_fma_f64 v[30:31], v[30:31], v[36:37], v[32:33]
	global_load_b64 v[36:37], v[48:49], off offset:2432
	v_mul_f64 v[30:31], v[30:31], s[10:11]
	v_fma_f64 v[10:11], v[10:11], s[10:11], v[30:31]
	v_add_co_u32 v30, vcc_lo, 0x1000, v50
	v_add_co_ci_u32_e32 v31, vcc_lo, 0, v51, vcc_lo
	global_load_b64 v[30:31], v[30:31], off offset:3200
	s_waitcnt vmcnt(0)
	v_add_f64 v[32:33], v[8:9], -v[30:31]
	v_add_f64 v[8:9], v[8:9], -v[36:37]
	v_add_f64 v[36:37], v[36:37], -v[38:39]
	v_add_f64 v[30:31], v[30:31], -v[38:39]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f64 v[32:33], v[32:33], s[8:9]
	v_mul_f64 v[8:9], v[8:9], s[8:9]
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f64 v[4:5], v[36:37], s[8:9]
	v_fma_f64 v[12:13], v[12:13], s[10:11], v[32:33]
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_fma_f64 v[4:5], v[14:15], s[10:11], v[4:5]
	v_mul_f64 v[14:15], v[30:31], s[8:9]
	v_mul_f64 v[2:3], v[2:3], v[4:5]
	v_fma_f64 v[4:5], v[16:17], s[10:11], v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f64 v[2:3], v[6:7], v[12:13], v[2:3]
	v_fma_f64 v[6:7], v[34:35], s[10:11], v[14:15]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f64 v[2:3], v[2:3], s[8:9], v[10:11]
	v_mul_f64 v[6:7], v[28:29], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[4:5], v[26:27], v[4:5], v[6:7]
	v_fma_f64 v[2:3], v[4:5], s[8:9], v[2:3]
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f64 v[0:1], v[0:1], v[2:3]
	global_store_b64 v[24:25], v[0:1], off
	s_cbranch_scc1 .LBB0_2
.LBB0_3:                                ; %.loopexit
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 468
		.amdhsa_kernarg_size 376
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 1
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 1
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 2
		.amdhsa_next_free_vgpr 192
		.amdhsa_next_free_sgpr 36
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddi, .Lfunc_end0-_Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 11740
; NumSgprs: 38
; NumVgprs: 192
; ScratchSize: 468
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 4
; VGPRBlocks: 23
; NumSGPRsForWavesPerEU: 38
; NumVGPRsForWavesPerEU: 192
; Occupancy: 8
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 1
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .actual_access:  read_only
        .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .actual_access:  read_only
        .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .actual_access:  read_only
        .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .actual_access:  read_only
        .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .actual_access:  read_only
        .address_space:  global
        .offset:         40
        .size:           8
        .value_kind:     global_buffer
      - .actual_access:  read_only
        .address_space:  global
        .offset:         48
        .size:           8
        .value_kind:     global_buffer
      - .actual_access:  read_only
        .address_space:  global
        .offset:         56
        .size:           8
        .value_kind:     global_buffer
      - .actual_access:  read_only
        .address_space:  global
        .offset:         64
        .size:           8
        .value_kind:     global_buffer
      - .actual_access:  read_only
        .address_space:  global
        .offset:         72
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         80
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         88
        .size:           8
        .value_kind:     global_buffer
      - .offset:         96
        .size:           8
        .value_kind:     by_value
      - .offset:         104
        .size:           8
        .value_kind:     by_value
      - .offset:         112
        .size:           4
        .value_kind:     by_value
      - .offset:         120
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         124
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         128
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         132
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         134
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         136
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         138
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         140
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         142
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         160
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         168
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         176
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         184
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 376
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddi
    .private_segment_fixed_size: 468
    .sgpr_count:     38
    .sgpr_spill_count: 0
    .symbol:         _Z5curviPdS_S_S_S_S_S_S_S_S_S_S_ddi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     192
    .vgpr_spill_count: 116
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
