/**
 * Copyright 1993-2012 NVIDIA Corporation.  All rights reserved.
 *
 * Please refer to the NVIDIA end user license agreement (EULA) associated
 * with this source code for terms and conditions that govern your use of
 * this software. Any use, reproduction, disclosure, or distribution of
 * this software and related documentation outside the terms of the EULA
 * is strictly prohibited.
 */
#include <stdio.h>
#include <stdlib.h>

static const int WORK_SIZE = 256;

/**
 * This macro checks return value of the CUDA runtime call and exits
 * the application if the call failed.
 */
#define CUDA_CHECK_RETURN(value) {											\
	cudaError_t _m_cudaStat = value;										\
	if (_m_cudaStat != cudaSuccess) {										\
		fprintf(stderr, "Error %s at line %d in file %s\n",					\
				cudaGetErrorString(_m_cudaStat), __LINE__, __FILE__);		\
		exit(1);															\
	} }



/**
 * CUDA kernel function that reverses the order of bits in each element of the array.
 */



__global__ void vecSum_GPU3(const double* in, double* res, const unsigned long n)
{

	//dynamic shared memory size
	__shared__ double tmp[1024];

	unsigned long i = blockIdx.x*blockDim.x+threadIdx.x;

	if(i<n)
		tmp[threadIdx.x] = in[i];

	__syncthreads();

	//do reduction in shared memory

	for(unsigned int s=blockDim.x/2; s>0; s>>=1)
	{
		if(threadIdx.x < s)
		{
			tmp[threadIdx.x] += tmp[threadIdx.x + s];
		}
		__syncthreads();
	}


	if(threadIdx.x == 0) res[blockIdx.x] = tmp[0];
}


/**
 * Host function that prepares data array and passes it to the CUDA kernel.
 */
int main(int argc, char** argv) {

	if(argc<2)
	{
		printf("Not enough Arguments, please specify a size, Nigga!\n");
		return 1;
	}

	int nDevices;
	cudaGetDeviceCount(&nDevices);
	int THREADS_PER_BLOCK = 0;

	for (int i = 0; i < nDevices; i++)
	{
		    cudaDeviceProp prop;
		    cudaGetDeviceProperties(&prop, i);
		    printf("  Device Number: %d\n", i);
		    printf("  Device name: %s\n", prop.name);
		    printf("  Memory Clock Rate (KHz): %d\n",
		           prop.memoryClockRate);
		    printf("  Memory Bus Width (bits): %d\n",
		           prop.memoryBusWidth);
		    printf("  Peak Memory Bandwidth (GB/s): %f\n",
		           2.0*prop.memoryClockRate*(prop.memoryBusWidth/8)/1.0e6);
		    printf("  Max Threads Per Block: %d\n\n", prop.maxThreadsPerBlock);
		    THREADS_PER_BLOCK = prop.maxThreadsPerBlock;
	}

	long vec_size = atol(argv[1]);

	printf("Size of Vector: %d\n", vec_size);

	int blocks = ceil((float)vec_size/THREADS_PER_BLOCK);

	printf("Blocks: %d\n",blocks);

	long vec_size_full = THREADS_PER_BLOCK * blocks;					// Vector with Threads Per Block

	printf("Size of Block Filling Vector: %d\n", vec_size);

	double* vec = (double*)malloc(sizeof(double) * vec_size_full);
	double* res = (double*)malloc(sizeof(double) * vec_size_full);



	for(int i = 0; i < vec_size_full; i++)
	{
		if (i < vec_size)
			vec[i]=1.0f;
		else
			vec[i]=0.0f;

		res[i]=0;
	}


	printf("\n");

	double* d_vec;
	double* d_res;

	cudaMalloc((double **) &d_vec, vec_size_full * sizeof(double));
	cudaMalloc((double **) &d_res, vec_size_full * sizeof(double));

	cudaMemcpy(d_vec,vec,vec_size_full*sizeof(double), cudaMemcpyHostToDevice);


	vecSum_GPU3<<<blocks,THREADS_PER_BLOCK>>>(d_vec,d_res,vec_size);


	cudaMemcpy(res, d_res, vec_size_full*sizeof(double), cudaMemcpyDeviceToHost);


	for(int i = 0; i < blocks; i++)
	{
			printf("%f\n", res[i]);
	}

	CUDA_CHECK_RETURN(cudaDeviceReset());

	return 0;
}

	.file	"tmpxft_002e59b9_00000000-6_B04.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z35__device_stub__Z11vecSum_GPU3PKdPdmPKdPdm
	.type	_Z35__device_stub__Z11vecSum_GPU3PKdPdmPKdPdm, @function
_Z35__device_stub__Z11vecSum_GPU3PKdPdmPKdPdm:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z11vecSum_GPU3PKdPdm(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L2:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z35__device_stub__Z11vecSum_GPU3PKdPdmPKdPdm, .-_Z35__device_stub__Z11vecSum_GPU3PKdPdmPKdPdm
	.globl	_Z11vecSum_GPU3PKdPdm
	.type	_Z11vecSum_GPU3PKdPdm, @function
_Z11vecSum_GPU3PKdPdm:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z11vecSum_GPU3PKdPdmPKdPdm
	.cfi_endproc
.LFE2053:
	.size	_Z11vecSum_GPU3PKdPdm, .-_Z11vecSum_GPU3PKdPdm
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"Not enough Arguments, please specify a size, Nigga!\n"
.LC3:
	.string	"  Device Number: %d\n"
.LC4:
	.string	"  Device name: %s\n"
.LC5:
	.string	"  Memory Clock Rate (KHz): %d\n"
.LC6:
	.string	"  Memory Bus Width (bits): %d\n"
.LC8:
	.string	"  Peak Memory Bandwidth (GB/s): %f\n"
.LC9:
	.string	"  Max Threads Per Block: %d\n\n"
.LC10:
	.string	"Size of Vector: %d\n"
.LC11:
	.string	"Blocks: %d\n"
.LC12:
	.string	"Size of Block Filling Vector: %d\n"
.LC13:
	.string	"\n"
.LC14:
	.string	"%f\n"
.LC15:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/birkhoff/cuda/master/B04/src/B04.cu"
.LC16:
	.string	"Error %s at line %d in file %s\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$1112, %rsp
	.cfi_def_cfa_offset 1168
	movq	%fs:40, %rax
	movq	%rax, 1096(%rsp)
	xorl	%eax, %eax
	decl	%edi
	jg	.L9
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	$1, %eax
	jmp	.L8
.L9:
	leaq	20(%rsp), %rdi
	movq	%rsi, %rbp
	xorl	%ebx, %ebx
	xorl	%r13d, %r13d
	call	cudaGetDeviceCount@PLT
	leaq	.LC3(%rip), %r12
.L11:
	cmpl	%ebx, 20(%rsp)
	jle	.L24
	leaq	64(%rsp), %r13
	movl	%ebx, %esi
	movq	%r13, %rdi
	call	cudaGetDeviceProperties_v2@PLT
	movl	%ebx, %edx
	movq	%r12, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incl	%ebx
	call	__printf_chk@PLT
	movq	%r13, %rdx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC4(%rip), %rsi
	call	__printf_chk@PLT
	movl	672(%rsp), %edx
	leaq	.LC5(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	676(%rsp), %edx
	leaq	.LC6(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	$8, %ecx
	movl	$2, %edi
	movl	676(%rsp), %eax
	cvtsi2sdl	672(%rsp), %xmm0
	leaq	.LC8(%rip), %rsi
	cltd
	idivl	%ecx
	addsd	%xmm0, %xmm0
	cvtsi2sdl	%eax, %xmm1
	movb	$1, %al
	mulsd	%xmm1, %xmm0
	divsd	.LC7(%rip), %xmm0
	call	__printf_chk@PLT
	xorl	%eax, %eax
	movl	384(%rsp), %edx
	leaq	.LC9(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	384(%rsp), %r13d
	jmp	.L11
.L24:
	movq	8(%rbp), %rdi
	movl	%r13d, %r15d
	call	atol@PLT
	leaq	.LC10(%rip), %rsi
	movl	$2, %edi
	movq	%rax, %rdx
	movq	%rax, %rbx
	xorl	%eax, %eax
	call	__printf_chk@PLT
	cvtsi2ssl	%r13d, %xmm1
	cvtsi2ssq	%rbx, %xmm0
	divss	%xmm1, %xmm0
	call	ceilf@PLT
	leaq	.LC11(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	cvttss2sil	%xmm0, %r12d
	imull	%r12d, %r15d
	movl	%r12d, %edx
	call	__printf_chk@PLT
	movq	%rbx, %rdx
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC12(%rip), %rsi
	call	__printf_chk@PLT
	movslq	%r15d, %rax
	salq	$3, %rax
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
	call	malloc@PLT
	movq	8(%rsp), %rdi
	movq	%rax, %r14
	call	malloc@PLT
	movq	%rax, %rbp
	xorl	%eax, %eax
.L13:
	cmpl	%eax, %r15d
	jle	.L25
	movsd	.LC0(%rip), %xmm0
	cmpq	%rbx, %rax
	jl	.L14
	xorps	%xmm0, %xmm0
.L14:
	movq	$0x000000000, 0(%rbp,%rax,8)
	movsd	%xmm0, (%r14,%rax,8)
	incq	%rax
	jmp	.L13
.L25:
	leaq	.LC13(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	8(%rsp), %rsi
	leaq	24(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rsi
	leaq	32(%rsp), %rdi
	call	cudaMalloc@PLT
	movq	8(%rsp), %rdx
	movq	24(%rsp), %rdi
	movq	%r14, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	%r13d, 52(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	movl	%r12d, 40(%rsp)
	movq	%rax, 56(%rsp)
	movl	60(%rsp), %ecx
	movq	%rax, 44(%rsp)
	movq	52(%rsp), %rdx
	movq	40(%rsp), %rdi
	movl	48(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	movq	32(%rsp), %rsi
	movq	24(%rsp), %rdi
	movq	%rbx, %rdx
	call	_Z35__device_stub__Z11vecSum_GPU3PKdPdmPKdPdm
.L16:
	movq	8(%rsp), %rdx
	movq	32(%rsp), %rsi
	movq	%rbp, %rdi
	xorl	%ebx, %ebx
	movl	$2, %ecx
	leaq	.LC14(%rip), %r13
	call	cudaMemcpy@PLT
.L17:
	cmpl	%ebx, %r12d
	jle	.L26
	movsd	0(%rbp,%rbx,8), %xmm0
	movq	%r13, %rsi
	movl	$2, %edi
	movb	$1, %al
	incq	%rbx
	call	__printf_chk@PLT
	jmp	.L17
.L26:
	call	cudaDeviceReset@PLT
	movl	%eax, %edi
	xorl	%eax, %eax
	testl	%edi, %edi
	je	.L8
	call	cudaGetErrorString@PLT
	movl	$145, %r8d
	movq	stderr(%rip), %rdi
	leaq	.LC15(%rip), %r9
	movq	%rax, %rcx
	leaq	.LC16(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L8:
	movq	1096(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L19
	call	__stack_chk_fail@PLT
.L19:
	addq	$1112, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC17:
	.string	"_Z11vecSum_GPU3PKdPdm"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC17(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z11vecSum_GPU3PKdPdm(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC0:
	.long	0
	.long	1072693248
	.align 8
.LC7:
	.long	0
	.long	1093567616
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/**
 * Copyright 1993-2012 NVIDIA Corporation.  All rights reserved.
 *
 * Please refer to the NVIDIA end user license agreement (EULA) associated
 * with this source code for terms and conditions that govern your use of
 * this software. Any use, reproduction, disclosure, or distribution of
 * this software and related documentation outside the terms of the EULA
 * is strictly prohibited.
 */

#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>

static const int WORK_SIZE = 256;

/**
 * This macro checks return value of the CUDA runtime call and exits
 * the application if the call failed.
 */
#define CUDA_CHECK_RETURN(value) {											\
	hipError_t _m_cudaStat = value;										\
	if (_m_cudaStat != hipSuccess) {										\
		fprintf(stderr, "Error %s at line %d in file %s\n",					\
				hipGetErrorString(_m_cudaStat), __LINE__, __FILE__);		\
		exit(1);															\
	} }



/**
 * CUDA kernel function that reverses the order of bits in each element of the array.
 */



__global__ void vecSum_GPU3(const double* in, double* res, const unsigned long n)
{

	//dynamic shared memory size
	__shared__ double tmp[1024];

	unsigned long i = blockIdx.x*blockDim.x+threadIdx.x;

	if(i<n)
		tmp[threadIdx.x] = in[i];

	__syncthreads();

	//do reduction in shared memory

	for(unsigned int s=blockDim.x/2; s>0; s>>=1)
	{
		if(threadIdx.x < s)
		{
			tmp[threadIdx.x] += tmp[threadIdx.x + s];
		}
		__syncthreads();
	}


	if(threadIdx.x == 0) res[blockIdx.x] = tmp[0];
}


/**
 * Host function that prepares data array and passes it to the CUDA kernel.
 */
int main(int argc, char** argv) {

	if(argc<2)
	{
		printf("Not enough Arguments, please specify a size, Nigga!\n");
		return 1;
	}

	int nDevices;
	hipGetDeviceCount(&nDevices);
	int THREADS_PER_BLOCK = 0;

	for (int i = 0; i < nDevices; i++)
	{
		    hipDeviceProp_t prop;
		    hipGetDeviceProperties(&prop, i);
		    printf("  Device Number: %d\n", i);
		    printf("  Device name: %s\n", prop.name);
		    printf("  Memory Clock Rate (KHz): %d\n",
		           prop.memoryClockRate);
		    printf("  Memory Bus Width (bits): %d\n",
		           prop.memoryBusWidth);
		    printf("  Peak Memory Bandwidth (GB/s): %f\n",
		           2.0*prop.memoryClockRate*(prop.memoryBusWidth/8)/1.0e6);
		    printf("  Max Threads Per Block: %d\n\n", prop.maxThreadsPerBlock);
		    THREADS_PER_BLOCK = prop.maxThreadsPerBlock;
	}

	long vec_size = atol(argv[1]);

	printf("Size of Vector: %d\n", vec_size);

	int blocks = ceil((float)vec_size/THREADS_PER_BLOCK);

	printf("Blocks: %d\n",blocks);

	long vec_size_full = THREADS_PER_BLOCK * blocks;					// Vector with Threads Per Block

	printf("Size of Block Filling Vector: %d\n", vec_size);

	double* vec = (double*)malloc(sizeof(double) * vec_size_full);
	double* res = (double*)malloc(sizeof(double) * vec_size_full);



	for(int i = 0; i < vec_size_full; i++)
	{
		if (i < vec_size)
			vec[i]=1.0f;
		else
			vec[i]=0.0f;

		res[i]=0;
	}


	printf("\n");

	double* d_vec;
	double* d_res;

	hipMalloc((double **) &d_vec, vec_size_full * sizeof(double));
	hipMalloc((double **) &d_res, vec_size_full * sizeof(double));

	hipMemcpy(d_vec,vec,vec_size_full*sizeof(double), hipMemcpyHostToDevice);


	vecSum_GPU3<<<blocks,THREADS_PER_BLOCK>>>(d_vec,d_res,vec_size);


	hipMemcpy(res, d_res, vec_size_full*sizeof(double), hipMemcpyDeviceToHost);


	for(int i = 0; i < blocks; i++)
	{
			printf("%f\n", res[i]);
	}

	CUDA_CHECK_RETURN(hipDeviceReset());

	return 0;
}

	.text
	.file	"B04.hip"
	.globl	_Z26__device_stub__vecSum_GPU3PKdPdm # -- Begin function _Z26__device_stub__vecSum_GPU3PKdPdm
	.type	_Z26__device_stub__vecSum_GPU3PKdPdm,@function
_Z26__device_stub__vecSum_GPU3PKdPdm:   # @_Z26__device_stub__vecSum_GPU3PKdPdm
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z11vecSum_GPU3PKdPdm, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z26__device_stub__vecSum_GPU3PKdPdm, .Lfunc_end0-_Z26__device_stub__vecSum_GPU3PKdPdm
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI1_0:
	.quad	0x412e848000000000              # double 1.0E+6
.LCPI1_1:
	.quad	0x3ff0000000000000              # double 1
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$1496, %rsp                     # imm = 0x5D8
	.cfi_def_cfa_offset 1552
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	cmpl	$1, %edi
	jg	.LBB1_2
# %bb.1:
	movl	$.Lstr, %edi
	callq	puts@PLT
	movl	$1, %eax
	jmp	.LBB1_16
.LBB1_2:
	movq	%rsi, %rbx
	leaq	12(%rsp), %r14
	movq	%r14, %rdi
	callq	hipGetDeviceCount
	cmpl	$0, (%r14)
	jle	.LBB1_3
# %bb.17:                               # %.lr.ph
	leaq	24(%rsp), %r14
	xorl	%ebp, %ebp
.LBB1_18:                               # =>This Inner Loop Header: Depth=1
	movq	%r14, %rdi
	movl	%ebp, %esi
	callq	hipGetDevicePropertiesR0600
	movl	$.L.str.1, %edi
	movl	%ebp, %esi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.2, %edi
	movq	%r14, %rsi
	xorl	%eax, %eax
	callq	printf
	movl	632(%rsp), %esi
	movl	$.L.str.3, %edi
	xorl	%eax, %eax
	callq	printf
	movl	636(%rsp), %esi
	movl	$.L.str.4, %edi
	xorl	%eax, %eax
	callq	printf
	xorps	%xmm1, %xmm1
	cvtsi2sdl	632(%rsp), %xmm1
	addsd	%xmm1, %xmm1
	movl	636(%rsp), %eax
	leal	7(%rax), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	sarl	$3, %ecx
	xorps	%xmm0, %xmm0
	cvtsi2sd	%ecx, %xmm0
	mulsd	%xmm1, %xmm0
	divsd	.LCPI1_0(%rip), %xmm0
	movl	$.L.str.5, %edi
	movb	$1, %al
	callq	printf
	movl	344(%rsp), %esi
	movl	$.L.str.6, %edi
	xorl	%eax, %eax
	callq	printf
	incl	%ebp
	cmpl	12(%rsp), %ebp
	jl	.LBB1_18
# %bb.19:
	movl	344(%rsp), %r13d
	jmp	.LBB1_4
.LBB1_3:
	xorl	%r13d, %r13d
.LBB1_4:                                # %._crit_edge
	movq	8(%rbx), %rdi
	callq	atol
	movq	%rax, %rbx
	movl	$.L.str.7, %edi
	movq	%rax, %rsi
	xorl	%eax, %eax
	callq	printf
	xorps	%xmm0, %xmm0
	cvtsi2ss	%rbx, %xmm0
	xorps	%xmm1, %xmm1
	cvtsi2ss	%r13d, %xmm1
	divss	%xmm1, %xmm0
	callq	ceilf@PLT
	cvttss2si	%xmm0, %ebp
	movl	$.L.str.8, %edi
	movl	%ebp, %esi
	xorl	%eax, %eax
	callq	printf
	movl	%r13d, 4(%rsp)                  # 4-byte Spill
	movl	%ebp, 8(%rsp)                   # 4-byte Spill
	imull	%ebp, %r13d
	movslq	%r13d, %rbp
	movl	$.L.str.9, %edi
	movq	%rbx, %rsi
	xorl	%eax, %eax
	callq	printf
	leaq	(,%rbp,8), %r15
	movq	%r15, %rdi
	callq	malloc
	movq	%rax, %r12
	movq	%r15, %rdi
	callq	malloc
	movq	%rax, %r14
	testl	%ebp, %ebp
	jle	.LBB1_9
# %bb.5:                                # %.lr.ph57.preheader
	movl	%r13d, %eax
	xorl	%ecx, %ecx
	movsd	.LCPI1_1(%rip), %xmm0           # xmm0 = mem[0],zero
.LBB1_6:                                # %.lr.ph57
                                        # =>This Inner Loop Header: Depth=1
	movaps	%xmm0, %xmm1
	cmpq	%rcx, %rbx
	jg	.LBB1_8
# %bb.7:                                # %.lr.ph57
                                        #   in Loop: Header=BB1_6 Depth=1
	xorps	%xmm1, %xmm1
.LBB1_8:                                # %.lr.ph57
                                        #   in Loop: Header=BB1_6 Depth=1
	movsd	%xmm1, (%r12,%rcx,8)
	movq	$0, (%r14,%rcx,8)
	incq	%rcx
	cmpq	%rcx, %rax
	jne	.LBB1_6
.LBB1_9:                                # %._crit_edge58
	movl	$10, %edi
	callq	putchar@PLT
	leaq	24(%rsp), %r13
	movq	%r13, %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movq	%r15, %rsi
	callq	hipMalloc
	movq	(%r13), %rdi
	movq	%r12, %rsi
	movq	%r15, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	8(%rsp), %ebp                   # 4-byte Reload
	movl	%ebp, %r12d
	movq	%r12, %rdi
	btsq	$32, %rdi
	movl	4(%rsp), %edx                   # 4-byte Reload
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_11
# %bb.10:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	%rbx, %rdx
	callq	_Z26__device_stub__vecSum_GPU3PKdPdm
.LBB1_11:
	movq	16(%rsp), %rsi
	movq	%r14, %rdi
	movq	%r15, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%ebp, %ebp
	jle	.LBB1_14
# %bb.12:                               # %.lr.ph61.preheader
	xorl	%ebx, %ebx
.LBB1_13:                               # %.lr.ph61
                                        # =>This Inner Loop Header: Depth=1
	movsd	(%r14,%rbx,8), %xmm0            # xmm0 = mem[0],zero
	movl	$.L.str.11, %edi
	movb	$1, %al
	callq	printf
	incq	%rbx
	cmpq	%rbx, %r12
	jne	.LBB1_13
.LBB1_14:                               # %._crit_edge62
	callq	hipDeviceReset
	testl	%eax, %eax
	jne	.LBB1_20
# %bb.15:
	xorl	%eax, %eax
.LBB1_16:
	addq	$1496, %rsp                     # imm = 0x5D8
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB1_20:
	.cfi_def_cfa_offset 1552
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.12, %esi
	movl	$.L.str.13, %r8d
	movq	%rbx, %rdi
	movq	%rax, %rdx
	movl	$147, %ecx
	xorl	%eax, %eax
	callq	fprintf
	movl	$1, %edi
	callq	exit
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z11vecSum_GPU3PKdPdm, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z11vecSum_GPU3PKdPdm,@object   # @_Z11vecSum_GPU3PKdPdm
	.section	.rodata,"a",@progbits
	.globl	_Z11vecSum_GPU3PKdPdm
	.p2align	3, 0x0
_Z11vecSum_GPU3PKdPdm:
	.quad	_Z26__device_stub__vecSum_GPU3PKdPdm
	.size	_Z11vecSum_GPU3PKdPdm, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"  Device Number: %d\n"
	.size	.L.str.1, 21

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"  Device name: %s\n"
	.size	.L.str.2, 19

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"  Memory Clock Rate (KHz): %d\n"
	.size	.L.str.3, 31

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"  Memory Bus Width (bits): %d\n"
	.size	.L.str.4, 31

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"  Peak Memory Bandwidth (GB/s): %f\n"
	.size	.L.str.5, 36

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"  Max Threads Per Block: %d\n\n"
	.size	.L.str.6, 30

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"Size of Vector: %d\n"
	.size	.L.str.7, 20

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"Blocks: %d\n"
	.size	.L.str.8, 12

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"Size of Block Filling Vector: %d\n"
	.size	.L.str.9, 34

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"%f\n"
	.size	.L.str.11, 4

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"Error %s at line %d in file %s\n"
	.size	.L.str.12, 32

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/birkhoff/cuda/master/B04/src/B04.hip"
	.size	.L.str.13, 99

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z11vecSum_GPU3PKdPdm"
	.size	.L__unnamed_1, 22

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Not enough Arguments, please specify a size, Nigga!"
	.size	.Lstr, 52

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z26__device_stub__vecSum_GPU3PKdPdm
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z11vecSum_GPU3PKdPdm
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z11vecSum_GPU3PKdPdm   ; -- Begin function _Z11vecSum_GPU3PKdPdm
	.globl	_Z11vecSum_GPU3PKdPdm
	.p2align	8
	.type	_Z11vecSum_GPU3PKdPdm,@function
_Z11vecSum_GPU3PKdPdm:                  ; @_Z11vecSum_GPU3PKdPdm
; %bb.0:
	s_clause 0x2
	s_load_b32 s5, s[0:1], 0x24
	s_load_b64 s[6:7], s[0:1], 0x10
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mov_b32 s4, s15
	v_lshlrev_b32_e32 v3, 3, v0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s5, s5, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s4, s5, v[0:1]
	v_mov_b32_e32 v2, 0
	v_cmp_gt_u64_e32 vcc_lo, s[6:7], v[1:2]
	s_and_saveexec_b32 s6, vcc_lo
	s_cbranch_execz .LBB0_2
; %bb.1:
	v_lshlrev_b64 v[1:2], 3, v[1:2]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v1, vcc_lo, s0, v1
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	global_load_b64 v[1:2], v[1:2], off
	s_waitcnt vmcnt(0)
	ds_store_b64 v3, v[1:2]
.LBB0_2:
	s_or_b32 exec_lo, exec_lo, s6
	s_cmp_lt_u32 s5, 2
	s_waitcnt lgkmcnt(0)
	s_barrier
.LBB0_3:                                ; =>This Inner Loop Header: Depth=1
	buffer_gl0_inv
	s_cbranch_scc1 .LBB0_7
; %bb.4:                                ;   in Loop: Header=BB0_3 Depth=1
	s_lshr_b32 s0, s5, 1
	s_mov_b32 s1, exec_lo
	v_cmpx_gt_u32_e64 s0, v0
	s_cbranch_execz .LBB0_6
; %bb.5:                                ;   in Loop: Header=BB0_3 Depth=1
	v_lshl_add_u32 v1, s0, 3, v3
	ds_load_b64 v[1:2], v1
	ds_load_b64 v[4:5], v3
	s_waitcnt lgkmcnt(0)
	v_add_f64 v[1:2], v[1:2], v[4:5]
	ds_store_b64 v3, v[1:2]
.LBB0_6:                                ;   in Loop: Header=BB0_3 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_waitcnt lgkmcnt(0)
	s_barrier
	s_cmp_lt_u32 s5, 4
	s_mov_b32 s5, s0
	s_branch .LBB0_3
.LBB0_7:                                ; %._crit_edge
	s_mov_b32 s5, 0
	s_mov_b32 s0, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB0_9
; %bb.8:
	v_mov_b32_e32 v2, 0
	s_lshl_b64 s[0:1], s[4:5], 3
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s2, s0
	s_addc_u32 s1, s3, s1
	ds_load_b64 v[0:1], v2
	s_waitcnt lgkmcnt(0)
	global_store_b64 v2, v[0:1], s[0:1]
.LBB0_9:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z11vecSum_GPU3PKdPdm
		.amdhsa_group_segment_fixed_size 8192
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z11vecSum_GPU3PKdPdm, .Lfunc_end0-_Z11vecSum_GPU3PKdPdm
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 304
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 8192 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           8
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 8192
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z11vecSum_GPU3PKdPdm
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z11vecSum_GPU3PKdPdm.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
