/*
 *  file name: convolution2D.cu
 *
 *  CPE810A: Homework 3: Convolution
 *  
 *  Yupeng Cao, 10454637
 *  
 */

#include <stdio.h>
#include <stdlib.h>
#include <assert.h>
#include <time.h>
#include <ctime>

// Define constant memory for kernel storage on Device
#define KERNEL_RADIUS 128
#define KERNEL_W (2 * KERNEL_RADIUS + 1)
__constant__ float d_Kernel[KERNEL_W];

// Define Tile Size
#define TILE_W 16		// active cell width
#define TILE_H 16		// active cell height
#define TILE_SIZE (TILE_W + KERNEL_RADIUS * 2) * (TILE_W + KERNEL_RADIUS * 2)

#define UNROLL_INNER

clock_t start, row, col;
/*
*********************************************************************
    Define Error Checking methods

    cudaSafeCall:   Check data allocate
    cudaCheckError: Check kernel function execution
*********************************************************************
*/
#define CUDA_ERROR_CHECK
#define CudaSafeCall( err ) __cudaSafeCall( err, __FILE__, __LINE__ )
#define CudaCheckError()    __cudaCheckError( __FILE__, __LINE__ )
inline void __cudaSafeCall( cudaError err, const char *file, const int line )
{
#ifdef CUDA_ERROR_CHECK
    if ( cudaSuccess != err )
    {
        fprintf( stderr, "cudaSafeCall() failed at %s:%i : %s\n",
                 file, line, cudaGetErrorString( err ) );
        exit( -1 );
    }
#endif

    return;
}

inline void __cudaCheckError( const char *file, const int line )
{
#ifdef CUDA_ERROR_CHECK
    cudaError err = cudaGetLastError();
    if ( cudaSuccess != err )
    {
        fprintf( stderr, "cudaCheckError() failed at %s:%i : %s\n",
                 file, line, cudaGetErrorString( err ) );
        exit( -1 );
    }

    err = cudaDeviceSynchronize();
    if( cudaSuccess != err )
    {
        fprintf( stderr, "cudaCheckError() with sync failed at %s:%i : %s\n",
                 file, line, cudaGetErrorString( err ) );
        exit( -1 );
    }
#endif

    return;
}

/*
*********************************************************************
function name: convolutionRowGPU

parameters:
            d_OutputRow: Space for saving results 
            d_Input: Input image
            dimX: Width
            dimY: Height
            dimK: Kernel Size

*********************************************************************
*/
__global__ void convolutionRowGPU(float* d_OutputRow, float* d_Input, int dimX, int dimY, int dimK)
{
    // Data cache: threadIdx.x , threadIdx.y
    __shared__ float data[ TILE_H * (TILE_W + KERNEL_RADIUS * 2) ];
	
	// global mem address of this thread
	const int gLoc = threadIdx.x + 
					 blockIdx.x * blockDim.x +
    				 threadIdx.y * dimX +
    				 blockIdx.y * blockDim.y * dimX;
    				     

	int x;		// image based coordinate

	// original image based coordinate
	const int x0 = threadIdx.x + blockIdx.x * blockDim.x;
	const int shift = threadIdx.y * (TILE_W + dimK * 2);

    // left
    x = x0 - dimK;
	if ( x < 0 )
		data[threadIdx.x + shift] = 0;
	else	
        data[threadIdx.x + shift] = d_Input[ gLoc - dimK];
        
	// right
	x = x0 + dimK;
	if ( x > dimX-1 )
		data[threadIdx.x + blockDim.x + shift] = 0;
	else	
		data[threadIdx.x + blockDim.x + shift] = d_Input[gLoc + dimK];
    
    __syncthreads();

	// convolution
	float sum = 0;
	x = dimK + threadIdx.x;
	for (int i = -dimK; i <= dimK; i++)
		sum += data[x + i + shift] * d_Kernel[dimK + i];

    d_OutputRow[gLoc] = sum;

    __syncthreads();

}

/*
*********************************************************************
function name: convolutionCOlGPU

parameters:
            d_OutputCol: Space for saving results 
            d_Input: Input image
            dimX: Width
            dimY: Height
            dimK: Kernel Size

*********************************************************************
*/
__global__ void convolutionColGPU(float* d_OutputCol, float* d_Input, int dimX, int dimY, int dimK)
{
    // Data cache: threadIdx.x , threadIdx.y
    __shared__ float data[TILE_W * (TILE_H + KERNEL_RADIUS * 2)];
	
	// global mem address of this thread
	const int gLoc = threadIdx.x + 
					 blockIdx.x * blockDim.x +
    				 threadIdx.y * dimX +
    				 blockIdx.y * blockDim.y * dimX;
    				     
	int y;		// image based coordinate

	// original image based coordinate
	const int y0 = threadIdx.y + blockIdx.y * blockDim.y;
	const int shift = threadIdx.y * (TILE_W);
    
    // upper
    y = y0 - dimK;
	if ( y < 0 )
		data[threadIdx.x + shift] = 0;
	else	
        data[threadIdx.x + shift] = d_Input[ gLoc - (dimX * dimK)];
        
	// lower
	y = y0 + dimK;
	const int shift1 = shift + (blockDim.y * TILE_W);
	if ( y > dimY-1 )
		data[threadIdx.x + shift1] = 0;
	else	
		data[threadIdx.x + shift1] = d_Input[gLoc + (dimX * dimK)];
    
    __syncthreads();

	// convolution
	float sum = 0;
	for (int i = 0; i <= dimK*2; i++)
		sum += data[threadIdx.x + (threadIdx.y + i) * TILE_W] * d_Kernel[i];

    d_OutputCol[gLoc] = sum;

    __syncthreads();
}

/*
*********************************************************************
function name: convolutionRowCPU

Do Row Convolution by using CPU
*********************************************************************
*/
void convolutionRowCPU(float* output, float* kernel, float* input, int xSize, int ySize, int kernel_size)
{

	float* temp = new float[kernel_size];
	int outCol = ySize - 2;

	for (int i = floor(kernel_size / 2); i < xSize - (kernel_size / 2); i++)
	{
		for (int j = floor(kernel_size / 2); j < ySize - floor(kernel_size / 2); j++)
		{
			for (int c = 0; c < 3; c++)
			{
				*(temp + c) = *(kernel + c) * *(input + i * ySize + (j + (c - kernel_size + 2)));
			}
			*(output + (i - 1) * outCol + (j - 1)) = *(temp + 0) + *(temp + 1) + *(temp + 2);
		}
	}

}

/*
*********************************************************************
function name: convolutionColCPU

Do Col Convolution by using CPU
*********************************************************************
*/
void convolutionColCPU(float* output, float* kernel, float* input, int xSize, int ySize, int kernel_size)
{

	float* temp = new float[kernel_size];
	int outCol = ySize - 2;

	for (int i = floor(kernel_size / 2); i < xSize - (kernel_size / 2); i++)
	{
		for (int j = floor(kernel_size / 2); j < ySize - floor(kernel_size / 2); j++)
		{
			for (int c = 0; c < 3; c++)
			{
				*(temp + c) = *(kernel + c) * *(input + (i + (c - kernel_size + 2)) * ySize + j);
			}
			*(output + (i - 1) * outCol + (j - 1)) = *(temp + 0) + *(temp + 1) + *(temp + 2);
		}
	}

}


int check_input(int dimX, int dimY, int dimK){

    if (dimX > 0 && dimY > 0 && dimK > 0){
        return 1;
    }else{
        printf("Input for dimX, dimY, dimK must larger than 0");
        return -1;
    }
}

/*
*********************************************************************
Main Function
*********************************************************************
*/
int main(int argc, char *argv[])
{   

    // Check input parameter
    if (argc == 4){
        printf("Input Data\n");
    }else{
        printf("Error input Parameter \n");
        printf("Please Follow Format to Run Program: ./execute_file <dimX> <dimY> <dimK>\n");
        printf("Please input <dimX>, <dimY>, <dimK> \n");
        printf("dimX and dimY are width and heights for input image and dimK is size for mask \n");
        return 0;
    }
    
    int dimX = atoi(argv[1]);
    int dimY = atoi(argv[2]);
    int dimK = atoi(argv[3]);

    if (dimK > KERNEL_RADIUS){
        printf("Your Mask Size is too large. \n");  
        printf("We recommend you change a reasonable number. \n");  

    }

    if (check_input(dimX, dimY, dimK) == 1){
        printf("Input is Valid \n\n");   
    }else{
        return -1;
    }
    
    srand((unsigned)time(NULL));

    // Initialize image size and kernel size
    unsigned int img_size = dimX * dimY;
    const int kernel_length = dimK;
    // Allocate space for input on host
    float* h_Kernel = (float *)malloc(kernel_length * sizeof(float));
    float* h_Input  = (float *)malloc(dimX * dimY * sizeof(float));
    // Initialize Mask and Image. 
    for (unsigned int i = 0; i < kernel_length; ++i)
    {
        h_Kernel[i] = (float)(rand() % 16);
    }

    for (unsigned i = 0; i < img_size; ++i)
    {
        h_Input[i] = (float)(rand() % 16);
    }

    // Allocate space for saving results on host
    float  *h_OutputRowCPU, *h_OutputColCPU, *h_OutputRowGPU, *h_OutputColGPU;
    h_OutputRowCPU = (float *)malloc(img_size * sizeof(float));
    h_OutputColCPU = (float *)malloc(img_size * sizeof(float));
    h_OutputRowGPU = (float *)malloc(img_size * sizeof(float));
    h_OutputColGPU = (float *)malloc(img_size * sizeof(float));

    // Allocate space for data on device
    float *d_Input, *d_OutputRow, *d_OutputCol;
    CudaSafeCall(cudaMalloc((void **)&d_Input,   img_size * sizeof(float)));
    CudaSafeCall(cudaMalloc((void **)&d_OutputRow,  img_size * sizeof(float)));
    CudaSafeCall(cudaMalloc((void **)&d_OutputCol,  img_size * sizeof(float)));

    // Move data from host to device
    CudaSafeCall(cudaMemcpy(d_Input, h_Input, img_size * sizeof(float), cudaMemcpyHostToDevice));
    CudaSafeCall(cudaMemcpyToSymbol(d_Kernel, h_Kernel, kernel_length));

    // Initialize grid and block
    dim3 blocks(TILE_W, TILE_H);
    dim3 grids(dimX/TILE_W, dimY/TILE_H);

    start = clock();
    convolutionRowGPU<<<grids, blocks>>>(d_OutputRow, d_Input, dimX, dimY, dimK);
    CudaCheckError();
    cudaDeviceSynchronize();
    row = clock();
    double running_time = (double)(row - start) / CLOCKS_PER_SEC;
    printf("Row Convolution by using GPU: %f ms.\n", running_time);

    //start = clock();
    convolutionColGPU<<<grids, blocks>>>(d_OutputCol, d_Input, dimX, dimY, dimK);
    CudaCheckError();
    cudaDeviceSynchronize();
    //row = clock();
    //double running_time = (double)(row - start) / CLOCKS_PER_SEC;
    //printf("Col Convolution by using GPU: %f ms.\n", running_time);

    CudaSafeCall(cudaMemcpy(h_OutputRowGPU, d_OutputRow, img_size, cudaMemcpyDeviceToHost));
    CudaSafeCall(cudaMemcpy(h_OutputColGPU, d_OutputCol, img_size, cudaMemcpyDeviceToHost));

    //start = clock();
    convolutionRowCPU(h_OutputRowCPU, h_Kernel, h_Input, dimX, dimY, dimK);
    //row = clock();
    //double running_time = (double)(row - start) / CLOCKS_PER_SEC;
    //printf("Row Convolution by using CPU: %f ms.\n", running_time);

    //start = clock();
    convolutionColCPU(h_OutputColCPU, h_Kernel, h_Input, dimX, dimY, dimK);
    //row = clock();
    //double running_time = (double)(row - start) / CLOCKS_PER_SEC;
    //printf("Col Convolution by using CPU: %f ms.\n", running_time);

    double computation_scale = static_cast<double>(dimX) * static_cast<double>(dimY) * static_cast<double>(dimK);
    double throughput = (computation_scale * 1.0e-9f) / (running_time / 1000.0f);
    printf("Throughput Performance: %f GFLOPs. \n", throughput);

    cudaFree(d_OutputRow);
    cudaFree(d_OutputCol);
    cudaFree(d_Kernel);
    cudaFreeHost(h_Kernel);
    cudaFreeHost(h_Input);
    cudaFreeHost(h_OutputRowGPU);
    cudaFreeHost(h_OutputColGPU);

    return 0;

}

	.file	"tmpxft_002421d5_00000000-6_convolution2D.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2035:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2035:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata._Z14__cudaSafeCall9cudaErrorPKci.str1.1,"aMS",@progbits,1
.LC0:
	.string	"cudaSafeCall() failed at %s:%i : %s\n"
	.section	.text._Z14__cudaSafeCall9cudaErrorPKci,"axG",@progbits,_Z14__cudaSafeCall9cudaErrorPKci,comdat
	.weak	_Z14__cudaSafeCall9cudaErrorPKci
	.type	_Z14__cudaSafeCall9cudaErrorPKci, @function
_Z14__cudaSafeCall9cudaErrorPKci:
.LFB2027:
	.cfi_startproc
	endbr64
	testl	%edi, %edi
	je	.L2
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	movq	%rsi, %rbx
	subq	$16, %rsp
	.cfi_def_cfa_offset 32
	movl	%edx, 12(%rsp)
	call	cudaGetErrorString@PLT
	movq	stderr(%rip), %rdi
	movq	%rbx, %rcx
	movl	12(%rsp), %r8d
	movq	%rax, %r9
	leaq	.LC0(%rip), %rdx
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	orl	$-1, %edi
	call	exit@PLT
.L2:
	.cfi_def_cfa_offset 8
	.cfi_restore 3
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z14__cudaSafeCall9cudaErrorPKci, .-_Z14__cudaSafeCall9cudaErrorPKci
	.section	.rodata._Z16__cudaCheckErrorPKci.str1.1,"aMS",@progbits,1
.LC1:
	.string	"cudaCheckError() failed at %s:%i : %s\n"
.LC2:
	.string	"cudaCheckError() with sync failed at %s:%i : %s\n"
	.section	.text._Z16__cudaCheckErrorPKci,"axG",@progbits,_Z16__cudaCheckErrorPKci,comdat
	.weak	_Z16__cudaCheckErrorPKci
	.type	_Z16__cudaCheckErrorPKci, @function
_Z16__cudaCheckErrorPKci:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%rbp
	.cfi_def_cfa_offset 16
	.cfi_offset 6, -16
	movl	%esi, %ebp
	pushq	%rbx
	.cfi_def_cfa_offset 24
	.cfi_offset 3, -24
	movq	%rdi, %rbx
	pushq	%rdx
	.cfi_def_cfa_offset 32
	call	cudaGetLastError@PLT
	testl	%eax, %eax
	je	.L9
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	movl	%ebp, %r8d
	movq	%rbx, %rcx
	leaq	.LC1(%rip), %rdx
	movq	%rax, %r9
	jmp	.L12
.L9:
	call	cudaDeviceSynchronize@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L8
	call	cudaGetErrorString@PLT
	movl	%ebp, %r8d
	movq	%rbx, %rcx
	leaq	.LC2(%rip), %rdx
	movq	%rax, %r9
.L12:
	movq	stderr(%rip), %rdi
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	orl	$-1, %edi
	call	exit@PLT
.L8:
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	_Z16__cudaCheckErrorPKci, .-_Z16__cudaCheckErrorPKci
	.text
	.globl	_Z17convolutionRowCPUPfS_S_iii
	.type	_Z17convolutionRowCPUPfS_S_iii, @function
_Z17convolutionRowCPUPfS_S_iii:
.LFB2029:
	.cfi_startproc
	endbr64
	movabsq	$2305843009213693950, %rax
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movslq	%r9d, %r15
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	movl	%r9d, (%rsp)
	cmpq	%r15, %rax
	jb	.L14
	movq	%rdi, %rbp
	movl	%r8d, %ebx
	movl	%ecx, %r12d
	movq	%rsi, %r13
	leaq	0(,%r15,4), %rdi
	movq	%rdx, %r14
	call	_Znam@PLT
	movl	(%rsp), %r9d
	movl	%ebx, %edi
	leal	-2(%rbx), %r10d
	sarl	%r9d
	imull	%r9d, %edi
	leal	-1(%r9), %ecx
	movl	%r9d, %r8d
	subl	%r9d, %r12d
	imull	%r10d, %ecx
	jmp	.L15
.L14:
	call	__cxa_throw_bad_array_new_length@PLT
.L22:
	incl	%r8d
	addl	%ebx, %edi
	addl	%r10d, %ecx
.L15:
	cmpl	%r12d, %r8d
	jge	.L13
	movslq	%edi, %rdx
	cvtsi2sdl	%ebx, %xmm0
	movslq	%r9d, %rsi
	cvtsi2sdl	%r9d, %xmm1
	subq	%r15, %rdx
	leaq	(%r14,%rdx,4), %rdx
	movq	%rdx, 8(%rsp)
	movslq	%ecx, %rdx
	leaq	0(%rbp,%rdx,4), %rdx
	movq	%rdx, (%rsp)
	subsd	%xmm1, %xmm0
.L19:
	cvtsi2sdl	%esi, %xmm1
	comisd	%xmm1, %xmm0
	jbe	.L22
	movq	8(%rsp), %rdx
	leaq	(%rdx,%rsi,4), %rdx
	movq	%rdx, %r11
	xorl	%edx, %edx
.L16:
	movss	0(%r13,%rdx), %xmm1
	mulss	8(%r11,%rdx), %xmm1
	movss	%xmm1, (%rax,%rdx)
	addq	$4, %rdx
	cmpq	$12, %rdx
	jne	.L16
	movss	(%rax), %xmm1
	addss	4(%rax), %xmm1
	addss	8(%rax), %xmm1
	movq	(%rsp), %rdx
	movss	%xmm1, -4(%rdx,%rsi,4)
	incq	%rsi
	jmp	.L19
.L13:
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2029:
	.size	_Z17convolutionRowCPUPfS_S_iii, .-_Z17convolutionRowCPUPfS_S_iii
	.globl	_Z17convolutionColCPUPfS_S_iii
	.type	_Z17convolutionColCPUPfS_S_iii, @function
_Z17convolutionColCPUPfS_S_iii:
.LFB2030:
	.cfi_startproc
	endbr64
	movabsq	$2305843009213693950, %rax
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$40, %rsp
	.cfi_def_cfa_offset 96
	movq	%rdi, 24(%rsp)
	movslq	%r9d, %rdi
	cmpq	%rdi, %rax
	jb	.L24
	movq	%rdi, %r15
	salq	$2, %rdi
	movl	%r8d, %ebx
	movl	%ecx, %ebp
	movq	%rsi, %r12
	movq	%rdx, %r13
	movslq	%ebx, %r14
	call	_Znam@PLT
	movl	%r15d, %edx
	leal	-2(%rbx), %r11d
	sarl	%edx
	movq	%rax, %rcx
	movl	%edx, %eax
	leal	-1(%rdx), %esi
	movl	%edx, %r9d
	subl	%edx, %ebp
	subl	%r15d, %eax
	imull	%r11d, %esi
	leaq	0(,%r14,4), %r15
	addl	$2, %eax
	imull	%ebx, %eax
	cltq
	jmp	.L25
.L24:
	call	__cxa_throw_bad_array_new_length@PLT
.L32:
	incl	%r9d
	addl	%r11d, %esi
	addq	%r14, %rax
.L25:
	cmpl	%ebp, %r9d
	jge	.L23
	cvtsi2sdl	%ebx, %xmm0
	leaq	0(%r13,%rax,4), %r10
	movslq	%esi, %r8
	movslq	%edx, %rdi
	cvtsi2sdl	%edx, %xmm1
	movq	%r10, 16(%rsp)
	movq	24(%rsp), %r10
	leaq	(%r10,%r8,4), %r8
	movq	%r8, 8(%rsp)
	subsd	%xmm1, %xmm0
.L29:
	cvtsi2sdl	%edi, %xmm1
	comisd	%xmm1, %xmm0
	jbe	.L32
	movq	16(%rsp), %r10
	xorl	%r8d, %r8d
	leaq	(%r10,%rdi,4), %r10
.L26:
	movss	(%r12,%r8), %xmm1
	mulss	(%r10), %xmm1
	addq	%r15, %r10
	movss	%xmm1, (%rcx,%r8)
	addq	$4, %r8
	cmpq	$12, %r8
	jne	.L26
	movss	(%rcx), %xmm1
	addss	4(%rcx), %xmm1
	addss	8(%rcx), %xmm1
	movq	8(%rsp), %r10
	movss	%xmm1, -4(%r10,%rdi,4)
	incq	%rdi
	jmp	.L29
.L23:
	addq	$40, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2030:
	.size	_Z17convolutionColCPUPfS_S_iii, .-_Z17convolutionColCPUPfS_S_iii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC3:
	.string	"Input for dimX, dimY, dimK must larger than 0"
	.text
	.globl	_Z11check_inputiii
	.type	_Z11check_inputiii, @function
_Z11check_inputiii:
.LFB2031:
	.cfi_startproc
	endbr64
	testl	%esi, %esi
	setg	%cl
	testl	%edx, %edx
	setg	%al
	testb	%al, %cl
	je	.L37
	movl	$1, %eax
	testl	%edi, %edi
	jg	.L42
.L37:
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	orl	$-1, %eax
	popq	%rdx
	.cfi_def_cfa_offset 8
	ret
.L42:
	ret
	.cfi_endproc
.LFE2031:
	.size	_Z11check_inputiii, .-_Z11check_inputiii
	.globl	_Z42__device_stub__Z17convolutionRowGPUPfS_iiiPfS_iii
	.type	_Z42__device_stub__Z17convolutionRowGPUPfS_iiiPfS_iii, @function
_Z42__device_stub__Z17convolutionRowGPUPfS_iiiPfS_iii:
.LFB2057:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L44
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z17convolutionRowGPUPfS_iii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L44:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L46
	call	__stack_chk_fail@PLT
.L46:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2057:
	.size	_Z42__device_stub__Z17convolutionRowGPUPfS_iiiPfS_iii, .-_Z42__device_stub__Z17convolutionRowGPUPfS_iiiPfS_iii
	.globl	_Z17convolutionRowGPUPfS_iii
	.type	_Z17convolutionRowGPUPfS_iii, @function
_Z17convolutionRowGPUPfS_iii:
.LFB2058:
	.cfi_startproc
	endbr64
	jmp	_Z42__device_stub__Z17convolutionRowGPUPfS_iiiPfS_iii
	.cfi_endproc
.LFE2058:
	.size	_Z17convolutionRowGPUPfS_iii, .-_Z17convolutionRowGPUPfS_iii
	.globl	_Z42__device_stub__Z17convolutionColGPUPfS_iiiPfS_iii
	.type	_Z42__device_stub__Z17convolutionColGPUPfS_iiiPfS_iii, @function
_Z42__device_stub__Z17convolutionColGPUPfS_iiiPfS_iii:
.LFB2059:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movl	%edx, 12(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 8(%rsp)
	leaq	40(%rsp), %rcx
	movl	%r8d, 4(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L49
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z17convolutionColGPUPfS_iii(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L49:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L51
	call	__stack_chk_fail@PLT
.L51:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2059:
	.size	_Z42__device_stub__Z17convolutionColGPUPfS_iiiPfS_iii, .-_Z42__device_stub__Z17convolutionColGPUPfS_iiiPfS_iii
	.globl	_Z17convolutionColGPUPfS_iii
	.type	_Z17convolutionColGPUPfS_iii, @function
_Z17convolutionColGPUPfS_iii:
.LFB2060:
	.cfi_startproc
	endbr64
	jmp	_Z42__device_stub__Z17convolutionColGPUPfS_iiiPfS_iii
	.cfi_endproc
.LFE2060:
	.size	_Z17convolutionColGPUPfS_iii, .-_Z17convolutionColGPUPfS_iii
	.section	.rodata.str1.1
.LC4:
	.string	"Input Data\n"
.LC5:
	.string	"Error input Parameter \n"
.LC6:
	.string	"Please Follow Format to Run Program: ./execute_file <dimX> <dimY> <dimK>\n"
.LC7:
	.string	"Please input <dimX>, <dimY>, <dimK> \n"
.LC8:
	.string	"dimX and dimY are width and heights for input image and dimK is size for mask \n"
.LC9:
	.string	"Your Mask Size is too large. \n"
.LC10:
	.string	"We recommend you change a reasonable number. \n"
.LC11:
	.string	"Input is Valid \n\n"
.LC12:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/CYP0630/CUDA_Practice/master/Convolution2D/convolution2D.cu"
.LC14:
	.string	"Row Convolution by using GPU: %f ms.\n"
.LC17:
	.string	"Throughput Performance: %f GFLOPs. \n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2032:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$136, %rsp
	.cfi_def_cfa_offset 192
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	cmpl	$4, %edi
	jne	.L55
	movq	%rsi, %rbx
	movl	$2, %edi
	leaq	.LC4(%rip), %rsi
	call	__printf_chk@PLT
	movq	8(%rbx), %rdi
	call	atoi@PLT
	movq	16(%rbx), %rdi
	movl	%eax, %r12d
	call	atoi@PLT
	movq	24(%rbx), %rdi
	movl	%eax, %ebp
	call	atoi@PLT
	movl	%eax, %ebx
	cmpl	$128, %eax
	jle	.L57
	leaq	.LC9(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC10(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L57
.L55:
	leaq	.LC5(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	leaq	.LC8(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L58
.L57:
	movl	%ebx, %edx
	movl	%ebp, %esi
	movl	%r12d, %edi
	call	_Z11check_inputiii
	movl	%eax, %edx
	orl	$-1, %eax
	decl	%edx
	jne	.L54
	leaq	.LC11(%rip), %rsi
	xorl	%eax, %eax
	movl	%r12d, %r13d
	xorl	%r15d, %r15d
	movl	$2, %edi
	imull	%ebp, %r13d
	call	__printf_chk@PLT
	xorl	%edi, %edi
	call	time@PLT
	movl	%eax, %edi
	call	srand@PLT
	movslq	%ebx, %rax
	leaq	0(,%rax,4), %rdi
	movq	%rax, 40(%rsp)
	call	malloc@PLT
	movslq	%r13d, %rdi
	salq	$2, %rdi
	movq	%rax, 8(%rsp)
	call	malloc@PLT
	movq	%rax, %r14
.L60:
	cmpl	%ebx, %r15d
	jnb	.L69
	call	rand@PLT
	movl	$16, %ecx
	cltd
	idivl	%ecx
	movq	8(%rsp), %rax
	cvtsi2ssl	%edx, %xmm0
	movss	%xmm0, (%rax,%r15,4)
	incq	%r15
	jmp	.L60
.L69:
	movl	%r13d, %eax
	movq	%r14, %rcx
	movq	%rax, 16(%rsp)
	leaq	0(,%rax,4), %r13
	leaq	(%r14,%r13), %r15
.L62:
	cmpq	%r15, %rcx
	je	.L70
	movq	%rcx, 24(%rsp)
	call	rand@PLT
	movl	$16, %ecx
	cltd
	idivl	%ecx
	movq	24(%rsp), %rcx
	addq	$4, %rcx
	cvtsi2ssl	%edx, %xmm0
	movss	%xmm0, -4(%rcx)
	jmp	.L62
.L70:
	movq	%r13, %rdi
	leaq	.LC12(%rip), %r15
	call	malloc@PLT
	movq	%r13, %rdi
	movq	%rax, 48(%rsp)
	call	malloc@PLT
	movq	%r13, %rdi
	movq	%rax, 56(%rsp)
	call	malloc@PLT
	movq	%r13, %rdi
	movq	%rax, 24(%rsp)
	call	malloc@PLT
	leaq	72(%rsp), %rdi
	movq	%r13, %rsi
	movq	%rax, 32(%rsp)
	call	cudaMalloc@PLT
	movl	$321, %edx
	movq	%r15, %rsi
	movl	%eax, %edi
	call	_Z14__cudaSafeCall9cudaErrorPKci
	leaq	80(%rsp), %rdi
	movq	%r13, %rsi
	call	cudaMalloc@PLT
	movl	$322, %edx
	movq	%r15, %rsi
	movl	%eax, %edi
	call	_Z14__cudaSafeCall9cudaErrorPKci
	leaq	88(%rsp), %rdi
	movq	%r13, %rsi
	call	cudaMalloc@PLT
	movl	$323, %edx
	movq	%r15, %rsi
	movl	%eax, %edi
	call	_Z14__cudaSafeCall9cudaErrorPKci
	movq	72(%rsp), %rdi
	movq	%r13, %rdx
	movq	%r14, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	$326, %edx
	movq	%r15, %rsi
	movl	%eax, %edi
	call	_Z14__cudaSafeCall9cudaErrorPKci
	movq	40(%rsp), %rdx
	movq	8(%rsp), %rsi
	xorl	%ecx, %ecx
	movl	$1, %r8d
	leaq	_ZL8d_Kernel(%rip), %rdi
	call	cudaMemcpyToSymbol@PLT
	movq	%r15, %rsi
	movl	$327, %edx
	movl	%eax, %edi
	call	_Z14__cudaSafeCall9cudaErrorPKci
	movl	$16, %ecx
	movabsq	$68719476752, %rax
	movl	$1, 104(%rsp)
	movq	%rax, 96(%rsp)
	movl	%r12d, %eax
	cltd
	movl	$1, 116(%rsp)
	idivl	%ecx
	movl	%eax, 108(%rsp)
	movl	%ebp, %eax
	cltd
	idivl	%ecx
	movl	%eax, 112(%rsp)
	call	clock@PLT
	movl	104(%rsp), %ecx
	movl	116(%rsp), %esi
	xorl	%r9d, %r9d
	movq	96(%rsp), %rdx
	movq	108(%rsp), %rdi
	xorl	%r8d, %r8d
	movq	%rax, start(%rip)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L64
	movq	72(%rsp), %rsi
	movq	80(%rsp), %rdi
	movl	%ebx, %r8d
	movl	%ebp, %ecx
	movl	%r12d, %edx
	call	_Z42__device_stub__Z17convolutionRowGPUPfS_iiiPfS_iii
.L64:
	movl	$335, %esi
	leaq	.LC12(%rip), %rdi
	call	_Z16__cudaCheckErrorPKci
	call	cudaDeviceSynchronize@PLT
	call	clock@PLT
	leaq	.LC14(%rip), %rsi
	movl	$2, %edi
	movq	%rax, row(%rip)
	subq	start(%rip), %rax
	cvtsi2sdq	%rax, %xmm0
	movb	$1, %al
	divsd	.LC13(%rip), %xmm0
	movq	%xmm0, %r15
	call	__printf_chk@PLT
	movl	104(%rsp), %ecx
	movl	116(%rsp), %esi
	xorl	%r9d, %r9d
	movq	96(%rsp), %rdx
	movq	108(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L65
	movq	72(%rsp), %rsi
	movq	88(%rsp), %rdi
	movl	%ebx, %r8d
	movl	%ebp, %ecx
	movl	%r12d, %edx
	call	_Z42__device_stub__Z17convolutionColGPUPfS_iiiPfS_iii
.L65:
	leaq	.LC12(%rip), %r13
	movl	$343, %esi
	movq	%r13, %rdi
	call	_Z16__cudaCheckErrorPKci
	call	cudaDeviceSynchronize@PLT
	movq	16(%rsp), %rdx
	movq	80(%rsp), %rsi
	movl	$2, %ecx
	movq	24(%rsp), %rdi
	call	cudaMemcpy@PLT
	movl	$349, %edx
	movq	%r13, %rsi
	movl	%eax, %edi
	call	_Z14__cudaSafeCall9cudaErrorPKci
	movq	16(%rsp), %rdx
	movq	88(%rsp), %rsi
	movl	$2, %ecx
	movq	32(%rsp), %rdi
	call	cudaMemcpy@PLT
	movl	$350, %edx
	movq	%r13, %rsi
	movl	%eax, %edi
	call	_Z14__cudaSafeCall9cudaErrorPKci
	movq	8(%rsp), %rsi
	movl	%ebx, %r9d
	movl	%ebp, %r8d
	movq	48(%rsp), %rdi
	movl	%r12d, %ecx
	movq	%r14, %rdx
	call	_Z17convolutionRowCPUPfS_S_iii
	movq	8(%rsp), %rsi
	movl	%ebx, %r9d
	movl	%ebp, %r8d
	movq	56(%rsp), %rdi
	movl	%r12d, %ecx
	movq	%r14, %rdx
	call	_Z17convolutionColCPUPfS_S_iii
	cvtsi2sdl	%ebp, %xmm1
	movl	$2, %edi
	movb	$1, %al
	cvtsi2sdl	%r12d, %xmm0
	leaq	.LC17(%rip), %rsi
	mulsd	%xmm1, %xmm0
	cvtsi2sdl	%ebx, %xmm1
	mulsd	%xmm1, %xmm0
	movq	%r15, %xmm1
	divsd	.LC16(%rip), %xmm1
	mulsd	.LC15(%rip), %xmm0
	divsd	%xmm1, %xmm0
	call	__printf_chk@PLT
	movq	80(%rsp), %rdi
	call	cudaFree@PLT
	movq	88(%rsp), %rdi
	call	cudaFree@PLT
	leaq	_ZL8d_Kernel(%rip), %rdi
	call	cudaFree@PLT
	movq	8(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	%r14, %rdi
	call	cudaFreeHost@PLT
	movq	24(%rsp), %rdi
	call	cudaFreeHost@PLT
	movq	32(%rsp), %rdi
	call	cudaFreeHost@PLT
.L58:
	xorl	%eax, %eax
.L54:
	movq	120(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L66
	call	__stack_chk_fail@PLT
.L66:
	addq	$136, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2032:
	.size	main, .-main
	.section	.rodata.str1.1
.LC18:
	.string	"_Z17convolutionColGPUPfS_iii"
.LC19:
	.string	"_Z17convolutionRowGPUPfS_iii"
.LC20:
	.string	"d_Kernel"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2062:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC18(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z17convolutionColGPUPfS_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC19(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z17convolutionRowGPUPfS_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC20(%rip), %rdx
	movl	$1028, %r9d
	leaq	_ZL8d_Kernel(%rip), %rsi
	pushq	$1
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2062:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.globl	col
	.bss
	.align 8
	.type	col, @object
	.size	col, 8
col:
	.zero	8
	.globl	row
	.align 8
	.type	row, @object
	.size	row, 8
row:
	.zero	8
	.globl	start
	.align 8
	.type	start, @object
	.size	start, 8
start:
	.zero	8
	.local	_ZL8d_Kernel
	.comm	_ZL8d_Kernel,1028,32
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC13:
	.long	0
	.long	1093567616
	.align 8
.LC15:
	.long	-536870912
	.long	1041313291
	.align 8
.LC16:
	.long	0
	.long	1083129856
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

/*
 *  file name: convolution2D.cu
 *
 *  CPE810A: Homework 3: Convolution
 *  
 *  Yupeng Cao, 10454637
 *  
 */


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <assert.h>
#include <time.h>
#include <ctime>

// Define constant memory for kernel storage on Device
#define KERNEL_RADIUS 128
#define KERNEL_W (2 * KERNEL_RADIUS + 1)
__constant__ float d_Kernel[KERNEL_W];

// Define Tile Size
#define TILE_W 16		// active cell width
#define TILE_H 16		// active cell height
#define TILE_SIZE (TILE_W + KERNEL_RADIUS * 2) * (TILE_W + KERNEL_RADIUS * 2)

#define UNROLL_INNER

clock_t start, row, col;
/*
*********************************************************************
    Define Error Checking methods

    cudaSafeCall:   Check data allocate
    cudaCheckError: Check kernel function execution
*********************************************************************
*/
#define CUDA_ERROR_CHECK
#define CudaSafeCall( err ) __cudaSafeCall( err, __FILE__, __LINE__ )
#define CudaCheckError()    __cudaCheckError( __FILE__, __LINE__ )
inline void __cudaSafeCall( hipError_t err, const char *file, const int line )
{
#ifdef CUDA_ERROR_CHECK
    if ( hipSuccess != err )
    {
        fprintf( stderr, "cudaSafeCall() failed at %s:%i : %s\n",
                 file, line, hipGetErrorString( err ) );
        exit( -1 );
    }
#endif

    return;
}

inline void __cudaCheckError( const char *file, const int line )
{
#ifdef CUDA_ERROR_CHECK
    hipError_t err = hipGetLastError();
    if ( hipSuccess != err )
    {
        fprintf( stderr, "cudaCheckError() failed at %s:%i : %s\n",
                 file, line, hipGetErrorString( err ) );
        exit( -1 );
    }

    err = hipDeviceSynchronize();
    if( hipSuccess != err )
    {
        fprintf( stderr, "cudaCheckError() with sync failed at %s:%i : %s\n",
                 file, line, hipGetErrorString( err ) );
        exit( -1 );
    }
#endif

    return;
}

/*
*********************************************************************
function name: convolutionRowGPU

parameters:
            d_OutputRow: Space for saving results 
            d_Input: Input image
            dimX: Width
            dimY: Height
            dimK: Kernel Size

*********************************************************************
*/
__global__ void convolutionRowGPU(float* d_OutputRow, float* d_Input, int dimX, int dimY, int dimK)
{
    // Data cache: threadIdx.x , threadIdx.y
    __shared__ float data[ TILE_H * (TILE_W + KERNEL_RADIUS * 2) ];
	
	// global mem address of this thread
	const int gLoc = threadIdx.x + 
					 blockIdx.x * blockDim.x +
    				 threadIdx.y * dimX +
    				 blockIdx.y * blockDim.y * dimX;
    				     

	int x;		// image based coordinate

	// original image based coordinate
	const int x0 = threadIdx.x + blockIdx.x * blockDim.x;
	const int shift = threadIdx.y * (TILE_W + dimK * 2);

    // left
    x = x0 - dimK;
	if ( x < 0 )
		data[threadIdx.x + shift] = 0;
	else	
        data[threadIdx.x + shift] = d_Input[ gLoc - dimK];
        
	// right
	x = x0 + dimK;
	if ( x > dimX-1 )
		data[threadIdx.x + blockDim.x + shift] = 0;
	else	
		data[threadIdx.x + blockDim.x + shift] = d_Input[gLoc + dimK];
    
    __syncthreads();

	// convolution
	float sum = 0;
	x = dimK + threadIdx.x;
	for (int i = -dimK; i <= dimK; i++)
		sum += data[x + i + shift] * d_Kernel[dimK + i];

    d_OutputRow[gLoc] = sum;

    __syncthreads();

}

/*
*********************************************************************
function name: convolutionCOlGPU

parameters:
            d_OutputCol: Space for saving results 
            d_Input: Input image
            dimX: Width
            dimY: Height
            dimK: Kernel Size

*********************************************************************
*/
__global__ void convolutionColGPU(float* d_OutputCol, float* d_Input, int dimX, int dimY, int dimK)
{
    // Data cache: threadIdx.x , threadIdx.y
    __shared__ float data[TILE_W * (TILE_H + KERNEL_RADIUS * 2)];
	
	// global mem address of this thread
	const int gLoc = threadIdx.x + 
					 blockIdx.x * blockDim.x +
    				 threadIdx.y * dimX +
    				 blockIdx.y * blockDim.y * dimX;
    				     
	int y;		// image based coordinate

	// original image based coordinate
	const int y0 = threadIdx.y + blockIdx.y * blockDim.y;
	const int shift = threadIdx.y * (TILE_W);
    
    // upper
    y = y0 - dimK;
	if ( y < 0 )
		data[threadIdx.x + shift] = 0;
	else	
        data[threadIdx.x + shift] = d_Input[ gLoc - (dimX * dimK)];
        
	// lower
	y = y0 + dimK;
	const int shift1 = shift + (blockDim.y * TILE_W);
	if ( y > dimY-1 )
		data[threadIdx.x + shift1] = 0;
	else	
		data[threadIdx.x + shift1] = d_Input[gLoc + (dimX * dimK)];
    
    __syncthreads();

	// convolution
	float sum = 0;
	for (int i = 0; i <= dimK*2; i++)
		sum += data[threadIdx.x + (threadIdx.y + i) * TILE_W] * d_Kernel[i];

    d_OutputCol[gLoc] = sum;

    __syncthreads();
}

/*
*********************************************************************
function name: convolutionRowCPU

Do Row Convolution by using CPU
*********************************************************************
*/
void convolutionRowCPU(float* output, float* kernel, float* input, int xSize, int ySize, int kernel_size)
{

	float* temp = new float[kernel_size];
	int outCol = ySize - 2;

	for (int i = floor(kernel_size / 2); i < xSize - (kernel_size / 2); i++)
	{
		for (int j = floor(kernel_size / 2); j < ySize - floor(kernel_size / 2); j++)
		{
			for (int c = 0; c < 3; c++)
			{
				*(temp + c) = *(kernel + c) * *(input + i * ySize + (j + (c - kernel_size + 2)));
			}
			*(output + (i - 1) * outCol + (j - 1)) = *(temp + 0) + *(temp + 1) + *(temp + 2);
		}
	}

}

/*
*********************************************************************
function name: convolutionColCPU

Do Col Convolution by using CPU
*********************************************************************
*/
void convolutionColCPU(float* output, float* kernel, float* input, int xSize, int ySize, int kernel_size)
{

	float* temp = new float[kernel_size];
	int outCol = ySize - 2;

	for (int i = floor(kernel_size / 2); i < xSize - (kernel_size / 2); i++)
	{
		for (int j = floor(kernel_size / 2); j < ySize - floor(kernel_size / 2); j++)
		{
			for (int c = 0; c < 3; c++)
			{
				*(temp + c) = *(kernel + c) * *(input + (i + (c - kernel_size + 2)) * ySize + j);
			}
			*(output + (i - 1) * outCol + (j - 1)) = *(temp + 0) + *(temp + 1) + *(temp + 2);
		}
	}

}


int check_input(int dimX, int dimY, int dimK){

    if (dimX > 0 && dimY > 0 && dimK > 0){
        return 1;
    }else{
        printf("Input for dimX, dimY, dimK must larger than 0");
        return -1;
    }
}

/*
*********************************************************************
Main Function
*********************************************************************
*/
int main(int argc, char *argv[])
{   

    // Check input parameter
    if (argc == 4){
        printf("Input Data\n");
    }else{
        printf("Error input Parameter \n");
        printf("Please Follow Format to Run Program: ./execute_file <dimX> <dimY> <dimK>\n");
        printf("Please input <dimX>, <dimY>, <dimK> \n");
        printf("dimX and dimY are width and heights for input image and dimK is size for mask \n");
        return 0;
    }
    
    int dimX = atoi(argv[1]);
    int dimY = atoi(argv[2]);
    int dimK = atoi(argv[3]);

    if (dimK > KERNEL_RADIUS){
        printf("Your Mask Size is too large. \n");  
        printf("We recommend you change a reasonable number. \n");  

    }

    if (check_input(dimX, dimY, dimK) == 1){
        printf("Input is Valid \n\n");   
    }else{
        return -1;
    }
    
    srand((unsigned)time(NULL));

    // Initialize image size and kernel size
    unsigned int img_size = dimX * dimY;
    const int kernel_length = dimK;
    // Allocate space for input on host
    float* h_Kernel = (float *)malloc(kernel_length * sizeof(float));
    float* h_Input  = (float *)malloc(dimX * dimY * sizeof(float));
    // Initialize Mask and Image. 
    for (unsigned int i = 0; i < kernel_length; ++i)
    {
        h_Kernel[i] = (float)(rand() % 16);
    }

    for (unsigned i = 0; i < img_size; ++i)
    {
        h_Input[i] = (float)(rand() % 16);
    }

    // Allocate space for saving results on host
    float  *h_OutputRowCPU, *h_OutputColCPU, *h_OutputRowGPU, *h_OutputColGPU;
    h_OutputRowCPU = (float *)malloc(img_size * sizeof(float));
    h_OutputColCPU = (float *)malloc(img_size * sizeof(float));
    h_OutputRowGPU = (float *)malloc(img_size * sizeof(float));
    h_OutputColGPU = (float *)malloc(img_size * sizeof(float));

    // Allocate space for data on device
    float *d_Input, *d_OutputRow, *d_OutputCol;
    CudaSafeCall(hipMalloc((void **)&d_Input,   img_size * sizeof(float)));
    CudaSafeCall(hipMalloc((void **)&d_OutputRow,  img_size * sizeof(float)));
    CudaSafeCall(hipMalloc((void **)&d_OutputCol,  img_size * sizeof(float)));

    // Move data from host to device
    CudaSafeCall(hipMemcpy(d_Input, h_Input, img_size * sizeof(float), hipMemcpyHostToDevice));
    CudaSafeCall(hipMemcpyToSymbol(HIP_SYMBOL(d_Kernel), h_Kernel, kernel_length));

    // Initialize grid and block
    dim3 blocks(TILE_W, TILE_H);
    dim3 grids(dimX/TILE_W, dimY/TILE_H);

    start = clock();
    convolutionRowGPU<<<grids, blocks>>>(d_OutputRow, d_Input, dimX, dimY, dimK);
    CudaCheckError();
    hipDeviceSynchronize();
    row = clock();
    double running_time = (double)(row - start) / CLOCKS_PER_SEC;
    printf("Row Convolution by using GPU: %f ms.\n", running_time);

    //start = clock();
    convolutionColGPU<<<grids, blocks>>>(d_OutputCol, d_Input, dimX, dimY, dimK);
    CudaCheckError();
    hipDeviceSynchronize();
    //row = clock();
    //double running_time = (double)(row - start) / CLOCKS_PER_SEC;
    //printf("Col Convolution by using GPU: %f ms.\n", running_time);

    CudaSafeCall(hipMemcpy(h_OutputRowGPU, d_OutputRow, img_size, hipMemcpyDeviceToHost));
    CudaSafeCall(hipMemcpy(h_OutputColGPU, d_OutputCol, img_size, hipMemcpyDeviceToHost));

    //start = clock();
    convolutionRowCPU(h_OutputRowCPU, h_Kernel, h_Input, dimX, dimY, dimK);
    //row = clock();
    //double running_time = (double)(row - start) / CLOCKS_PER_SEC;
    //printf("Row Convolution by using CPU: %f ms.\n", running_time);

    //start = clock();
    convolutionColCPU(h_OutputColCPU, h_Kernel, h_Input, dimX, dimY, dimK);
    //row = clock();
    //double running_time = (double)(row - start) / CLOCKS_PER_SEC;
    //printf("Col Convolution by using CPU: %f ms.\n", running_time);

    double computation_scale = static_cast<double>(dimX) * static_cast<double>(dimY) * static_cast<double>(dimK);
    double throughput = (computation_scale * 1.0e-9f) / (running_time / 1000.0f);
    printf("Throughput Performance: %f GFLOPs. \n", throughput);

    hipFree(d_OutputRow);
    hipFree(d_OutputCol);
    hipFree(d_Kernel);
    hipHostFree(h_Kernel);
    hipHostFree(h_Input);
    hipHostFree(h_OutputRowGPU);
    hipHostFree(h_OutputColGPU);

    return 0;

}

	.text
	.file	"convolution2D.hip"
	.globl	_Z32__device_stub__convolutionRowGPUPfS_iii # -- Begin function _Z32__device_stub__convolutionRowGPUPfS_iii
	.type	_Z32__device_stub__convolutionRowGPUPfS_iii,@function
_Z32__device_stub__convolutionRowGPUPfS_iii: # @_Z32__device_stub__convolutionRowGPUPfS_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17convolutionRowGPUPfS_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z32__device_stub__convolutionRowGPUPfS_iii, .Lfunc_end0-_Z32__device_stub__convolutionRowGPUPfS_iii
	.cfi_endproc
                                        # -- End function
	.globl	_Z32__device_stub__convolutionColGPUPfS_iii # -- Begin function _Z32__device_stub__convolutionColGPUPfS_iii
	.type	_Z32__device_stub__convolutionColGPUPfS_iii,@function
_Z32__device_stub__convolutionColGPUPfS_iii: # @_Z32__device_stub__convolutionColGPUPfS_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	12(%rsp), %rsi
	movl	%edx, (%rsi)
	leaq	8(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	4(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17convolutionColGPUPfS_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z32__device_stub__convolutionColGPUPfS_iii, .Lfunc_end1-_Z32__device_stub__convolutionColGPUPfS_iii
	.cfi_endproc
                                        # -- End function
	.globl	_Z17convolutionRowCPUPfS_S_iii  # -- Begin function _Z17convolutionRowCPUPfS_S_iii
	.type	_Z17convolutionRowCPUPfS_S_iii,@function
_Z17convolutionRowCPUPfS_S_iii:         # @_Z17convolutionRowCPUPfS_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$24, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, %ebp
	movl	%r8d, %r13d
	movl	%ecx, %r12d
	movq	%rdx, 16(%rsp)                  # 8-byte Spill
	movq	%rsi, %r14
	movq	%rdi, 8(%rsp)                   # 8-byte Spill
	movl	%r9d, %eax
	shlq	$2, %rax
	testl	%r9d, %r9d
	movq	$-1, %rdi
	cmovnsq	%rax, %rdi
	callq	_Znam
	movl	%ebp, %ecx
	shrl	$31, %ecx
	addl	%ebp, %ecx
	sarl	%ecx
	subl	%ecx, %r12d
	cmpl	%r12d, %ecx
	jge	.LBB2_8
# %bb.1:                                # %.preheader32.lr.ph
	addq	$-4, 8(%rsp)                    # 8-byte Folded Spill
	movslq	%ecx, %rdx
	movslq	%r13d, %rsi
	addl	$-2, %r13d
	movq	%rsi, %rdi
	subq	%rdx, %rdi
	movslq	%r13d, %r8
	movslq	%r12d, %r9
	subl	%ebp, %ecx
	addl	$2, %ecx
	movq	%rdx, %r10
.LBB2_2:                                # %.preheader32
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_4 Depth 2
                                        #       Child Loop BB2_5 Depth 3
	cmpq	%rdx, %rdi
	jle	.LBB2_7
# %bb.3:                                # %.preheader.lr.ph
                                        #   in Loop: Header=BB2_2 Depth=1
	movq	%r10, %r11
	imulq	%rsi, %r11
	movq	16(%rsp), %rbx                  # 8-byte Reload
	leaq	(%rbx,%r11,4), %r11
	leaq	-1(%r10), %rbx
	imulq	%r8, %rbx
	movq	8(%rsp), %r15                   # 8-byte Reload
	leaq	(%r15,%rbx,4), %r12
	movq	%rcx, %r13
	movq	%rdx, %rbp
.LBB2_4:                                # %.preheader
                                        #   Parent Loop BB2_2 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB2_5 Depth 3
	xorl	%ebx, %ebx
.LBB2_5:                                #   Parent Loop BB2_2 Depth=1
                                        #     Parent Loop BB2_4 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movss	(%r14,%rbx,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	leal	(%rbx,%r13), %r15d
	movslq	%r15d, %r15
	mulss	(%r11,%r15,4), %xmm0
	movss	%xmm0, (%rax,%rbx,4)
	incq	%rbx
	cmpq	$3, %rbx
	jne	.LBB2_5
# %bb.6:                                #   in Loop: Header=BB2_4 Depth=2
	movss	(%rax), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	addss	4(%rax), %xmm0
	addss	8(%rax), %xmm0
	movss	%xmm0, (%r12,%rbp,4)
	incq	%rbp
	movslq	%ebp, %rbx
	incq	%r13
	cmpq	%rbx, %rdi
	jg	.LBB2_4
.LBB2_7:                                # %._crit_edge
                                        #   in Loop: Header=BB2_2 Depth=1
	incq	%r10
	cmpq	%r9, %r10
	jne	.LBB2_2
.LBB2_8:                                # %._crit_edge38
	addq	$24, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z17convolutionRowCPUPfS_S_iii, .Lfunc_end2-_Z17convolutionRowCPUPfS_S_iii
	.cfi_endproc
                                        # -- End function
	.globl	_Z17convolutionColCPUPfS_S_iii  # -- Begin function _Z17convolutionColCPUPfS_S_iii
	.type	_Z17convolutionColCPUPfS_S_iii,@function
_Z17convolutionColCPUPfS_S_iii:         # @_Z17convolutionColCPUPfS_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	pushq	%rax
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%r9d, %ebp
	movl	%r8d, %ebx
	movl	%ecx, %r13d
	movq	%rdx, %r14
	movq	%rsi, %r15
	movq	%rdi, (%rsp)                    # 8-byte Spill
	movl	%r9d, %eax
	shlq	$2, %rax
	testl	%r9d, %r9d
	movq	$-1, %rdi
	cmovnsq	%rax, %rdi
	callq	_Znam
	movl	%ebp, %r9d
	shrl	$31, %r9d
	addl	%ebp, %r9d
	sarl	%r9d
	subl	%r9d, %r13d
	cmpl	%r13d, %r9d
	jge	.LBB3_8
# %bb.1:                                # %.preheader32.lr.ph
	addq	$-4, (%rsp)                     # 8-byte Folded Spill
	leal	-2(%rbx), %edi
	movslq	%r9d, %rcx
	movslq	%ebx, %rdx
	movq	%rdx, %rsi
	subq	%rcx, %rsi
	movslq	%edi, %rdi
	movslq	%r13d, %r8
	subl	%ebp, %r9d
	addl	$2, %r9d
	imull	%r9d, %edx
	movq	%rcx, %r9
.LBB3_2:                                # %.preheader32
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB3_4 Depth 2
                                        #       Child Loop BB3_5 Depth 3
	cmpq	%rcx, %rsi
	jle	.LBB3_7
# %bb.3:                                # %.preheader.lr.ph
                                        #   in Loop: Header=BB3_2 Depth=1
	leaq	-1(%r9), %r10
	imulq	%rdi, %r10
	movq	(%rsp), %r11                    # 8-byte Reload
	leaq	(%r11,%r10,4), %r10
	movq	%rcx, %r11
.LBB3_4:                                # %.preheader
                                        #   Parent Loop BB3_2 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB3_5 Depth 3
	leaq	(%r14,%r11,4), %r13
	movl	%edx, %ebp
	xorl	%r12d, %r12d
.LBB3_5:                                #   Parent Loop BB3_2 Depth=1
                                        #     Parent Loop BB3_4 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movss	(%r15,%r12,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	movslq	%ebp, %rbp
	mulss	(%r13,%rbp,4), %xmm0
	movss	%xmm0, (%rax,%r12,4)
	incq	%r12
	addl	%ebx, %ebp
	cmpq	$3, %r12
	jne	.LBB3_5
# %bb.6:                                #   in Loop: Header=BB3_4 Depth=2
	movss	(%rax), %xmm0                   # xmm0 = mem[0],zero,zero,zero
	addss	4(%rax), %xmm0
	addss	8(%rax), %xmm0
	movss	%xmm0, (%r10,%r11,4)
	incq	%r11
	movslq	%r11d, %r12
	cmpq	%r12, %rsi
	jg	.LBB3_4
.LBB3_7:                                # %._crit_edge
                                        #   in Loop: Header=BB3_2 Depth=1
	incq	%r9
	addl	%ebx, %edx
	cmpq	%r8, %r9
	jne	.LBB3_2
.LBB3_8:                                # %._crit_edge40
	addq	$8, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z17convolutionColCPUPfS_S_iii, .Lfunc_end3-_Z17convolutionColCPUPfS_S_iii
	.cfi_endproc
                                        # -- End function
	.globl	_Z11check_inputiii              # -- Begin function _Z11check_inputiii
	.type	_Z11check_inputiii,@function
_Z11check_inputiii:                     # @_Z11check_inputiii
	.cfi_startproc
# %bb.0:
	testl	%edi, %edi
	jle	.LBB4_3
# %bb.1:
	testl	%esi, %esi
	jle	.LBB4_3
# %bb.2:
	movl	$1, %eax
	testl	%edx, %edx
	jle	.LBB4_3
# %bb.4:
	retq
.LBB4_3:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movl	$.L.str, %edi
	xorl	%eax, %eax
	callq	printf
	movl	$-1, %eax
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z11check_inputiii, .Lfunc_end4-_Z11check_inputiii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI5_0:
	.quad	0x412e848000000000              # double 1.0E+6
.LCPI5_1:
	.quad	0x3e112e0be0000000              # double 9.9999997171806853E-10
.LCPI5_2:
	.quad	0x408f400000000000              # double 1000
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$104, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	cmpl	$4, %edi
	jne	.LBB5_43
# %bb.1:
	movq	%rsi, %r15
	movl	$.Lstr.4, %edi
	callq	puts@PLT
	movq	8(%r15), %rdi
	callq	atoi
	movl	%eax, %ebx
	movq	16(%r15), %rdi
	callq	atoi
	movl	%eax, %r12d
	movq	24(%r15), %rdi
	callq	atoi
	movl	%eax, %r15d
	cmpl	$128, %eax
	jle	.LBB5_3
# %bb.2:
	movl	$.Lstr.5, %edi
	callq	puts@PLT
	movl	$.Lstr.6, %edi
	callq	puts@PLT
.LBB5_3:
	testl	%ebx, %ebx
	jle	.LBB5_6
# %bb.4:
	testl	%r12d, %r12d
	jle	.LBB5_6
# %bb.5:
	testl	%r15d, %r15d
	jle	.LBB5_6
# %bb.7:
	movl	$.Lstr.7, %edi
	callq	puts@PLT
	xorl	%r14d, %r14d
	xorl	%edi, %edi
	callq	time
	movl	%eax, %edi
	callq	srand
	movq	%r12, 88(%rsp)                  # 8-byte Spill
	movl	%r12d, %ebp
	movq	%rbx, 96(%rsp)                  # 8-byte Spill
	imull	%ebx, %ebp
	movl	%r15d, 12(%rsp)                 # 4-byte Spill
	movl	%r15d, %r13d
	leaq	(,%r13,4), %rdi
	callq	malloc
	movq	%rax, %r15
	movslq	%ebp, %rdi
	shlq	$2, %rdi
	callq	malloc
	movq	%rax, %r12
.LBB5_8:                                # =>This Inner Loop Header: Depth=1
	callq	rand
                                        # kill: def $eax killed $eax def $rax
	leal	15(%rax), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	andl	$-16, %ecx
	subl	%ecx, %eax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	%xmm0, (%r15,%r14,4)
	incq	%r14
	cmpq	%r14, %r13
	jne	.LBB5_8
# %bb.9:                                # %.preheader.preheader
	cmpl	$1, %ebp
	movl	%ebp, %r14d
	adcl	$0, %r14d
	xorl	%ebx, %ebx
.LBB5_10:                               # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
                                        # kill: def $eax killed $eax def $rax
	leal	15(%rax), %ecx
	testl	%eax, %eax
	cmovnsl	%eax, %ecx
	andl	$-16, %ecx
	subl	%ecx, %eax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	%xmm0, (%r12,%rbx,4)
	incq	%rbx
	cmpq	%rbx, %r14
	jne	.LBB5_10
# %bb.11:
	movl	%ebp, %eax
	movq	%rax, 80(%rsp)                  # 8-byte Spill
	leaq	(,%rax,4), %rbp
	movq	%rbp, %rdi
	callq	malloc
	movq	%rax, 64(%rsp)                  # 8-byte Spill
	movq	%rbp, %rdi
	callq	malloc
	movq	%rax, 72(%rsp)                  # 8-byte Spill
	movq	%rbp, %rdi
	callq	malloc
	movq	%rax, 40(%rsp)                  # 8-byte Spill
	movq	%rbp, %rdi
	callq	malloc
	movq	%rax, %r14
	leaq	32(%rsp), %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB5_12
# %bb.13:                               # %_Z14__cudaSafeCall10hipError_tPKci.exit
	leaq	24(%rsp), %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	movq	96(%rsp), %rbx                  # 8-byte Reload
	jne	.LBB5_14
# %bb.15:                               # %_Z14__cudaSafeCall10hipError_tPKci.exit97
	leaq	16(%rsp), %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB5_16
# %bb.17:                               # %_Z14__cudaSafeCall10hipError_tPKci.exit99
	movq	%r14, 56(%rsp)                  # 8-byte Spill
	movq	32(%rsp), %rdi
	movq	%r12, %rsi
	movq	%rbp, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB5_18
# %bb.19:                               # %_Z14__cudaSafeCall10hipError_tPKci.exit101
	movl	$d_Kernel, %edi
	movq	%r15, %rsi
	movq	%r13, %rdx
	xorl	%ecx, %ecx
	movl	$1, %r8d
	callq	hipMemcpyToSymbol
	testl	%eax, %eax
	movq	88(%rsp), %r14                  # 8-byte Reload
	jne	.LBB5_20
# %bb.21:                               # %_Z14__cudaSafeCall10hipError_tPKci.exit103
	leal	15(%rbx), %eax
	testl	%ebx, %ebx
	cmovnsl	%ebx, %eax
	sarl	$4, %eax
	leal	15(%r14), %r13d
	testl	%r14d, %r14d
	cmovnsl	%r14d, %r13d
	movabsq	$68719476752, %rbp              # imm = 0x1000000010
	sarl	$4, %r13d
	shlq	$32, %r13
	orq	%rax, %r13
	callq	clock
	movq	%rax, start(%rip)
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB5_23
# %bb.22:
	movq	24(%rsp), %rdi
	movq	32(%rsp), %rsi
	movl	%ebx, %edx
	movl	%r14d, %ecx
	movl	12(%rsp), %r8d                  # 4-byte Reload
	callq	_Z32__device_stub__convolutionRowGPUPfS_iii
.LBB5_23:
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB5_24
# %bb.27:
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB5_28
# %bb.29:                               # %_Z16__cudaCheckErrorPKci.exit
	callq	hipDeviceSynchronize
	callq	clock
	movq	%rax, row(%rip)
	subq	start(%rip), %rax
	cvtsi2sd	%rax, %xmm0
	divsd	.LCPI5_0(%rip), %xmm0
	movl	$.L.str.10, %edi
	movsd	%xmm0, 48(%rsp)                 # 8-byte Spill
	movb	$1, %al
	callq	printf
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%rbp, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	movl	12(%rsp), %ebp                  # 4-byte Reload
	jne	.LBB5_31
# %bb.30:
	movq	16(%rsp), %rdi
	movq	32(%rsp), %rsi
	movl	%ebx, %edx
	movl	%r14d, %ecx
	movl	%ebp, %r8d
	callq	_Z32__device_stub__convolutionColGPUPfS_iii
.LBB5_31:
	callq	hipGetLastError
	testl	%eax, %eax
	movq	80(%rsp), %r13                  # 8-byte Reload
	jne	.LBB5_32
# %bb.34:
	callq	hipDeviceSynchronize
	testl	%eax, %eax
	jne	.LBB5_35
# %bb.36:                               # %_Z16__cudaCheckErrorPKci.exit107
	callq	hipDeviceSynchronize
	movq	24(%rsp), %rsi
	movq	40(%rsp), %rdi                  # 8-byte Reload
	movq	%r13, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB5_37
# %bb.38:                               # %_Z14__cudaSafeCall10hipError_tPKci.exit109
	movq	%r13, %rdx
	movq	16(%rsp), %rsi
	movq	56(%rsp), %r13                  # 8-byte Reload
	movq	%r13, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB5_39
# %bb.40:                               # %_Z14__cudaSafeCall10hipError_tPKci.exit111
	movq	64(%rsp), %rdi                  # 8-byte Reload
	movq	%r15, %rsi
	movq	%r12, %rdx
	movl	%ebx, %ecx
	movl	%r14d, %r8d
	movl	%ebp, %r9d
	callq	_Z17convolutionRowCPUPfS_S_iii
	movq	72(%rsp), %rdi                  # 8-byte Reload
	movq	%r15, %rsi
	movq	%r12, %rdx
	movl	%ebx, %ecx
	movl	%r14d, %r8d
	movl	%ebp, %r9d
	callq	_Z17convolutionColCPUPfS_S_iii
	cvtsi2sd	%ebx, %xmm1
	cvtsi2sd	%r14d, %xmm2
	xorps	%xmm0, %xmm0
	cvtsi2sd	%ebp, %xmm0
	mulsd	%xmm1, %xmm2
	mulsd	%xmm2, %xmm0
	mulsd	.LCPI5_1(%rip), %xmm0
	movsd	48(%rsp), %xmm1                 # 8-byte Reload
                                        # xmm1 = mem[0],zero
	divsd	.LCPI5_2(%rip), %xmm1
	divsd	%xmm1, %xmm0
	movl	$.L.str.11, %edi
	movb	$1, %al
	callq	printf
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movl	$d_Kernel, %edi
	callq	hipFree
	movq	%r15, %rdi
	callq	hipHostFree
	movq	%r12, %rdi
	callq	hipHostFree
	movq	40(%rsp), %rdi                  # 8-byte Reload
	callq	hipHostFree
	movq	%r13, %rdi
	callq	hipHostFree
	jmp	.LBB5_41
.LBB5_43:
	movl	$.Lstr, %edi
	callq	puts@PLT
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	movl	$.Lstr.3, %edi
	callq	puts@PLT
.LBB5_41:
	xorl	%eax, %eax
	jmp	.LBB5_42
.LBB5_6:                                # %_Z11check_inputiii.exit
	movl	$.L.str, %edi
	xorl	%eax, %eax
	callq	printf
	movl	$-1, %eax
.LBB5_42:
	addq	$104, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB5_12:
	.cfi_def_cfa_offset 160
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.12, %esi
	movl	$.L.str.9, %edx
	movq	%rbx, %rdi
	movl	$323, %ecx                      # imm = 0x143
	jmp	.LBB5_26
.LBB5_14:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.12, %esi
	movl	$.L.str.9, %edx
	movq	%rbx, %rdi
	movl	$324, %ecx                      # imm = 0x144
	jmp	.LBB5_26
.LBB5_16:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.12, %esi
	movl	$.L.str.9, %edx
	movq	%rbx, %rdi
	movl	$325, %ecx                      # imm = 0x145
	jmp	.LBB5_26
.LBB5_18:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.12, %esi
	movl	$.L.str.9, %edx
	movq	%rbx, %rdi
	movl	$328, %ecx                      # imm = 0x148
	jmp	.LBB5_26
.LBB5_20:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.12, %esi
	movl	$.L.str.9, %edx
	movq	%rbx, %rdi
	movl	$329, %ecx                      # imm = 0x149
	jmp	.LBB5_26
.LBB5_24:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.13, %esi
	jmp	.LBB5_25
.LBB5_28:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.14, %esi
.LBB5_25:
	movl	$.L.str.9, %edx
	movq	%rbx, %rdi
	movl	$337, %ecx                      # imm = 0x151
	jmp	.LBB5_26
.LBB5_32:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.13, %esi
	jmp	.LBB5_33
.LBB5_35:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.14, %esi
.LBB5_33:
	movl	$.L.str.9, %edx
	movq	%rbx, %rdi
	movl	$345, %ecx                      # imm = 0x159
	jmp	.LBB5_26
.LBB5_37:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.12, %esi
	movl	$.L.str.9, %edx
	movq	%rbx, %rdi
	movl	$351, %ecx                      # imm = 0x15F
	jmp	.LBB5_26
.LBB5_39:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.12, %esi
	movl	$.L.str.9, %edx
	movq	%rbx, %rdi
	movl	$352, %ecx                      # imm = 0x160
.LBB5_26:
	movq	%rax, %r8
	xorl	%eax, %eax
	callq	fprintf
	movl	$-1, %edi
	callq	exit
.Lfunc_end5:
	.size	main, .Lfunc_end5-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB6_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB6_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17convolutionRowGPUPfS_iii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17convolutionColGPUPfS_iii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$0, 8(%rsp)
	movl	$1, (%rsp)
	movl	$d_Kernel, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movl	$1028, %r9d                     # imm = 0x404
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	callq	__hipRegisterVar
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end6:
	.size	__hip_module_ctor, .Lfunc_end6-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB7_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB7_2:
	retq
.Lfunc_end7:
	.size	__hip_module_dtor, .Lfunc_end7-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	d_Kernel,@object                # @d_Kernel
	.local	d_Kernel
	.comm	d_Kernel,1028,16
	.type	start,@object                   # @start
	.bss
	.globl	start
	.p2align	3, 0x0
start:
	.quad	0                               # 0x0
	.size	start, 8

	.type	row,@object                     # @row
	.globl	row
	.p2align	3, 0x0
row:
	.quad	0                               # 0x0
	.size	row, 8

	.type	col,@object                     # @col
	.globl	col
	.p2align	3, 0x0
col:
	.quad	0                               # 0x0
	.size	col, 8

	.type	_Z17convolutionRowGPUPfS_iii,@object # @_Z17convolutionRowGPUPfS_iii
	.section	.rodata,"a",@progbits
	.globl	_Z17convolutionRowGPUPfS_iii
	.p2align	3, 0x0
_Z17convolutionRowGPUPfS_iii:
	.quad	_Z32__device_stub__convolutionRowGPUPfS_iii
	.size	_Z17convolutionRowGPUPfS_iii, 8

	.type	_Z17convolutionColGPUPfS_iii,@object # @_Z17convolutionColGPUPfS_iii
	.globl	_Z17convolutionColGPUPfS_iii
	.p2align	3, 0x0
_Z17convolutionColGPUPfS_iii:
	.quad	_Z32__device_stub__convolutionColGPUPfS_iii
	.size	_Z17convolutionColGPUPfS_iii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Input for dimX, dimY, dimK must larger than 0"
	.size	.L.str, 46

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/CYP0630/CUDA_Practice/master/Convolution2D/convolution2D.hip"
	.size	.L.str.9, 123

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"Row Convolution by using GPU: %f ms.\n"
	.size	.L.str.10, 38

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"Throughput Performance: %f GFLOPs. \n"
	.size	.L.str.11, 37

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"cudaSafeCall() failed at %s:%i : %s\n"
	.size	.L.str.12, 37

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	"cudaCheckError() failed at %s:%i : %s\n"
	.size	.L.str.13, 39

	.type	.L.str.14,@object               # @.str.14
.L.str.14:
	.asciz	"cudaCheckError() with sync failed at %s:%i : %s\n"
	.size	.L.str.14, 49

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z17convolutionRowGPUPfS_iii"
	.size	.L__unnamed_1, 29

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z17convolutionColGPUPfS_iii"
	.size	.L__unnamed_2, 29

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"d_Kernel"
	.size	.L__unnamed_3, 9

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Error input Parameter "
	.size	.Lstr, 23

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"Please Follow Format to Run Program: ./execute_file <dimX> <dimY> <dimK>"
	.size	.Lstr.1, 73

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"Please input <dimX>, <dimY>, <dimK> "
	.size	.Lstr.2, 37

	.type	.Lstr.3,@object                 # @str.3
.Lstr.3:
	.asciz	"dimX and dimY are width and heights for input image and dimK is size for mask "
	.size	.Lstr.3, 79

	.type	.Lstr.4,@object                 # @str.4
.Lstr.4:
	.asciz	"Input Data"
	.size	.Lstr.4, 11

	.type	.Lstr.5,@object                 # @str.5
.Lstr.5:
	.asciz	"Your Mask Size is too large. "
	.size	.Lstr.5, 30

	.type	.Lstr.6,@object                 # @str.6
.Lstr.6:
	.asciz	"We recommend you change a reasonable number. "
	.size	.Lstr.6, 46

	.type	.Lstr.7,@object                 # @str.7
.Lstr.7:
	.asciz	"Input is Valid \n"
	.size	.Lstr.7, 17

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z32__device_stub__convolutionRowGPUPfS_iii
	.addrsig_sym _Z32__device_stub__convolutionColGPUPfS_iii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym d_Kernel
	.addrsig_sym _Z17convolutionRowGPUPfS_iii
	.addrsig_sym _Z17convolutionColGPUPfS_iii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z17convolutionRowGPUPfS_iii ; -- Begin function _Z17convolutionRowGPUPfS_iii
	.globl	_Z17convolutionRowGPUPfS_iii
	.p2align	8
	.type	_Z17convolutionRowGPUPfS_iii,@function
_Z17convolutionRowGPUPfS_iii:           ; @_Z17convolutionRowGPUPfS_iii
; %bb.0:
	s_clause 0x3
	s_load_b32 s5, s[0:1], 0x2c
	s_load_b32 s7, s[0:1], 0x10
	s_load_b32 s4, s[0:1], 0x18
	s_load_b128 s[0:3], s[0:1], 0x0
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v5, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s6, s5, 16
	s_and_b32 s5, s5, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[6:7], null, s15, s6, v[5:6]
	v_mad_u64_u32 v[3:4], null, s14, s5, v[2:3]
	s_mov_b32 s6, exec_lo
	v_mad_u64_u32 v[0:1], null, v6, s7, v[3:4]
	v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v6, 0
	v_cmpx_le_i32_e64 s4, v3
	s_cbranch_execz .LBB0_2
; %bb.1:
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_subrev_nc_u32_e32 v6, s4, v0
	v_ashrrev_i32_e32 v7, 31, v6
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[6:7], 2, v[6:7]
	v_add_co_u32 v6, vcc_lo, s2, v6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v7, vcc_lo, s3, v7, vcc_lo
	global_load_b32 v6, v[6:7], off
.LBB0_2:
	s_or_b32 exec_lo, exec_lo, s6
	s_lshl_b32 s6, s4, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s8, s6, 16
	v_mul_lo_u32 v4, s8, v5
	v_add_nc_u32_e32 v5, s4, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_cmp_gt_i32_e32 vcc_lo, s7, v5
	v_add_lshl_u32 v3, v4, v2, 2
	s_waitcnt vmcnt(0)
	ds_store_b32 v3, v6
	s_and_saveexec_b32 s7, vcc_lo
	s_cbranch_execz .LBB0_4
; %bb.3:
	v_add_nc_u32_e32 v5, s4, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v6, 31, v5
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v5, vcc_lo, s2, v5
	v_add_co_ci_u32_e32 v6, vcc_lo, s3, v6, vcc_lo
	global_load_b32 v1, v[5:6], off
.LBB0_4:
	s_or_b32 exec_lo, exec_lo, s7
	v_lshl_add_u32 v5, s5, 2, v3
	v_mov_b32_e32 v3, 0
	s_cmp_lt_i32 s4, 0
	s_mov_b32 s2, 0
	s_waitcnt vmcnt(0)
	ds_store_b32 v5, v1
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB0_7
; %bb.5:                                ; %.lr.ph
	v_lshlrev_b32_e32 v1, 2, v2
	v_mov_b32_e32 v3, 0
	s_add_i32 s6, s6, 1
	s_delay_alu instid0(VALU_DEP_2)
	v_lshl_add_u32 v1, v4, 2, v1
.LBB0_6:                                ; =>This Inner Loop Header: Depth=1
	s_getpc_b64 s[4:5]
	s_add_u32 s4, s4, d_Kernel@rel32@lo+4
	s_addc_u32 s5, s5, d_Kernel@rel32@hi+12
	s_ashr_i32 s3, s2, 31
	ds_load_b32 v2, v1
	s_lshl_b64 s[8:9], s[2:3], 2
	v_add_nc_u32_e32 v1, 4, v1
	s_add_u32 s4, s8, s4
	s_addc_u32 s5, s9, s5
	s_add_i32 s2, s2, 1
	s_load_b32 s3, s[4:5], 0x0
	s_cmp_eq_u32 s6, s2
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v3, s3, v2
	s_cbranch_scc0 .LBB0_6
.LBB0_7:                                ; %Flow64
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v3, off
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17convolutionRowGPUPfS_iii
		.amdhsa_group_segment_fixed_size 17408
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z17convolutionRowGPUPfS_iii, .Lfunc_end0-_Z17convolutionRowGPUPfS_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 492
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 17408 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.protected	_Z17convolutionColGPUPfS_iii ; -- Begin function _Z17convolutionColGPUPfS_iii
	.globl	_Z17convolutionColGPUPfS_iii
	.p2align	8
	.type	_Z17convolutionColGPUPfS_iii,@function
_Z17convolutionColGPUPfS_iii:           ; @_Z17convolutionColGPUPfS_iii
; %bb.0:
	s_clause 0x1
	s_load_b32 s8, s[0:1], 0x2c
	s_load_b256 s[0:7], s[0:1], 0x0
	v_bfe_u32 v1, v0, 10, 10
	v_mov_b32_e32 v4, 0
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s7, s8, 16
	s_and_b32 s8, s8, 0xffff
	v_mad_u64_u32 v[2:3], null, s15, s7, v[1:2]
	v_and_b32_e32 v3, 0x3ff, v0
	s_mul_i32 s14, s14, s8
	s_mov_b32 s8, exec_lo
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_lo_u32 v5, v2, s4
	v_add3_u32 v0, s14, v3, v5
	v_mov_b32_e32 v5, 0
	v_cmpx_le_i32_e64 s6, v2
	s_cbranch_execz .LBB1_2
; %bb.1:
	s_mul_i32 s9, s6, s4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_subrev_nc_u32_e32 v5, s9, v0
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[5:6], 2, v[5:6]
	v_add_co_u32 v5, vcc_lo, s2, v5
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v6, vcc_lo, s3, v6, vcc_lo
	global_load_b32 v5, v[5:6], off
.LBB1_2:
	s_or_b32 exec_lo, exec_lo, s8
	v_lshlrev_b32_e32 v6, 4, v1
	v_add_nc_u32_e32 v2, s6, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_lshl_u32 v6, v6, v3, 2
	v_cmp_gt_i32_e32 vcc_lo, s5, v2
	s_waitcnt vmcnt(0)
	ds_store_b32 v6, v5
	s_and_saveexec_b32 s5, vcc_lo
	s_cbranch_execz .LBB1_4
; %bb.3:
	v_mad_u64_u32 v[4:5], null, s6, s4, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v5, 31, v4
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s2, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v5, vcc_lo
	global_load_b32 v4, v[4:5], off
.LBB1_4:
	s_or_b32 exec_lo, exec_lo, s5
	v_add_lshl_u32 v2, v1, s7, 4
	s_cmp_lt_i32 s6, 0
	s_delay_alu instid0(VALU_DEP_1)
	v_add_lshl_u32 v5, v2, v3, 2
	v_mov_b32_e32 v2, 0
	s_waitcnt vmcnt(0)
	ds_store_b32 v5, v4
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc1 .LBB1_7
; %bb.5:                                ; %.lr.ph.preheader
	v_lshlrev_b32_e32 v2, 2, v3
	s_lshl_b32 s4, s6, 1
	s_getpc_b64 s[2:3]
	s_add_u32 s2, s2, d_Kernel@rel32@lo+4
	s_addc_u32 s3, s3, d_Kernel@rel32@hi+12
	s_max_i32 s4, s4, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s4, s4, 1
	v_lshl_add_u32 v1, v1, 6, v2
	v_mov_b32_e32 v2, 0
.LBB1_6:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	ds_load_b32 v3, v1
	s_load_b32 s5, s[2:3], 0x0
	s_add_i32 s4, s4, -1
	v_add_nc_u32_e32 v1, 64, v1
	s_add_u32 s2, s2, 4
	s_addc_u32 s3, s3, 0
	s_cmp_eq_u32 s4, 0
	s_waitcnt lgkmcnt(0)
	v_fmac_f32_e32 v2, s5, v3
	s_cbranch_scc0 .LBB1_6
.LBB1_7:                                ; %Flow65
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v2, off
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17convolutionColGPUPfS_iii
		.amdhsa_group_segment_fixed_size 17408
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 7
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z17convolutionColGPUPfS_iii, .Lfunc_end1-_Z17convolutionColGPUPfS_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 480
; NumSgprs: 18
; NumVgprs: 7
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 17408 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 7
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.protected	d_Kernel                ; @d_Kernel
	.type	d_Kernel,@object
	.section	.bss,"aw",@nobits
	.globl	d_Kernel
	.p2align	4, 0x0
d_Kernel:
	.zero	1028
	.size	d_Kernel, 1028

	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym d_Kernel
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 17408
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z17convolutionRowGPUPfS_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z17convolutionRowGPUPfS_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     by_value
      - .offset:         20
        .size:           4
        .value_kind:     by_value
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 17408
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z17convolutionColGPUPfS_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z17convolutionColGPUPfS_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     7
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
