#include <stdio.h>
#include <stdlib.h>
#include <math.h>

// Matrix multiplication: AxB=C

//CUDA kernel. Each thread takes care of one cell of C matrix
__global__ void matmul(double *a, double *b, double *c, int n)
{
  // Get global thread ID
  int Col = blockIdx.x*blockDim.x+threadIdx.x;
  int Row = blockIdx.y*blockDim.y+threadIdx.y;
  // Not out of bounds
  if((Col<n) && (Row<n)) {// Mutliply matrices
    // printf("Hello thread %d\n", threadIdx.x);
    // c[Row*n + Col] = 0;
    double sum = 0.0;
    for(int k=0;k<n;k++) {
      // c[Row*n + Col] += a[Row*n+k]*b[k*n+Col];
      sum += a[Row*n+k]*b[k*n+Col];
    }
    c[Row*n + Col] = sum;
  }
}

extern "C" void matmul_wrapper()
{
  // Size of matrix
  int n = 1000;
  // int n = 3;

  // Host input matrices
  double *h_a;
  double *h_b;
  // Host output matrices
  double *h_c;

  // Device input matrices
  double *d_a;
  double *d_b;
  // Device output matrices
  double *d_c;

  //Size, in bytes, of each array
  size_t bytes = n*n*sizeof(double);

  // Allocate memory for each matrix on host
  h_a = (double*)malloc(bytes);
  h_b = (double*)malloc(bytes);
  h_c = (double*)malloc(bytes);


  // Allocate memory for each matrix on GPU
  cudaMalloc(&d_a, bytes);
  cudaMalloc(&d_b, bytes);
  cudaMalloc(&d_c, bytes);
  printf(" C Memory allocated \n");

  // Initialize vectors on host
  int i;
  int j;
  for(i=0;i<n;i++) {
    for(j=0;j<n;j++) {
      h_a[i*n+j] = (i+1)*(j+1);//sinf(i)*sinf(j);
      h_b[i*n+j] = i-j;//cosf(i)*cosf(j);
    }
  }
  printf(" C Arrays initialized \n");
  // Copy host matrices to device
  cudaMemcpy(d_a,h_a, bytes, cudaMemcpyHostToDevice);
  cudaMemcpy(d_b,h_b, bytes, cudaMemcpyHostToDevice);
  printf(" C Data sent to GPU \n");

  int blockSize, gridSize;
  // Number of threads in each thread block
  // blockSize = 1024;
  blockSize = 32;
  // Number of thread blocks in grid
  gridSize = (int)ceil((double)n/blockSize);

  dim3 dimBlock(blockSize,blockSize);
  dim3 dimGrid(gridSize,gridSize);
  printf("%d\n", gridSize);
  printf("%d\n", blockSize);

  // Execute the kernel
  matmul<<<dimGrid, dimBlock>>>(d_a,d_b,d_c, n);
  printf(" C Kernel executed \n");
  // Copy array back to host
  cudaMemcpy(h_c, d_c, bytes, cudaMemcpyDeviceToHost);
  // h_c[0] = 0.5;
  // h_c[1] = 1.5;
  // h_c[3] = 3.5;

  // CHECK RESULTS for 3x3 MATRIX
  // printf("%f %f %f\n",h_a[0],h_a[1],h_a[2]);
  // printf("%f %f %f\n",h_a[3],h_a[4],h_a[5]);
  // printf("%f %f %f\n",h_a[6],h_a[7],h_a[8]);
  // printf("\n");
  // printf("%f %f %f\n",h_b[0],h_b[1],h_b[2]);
  // printf("%f %f %f\n",h_b[3],h_b[4],h_b[5]);
  // printf("%f %f %f\n",h_b[6],h_b[7],h_b[8]);
  // printf("\n");
  // printf("%f %f %f\n",h_c[0],h_c[1],h_c[2]);
  // printf("%f %f %f\n",h_c[3],h_c[4],h_c[5]);
  // printf("%f %f %f\n",h_c[6],h_c[7],h_c[8]);

  // Release device memory
  cudaFree(d_a);
  cudaFree(d_b);
  cudaFree(d_c);

  // Release host memory
  free(h_a);
  free(h_b);
  free(h_c);
  printf(" C =============== \n");
}

	.file	"tmpxft_0037a42c_00000000-6_matMulWrapperF.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z30__device_stub__Z6matmulPdS_S_iPdS_S_i
	.type	_Z30__device_stub__Z6matmulPdS_S_iPdS_S_i, @function
_Z30__device_stub__Z6matmulPdS_S_iPdS_S_i:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z6matmulPdS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z30__device_stub__Z6matmulPdS_S_iPdS_S_i, .-_Z30__device_stub__Z6matmulPdS_S_iPdS_S_i
	.globl	_Z6matmulPdS_S_i
	.type	_Z6matmulPdS_S_i, @function
_Z6matmulPdS_S_i:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z30__device_stub__Z6matmulPdS_S_iPdS_S_i
	.cfi_endproc
.LFE2053:
	.size	_Z6matmulPdS_S_i, .-_Z6matmulPdS_S_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	" C Memory allocated \n"
.LC1:
	.string	" C Arrays initialized \n"
.LC2:
	.string	" C Data sent to GPU \n"
.LC3:
	.string	"%d\n"
.LC4:
	.string	" C Kernel executed \n"
.LC5:
	.string	" C =============== \n"
	.text
	.globl	matmul_wrapper
	.type	matmul_wrapper, @function
matmul_wrapper:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	$8000000, %edi
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$72, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movl	$8000000, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	movl	$8000000, %edi
	movq	%rax, %rbx
	call	malloc@PLT
	leaq	8(%rsp), %rdi
	movl	$8000000, %esi
	movq	%rax, %r12
	call	cudaMalloc@PLT
	leaq	16(%rsp), %rdi
	movl	$8000000, %esi
	call	cudaMalloc@PLT
	leaq	24(%rsp), %rdi
	movl	$8000000, %esi
	call	cudaMalloc@PLT
	leaq	.LC0(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	xorl	%eax, %eax
.L9:
	imulq	$8000, %rax, %rcx
	leal	1(%rax), %edi
	movl	%eax, %r8d
	xorl	%edx, %edx
	movl	%edi, %esi
.L10:
	cvtsi2sdl	%esi, %xmm0
	movl	%r8d, %r9d
	addl	%edi, %esi
	subl	%edx, %r9d
	incq	%rdx
	movsd	%xmm0, 0(%rbp,%rcx)
	cvtsi2sdl	%r9d, %xmm0
	movsd	%xmm0, (%rbx,%rcx)
	addq	$8, %rcx
	cmpq	$1000, %rdx
	jne	.L10
	incq	%rax
	cmpq	$1000, %rax
	jne	.L9
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$8000000, %edx
	leaq	.LC3(%rip), %r13
	call	cudaMemcpy@PLT
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbx, %rsi
	movl	$8000000, %edx
	call	cudaMemcpy@PLT
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$32, %edx
	movq	%r13, %rsi
	movabsq	$137438953504, %rax
	movq	%rax, 32(%rsp)
	movl	$2, %edi
	movq	%rax, 44(%rsp)
	xorl	%eax, %eax
	movl	$1, 40(%rsp)
	movl	$1, 52(%rsp)
	call	__printf_chk@PLT
	movl	$32, %edx
	movq	%r13, %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	40(%rsp), %ecx
	movl	52(%rsp), %esi
	xorl	%r9d, %r9d
	movq	32(%rsp), %rdx
	movq	44(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L12
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movl	$1000, %ecx
	movq	8(%rsp), %rdi
	call	_Z30__device_stub__Z6matmulPdS_S_iPdS_S_i
.L12:
	leaq	.LC4(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movq	%r12, %rdi
	movl	$8000000, %edx
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	%rbx, %rdi
	call	free@PLT
	movq	%r12, %rdi
	call	free@PLT
	xorl	%eax, %eax
	movl	$2, %edi
	leaq	.LC5(%rip), %rsi
	call	__printf_chk@PLT
	movq	56(%rsp), %rax
	subq	%fs:40, %rax
	je	.L13
	call	__stack_chk_fail@PLT
.L13:
	addq	$72, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	matmul_wrapper, .-matmul_wrapper
	.section	.rodata.str1.1
.LC6:
	.string	"_Z6matmulPdS_S_i"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC6(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z6matmulPdS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>
#include <stdlib.h>
#include <math.h>

// Matrix multiplication: AxB=C

//CUDA kernel. Each thread takes care of one cell of C matrix
__global__ void matmul(double *a, double *b, double *c, int n)
{
  // Get global thread ID
  int Col = blockIdx.x*blockDim.x+threadIdx.x;
  int Row = blockIdx.y*blockDim.y+threadIdx.y;
  // Not out of bounds
  if((Col<n) && (Row<n)) {// Mutliply matrices
    // printf("Hello thread %d\n", threadIdx.x);
    // c[Row*n + Col] = 0;
    double sum = 0.0;
    for(int k=0;k<n;k++) {
      // c[Row*n + Col] += a[Row*n+k]*b[k*n+Col];
      sum += a[Row*n+k]*b[k*n+Col];
    }
    c[Row*n + Col] = sum;
  }
}

extern "C" void matmul_wrapper()
{
  // Size of matrix
  int n = 1000;
  // int n = 3;

  // Host input matrices
  double *h_a;
  double *h_b;
  // Host output matrices
  double *h_c;

  // Device input matrices
  double *d_a;
  double *d_b;
  // Device output matrices
  double *d_c;

  //Size, in bytes, of each array
  size_t bytes = n*n*sizeof(double);

  // Allocate memory for each matrix on host
  h_a = (double*)malloc(bytes);
  h_b = (double*)malloc(bytes);
  h_c = (double*)malloc(bytes);


  // Allocate memory for each matrix on GPU
  hipMalloc(&d_a, bytes);
  hipMalloc(&d_b, bytes);
  hipMalloc(&d_c, bytes);
  printf(" C Memory allocated \n");

  // Initialize vectors on host
  int i;
  int j;
  for(i=0;i<n;i++) {
    for(j=0;j<n;j++) {
      h_a[i*n+j] = (i+1)*(j+1);//sinf(i)*sinf(j);
      h_b[i*n+j] = i-j;//cosf(i)*cosf(j);
    }
  }
  printf(" C Arrays initialized \n");
  // Copy host matrices to device
  hipMemcpy(d_a,h_a, bytes, hipMemcpyHostToDevice);
  hipMemcpy(d_b,h_b, bytes, hipMemcpyHostToDevice);
  printf(" C Data sent to GPU \n");

  int blockSize, gridSize;
  // Number of threads in each thread block
  // blockSize = 1024;
  blockSize = 32;
  // Number of thread blocks in grid
  gridSize = (int)ceil((double)n/blockSize);

  dim3 dimBlock(blockSize,blockSize);
  dim3 dimGrid(gridSize,gridSize);
  printf("%d\n", gridSize);
  printf("%d\n", blockSize);

  // Execute the kernel
  matmul<<<dimGrid, dimBlock>>>(d_a,d_b,d_c, n);
  printf(" C Kernel executed \n");
  // Copy array back to host
  hipMemcpy(h_c, d_c, bytes, hipMemcpyDeviceToHost);
  // h_c[0] = 0.5;
  // h_c[1] = 1.5;
  // h_c[3] = 3.5;

  // CHECK RESULTS for 3x3 MATRIX
  // printf("%f %f %f\n",h_a[0],h_a[1],h_a[2]);
  // printf("%f %f %f\n",h_a[3],h_a[4],h_a[5]);
  // printf("%f %f %f\n",h_a[6],h_a[7],h_a[8]);
  // printf("\n");
  // printf("%f %f %f\n",h_b[0],h_b[1],h_b[2]);
  // printf("%f %f %f\n",h_b[3],h_b[4],h_b[5]);
  // printf("%f %f %f\n",h_b[6],h_b[7],h_b[8]);
  // printf("\n");
  // printf("%f %f %f\n",h_c[0],h_c[1],h_c[2]);
  // printf("%f %f %f\n",h_c[3],h_c[4],h_c[5]);
  // printf("%f %f %f\n",h_c[6],h_c[7],h_c[8]);

  // Release device memory
  hipFree(d_a);
  hipFree(d_b);
  hipFree(d_c);

  // Release host memory
  free(h_a);
  free(h_b);
  free(h_c);
  printf(" C =============== \n");
}

	.text
	.file	"matMulWrapperF.hip"
	.globl	_Z21__device_stub__matmulPdS_S_i # -- Begin function _Z21__device_stub__matmulPdS_S_i
	.type	_Z21__device_stub__matmulPdS_S_i,@function
_Z21__device_stub__matmulPdS_S_i:       # @_Z21__device_stub__matmulPdS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6matmulPdS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z21__device_stub__matmulPdS_S_i, .Lfunc_end0-_Z21__device_stub__matmulPdS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	matmul_wrapper                  # -- Begin function matmul_wrapper
	.type	matmul_wrapper,@function
matmul_wrapper:                         # @matmul_wrapper
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	subq	$32, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$8000000, %edi                  # imm = 0x7A1200
	callq	malloc
	movq	%rax, %rbx
	movl	$8000000, %edi                  # imm = 0x7A1200
	callq	malloc
	movq	%rax, %r14
	movl	$8000000, %edi                  # imm = 0x7A1200
	callq	malloc
	movq	%rax, %r15
	leaq	24(%rsp), %rdi
	movl	$8000000, %esi                  # imm = 0x7A1200
	callq	hipMalloc
	leaq	16(%rsp), %rdi
	movl	$8000000, %esi                  # imm = 0x7A1200
	callq	hipMalloc
	leaq	8(%rsp), %rdi
	movl	$8000000, %esi                  # imm = 0x7A1200
	callq	hipMalloc
	movl	$.Lstr, %edi
	callq	puts@PLT
	movl	$1, %eax
	xorl	%ecx, %ecx
	movl	$8000, %edx                     # imm = 0x1F40
	movq	%rbx, %rsi
	movq	%r14, %rdi
.LBB1_1:                                # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_2 Depth 2
	movl	%ecx, %r8d
	incq	%rcx
	movl	%eax, %r9d
	xorl	%r10d, %r10d
.LBB1_2:                                #   Parent Loop BB1_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	xorps	%xmm0, %xmm0
	cvtsi2sd	%r9d, %xmm0
	movsd	%xmm0, (%rsi,%r10,8)
	xorps	%xmm0, %xmm0
	cvtsi2sd	%r8d, %xmm0
	movsd	%xmm0, (%rdi,%r10,8)
	leaq	1(%r10), %r11
	decl	%r8d
	addl	%eax, %r9d
	movq	%r11, %r10
	cmpq	$1000, %r11                     # imm = 0x3E8
	jne	.LBB1_2
# %bb.3:                                #   in Loop: Header=BB1_1 Depth=1
	addq	%rdx, %rdi
	addq	%rdx, %rsi
	incl	%eax
	cmpq	$1000, %rcx                     # imm = 0x3E8
	jne	.LBB1_1
# %bb.4:
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	movq	24(%rsp), %rdi
	movl	$8000000, %edx                  # imm = 0x7A1200
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movq	16(%rsp), %rdi
	movl	$8000000, %edx                  # imm = 0x7A1200
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	movl	$.L.str.3, %edi
	movl	$32, %esi
	xorl	%eax, %eax
	callq	printf
	movl	$.L.str.3, %edi
	movl	$32, %esi
	xorl	%eax, %eax
	callq	printf
	movabsq	$137438953504, %rdi             # imm = 0x2000000020
	movl	$1, %esi
	movq	%rdi, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_6
# %bb.5:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	movl	$1000, %ecx                     # imm = 0x3E8
	callq	_Z21__device_stub__matmulPdS_S_i
.LBB1_6:
	movl	$.Lstr.3, %edi
	callq	puts@PLT
	movq	8(%rsp), %rsi
	movl	$8000000, %edx                  # imm = 0x7A1200
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	movl	$.Lstr.4, %edi
	callq	puts@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	matmul_wrapper, .Lfunc_end1-matmul_wrapper
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6matmulPdS_S_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z6matmulPdS_S_i,@object        # @_Z6matmulPdS_S_i
	.section	.rodata,"a",@progbits
	.globl	_Z6matmulPdS_S_i
	.p2align	3, 0x0
_Z6matmulPdS_S_i:
	.quad	_Z21__device_stub__matmulPdS_S_i
	.size	_Z6matmulPdS_S_i, 8

	.type	.L.str.3,@object                # @.str.3
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.3:
	.asciz	"%d\n"
	.size	.L.str.3, 4

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z6matmulPdS_S_i"
	.size	.L__unnamed_1, 17

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	" C Memory allocated "
	.size	.Lstr, 21

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	" C Arrays initialized "
	.size	.Lstr.1, 23

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	" C Data sent to GPU "
	.size	.Lstr.2, 21

	.type	.Lstr.3,@object                 # @str.3
.Lstr.3:
	.asciz	" C Kernel executed "
	.size	.Lstr.3, 20

	.type	.Lstr.4,@object                 # @str.4
.Lstr.4:
	.asciz	" C =============== "
	.size	.Lstr.4, 20

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__matmulPdS_S_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z6matmulPdS_S_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z6matmulPdS_S_i        ; -- Begin function _Z6matmulPdS_S_i
	.globl	_Z6matmulPdS_S_i
	.p2align	8
	.type	_Z6matmulPdS_S_i,@function
_Z6matmulPdS_S_i:                       ; @_Z6matmulPdS_S_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s3, s[0:1], 0x2c
	s_load_b32 s2, s[0:1], 0x18
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s4, s3, 16
	s_and_b32 s3, s3, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s3, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s4, v[3:4]
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_i32_e32 v2, v0, v1
	v_cmpx_gt_i32_e64 s2, v2
	s_cbranch_execz .LBB0_6
; %bb.1:                                ; %.preheader
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	v_mul_lo_u32 v1, v1, s2
	s_cmp_lt_i32 s2, 1
	s_cbranch_scc1 .LBB0_4
; %bb.2:                                ; %.lr.ph.preheader
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v2, 31, v1
	s_mov_b32 s3, s2
	v_mov_b32_e32 v6, v0
	v_lshlrev_b64 v[4:5], 3, v[1:2]
	v_mov_b32_e32 v2, 0
	v_mov_b32_e32 v3, 0
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v4, vcc_lo, s4, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v5, vcc_lo
.LBB0_3:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v7, 31, v6
	s_add_i32 s3, s3, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_eq_u32 s3, 0
	v_lshlrev_b64 v[7:8], 3, v[6:7]
	v_add_nc_u32_e32 v6, s2, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v7, vcc_lo, s6, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v8, vcc_lo
	global_load_b64 v[9:10], v[4:5], off
	global_load_b64 v[7:8], v[7:8], off
	v_add_co_u32 v4, vcc_lo, v4, 8
	v_add_co_ci_u32_e32 v5, vcc_lo, 0, v5, vcc_lo
	s_waitcnt vmcnt(0)
	v_fma_f64 v[2:3], v[9:10], v[7:8], v[2:3]
	s_cbranch_scc0 .LBB0_3
	s_branch .LBB0_5
.LBB0_4:
	v_mov_b32_e32 v2, 0
	v_mov_b32_e32 v3, 0
.LBB0_5:                                ; %Flow46
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v1, v0
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 3, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b64 v[0:1], v[2:3], off
.LBB0_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6matmulPdS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 11
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z6matmulPdS_S_i, .Lfunc_end0-_Z6matmulPdS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 348
; NumSgprs: 18
; NumVgprs: 11
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 11
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6matmulPdS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z6matmulPdS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     11
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
