#include <stdio.h>


// Replace this with the saxpy from cuBlas or whatever?
// I doubt it matters, but it's definitely weird to have this
void __device__
saxpy(float* X, const float* Y, float scale, int n)
{
    for (int i=0; i < n; ++i) 
        X[i] += Y[i] * scale;
}


void __global__
maxout(float* best__bo, int* which__bo,
        const float* cands__bop, int B, int O, int P)
{
    int b = blockIdx.x * blockDim.x + threadIdx.x; 
    if (b >= B) return;

    for (int o=0; o < O; ++o)
    {
        which__bo[0] = 0;
        best__bo[0] = cands__bop[0];
        cands__bop += 1;
        for (int p=1; p < P; ++p)
	{
            if (cands__bop[0] > best__bo[0])
	    {
                which__bo[0] = p;
                best__bo[0] = cands__bop[0];
	    }
            cands__bop += 1;
	}
        best__bo += 1;
        which__bo += 1;
    }
}


void __global__
mean_pool(float* means__bo,
    const float* X__to, const int* lengths__b, int B, int T, int O)
{
    // Compute means of a batch of concatenated sequences, using the lengths.'''
    int b = blockIdx.x; // Batch-item we're averaging
    if (b >= B) return;

    // Go to the regions we're working on
    for (int i=0; i < b; ++i) {
        means__bo += O;
	X__to += lengths__b[i] * O;
    }

    int length = lengths__b[b];
    // Each invocation of the kernel averages one batch.
    float scale = 1. / length;
    for (int _=0; _ < length; ++_) // Iterate over rows
    {
        saxpy(means__bo, X__to, scale, O);
        X__to += O;
    }
}


void __global__
sum_pool(float* sums__bo,
    const float* X__to, const int* lengths__b, int B, int T, int O)
{
    // Compute sums of a batch of concatenated sequences, using the lengths.'''
    int b = blockIdx.x; // Batch-item we're summing
    if (b >= B) return;

    // Go to the regions we're working on
    for (int i=0; i < b; ++i) {
        sums__bo += O;
	X__to += lengths__b[i] * O;
    }

    int length = lengths__b[b];
    // Each invocation of the kernel sums one batch.
    for (int _=0; _ < length; ++_) // Iterate over rows
    {
        saxpy(sums__bo, X__to, 1.0, O);
        X__to += O;
    }
}


void __global__
max_pool(float* maxes__bo, int* which__bo,
    const float* X__to, const int* lengths__b, int B, int T, int O)
{
    // Compute means of a batch of concatenated sequences, using the lengths.'''
    int b = blockIdx.x; // Batch-item we're averaging
    if (b >= B) return;

    // Go to the regions we're working on
    for (int i=0; i < b; ++i) {
        maxes__bo += O;
	which__bo += O;
	X__to += lengths__b[i] * O;
    }

    // Each invocation of the kernel maxes one batch.
    // Start by assuming maxes are at i=0
    for (int j=0; j < O; ++j) {
        maxes__bo[j] = X__to[j];
	which__bo[j] = 0;
    }
    X__to += O;
    
    int length = lengths__b[b];
    for (int i=1; i < length; ++i) // Iterate over rows
    {
        for (int j=0; j < O; ++j)
	{
            if (X__to[j] > maxes__bo[j])
            {
                maxes__bo[j] = X__to[j];
                which__bo[j] = i;
	    }
	}
	X__to += O;
    }
}


void __global__
backprop_mean_pool(float* dX__to, const float* d_means__bo, const int* lengths__b,
    int B, int T, int O)
{
    int b = blockIdx.x; // Batch-item we're averaging
    if (b >= B) return;
    
    // Go to the regions we're working on
    for (int i=0; i < b; ++i) {
        d_means__bo += O;
	dX__to += lengths__b[i] * O;
    }

    int length = lengths__b[b];
    float scale = 1./ length;
    
    for (int _=0; _ < length; _++)
    {
        saxpy(dX__to, d_means__bo, scale, O);
        dX__to += O;
    }
}


void __global__
backprop_sum_pool(float* dX__to, const float* d_sum__bo, const int* lengths__b,
    int B, int T, int O)
{
    int b = blockIdx.x; // Batch-item we're averaging
    if (b >= B) return;
    
    // Go to the regions we're working on
    for (int i=0; i < b; ++i) {
        d_sum__bo += O;
	dX__to += lengths__b[i] * O;
    }

    int length = lengths__b[b];
    
    for (int _=0; _ < length; _++)
    {
        saxpy(dX__to, d_sum__bo, 1.0, O);
        dX__to += O;
    }
}


void __global__
backprop_max_pool(float* dX__to,
    const float* d_maxes__bo, const int* which__bo, const int* lengths__b, int B, int T, int O)
{
    int b = blockIdx.x; // Batch-item we're averaging
    if (b >= B) return;
    
    // Go to the regions we're working on
    for (int i=0; i < b; ++i) {
        d_maxes__bo += O;
	which__bo += O;
	dX__to += lengths__b[i] * O;
    }

    int length = lengths__b[b];
 
    for (int i=0; i < length; ++i)
    {
       for (int j=0; j < O; ++j)
       {
         if (which__bo[j] == i)
           dX__to[j] += d_maxes__bo[j];
       }
       dX__to += O;
    }
}

	.file	"tmpxft_0027e26f_00000000-6__kernels.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z5saxpyPfPKffi
	.type	_Z5saxpyPfPKffi, @function
_Z5saxpyPfPKffi:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2027:
	.size	_Z5saxpyPfPKffi, .-_Z5saxpyPfPKffi
	.globl	_Z33__device_stub__Z6maxoutPfPiPKfiiiPfPiPKfiii
	.type	_Z33__device_stub__Z6maxoutPfPiPKfiiiPfPiPKfiii, @function
_Z33__device_stub__Z6maxoutPfPiPKfiiiPfPiPKfiii:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L4
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z6maxoutPfPiPKfiii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L4:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L6
	call	__stack_chk_fail@PLT
.L6:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z33__device_stub__Z6maxoutPfPiPKfiiiPfPiPKfiii, .-_Z33__device_stub__Z6maxoutPfPiPKfiiiPfPiPKfiii
	.globl	_Z6maxoutPfPiPKfiii
	.type	_Z6maxoutPfPiPKfiii, @function
_Z6maxoutPfPiPKfiii:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z33__device_stub__Z6maxoutPfPiPKfiiiPfPiPKfiii
	.cfi_endproc
.LFE2053:
	.size	_Z6maxoutPfPiPKfiii, .-_Z6maxoutPfPiPKfiii
	.globl	_Z37__device_stub__Z9mean_poolPfPKfPKiiiiPfPKfPKiiii
	.type	_Z37__device_stub__Z9mean_poolPfPKfPKiiiiPfPKfPKiiii, @function
_Z37__device_stub__Z9mean_poolPfPKfPKiiiiPfPKfPKiiii:
.LFB2054:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L10
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z9mean_poolPfPKfPKiiii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L10:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L12
	call	__stack_chk_fail@PLT
.L12:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2054:
	.size	_Z37__device_stub__Z9mean_poolPfPKfPKiiiiPfPKfPKiiii, .-_Z37__device_stub__Z9mean_poolPfPKfPKiiiiPfPKfPKiiii
	.globl	_Z9mean_poolPfPKfPKiiii
	.type	_Z9mean_poolPfPKfPKiiii, @function
_Z9mean_poolPfPKfPKiiii:
.LFB2055:
	.cfi_startproc
	endbr64
	jmp	_Z37__device_stub__Z9mean_poolPfPKfPKiiiiPfPKfPKiiii
	.cfi_endproc
.LFE2055:
	.size	_Z9mean_poolPfPKfPKiiii, .-_Z9mean_poolPfPKfPKiiii
	.globl	_Z36__device_stub__Z8sum_poolPfPKfPKiiiiPfPKfPKiiii
	.type	_Z36__device_stub__Z8sum_poolPfPKfPKiiiiPfPKfPKiiii, @function
_Z36__device_stub__Z8sum_poolPfPKfPKiiiiPfPKfPKiiii:
.LFB2056:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z8sum_poolPfPKfPKiiii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L15:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L17
	call	__stack_chk_fail@PLT
.L17:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2056:
	.size	_Z36__device_stub__Z8sum_poolPfPKfPKiiiiPfPKfPKiiii, .-_Z36__device_stub__Z8sum_poolPfPKfPKiiiiPfPKfPKiiii
	.globl	_Z8sum_poolPfPKfPKiiii
	.type	_Z8sum_poolPfPKfPKiiii, @function
_Z8sum_poolPfPKfPKiiii:
.LFB2057:
	.cfi_startproc
	endbr64
	jmp	_Z36__device_stub__Z8sum_poolPfPKfPKiiiiPfPKfPKiiii
	.cfi_endproc
.LFE2057:
	.size	_Z8sum_poolPfPKfPKiiii, .-_Z8sum_poolPfPKfPKiiii
	.globl	_Z38__device_stub__Z8max_poolPfPiPKfPKiiiiPfPiPKfPKiiii
	.type	_Z38__device_stub__Z8max_poolPfPiPKfPKiiiiPfPiPKfPKiiii, @function
_Z38__device_stub__Z8max_poolPfPiPKfPKiiiiPfPiPKfPKiiii:
.LFB2058:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movl	%r9d, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	192(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L20
	pushq	56(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z8max_poolPfPiPKfPKiiii(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 208
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L20:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L22
	call	__stack_chk_fail@PLT
.L22:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2058:
	.size	_Z38__device_stub__Z8max_poolPfPiPKfPKiiiiPfPiPKfPKiiii, .-_Z38__device_stub__Z8max_poolPfPiPKfPKiiiiPfPiPKfPKiiii
	.globl	_Z8max_poolPfPiPKfPKiiii
	.type	_Z8max_poolPfPiPKfPKiiii, @function
_Z8max_poolPfPiPKfPKiiii:
.LFB2059:
	.cfi_startproc
	endbr64
	jmp	_Z38__device_stub__Z8max_poolPfPiPKfPKiiiiPfPiPKfPKiiii
	.cfi_endproc
.LFE2059:
	.size	_Z8max_poolPfPiPKfPKiiii, .-_Z8max_poolPfPiPKfPKiiii
	.globl	_Z47__device_stub__Z18backprop_mean_poolPfPKfPKiiiiPfPKfPKiiii
	.type	_Z47__device_stub__Z18backprop_mean_poolPfPKfPKiiiiPfPKfPKiiii, @function
_Z47__device_stub__Z18backprop_mean_poolPfPKfPKiiiiPfPKfPKiiii:
.LFB2060:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L25
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z18backprop_mean_poolPfPKfPKiiii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L25:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L27
	call	__stack_chk_fail@PLT
.L27:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2060:
	.size	_Z47__device_stub__Z18backprop_mean_poolPfPKfPKiiiiPfPKfPKiiii, .-_Z47__device_stub__Z18backprop_mean_poolPfPKfPKiiiiPfPKfPKiiii
	.globl	_Z18backprop_mean_poolPfPKfPKiiii
	.type	_Z18backprop_mean_poolPfPKfPKiiii, @function
_Z18backprop_mean_poolPfPKfPKiiii:
.LFB2061:
	.cfi_startproc
	endbr64
	jmp	_Z47__device_stub__Z18backprop_mean_poolPfPKfPKiiiiPfPKfPKiiii
	.cfi_endproc
.LFE2061:
	.size	_Z18backprop_mean_poolPfPKfPKiiii, .-_Z18backprop_mean_poolPfPKfPKiiii
	.globl	_Z46__device_stub__Z17backprop_sum_poolPfPKfPKiiiiPfPKfPKiiii
	.type	_Z46__device_stub__Z17backprop_sum_poolPfPKfPKiiiiPfPKfPKiiii, @function
_Z46__device_stub__Z17backprop_sum_poolPfPKfPKiiiiPfPKfPKiiii:
.LFB2062:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L30
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z17backprop_sum_poolPfPKfPKiiii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L30:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L32
	call	__stack_chk_fail@PLT
.L32:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2062:
	.size	_Z46__device_stub__Z17backprop_sum_poolPfPKfPKiiiiPfPKfPKiiii, .-_Z46__device_stub__Z17backprop_sum_poolPfPKfPKiiiiPfPKfPKiiii
	.globl	_Z17backprop_sum_poolPfPKfPKiiii
	.type	_Z17backprop_sum_poolPfPKfPKiiii, @function
_Z17backprop_sum_poolPfPKfPKiiii:
.LFB2063:
	.cfi_startproc
	endbr64
	jmp	_Z46__device_stub__Z17backprop_sum_poolPfPKfPKiiiiPfPKfPKiiii
	.cfi_endproc
.LFE2063:
	.size	_Z17backprop_sum_poolPfPKfPKiiii, .-_Z17backprop_sum_poolPfPKfPKiiii
	.globl	_Z49__device_stub__Z17backprop_max_poolPfPKfPKiS3_iiiPfPKfPKiS3_iii
	.type	_Z49__device_stub__Z17backprop_max_poolPfPKfPKiS3_iiiPfPKfPKiS3_iii, @function
_Z49__device_stub__Z17backprop_max_poolPfPKfPKiS3_iiiPfPKfPKiS3_iii:
.LFB2064:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	64(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	76(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	48(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	56(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movl	%r9d, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 72(%rsp)
	movq	%rax, 112(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	192(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 64(%rsp)
	movq	%rax, 76(%rsp)
	movl	$1, 84(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L35
	pushq	56(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z17backprop_max_poolPfPKfPKiS3_iii(%rip), %rdi
	pushq	56(%rsp)
	.cfi_def_cfa_offset 208
	movq	92(%rsp), %rcx
	movl	100(%rsp), %r8d
	movq	80(%rsp), %rsi
	movl	88(%rsp), %edx
	leaq	128(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L35:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L37
	call	__stack_chk_fail@PLT
.L37:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2064:
	.size	_Z49__device_stub__Z17backprop_max_poolPfPKfPKiS3_iiiPfPKfPKiS3_iii, .-_Z49__device_stub__Z17backprop_max_poolPfPKfPKiS3_iiiPfPKfPKiS3_iii
	.globl	_Z17backprop_max_poolPfPKfPKiS3_iii
	.type	_Z17backprop_max_poolPfPKfPKiS3_iii, @function
_Z17backprop_max_poolPfPKfPKiS3_iii:
.LFB2065:
	.cfi_startproc
	endbr64
	jmp	_Z49__device_stub__Z17backprop_max_poolPfPKfPKiS3_iiiPfPKfPKiS3_iii
	.cfi_endproc
.LFE2065:
	.size	_Z17backprop_max_poolPfPKfPKiS3_iii, .-_Z17backprop_max_poolPfPKfPKiS3_iii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z17backprop_max_poolPfPKfPKiS3_iii"
.LC1:
	.string	"_Z17backprop_sum_poolPfPKfPKiiii"
.LC2:
	.string	"_Z18backprop_mean_poolPfPKfPKiiii"
.LC3:
	.string	"_Z8max_poolPfPiPKfPKiiii"
.LC4:
	.string	"_Z8sum_poolPfPKfPKiiii"
.LC5:
	.string	"_Z9mean_poolPfPKfPKiiii"
.LC6:
	.string	"_Z6maxoutPfPiPKfiii"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2067:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z17backprop_max_poolPfPKfPKiS3_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC1(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z17backprop_sum_poolPfPKfPKiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC2(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z18backprop_mean_poolPfPKfPKiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC3(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z8max_poolPfPiPKfPKiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC4(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z8sum_poolPfPKfPKiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC5(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z9mean_poolPfPKfPKiiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC6(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z6maxoutPfPiPKfiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2067:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>


// Replace this with the saxpy from cuBlas or whatever?
// I doubt it matters, but it's definitely weird to have this
void __device__
saxpy(float* X, const float* Y, float scale, int n)
{
    for (int i=0; i < n; ++i) 
        X[i] += Y[i] * scale;
}


void __global__
maxout(float* best__bo, int* which__bo,
        const float* cands__bop, int B, int O, int P)
{
    int b = blockIdx.x * blockDim.x + threadIdx.x; 
    if (b >= B) return;

    for (int o=0; o < O; ++o)
    {
        which__bo[0] = 0;
        best__bo[0] = cands__bop[0];
        cands__bop += 1;
        for (int p=1; p < P; ++p)
	{
            if (cands__bop[0] > best__bo[0])
	    {
                which__bo[0] = p;
                best__bo[0] = cands__bop[0];
	    }
            cands__bop += 1;
	}
        best__bo += 1;
        which__bo += 1;
    }
}


void __global__
mean_pool(float* means__bo,
    const float* X__to, const int* lengths__b, int B, int T, int O)
{
    // Compute means of a batch of concatenated sequences, using the lengths.'''
    int b = blockIdx.x; // Batch-item we're averaging
    if (b >= B) return;

    // Go to the regions we're working on
    for (int i=0; i < b; ++i) {
        means__bo += O;
	X__to += lengths__b[i] * O;
    }

    int length = lengths__b[b];
    // Each invocation of the kernel averages one batch.
    float scale = 1. / length;
    for (int _=0; _ < length; ++_) // Iterate over rows
    {
        saxpy(means__bo, X__to, scale, O);
        X__to += O;
    }
}


void __global__
sum_pool(float* sums__bo,
    const float* X__to, const int* lengths__b, int B, int T, int O)
{
    // Compute sums of a batch of concatenated sequences, using the lengths.'''
    int b = blockIdx.x; // Batch-item we're summing
    if (b >= B) return;

    // Go to the regions we're working on
    for (int i=0; i < b; ++i) {
        sums__bo += O;
	X__to += lengths__b[i] * O;
    }

    int length = lengths__b[b];
    // Each invocation of the kernel sums one batch.
    for (int _=0; _ < length; ++_) // Iterate over rows
    {
        saxpy(sums__bo, X__to, 1.0, O);
        X__to += O;
    }
}


void __global__
max_pool(float* maxes__bo, int* which__bo,
    const float* X__to, const int* lengths__b, int B, int T, int O)
{
    // Compute means of a batch of concatenated sequences, using the lengths.'''
    int b = blockIdx.x; // Batch-item we're averaging
    if (b >= B) return;

    // Go to the regions we're working on
    for (int i=0; i < b; ++i) {
        maxes__bo += O;
	which__bo += O;
	X__to += lengths__b[i] * O;
    }

    // Each invocation of the kernel maxes one batch.
    // Start by assuming maxes are at i=0
    for (int j=0; j < O; ++j) {
        maxes__bo[j] = X__to[j];
	which__bo[j] = 0;
    }
    X__to += O;
    
    int length = lengths__b[b];
    for (int i=1; i < length; ++i) // Iterate over rows
    {
        for (int j=0; j < O; ++j)
	{
            if (X__to[j] > maxes__bo[j])
            {
                maxes__bo[j] = X__to[j];
                which__bo[j] = i;
	    }
	}
	X__to += O;
    }
}


void __global__
backprop_mean_pool(float* dX__to, const float* d_means__bo, const int* lengths__b,
    int B, int T, int O)
{
    int b = blockIdx.x; // Batch-item we're averaging
    if (b >= B) return;
    
    // Go to the regions we're working on
    for (int i=0; i < b; ++i) {
        d_means__bo += O;
	dX__to += lengths__b[i] * O;
    }

    int length = lengths__b[b];
    float scale = 1./ length;
    
    for (int _=0; _ < length; _++)
    {
        saxpy(dX__to, d_means__bo, scale, O);
        dX__to += O;
    }
}


void __global__
backprop_sum_pool(float* dX__to, const float* d_sum__bo, const int* lengths__b,
    int B, int T, int O)
{
    int b = blockIdx.x; // Batch-item we're averaging
    if (b >= B) return;
    
    // Go to the regions we're working on
    for (int i=0; i < b; ++i) {
        d_sum__bo += O;
	dX__to += lengths__b[i] * O;
    }

    int length = lengths__b[b];
    
    for (int _=0; _ < length; _++)
    {
        saxpy(dX__to, d_sum__bo, 1.0, O);
        dX__to += O;
    }
}


void __global__
backprop_max_pool(float* dX__to,
    const float* d_maxes__bo, const int* which__bo, const int* lengths__b, int B, int T, int O)
{
    int b = blockIdx.x; // Batch-item we're averaging
    if (b >= B) return;
    
    // Go to the regions we're working on
    for (int i=0; i < b; ++i) {
        d_maxes__bo += O;
	which__bo += O;
	dX__to += lengths__b[i] * O;
    }

    int length = lengths__b[b];
 
    for (int i=0; i < length; ++i)
    {
       for (int j=0; j < O; ++j)
       {
         if (which__bo[j] == i)
           dX__to[j] += d_maxes__bo[j];
       }
       dX__to += O;
    }
}

	.text
	.file	"_kernels.hip"
	.globl	_Z21__device_stub__maxoutPfPiPKfiii # -- Begin function _Z21__device_stub__maxoutPfPiPKfiii
	.type	_Z21__device_stub__maxoutPfPiPKfiii,@function
_Z21__device_stub__maxoutPfPiPKfiii:    # @_Z21__device_stub__maxoutPfPiPKfiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6maxoutPfPiPKfiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z21__device_stub__maxoutPfPiPKfiii, .Lfunc_end0-_Z21__device_stub__maxoutPfPiPKfiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z24__device_stub__mean_poolPfPKfPKiiii # -- Begin function _Z24__device_stub__mean_poolPfPKfPKiiii
	.type	_Z24__device_stub__mean_poolPfPKfPKiiii,@function
_Z24__device_stub__mean_poolPfPKfPKiiii: # @_Z24__device_stub__mean_poolPfPKfPKiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z9mean_poolPfPKfPKiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z24__device_stub__mean_poolPfPKfPKiiii, .Lfunc_end1-_Z24__device_stub__mean_poolPfPKfPKiiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z23__device_stub__sum_poolPfPKfPKiiii # -- Begin function _Z23__device_stub__sum_poolPfPKfPKiiii
	.type	_Z23__device_stub__sum_poolPfPKfPKiiii,@function
_Z23__device_stub__sum_poolPfPKfPKiiii: # @_Z23__device_stub__sum_poolPfPKfPKiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8sum_poolPfPKfPKiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z23__device_stub__sum_poolPfPKfPKiiii, .Lfunc_end2-_Z23__device_stub__sum_poolPfPKfPKiiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z23__device_stub__max_poolPfPiPKfPKiiii # -- Begin function _Z23__device_stub__max_poolPfPiPKfPKiiii
	.type	_Z23__device_stub__max_poolPfPiPKfPKiiii,@function
_Z23__device_stub__max_poolPfPiPKfPKiiii: # @_Z23__device_stub__max_poolPfPiPKfPKiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8max_poolPfPiPKfPKiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	_Z23__device_stub__max_poolPfPiPKfPKiiii, .Lfunc_end3-_Z23__device_stub__max_poolPfPiPKfPKiiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z33__device_stub__backprop_mean_poolPfPKfPKiiii # -- Begin function _Z33__device_stub__backprop_mean_poolPfPKfPKiiii
	.type	_Z33__device_stub__backprop_mean_poolPfPKfPKiiii,@function
_Z33__device_stub__backprop_mean_poolPfPKfPKiiii: # @_Z33__device_stub__backprop_mean_poolPfPKfPKiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z18backprop_mean_poolPfPKfPKiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z33__device_stub__backprop_mean_poolPfPKfPKiiii, .Lfunc_end4-_Z33__device_stub__backprop_mean_poolPfPKfPKiiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z32__device_stub__backprop_sum_poolPfPKfPKiiii # -- Begin function _Z32__device_stub__backprop_sum_poolPfPKfPKiiii
	.type	_Z32__device_stub__backprop_sum_poolPfPKfPKiiii,@function
_Z32__device_stub__backprop_sum_poolPfPKfPKiiii: # @_Z32__device_stub__backprop_sum_poolPfPKfPKiiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17backprop_sum_poolPfPKfPKiiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end5:
	.size	_Z32__device_stub__backprop_sum_poolPfPKfPKiiii, .Lfunc_end5-_Z32__device_stub__backprop_sum_poolPfPKfPKiiii
	.cfi_endproc
                                        # -- End function
	.globl	_Z32__device_stub__backprop_max_poolPfPKfPKiS3_iii # -- Begin function _Z32__device_stub__backprop_max_poolPfPKfPKiS3_iii
	.type	_Z32__device_stub__backprop_max_poolPfPKfPKiS3_iii,@function
_Z32__device_stub__backprop_max_poolPfPKfPKiS3_iii: # @_Z32__device_stub__backprop_max_poolPfPKfPKiS3_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z17backprop_max_poolPfPKfPKiS3_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z32__device_stub__backprop_max_poolPfPKfPKiS3_iii, .Lfunc_end6-_Z32__device_stub__backprop_max_poolPfPKfPKiS3_iii
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB7_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB7_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6maxoutPfPiPKfiii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z9mean_poolPfPKfPKiiii, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8sum_poolPfPKfPKiiii, %esi
	movl	$.L__unnamed_3, %edx
	movl	$.L__unnamed_3, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8max_poolPfPiPKfPKiiii, %esi
	movl	$.L__unnamed_4, %edx
	movl	$.L__unnamed_4, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z18backprop_mean_poolPfPKfPKiiii, %esi
	movl	$.L__unnamed_5, %edx
	movl	$.L__unnamed_5, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17backprop_sum_poolPfPKfPKiiii, %esi
	movl	$.L__unnamed_6, %edx
	movl	$.L__unnamed_6, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z17backprop_max_poolPfPKfPKiS3_iii, %esi
	movl	$.L__unnamed_7, %edx
	movl	$.L__unnamed_7, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end7:
	.size	__hip_module_ctor, .Lfunc_end7-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB8_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB8_2:
	retq
.Lfunc_end8:
	.size	__hip_module_dtor, .Lfunc_end8-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z6maxoutPfPiPKfiii,@object     # @_Z6maxoutPfPiPKfiii
	.section	.rodata,"a",@progbits
	.globl	_Z6maxoutPfPiPKfiii
	.p2align	3, 0x0
_Z6maxoutPfPiPKfiii:
	.quad	_Z21__device_stub__maxoutPfPiPKfiii
	.size	_Z6maxoutPfPiPKfiii, 8

	.type	_Z9mean_poolPfPKfPKiiii,@object # @_Z9mean_poolPfPKfPKiiii
	.globl	_Z9mean_poolPfPKfPKiiii
	.p2align	3, 0x0
_Z9mean_poolPfPKfPKiiii:
	.quad	_Z24__device_stub__mean_poolPfPKfPKiiii
	.size	_Z9mean_poolPfPKfPKiiii, 8

	.type	_Z8sum_poolPfPKfPKiiii,@object  # @_Z8sum_poolPfPKfPKiiii
	.globl	_Z8sum_poolPfPKfPKiiii
	.p2align	3, 0x0
_Z8sum_poolPfPKfPKiiii:
	.quad	_Z23__device_stub__sum_poolPfPKfPKiiii
	.size	_Z8sum_poolPfPKfPKiiii, 8

	.type	_Z8max_poolPfPiPKfPKiiii,@object # @_Z8max_poolPfPiPKfPKiiii
	.globl	_Z8max_poolPfPiPKfPKiiii
	.p2align	3, 0x0
_Z8max_poolPfPiPKfPKiiii:
	.quad	_Z23__device_stub__max_poolPfPiPKfPKiiii
	.size	_Z8max_poolPfPiPKfPKiiii, 8

	.type	_Z18backprop_mean_poolPfPKfPKiiii,@object # @_Z18backprop_mean_poolPfPKfPKiiii
	.globl	_Z18backprop_mean_poolPfPKfPKiiii
	.p2align	3, 0x0
_Z18backprop_mean_poolPfPKfPKiiii:
	.quad	_Z33__device_stub__backprop_mean_poolPfPKfPKiiii
	.size	_Z18backprop_mean_poolPfPKfPKiiii, 8

	.type	_Z17backprop_sum_poolPfPKfPKiiii,@object # @_Z17backprop_sum_poolPfPKfPKiiii
	.globl	_Z17backprop_sum_poolPfPKfPKiiii
	.p2align	3, 0x0
_Z17backprop_sum_poolPfPKfPKiiii:
	.quad	_Z32__device_stub__backprop_sum_poolPfPKfPKiiii
	.size	_Z17backprop_sum_poolPfPKfPKiiii, 8

	.type	_Z17backprop_max_poolPfPKfPKiS3_iii,@object # @_Z17backprop_max_poolPfPKfPKiS3_iii
	.globl	_Z17backprop_max_poolPfPKfPKiS3_iii
	.p2align	3, 0x0
_Z17backprop_max_poolPfPKfPKiS3_iii:
	.quad	_Z32__device_stub__backprop_max_poolPfPKfPKiS3_iii
	.size	_Z17backprop_max_poolPfPKfPKiS3_iii, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z6maxoutPfPiPKfiii"
	.size	.L__unnamed_1, 20

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z9mean_poolPfPKfPKiiii"
	.size	.L__unnamed_2, 24

	.type	.L__unnamed_3,@object           # @2
.L__unnamed_3:
	.asciz	"_Z8sum_poolPfPKfPKiiii"
	.size	.L__unnamed_3, 23

	.type	.L__unnamed_4,@object           # @3
.L__unnamed_4:
	.asciz	"_Z8max_poolPfPiPKfPKiiii"
	.size	.L__unnamed_4, 25

	.type	.L__unnamed_5,@object           # @4
.L__unnamed_5:
	.asciz	"_Z18backprop_mean_poolPfPKfPKiiii"
	.size	.L__unnamed_5, 34

	.type	.L__unnamed_6,@object           # @5
.L__unnamed_6:
	.asciz	"_Z17backprop_sum_poolPfPKfPKiiii"
	.size	.L__unnamed_6, 33

	.type	.L__unnamed_7,@object           # @6
.L__unnamed_7:
	.asciz	"_Z17backprop_max_poolPfPKfPKiS3_iii"
	.size	.L__unnamed_7, 36

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__maxoutPfPiPKfiii
	.addrsig_sym _Z24__device_stub__mean_poolPfPKfPKiiii
	.addrsig_sym _Z23__device_stub__sum_poolPfPKfPKiiii
	.addrsig_sym _Z23__device_stub__max_poolPfPiPKfPKiiii
	.addrsig_sym _Z33__device_stub__backprop_mean_poolPfPKfPKiiii
	.addrsig_sym _Z32__device_stub__backprop_sum_poolPfPKfPKiiii
	.addrsig_sym _Z32__device_stub__backprop_max_poolPfPKfPKiS3_iii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z6maxoutPfPiPKfiii
	.addrsig_sym _Z9mean_poolPfPKfPKiiii
	.addrsig_sym _Z8sum_poolPfPKfPKiiii
	.addrsig_sym _Z8max_poolPfPiPKfPKiiii
	.addrsig_sym _Z18backprop_mean_poolPfPKfPKiiii
	.addrsig_sym _Z17backprop_sum_poolPfPKfPKiiii
	.addrsig_sym _Z17backprop_max_poolPfPKfPKiS3_iii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z6maxoutPfPiPKfiii     ; -- Begin function _Z6maxoutPfPiPKfiii
	.globl	_Z6maxoutPfPiPKfiii
	.p2align	8
	.type	_Z6maxoutPfPiPKfiii,@function
_Z6maxoutPfPiPKfiii:                    ; @_Z6maxoutPfPiPKfiii
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x34
	s_load_b128 s[4:7], s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_cmp_gt_i32 s5, 0
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	s_cselect_b32 s3, -1, 0
	s_mov_b32 s2, 0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_gt_i32_e32 vcc_lo, s4, v1
	s_and_b32 s3, vcc_lo, s3
	s_and_saveexec_b32 s4, s3
	s_cbranch_execz .LBB0_8
; %bb.1:                                ; %.lr.ph34
	s_clause 0x1
	s_load_b128 s[8:11], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	v_mov_b32_e32 v0, 0
	s_cmp_gt_i32 s6, 1
	s_cselect_b32 s3, -1, 0
.LBB0_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_4 Depth 2
	s_waitcnt lgkmcnt(0)
	global_load_b32 v1, v0, s[0:1]
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_and_not1_b32 vcc_lo, exec_lo, s3
	global_store_b32 v0, v0, s[10:11]
	s_waitcnt vmcnt(0)
	global_store_b32 v0, v1, s[8:9]
	s_cbranch_vccnz .LBB0_7
; %bb.3:                                ; %.lr.ph.preheader
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_mov_b32 s4, 1
.LBB0_4:                                ; %.lr.ph
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	global_load_b32 v2, v0, s[0:1]
	s_waitcnt vmcnt(0)
	v_cmp_ngt_f32_e32 vcc_lo, v2, v1
	s_cbranch_vccnz .LBB0_6
; %bb.5:                                ;   in Loop: Header=BB0_4 Depth=2
	v_mov_b32_e32 v3, s4
	v_mov_b32_e32 v1, v2
	s_clause 0x1
	global_store_b32 v0, v3, s[10:11]
	global_store_b32 v0, v2, s[8:9]
.LBB0_6:                                ;   in Loop: Header=BB0_4 Depth=2
	s_add_i32 s4, s4, 1
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmp_eq_u32 s6, s4
	s_cbranch_scc0 .LBB0_4
.LBB0_7:                                ; %Flow59
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_add_u32 s8, s8, 4
	s_addc_u32 s9, s9, 0
	s_add_u32 s10, s10, 4
	s_addc_u32 s11, s11, 0
	s_add_i32 s2, s2, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_eq_u32 s2, s5
	s_cbranch_scc0 .LBB0_2
.LBB0_8:                                ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6maxoutPfPiPKfiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z6maxoutPfPiPKfiii, .Lfunc_end0-_Z6maxoutPfPiPKfiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 268
; NumSgprs: 18
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z9mean_poolPfPKfPKiiii ; -- Begin function _Z9mean_poolPfPKfPKiiii
	.globl	_Z9mean_poolPfPKfPKiiii
	.p2align	8
	.type	_Z9mean_poolPfPKfPKiiii,@function
_Z9mean_poolPfPKfPKiiii:                ; @_Z9mean_poolPfPKfPKiiii
; %bb.0:
	s_load_b32 s2, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_cmp_ge_i32 s15, s2
	s_cbranch_scc1 .LBB1_10
; %bb.1:                                ; %.preheader
	s_clause 0x2
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[10:11], s[0:1], 0x10
	s_load_b32 s2, s[0:1], 0x20
	s_mov_b32 s8, s15
	s_cmp_lt_i32 s15, 1
	s_cbranch_scc1 .LBB1_4
; %bb.2:                                ; %.lr.ph
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s3, s2, 31
	s_mov_b64 s[0:1], s[10:11]
	s_lshl_b64 s[12:13], s[2:3], 2
	s_mov_b32 s3, s8
.LBB1_3:                                ; =>This Inner Loop Header: Depth=1
	s_load_b32 s9, s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s14, s9, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s15, s14, 31
	s_lshl_b64 s[14:15], s[14:15], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s6, s6, s14
	s_addc_u32 s7, s7, s15
	s_add_u32 s4, s4, s12
	s_addc_u32 s5, s5, s13
	s_add_i32 s3, s3, -1
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmp_eq_u32 s3, 0
	s_cbranch_scc0 .LBB1_3
.LBB1_4:                                ; %._crit_edge
	s_ashr_i32 s9, s8, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[8:9], 2
	s_waitcnt lgkmcnt(0)
	s_add_u32 s0, s10, s0
	s_addc_u32 s1, s11, s1
	s_load_b32 s1, s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s1, 1
	s_cbranch_scc1 .LBB1_10
; %bb.5:                                ; %.lr.ph36
	v_cvt_f64_i32_e32 v[0:1], s1
	s_cmp_gt_i32 s2, 0
	s_mov_b32 s12, 0
	s_cselect_b32 s0, -1, 0
	s_ashr_i32 s3, s2, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_lshl_b64 s[8:9], s[2:3], 2
	v_div_scale_f64 v[2:3], null, v[0:1], v[0:1], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[4:5], v[2:3]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[6:7], -v[2:3], v[4:5], 1.0
	v_fma_f64 v[4:5], v[4:5], v[6:7], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], -v[2:3], v[4:5], 1.0
	v_fma_f64 v[4:5], v[4:5], v[6:7], v[4:5]
	v_div_scale_f64 v[6:7], vcc_lo, 1.0, v[0:1], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[8:9], v[6:7], v[4:5]
	v_fma_f64 v[2:3], -v[2:3], v[8:9], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[2:3], v[2:3], v[4:5], v[8:9]
	v_div_fixup_f64 v[0:1], v[2:3], v[0:1], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cvt_f32_f64_e32 v0, v[0:1]
	v_cndmask_b32_e64 v1, 0, 1, s0
	v_cmp_ne_u32_e64 s0, 1, v1
	v_mov_b32_e32 v1, 0
.LBB1_6:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB1_8 Depth 2
	s_delay_alu instid0(VALU_DEP_2)
	s_and_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB1_9
; %bb.7:                                ; %.lr.ph.i.preheader
                                        ;   in Loop: Header=BB1_6 Depth=1
	s_mov_b64 s[10:11], 0
	s_mov_b32 s3, s2
.LBB1_8:                                ; %.lr.ph.i
                                        ;   Parent Loop BB1_6 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_add_u32 s14, s6, s10
	s_addc_u32 s15, s7, s11
	s_add_u32 s16, s4, s10
	s_addc_u32 s17, s5, s11
	s_clause 0x1
	global_load_b32 v2, v1, s[14:15]
	global_load_b32 v3, v1, s[16:17]
	s_add_i32 s3, s3, -1
	s_add_u32 s10, s10, 4
	s_addc_u32 s11, s11, 0
	s_cmp_lg_u32 s3, 0
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v3, v2, v0
	global_store_b32 v1, v3, s[16:17]
	s_cbranch_scc1 .LBB1_8
.LBB1_9:                                ; %_Z5saxpyPfPKffi.exit
                                        ;   in Loop: Header=BB1_6 Depth=1
	s_add_i32 s12, s12, 1
	s_add_u32 s6, s6, s8
	s_addc_u32 s7, s7, s9
	s_cmp_lg_u32 s12, s1
	s_cbranch_scc1 .LBB1_6
.LBB1_10:                               ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z9mean_poolPfPKfPKiiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 36
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 18
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z9mean_poolPfPKfPKiiii, .Lfunc_end1-_Z9mean_poolPfPKfPKiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 476
; NumSgprs: 20
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 20
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z8sum_poolPfPKfPKiiii  ; -- Begin function _Z8sum_poolPfPKfPKiiii
	.globl	_Z8sum_poolPfPKfPKiiii
	.p2align	8
	.type	_Z8sum_poolPfPKfPKiiii,@function
_Z8sum_poolPfPKfPKiiii:                 ; @_Z8sum_poolPfPKfPKiiii
; %bb.0:
	s_load_b32 s2, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_cmp_ge_i32 s15, s2
	s_cbranch_scc1 .LBB2_10
; %bb.1:                                ; %.preheader
	s_clause 0x2
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[10:11], s[0:1], 0x10
	s_load_b32 s2, s[0:1], 0x20
	s_mov_b32 s8, s15
	s_cmp_lt_i32 s15, 1
	s_cbranch_scc1 .LBB2_4
; %bb.2:                                ; %.lr.ph
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s3, s2, 31
	s_mov_b64 s[0:1], s[10:11]
	s_lshl_b64 s[12:13], s[2:3], 2
	s_mov_b32 s3, s8
.LBB2_3:                                ; =>This Inner Loop Header: Depth=1
	s_load_b32 s9, s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s14, s9, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s15, s14, 31
	s_lshl_b64 s[14:15], s[14:15], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s6, s6, s14
	s_addc_u32 s7, s7, s15
	s_add_u32 s4, s4, s12
	s_addc_u32 s5, s5, s13
	s_add_i32 s3, s3, -1
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmp_eq_u32 s3, 0
	s_cbranch_scc0 .LBB2_3
.LBB2_4:                                ; %._crit_edge
	s_ashr_i32 s9, s8, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[8:9], 2
	s_waitcnt lgkmcnt(0)
	s_add_u32 s0, s10, s0
	s_addc_u32 s1, s11, s1
	s_load_b32 s1, s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s1, 1
	s_cbranch_scc1 .LBB2_10
; %bb.5:                                ; %.lr.ph34
	s_cmp_gt_i32 s2, 0
	s_mov_b32 s12, 0
	s_cselect_b32 s0, -1, 0
	s_ashr_i32 s3, s2, 31
	v_cndmask_b32_e64 v0, 0, 1, s0
	s_lshl_b64 s[8:9], s[2:3], 2
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e64 s0, 1, v0
	v_mov_b32_e32 v0, 0
.LBB2_6:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB2_8 Depth 2
	s_delay_alu instid0(VALU_DEP_2)
	s_and_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB2_9
; %bb.7:                                ; %.lr.ph.i.preheader
                                        ;   in Loop: Header=BB2_6 Depth=1
	s_mov_b64 s[10:11], 0
	s_mov_b32 s3, s2
.LBB2_8:                                ; %.lr.ph.i
                                        ;   Parent Loop BB2_6 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_add_u32 s14, s6, s10
	s_addc_u32 s15, s7, s11
	s_add_u32 s16, s4, s10
	s_addc_u32 s17, s5, s11
	s_clause 0x1
	global_load_b32 v1, v0, s[14:15]
	global_load_b32 v2, v0, s[16:17]
	s_add_i32 s3, s3, -1
	s_add_u32 s10, s10, 4
	s_addc_u32 s11, s11, 0
	s_cmp_lg_u32 s3, 0
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v1, v1, v2
	global_store_b32 v0, v1, s[16:17]
	s_cbranch_scc1 .LBB2_8
.LBB2_9:                                ; %_Z5saxpyPfPKffi.exit
                                        ;   in Loop: Header=BB2_6 Depth=1
	s_add_i32 s12, s12, 1
	s_add_u32 s6, s6, s8
	s_addc_u32 s7, s7, s9
	s_cmp_lg_u32 s12, s1
	s_cbranch_scc1 .LBB2_6
.LBB2_10:                               ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8sum_poolPfPKfPKiiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 36
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 3
		.amdhsa_next_free_sgpr 18
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end2:
	.size	_Z8sum_poolPfPKfPKiiii, .Lfunc_end2-_Z8sum_poolPfPKfPKiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 360
; NumSgprs: 20
; NumVgprs: 3
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 20
; NumVGPRsForWavesPerEU: 3
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z8max_poolPfPiPKfPKiiii ; -- Begin function _Z8max_poolPfPiPKfPKiiii
	.globl	_Z8max_poolPfPiPKfPKiiii
	.p2align	8
	.type	_Z8max_poolPfPiPKfPKiiii,@function
_Z8max_poolPfPiPKfPKiiii:               ; @_Z8max_poolPfPiPKfPKiiii
; %bb.0:
	s_load_b32 s2, s[0:1], 0x20
	s_waitcnt lgkmcnt(0)
	s_cmp_ge_i32 s15, s2
	s_cbranch_scc1 .LBB3_15
; %bb.1:                                ; %.preheader58
	s_clause 0x1
	s_load_b256 s[4:11], s[0:1], 0x0
	s_load_b32 s2, s[0:1], 0x28
	s_mov_b32 s12, s15
	s_cmp_lt_i32 s15, 1
	s_cbranch_scc1 .LBB3_5
; %bb.2:                                ; %.lr.ph
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s3, s2, 31
	s_mov_b32 s0, s10
	s_mov_b32 s1, s11
	s_mov_b64 s[14:15], 0
	s_lshl_b64 s[16:17], s[2:3], 2
	s_mov_b32 s3, s12
.LBB3_3:                                ; =>This Inner Loop Header: Depth=1
	s_load_b32 s13, s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s18, s13, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s19, s18, 31
	s_lshl_b64 s[18:19], s[18:19], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s8, s8, s18
	s_addc_u32 s9, s9, s19
	s_add_u32 s14, s14, s16
	s_addc_u32 s15, s15, s17
	s_add_i32 s3, s3, -1
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_add_u32 s18, s6, s14
	s_addc_u32 s19, s7, s15
	s_add_u32 s20, s4, s14
	s_addc_u32 s21, s5, s15
	s_cmp_eq_u32 s3, 0
	s_cbranch_scc0 .LBB3_3
; %bb.4:                                ; %Flow132
	s_mov_b64 s[4:5], s[20:21]
	s_mov_b64 s[6:7], s[18:19]
.LBB3_5:                                ; %.preheader57
	s_waitcnt lgkmcnt(0)
	s_cmp_gt_i32 s2, 0
	s_cselect_b32 s3, -1, 0
	s_cmp_lt_i32 s2, 1
	s_cbranch_scc1 .LBB3_8
; %bb.6:
	v_mov_b32_e32 v0, 0
	s_mov_b64 s[0:1], s[6:7]
	s_mov_b64 s[14:15], s[4:5]
	s_mov_b64 s[16:17], s[8:9]
	s_mov_b32 s13, s2
.LBB3_7:                                ; %.lr.ph66
                                        ; =>This Inner Loop Header: Depth=1
	global_load_b32 v1, v0, s[16:17]
	s_add_i32 s13, s13, -1
	s_add_u32 s16, s16, 4
	s_addc_u32 s17, s17, 0
	s_waitcnt vmcnt(0)
	s_clause 0x1
	global_store_b32 v0, v1, s[14:15]
	global_store_b32 v0, v0, s[0:1]
	s_add_u32 s14, s14, 4
	s_addc_u32 s15, s15, 0
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmp_eq_u32 s13, 0
	s_cbranch_scc0 .LBB3_7
.LBB3_8:                                ; %._crit_edge
	s_ashr_i32 s13, s12, 31
	v_mov_b32_e32 v0, 0
	s_lshl_b64 s[0:1], s[12:13], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s10, s0
	s_addc_u32 s1, s11, s1
	global_load_b32 v1, v0, s[0:1]
	s_waitcnt vmcnt(0)
	v_cmp_gt_i32_e32 vcc_lo, 2, v1
	s_cbranch_vccnz .LBB3_15
; %bb.9:                                ; %.preheader.preheader
	v_cndmask_b32_e64 v2, 0, 1, s3
	s_ashr_i32 s3, s2, 31
	s_mov_b32 s1, 1
	s_lshl_b64 s[10:11], s[2:3], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s8, s8, s10
	v_cmp_ne_u32_e64 s0, 1, v2
	s_addc_u32 s9, s9, s11
.LBB3_10:                               ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB3_11 Depth 2
	s_delay_alu instid0(VALU_DEP_1)
	s_and_b32 vcc_lo, exec_lo, s0
	s_mov_b64 s[12:13], s[6:7]
	s_mov_b64 s[14:15], s[4:5]
	s_mov_b64 s[16:17], s[8:9]
	s_mov_b32 s3, s2
	s_cbranch_vccnz .LBB3_14
.LBB3_11:                               ; %.lr.ph68
                                        ;   Parent Loop BB3_10 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_clause 0x1
	global_load_b32 v2, v0, s[16:17]
	global_load_b32 v3, v0, s[14:15]
	s_waitcnt vmcnt(0)
	v_cmp_ngt_f32_e32 vcc_lo, v2, v3
	s_cbranch_vccnz .LBB3_13
; %bb.12:                               ;   in Loop: Header=BB3_11 Depth=2
	v_mov_b32_e32 v3, s1
	s_clause 0x1
	global_store_b32 v0, v2, s[14:15]
	global_store_b32 v0, v3, s[12:13]
.LBB3_13:                               ;   in Loop: Header=BB3_11 Depth=2
	s_add_i32 s3, s3, -1
	s_add_u32 s16, s16, 4
	s_addc_u32 s17, s17, 0
	s_add_u32 s14, s14, 4
	s_addc_u32 s15, s15, 0
	s_add_u32 s12, s12, 4
	s_addc_u32 s13, s13, 0
	s_cmp_eq_u32 s3, 0
	s_cbranch_scc0 .LBB3_11
.LBB3_14:                               ; %._crit_edge69
                                        ;   in Loop: Header=BB3_10 Depth=1
	s_add_i32 s1, s1, 1
	s_add_u32 s8, s8, s10
	v_cmp_eq_u32_e32 vcc_lo, s1, v1
	s_addc_u32 s9, s9, s11
	s_cbranch_vccz .LBB3_10
.LBB3_15:                               ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8max_poolPfPiPKfPKiiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 44
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 4
		.amdhsa_next_free_sgpr 22
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end3:
	.size	_Z8max_poolPfPiPKfPKiiii, .Lfunc_end3-_Z8max_poolPfPiPKfPKiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 516
; NumSgprs: 24
; NumVgprs: 4
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 24
; NumVGPRsForWavesPerEU: 4
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z18backprop_mean_poolPfPKfPKiiii ; -- Begin function _Z18backprop_mean_poolPfPKfPKiiii
	.globl	_Z18backprop_mean_poolPfPKfPKiiii
	.p2align	8
	.type	_Z18backprop_mean_poolPfPKfPKiiii,@function
_Z18backprop_mean_poolPfPKfPKiiii:      ; @_Z18backprop_mean_poolPfPKfPKiiii
; %bb.0:
	s_load_b32 s2, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_cmp_ge_i32 s15, s2
	s_cbranch_scc1 .LBB4_10
; %bb.1:                                ; %.preheader
	s_clause 0x2
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[10:11], s[0:1], 0x10
	s_load_b32 s2, s[0:1], 0x20
	s_mov_b32 s8, s15
	s_cmp_lt_i32 s15, 1
	s_cbranch_scc1 .LBB4_4
; %bb.2:                                ; %.lr.ph
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s3, s2, 31
	s_mov_b64 s[0:1], s[10:11]
	s_lshl_b64 s[12:13], s[2:3], 2
	s_mov_b32 s3, s8
.LBB4_3:                                ; =>This Inner Loop Header: Depth=1
	s_load_b32 s9, s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s14, s9, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s15, s14, 31
	s_lshl_b64 s[14:15], s[14:15], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s4, s4, s14
	s_addc_u32 s5, s5, s15
	s_add_u32 s6, s6, s12
	s_addc_u32 s7, s7, s13
	s_add_i32 s3, s3, -1
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_cmp_eq_u32 s3, 0
	s_cbranch_scc0 .LBB4_3
.LBB4_4:                                ; %._crit_edge
	s_ashr_i32 s9, s8, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[8:9], 2
	s_waitcnt lgkmcnt(0)
	s_add_u32 s0, s10, s0
	s_addc_u32 s1, s11, s1
	s_load_b32 s1, s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s1, 1
	s_cbranch_scc1 .LBB4_10
; %bb.5:                                ; %.lr.ph36
	v_cvt_f64_i32_e32 v[0:1], s1
	s_cmp_gt_i32 s2, 0
	s_mov_b32 s12, 0
	s_cselect_b32 s0, -1, 0
	s_ashr_i32 s3, s2, 31
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_lshl_b64 s[8:9], s[2:3], 2
	v_div_scale_f64 v[2:3], null, v[0:1], v[0:1], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_rcp_f64_e32 v[4:5], v[2:3]
	s_waitcnt_depctr 0xfff
	v_fma_f64 v[6:7], -v[2:3], v[4:5], 1.0
	v_fma_f64 v[4:5], v[4:5], v[6:7], v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fma_f64 v[6:7], -v[2:3], v[4:5], 1.0
	v_fma_f64 v[4:5], v[4:5], v[6:7], v[4:5]
	v_div_scale_f64 v[6:7], vcc_lo, 1.0, v[0:1], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_mul_f64 v[8:9], v[6:7], v[4:5]
	v_fma_f64 v[2:3], -v[2:3], v[8:9], v[6:7]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_div_fmas_f64 v[2:3], v[2:3], v[4:5], v[8:9]
	v_div_fixup_f64 v[0:1], v[2:3], v[0:1], 1.0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_cvt_f32_f64_e32 v0, v[0:1]
	v_cndmask_b32_e64 v1, 0, 1, s0
	v_cmp_ne_u32_e64 s0, 1, v1
	v_mov_b32_e32 v1, 0
.LBB4_6:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB4_8 Depth 2
	s_delay_alu instid0(VALU_DEP_2)
	s_and_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB4_9
; %bb.7:                                ; %.lr.ph.i.preheader
                                        ;   in Loop: Header=BB4_6 Depth=1
	s_mov_b64 s[10:11], 0
	s_mov_b32 s3, s2
.LBB4_8:                                ; %.lr.ph.i
                                        ;   Parent Loop BB4_6 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_add_u32 s14, s6, s10
	s_addc_u32 s15, s7, s11
	s_add_u32 s16, s4, s10
	s_addc_u32 s17, s5, s11
	s_clause 0x1
	global_load_b32 v2, v1, s[14:15]
	global_load_b32 v3, v1, s[16:17]
	s_add_i32 s3, s3, -1
	s_add_u32 s10, s10, 4
	s_addc_u32 s11, s11, 0
	s_cmp_lg_u32 s3, 0
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v3, v2, v0
	global_store_b32 v1, v3, s[16:17]
	s_cbranch_scc1 .LBB4_8
.LBB4_9:                                ; %_Z5saxpyPfPKffi.exit
                                        ;   in Loop: Header=BB4_6 Depth=1
	s_add_i32 s12, s12, 1
	s_add_u32 s4, s4, s8
	s_addc_u32 s5, s5, s9
	s_cmp_lg_u32 s12, s1
	s_cbranch_scc1 .LBB4_6
.LBB4_10:                               ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z18backprop_mean_poolPfPKfPKiiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 36
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 10
		.amdhsa_next_free_sgpr 18
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end4:
	.size	_Z18backprop_mean_poolPfPKfPKiiii, .Lfunc_end4-_Z18backprop_mean_poolPfPKfPKiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 476
; NumSgprs: 20
; NumVgprs: 10
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 20
; NumVGPRsForWavesPerEU: 10
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z17backprop_sum_poolPfPKfPKiiii ; -- Begin function _Z17backprop_sum_poolPfPKfPKiiii
	.globl	_Z17backprop_sum_poolPfPKfPKiiii
	.p2align	8
	.type	_Z17backprop_sum_poolPfPKfPKiiii,@function
_Z17backprop_sum_poolPfPKfPKiiii:       ; @_Z17backprop_sum_poolPfPKfPKiiii
; %bb.0:
	s_load_b32 s2, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_cmp_ge_i32 s15, s2
	s_cbranch_scc1 .LBB5_10
; %bb.1:                                ; %.preheader
	s_clause 0x2
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[10:11], s[0:1], 0x10
	s_load_b32 s2, s[0:1], 0x20
	s_mov_b32 s8, s15
	s_cmp_lt_i32 s15, 1
	s_cbranch_scc1 .LBB5_4
; %bb.2:                                ; %.lr.ph
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s3, s2, 31
	s_mov_b64 s[0:1], s[10:11]
	s_lshl_b64 s[12:13], s[2:3], 2
	s_mov_b32 s3, s8
.LBB5_3:                                ; =>This Inner Loop Header: Depth=1
	s_load_b32 s9, s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s14, s9, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s15, s14, 31
	s_lshl_b64 s[14:15], s[14:15], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s4, s4, s14
	s_addc_u32 s5, s5, s15
	s_add_i32 s3, s3, -1
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_add_u32 s6, s6, s12
	s_addc_u32 s7, s7, s13
	s_cmp_eq_u32 s3, 0
	s_cbranch_scc0 .LBB5_3
.LBB5_4:                                ; %._crit_edge
	s_ashr_i32 s9, s8, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[8:9], 2
	s_waitcnt lgkmcnt(0)
	s_add_u32 s0, s10, s0
	s_addc_u32 s1, s11, s1
	s_load_b32 s1, s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s1, 1
	s_cbranch_scc1 .LBB5_10
; %bb.5:                                ; %.lr.ph34
	s_cmp_gt_i32 s2, 0
	s_mov_b32 s12, 0
	s_cselect_b32 s0, -1, 0
	s_ashr_i32 s3, s2, 31
	v_cndmask_b32_e64 v0, 0, 1, s0
	s_lshl_b64 s[8:9], s[2:3], 2
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e64 s0, 1, v0
	v_mov_b32_e32 v0, 0
.LBB5_6:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB5_8 Depth 2
	s_delay_alu instid0(VALU_DEP_2)
	s_and_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB5_9
; %bb.7:                                ; %.lr.ph.i.preheader
                                        ;   in Loop: Header=BB5_6 Depth=1
	s_mov_b64 s[10:11], 0
	s_mov_b32 s3, s2
.LBB5_8:                                ; %.lr.ph.i
                                        ;   Parent Loop BB5_6 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_add_u32 s14, s6, s10
	s_addc_u32 s15, s7, s11
	s_add_u32 s16, s4, s10
	s_addc_u32 s17, s5, s11
	s_clause 0x1
	global_load_b32 v1, v0, s[14:15]
	global_load_b32 v2, v0, s[16:17]
	s_add_i32 s3, s3, -1
	s_add_u32 s10, s10, 4
	s_addc_u32 s11, s11, 0
	s_cmp_lg_u32 s3, 0
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v1, v1, v2
	global_store_b32 v0, v1, s[16:17]
	s_cbranch_scc1 .LBB5_8
.LBB5_9:                                ; %_Z5saxpyPfPKffi.exit
                                        ;   in Loop: Header=BB5_6 Depth=1
	s_add_i32 s12, s12, 1
	s_add_u32 s4, s4, s8
	s_addc_u32 s5, s5, s9
	s_cmp_lg_u32 s12, s1
	s_cbranch_scc1 .LBB5_6
.LBB5_10:                               ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17backprop_sum_poolPfPKfPKiiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 36
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 3
		.amdhsa_next_free_sgpr 18
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end5:
	.size	_Z17backprop_sum_poolPfPKfPKiiii, .Lfunc_end5-_Z17backprop_sum_poolPfPKfPKiiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 360
; NumSgprs: 20
; NumVgprs: 3
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 20
; NumVGPRsForWavesPerEU: 3
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z17backprop_max_poolPfPKfPKiS3_iii ; -- Begin function _Z17backprop_max_poolPfPKfPKiS3_iii
	.globl	_Z17backprop_max_poolPfPKfPKiS3_iii
	.p2align	8
	.type	_Z17backprop_max_poolPfPKfPKiS3_iii,@function
_Z17backprop_max_poolPfPKfPKiS3_iii:    ; @_Z17backprop_max_poolPfPKfPKiS3_iii
; %bb.0:
	s_load_b32 s2, s[0:1], 0x20
	s_waitcnt lgkmcnt(0)
	s_cmp_ge_i32 s15, s2
	s_cbranch_scc1 .LBB6_13
; %bb.1:                                ; %.preheader40
	s_clause 0x1
	s_load_b256 s[4:11], s[0:1], 0x0
	s_load_b32 s2, s[0:1], 0x28
	s_mov_b32 s12, s15
	s_cmp_lt_i32 s15, 1
	s_cbranch_scc1 .LBB6_5
; %bb.2:                                ; %.lr.ph
	s_waitcnt lgkmcnt(0)
	s_ashr_i32 s3, s2, 31
	s_mov_b32 s0, s10
	s_mov_b32 s1, s11
	s_mov_b64 s[14:15], 0
	s_lshl_b64 s[16:17], s[2:3], 2
	s_mov_b32 s3, s12
.LBB6_3:                                ; =>This Inner Loop Header: Depth=1
	s_load_b32 s13, s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_mul_i32 s18, s13, s2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_ashr_i32 s19, s18, 31
	s_lshl_b64 s[18:19], s[18:19], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s4, s4, s18
	s_addc_u32 s5, s5, s19
	s_add_i32 s3, s3, -1
	s_add_u32 s0, s0, 4
	s_addc_u32 s1, s1, 0
	s_add_u32 s14, s14, s16
	s_addc_u32 s15, s15, s17
	s_add_u32 s18, s8, s14
	s_addc_u32 s19, s9, s15
	s_add_u32 s20, s6, s14
	s_addc_u32 s21, s7, s15
	s_cmp_eq_u32 s3, 0
	s_cbranch_scc0 .LBB6_3
; %bb.4:                                ; %Flow98
	s_mov_b64 s[6:7], s[20:21]
	s_mov_b64 s[8:9], s[18:19]
.LBB6_5:                                ; %._crit_edge
	s_ashr_i32 s13, s12, 31
	s_delay_alu instid0(SALU_CYCLE_1)
	s_lshl_b64 s[0:1], s[12:13], 2
	s_waitcnt lgkmcnt(0)
	s_add_u32 s0, s10, s0
	s_addc_u32 s1, s11, s1
	s_load_b32 s1, s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s1, 1
	s_cbranch_scc1 .LBB6_13
; %bb.6:                                ; %.preheader.lr.ph
	s_cmp_gt_i32 s2, 0
	s_mov_b32 s14, 0
	s_cselect_b32 s0, -1, 0
	s_ashr_i32 s3, s2, 31
	v_cndmask_b32_e64 v0, 0, 1, s0
	s_lshl_b64 s[10:11], s[2:3], 2
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_ne_u32_e64 s0, 1, v0
	v_mov_b32_e32 v0, 0
.LBB6_7:                                ; %.preheader
                                        ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB6_9 Depth 2
	s_delay_alu instid0(VALU_DEP_2)
	s_and_b32 vcc_lo, exec_lo, s0
	s_cbranch_vccnz .LBB6_12
; %bb.8:                                ; %.lr.ph48.preheader
                                        ;   in Loop: Header=BB6_7 Depth=1
	s_mov_b64 s[12:13], 0
	s_mov_b32 s3, s2
.LBB6_9:                                ; %.lr.ph48
                                        ;   Parent Loop BB6_7 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	s_add_u32 s16, s8, s12
	s_addc_u32 s17, s9, s13
	s_load_b32 s15, s[16:17], 0x0
	s_waitcnt lgkmcnt(0)
	s_cmp_lg_u32 s15, s14
	s_cbranch_scc1 .LBB6_11
; %bb.10:                               ;   in Loop: Header=BB6_9 Depth=2
	s_add_u32 s16, s4, s12
	s_addc_u32 s17, s5, s13
	s_add_u32 s18, s6, s12
	s_addc_u32 s19, s7, s13
	s_clause 0x1
	global_load_b32 v1, v0, s[18:19]
	global_load_b32 v2, v0, s[16:17]
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v1, v1, v2
	global_store_b32 v0, v1, s[16:17]
.LBB6_11:                               ;   in Loop: Header=BB6_9 Depth=2
	s_add_i32 s3, s3, -1
	s_add_u32 s12, s12, 4
	s_addc_u32 s13, s13, 0
	s_cmp_eq_u32 s3, 0
	s_cbranch_scc0 .LBB6_9
.LBB6_12:                               ; %._crit_edge49
                                        ;   in Loop: Header=BB6_7 Depth=1
	s_add_i32 s14, s14, 1
	s_add_u32 s4, s4, s10
	s_addc_u32 s5, s5, s11
	s_cmp_eq_u32 s14, s1
	s_cbranch_scc0 .LBB6_7
.LBB6_13:                               ; %.loopexit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z17backprop_max_poolPfPKfPKiS3_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 44
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 3
		.amdhsa_next_free_sgpr 22
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end6:
	.size	_Z17backprop_max_poolPfPKfPKiS3_iii, .Lfunc_end6-_Z17backprop_max_poolPfPKfPKiS3_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 412
; NumSgprs: 24
; NumVgprs: 3
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 24
; NumVGPRsForWavesPerEU: 3
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
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amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
