#include "includes.h"
__device__ uint scanLocalMem(const uint val, uint* s_data)
{
// Shared mem is 512 uints long, set first half to 0
int idx = threadIdx.x;
s_data[idx] = 0.0f;
__syncthreads();

// Set 2nd half to thread local sum (sum of the 4 elems from global mem)
idx += blockDim.x; // += 256

// Some of these __sync's are unnecessary due to warp synchronous
// execution.  Right now these are left in to be consistent with
// opencl version, since that has to execute on platforms where
// thread groups are not synchronous (i.e. CPUs)
uint t;
s_data[idx] = val;     __syncthreads();
t = s_data[idx -  1];  __syncthreads();
s_data[idx] += t;      __syncthreads();
t = s_data[idx -  2];  __syncthreads();
s_data[idx] += t;      __syncthreads();
t = s_data[idx -  4];  __syncthreads();
s_data[idx] += t;      __syncthreads();
t = s_data[idx -  8];  __syncthreads();
s_data[idx] += t;      __syncthreads();
t = s_data[idx - 16];  __syncthreads();
s_data[idx] += t;      __syncthreads();
t = s_data[idx - 32];  __syncthreads();
s_data[idx] += t;      __syncthreads();
t = s_data[idx - 64];  __syncthreads();
s_data[idx] += t;      __syncthreads();
t = s_data[idx - 128]; __syncthreads();
s_data[idx] += t;      __syncthreads();

return s_data[idx-1];
}
__global__ void scan(uint *g_odata, uint* g_idata, uint* g_blockSums, const int n, const bool fullBlock, const bool storeSum)
{
__shared__ uint s_data[512];

// Load data into shared mem
uint4 tempData;
uint4 threadScanT;
uint res;
uint4* inData  = (uint4*) g_idata;

const int gid = (blockIdx.x * blockDim.x) + threadIdx.x;
const int tid = threadIdx.x;
const int i = gid * 4;

// If possible, read from global mem in a uint4 chunk
if (fullBlock || i + 3 < n)
{
// scan the 4 elems read in from global
tempData       = inData[gid];
threadScanT.x = tempData.x;
threadScanT.y = tempData.y + threadScanT.x;
threadScanT.z = tempData.z + threadScanT.y;
threadScanT.w = tempData.w + threadScanT.z;
res = threadScanT.w;
}
else
{   // if not, read individual uints, scan & store in lmem
threadScanT.x = (i < n) ? g_idata[i] : 0.0f;
threadScanT.y = ((i+1 < n) ? g_idata[i+1] : 0.0f) + threadScanT.x;
threadScanT.z = ((i+2 < n) ? g_idata[i+2] : 0.0f) + threadScanT.y;
threadScanT.w = ((i+3 < n) ? g_idata[i+3] : 0.0f) + threadScanT.z;
res = threadScanT.w;
}

res = scanLocalMem(res, s_data);
__syncthreads();

// If we have to store the sum for the block, have the last work item
// in the block write it out
if (storeSum && tid == blockDim.x-1) {
g_blockSums[blockIdx.x] = res + threadScanT.w;
}

// write results to global memory
uint4* outData = (uint4*) g_odata;

tempData.x = res;
tempData.y = res + threadScanT.x;
tempData.z = res + threadScanT.y;
tempData.w = res + threadScanT.z;

if (fullBlock || i + 3 < n)
{
outData[gid] = tempData;
}
else
{
if ( i    < n) { g_odata[i]   = tempData.x;
if ((i+1) < n) { g_odata[i+1] = tempData.y;
if ((i+2) < n) { g_odata[i+2] = tempData.z; } } }
}
}
	.file	"tmpxft_0034a8f6_00000000-6_scan.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2011:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2011:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z12scanLocalMemjPj
	.type	_Z12scanLocalMemjPj, @function
_Z12scanLocalMemjPj:
.LFB2008:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	popq	%rax
	.cfi_def_cfa_offset 8
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	$1, 12(%rsp)
	movl	12(%rsp), %edi
	call	exit@PLT
	.cfi_endproc
.LFE2008:
	.size	_Z12scanLocalMemjPj, .-_Z12scanLocalMemjPj
	.globl	_Z30__device_stub__Z4scanPjS_S_ibbPjS_S_ibb
	.type	_Z30__device_stub__Z4scanPjS_S_ibbPjS_S_ibb, @function
_Z30__device_stub__Z4scanPjS_S_ibbPjS_S_ibb:
.LFB2033:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movb	%r8b, 16(%rsp)
	movb	%r9b, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L4
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z4scanPjS_S_ibb(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L4:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L6
	call	__stack_chk_fail@PLT
.L6:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2033:
	.size	_Z30__device_stub__Z4scanPjS_S_ibbPjS_S_ibb, .-_Z30__device_stub__Z4scanPjS_S_ibbPjS_S_ibb
	.globl	_Z4scanPjS_S_ibb
	.type	_Z4scanPjS_S_ibb, @function
_Z4scanPjS_S_ibb:
.LFB2034:
	.cfi_startproc
	endbr64
	movzbl	%r9b, %r9d
	movzbl	%r8b, %r8d
	jmp	_Z30__device_stub__Z4scanPjS_S_ibbPjS_S_ibb
	.cfi_endproc
.LFE2034:
	.size	_Z4scanPjS_S_ibb, .-_Z4scanPjS_S_ibb
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"_Z4scanPjS_S_ibb"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2036:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC0(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z4scanPjS_S_ibb(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2036:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include "includes.h"
__device__ uint scanLocalMem(const uint val, uint* s_data)
{
// Shared mem is 512 uints long, set first half to 0
int idx = threadIdx.x;
s_data[idx] = 0.0f;
__syncthreads();

// Set 2nd half to thread local sum (sum of the 4 elems from global mem)
idx += blockDim.x; // += 256

// Some of these __sync's are unnecessary due to warp synchronous
// execution.  Right now these are left in to be consistent with
// opencl version, since that has to execute on platforms where
// thread groups are not synchronous (i.e. CPUs)
uint t;
s_data[idx] = val;     __syncthreads();
t = s_data[idx -  1];  __syncthreads();
s_data[idx] += t;      __syncthreads();
t = s_data[idx -  2];  __syncthreads();
s_data[idx] += t;      __syncthreads();
t = s_data[idx -  4];  __syncthreads();
s_data[idx] += t;      __syncthreads();
t = s_data[idx -  8];  __syncthreads();
s_data[idx] += t;      __syncthreads();
t = s_data[idx - 16];  __syncthreads();
s_data[idx] += t;      __syncthreads();
t = s_data[idx - 32];  __syncthreads();
s_data[idx] += t;      __syncthreads();
t = s_data[idx - 64];  __syncthreads();
s_data[idx] += t;      __syncthreads();
t = s_data[idx - 128]; __syncthreads();
s_data[idx] += t;      __syncthreads();

return s_data[idx-1];
}
__global__ void scan(uint *g_odata, uint* g_idata, uint* g_blockSums, const int n, const bool fullBlock, const bool storeSum)
{
__shared__ uint s_data[512];

// Load data into shared mem
uint4 tempData;
uint4 threadScanT;
uint res;
uint4* inData  = (uint4*) g_idata;

const int gid = (blockIdx.x * blockDim.x) + threadIdx.x;
const int tid = threadIdx.x;
const int i = gid * 4;

// If possible, read from global mem in a uint4 chunk
if (fullBlock || i + 3 < n)
{
// scan the 4 elems read in from global
tempData       = inData[gid];
threadScanT.x = tempData.x;
threadScanT.y = tempData.y + threadScanT.x;
threadScanT.z = tempData.z + threadScanT.y;
threadScanT.w = tempData.w + threadScanT.z;
res = threadScanT.w;
}
else
{   // if not, read individual uints, scan & store in lmem
threadScanT.x = (i < n) ? g_idata[i] : 0.0f;
threadScanT.y = ((i+1 < n) ? g_idata[i+1] : 0.0f) + threadScanT.x;
threadScanT.z = ((i+2 < n) ? g_idata[i+2] : 0.0f) + threadScanT.y;
threadScanT.w = ((i+3 < n) ? g_idata[i+3] : 0.0f) + threadScanT.z;
res = threadScanT.w;
}

res = scanLocalMem(res, s_data);
__syncthreads();

// If we have to store the sum for the block, have the last work item
// in the block write it out
if (storeSum && tid == blockDim.x-1) {
g_blockSums[blockIdx.x] = res + threadScanT.w;
}

// write results to global memory
uint4* outData = (uint4*) g_odata;

tempData.x = res;
tempData.y = res + threadScanT.x;
tempData.z = res + threadScanT.y;
tempData.w = res + threadScanT.z;

if (fullBlock || i + 3 < n)
{
outData[gid] = tempData;
}
else
{
if ( i    < n) { g_odata[i]   = tempData.x;
if ((i+1) < n) { g_odata[i+1] = tempData.y;
if ((i+2) < n) { g_odata[i+2] = tempData.z; } } }
}
}
	.text
	.file	"scan.hip"
	.globl	_Z19__device_stub__scanPjS_S_ibb # -- Begin function _Z19__device_stub__scanPjS_S_ibb
	.type	_Z19__device_stub__scanPjS_S_ibb,@function
_Z19__device_stub__scanPjS_S_ibb:       # @_Z19__device_stub__scanPjS_S_ibb
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	3(%rsp), %rcx
	movb	%r8b, (%rcx)
	leaq	2(%rsp), %r8
	movb	%r9b, (%r8)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z4scanPjS_S_ibb, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z19__device_stub__scanPjS_S_ibb, .Lfunc_end0-_Z19__device_stub__scanPjS_S_ibb
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB1_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB1_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z4scanPjS_S_ibb, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end1:
	.size	__hip_module_ctor, .Lfunc_end1-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB2_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB2_2:
	retq
.Lfunc_end2:
	.size	__hip_module_dtor, .Lfunc_end2-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z4scanPjS_S_ibb,@object        # @_Z4scanPjS_S_ibb
	.section	.rodata,"a",@progbits
	.globl	_Z4scanPjS_S_ibb
	.p2align	3, 0x0
_Z4scanPjS_S_ibb:
	.quad	_Z19__device_stub__scanPjS_S_ibb
	.size	_Z4scanPjS_S_ibb, 8

	.type	.L__unnamed_1,@object           # @0
	.section	.rodata.str1.1,"aMS",@progbits,1
.L__unnamed_1:
	.asciz	"_Z4scanPjS_S_ibb"
	.size	.L__unnamed_1, 17

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z19__device_stub__scanPjS_S_ibb
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z4scanPjS_S_ibb
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z4scanPjS_S_ibb        ; -- Begin function _Z4scanPjS_S_ibb
	.globl	_Z4scanPjS_S_ibb
	.p2align	8
	.type	_Z4scanPjS_S_ibb,@function
_Z4scanPjS_S_ibb:                       ; @_Z4scanPjS_S_ibb
; %bb.0:
	s_clause 0x1
	s_load_b256 s[4:11], s[0:1], 0x0
	s_load_b32 s3, s[0:1], 0x2c
	s_mov_b32 s2, s15
                                        ; implicit-def: $vgpr9
                                        ; implicit-def: $vgpr6
	s_waitcnt lgkmcnt(0)
	s_bitcmp1_b32 s11, 0
	s_cselect_b32 s11, -1, 0
	s_and_b32 s3, s3, 0xffff
	s_xor_b32 s11, s11, -1
	v_mad_u64_u32 v[7:8], null, s2, s3, v[0:1]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b32_e32 v5, 2, v7
	v_or_b32_e32 v1, 3, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_cmp_le_i32_e32 vcc_lo, s10, v1
                                        ; implicit-def: $vgpr1
	s_and_b32 s11, s11, vcc_lo
	s_and_saveexec_b32 s12, s11
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s12, exec_lo, s12
	s_cbranch_execz .LBB0_8
; %bb.1:
	v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v1, 0
	s_mov_b32 s13, exec_lo
	v_cmpx_gt_i32_e64 s10, v5
	s_cbranch_execz .LBB0_3
; %bb.2:
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[5:6]
	v_add_co_u32 v3, vcc_lo, s6, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v4, vcc_lo, s7, v4, vcc_lo
	global_load_b32 v1, v[3:4], off
	s_waitcnt vmcnt(0)
	v_cvt_f32_u32_e32 v1, v1
	v_cvt_u32_f32_e32 v1, v1
.LBB0_3:
	s_or_b32 exec_lo, exec_lo, s13
	v_or_b32_e32 v3, 1, v5
	s_mov_b32 s13, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s10, v3
	s_cbranch_execz .LBB0_5
; %bb.4:
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[2:3], 2, v[5:6]
	v_add_co_u32 v2, vcc_lo, s6, v2
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
	global_load_b32 v2, v[2:3], off offset:4
	s_waitcnt vmcnt(0)
	v_cvt_f32_u32_e32 v2, v2
.LBB0_5:
	s_or_b32 exec_lo, exec_lo, s13
	v_or_b32_e32 v3, 2, v5
	s_delay_alu instid0(VALU_DEP_1)
	v_cmp_gt_i32_e32 vcc_lo, s10, v3
	v_mov_b32_e32 v3, 0
	s_and_saveexec_b32 s13, vcc_lo
	s_cbranch_execz .LBB0_7
; %bb.6:
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[3:4], 2, v[5:6]
	v_add_co_u32 v3, vcc_lo, s6, v3
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v4, vcc_lo, s7, v4, vcc_lo
	global_load_b32 v3, v[3:4], off offset:8
	s_waitcnt vmcnt(0)
	v_cvt_f32_u32_e32 v3, v3
.LBB0_7:
	s_or_b32 exec_lo, exec_lo, s13
	v_cvt_f32_u32_e32 v4, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_f32_e32 v2, v2, v4
	v_cvt_u32_f32_e32 v9, v2
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_cvt_f32_u32_e32 v2, v9
	v_add_f32_e32 v2, v3, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_cvt_u32_f32_e32 v6, v2
.LBB0_8:                                ; %Flow103
	s_or_saveexec_b32 s12, s12
	v_ashrrev_i32_e32 v8, 31, v7
	s_delay_alu instid0(VALU_DEP_2)
	v_mov_b32_e32 v3, v6
	s_xor_b32 exec_lo, exec_lo, s12
	s_cbranch_execz .LBB0_10
; %bb.9:
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 4, v[7:8]
	v_add_co_u32 v1, vcc_lo, s6, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_add_co_ci_u32_e32 v2, vcc_lo, s7, v2, vcc_lo
	global_load_b128 v[1:4], v[1:2], off
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v9, v2, v1
	v_add_nc_u32_e32 v6, v3, v9
	s_delay_alu instid0(VALU_DEP_1)
	v_add_nc_u32_e32 v3, v4, v6
.LBB0_10:
	s_or_b32 exec_lo, exec_lo, s12
	v_lshlrev_b32_e32 v2, 2, v0
	v_mov_b32_e32 v4, 0
	s_load_b32 s0, s[0:1], 0x1c
	s_delay_alu instid0(VALU_DEP_2)
	v_lshl_add_u32 v10, s3, 2, v2
	ds_store_b32 v2, v4
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_add_nc_u32_e32 v2, -4, v10
	ds_store_b32 v10, v3
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v11, v2
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v12, v10
	s_bitcmp1_b32 s0, 8
	s_cselect_b32 s0, -1, 0
	s_add_i32 s3, s3, -1
	s_delay_alu instid0(SALU_CYCLE_1)
	v_cmp_eq_u32_e32 vcc_lo, s3, v0
	s_and_b32 s1, s0, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v11, v12, v11
	v_add_nc_u32_e32 v12, -8, v10
	ds_store_b32 v10, v11
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v11, v12
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v12, v10
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v11, v12, v11
	v_add_nc_u32_e32 v12, -16, v10
	ds_store_b32 v10, v11
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v11, v12
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v12, v10
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v11, v12, v11
	v_subrev_nc_u32_e32 v12, 32, v10
	ds_store_b32 v10, v11
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v11, v12
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v12, v10
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v11, v12, v11
	v_subrev_nc_u32_e32 v12, 64, v10
	ds_store_b32 v10, v11
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v11, v12
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v12, v10
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v11, v12, v11
	v_add_nc_u32_e32 v12, 0xffffff80, v10
	ds_store_b32 v10, v11
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v11, v12
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v12, v10
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v11, v12, v11
	v_add_nc_u32_e32 v12, 0xffffff00, v10
	ds_store_b32 v10, v11
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v11, v12
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v12, v10
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v11, v12, v11
	v_add_nc_u32_e32 v12, 0xfffffe00, v10
	ds_store_b32 v10, v11
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v11, v12
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v12, v10
	s_waitcnt lgkmcnt(0)
	v_add_nc_u32_e32 v11, v12, v11
	ds_store_b32 v10, v11
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v2, v2
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	s_and_saveexec_b32 s0, s1
	s_cbranch_execz .LBB0_12
; %bb.11:
	s_mov_b32 s3, 0
	v_add_nc_u32_e32 v0, v2, v3
	s_lshl_b64 s[2:3], s[2:3], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s2, s8, s2
	s_addc_u32 s3, s9, s3
	global_store_b32 v4, v0, s[2:3]
.LBB0_12:
	s_or_b32 exec_lo, exec_lo, s0
	v_add_nc_u32_e32 v3, v2, v1
	v_add_nc_u32_e32 v4, v2, v9
	s_and_saveexec_b32 s0, s11
	s_delay_alu instid0(SALU_CYCLE_1)
	s_xor_b32 s0, exec_lo, s0
	s_cbranch_execz .LBB0_18
; %bb.13:
	s_mov_b32 s1, exec_lo
	v_cmpx_gt_i32_e64 s10, v5
	s_cbranch_execz .LBB0_17
; %bb.14:
	v_ashrrev_i32_e32 v6, 31, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[0:1], 2, v[5:6]
	v_or_b32_e32 v6, 1, v5
	v_add_co_u32 v0, vcc_lo, s4, v0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	v_cmp_gt_i32_e32 vcc_lo, s10, v6
	global_store_b32 v[0:1], v2, off
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_17
; %bb.15:
	v_or_b32_e32 v2, 2, v5
	global_store_b32 v[0:1], v3, off offset:4
	v_cmp_gt_i32_e32 vcc_lo, s10, v2
	s_and_b32 exec_lo, exec_lo, vcc_lo
	s_cbranch_execz .LBB0_17
; %bb.16:
	global_store_b32 v[0:1], v4, off offset:8
.LBB0_17:                               ; %Flow101
	s_or_b32 exec_lo, exec_lo, s1
                                        ; implicit-def: $vgpr2
                                        ; implicit-def: $vgpr6
                                        ; implicit-def: $vgpr7_vgpr8
.LBB0_18:                               ; %Flow102
	s_and_not1_saveexec_b32 s0, s0
	s_cbranch_execz .LBB0_20
; %bb.19:
	v_lshlrev_b64 v[0:1], 4, v[7:8]
	v_add_nc_u32_e32 v5, v2, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v0, vcc_lo, s4, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s5, v1, vcc_lo
	global_store_b128 v[0:1], v[2:5], off
.LBB0_20:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z4scanPjS_S_ibb
		.amdhsa_group_segment_fixed_size 2048
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 13
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z4scanPjS_S_ibb, .Lfunc_end0-_Z4scanPjS_S_ibb
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1360
; NumSgprs: 18
; NumVgprs: 13
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 2048 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 13
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           1
        .value_kind:     by_value
      - .offset:         29
        .size:           1
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 2048
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z4scanPjS_S_ibb
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z4scanPjS_S_ibb.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     13
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
