#include <stdio.h>

#define  B0   0.675603595979828813
#define  B1  -0.175603595979828813
#define  D0   1.35120719195965763
#define  D1  -1.70241438391931525


/* function prototypes */
void force(long, long, long, double *, double *, double *, double *,double *, double *, float *, float *, double *, double *);
__global__ void step_type1(long , double, double, double *, double *, double *);
__global__ void step_type2(long , double, double *, double *, double *);


void timestep(long n, long nblock, long nthread, double dt, double *mx, double *my, double *magx, double *magy,
              double *magx_gpu, double *magy_gpu, double *r_gpu, double *p_gpu, double *f_gpu, float *sinr_gpu, float *cosr_gpu)
{
   double bb0,bb1,dd0,dd1;

   bb0=B0*dt;
   bb1=B1*dt;
   dd0=D0*dt;
   dd1=D1*dt;

   step_type1<<<nblock,nthread>>>(n,bb0,dd0,r_gpu,p_gpu,f_gpu);

   force(n,nblock,nthread,mx,my,magx,magy,r_gpu,f_gpu,sinr_gpu,cosr_gpu,magx_gpu,magy_gpu);

   step_type1<<<nblock,nthread>>>(n,bb1,dd1,r_gpu,p_gpu,f_gpu);

   force(n,nblock,nthread,mx,my,magx,magy,r_gpu,f_gpu,sinr_gpu,cosr_gpu,magx_gpu,magy_gpu);

   step_type1<<<nblock,nthread>>>(n,bb1,dd0,r_gpu,p_gpu,f_gpu);

   force(n,nblock,nthread,mx,my,magx,magy,r_gpu,f_gpu,sinr_gpu,cosr_gpu,magx_gpu,magy_gpu);

   step_type2<<<nblock,nthread>>>(n,bb0,r_gpu,p_gpu,f_gpu);

   return;
}

	.file	"tmpxft_0030974b_00000000-6_timestep.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z8timestepllldPdS_S_S_S_S_S_S_S_PfS0_
	.type	_Z8timestepllldPdS_S_S_S_S_S_S_S_PfS0_, @function
_Z8timestepllldPdS_S_S_S_S_S_S_S_PfS0_:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	movq	%rsi, %r13
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rdx, %rbx
	subq	$136, %rsp
	.cfi_def_cfa_offset 192
	movsd	.LC0(%rip), %xmm2
	movq	192(%rsp), %rax
	movq	%rdi, (%rsp)
	mulsd	%xmm0, %xmm2
	movq	%rcx, 24(%rsp)
	movq	200(%rsp), %r15
	movq	%rax, 48(%rsp)
	movq	224(%rsp), %rax
	movq	%r8, 32(%rsp)
	movq	208(%rsp), %r14
	xorl	%r8d, %r8d
	movq	%rax, 16(%rsp)
	movq	240(%rsp), %rax
	movq	%r9, 40(%rsp)
	movq	216(%rsp), %rbp
	xorl	%r9d, %r9d
	movq	%rax, 56(%rsp)
	movq	248(%rsp), %rax
	movq	232(%rsp), %r12
	movsd	%xmm0, 8(%rsp)
	movq	%rax, 64(%rsp)
	movabsq	$4294967297, %rax
	movsd	%xmm2, 72(%rsp)
	movsd	.LC1(%rip), %xmm3
	movsd	.LC2(%rip), %xmm4
	movq	%rax, 120(%rsp)
	movl	124(%rsp), %ecx
	mulsd	%xmm0, %xmm3
	movl	%esi, 104(%rsp)
	mulsd	%xmm0, %xmm4
	movq	%rax, 108(%rsp)
	movq	104(%rsp), %rdi
	movl	%edx, 116(%rsp)
	movl	112(%rsp), %esi
	movq	116(%rsp), %rdx
	movsd	%xmm3, 80(%rsp)
	movsd	%xmm4, 88(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L3
	movq	16(%rsp), %rdx
	movq	(%rsp), %rdi
	movq	%r12, %rcx
	movq	%rbp, %rsi
	movsd	88(%rsp), %xmm1
	movsd	72(%rsp), %xmm0
	call	_Z10step_type1lddPdS_S_@PLT
.L3:
	pushq	%rcx
	.cfi_def_cfa_offset 200
	movq	%rbx, %rdx
	movq	%r13, %rsi
	pushq	%r14
	.cfi_def_cfa_offset 208
	pushq	%r15
	.cfi_def_cfa_offset 216
	pushq	88(%rsp)
	.cfi_def_cfa_offset 224
	pushq	88(%rsp)
	.cfi_def_cfa_offset 232
	pushq	%r12
	.cfi_def_cfa_offset 240
	pushq	%rbp
	.cfi_def_cfa_offset 248
	pushq	104(%rsp)
	.cfi_def_cfa_offset 256
	movq	104(%rsp), %r9
	movq	96(%rsp), %r8
	movq	88(%rsp), %rcx
	movq	64(%rsp), %rdi
	call	_Z5forcelllPdS_S_S_S_S_PfS0_S_S_@PLT
	movl	%ebx, 180(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	movl	%r13d, 168(%rsp)
	movq	%rax, 184(%rsp)
	movq	%rax, 172(%rsp)
	movl	188(%rsp), %ecx
	addq	$64, %rsp
	.cfi_def_cfa_offset 192
	movq	116(%rsp), %rdx
	movq	104(%rsp), %rdi
	movl	112(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L4
	movsd	8(%rsp), %xmm1
	movq	(%rsp), %rdi
	movq	%r12, %rcx
	movq	%rbp, %rsi
	mulsd	.LC3(%rip), %xmm1
	movq	16(%rsp), %rdx
	movsd	80(%rsp), %xmm0
	call	_Z10step_type1lddPdS_S_@PLT
.L4:
	pushq	%rdx
	.cfi_def_cfa_offset 200
	movq	%r13, %rsi
	movq	%rbx, %rdx
	pushq	%r14
	.cfi_def_cfa_offset 208
	pushq	%r15
	.cfi_def_cfa_offset 216
	pushq	88(%rsp)
	.cfi_def_cfa_offset 224
	pushq	88(%rsp)
	.cfi_def_cfa_offset 232
	pushq	%r12
	.cfi_def_cfa_offset 240
	pushq	%rbp
	.cfi_def_cfa_offset 248
	pushq	104(%rsp)
	.cfi_def_cfa_offset 256
	movq	104(%rsp), %r9
	movq	96(%rsp), %r8
	movq	88(%rsp), %rcx
	movq	64(%rsp), %rdi
	call	_Z5forcelllPdS_S_S_S_S_PfS0_S_S_@PLT
	movl	%ebx, 180(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	movl	%r13d, 168(%rsp)
	movq	%rax, 184(%rsp)
	movq	%rax, 172(%rsp)
	movl	188(%rsp), %ecx
	addq	$64, %rsp
	.cfi_def_cfa_offset 192
	movq	116(%rsp), %rdx
	movq	104(%rsp), %rdi
	movl	112(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L5
	movq	16(%rsp), %rdx
	movq	(%rsp), %rdi
	movq	%r12, %rcx
	movq	%rbp, %rsi
	movsd	88(%rsp), %xmm1
	movsd	80(%rsp), %xmm0
	call	_Z10step_type1lddPdS_S_@PLT
.L5:
	pushq	%rax
	.cfi_def_cfa_offset 200
	movq	%rbx, %rdx
	movq	%r13, %rsi
	pushq	%r14
	.cfi_def_cfa_offset 208
	pushq	%r15
	.cfi_def_cfa_offset 216
	pushq	88(%rsp)
	.cfi_def_cfa_offset 224
	pushq	88(%rsp)
	.cfi_def_cfa_offset 232
	pushq	%r12
	.cfi_def_cfa_offset 240
	pushq	%rbp
	.cfi_def_cfa_offset 248
	pushq	104(%rsp)
	.cfi_def_cfa_offset 256
	movq	104(%rsp), %r9
	movq	96(%rsp), %r8
	movq	88(%rsp), %rcx
	movq	64(%rsp), %rdi
	call	_Z5forcelllPdS_S_S_S_S_PfS0_S_S_@PLT
	movl	%ebx, 180(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	movl	%r13d, 168(%rsp)
	movq	%rax, 184(%rsp)
	movq	%rax, 172(%rsp)
	movl	188(%rsp), %ecx
	addq	$64, %rsp
	.cfi_def_cfa_offset 192
	movq	116(%rsp), %rdx
	movq	104(%rsp), %rdi
	movl	112(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	movq	16(%rsp), %rdx
	movq	(%rsp), %rdi
	movq	%r12, %rcx
	movq	%rbp, %rsi
	movsd	72(%rsp), %xmm0
	addq	$136, %rsp
	.cfi_remember_state
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	jmp	_Z10step_type2ldPdS_S_@PLT
.L2:
	.cfi_restore_state
	addq	$136, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z8timestepllldPdS_S_S_S_S_S_S_S_PfS0_, .-_Z8timestepllldPdS_S_S_S_S_S_S_S_PfS0_
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2053:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	movq	%rax, %rdi
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2053:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC0:
	.long	1857643320
	.long	1072012939
	.align 8
.LC1:
	.long	-1159361311
	.long	-1077511635
	.align 8
.LC2:
	.long	1857643320
	.long	1073061515
	.align 8
.LC3:
	.long	-579680655
	.long	-1074053866
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>

#define  B0   0.675603595979828813
#define  B1  -0.175603595979828813
#define  D0   1.35120719195965763
#define  D1  -1.70241438391931525


/* function prototypes */
void force(long, long, long, double *, double *, double *, double *,double *, double *, float *, float *, double *, double *);
__global__ void step_type1(long , double, double, double *, double *, double *);
__global__ void step_type2(long , double, double *, double *, double *);


void timestep(long n, long nblock, long nthread, double dt, double *mx, double *my, double *magx, double *magy,
              double *magx_gpu, double *magy_gpu, double *r_gpu, double *p_gpu, double *f_gpu, float *sinr_gpu, float *cosr_gpu)
{
   double bb0,bb1,dd0,dd1;

   bb0=B0*dt;
   bb1=B1*dt;
   dd0=D0*dt;
   dd1=D1*dt;

   step_type1<<<nblock,nthread>>>(n,bb0,dd0,r_gpu,p_gpu,f_gpu);

   force(n,nblock,nthread,mx,my,magx,magy,r_gpu,f_gpu,sinr_gpu,cosr_gpu,magx_gpu,magy_gpu);

   step_type1<<<nblock,nthread>>>(n,bb1,dd1,r_gpu,p_gpu,f_gpu);

   force(n,nblock,nthread,mx,my,magx,magy,r_gpu,f_gpu,sinr_gpu,cosr_gpu,magx_gpu,magy_gpu);

   step_type1<<<nblock,nthread>>>(n,bb1,dd0,r_gpu,p_gpu,f_gpu);

   force(n,nblock,nthread,mx,my,magx,magy,r_gpu,f_gpu,sinr_gpu,cosr_gpu,magx_gpu,magy_gpu);

   step_type2<<<nblock,nthread>>>(n,bb0,r_gpu,p_gpu,f_gpu);

   return;
}

	.text
	.file	"timestep.hip"
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _Z8timestepllldPdS_S_S_S_S_S_S_S_PfS0_
.LCPI0_0:
	.quad	0x3fe59e8b6eb96338              # double 0.67560359597982877
.LCPI0_1:
	.quad	0xbfc67a2dbae58ce1              # double -0.1756035959798288
.LCPI0_2:
	.quad	0x3ff59e8b6eb96338              # double 1.3512071919596575
.LCPI0_3:
	.quad	0xbffb3d16dd72c671              # double -1.7024143839193153
	.text
	.globl	_Z8timestepllldPdS_S_S_S_S_S_S_S_PfS0_
	.type	_Z8timestepllldPdS_S_S_S_S_S_S_S_PfS0_,@function
_Z8timestepllldPdS_S_S_S_S_S_S_S_PfS0_: # @_Z8timestepllldPdS_S_S_S_S_S_S_S_PfS0_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%r9, 80(%rsp)                   # 8-byte Spill
	movq	%r8, 64(%rsp)                   # 8-byte Spill
	movq	%rcx, 48(%rsp)                  # 8-byte Spill
	movq	%rdx, %r15
	movq	%rsi, %rbx
	movq	%rdi, %r14
	movq	232(%rsp), %rax
	movq	%rax, 56(%rsp)                  # 8-byte Spill
	movq	224(%rsp), %rax
	movq	%rax, 72(%rsp)                  # 8-byte Spill
	movq	216(%rsp), %rax
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	movq	208(%rsp), %rax
	movq	%rax, 16(%rsp)                  # 8-byte Spill
	movq	200(%rsp), %r12
	movq	192(%rsp), %rax
	movq	%rax, 32(%rsp)                  # 8-byte Spill
	movq	184(%rsp), %rax
	movq	%rax, 40(%rsp)                  # 8-byte Spill
	movsd	.LCPI0_0(%rip), %xmm1           # xmm1 = mem[0],zero
	mulsd	%xmm0, %xmm1
	movsd	%xmm1, 104(%rsp)                # 8-byte Spill
	movsd	.LCPI0_2(%rip), %xmm1           # xmm1 = mem[0],zero
	movsd	%xmm0, 112(%rsp)                # 8-byte Spill
	mulsd	%xmm0, %xmm1
	movsd	%xmm1, 96(%rsp)                 # 8-byte Spill
	movl	%ebx, %ebp
	btsq	$32, %rbp
	movl	%r15d, %r13d
	btsq	$32, %r13
	movq	176(%rsp), %rax
	movq	%rax, 24(%rsp)                  # 8-byte Spill
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_2
# %bb.1:
	movq	%r14, %rdi
	movsd	104(%rsp), %xmm0                # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movsd	96(%rsp), %xmm1                 # 8-byte Reload
                                        # xmm1 = mem[0],zero
	movq	%r12, %rsi
	movq	16(%rsp), %rdx                  # 8-byte Reload
	movq	8(%rsp), %rcx                   # 8-byte Reload
	callq	_Z25__device_stub__step_type1lddPdS_S_
.LBB0_2:
	movsd	.LCPI0_1(%rip), %xmm0           # xmm0 = mem[0],zero
	mulsd	112(%rsp), %xmm0                # 8-byte Folded Reload
	movsd	%xmm0, 88(%rsp)                 # 8-byte Spill
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	%r14, %rdi
	movq	%rbx, %rsi
	movq	%r15, %rdx
	movq	56(%rsp), %rcx                  # 8-byte Reload
	movq	72(%rsp), %r8                   # 8-byte Reload
	movq	88(%rsp), %r9                   # 8-byte Reload
	pushq	40(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	56(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	80(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	104(%rsp)                       # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	48(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	%r12
	.cfi_adjust_cfa_offset 8
	pushq	80(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	callq	_Z5forcelllPdS_S_S_S_S_PfS0_S_S_
	addq	$64, %rsp
	.cfi_adjust_cfa_offset -64
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_4
# %bb.3:
	movsd	112(%rsp), %xmm1                # 8-byte Reload
                                        # xmm1 = mem[0],zero
	mulsd	.LCPI0_3(%rip), %xmm1
	movq	%r14, %rdi
	movsd	88(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movq	%r12, %rsi
	movq	16(%rsp), %rdx                  # 8-byte Reload
	movq	8(%rsp), %rcx                   # 8-byte Reload
	callq	_Z25__device_stub__step_type1lddPdS_S_
.LBB0_4:
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	%r14, %rdi
	movq	%rbx, %rsi
	movq	%r15, %rdx
	movq	56(%rsp), %rcx                  # 8-byte Reload
	movq	72(%rsp), %r8                   # 8-byte Reload
	movq	88(%rsp), %r9                   # 8-byte Reload
	pushq	40(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	56(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	80(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	104(%rsp)                       # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	48(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	%r12
	.cfi_adjust_cfa_offset 8
	pushq	80(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	callq	_Z5forcelllPdS_S_S_S_S_PfS0_S_S_
	addq	$64, %rsp
	.cfi_adjust_cfa_offset -64
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB0_6
# %bb.5:
	movq	%r14, %rdi
	movsd	88(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movsd	96(%rsp), %xmm1                 # 8-byte Reload
                                        # xmm1 = mem[0],zero
	movq	%r12, %rsi
	movq	16(%rsp), %rdx                  # 8-byte Reload
	movq	8(%rsp), %rcx                   # 8-byte Reload
	callq	_Z25__device_stub__step_type1lddPdS_S_
.LBB0_6:
	subq	$8, %rsp
	.cfi_adjust_cfa_offset 8
	movq	%r14, %rdi
	movq	%rbx, %rsi
	movq	%r15, %rdx
	movq	56(%rsp), %rcx                  # 8-byte Reload
	movq	72(%rsp), %r8                   # 8-byte Reload
	movq	88(%rsp), %r9                   # 8-byte Reload
	pushq	40(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	56(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	80(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	104(%rsp)                       # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	48(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	pushq	%r12
	.cfi_adjust_cfa_offset 8
	pushq	80(%rsp)                        # 8-byte Folded Reload
	.cfi_adjust_cfa_offset 8
	callq	_Z5forcelllPdS_S_S_S_S_PfS0_S_S_
	addq	$64, %rsp
	.cfi_adjust_cfa_offset -64
	movq	%rbp, %rdi
	movl	$1, %esi
	movq	%r13, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	je	.LBB0_8
# %bb.7:
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB0_8:
	.cfi_def_cfa_offset 176
	movq	%r14, %rdi
	movsd	104(%rsp), %xmm0                # 8-byte Reload
                                        # xmm0 = mem[0],zero
	movq	%r12, %rsi
	movq	16(%rsp), %rdx                  # 8-byte Reload
	movq	8(%rsp), %rcx                   # 8-byte Reload
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	_Z25__device_stub__step_type2ldPdS_S_ # TAILCALL
.Lfunc_end0:
	.size	_Z8timestepllldPdS_S_S_S_S_S_S_S_PfS0_, .Lfunc_end0-_Z8timestepllldPdS_S_S_S_S_S_S_S_PfS0_
	.cfi_endproc
                                        # -- End function
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_

	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.amdgpu_metadata
---
amdhsa.kernels:  []
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
