#include <stdio.h>

// We assume that size are divisible
#define RADIUS        2
#define BLOCK_SIZE_X    16 
#define BLOCK_SIZE_Y    16 
#define MATRIX_WIDTH (128)
#define MATRIX_HEIGHT (128)
#define NUM_ELEMENTS (MATRIX_HEIGHT * MATRIX_WIDTH)

// CUDA API error checking macro
#define cudaCheck(error) \
  if (error != cudaSuccess) { \
    printf("Fatal error: %s at %s:%d\n", \
      cudaGetErrorString(error), \
      __FILE__, __LINE__); \
    exit(1); \
  }

__global__ void stencil_2d(int *in, int *out) 
{
    /*

      Fill kernel code!
    
    */
}

int main()
{
  unsigned int i, j;
  int h_in[NUM_ELEMENTS], h_out[NUM_ELEMENTS];
  int *d_in, *d_out;

  // To access element (i, j) of the matrix, use h_in[i + j * MATRIX_WIDTH]
  // Initialize host data
  for (i = 0; i < (NUM_ELEMENTS); ++i)
    h_in[i] = 1;

  // Allocate space on the device
  cudaCheck( cudaMalloc( &d_in, NUM_ELEMENTS * sizeof(int)) );
  cudaCheck( cudaMalloc( &d_out, NUM_ELEMENTS * sizeof(int)) );

  // Copy input data to device
  cudaCheck( cudaMemcpy( d_in, h_in, NUM_ELEMENTS * sizeof(int), cudaMemcpyHostToDevice) );

  dim3 blocks = dim3(MATRIX_WIDTH / BLOCK_SIZE_X, MATRIX_HEIGHT / BLOCK_SIZE_Y, 1);
  dim3 threads = dim3(BLOCK_SIZE_X, BLOCK_SIZE_Y, 1);

  stencil_2d<<< blocks, threads >>> (d_in, d_out);

  cudaCheck(cudaPeekAtLastError());

  cudaCheck( cudaMemcpy( h_out, d_out, NUM_ELEMENTS * sizeof(int), cudaMemcpyDeviceToHost) );

  bool correct = true;
  // Verify results (inclusion-exclusion principle)
  for (j = 0; j < MATRIX_WIDTH; ++j) {
    for (i = 0; i < MATRIX_HEIGHT; ++i) {
      int expected = (2 * RADIUS + 1) * (2 * RADIUS + 1) - 
        (j < RADIUS ? (RADIUS - j) * (2 * RADIUS + 1) : 0) -
        (i < RADIUS ? (RADIUS - i) * (2 * RADIUS + 1) : 0) +
        ((j < RADIUS && i < RADIUS) ? (RADIUS - j) * (RADIUS - i) : 0) -
        (j > MATRIX_WIDTH - RADIUS - 1 ? (j + RADIUS + 1 - MATRIX_WIDTH) * (2 * RADIUS + 1) : 0) -
        (i > MATRIX_HEIGHT - RADIUS - 1 ? (i + RADIUS + 1 - MATRIX_HEIGHT) * (2 * RADIUS + 1) : 0) +
        (j > MATRIX_WIDTH - RADIUS - 1 && i > MATRIX_HEIGHT - RADIUS - 1 ?
         (j + RADIUS + 1 - MATRIX_WIDTH) * (i + RADIUS + 1 - MATRIX_HEIGHT) : 0) + 
        (j < RADIUS && i > MATRIX_HEIGHT - RADIUS - 1 ? 
         (RADIUS - j) * (i + RADIUS + 1 - MATRIX_HEIGHT) : 0) + 
        (i < RADIUS && j > MATRIX_WIDTH - RADIUS - 1 ?
         (RADIUS - i) *  (j + RADIUS + 1 - MATRIX_WIDTH) : 0);
      if (h_out[j + i * MATRIX_WIDTH] != expected) {
        printf("Element h_out[%d + %d * MATRIX_WIDTH] == %d != %d\n", j, i, h_out[j + i * MATRIX_WIDTH], expected);
        correct = false;
      }
    }
  }

  if (correct)
    printf("SUCCESS!\n");
  else
    printf("FAILURE!\n");

  // Free out memory
  cudaFree(d_in);
  cudaFree(d_out);

  return 0;
}


	.file	"tmpxft_002e323c_00000000-6_2dStencil.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z32__device_stub__Z10stencil_2dPiS_PiS_
	.type	_Z32__device_stub__Z10stencil_2dPiS_PiS_, @function
_Z32__device_stub__Z10stencil_2dPiS_PiS_:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z10stencil_2dPiS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L2:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z32__device_stub__Z10stencil_2dPiS_PiS_, .-_Z32__device_stub__Z10stencil_2dPiS_PiS_
	.globl	_Z10stencil_2dPiS_
	.type	_Z10stencil_2dPiS_, @function
_Z10stencil_2dPiS_:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z32__device_stub__Z10stencil_2dPiS_PiS_
	.cfi_endproc
.LFE2053:
	.size	_Z10stencil_2dPiS_, .-_Z10stencil_2dPiS_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/kasiaja/pwir-cuda-labs/master/lab1/ex/2dStencil.cu"
.LC1:
	.string	"Fatal error: %s at %s:%d\n"
.LC2:
	.string	"Element h_out[%d + %d * MATRIX_WIDTH] == %d != %d\n"
.LC3:
	.string	"SUCCESS!\n"
.LC4:
	.string	"FAILURE!\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	leaq	-131072(%rsp), %r11
	.cfi_def_cfa 11, 131128
.LPSRL0:
	subq	$4096, %rsp
	orq	$0, (%rsp)
	cmpq	%r11, %rsp
	jne	.LPSRL0
	.cfi_def_cfa_register 7
	subq	$88, %rsp
	.cfi_def_cfa_offset 131216
	movq	%fs:40, %rax
	movq	%rax, 131144(%rsp)
	xorl	%eax, %eax
.L9:
	leaq	72(%rsp), %rbx
	movl	$1, (%rbx,%rax,4)
	incq	%rax
	cmpq	$16384, %rax
	jne	.L9
	leaq	32(%rsp), %rbp
	movl	$65536, %esi
	movq	%rbp, %rdi
	call	cudaMalloc@PLT
	testl	%eax, %eax
	je	.L10
	movl	$65536, %esi
	movq	%rbp, %rdi
	call	cudaMalloc@PLT
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	movl	$41, %r8d
	movq	%rax, %rdx
	jmp	.L58
.L10:
	leaq	40(%rsp), %rbp
	movl	$65536, %esi
	movq	%rbp, %rdi
	call	cudaMalloc@PLT
	testl	%eax, %eax
	je	.L11
	movl	$65536, %esi
	movq	%rbp, %rdi
	call	cudaMalloc@PLT
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	movl	$42, %r8d
	movq	%rax, %rdx
.L58:
	movl	$2, %edi
	leaq	.LC0(%rip), %rcx
	leaq	.LC1(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L11:
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movl	$65536, %edx
	movq	%rbx, %rsi
	call	cudaMemcpy@PLT
	testl	%eax, %eax
	je	.L12
	movq	32(%rsp), %rdi
	movl	$65536, %edx
	movl	$1, %ecx
	movq	%rbx, %rsi
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	movl	$45, %r8d
	movq	%rax, %rdx
	jmp	.L58
.L12:
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$34359738376, %rdi
	movl	$1, 56(%rsp)
	movabsq	$68719476752, %rdx
	movq	%rdi, 48(%rsp)
	movq	%rdx, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L13
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdi
	call	_Z32__device_stub__Z10stencil_2dPiS_PiS_
.L13:
	call	cudaPeekAtLastError@PLT
	testl	%eax, %eax
	je	.L14
	call	cudaPeekAtLastError@PLT
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	movl	$52, %r8d
	movq	%rax, %rdx
	jmp	.L58
.L14:
	movq	40(%rsp), %rsi
	leaq	65608(%rsp), %rbp
	movl	$65536, %edx
	xorl	%r15d, %r15d
	movl	$2, %ecx
	movq	%rbp, %rdi
	movl	$-125, %ebx
	call	cudaMemcpy@PLT
	movl	%eax, %edx
	movb	$1, %al
	testl	%edx, %edx
	je	.L15
	movq	40(%rsp), %rsi
	movl	$65536, %edx
	movl	$2, %ecx
	movq	%rbp, %rdi
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	movl	$54, %r8d
	movq	%rax, %rdx
	jmp	.L58
.L23:
	xorl	%edi, %edi
	cmpl	$1, %ecx
	ja	.L16
	imull	$-5, %ecx, %edi
	addl	$10, %edi
.L16:
	cmpl	$1, %ecx
	movl	%ecx, %r8d
	movl	8(%rsp), %r9d
	movl	12(%rsp), %esi
	setbe	4(%rsp)
	orl	%edx, %r8d
	cmpl	$1, %r8d
	movl	(%rsp), %r8d
	cmova	%r15d, %r8d
	subl	%esi, %r9d
	subl	%edi, %r9d
	xorl	%edi, %edi
	addl	%r8d, %r9d
	cmpl	$125, %ecx
	jbe	.L18
	leal	(%rcx,%rcx,4), %edi
	subl	$625, %edi
.L18:
	subl	%edi, %r9d
	cmpl	$125, %ecx
	seta	%dil
	jbe	.L32
	movl	%ebp, %r8d
	testb	%r14b, %r14b
	je	.L32
.L19:
	addl	%r8d, %r9d
	testb	%r10b, %r10b
	je	.L33
	testb	%dil, %dil
	je	.L33
	movl	%r13d, %edi
.L20:
	addl	%edi, %r9d
	cmpb	$0, 4(%rsp)
	je	.L34
	movl	%r12d, %esi
	testb	%r14b, %r14b
	je	.L34
.L21:
	addl	%esi, %r9d
	movl	%ecx, %esi
	sall	$7, %esi
	addl	%edx, %esi
	movl	%esi, %esi
	movl	65608(%rsp,%rsi,4), %r8d
	cmpl	%r9d, %r8d
	je	.L22
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	movl	%ecx, 20(%rsp)
	movl	%r11d, 28(%rsp)
	movb	%r10b, 27(%rsp)
	movl	%edx, 4(%rsp)
	call	__printf_chk@PLT
	movl	28(%rsp), %r11d
	movl	20(%rsp), %ecx
	xorl	%eax, %eax
	movb	27(%rsp), %r10b
	movl	4(%rsp), %edx
.L22:
	movl	16(%rsp), %esi
	incl	%ecx
	addl	%r11d, (%rsp)
	subl	%ebx, %r12d
	addl	%ebx, %ebp
	addl	%esi, %r13d
	cmpl	$128, %ecx
	jne	.L23
	incl	%ebx
	cmpl	$3, %ebx
	je	.L24
.L15:
	leal	125(%rbx), %edx
	leal	(%rbx,%rbx,4), %ecx
	movl	$25, %esi
	cmpl	$1, %edx
	leal	640(%rcx), %edi
	leal	(%rbx,%rbx), %r12d
	setbe	%r10b
	leal	123(%rbx), %r11d
	testb	%r10b, %r10b
	cmovne	%edi, %esi
	cmpl	$125, %edx
	seta	%r14b
	testb	%r14b, %r14b
	movl	%esi, 8(%rsp)
	cmove	%r15d, %ecx
	imull	$125, %ebx, %ebp
	movl	%ecx, 12(%rsp)
	movl	$-123, %ecx
	subl	%ebx, %ecx
	leal	15375(%rbp), %r13d
	negl	%ebp
	movl	%ecx, 16(%rsp)
	movl	$-246, %ecx
	subl	%r12d, %ecx
	movl	%ecx, (%rsp)
	xorl	%ecx, %ecx
	jmp	.L23
.L32:
	xorl	%r8d, %r8d
	jmp	.L19
.L33:
	xorl	%edi, %edi
	jmp	.L20
.L34:
	xorl	%esi, %esi
	jmp	.L21
.L24:
	leaq	.LC3(%rip), %rsi
	testb	%al, %al
	jne	.L57
	leaq	.LC4(%rip), %rsi
.L57:
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	131144(%rsp), %rax
	subq	%fs:40, %rax
	je	.L27
	call	__stack_chk_fail@PLT
.L27:
	addq	$131160, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC5:
	.string	"_Z10stencil_2dPiS_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC5(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z10stencil_2dPiS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>

// We assume that size are divisible
#define RADIUS        2
#define BLOCK_SIZE_X    16 
#define BLOCK_SIZE_Y    16 
#define MATRIX_WIDTH (128)
#define MATRIX_HEIGHT (128)
#define NUM_ELEMENTS (MATRIX_HEIGHT * MATRIX_WIDTH)

// CUDA API error checking macro
#define cudaCheck(error) \
  if (error != hipSuccess) { \
    printf("Fatal error: %s at %s:%d\n", \
      hipGetErrorString(error), \
      __FILE__, __LINE__); \
    exit(1); \
  }

__global__ void stencil_2d(int *in, int *out) 
{
    /*

      Fill kernel code!
    
    */
}

int main()
{
  unsigned int i, j;
  int h_in[NUM_ELEMENTS], h_out[NUM_ELEMENTS];
  int *d_in, *d_out;

  // To access element (i, j) of the matrix, use h_in[i + j * MATRIX_WIDTH]
  // Initialize host data
  for (i = 0; i < (NUM_ELEMENTS); ++i)
    h_in[i] = 1;

  // Allocate space on the device
  cudaCheck( hipMalloc( &d_in, NUM_ELEMENTS * sizeof(int)) );
  cudaCheck( hipMalloc( &d_out, NUM_ELEMENTS * sizeof(int)) );

  // Copy input data to device
  cudaCheck( hipMemcpy( d_in, h_in, NUM_ELEMENTS * sizeof(int), hipMemcpyHostToDevice) );

  dim3 blocks = dim3(MATRIX_WIDTH / BLOCK_SIZE_X, MATRIX_HEIGHT / BLOCK_SIZE_Y, 1);
  dim3 threads = dim3(BLOCK_SIZE_X, BLOCK_SIZE_Y, 1);

  stencil_2d<<< blocks, threads >>> (d_in, d_out);

  cudaCheck(hipPeekAtLastError());

  cudaCheck( hipMemcpy( h_out, d_out, NUM_ELEMENTS * sizeof(int), hipMemcpyDeviceToHost) );

  bool correct = true;
  // Verify results (inclusion-exclusion principle)
  for (j = 0; j < MATRIX_WIDTH; ++j) {
    for (i = 0; i < MATRIX_HEIGHT; ++i) {
      int expected = (2 * RADIUS + 1) * (2 * RADIUS + 1) - 
        (j < RADIUS ? (RADIUS - j) * (2 * RADIUS + 1) : 0) -
        (i < RADIUS ? (RADIUS - i) * (2 * RADIUS + 1) : 0) +
        ((j < RADIUS && i < RADIUS) ? (RADIUS - j) * (RADIUS - i) : 0) -
        (j > MATRIX_WIDTH - RADIUS - 1 ? (j + RADIUS + 1 - MATRIX_WIDTH) * (2 * RADIUS + 1) : 0) -
        (i > MATRIX_HEIGHT - RADIUS - 1 ? (i + RADIUS + 1 - MATRIX_HEIGHT) * (2 * RADIUS + 1) : 0) +
        (j > MATRIX_WIDTH - RADIUS - 1 && i > MATRIX_HEIGHT - RADIUS - 1 ?
         (j + RADIUS + 1 - MATRIX_WIDTH) * (i + RADIUS + 1 - MATRIX_HEIGHT) : 0) + 
        (j < RADIUS && i > MATRIX_HEIGHT - RADIUS - 1 ? 
         (RADIUS - j) * (i + RADIUS + 1 - MATRIX_HEIGHT) : 0) + 
        (i < RADIUS && j > MATRIX_WIDTH - RADIUS - 1 ?
         (RADIUS - i) *  (j + RADIUS + 1 - MATRIX_WIDTH) : 0);
      if (h_out[j + i * MATRIX_WIDTH] != expected) {
        printf("Element h_out[%d + %d * MATRIX_WIDTH] == %d != %d\n", j, i, h_out[j + i * MATRIX_WIDTH], expected);
        correct = false;
      }
    }
  }

  if (correct)
    printf("SUCCESS!\n");
  else
    printf("FAILURE!\n");

  // Free out memory
  hipFree(d_in);
  hipFree(d_out);

  return 0;
}


	.text
	.file	"2dStencil.hip"
	.globl	_Z25__device_stub__stencil_2dPiS_ # -- Begin function _Z25__device_stub__stencil_2dPiS_
	.type	_Z25__device_stub__stencil_2dPiS_,@function
_Z25__device_stub__stencil_2dPiS_:      # @_Z25__device_stub__stencil_2dPiS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10stencil_2dPiS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z25__device_stub__stencil_2dPiS_, .Lfunc_end0-_Z25__device_stub__stencil_2dPiS_
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$131176, %rsp                   # imm = 0x20068
	.cfi_def_cfa_offset 131232
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	xorl	%eax, %eax
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	movl	$1, 96(%rsp,%rax,4)
	incq	%rax
	cmpq	$16384, %rax                    # imm = 0x4000
	jne	.LBB1_1
# %bb.2:
	leaq	16(%rsp), %rdi
	movl	$65536, %esi                    # imm = 0x10000
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_3
# %bb.4:
	leaq	8(%rsp), %rdi
	movl	$65536, %esi                    # imm = 0x10000
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_5
# %bb.6:
	movq	16(%rsp), %rdi
	leaq	96(%rsp), %rsi
	movl	$65536, %edx                    # imm = 0x10000
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_7
# %bb.8:
	movabsq	$34359738376, %rdi              # imm = 0x800000008
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_10
# %bb.9:
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	callq	_Z25__device_stub__stencil_2dPiS_
.LBB1_10:
	callq	hipPeekAtLastError
	testl	%eax, %eax
	jne	.LBB1_11
# %bb.13:
	movq	8(%rsp), %rsi
	leaq	65632(%rsp), %rbp
	movl	$65536, %edx                    # imm = 0x10000
	movq	%rbp, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_21
# %bb.14:                               # %.preheader.preheader
	movb	$1, %al
	movl	%eax, 28(%rsp)                  # 4-byte Spill
	movl	$125, 40(%rsp)                  # 4-byte Folded Spill
	movl	$4, %r12d
	movl	$-2, 36(%rsp)                   # 4-byte Folded Spill
	movl	$-250, %r14d
	movl	$15625, %ebx                    # imm = 0x3D09
	movl	$-125, 32(%rsp)                 # 4-byte Folded Spill
	movl	$-250, %r13d
	xorl	%esi, %esi
	movl	$2, %r9d
.LBB1_15:                               # %.preheader
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_16 Depth 2
	movl	$2, %eax
	subl	%esi, %eax
	leal	(%rax,%rax,4), %eax
	movl	$25, %ecx
	subl	%eax, %ecx
	cmpq	$2, %rsi
	movl	$25, %eax
	cmovael	%eax, %ecx
	leal	(%rsi,%rsi,4), %eax
	movl	$625, %edi                      # imm = 0x271
	movl	$625, %r8d                      # imm = 0x271
	subl	%eax, %r8d
	movq	%rsi, 48(%rsp)                  # 8-byte Spill
	cmpq	$126, %rsi
	movl	$0, %eax
	cmovbl	%eax, %r8d
	addl	%ecx, %r8d
	movl	%r8d, 76(%rsp)                  # 4-byte Spill
	movl	$-10, %eax
	movq	%rbp, 88(%rsp)                  # 8-byte Spill
	movl	%ebx, 64(%rsp)                  # 4-byte Spill
	movl	%r14d, 68(%rsp)                 # 4-byte Spill
	movl	%r12d, 72(%rsp)                 # 4-byte Spill
	movl	%r13d, 60(%rsp)                 # 4-byte Spill
	xorl	%r15d, %r15d
	movl	%r9d, 44(%rsp)                  # 4-byte Spill
.LBB1_16:                               #   Parent Loop BB1_15 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	%eax, %r9d
	movl	%r15d, %eax
	movq	48(%rsp), %r11                  # 8-byte Reload
	orl	%r11d, %eax
	cmpl	$2, %eax
	movl	$0, %eax
	cmovbl	%r12d, %eax
	cmpq	$126, %r15
	movl	$0, %ecx
	movl	%edi, 84(%rsp)                  # 4-byte Spill
	cmovael	%edi, %ecx
	movl	$0, %r8d
	cmovael	%ebx, %r8d
	movl	$0, %edx
	cmovael	%r14d, %edx
	cmpq	$2, %r11
	movl	$0, %r10d
	cmovael	%r10d, %edx
	cmpq	$2, %r15
	movl	$0, %esi
	movl	%r9d, 80(%rsp)                  # 4-byte Spill
	cmovbl	%r9d, %esi
	movl	44(%rsp), %r9d                  # 4-byte Reload
	movl	$0, %edi
	cmovbl	%r13d, %edi
	cmpq	$126, %r11
	cmovbl	%r10d, %r8d
	cmovbl	%r10d, %edi
	addl	76(%rsp), %esi                  # 4-byte Folded Reload
	addl	%eax, %esi
	addl	%ecx, %esi
	addl	%edx, %r8d
	addl	%esi, %r8d
	addl	%edi, %r8d
	movl	(%rbp), %ecx
	cmpl	%r8d, %ecx
	je	.LBB1_18
# %bb.17:                               #   in Loop: Header=BB1_16 Depth=2
	movl	$0, 28(%rsp)                    # 4-byte Folded Spill
	movl	$.L.str.2, %edi
	movq	48(%rsp), %rsi                  # 8-byte Reload
                                        # kill: def $esi killed $esi killed $rsi
	movl	%r15d, %edx
	xorl	%eax, %eax
	callq	printf
	movl	44(%rsp), %r9d                  # 4-byte Reload
.LBB1_18:                               #   in Loop: Header=BB1_16 Depth=2
	incq	%r15
	movl	84(%rsp), %edi                  # 4-byte Reload
	addl	$-5, %edi
	movl	80(%rsp), %eax                  # 4-byte Reload
	addl	$5, %eax
	addl	40(%rsp), %r13d                 # 4-byte Folded Reload
	addl	36(%rsp), %r12d                 # 4-byte Folded Reload
	addl	%r9d, %r14d
	addl	32(%rsp), %ebx                  # 4-byte Folded Reload
	addq	$512, %rbp                      # imm = 0x200
	cmpq	$128, %r15
	jne	.LBB1_16
# %bb.19:                               #   in Loop: Header=BB1_15 Depth=1
	movq	48(%rsp), %rsi                  # 8-byte Reload
	incq	%rsi
	movl	60(%rsp), %r13d                 # 4-byte Reload
	addl	$2, %r13d
	decl	40(%rsp)                        # 4-byte Folded Spill
	movl	72(%rsp), %r12d                 # 4-byte Reload
	addl	$-2, %r12d
	incl	36(%rsp)                        # 4-byte Folded Spill
	movl	68(%rsp), %r14d                 # 4-byte Reload
	addl	$125, %r14d
	decl	%r9d
	movl	64(%rsp), %ebx                  # 4-byte Reload
	addl	$-125, %ebx
	incl	32(%rsp)                        # 4-byte Folded Spill
	movq	88(%rsp), %rbp                  # 8-byte Reload
	addq	$4, %rbp
	cmpq	$128, %rsi
	jne	.LBB1_15
# %bb.20:
	testb	$1, 28(%rsp)                    # 1-byte Folded Reload
	movl	$.Lstr, %eax
	movl	$.Lstr.1, %edi
	cmoveq	%rax, %rdi
	callq	puts@PLT
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$131176, %rsp                   # imm = 0x20068
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB1_3:
	.cfi_def_cfa_offset 131232
	leaq	16(%rsp), %rdi
	callq	_ZL9hipMallocIiE10hipError_tPPT_m
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movl	$.L.str.1, %edx
	movq	%rax, %rsi
	movl	$43, %ecx
	jmp	.LBB1_12
.LBB1_5:
	leaq	8(%rsp), %rdi
	callq	_ZL9hipMallocIiE10hipError_tPPT_m
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movl	$.L.str.1, %edx
	movq	%rax, %rsi
	movl	$44, %ecx
	jmp	.LBB1_12
.LBB1_7:
	movq	16(%rsp), %rdi
	leaq	96(%rsp), %rsi
	movl	$65536, %edx                    # imm = 0x10000
	movl	$1, %ecx
	callq	hipMemcpy
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movl	$.L.str.1, %edx
	movq	%rax, %rsi
	movl	$47, %ecx
	jmp	.LBB1_12
.LBB1_11:
	callq	hipPeekAtLastError
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movl	$.L.str.1, %edx
	movq	%rax, %rsi
	movl	$54, %ecx
	jmp	.LBB1_12
.LBB1_21:
	movq	8(%rsp), %rsi
	leaq	65632(%rsp), %rdi
	movl	$65536, %edx                    # imm = 0x10000
	movl	$2, %ecx
	callq	hipMemcpy
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movl	$.L.str.1, %edx
	movq	%rax, %rsi
	movl	$56, %ecx
.LBB1_12:
	xorl	%eax, %eax
	callq	printf
	movl	$1, %edi
	callq	exit
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.type	_ZL9hipMallocIiE10hipError_tPPT_m,@function # -- Begin function _ZL9hipMallocIiE10hipError_tPPT_m
_ZL9hipMallocIiE10hipError_tPPT_m:      # @_ZL9hipMallocIiE10hipError_tPPT_m
	.cfi_startproc
# %bb.0:
	movl	$65536, %esi                    # imm = 0x10000
	jmp	hipMalloc                       # TAILCALL
.Lfunc_end2:
	.size	_ZL9hipMallocIiE10hipError_tPPT_m, .Lfunc_end2-_ZL9hipMallocIiE10hipError_tPPT_m
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10stencil_2dPiS_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z10stencil_2dPiS_,@object      # @_Z10stencil_2dPiS_
	.section	.rodata,"a",@progbits
	.globl	_Z10stencil_2dPiS_
	.p2align	3, 0x0
_Z10stencil_2dPiS_:
	.quad	_Z25__device_stub__stencil_2dPiS_
	.size	_Z10stencil_2dPiS_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Fatal error: %s at %s:%d\n"
	.size	.L.str, 26

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/kasiaja/pwir-cuda-labs/master/lab1/ex/2dStencil.hip"
	.size	.L.str.1, 114

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Element h_out[%d + %d * MATRIX_WIDTH] == %d != %d\n"
	.size	.L.str.2, 51

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z10stencil_2dPiS_"
	.size	.L__unnamed_1, 19

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"FAILURE!"
	.size	.Lstr, 9

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"SUCCESS!"
	.size	.Lstr.1, 9

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z25__device_stub__stencil_2dPiS_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z10stencil_2dPiS_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z10stencil_2dPiS_      ; -- Begin function _Z10stencil_2dPiS_
	.globl	_Z10stencil_2dPiS_
	.p2align	8
	.type	_Z10stencil_2dPiS_,@function
_Z10stencil_2dPiS_:                     ; @_Z10stencil_2dPiS_
; %bb.0:
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10stencil_2dPiS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 16
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 1
		.amdhsa_next_free_sgpr 1
		.amdhsa_reserve_vcc 0
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z10stencil_2dPiS_, .Lfunc_end0-_Z10stencil_2dPiS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 4
; NumSgprs: 0
; NumVgprs: 0
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 0
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 1
; NumVGPRsForWavesPerEU: 1
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 16
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10stencil_2dPiS_
    .private_segment_fixed_size: 0
    .sgpr_count:     0
    .sgpr_spill_count: 0
    .symbol:         _Z10stencil_2dPiS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     0
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
