#include <stdio.h>
#include <cuda_runtime.h>
//#include <cutil.h>

#define TILE_WIDTH 64
#define WIDTH_PER_THREAD 4
#define SW TILE_WIDTH/WIDTH_PER_THREAD
#define N 2048


void err_handling(cudaError_t *err, const char *str)
{
	if (*err != cudaSuccess) {
		printf("%s\n", str);
		exit(EXIT_FAILURE);
	}
}

__global__ void matMul(const float *A, const float *B, float *C, int m, int k, int n)
{
	__shared__ float sh_A00[SW][SW];
	__shared__ float sh_A01[SW][SW];
	__shared__ float sh_A02[SW][SW];
	__shared__ float sh_A03[SW][SW];
	__shared__ float sh_A10[SW][SW];
	__shared__ float sh_A11[SW][SW];
	__shared__ float sh_A12[SW][SW];
	__shared__ float sh_A13[SW][SW];
	__shared__ float sh_A20[SW][SW];
	__shared__ float sh_A21[SW][SW];
	__shared__ float sh_A22[SW][SW];
	__shared__ float sh_A23[SW][SW];
	__shared__ float sh_A30[SW][SW];
	__shared__ float sh_A31[SW][SW];
	__shared__ float sh_A32[SW][SW];
	__shared__ float sh_A33[SW][SW];
	__shared__ float sh_B00[SW][SW];
	__shared__ float sh_B01[SW][SW];
	__shared__ float sh_B02[SW][SW];
	__shared__ float sh_B03[SW][SW];
	__shared__ float sh_B10[SW][SW];
	__shared__ float sh_B11[SW][SW];
	__shared__ float sh_B12[SW][SW];
	__shared__ float sh_B13[SW][SW];
	__shared__ float sh_B20[SW][SW];
	__shared__ float sh_B21[SW][SW];
	__shared__ float sh_B22[SW][SW];
	__shared__ float sh_B23[SW][SW];
	__shared__ float sh_B30[SW][SW];
	__shared__ float sh_B31[SW][SW];
	__shared__ float sh_B32[SW][SW];
	__shared__ float sh_B33[SW][SW];

	int x = threadIdx.x;
	int y = threadIdx.y;
	int tx = x*WIDTH_PER_THREAD;
	int ty = y*WIDTH_PER_THREAD;

	int row = blockIdx.y*TILE_WIDTH + ty;
	int col = blockIdx.x*TILE_WIDTH + tx;

	float c00 = 0.0;
	float c01 = 0.0;
	float c02 = 0.0;
	float c03 = 0.0;
	float c10 = 0.0;
	float c11 = 0.0;
	float c12 = 0.0;
	float c13 = 0.0;
	float c20 = 0.0;
	float c21 = 0.0;
	float c22 = 0.0;
	float c23 = 0.0;
	float c30 = 0.0;
	float c31 = 0.0;
	float c32 = 0.0;
	float c33 = 0.0;

	float a00 = 0.0;
	float a01 = 0.0;
	float a02 = 0.0;
	float a03 = 0.0;
	float a10 = 0.0;
	float a11 = 0.0;
	float a12 = 0.0;
	float a13 = 0.0;
	float a20 = 0.0;
	float a21 = 0.0;
	float a22 = 0.0;
	float a23 = 0.0;
	float a30 = 0.0;
	float a31 = 0.0;
	float a32 = 0.0;
	float a33 = 0.0;

	float b00 = 0.0;
	float b01 = 0.0;
	float b02 = 0.0;
	float b03 = 0.0;
	float b10 = 0.0;
	float b11 = 0.0;
	float b12 = 0.0;
	float b13 = 0.0;
	float b20 = 0.0;
	float b21 = 0.0;
	float b22 = 0.0;
	float b23 = 0.0;
	float b30 = 0.0;
	float b31 = 0.0;
	float b32 = 0.0;
	float b33 = 0.0;
	
	for (int t = 0; t < k; t += TILE_WIDTH) {
		sh_A00[y][x] = A[row*k     + t + tx];
		sh_A01[y][x] = A[row*k     + t + tx+1];
		sh_A02[y][x] = A[row*k     + t + tx+2];
		sh_A03[y][x] = A[row*k     + t + tx+3];
		sh_A10[y][x] = A[(row+1)*k + t + tx];
		sh_A11[y][x] = A[(row+1)*k + t + tx+1];
		sh_A12[y][x] = A[(row+1)*k + t + tx+2];
		sh_A13[y][x] = A[(row+1)*k + t + tx+3];
		sh_A20[y][x] = A[(row+2)*k + t + tx];
		sh_A21[y][x] = A[(row+2)*k + t + tx+1];
		sh_A22[y][x] = A[(row+2)*k + t + tx+2];
		sh_A23[y][x] = A[(row+2)*k + t + tx+3];
		sh_A30[y][x] = A[(row+3)*k + t + tx];
		sh_A31[y][x] = A[(row+3)*k + t + tx+1];
		sh_A32[y][x] = A[(row+3)*k + t + tx+2];
		sh_A33[y][x] = A[(row+3)*k + t + tx+3];


		sh_B00[y][x] = B[(t+ty)*k   + col];
		sh_B01[y][x] = B[(t+ty)*k   + col+1];
		sh_B02[y][x] = B[(t+ty)*k   + col+2];
		sh_B03[y][x] = B[(t+ty)*k   + col+3];
		sh_B10[y][x] = B[(t+ty+1)*k + col];
		sh_B11[y][x] = B[(t+ty+1)*k + col+1];
		sh_B12[y][x] = B[(t+ty+1)*k + col+2];
		sh_B13[y][x] = B[(t+ty+1)*k + col+3];
		sh_B20[y][x] = B[(t+ty+2)*k + col];
		sh_B21[y][x] = B[(t+ty+2)*k + col+1];
		sh_B22[y][x] = B[(t+ty+2)*k + col+2];
		sh_B23[y][x] = B[(t+ty+2)*k + col+3];
		sh_B30[y][x] = B[(t+ty+3)*k + col];
		sh_B31[y][x] = B[(t+ty+3)*k + col+1];
		sh_B32[y][x] = B[(t+ty+3)*k + col+2];
		sh_B33[y][x] = B[(t+ty+3)*k + col+3];
		__syncthreads();

		int ii = x;
		for (int i = 0; i < TILE_WIDTH; i += WIDTH_PER_THREAD) {
			ii %= 16;
			a00 = sh_A00[y][ii];
			a01 = sh_A01[y][ii];
			a10 = sh_A10[y][ii];
			a11 = sh_A11[y][ii];

			b00 = sh_B00[ii][x];
			b01 = sh_B01[ii][x];
			b10 = sh_B10[ii][x];
			b11 = sh_B11[ii][x];

			c00 += a00*b00 + a01*b10;
			c01 += a00*b01 + a01*b11;
			c10 += a10*b00 + a11*b10;
			c11 += a10*b01 + a11*b11;

/*******************************************************************/
			a22 = sh_A22[y][ii];
			a23 = sh_A23[y][ii];
			a32 = sh_A32[y][ii];
			a33 = sh_A33[y][ii];

			b22 = sh_B22[ii][x];
			b23 = sh_B23[ii][x];
			b32 = sh_B32[ii][x];
			b33 = sh_B33[ii][x];

			c22 += a22*b22 + a23*b32;
			c23 += a22*b23 + a23*b33;
			c32 += a32*b22 + a33*b32;
			c33 += a32*b23 + a33*b33;

/*******************************************************************/
			a02 = sh_A02[y][ii];
			a03 = sh_A03[y][ii];
			a12 = sh_A12[y][ii];
			a13 = sh_A13[y][ii];

			b20 = sh_B20[ii][x];
			b21 = sh_B21[ii][x];
			b30 = sh_B30[ii][x];
			b31 = sh_B31[ii][x];

			c00 += a02*b20 + a03*b30;
			c01 += a02*b21 + a03*b31;
			c10 += a12*b20 + a13*b30;
			c11 += a12*b21 + a13*b31;

			c02 += a02*b22 + a03*b32;
			c03 += a02*b23 + a03*b33;
			c12 += a12*b22 + a13*b32;
			c13 += a12*b23 + a13*b33;

			c20 += a22*b20 + a23*b30;
			c21 += a22*b21 + a23*b31;
			c30 += a32*b20 + a33*b30;
			c31 += a32*b21 + a33*b31;
/*******************************************************************/

			a20 = sh_A20[y][ii];
			a21 = sh_A21[y][ii];
			a30 = sh_A30[y][ii];
			a31 = sh_A31[y][ii];

			b02 = sh_B02[ii][x];
			b03 = sh_B03[ii][x];
			b12 = sh_B12[ii][x];
			b13 = sh_B13[ii][x];

			c22 += a20*b02 + a21*b12;
			c23 += a20*b03 + a21*b13;
			c32 += a30*b02 + a31*b12;
			c33 += a30*b03 + a31*b13;

			c20 += a20*b00 + a21*b10;
			c21 += a20*b01 + a21*b11;
			c30 += a30*b00 + a31*b10;
			c31 += a30*b01 + a31*b11;

			c02 += a00*b02 + a01*b12;
			c03 += a00*b03 + a01*b13;
			c12 += a10*b02 + a11*b12;
			c13 += a10*b03 + a11*b13;
/*******************************************************************/

			++ii;
		}
		__syncthreads();
	}
	C[row*n     + col]   = c00;
	C[row*n     + col+1] = c01;
	C[row*n     + col+2] = c02;
	C[row*n     + col+3] = c03;
	C[(row+1)*n + col]   = c10;
	C[(row+1)*n + col+1] = c11;
	C[(row+1)*n + col+2] = c12;
	C[(row+1)*n + col+3] = c13;
	C[(row+2)*n + col]   = c20;
	C[(row+2)*n + col+1] = c21;
	C[(row+2)*n + col+2] = c22;
	C[(row+2)*n + col+3] = c23;
	C[(row+3)*n + col]   = c30;
	C[(row+3)*n + col+1] = c31;
	C[(row+3)*n + col+2] = c32;
	C[(row+3)*n + col+3] = c33;
}

int main(void)
{
	cudaError_t err = cudaSuccess;
	
	int m = N;
	int n = N;
	int k = N;
	
	float *A = (float*)malloc(m*k*sizeof(float));
	float *B = (float*)malloc(k*n*sizeof(float));
	float *C = (float*)malloc(m*n*sizeof(float));

	if (A == NULL || B == NULL || C == NULL) {
		printf("allocate host error!\n");
		return 1;
	}

	for (int i = 0; i < m*k; ++i) {
		A[i] = rand()/(float)RAND_MAX;
	}

	for (int i = 0; i < k*n; ++i) {
		B[i] = rand()/(float)RAND_MAX;
	}

	for (int i = 0; i < m*n; ++i) {
		C[i] = rand()/(float)RAND_MAX;
	}

	float *dev_A = NULL;
	float *dev_B = NULL;
	float *dev_C = NULL;

	err = cudaMalloc((void**)&dev_A, m*k*sizeof(float));
	err_handling(&err, "allocate devecie error A!");

	err = cudaMalloc((void**)&dev_B, k*n*sizeof(float));
	err_handling(&err, "allocate devecie error B!");

	err = cudaMalloc((void**)&dev_C, m*n*sizeof(float));
	err_handling(&err, "allocate devecie error C!");
	
	err = cudaMemcpy(dev_A, A, m*k*sizeof(float), cudaMemcpyHostToDevice);
	err_handling(&err, "memcpy to A error!");

	err = cudaMemcpy(dev_B, B, k*n*sizeof(float), cudaMemcpyHostToDevice);
	err_handling(&err, "memcpy to B error!");

	dim3 dimGrid((m-1)/TILE_WIDTH+1, (n-1)/TILE_WIDTH+1, 1);
	dim3 dimBlock(TILE_WIDTH/WIDTH_PER_THREAD, TILE_WIDTH/WIDTH_PER_THREAD, 1);

	cudaEvent_t start, stop;

	cudaEventCreate(&start);
	cudaEventCreate(&stop);
	
	cudaEventRecord(start, 0);
	matMul<<<dimGrid, dimBlock>>>(dev_A, dev_B, dev_C, m, k, n);
	cudaEventRecord(stop, 0);

	cudaEventSynchronize(start);
	cudaEventSynchronize(stop);

	float time_elapsed = 0;
	cudaEventElapsedTime(&time_elapsed, start, stop);
	printf("%fms\n", time_elapsed);

	err = cudaMemcpy(C, dev_C, m*n*sizeof(float), cudaMemcpyDeviceToHost);
	err_handling(&err, "memcpy to host C error!");

	printf("%f %f\n", C[100*N+100], C[234*N+234]);

	err = cudaFree(dev_A);
	err_handling(&err, "mem free A error!");

	err = cudaFree(dev_B);
	err_handling(&err, "mem free B error!");

	err = cudaFree(dev_C);
	err_handling(&err, "mem free C error!");

	err = cudaDeviceReset();
	err_handling(&err, "device reset error!");

	return 0;
}

	.file	"tmpxft_002d0cce_00000000-6_tiled_matmul-3.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"%s\n"
	.text
	.globl	_Z12err_handlingP9cudaErrorPKc
	.type	_Z12err_handlingP9cudaErrorPKc, @function
_Z12err_handlingP9cudaErrorPKc:
.LFB2027:
	.cfi_startproc
	endbr64
	cmpl	$0, (%rdi)
	je	.L2
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	%rsi, %rdx
	movl	$2, %edi
	leaq	.LC0(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L2:
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z12err_handlingP9cudaErrorPKc, .-_Z12err_handlingP9cudaErrorPKc
	.globl	_Z34__device_stub__Z6matMulPKfS0_PfiiiPKfS0_Pfiii
	.type	_Z34__device_stub__Z6matMulPKfS0_PfiiiPKfS0_Pfiii, @function
_Z34__device_stub__Z6matMulPKfS0_PfiiiPKfS0_Pfiii:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L8
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z6matMulPKfS0_Pfiii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L8:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L10
	call	__stack_chk_fail@PLT
.L10:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z34__device_stub__Z6matMulPKfS0_PfiiiPKfS0_Pfiii, .-_Z34__device_stub__Z6matMulPKfS0_PfiiiPKfS0_Pfiii
	.globl	_Z6matMulPKfS0_Pfiii
	.type	_Z6matMulPKfS0_Pfiii, @function
_Z6matMulPKfS0_Pfiii:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z34__device_stub__Z6matMulPKfS0_PfiiiPKfS0_Pfiii
	.cfi_endproc
.LFE2054:
	.size	_Z6matMulPKfS0_Pfiii, .-_Z6matMulPKfS0_Pfiii
	.section	.rodata.str1.1
.LC1:
	.string	"allocate host error!\n"
.LC3:
	.string	"allocate devecie error A!"
.LC4:
	.string	"allocate devecie error B!"
.LC5:
	.string	"allocate devecie error C!"
.LC6:
	.string	"memcpy to A error!"
.LC7:
	.string	"memcpy to B error!"
.LC9:
	.string	"%fms\n"
.LC10:
	.string	"memcpy to host C error!"
.LC11:
	.string	"%f %f\n"
.LC12:
	.string	"mem free A error!"
.LC13:
	.string	"mem free B error!"
.LC14:
	.string	"mem free C error!"
.LC15:
	.string	"device reset error!"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	xorl	%edx, %edx
	movl	$16777216, %edi
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$88, %rsp
	.cfi_def_cfa_offset 128
	movq	%fs:40, %rax
	movq	%rax, 72(%rsp)
	xorl	%eax, %eax
	movl	%edx, (%rsp)
	call	malloc@PLT
	movl	$16777216, %edi
	movq	%rax, %r13
	call	malloc@PLT
	movl	$16777216, %edi
	movq	%rax, %r12
	call	malloc@PLT
	testq	%r13, %r13
	movq	%rax, %rbp
	sete	%al
	testq	%r12, %r12
	sete	%dl
	orb	%dl, %al
	jne	.L22
	xorl	%ebx, %ebx
	testq	%rbp, %rbp
	jne	.L14
.L22:
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %eax
	jmp	.L13
.L14:
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC2(%rip), %xmm0
	movss	%xmm0, 0(%r13,%rbx,4)
	incq	%rbx
	cmpq	$4194304, %rbx
	jne	.L14
	xorl	%ebx, %ebx
.L17:
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC2(%rip), %xmm0
	movss	%xmm0, (%r12,%rbx,4)
	incq	%rbx
	cmpq	$4194304, %rbx
	jne	.L17
	xorl	%ebx, %ebx
.L18:
	call	rand@PLT
	cvtsi2ssl	%eax, %xmm0
	mulss	.LC2(%rip), %xmm0
	movss	%xmm0, 0(%rbp,%rbx,4)
	incq	%rbx
	cmpq	$4194304, %rbx
	jne	.L18
	xorl	%eax, %eax
	movq	%rsp, %rbx
	leaq	8(%rsp), %rdi
	movl	$16777216, %esi
	movq	%rax, 8(%rsp)
	movq	%rax, 16(%rsp)
	movq	%rax, 24(%rsp)
	call	cudaMalloc@PLT
	leaq	.LC3(%rip), %rsi
	movq	%rbx, %rdi
	movl	%eax, (%rsp)
	call	_Z12err_handlingP9cudaErrorPKc
	leaq	16(%rsp), %rdi
	movl	$16777216, %esi
	call	cudaMalloc@PLT
	leaq	.LC4(%rip), %rsi
	movq	%rbx, %rdi
	movl	%eax, (%rsp)
	call	_Z12err_handlingP9cudaErrorPKc
	leaq	24(%rsp), %rdi
	movl	$16777216, %esi
	call	cudaMalloc@PLT
	leaq	.LC5(%rip), %rsi
	movq	%rbx, %rdi
	movl	%eax, (%rsp)
	call	_Z12err_handlingP9cudaErrorPKc
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%r13, %rsi
	movl	$16777216, %edx
	call	cudaMemcpy@PLT
	leaq	.LC6(%rip), %rsi
	movq	%rbx, %rdi
	movl	%eax, (%rsp)
	call	_Z12err_handlingP9cudaErrorPKc
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$16777216, %edx
	call	cudaMemcpy@PLT
	leaq	.LC7(%rip), %rsi
	movq	%rbx, %rdi
	movl	%eax, (%rsp)
	call	_Z12err_handlingP9cudaErrorPKc
	leaq	32(%rsp), %rdi
	movabsq	$137438953504, %rax
	movl	$1, 56(%rsp)
	movq	%rax, 48(%rsp)
	movabsq	$68719476752, %rax
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	cudaEventCreate@PLT
	leaq	40(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	68(%rsp), %ecx
	movl	56(%rsp), %esi
	xorl	%r9d, %r9d
	movq	60(%rsp), %rdx
	movq	48(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L19
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movl	$2048, %r9d
	movl	$2048, %r8d
	movq	8(%rsp), %rdi
	movl	$2048, %ecx
	call	_Z34__device_stub__Z6matMulPKfS0_PfiiiPKfS0_Pfiii
.L19:
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	32(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	40(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	leaq	4(%rsp), %rdi
	movl	$0x00000000, 4(%rsp)
	call	cudaEventElapsedTime@PLT
	leaq	.LC9(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	4(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	24(%rsp), %rsi
	movl	$2, %ecx
	movl	$16777216, %edx
	movq	%rbp, %rdi
	call	cudaMemcpy@PLT
	leaq	.LC10(%rip), %rsi
	movq	%rbx, %rdi
	movl	%eax, (%rsp)
	call	_Z12err_handlingP9cudaErrorPKc
	leaq	.LC11(%rip), %rsi
	movb	$2, %al
	movl	$2, %edi
	cvtss2sd	819600(%rbp), %xmm0
	cvtss2sd	1917864(%rbp), %xmm1
	call	__printf_chk@PLT
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	leaq	.LC12(%rip), %rsi
	movq	%rbx, %rdi
	movl	%eax, (%rsp)
	call	_Z12err_handlingP9cudaErrorPKc
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	leaq	.LC13(%rip), %rsi
	movq	%rbx, %rdi
	movl	%eax, (%rsp)
	call	_Z12err_handlingP9cudaErrorPKc
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	leaq	.LC14(%rip), %rsi
	movq	%rbx, %rdi
	movl	%eax, (%rsp)
	call	_Z12err_handlingP9cudaErrorPKc
	call	cudaDeviceReset@PLT
	leaq	.LC15(%rip), %rsi
	movq	%rbx, %rdi
	movl	%eax, (%rsp)
	call	_Z12err_handlingP9cudaErrorPKc
	xorl	%eax, %eax
.L13:
	movq	72(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L20
	call	__stack_chk_fail@PLT
.L20:
	addq	$88, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	main, .-main
	.section	.rodata.str1.1
.LC16:
	.string	"_Z6matMulPKfS0_Pfiii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2056:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC16(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z6matMulPKfS0_Pfiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2056:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC2:
	.long	805306368
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

#include <stdio.h>
#include <hip/hip_runtime.h>
//#include <cutil.h>

#define TILE_WIDTH 64
#define WIDTH_PER_THREAD 4
#define SW TILE_WIDTH/WIDTH_PER_THREAD
#define N 2048


void err_handling(hipError_t *err, const char *str)
{
	if (*err != hipSuccess) {
		printf("%s\n", str);
		exit(EXIT_FAILURE);
	}
}

__global__ void matMul(const float *A, const float *B, float *C, int m, int k, int n)
{
	__shared__ float sh_A00[SW][SW];
	__shared__ float sh_A01[SW][SW];
	__shared__ float sh_A02[SW][SW];
	__shared__ float sh_A03[SW][SW];
	__shared__ float sh_A10[SW][SW];
	__shared__ float sh_A11[SW][SW];
	__shared__ float sh_A12[SW][SW];
	__shared__ float sh_A13[SW][SW];
	__shared__ float sh_A20[SW][SW];
	__shared__ float sh_A21[SW][SW];
	__shared__ float sh_A22[SW][SW];
	__shared__ float sh_A23[SW][SW];
	__shared__ float sh_A30[SW][SW];
	__shared__ float sh_A31[SW][SW];
	__shared__ float sh_A32[SW][SW];
	__shared__ float sh_A33[SW][SW];
	__shared__ float sh_B00[SW][SW];
	__shared__ float sh_B01[SW][SW];
	__shared__ float sh_B02[SW][SW];
	__shared__ float sh_B03[SW][SW];
	__shared__ float sh_B10[SW][SW];
	__shared__ float sh_B11[SW][SW];
	__shared__ float sh_B12[SW][SW];
	__shared__ float sh_B13[SW][SW];
	__shared__ float sh_B20[SW][SW];
	__shared__ float sh_B21[SW][SW];
	__shared__ float sh_B22[SW][SW];
	__shared__ float sh_B23[SW][SW];
	__shared__ float sh_B30[SW][SW];
	__shared__ float sh_B31[SW][SW];
	__shared__ float sh_B32[SW][SW];
	__shared__ float sh_B33[SW][SW];

	int x = threadIdx.x;
	int y = threadIdx.y;
	int tx = x*WIDTH_PER_THREAD;
	int ty = y*WIDTH_PER_THREAD;

	int row = blockIdx.y*TILE_WIDTH + ty;
	int col = blockIdx.x*TILE_WIDTH + tx;

	float c00 = 0.0;
	float c01 = 0.0;
	float c02 = 0.0;
	float c03 = 0.0;
	float c10 = 0.0;
	float c11 = 0.0;
	float c12 = 0.0;
	float c13 = 0.0;
	float c20 = 0.0;
	float c21 = 0.0;
	float c22 = 0.0;
	float c23 = 0.0;
	float c30 = 0.0;
	float c31 = 0.0;
	float c32 = 0.0;
	float c33 = 0.0;

	float a00 = 0.0;
	float a01 = 0.0;
	float a02 = 0.0;
	float a03 = 0.0;
	float a10 = 0.0;
	float a11 = 0.0;
	float a12 = 0.0;
	float a13 = 0.0;
	float a20 = 0.0;
	float a21 = 0.0;
	float a22 = 0.0;
	float a23 = 0.0;
	float a30 = 0.0;
	float a31 = 0.0;
	float a32 = 0.0;
	float a33 = 0.0;

	float b00 = 0.0;
	float b01 = 0.0;
	float b02 = 0.0;
	float b03 = 0.0;
	float b10 = 0.0;
	float b11 = 0.0;
	float b12 = 0.0;
	float b13 = 0.0;
	float b20 = 0.0;
	float b21 = 0.0;
	float b22 = 0.0;
	float b23 = 0.0;
	float b30 = 0.0;
	float b31 = 0.0;
	float b32 = 0.0;
	float b33 = 0.0;
	
	for (int t = 0; t < k; t += TILE_WIDTH) {
		sh_A00[y][x] = A[row*k     + t + tx];
		sh_A01[y][x] = A[row*k     + t + tx+1];
		sh_A02[y][x] = A[row*k     + t + tx+2];
		sh_A03[y][x] = A[row*k     + t + tx+3];
		sh_A10[y][x] = A[(row+1)*k + t + tx];
		sh_A11[y][x] = A[(row+1)*k + t + tx+1];
		sh_A12[y][x] = A[(row+1)*k + t + tx+2];
		sh_A13[y][x] = A[(row+1)*k + t + tx+3];
		sh_A20[y][x] = A[(row+2)*k + t + tx];
		sh_A21[y][x] = A[(row+2)*k + t + tx+1];
		sh_A22[y][x] = A[(row+2)*k + t + tx+2];
		sh_A23[y][x] = A[(row+2)*k + t + tx+3];
		sh_A30[y][x] = A[(row+3)*k + t + tx];
		sh_A31[y][x] = A[(row+3)*k + t + tx+1];
		sh_A32[y][x] = A[(row+3)*k + t + tx+2];
		sh_A33[y][x] = A[(row+3)*k + t + tx+3];


		sh_B00[y][x] = B[(t+ty)*k   + col];
		sh_B01[y][x] = B[(t+ty)*k   + col+1];
		sh_B02[y][x] = B[(t+ty)*k   + col+2];
		sh_B03[y][x] = B[(t+ty)*k   + col+3];
		sh_B10[y][x] = B[(t+ty+1)*k + col];
		sh_B11[y][x] = B[(t+ty+1)*k + col+1];
		sh_B12[y][x] = B[(t+ty+1)*k + col+2];
		sh_B13[y][x] = B[(t+ty+1)*k + col+3];
		sh_B20[y][x] = B[(t+ty+2)*k + col];
		sh_B21[y][x] = B[(t+ty+2)*k + col+1];
		sh_B22[y][x] = B[(t+ty+2)*k + col+2];
		sh_B23[y][x] = B[(t+ty+2)*k + col+3];
		sh_B30[y][x] = B[(t+ty+3)*k + col];
		sh_B31[y][x] = B[(t+ty+3)*k + col+1];
		sh_B32[y][x] = B[(t+ty+3)*k + col+2];
		sh_B33[y][x] = B[(t+ty+3)*k + col+3];
		__syncthreads();

		int ii = x;
		for (int i = 0; i < TILE_WIDTH; i += WIDTH_PER_THREAD) {
			ii %= 16;
			a00 = sh_A00[y][ii];
			a01 = sh_A01[y][ii];
			a10 = sh_A10[y][ii];
			a11 = sh_A11[y][ii];

			b00 = sh_B00[ii][x];
			b01 = sh_B01[ii][x];
			b10 = sh_B10[ii][x];
			b11 = sh_B11[ii][x];

			c00 += a00*b00 + a01*b10;
			c01 += a00*b01 + a01*b11;
			c10 += a10*b00 + a11*b10;
			c11 += a10*b01 + a11*b11;

/*******************************************************************/
			a22 = sh_A22[y][ii];
			a23 = sh_A23[y][ii];
			a32 = sh_A32[y][ii];
			a33 = sh_A33[y][ii];

			b22 = sh_B22[ii][x];
			b23 = sh_B23[ii][x];
			b32 = sh_B32[ii][x];
			b33 = sh_B33[ii][x];

			c22 += a22*b22 + a23*b32;
			c23 += a22*b23 + a23*b33;
			c32 += a32*b22 + a33*b32;
			c33 += a32*b23 + a33*b33;

/*******************************************************************/
			a02 = sh_A02[y][ii];
			a03 = sh_A03[y][ii];
			a12 = sh_A12[y][ii];
			a13 = sh_A13[y][ii];

			b20 = sh_B20[ii][x];
			b21 = sh_B21[ii][x];
			b30 = sh_B30[ii][x];
			b31 = sh_B31[ii][x];

			c00 += a02*b20 + a03*b30;
			c01 += a02*b21 + a03*b31;
			c10 += a12*b20 + a13*b30;
			c11 += a12*b21 + a13*b31;

			c02 += a02*b22 + a03*b32;
			c03 += a02*b23 + a03*b33;
			c12 += a12*b22 + a13*b32;
			c13 += a12*b23 + a13*b33;

			c20 += a22*b20 + a23*b30;
			c21 += a22*b21 + a23*b31;
			c30 += a32*b20 + a33*b30;
			c31 += a32*b21 + a33*b31;
/*******************************************************************/

			a20 = sh_A20[y][ii];
			a21 = sh_A21[y][ii];
			a30 = sh_A30[y][ii];
			a31 = sh_A31[y][ii];

			b02 = sh_B02[ii][x];
			b03 = sh_B03[ii][x];
			b12 = sh_B12[ii][x];
			b13 = sh_B13[ii][x];

			c22 += a20*b02 + a21*b12;
			c23 += a20*b03 + a21*b13;
			c32 += a30*b02 + a31*b12;
			c33 += a30*b03 + a31*b13;

			c20 += a20*b00 + a21*b10;
			c21 += a20*b01 + a21*b11;
			c30 += a30*b00 + a31*b10;
			c31 += a30*b01 + a31*b11;

			c02 += a00*b02 + a01*b12;
			c03 += a00*b03 + a01*b13;
			c12 += a10*b02 + a11*b12;
			c13 += a10*b03 + a11*b13;
/*******************************************************************/

			++ii;
		}
		__syncthreads();
	}
	C[row*n     + col]   = c00;
	C[row*n     + col+1] = c01;
	C[row*n     + col+2] = c02;
	C[row*n     + col+3] = c03;
	C[(row+1)*n + col]   = c10;
	C[(row+1)*n + col+1] = c11;
	C[(row+1)*n + col+2] = c12;
	C[(row+1)*n + col+3] = c13;
	C[(row+2)*n + col]   = c20;
	C[(row+2)*n + col+1] = c21;
	C[(row+2)*n + col+2] = c22;
	C[(row+2)*n + col+3] = c23;
	C[(row+3)*n + col]   = c30;
	C[(row+3)*n + col+1] = c31;
	C[(row+3)*n + col+2] = c32;
	C[(row+3)*n + col+3] = c33;
}

int main(void)
{
	hipError_t err = hipSuccess;
	
	int m = N;
	int n = N;
	int k = N;
	
	float *A = (float*)malloc(m*k*sizeof(float));
	float *B = (float*)malloc(k*n*sizeof(float));
	float *C = (float*)malloc(m*n*sizeof(float));

	if (A == NULL || B == NULL || C == NULL) {
		printf("allocate host error!\n");
		return 1;
	}

	for (int i = 0; i < m*k; ++i) {
		A[i] = rand()/(float)RAND_MAX;
	}

	for (int i = 0; i < k*n; ++i) {
		B[i] = rand()/(float)RAND_MAX;
	}

	for (int i = 0; i < m*n; ++i) {
		C[i] = rand()/(float)RAND_MAX;
	}

	float *dev_A = NULL;
	float *dev_B = NULL;
	float *dev_C = NULL;

	err = hipMalloc((void**)&dev_A, m*k*sizeof(float));
	err_handling(&err, "allocate devecie error A!");

	err = hipMalloc((void**)&dev_B, k*n*sizeof(float));
	err_handling(&err, "allocate devecie error B!");

	err = hipMalloc((void**)&dev_C, m*n*sizeof(float));
	err_handling(&err, "allocate devecie error C!");
	
	err = hipMemcpy(dev_A, A, m*k*sizeof(float), hipMemcpyHostToDevice);
	err_handling(&err, "memcpy to A error!");

	err = hipMemcpy(dev_B, B, k*n*sizeof(float), hipMemcpyHostToDevice);
	err_handling(&err, "memcpy to B error!");

	dim3 dimGrid((m-1)/TILE_WIDTH+1, (n-1)/TILE_WIDTH+1, 1);
	dim3 dimBlock(TILE_WIDTH/WIDTH_PER_THREAD, TILE_WIDTH/WIDTH_PER_THREAD, 1);

	hipEvent_t start, stop;

	hipEventCreate(&start);
	hipEventCreate(&stop);
	
	hipEventRecord(start, 0);
	matMul<<<dimGrid, dimBlock>>>(dev_A, dev_B, dev_C, m, k, n);
	hipEventRecord(stop, 0);

	hipEventSynchronize(start);
	hipEventSynchronize(stop);

	float time_elapsed = 0;
	hipEventElapsedTime(&time_elapsed, start, stop);
	printf("%fms\n", time_elapsed);

	err = hipMemcpy(C, dev_C, m*n*sizeof(float), hipMemcpyDeviceToHost);
	err_handling(&err, "memcpy to host C error!");

	printf("%f %f\n", C[100*N+100], C[234*N+234]);

	err = hipFree(dev_A);
	err_handling(&err, "mem free A error!");

	err = hipFree(dev_B);
	err_handling(&err, "mem free B error!");

	err = hipFree(dev_C);
	err_handling(&err, "mem free C error!");

	err = hipDeviceReset();
	err_handling(&err, "device reset error!");

	return 0;
}

	.text
	.file	"tiled_matmul-3.hip"
	.globl	_Z12err_handlingP10hipError_tPKc # -- Begin function _Z12err_handlingP10hipError_tPKc
	.type	_Z12err_handlingP10hipError_tPKc,@function
_Z12err_handlingP10hipError_tPKc:       # @_Z12err_handlingP10hipError_tPKc
	.cfi_startproc
# %bb.0:
	cmpl	$0, (%rdi)
	jne	.LBB0_2
# %bb.1:
	retq
.LBB0_2:
	pushq	%rax
	.cfi_def_cfa_offset 16
	movq	%rsi, %rdi
	callq	puts@PLT
	movl	$1, %edi
	callq	exit
.Lfunc_end0:
	.size	_Z12err_handlingP10hipError_tPKc, .Lfunc_end0-_Z12err_handlingP10hipError_tPKc
	.cfi_endproc
                                        # -- End function
	.globl	_Z21__device_stub__matMulPKfS0_Pfiii # -- Begin function _Z21__device_stub__matMulPKfS0_Pfiii
	.type	_Z21__device_stub__matMulPKfS0_Pfiii,@function
_Z21__device_stub__matMulPKfS0_Pfiii:   # @_Z21__device_stub__matMulPKfS0_Pfiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z6matMulPKfS0_Pfiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z21__device_stub__matMulPKfS0_Pfiii, .Lfunc_end1-_Z21__device_stub__matMulPKfS0_Pfiii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI2_0:
	.long	0x30000000                      # float 4.65661287E-10
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	subq	$56, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movl	$16777216, %edi                 # imm = 0x1000000
	callq	malloc
	movq	%rax, %r15
	movl	$16777216, %edi                 # imm = 0x1000000
	callq	malloc
	movq	%rax, %r14
	movl	$16777216, %edi                 # imm = 0x1000000
	callq	malloc
	testq	%r15, %r15
	je	.LBB2_34
# %bb.1:
	testq	%r14, %r14
	je	.LBB2_34
# %bb.2:
	movq	%rax, %rbx
	testq	%rax, %rax
	je	.LBB2_34
# %bb.3:                                # %.preheader103.preheader
	xorl	%r12d, %r12d
.LBB2_4:                                # %.preheader103
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	movss	.LCPI2_0(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	%xmm1, %xmm0
	movss	%xmm0, (%r15,%r12,4)
	incq	%r12
	cmpq	$4194304, %r12                  # imm = 0x400000
	jne	.LBB2_4
# %bb.5:                                # %.preheader102.preheader
	xorl	%r12d, %r12d
.LBB2_6:                                # %.preheader102
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI2_0(%rip), %xmm0
	movss	%xmm0, (%r14,%r12,4)
	incq	%r12
	cmpq	$4194304, %r12                  # imm = 0x400000
	jne	.LBB2_6
# %bb.7:                                # %.preheader.preheader
	xorl	%r12d, %r12d
.LBB2_8:                                # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	mulss	.LCPI2_0(%rip), %xmm0
	movss	%xmm0, (%rbx,%r12,4)
	incq	%r12
	cmpq	$4194304, %r12                  # imm = 0x400000
	jne	.LBB2_8
# %bb.9:
	xorl	%eax, %eax
	leaq	32(%rsp), %rdi
	movq	%rax, (%rdi)
	movq	%rax, 16(%rsp)
	movq	%rax, 8(%rsp)
	movl	$16777216, %esi                 # imm = 0x1000000
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_10
# %bb.12:                               # %_Z12err_handlingP10hipError_tPKc.exit
	leaq	16(%rsp), %rdi
	movl	$16777216, %esi                 # imm = 0x1000000
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_13
# %bb.14:                               # %_Z12err_handlingP10hipError_tPKc.exit66
	leaq	8(%rsp), %rdi
	movl	$16777216, %esi                 # imm = 0x1000000
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB2_15
# %bb.16:                               # %_Z12err_handlingP10hipError_tPKc.exit69
	movq	32(%rsp), %rdi
	movl	$16777216, %edx                 # imm = 0x1000000
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB2_17
# %bb.18:                               # %_Z12err_handlingP10hipError_tPKc.exit72
	movq	16(%rsp), %rdi
	movl	$16777216, %edx                 # imm = 0x1000000
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB2_19
# %bb.20:                               # %_Z12err_handlingP10hipError_tPKc.exit75
	leaq	40(%rsp), %r14
	movq	%r14, %rdi
	callq	hipEventCreate
	leaq	24(%rsp), %rdi
	callq	hipEventCreate
	movq	(%r14), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movabsq	$137438953504, %rdi             # imm = 0x2000000020
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_22
# %bb.21:
	movq	32(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	movl	$2048, %ecx                     # imm = 0x800
	movl	$2048, %r8d                     # imm = 0x800
	movl	$2048, %r9d                     # imm = 0x800
	callq	_Z21__device_stub__matMulPKfS0_Pfiii
.LBB2_22:
	movq	24(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	40(%rsp), %rdi
	callq	hipEventSynchronize
	movq	24(%rsp), %rdi
	callq	hipEventSynchronize
	leaq	52(%rsp), %r14
	movl	$0, (%r14)
	movq	40(%rsp), %rsi
	movq	24(%rsp), %rdx
	movq	%r14, %rdi
	callq	hipEventElapsedTime
	cvtss2sd	(%r14), %xmm0
	movl	$.L.str.7, %edi
	movb	$1, %al
	callq	printf
	movq	8(%rsp), %rsi
	movl	$16777216, %edx                 # imm = 0x1000000
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB2_23
# %bb.24:                               # %_Z12err_handlingP10hipError_tPKc.exit78
	xorps	%xmm0, %xmm0
	cvtss2sd	819600(%rbx), %xmm0
	cvtss2sd	1917864(%rbx), %xmm1
	movl	$.L.str.9, %edi
	movb	$2, %al
	callq	printf
	movq	32(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB2_25
# %bb.26:                               # %_Z12err_handlingP10hipError_tPKc.exit81
	movq	16(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB2_27
# %bb.28:                               # %_Z12err_handlingP10hipError_tPKc.exit84
	movq	8(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB2_29
# %bb.30:                               # %_Z12err_handlingP10hipError_tPKc.exit87
	callq	hipDeviceReset
	testl	%eax, %eax
	jne	.LBB2_31
# %bb.32:                               # %_Z12err_handlingP10hipError_tPKc.exit90
	xorl	%eax, %eax
	jmp	.LBB2_33
.LBB2_34:
	movl	$.Lstr, %edi
	callq	puts@PLT
	movl	$1, %eax
.LBB2_33:
	addq	$56, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.LBB2_10:
	.cfi_def_cfa_offset 96
	movl	$.L.str.2, %edi
	jmp	.LBB2_11
.LBB2_13:
	movl	$.L.str.3, %edi
	jmp	.LBB2_11
.LBB2_15:
	movl	$.L.str.4, %edi
	jmp	.LBB2_11
.LBB2_17:
	movl	$.L.str.5, %edi
	jmp	.LBB2_11
.LBB2_19:
	movl	$.L.str.6, %edi
	jmp	.LBB2_11
.LBB2_23:
	movl	$.L.str.8, %edi
	jmp	.LBB2_11
.LBB2_25:
	movl	$.L.str.10, %edi
	jmp	.LBB2_11
.LBB2_27:
	movl	$.L.str.11, %edi
	jmp	.LBB2_11
.LBB2_29:
	movl	$.L.str.12, %edi
	jmp	.LBB2_11
.LBB2_31:
	movl	$.L.str.13, %edi
.LBB2_11:
	callq	puts@PLT
	movl	$1, %edi
	callq	exit
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z6matMulPKfS0_Pfiii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z6matMulPKfS0_Pfiii,@object    # @_Z6matMulPKfS0_Pfiii
	.section	.rodata,"a",@progbits
	.globl	_Z6matMulPKfS0_Pfiii
	.p2align	3, 0x0
_Z6matMulPKfS0_Pfiii:
	.quad	_Z21__device_stub__matMulPKfS0_Pfiii
	.size	_Z6matMulPKfS0_Pfiii, 8

	.type	.L.str.2,@object                # @.str.2
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.2:
	.asciz	"allocate devecie error A!"
	.size	.L.str.2, 26

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"allocate devecie error B!"
	.size	.L.str.3, 26

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"allocate devecie error C!"
	.size	.L.str.4, 26

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"memcpy to A error!"
	.size	.L.str.5, 19

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"memcpy to B error!"
	.size	.L.str.6, 19

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"%fms\n"
	.size	.L.str.7, 6

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"memcpy to host C error!"
	.size	.L.str.8, 24

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"%f %f\n"
	.size	.L.str.9, 7

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"mem free A error!"
	.size	.L.str.10, 18

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"mem free B error!"
	.size	.L.str.11, 18

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"mem free C error!"
	.size	.L.str.12, 18

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	"device reset error!"
	.size	.L.str.13, 20

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z6matMulPKfS0_Pfiii"
	.size	.L__unnamed_1, 21

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"allocate host error!"
	.size	.Lstr, 21

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z21__device_stub__matMulPKfS0_Pfiii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z6matMulPKfS0_Pfiii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z6matMulPKfS0_Pfiii    ; -- Begin function _Z6matMulPKfS0_Pfiii
	.globl	_Z6matMulPKfS0_Pfiii
	.p2align	8
	.type	_Z6matMulPKfS0_Pfiii,@function
_Z6matMulPKfS0_Pfiii:                   ; @_Z6matMulPKfS0_Pfiii
; %bb.0:
	s_load_b64 s[2:3], s[0:1], 0x1c
	v_bfe_u32 v22, v0, 10, 10
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	v_and_b32_e32 v24, 0x3ff, v0
	s_mov_b32 s8, 0
	v_lshlrev_b32_e32 v23, 2, v22
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b32_e32 v0, 2, v24
	v_lshl_add_u32 v17, s15, 6, v23
	s_delay_alu instid0(VALU_DEP_1)
	v_or_b32_e32 v18, 1, v17
	v_or_b32_e32 v19, 2, v17
	v_or_b32_e32 v20, 3, v17
	s_waitcnt lgkmcnt(0)
	s_cmp_gt_i32 s2, 0
	s_cbranch_scc1 .LBB0_2
; %bb.1:                                ; %.._crit_edge_crit_edge
	v_or_b32_e32 v26, 1, v17
	v_or_b32_e32 v25, 2, v17
	v_or_b32_e32 v15, 3, v17
	s_mov_b32 s9, 0
	s_branch .LBB0_3
.LBB0_2:
	s_mov_b32 s8, -1
                                        ; implicit-def: $sgpr9
                                        ; implicit-def: $vgpr26
                                        ; implicit-def: $vgpr25
                                        ; implicit-def: $vgpr15
.LBB0_3:                                ; %Flow734
	v_lshl_add_u32 v12, s14, 6, v0
	s_and_not1_b32 vcc_lo, exec_lo, s8
	s_cbranch_vccnz .LBB0_9
; %bb.4:                                ; %.lr.ph
	v_lshl_add_u32 v25, v22, 6, v0
	v_mad_u64_u32 v[15:16], null, v17, s2, v[0:1]
	s_mov_b32 s8, 0
	s_delay_alu instid0(VALU_DEP_2)
	v_dual_mov_b32 v3, 0 :: v_dual_add_nc_u32 v26, 0x400, v25
	v_dual_mov_b32 v2, 0 :: v_dual_add_nc_u32 v27, 0x800, v25
	v_dual_mov_b32 v1, 0 :: v_dual_add_nc_u32 v28, 0xc00, v25
	v_dual_mov_b32 v0, 0 :: v_dual_add_nc_u32 v29, 0x1000, v25
	v_dual_mov_b32 v13, 0 :: v_dual_add_nc_u32 v30, 0x1400, v25
	v_dual_mov_b32 v14, 0 :: v_dual_add_nc_u32 v31, 0x1800, v25
	v_dual_mov_b32 v21, 0 :: v_dual_add_nc_u32 v32, 0x1c00, v25
	v_dual_mov_b32 v16, 0 :: v_dual_add_nc_u32 v33, 0x2000, v25
	v_dual_mov_b32 v7, 0 :: v_dual_add_nc_u32 v34, 0x2400, v25
	v_dual_mov_b32 v6, 0 :: v_dual_add_nc_u32 v35, 0x2800, v25
	v_dual_mov_b32 v5, 0 :: v_dual_add_nc_u32 v36, 0x2c00, v25
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v37, 0x3000, v25
	v_dual_mov_b32 v11, 0 :: v_dual_add_nc_u32 v38, 0x3400, v25
	v_dual_mov_b32 v10, 0 :: v_dual_add_nc_u32 v39, 0x3800, v25
	v_dual_mov_b32 v9, 0 :: v_dual_add_nc_u32 v40, 0x3c00, v25
	v_dual_mov_b32 v8, 0 :: v_dual_add_nc_u32 v41, 0x4000, v25
	v_add_nc_u32_e32 v42, 0x4400, v25
	v_add_nc_u32_e32 v43, 0x4800, v25
	v_add_nc_u32_e32 v44, 0x4c00, v25
	v_add_nc_u32_e32 v45, 0x5000, v25
	v_add_nc_u32_e32 v46, 0x5400, v25
	v_add_nc_u32_e32 v47, 0x5800, v25
	v_add_nc_u32_e32 v48, 0x5c00, v25
	v_add_nc_u32_e32 v49, 0x6000, v25
	v_add_nc_u32_e32 v50, 0x6400, v25
	v_add_nc_u32_e32 v51, 0x6800, v25
	v_add_nc_u32_e32 v52, 0x6c00, v25
	v_add_nc_u32_e32 v53, 0x7000, v25
	v_add_nc_u32_e32 v54, 0x7400, v25
	v_add_nc_u32_e32 v55, 0x7800, v25
	v_add_nc_u32_e32 v56, 0x7c00, v25
.LBB0_5:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_6 Depth 2
	v_add_nc_u32_e32 v57, s8, v15
	v_add_nc_u32_e32 v58, s8, v23
	s_mov_b32 s9, -4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v59, s2, v57
	v_mad_u64_u32 v[61:62], null, v58, s2, v[12:13]
	v_ashrrev_i32_e32 v58, 31, v57
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v60, 31, v59
	v_add_nc_u32_e32 v63, s2, v59
	v_lshlrev_b64 v[57:58], 2, v[57:58]
	v_ashrrev_i32_e32 v62, 31, v61
	s_delay_alu instid0(VALU_DEP_4)
	v_lshlrev_b64 v[59:60], 2, v[59:60]
	v_add_nc_u32_e32 v70, s2, v61
	v_ashrrev_i32_e32 v64, 31, v63
	v_add_nc_u32_e32 v66, s2, v63
	v_add_co_u32 v57, vcc_lo, s4, v57
	v_add_co_ci_u32_e32 v58, vcc_lo, s5, v58, vcc_lo
	v_add_co_u32 v68, vcc_lo, s4, v59
	v_lshlrev_b64 v[72:73], 2, v[61:62]
	v_ashrrev_i32_e32 v71, 31, v70
	v_add_co_ci_u32_e32 v69, vcc_lo, s5, v60, vcc_lo
	v_lshlrev_b64 v[74:75], 2, v[63:64]
	s_clause 0x1
	global_load_b128 v[58:61], v[57:58], off
	global_load_b128 v[62:65], v[68:69], off
	v_mov_b32_e32 v57, v24
	v_add_co_u32 v68, vcc_lo, s6, v72
	v_lshlrev_b64 v[71:72], 2, v[70:71]
	v_add_nc_u32_e32 v70, s2, v70
	v_add_co_ci_u32_e32 v69, vcc_lo, s7, v73, vcc_lo
	v_ashrrev_i32_e32 v67, 31, v66
	v_add_co_u32 v74, vcc_lo, s4, v74
	s_delay_alu instid0(VALU_DEP_4)
	v_add_nc_u32_e32 v82, s2, v70
	v_add_co_ci_u32_e32 v75, vcc_lo, s5, v75, vcc_lo
	v_add_co_u32 v78, vcc_lo, s6, v71
	v_ashrrev_i32_e32 v71, 31, v70
	v_lshlrev_b64 v[76:77], 2, v[66:67]
	v_ashrrev_i32_e32 v83, 31, v82
	v_add_co_ci_u32_e32 v79, vcc_lo, s7, v72, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_lshlrev_b64 v[84:85], 2, v[70:71]
	global_load_b128 v[66:69], v[68:69], off
	v_add_co_u32 v80, vcc_lo, s4, v76
	v_lshlrev_b64 v[82:83], 2, v[82:83]
	v_add_co_ci_u32_e32 v81, vcc_lo, s5, v77, vcc_lo
	v_add_co_u32 v84, vcc_lo, s6, v84
	v_add_co_ci_u32_e32 v85, vcc_lo, s7, v85, vcc_lo
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_u32 v86, vcc_lo, s6, v82
	v_add_co_ci_u32_e32 v87, vcc_lo, s7, v83, vcc_lo
	global_load_b128 v[70:73], v[78:79], off
	s_clause 0x1
	global_load_b128 v[74:77], v[74:75], off
	global_load_b128 v[78:81], v[80:81], off
	s_clause 0x1
	global_load_b128 v[82:85], v[84:85], off
	global_load_b128 v[86:89], v[86:87], off
	s_waitcnt vmcnt(7)
	ds_store_b32 v25, v58
	ds_store_b32 v26, v59
	ds_store_b32 v27, v60
	ds_store_b32 v28, v61
	s_waitcnt vmcnt(6)
	ds_store_b32 v29, v62
	ds_store_b32 v30, v63
	ds_store_b32 v31, v64
	ds_store_b32 v32, v65
	s_waitcnt vmcnt(5)
	ds_store_b32 v41, v66
	ds_store_b32 v42, v67
	ds_store_b32 v43, v68
	ds_store_b32 v44, v69
	s_waitcnt vmcnt(4)
	ds_store_b32 v45, v70
	ds_store_b32 v46, v71
	ds_store_b32 v47, v72
	ds_store_b32 v48, v73
	s_waitcnt vmcnt(3)
	ds_store_b32 v33, v74
	ds_store_b32 v34, v75
	ds_store_b32 v35, v76
	ds_store_b32 v36, v77
	s_waitcnt vmcnt(2)
	ds_store_b32 v37, v78
	ds_store_b32 v38, v79
	ds_store_b32 v39, v80
	ds_store_b32 v40, v81
	s_waitcnt vmcnt(1)
	ds_store_b32 v49, v82
	ds_store_b32 v50, v83
	ds_store_b32 v51, v84
	ds_store_b32 v52, v85
	s_waitcnt vmcnt(0)
	ds_store_b32 v53, v86
	ds_store_b32 v54, v87
	ds_store_b32 v55, v88
	ds_store_b32 v56, v89
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
.LBB0_6:                                ;   Parent Loop BB0_5 Depth=1
                                        ; =>  This Inner Loop Header: Depth=2
	v_and_b32_e32 v77, 15, v57
	s_add_i32 s9, s9, 4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_gt_u32 s9, 59
	v_lshlrev_b32_e32 v57, 2, v77
	v_lshlrev_b32_e32 v61, 6, v77
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshl_or_b32 v78, v22, 6, v57
	v_lshl_add_u32 v79, v24, 2, v61
	ds_load_2addr_stride64_b32 v[57:58], v78 offset1:4
	ds_load_2addr_stride64_b32 v[59:60], v78 offset0:16 offset1:20
	ds_load_2addr_stride64_b32 v[61:62], v79 offset0:64 offset1:68
	ds_load_2addr_stride64_b32 v[63:64], v79 offset0:80 offset1:84
	s_waitcnt lgkmcnt(0)
	v_mul_f32_e32 v65, v58, v63
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v65, v57, v61
	v_dual_add_f32 v8, v8, v65 :: v_dual_mul_f32 v65, v58, v64
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v65, v57, v62
	v_add_f32_e32 v9, v9, v65
	v_mul_f32_e32 v65, v60, v63
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v65, v59, v61
	v_add_f32_e32 v4, v4, v65
	v_mul_f32_e32 v65, v60, v64
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v65, v59, v62
	v_add_f32_e32 v5, v5, v65
	ds_load_2addr_stride64_b32 v[65:66], v78 offset0:40 offset1:44
	ds_load_2addr_stride64_b32 v[67:68], v78 offset0:56 offset1:60
	ds_load_2addr_stride64_b32 v[69:70], v79 offset0:104 offset1:108
	ds_load_2addr_stride64_b32 v[71:72], v79 offset0:120 offset1:124
	s_waitcnt lgkmcnt(0)
	v_mul_f32_e32 v73, v66, v71
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v73, v65, v69
	v_dual_add_f32 v80, v13, v73 :: v_dual_mul_f32 v13, v66, v72
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v13, v65, v70
	v_add_f32_e32 v81, v14, v13
	v_mul_f32_e32 v13, v68, v71
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v13, v67, v69
	v_add_f32_e32 v82, v2, v13
	v_mul_f32_e32 v2, v68, v72
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v2, v67, v70
	v_add_f32_e32 v83, v3, v2
	ds_load_2addr_stride64_b32 v[2:3], v78 offset0:8 offset1:12
	ds_load_2addr_stride64_b32 v[13:14], v78 offset0:24 offset1:28
	ds_load_2addr_stride64_b32 v[73:74], v79 offset0:96 offset1:100
	ds_load_2addr_stride64_b32 v[75:76], v79 offset0:112 offset1:116
	s_waitcnt lgkmcnt(0)
	v_mul_f32_e32 v84, v3, v75
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v84, v2, v73
	v_add_f32_e32 v8, v8, v84
	v_mul_f32_e32 v84, v3, v76
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v84, v2, v74
	v_dual_add_f32 v9, v9, v84 :: v_dual_mul_f32 v84, v14, v75
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v84, v13, v73
	v_add_f32_e32 v4, v4, v84
	v_mul_f32_e32 v84, v14, v76
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v84, v13, v74
	v_dual_add_f32 v5, v5, v84 :: v_dual_mul_f32 v84, v71, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v3, v72, v3 :: v_dual_fmac_f32 v84, v69, v2
	v_fmac_f32_e32 v3, v70, v2
	v_mul_f32_e32 v2, v71, v14
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v10, v10, v84
	v_fmac_f32_e32 v2, v69, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v69, v6, v2
	v_mul_f32_e32 v2, v72, v14
	v_fmac_f32_e32 v2, v70, v13
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v70, v7, v2
	v_mul_f32_e32 v2, v66, v75
	v_dual_fmac_f32 v2, v65, v73 :: v_dual_add_f32 v11, v11, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_add_f32 v21, v21, v2 :: v_dual_mul_f32 v2, v66, v76
	v_fmac_f32_e32 v2, v65, v74
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v16, v16, v2
	v_mul_f32_e32 v2, v68, v75
	v_fmac_f32_e32 v2, v67, v73
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_add_f32_e32 v71, v0, v2
	v_mul_f32_e32 v0, v68, v76
	v_fmac_f32_e32 v0, v67, v74
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v72, v1, v0
	ds_load_2addr_stride64_b32 v[0:1], v78 offset0:32 offset1:36
	ds_load_2addr_stride64_b32 v[6:7], v78 offset0:48 offset1:52
	ds_load_2addr_stride64_b32 v[65:66], v79 offset0:72 offset1:76
	ds_load_2addr_stride64_b32 v[67:68], v79 offset0:88 offset1:92
	s_waitcnt lgkmcnt(0)
	v_dual_mul_f32 v73, v63, v1 :: v_dual_mul_f32 v2, v1, v67
	v_mul_f32_e32 v3, v7, v68
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v73, v61, v0 :: v_dual_fmac_f32 v2, v0, v65
	v_fmac_f32_e32 v3, v6, v66
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_f32_e32 v21, v21, v73
	v_dual_add_f32 v13, v80, v2 :: v_dual_mul_f32 v2, v1, v68
	v_mul_f32_e32 v1, v64, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_add_f32 v3, v83, v3 :: v_dual_fmac_f32 v2, v0, v66
	v_dual_fmac_f32 v1, v62, v0 :: v_dual_mul_f32 v0, v63, v7
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_f32_e32 v14, v81, v2
	v_add_f32_e32 v16, v16, v1
	v_mul_f32_e32 v1, v64, v7
	v_dual_mul_f32 v2, v7, v67 :: v_dual_mul_f32 v7, v60, v68
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v1, v62, v6
	v_dual_fmac_f32 v2, v6, v65 :: v_dual_fmac_f32 v7, v59, v66
	v_fmac_f32_e32 v0, v61, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_mul_f32 v6, v58, v67 :: v_dual_add_f32 v1, v72, v1
	v_dual_add_f32 v7, v70, v7 :: v_dual_add_f32 v0, v71, v0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v6, v57, v65
	v_add_f32_e32 v10, v10, v6
	v_mul_f32_e32 v6, v58, v68
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_fmac_f32 v6, v57, v66 :: v_dual_add_nc_u32 v57, 1, v77
	v_dual_add_f32 v11, v11, v6 :: v_dual_mul_f32 v6, v60, v67
	v_add_f32_e32 v2, v82, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v6, v59, v65
	v_add_f32_e32 v6, v69, v6
	s_cbranch_scc0 .LBB0_6
; %bb.7:                                ;   in Loop: Header=BB0_5 Depth=1
	s_add_i32 s8, s8, 64
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_ge_i32 s8, s2
	s_barrier
	buffer_gl0_inv
	s_cbranch_scc0 .LBB0_5
; %bb.8:                                ; %Flow
	v_dual_mov_b32 v26, v18 :: v_dual_mov_b32 v25, v19
	v_mov_b32_e32 v15, v20
	s_branch .LBB0_10
.LBB0_9:
	v_dual_mov_b32 v3, s9 :: v_dual_mov_b32 v2, s9
	v_dual_mov_b32 v1, s9 :: v_dual_mov_b32 v0, s9
	v_dual_mov_b32 v14, s9 :: v_dual_mov_b32 v13, s9
	v_dual_mov_b32 v16, s9 :: v_dual_mov_b32 v21, s9
	v_dual_mov_b32 v7, s9 :: v_dual_mov_b32 v6, s9
	v_dual_mov_b32 v5, s9 :: v_dual_mov_b32 v4, s9
	v_dual_mov_b32 v11, s9 :: v_dual_mov_b32 v10, s9
	v_dual_mov_b32 v9, s9 :: v_dual_mov_b32 v8, s9
.LBB0_10:                               ; %Flow735
	v_mad_u64_u32 v[18:19], null, v17, s3, v[12:13]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_mad_u64_u32 v[22:23], null, v26, s3, v[12:13]
	v_mad_u64_u32 v[26:27], null, v25, s3, v[12:13]
	v_mad_u64_u32 v[24:25], null, v15, s3, v[12:13]
	v_ashrrev_i32_e32 v19, 31, v18
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_ashrrev_i32_e32 v23, 31, v22
	v_or_b32_e32 v17, 1, v26
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_lshlrev_b64 v[19:20], 2, v[18:19]
	v_ashrrev_i32_e32 v27, 31, v26
	v_lshlrev_b64 v[22:23], 2, v[22:23]
	v_ashrrev_i32_e32 v25, 31, v24
	v_ashrrev_i32_e32 v18, 31, v17
	s_delay_alu instid0(VALU_DEP_4)
	v_lshlrev_b64 v[26:27], 2, v[26:27]
	v_add_co_u32 v19, vcc_lo, s0, v19
	v_add_co_ci_u32_e32 v20, vcc_lo, s1, v20, vcc_lo
	v_add_co_u32 v22, vcc_lo, s0, v22
	v_add_co_ci_u32_e32 v23, vcc_lo, s1, v23, vcc_lo
	global_store_b128 v[19:20], v[8:11], off
	v_lshlrev_b64 v[8:9], 2, v[17:18]
	v_add_co_u32 v10, vcc_lo, s0, v26
	v_lshlrev_b64 v[17:18], 2, v[24:25]
	v_add_co_ci_u32_e32 v11, vcc_lo, s1, v27, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_add_co_u32 v8, vcc_lo, s0, v8
	v_add_co_ci_u32_e32 v9, vcc_lo, s1, v9, vcc_lo
	v_add_co_u32 v17, vcc_lo, s0, v17
	v_add_co_ci_u32_e32 v18, vcc_lo, s1, v18, vcc_lo
	s_clause 0x4
	global_store_b128 v[22:23], v[4:7], off
	global_store_b32 v[10:11], v21, off
	global_store_b32 v[8:9], v16, off
	global_store_b64 v[10:11], v[13:14], off offset:8
	global_store_b128 v[17:18], v[0:3], off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z6matMulPKfS0_Pfiii
		.amdhsa_group_segment_fixed_size 32768
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 36
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 90
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z6matMulPKfS0_Pfiii, .Lfunc_end0-_Z6matMulPKfS0_Pfiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 2160
; NumSgprs: 18
; NumVgprs: 90
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 32768 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 11
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 90
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
    .group_segment_fixed_size: 32768
    .kernarg_segment_align: 8
    .kernarg_segment_size: 36
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z6matMulPKfS0_Pfiii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z6matMulPKfS0_Pfiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     90
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
