
#include <iostream>
#include <cstdlib>
#include <ctime>
#include <unistd.h>
#include <stdio.h>

__global__ //declare global so the computer knows to run this on gpu
void multiply(float *a, float *b, float *c, int aRow, int aCol, 
  int bCol) {

    //nested for loop that "jumps" along blocks to perform multiplication
    int index = threadIdx.x;
    int stride = blockDim.x;
    int block = blockIdx.x;


    for(int i = 0; i < aRow; i += 1)
      for(int j = index + (block * stride); j < bCol; j+= stride)
        for(int k = 0; k < aCol; k += 1)
          c[i*bCol + j] += a[i*aCol + k] * b[j + k*bCol];  
  __syncthreads();
  return;
}

void scalar_multiply(float *a, float *b, float *c, int aRow, int aCol,
  int bCol) {
    //run without GPU work to use as error-checking
    for(int i = 0; i < aRow; ++i)
      for(int j = 0; j < bCol; ++j)
        for(int k = 0; k < aCol; ++k)
          c[i*bCol + j] += a[i*aCol + k] * b[j + k*bCol];
          return;
}


int main(int argc, char *argv[])
{

  if(argc < 5) {
    std::cerr << "usage: " << argv[0] << " aRows aCols bRows bCols\n";
    return(-1);
  }

  if(atoi(argv[2]) != atoi(argv[3])) {
    std::cerr << "error! aCols must match bRows. " << 
      argv[2] << ", " << argv[3] << std::endl;
    return(-1);
  }

  srand(4); //so creative

  int errorcheck = 0; //set to 1 to perform error checking
  int threads = 512;
  int blocks = 512;
  int DEBUG = 0; //set to 1 to print debug messages

  //accept 4 args: row, col, for a and b
  float aRow = atoi(argv[1]);
  float aCol = atoi(argv[2]);
  float bRow = atoi(argv[3]);
  float bCol = atoi(argv[4]);
  float cRow = aRow;
  float cCol = bCol;

  float aSize = aRow * aCol * sizeof(float);
  float bSize = bRow * bCol * sizeof(float);
  float cSize = cRow * cCol * sizeof(float);

  float *a = (float *)malloc(aSize);
  float *b = (float *)malloc(bSize);
  float *c = (float *)malloc(cSize);

  float *cu_a; 
  float *cu_b; 
  float *cu_c;

  //allocate memory on the GPU
  cudaMalloc(&cu_a, aSize);
  cudaMalloc(&cu_b, bSize);
  cudaMalloc(&cu_c, cSize);

  //initialize them to randoms
  for(int i = 0; i < aRow*aCol; i++) {
    a[i] = rand() % 1000;
  }
  for(int i = 0; i < bRow*bCol; i++) {
    b[i] = rand() % 1000;
  }
  for(int i = 0; i < aRow*bCol; i++) {
    c[i] = 0;
  }
    
  //put the data into the GPU
  cudaMemcpy(cu_a, a, aSize, cudaMemcpyHostToDevice);
  cudaMemcpy(cu_b, b, bSize, cudaMemcpyHostToDevice);

  //warmup
  std::cout << "warming up...\n";
  multiply<<<blocks, threads>>>(cu_a, cu_b, cu_c, aRow, aCol, bCol);

  std::cout << "done.\nrunning tests...\n";

  if(errorcheck){
    //fill c with an array computed on cpu
    scalar_multiply(a, b, c, aRow, aCol, bCol);
  }


  double fulltime = 0;
  int repeats = 4;
  for(int i=0; i<repeats; i++) {
    //repeat in case the matrix size is too small to time properly

    std::clock_t start = std::clock();
    
    multiply<<<blocks, threads>>>(cu_a, cu_b, cu_c, aRow, aCol, bCol);
    cudaDeviceSynchronize();
   
    std::clock_t end = std::clock();
    cudaMemcpy(c, cu_c, cSize, cudaMemcpyDeviceToHost);
    
    fulltime += (end - start);
    
  }

    
  float flops = (aRow*aCol*bCol*2);
  double s_time = ((fulltime) / (double)(CLOCKS_PER_SEC));


  std::cout << "a[" << aRow << "," << aCol << "], b[" << bRow << "," << bCol << "], c[" << cRow << "," << cCol << "]\n";
  std::cout << "time: " << s_time*1000 << "ms\n";
  std::cout << "performance: " << flops << " flops at " << (((float)flops / 1000000000) / ((s_time) / repeats)) << "GFlop/s\n";

  if(DEBUG) {
  //printout
    for(int i=0; i<aRow * bCol; i++)
      std::cerr << c[i] << " ";
    std::cerr << std::endl; 
  }

  //free GPU memory
  cudaFree(cu_a);
  cudaFree(cu_b);
  cudaFree(cu_c);

  //free CPU memory
  free(a);
  free(b);
  free(c);

  return 0;
}

	.file	"tmpxft_0025ca34_00000000-6_mMul_basic_cuda.cudafe1.cpp"
	.text
#APP
	.globl _ZSt21ios_base_library_initv

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3652:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE3652:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z15scalar_multiplyPfS_S_iii
	.type	_Z15scalar_multiplyPfS_S_iii, @function
_Z15scalar_multiplyPfS_S_iii:
.LFB3648:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movslq	%r9d, %r11
	xorl	%r10d, %r10d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	salq	$2, %r11
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	movl	%ecx, %r12d
	xorl	%ecx, %ecx
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rdx, %rbp
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	xorl	%ebx, %ebx
	movq	%rsi, -8(%rsp)
.L3:
	cmpl	%r12d, %r10d
	jge	.L2
	movslq	%ecx, %rax
	movq	-8(%rsp), %rsi
	leaq	(%rdi,%rax,4), %r15
	xorl	%eax, %eax
.L8:
	cmpl	%r9d, %eax
	jge	.L5
	leal	(%rax,%rbx), %edx
	movq	%rsi, %r13
	movslq	%edx, %rdx
	leaq	0(%rbp,%rdx,4), %r14
	xorl	%edx, %edx
.L6:
	cmpl	%edx, %r8d
	jle	.L11
	movss	(%r15,%rdx,4), %xmm0
	mulss	0(%r13), %xmm0
	incq	%rdx
	addq	%r11, %r13
	addss	(%r14), %xmm0
	movss	%xmm0, (%r14)
	jmp	.L6
.L11:
	incl	%eax
	addq	$4, %rsi
	jmp	.L8
.L5:
	incl	%r10d
	addl	%r9d, %ebx
	addl	%r8d, %ecx
	jmp	.L3
.L2:
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3648:
	.size	_Z15scalar_multiplyPfS_S_iii, .-_Z15scalar_multiplyPfS_S_iii
	.globl	_Z34__device_stub__Z8multiplyPfS_S_iiiPfS_S_iii
	.type	_Z34__device_stub__Z8multiplyPfS_S_iiiPfS_S_iii, @function
_Z34__device_stub__Z8multiplyPfS_S_iiiPfS_S_iii:
.LFB3674:
	.cfi_startproc
	endbr64
	subq	$184, %rsp
	.cfi_def_cfa_offset 192
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movl	%ecx, 20(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 16(%rsp)
	movl	%r9d, 12(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 168(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 160(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L12
	pushq	64(%rsp)
	.cfi_def_cfa_offset 200
	leaq	_Z8multiplyPfS_S_iii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 208
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 200
	popq	%rdx
	.cfi_def_cfa_offset 192
.L12:
	movq	168(%rsp), %rax
	subq	%fs:40, %rax
	je	.L14
	call	__stack_chk_fail@PLT
.L14:
	addq	$184, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3674:
	.size	_Z34__device_stub__Z8multiplyPfS_S_iiiPfS_S_iii, .-_Z34__device_stub__Z8multiplyPfS_S_iiiPfS_S_iii
	.globl	_Z8multiplyPfS_S_iii
	.type	_Z8multiplyPfS_S_iii, @function
_Z8multiplyPfS_S_iii:
.LFB3675:
	.cfi_startproc
	endbr64
	jmp	_Z34__device_stub__Z8multiplyPfS_S_iiiPfS_S_iii
	.cfi_endproc
.LFE3675:
	.size	_Z8multiplyPfS_S_iii, .-_Z8multiplyPfS_S_iii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"usage: "
.LC2:
	.string	" aRows aCols bRows bCols\n"
.LC3:
	.string	"error! aCols must match bRows. "
.LC4:
	.string	", "
.LC8:
	.string	"warming up...\n"
.LC9:
	.string	"done.\nrunning tests...\n"
.LC11:
	.string	"a["
.LC12:
	.string	","
.LC13:
	.string	"], b["
.LC14:
	.string	"], c["
.LC15:
	.string	"]\n"
.LC16:
	.string	"time: "
.LC18:
	.string	"ms\n"
.LC19:
	.string	"performance: "
.LC20:
	.string	" flops at "
.LC23:
	.string	"GFlop/s\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB3649:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	movq	%rsi, %rbx
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	cmpl	$4, %edi
	jg	.L18
	leaq	.LC1(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	(%rbx), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC2(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	jmp	.L19
.L18:
	movq	16(%rsi), %rdi
	call	atoi@PLT
	movq	24(%rbx), %rdi
	movl	%eax, %ebp
	call	atoi@PLT
	cmpl	%eax, %ebp
	je	.L20
	leaq	.LC3(%rip), %rsi
	leaq	_ZSt4cerr(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	16(%rbx), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC4(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	24(%rbx), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rax, %rdi
	call	_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_@PLT
.L19:
	orl	$-1, %eax
	jmp	.L17
.L20:
	movl	$4, %edi
	call	srand@PLT
	movq	8(%rbx), %rdi
	call	atoi@PLT
	movq	16(%rbx), %rdi
	cvtsi2ssl	%eax, %xmm6
	movss	%xmm6, 4(%rsp)
	call	atoi@PLT
	movq	24(%rbx), %rdi
	cvtsi2ssl	%eax, %xmm7
	movss	%xmm7, 40(%rsp)
	call	atoi@PLT
	movq	32(%rbx), %rdi
	cvtsi2ssl	%eax, %xmm6
	movss	%xmm6, 44(%rsp)
	call	atoi@PLT
	movss	4(%rsp), %xmm2
	mulss	40(%rsp), %xmm2
	cvtsi2ssl	%eax, %xmm7
	movss	44(%rsp), %xmm3
	movss	4(%rsp), %xmm4
	movss	.LC5(%rip), %xmm0
	mulss	%xmm7, %xmm3
	movss	%xmm7, (%rsp)
	mulss	%xmm7, %xmm4
	movss	%xmm2, 8(%rsp)
	mulss	%xmm2, %xmm0
	comiss	.LC6(%rip), %xmm0
	movss	%xmm3, 24(%rsp)
	movss	%xmm4, 32(%rsp)
	jnb	.L22
	cvttss2siq	%xmm0, %r14
	jmp	.L23
.L22:
	subss	.LC6(%rip), %xmm0
	cvttss2siq	%xmm0, %r14
	btcq	$63, %r14
.L23:
	movq	%r14, %rdi
	call	malloc@PLT
	movss	.LC5(%rip), %xmm0
	mulss	24(%rsp), %xmm0
	comiss	.LC6(%rip), %xmm0
	movq	%rax, %r12
	jnb	.L24
	cvttss2siq	%xmm0, %r13
	jmp	.L25
.L24:
	subss	.LC6(%rip), %xmm0
	cvttss2siq	%xmm0, %r13
	btcq	$63, %r13
.L25:
	movq	%r13, %rdi
	call	malloc@PLT
	movss	.LC5(%rip), %xmm0
	mulss	32(%rsp), %xmm0
	comiss	.LC6(%rip), %xmm0
	movq	%rax, %rbp
	jnb	.L26
	cvttss2siq	%xmm0, %rbx
	jmp	.L27
.L26:
	subss	.LC6(%rip), %xmm0
	cvttss2siq	%xmm0, %rbx
	btcq	$63, %rbx
.L27:
	movq	%rbx, %rdi
	xorl	%r15d, %r15d
	call	malloc@PLT
	leaq	56(%rsp), %rdi
	movq	%r14, %rsi
	movq	%rax, 16(%rsp)
	call	cudaMalloc@PLT
	leaq	64(%rsp), %rdi
	movq	%r13, %rsi
	call	cudaMalloc@PLT
	leaq	72(%rsp), %rdi
	movq	%rbx, %rsi
	call	cudaMalloc@PLT
.L28:
	cvtsi2ssl	%r15d, %xmm0
	movss	8(%rsp), %xmm1
	comiss	%xmm0, %xmm1
	jbe	.L40
	call	rand@PLT
	movl	$1000, %ecx
	cltd
	idivl	%ecx
	cvtsi2ssl	%edx, %xmm0
	movss	%xmm0, (%r12,%r15,4)
	incq	%r15
	jmp	.L28
.L40:
	xorl	%r15d, %r15d
.L30:
	cvtsi2ssl	%r15d, %xmm0
	movss	24(%rsp), %xmm2
	comiss	%xmm0, %xmm2
	jbe	.L41
	call	rand@PLT
	movl	$1000, %ecx
	cltd
	idivl	%ecx
	cvtsi2ssl	%edx, %xmm0
	movss	%xmm0, 0(%rbp,%r15,4)
	incq	%r15
	jmp	.L30
.L41:
	xorl	%eax, %eax
.L32:
	cvtsi2ssl	%eax, %xmm0
	movss	32(%rsp), %xmm3
	comiss	%xmm0, %xmm3
	jbe	.L42
	movq	16(%rsp), %rdx
	movl	$0x00000000, (%rdx,%rax,4)
	incq	%rax
	jmp	.L32
.L42:
	movq	56(%rsp), %rdi
	movl	$1, %ecx
	movq	%r14, %rdx
	movq	%r12, %rsi
	call	cudaMemcpy@PLT
	movq	64(%rsp), %rdi
	movq	%r13, %rdx
	movq	%rbp, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	leaq	.LC8(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movl	$8388609, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$9, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movl	$1, 100(%rsp)
	movq	%rdi, %rdx
	movq	%rdi, 92(%rsp)
	movq	%rdi, 80(%rsp)
	movl	$1, 88(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L34
	cvttss2sil	4(%rsp), %ecx
	movq	72(%rsp), %rdx
	cvttss2sil	(%rsp), %r9d
	movq	64(%rsp), %rsi
	cvttss2sil	40(%rsp), %r8d
	movq	56(%rsp), %rdi
	call	_Z34__device_stub__Z8multiplyPfS_S_iiiPfS_S_iii
.L34:
	leaq	.LC9(%rip), %rsi
	movl	$4, %r14d
	leaq	_ZSt4cout(%rip), %rdi
	movabsq	$4294967808, %r13
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	$0x000000000, 24(%rsp)
.L36:
	call	clock@PLT
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movq	%r13, %rdx
	movl	$1, %ecx
	movq	%r13, %rdi
	movl	$1, %esi
	movq	%rax, %r15
	movq	%r13, 92(%rsp)
	movl	$1, 100(%rsp)
	movq	%r13, 80(%rsp)
	movl	$1, 88(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L35
	cvttss2sil	4(%rsp), %ecx
	movq	72(%rsp), %rdx
	cvttss2sil	(%rsp), %r9d
	movq	64(%rsp), %rsi
	cvttss2sil	40(%rsp), %r8d
	movq	56(%rsp), %rdi
	call	_Z34__device_stub__Z8multiplyPfS_S_iiiPfS_S_iii
.L35:
	call	cudaDeviceSynchronize@PLT
	call	clock@PLT
	movq	72(%rsp), %rsi
	movq	16(%rsp), %rdi
	movq	%rbx, %rdx
	movl	$2, %ecx
	movq	%rax, 32(%rsp)
	call	cudaMemcpy@PLT
	movq	32(%rsp), %rax
	subq	%r15, %rax
	cvtsi2sdq	%rax, %xmm0
	addsd	24(%rsp), %xmm0
	movsd	%xmm0, 24(%rsp)
	decl	%r14d
	jne	.L36
	movss	8(%rsp), %xmm0
	mulss	(%rsp), %xmm0
	leaq	.LC11(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	movsd	24(%rsp), %xmm5
	divsd	.LC10(%rip), %xmm5
	movsd	%xmm5, 8(%rsp)
	leaq	.LC12(%rip), %r13
	addss	%xmm0, %xmm0
	movd	%xmm0, %r15d
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtss2sd	4(%rsp), %xmm6
	movaps	%xmm6, %xmm0
	movq	%xmm6, %r14
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%r13, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtss2sd	40(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC13(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtss2sd	44(%rsp), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%r13, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	cvtss2sd	(%rsp), %xmm7
	movaps	%xmm7, %xmm0
	movq	%xmm7, %rbx
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC14(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%r14, %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	movq	%r13, %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	%rbx, %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC15(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC16(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	8(%rsp), %xmm0
	mulsd	.LC17(%rip), %xmm0
	movq	%rax, %rdi
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC18(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	leaq	.LC19(%rip), %rsi
	leaq	_ZSt4cout(%rip), %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movd	%r15d, %xmm1
	movq	%rax, %rdi
	cvtss2sd	%xmm1, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC20(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movsd	8(%rsp), %xmm1
	movd	%r15d, %xmm0
	divss	.LC21(%rip), %xmm0
	mulsd	.LC22(%rip), %xmm1
	cvtss2sd	%xmm0, %xmm0
	movq	%rax, %rdi
	divsd	%xmm1, %xmm0
	call	_ZNSo9_M_insertIdEERSoT_@PLT
	leaq	.LC23(%rip), %rsi
	movq	%rax, %rdi
	call	_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	movq	64(%rsp), %rdi
	call	cudaFree@PLT
	movq	72(%rsp), %rdi
	call	cudaFree@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	16(%rsp), %rdi
	call	free@PLT
	xorl	%eax, %eax
.L17:
	movq	104(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L37
	call	__stack_chk_fail@PLT
.L37:
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE3649:
	.size	main, .-main
	.section	.rodata.str1.1
.LC24:
	.string	"_Z8multiplyPfS_S_iii"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB3677:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC24(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z8multiplyPfS_S_iii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE3677:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC5:
	.long	1082130432
	.align 4
.LC6:
	.long	1593835520
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC10:
	.long	0
	.long	1093567616
	.align 8
.LC17:
	.long	0
	.long	1083129856
	.section	.rodata.cst4
	.align 4
.LC21:
	.long	1315859240
	.section	.rodata.cst8
	.align 8
.LC22:
	.long	0
	.long	1070596096
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:



#include <hip/hip_runtime.h>
#include <iostream>
#include <cstdlib>
#include <ctime>
#include <unistd.h>
#include <stdio.h>

__global__ //declare global so the computer knows to run this on gpu
void multiply(float *a, float *b, float *c, int aRow, int aCol, 
  int bCol) {

    //nested for loop that "jumps" along blocks to perform multiplication
    int index = threadIdx.x;
    int stride = blockDim.x;
    int block = blockIdx.x;


    for(int i = 0; i < aRow; i += 1)
      for(int j = index + (block * stride); j < bCol; j+= stride)
        for(int k = 0; k < aCol; k += 1)
          c[i*bCol + j] += a[i*aCol + k] * b[j + k*bCol];  
  __syncthreads();
  return;
}

void scalar_multiply(float *a, float *b, float *c, int aRow, int aCol,
  int bCol) {
    //run without GPU work to use as error-checking
    for(int i = 0; i < aRow; ++i)
      for(int j = 0; j < bCol; ++j)
        for(int k = 0; k < aCol; ++k)
          c[i*bCol + j] += a[i*aCol + k] * b[j + k*bCol];
          return;
}


int main(int argc, char *argv[])
{

  if(argc < 5) {
    std::cerr << "usage: " << argv[0] << " aRows aCols bRows bCols\n";
    return(-1);
  }

  if(atoi(argv[2]) != atoi(argv[3])) {
    std::cerr << "error! aCols must match bRows. " << 
      argv[2] << ", " << argv[3] << std::endl;
    return(-1);
  }

  srand(4); //so creative

  int errorcheck = 0; //set to 1 to perform error checking
  int threads = 512;
  int blocks = 512;
  int DEBUG = 0; //set to 1 to print debug messages

  //accept 4 args: row, col, for a and b
  float aRow = atoi(argv[1]);
  float aCol = atoi(argv[2]);
  float bRow = atoi(argv[3]);
  float bCol = atoi(argv[4]);
  float cRow = aRow;
  float cCol = bCol;

  float aSize = aRow * aCol * sizeof(float);
  float bSize = bRow * bCol * sizeof(float);
  float cSize = cRow * cCol * sizeof(float);

  float *a = (float *)malloc(aSize);
  float *b = (float *)malloc(bSize);
  float *c = (float *)malloc(cSize);

  float *cu_a; 
  float *cu_b; 
  float *cu_c;

  //allocate memory on the GPU
  hipMalloc(&cu_a, aSize);
  hipMalloc(&cu_b, bSize);
  hipMalloc(&cu_c, cSize);

  //initialize them to randoms
  for(int i = 0; i < aRow*aCol; i++) {
    a[i] = rand() % 1000;
  }
  for(int i = 0; i < bRow*bCol; i++) {
    b[i] = rand() % 1000;
  }
  for(int i = 0; i < aRow*bCol; i++) {
    c[i] = 0;
  }
    
  //put the data into the GPU
  hipMemcpy(cu_a, a, aSize, hipMemcpyHostToDevice);
  hipMemcpy(cu_b, b, bSize, hipMemcpyHostToDevice);

  //warmup
  std::cout << "warming up...\n";
  multiply<<<blocks, threads>>>(cu_a, cu_b, cu_c, aRow, aCol, bCol);

  std::cout << "done.\nrunning tests...\n";

  if(errorcheck){
    //fill c with an array computed on cpu
    scalar_multiply(a, b, c, aRow, aCol, bCol);
  }


  double fulltime = 0;
  int repeats = 4;
  for(int i=0; i<repeats; i++) {
    //repeat in case the matrix size is too small to time properly

    std::clock_t start = std::clock();
    
    multiply<<<blocks, threads>>>(cu_a, cu_b, cu_c, aRow, aCol, bCol);
    hipDeviceSynchronize();
   
    std::clock_t end = std::clock();
    hipMemcpy(c, cu_c, cSize, hipMemcpyDeviceToHost);
    
    fulltime += (end - start);
    
  }

    
  float flops = (aRow*aCol*bCol*2);
  double s_time = ((fulltime) / (double)(CLOCKS_PER_SEC));


  std::cout << "a[" << aRow << "," << aCol << "], b[" << bRow << "," << bCol << "], c[" << cRow << "," << cCol << "]\n";
  std::cout << "time: " << s_time*1000 << "ms\n";
  std::cout << "performance: " << flops << " flops at " << (((float)flops / 1000000000) / ((s_time) / repeats)) << "GFlop/s\n";

  if(DEBUG) {
  //printout
    for(int i=0; i<aRow * bCol; i++)
      std::cerr << c[i] << " ";
    std::cerr << std::endl; 
  }

  //free GPU memory
  hipFree(cu_a);
  hipFree(cu_b);
  hipFree(cu_c);

  //free CPU memory
  free(a);
  free(b);
  free(c);

  return 0;
}

	.text
	.file	"mMul_basic_cuda.hip"
                                        # Start of file scope inline assembly
	.globl	_ZSt21ios_base_library_initv

                                        # End of file scope inline assembly
	.globl	_Z23__device_stub__multiplyPfS_S_iii # -- Begin function _Z23__device_stub__multiplyPfS_S_iii
	.type	_Z23__device_stub__multiplyPfS_S_iii,@function
_Z23__device_stub__multiplyPfS_S_iii:   # @_Z23__device_stub__multiplyPfS_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$144, %rsp
	.cfi_def_cfa_offset 192
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	20(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	16(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	12(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	32(%rsp), %r12
	leaq	24(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z8multiplyPfS_S_iii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$160, %rsp
	.cfi_adjust_cfa_offset -160
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z23__device_stub__multiplyPfS_S_iii, .Lfunc_end0-_Z23__device_stub__multiplyPfS_S_iii
	.cfi_endproc
                                        # -- End function
	.globl	_Z15scalar_multiplyPfS_S_iii    # -- Begin function _Z15scalar_multiplyPfS_S_iii
	.type	_Z15scalar_multiplyPfS_S_iii,@function
_Z15scalar_multiplyPfS_S_iii:           # @_Z15scalar_multiplyPfS_S_iii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rdx, -8(%rsp)                  # 8-byte Spill
	movq	%rsi, -16(%rsp)                 # 8-byte Spill
	movq	%rdi, -24(%rsp)                 # 8-byte Spill
	testl	%ecx, %ecx
	jle	.LBB1_9
# %bb.1:                                # %.preheader24.lr.ph
	movslq	%r9d, %rdi
	movl	%ecx, %ecx
	movl	%edi, %r10d
	movl	%r8d, %r11d
	leaq	(,%rdi,4), %rbx
	xorl	%r14d, %r14d
	xorl	%r15d, %r15d
.LBB1_2:                                # %.preheader24
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_4 Depth 2
                                        #       Child Loop BB1_6 Depth 3
	testl	%r9d, %r9d
	jle	.LBB1_8
# %bb.3:                                # %.preheader.lr.ph
                                        #   in Loop: Header=BB1_2 Depth=1
	movl	%r14d, %eax
	movq	-24(%rsp), %rdx                 # 8-byte Reload
	leaq	(%rdx,%rax,4), %r12
	movq	%r15, %rax
	imulq	%rdi, %rax
	movq	-8(%rsp), %rdx                  # 8-byte Reload
	leaq	(%rdx,%rax,4), %r13
	movq	-16(%rsp), %rsi                 # 8-byte Reload
	xorl	%eax, %eax
.LBB1_4:                                # %.preheader
                                        #   Parent Loop BB1_2 Depth=1
                                        # =>  This Loop Header: Depth=2
                                        #       Child Loop BB1_6 Depth 3
	testl	%r8d, %r8d
	jle	.LBB1_7
# %bb.5:                                # %.lr.ph
                                        #   in Loop: Header=BB1_4 Depth=2
	movss	(%r13,%rax,4), %xmm0            # xmm0 = mem[0],zero,zero,zero
	movq	%rsi, %rbp
	xorl	%edx, %edx
.LBB1_6:                                #   Parent Loop BB1_2 Depth=1
                                        #     Parent Loop BB1_4 Depth=2
                                        # =>    This Inner Loop Header: Depth=3
	movss	(%r12,%rdx,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	mulss	(%rbp), %xmm1
	addss	%xmm1, %xmm0
	movss	%xmm0, (%r13,%rax,4)
	incq	%rdx
	addq	%rbx, %rbp
	cmpq	%rdx, %r11
	jne	.LBB1_6
.LBB1_7:                                # %._crit_edge
                                        #   in Loop: Header=BB1_4 Depth=2
	incq	%rax
	addq	$4, %rsi
	cmpq	%r10, %rax
	jne	.LBB1_4
.LBB1_8:                                # %._crit_edge27
                                        #   in Loop: Header=BB1_2 Depth=1
	incq	%r15
	addl	%r8d, %r14d
	cmpq	%rcx, %r15
	jne	.LBB1_2
.LBB1_9:                                # %._crit_edge29
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z15scalar_multiplyPfS_S_iii, .Lfunc_end1-_Z15scalar_multiplyPfS_S_iii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI2_0:
	.long	0x40800000                      # float 4
.LCPI2_1:
	.long	0x5f000000                      # float 9.22337203E+18
.LCPI2_4:
	.long	0x4e6e6b28                      # float 1.0E+9
.LCPI2_6:
	.long	0x00000000                      # float 0
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI2_2:
	.quad	0x412e848000000000              # double 1.0E+6
.LCPI2_3:
	.quad	0x408f400000000000              # double 1000
.LCPI2_5:
	.quad	0x3fd0000000000000              # double 0.25
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %rbx
	cmpl	$4, %edi
	jg	.LBB2_3
# %bb.1:
	movl	$_ZSt4cerr, %edi
	movl	$.L.str, %esi
	movl	$7, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	(%rbx), %rbx
	testq	%rbx, %rbx
	je	.LBB2_17
# %bb.2:
	movq	%rbx, %rdi
	callq	strlen
	movl	$_ZSt4cerr, %edi
	movq	%rbx, %rsi
	movq	%rax, %rdx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB2_18
.LBB2_3:
	movq	16(%rbx), %rdi
	callq	atoi
	movl	%eax, %ebp
	movq	24(%rbx), %rdi
	callq	atoi
	cmpl	%eax, %ebp
	jne	.LBB2_15
# %bb.4:
	movl	$4, %edi
	callq	srand
	movq	8(%rbx), %rdi
	callq	atoi
	cvtsi2ss	%eax, %xmm0
	movss	%xmm0, 4(%rsp)                  # 4-byte Spill
	movq	16(%rbx), %rdi
	callq	atoi
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	%xmm0, 8(%rsp)                  # 4-byte Spill
	movq	24(%rbx), %rdi
	callq	atoi
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	%xmm0, 36(%rsp)                 # 4-byte Spill
	movq	32(%rbx), %rdi
	callq	atoi
	cvtsi2ss	%eax, %xmm1
	movss	4(%rsp), %xmm4                  # 4-byte Reload
                                        # xmm4 = mem[0],zero,zero,zero
	movaps	%xmm4, %xmm0
	mulss	8(%rsp), %xmm0                  # 4-byte Folded Reload
	movss	%xmm0, (%rsp)                   # 4-byte Spill
	movss	.LCPI2_0(%rip), %xmm3           # xmm3 = mem[0],zero,zero,zero
	mulss	%xmm3, %xmm0
	movss	36(%rsp), %xmm2                 # 4-byte Reload
                                        # xmm2 = mem[0],zero,zero,zero
	mulss	%xmm1, %xmm2
	movss	%xmm2, 16(%rsp)                 # 4-byte Spill
	mulss	%xmm3, %xmm2
	movaps	%xmm2, 64(%rsp)                 # 16-byte Spill
	movaps	%xmm4, %xmm2
	movss	%xmm1, 12(%rsp)                 # 4-byte Spill
	mulss	%xmm1, %xmm2
	movss	%xmm2, 24(%rsp)                 # 4-byte Spill
	mulss	%xmm2, %xmm3
	movaps	%xmm3, 80(%rsp)                 # 16-byte Spill
	cvttss2si	%xmm0, %rax
	movq	%rax, %rcx
	sarq	$63, %rcx
	subss	.LCPI2_1(%rip), %xmm0
	cvttss2si	%xmm0, %r13
	andq	%rcx, %r13
	orq	%rax, %r13
	movq	%r13, %rdi
	callq	malloc
	movaps	64(%rsp), %xmm0                 # 16-byte Reload
	cvttss2si	%xmm0, %rcx
	movq	%rax, %r14
	movq	%rcx, %rax
	sarq	$63, %rax
	subss	.LCPI2_1(%rip), %xmm0
	cvttss2si	%xmm0, %rbp
	andq	%rax, %rbp
	orq	%rcx, %rbp
	movq	%rbp, %rdi
	callq	malloc
	movaps	80(%rsp), %xmm0                 # 16-byte Reload
	cvttss2si	%xmm0, %rcx
	movq	%rax, %r15
	movq	%rcx, %rax
	sarq	$63, %rax
	subss	.LCPI2_1(%rip), %xmm0
	cvttss2si	%xmm0, %r12
	andq	%rax, %r12
	orq	%rcx, %r12
	movq	%r12, %rdi
	callq	malloc
	movq	%rax, 80(%rsp)                  # 8-byte Spill
	leaq	56(%rsp), %rdi
	movq	%r13, %rsi
	callq	hipMalloc
	leaq	48(%rsp), %rdi
	movq	%rbp, %rsi
	callq	hipMalloc
	leaq	40(%rsp), %rdi
	movq	%r12, %rsi
	callq	hipMalloc
	movss	(%rsp), %xmm0                   # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	xorps	%xmm1, %xmm1
	ucomiss	%xmm1, %xmm0
	jbe	.LBB2_7
# %bb.5:                                # %.lr.ph.preheader
	xorl	%ebx, %ebx
.LBB2_6:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$274877907, %rax, %rcx          # imm = 0x10624DD3
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$38, %rcx
	addl	%edx, %ecx
	imull	$1000, %ecx, %ecx               # imm = 0x3E8
	subl	%ecx, %eax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	%xmm0, (%r14,%rbx,4)
	incq	%rbx
	xorps	%xmm0, %xmm0
	cvtsi2ss	%ebx, %xmm0
	movss	(%rsp), %xmm1                   # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	ucomiss	%xmm0, %xmm1
	ja	.LBB2_6
.LBB2_7:                                # %.preheader125
	movss	16(%rsp), %xmm0                 # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	ucomiss	.LCPI2_6(%rip), %xmm0
	jbe	.LBB2_10
# %bb.8:                                # %.lr.ph128.preheader
	xorl	%ebx, %ebx
.LBB2_9:                                # %.lr.ph128
                                        # =>This Inner Loop Header: Depth=1
	callq	rand
	cltq
	imulq	$274877907, %rax, %rcx          # imm = 0x10624DD3
	movq	%rcx, %rdx
	shrq	$63, %rdx
	sarq	$38, %rcx
	addl	%edx, %ecx
	imull	$1000, %ecx, %ecx               # imm = 0x3E8
	subl	%ecx, %eax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	movss	%xmm0, (%r15,%rbx,4)
	incq	%rbx
	xorps	%xmm0, %xmm0
	cvtsi2ss	%ebx, %xmm0
	movss	16(%rsp), %xmm1                 # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	ucomiss	%xmm0, %xmm1
	ja	.LBB2_9
.LBB2_10:                               # %.preheader
	xorps	%xmm0, %xmm0
	movss	24(%rsp), %xmm1                 # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	ucomiss	%xmm0, %xmm1
	movq	80(%rsp), %rcx                  # 8-byte Reload
	jbe	.LBB2_13
# %bb.11:                               # %.lr.ph130.preheader
	xorl	%eax, %eax
.LBB2_12:                               # %.lr.ph130
                                        # =>This Inner Loop Header: Depth=1
	movl	$0, (%rcx,%rax,4)
	incq	%rax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%eax, %xmm0
	ucomiss	%xmm0, %xmm1
	ja	.LBB2_12
.LBB2_13:                               # %._crit_edge
	movabsq	$4294967808, %rbx               # imm = 0x100000200
	movq	56(%rsp), %rdi
	movq	%r14, 112(%rsp)                 # 8-byte Spill
	movq	%r14, %rsi
	movq	%r13, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	48(%rsp), %rdi
	movq	%r15, %rsi
	movq	%rbp, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	$_ZSt4cout, %edi
	movl	$.L.str.4, %esi
	movl	$14, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	movq	%r15, 104(%rsp)                 # 8-byte Spill
	je	.LBB2_19
# %bb.14:                               # %._crit_edge._crit_edge
	cvttss2si	4(%rsp), %eax           # 4-byte Folded Reload
	movl	%eax, 24(%rsp)                  # 4-byte Spill
	cvttss2si	8(%rsp), %eax           # 4-byte Folded Reload
	movl	%eax, 64(%rsp)                  # 4-byte Spill
	cvttss2si	12(%rsp), %r14d         # 4-byte Folded Reload
	jmp	.LBB2_20
.LBB2_15:
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.2, %esi
	movl	$31, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	16(%rbx), %r14
	testq	%r14, %r14
	je	.LBB2_25
# %bb.16:
	movq	%r14, %rdi
	callq	strlen
	movl	$_ZSt4cerr, %edi
	movq	%r14, %rsi
	movq	%rax, %rdx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB2_26
.LBB2_17:
	movq	_ZSt4cerr(%rip), %rax
	movq	-24(%rax), %rax
	leaq	_ZSt4cerr(%rax), %rdi
	movl	32(%rdi), %esi
	orl	$1, %esi
	callq	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.LBB2_18:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.1, %esi
	movl	$25, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB2_30
.LBB2_19:
	movq	56(%rsp), %rdi
	movq	48(%rsp), %rsi
	movq	40(%rsp), %rdx
	cvttss2si	4(%rsp), %ecx           # 4-byte Folded Reload
	cvttss2si	8(%rsp), %r8d           # 4-byte Folded Reload
	cvttss2si	12(%rsp), %r9d          # 4-byte Folded Reload
	movl	%ecx, 24(%rsp)                  # 4-byte Spill
	movl	%r8d, 64(%rsp)                  # 4-byte Spill
	movl	%r9d, %r14d
	callq	_Z23__device_stub__multiplyPfS_S_iii
.LBB2_20:
	movl	$_ZSt4cout, %edi
	movl	$.L.str.5, %esi
	movl	$23, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	movl	$4, %r13d
.LBB2_21:                               # =>This Inner Loop Header: Depth=1
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	callq	clock
	movq	%rax, %r15
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%rbx, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB2_23
# %bb.22:                               #   in Loop: Header=BB2_21 Depth=1
	movq	56(%rsp), %rdi
	movq	48(%rsp), %rsi
	movq	40(%rsp), %rdx
	movl	24(%rsp), %ecx                  # 4-byte Reload
	movl	64(%rsp), %r8d                  # 4-byte Reload
	movl	%r14d, %r9d
	callq	_Z23__device_stub__multiplyPfS_S_iii
.LBB2_23:                               #   in Loop: Header=BB2_21 Depth=1
	callq	hipDeviceSynchronize
	callq	clock
	movq	%rax, %rbp
	movq	40(%rsp), %rsi
	movq	80(%rsp), %rdi                  # 8-byte Reload
	movq	%r12, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	subq	%r15, %rbp
	xorps	%xmm0, %xmm0
	cvtsi2sd	%rbp, %xmm0
	movsd	16(%rsp), %xmm1                 # 8-byte Reload
                                        # xmm1 = mem[0],zero
	addsd	%xmm0, %xmm1
	movapd	%xmm1, %xmm0
	decl	%r13d
	jne	.LBB2_21
# %bb.24:
	movss	(%rsp), %xmm1                   # 4-byte Reload
                                        # xmm1 = mem[0],zero,zero,zero
	mulss	12(%rsp), %xmm1                 # 4-byte Folded Reload
	addss	%xmm1, %xmm1
	movss	%xmm1, (%rsp)                   # 4-byte Spill
	divsd	.LCPI2_2(%rip), %xmm0
	movsd	%xmm0, 16(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	movl	$.L.str.6, %esi
	movl	$2, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	cvtss2sd	4(%rsp), %xmm0                  # 4-byte Folded Reload
	movsd	%xmm0, 24(%rsp)                 # 8-byte Spill
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.7, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	cvtss2sd	8(%rsp), %xmm0                  # 4-byte Folded Reload
	movq	%rbx, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.8, %esi
	movl	$5, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	cvtss2sd	36(%rsp), %xmm0                 # 4-byte Folded Reload
	movq	%rbx, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.7, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	cvtss2sd	12(%rsp), %xmm0                 # 4-byte Folded Reload
	movsd	%xmm0, 64(%rsp)                 # 8-byte Spill
	movq	%rbx, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.9, %esi
	movl	$5, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rbx, %rdi
	movsd	24(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.7, %esi
	movl	$1, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	%rbx, %rdi
	movsd	64(%rsp), %xmm0                 # 8-byte Reload
                                        # xmm0 = mem[0],zero
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.10, %esi
	movl	$2, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.11, %esi
	movl	$6, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movsd	.LCPI2_3(%rip), %xmm0           # xmm0 = mem[0],zero
	mulsd	16(%rsp), %xmm0                 # 8-byte Folded Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.12, %esi
	movl	$3, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movl	$_ZSt4cout, %edi
	movl	$.L.str.13, %esi
	movl	$13, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rsp), %xmm0                   # 4-byte Folded Reload
	movl	$_ZSt4cout, %edi
	callq	_ZNSo9_M_insertIdEERSoT_
	movq	%rax, %rbx
	movl	$.L.str.14, %esi
	movl	$10, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movss	(%rsp), %xmm0                   # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	divss	.LCPI2_4(%rip), %xmm0
	cvtss2sd	%xmm0, %xmm0
	movsd	16(%rsp), %xmm1                 # 8-byte Reload
                                        # xmm1 = mem[0],zero
	mulsd	.LCPI2_5(%rip), %xmm1
	divsd	%xmm1, %xmm0
	movq	%rbx, %rdi
	callq	_ZNSo9_M_insertIdEERSoT_
	movl	$.L.str.15, %esi
	movl	$8, %edx
	movq	%rax, %rdi
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	56(%rsp), %rdi
	callq	hipFree
	movq	48(%rsp), %rdi
	callq	hipFree
	movq	40(%rsp), %rdi
	callq	hipFree
	movq	112(%rsp), %rdi                 # 8-byte Reload
	callq	free
	movq	104(%rsp), %rdi                 # 8-byte Reload
	callq	free
	movq	80(%rsp), %rdi                  # 8-byte Reload
	callq	free
	xorl	%eax, %eax
	jmp	.LBB2_31
.LBB2_25:
	movq	_ZSt4cerr(%rip), %rax
	movq	-24(%rax), %rax
	leaq	_ZSt4cerr(%rax), %rdi
	movl	32(%rdi), %esi
	orl	$1, %esi
	callq	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.LBB2_26:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit113
	movl	$_ZSt4cerr, %edi
	movl	$.L.str.3, %esi
	movl	$2, %edx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	movq	24(%rbx), %rbx
	testq	%rbx, %rbx
	je	.LBB2_28
# %bb.27:
	movq	%rbx, %rdi
	callq	strlen
	movl	$_ZSt4cerr, %edi
	movq	%rbx, %rsi
	movq	%rax, %rdx
	callq	_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l
	jmp	.LBB2_29
.LBB2_28:
	movq	_ZSt4cerr(%rip), %rax
	movq	-24(%rax), %rax
	leaq	_ZSt4cerr(%rax), %rdi
	movl	32(%rdi), %esi
	orl	$1, %esi
	callq	_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate
.LBB2_29:                               # %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit115
	movq	_ZSt4cerr(%rip), %rax
	movl	$_ZSt4cerr, %ecx
	movq	-24(%rax), %rdi
	addq	%rcx, %rdi
	movl	$10, %esi
	callq	_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc
	movsbl	%al, %esi
	movl	$_ZSt4cerr, %edi
	callq	_ZNSo3putEc
	movq	%rax, %rdi
	callq	_ZNSo5flushEv
.LBB2_30:
	movl	$-1, %eax
.LBB2_31:
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	main, .Lfunc_end2-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB3_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB3_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z8multiplyPfS_S_iii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end3:
	.size	__hip_module_ctor, .Lfunc_end3-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB4_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB4_2:
	retq
.Lfunc_end4:
	.size	__hip_module_dtor, .Lfunc_end4-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z8multiplyPfS_S_iii,@object    # @_Z8multiplyPfS_S_iii
	.section	.rodata,"a",@progbits
	.globl	_Z8multiplyPfS_S_iii
	.p2align	3, 0x0
_Z8multiplyPfS_S_iii:
	.quad	_Z23__device_stub__multiplyPfS_S_iii
	.size	_Z8multiplyPfS_S_iii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"usage: "
	.size	.L.str, 8

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	" aRows aCols bRows bCols\n"
	.size	.L.str.1, 26

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"error! aCols must match bRows. "
	.size	.L.str.2, 32

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	", "
	.size	.L.str.3, 3

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"warming up...\n"
	.size	.L.str.4, 15

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"done.\nrunning tests...\n"
	.size	.L.str.5, 24

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"a["
	.size	.L.str.6, 3

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	","
	.size	.L.str.7, 2

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"], b["
	.size	.L.str.8, 6

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"], c["
	.size	.L.str.9, 6

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"]\n"
	.size	.L.str.10, 3

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"time: "
	.size	.L.str.11, 7

	.type	.L.str.12,@object               # @.str.12
.L.str.12:
	.asciz	"ms\n"
	.size	.L.str.12, 4

	.type	.L.str.13,@object               # @.str.13
.L.str.13:
	.asciz	"performance: "
	.size	.L.str.13, 14

	.type	.L.str.14,@object               # @.str.14
.L.str.14:
	.asciz	" flops at "
	.size	.L.str.14, 11

	.type	.L.str.15,@object               # @.str.15
.L.str.15:
	.asciz	"GFlop/s\n"
	.size	.L.str.15, 9

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z8multiplyPfS_S_iii"
	.size	.L__unnamed_1, 21

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z23__device_stub__multiplyPfS_S_iii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z8multiplyPfS_S_iii
	.addrsig_sym _ZSt4cerr
	.addrsig_sym _ZSt4cout
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z8multiplyPfS_S_iii    ; -- Begin function _Z8multiplyPfS_S_iii
	.globl	_Z8multiplyPfS_S_iii
	.p2align	8
	.type	_Z8multiplyPfS_S_iii,@function
_Z8multiplyPfS_S_iii:                   ; @_Z8multiplyPfS_S_iii
; %bb.0:
	s_load_b128 s[4:7], s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_cmp_lt_i32 s4, 1
	s_cbranch_scc1 .LBB0_9
; %bb.1:                                ; %.lr.ph36
	s_clause 0x2
	s_load_b32 s7, s[0:1], 0x34
	s_load_b128 s[8:11], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x10
	s_mov_b32 s13, 0
	v_mov_b32_e32 v9, 0
	s_mov_b32 s12, s13
	s_waitcnt lgkmcnt(0)
	s_and_b32 s18, s7, 0xffff
	s_cmp_gt_i32 s5, 0
	s_mul_i32 s15, s15, s18
	s_cselect_b32 s19, -1, 0
	s_ashr_i32 s0, s15, 31
	v_add_co_u32 v1, s1, s15, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e64 v2, null, s0, 0, s1
	v_add_nc_u32_e32 v8, s15, v0
	s_ashr_i32 s7, s6, 31
	s_lshl_b32 s20, s18, 2
	v_lshlrev_b64 v[0:1], 2, v[1:2]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_gt_i32_e64 s0, s6, v8
	v_add_co_u32 v0, vcc_lo, s10, v0
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v1, vcc_lo, s11, v1, vcc_lo
	s_lshl_b64 s[10:11], s[6:7], 2
	s_mov_b32 s7, s13
.LBB0_2:                                ; =>This Loop Header: Depth=1
                                        ;     Child Loop BB0_4 Depth 2
                                        ;       Child Loop BB0_6 Depth 3
	s_and_saveexec_b32 s21, s0
	s_cbranch_execz .LBB0_8
; %bb.3:                                ; %.preheader.lr.ph
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_lshl_b64 s[14:15], s[12:13], 2
	v_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0
	v_mov_b32_e32 v10, v8
	s_add_u32 s14, s8, s14
	s_addc_u32 s15, s9, s15
	s_mul_i32 s22, s7, s6
	s_mov_b32 s23, 0
.LBB0_4:                                ; %.preheader
                                        ;   Parent Loop BB0_2 Depth=1
                                        ; =>  This Loop Header: Depth=2
                                        ;       Child Loop BB0_6 Depth 3
	s_and_not1_b32 vcc_lo, exec_lo, s19
	s_cbranch_vccnz .LBB0_7
; %bb.5:                                ; %.lr.ph
                                        ;   in Loop: Header=BB0_4 Depth=2
	v_dual_mov_b32 v7, v3 :: v_dual_add_nc_u32 v4, s22, v10
	v_mov_b32_e32 v6, v2
	s_mov_b64 s[16:17], s[14:15]
	s_mov_b32 s1, s5
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_ashrrev_i32_e32 v5, 31, v4
	v_lshlrev_b64 v[4:5], 2, v[4:5]
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v4, vcc_lo, s2, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s3, v5, vcc_lo
	global_load_b32 v11, v[4:5], off
.LBB0_6:                                ;   Parent Loop BB0_2 Depth=1
                                        ;     Parent Loop BB0_4 Depth=2
                                        ; =>    This Inner Loop Header: Depth=3
	global_load_b32 v12, v9, s[16:17]
	global_load_b32 v13, v[6:7], off
	v_add_co_u32 v6, vcc_lo, v6, s10
	s_add_i32 s1, s1, -1
	v_add_co_ci_u32_e32 v7, vcc_lo, s11, v7, vcc_lo
	s_add_u32 s16, s16, 4
	s_addc_u32 s17, s17, 0
	s_cmp_eq_u32 s1, 0
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v11, v12, v13
	global_store_b32 v[4:5], v11, off
	s_cbranch_scc0 .LBB0_6
.LBB0_7:                                ; %._crit_edge
                                        ;   in Loop: Header=BB0_4 Depth=2
	v_add_nc_u32_e32 v10, s18, v10
	v_add_co_u32 v2, s1, v2, s20
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e64 v3, s1, 0, v3, s1
	v_cmp_le_i32_e32 vcc_lo, s6, v10
	s_or_b32 s23, vcc_lo, s23
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s23
	s_cbranch_execnz .LBB0_4
.LBB0_8:                                ; %Flow67
                                        ;   in Loop: Header=BB0_2 Depth=1
	s_or_b32 exec_lo, exec_lo, s21
	s_add_i32 s7, s7, 1
	s_add_i32 s12, s12, s5
	s_cmp_eq_u32 s7, s4
	s_cbranch_scc0 .LBB0_2
.LBB0_9:                                ; %._crit_edge37
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z8multiplyPfS_S_iii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 14
		.amdhsa_next_free_sgpr 24
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z8multiplyPfS_S_iii, .Lfunc_end0-_Z8multiplyPfS_S_iii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 420
; NumSgprs: 26
; NumVgprs: 14
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 3
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 26
; NumVGPRsForWavesPerEU: 14
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         28
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z8multiplyPfS_S_iii
    .private_segment_fixed_size: 0
    .sgpr_count:     26
    .sgpr_spill_count: 0
    .symbol:         _Z8multiplyPfS_S_iii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     14
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
