#include <stdio.h>

const int N       = 4096; // Matrix size
const float A_val = 1.0f; // Values of all elements of A
const float B_val = 2.0f; // Values of all elements of B

// Macro for checking errors in CUDA API calls
#define cudaErrorCheck(call)                                                             \
do{                                                                                      \
  cudaError_t cuErr = call;                                                              \
  if(cudaSuccess != cuErr){                                                              \
    printf("CUDA Error - %s:%d: '%s'\n", __FILE__, __LINE__, cudaGetErrorString(cuErr)); \
    exit(0);                                                                             \
  }                                                                                      \
}while(0)

/* ----------------------------------------------------------------------------
Matrix multiply kernel
    - Each CUDA thread computes 1 element of the matrix via dot product
          i.e., C[row,col] = SUM(from i=0,N){A[row,i]*B[i,col]}

    - 1D indexing (row-major) through matrix gives
          index = row * n + col

    - Based on 1D indexing, we have
          single_row_index = row * n + i
          single_col_index = i * n + col
---------------------------------------------------------------------------- */
__global__ void mat_mul(const float *A, const float *B, float *C, int n) {

  /* -----------------------------------------------
  These span all cols and rows of the matrices based
  on the values of the configuration parameters
  ----------------------------------------------- */
  int col = threadIdx.x + blockDim.x * blockIdx.x;
  int row = threadIdx.y + blockDim.y * blockIdx.y;

  if((col < n) && (row < n)){

    float element = 0;

    for(int i=0; i<n; i++){
      element += A[row * n + i] * B[i * n + col]; // Dot product of row,column
    }

    C[row * n + col] = element;
  }
}

int main(int argc, char *argv[]){

  float *h_A, *h_B, *h_C;
  float *d_A, *d_B, *d_C;

  // Allocate memory for arrays h_A, h_B, h_C on host
  h_A = new float[N*N];
  h_B = new float[N*N];
  h_C = new float[N*N];

  // Initialize host arrays
  for (int i = 0; i < N*N; i++){
    h_A[i] = A_val;
    h_B[i] = B_val;
    h_C[i] = 0;
  }

  // Allocate memory for arrays d_A, d_B, d_C on device
  cudaErrorCheck( cudaMalloc(&d_A, N*N*sizeof(float)) );
  cudaErrorCheck( cudaMalloc(&d_B, N*N*sizeof(float)) );
  cudaErrorCheck( cudaMalloc(&d_C, N*N*sizeof(float)) );

  // Copy values from host arrays into device arrays
  cudaErrorCheck( cudaMemcpy(d_A, h_A, N*N*sizeof(float), cudaMemcpyHostToDevice) );
  cudaErrorCheck( cudaMemcpy(d_B, h_B, N*N*sizeof(float), cudaMemcpyHostToDevice) );

  /* -------------------------------------------------------------
      Set execution configuration parameters
          threads_per_block: number of CUDA threads per grid block
          blocks_in_grid   : number of blocks in grid
          (These are structs with 3 member variables x, y, z)
   ------------------------------------------------------------ */
  dim3 threads_per_block(16,16,1);
  dim3 blocks_in_grid(ceil(float(N)/threads_per_block.x), ceil(float(N)/threads_per_block.y), 1);

  // Launch kernel
  mat_mul<<<blocks_in_grid, threads_per_block>>>(d_A, d_B, d_C, N);

  // Check for errors in the kernel launch (e.g., invalid configuration parameters)
  cudaError_t cuErrSync = cudaGetLastError();

  // Check for errors on the device after control is returned to host
  cudaError_t cuErrAsync = cudaDeviceSynchronize();

  if(cuErrSync != cudaSuccess){
    printf("CUDA Error - %s:%d: '%s'\n", __FILE__, __LINE__, cudaGetErrorString(cuErrSync)); exit(0);
  }

  if(cuErrAsync != cudaSuccess){
    printf("CUDA Error - %s:%d: '%s'\n", __FILE__, __LINE__, cudaGetErrorString(cuErrAsync)); exit(0);
  }

  // Copy results back to host
  cudaErrorCheck( cudaMemcpy(h_C, d_C, N*N*sizeof(float), cudaMemcpyDeviceToHost) );

  // Verify results
  for(int i = 0; i < N*N; i++){ 
    if(h_C[i] != A_val*B_val*N){
      printf("mismatch at index %d, was: %f, should be: %f\n", i, h_C[i], A_val*B_val*N);
      return -1;
    }
  }

  cudaErrorCheck( cudaFree(d_A) );
  cudaErrorCheck( cudaFree(d_B) );
  cudaErrorCheck( cudaFree(d_C) );

  delete[] h_A;
  delete[] h_B;
  delete[] h_C;

  printf("Success!\n"); 

  return 0;
}
  

	.file	"tmpxft_0020ca49_00000000-6_matrix_multiply.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z33__device_stub__Z7mat_mulPKfS0_PfiPKfS0_Pfi
	.type	_Z33__device_stub__Z7mat_mulPKfS0_PfiPKfS0_Pfi, @function
_Z33__device_stub__Z7mat_mulPKfS0_PfiPKfS0_Pfi:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z7mat_mulPKfS0_Pfi(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z33__device_stub__Z7mat_mulPKfS0_PfiPKfS0_Pfi, .-_Z33__device_stub__Z7mat_mulPKfS0_PfiPKfS0_Pfi
	.globl	_Z7mat_mulPKfS0_Pfi
	.type	_Z7mat_mulPKfS0_Pfi, @function
_Z7mat_mulPKfS0_Pfi:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z33__device_stub__Z7mat_mulPKfS0_PfiPKfS0_Pfi
	.cfi_endproc
.LFE2053:
	.size	_Z7mat_mulPKfS0_Pfi, .-_Z7mat_mulPKfS0_Pfi
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC2:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/tom-papatheodore/cuda_examples/master/matrix_multiply/naive/matrix_multiply.cu"
.LC3:
	.string	"CUDA Error - %s:%d: '%s'\n"
.LC6:
	.string	"mismatch at index %d, was: %f, should be: %f\n"
.LC7:
	.string	"Success!\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	movl	$67108864, %edi
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	subq	$72, %rsp
	.cfi_def_cfa_offset 112
	movq	%fs:40, %rax
	movq	%rax, 56(%rsp)
	xorl	%eax, %eax
	call	_Znam@PLT
	movl	$67108864, %edi
	movq	%rax, %r12
	call	_Znam@PLT
	movl	$67108864, %edi
	movq	%rax, %rbp
	call	_Znam@PLT
	movss	.LC0(%rip), %xmm1
	movss	.LC1(%rip), %xmm0
	movq	%rax, %rbx
	xorl	%eax, %eax
.L9:
	movss	%xmm1, (%r12,%rax)
	movss	%xmm0, 0(%rbp,%rax)
	addq	$4, %rax
	cmpq	$67108864, %rax
	jne	.L9
	xorl	%eax, %eax
	movl	$16777216, %ecx
	movq	%rbx, %rdi
	movl	$67108864, %esi
	rep stosl
	leaq	8(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L10
	call	cudaGetErrorString@PLT
	movl	$68, %ecx
	movq	%rax, %r8
	jmp	.L33
.L10:
	leaq	16(%rsp), %rdi
	movl	$67108864, %esi
	call	cudaMalloc@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L11
	call	cudaGetErrorString@PLT
	movl	$69, %ecx
	movq	%rax, %r8
.L33:
	movl	$2, %edi
	leaq	.LC2(%rip), %rdx
	leaq	.LC3(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	xorl	%edi, %edi
	call	exit@PLT
.L11:
	leaq	24(%rsp), %rdi
	movl	$67108864, %esi
	call	cudaMalloc@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L12
	call	cudaGetErrorString@PLT
	movl	$70, %ecx
	movq	%rax, %r8
	jmp	.L33
.L12:
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movl	$67108864, %edx
	movq	%r12, %rsi
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L13
	call	cudaGetErrorString@PLT
	movl	$73, %ecx
	movq	%rax, %r8
	jmp	.L33
.L13:
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movl	$67108864, %edx
	movq	%rbp, %rsi
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L14
	call	cudaGetErrorString@PLT
	movl	$74, %ecx
	movq	%rax, %r8
	jmp	.L33
.L14:
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	movl	$1, %esi
	movabsq	$68719476752, %rdx
	movabsq	$1099511628032, %rdi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L15
	movq	24(%rsp), %rdx
	movq	16(%rsp), %rsi
	movl	$4096, %ecx
	movq	8(%rsp), %rdi
	call	_Z33__device_stub__Z7mat_mulPKfS0_PfiPKfS0_Pfi
.L15:
	call	cudaGetLastError@PLT
	movl	%eax, %r13d
	call	cudaDeviceSynchronize@PLT
	movl	%eax, %edi
	testl	%r13d, %r13d
	je	.L16
	movl	%r13d, %edi
	call	cudaGetErrorString@PLT
	movl	$95, %ecx
	movq	%rax, %r8
	jmp	.L33
.L16:
	testl	%eax, %eax
	je	.L17
	call	cudaGetErrorString@PLT
	movl	$99, %ecx
	movq	%rax, %r8
	jmp	.L33
.L17:
	movq	24(%rsp), %rsi
	movl	$67108864, %edx
	movq	%rbx, %rdi
	movl	$2, %ecx
	call	cudaMemcpy@PLT
	xorl	%edx, %edx
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L18
	call	cudaGetErrorString@PLT
	movl	$103, %ecx
	movq	%rax, %r8
	jmp	.L33
.L35:
	jne	.L27
	incq	%rdx
	cmpq	$16777216, %rdx
	je	.L34
.L18:
	movss	(%rbx,%rdx,4), %xmm0
	ucomiss	.LC4(%rip), %xmm0
	jnp	.L35
.L27:
	movsd	.LC5(%rip), %xmm1
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	movb	$2, %al
	cvtss2sd	%xmm0, %xmm0
	call	__printf_chk@PLT
	orl	$-1, %eax
	jmp	.L8
.L34:
	movq	8(%rsp), %rdi
	call	cudaFree@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L22
	call	cudaGetErrorString@PLT
	movl	$113, %ecx
	movq	%rax, %r8
	jmp	.L33
.L22:
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L23
	call	cudaGetErrorString@PLT
	movl	$114, %ecx
	movq	%rax, %r8
	jmp	.L33
.L23:
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L24
	call	cudaGetErrorString@PLT
	movl	$115, %ecx
	movq	%rax, %r8
	jmp	.L33
.L24:
	movq	%r12, %rdi
	call	_ZdaPv@PLT
	movq	%rbp, %rdi
	call	_ZdaPv@PLT
	movq	%rbx, %rdi
	call	_ZdaPv@PLT
	leaq	.LC7(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	xorl	%eax, %eax
.L8:
	movq	56(%rsp), %rdx
	subq	%fs:40, %rdx
	je	.L25
	call	__stack_chk_fail@PLT
.L25:
	addq	$72, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%rbp
	.cfi_def_cfa_offset 24
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC8:
	.string	"_Z7mat_mulPKfS0_Pfi"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC8(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z7mat_mulPKfS0_Pfi(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	1065353216
	.align 4
.LC1:
	.long	1073741824
	.align 4
.LC4:
	.long	1174405120
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC5:
	.long	0
	.long	1086324736
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdio.h>

const int N       = 4096; // Matrix size
const float A_val = 1.0f; // Values of all elements of A
const float B_val = 2.0f; // Values of all elements of B

// Macro for checking errors in CUDA API calls
#define cudaErrorCheck(call)                                                             \
do{                                                                                      \
  hipError_t cuErr = call;                                                              \
  if(hipSuccess != cuErr){                                                              \
    printf("CUDA Error - %s:%d: '%s'\n", __FILE__, __LINE__, hipGetErrorString(cuErr)); \
    exit(0);                                                                             \
  }                                                                                      \
}while(0)

/* ----------------------------------------------------------------------------
Matrix multiply kernel
    - Each CUDA thread computes 1 element of the matrix via dot product
          i.e., C[row,col] = SUM(from i=0,N){A[row,i]*B[i,col]}

    - 1D indexing (row-major) through matrix gives
          index = row * n + col

    - Based on 1D indexing, we have
          single_row_index = row * n + i
          single_col_index = i * n + col
---------------------------------------------------------------------------- */
__global__ void mat_mul(const float *A, const float *B, float *C, int n) {

  /* -----------------------------------------------
  These span all cols and rows of the matrices based
  on the values of the configuration parameters
  ----------------------------------------------- */
  int col = threadIdx.x + blockDim.x * blockIdx.x;
  int row = threadIdx.y + blockDim.y * blockIdx.y;

  if((col < n) && (row < n)){

    float element = 0;

    for(int i=0; i<n; i++){
      element += A[row * n + i] * B[i * n + col]; // Dot product of row,column
    }

    C[row * n + col] = element;
  }
}

int main(int argc, char *argv[]){

  float *h_A, *h_B, *h_C;
  float *d_A, *d_B, *d_C;

  // Allocate memory for arrays h_A, h_B, h_C on host
  h_A = new float[N*N];
  h_B = new float[N*N];
  h_C = new float[N*N];

  // Initialize host arrays
  for (int i = 0; i < N*N; i++){
    h_A[i] = A_val;
    h_B[i] = B_val;
    h_C[i] = 0;
  }

  // Allocate memory for arrays d_A, d_B, d_C on device
  cudaErrorCheck( hipMalloc(&d_A, N*N*sizeof(float)) );
  cudaErrorCheck( hipMalloc(&d_B, N*N*sizeof(float)) );
  cudaErrorCheck( hipMalloc(&d_C, N*N*sizeof(float)) );

  // Copy values from host arrays into device arrays
  cudaErrorCheck( hipMemcpy(d_A, h_A, N*N*sizeof(float), hipMemcpyHostToDevice) );
  cudaErrorCheck( hipMemcpy(d_B, h_B, N*N*sizeof(float), hipMemcpyHostToDevice) );

  /* -------------------------------------------------------------
      Set execution configuration parameters
          threads_per_block: number of CUDA threads per grid block
          blocks_in_grid   : number of blocks in grid
          (These are structs with 3 member variables x, y, z)
   ------------------------------------------------------------ */
  dim3 threads_per_block(16,16,1);
  dim3 blocks_in_grid(ceil(float(N)/threads_per_block.x), ceil(float(N)/threads_per_block.y), 1);

  // Launch kernel
  mat_mul<<<blocks_in_grid, threads_per_block>>>(d_A, d_B, d_C, N);

  // Check for errors in the kernel launch (e.g., invalid configuration parameters)
  hipError_t cuErrSync = hipGetLastError();

  // Check for errors on the device after control is returned to host
  hipError_t cuErrAsync = hipDeviceSynchronize();

  if(cuErrSync != hipSuccess){
    printf("CUDA Error - %s:%d: '%s'\n", __FILE__, __LINE__, hipGetErrorString(cuErrSync)); exit(0);
  }

  if(cuErrAsync != hipSuccess){
    printf("CUDA Error - %s:%d: '%s'\n", __FILE__, __LINE__, hipGetErrorString(cuErrAsync)); exit(0);
  }

  // Copy results back to host
  cudaErrorCheck( hipMemcpy(h_C, d_C, N*N*sizeof(float), hipMemcpyDeviceToHost) );

  // Verify results
  for(int i = 0; i < N*N; i++){ 
    if(h_C[i] != A_val*B_val*N){
      printf("mismatch at index %d, was: %f, should be: %f\n", i, h_C[i], A_val*B_val*N);
      return -1;
    }
  }

  cudaErrorCheck( hipFree(d_A) );
  cudaErrorCheck( hipFree(d_B) );
  cudaErrorCheck( hipFree(d_C) );

  delete[] h_A;
  delete[] h_B;
  delete[] h_C;

  printf("Success!\n"); 

  return 0;
}
  

	.text
	.file	"matrix_multiply.hip"
	.globl	_Z22__device_stub__mat_mulPKfS0_Pfi # -- Begin function _Z22__device_stub__mat_mulPKfS0_Pfi
	.type	_Z22__device_stub__mat_mulPKfS0_Pfi,@function
_Z22__device_stub__mat_mulPKfS0_Pfi:    # @_Z22__device_stub__mat_mulPKfS0_Pfi
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z7mat_mulPKfS0_Pfi, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z22__device_stub__mat_mulPKfS0_Pfi, .Lfunc_end0-_Z22__device_stub__mat_mulPKfS0_Pfi
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI1_0:
	.long	0x46000000                      # float 8192
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0
.LCPI1_1:
	.quad	0x40c0000000000000              # double 8192
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$32, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$67108864, %edi                 # imm = 0x4000000
	callq	_Znam
	movq	%rax, %rbx
	movl	$67108864, %edi                 # imm = 0x4000000
	callq	_Znam
	movq	%rax, %r14
	movl	$67108864, %edi                 # imm = 0x4000000
	callq	_Znam
	movq	%rax, %r15
	xorl	%r12d, %r12d
	movl	$67108864, %edx                 # imm = 0x4000000
	movq	%rax, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	movl	$1065353216, (%rbx,%r12,4)      # imm = 0x3F800000
	movl	$1073741824, (%r14,%r12,4)      # imm = 0x40000000
	incq	%r12
	cmpq	$16777216, %r12                 # imm = 0x1000000
	jne	.LBB1_1
# %bb.2:
	leaq	24(%rsp), %rdi
	movl	$67108864, %esi                 # imm = 0x4000000
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_3
# %bb.5:
	leaq	16(%rsp), %rdi
	movl	$67108864, %esi                 # imm = 0x4000000
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_6
# %bb.7:
	leaq	8(%rsp), %rdi
	movl	$67108864, %esi                 # imm = 0x4000000
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_8
# %bb.9:
	movq	24(%rsp), %rdi
	movl	$67108864, %edx                 # imm = 0x4000000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_10
# %bb.11:
	movq	16(%rsp), %rdi
	movl	$67108864, %edx                 # imm = 0x4000000
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_12
# %bb.13:
	movabsq	$1099511628032, %rdi            # imm = 0x10000000100
	movabsq	$68719476752, %rdx              # imm = 0x1000000010
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_15
# %bb.14:
	movq	24(%rsp), %rdi
	movq	16(%rsp), %rsi
	movq	8(%rsp), %rdx
	movl	$4096, %ecx                     # imm = 0x1000
	callq	_Z22__device_stub__mat_mulPKfS0_Pfi
.LBB1_15:
	callq	hipGetLastError
	movl	%eax, %ebp
	callq	hipDeviceSynchronize
	testl	%ebp, %ebp
	jne	.LBB1_16
# %bb.17:
	testl	%eax, %eax
	jne	.LBB1_18
# %bb.19:
	movq	8(%rsp), %rsi
	movl	$67108864, %edx                 # imm = 0x4000000
	movq	%r15, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_31
# %bb.20:                               # %.preheader.preheader
	xorl	%esi, %esi
	movss	.LCPI1_0(%rip), %xmm0           # xmm0 = mem[0],zero,zero,zero
.LBB1_21:                               # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	movss	(%r15,%rsi,4), %xmm1            # xmm1 = mem[0],zero,zero,zero
	ucomiss	%xmm0, %xmm1
	jne	.LBB1_32
	jp	.LBB1_32
# %bb.22:                               #   in Loop: Header=BB1_21 Depth=1
	incq	%rsi
	cmpq	$16777216, %rsi                 # imm = 0x1000000
	jne	.LBB1_21
# %bb.23:
	movq	24(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB1_24
# %bb.25:
	movq	16(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB1_26
# %bb.27:
	movq	8(%rsp), %rdi
	callq	hipFree
	testl	%eax, %eax
	jne	.LBB1_28
# %bb.29:
	movq	%rbx, %rdi
	callq	_ZdaPv
	movq	%r14, %rdi
	callq	_ZdaPv
	movq	%r15, %rdi
	callq	_ZdaPv
	movl	$.Lstr, %edi
	callq	puts@PLT
	xorl	%eax, %eax
	jmp	.LBB1_30
.LBB1_32:
	xorps	%xmm0, %xmm0
	cvtss2sd	%xmm1, %xmm0
	movsd	.LCPI1_1(%rip), %xmm1           # xmm1 = mem[0],zero
	movl	$.L.str.2, %edi
                                        # kill: def $esi killed $esi killed $rsi
	movb	$2, %al
	callq	printf
	movl	$-1, %eax
.LBB1_30:
	addq	$32, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB1_3:
	.cfi_def_cfa_offset 80
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$70, %edx
	jmp	.LBB1_4
.LBB1_6:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$71, %edx
	jmp	.LBB1_4
.LBB1_8:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$72, %edx
	jmp	.LBB1_4
.LBB1_10:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$75, %edx
	jmp	.LBB1_4
.LBB1_12:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$76, %edx
	jmp	.LBB1_4
.LBB1_16:
	movl	%ebp, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$97, %edx
	jmp	.LBB1_4
.LBB1_18:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$101, %edx
	jmp	.LBB1_4
.LBB1_31:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$105, %edx
	jmp	.LBB1_4
.LBB1_24:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$115, %edx
	jmp	.LBB1_4
.LBB1_26:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$116, %edx
	jmp	.LBB1_4
.LBB1_28:
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %edi
	movl	$.L.str.1, %esi
	movl	$117, %edx
.LBB1_4:
	movq	%rax, %rcx
	xorl	%eax, %eax
	callq	printf
	xorl	%edi, %edi
	callq	exit
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z7mat_mulPKfS0_Pfi, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z7mat_mulPKfS0_Pfi,@object     # @_Z7mat_mulPKfS0_Pfi
	.section	.rodata,"a",@progbits
	.globl	_Z7mat_mulPKfS0_Pfi
	.p2align	3, 0x0
_Z7mat_mulPKfS0_Pfi:
	.quad	_Z22__device_stub__mat_mulPKfS0_Pfi
	.size	_Z7mat_mulPKfS0_Pfi, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"CUDA Error - %s:%d: '%s'\n"
	.size	.L.str, 26

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/tom-papatheodore/cuda_examples/master/matrix_multiply/naive/matrix_multiply.hip"
	.size	.L.str.1, 142

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"mismatch at index %d, was: %f, should be: %f\n"
	.size	.L.str.2, 46

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z7mat_mulPKfS0_Pfi"
	.size	.L__unnamed_1, 20

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Success!"
	.size	.Lstr, 9

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z22__device_stub__mat_mulPKfS0_Pfi
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z7mat_mulPKfS0_Pfi
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z7mat_mulPKfS0_Pfi     ; -- Begin function _Z7mat_mulPKfS0_Pfi
	.globl	_Z7mat_mulPKfS0_Pfi
	.p2align	8
	.type	_Z7mat_mulPKfS0_Pfi,@function
_Z7mat_mulPKfS0_Pfi:                    ; @_Z7mat_mulPKfS0_Pfi
; %bb.0:
	s_clause 0x1
	s_load_b32 s3, s[0:1], 0x2c
	s_load_b32 s2, s[0:1], 0x18
	v_and_b32_e32 v2, 0x3ff, v0
	v_bfe_u32 v3, v0, 10, 10
	s_waitcnt lgkmcnt(0)
	s_lshr_b32 s4, s3, 16
	s_and_b32 s3, s3, 0xffff
	s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
	v_mad_u64_u32 v[0:1], null, s14, s3, v[2:3]
	v_mad_u64_u32 v[1:2], null, s15, s4, v[3:4]
	s_mov_b32 s3, exec_lo
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_max_i32_e32 v2, v0, v1
	v_cmpx_gt_i32_e64 s2, v2
	s_cbranch_execz .LBB0_6
; %bb.1:                                ; %.preheader
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[0:1], s[0:1], 0x10
	v_mul_lo_u32 v1, v1, s2
	s_cmp_lt_i32 s2, 1
	s_cbranch_scc1 .LBB0_4
; %bb.2:                                ; %.lr.ph.preheader
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_3)
	v_ashrrev_i32_e32 v2, 31, v1
	v_mov_b32_e32 v6, 0
	v_mov_b32_e32 v4, v0
	s_mov_b32 s3, s2
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_u32 v2, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
.LBB0_3:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v5, 31, v4
	s_add_i32 s3, s3, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_eq_u32 s3, 0
	v_lshlrev_b64 v[7:8], 2, v[4:5]
	v_add_nc_u32_e32 v4, s2, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v7, vcc_lo, s6, v7
	v_add_co_ci_u32_e32 v8, vcc_lo, s7, v8, vcc_lo
	global_load_b32 v5, v[2:3], off
	global_load_b32 v7, v[7:8], off
	v_add_co_u32 v2, vcc_lo, v2, 4
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_waitcnt vmcnt(0)
	v_fmac_f32_e32 v6, v5, v7
	s_cbranch_scc0 .LBB0_3
	s_branch .LBB0_5
.LBB0_4:
	v_mov_b32_e32 v6, 0
.LBB0_5:                                ; %Flow46
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v0, v1, v0
	v_ashrrev_i32_e32 v1, 31, v0
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s0, v0
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo
	global_store_b32 v[0:1], v6, off
.LBB0_6:
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z7mat_mulPKfS0_Pfi
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 14
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 1
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 1
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z7mat_mulPKfS0_Pfi, .Lfunc_end0-_Z7mat_mulPKfS0_Pfi
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 336
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 14
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z7mat_mulPKfS0_Pfi
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z7mat_mulPKfS0_Pfi.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
