
#include <stdio.h>
#include <stdlib.h>
// For the CUDA runtime routines (prefixed with "cuda_")
#include <cuda_runtime.h>
#include <sys/time.h>
#include <cooperative_groups.h>


__global__ void
ac(float *A, const int *B, const int *C, const int *op_sel, int n_inputs, const int n_arith, int thresh, int iter) {
  int i= blockDim.x * blockIdx.x + threadIdx.x;
  
  int idx_off= i*n_inputs;
  
  float val_146, val_147, val_148, val_149, val_150, val_151, val_152, val_153, val_154, val_155, val_156, val_157, val_158, val_159, val_160, val_161, val_162, val_163, val_164, val_165, val_166, val_167, val_168, val_169, val_170, val_171, val_172, val_173, val_174, val_175, val_176, val_177, val_178, val_179, val_180, val_181, val_182, val_183, val_184, val_185, val_186, val_187, val_188, val_189, val_190, val_191, val_192, val_193, val_194, val_195, val_196, val_197, val_198, val_199, val_200, val_201, val_202, val_203, val_204, val_205, val_206, val_207, val_208, val_209, val_210, val_211, val_212, val_213, val_214, val_215, val_216, val_217, val_218, val_219, val_220, val_221, val_222, val_223, val_224, val_225, val_226, val_227, val_228, val_229, val_230, val_231, val_232, val_233, val_234, val_235, val_236, val_237, val_238, val_239, val_240, val_241, val_242, val_243, val_244, val_245, val_246, val_247, val_248, val_249, val_250, val_251, val_252, val_253, val_254, val_255, val_256, val_257, val_258, val_259, val_260, val_261, val_262, val_263, val_264, val_265, val_266, val_267, val_268, val_269, val_270, val_271, val_272, val_273, val_274, val_275, val_276, val_277, val_278, val_279, val_280, val_281, val_282, val_283, val_284, val_285, val_286, val_287, val_288, val_289, val_290, val_291, val_292, val_293, val_294, val_295, val_296, val_297, val_298, val_299, val_300, val_301, val_302, val_303, val_304, val_305, val_306, val_307, val_308, val_309, val_310, val_311, val_312, val_313, val_314, val_315, val_316, val_317, val_318, val_319, val_320, val_321, val_322, val_323, val_324, val_325, val_326, val_327, val_328, val_329, val_330, val_331, val_332, val_333, val_334, val_335, val_336, val_337, val_338, val_339, val_340, val_341, val_342, val_343, val_344, val_345, val_346, val_347, val_348, val_349, val_350, val_351, val_352, val_353, val_354, val_355, val_356, val_357, val_358, val_359, val_360, val_361, val_362, val_363, val_364, val_365, val_366, val_367, val_368, val_369, val_370, val_371, val_372, val_373, val_374, val_375, val_376, val_377, val_378, val_379, val_380, val_381, val_382, val_383, val_384, val_385, val_386, val_387, val_388, val_389, val_390, val_391, val_392, val_393, val_394, val_395, val_396, val_397, val_398, val_399, val_400, val_401, val_402, val_403, val_404, val_405, val_406, val_407, val_408, val_409, val_410, val_411, val_412, val_413, val_414, val_415, val_416, val_417, val_418, val_419, val_420, val_421, val_422, val_423, val_424, val_425, val_426, val_427, val_428, val_429, val_430, val_431, val_432, val_433, val_434, val_435, val_436, val_437, val_438, val_439, val_440, val_441, val_442, val_443, val_444, val_445, val_446, val_447, val_448, val_449, val_450, val_451, val_452, val_453, val_454, val_455, val_456, val_457, val_458, val_459, val_460, val_461, val_462, val_463, val_464, val_465, val_466, val_467, val_468, val_469, val_470, val_471, val_472, val_473, val_474, val_475, val_476, val_477, val_478, val_479, val_480, val_481, val_482, val_483, val_484, val_485, val_486, val_487, val_488, val_489, val_490, val_491, val_492, val_493, val_494, val_495, val_496, val_497, val_498, val_499, val_500, val_501, val_502, val_503, val_504, val_505, val_506, val_507, val_508, val_509, val_510, val_511, val_512, val_513, val_514, val_515, val_516, val_517, val_518, val_519, val_520, val_521, val_522, val_523, val_524, val_525, val_526, val_527, val_528, val_529, val_530, val_531, val_532, val_533, val_534, val_535, val_536, val_537, val_538, val_539, val_540, val_541, val_542, val_543, val_544, val_545, val_546, val_547, val_548, val_549, val_550, val_551, val_552, val_553, val_554, val_555, val_556, val_557, val_558, val_559, val_560, val_561, val_562, val_563, val_564, val_565, val_566, val_567, val_568, val_569, val_570, val_571, val_572, val_573, val_574, val_575, val_576, val_577, val_578, val_579, val_580, val_581, val_582, val_583, val_584, val_585, val_586, val_587, val_588, val_589, val_590, val_591, val_592, val_593, val_594, val_595, val_596, val_597, val_598, val_599, val_600, val_601, val_602, val_603, val_604, val_605, val_606, val_607, val_608, val_609, val_610, val_611, val_612, val_613, val_614, val_615, val_616, val_617, val_618, val_619, val_620, val_621, val_622, val_623, val_624, val_625, val_626, val_627, val_628, val_629, val_630, val_631, val_632, val_633, val_634, val_635, val_636, val_637, val_638, val_639, val_640, val_641, val_642, val_643, val_644, val_645, val_646, val_647, val_648, val_649, val_650, val_651, val_652, val_653, val_654, val_655, val_656, val_657, val_658, val_659, val_660, val_661, val_662, val_663, val_664, val_665, val_666, val_667, val_668, val_669, val_670, val_671, val_672, val_673, val_674, val_675, val_676, val_677, val_678, val_679, val_680, val_681, val_682, val_683, val_684, val_685, val_686, val_687, val_688, val_689, val_690, val_691, val_692, val_693, val_694, val_695, val_696, val_697, val_698, val_699, val_700, val_701, val_702, val_703, val_704, val_705, val_706, val_707, val_708, val_709, val_710, val_711, val_712, val_713, val_714, val_715, val_716, val_717, val_718, val_719, val_720, val_721, val_722, val_723, val_724, val_725, val_726, val_727, val_728, val_729, val_730, val_731, val_732, val_733, val_734, val_735, val_736, val_737, val_738, val_739, val_740, val_741, val_742, val_743, val_744, val_745, val_746, val_747, val_748, val_749, val_750, val_751, val_752, val_753, val_754, val_755, val_756, val_757, val_758, val_759, val_760, val_761, val_762, val_763, val_764, val_765, val_766, val_767, val_768, val_769, val_770, val_771, val_772, val_773, val_774, val_775, val_776, val_777, val_778, val_779, val_780, val_781, val_782, val_783, val_784, val_785, val_786, val_787, val_788, val_789, val_790, val_791, val_792, val_793, val_794, val_795, val_796, val_797, val_798, val_799, val_800, val_801, val_802, val_803, val_804, val_805, val_806, val_807, val_808, val_809, val_810, val_811, val_812, val_813, val_814, val_815, val_816, val_817, val_818, val_819, val_820, val_821, val_822, val_823, val_824, val_825, val_826, val_827, val_828, val_829, val_830, val_831, val_832, val_833, val_834, val_835, val_836, val_837, val_838, val_839, val_840, val_841, val_842, val_843, val_844, val_845, val_846, val_847, val_848, val_849, val_850, val_851, val_852, val_853, val_854, val_855, val_856, val_857, val_858, val_859, val_860, val_861, val_862, val_863, val_864, val_865, val_866, val_867, val_868, val_869, val_870, val_871, val_872, val_873, val_874, val_875, val_876, val_877, val_878, val_879, val_880, val_881, val_882, val_883, val_884, val_885, val_886, val_887, val_888, val_889, val_890, val_891, val_892, val_893, val_894, val_895, val_896, val_897, val_898, val_899, val_900, val_901, val_902, val_903, val_904, val_905, val_906, val_907, val_908, val_909, val_910, val_911, val_912, val_913, val_914, val_915, val_916, val_917, val_918, val_919, val_920, val_921, val_922, val_923, val_924, val_925, val_926, val_927, val_928, val_929, val_930, val_931, val_932, val_933, val_934, val_935, val_936, val_937, val_938, val_939, val_940, val_941, val_942, val_943, val_944, val_945, val_946, val_947, val_948, val_949, val_950, val_951, val_952, val_953, val_954, val_955, val_956, val_957, val_958, val_959, val_960, val_961, val_962, val_963, val_964, val_965, val_966, val_967, val_968, val_969, val_970, val_971, val_972, val_973, val_974, val_975, val_976, val_977, val_978, val_979, val_980, val_981, val_982, val_983, val_984, val_985, val_986, val_987, val_988, val_989, val_990, val_991, val_992, val_993, val_994, val_995, val_996, val_997, val_998, val_999, val_1000, val_1001, val_1002, val_1003, val_1004, val_1005, val_1006, val_1007, val_1008, val_1009, val_1010, val_1011, val_1012, val_1013, val_1014, val_1015, val_1016, val_1017, val_1018, val_1019, val_1020, val_1021, val_1022, val_1023, val_1024, val_1025, val_1026, val_1027, val_1028, val_1029, val_1030, val_1031, val_1032, val_1033, val_1034, val_1035, val_1036, val_1037, val_1038, val_1039, val_1040, val_1041, val_1042, val_1043, val_1044, val_1045, val_1046, val_1047, val_1048, val_1049, val_1050, val_1051, val_1052, val_1053, val_1054, val_1055, val_1056, val_1057, val_1058, val_1059, val_1060, val_1061, val_1062, val_1063, val_1064, val_1065, val_1066, val_1067, val_1068, val_1069, val_1070, val_1071, val_1072, val_1073, val_1074, val_1075, val_1076, val_1077, val_1078, val_1079, val_1080, val_1081, val_1082, val_1083, val_1084, val_1085, val_1086, val_1087, val_1088, val_1089, val_1090, val_1091, val_1092, val_1093, val_1094, val_1095, val_1096, val_1097, val_1098, val_1099, val_1100, val_1101, val_1102, val_1103, val_1104, val_1105, val_1106, val_1107, val_1108, val_1109, val_1110, val_1111, val_1112, val_1113, val_1114, val_1115, val_1116, val_1117, val_1118, val_1119, val_1120, val_1121, val_1122, val_1123, val_1124, val_1125, val_1126, val_1127, val_1128, val_1129, val_1130, val_1131, val_1132, val_1133, val_1134, val_1135, val_1136, val_1137, val_1138, val_1139, val_1140, val_1141, val_1142, val_1143, val_1144, val_1145, val_1146, val_1147, val_1148, val_1149, val_1150, val_1151, val_1152, val_1153, val_1154, val_1155, val_1156, val_1157, val_1158, val_1159, val_1160, val_1161, val_1162, val_1163, val_1164, val_1165, val_1166, val_1167, val_1168, val_1169, val_1170, val_1171, val_1172, val_1173, val_1174, val_1175, val_1176, val_1177, val_1178, val_1179, val_1180, val_1181, val_1182, val_1183, val_1184, val_1185, val_1186, val_1187, val_1188, val_1189, val_1190, val_1191, val_1192, val_1193, val_1194, val_1195, val_1196, val_1197, val_1198, val_1199, val_1200, val_1201, val_1202, val_1203, val_1204, val_1205, val_1206, val_1207, val_1208, val_1209, val_1210, val_1211, val_1212, val_1213, val_1214, val_1215, val_1216, val_1217, val_1218, val_1219, val_1220, val_1221, val_1222, val_1223, val_1224, val_1225, val_1226, val_1227, val_1228, val_1229, val_1230, val_1231, val_1232, val_1233, val_1234, val_1235, val_1236, val_1237, val_1238, val_1239, val_1240, val_1241, val_1242, val_1243, val_1244, val_1245, val_1246, val_1247, val_1248, val_1249, val_1250, val_1251, val_1252, val_1253, val_1254, val_1255, val_1256, val_1257, val_1258, val_1259, val_1260, val_1261, val_1262, val_1263, val_1264, val_1265, val_1266, val_1267, val_1268, val_1269, val_1270, val_1271, val_1272, val_1273, val_1274, val_1275, val_1276, val_1277, val_1278, val_1279, val_1280, val_1281, val_1282, val_1283, val_1284, val_1285, val_1286, val_1287, val_1288, val_1289, val_1290, val_1291, val_1292, val_1293, val_1294, val_1295, val_1296, val_1297, val_1298, val_1299, val_1300, val_1301, val_1302, val_1303, val_1304, val_1305, val_1306, val_1307, val_1308, val_1309, val_1310, val_1311, val_1312, val_1313, val_1314, val_1315, val_1316, val_1317, val_1318, val_1319, val_1320, val_1321, val_1322, val_1323, val_1324, val_1325, val_1326, val_1327, val_1328, val_1329, val_1330, val_1331, val_1332, val_1333, val_1334, val_1335, val_1336, val_1337, val_1338, val_1339, val_1340, val_1341, val_1342, val_1343, val_1344, val_1345, val_1346, val_1347, val_1348, val_1349, val_1350, val_1351, val_1352, val_1353, val_1354, val_1355, val_1356, val_1357, val_1358, val_1359, val_1360, val_1361, val_1362, val_1363, val_1364, val_1365, val_1366, val_1367, val_1368, val_1369, val_1370, val_1371, val_1372, val_1373, val_1374, val_1375, val_1376, val_1377, val_1378, val_1379, val_1380, val_1381, val_1382, val_1383, val_1384, val_1385, val_1386, val_1387, val_1388, val_1389, val_1390, val_1391, val_1392, val_1393, val_1394, val_1395, val_1396, val_1397, val_1398, val_1399, val_1400, val_1401, val_1402, val_1403, val_1404, val_1405, val_1406, val_1407, val_1408, val_1409, val_1410, val_1411, val_1412, val_1413, val_1414, val_1415, val_1416, val_1417, val_1418, val_1419, val_1420, val_1421, val_1422, val_1423, val_1424, val_1425, val_1426, val_1427, val_1428, val_1429, val_1430, val_1431, val_1432, val_1433, val_1434, val_1435, val_1436, val_1437, val_1438, val_1439, val_1440, val_1441, val_1442, val_1443, val_1444, val_1445, val_1446, val_1447, val_1448, val_1449, val_1450, val_1451, val_1452, val_1453, val_1454, val_1455, val_1456, val_1457, val_1458, val_1459, val_1460, val_1461, val_1462, val_1463, val_1464, val_1465, val_1466, val_1467, val_1468, val_1469, val_1470, val_1471, val_1472, val_1473, val_1474, val_1475, val_1476, val_1477, val_1478, val_1479, val_1480, val_1481, val_1482, val_1483, val_1484, val_1485, val_1486, val_1487, val_1488, val_1489, val_1490, val_1491, val_1492, val_1493, val_1494, val_1495, val_1496, val_1497, val_1498, val_1499, val_1500, val_1501, val_1502, val_1503, val_1504, val_1505, val_1506, val_1507, val_1508, val_1509, val_1510, val_1511, val_1512, val_1513, val_1514, val_1515, val_1516, val_1517, val_1518, val_1519, val_1520, val_1521, val_1522, val_1523, val_1524, val_1525, val_1526, val_1527, val_1528, val_1529, val_1530, val_1531, val_1532, val_1533, val_1534, val_1535, val_1536, val_1537, val_1538, val_1539, val_1540, val_1541, val_1542, val_1543, val_1544, val_1545, val_1546, val_1547, val_1548, val_1549, val_1550, val_1551, val_1552, val_1553, val_1554, val_1555, val_1556, val_1557, val_1558, val_1559, val_1560, val_1561, val_1562, val_1563, val_1564, val_1565, val_1566, val_1567, val_1568, val_1569;
  
  for (int k=0; k<iter; k++) {
    idx_off = i*(n_inputs * iter) + n_inputs*k; 
 val_146 =  A[idx_off + 3] *  A[idx_off + 69];
 val_147 =  A[idx_off + 0] *  A[idx_off + 69];
 val_148 =  A[idx_off + 2] *  A[idx_off + 70];
 val_149 =  A[idx_off + 1] *  A[idx_off + 70];
 val_150 =  val_146 +  val_148;
 val_151 =  val_147 +  val_149;
 val_152 =  A[idx_off + 0] *  A[idx_off + 104];
 val_153 =  A[idx_off + 4] *  A[idx_off + 104];
 val_154 =  A[idx_off + 16] *  A[idx_off + 105];
 val_155 =  A[idx_off + 3] *  A[idx_off + 105];
 val_156 =  A[idx_off + 7] *  A[idx_off + 106];
 val_157 =  A[idx_off + 4] *  A[idx_off + 106];
 val_158 =  val_152 +  val_154;
 val_159 =  val_153 +  val_155;
 val_160 =  val_156 +  val_158;
 val_161 =  val_157 +  val_159;
 val_162 =  A[idx_off + 0] *  A[idx_off + 41];
 val_163 =  A[idx_off + 1] *  A[idx_off + 42];
 val_164 =  A[idx_off + 12] *  val_162;
 val_165 =  A[idx_off + 0] *  val_162;
 val_166 =  A[idx_off + 13] *  val_163;
 val_167 =  A[idx_off + 14] *  val_163;
 val_168 =  val_164 +  val_166;
 val_169 =  val_165 +  val_167;
 val_170 =  val_165 +  val_166;
 val_171 =  A[idx_off + 5] *  A[idx_off + 54];
 val_172 =  A[idx_off + 8] *  A[idx_off + 54];
 val_173 =  A[idx_off + 0] *  A[idx_off + 54];
 val_174 =  A[idx_off + 8] *  A[idx_off + 55];
 val_175 =  A[idx_off + 5] *  A[idx_off + 55];
 val_176 =  A[idx_off + 17] *  A[idx_off + 55];
 val_177 =  A[idx_off + 0] *  A[idx_off + 56];
 val_178 =  A[idx_off + 18] *  A[idx_off + 56];
 val_179 =  val_171 +  val_174;
 val_180 =  val_172 +  val_175;
 val_181 =  val_173 +  val_176;
 val_182 =  val_177 +  val_179;
 val_183 =  val_177 +  val_180;
 val_184 =  val_178 +  val_181;
 val_185 =  A[idx_off + 5] *  A[idx_off + 107];
 val_186 =  A[idx_off + 8] *  A[idx_off + 108];
 val_187 =  A[idx_off + 0] *  A[idx_off + 109];
 val_188 =  A[idx_off + 8] *  A[idx_off + 107];
 val_189 =  A[idx_off + 5] *  A[idx_off + 108];
 val_190 =  A[idx_off + 0] *  A[idx_off + 107];
 val_191 =  A[idx_off + 5] *  A[idx_off + 109];
 val_192 =  val_185 +  val_186;
 val_193 =  val_187 +  val_192;
 val_194 =  val_188 +  val_189;
 val_195 =  val_187 +  val_194;
 val_196 =  val_186 +  val_190;
 val_197 =  val_191 +  val_196;
 val_198 =  A[idx_off + 92] *  val_182;
 val_199 =  A[idx_off + 93] *  val_183;
 val_200 =  A[idx_off + 94] *  val_184;
 val_201 =  val_193 *  val_198;
 val_202 =  val_195 *  val_199;
 val_203 =  val_197 *  val_200;
 val_204 =  A[idx_off + 5] *  val_201;
 val_205 =  A[idx_off + 0] *  val_201;
 val_206 =  A[idx_off + 8] *  val_202;
 val_207 =  A[idx_off + 15] *  val_202;
 val_208 =  A[idx_off + 0] *  val_203;
 val_209 =  A[idx_off + 3] *  val_203;
 val_210 =  A[idx_off + 12] *  val_201;
 val_211 =  A[idx_off + 4] *  val_201;
 val_212 =  A[idx_off + 0] *  val_202;
 val_213 =  A[idx_off + 3] *  val_202;
 val_214 =  A[idx_off + 4] *  val_203;
 val_215 =  val_204 +  val_206;
 val_216 =  val_205 +  val_207;
 val_217 =  val_208 +  val_215;
 val_218 =  val_209 +  val_216;
 val_219 =  val_210 +  val_212;
 val_220 =  val_211 +  val_213;
 val_221 =  val_208 +  val_219;
 val_222 =  val_214 +  val_220;
 val_223 =  A[idx_off + 4] *  A[idx_off + 95];
 val_224 =  A[idx_off + 5] *  A[idx_off + 96];
 val_225 =  val_150 *  val_223;
 val_226 =  val_151 *  val_224;
 val_227 =  val_217 *  val_225;
 val_228 =  val_218 *  val_226;
 val_229 =  val_221 *  val_225;
 val_230 =  val_222 *  val_226;
 val_231 =  A[idx_off + 12] *  val_227;
 val_232 =  A[idx_off + 0] *  val_227;
 val_233 =  A[idx_off + 20] *  val_228;
 val_234 =  A[idx_off + 21] *  val_228;
 val_235 =  A[idx_off + 0] *  val_228;
 val_236 =  A[idx_off + 5] *  val_229;
 val_237 =  A[idx_off + 8] *  val_229;
 val_238 =  A[idx_off + 0] *  val_229;
 val_239 =  A[idx_off + 4] *  val_230;
 val_240 =  A[idx_off + 3] *  val_230;
 val_241 =  val_231 +  val_233;
 val_242 =  val_232 +  val_234;
 val_243 =  val_232 +  val_235;
 val_244 =  val_236 +  val_239;
 val_245 =  val_237 +  val_240;
 val_246 =  val_238 +  val_239;
 val_247 =  A[idx_off + 6] *  A[idx_off + 83];
 val_248 =  A[idx_off + 7] *  A[idx_off + 84];
 val_249 =  val_241 *  val_247;
 val_250 =  val_242 *  val_247;
 val_251 =  val_243 *  val_247;
 val_252 =  val_244 *  val_248;
 val_253 =  val_245 *  val_248;
 val_254 =  val_246 *  val_248;
 val_255 =  val_249 +  val_252;
 val_256 =  val_250 +  val_253;
 val_257 =  val_251 +  val_254;
 val_258 =  A[idx_off + 0] *  A[idx_off + 114];
 val_259 =  A[idx_off + 1] *  A[idx_off + 115];
 val_260 =  val_160 *  val_258;
 val_261 =  val_161 *  val_259;
 val_262 =  A[idx_off + 2] *  val_260;
 val_263 =  A[idx_off + 3] *  val_260;
 val_264 =  A[idx_off + 5] *  val_261;
 val_265 =  A[idx_off + 4] *  val_261;
 val_266 =  A[idx_off + 0] *  val_260;
 val_267 =  A[idx_off + 1] *  val_260;
 val_268 =  val_262 +  val_264;
 val_269 =  val_263 +  val_265;
 val_270 =  val_265 +  val_266;
 val_271 =  val_264 +  val_267;
 val_272 =  A[idx_off + 4] *  A[idx_off + 101];
 val_273 =  A[idx_off + 3] *  A[idx_off + 102];
 val_274 =  A[idx_off + 4] *  A[idx_off + 103];
 val_275 =  A[idx_off + 4] *  val_272;
 val_276 =  A[idx_off + 19] *  val_272;
 val_277 =  A[idx_off + 0] *  val_272;
 val_278 =  A[idx_off + 4] *  val_273;
 val_279 =  A[idx_off + 0] *  val_273;
 val_280 =  A[idx_off + 19] *  val_273;
 val_281 =  A[idx_off + 4] *  val_274;
 val_282 =  A[idx_off + 0] *  val_274;
 val_283 =  A[idx_off + 19] *  val_274;
 val_284 =  val_275 +  val_278;
 val_285 =  val_276 +  val_279;
 val_286 =  val_277 +  val_280;
 val_287 =  val_277 +  val_279;
 val_288 =  val_281 +  val_284;
 val_289 =  val_282 +  val_285;
 val_290 =  val_282 +  val_286;
 val_291 =  val_283 +  val_287;
 val_292 =  A[idx_off + 22] *  A[idx_off + 80];
 val_293 =  A[idx_off + 22] *  A[idx_off + 81];
 val_294 =  A[idx_off + 22] *  A[idx_off + 82];
 val_295 =  A[idx_off + 0] *  A[idx_off + 80];
 val_296 =  A[idx_off + 12] *  A[idx_off + 81];
 val_297 =  A[idx_off + 0] *  A[idx_off + 82];
 val_298 =  A[idx_off + 12] *  A[idx_off + 80];
 val_299 =  A[idx_off + 0] *  A[idx_off + 81];
 val_300 =  A[idx_off + 12] *  A[idx_off + 82];
 val_301 =  val_292 +  val_293;
 val_302 =  val_294 +  val_301;
 val_303 =  val_295 +  val_296;
 val_304 =  val_297 +  val_303;
 val_305 =  val_298 +  val_299;
 val_306 =  val_297 +  val_305;
 val_307 =  val_295 +  val_299;
 val_308 =  val_300 +  val_307;
 val_309 =  A[idx_off + 4] *  A[idx_off + 61];
 val_310 =  A[idx_off + 5] *  A[idx_off + 62];
 val_311 =  A[idx_off + 12] *  val_309;
 val_312 =  A[idx_off + 0] *  val_309;
 val_313 =  A[idx_off + 13] *  val_309;
 val_314 =  A[idx_off + 14] *  val_309;
 val_315 =  A[idx_off + 14] *  val_310;
 val_316 =  A[idx_off + 23] *  val_310;
 val_317 =  A[idx_off + 0] *  val_310;
 val_318 =  A[idx_off + 12] *  val_310;
 val_319 =  val_311 +  val_315;
 val_320 =  val_312 +  val_316;
 val_321 =  val_312 +  val_317;
 val_322 =  val_313 +  val_318;
 val_323 =  val_314 +  val_317;
 val_324 =  val_313 +  val_317;
 val_325 =  val_311 +  val_317;
 val_326 =  val_312 +  val_318;
 val_327 =  A[idx_off + 74] *  val_319;
 val_328 =  A[idx_off + 75] *  val_320;
 val_329 =  A[idx_off + 76] *  val_321;
 val_330 =  A[idx_off + 74] *  val_322;
 val_331 =  A[idx_off + 75] *  val_323;
 val_332 =  A[idx_off + 76] *  val_324;
 val_333 =  A[idx_off + 74] *  val_321;
 val_334 =  A[idx_off + 75] *  val_325;
 val_335 =  A[idx_off + 76] *  val_326;
 val_336 =  val_327 +  val_328;
 val_337 =  val_329 +  val_336;
 val_338 =  val_330 +  val_331;
 val_339 =  val_332 +  val_338;
 val_340 =  val_333 +  val_334;
 val_341 =  val_335 +  val_340;
 val_342 =  A[idx_off + 22] *  A[idx_off + 77];
 val_343 =  A[idx_off + 22] *  A[idx_off + 78];
 val_344 =  A[idx_off + 22] *  A[idx_off + 79];
 val_345 =  A[idx_off + 0] *  A[idx_off + 77];
 val_346 =  A[idx_off + 12] *  A[idx_off + 78];
 val_347 =  A[idx_off + 0] *  A[idx_off + 79];
 val_348 =  A[idx_off + 12] *  A[idx_off + 77];
 val_349 =  A[idx_off + 0] *  A[idx_off + 78];
 val_350 =  A[idx_off + 12] *  A[idx_off + 79];
 val_351 =  val_342 +  val_343;
 val_352 =  val_344 +  val_351;
 val_353 =  val_345 +  val_346;
 val_354 =  val_347 +  val_353;
 val_355 =  val_348 +  val_349;
 val_356 =  val_347 +  val_355;
 val_357 =  val_345 +  val_349;
 val_358 =  val_350 +  val_357;
 val_359 =  A[idx_off + 2] *  A[idx_off + 59];
 val_360 =  A[idx_off + 3] *  A[idx_off + 60];
 val_361 =  val_302 *  val_359;
 val_362 =  val_304 *  val_359;
 val_363 =  val_302 *  val_360;
 val_364 =  val_306 *  val_360;
 val_365 =  val_308 *  val_360;
 val_366 =  val_352 *  val_361;
 val_367 =  val_354 *  val_362;
 val_368 =  val_352 *  val_363;
 val_369 =  val_356 *  val_364;
 val_370 =  val_358 *  val_365;
 val_371 =  val_366 +  val_368;
 val_372 =  val_366 +  val_369;
 val_373 =  val_367 +  val_370;
 val_374 =  A[idx_off + 4] *  A[idx_off + 67];
 val_375 =  A[idx_off + 5] *  A[idx_off + 68];
 val_376 =  A[idx_off + 5] *  val_374;
 val_377 =  A[idx_off + 0] *  val_374;
 val_378 =  A[idx_off + 8] *  val_374;
 val_379 =  A[idx_off + 1] *  val_375;
 val_380 =  A[idx_off + 5] *  val_375;
 val_381 =  A[idx_off + 0] *  val_375;
 val_382 =  A[idx_off + 8] *  val_375;
 val_383 =  A[idx_off + 12] *  val_375;
 val_384 =  val_374 +  val_379;
 val_385 =  val_376 +  val_380;
 val_386 =  val_374 +  val_380;
 val_387 =  val_377 +  val_381;
 val_388 =  val_378 +  val_382;
 val_389 =  val_376 +  val_381;
 val_390 =  val_378 +  val_383;
 val_391 =  A[idx_off + 124] *  val_255;
 val_392 =  A[idx_off + 125] *  val_256;
 val_393 =  A[idx_off + 126] *  val_257;
 val_394 =  A[idx_off + 12] *  val_391;
 val_395 =  A[idx_off + 5] *  val_392;
 val_396 =  A[idx_off + 13] *  val_393;
 val_397 =  A[idx_off + 5] *  val_391;
 val_398 =  A[idx_off + 8] *  val_392;
 val_399 =  A[idx_off + 0] *  val_393;
 val_400 =  A[idx_off + 7] *  val_391;
 val_401 =  A[idx_off + 0] *  val_392;
 val_402 =  A[idx_off + 0] *  val_391;
 val_403 =  A[idx_off + 24] *  val_393;
 val_404 =  A[idx_off + 8] *  val_391;
 val_405 =  A[idx_off + 16] *  val_391;
 val_406 =  A[idx_off + 12] *  val_393;
 val_407 =  val_394 +  val_395;
 val_408 =  val_396 +  val_407;
 val_409 =  val_397 +  val_398;
 val_410 =  val_399 +  val_409;
 val_411 =  val_400 +  val_401;
 val_412 =  val_399 +  val_411;
 val_413 =  val_398 +  val_402;
 val_414 =  val_403 +  val_413;
 val_415 =  val_395 +  val_404;
 val_416 =  val_396 +  val_415;
 val_417 =  val_398 +  val_405;
 val_418 =  val_399 +  val_417;
 val_419 =  val_401 +  val_402;
 val_420 =  val_399 +  val_419;
 val_421 =  val_403 +  val_419;
 val_422 =  val_395 +  val_402;
 val_423 =  val_406 +  val_422;
 val_424 =  A[idx_off + 12] *  A[idx_off + 46];
 val_425 =  A[idx_off + 13] *  A[idx_off + 46];
 val_426 =  A[idx_off + 2] *  A[idx_off + 46];
 val_427 =  A[idx_off + 4] *  A[idx_off + 46];
 val_428 =  A[idx_off + 3] *  A[idx_off + 46];
 val_429 =  A[idx_off + 0] *  A[idx_off + 46];
 val_430 =  A[idx_off + 0] *  A[idx_off + 47];
 val_431 =  A[idx_off + 25] *  A[idx_off + 47];
 val_432 =  A[idx_off + 26] *  A[idx_off + 47];
 val_433 =  A[idx_off + 14] *  A[idx_off + 47];
 val_434 =  A[idx_off + 15] *  A[idx_off + 47];
 val_435 =  A[idx_off + 6] *  A[idx_off + 47];
 val_436 =  A[idx_off + 0] *  A[idx_off + 48];
 val_437 =  A[idx_off + 2] *  A[idx_off + 48];
 val_438 =  A[idx_off + 4] *  A[idx_off + 48];
 val_439 =  A[idx_off + 27] *  A[idx_off + 48];
 val_440 =  A[idx_off + 28] *  A[idx_off + 48];
 val_441 =  A[idx_off + 3] *  A[idx_off + 48];
 val_442 =  val_424 +  val_430;
 val_443 =  val_425 +  val_431;
 val_444 =  val_426 +  val_432;
 val_445 =  val_427 +  val_433;
 val_446 =  val_428 +  val_434;
 val_447 =  val_427 +  val_435;
 val_448 =  val_429 +  val_434;
 val_449 =  val_436 +  val_442;
 val_450 =  val_437 +  val_443;
 val_451 =  val_438 +  val_444;
 val_452 =  val_439 +  val_445;
 val_453 =  val_436 +  val_446;
 val_454 =  val_440 +  val_447;
 val_455 =  val_441 +  val_448;
 val_456 =  A[idx_off + 138] *  val_288;
 val_457 =  A[idx_off + 139] *  val_289;
 val_458 =  A[idx_off + 140] *  val_290;
 val_459 =  A[idx_off + 141] *  val_291;
 val_460 =  A[idx_off + 29] *  val_456;
 val_461 =  A[idx_off + 0] *  val_456;
 val_462 =  A[idx_off + 29] *  val_457;
 val_463 =  A[idx_off + 0] *  val_457;
 val_464 =  A[idx_off + 29] *  val_458;
 val_465 =  A[idx_off + 0] *  val_458;
 val_466 =  A[idx_off + 0] *  val_459;
 val_467 =  A[idx_off + 29] *  val_459;
 val_468 =  val_460 +  val_462;
 val_469 =  val_461 +  val_463;
 val_470 =  val_464 +  val_468;
 val_471 =  val_465 +  val_469;
 val_472 =  val_466 +  val_470;
 val_473 =  val_466 +  val_471;
 val_474 =  val_467 +  val_471;
 val_475 =  val_465 +  val_468;
 val_476 =  val_464 +  val_469;
 val_477 =  val_466 +  val_475;
 val_478 =  val_466 +  val_476;
 val_479 =  A[idx_off + 2] *  A[idx_off + 57];
 val_480 =  A[idx_off + 3] *  A[idx_off + 58];
 val_481 =  val_472 *  val_479;
 val_482 =  val_473 *  val_479;
 val_483 =  val_474 *  val_479;
 val_484 =  val_477 *  val_480;
 val_485 =  val_478 *  val_480;
 val_486 =  val_473 *  val_480;
 val_487 =  val_474 *  val_480;
 val_488 =  val_481 +  val_484;
 val_489 =  val_482 +  val_485;
 val_490 =  val_483 +  val_486;
 val_491 =  val_482 +  val_487;
 val_492 =  A[idx_off + 29] *  A[idx_off + 63];
 val_493 =  A[idx_off + 0] *  A[idx_off + 63];
 val_494 =  A[idx_off + 0] *  A[idx_off + 64];
 val_495 =  A[idx_off + 29] *  A[idx_off + 64];
 val_496 =  A[idx_off + 0] *  A[idx_off + 65];
 val_497 =  A[idx_off + 29] *  A[idx_off + 65];
 val_498 =  A[idx_off + 0] *  A[idx_off + 66];
 val_499 =  A[idx_off + 29] *  A[idx_off + 66];
 val_500 =  val_492 +  val_494;
 val_501 =  val_493 +  val_495;
 val_502 =  val_493 +  val_494;
 val_503 =  val_496 +  val_500;
 val_504 =  val_496 +  val_501;
 val_505 =  val_497 +  val_502;
 val_506 =  val_496 +  val_502;
 val_507 =  val_498 +  val_503;
 val_508 =  val_498 +  val_504;
 val_509 =  val_498 +  val_505;
 val_510 =  val_499 +  val_506;
 val_511 =  A[idx_off + 29] *  A[idx_off + 97];
 val_512 =  A[idx_off + 0] *  A[idx_off + 97];
 val_513 =  A[idx_off + 20] *  A[idx_off + 97];
 val_514 =  A[idx_off + 0] *  A[idx_off + 98];
 val_515 =  A[idx_off + 30] *  A[idx_off + 98];
 val_516 =  A[idx_off + 29] *  A[idx_off + 98];
 val_517 =  A[idx_off + 0] *  A[idx_off + 99];
 val_518 =  A[idx_off + 0] *  A[idx_off + 100];
 val_519 =  A[idx_off + 29] *  A[idx_off + 100];
 val_520 =  A[idx_off + 29] *  A[idx_off + 99];
 val_521 =  A[idx_off + 25] *  A[idx_off + 97];
 val_522 =  A[idx_off + 31] *  A[idx_off + 98];
 val_523 =  val_511 +  val_514;
 val_524 =  val_512 +  val_514;
 val_525 =  val_513 +  val_515;
 val_526 =  val_512 +  val_516;
 val_527 =  val_517 +  val_523;
 val_528 =  val_517 +  val_524;
 val_529 =  val_517 +  val_525;
 val_530 =  val_517 +  val_526;
 val_531 =  val_518 +  val_527;
 val_532 =  val_519 +  val_528;
 val_533 =  val_518 +  val_529;
 val_534 =  val_518 +  val_530;
 val_535 =  val_520 +  val_524;
 val_536 =  val_518 +  val_535;
 val_537 =  val_521 +  val_522;
 val_538 =  val_517 +  val_537;
 val_539 =  val_518 +  val_538;
 val_540 =  A[idx_off + 29] *  A[idx_off + 110];
 val_541 =  A[idx_off + 4] *  A[idx_off + 110];
 val_542 =  A[idx_off + 6] *  A[idx_off + 110];
 val_543 =  A[idx_off + 0] *  A[idx_off + 111];
 val_544 =  A[idx_off + 34] *  A[idx_off + 111];
 val_545 =  A[idx_off + 28] *  A[idx_off + 111];
 val_546 =  A[idx_off + 0] *  A[idx_off + 112];
 val_547 =  A[idx_off + 34] *  A[idx_off + 112];
 val_548 =  A[idx_off + 8] *  A[idx_off + 112];
 val_549 =  A[idx_off + 0] *  A[idx_off + 113];
 val_550 =  A[idx_off + 35] *  A[idx_off + 113];
 val_551 =  A[idx_off + 0] *  A[idx_off + 110];
 val_552 =  A[idx_off + 17] *  A[idx_off + 111];
 val_553 =  A[idx_off + 3] *  A[idx_off + 111];
 val_554 =  A[idx_off + 13] *  A[idx_off + 112];
 val_555 =  A[idx_off + 36] *  A[idx_off + 112];
 val_556 =  A[idx_off + 29] *  A[idx_off + 113];
 val_557 =  A[idx_off + 14] *  A[idx_off + 113];
 val_558 =  A[idx_off + 13] *  A[idx_off + 111];
 val_559 =  A[idx_off + 37] *  A[idx_off + 111];
 val_560 =  A[idx_off + 29] *  A[idx_off + 111];
 val_561 =  A[idx_off + 18] *  A[idx_off + 111];
 val_562 =  A[idx_off + 21] *  A[idx_off + 112];
 val_563 =  A[idx_off + 15] *  A[idx_off + 112];
 val_564 =  A[idx_off + 6] *  A[idx_off + 113];
 val_565 =  A[idx_off + 23] *  A[idx_off + 113];
 val_566 =  A[idx_off + 31] *  A[idx_off + 112];
 val_567 =  A[idx_off + 3] *  A[idx_off + 113];
 val_568 =  A[idx_off + 25] *  A[idx_off + 113];
 val_569 =  A[idx_off + 29] *  A[idx_off + 112];
 val_570 =  A[idx_off + 2] *  A[idx_off + 110];
 val_571 =  A[idx_off + 14] *  A[idx_off + 110];
 val_572 =  A[idx_off + 38] *  A[idx_off + 111];
 val_573 =  A[idx_off + 39] *  A[idx_off + 111];
 val_574 =  A[idx_off + 4] *  A[idx_off + 112];
 val_575 =  val_540 +  val_543;
 val_576 =  val_541 +  val_544;
 val_577 =  val_542 +  val_545;
 val_578 =  val_546 +  val_575;
 val_579 =  val_547 +  val_576;
 val_580 =  val_548 +  val_577;
 val_581 =  val_549 +  val_578;
 val_582 =  val_550 +  val_579;
 val_583 =  val_549 +  val_580;
 val_584 =  val_543 +  val_551;
 val_585 =  val_551 +  val_552;
 val_586 =  val_551 +  val_553;
 val_587 =  val_546 +  val_584;
 val_588 =  val_554 +  val_585;
 val_589 =  val_555 +  val_586;
 val_590 =  val_556 +  val_587;
 val_591 =  val_557 +  val_588;
 val_592 =  val_549 +  val_589;
 val_593 =  val_551 +  val_558;
 val_594 =  val_551 +  val_559;
 val_595 =  val_551 +  val_560;
 val_596 =  val_542 +  val_561;
 val_597 =  val_562 +  val_593;
 val_598 =  val_547 +  val_594;
 val_599 =  val_546 +  val_595;
 val_600 =  val_563 +  val_596;
 val_601 =  val_564 +  val_597;
 val_602 =  val_565 +  val_598;
 val_603 =  val_549 +  val_599;
 val_604 =  val_549 +  val_600;
 val_605 =  val_555 +  val_584;
 val_606 =  val_566 +  val_584;
 val_607 =  val_567 +  val_605;
 val_608 =  val_568 +  val_606;
 val_609 =  val_569 +  val_584;
 val_610 =  val_549 +  val_609;
 val_611 =  val_570 +  val_572;
 val_612 =  val_571 +  val_573;
 val_613 =  val_574 +  val_611;
 val_614 =  val_546 +  val_612;
 val_615 =  val_549 +  val_613;
 val_616 =  val_549 +  val_614;
 val_617 =  A[idx_off + 142] *  val_488;
 val_618 =  A[idx_off + 143] *  val_489;
 val_619 =  A[idx_off + 144] *  val_490;
 val_620 =  A[idx_off + 145] *  val_491;
 val_621 =  val_581 *  val_617;
 val_622 =  val_582 *  val_618;
 val_623 =  val_581 *  val_619;
 val_624 =  val_583 *  val_620;
 val_625 =  val_590 *  val_617;
 val_626 =  val_591 *  val_618;
 val_627 =  val_590 *  val_619;
 val_628 =  val_592 *  val_620;
 val_629 =  val_601 *  val_617;
 val_630 =  val_602 *  val_618;
 val_631 =  val_603 *  val_619;
 val_632 =  val_604 *  val_620;
 val_633 =  val_607 *  val_618;
 val_634 =  val_608 *  val_620;
 val_635 =  val_607 *  val_617;
 val_636 =  val_581 *  val_618;
 val_637 =  val_610 *  val_619;
 val_638 =  val_581 *  val_620;
 val_639 =  val_615 *  val_617;
 val_640 =  val_590 *  val_618;
 val_641 =  val_616 *  val_619;
 val_642 =  val_590 *  val_620;
 val_643 =  A[idx_off + 29] *  val_621;
 val_644 =  A[idx_off + 29] *  val_622;
 val_645 =  A[idx_off + 29] *  val_623;
 val_646 =  A[idx_off + 29] *  val_624;
 val_647 =  A[idx_off + 0] *  val_621;
 val_648 =  A[idx_off + 0] *  val_622;
 val_649 =  A[idx_off + 0] *  val_623;
 val_650 =  A[idx_off + 0] *  val_624;
 val_651 =  A[idx_off + 13] *  val_625;
 val_652 =  A[idx_off + 5] *  val_626;
 val_653 =  A[idx_off + 0] *  val_627;
 val_654 =  A[idx_off + 0] *  val_628;
 val_655 =  A[idx_off + 40] *  val_625;
 val_656 =  A[idx_off + 11] *  val_626;
 val_657 =  A[idx_off + 29] *  val_628;
 val_658 =  A[idx_off + 0] *  val_625;
 val_659 =  A[idx_off + 0] *  val_626;
 val_660 =  A[idx_off + 29] *  val_627;
 val_661 =  A[idx_off + 5] *  val_629;
 val_662 =  A[idx_off + 29] *  val_630;
 val_663 =  A[idx_off + 0] *  val_631;
 val_664 =  A[idx_off + 29] *  val_632;
 val_665 =  A[idx_off + 11] *  val_629;
 val_666 =  A[idx_off + 0] *  val_630;
 val_667 =  A[idx_off + 29] *  val_631;
 val_668 =  A[idx_off + 0] *  val_632;
 val_669 =  A[idx_off + 0] *  val_629;
 val_670 =  A[idx_off + 20] *  val_633;
 val_671 =  A[idx_off + 0] *  val_634;
 val_672 =  A[idx_off + 30] *  val_633;
 val_673 =  A[idx_off + 0] *  val_633;
 val_674 =  A[idx_off + 29] *  val_634;
 val_675 =  A[idx_off + 14] *  val_635;
 val_676 =  A[idx_off + 29] *  val_636;
 val_677 =  A[idx_off + 0] *  val_637;
 val_678 =  A[idx_off + 29] *  val_638;
 val_679 =  A[idx_off + 39] *  val_635;
 val_680 =  A[idx_off + 0] *  val_636;
 val_681 =  A[idx_off + 0] *  val_638;
 val_682 =  A[idx_off + 0] *  val_635;
 val_683 =  A[idx_off + 29] *  val_637;
 val_684 =  A[idx_off + 29] *  val_639;
 val_685 =  A[idx_off + 13] *  val_640;
 val_686 =  A[idx_off + 29] *  val_641;
 val_687 =  A[idx_off + 0] *  val_642;
 val_688 =  A[idx_off + 0] *  val_639;
 val_689 =  A[idx_off + 40] *  val_640;
 val_690 =  A[idx_off + 0] *  val_641;
 val_691 =  A[idx_off + 0] *  val_640;
 val_692 =  A[idx_off + 29] *  val_642;
 val_693 =  val_643 +  val_644;
 val_694 =  val_645 +  val_693;
 val_695 =  val_646 +  val_694;
 val_696 =  val_647 +  val_648;
 val_697 =  val_649 +  val_696;
 val_698 =  val_650 +  val_697;
 val_699 =  val_651 +  val_652;
 val_700 =  val_653 +  val_699;
 val_701 =  val_654 +  val_700;
 val_702 =  val_655 +  val_656;
 val_703 =  val_653 +  val_702;
 val_704 =  val_657 +  val_703;
 val_705 =  val_658 +  val_659;
 val_706 =  val_653 +  val_705;
 val_707 =  val_654 +  val_706;
 val_708 =  val_660 +  val_705;
 val_709 =  val_654 +  val_708;
 val_710 =  val_661 +  val_662;
 val_711 =  val_663 +  val_710;
 val_712 =  val_664 +  val_711;
 val_713 =  val_665 +  val_666;
 val_714 =  val_667 +  val_713;
 val_715 =  val_668 +  val_714;
 val_716 =  val_666 +  val_669;
 val_717 =  val_663 +  val_716;
 val_718 =  val_668 +  val_717;
 val_719 =  val_643 +  val_670;
 val_720 =  val_645 +  val_719;
 val_721 =  val_671 +  val_720;
 val_722 =  val_647 +  val_672;
 val_723 =  val_649 +  val_722;
 val_724 =  val_671 +  val_723;
 val_725 =  val_647 +  val_673;
 val_726 =  val_649 +  val_725;
 val_727 =  val_674 +  val_726;
 val_728 =  val_671 +  val_726;
 val_729 =  val_675 +  val_676;
 val_730 =  val_677 +  val_729;
 val_731 =  val_678 +  val_730;
 val_732 =  val_679 +  val_680;
 val_733 =  val_677 +  val_732;
 val_734 =  val_681 +  val_733;
 val_735 =  val_680 +  val_682;
 val_736 =  val_683 +  val_735;
 val_737 =  val_681 +  val_736;
 val_738 =  val_677 +  val_735;
 val_739 =  val_681 +  val_738;
 val_740 =  val_684 +  val_685;
 val_741 =  val_686 +  val_740;
 val_742 =  val_687 +  val_741;
 val_743 =  val_688 +  val_689;
 val_744 =  val_690 +  val_743;
 val_745 =  val_687 +  val_744;
 val_746 =  val_688 +  val_691;
 val_747 =  val_690 +  val_746;
 val_748 =  val_687 +  val_747;
 val_749 =  val_692 +  val_747;
 val_750 =  A[idx_off + 8] *  A[idx_off + 90];
 val_751 =  A[idx_off + 9] *  A[idx_off + 91];
 val_752 =  val_695 *  val_750;
 val_753 =  val_698 *  val_750;
 val_754 =  val_701 *  val_751;
 val_755 =  val_704 *  val_751;
 val_756 =  val_707 *  val_751;
 val_757 =  val_709 *  val_751;
 val_758 =  val_712 *  val_750;
 val_759 =  val_715 *  val_750;
 val_760 =  val_718 *  val_750;
 val_761 =  val_721 *  val_751;
 val_762 =  val_724 *  val_751;
 val_763 =  val_727 *  val_751;
 val_764 =  val_728 *  val_751;
 val_765 =  val_731 *  val_750;
 val_766 =  val_734 *  val_750;
 val_767 =  val_737 *  val_750;
 val_768 =  val_739 *  val_750;
 val_769 =  val_742 *  val_751;
 val_770 =  val_745 *  val_751;
 val_771 =  val_748 *  val_751;
 val_772 =  val_749 *  val_751;
 val_773 =  val_752 +  val_754;
 val_774 =  val_753 +  val_755;
 val_775 =  val_753 +  val_756;
 val_776 =  val_753 +  val_757;
 val_777 =  val_758 +  val_761;
 val_778 =  val_759 +  val_762;
 val_779 =  val_760 +  val_763;
 val_780 =  val_760 +  val_764;
 val_781 =  val_765 +  val_769;
 val_782 =  val_766 +  val_770;
 val_783 =  val_767 +  val_771;
 val_784 =  val_768 +  val_772;
 val_785 =  A[idx_off + 2] *  A[idx_off + 85];
 val_786 =  A[idx_off + 3] *  A[idx_off + 86];
 val_787 =  A[idx_off + 0] *  val_785;
 val_788 =  A[idx_off + 18] *  val_785;
 val_789 =  A[idx_off + 4] *  val_785;
 val_790 =  A[idx_off + 5] *  val_785;
 val_791 =  A[idx_off + 0] *  val_786;
 val_792 =  A[idx_off + 4] *  val_786;
 val_793 =  A[idx_off + 18] *  val_786;
 val_794 =  A[idx_off + 5] *  val_786;
 val_795 =  A[idx_off + 1] *  val_785;
 val_796 =  A[idx_off + 13] *  val_785;
 val_797 =  A[idx_off + 1] *  val_786;
 val_798 =  A[idx_off + 13] *  val_786;
 val_799 =  A[idx_off + 2] *  val_785;
 val_800 =  A[idx_off + 2] *  val_786;
 val_801 =  A[idx_off + 3] *  val_785;
 val_802 =  A[idx_off + 3] *  val_786;
 val_803 =  val_787 +  val_791;
 val_804 =  val_787 +  val_792;
 val_805 =  val_788 +  val_793;
 val_806 =  val_789 +  val_792;
 val_807 =  val_788 +  val_794;
 val_808 =  val_790 +  val_794;
 val_809 =  val_795 +  val_797;
 val_810 =  val_794 +  val_795;
 val_811 =  val_796 +  val_798;
 val_812 =  val_792 +  val_796;
 val_813 =  val_788 +  val_797;
 val_814 =  val_791 +  val_796;
 val_815 =  val_799 +  val_800;
 val_816 =  val_798 +  val_799;
 val_817 =  val_801 +  val_802;
 val_818 =  val_793 +  val_801;
 val_819 =  A[idx_off + 71] *  val_337;
 val_820 =  A[idx_off + 72] *  val_339;
 val_821 =  A[idx_off + 73] *  val_341;
 val_822 =  val_371 *  val_819;
 val_823 =  val_372 *  val_820;
 val_824 =  val_373 *  val_821;
 val_825 =  A[idx_off + 4] *  val_822;
 val_826 =  A[idx_off + 3] *  val_823;
 val_827 =  A[idx_off + 4] *  val_824;
 val_828 =  A[idx_off + 0] *  val_822;
 val_829 =  A[idx_off + 15] *  val_823;
 val_830 =  A[idx_off + 3] *  val_824;
 val_831 =  val_408 *  val_825;
 val_832 =  val_410 *  val_826;
 val_833 =  val_412 *  val_827;
 val_834 =  val_414 *  val_825;
 val_835 =  val_416 *  val_826;
 val_836 =  val_418 *  val_827;
 val_837 =  val_420 *  val_825;
 val_838 =  val_421 *  val_826;
 val_839 =  val_423 *  val_827;
 val_840 =  val_408 *  val_828;
 val_841 =  val_410 *  val_829;
 val_842 =  val_412 *  val_830;
 val_843 =  val_414 *  val_828;
 val_844 =  val_416 *  val_829;
 val_845 =  val_418 *  val_830;
 val_846 =  val_420 *  val_828;
 val_847 =  val_421 *  val_829;
 val_848 =  val_423 *  val_830;
 val_849 =  val_831 +  val_832;
 val_850 =  val_833 +  val_849;
 val_851 =  val_834 +  val_835;
 val_852 =  val_836 +  val_851;
 val_853 =  val_837 +  val_838;
 val_854 =  val_839 +  val_853;
 val_855 =  val_840 +  val_841;
 val_856 =  val_842 +  val_855;
 val_857 =  val_843 +  val_844;
 val_858 =  val_845 +  val_857;
 val_859 =  val_846 +  val_847;
 val_860 =  val_848 +  val_859;
 val_861 =  A[idx_off + 51] *  val_850;
 val_862 =  A[idx_off + 52] *  val_852;
 val_863 =  A[idx_off + 53] *  val_854;
 val_864 =  A[idx_off + 51] *  val_856;
 val_865 =  A[idx_off + 52] *  val_858;
 val_866 =  A[idx_off + 53] *  val_860;
 val_867 =  val_449 *  val_861;
 val_868 =  val_450 *  val_861;
 val_869 =  val_449 *  val_862;
 val_870 =  val_451 *  val_862;
 val_871 =  val_452 *  val_862;
 val_872 =  val_453 *  val_863;
 val_873 =  val_454 *  val_863;
 val_874 =  val_455 *  val_863;
 val_875 =  val_449 *  val_864;
 val_876 =  val_450 *  val_864;
 val_877 =  val_449 *  val_865;
 val_878 =  val_451 *  val_865;
 val_879 =  val_452 *  val_865;
 val_880 =  val_453 *  val_866;
 val_881 =  val_454 *  val_866;
 val_882 =  val_455 *  val_866;
 val_883 =  val_867 +  val_869;
 val_884 =  val_867 +  val_870;
 val_885 =  val_868 +  val_871;
 val_886 =  val_872 +  val_883;
 val_887 =  val_873 +  val_884;
 val_888 =  val_874 +  val_885;
 val_889 =  val_875 +  val_877;
 val_890 =  val_875 +  val_878;
 val_891 =  val_876 +  val_879;
 val_892 =  val_880 +  val_889;
 val_893 =  val_881 +  val_890;
 val_894 =  val_882 +  val_891;
 val_895 =  A[idx_off + 127] *  val_168;
 val_896 =  A[idx_off + 128] *  val_169;
 val_897 =  A[idx_off + 129] *  val_170;
 val_898 =  val_886 *  val_895;
 val_899 =  val_887 *  val_896;
 val_900 =  val_888 *  val_897;
 val_901 =  val_892 *  val_895;
 val_902 =  val_893 *  val_896;
 val_903 =  val_894 *  val_897;
 val_904 =  val_803 *  val_898;
 val_905 =  val_804 *  val_899;
 val_906 =  val_805 *  val_900;
 val_907 =  val_806 *  val_899;
 val_908 =  val_807 *  val_900;
 val_909 =  val_804 *  val_898;
 val_910 =  val_808 *  val_900;
 val_911 =  val_809 *  val_901;
 val_912 =  val_810 *  val_902;
 val_913 =  val_811 *  val_903;
 val_914 =  val_808 *  val_902;
 val_915 =  val_812 *  val_903;
 val_916 =  val_810 *  val_901;
 val_917 =  val_806 *  val_903;
 val_918 =  val_813 *  val_900;
 val_919 =  val_809 *  val_900;
 val_920 =  val_814 *  val_903;
 val_921 =  val_803 *  val_903;
 val_922 =  val_803 *  val_899;
 val_923 =  val_815 *  val_900;
 val_924 =  val_816 *  val_900;
 val_925 =  val_811 *  val_900;
 val_926 =  val_809 *  val_902;
 val_927 =  val_817 *  val_903;
 val_928 =  val_818 *  val_903;
 val_929 =  val_805 *  val_903;
 val_930 =  val_904 +  val_905;
 val_931 =  val_906 +  val_930;
 val_932 =  val_904 +  val_907;
 val_933 =  val_908 +  val_932;
 val_934 =  val_907 +  val_909;
 val_935 =  val_910 +  val_934;
 val_936 =  val_911 +  val_912;
 val_937 =  val_913 +  val_936;
 val_938 =  val_911 +  val_914;
 val_939 =  val_915 +  val_938;
 val_940 =  val_914 +  val_916;
 val_941 =  val_917 +  val_940;
 val_942 =  val_918 +  val_932;
 val_943 =  val_919 +  val_934;
 val_944 =  val_920 +  val_938;
 val_945 =  val_921 +  val_940;
 val_946 =  val_904 +  val_922;
 val_947 =  val_923 +  val_946;
 val_948 =  val_924 +  val_946;
 val_949 =  val_925 +  val_946;
 val_950 =  val_911 +  val_926;
 val_951 =  val_927 +  val_950;
 val_952 =  val_928 +  val_950;
 val_953 =  val_929 +  val_950;
 val_954 =  A[idx_off + 49] *  val_931;
 val_955 =  A[idx_off + 49] *  val_933;
 val_956 =  A[idx_off + 49] *  val_935;
 val_957 =  A[idx_off + 50] *  val_937;
 val_958 =  A[idx_off + 50] *  val_939;
 val_959 =  A[idx_off + 50] *  val_941;
 val_960 =  A[idx_off + 49] *  val_942;
 val_961 =  A[idx_off + 49] *  val_943;
 val_962 =  A[idx_off + 50] *  val_944;
 val_963 =  A[idx_off + 50] *  val_945;
 val_964 =  A[idx_off + 49] *  val_947;
 val_965 =  A[idx_off + 49] *  val_948;
 val_966 =  A[idx_off + 49] *  val_949;
 val_967 =  A[idx_off + 50] *  val_951;
 val_968 =  A[idx_off + 50] *  val_952;
 val_969 =  A[idx_off + 50] *  val_953;
 val_970 =  val_954 +  val_957;
 val_971 =  val_955 +  val_958;
 val_972 =  val_956 +  val_959;
 val_973 =  val_960 +  val_962;
 val_974 =  val_961 +  val_963;
 val_975 =  val_964 +  val_967;
 val_976 =  val_965 +  val_968;
 val_977 =  val_966 +  val_969;
 val_978 =  A[idx_off + 134] *  val_507;
 val_979 =  A[idx_off + 135] *  val_508;
 val_980 =  A[idx_off + 136] *  val_509;
 val_981 =  A[idx_off + 137] *  val_510;
 val_982 =  A[idx_off + 134] *  val_508;
 val_983 =  A[idx_off + 135] *  val_507;
 val_984 =  A[idx_off + 135] *  val_509;
 val_985 =  A[idx_off + 136] *  val_507;
 val_986 =  val_531 *  val_978;
 val_987 =  val_532 *  val_979;
 val_988 =  val_533 *  val_980;
 val_989 =  val_534 *  val_981;
 val_990 =  val_534 *  val_978;
 val_991 =  val_531 *  val_979;
 val_992 =  val_536 *  val_981;
 val_993 =  val_536 *  val_978;
 val_994 =  val_539 *  val_979;
 val_995 =  val_531 *  val_980;
 val_996 =  val_532 *  val_981;
 val_997 =  val_531 *  val_982;
 val_998 =  val_532 *  val_983;
 val_999 =  val_534 *  val_982;
 val_1000 =  val_531 *  val_983;
 val_1001 =  val_536 *  val_982;
 val_1002 =  val_539 *  val_983;
 val_1003 =  val_532 *  val_984;
 val_1004 =  val_533 *  val_985;
 val_1005 =  val_531 *  val_984;
 val_1006 =  val_539 *  val_984;
 val_1007 =  val_531 *  val_985;
 val_1008 =  val_773 *  val_986;
 val_1009 =  val_774 *  val_987;
 val_1010 =  val_775 *  val_988;
 val_1011 =  val_776 *  val_989;
 val_1012 =  val_777 *  val_990;
 val_1013 =  val_778 *  val_991;
 val_1014 =  val_779 *  val_988;
 val_1015 =  val_780 *  val_992;
 val_1016 =  val_781 *  val_993;
 val_1017 =  val_782 *  val_994;
 val_1018 =  val_783 *  val_995;
 val_1019 =  val_784 *  val_996;
 val_1020 =  val_773 *  val_997;
 val_1021 =  val_774 *  val_998;
 val_1022 =  val_777 *  val_999;
 val_1023 =  val_778 *  val_1000;
 val_1024 =  val_781 *  val_1001;
 val_1025 =  val_782 *  val_1002;
 val_1026 =  val_774 *  val_1003;
 val_1027 =  val_775 *  val_1004;
 val_1028 =  val_778 *  val_1005;
 val_1029 =  val_779 *  val_1004;
 val_1030 =  val_782 *  val_1006;
 val_1031 =  val_783 *  val_1007;
 val_1032 =  A[idx_off + 29] *  val_1008;
 val_1033 =  A[idx_off + 0] *  val_1009;
 val_1034 =  A[idx_off + 0] *  val_1010;
 val_1035 =  A[idx_off + 11] *  val_1011;
 val_1036 =  A[idx_off + 0] *  val_1008;
 val_1037 =  A[idx_off + 5] *  val_1011;
 val_1038 =  A[idx_off + 29] *  val_1010;
 val_1039 =  A[idx_off + 0] *  val_1011;
 val_1040 =  A[idx_off + 29] *  val_1009;
 val_1041 =  A[idx_off + 0] *  val_1012;
 val_1042 =  A[idx_off + 29] *  val_1013;
 val_1043 =  A[idx_off + 0] *  val_1014;
 val_1044 =  A[idx_off + 0] *  val_1015;
 val_1045 =  A[idx_off + 29] *  val_1012;
 val_1046 =  A[idx_off + 0] *  val_1013;
 val_1047 =  A[idx_off + 32] *  val_1015;
 val_1048 =  A[idx_off + 8] *  val_1015;
 val_1049 =  A[idx_off + 29] *  val_1014;
 val_1050 =  A[idx_off + 0] *  val_1016;
 val_1051 =  A[idx_off + 0] *  val_1017;
 val_1052 =  A[idx_off + 29] *  val_1018;
 val_1053 =  A[idx_off + 0] *  val_1019;
 val_1054 =  A[idx_off + 29] *  val_1017;
 val_1055 =  A[idx_off + 0] *  val_1018;
 val_1056 =  A[idx_off + 33] *  val_1019;
 val_1057 =  A[idx_off + 29] *  val_1016;
 val_1058 =  A[idx_off + 2] *  val_1019;
 val_1059 =  A[idx_off + 29] *  val_1020;
 val_1060 =  A[idx_off + 0] *  val_1021;
 val_1061 =  A[idx_off + 0] *  val_1020;
 val_1062 =  A[idx_off + 29] *  val_1021;
 val_1063 =  A[idx_off + 0] *  val_1022;
 val_1064 =  A[idx_off + 29] *  val_1023;
 val_1065 =  A[idx_off + 29] *  val_1022;
 val_1066 =  A[idx_off + 0] *  val_1023;
 val_1067 =  A[idx_off + 0] *  val_1024;
 val_1068 =  A[idx_off + 0] *  val_1025;
 val_1069 =  A[idx_off + 29] *  val_1025;
 val_1070 =  A[idx_off + 29] *  val_1024;
 val_1071 =  A[idx_off + 0] *  val_1026;
 val_1072 =  A[idx_off + 0] *  val_1027;
 val_1073 =  A[idx_off + 29] *  val_1027;
 val_1074 =  A[idx_off + 29] *  val_1026;
 val_1075 =  A[idx_off + 29] *  val_1028;
 val_1076 =  A[idx_off + 0] *  val_1029;
 val_1077 =  A[idx_off + 0] *  val_1028;
 val_1078 =  A[idx_off + 29] *  val_1029;
 val_1079 =  A[idx_off + 0] *  val_1030;
 val_1080 =  A[idx_off + 29] *  val_1031;
 val_1081 =  A[idx_off + 29] *  val_1030;
 val_1082 =  A[idx_off + 0] *  val_1031;
 val_1083 =  val_1032 +  val_1033;
 val_1084 =  val_1034 +  val_1083;
 val_1085 =  val_1035 +  val_1084;
 val_1086 =  val_1033 +  val_1036;
 val_1087 =  val_1034 +  val_1086;
 val_1088 =  val_1037 +  val_1087;
 val_1089 =  val_1038 +  val_1086;
 val_1090 =  val_1039 +  val_1089;
 val_1091 =  val_1036 +  val_1040;
 val_1092 =  val_1034 +  val_1091;
 val_1093 =  val_1039 +  val_1092;
 val_1094 =  val_1041 +  val_1042;
 val_1095 =  val_1043 +  val_1094;
 val_1096 =  val_1044 +  val_1095;
 val_1097 =  val_1045 +  val_1046;
 val_1098 =  val_1043 +  val_1097;
 val_1099 =  val_1047 +  val_1098;
 val_1100 =  val_1041 +  val_1046;
 val_1101 =  val_1043 +  val_1100;
 val_1102 =  val_1048 +  val_1101;
 val_1103 =  val_1049 +  val_1100;
 val_1104 =  val_1044 +  val_1103;
 val_1105 =  val_1050 +  val_1051;
 val_1106 =  val_1052 +  val_1105;
 val_1107 =  val_1053 +  val_1106;
 val_1108 =  val_1050 +  val_1054;
 val_1109 =  val_1055 +  val_1108;
 val_1110 =  val_1056 +  val_1109;
 val_1111 =  val_1051 +  val_1057;
 val_1112 =  val_1055 +  val_1111;
 val_1113 =  val_1058 +  val_1112;
 val_1114 =  val_1055 +  val_1105;
 val_1115 =  val_1053 +  val_1114;
 val_1116 =  val_1059 +  val_1060;
 val_1117 =  val_1034 +  val_1116;
 val_1118 =  val_1035 +  val_1117;
 val_1119 =  val_1060 +  val_1061;
 val_1120 =  val_1034 +  val_1119;
 val_1121 =  val_1037 +  val_1120;
 val_1122 =  val_1038 +  val_1119;
 val_1123 =  val_1039 +  val_1122;
 val_1124 =  val_1061 +  val_1062;
 val_1125 =  val_1034 +  val_1124;
 val_1126 =  val_1039 +  val_1125;
 val_1127 =  val_1063 +  val_1064;
 val_1128 =  val_1043 +  val_1127;
 val_1129 =  val_1044 +  val_1128;
 val_1130 =  val_1065 +  val_1066;
 val_1131 =  val_1043 +  val_1130;
 val_1132 =  val_1047 +  val_1131;
 val_1133 =  val_1063 +  val_1066;
 val_1134 =  val_1043 +  val_1133;
 val_1135 =  val_1048 +  val_1134;
 val_1136 =  val_1049 +  val_1133;
 val_1137 =  val_1044 +  val_1136;
 val_1138 =  val_1067 +  val_1068;
 val_1139 =  val_1052 +  val_1138;
 val_1140 =  val_1053 +  val_1139;
 val_1141 =  val_1067 +  val_1069;
 val_1142 =  val_1055 +  val_1141;
 val_1143 =  val_1056 +  val_1142;
 val_1144 =  val_1068 +  val_1070;
 val_1145 =  val_1055 +  val_1144;
 val_1146 =  val_1058 +  val_1145;
 val_1147 =  val_1055 +  val_1138;
 val_1148 =  val_1053 +  val_1147;
 val_1149 =  val_1059 +  val_1071;
 val_1150 =  val_1072 +  val_1149;
 val_1151 =  val_1035 +  val_1150;
 val_1152 =  val_1061 +  val_1071;
 val_1153 =  val_1072 +  val_1152;
 val_1154 =  val_1037 +  val_1153;
 val_1155 =  val_1073 +  val_1152;
 val_1156 =  val_1039 +  val_1155;
 val_1157 =  val_1061 +  val_1074;
 val_1158 =  val_1072 +  val_1157;
 val_1159 =  val_1039 +  val_1158;
 val_1160 =  val_1063 +  val_1075;
 val_1161 =  val_1076 +  val_1160;
 val_1162 =  val_1044 +  val_1161;
 val_1163 =  val_1065 +  val_1077;
 val_1164 =  val_1076 +  val_1163;
 val_1165 =  val_1047 +  val_1164;
 val_1166 =  val_1063 +  val_1077;
 val_1167 =  val_1076 +  val_1166;
 val_1168 =  val_1048 +  val_1167;
 val_1169 =  val_1078 +  val_1166;
 val_1170 =  val_1044 +  val_1169;
 val_1171 =  val_1067 +  val_1079;
 val_1172 =  val_1080 +  val_1171;
 val_1173 =  val_1053 +  val_1172;
 val_1174 =  val_1067 +  val_1081;
 val_1175 =  val_1082 +  val_1174;
 val_1176 =  val_1056 +  val_1175;
 val_1177 =  val_1070 +  val_1079;
 val_1178 =  val_1082 +  val_1177;
 val_1179 =  val_1058 +  val_1178;
 val_1180 =  val_1082 +  val_1171;
 val_1181 =  val_1053 +  val_1180;
 val_1182 =  A[idx_off + 10] *  A[idx_off + 87];
 val_1183 =  A[idx_off + 11] *  A[idx_off + 88];
 val_1184 =  A[idx_off + 4] *  A[idx_off + 89];
 val_1185 =  val_268 *  val_1182;
 val_1186 =  val_269 *  val_1182;
 val_1187 =  val_268 *  val_1183;
 val_1188 =  val_269 *  val_1183;
 val_1189 =  val_270 *  val_1184;
 val_1190 =  val_271 *  val_1184;
 val_1191 =  val_1085 *  val_1185;
 val_1192 =  val_1088 *  val_1185;
 val_1193 =  val_1090 *  val_1185;
 val_1194 =  val_1093 *  val_1185;
 val_1195 =  val_1085 *  val_1186;
 val_1196 =  val_1088 *  val_1186;
 val_1197 =  val_1090 *  val_1186;
 val_1198 =  val_1093 *  val_1186;
 val_1199 =  val_1096 *  val_1187;
 val_1200 =  val_1099 *  val_1187;
 val_1201 =  val_1102 *  val_1187;
 val_1202 =  val_1104 *  val_1187;
 val_1203 =  val_1096 *  val_1188;
 val_1204 =  val_1099 *  val_1188;
 val_1205 =  val_1102 *  val_1188;
 val_1206 =  val_1104 *  val_1188;
 val_1207 =  val_1107 *  val_1189;
 val_1208 =  val_1110 *  val_1189;
 val_1209 =  val_1113 *  val_1189;
 val_1210 =  val_1115 *  val_1189;
 val_1211 =  val_1107 *  val_1190;
 val_1212 =  val_1110 *  val_1190;
 val_1213 =  val_1113 *  val_1190;
 val_1214 =  val_1115 *  val_1190;
 val_1215 =  val_1118 *  val_1185;
 val_1216 =  val_1121 *  val_1185;
 val_1217 =  val_1123 *  val_1185;
 val_1218 =  val_1126 *  val_1185;
 val_1219 =  val_1118 *  val_1186;
 val_1220 =  val_1121 *  val_1186;
 val_1221 =  val_1123 *  val_1186;
 val_1222 =  val_1126 *  val_1186;
 val_1223 =  val_1129 *  val_1187;
 val_1224 =  val_1132 *  val_1187;
 val_1225 =  val_1135 *  val_1187;
 val_1226 =  val_1137 *  val_1187;
 val_1227 =  val_1129 *  val_1188;
 val_1228 =  val_1132 *  val_1188;
 val_1229 =  val_1135 *  val_1188;
 val_1230 =  val_1137 *  val_1188;
 val_1231 =  val_1140 *  val_1189;
 val_1232 =  val_1143 *  val_1189;
 val_1233 =  val_1146 *  val_1189;
 val_1234 =  val_1148 *  val_1189;
 val_1235 =  val_1140 *  val_1190;
 val_1236 =  val_1143 *  val_1190;
 val_1237 =  val_1146 *  val_1190;
 val_1238 =  val_1148 *  val_1190;
 val_1239 =  val_1151 *  val_1185;
 val_1240 =  val_1154 *  val_1185;
 val_1241 =  val_1156 *  val_1185;
 val_1242 =  val_1159 *  val_1185;
 val_1243 =  val_1151 *  val_1186;
 val_1244 =  val_1154 *  val_1186;
 val_1245 =  val_1156 *  val_1186;
 val_1246 =  val_1159 *  val_1186;
 val_1247 =  val_1162 *  val_1187;
 val_1248 =  val_1165 *  val_1187;
 val_1249 =  val_1168 *  val_1187;
 val_1250 =  val_1170 *  val_1187;
 val_1251 =  val_1162 *  val_1188;
 val_1252 =  val_1165 *  val_1188;
 val_1253 =  val_1168 *  val_1188;
 val_1254 =  val_1170 *  val_1188;
 val_1255 =  val_1173 *  val_1189;
 val_1256 =  val_1176 *  val_1189;
 val_1257 =  val_1179 *  val_1189;
 val_1258 =  val_1181 *  val_1189;
 val_1259 =  val_1173 *  val_1190;
 val_1260 =  val_1176 *  val_1190;
 val_1261 =  val_1179 *  val_1190;
 val_1262 =  val_1181 *  val_1190;
 val_1263 =  val_1191 +  val_1199;
 val_1264 =  val_1192 +  val_1200;
 val_1265 =  val_1193 +  val_1201;
 val_1266 =  val_1194 +  val_1202;
 val_1267 =  val_1195 +  val_1203;
 val_1268 =  val_1196 +  val_1204;
 val_1269 =  val_1197 +  val_1205;
 val_1270 =  val_1198 +  val_1206;
 val_1271 =  val_1207 +  val_1263;
 val_1272 =  val_1208 +  val_1264;
 val_1273 =  val_1209 +  val_1265;
 val_1274 =  val_1210 +  val_1266;
 val_1275 =  val_1211 +  val_1267;
 val_1276 =  val_1212 +  val_1268;
 val_1277 =  val_1213 +  val_1269;
 val_1278 =  val_1214 +  val_1270;
 val_1279 =  val_1215 +  val_1223;
 val_1280 =  val_1216 +  val_1224;
 val_1281 =  val_1217 +  val_1225;
 val_1282 =  val_1218 +  val_1226;
 val_1283 =  val_1219 +  val_1227;
 val_1284 =  val_1220 +  val_1228;
 val_1285 =  val_1221 +  val_1229;
 val_1286 =  val_1222 +  val_1230;
 val_1287 =  val_1231 +  val_1279;
 val_1288 =  val_1232 +  val_1280;
 val_1289 =  val_1233 +  val_1281;
 val_1290 =  val_1234 +  val_1282;
 val_1291 =  val_1235 +  val_1283;
 val_1292 =  val_1236 +  val_1284;
 val_1293 =  val_1237 +  val_1285;
 val_1294 =  val_1238 +  val_1286;
 val_1295 =  val_1239 +  val_1247;
 val_1296 =  val_1240 +  val_1248;
 val_1297 =  val_1241 +  val_1249;
 val_1298 =  val_1242 +  val_1250;
 val_1299 =  val_1243 +  val_1251;
 val_1300 =  val_1244 +  val_1252;
 val_1301 =  val_1245 +  val_1253;
 val_1302 =  val_1246 +  val_1254;
 val_1303 =  val_1255 +  val_1295;
 val_1304 =  val_1256 +  val_1296;
 val_1305 =  val_1257 +  val_1297;
 val_1306 =  val_1258 +  val_1298;
 val_1307 =  val_1259 +  val_1299;
 val_1308 =  val_1260 +  val_1300;
 val_1309 =  val_1261 +  val_1301;
 val_1310 =  val_1262 +  val_1302;
 val_1311 =  A[idx_off + 119] *  val_970;
 val_1312 =  A[idx_off + 120] *  val_971;
 val_1313 =  A[idx_off + 121] *  val_972;
 val_1314 =  A[idx_off + 120] *  val_973;
 val_1315 =  A[idx_off + 121] *  val_974;
 val_1316 =  A[idx_off + 119] *  val_975;
 val_1317 =  A[idx_off + 120] *  val_976;
 val_1318 =  A[idx_off + 121] *  val_977;
 val_1319 =  A[idx_off + 12] *  val_1311;
 val_1320 =  A[idx_off + 0] *  val_1312;
 val_1321 =  A[idx_off + 0] *  val_1313;
 val_1322 =  A[idx_off + 0] *  val_1311;
 val_1323 =  A[idx_off + 12] *  val_1312;
 val_1324 =  A[idx_off + 24] *  val_1311;
 val_1325 =  A[idx_off + 13] *  val_1312;
 val_1326 =  A[idx_off + 12] *  val_1313;
 val_1327 =  A[idx_off + 0] *  val_1314;
 val_1328 =  A[idx_off + 0] *  val_1315;
 val_1329 =  A[idx_off + 12] *  val_1314;
 val_1330 =  A[idx_off + 13] *  val_1314;
 val_1331 =  A[idx_off + 12] *  val_1315;
 val_1332 =  A[idx_off + 12] *  val_1316;
 val_1333 =  A[idx_off + 0] *  val_1317;
 val_1334 =  A[idx_off + 0] *  val_1318;
 val_1335 =  A[idx_off + 0] *  val_1316;
 val_1336 =  A[idx_off + 12] *  val_1317;
 val_1337 =  A[idx_off + 24] *  val_1316;
 val_1338 =  A[idx_off + 13] *  val_1317;
 val_1339 =  A[idx_off + 12] *  val_1318;
 val_1340 =  val_1319 +  val_1320;
 val_1341 =  val_1321 +  val_1340;
 val_1342 =  val_1322 +  val_1323;
 val_1343 =  val_1321 +  val_1342;
 val_1344 =  val_1320 +  val_1322;
 val_1345 =  val_1324 +  val_1325;
 val_1346 =  val_1326 +  val_1344;
 val_1347 =  val_1321 +  val_1345;
 val_1348 =  val_1319 +  val_1327;
 val_1349 =  val_1328 +  val_1348;
 val_1350 =  val_1322 +  val_1329;
 val_1351 =  val_1328 +  val_1350;
 val_1352 =  val_1322 +  val_1327;
 val_1353 =  val_1324 +  val_1330;
 val_1354 =  val_1331 +  val_1352;
 val_1355 =  val_1328 +  val_1353;
 val_1356 =  val_1332 +  val_1333;
 val_1357 =  val_1334 +  val_1356;
 val_1358 =  val_1335 +  val_1336;
 val_1359 =  val_1334 +  val_1358;
 val_1360 =  val_1333 +  val_1335;
 val_1361 =  val_1337 +  val_1338;
 val_1362 =  val_1339 +  val_1360;
 val_1363 =  val_1334 +  val_1361;
 val_1364 =  A[idx_off + 130] *  val_384;
 val_1365 =  A[idx_off + 131] *  val_385;
 val_1366 =  A[idx_off + 132] *  val_386;
 val_1367 =  A[idx_off + 133] *  val_387;
 val_1368 =  A[idx_off + 130] *  val_381;
 val_1369 =  A[idx_off + 131] *  val_388;
 val_1370 =  A[idx_off + 132] *  val_382;
 val_1371 =  A[idx_off + 133] *  val_389;
 val_1372 =  A[idx_off + 131] *  val_387;
 val_1373 =  A[idx_off + 132] *  val_381;
 val_1374 =  A[idx_off + 133] *  val_390;
 val_1375 =  A[idx_off + 0] *  val_1364;
 val_1376 =  A[idx_off + 0] *  val_1365;
 val_1377 =  A[idx_off + 8] *  val_1366;
 val_1378 =  A[idx_off + 3] *  val_1367;
 val_1379 =  A[idx_off + 0] *  val_1368;
 val_1380 =  A[idx_off + 0] *  val_1369;
 val_1381 =  A[idx_off + 8] *  val_1370;
 val_1382 =  A[idx_off + 3] *  val_1371;
 val_1383 =  A[idx_off + 0] *  val_1372;
 val_1384 =  A[idx_off + 8] *  val_1373;
 val_1385 =  A[idx_off + 3] *  val_1374;
 val_1386 =  A[idx_off + 10] *  val_1366;
 val_1387 =  A[idx_off + 15] *  val_1367;
 val_1388 =  A[idx_off + 10] *  val_1370;
 val_1389 =  A[idx_off + 15] *  val_1371;
 val_1390 =  A[idx_off + 10] *  val_1373;
 val_1391 =  A[idx_off + 15] *  val_1374;
 val_1392 =  A[idx_off + 12] *  val_1364;
 val_1393 =  A[idx_off + 12] *  val_1365;
 val_1394 =  A[idx_off + 0] *  val_1367;
 val_1395 =  A[idx_off + 12] *  val_1368;
 val_1396 =  A[idx_off + 12] *  val_1369;
 val_1397 =  A[idx_off + 0] *  val_1371;
 val_1398 =  A[idx_off + 12] *  val_1372;
 val_1399 =  A[idx_off + 0] *  val_1374;
 val_1400 =  val_1271 *  val_1375;
 val_1401 =  val_1272 *  val_1376;
 val_1402 =  val_1273 *  val_1377;
 val_1403 =  val_1274 *  val_1378;
 val_1404 =  val_1275 *  val_1375;
 val_1405 =  val_1276 *  val_1376;
 val_1406 =  val_1277 *  val_1377;
 val_1407 =  val_1278 *  val_1378;
 val_1408 =  val_1271 *  val_1379;
 val_1409 =  val_1272 *  val_1380;
 val_1410 =  val_1273 *  val_1381;
 val_1411 =  val_1274 *  val_1382;
 val_1412 =  val_1275 *  val_1379;
 val_1413 =  val_1276 *  val_1380;
 val_1414 =  val_1277 *  val_1381;
 val_1415 =  val_1278 *  val_1382;
 val_1416 =  val_1272 *  val_1383;
 val_1417 =  val_1273 *  val_1384;
 val_1418 =  val_1274 *  val_1385;
 val_1419 =  val_1276 *  val_1383;
 val_1420 =  val_1277 *  val_1384;
 val_1421 =  val_1278 *  val_1385;
 val_1422 =  val_1287 *  val_1375;
 val_1423 =  val_1288 *  val_1376;
 val_1424 =  val_1289 *  val_1386;
 val_1425 =  val_1290 *  val_1387;
 val_1426 =  val_1291 *  val_1375;
 val_1427 =  val_1292 *  val_1376;
 val_1428 =  val_1293 *  val_1386;
 val_1429 =  val_1294 *  val_1387;
 val_1430 =  val_1287 *  val_1379;
 val_1431 =  val_1288 *  val_1380;
 val_1432 =  val_1289 *  val_1388;
 val_1433 =  val_1290 *  val_1389;
 val_1434 =  val_1291 *  val_1379;
 val_1435 =  val_1292 *  val_1380;
 val_1436 =  val_1293 *  val_1388;
 val_1437 =  val_1294 *  val_1389;
 val_1438 =  val_1288 *  val_1383;
 val_1439 =  val_1289 *  val_1390;
 val_1440 =  val_1290 *  val_1391;
 val_1441 =  val_1292 *  val_1383;
 val_1442 =  val_1293 *  val_1390;
 val_1443 =  val_1294 *  val_1391;
 val_1444 =  val_1303 *  val_1392;
 val_1445 =  val_1304 *  val_1393;
 val_1446 =  val_1305 *  val_1377;
 val_1447 =  val_1306 *  val_1394;
 val_1448 =  val_1307 *  val_1392;
 val_1449 =  val_1308 *  val_1393;
 val_1450 =  val_1309 *  val_1377;
 val_1451 =  val_1310 *  val_1394;
 val_1452 =  val_1303 *  val_1395;
 val_1453 =  val_1304 *  val_1396;
 val_1454 =  val_1305 *  val_1381;
 val_1455 =  val_1306 *  val_1397;
 val_1456 =  val_1307 *  val_1395;
 val_1457 =  val_1308 *  val_1396;
 val_1458 =  val_1309 *  val_1381;
 val_1459 =  val_1310 *  val_1397;
 val_1460 =  val_1304 *  val_1398;
 val_1461 =  val_1305 *  val_1384;
 val_1462 =  val_1306 *  val_1399;
 val_1463 =  val_1308 *  val_1398;
 val_1464 =  val_1309 *  val_1384;
 val_1465 =  val_1310 *  val_1399;
 val_1466 =  val_1400 +  val_1401;
 val_1467 =  val_1402 +  val_1466;
 val_1468 =  val_1403 +  val_1467;
 val_1469 =  val_1404 +  val_1405;
 val_1470 =  val_1406 +  val_1469;
 val_1471 =  val_1407 +  val_1470;
 val_1472 =  val_1408 +  val_1409;
 val_1473 =  val_1410 +  val_1472;
 val_1474 =  val_1411 +  val_1473;
 val_1475 =  val_1412 +  val_1413;
 val_1476 =  val_1414 +  val_1475;
 val_1477 =  val_1415 +  val_1476;
 val_1478 =  val_1416 +  val_1417;
 val_1479 =  val_1418 +  val_1478;
 val_1480 =  val_1419 +  val_1420;
 val_1481 =  val_1421 +  val_1480;
 val_1482 =  val_1422 +  val_1423;
 val_1483 =  val_1424 +  val_1482;
 val_1484 =  val_1425 +  val_1483;
 val_1485 =  val_1426 +  val_1427;
 val_1486 =  val_1428 +  val_1485;
 val_1487 =  val_1429 +  val_1486;
 val_1488 =  val_1430 +  val_1431;
 val_1489 =  val_1432 +  val_1488;
 val_1490 =  val_1433 +  val_1489;
 val_1491 =  val_1434 +  val_1435;
 val_1492 =  val_1436 +  val_1491;
 val_1493 =  val_1437 +  val_1492;
 val_1494 =  val_1438 +  val_1439;
 val_1495 =  val_1440 +  val_1494;
 val_1496 =  val_1441 +  val_1442;
 val_1497 =  val_1443 +  val_1496;
 val_1498 =  val_1444 +  val_1445;
 val_1499 =  val_1446 +  val_1498;
 val_1500 =  val_1447 +  val_1499;
 val_1501 =  val_1448 +  val_1449;
 val_1502 =  val_1450 +  val_1501;
 val_1503 =  val_1451 +  val_1502;
 val_1504 =  val_1452 +  val_1453;
 val_1505 =  val_1454 +  val_1504;
 val_1506 =  val_1455 +  val_1505;
 val_1507 =  val_1456 +  val_1457;
 val_1508 =  val_1458 +  val_1507;
 val_1509 =  val_1459 +  val_1508;
 val_1510 =  val_1460 +  val_1461;
 val_1511 =  val_1462 +  val_1510;
 val_1512 =  val_1463 +  val_1464;
 val_1513 =  val_1465 +  val_1512;
 val_1514 =  A[idx_off + 43] *  val_1341;
 val_1515 =  A[idx_off + 43] *  val_1343;
 val_1516 =  A[idx_off + 43] *  val_1346;
 val_1517 =  A[idx_off + 43] *  val_1347;
 val_1518 =  A[idx_off + 44] *  val_1349;
 val_1519 =  A[idx_off + 44] *  val_1351;
 val_1520 =  A[idx_off + 44] *  val_1354;
 val_1521 =  A[idx_off + 44] *  val_1355;
 val_1522 =  A[idx_off + 45] *  val_1357;
 val_1523 =  A[idx_off + 45] *  val_1359;
 val_1524 =  A[idx_off + 45] *  val_1362;
 val_1525 =  A[idx_off + 45] *  val_1363;
 val_1526 =  val_1468 *  val_1514;
 val_1527 =  val_1471 *  val_1514;
 val_1528 =  val_1474 *  val_1515;
 val_1529 =  val_1477 *  val_1514;
 val_1530 =  val_1479 *  val_1516;
 val_1531 =  val_1481 *  val_1517;
 val_1532 =  val_1484 *  val_1518;
 val_1533 =  val_1487 *  val_1518;
 val_1534 =  val_1490 *  val_1519;
 val_1535 =  val_1493 *  val_1518;
 val_1536 =  val_1495 *  val_1520;
 val_1537 =  val_1497 *  val_1521;
 val_1538 =  val_1500 *  val_1522;
 val_1539 =  val_1503 *  val_1522;
 val_1540 =  val_1506 *  val_1523;
 val_1541 =  val_1509 *  val_1522;
 val_1542 =  val_1511 *  val_1524;
 val_1543 =  val_1513 *  val_1525;
 val_1544 =  val_1526 +  val_1532;
 val_1545 =  val_1527 +  val_1533;
 val_1546 =  val_1528 +  val_1534;
 val_1547 =  val_1529 +  val_1535;
 val_1548 =  val_1530 +  val_1536;
 val_1549 =  val_1531 +  val_1537;
 val_1550 =  val_1538 +  val_1544;
 val_1551 =  val_1539 +  val_1545;
 val_1552 =  val_1540 +  val_1546;
 val_1553 =  val_1541 +  val_1547;
 val_1554 =  val_1542 +  val_1548;
 val_1555 =  val_1543 +  val_1549;
 val_1556 =  A[idx_off + 122] *  val_1550;
 val_1557 =  A[idx_off + 123] *  val_1551;
 val_1558 =  A[idx_off + 122] *  val_1552;
 val_1559 =  A[idx_off + 123] *  val_1553;
 val_1560 =  A[idx_off + 122] *  val_1554;
 val_1561 =  A[idx_off + 123] *  val_1555;
 val_1562 =  val_1556 +  val_1557;
 val_1563 =  val_1558 +  val_1559;
 val_1564 =  val_1560 +  val_1561;
 val_1565 =  A[idx_off + 116] *  val_1562;
 val_1566 =  A[idx_off + 117] *  val_1563;
 val_1567 =  A[idx_off + 118] *  val_1564;
 val_1568 =  val_1565 +  val_1566;
 val_1569 =  val_1567 +  val_1568;
 A[i*n_inputs] += val_1569;
  }
  A[i*n_inputs] += val_1569;
}

int 
main(void)
{
    // Error code to check return values for CUDA calls
    cudaError_t err = cudaSuccess;
    
#define N_INPUTS 192
#define N_ARITH 1420
    const int n_inputs= N_INPUTS;
    const int n_arith= N_ARITH;
    const int batch_size= 1024;
    const int iter= 1024;
    const int thresh= n_arith/3;

    size_t size= batch_size * (n_inputs) * (iter) * sizeof(float);
    size_t size_idx= n_arith * sizeof(int);

    float *h_A= (float *)malloc(size);
    int *h_B= (int *)malloc(size_idx);
    int *h_C= (int *)malloc(size_idx);
    int *h_op_sel= (int *) malloc(size_idx);
    
    // Initialize the host input vectors
    for (int i = 0; i < n_arith; ++i)
    {
        if (i < thresh) {
          h_B[i] = rand() % (n_inputs); 
          h_C[i] = rand() % (n_inputs);  
        }
        else{
          h_B[i] = rand() % (i); 
          h_C[i] = rand() % (i);  
        }
        h_op_sel[i]= rand() % 2;
    }
    
    for (int i= 0; i < n_inputs; ++i) {
      for (int b =0; b< batch_size; ++b) {
        //h_A[b* n_inputs + i]= float(rand());
        h_A[b* n_inputs + i]= 0.5;
      }
    }

    // Allocate the device input vector A
    float *d_A = NULL;
    err = cudaMalloc((void **)&d_A, size);

    if (err != cudaSuccess)
    {
        fprintf(stderr, "Failed to allocate device vector A (error code %s)!\n", cudaGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    int *d_B = NULL;
    err = cudaMalloc((void **)&d_B, size_idx);

    if (err != cudaSuccess)
    {
        fprintf(stderr, "Failed to allocate device vector A (error code %s)!\n", cudaGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    int *d_C = NULL;
    err = cudaMalloc((void **)&d_C, size_idx);

    if (err != cudaSuccess)
    {
        fprintf(stderr, "Failed to allocate device vector A (error code %s)!\n", cudaGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    int *d_op_sel = NULL;
    err = cudaMalloc((void **)&d_op_sel, size_idx);

    if (err != cudaSuccess)
    {
        fprintf(stderr, "Failed to allocate device vector A (error code %s)!\n", cudaGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    // Copy the host input vectors A and B in host memory to the device input vectors in
    // device memory
    printf("Copy input data from the host memory to the CUDA device\n");
    err = cudaMemcpy(d_A, h_A, size, cudaMemcpyHostToDevice);
    if (err != cudaSuccess)
    {
        fprintf(stderr, "Failed to copy vector A from host to device (error code %s)!\n", cudaGetErrorString(err));
        exit(EXIT_FAILURE);
    }
    err = cudaMemcpy(d_B, h_B, size_idx, cudaMemcpyHostToDevice);
    if (err != cudaSuccess)
    {
        fprintf(stderr, "Failed to copy vector B from host to device (error code %s)!\n", cudaGetErrorString(err));
        exit(EXIT_FAILURE);
    }
    err = cudaMemcpy(d_C, h_C, size_idx, cudaMemcpyHostToDevice);
    if (err != cudaSuccess)
    {
        fprintf(stderr, "Failed to copy vector C from host to device (error code %s)!\n", cudaGetErrorString(err));
        exit(EXIT_FAILURE);
    }
    err = cudaMemcpy(d_op_sel, h_op_sel, size_idx, cudaMemcpyHostToDevice);
    if (err != cudaSuccess)
    {
        fprintf(stderr, "Failed to copy vector C from host to device (error code %s)!\n", cudaGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    // Launch the Vector Add CUDA Kernel
    int threadsPerBlock = 32;
    int blocksPerGrid= (batch_size + threadsPerBlock -1)/ threadsPerBlock;
    struct timeval t1, t2;

    // Perform Warmup
    ac<<<blocksPerGrid, threadsPerBlock>>>(d_A, d_B, d_C, d_op_sel, n_inputs, n_arith, thresh, iter);
    // FInish execution of kernel
    cudaDeviceSynchronize();
    
    gettimeofday(&t1, 0);

    printf("CUDA kernel launch with %d blocks of %d threads\n", blocksPerGrid, threadsPerBlock);
    ac<<<blocksPerGrid, threadsPerBlock>>>(d_A, d_B, d_C, d_op_sel, n_inputs, n_arith, thresh, iter);

    // FInish execution of kernel
    cudaDeviceSynchronize();
    gettimeofday(&t2, 0);
    
    double time = (1000000.0*(t2.tv_sec-t1.tv_sec) + t2.tv_usec-t1.tv_usec)/1000.0;
    
    printf("Time of kernel:  %3.4f ms \n", time);

    err = cudaGetLastError();
    if (err != cudaSuccess)
    {
        fprintf(stderr, "Failed to launch vectorAdd kernel (error code %s)!\n", cudaGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    printf("Throughput: %.3f Gops/sec, Batch: %d, nIter: %d, n_arith: %d\n", (((1.0*batch_size*iter*n_arith))/time)/10E6, batch_size, iter, n_arith);

    // Copy the device result vector in device memory to the host result vector
    // in host memory.
    printf("Copy output data from the CUDA device to the host memory\n");
    err = cudaMemcpy(h_A, d_A, size, cudaMemcpyDeviceToHost);
    if (err != cudaSuccess)
    {
        fprintf(stderr, "Failed to copy vector C from device to host (error code %s)!\n", cudaGetErrorString(err));
        exit(EXIT_FAILURE);
    }
    
    //for (int i=0; i<numElements; i++) {
    for (int i=0; i<32; i++) {
      printf("%d : %f,", i, h_A[i*n_inputs]);
    }

    err = cudaFree(d_A);
    err = cudaFree(d_B);
    err = cudaFree(d_C);

    free(h_A);
    free(h_B);
    free(h_C);

    printf("Done!\n");
    return 0;
}

	.file	"tmpxft_002851f9_00000000-6_ac_alarm.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB6562:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE6562:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z34__device_stub__Z2acPfPKiS1_S1_iiiiPfPKiS1_S1_iiii
	.type	_Z34__device_stub__Z2acPfPKiS1_S1_iiiiPfPKiS1_S1_iiii, @function
_Z34__device_stub__Z2acPfPKiS1_S1_iiiiPfPKiS1_S1_iiii:
.LFB6584:
	.cfi_startproc
	endbr64
	subq	$200, %rsp
	.cfi_def_cfa_offset 208
	movq	%rdi, 40(%rsp)
	leaq	72(%rsp), %rdi
	movq	%rsi, 32(%rsp)
	leaq	84(%rsp), %rsi
	movq	%rdx, 24(%rsp)
	leaq	56(%rsp), %rdx
	movq	%rcx, 16(%rsp)
	leaq	64(%rsp), %rcx
	movl	%r8d, 12(%rsp)
	movl	%r9d, 8(%rsp)
	movq	%fs:40, %rax
	movq	%rax, 184(%rsp)
	xorl	%eax, %eax
	leaq	40(%rsp), %rax
	movl	$1, 80(%rsp)
	movq	%rax, 120(%rsp)
	leaq	32(%rsp), %rax
	movq	%rax, 128(%rsp)
	leaq	24(%rsp), %rax
	movq	%rax, 136(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 144(%rsp)
	leaq	12(%rsp), %rax
	movq	%rax, 152(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 160(%rsp)
	leaq	208(%rsp), %rax
	movq	%rax, 168(%rsp)
	leaq	216(%rsp), %rax
	movq	%rax, 176(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 72(%rsp)
	movq	%rax, 84(%rsp)
	movl	$1, 92(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	64(%rsp)
	.cfi_def_cfa_offset 216
	leaq	_Z2acPfPKiS1_S1_iiii(%rip), %rdi
	pushq	64(%rsp)
	.cfi_def_cfa_offset 224
	movq	100(%rsp), %rcx
	movl	108(%rsp), %r8d
	movq	88(%rsp), %rsi
	movl	96(%rsp), %edx
	leaq	136(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 216
	popq	%rdx
	.cfi_def_cfa_offset 208
.L2:
	movq	184(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$200, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6584:
	.size	_Z34__device_stub__Z2acPfPKiS1_S1_iiiiPfPKiS1_S1_iiii, .-_Z34__device_stub__Z2acPfPKiS1_S1_iiiiPfPKiS1_S1_iiii
	.globl	_Z2acPfPKiS1_S1_iiii
	.type	_Z2acPfPKiS1_S1_iiii, @function
_Z2acPfPKiS1_S1_iiii:
.LFB6585:
	.cfi_startproc
	endbr64
	jmp	_Z34__device_stub__Z2acPfPKiS1_S1_iiiiPfPKiS1_S1_iiii
	.cfi_endproc
.LFE6585:
	.size	_Z2acPfPKiS1_S1_iiii, .-_Z2acPfPKiS1_S1_iiii
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"Failed to allocate device vector A (error code %s)!\n"
.LC2:
	.string	"Copy input data from the host memory to the CUDA device\n"
.LC3:
	.string	"Failed to copy vector A from host to device (error code %s)!\n"
.LC4:
	.string	"Failed to copy vector B from host to device (error code %s)!\n"
.LC5:
	.string	"Failed to copy vector C from host to device (error code %s)!\n"
.LC6:
	.string	"CUDA kernel launch with %d blocks of %d threads\n"
.LC9:
	.string	"Time of kernel:  %3.4f ms \n"
.LC10:
	.string	"Failed to launch vectorAdd kernel (error code %s)!\n"
.LC13:
	.string	"Throughput: %.3f Gops/sec, Batch: %d, nIter: %d, n_arith: %d\n"
.LC14:
	.string	"Copy output data from the CUDA device to the host memory\n"
.LC15:
	.string	"Failed to copy vector C from device to host (error code %s)!\n"
.LC16:
	.string	"%d : %f,"
.LC17:
	.string	"Done!\n"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB6559:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$805306368, %edi
	movl	$192, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	xorl	%ebx, %ebx
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	call	malloc@PLT
	movl	$5680, %edi
	movq	%rax, %rbp
	call	malloc@PLT
	movl	$5680, %edi
	movq	%rax, %r12
	call	malloc@PLT
	movl	$5680, %edi
	movq	%rax, %r13
	call	malloc@PLT
	movq	%rax, %r14
.L11:
	cmpq	$472, %rbx
	ja	.L9
	call	rand@PLT
	cltd
	idivl	%r15d
	movl	%edx, (%r12,%rbx,4)
	call	rand@PLT
	cltd
	idivl	%r15d
	jmp	.L10
.L9:
	call	rand@PLT
	movl	%ebx, 8(%rsp)
	cltd
	idivl	%ebx
	movl	%edx, (%r12,%rbx,4)
	call	rand@PLT
	movl	8(%rsp), %ecx
	cltd
	idivl	%ecx
.L10:
	movl	%edx, 0(%r13,%rbx,4)
	call	rand@PLT
	cltd
	movl	$2, %ecx
	idivl	%ecx
	movl	%edx, (%r14,%rbx,4)
	incq	%rbx
	cmpq	$1420, %rbx
	jne	.L11
	movss	.LC0(%rip), %xmm0
	movq	%rbp, %rcx
	xorl	%esi, %esi
.L12:
	movq	%rcx, %rdx
	movl	$1024, %eax
.L13:
	movss	%xmm0, (%rdx)
	addq	$768, %rdx
	decl	%eax
	jne	.L13
	incl	%esi
	addq	$4, %rcx
	cmpl	$192, %esi
	jne	.L12
	xorl	%r10d, %r10d
	leaq	24(%rsp), %rdi
	movl	$805306368, %esi
	movq	%r10, 24(%rsp)
	call	cudaMalloc@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	jne	.L37
	xorl	%r9d, %r9d
	leaq	32(%rsp), %rdi
	movl	$5680, %esi
	movq	%r9, 32(%rsp)
	call	cudaMalloc@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	jne	.L37
	xorl	%r8d, %r8d
	leaq	40(%rsp), %rdi
	movl	$5680, %esi
	movq	%r8, 40(%rsp)
	call	cudaMalloc@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	jne	.L37
	xorl	%edi, %edi
	movl	$5680, %esi
	movq	%rdi, 48(%rsp)
	leaq	48(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L18
.L37:
	call	cudaGetErrorString@PLT
	leaq	.LC1(%rip), %rdx
	movq	%rax, %rcx
	jmp	.L36
.L18:
	leaq	.LC2(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	24(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$805306368, %edx
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L19
	call	cudaGetErrorString@PLT
	leaq	.LC3(%rip), %rdx
	movq	%rax, %rcx
	jmp	.L36
.L19:
	movq	32(%rsp), %rdi
	movl	$1, %ecx
	movl	$5680, %edx
	movq	%r12, %rsi
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L20
	call	cudaGetErrorString@PLT
	leaq	.LC4(%rip), %rdx
	movq	%rax, %rcx
	jmp	.L36
.L20:
	movq	40(%rsp), %rdi
	movl	$1, %ecx
	movl	$5680, %edx
	movq	%r13, %rsi
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	jne	.L38
	movq	48(%rsp), %rdi
	movl	$1, %ecx
	movl	$5680, %edx
	movq	%r14, %rsi
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L22
.L38:
	call	cudaGetErrorString@PLT
	leaq	.LC5(%rip), %rdx
	movq	%rax, %rcx
	jmp	.L36
.L22:
	movl	$134217729, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movl	$1, %ecx
	salq	$5, %rdi
	movl	$1, %esi
	movl	$1, 96(%rsp)
	movq	%rdi, %rdx
	movq	%rdi, 88(%rsp)
	movq	%rdi, 72(%rsp)
	movl	$1, 80(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L23
	pushq	$1024
	.cfi_def_cfa_offset 184
	movl	$1420, %r9d
	movl	$192, %r8d
	pushq	$473
	.cfi_def_cfa_offset 192
	movq	64(%rsp), %rcx
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rsi
	movq	40(%rsp), %rdi
	call	_Z34__device_stub__Z2acPfPKiS1_S1_iiiiPfPKiS1_S1_iiii
	popq	%rcx
	.cfi_def_cfa_offset 184
	popq	%rsi
	.cfi_def_cfa_offset 176
.L23:
	call	cudaDeviceSynchronize@PLT
	xorl	%esi, %esi
	leaq	72(%rsp), %rdi
	call	gettimeofday@PLT
	movl	$32, %ecx
	movl	$32, %edx
	xorl	%eax, %eax
	leaq	.LC6(%rip), %rsi
	movl	$2, %edi
	call	__printf_chk@PLT
	movl	$134217729, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$5, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movl	$1, 96(%rsp)
	movq	%rdi, %rdx
	movq	%rdi, 88(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L24
	pushq	$1024
	.cfi_def_cfa_offset 184
	movl	$1420, %r9d
	movl	$192, %r8d
	pushq	$473
	.cfi_def_cfa_offset 192
	movq	64(%rsp), %rcx
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rsi
	movq	40(%rsp), %rdi
	call	_Z34__device_stub__Z2acPfPKiS1_S1_iiiiPfPKiS1_S1_iiii
	popq	%rax
	.cfi_def_cfa_offset 184
	popq	%rdx
	.cfi_def_cfa_offset 176
.L24:
	call	cudaDeviceSynchronize@PLT
	leaq	88(%rsp), %rdi
	xorl	%esi, %esi
	call	gettimeofday@PLT
	movq	88(%rsp), %rax
	subq	72(%rsp), %rax
	movl	$2, %edi
	cvtsi2sdq	%rax, %xmm0
	leaq	.LC9(%rip), %rsi
	movb	$1, %al
	mulsd	.LC7(%rip), %xmm0
	cvtsi2sdq	96(%rsp), %xmm1
	addsd	%xmm1, %xmm0
	cvtsi2sdq	80(%rsp), %xmm1
	subsd	%xmm1, %xmm0
	divsd	.LC8(%rip), %xmm0
	movsd	%xmm0, 8(%rsp)
	call	__printf_chk@PLT
	call	cudaGetLastError@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L25
	call	cudaGetErrorString@PLT
	leaq	.LC10(%rip), %rdx
	movq	%rax, %rcx
	jmp	.L36
.L25:
	movl	$1420, %r8d
	movl	$1024, %ecx
	movb	$1, %al
	xorl	%ebx, %ebx
	movl	$1024, %edx
	leaq	.LC13(%rip), %rsi
	movl	$2, %edi
	movsd	.LC11(%rip), %xmm0
	divsd	8(%rsp), %xmm0
	divsd	.LC12(%rip), %xmm0
	call	__printf_chk@PLT
	xorl	%eax, %eax
	leaq	.LC14(%rip), %rsi
	movl	$2, %edi
	leaq	.LC16(%rip), %r14
	call	__printf_chk@PLT
	movq	24(%rsp), %rsi
	movq	%rbp, %rdi
	movl	$2, %ecx
	movl	$805306368, %edx
	call	cudaMemcpy@PLT
	movl	%eax, %edi
	testl	%eax, %eax
	je	.L26
	call	cudaGetErrorString@PLT
	leaq	.LC15(%rip), %rdx
	movq	%rax, %rcx
.L36:
	movq	stderr(%rip), %rdi
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L26:
	imulq	$768, %rbx, %rax
	movl	%ebx, %edx
	movq	%r14, %rsi
	movl	$2, %edi
	incq	%rbx
	cvtss2sd	0(%rbp,%rax), %xmm0
	movb	$1, %al
	call	__printf_chk@PLT
	cmpq	$32, %rbx
	jne	.L26
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	%r13, %rdi
	call	free@PLT
	xorl	%eax, %eax
	movl	$2, %edi
	leaq	.LC17(%rip), %rsi
	call	__printf_chk@PLT
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L27
	call	__stack_chk_fail@PLT
.L27:
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE6559:
	.size	main, .-main
	.section	.rodata.str1.1
.LC18:
	.string	"_Z2acPfPKiS1_S1_iiii"
.LC19:
	.string	"_ZN42_INTERNAL_3d5ad0c0_11_ac_alarm_cu_8ffa9c794cuda3std3__419piecewise_constructE"
.LC20:
	.string	"_ZN42_INTERNAL_3d5ad0c0_11_ac_alarm_cu_8ffa9c794cuda3std6ranges3__45__cpo4swapE"
.LC21:
	.string	"_ZN42_INTERNAL_3d5ad0c0_11_ac_alarm_cu_8ffa9c794cuda3std6ranges3__45__cpo9iter_moveE"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB6587:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC18(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z2acPfPKiS1_S1_iiii(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC19(%rip), %rdx
	movl	$1, %r9d
	leaq	_ZN4cuda3std3__419piecewise_constructE(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	call	__cudaRegisterVar@PLT
	popq	%rax
	.cfi_def_cfa_offset 24
	popq	%rdx
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC20(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movq	%rdx, %rcx
	movl	$1, %r9d
	leaq	_ZN4cuda3std6ranges3__45__cpo4swapE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rcx
	.cfi_def_cfa_offset 24
	popq	%rsi
	.cfi_def_cfa_offset 16
	pushq	$0
	.cfi_def_cfa_offset 24
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC21(%rip), %rdx
	movq	%rbx, %rdi
	xorl	%r8d, %r8d
	movl	$1, %r9d
	movq	%rdx, %rcx
	leaq	_ZN4cuda3std6ranges3__45__cpo9iter_moveE(%rip), %rsi
	call	__cudaRegisterVar@PLT
	popq	%rdi
	.cfi_def_cfa_offset 24
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	popq	%r8
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE6587:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.weak	_ZN4cuda3std3__419piecewise_constructE
	.section	.rodata._ZN4cuda3std3__419piecewise_constructE,"aG",@progbits,_ZN4cuda3std3__419piecewise_constructE,comdat
	.type	_ZN4cuda3std3__419piecewise_constructE, @gnu_unique_object
	.size	_ZN4cuda3std3__419piecewise_constructE, 1
_ZN4cuda3std3__419piecewise_constructE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo9iter_moveE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo9iter_moveE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo9iter_moveE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo9iter_moveE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo9iter_moveE, 1
_ZN4cuda3std6ranges3__45__cpo9iter_moveE:
	.zero	1
	.weak	_ZN4cuda3std6ranges3__45__cpo4swapE
	.section	.rodata._ZN4cuda3std6ranges3__45__cpo4swapE,"aG",@progbits,_ZN4cuda3std6ranges3__45__cpo4swapE,comdat
	.type	_ZN4cuda3std6ranges3__45__cpo4swapE, @gnu_unique_object
	.size	_ZN4cuda3std6ranges3__45__cpo4swapE, 1
_ZN4cuda3std6ranges3__45__cpo4swapE:
	.zero	1
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC0:
	.long	1056964608
	.section	.rodata.cst8,"aM",@progbits,8
	.align 8
.LC7:
	.long	0
	.long	1093567616
	.align 8
.LC8:
	.long	0
	.long	1083129856
	.align 8
.LC11:
	.long	0
	.long	1104556032
	.align 8
.LC12:
	.long	0
	.long	1097011920
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <stdio.h>
#include <stdlib.h>
// For the CUDA runtime routines (prefixed with "cuda_")
#include <hip/hip_runtime.h>
#include <sys/time.h>
#include <hip/hip_cooperative_groups.h>


__global__ void
ac(float *A, const int *B, const int *C, const int *op_sel, int n_inputs, const int n_arith, int thresh, int iter) {
  int i= blockDim.x * blockIdx.x + threadIdx.x;
  
  int idx_off= i*n_inputs;
  
  float val_146, val_147, val_148, val_149, val_150, val_151, val_152, val_153, val_154, val_155, val_156, val_157, val_158, val_159, val_160, val_161, val_162, val_163, val_164, val_165, val_166, val_167, val_168, val_169, val_170, val_171, val_172, val_173, val_174, val_175, val_176, val_177, val_178, val_179, val_180, val_181, val_182, val_183, val_184, val_185, val_186, val_187, val_188, val_189, val_190, val_191, val_192, val_193, val_194, val_195, val_196, val_197, val_198, val_199, val_200, val_201, val_202, val_203, val_204, val_205, val_206, val_207, val_208, val_209, val_210, val_211, val_212, val_213, val_214, val_215, val_216, val_217, val_218, val_219, val_220, val_221, val_222, val_223, val_224, val_225, val_226, val_227, val_228, val_229, val_230, val_231, val_232, val_233, val_234, val_235, val_236, val_237, val_238, val_239, val_240, val_241, val_242, val_243, val_244, val_245, val_246, val_247, val_248, val_249, val_250, val_251, val_252, val_253, val_254, val_255, val_256, val_257, val_258, val_259, val_260, val_261, val_262, val_263, val_264, val_265, val_266, val_267, val_268, val_269, val_270, val_271, val_272, val_273, val_274, val_275, val_276, val_277, val_278, val_279, val_280, val_281, val_282, val_283, val_284, val_285, val_286, val_287, val_288, val_289, val_290, val_291, val_292, val_293, val_294, val_295, val_296, val_297, val_298, val_299, val_300, val_301, val_302, val_303, val_304, val_305, val_306, val_307, val_308, val_309, val_310, val_311, val_312, val_313, val_314, val_315, val_316, val_317, val_318, val_319, val_320, val_321, val_322, val_323, val_324, val_325, val_326, val_327, val_328, val_329, val_330, val_331, val_332, val_333, val_334, val_335, val_336, val_337, val_338, val_339, val_340, val_341, val_342, val_343, val_344, val_345, val_346, val_347, val_348, val_349, val_350, val_351, val_352, val_353, val_354, val_355, val_356, val_357, val_358, val_359, val_360, val_361, val_362, val_363, val_364, val_365, val_366, val_367, val_368, val_369, val_370, val_371, val_372, val_373, val_374, val_375, val_376, val_377, val_378, val_379, val_380, val_381, val_382, val_383, val_384, val_385, val_386, val_387, val_388, val_389, val_390, val_391, val_392, val_393, val_394, val_395, val_396, val_397, val_398, val_399, val_400, val_401, val_402, val_403, val_404, val_405, val_406, val_407, val_408, val_409, val_410, val_411, val_412, val_413, val_414, val_415, val_416, val_417, val_418, val_419, val_420, val_421, val_422, val_423, val_424, val_425, val_426, val_427, val_428, val_429, val_430, val_431, val_432, val_433, val_434, val_435, val_436, val_437, val_438, val_439, val_440, val_441, val_442, val_443, val_444, val_445, val_446, val_447, val_448, val_449, val_450, val_451, val_452, val_453, val_454, val_455, val_456, val_457, val_458, val_459, val_460, val_461, val_462, val_463, val_464, val_465, val_466, val_467, val_468, val_469, val_470, val_471, val_472, val_473, val_474, val_475, val_476, val_477, val_478, val_479, val_480, val_481, val_482, val_483, val_484, val_485, val_486, val_487, val_488, val_489, val_490, val_491, val_492, val_493, val_494, val_495, val_496, val_497, val_498, val_499, val_500, val_501, val_502, val_503, val_504, val_505, val_506, val_507, val_508, val_509, val_510, val_511, val_512, val_513, val_514, val_515, val_516, val_517, val_518, val_519, val_520, val_521, val_522, val_523, val_524, val_525, val_526, val_527, val_528, val_529, val_530, val_531, val_532, val_533, val_534, val_535, val_536, val_537, val_538, val_539, val_540, val_541, val_542, val_543, val_544, val_545, val_546, val_547, val_548, val_549, val_550, val_551, val_552, val_553, val_554, val_555, val_556, val_557, val_558, val_559, val_560, val_561, val_562, val_563, val_564, val_565, val_566, val_567, val_568, val_569, val_570, val_571, val_572, val_573, val_574, val_575, val_576, val_577, val_578, val_579, val_580, val_581, val_582, val_583, val_584, val_585, val_586, val_587, val_588, val_589, val_590, val_591, val_592, val_593, val_594, val_595, val_596, val_597, val_598, val_599, val_600, val_601, val_602, val_603, val_604, val_605, val_606, val_607, val_608, val_609, val_610, val_611, val_612, val_613, val_614, val_615, val_616, val_617, val_618, val_619, val_620, val_621, val_622, val_623, val_624, val_625, val_626, val_627, val_628, val_629, val_630, val_631, val_632, val_633, val_634, val_635, val_636, val_637, val_638, val_639, val_640, val_641, val_642, val_643, val_644, val_645, val_646, val_647, val_648, val_649, val_650, val_651, val_652, val_653, val_654, val_655, val_656, val_657, val_658, val_659, val_660, val_661, val_662, val_663, val_664, val_665, val_666, val_667, val_668, val_669, val_670, val_671, val_672, val_673, val_674, val_675, val_676, val_677, val_678, val_679, val_680, val_681, val_682, val_683, val_684, val_685, val_686, val_687, val_688, val_689, val_690, val_691, val_692, val_693, val_694, val_695, val_696, val_697, val_698, val_699, val_700, val_701, val_702, val_703, val_704, val_705, val_706, val_707, val_708, val_709, val_710, val_711, val_712, val_713, val_714, val_715, val_716, val_717, val_718, val_719, val_720, val_721, val_722, val_723, val_724, val_725, val_726, val_727, val_728, val_729, val_730, val_731, val_732, val_733, val_734, val_735, val_736, val_737, val_738, val_739, val_740, val_741, val_742, val_743, val_744, val_745, val_746, val_747, val_748, val_749, val_750, val_751, val_752, val_753, val_754, val_755, val_756, val_757, val_758, val_759, val_760, val_761, val_762, val_763, val_764, val_765, val_766, val_767, val_768, val_769, val_770, val_771, val_772, val_773, val_774, val_775, val_776, val_777, val_778, val_779, val_780, val_781, val_782, val_783, val_784, val_785, val_786, val_787, val_788, val_789, val_790, val_791, val_792, val_793, val_794, val_795, val_796, val_797, val_798, val_799, val_800, val_801, val_802, val_803, val_804, val_805, val_806, val_807, val_808, val_809, val_810, val_811, val_812, val_813, val_814, val_815, val_816, val_817, val_818, val_819, val_820, val_821, val_822, val_823, val_824, val_825, val_826, val_827, val_828, val_829, val_830, val_831, val_832, val_833, val_834, val_835, val_836, val_837, val_838, val_839, val_840, val_841, val_842, val_843, val_844, val_845, val_846, val_847, val_848, val_849, val_850, val_851, val_852, val_853, val_854, val_855, val_856, val_857, val_858, val_859, val_860, val_861, val_862, val_863, val_864, val_865, val_866, val_867, val_868, val_869, val_870, val_871, val_872, val_873, val_874, val_875, val_876, val_877, val_878, val_879, val_880, val_881, val_882, val_883, val_884, val_885, val_886, val_887, val_888, val_889, val_890, val_891, val_892, val_893, val_894, val_895, val_896, val_897, val_898, val_899, val_900, val_901, val_902, val_903, val_904, val_905, val_906, val_907, val_908, val_909, val_910, val_911, val_912, val_913, val_914, val_915, val_916, val_917, val_918, val_919, val_920, val_921, val_922, val_923, val_924, val_925, val_926, val_927, val_928, val_929, val_930, val_931, val_932, val_933, val_934, val_935, val_936, val_937, val_938, val_939, val_940, val_941, val_942, val_943, val_944, val_945, val_946, val_947, val_948, val_949, val_950, val_951, val_952, val_953, val_954, val_955, val_956, val_957, val_958, val_959, val_960, val_961, val_962, val_963, val_964, val_965, val_966, val_967, val_968, val_969, val_970, val_971, val_972, val_973, val_974, val_975, val_976, val_977, val_978, val_979, val_980, val_981, val_982, val_983, val_984, val_985, val_986, val_987, val_988, val_989, val_990, val_991, val_992, val_993, val_994, val_995, val_996, val_997, val_998, val_999, val_1000, val_1001, val_1002, val_1003, val_1004, val_1005, val_1006, val_1007, val_1008, val_1009, val_1010, val_1011, val_1012, val_1013, val_1014, val_1015, val_1016, val_1017, val_1018, val_1019, val_1020, val_1021, val_1022, val_1023, val_1024, val_1025, val_1026, val_1027, val_1028, val_1029, val_1030, val_1031, val_1032, val_1033, val_1034, val_1035, val_1036, val_1037, val_1038, val_1039, val_1040, val_1041, val_1042, val_1043, val_1044, val_1045, val_1046, val_1047, val_1048, val_1049, val_1050, val_1051, val_1052, val_1053, val_1054, val_1055, val_1056, val_1057, val_1058, val_1059, val_1060, val_1061, val_1062, val_1063, val_1064, val_1065, val_1066, val_1067, val_1068, val_1069, val_1070, val_1071, val_1072, val_1073, val_1074, val_1075, val_1076, val_1077, val_1078, val_1079, val_1080, val_1081, val_1082, val_1083, val_1084, val_1085, val_1086, val_1087, val_1088, val_1089, val_1090, val_1091, val_1092, val_1093, val_1094, val_1095, val_1096, val_1097, val_1098, val_1099, val_1100, val_1101, val_1102, val_1103, val_1104, val_1105, val_1106, val_1107, val_1108, val_1109, val_1110, val_1111, val_1112, val_1113, val_1114, val_1115, val_1116, val_1117, val_1118, val_1119, val_1120, val_1121, val_1122, val_1123, val_1124, val_1125, val_1126, val_1127, val_1128, val_1129, val_1130, val_1131, val_1132, val_1133, val_1134, val_1135, val_1136, val_1137, val_1138, val_1139, val_1140, val_1141, val_1142, val_1143, val_1144, val_1145, val_1146, val_1147, val_1148, val_1149, val_1150, val_1151, val_1152, val_1153, val_1154, val_1155, val_1156, val_1157, val_1158, val_1159, val_1160, val_1161, val_1162, val_1163, val_1164, val_1165, val_1166, val_1167, val_1168, val_1169, val_1170, val_1171, val_1172, val_1173, val_1174, val_1175, val_1176, val_1177, val_1178, val_1179, val_1180, val_1181, val_1182, val_1183, val_1184, val_1185, val_1186, val_1187, val_1188, val_1189, val_1190, val_1191, val_1192, val_1193, val_1194, val_1195, val_1196, val_1197, val_1198, val_1199, val_1200, val_1201, val_1202, val_1203, val_1204, val_1205, val_1206, val_1207, val_1208, val_1209, val_1210, val_1211, val_1212, val_1213, val_1214, val_1215, val_1216, val_1217, val_1218, val_1219, val_1220, val_1221, val_1222, val_1223, val_1224, val_1225, val_1226, val_1227, val_1228, val_1229, val_1230, val_1231, val_1232, val_1233, val_1234, val_1235, val_1236, val_1237, val_1238, val_1239, val_1240, val_1241, val_1242, val_1243, val_1244, val_1245, val_1246, val_1247, val_1248, val_1249, val_1250, val_1251, val_1252, val_1253, val_1254, val_1255, val_1256, val_1257, val_1258, val_1259, val_1260, val_1261, val_1262, val_1263, val_1264, val_1265, val_1266, val_1267, val_1268, val_1269, val_1270, val_1271, val_1272, val_1273, val_1274, val_1275, val_1276, val_1277, val_1278, val_1279, val_1280, val_1281, val_1282, val_1283, val_1284, val_1285, val_1286, val_1287, val_1288, val_1289, val_1290, val_1291, val_1292, val_1293, val_1294, val_1295, val_1296, val_1297, val_1298, val_1299, val_1300, val_1301, val_1302, val_1303, val_1304, val_1305, val_1306, val_1307, val_1308, val_1309, val_1310, val_1311, val_1312, val_1313, val_1314, val_1315, val_1316, val_1317, val_1318, val_1319, val_1320, val_1321, val_1322, val_1323, val_1324, val_1325, val_1326, val_1327, val_1328, val_1329, val_1330, val_1331, val_1332, val_1333, val_1334, val_1335, val_1336, val_1337, val_1338, val_1339, val_1340, val_1341, val_1342, val_1343, val_1344, val_1345, val_1346, val_1347, val_1348, val_1349, val_1350, val_1351, val_1352, val_1353, val_1354, val_1355, val_1356, val_1357, val_1358, val_1359, val_1360, val_1361, val_1362, val_1363, val_1364, val_1365, val_1366, val_1367, val_1368, val_1369, val_1370, val_1371, val_1372, val_1373, val_1374, val_1375, val_1376, val_1377, val_1378, val_1379, val_1380, val_1381, val_1382, val_1383, val_1384, val_1385, val_1386, val_1387, val_1388, val_1389, val_1390, val_1391, val_1392, val_1393, val_1394, val_1395, val_1396, val_1397, val_1398, val_1399, val_1400, val_1401, val_1402, val_1403, val_1404, val_1405, val_1406, val_1407, val_1408, val_1409, val_1410, val_1411, val_1412, val_1413, val_1414, val_1415, val_1416, val_1417, val_1418, val_1419, val_1420, val_1421, val_1422, val_1423, val_1424, val_1425, val_1426, val_1427, val_1428, val_1429, val_1430, val_1431, val_1432, val_1433, val_1434, val_1435, val_1436, val_1437, val_1438, val_1439, val_1440, val_1441, val_1442, val_1443, val_1444, val_1445, val_1446, val_1447, val_1448, val_1449, val_1450, val_1451, val_1452, val_1453, val_1454, val_1455, val_1456, val_1457, val_1458, val_1459, val_1460, val_1461, val_1462, val_1463, val_1464, val_1465, val_1466, val_1467, val_1468, val_1469, val_1470, val_1471, val_1472, val_1473, val_1474, val_1475, val_1476, val_1477, val_1478, val_1479, val_1480, val_1481, val_1482, val_1483, val_1484, val_1485, val_1486, val_1487, val_1488, val_1489, val_1490, val_1491, val_1492, val_1493, val_1494, val_1495, val_1496, val_1497, val_1498, val_1499, val_1500, val_1501, val_1502, val_1503, val_1504, val_1505, val_1506, val_1507, val_1508, val_1509, val_1510, val_1511, val_1512, val_1513, val_1514, val_1515, val_1516, val_1517, val_1518, val_1519, val_1520, val_1521, val_1522, val_1523, val_1524, val_1525, val_1526, val_1527, val_1528, val_1529, val_1530, val_1531, val_1532, val_1533, val_1534, val_1535, val_1536, val_1537, val_1538, val_1539, val_1540, val_1541, val_1542, val_1543, val_1544, val_1545, val_1546, val_1547, val_1548, val_1549, val_1550, val_1551, val_1552, val_1553, val_1554, val_1555, val_1556, val_1557, val_1558, val_1559, val_1560, val_1561, val_1562, val_1563, val_1564, val_1565, val_1566, val_1567, val_1568, val_1569;
  
  for (int k=0; k<iter; k++) {
    idx_off = i*(n_inputs * iter) + n_inputs*k; 
 val_146 =  A[idx_off + 3] *  A[idx_off + 69];
 val_147 =  A[idx_off + 0] *  A[idx_off + 69];
 val_148 =  A[idx_off + 2] *  A[idx_off + 70];
 val_149 =  A[idx_off + 1] *  A[idx_off + 70];
 val_150 =  val_146 +  val_148;
 val_151 =  val_147 +  val_149;
 val_152 =  A[idx_off + 0] *  A[idx_off + 104];
 val_153 =  A[idx_off + 4] *  A[idx_off + 104];
 val_154 =  A[idx_off + 16] *  A[idx_off + 105];
 val_155 =  A[idx_off + 3] *  A[idx_off + 105];
 val_156 =  A[idx_off + 7] *  A[idx_off + 106];
 val_157 =  A[idx_off + 4] *  A[idx_off + 106];
 val_158 =  val_152 +  val_154;
 val_159 =  val_153 +  val_155;
 val_160 =  val_156 +  val_158;
 val_161 =  val_157 +  val_159;
 val_162 =  A[idx_off + 0] *  A[idx_off + 41];
 val_163 =  A[idx_off + 1] *  A[idx_off + 42];
 val_164 =  A[idx_off + 12] *  val_162;
 val_165 =  A[idx_off + 0] *  val_162;
 val_166 =  A[idx_off + 13] *  val_163;
 val_167 =  A[idx_off + 14] *  val_163;
 val_168 =  val_164 +  val_166;
 val_169 =  val_165 +  val_167;
 val_170 =  val_165 +  val_166;
 val_171 =  A[idx_off + 5] *  A[idx_off + 54];
 val_172 =  A[idx_off + 8] *  A[idx_off + 54];
 val_173 =  A[idx_off + 0] *  A[idx_off + 54];
 val_174 =  A[idx_off + 8] *  A[idx_off + 55];
 val_175 =  A[idx_off + 5] *  A[idx_off + 55];
 val_176 =  A[idx_off + 17] *  A[idx_off + 55];
 val_177 =  A[idx_off + 0] *  A[idx_off + 56];
 val_178 =  A[idx_off + 18] *  A[idx_off + 56];
 val_179 =  val_171 +  val_174;
 val_180 =  val_172 +  val_175;
 val_181 =  val_173 +  val_176;
 val_182 =  val_177 +  val_179;
 val_183 =  val_177 +  val_180;
 val_184 =  val_178 +  val_181;
 val_185 =  A[idx_off + 5] *  A[idx_off + 107];
 val_186 =  A[idx_off + 8] *  A[idx_off + 108];
 val_187 =  A[idx_off + 0] *  A[idx_off + 109];
 val_188 =  A[idx_off + 8] *  A[idx_off + 107];
 val_189 =  A[idx_off + 5] *  A[idx_off + 108];
 val_190 =  A[idx_off + 0] *  A[idx_off + 107];
 val_191 =  A[idx_off + 5] *  A[idx_off + 109];
 val_192 =  val_185 +  val_186;
 val_193 =  val_187 +  val_192;
 val_194 =  val_188 +  val_189;
 val_195 =  val_187 +  val_194;
 val_196 =  val_186 +  val_190;
 val_197 =  val_191 +  val_196;
 val_198 =  A[idx_off + 92] *  val_182;
 val_199 =  A[idx_off + 93] *  val_183;
 val_200 =  A[idx_off + 94] *  val_184;
 val_201 =  val_193 *  val_198;
 val_202 =  val_195 *  val_199;
 val_203 =  val_197 *  val_200;
 val_204 =  A[idx_off + 5] *  val_201;
 val_205 =  A[idx_off + 0] *  val_201;
 val_206 =  A[idx_off + 8] *  val_202;
 val_207 =  A[idx_off + 15] *  val_202;
 val_208 =  A[idx_off + 0] *  val_203;
 val_209 =  A[idx_off + 3] *  val_203;
 val_210 =  A[idx_off + 12] *  val_201;
 val_211 =  A[idx_off + 4] *  val_201;
 val_212 =  A[idx_off + 0] *  val_202;
 val_213 =  A[idx_off + 3] *  val_202;
 val_214 =  A[idx_off + 4] *  val_203;
 val_215 =  val_204 +  val_206;
 val_216 =  val_205 +  val_207;
 val_217 =  val_208 +  val_215;
 val_218 =  val_209 +  val_216;
 val_219 =  val_210 +  val_212;
 val_220 =  val_211 +  val_213;
 val_221 =  val_208 +  val_219;
 val_222 =  val_214 +  val_220;
 val_223 =  A[idx_off + 4] *  A[idx_off + 95];
 val_224 =  A[idx_off + 5] *  A[idx_off + 96];
 val_225 =  val_150 *  val_223;
 val_226 =  val_151 *  val_224;
 val_227 =  val_217 *  val_225;
 val_228 =  val_218 *  val_226;
 val_229 =  val_221 *  val_225;
 val_230 =  val_222 *  val_226;
 val_231 =  A[idx_off + 12] *  val_227;
 val_232 =  A[idx_off + 0] *  val_227;
 val_233 =  A[idx_off + 20] *  val_228;
 val_234 =  A[idx_off + 21] *  val_228;
 val_235 =  A[idx_off + 0] *  val_228;
 val_236 =  A[idx_off + 5] *  val_229;
 val_237 =  A[idx_off + 8] *  val_229;
 val_238 =  A[idx_off + 0] *  val_229;
 val_239 =  A[idx_off + 4] *  val_230;
 val_240 =  A[idx_off + 3] *  val_230;
 val_241 =  val_231 +  val_233;
 val_242 =  val_232 +  val_234;
 val_243 =  val_232 +  val_235;
 val_244 =  val_236 +  val_239;
 val_245 =  val_237 +  val_240;
 val_246 =  val_238 +  val_239;
 val_247 =  A[idx_off + 6] *  A[idx_off + 83];
 val_248 =  A[idx_off + 7] *  A[idx_off + 84];
 val_249 =  val_241 *  val_247;
 val_250 =  val_242 *  val_247;
 val_251 =  val_243 *  val_247;
 val_252 =  val_244 *  val_248;
 val_253 =  val_245 *  val_248;
 val_254 =  val_246 *  val_248;
 val_255 =  val_249 +  val_252;
 val_256 =  val_250 +  val_253;
 val_257 =  val_251 +  val_254;
 val_258 =  A[idx_off + 0] *  A[idx_off + 114];
 val_259 =  A[idx_off + 1] *  A[idx_off + 115];
 val_260 =  val_160 *  val_258;
 val_261 =  val_161 *  val_259;
 val_262 =  A[idx_off + 2] *  val_260;
 val_263 =  A[idx_off + 3] *  val_260;
 val_264 =  A[idx_off + 5] *  val_261;
 val_265 =  A[idx_off + 4] *  val_261;
 val_266 =  A[idx_off + 0] *  val_260;
 val_267 =  A[idx_off + 1] *  val_260;
 val_268 =  val_262 +  val_264;
 val_269 =  val_263 +  val_265;
 val_270 =  val_265 +  val_266;
 val_271 =  val_264 +  val_267;
 val_272 =  A[idx_off + 4] *  A[idx_off + 101];
 val_273 =  A[idx_off + 3] *  A[idx_off + 102];
 val_274 =  A[idx_off + 4] *  A[idx_off + 103];
 val_275 =  A[idx_off + 4] *  val_272;
 val_276 =  A[idx_off + 19] *  val_272;
 val_277 =  A[idx_off + 0] *  val_272;
 val_278 =  A[idx_off + 4] *  val_273;
 val_279 =  A[idx_off + 0] *  val_273;
 val_280 =  A[idx_off + 19] *  val_273;
 val_281 =  A[idx_off + 4] *  val_274;
 val_282 =  A[idx_off + 0] *  val_274;
 val_283 =  A[idx_off + 19] *  val_274;
 val_284 =  val_275 +  val_278;
 val_285 =  val_276 +  val_279;
 val_286 =  val_277 +  val_280;
 val_287 =  val_277 +  val_279;
 val_288 =  val_281 +  val_284;
 val_289 =  val_282 +  val_285;
 val_290 =  val_282 +  val_286;
 val_291 =  val_283 +  val_287;
 val_292 =  A[idx_off + 22] *  A[idx_off + 80];
 val_293 =  A[idx_off + 22] *  A[idx_off + 81];
 val_294 =  A[idx_off + 22] *  A[idx_off + 82];
 val_295 =  A[idx_off + 0] *  A[idx_off + 80];
 val_296 =  A[idx_off + 12] *  A[idx_off + 81];
 val_297 =  A[idx_off + 0] *  A[idx_off + 82];
 val_298 =  A[idx_off + 12] *  A[idx_off + 80];
 val_299 =  A[idx_off + 0] *  A[idx_off + 81];
 val_300 =  A[idx_off + 12] *  A[idx_off + 82];
 val_301 =  val_292 +  val_293;
 val_302 =  val_294 +  val_301;
 val_303 =  val_295 +  val_296;
 val_304 =  val_297 +  val_303;
 val_305 =  val_298 +  val_299;
 val_306 =  val_297 +  val_305;
 val_307 =  val_295 +  val_299;
 val_308 =  val_300 +  val_307;
 val_309 =  A[idx_off + 4] *  A[idx_off + 61];
 val_310 =  A[idx_off + 5] *  A[idx_off + 62];
 val_311 =  A[idx_off + 12] *  val_309;
 val_312 =  A[idx_off + 0] *  val_309;
 val_313 =  A[idx_off + 13] *  val_309;
 val_314 =  A[idx_off + 14] *  val_309;
 val_315 =  A[idx_off + 14] *  val_310;
 val_316 =  A[idx_off + 23] *  val_310;
 val_317 =  A[idx_off + 0] *  val_310;
 val_318 =  A[idx_off + 12] *  val_310;
 val_319 =  val_311 +  val_315;
 val_320 =  val_312 +  val_316;
 val_321 =  val_312 +  val_317;
 val_322 =  val_313 +  val_318;
 val_323 =  val_314 +  val_317;
 val_324 =  val_313 +  val_317;
 val_325 =  val_311 +  val_317;
 val_326 =  val_312 +  val_318;
 val_327 =  A[idx_off + 74] *  val_319;
 val_328 =  A[idx_off + 75] *  val_320;
 val_329 =  A[idx_off + 76] *  val_321;
 val_330 =  A[idx_off + 74] *  val_322;
 val_331 =  A[idx_off + 75] *  val_323;
 val_332 =  A[idx_off + 76] *  val_324;
 val_333 =  A[idx_off + 74] *  val_321;
 val_334 =  A[idx_off + 75] *  val_325;
 val_335 =  A[idx_off + 76] *  val_326;
 val_336 =  val_327 +  val_328;
 val_337 =  val_329 +  val_336;
 val_338 =  val_330 +  val_331;
 val_339 =  val_332 +  val_338;
 val_340 =  val_333 +  val_334;
 val_341 =  val_335 +  val_340;
 val_342 =  A[idx_off + 22] *  A[idx_off + 77];
 val_343 =  A[idx_off + 22] *  A[idx_off + 78];
 val_344 =  A[idx_off + 22] *  A[idx_off + 79];
 val_345 =  A[idx_off + 0] *  A[idx_off + 77];
 val_346 =  A[idx_off + 12] *  A[idx_off + 78];
 val_347 =  A[idx_off + 0] *  A[idx_off + 79];
 val_348 =  A[idx_off + 12] *  A[idx_off + 77];
 val_349 =  A[idx_off + 0] *  A[idx_off + 78];
 val_350 =  A[idx_off + 12] *  A[idx_off + 79];
 val_351 =  val_342 +  val_343;
 val_352 =  val_344 +  val_351;
 val_353 =  val_345 +  val_346;
 val_354 =  val_347 +  val_353;
 val_355 =  val_348 +  val_349;
 val_356 =  val_347 +  val_355;
 val_357 =  val_345 +  val_349;
 val_358 =  val_350 +  val_357;
 val_359 =  A[idx_off + 2] *  A[idx_off + 59];
 val_360 =  A[idx_off + 3] *  A[idx_off + 60];
 val_361 =  val_302 *  val_359;
 val_362 =  val_304 *  val_359;
 val_363 =  val_302 *  val_360;
 val_364 =  val_306 *  val_360;
 val_365 =  val_308 *  val_360;
 val_366 =  val_352 *  val_361;
 val_367 =  val_354 *  val_362;
 val_368 =  val_352 *  val_363;
 val_369 =  val_356 *  val_364;
 val_370 =  val_358 *  val_365;
 val_371 =  val_366 +  val_368;
 val_372 =  val_366 +  val_369;
 val_373 =  val_367 +  val_370;
 val_374 =  A[idx_off + 4] *  A[idx_off + 67];
 val_375 =  A[idx_off + 5] *  A[idx_off + 68];
 val_376 =  A[idx_off + 5] *  val_374;
 val_377 =  A[idx_off + 0] *  val_374;
 val_378 =  A[idx_off + 8] *  val_374;
 val_379 =  A[idx_off + 1] *  val_375;
 val_380 =  A[idx_off + 5] *  val_375;
 val_381 =  A[idx_off + 0] *  val_375;
 val_382 =  A[idx_off + 8] *  val_375;
 val_383 =  A[idx_off + 12] *  val_375;
 val_384 =  val_374 +  val_379;
 val_385 =  val_376 +  val_380;
 val_386 =  val_374 +  val_380;
 val_387 =  val_377 +  val_381;
 val_388 =  val_378 +  val_382;
 val_389 =  val_376 +  val_381;
 val_390 =  val_378 +  val_383;
 val_391 =  A[idx_off + 124] *  val_255;
 val_392 =  A[idx_off + 125] *  val_256;
 val_393 =  A[idx_off + 126] *  val_257;
 val_394 =  A[idx_off + 12] *  val_391;
 val_395 =  A[idx_off + 5] *  val_392;
 val_396 =  A[idx_off + 13] *  val_393;
 val_397 =  A[idx_off + 5] *  val_391;
 val_398 =  A[idx_off + 8] *  val_392;
 val_399 =  A[idx_off + 0] *  val_393;
 val_400 =  A[idx_off + 7] *  val_391;
 val_401 =  A[idx_off + 0] *  val_392;
 val_402 =  A[idx_off + 0] *  val_391;
 val_403 =  A[idx_off + 24] *  val_393;
 val_404 =  A[idx_off + 8] *  val_391;
 val_405 =  A[idx_off + 16] *  val_391;
 val_406 =  A[idx_off + 12] *  val_393;
 val_407 =  val_394 +  val_395;
 val_408 =  val_396 +  val_407;
 val_409 =  val_397 +  val_398;
 val_410 =  val_399 +  val_409;
 val_411 =  val_400 +  val_401;
 val_412 =  val_399 +  val_411;
 val_413 =  val_398 +  val_402;
 val_414 =  val_403 +  val_413;
 val_415 =  val_395 +  val_404;
 val_416 =  val_396 +  val_415;
 val_417 =  val_398 +  val_405;
 val_418 =  val_399 +  val_417;
 val_419 =  val_401 +  val_402;
 val_420 =  val_399 +  val_419;
 val_421 =  val_403 +  val_419;
 val_422 =  val_395 +  val_402;
 val_423 =  val_406 +  val_422;
 val_424 =  A[idx_off + 12] *  A[idx_off + 46];
 val_425 =  A[idx_off + 13] *  A[idx_off + 46];
 val_426 =  A[idx_off + 2] *  A[idx_off + 46];
 val_427 =  A[idx_off + 4] *  A[idx_off + 46];
 val_428 =  A[idx_off + 3] *  A[idx_off + 46];
 val_429 =  A[idx_off + 0] *  A[idx_off + 46];
 val_430 =  A[idx_off + 0] *  A[idx_off + 47];
 val_431 =  A[idx_off + 25] *  A[idx_off + 47];
 val_432 =  A[idx_off + 26] *  A[idx_off + 47];
 val_433 =  A[idx_off + 14] *  A[idx_off + 47];
 val_434 =  A[idx_off + 15] *  A[idx_off + 47];
 val_435 =  A[idx_off + 6] *  A[idx_off + 47];
 val_436 =  A[idx_off + 0] *  A[idx_off + 48];
 val_437 =  A[idx_off + 2] *  A[idx_off + 48];
 val_438 =  A[idx_off + 4] *  A[idx_off + 48];
 val_439 =  A[idx_off + 27] *  A[idx_off + 48];
 val_440 =  A[idx_off + 28] *  A[idx_off + 48];
 val_441 =  A[idx_off + 3] *  A[idx_off + 48];
 val_442 =  val_424 +  val_430;
 val_443 =  val_425 +  val_431;
 val_444 =  val_426 +  val_432;
 val_445 =  val_427 +  val_433;
 val_446 =  val_428 +  val_434;
 val_447 =  val_427 +  val_435;
 val_448 =  val_429 +  val_434;
 val_449 =  val_436 +  val_442;
 val_450 =  val_437 +  val_443;
 val_451 =  val_438 +  val_444;
 val_452 =  val_439 +  val_445;
 val_453 =  val_436 +  val_446;
 val_454 =  val_440 +  val_447;
 val_455 =  val_441 +  val_448;
 val_456 =  A[idx_off + 138] *  val_288;
 val_457 =  A[idx_off + 139] *  val_289;
 val_458 =  A[idx_off + 140] *  val_290;
 val_459 =  A[idx_off + 141] *  val_291;
 val_460 =  A[idx_off + 29] *  val_456;
 val_461 =  A[idx_off + 0] *  val_456;
 val_462 =  A[idx_off + 29] *  val_457;
 val_463 =  A[idx_off + 0] *  val_457;
 val_464 =  A[idx_off + 29] *  val_458;
 val_465 =  A[idx_off + 0] *  val_458;
 val_466 =  A[idx_off + 0] *  val_459;
 val_467 =  A[idx_off + 29] *  val_459;
 val_468 =  val_460 +  val_462;
 val_469 =  val_461 +  val_463;
 val_470 =  val_464 +  val_468;
 val_471 =  val_465 +  val_469;
 val_472 =  val_466 +  val_470;
 val_473 =  val_466 +  val_471;
 val_474 =  val_467 +  val_471;
 val_475 =  val_465 +  val_468;
 val_476 =  val_464 +  val_469;
 val_477 =  val_466 +  val_475;
 val_478 =  val_466 +  val_476;
 val_479 =  A[idx_off + 2] *  A[idx_off + 57];
 val_480 =  A[idx_off + 3] *  A[idx_off + 58];
 val_481 =  val_472 *  val_479;
 val_482 =  val_473 *  val_479;
 val_483 =  val_474 *  val_479;
 val_484 =  val_477 *  val_480;
 val_485 =  val_478 *  val_480;
 val_486 =  val_473 *  val_480;
 val_487 =  val_474 *  val_480;
 val_488 =  val_481 +  val_484;
 val_489 =  val_482 +  val_485;
 val_490 =  val_483 +  val_486;
 val_491 =  val_482 +  val_487;
 val_492 =  A[idx_off + 29] *  A[idx_off + 63];
 val_493 =  A[idx_off + 0] *  A[idx_off + 63];
 val_494 =  A[idx_off + 0] *  A[idx_off + 64];
 val_495 =  A[idx_off + 29] *  A[idx_off + 64];
 val_496 =  A[idx_off + 0] *  A[idx_off + 65];
 val_497 =  A[idx_off + 29] *  A[idx_off + 65];
 val_498 =  A[idx_off + 0] *  A[idx_off + 66];
 val_499 =  A[idx_off + 29] *  A[idx_off + 66];
 val_500 =  val_492 +  val_494;
 val_501 =  val_493 +  val_495;
 val_502 =  val_493 +  val_494;
 val_503 =  val_496 +  val_500;
 val_504 =  val_496 +  val_501;
 val_505 =  val_497 +  val_502;
 val_506 =  val_496 +  val_502;
 val_507 =  val_498 +  val_503;
 val_508 =  val_498 +  val_504;
 val_509 =  val_498 +  val_505;
 val_510 =  val_499 +  val_506;
 val_511 =  A[idx_off + 29] *  A[idx_off + 97];
 val_512 =  A[idx_off + 0] *  A[idx_off + 97];
 val_513 =  A[idx_off + 20] *  A[idx_off + 97];
 val_514 =  A[idx_off + 0] *  A[idx_off + 98];
 val_515 =  A[idx_off + 30] *  A[idx_off + 98];
 val_516 =  A[idx_off + 29] *  A[idx_off + 98];
 val_517 =  A[idx_off + 0] *  A[idx_off + 99];
 val_518 =  A[idx_off + 0] *  A[idx_off + 100];
 val_519 =  A[idx_off + 29] *  A[idx_off + 100];
 val_520 =  A[idx_off + 29] *  A[idx_off + 99];
 val_521 =  A[idx_off + 25] *  A[idx_off + 97];
 val_522 =  A[idx_off + 31] *  A[idx_off + 98];
 val_523 =  val_511 +  val_514;
 val_524 =  val_512 +  val_514;
 val_525 =  val_513 +  val_515;
 val_526 =  val_512 +  val_516;
 val_527 =  val_517 +  val_523;
 val_528 =  val_517 +  val_524;
 val_529 =  val_517 +  val_525;
 val_530 =  val_517 +  val_526;
 val_531 =  val_518 +  val_527;
 val_532 =  val_519 +  val_528;
 val_533 =  val_518 +  val_529;
 val_534 =  val_518 +  val_530;
 val_535 =  val_520 +  val_524;
 val_536 =  val_518 +  val_535;
 val_537 =  val_521 +  val_522;
 val_538 =  val_517 +  val_537;
 val_539 =  val_518 +  val_538;
 val_540 =  A[idx_off + 29] *  A[idx_off + 110];
 val_541 =  A[idx_off + 4] *  A[idx_off + 110];
 val_542 =  A[idx_off + 6] *  A[idx_off + 110];
 val_543 =  A[idx_off + 0] *  A[idx_off + 111];
 val_544 =  A[idx_off + 34] *  A[idx_off + 111];
 val_545 =  A[idx_off + 28] *  A[idx_off + 111];
 val_546 =  A[idx_off + 0] *  A[idx_off + 112];
 val_547 =  A[idx_off + 34] *  A[idx_off + 112];
 val_548 =  A[idx_off + 8] *  A[idx_off + 112];
 val_549 =  A[idx_off + 0] *  A[idx_off + 113];
 val_550 =  A[idx_off + 35] *  A[idx_off + 113];
 val_551 =  A[idx_off + 0] *  A[idx_off + 110];
 val_552 =  A[idx_off + 17] *  A[idx_off + 111];
 val_553 =  A[idx_off + 3] *  A[idx_off + 111];
 val_554 =  A[idx_off + 13] *  A[idx_off + 112];
 val_555 =  A[idx_off + 36] *  A[idx_off + 112];
 val_556 =  A[idx_off + 29] *  A[idx_off + 113];
 val_557 =  A[idx_off + 14] *  A[idx_off + 113];
 val_558 =  A[idx_off + 13] *  A[idx_off + 111];
 val_559 =  A[idx_off + 37] *  A[idx_off + 111];
 val_560 =  A[idx_off + 29] *  A[idx_off + 111];
 val_561 =  A[idx_off + 18] *  A[idx_off + 111];
 val_562 =  A[idx_off + 21] *  A[idx_off + 112];
 val_563 =  A[idx_off + 15] *  A[idx_off + 112];
 val_564 =  A[idx_off + 6] *  A[idx_off + 113];
 val_565 =  A[idx_off + 23] *  A[idx_off + 113];
 val_566 =  A[idx_off + 31] *  A[idx_off + 112];
 val_567 =  A[idx_off + 3] *  A[idx_off + 113];
 val_568 =  A[idx_off + 25] *  A[idx_off + 113];
 val_569 =  A[idx_off + 29] *  A[idx_off + 112];
 val_570 =  A[idx_off + 2] *  A[idx_off + 110];
 val_571 =  A[idx_off + 14] *  A[idx_off + 110];
 val_572 =  A[idx_off + 38] *  A[idx_off + 111];
 val_573 =  A[idx_off + 39] *  A[idx_off + 111];
 val_574 =  A[idx_off + 4] *  A[idx_off + 112];
 val_575 =  val_540 +  val_543;
 val_576 =  val_541 +  val_544;
 val_577 =  val_542 +  val_545;
 val_578 =  val_546 +  val_575;
 val_579 =  val_547 +  val_576;
 val_580 =  val_548 +  val_577;
 val_581 =  val_549 +  val_578;
 val_582 =  val_550 +  val_579;
 val_583 =  val_549 +  val_580;
 val_584 =  val_543 +  val_551;
 val_585 =  val_551 +  val_552;
 val_586 =  val_551 +  val_553;
 val_587 =  val_546 +  val_584;
 val_588 =  val_554 +  val_585;
 val_589 =  val_555 +  val_586;
 val_590 =  val_556 +  val_587;
 val_591 =  val_557 +  val_588;
 val_592 =  val_549 +  val_589;
 val_593 =  val_551 +  val_558;
 val_594 =  val_551 +  val_559;
 val_595 =  val_551 +  val_560;
 val_596 =  val_542 +  val_561;
 val_597 =  val_562 +  val_593;
 val_598 =  val_547 +  val_594;
 val_599 =  val_546 +  val_595;
 val_600 =  val_563 +  val_596;
 val_601 =  val_564 +  val_597;
 val_602 =  val_565 +  val_598;
 val_603 =  val_549 +  val_599;
 val_604 =  val_549 +  val_600;
 val_605 =  val_555 +  val_584;
 val_606 =  val_566 +  val_584;
 val_607 =  val_567 +  val_605;
 val_608 =  val_568 +  val_606;
 val_609 =  val_569 +  val_584;
 val_610 =  val_549 +  val_609;
 val_611 =  val_570 +  val_572;
 val_612 =  val_571 +  val_573;
 val_613 =  val_574 +  val_611;
 val_614 =  val_546 +  val_612;
 val_615 =  val_549 +  val_613;
 val_616 =  val_549 +  val_614;
 val_617 =  A[idx_off + 142] *  val_488;
 val_618 =  A[idx_off + 143] *  val_489;
 val_619 =  A[idx_off + 144] *  val_490;
 val_620 =  A[idx_off + 145] *  val_491;
 val_621 =  val_581 *  val_617;
 val_622 =  val_582 *  val_618;
 val_623 =  val_581 *  val_619;
 val_624 =  val_583 *  val_620;
 val_625 =  val_590 *  val_617;
 val_626 =  val_591 *  val_618;
 val_627 =  val_590 *  val_619;
 val_628 =  val_592 *  val_620;
 val_629 =  val_601 *  val_617;
 val_630 =  val_602 *  val_618;
 val_631 =  val_603 *  val_619;
 val_632 =  val_604 *  val_620;
 val_633 =  val_607 *  val_618;
 val_634 =  val_608 *  val_620;
 val_635 =  val_607 *  val_617;
 val_636 =  val_581 *  val_618;
 val_637 =  val_610 *  val_619;
 val_638 =  val_581 *  val_620;
 val_639 =  val_615 *  val_617;
 val_640 =  val_590 *  val_618;
 val_641 =  val_616 *  val_619;
 val_642 =  val_590 *  val_620;
 val_643 =  A[idx_off + 29] *  val_621;
 val_644 =  A[idx_off + 29] *  val_622;
 val_645 =  A[idx_off + 29] *  val_623;
 val_646 =  A[idx_off + 29] *  val_624;
 val_647 =  A[idx_off + 0] *  val_621;
 val_648 =  A[idx_off + 0] *  val_622;
 val_649 =  A[idx_off + 0] *  val_623;
 val_650 =  A[idx_off + 0] *  val_624;
 val_651 =  A[idx_off + 13] *  val_625;
 val_652 =  A[idx_off + 5] *  val_626;
 val_653 =  A[idx_off + 0] *  val_627;
 val_654 =  A[idx_off + 0] *  val_628;
 val_655 =  A[idx_off + 40] *  val_625;
 val_656 =  A[idx_off + 11] *  val_626;
 val_657 =  A[idx_off + 29] *  val_628;
 val_658 =  A[idx_off + 0] *  val_625;
 val_659 =  A[idx_off + 0] *  val_626;
 val_660 =  A[idx_off + 29] *  val_627;
 val_661 =  A[idx_off + 5] *  val_629;
 val_662 =  A[idx_off + 29] *  val_630;
 val_663 =  A[idx_off + 0] *  val_631;
 val_664 =  A[idx_off + 29] *  val_632;
 val_665 =  A[idx_off + 11] *  val_629;
 val_666 =  A[idx_off + 0] *  val_630;
 val_667 =  A[idx_off + 29] *  val_631;
 val_668 =  A[idx_off + 0] *  val_632;
 val_669 =  A[idx_off + 0] *  val_629;
 val_670 =  A[idx_off + 20] *  val_633;
 val_671 =  A[idx_off + 0] *  val_634;
 val_672 =  A[idx_off + 30] *  val_633;
 val_673 =  A[idx_off + 0] *  val_633;
 val_674 =  A[idx_off + 29] *  val_634;
 val_675 =  A[idx_off + 14] *  val_635;
 val_676 =  A[idx_off + 29] *  val_636;
 val_677 =  A[idx_off + 0] *  val_637;
 val_678 =  A[idx_off + 29] *  val_638;
 val_679 =  A[idx_off + 39] *  val_635;
 val_680 =  A[idx_off + 0] *  val_636;
 val_681 =  A[idx_off + 0] *  val_638;
 val_682 =  A[idx_off + 0] *  val_635;
 val_683 =  A[idx_off + 29] *  val_637;
 val_684 =  A[idx_off + 29] *  val_639;
 val_685 =  A[idx_off + 13] *  val_640;
 val_686 =  A[idx_off + 29] *  val_641;
 val_687 =  A[idx_off + 0] *  val_642;
 val_688 =  A[idx_off + 0] *  val_639;
 val_689 =  A[idx_off + 40] *  val_640;
 val_690 =  A[idx_off + 0] *  val_641;
 val_691 =  A[idx_off + 0] *  val_640;
 val_692 =  A[idx_off + 29] *  val_642;
 val_693 =  val_643 +  val_644;
 val_694 =  val_645 +  val_693;
 val_695 =  val_646 +  val_694;
 val_696 =  val_647 +  val_648;
 val_697 =  val_649 +  val_696;
 val_698 =  val_650 +  val_697;
 val_699 =  val_651 +  val_652;
 val_700 =  val_653 +  val_699;
 val_701 =  val_654 +  val_700;
 val_702 =  val_655 +  val_656;
 val_703 =  val_653 +  val_702;
 val_704 =  val_657 +  val_703;
 val_705 =  val_658 +  val_659;
 val_706 =  val_653 +  val_705;
 val_707 =  val_654 +  val_706;
 val_708 =  val_660 +  val_705;
 val_709 =  val_654 +  val_708;
 val_710 =  val_661 +  val_662;
 val_711 =  val_663 +  val_710;
 val_712 =  val_664 +  val_711;
 val_713 =  val_665 +  val_666;
 val_714 =  val_667 +  val_713;
 val_715 =  val_668 +  val_714;
 val_716 =  val_666 +  val_669;
 val_717 =  val_663 +  val_716;
 val_718 =  val_668 +  val_717;
 val_719 =  val_643 +  val_670;
 val_720 =  val_645 +  val_719;
 val_721 =  val_671 +  val_720;
 val_722 =  val_647 +  val_672;
 val_723 =  val_649 +  val_722;
 val_724 =  val_671 +  val_723;
 val_725 =  val_647 +  val_673;
 val_726 =  val_649 +  val_725;
 val_727 =  val_674 +  val_726;
 val_728 =  val_671 +  val_726;
 val_729 =  val_675 +  val_676;
 val_730 =  val_677 +  val_729;
 val_731 =  val_678 +  val_730;
 val_732 =  val_679 +  val_680;
 val_733 =  val_677 +  val_732;
 val_734 =  val_681 +  val_733;
 val_735 =  val_680 +  val_682;
 val_736 =  val_683 +  val_735;
 val_737 =  val_681 +  val_736;
 val_738 =  val_677 +  val_735;
 val_739 =  val_681 +  val_738;
 val_740 =  val_684 +  val_685;
 val_741 =  val_686 +  val_740;
 val_742 =  val_687 +  val_741;
 val_743 =  val_688 +  val_689;
 val_744 =  val_690 +  val_743;
 val_745 =  val_687 +  val_744;
 val_746 =  val_688 +  val_691;
 val_747 =  val_690 +  val_746;
 val_748 =  val_687 +  val_747;
 val_749 =  val_692 +  val_747;
 val_750 =  A[idx_off + 8] *  A[idx_off + 90];
 val_751 =  A[idx_off + 9] *  A[idx_off + 91];
 val_752 =  val_695 *  val_750;
 val_753 =  val_698 *  val_750;
 val_754 =  val_701 *  val_751;
 val_755 =  val_704 *  val_751;
 val_756 =  val_707 *  val_751;
 val_757 =  val_709 *  val_751;
 val_758 =  val_712 *  val_750;
 val_759 =  val_715 *  val_750;
 val_760 =  val_718 *  val_750;
 val_761 =  val_721 *  val_751;
 val_762 =  val_724 *  val_751;
 val_763 =  val_727 *  val_751;
 val_764 =  val_728 *  val_751;
 val_765 =  val_731 *  val_750;
 val_766 =  val_734 *  val_750;
 val_767 =  val_737 *  val_750;
 val_768 =  val_739 *  val_750;
 val_769 =  val_742 *  val_751;
 val_770 =  val_745 *  val_751;
 val_771 =  val_748 *  val_751;
 val_772 =  val_749 *  val_751;
 val_773 =  val_752 +  val_754;
 val_774 =  val_753 +  val_755;
 val_775 =  val_753 +  val_756;
 val_776 =  val_753 +  val_757;
 val_777 =  val_758 +  val_761;
 val_778 =  val_759 +  val_762;
 val_779 =  val_760 +  val_763;
 val_780 =  val_760 +  val_764;
 val_781 =  val_765 +  val_769;
 val_782 =  val_766 +  val_770;
 val_783 =  val_767 +  val_771;
 val_784 =  val_768 +  val_772;
 val_785 =  A[idx_off + 2] *  A[idx_off + 85];
 val_786 =  A[idx_off + 3] *  A[idx_off + 86];
 val_787 =  A[idx_off + 0] *  val_785;
 val_788 =  A[idx_off + 18] *  val_785;
 val_789 =  A[idx_off + 4] *  val_785;
 val_790 =  A[idx_off + 5] *  val_785;
 val_791 =  A[idx_off + 0] *  val_786;
 val_792 =  A[idx_off + 4] *  val_786;
 val_793 =  A[idx_off + 18] *  val_786;
 val_794 =  A[idx_off + 5] *  val_786;
 val_795 =  A[idx_off + 1] *  val_785;
 val_796 =  A[idx_off + 13] *  val_785;
 val_797 =  A[idx_off + 1] *  val_786;
 val_798 =  A[idx_off + 13] *  val_786;
 val_799 =  A[idx_off + 2] *  val_785;
 val_800 =  A[idx_off + 2] *  val_786;
 val_801 =  A[idx_off + 3] *  val_785;
 val_802 =  A[idx_off + 3] *  val_786;
 val_803 =  val_787 +  val_791;
 val_804 =  val_787 +  val_792;
 val_805 =  val_788 +  val_793;
 val_806 =  val_789 +  val_792;
 val_807 =  val_788 +  val_794;
 val_808 =  val_790 +  val_794;
 val_809 =  val_795 +  val_797;
 val_810 =  val_794 +  val_795;
 val_811 =  val_796 +  val_798;
 val_812 =  val_792 +  val_796;
 val_813 =  val_788 +  val_797;
 val_814 =  val_791 +  val_796;
 val_815 =  val_799 +  val_800;
 val_816 =  val_798 +  val_799;
 val_817 =  val_801 +  val_802;
 val_818 =  val_793 +  val_801;
 val_819 =  A[idx_off + 71] *  val_337;
 val_820 =  A[idx_off + 72] *  val_339;
 val_821 =  A[idx_off + 73] *  val_341;
 val_822 =  val_371 *  val_819;
 val_823 =  val_372 *  val_820;
 val_824 =  val_373 *  val_821;
 val_825 =  A[idx_off + 4] *  val_822;
 val_826 =  A[idx_off + 3] *  val_823;
 val_827 =  A[idx_off + 4] *  val_824;
 val_828 =  A[idx_off + 0] *  val_822;
 val_829 =  A[idx_off + 15] *  val_823;
 val_830 =  A[idx_off + 3] *  val_824;
 val_831 =  val_408 *  val_825;
 val_832 =  val_410 *  val_826;
 val_833 =  val_412 *  val_827;
 val_834 =  val_414 *  val_825;
 val_835 =  val_416 *  val_826;
 val_836 =  val_418 *  val_827;
 val_837 =  val_420 *  val_825;
 val_838 =  val_421 *  val_826;
 val_839 =  val_423 *  val_827;
 val_840 =  val_408 *  val_828;
 val_841 =  val_410 *  val_829;
 val_842 =  val_412 *  val_830;
 val_843 =  val_414 *  val_828;
 val_844 =  val_416 *  val_829;
 val_845 =  val_418 *  val_830;
 val_846 =  val_420 *  val_828;
 val_847 =  val_421 *  val_829;
 val_848 =  val_423 *  val_830;
 val_849 =  val_831 +  val_832;
 val_850 =  val_833 +  val_849;
 val_851 =  val_834 +  val_835;
 val_852 =  val_836 +  val_851;
 val_853 =  val_837 +  val_838;
 val_854 =  val_839 +  val_853;
 val_855 =  val_840 +  val_841;
 val_856 =  val_842 +  val_855;
 val_857 =  val_843 +  val_844;
 val_858 =  val_845 +  val_857;
 val_859 =  val_846 +  val_847;
 val_860 =  val_848 +  val_859;
 val_861 =  A[idx_off + 51] *  val_850;
 val_862 =  A[idx_off + 52] *  val_852;
 val_863 =  A[idx_off + 53] *  val_854;
 val_864 =  A[idx_off + 51] *  val_856;
 val_865 =  A[idx_off + 52] *  val_858;
 val_866 =  A[idx_off + 53] *  val_860;
 val_867 =  val_449 *  val_861;
 val_868 =  val_450 *  val_861;
 val_869 =  val_449 *  val_862;
 val_870 =  val_451 *  val_862;
 val_871 =  val_452 *  val_862;
 val_872 =  val_453 *  val_863;
 val_873 =  val_454 *  val_863;
 val_874 =  val_455 *  val_863;
 val_875 =  val_449 *  val_864;
 val_876 =  val_450 *  val_864;
 val_877 =  val_449 *  val_865;
 val_878 =  val_451 *  val_865;
 val_879 =  val_452 *  val_865;
 val_880 =  val_453 *  val_866;
 val_881 =  val_454 *  val_866;
 val_882 =  val_455 *  val_866;
 val_883 =  val_867 +  val_869;
 val_884 =  val_867 +  val_870;
 val_885 =  val_868 +  val_871;
 val_886 =  val_872 +  val_883;
 val_887 =  val_873 +  val_884;
 val_888 =  val_874 +  val_885;
 val_889 =  val_875 +  val_877;
 val_890 =  val_875 +  val_878;
 val_891 =  val_876 +  val_879;
 val_892 =  val_880 +  val_889;
 val_893 =  val_881 +  val_890;
 val_894 =  val_882 +  val_891;
 val_895 =  A[idx_off + 127] *  val_168;
 val_896 =  A[idx_off + 128] *  val_169;
 val_897 =  A[idx_off + 129] *  val_170;
 val_898 =  val_886 *  val_895;
 val_899 =  val_887 *  val_896;
 val_900 =  val_888 *  val_897;
 val_901 =  val_892 *  val_895;
 val_902 =  val_893 *  val_896;
 val_903 =  val_894 *  val_897;
 val_904 =  val_803 *  val_898;
 val_905 =  val_804 *  val_899;
 val_906 =  val_805 *  val_900;
 val_907 =  val_806 *  val_899;
 val_908 =  val_807 *  val_900;
 val_909 =  val_804 *  val_898;
 val_910 =  val_808 *  val_900;
 val_911 =  val_809 *  val_901;
 val_912 =  val_810 *  val_902;
 val_913 =  val_811 *  val_903;
 val_914 =  val_808 *  val_902;
 val_915 =  val_812 *  val_903;
 val_916 =  val_810 *  val_901;
 val_917 =  val_806 *  val_903;
 val_918 =  val_813 *  val_900;
 val_919 =  val_809 *  val_900;
 val_920 =  val_814 *  val_903;
 val_921 =  val_803 *  val_903;
 val_922 =  val_803 *  val_899;
 val_923 =  val_815 *  val_900;
 val_924 =  val_816 *  val_900;
 val_925 =  val_811 *  val_900;
 val_926 =  val_809 *  val_902;
 val_927 =  val_817 *  val_903;
 val_928 =  val_818 *  val_903;
 val_929 =  val_805 *  val_903;
 val_930 =  val_904 +  val_905;
 val_931 =  val_906 +  val_930;
 val_932 =  val_904 +  val_907;
 val_933 =  val_908 +  val_932;
 val_934 =  val_907 +  val_909;
 val_935 =  val_910 +  val_934;
 val_936 =  val_911 +  val_912;
 val_937 =  val_913 +  val_936;
 val_938 =  val_911 +  val_914;
 val_939 =  val_915 +  val_938;
 val_940 =  val_914 +  val_916;
 val_941 =  val_917 +  val_940;
 val_942 =  val_918 +  val_932;
 val_943 =  val_919 +  val_934;
 val_944 =  val_920 +  val_938;
 val_945 =  val_921 +  val_940;
 val_946 =  val_904 +  val_922;
 val_947 =  val_923 +  val_946;
 val_948 =  val_924 +  val_946;
 val_949 =  val_925 +  val_946;
 val_950 =  val_911 +  val_926;
 val_951 =  val_927 +  val_950;
 val_952 =  val_928 +  val_950;
 val_953 =  val_929 +  val_950;
 val_954 =  A[idx_off + 49] *  val_931;
 val_955 =  A[idx_off + 49] *  val_933;
 val_956 =  A[idx_off + 49] *  val_935;
 val_957 =  A[idx_off + 50] *  val_937;
 val_958 =  A[idx_off + 50] *  val_939;
 val_959 =  A[idx_off + 50] *  val_941;
 val_960 =  A[idx_off + 49] *  val_942;
 val_961 =  A[idx_off + 49] *  val_943;
 val_962 =  A[idx_off + 50] *  val_944;
 val_963 =  A[idx_off + 50] *  val_945;
 val_964 =  A[idx_off + 49] *  val_947;
 val_965 =  A[idx_off + 49] *  val_948;
 val_966 =  A[idx_off + 49] *  val_949;
 val_967 =  A[idx_off + 50] *  val_951;
 val_968 =  A[idx_off + 50] *  val_952;
 val_969 =  A[idx_off + 50] *  val_953;
 val_970 =  val_954 +  val_957;
 val_971 =  val_955 +  val_958;
 val_972 =  val_956 +  val_959;
 val_973 =  val_960 +  val_962;
 val_974 =  val_961 +  val_963;
 val_975 =  val_964 +  val_967;
 val_976 =  val_965 +  val_968;
 val_977 =  val_966 +  val_969;
 val_978 =  A[idx_off + 134] *  val_507;
 val_979 =  A[idx_off + 135] *  val_508;
 val_980 =  A[idx_off + 136] *  val_509;
 val_981 =  A[idx_off + 137] *  val_510;
 val_982 =  A[idx_off + 134] *  val_508;
 val_983 =  A[idx_off + 135] *  val_507;
 val_984 =  A[idx_off + 135] *  val_509;
 val_985 =  A[idx_off + 136] *  val_507;
 val_986 =  val_531 *  val_978;
 val_987 =  val_532 *  val_979;
 val_988 =  val_533 *  val_980;
 val_989 =  val_534 *  val_981;
 val_990 =  val_534 *  val_978;
 val_991 =  val_531 *  val_979;
 val_992 =  val_536 *  val_981;
 val_993 =  val_536 *  val_978;
 val_994 =  val_539 *  val_979;
 val_995 =  val_531 *  val_980;
 val_996 =  val_532 *  val_981;
 val_997 =  val_531 *  val_982;
 val_998 =  val_532 *  val_983;
 val_999 =  val_534 *  val_982;
 val_1000 =  val_531 *  val_983;
 val_1001 =  val_536 *  val_982;
 val_1002 =  val_539 *  val_983;
 val_1003 =  val_532 *  val_984;
 val_1004 =  val_533 *  val_985;
 val_1005 =  val_531 *  val_984;
 val_1006 =  val_539 *  val_984;
 val_1007 =  val_531 *  val_985;
 val_1008 =  val_773 *  val_986;
 val_1009 =  val_774 *  val_987;
 val_1010 =  val_775 *  val_988;
 val_1011 =  val_776 *  val_989;
 val_1012 =  val_777 *  val_990;
 val_1013 =  val_778 *  val_991;
 val_1014 =  val_779 *  val_988;
 val_1015 =  val_780 *  val_992;
 val_1016 =  val_781 *  val_993;
 val_1017 =  val_782 *  val_994;
 val_1018 =  val_783 *  val_995;
 val_1019 =  val_784 *  val_996;
 val_1020 =  val_773 *  val_997;
 val_1021 =  val_774 *  val_998;
 val_1022 =  val_777 *  val_999;
 val_1023 =  val_778 *  val_1000;
 val_1024 =  val_781 *  val_1001;
 val_1025 =  val_782 *  val_1002;
 val_1026 =  val_774 *  val_1003;
 val_1027 =  val_775 *  val_1004;
 val_1028 =  val_778 *  val_1005;
 val_1029 =  val_779 *  val_1004;
 val_1030 =  val_782 *  val_1006;
 val_1031 =  val_783 *  val_1007;
 val_1032 =  A[idx_off + 29] *  val_1008;
 val_1033 =  A[idx_off + 0] *  val_1009;
 val_1034 =  A[idx_off + 0] *  val_1010;
 val_1035 =  A[idx_off + 11] *  val_1011;
 val_1036 =  A[idx_off + 0] *  val_1008;
 val_1037 =  A[idx_off + 5] *  val_1011;
 val_1038 =  A[idx_off + 29] *  val_1010;
 val_1039 =  A[idx_off + 0] *  val_1011;
 val_1040 =  A[idx_off + 29] *  val_1009;
 val_1041 =  A[idx_off + 0] *  val_1012;
 val_1042 =  A[idx_off + 29] *  val_1013;
 val_1043 =  A[idx_off + 0] *  val_1014;
 val_1044 =  A[idx_off + 0] *  val_1015;
 val_1045 =  A[idx_off + 29] *  val_1012;
 val_1046 =  A[idx_off + 0] *  val_1013;
 val_1047 =  A[idx_off + 32] *  val_1015;
 val_1048 =  A[idx_off + 8] *  val_1015;
 val_1049 =  A[idx_off + 29] *  val_1014;
 val_1050 =  A[idx_off + 0] *  val_1016;
 val_1051 =  A[idx_off + 0] *  val_1017;
 val_1052 =  A[idx_off + 29] *  val_1018;
 val_1053 =  A[idx_off + 0] *  val_1019;
 val_1054 =  A[idx_off + 29] *  val_1017;
 val_1055 =  A[idx_off + 0] *  val_1018;
 val_1056 =  A[idx_off + 33] *  val_1019;
 val_1057 =  A[idx_off + 29] *  val_1016;
 val_1058 =  A[idx_off + 2] *  val_1019;
 val_1059 =  A[idx_off + 29] *  val_1020;
 val_1060 =  A[idx_off + 0] *  val_1021;
 val_1061 =  A[idx_off + 0] *  val_1020;
 val_1062 =  A[idx_off + 29] *  val_1021;
 val_1063 =  A[idx_off + 0] *  val_1022;
 val_1064 =  A[idx_off + 29] *  val_1023;
 val_1065 =  A[idx_off + 29] *  val_1022;
 val_1066 =  A[idx_off + 0] *  val_1023;
 val_1067 =  A[idx_off + 0] *  val_1024;
 val_1068 =  A[idx_off + 0] *  val_1025;
 val_1069 =  A[idx_off + 29] *  val_1025;
 val_1070 =  A[idx_off + 29] *  val_1024;
 val_1071 =  A[idx_off + 0] *  val_1026;
 val_1072 =  A[idx_off + 0] *  val_1027;
 val_1073 =  A[idx_off + 29] *  val_1027;
 val_1074 =  A[idx_off + 29] *  val_1026;
 val_1075 =  A[idx_off + 29] *  val_1028;
 val_1076 =  A[idx_off + 0] *  val_1029;
 val_1077 =  A[idx_off + 0] *  val_1028;
 val_1078 =  A[idx_off + 29] *  val_1029;
 val_1079 =  A[idx_off + 0] *  val_1030;
 val_1080 =  A[idx_off + 29] *  val_1031;
 val_1081 =  A[idx_off + 29] *  val_1030;
 val_1082 =  A[idx_off + 0] *  val_1031;
 val_1083 =  val_1032 +  val_1033;
 val_1084 =  val_1034 +  val_1083;
 val_1085 =  val_1035 +  val_1084;
 val_1086 =  val_1033 +  val_1036;
 val_1087 =  val_1034 +  val_1086;
 val_1088 =  val_1037 +  val_1087;
 val_1089 =  val_1038 +  val_1086;
 val_1090 =  val_1039 +  val_1089;
 val_1091 =  val_1036 +  val_1040;
 val_1092 =  val_1034 +  val_1091;
 val_1093 =  val_1039 +  val_1092;
 val_1094 =  val_1041 +  val_1042;
 val_1095 =  val_1043 +  val_1094;
 val_1096 =  val_1044 +  val_1095;
 val_1097 =  val_1045 +  val_1046;
 val_1098 =  val_1043 +  val_1097;
 val_1099 =  val_1047 +  val_1098;
 val_1100 =  val_1041 +  val_1046;
 val_1101 =  val_1043 +  val_1100;
 val_1102 =  val_1048 +  val_1101;
 val_1103 =  val_1049 +  val_1100;
 val_1104 =  val_1044 +  val_1103;
 val_1105 =  val_1050 +  val_1051;
 val_1106 =  val_1052 +  val_1105;
 val_1107 =  val_1053 +  val_1106;
 val_1108 =  val_1050 +  val_1054;
 val_1109 =  val_1055 +  val_1108;
 val_1110 =  val_1056 +  val_1109;
 val_1111 =  val_1051 +  val_1057;
 val_1112 =  val_1055 +  val_1111;
 val_1113 =  val_1058 +  val_1112;
 val_1114 =  val_1055 +  val_1105;
 val_1115 =  val_1053 +  val_1114;
 val_1116 =  val_1059 +  val_1060;
 val_1117 =  val_1034 +  val_1116;
 val_1118 =  val_1035 +  val_1117;
 val_1119 =  val_1060 +  val_1061;
 val_1120 =  val_1034 +  val_1119;
 val_1121 =  val_1037 +  val_1120;
 val_1122 =  val_1038 +  val_1119;
 val_1123 =  val_1039 +  val_1122;
 val_1124 =  val_1061 +  val_1062;
 val_1125 =  val_1034 +  val_1124;
 val_1126 =  val_1039 +  val_1125;
 val_1127 =  val_1063 +  val_1064;
 val_1128 =  val_1043 +  val_1127;
 val_1129 =  val_1044 +  val_1128;
 val_1130 =  val_1065 +  val_1066;
 val_1131 =  val_1043 +  val_1130;
 val_1132 =  val_1047 +  val_1131;
 val_1133 =  val_1063 +  val_1066;
 val_1134 =  val_1043 +  val_1133;
 val_1135 =  val_1048 +  val_1134;
 val_1136 =  val_1049 +  val_1133;
 val_1137 =  val_1044 +  val_1136;
 val_1138 =  val_1067 +  val_1068;
 val_1139 =  val_1052 +  val_1138;
 val_1140 =  val_1053 +  val_1139;
 val_1141 =  val_1067 +  val_1069;
 val_1142 =  val_1055 +  val_1141;
 val_1143 =  val_1056 +  val_1142;
 val_1144 =  val_1068 +  val_1070;
 val_1145 =  val_1055 +  val_1144;
 val_1146 =  val_1058 +  val_1145;
 val_1147 =  val_1055 +  val_1138;
 val_1148 =  val_1053 +  val_1147;
 val_1149 =  val_1059 +  val_1071;
 val_1150 =  val_1072 +  val_1149;
 val_1151 =  val_1035 +  val_1150;
 val_1152 =  val_1061 +  val_1071;
 val_1153 =  val_1072 +  val_1152;
 val_1154 =  val_1037 +  val_1153;
 val_1155 =  val_1073 +  val_1152;
 val_1156 =  val_1039 +  val_1155;
 val_1157 =  val_1061 +  val_1074;
 val_1158 =  val_1072 +  val_1157;
 val_1159 =  val_1039 +  val_1158;
 val_1160 =  val_1063 +  val_1075;
 val_1161 =  val_1076 +  val_1160;
 val_1162 =  val_1044 +  val_1161;
 val_1163 =  val_1065 +  val_1077;
 val_1164 =  val_1076 +  val_1163;
 val_1165 =  val_1047 +  val_1164;
 val_1166 =  val_1063 +  val_1077;
 val_1167 =  val_1076 +  val_1166;
 val_1168 =  val_1048 +  val_1167;
 val_1169 =  val_1078 +  val_1166;
 val_1170 =  val_1044 +  val_1169;
 val_1171 =  val_1067 +  val_1079;
 val_1172 =  val_1080 +  val_1171;
 val_1173 =  val_1053 +  val_1172;
 val_1174 =  val_1067 +  val_1081;
 val_1175 =  val_1082 +  val_1174;
 val_1176 =  val_1056 +  val_1175;
 val_1177 =  val_1070 +  val_1079;
 val_1178 =  val_1082 +  val_1177;
 val_1179 =  val_1058 +  val_1178;
 val_1180 =  val_1082 +  val_1171;
 val_1181 =  val_1053 +  val_1180;
 val_1182 =  A[idx_off + 10] *  A[idx_off + 87];
 val_1183 =  A[idx_off + 11] *  A[idx_off + 88];
 val_1184 =  A[idx_off + 4] *  A[idx_off + 89];
 val_1185 =  val_268 *  val_1182;
 val_1186 =  val_269 *  val_1182;
 val_1187 =  val_268 *  val_1183;
 val_1188 =  val_269 *  val_1183;
 val_1189 =  val_270 *  val_1184;
 val_1190 =  val_271 *  val_1184;
 val_1191 =  val_1085 *  val_1185;
 val_1192 =  val_1088 *  val_1185;
 val_1193 =  val_1090 *  val_1185;
 val_1194 =  val_1093 *  val_1185;
 val_1195 =  val_1085 *  val_1186;
 val_1196 =  val_1088 *  val_1186;
 val_1197 =  val_1090 *  val_1186;
 val_1198 =  val_1093 *  val_1186;
 val_1199 =  val_1096 *  val_1187;
 val_1200 =  val_1099 *  val_1187;
 val_1201 =  val_1102 *  val_1187;
 val_1202 =  val_1104 *  val_1187;
 val_1203 =  val_1096 *  val_1188;
 val_1204 =  val_1099 *  val_1188;
 val_1205 =  val_1102 *  val_1188;
 val_1206 =  val_1104 *  val_1188;
 val_1207 =  val_1107 *  val_1189;
 val_1208 =  val_1110 *  val_1189;
 val_1209 =  val_1113 *  val_1189;
 val_1210 =  val_1115 *  val_1189;
 val_1211 =  val_1107 *  val_1190;
 val_1212 =  val_1110 *  val_1190;
 val_1213 =  val_1113 *  val_1190;
 val_1214 =  val_1115 *  val_1190;
 val_1215 =  val_1118 *  val_1185;
 val_1216 =  val_1121 *  val_1185;
 val_1217 =  val_1123 *  val_1185;
 val_1218 =  val_1126 *  val_1185;
 val_1219 =  val_1118 *  val_1186;
 val_1220 =  val_1121 *  val_1186;
 val_1221 =  val_1123 *  val_1186;
 val_1222 =  val_1126 *  val_1186;
 val_1223 =  val_1129 *  val_1187;
 val_1224 =  val_1132 *  val_1187;
 val_1225 =  val_1135 *  val_1187;
 val_1226 =  val_1137 *  val_1187;
 val_1227 =  val_1129 *  val_1188;
 val_1228 =  val_1132 *  val_1188;
 val_1229 =  val_1135 *  val_1188;
 val_1230 =  val_1137 *  val_1188;
 val_1231 =  val_1140 *  val_1189;
 val_1232 =  val_1143 *  val_1189;
 val_1233 =  val_1146 *  val_1189;
 val_1234 =  val_1148 *  val_1189;
 val_1235 =  val_1140 *  val_1190;
 val_1236 =  val_1143 *  val_1190;
 val_1237 =  val_1146 *  val_1190;
 val_1238 =  val_1148 *  val_1190;
 val_1239 =  val_1151 *  val_1185;
 val_1240 =  val_1154 *  val_1185;
 val_1241 =  val_1156 *  val_1185;
 val_1242 =  val_1159 *  val_1185;
 val_1243 =  val_1151 *  val_1186;
 val_1244 =  val_1154 *  val_1186;
 val_1245 =  val_1156 *  val_1186;
 val_1246 =  val_1159 *  val_1186;
 val_1247 =  val_1162 *  val_1187;
 val_1248 =  val_1165 *  val_1187;
 val_1249 =  val_1168 *  val_1187;
 val_1250 =  val_1170 *  val_1187;
 val_1251 =  val_1162 *  val_1188;
 val_1252 =  val_1165 *  val_1188;
 val_1253 =  val_1168 *  val_1188;
 val_1254 =  val_1170 *  val_1188;
 val_1255 =  val_1173 *  val_1189;
 val_1256 =  val_1176 *  val_1189;
 val_1257 =  val_1179 *  val_1189;
 val_1258 =  val_1181 *  val_1189;
 val_1259 =  val_1173 *  val_1190;
 val_1260 =  val_1176 *  val_1190;
 val_1261 =  val_1179 *  val_1190;
 val_1262 =  val_1181 *  val_1190;
 val_1263 =  val_1191 +  val_1199;
 val_1264 =  val_1192 +  val_1200;
 val_1265 =  val_1193 +  val_1201;
 val_1266 =  val_1194 +  val_1202;
 val_1267 =  val_1195 +  val_1203;
 val_1268 =  val_1196 +  val_1204;
 val_1269 =  val_1197 +  val_1205;
 val_1270 =  val_1198 +  val_1206;
 val_1271 =  val_1207 +  val_1263;
 val_1272 =  val_1208 +  val_1264;
 val_1273 =  val_1209 +  val_1265;
 val_1274 =  val_1210 +  val_1266;
 val_1275 =  val_1211 +  val_1267;
 val_1276 =  val_1212 +  val_1268;
 val_1277 =  val_1213 +  val_1269;
 val_1278 =  val_1214 +  val_1270;
 val_1279 =  val_1215 +  val_1223;
 val_1280 =  val_1216 +  val_1224;
 val_1281 =  val_1217 +  val_1225;
 val_1282 =  val_1218 +  val_1226;
 val_1283 =  val_1219 +  val_1227;
 val_1284 =  val_1220 +  val_1228;
 val_1285 =  val_1221 +  val_1229;
 val_1286 =  val_1222 +  val_1230;
 val_1287 =  val_1231 +  val_1279;
 val_1288 =  val_1232 +  val_1280;
 val_1289 =  val_1233 +  val_1281;
 val_1290 =  val_1234 +  val_1282;
 val_1291 =  val_1235 +  val_1283;
 val_1292 =  val_1236 +  val_1284;
 val_1293 =  val_1237 +  val_1285;
 val_1294 =  val_1238 +  val_1286;
 val_1295 =  val_1239 +  val_1247;
 val_1296 =  val_1240 +  val_1248;
 val_1297 =  val_1241 +  val_1249;
 val_1298 =  val_1242 +  val_1250;
 val_1299 =  val_1243 +  val_1251;
 val_1300 =  val_1244 +  val_1252;
 val_1301 =  val_1245 +  val_1253;
 val_1302 =  val_1246 +  val_1254;
 val_1303 =  val_1255 +  val_1295;
 val_1304 =  val_1256 +  val_1296;
 val_1305 =  val_1257 +  val_1297;
 val_1306 =  val_1258 +  val_1298;
 val_1307 =  val_1259 +  val_1299;
 val_1308 =  val_1260 +  val_1300;
 val_1309 =  val_1261 +  val_1301;
 val_1310 =  val_1262 +  val_1302;
 val_1311 =  A[idx_off + 119] *  val_970;
 val_1312 =  A[idx_off + 120] *  val_971;
 val_1313 =  A[idx_off + 121] *  val_972;
 val_1314 =  A[idx_off + 120] *  val_973;
 val_1315 =  A[idx_off + 121] *  val_974;
 val_1316 =  A[idx_off + 119] *  val_975;
 val_1317 =  A[idx_off + 120] *  val_976;
 val_1318 =  A[idx_off + 121] *  val_977;
 val_1319 =  A[idx_off + 12] *  val_1311;
 val_1320 =  A[idx_off + 0] *  val_1312;
 val_1321 =  A[idx_off + 0] *  val_1313;
 val_1322 =  A[idx_off + 0] *  val_1311;
 val_1323 =  A[idx_off + 12] *  val_1312;
 val_1324 =  A[idx_off + 24] *  val_1311;
 val_1325 =  A[idx_off + 13] *  val_1312;
 val_1326 =  A[idx_off + 12] *  val_1313;
 val_1327 =  A[idx_off + 0] *  val_1314;
 val_1328 =  A[idx_off + 0] *  val_1315;
 val_1329 =  A[idx_off + 12] *  val_1314;
 val_1330 =  A[idx_off + 13] *  val_1314;
 val_1331 =  A[idx_off + 12] *  val_1315;
 val_1332 =  A[idx_off + 12] *  val_1316;
 val_1333 =  A[idx_off + 0] *  val_1317;
 val_1334 =  A[idx_off + 0] *  val_1318;
 val_1335 =  A[idx_off + 0] *  val_1316;
 val_1336 =  A[idx_off + 12] *  val_1317;
 val_1337 =  A[idx_off + 24] *  val_1316;
 val_1338 =  A[idx_off + 13] *  val_1317;
 val_1339 =  A[idx_off + 12] *  val_1318;
 val_1340 =  val_1319 +  val_1320;
 val_1341 =  val_1321 +  val_1340;
 val_1342 =  val_1322 +  val_1323;
 val_1343 =  val_1321 +  val_1342;
 val_1344 =  val_1320 +  val_1322;
 val_1345 =  val_1324 +  val_1325;
 val_1346 =  val_1326 +  val_1344;
 val_1347 =  val_1321 +  val_1345;
 val_1348 =  val_1319 +  val_1327;
 val_1349 =  val_1328 +  val_1348;
 val_1350 =  val_1322 +  val_1329;
 val_1351 =  val_1328 +  val_1350;
 val_1352 =  val_1322 +  val_1327;
 val_1353 =  val_1324 +  val_1330;
 val_1354 =  val_1331 +  val_1352;
 val_1355 =  val_1328 +  val_1353;
 val_1356 =  val_1332 +  val_1333;
 val_1357 =  val_1334 +  val_1356;
 val_1358 =  val_1335 +  val_1336;
 val_1359 =  val_1334 +  val_1358;
 val_1360 =  val_1333 +  val_1335;
 val_1361 =  val_1337 +  val_1338;
 val_1362 =  val_1339 +  val_1360;
 val_1363 =  val_1334 +  val_1361;
 val_1364 =  A[idx_off + 130] *  val_384;
 val_1365 =  A[idx_off + 131] *  val_385;
 val_1366 =  A[idx_off + 132] *  val_386;
 val_1367 =  A[idx_off + 133] *  val_387;
 val_1368 =  A[idx_off + 130] *  val_381;
 val_1369 =  A[idx_off + 131] *  val_388;
 val_1370 =  A[idx_off + 132] *  val_382;
 val_1371 =  A[idx_off + 133] *  val_389;
 val_1372 =  A[idx_off + 131] *  val_387;
 val_1373 =  A[idx_off + 132] *  val_381;
 val_1374 =  A[idx_off + 133] *  val_390;
 val_1375 =  A[idx_off + 0] *  val_1364;
 val_1376 =  A[idx_off + 0] *  val_1365;
 val_1377 =  A[idx_off + 8] *  val_1366;
 val_1378 =  A[idx_off + 3] *  val_1367;
 val_1379 =  A[idx_off + 0] *  val_1368;
 val_1380 =  A[idx_off + 0] *  val_1369;
 val_1381 =  A[idx_off + 8] *  val_1370;
 val_1382 =  A[idx_off + 3] *  val_1371;
 val_1383 =  A[idx_off + 0] *  val_1372;
 val_1384 =  A[idx_off + 8] *  val_1373;
 val_1385 =  A[idx_off + 3] *  val_1374;
 val_1386 =  A[idx_off + 10] *  val_1366;
 val_1387 =  A[idx_off + 15] *  val_1367;
 val_1388 =  A[idx_off + 10] *  val_1370;
 val_1389 =  A[idx_off + 15] *  val_1371;
 val_1390 =  A[idx_off + 10] *  val_1373;
 val_1391 =  A[idx_off + 15] *  val_1374;
 val_1392 =  A[idx_off + 12] *  val_1364;
 val_1393 =  A[idx_off + 12] *  val_1365;
 val_1394 =  A[idx_off + 0] *  val_1367;
 val_1395 =  A[idx_off + 12] *  val_1368;
 val_1396 =  A[idx_off + 12] *  val_1369;
 val_1397 =  A[idx_off + 0] *  val_1371;
 val_1398 =  A[idx_off + 12] *  val_1372;
 val_1399 =  A[idx_off + 0] *  val_1374;
 val_1400 =  val_1271 *  val_1375;
 val_1401 =  val_1272 *  val_1376;
 val_1402 =  val_1273 *  val_1377;
 val_1403 =  val_1274 *  val_1378;
 val_1404 =  val_1275 *  val_1375;
 val_1405 =  val_1276 *  val_1376;
 val_1406 =  val_1277 *  val_1377;
 val_1407 =  val_1278 *  val_1378;
 val_1408 =  val_1271 *  val_1379;
 val_1409 =  val_1272 *  val_1380;
 val_1410 =  val_1273 *  val_1381;
 val_1411 =  val_1274 *  val_1382;
 val_1412 =  val_1275 *  val_1379;
 val_1413 =  val_1276 *  val_1380;
 val_1414 =  val_1277 *  val_1381;
 val_1415 =  val_1278 *  val_1382;
 val_1416 =  val_1272 *  val_1383;
 val_1417 =  val_1273 *  val_1384;
 val_1418 =  val_1274 *  val_1385;
 val_1419 =  val_1276 *  val_1383;
 val_1420 =  val_1277 *  val_1384;
 val_1421 =  val_1278 *  val_1385;
 val_1422 =  val_1287 *  val_1375;
 val_1423 =  val_1288 *  val_1376;
 val_1424 =  val_1289 *  val_1386;
 val_1425 =  val_1290 *  val_1387;
 val_1426 =  val_1291 *  val_1375;
 val_1427 =  val_1292 *  val_1376;
 val_1428 =  val_1293 *  val_1386;
 val_1429 =  val_1294 *  val_1387;
 val_1430 =  val_1287 *  val_1379;
 val_1431 =  val_1288 *  val_1380;
 val_1432 =  val_1289 *  val_1388;
 val_1433 =  val_1290 *  val_1389;
 val_1434 =  val_1291 *  val_1379;
 val_1435 =  val_1292 *  val_1380;
 val_1436 =  val_1293 *  val_1388;
 val_1437 =  val_1294 *  val_1389;
 val_1438 =  val_1288 *  val_1383;
 val_1439 =  val_1289 *  val_1390;
 val_1440 =  val_1290 *  val_1391;
 val_1441 =  val_1292 *  val_1383;
 val_1442 =  val_1293 *  val_1390;
 val_1443 =  val_1294 *  val_1391;
 val_1444 =  val_1303 *  val_1392;
 val_1445 =  val_1304 *  val_1393;
 val_1446 =  val_1305 *  val_1377;
 val_1447 =  val_1306 *  val_1394;
 val_1448 =  val_1307 *  val_1392;
 val_1449 =  val_1308 *  val_1393;
 val_1450 =  val_1309 *  val_1377;
 val_1451 =  val_1310 *  val_1394;
 val_1452 =  val_1303 *  val_1395;
 val_1453 =  val_1304 *  val_1396;
 val_1454 =  val_1305 *  val_1381;
 val_1455 =  val_1306 *  val_1397;
 val_1456 =  val_1307 *  val_1395;
 val_1457 =  val_1308 *  val_1396;
 val_1458 =  val_1309 *  val_1381;
 val_1459 =  val_1310 *  val_1397;
 val_1460 =  val_1304 *  val_1398;
 val_1461 =  val_1305 *  val_1384;
 val_1462 =  val_1306 *  val_1399;
 val_1463 =  val_1308 *  val_1398;
 val_1464 =  val_1309 *  val_1384;
 val_1465 =  val_1310 *  val_1399;
 val_1466 =  val_1400 +  val_1401;
 val_1467 =  val_1402 +  val_1466;
 val_1468 =  val_1403 +  val_1467;
 val_1469 =  val_1404 +  val_1405;
 val_1470 =  val_1406 +  val_1469;
 val_1471 =  val_1407 +  val_1470;
 val_1472 =  val_1408 +  val_1409;
 val_1473 =  val_1410 +  val_1472;
 val_1474 =  val_1411 +  val_1473;
 val_1475 =  val_1412 +  val_1413;
 val_1476 =  val_1414 +  val_1475;
 val_1477 =  val_1415 +  val_1476;
 val_1478 =  val_1416 +  val_1417;
 val_1479 =  val_1418 +  val_1478;
 val_1480 =  val_1419 +  val_1420;
 val_1481 =  val_1421 +  val_1480;
 val_1482 =  val_1422 +  val_1423;
 val_1483 =  val_1424 +  val_1482;
 val_1484 =  val_1425 +  val_1483;
 val_1485 =  val_1426 +  val_1427;
 val_1486 =  val_1428 +  val_1485;
 val_1487 =  val_1429 +  val_1486;
 val_1488 =  val_1430 +  val_1431;
 val_1489 =  val_1432 +  val_1488;
 val_1490 =  val_1433 +  val_1489;
 val_1491 =  val_1434 +  val_1435;
 val_1492 =  val_1436 +  val_1491;
 val_1493 =  val_1437 +  val_1492;
 val_1494 =  val_1438 +  val_1439;
 val_1495 =  val_1440 +  val_1494;
 val_1496 =  val_1441 +  val_1442;
 val_1497 =  val_1443 +  val_1496;
 val_1498 =  val_1444 +  val_1445;
 val_1499 =  val_1446 +  val_1498;
 val_1500 =  val_1447 +  val_1499;
 val_1501 =  val_1448 +  val_1449;
 val_1502 =  val_1450 +  val_1501;
 val_1503 =  val_1451 +  val_1502;
 val_1504 =  val_1452 +  val_1453;
 val_1505 =  val_1454 +  val_1504;
 val_1506 =  val_1455 +  val_1505;
 val_1507 =  val_1456 +  val_1457;
 val_1508 =  val_1458 +  val_1507;
 val_1509 =  val_1459 +  val_1508;
 val_1510 =  val_1460 +  val_1461;
 val_1511 =  val_1462 +  val_1510;
 val_1512 =  val_1463 +  val_1464;
 val_1513 =  val_1465 +  val_1512;
 val_1514 =  A[idx_off + 43] *  val_1341;
 val_1515 =  A[idx_off + 43] *  val_1343;
 val_1516 =  A[idx_off + 43] *  val_1346;
 val_1517 =  A[idx_off + 43] *  val_1347;
 val_1518 =  A[idx_off + 44] *  val_1349;
 val_1519 =  A[idx_off + 44] *  val_1351;
 val_1520 =  A[idx_off + 44] *  val_1354;
 val_1521 =  A[idx_off + 44] *  val_1355;
 val_1522 =  A[idx_off + 45] *  val_1357;
 val_1523 =  A[idx_off + 45] *  val_1359;
 val_1524 =  A[idx_off + 45] *  val_1362;
 val_1525 =  A[idx_off + 45] *  val_1363;
 val_1526 =  val_1468 *  val_1514;
 val_1527 =  val_1471 *  val_1514;
 val_1528 =  val_1474 *  val_1515;
 val_1529 =  val_1477 *  val_1514;
 val_1530 =  val_1479 *  val_1516;
 val_1531 =  val_1481 *  val_1517;
 val_1532 =  val_1484 *  val_1518;
 val_1533 =  val_1487 *  val_1518;
 val_1534 =  val_1490 *  val_1519;
 val_1535 =  val_1493 *  val_1518;
 val_1536 =  val_1495 *  val_1520;
 val_1537 =  val_1497 *  val_1521;
 val_1538 =  val_1500 *  val_1522;
 val_1539 =  val_1503 *  val_1522;
 val_1540 =  val_1506 *  val_1523;
 val_1541 =  val_1509 *  val_1522;
 val_1542 =  val_1511 *  val_1524;
 val_1543 =  val_1513 *  val_1525;
 val_1544 =  val_1526 +  val_1532;
 val_1545 =  val_1527 +  val_1533;
 val_1546 =  val_1528 +  val_1534;
 val_1547 =  val_1529 +  val_1535;
 val_1548 =  val_1530 +  val_1536;
 val_1549 =  val_1531 +  val_1537;
 val_1550 =  val_1538 +  val_1544;
 val_1551 =  val_1539 +  val_1545;
 val_1552 =  val_1540 +  val_1546;
 val_1553 =  val_1541 +  val_1547;
 val_1554 =  val_1542 +  val_1548;
 val_1555 =  val_1543 +  val_1549;
 val_1556 =  A[idx_off + 122] *  val_1550;
 val_1557 =  A[idx_off + 123] *  val_1551;
 val_1558 =  A[idx_off + 122] *  val_1552;
 val_1559 =  A[idx_off + 123] *  val_1553;
 val_1560 =  A[idx_off + 122] *  val_1554;
 val_1561 =  A[idx_off + 123] *  val_1555;
 val_1562 =  val_1556 +  val_1557;
 val_1563 =  val_1558 +  val_1559;
 val_1564 =  val_1560 +  val_1561;
 val_1565 =  A[idx_off + 116] *  val_1562;
 val_1566 =  A[idx_off + 117] *  val_1563;
 val_1567 =  A[idx_off + 118] *  val_1564;
 val_1568 =  val_1565 +  val_1566;
 val_1569 =  val_1567 +  val_1568;
 A[i*n_inputs] += val_1569;
  }
  A[i*n_inputs] += val_1569;
}

int 
main(void)
{
    // Error code to check return values for CUDA calls
    hipError_t err = hipSuccess;
    
#define N_INPUTS 192
#define N_ARITH 1420
    const int n_inputs= N_INPUTS;
    const int n_arith= N_ARITH;
    const int batch_size= 1024;
    const int iter= 1024;
    const int thresh= n_arith/3;

    size_t size= batch_size * (n_inputs) * (iter) * sizeof(float);
    size_t size_idx= n_arith * sizeof(int);

    float *h_A= (float *)malloc(size);
    int *h_B= (int *)malloc(size_idx);
    int *h_C= (int *)malloc(size_idx);
    int *h_op_sel= (int *) malloc(size_idx);
    
    // Initialize the host input vectors
    for (int i = 0; i < n_arith; ++i)
    {
        if (i < thresh) {
          h_B[i] = rand() % (n_inputs); 
          h_C[i] = rand() % (n_inputs);  
        }
        else{
          h_B[i] = rand() % (i); 
          h_C[i] = rand() % (i);  
        }
        h_op_sel[i]= rand() % 2;
    }
    
    for (int i= 0; i < n_inputs; ++i) {
      for (int b =0; b< batch_size; ++b) {
        //h_A[b* n_inputs + i]= float(rand());
        h_A[b* n_inputs + i]= 0.5;
      }
    }

    // Allocate the device input vector A
    float *d_A = NULL;
    err = hipMalloc((void **)&d_A, size);

    if (err != hipSuccess)
    {
        fprintf(stderr, "Failed to allocate device vector A (error code %s)!\n", hipGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    int *d_B = NULL;
    err = hipMalloc((void **)&d_B, size_idx);

    if (err != hipSuccess)
    {
        fprintf(stderr, "Failed to allocate device vector A (error code %s)!\n", hipGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    int *d_C = NULL;
    err = hipMalloc((void **)&d_C, size_idx);

    if (err != hipSuccess)
    {
        fprintf(stderr, "Failed to allocate device vector A (error code %s)!\n", hipGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    int *d_op_sel = NULL;
    err = hipMalloc((void **)&d_op_sel, size_idx);

    if (err != hipSuccess)
    {
        fprintf(stderr, "Failed to allocate device vector A (error code %s)!\n", hipGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    // Copy the host input vectors A and B in host memory to the device input vectors in
    // device memory
    printf("Copy input data from the host memory to the CUDA device\n");
    err = hipMemcpy(d_A, h_A, size, hipMemcpyHostToDevice);
    if (err != hipSuccess)
    {
        fprintf(stderr, "Failed to copy vector A from host to device (error code %s)!\n", hipGetErrorString(err));
        exit(EXIT_FAILURE);
    }
    err = hipMemcpy(d_B, h_B, size_idx, hipMemcpyHostToDevice);
    if (err != hipSuccess)
    {
        fprintf(stderr, "Failed to copy vector B from host to device (error code %s)!\n", hipGetErrorString(err));
        exit(EXIT_FAILURE);
    }
    err = hipMemcpy(d_C, h_C, size_idx, hipMemcpyHostToDevice);
    if (err != hipSuccess)
    {
        fprintf(stderr, "Failed to copy vector C from host to device (error code %s)!\n", hipGetErrorString(err));
        exit(EXIT_FAILURE);
    }
    err = hipMemcpy(d_op_sel, h_op_sel, size_idx, hipMemcpyHostToDevice);
    if (err != hipSuccess)
    {
        fprintf(stderr, "Failed to copy vector C from host to device (error code %s)!\n", hipGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    // Launch the Vector Add CUDA Kernel
    int threadsPerBlock = 32;
    int blocksPerGrid= (batch_size + threadsPerBlock -1)/ threadsPerBlock;
    struct timeval t1, t2;

    // Perform Warmup
    ac<<<blocksPerGrid, threadsPerBlock>>>(d_A, d_B, d_C, d_op_sel, n_inputs, n_arith, thresh, iter);
    // FInish execution of kernel
    hipDeviceSynchronize();
    
    gettimeofday(&t1, 0);

    printf("CUDA kernel launch with %d blocks of %d threads\n", blocksPerGrid, threadsPerBlock);
    ac<<<blocksPerGrid, threadsPerBlock>>>(d_A, d_B, d_C, d_op_sel, n_inputs, n_arith, thresh, iter);

    // FInish execution of kernel
    hipDeviceSynchronize();
    gettimeofday(&t2, 0);
    
    double time = (1000000.0*(t2.tv_sec-t1.tv_sec) + t2.tv_usec-t1.tv_usec)/1000.0;
    
    printf("Time of kernel:  %3.4f ms \n", time);

    err = hipGetLastError();
    if (err != hipSuccess)
    {
        fprintf(stderr, "Failed to launch vectorAdd kernel (error code %s)!\n", hipGetErrorString(err));
        exit(EXIT_FAILURE);
    }

    printf("Throughput: %.3f Gops/sec, Batch: %d, nIter: %d, n_arith: %d\n", (((1.0*batch_size*iter*n_arith))/time)/10E6, batch_size, iter, n_arith);

    // Copy the device result vector in device memory to the host result vector
    // in host memory.
    printf("Copy output data from the CUDA device to the host memory\n");
    err = hipMemcpy(h_A, d_A, size, hipMemcpyDeviceToHost);
    if (err != hipSuccess)
    {
        fprintf(stderr, "Failed to copy vector C from device to host (error code %s)!\n", hipGetErrorString(err));
        exit(EXIT_FAILURE);
    }
    
    //for (int i=0; i<numElements; i++) {
    for (int i=0; i<32; i++) {
      printf("%d : %f,", i, h_A[i*n_inputs]);
    }

    err = hipFree(d_A);
    err = hipFree(d_B);
    err = hipFree(d_C);

    free(h_A);
    free(h_B);
    free(h_C);

    printf("Done!\n");
    return 0;
}

	.text
	.file	"ac_alarm.hip"
	.globl	_Z17__device_stub__acPfPKiS1_S1_iiii # -- Begin function _Z17__device_stub__acPfPKiS1_S1_iiii
	.type	_Z17__device_stub__acPfPKiS1_S1_iiii,@function
_Z17__device_stub__acPfPKiS1_S1_iiii:   # @_Z17__device_stub__acPfPKiS1_S1_iiii
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$160, %rsp
	.cfi_def_cfa_offset 208
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	56(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	48(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	40(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	32(%rsp), %rdx
	movq	%rcx, (%rdx)
	leaq	12(%rsp), %rcx
	movl	%r8d, (%rcx)
	leaq	8(%rsp), %r8
	movl	%r9d, (%r8)
	leaq	96(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	movq	%r8, 40(%rbx)
	leaq	208(%rsp), %rax
	movq	%rax, 48(%rbx)
	leaq	216(%rsp), %rax
	movq	%rax, 56(%rbx)
	leaq	80(%rsp), %r14
	leaq	64(%rsp), %r15
	leaq	24(%rsp), %r12
	leaq	16(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z2acPfPKiS1_S1_iiii, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$176, %rsp
	.cfi_adjust_cfa_offset -176
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z17__device_stub__acPfPKiS1_S1_iiii, .Lfunc_end0-_Z17__device_stub__acPfPKiS1_S1_iiii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function main
.LCPI1_0:
	.quad	0x412e848000000000              # double 1.0E+6
.LCPI1_1:
	.quad	0x408f400000000000              # double 1000
.LCPI1_2:
	.quad	0x41d6300000000000              # double 1488977920
.LCPI1_3:
	.quad	0x416312d000000000              # double 1.0E+7
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$88, %rsp
	.cfi_def_cfa_offset 144
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$805306368, %edi                # imm = 0x30000000
	callq	malloc
	movq	%rax, 48(%rsp)                  # 8-byte Spill
	movl	$5680, %edi                     # imm = 0x1630
	callq	malloc
	movq	%rax, %r14
	movl	$5680, %edi                     # imm = 0x1630
	callq	malloc
	movq	%rax, %r15
	movl	$5680, %edi                     # imm = 0x1630
	callq	malloc
	movq	%rax, %r12
	xorl	%r13d, %r13d
	movl	$192, %ebp
.LBB1_1:                                # =>This Inner Loop Header: Depth=1
	callq	rand
	cmpq	$473, %r13                      # imm = 0x1D9
	movl	%r13d, %ebx
	cmovbl	%ebp, %ebx
	cltd
	idivl	%ebx
	movl	%edx, (%r14,%r13,4)
	callq	rand
	cltd
	idivl	%ebx
	movl	%edx, (%r15,%r13,4)
	callq	rand
	movl	%eax, %ecx
	shrl	$31, %ecx
	addl	%eax, %ecx
	andl	$-2, %ecx
	subl	%ecx, %eax
	movl	%eax, (%r12,%r13,4)
	incq	%r13
	cmpq	$1420, %r13                     # imm = 0x58C
	jne	.LBB1_1
# %bb.2:                                # %.preheader119.preheader
	xorl	%eax, %eax
	movq	48(%rsp), %rbx                  # 8-byte Reload
	movq	%rbx, %rcx
.LBB1_3:                                # %.preheader119
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB1_4 Depth 2
	movq	$-786432, %rdx                  # imm = 0xFFF40000
.LBB1_4:                                #   Parent Loop BB1_3 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	$1056964608, 786432(%rcx,%rdx)  # imm = 0x3F000000
	addq	$768, %rdx                      # imm = 0x300
	jne	.LBB1_4
# %bb.5:                                #   in Loop: Header=BB1_3 Depth=1
	incq	%rax
	addq	$4, %rcx
	cmpq	$192, %rax
	jne	.LBB1_3
# %bb.6:
	leaq	8(%rsp), %rdi
	movq	$0, (%rdi)
	movl	$805306368, %esi                # imm = 0x30000000
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_7
# %bb.9:
	leaq	24(%rsp), %rdi
	movq	$0, (%rdi)
	movl	$5680, %esi                     # imm = 0x1630
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_7
# %bb.10:
	leaq	16(%rsp), %rdi
	movq	$0, (%rdi)
	movl	$5680, %esi                     # imm = 0x1630
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_7
# %bb.11:
	leaq	32(%rsp), %rdi
	movq	$0, (%rdi)
	movl	$5680, %esi                     # imm = 0x1630
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_7
# %bb.12:
	movl	$.Lstr, %edi
	callq	puts@PLT
	movq	8(%rsp), %rdi
	movl	$805306368, %edx                # imm = 0x30000000
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_13
# %bb.14:
	movq	24(%rsp), %rdi
	movl	$5680, %edx                     # imm = 0x1630
	movq	%r14, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_15
# %bb.16:
	movq	16(%rsp), %rdi
	movl	$5680, %edx                     # imm = 0x1630
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_17
# %bb.18:
	movq	32(%rsp), %rdi
	movl	$5680, %edx                     # imm = 0x1630
	movq	%r12, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_17
# %bb.19:
	movabsq	$4294967328, %r12               # imm = 0x100000020
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_21
# %bb.20:
	movq	8(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdx
	movq	32(%rsp), %rcx
	movl	$192, %r8d
	movl	$1420, %r9d                     # imm = 0x58C
	pushq	$1024                           # imm = 0x400
	.cfi_adjust_cfa_offset 8
	pushq	$473                            # imm = 0x1D9
	.cfi_adjust_cfa_offset 8
	callq	_Z17__device_stub__acPfPKiS1_S1_iiii
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB1_21:
	callq	hipDeviceSynchronize
	leaq	56(%rsp), %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movl	$.L.str.5, %edi
	movl	$32, %esi
	movl	$32, %edx
	xorl	%eax, %eax
	callq	printf
	movq	%r12, %rdi
	movl	$1, %esi
	movq	%r12, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_23
# %bb.22:
	movq	8(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdx
	movq	32(%rsp), %rcx
	movl	$192, %r8d
	movl	$1420, %r9d                     # imm = 0x58C
	pushq	$1024                           # imm = 0x400
	.cfi_adjust_cfa_offset 8
	pushq	$473                            # imm = 0x1D9
	.cfi_adjust_cfa_offset 8
	callq	_Z17__device_stub__acPfPKiS1_S1_iiii
	addq	$16, %rsp
	.cfi_adjust_cfa_offset -16
.LBB1_23:
	callq	hipDeviceSynchronize
	leaq	72(%rsp), %r12
	movq	%r12, %rdi
	xorl	%esi, %esi
	callq	gettimeofday
	movq	(%r12), %rax
	subq	56(%rsp), %rax
	cvtsi2sd	%rax, %xmm2
	mulsd	.LCPI1_0(%rip), %xmm2
	cvtsi2sdq	8(%r12), %xmm0
	cvtsi2sdq	64(%rsp), %xmm1
	addsd	%xmm2, %xmm0
	subsd	%xmm1, %xmm0
	divsd	.LCPI1_1(%rip), %xmm0
	movl	$.L.str.6, %edi
	movsd	%xmm0, 40(%rsp)                 # 8-byte Spill
	movb	$1, %al
	callq	printf
	callq	hipGetLastError
	testl	%eax, %eax
	jne	.LBB1_24
# %bb.25:
	movsd	.LCPI1_2(%rip), %xmm0           # xmm0 = mem[0],zero
	divsd	40(%rsp), %xmm0                 # 8-byte Folded Reload
	divsd	.LCPI1_3(%rip), %xmm0
	movl	$.L.str.8, %edi
	movl	$1024, %esi                     # imm = 0x400
	movl	$1024, %edx                     # imm = 0x400
	movl	$1420, %ecx                     # imm = 0x58C
	movb	$1, %al
	callq	printf
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	movq	8(%rsp), %rsi
	movl	$805306368, %edx                # imm = 0x30000000
	movq	%rbx, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	testl	%eax, %eax
	jne	.LBB1_29
# %bb.26:                               # %.preheader.preheader
	xorl	%r12d, %r12d
	movq	%rbx, %r13
.LBB1_27:                               # %.preheader
                                        # =>This Inner Loop Header: Depth=1
	xorps	%xmm0, %xmm0
	cvtss2sd	(%r13), %xmm0
	movl	$.L.str.11, %edi
	movl	%r12d, %esi
	movb	$1, %al
	callq	printf
	incq	%r12
	addq	$768, %r13                      # imm = 0x300
	cmpq	$32, %r12
	jne	.LBB1_27
# %bb.28:
	movq	8(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	%rbx, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	%r15, %rdi
	callq	free
	movl	$.Lstr.2, %edi
	callq	puts@PLT
	xorl	%eax, %eax
	addq	$88, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.LBB1_7:
	.cfi_def_cfa_offset 144
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str, %esi
	jmp	.LBB1_8
.LBB1_17:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.4, %esi
	jmp	.LBB1_8
.LBB1_13:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.2, %esi
	jmp	.LBB1_8
.LBB1_15:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.3, %esi
	jmp	.LBB1_8
.LBB1_24:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.7, %esi
	jmp	.LBB1_8
.LBB1_29:
	movq	stderr(%rip), %rbx
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.10, %esi
.LBB1_8:
	movq	%rbx, %rdi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	fprintf
	movl	$1, %edi
	callq	exit
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z2acPfPKiS1_S1_iiii, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z2acPfPKiS1_S1_iiii,@object    # @_Z2acPfPKiS1_S1_iiii
	.section	.rodata,"a",@progbits
	.globl	_Z2acPfPKiS1_S1_iiii
	.p2align	3, 0x0
_Z2acPfPKiS1_S1_iiii:
	.quad	_Z17__device_stub__acPfPKiS1_S1_iiii
	.size	_Z2acPfPKiS1_S1_iiii, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Failed to allocate device vector A (error code %s)!\n"
	.size	.L.str, 53

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"Failed to copy vector A from host to device (error code %s)!\n"
	.size	.L.str.2, 62

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"Failed to copy vector B from host to device (error code %s)!\n"
	.size	.L.str.3, 62

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Failed to copy vector C from host to device (error code %s)!\n"
	.size	.L.str.4, 62

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"CUDA kernel launch with %d blocks of %d threads\n"
	.size	.L.str.5, 49

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"Time of kernel:  %3.4f ms \n"
	.size	.L.str.6, 28

	.type	.L.str.7,@object                # @.str.7
.L.str.7:
	.asciz	"Failed to launch vectorAdd kernel (error code %s)!\n"
	.size	.L.str.7, 52

	.type	.L.str.8,@object                # @.str.8
.L.str.8:
	.asciz	"Throughput: %.3f Gops/sec, Batch: %d, nIter: %d, n_arith: %d\n"
	.size	.L.str.8, 62

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"Failed to copy vector C from device to host (error code %s)!\n"
	.size	.L.str.10, 62

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"%d : %f,"
	.size	.L.str.11, 9

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z2acPfPKiS1_S1_iiii"
	.size	.L__unnamed_1, 21

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Copy input data from the host memory to the CUDA device"
	.size	.Lstr, 56

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"Copy output data from the CUDA device to the host memory"
	.size	.Lstr.1, 57

	.type	.Lstr.2,@object                 # @str.2
.Lstr.2:
	.asciz	"Done!"
	.size	.Lstr.2, 6

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z17__device_stub__acPfPKiS1_S1_iiii
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z2acPfPKiS1_S1_iiii
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z2acPfPKiS1_S1_iiii    ; -- Begin function _Z2acPfPKiS1_S1_iiii
	.globl	_Z2acPfPKiS1_S1_iiii
	.p2align	8
	.type	_Z2acPfPKiS1_S1_iiii,@function
_Z2acPfPKiS1_S1_iiii:                   ; @_Z2acPfPKiS1_S1_iiii
; %bb.0:
	s_clause 0x3
	s_load_b32 s4, s[0:1], 0x3c
	s_load_b32 s2, s[0:1], 0x20
	s_load_b32 s3, s[0:1], 0x2c
	s_load_b64 s[0:1], s[0:1], 0x0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s4, s4, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)
	v_mad_u64_u32 v[1:2], null, s15, s4, v[0:1]
	s_cmp_gt_i32 s3, 0
	s_mov_b32 s4, 0
	v_mul_lo_u32 v98, v1, s2
	s_delay_alu instid0(VALU_DEP_1)
	v_ashrrev_i32_e32 v99, 31, v98
	s_cbranch_scc0 .LBB0_2
; %bb.1:
	s_mov_b32 s4, -1
.LBB0_2:                                ; %Flow3510
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s4
	s_cbranch_vccnz .LBB0_5
; %bb.3:                                ; %.lr.ph
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
	v_lshlrev_b64 v[2:3], 2, v[98:99]
	s_mul_i32 s4, s3, s2
	v_mul_lo_u32 v102, s4, v1
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v100, vcc_lo, s0, v2
	v_add_co_ci_u32_e32 v101, vcc_lo, s1, v3, vcc_lo
	global_load_b32 v105, v[100:101], off
.LBB0_4:                                ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v103, 31, v102
	s_add_i32 s3, s3, -1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	s_cmp_eq_u32 s3, 0
	v_lshlrev_b64 v[0:1], 2, v[102:103]
	v_add_nc_u32_e32 v102, s2, v102
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v103, vcc_lo, s0, v0
	v_add_co_ci_u32_e32 v104, vcc_lo, s1, v1, vcc_lo
	s_clause 0x17
	global_load_b128 v[8:11], v[103:104], off offset:16
	global_load_b128 v[40:43], v[103:104], off offset:240
	global_load_b128 v[28:31], v[103:104], off offset:208
	global_load_b128 v[12:15], v[103:104], off offset:32
	global_load_b128 v[4:7], v[103:104], off offset:48
	global_load_b128 v[0:3], v[103:104], off
	global_load_b128 v[20:23], v[103:104], off offset:64
	global_load_b128 v[16:19], v[103:104], off offset:80
	global_load_b128 v[60:63], v[103:104], off offset:288
	global_load_b128 v[90:93], v[103:104], off offset:304
	global_load_b128 v[66:69], v[103:104], off offset:320
	global_load_b128 v[24:27], v[103:104], off offset:224
	global_load_b128 v[70:73], v[103:104], off offset:368
	global_load_b128 v[36:39], v[103:104], off offset:112
	global_load_b128 v[52:55], v[103:104], off offset:256
	global_load_b128 v[56:59], v[103:104], off offset:272
	global_load_b128 v[74:77], v[103:104], off offset:384
	global_load_b128 v[82:85], v[103:104], off offset:432
	global_load_b128 v[78:81], v[103:104], off offset:416
	global_load_b128 v[48:51], v[103:104], off offset:336
	global_load_b128 v[32:35], v[103:104], off offset:160
	global_load_b128 v[44:47], v[103:104], off offset:96
	global_load_b128 v[94:97], v[103:104], off offset:496
	global_load_b128 v[86:89], v[103:104], off offset:192
	s_waitcnt vmcnt(22)
	v_dual_mul_f32 v42, v9, v42 :: v_dual_mul_f32 v41, v8, v41
	s_waitcnt vmcnt(21)
	v_mul_f32_e32 v107, v9, v31
	s_waitcnt vmcnt(17)
	v_dual_mul_f32 v106, v12, v31 :: v_dual_mul_f32 v31, v31, v21
	v_dual_mul_f32 v65, v0, v41 :: v_dual_mul_f32 v64, v6, v42
	s_waitcnt vmcnt(12)
	v_dual_fmac_f32 v107, v30, v12 :: v_dual_mul_f32 v26, v3, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v110, v19, v42, v65
	v_fmac_f32_e32 v64, v4, v41
	s_waitcnt vmcnt(8)
	v_dual_mul_f32 v73, v8, v73 :: v_dual_mul_f32 v56, v9, v56
	v_fmac_f32_e32 v31, v0, v30
	v_mul_f32_e32 v110, v63, v110
	v_mul_f32_e32 v109, v4, v42
	v_fmac_f32_e32 v107, v0, v24
	v_mul_f32_e32 v25, v2, v25
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_dual_fmac_f32 v31, v24, v22 :: v_dual_fmac_f32 v110, v62, v64
	v_dual_mul_f32 v108, v0, v42 :: v_dual_fmac_f32 v109, v5, v41
	v_mul_f32_e32 v55, v8, v55
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_mul_f32 v31, v31, v72 :: v_dual_mul_f32 v72, v4, v67
	v_fma_f32 v111, v0, v41, v108
	v_fma_f32 v112, v6, v41, v108
	v_fma_f32 v113, v5, v41, v108
	v_dual_fmac_f32 v108, v4, v41 :: v_dual_mul_f32 v41, v18, v92
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_dual_fmac_f32 v65, v4, v42 :: v_dual_mul_f32 v112, v63, v112
	v_mul_f32_e32 v114, v4, v92
	v_dual_mul_f32 v108, v63, v108 :: v_dual_fmac_f32 v41, v18, v91
	v_mul_f32_e32 v92, v0, v92
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fmac_f32_e32 v112, v62, v109
	v_fmac_f32_e32 v110, v111, v90
	v_fmac_f32_e32 v108, v62, v111
	v_fmac_f32_e32 v41, v18, v93
	v_fma_f32 v109, v4, v91, v92
	v_fmac_f32_e32 v106, v9, v30
	v_fmac_f32_e32 v112, v113, v90
	v_fmac_f32_e32 v108, v65, v90
	v_fmac_f32_e32 v114, v0, v91
	v_fmac_f32_e32 v109, v0, v93
	v_fmac_f32_e32 v106, v0, v24
	v_mul_f32_e32 v42, v18, v67
	v_fmac_f32_e32 v92, v0, v91
	v_dual_fmac_f32 v114, v0, v93 :: v_dual_mul_f32 v91, v107, v71
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_mul_f32_e32 v90, v106, v70
	v_mul_f32_e32 v106, v0, v67
	v_dual_fmac_f32 v92, v4, v93 :: v_dual_mul_f32 v93, v2, v27
	v_fmac_f32_e32 v72, v0, v66
	v_mul_f32_e32 v30, v0, v52
	s_delay_alu instid0(VALU_DEP_4)
	v_fma_f32 v67, v4, v66, v106
	v_fmac_f32_e32 v106, v0, v66
	v_mul_f32_e32 v70, v10, v69
	v_fmac_f32_e32 v72, v0, v68
	v_mul_f32_e32 v24, v37, v52
	v_fmac_f32_e32 v67, v0, v68
	v_mul_f32_e32 v71, v112, v60
	v_dual_mul_f32 v61, v108, v61 :: v_dual_fmac_f32 v42, v18, v66
	v_fmac_f32_e32 v106, v4, v68
	s_waitcnt vmcnt(7)
	v_mul_f32_e32 v60, v9, v74
	s_waitcnt vmcnt(6)
	v_mul_f32_e32 v74, v9, v82
	v_mul_f32_e32 v82, v12, v82
	v_fmac_f32_e32 v42, v18, v68
	v_mul_f32_e32 v18, v3, v40
	global_load_b128 v[62:65], v[103:104], off offset:352
	s_waitcnt vmcnt(5)
	v_dual_fmac_f32 v74, v12, v81 :: v_dual_mul_f32 v51, v14, v51
	v_mul_f32_e32 v40, v42, v93
	v_mul_f32_e32 v42, v42, v18
	v_mul_f32_e32 v66, v67, v18
	v_dual_mul_f32 v18, v106, v18 :: v_dual_mul_f32 v93, v72, v93
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_mul_f32_e32 v52, v41, v40
	v_fma_f32 v106, v9, v81, v82
	v_fmac_f32_e32 v74, v0, v83
	v_mul_f32_e32 v72, v92, v18
	v_fmac_f32_e32 v82, v0, v81
	v_fma_f32 v107, v41, v42, v52
	v_fmac_f32_e32 v106, v0, v83
	v_mul_f32_e32 v74, v74, v91
	v_fmac_f32_e32 v72, v114, v93
	v_dual_fmac_f32 v52, v109, v66 :: v_dual_mul_f32 v109, v58, v1
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_dual_fmac_f32 v82, v9, v83 :: v_dual_mul_f32 v81, v3, v74
	v_dual_mul_f32 v58, v2, v58 :: v_dual_mul_f32 v83, v11, v48
	v_dual_fmac_f32 v109, v57, v0 :: v_dual_mul_f32 v18, v106, v90
	s_delay_alu instid0(VALU_DEP_3)
	v_mul_f32_e32 v48, v82, v31
	v_mul_f32_e32 v82, v12, v74
	v_mul_f32_e32 v90, v7, v74
	v_mul_f32_e32 v74, v0, v74
	v_dual_fmac_f32 v81, v8, v18 :: v_dual_mul_f32 v60, v109, v60
	v_fmac_f32_e32 v58, v3, v57
	v_fmac_f32_e32 v82, v9, v18
	v_fmac_f32_e32 v90, v0, v18
	v_fmac_f32_e32 v74, v4, v18
	v_fmac_f32_e32 v81, v8, v48
	s_waitcnt vmcnt(4)
	v_mul_f32_e32 v31, v0, v33
	v_mul_f32_e32 v33, v58, v73
	v_fma_f32 v27, v37, v43, v30
	v_fmac_f32_e32 v90, v3, v48
	v_fmac_f32_e32 v24, v0, v43
	v_fmac_f32_e32 v82, v0, v48
	v_fmac_f32_e32 v74, v0, v48
	v_mul_f32_e32 v48, v81, v60
	v_fmac_f32_e32 v30, v0, v43
	global_load_b128 v[40:43], v[103:104], off offset:176
	v_mul_f32_e32 v57, v90, v60
	v_mul_f32_e32 v58, v82, v33
	v_dual_mul_f32 v60, v74, v33 :: v_dual_mul_f32 v73, v3, v48
	v_mul_f32_e32 v33, v110, v59
	v_mul_f32_e32 v59, v8, v48
	v_mul_f32_e32 v90, v16, v57
	v_mul_f32_e32 v48, v0, v58
	v_fmac_f32_e32 v73, v12, v60
	v_mul_f32_e32 v61, v72, v61
	v_fma_f32 v74, v9, v60, v59
	v_fmac_f32_e32 v90, v4, v58
	v_fma_f32 v58, v17, v57, v48
	v_mul_f32_e32 v81, v73, v83
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_dual_fmac_f32 v59, v0, v60 :: v_dual_mul_f32 v74, v74, v83
	v_fmac_f32_e32 v48, v0, v57
	v_dual_mul_f32 v52, v52, v71 :: v_dual_fmac_f32 v81, v58, v70
	s_delay_alu instid0(VALU_DEP_3)
	v_dual_mul_f32 v73, v59, v83 :: v_dual_fmac_f32 v74, v90, v70
	v_mul_f32_e32 v33, v107, v33
	global_load_b128 v[66:69], v[103:104], off offset:400
	s_waitcnt vmcnt(4)
	v_mul_f32_e32 v81, v81, v95
	v_fmac_f32_e32 v73, v48, v70
	v_mul_f32_e32 v48, v74, v94
	v_mul_f32_e32 v74, v3, v52
	v_mul_f32_e32 v52, v7, v52
	v_mul_f32_e32 v70, v12, v81
	v_mul_f32_e32 v71, v0, v81
	v_mul_f32_e32 v72, v9, v81
	v_mul_f32_e32 v73, v73, v96
	global_load_b128 v[57:60], v[103:104], off offset:480
	v_fma_f32 v81, v9, v48, v70
	v_fma_f32 v83, v11, v48, v71
	v_fma_f32 v90, v12, v48, v72
	v_fmac_f32_e32 v71, v0, v48
	v_fma_f32 v91, v4, v48, v72
	v_fma_f32 v92, v0, v48, v70
	v_fmac_f32_e32 v70, v20, v48
	v_fmac_f32_e32 v72, v0, v48
	v_fmac_f32_e32 v81, v0, v73
	v_fmac_f32_e32 v90, v5, v73
	v_fma_f32 v48, v0, v73, v71
	v_fmac_f32_e32 v71, v44, v73
	v_fmac_f32_e32 v91, v5, v73
	v_mul_f32_e32 v93, v81, v74
	v_dual_mul_f32 v94, v90, v74 :: v_dual_mul_f32 v81, v81, v52
	s_delay_alu instid0(VALU_DEP_4)
	v_mul_f32_e32 v74, v71, v74
	v_mul_f32_e32 v90, v90, v52
	v_mul_f32_e32 v52, v71, v52
	v_fmac_f32_e32 v92, v44, v73
	v_mul_f32_e32 v71, v8, v33
	v_mul_f32_e32 v33, v0, v33
	v_fmac_f32_e32 v72, v4, v73
	v_fmac_f32_e32 v83, v0, v73
	s_delay_alu instid0(VALU_DEP_4)
	v_dual_fmac_f32 v70, v0, v73 :: v_dual_fmac_f32 v93, v91, v71
	v_fmac_f32_e32 v74, v48, v71
	v_fmac_f32_e32 v90, v92, v33
	v_fmac_f32_e32 v52, v48, v33
	v_dual_fmac_f32 v81, v91, v33 :: v_dual_fmac_f32 v94, v92, v71
	v_fmac_f32_e32 v27, v0, v53
	v_fmac_f32_e32 v24, v0, v53
	s_delay_alu instid0(VALU_DEP_2)
	v_fmac_f32_e32 v27, v0, v54
	s_waitcnt vmcnt(2)
	v_dual_mul_f32 v13, v13, v65 :: v_dual_mul_f32 v48, v0, v43
	v_dual_mul_f32 v33, v43, v46 :: v_dual_mul_f32 v46, v8, v61
	v_dual_mul_f32 v61, v3, v61 :: v_dual_mul_f32 v34, v1, v34
	v_mul_f32_e32 v71, v8, v42
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fmac_f32_e32 v48, v4, v42
	v_fmac_f32_e32 v74, v72, v46
	s_delay_alu instid0(VALU_DEP_4)
	v_dual_fmac_f32 v52, v72, v61 :: v_dual_fmac_f32 v93, v83, v46
	v_fmac_f32_e32 v94, v70, v46
	v_fmac_f32_e32 v90, v70, v61
	v_mul_f32_e32 v70, v43, v45
	v_mul_f32_e32 v72, v7, v43
	v_mul_f32_e32 v46, v2, v49
	v_fmac_f32_e32 v81, v83, v61
	v_dual_mul_f32 v18, v34, v5 :: v_dual_mul_f32 v61, v29, v74
	v_mul_f32_e32 v49, v3, v50
	v_fmac_f32_e32 v33, v2, v42
	v_fma_f32 v50, v6, v43, v71
	v_dual_fmac_f32 v48, v0, v86 :: v_dual_mul_f32 v29, v29, v52
	v_mul_f32_e32 v52, v89, v93
	v_dual_fmac_f32 v70, v5, v42 :: v_dual_fmac_f32 v71, v10, v43
	v_mul_f32_e32 v43, v28, v94
	v_fma_f32 v73, v3, v42, v72
	v_fmac_f32_e32 v72, v0, v42
	v_mul_f32_e32 v42, v89, v81
	v_mul_f32_e32 v74, v48, v52
	v_dual_fmac_f32 v33, v8, v86 :: v_dual_fmac_f32 v50, v86, v47
	v_mul_f32_e32 v28, v28, v90
	v_fmac_f32_e32 v70, v2, v86
	v_mul_f32_e32 v81, v48, v42
	v_fma_f32 v47, v48, v43, v74
	v_fmac_f32_e32 v74, v33, v43
	v_mul_f32_e32 v43, v50, v43
	v_fma_f32 v82, v31, v4, v18
	v_mul_f32_e32 v34, v34, v6
	v_mul_f32_e32 v50, v50, v28
	v_fma_f32 v48, v48, v28, v81
	v_fmac_f32_e32 v43, v70, v52
	v_fmac_f32_e32 v73, v0, v86
	v_dual_fmac_f32 v71, v86, v36 :: v_dual_fmac_f32 v72, v3, v86
	v_dual_fmac_f32 v81, v33, v28 :: v_dual_mul_f32 v28, v22, v46
	v_dual_mul_f32 v33, v5, v46 :: v_dual_mul_f32 v52, v0, v49
	v_fmac_f32_e32 v50, v70, v42
	v_mul_f32_e32 v42, v8, v49
	v_dual_mul_f32 v83, v22, v49 :: v_dual_fmac_f32 v34, v0, v31
	v_dual_fmac_f32 v18, v0, v31 :: v_dual_mul_f32 v31, v9, v49
	v_mul_f32_e32 v82, v82, v97
	v_fmac_f32_e32 v47, v73, v61
	v_fmac_f32_e32 v74, v71, v61
	v_fmac_f32_e32 v43, v72, v61
	v_mul_f32_e32 v61, v1, v49
	v_fmac_f32_e32 v48, v73, v29
	v_mul_f32_e32 v86, v5, v49
	v_mul_f32_e32 v89, v2, v49
	v_mul_f32_e32 v90, v3, v49
	v_fmac_f32_e32 v81, v71, v29
	v_fmac_f32_e32 v28, v1, v49
	v_fmac_f32_e32 v33, v0, v49
	v_fmac_f32_e32 v52, v0, v46
	v_dual_fmac_f32 v61, v1, v46 :: v_dual_fmac_f32 v50, v72, v29
	v_fma_f32 v29, v22, v46, v31
	v_fma_f32 v91, v9, v46, v31
	v_fmac_f32_e32 v31, v1, v46
	v_fma_f32 v92, v0, v46, v42
	v_fma_f32 v93, v8, v46, v42
	v_fmac_f32_e32 v42, v5, v46
	v_fmac_f32_e32 v89, v2, v46
	v_fma_f32 v94, v5, v46, v86
	v_fmac_f32_e32 v86, v2, v46
	v_fmac_f32_e32 v90, v3, v46
	v_fma_f32 v95, v22, v46, v83
	v_dual_fmac_f32 v83, v3, v46 :: v_dual_mul_f32 v96, v82, v47
	v_mul_f32_e32 v82, v82, v48
	s_clause 0x1
	global_load_b128 v[46:49], v[103:104], off offset:512
	global_load_b128 v[70:73], v[103:104], off offset:528
	s_waitcnt vmcnt(1)
	v_mul_f32_e32 v34, v34, v46
	v_mul_f32_e32 v18, v18, v47
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v46, v34, v74
	v_mul_f32_e32 v34, v34, v81
	v_mul_f32_e32 v43, v18, v43
	v_mul_f32_e32 v18, v18, v50
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v50, v52, v96 :: v_dual_mul_f32 v47, v93, v46
	v_fma_f32 v74, v92, v46, v50
	v_fma_f32 v81, v93, v46, v50
	v_fmac_f32_e32 v50, v52, v46
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_dual_mul_f32 v46, v91, v34 :: v_dual_fmac_f32 v47, v92, v96
	v_fmac_f32_e32 v74, v95, v43
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fma_f32 v29, v29, v43, v81
	v_dual_fmac_f32 v81, v28, v43 :: v_dual_fmac_f32 v46, v31, v82
	v_mul_f32_e32 v82, v61, v82
	v_fma_f32 v28, v91, v43, v47
	v_fmac_f32_e32 v47, v61, v43
	v_fma_f32 v86, v86, v43, v50
	s_delay_alu instid0(VALU_DEP_4)
	v_fma_f32 v31, v31, v34, v82
	v_fma_f32 v92, v91, v34, v82
	v_fmac_f32_e32 v82, v61, v34
	v_fma_f32 v61, v89, v43, v50
	v_fmac_f32_e32 v50, v94, v43
	v_fmac_f32_e32 v31, v94, v18
	v_fma_f32 v34, v42, v18, v92
	v_fmac_f32_e32 v92, v33, v18
	v_fma_f32 v33, v93, v18, v46
	v_fmac_f32_e32 v46, v52, v18
	v_fma_f32 v43, v90, v18, v82
	v_fma_f32 v52, v83, v18, v82
	v_fmac_f32_e32 v82, v95, v18
	v_mul_f32_e32 v42, v88, v31
	v_mul_f32_e32 v31, v88, v92
	s_clause 0x1
	global_load_b128 v[89:92], v[103:104], off offset:128
	global_load_b128 v[93:96], v[103:104], off offset:144
	v_mul_f32_e32 v34, v88, v34
	v_mul_f32_e32 v18, v88, v46
	v_mul_f32_e32 v43, v88, v43
	v_mul_f32_e32 v46, v88, v52
	v_mul_f32_e32 v52, v0, v84
	v_fmac_f32_e32 v34, v87, v29
	v_mul_f32_e32 v29, v88, v33
	v_mul_f32_e32 v33, v88, v82
	v_fmac_f32_e32 v42, v87, v74
	v_fmac_f32_e32 v31, v87, v81
	v_fmac_f32_e32 v43, v87, v61
	v_dual_fmac_f32 v29, v87, v28 :: v_dual_mul_f32 v28, v20, v79
	v_mul_f32_e32 v79, v3, v79
	v_fmac_f32_e32 v46, v87, v86
	v_fmac_f32_e32 v33, v87, v50
	v_fma_f32 v61, v0, v85, v52
	v_fmac_f32_e32 v28, v0, v78
	v_dual_fmac_f32 v18, v87, v47 :: v_dual_mul_f32 v87, v10, v84
	v_fmac_f32_e32 v79, v78, v8
	s_delay_alu instid0(VALU_DEP_3)
	v_dual_mul_f32 v47, v0, v85 :: v_dual_fmac_f32 v28, v11, v80
	v_mul_f32_e32 v11, v0, v76
	v_fma_f32 v81, v21, v85, v52
	v_fma_f32 v82, v3, v85, v52
	v_fma_f32 v83, v5, v85, v52
	v_fma_f32 v36, v36, v85, v87
	v_fma_f32 v78, v37, v75, v11
	v_fmac_f32_e32 v11, v0, v75
	v_fmac_f32_e32 v87, v22, v85
	v_fmac_f32_e32 v79, v8, v80
	v_dual_mul_f32 v80, v76, v38 :: v_dual_fmac_f32 v47, v37, v84
	v_dual_mul_f32 v20, v3, v68 :: v_dual_mul_f32 v21, v8, v67
	v_mul_f32_e32 v22, v8, v69
	s_delay_alu instid0(VALU_DEP_3)
	v_fmac_f32_e32 v80, v16, v75
	v_dual_fmac_f32 v24, v0, v54 :: v_dual_mul_f32 v31, v31, v57
	v_mul_f32_e32 v29, v29, v58
	v_mul_f32_e32 v33, v33, v58
	s_waitcnt vmcnt(1)
	v_mul_f32_e32 v50, v85, v91
	s_waitcnt vmcnt(0)
	v_fma_f32 v86, v85, v94, v52
	v_fmac_f32_e32 v52, v37, v85
	v_mul_f32_e32 v88, v85, v95
	v_mul_f32_e32 v85, v85, v96
	v_fma_f32 v95, v0, v77, v11
	v_dual_fmac_f32 v50, v8, v84 :: v_dual_fmac_f32 v11, v37, v77
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fmac_f32_e32 v88, v2, v84
	v_dual_fmac_f32 v85, v6, v84 :: v_dual_mul_f32 v84, v0, v75
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_dual_fmac_f32 v95, v37, v66 :: v_dual_mul_f32 v64, v12, v64
	v_mul_f32_e32 v94, v76, v39
	v_fmac_f32_e32 v78, v0, v77
	v_dual_fmac_f32 v84, v37, v76 :: v_dual_fmac_f32 v11, v0, v66
	v_fmac_f32_e32 v80, v0, v77
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fmac_f32_e32 v94, v45, v75
	v_mul_f32_e32 v74, v0, v20
	v_fmac_f32_e32 v84, v0, v77
	v_mul_f32_e32 v76, v20, v23
	v_fmac_f32_e32 v78, v0, v66
	v_fmac_f32_e32 v94, v0, v77
	v_mul_f32_e32 v77, v8, v20
	v_fma_f32 v75, v21, v23, v74
	v_fmac_f32_e32 v74, v0, v21
	v_fmac_f32_e32 v76, v0, v21
	v_fmac_f32_e32 v80, v0, v66
	v_fmac_f32_e32 v77, v8, v21
	v_fmac_f32_e32 v84, v0, v66
	v_fmac_f32_e32 v94, v0, v66
	v_fmac_f32_e32 v74, v23, v22
	v_fmac_f32_e32 v75, v0, v22
	v_fmac_f32_e32 v77, v8, v22
	v_fmac_f32_e32 v76, v0, v22
	s_clause 0x1
	global_load_b128 v[66:69], v[103:104], off offset:544
	global_load_b128 v[20:23], v[103:104], off offset:560
	s_waitcnt vmcnt(1)
	v_dual_mul_f32 v69, v75, v69 :: v_dual_mul_f32 v68, v77, v68
	s_waitcnt vmcnt(0)
	v_mul_f32_e32 v20, v76, v20
	v_mul_f32_e32 v106, v74, v21
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v75, v69, v37
	v_mul_f32_e32 v69, v0, v69
	v_fmac_f32_e32 v75, v68, v37
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v69, v0, v68
	v_fma_f32 v68, v20, v37, v75
	v_fmac_f32_e32 v75, v0, v20
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fma_f32 v97, v0, v20, v69
	v_fmac_f32_e32 v69, v20, v37
	v_fmac_f32_e32 v68, v0, v106
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v75, v0, v106
	v_dual_fmac_f32 v69, v0, v106 :: v_dual_mul_f32 v20, v26, v75
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v20, v25, v68
	v_fma_f32 v68, v0, v106, v97
	v_fmac_f32_e32 v97, v37, v106
	v_mul_f32_e32 v107, v68, v25
	v_mul_f32_e32 v68, v68, v26
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fma_f32 v21, v69, v26, v107
	v_dual_mul_f32 v69, v20, v22 :: v_dual_fmac_f32 v68, v97, v25
	v_fmac_f32_e32 v107, v97, v26
	s_delay_alu instid0(VALU_DEP_3)
	v_mul_f32_e32 v108, v21, v23
	s_clause 0x1
	global_load_b128 v[74:77], v[103:104], off offset:448
	global_load_b128 v[20:23], v[103:104], off offset:464
	v_fma_f32 v110, v37, v53, v30
	v_dual_fmac_f32 v30, v0, v53 :: v_dual_mul_f32 v53, v27, v72
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v110, v0, v54
	v_fmac_f32_e32 v30, v37, v54
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_mul_f32_e32 v30, v30, v67
	v_mul_f32_e32 v67, v110, v66
	s_delay_alu instid0(VALU_DEP_2)
	v_mul_f32_e32 v65, v11, v30
	s_waitcnt vmcnt(1)
	v_fmac_f32_e32 v47, v0, v74
	v_fmac_f32_e32 v50, v91, v74
	v_fmac_f32_e32 v86, v91, v74
	v_fmac_f32_e32 v83, v17, v74
	v_fma_f32 v17, v74, v93, v61
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_dual_fmac_f32 v47, v0, v75 :: v_dual_fmac_f32 v50, v75, v92
	v_fmac_f32_e32 v86, v19, v75
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_dual_fmac_f32 v82, v74, v93 :: v_dual_fmac_f32 v17, v3, v75
	v_fmac_f32_e32 v83, v10, v75
	v_dual_mul_f32 v19, v50, v108 :: v_dual_mul_f32 v50, v47, v69
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f32_e32 v10, v86, v108
	v_mul_f32_e32 v92, v17, v108
	v_dual_mul_f32 v93, v17, v69 :: v_dual_fmac_f32 v52, v0, v74
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f32_e32 v91, v37, v50
	v_dual_mul_f32 v25, v83, v69 :: v_dual_mul_f32 v26, v37, v10
	v_mul_f32_e32 v10, v0, v10
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fmac_f32_e32 v52, v0, v75
	v_fma_f32 v109, v37, v19, v91
	v_fmac_f32_e32 v91, v16, v92
	global_load_b64 v[16:17], v[103:104], off offset:576
	v_dual_fmac_f32 v87, v7, v74 :: v_dual_fmac_f32 v26, v9, v25
	v_mul_f32_e32 v111, v47, v108
	v_fma_f32 v39, v39, v74, v61
	v_fmac_f32_e32 v81, v5, v74
	s_delay_alu instid0(VALU_DEP_4)
	v_fmac_f32_e32 v87, v0, v75
	v_fmac_f32_e32 v36, v12, v74
	v_mul_f32_e32 v112, v0, v111
	v_fmac_f32_e32 v39, v45, v75
	v_fmac_f32_e32 v85, v0, v74
	v_fmac_f32_e32 v81, v6, v75
	v_fmac_f32_e32 v36, v0, v75
	v_fma_f32 v96, v96, v93, v112
	s_delay_alu instid0(VALU_DEP_4)
	v_fmac_f32_e32 v85, v0, v75
	s_waitcnt vmcnt(0)
	v_dual_mul_f32 v16, v68, v16 :: v_dual_mul_f32 v17, v107, v17
	v_fma_f32 v68, v25, v15, v10
	v_fmac_f32_e32 v10, v0, v25
	v_mul_f32_e32 v107, v0, v56
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_mul_f32_e32 v25, v52, v16
	v_fma_f32 v52, v0, v74, v61
	v_fmac_f32_e32 v61, v37, v74
	v_dual_mul_f32 v45, v47, v16 :: v_dual_mul_f32 v36, v36, v17
	v_fmac_f32_e32 v26, v0, v25
	v_fmac_f32_e32 v68, v37, v25
	v_fmac_f32_e32 v10, v0, v25
	v_mul_f32_e32 v25, v87, v17
	v_fmac_f32_e32 v61, v0, v75
	v_mul_f32_e32 v47, v47, v17
	v_mul_f32_e32 v39, v39, v17
	v_fmac_f32_e32 v91, v37, v45
	v_fmac_f32_e32 v26, v37, v25
	v_fmac_f32_e32 v68, v0, v25
	v_fmac_f32_e32 v10, v0, v25
	v_mul_f32_e32 v25, v0, v50
	v_mul_f32_e32 v61, v61, v16
	v_fmac_f32_e32 v109, v37, v45
	v_fmac_f32_e32 v112, v0, v93
	v_fmac_f32_e32 v91, v0, v39
	v_fma_f32 v19, v0, v19, v25
	v_fmac_f32_e32 v52, v37, v75
	v_fma_f32 v38, v38, v92, v25
	v_fmac_f32_e32 v25, v0, v92
	v_fmac_f32_e32 v109, v37, v36
	v_fmac_f32_e32 v19, v0, v45
	v_fma_f32 v83, v37, v61, v112
	v_fmac_f32_e32 v38, v0, v45
	v_fmac_f32_e32 v25, v0, v45
	v_fmac_f32_e32 v112, v0, v61
	v_fmac_f32_e32 v19, v0, v36
	v_fmac_f32_e32 v96, v0, v61
	v_fmac_f32_e32 v38, v0, v39
	v_fma_f32 v50, v37, v39, v25
	v_fmac_f32_e32 v25, v0, v39
	s_delay_alu instid0(VALU_DEP_4)
	v_dual_mul_f32 v19, v19, v64 :: v_dual_fmac_f32 v96, v0, v47
	v_mul_f32_e32 v39, v37, v111
	v_fmac_f32_e32 v83, v0, v47
	v_fmac_f32_e32 v88, v8, v74
	v_fmac_f32_e32 v112, v0, v47
	v_mul_f32_e32 v10, v10, v64
	v_fmac_f32_e32 v39, v6, v93
	v_mul_f32_e32 v111, v12, v55
	v_fmac_f32_e32 v88, v0, v75
	v_mul_f32_e32 v18, v18, v58
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_dual_mul_f32 v42, v42, v23 :: v_dual_fmac_f32 v39, v0, v61
	v_mul_f32_e32 v61, v52, v108
	v_fmac_f32_e32 v111, v4, v56
	v_mul_f32_e32 v23, v43, v23
	v_fmac_f32_e32 v39, v37, v47
	v_mul_f32_e32 v47, v69, v88
	v_mul_f32_e32 v86, v5, v61
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v69, v52, v69 :: v_dual_fmac_f32 v86, v37, v47
	v_mul_f32_e32 v47, v0, v47
	v_fma_f32 v87, v61, v32, v47
	v_fmac_f32_e32 v47, v0, v61
	v_mul_f32_e32 v61, v85, v16
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fmac_f32_e32 v86, v37, v61
	v_fmac_f32_e32 v87, v0, v61
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v47, v0, v61
	v_mul_f32_e32 v61, v52, v17
	v_fmac_f32_e32 v86, v0, v61
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fmac_f32_e32 v87, v0, v61
	v_fma_f32 v85, v0, v61, v47
	v_fmac_f32_e32 v47, v37, v61
	v_mul_f32_e32 v61, v91, v13
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v47, v47, v13
	v_fmac_f32_e32 v61, v26, v64
	v_mul_f32_e32 v26, v38, v13
	v_fma_f32 v38, v50, v13, v10
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_fmac_f32 v10, v25, v13 :: v_dual_fmac_f32 v47, v112, v64
	v_dual_mul_f32 v25, v86, v13 :: v_dual_fmac_f32 v26, v64, v68
	v_mul_f32_e32 v54, v84, v53
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_mul_f32 v10, v10, v65 :: v_dual_mul_f32 v65, v95, v30
	v_dual_fmac_f32 v25, v39, v64 :: v_dual_mul_f32 v50, v85, v13
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_mul_f32 v54, v61, v54 :: v_dual_mul_f32 v39, v87, v13
	v_mul_f32_e32 v47, v47, v65
	v_mul_f32_e32 v65, v24, v72
	v_mul_f32_e32 v6, v81, v108
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v68, v84, v65 :: v_dual_mul_f32 v45, v9, v6
	v_dual_mul_f32 v61, v61, v68 :: v_dual_mul_f32 v68, v11, v53
	v_mul_f32_e32 v11, v11, v65
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v45, v5, v69
	v_mul_f32_e32 v68, v25, v68
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_dual_mul_f32 v11, v25, v11 :: v_dual_mul_f32 v24, v24, v73
	v_mul_f32_e32 v25, v27, v73
	v_dual_mul_f32 v91, v0, v68 :: v_dual_mul_f32 v66, v27, v66
	v_mul_f32_e32 v27, v110, v73
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_mul_f32_e32 v72, v78, v24
	v_mul_f32_e32 v73, v78, v25
	v_mul_f32_e32 v85, v94, v25
	v_mul_f32_e32 v25, v95, v25
	v_dual_fmac_f32 v50, v83, v64 :: v_dual_mul_f32 v83, v78, v27
	v_fmac_f32_e32 v39, v96, v64
	v_mul_f32_e32 v72, v26, v72
	v_mul_f32_e32 v73, v26, v73
	v_mul_f32_e32 v86, v94, v27
	v_mul_f32_e32 v26, v26, v83
	v_mul_f32_e32 v83, v94, v24
	v_dual_mul_f32 v85, v39, v85 :: v_dual_mul_f32 v94, v0, v11
	v_mul_f32_e32 v27, v95, v27
	v_fma_f32 v110, v0, v55, v107
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_mul_f32_e32 v83, v39, v83
	v_dual_mul_f32 v39, v39, v86 :: v_dual_mul_f32 v86, v80, v67
	v_mul_f32_e32 v67, v78, v67
	v_fma_f32 v97, v37, v85, v94
	v_fmac_f32_e32 v91, v37, v83
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_dual_mul_f32 v92, v37, v61 :: v_dual_mul_f32 v87, v38, v86
	v_mul_f32_e32 v67, v50, v67
	v_fma_f32 v96, v0, v85, v94
	v_fma_f32 v103, v0, v39, v94
	v_fmac_f32_e32 v94, v37, v39
	v_mul_f32_e32 v39, v0, v39
	v_fmac_f32_e32 v97, v0, v67
	v_fmac_f32_e32 v91, v0, v67
	v_fmac_f32_e32 v82, v0, v75
	v_fma_f32 v93, v0, v73, v92
	v_fmac_f32_e32 v39, v37, v11
	v_dual_fmac_f32 v97, v90, v47 :: v_dual_mul_f32 v16, v52, v16
	v_mul_f32_e32 v52, v6, v15
	v_dual_mul_f32 v6, v0, v6 :: v_dual_mul_f32 v17, v82, v17
	v_fmac_f32_e32 v93, v0, v87
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fmac_f32_e32 v45, v0, v16
	v_fmac_f32_e32 v52, v69, v32
	s_delay_alu instid0(VALU_DEP_4)
	v_fmac_f32_e32 v6, v0, v69
	v_mul_f32_e32 v81, v0, v85
	v_fmac_f32_e32 v93, v89, v10
	v_fmac_f32_e32 v45, v0, v17
	v_fmac_f32_e32 v52, v0, v16
	v_fma_f32 v32, v0, v16, v6
	v_fmac_f32_e32 v6, v37, v16
	v_mul_f32_e32 v30, v84, v30
	v_mul_f32_e32 v16, v45, v13
	v_fmac_f32_e32 v52, v37, v17
	v_fmac_f32_e32 v32, v0, v17
	v_dual_fmac_f32 v6, v0, v17 :: v_dual_fmac_f32 v81, v37, v11
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fmac_f32_e32 v16, v109, v64
	v_fma_f32 v17, v52, v13, v19
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fma_f32 v32, v32, v13, v19
	v_fmac_f32_e32 v19, v6, v13
	v_mul_f32_e32 v13, v78, v53
	v_fmac_f32_e32 v81, v0, v67
	v_dual_mul_f32 v104, v12, v56 :: v_dual_mul_f32 v45, v1, v77
	s_delay_alu instid0(VALU_DEP_4)
	v_mul_f32_e32 v19, v19, v30
	v_mul_f32_e32 v6, v95, v24
	v_mul_f32_e32 v24, v78, v65
	v_mul_f32_e32 v13, v16, v13
	v_fmac_f32_e32 v81, v2, v47
	v_fma_f32 v106, v12, v55, v104
	v_mul_f32_e32 v6, v17, v6
	v_mul_f32_e32 v16, v16, v24
	v_mul_f32_e32 v24, v17, v25
	v_mul_f32_e32 v17, v17, v27
	v_mul_f32_e32 v27, v32, v86
	v_mul_f32_e32 v25, v0, v6
	v_mul_f32_e32 v36, v0, v16
	v_dual_mul_f32 v104, v104, v70 :: v_dual_mul_f32 v45, v79, v45
	v_fmac_f32_e32 v92, v0, v26
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_fma_f32 v52, v37, v13, v25
	v_fmac_f32_e32 v25, v0, v13
	v_mul_f32_e32 v80, v80, v66
	v_fma_f32 v11, v37, v24, v36
	v_dual_mul_f32 v66, v78, v66 :: v_dual_mul_f32 v79, v12, v104
	v_fma_f32 v30, v0, v27, v25
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_fmac_f32 v25, v37, v27 :: v_dual_mul_f32 v38, v38, v80
	v_dual_fmac_f32 v11, v0, v27 :: v_dual_mul_f32 v50, v50, v66
	v_mul_f32_e32 v13, v0, v13
	v_mul_f32_e32 v32, v32, v80
	v_fma_f32 v65, v0, v17, v36
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_fmac_f32_e32 v11, v0, v19
	v_fma_f32 v53, v0, v24, v36
	v_mul_f32_e32 v66, v0, v72
	v_dual_fmac_f32 v94, v0, v50 :: v_dual_fmac_f32 v91, v90, v47
	v_fma_f32 v74, v0, v32, v65
	v_fma_f32 v64, v0, v27, v53
	v_fmac_f32_e32 v53, v37, v27
	v_fma_f32 v88, v37, v54, v66
	v_fmac_f32_e32 v94, v90, v47
	v_fma_f32 v90, v1, v56, v55
	v_fmac_f32_e32 v65, v37, v32
	v_mul_f32_e32 v16, v37, v16
	v_fmac_f32_e32 v88, v0, v87
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_dual_fmac_f32 v53, v0, v19 :: v_dual_mul_f32 v90, v90, v48
	v_fmac_f32_e32 v65, v0, v19
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_fma_f32 v75, v0, v24, v16
	v_mul_f32_e32 v24, v46, v57
	v_fmac_f32_e32 v92, v0, v38
	v_fmac_f32_e32 v88, v89, v10
	v_mul_f32_e32 v106, v106, v49
	v_dual_mul_f32 v34, v34, v57 :: v_dual_mul_f32 v43, v5, v24
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fmac_f32_e32 v92, v89, v10
	v_mul_f32_e32 v89, v9, v56
	v_dual_mul_f32 v76, v0, v76 :: v_dual_fmac_f32 v13, v37, v6
	v_fmac_f32_e32 v43, v44, v23
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_mul_f32 v44, v44, v42 :: v_dual_fmac_f32 v89, v9, v55
	v_dual_mul_f32 v69, v9, v45 :: v_dual_mul_f32 v28, v28, v76
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v13, v0, v27
	v_fma_f32 v85, v5, v34, v44
	s_delay_alu instid0(VALU_DEP_4)
	v_mul_f32_e32 v89, v89, v49
	v_dual_mul_f32 v49, v110, v49 :: v_dual_fmac_f32 v44, v5, v31
	v_dual_mul_f32 v5, v4, v24 :: v_dual_fmac_f32 v36, v37, v17
	v_fma_f32 v56, v9, v56, v55
	v_fma_f32 v55, v9, v55, v107
	v_mul_f32_e32 v45, v8, v45
	s_delay_alu instid0(VALU_DEP_4)
	v_fmac_f32_e32 v5, v0, v23
	v_fmac_f32_e32 v30, v9, v19
	v_fmac_f32_e32 v64, v9, v19
	v_dual_fmac_f32 v74, v9, v19 :: v_dual_mul_f32 v9, v0, v61
	v_mul_f32_e32 v61, v15, v62
	v_fmac_f32_e32 v75, v0, v27
	v_fma_f32 v76, v2, v28, v69
	v_fmac_f32_e32 v13, v0, v19
	v_dual_fmac_f32 v16, v0, v17 :: v_dual_mul_f32 v17, v37, v72
	v_fmac_f32_e32 v5, v0, v33
	v_mul_f32_e32 v72, v0, v42
	v_mul_f32_e32 v42, v4, v42
	v_dual_mul_f32 v56, v56, v70 :: v_dual_fmac_f32 v69, v1, v28
	v_fma_f32 v62, v37, v73, v9
	v_fmac_f32_e32 v75, v15, v19
	v_fma_f32 v57, v0, v34, v72
	v_fma_f32 v82, v4, v34, v72
	v_fmac_f32_e32 v17, v0, v54
	v_fmac_f32_e32 v36, v0, v32
	v_fma_f32 v1, v0, v34, v42
	v_dual_mul_f32 v34, v76, v51 :: v_dual_mul_f32 v5, v5, v41
	v_fmac_f32_e32 v16, v0, v32
	v_mul_f32_e32 v32, v76, v61
	v_mul_f32_e32 v8, v8, v63
	v_fma_f32 v63, v0, v73, v9
	v_fma_f32 v73, v37, v26, v9
	v_fmac_f32_e32 v66, v0, v54
	v_fmac_f32_e32 v9, v0, v26
	v_fma_f32 v54, v3, v28, v45
	v_fma_f32 v77, v0, v87, v63
	v_fmac_f32_e32 v63, v37, v87
	v_fma_f32 v26, v0, v87, v66
	v_fma_f32 v78, v0, v38, v9
	v_dual_fmac_f32 v66, v37, v87 :: v_dual_fmac_f32 v85, v0, v29
	v_fmac_f32_e32 v9, v37, v38
	v_fmac_f32_e32 v17, v0, v87
	v_fmac_f32_e32 v62, v0, v87
	v_dual_fmac_f32 v73, v0, v38 :: v_dual_mul_f32 v38, v54, v51
	v_mul_f32_e32 v87, v92, v32
	v_mul_f32_e32 v58, v0, v24
	v_dual_fmac_f32 v16, v15, v19 :: v_dual_fmac_f32 v9, v0, v10
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_fmac_f32_e32 v73, v0, v10
	v_fmac_f32_e32 v43, v0, v33
	v_fma_f32 v84, v4, v23, v58
	v_dual_fmac_f32 v58, v0, v23 :: v_dual_fmac_f32 v87, v74, v34
	v_dual_mul_f32 v70, v107, v70 :: v_dual_fmac_f32 v45, v0, v28
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_fmac_f32_e32 v84, v0, v33
	v_fmac_f32_e32 v58, v4, v33
	v_dual_mul_f32 v33, v54, v61 :: v_dual_fmac_f32 v52, v0, v27
	v_fmac_f32_e32 v62, v0, v10
	v_fmac_f32_e32 v39, v0, v50
	v_fmac_f32_e32 v26, v12, v10
	s_delay_alu instid0(VALU_DEP_4)
	v_dual_fmac_f32 v77, v12, v10 :: v_dual_fmac_f32 v52, v15, v19
	v_fmac_f32_e32 v78, v12, v10
	v_mul_f32_e32 v15, v12, v56
	v_mul_f32_e32 v56, v14, v56
	v_dual_mul_f32 v12, v12, v70 :: v_dual_fmac_f32 v39, v2, v47
	v_mul_f32_e32 v80, v14, v104
	v_mul_f32_e32 v14, v14, v70
	v_dual_mul_f32 v61, v62, v33 :: v_dual_mul_f32 v70, v0, v83
	v_dual_fmac_f32 v63, v0, v10 :: v_dual_mul_f32 v48, v107, v48
	v_mul_f32_e32 v95, v4, v90
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fmac_f32_e32 v61, v75, v38
	v_fma_f32 v6, v0, v68, v70
	v_dual_fmac_f32 v70, v37, v68 :: v_dual_fmac_f32 v1, v0, v29
	v_fma_f32 v68, v37, v67, v96
	v_fma_f32 v83, v4, v31, v72
	s_delay_alu instid0(VALU_DEP_4)
	v_fma_f32 v46, v37, v67, v6
	v_fma_f32 v37, v37, v50, v103
	v_fmac_f32_e32 v42, v0, v31
	v_fmac_f32_e32 v68, v0, v47
	v_mul_f32_e32 v76, v63, v32
	v_dual_mul_f32 v63, v63, v33 :: v_dual_fmac_f32 v72, v0, v31
	v_dual_mul_f32 v110, v110, v71 :: v_dual_mul_f32 v107, v4, v48
	v_mul_f32_e32 v55, v55, v71
	v_mul_f32_e32 v71, v111, v71
	v_fmac_f32_e32 v103, v0, v50
	v_fmac_f32_e32 v37, v0, v47
	v_fmac_f32_e32 v83, v0, v18
	v_mul_f32_e32 v23, v0, v49
	v_fmac_f32_e32 v42, v0, v18
	v_fmac_f32_e32 v44, v0, v18
	v_fmac_f32_e32 v63, v11, v38
	v_fmac_f32_e32 v72, v4, v18
	v_mul_f32_e32 v18, v0, v48
	v_fmac_f32_e32 v70, v0, v67
	v_fmac_f32_e32 v57, v4, v29
	v_fmac_f32_e32 v96, v0, v67
	v_fmac_f32_e32 v17, v0, v10
	s_delay_alu instid0(VALU_DEP_4)
	v_dual_mul_f32 v27, v3, v110 :: v_dual_fmac_f32 v70, v2, v47
	v_dual_fmac_f32 v82, v0, v29 :: v_dual_mul_f32 v29, v3, v55
	v_dual_mul_f32 v3, v3, v71 :: v_dual_mul_f32 v2, v0, v90
	v_fmac_f32_e32 v6, v0, v67
	v_fmac_f32_e32 v66, v0, v10
	v_fmac_f32_e32 v96, v0, v47
	v_fmac_f32_e32 v103, v0, v47
	v_fmac_f32_e32 v46, v0, v47
	v_dual_fmac_f32 v6, v0, v47 :: v_dual_mul_f32 v47, v17, v32
	v_dual_mul_f32 v24, v7, v110 :: v_dual_mul_f32 v31, v0, v55
	v_mul_f32_e32 v86, v7, v55
	v_mul_f32_e32 v7, v7, v71
	v_fmac_f32_e32 v25, v0, v19
	v_mul_f32_e32 v10, v0, v89
	v_fmac_f32_e32 v36, v0, v19
	v_mul_f32_e32 v19, v0, v106
	v_mul_f32_e32 v28, v0, v110
	v_dual_mul_f32 v0, v0, v71 :: v_dual_mul_f32 v17, v17, v33
	v_dual_mul_f32 v54, v66, v33 :: v_dual_fmac_f32 v47, v52, v34
	v_mul_f32_e32 v67, v77, v32
	v_mul_f32_e32 v71, v77, v33
	v_dual_mul_f32 v77, v73, v32 :: v_dual_fmac_f32 v76, v11, v34
	v_dual_mul_f32 v11, v45, v8 :: v_dual_mul_f32 v104, v4, v89
	v_mul_f32_e32 v55, v62, v32
	v_mul_f32_e32 v73, v73, v33
	v_dual_mul_f32 v62, v93, v32 :: v_dual_mul_f32 v89, v92, v33
	v_fmac_f32_e32 v17, v52, v38
	v_fmac_f32_e32 v77, v16, v34
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_dual_fmac_f32 v73, v16, v38 :: v_dual_mul_f32 v8, v69, v8
	v_fmac_f32_e32 v47, v46, v11
	v_mul_f32_e32 v50, v26, v32
	v_mul_f32_e32 v26, v26, v33
	v_dual_mul_f32 v108, v4, v106 :: v_dual_fmac_f32 v73, v37, v8
	v_fmac_f32_e32 v62, v64, v34
	v_dual_fmac_f32 v89, v74, v38 :: v_dual_mul_f32 v4, v4, v49
	v_mul_f32_e32 v49, v88, v33
	v_fmac_f32_e32 v17, v46, v8
	v_fmac_f32_e32 v77, v37, v11
	s_delay_alu instid0(VALU_DEP_4)
	v_fmac_f32_e32 v89, v94, v8
	v_mul_f32_e32 v48, v88, v32
	v_mul_f32_e32 v88, v78, v32
	v_fmac_f32_e32 v62, v97, v11
	v_fmac_f32_e32 v87, v94, v11
	v_mul_f32_e32 v51, v66, v32
	v_mul_f32_e32 v32, v9, v32
	v_fmac_f32_e32 v88, v65, v34
	v_mul_f32_e32 v78, v78, v33
	v_mul_f32_e32 v9, v9, v33
	v_fmac_f32_e32 v50, v25, v34
	s_delay_alu instid0(VALU_DEP_4)
	v_dual_fmac_f32 v49, v30, v38 :: v_dual_fmac_f32 v88, v39, v11
	v_fmac_f32_e32 v26, v25, v38
	v_dual_mul_f32 v25, v62, v10 :: v_dual_mul_f32 v66, v93, v33
	v_fmac_f32_e32 v9, v36, v38
	v_dual_mul_f32 v33, v87, v108 :: v_dual_fmac_f32 v32, v36, v34
	v_fmac_f32_e32 v51, v13, v34
	v_fmac_f32_e32 v55, v75, v34
	v_fmac_f32_e32 v67, v53, v34
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_dual_fmac_f32 v33, v77, v107 :: v_dual_fmac_f32 v48, v30, v34
	v_dual_fmac_f32 v63, v96, v8 :: v_dual_fmac_f32 v32, v103, v11
	v_fmac_f32_e32 v49, v91, v8
	v_fmac_f32_e32 v33, v88, v79
	s_delay_alu instid0(VALU_DEP_4)
	v_fmac_f32_e32 v48, v91, v11
	v_fmac_f32_e32 v50, v70, v11
	v_fmac_f32_e32 v51, v6, v11
	v_fmac_f32_e32 v55, v68, v11
	v_fmac_f32_e32 v67, v81, v11
	v_fmac_f32_e32 v33, v32, v31
	v_fmac_f32_e32 v76, v96, v11
	v_mul_f32_e32 v11, v48, v19
	v_mul_f32_e32 v16, v49, v19
	v_fmac_f32_e32 v54, v13, v38
	v_fmac_f32_e32 v26, v70, v8
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_dual_mul_f32 v34, v89, v108 :: v_dual_fmac_f32 v11, v47, v18
	v_fmac_f32_e32 v16, v17, v18
	v_fmac_f32_e32 v66, v64, v38
	v_mul_f32_e32 v13, v49, v10
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fmac_f32_e32 v34, v73, v107
	v_fmac_f32_e32 v11, v50, v79
	v_dual_fmac_f32 v16, v26, v79 :: v_dual_fmac_f32 v9, v103, v8
	v_fmac_f32_e32 v13, v17, v2
	v_mul_f32_e32 v17, v26, v12
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_4)
	v_dual_fmac_f32 v11, v51, v29 :: v_dual_fmac_f32 v54, v6, v8
	v_fmac_f32_e32 v71, v53, v38
	v_fmac_f32_e32 v13, v26, v15
	v_mul_f32_e32 v26, v62, v19
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
	v_dual_fmac_f32 v17, v49, v23 :: v_dual_fmac_f32 v16, v54, v29
	v_mul_f32_e32 v29, v87, v104
	v_dual_fmac_f32 v61, v68, v8 :: v_dual_fmac_f32 v78, v65, v38
	v_fmac_f32_e32 v71, v81, v8
	v_fmac_f32_e32 v17, v54, v3
	v_dual_fmac_f32 v25, v55, v2 :: v_dual_mul_f32 v36, v88, v12
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_dual_fmac_f32 v78, v39, v8 :: v_dual_fmac_f32 v13, v54, v27
	v_mul_f32_e32 v30, v89, v104
	v_fmac_f32_e32 v25, v67, v56
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fmac_f32_e32 v36, v87, v4
	v_fmac_f32_e32 v34, v78, v79
	v_fmac_f32_e32 v29, v77, v95
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_dual_fmac_f32 v30, v73, v95 :: v_dual_fmac_f32 v25, v76, v24
	v_fmac_f32_e32 v34, v9, v31
	v_fmac_f32_e32 v66, v97, v8
	v_mul_f32_e32 v8, v50, v12
	v_mul_f32_e32 v12, v78, v12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v19, v66, v19 :: v_dual_fmac_f32 v12, v89, v4
	v_dual_mul_f32 v4, v42, v40 :: v_dual_fmac_f32 v19, v61, v18
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_mul_f32_e32 v25, v4, v25
	v_dual_fmac_f32 v19, v71, v80 :: v_dual_mul_f32 v6, v48, v10
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v19, v63, v86
	v_dual_fmac_f32 v6, v47, v2 :: v_dual_mul_f32 v19, v4, v19
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v6, v50, v15
	v_fmac_f32_e32 v6, v51, v27
	v_mul_f32_e32 v27, v67, v14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_dual_mul_f32 v14, v71, v14 :: v_dual_fmac_f32 v27, v62, v23
	v_fmac_f32_e32 v14, v66, v23
	v_fmac_f32_e32 v26, v55, v18
	v_mul_f32_e32 v18, v84, v41
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fmac_f32_e32 v27, v76, v7
	v_fmac_f32_e32 v14, v63, v7
	v_mul_f32_e32 v7, v83, v40
	v_fmac_f32_e32 v36, v32, v0
	v_fmac_f32_e32 v12, v9, v0
	v_mul_f32_e32 v0, v1, v35
	v_dual_fmac_f32 v26, v67, v80 :: v_dual_mul_f32 v1, v82, v35
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v19, v0, v16
	v_fmac_f32_e32 v26, v76, v86
	v_fmac_f32_e32 v25, v0, v6
	v_fmac_f32_e32 v29, v88, v15
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_fmac_f32_e32 v19, v34, v18
	v_mul_f32_e32 v10, v66, v10
	v_mul_f32_e32 v7, v7, v26
	v_fmac_f32_e32 v10, v61, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)
	v_fmac_f32_e32 v7, v1, v11
	v_dual_fmac_f32 v30, v78, v15 :: v_dual_mul_f32 v15, v44, v40
	v_fmac_f32_e32 v8, v48, v23
	v_fmac_f32_e32 v10, v71, v56
	v_mul_f32_e32 v2, v57, v35
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fmac_f32_e32 v30, v9, v28
	v_dual_mul_f32 v9, v72, v40 :: v_dual_fmac_f32 v8, v51, v3
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v10, v63, v24 :: v_dual_mul_f32 v3, v85, v35
	v_dual_mul_f32 v24, v43, v41 :: v_dual_mul_f32 v9, v9, v27
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_dual_fmac_f32 v7, v33, v5 :: v_dual_mul_f32 v4, v4, v10
	v_dual_mul_f32 v10, v15, v14 :: v_dual_mul_f32 v23, v58, v41
	v_fmac_f32_e32 v9, v2, v8
	v_fmac_f32_e32 v29, v32, v28
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_fmac_f32_e32 v4, v0, v13
	v_fmac_f32_e32 v10, v3, v17
	v_mul_f32_e32 v0, v60, v19
	v_fmac_f32_e32 v9, v36, v23
	v_fmac_f32_e32 v25, v29, v18
	v_fmac_f32_e32 v4, v30, v18
	v_fmac_f32_e32 v10, v12, v24
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_fmac_f32 v0, v59, v7 :: v_dual_mul_f32 v1, v60, v4
	v_mul_f32_e32 v2, v60, v10
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_mul_f32 v0, v21, v0 :: v_dual_fmac_f32 v1, v59, v25
	v_fmac_f32_e32 v2, v59, v9
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_fmac_f32_e32 v0, v20, v1
	v_fmac_f32_e32 v0, v22, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_add_f32_e32 v105, v105, v0
	global_store_b32 v[100:101], v105, off
	s_cbranch_scc0 .LBB0_4
	s_branch .LBB0_6
.LBB0_5:
                                        ; implicit-def: $vgpr0
.LBB0_6:                                ; %Flow3511
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshlrev_b64 v[1:2], 2, v[98:99]
	v_add_co_u32 v1, vcc_lo, s0, v1
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v2, vcc_lo, s1, v2, vcc_lo
	global_load_b32 v3, v[1:2], off
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v0, v0, v3
	global_store_b32 v[1:2], v0, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z2acPfPKiS1_S1_iiii
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 304
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 115
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z2acPfPKiS1_S1_iiii, .Lfunc_end0-_Z2acPfPKiS1_S1_iiii
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 5528
; NumSgprs: 18
; NumVgprs: 115
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 14
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 115
; Occupancy: 12
; WaveLimiterHint : 1
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         24
        .size:           8
        .value_kind:     global_buffer
      - .offset:         32
        .size:           4
        .value_kind:     by_value
      - .offset:         36
        .size:           4
        .value_kind:     by_value
      - .offset:         40
        .size:           4
        .value_kind:     by_value
      - .offset:         44
        .size:           4
        .value_kind:     by_value
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         52
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         56
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         60
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         62
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         64
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         66
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         68
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         70
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         104
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         112
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 304
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z2acPfPKiS1_S1_iiii
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z2acPfPKiS1_S1_iiii.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     115
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
