// Created by luozhiwang (luozw1994@outlook.com)
// Date: 2020/1/3

#include <cuda.h>
#include <random>

const int m = 1000;
const int n = 1048;

static void HandleError(cudaError_t err, const char *file, int line ) {
    if (err != cudaSuccess) {
        printf( "%s in %s at line %d\n", cudaGetErrorString( err ),
                file, line );
        exit( EXIT_FAILURE );
    }
}
#define HANDLE_ERROR( err ) (HandleError( err, __FILE__, __LINE__ ))

bool verify_output(int *array1, int *array2, int len){
    for (int i = 0; i < len; ++i){
        if (array1[i] != array2[i]){
            return false;
        }
    }
    return true;
}

__device__ __host__
void merge(int *array1, int len1, int *array2, int len2, int *output){
    int i{0};
    int j{0};
    int k{0};
    while(i < len1 && j < len2){
        if (array1[i] <= array2[j]){
            output[k++] = array1[i++];
        }else{
            output[k++] = array2[j++];
        }
    }
    if (i == len1){
        while (j < len2){
            output[k++] = array2[j++];
        }
    }else{
        while (i < len1){
            output[k++] = array1[i++];
        }
    }
}

// 书中所使用的算法，每次都移动下限
__device__ __host__
int co_rank_aux(int k, int *A, int m, int *B, int n){
    int i = k < m ? k : m ;
    int j = k - i;
    int i_low = (k - n) < 0 ? 0 : k - n;
    int j_low = (k - m) < 0 ? 0 : k - m;
    int delta;
    while (true){
        if(i > 0 && j < n && A[i-1]>B[j]){
            delta = (i - i_low + 1) >> 1;
            j_low = j;
            i -= delta;
            j += delta;
        }else if(j > 0 && i < m && A[i] <= B[j-1]){
            delta = (j - j_low + 1) >> 1;
            i_low = i;
            i += delta;
            j -= delta;
        }else{
            break;
        }
    }
    return i;
}

// 书中每次用了一个delta来控制，每次移动都是选择移动i或者j的下限，感觉没必要，因为k=i+j，我就直接使用标准的二分查找了
__device__ __host__
int co_rank(int k, int *A, int m, int *B, int n){
    int i_max = k < m - 1? k : m - 1;
    int i_min = k < n ? 0 : k - n ;
    while (i_min < i_max){
        int i = (i_max + i_min + 1) / 2;
        int j = k - i;
        if (i > 0 && j < n && A[i - 1] > B[j]){
            i_max = i - 1;
        }else if (j > 0 && i < m && A[i] <= B[j - 1]){
            i_min = i + 1;
        }else{
            break;
        }
    }
    return (i_max + i_min + 1) / 2;
}

__global__ void merge_co_rank(int *array1, int m, int *array2, int n, int *output){
    int tid = threadIdx.x + blockDim.x * blockIdx.x;
    int section_size = (m + n - 1) / (blockDim.x * gridDim.x) + 1;
    int start_k = tid * section_size;
    int end_k = min((tid + 1) * section_size, m + n);
    int start_i = co_rank(start_k, array1, m, array2, n);
    int end_i = co_rank(end_k, array1, m, array2, n);
    int start_j = start_k - start_i;
    int end_j = end_k - end_i;
    merge(&array1[start_i], end_i - start_i, &array2[start_j], end_j - start_j, &output[start_k]);
}

void show(int *array, int num, std::string str=""){
    printf("%s\n", str.c_str());
    for(int i = 0; i < num; ++i){
        printf("%d ", array[i]);
    }
    printf("\n");
}

void init_order(int *array, int num, int seed = 1){
    std::default_random_engine e;
    e.seed(seed);
    std::uniform_real_distribution<float> prob(0, 1);
    int i = 0;
    int count = 0;
    while (i < num){
        if (prob(e) < 0.5){
            array[i++] = count;
        }
        ++count;
    }
}

int main(int args, char **argv){
    int *array1 = new int [m];
    int *array2 = new int [n];
    int *merge_cpu = new int [m + n];
    int *output_cpu = new int [m + n];

    init_order(array1, m, 1);
    init_order(array2, n,2);

    int *array1_dev, *array2_dev, *output_dev;

    cudaEvent_t start, end;
    HANDLE_ERROR(cudaEventCreate(&start));
    HANDLE_ERROR(cudaEventCreate(&end));

    HANDLE_ERROR(cudaMalloc((void**)&array1_dev, sizeof(int) * m));
    HANDLE_ERROR(cudaMalloc((void**)&array2_dev, sizeof(int) * n));
    HANDLE_ERROR(cudaMalloc((void**)&output_dev, sizeof(int) * (m + n)));
    HANDLE_ERROR(cudaMemcpy(array1_dev, array1,  sizeof(int) * m, cudaMemcpyHostToDevice));
    HANDLE_ERROR(cudaMemcpy(array2_dev, array2,  sizeof(int) * n, cudaMemcpyHostToDevice));

    dim3 grid(2);
    dim3 block(16);
    merge(array1, m, array2, n, merge_cpu);

    HANDLE_ERROR(cudaEventRecord(start, 0));
    merge_co_rank<<<grid, block>>>(array1_dev, m, array2_dev, n, output_dev);
//    merge_co_rank<<<grid, block>>>(array2_dev, n, array1_dev, m, output_dev);
    HANDLE_ERROR(cudaEventRecord(end, 0));
    HANDLE_ERROR(cudaEventSynchronize(end));
    float elapsed_time;
    HANDLE_ERROR(cudaEventElapsedTime(&elapsed_time, start, end));
    printf("Elapsed Time is %f \n",elapsed_time);

    show(array1, m,"array1 ===>" );
    show(array2, n,"array2 ===>");

    HANDLE_ERROR(cudaMemcpy(output_cpu, output_dev, sizeof(int) * (m+n), cudaMemcpyDeviceToHost));
    if (verify_output(output_cpu, merge_cpu, m + n)){
        printf("Answer is Correct\n");
    } else{
        printf("Answer is Wrong\n");
        show(merge_cpu, m+n, "output_cpu ===>");
        show(output_cpu, m+n, "output_device ===>");

    }

    delete []array1;
    delete []array2;
    delete []output_cpu;
    delete []merge_cpu;
    HANDLE_ERROR(cudaFree(array1_dev));
    HANDLE_ERROR(cudaFree(array2_dev));
    HANDLE_ERROR(cudaFree(output_dev));
    HANDLE_ERROR(cudaEventDestroy(start));
    HANDLE_ERROR(cudaEventDestroy(end));


}
	.file	"tmpxft_002c32c3_00000000-6_MergeSort.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4118:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE4118:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"/home/ubuntu/Datasets/stackv2/train-structured/ajgappmark/Programming_Massively_Parallel_Processors/master/PMPP/MergeSort.cu"
.LC1:
	.string	"%s in %s at line %d\n"
	.text
	.type	_ZL11HandleError9cudaErrorPKci.constprop.0, @function
_ZL11HandleError9cudaErrorPKci.constprop.0:
.LFB4820:
	.cfi_startproc
	testl	%edi, %edi
	je	.L2
	subq	$24, %rsp
	.cfi_def_cfa_offset 32
	movl	%esi, 12(%rsp)
	call	cudaGetErrorString@PLT
	movl	12(%rsp), %r8d
	movl	$2, %edi
	leaq	.LC0(%rip), %rcx
	movq	%rax, %rdx
	leaq	.LC1(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %edi
	call	exit@PLT
.L2:
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4820:
	.size	_ZL11HandleError9cudaErrorPKci.constprop.0, .-_ZL11HandleError9cudaErrorPKci.constprop.0
	.globl	_Z13verify_outputPiS_i
	.type	_Z13verify_outputPiS_i, @function
_Z13verify_outputPiS_i:
.LFB4109:
	.cfi_startproc
	endbr64
	xorl	%eax, %eax
.L9:
	cmpl	%eax, %edx
	jle	.L13
	movl	(%rdi,%rax,4), %ecx
	incq	%rax
	cmpl	-4(%rsi,%rax,4), %ecx
	je	.L9
	xorl	%eax, %eax
	ret
.L13:
	movb	$1, %al
	ret
	.cfi_endproc
.LFE4109:
	.size	_Z13verify_outputPiS_i, .-_Z13verify_outputPiS_i
	.globl	_Z5mergePiiS_iS_
	.type	_Z5mergePiiS_iS_, @function
_Z5mergePiiS_iS_:
.LFB4110:
	.cfi_startproc
	endbr64
	movq	%rdx, %r10
	xorl	%edx, %edx
	movl	%ecx, %r9d
	xorl	%eax, %eax
	xorl	%ecx, %ecx
	cmpl	%esi, %edx
	jge	.L32
	cmpl	%r9d, %ecx
	jl	.L42
.L32:
	cmpl	%esi, %edx
	cltq
	je	.L34
	movslq	%edx, %rdx
	jmp	.L36
.L34:
	movslq	%ecx, %rcx
.L37:
	cmpl	%ecx, %r9d
	jle	.L43
	movl	(%r10,%rcx,4), %edx
	incq	%rcx
	movl	%edx, (%r8,%rax,4)
	incq	%rax
	jmp	.L37
.L43:
	ret
.L36:
	cmpl	%edx, %esi
	jle	.L44
	movl	(%rdi,%rdx,4), %ecx
	incq	%rdx
	movl	%ecx, (%r8,%rax,4)
	incq	%rax
	jmp	.L36
.L44:
	ret
.L42:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
.L18:
	movslq	%edx, %r11
	movslq	%ecx, %rbx
	movl	(%rdi,%r11,4), %r11d
	movl	(%r10,%rbx,4), %ebx
	cmpl	%ebx, %r11d
	jg	.L16
	incl	%edx
	jmp	.L17
.L16:
	incl	%ecx
	movl	%ebx, %r11d
.L17:
	movl	%r11d, (%r8,%rax,4)
	incq	%rax
	cmpl	%esi, %edx
	jge	.L26
	cmpl	%r9d, %ecx
	jl	.L18
.L26:
	cmpl	%esi, %edx
	cltq
	je	.L20
	movslq	%edx, %rdx
	jmp	.L21
.L20:
	movslq	%ecx, %rcx
.L22:
	cmpl	%ecx, %r9d
	jle	.L14
	movl	(%r10,%rcx,4), %edx
	incq	%rcx
	movl	%edx, (%r8,%rax,4)
	incq	%rax
	jmp	.L22
.L21:
	cmpl	%edx, %esi
	jle	.L14
	movl	(%rdi,%rdx,4), %ecx
	incq	%rdx
	movl	%ecx, (%r8,%rax,4)
	incq	%rax
	jmp	.L21
.L14:
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4110:
	.size	_Z5mergePiiS_iS_, .-_Z5mergePiiS_iS_
	.globl	_Z11co_rank_auxiPiiS_i
	.type	_Z11co_rank_auxiPiiS_i, @function
_Z11co_rank_auxiPiiS_i:
.LFB4111:
	.cfi_startproc
	endbr64
	movl	%edi, %eax
	movl	%edx, %edi
	movq	%rcx, %r11
	movq	%rsi, %r9
	cmpl	%edx, %eax
	movl	%eax, %ecx
	movl	%eax, %r10d
	movl	$0, %esi
	cmovle	%eax, %edx
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	subl	%edx, %ecx
	subl	%r8d, %r10d
	cmovs	%esi, %r10d
	subl	%edi, %eax
	cmovs	%esi, %eax
.L46:
	testl	%edx, %edx
	jle	.L47
	cmpl	%r8d, %ecx
	jge	.L47
	movslq	%ecx, %rbx
	movslq	%edx, %rsi
	movl	(%r11,%rbx,4), %ebx
	cmpl	%ebx, -4(%r9,%rsi,4)
	jle	.L47
	movl	%edx, %esi
	movl	%edx, %ebx
	movl	%ecx, %eax
	movl	%r10d, %edx
	subl	%r10d, %esi
	incl	%esi
	sarl	%esi
	subl	%esi, %ebx
	addl	%esi, %ecx
.L48:
	movl	%edx, %r10d
	movl	%ebx, %edx
	jmp	.L46
.L47:
	testl	%ecx, %ecx
	jle	.L45
	cmpl	%edi, %edx
	jge	.L45
	movslq	%ecx, %r10
	movslq	%edx, %rsi
	movl	-4(%r11,%r10,4), %ebx
	cmpl	%ebx, (%r9,%rsi,4)
	jg	.L45
	movl	%ecx, %esi
	subl	%eax, %esi
	incl	%esi
	sarl	%esi
	leal	(%rdx,%rsi), %ebx
	subl	%esi, %ecx
	jmp	.L48
.L45:
	movl	%edx, %eax
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4111:
	.size	_Z11co_rank_auxiPiiS_i, .-_Z11co_rank_auxiPiiS_i
	.globl	_Z7co_rankiPiiS_i
	.type	_Z7co_rankiPiiS_i, @function
_Z7co_rankiPiiS_i:
.LFB4112:
	.cfi_startproc
	endbr64
	movq	%rcx, %r11
	leal	-1(%rdx), %ecx
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	movq	%rsi, %r9
	cmpl	%edi, %ecx
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	movl	%edx, %r10d
	cmovg	%edi, %ecx
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	xorl	%esi, %esi
	cmpl	%r8d, %edi
	jl	.L64
	movl	%edi, %esi
	subl	%r8d, %esi
.L64:
	movl	$2, %ebx
.L65:
	leal	(%rcx,%rsi), %ebp
	leal	1(%rbp), %eax
	cltd
	idivl	%ebx
	cmpl	%esi, %ecx
	jle	.L63
	movl	%edi, %edx
	subl	%eax, %edx
	testl	%ebp, %ebp
	jle	.L66
	cmpl	%edx, %r8d
	jle	.L66
	movslq	%edx, %r12
	movslq	%eax, %rbp
	movl	(%r11,%r12,4), %r12d
	cmpl	%r12d, -4(%r9,%rbp,4)
	jle	.L66
	leal	-1(%rax), %ecx
	jmp	.L65
.L66:
	testl	%edx, %edx
	jle	.L63
	cmpl	%eax, %r10d
	jle	.L63
	movslq	%edx, %rdx
	movslq	%eax, %rsi
	movl	-4(%r11,%rdx,4), %edx
	cmpl	%edx, (%r9,%rsi,4)
	jg	.L63
	leal	1(%rax), %esi
	jmp	.L65
.L63:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4112:
	.size	_Z7co_rankiPiiS_i, .-_Z7co_rankiPiiS_i
	.section	.rodata.str1.1
.LC2:
	.string	"%s\n"
.LC3:
	.string	"%d "
.LC4:
	.string	"\n"
	.text
	.globl	_Z4showPiiNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
	.type	_Z4showPiiNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE, @function
_Z4showPiiNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE:
.LFB4113:
	.cfi_startproc
	endbr64
	pushq	%r13
	.cfi_def_cfa_offset 16
	.cfi_offset 13, -16
	xorl	%eax, %eax
	leaq	.LC3(%rip), %r13
	pushq	%r12
	.cfi_def_cfa_offset 24
	.cfi_offset 12, -24
	movq	%rdi, %r12
	movl	$2, %edi
	pushq	%rbp
	.cfi_def_cfa_offset 32
	.cfi_offset 6, -32
	movl	%esi, %ebp
	leaq	.LC2(%rip), %rsi
	pushq	%rbx
	.cfi_def_cfa_offset 40
	.cfi_offset 3, -40
	xorl	%ebx, %ebx
	pushq	%rcx
	.cfi_def_cfa_offset 48
	movq	(%rdx), %rdx
	call	__printf_chk@PLT
.L86:
	cmpl	%ebx, %ebp
	jle	.L89
	movl	(%r12,%rbx,4), %edx
	movq	%r13, %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	incq	%rbx
	call	__printf_chk@PLT
	jmp	.L86
.L89:
	popq	%rdx
	.cfi_def_cfa_offset 40
	leaq	.LC4(%rip), %rsi
	popq	%rbx
	.cfi_def_cfa_offset 32
	movl	$2, %edi
	popq	%rbp
	.cfi_def_cfa_offset 24
	xorl	%eax, %eax
	popq	%r12
	.cfi_def_cfa_offset 16
	popq	%r13
	.cfi_def_cfa_offset 8
	jmp	__printf_chk@PLT
	.cfi_endproc
.LFE4113:
	.size	_Z4showPiiNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE, .-_Z4showPiiNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
	.globl	_Z10init_orderPiii
	.type	_Z10init_orderPiii, @function
_Z10init_orderPiii:
.LFB4114:
	.cfi_startproc
	endbr64
	movslq	%edx, %rax
	movl	$2147483647, %ecx
	xorl	%edx, %edx
	movss	.LC6(%rip), %xmm2
	divq	%rcx
	movss	.LC7(%rip), %xmm3
	movss	.LC8(%rip), %xmm4
	movl	$1, %eax
	movl	$2147483647, %r10d
	xorps	%xmm1, %xmm1
	testq	%rdx, %rdx
	cmove	%rax, %rdx
	xorl	%r8d, %r8d
	xorl	%ecx, %ecx
.L91:
	cmpl	%esi, %ecx
	jge	.L98
	imulq	$16807, %rdx, %rax
	xorl	%edx, %edx
	divq	%r10
	movq	%rdx, %rax
	decq	%rax
	js	.L92
	cvtsi2ssq	%rax, %xmm0
	jmp	.L93
.L92:
	movq	%rax, %r9
	andl	$1, %eax
	shrq	%r9
	orq	%rax, %r9
	cvtsi2ssq	%r9, %xmm0
	addss	%xmm0, %xmm0
.L93:
	addss	%xmm1, %xmm0
	mulss	%xmm2, %xmm0
	comiss	%xmm3, %xmm0
	jnb	.L94
	addss	%xmm1, %xmm0
	comiss	%xmm0, %xmm4
	jbe	.L94
	movslq	%ecx, %rax
	incl	%ecx
	movl	%r8d, (%rdi,%rax,4)
.L94:
	incl	%r8d
	jmp	.L91
.L98:
	ret
	.cfi_endproc
.LFE4114:
	.size	_Z10init_orderPiii, .-_Z10init_orderPiii
	.globl	_Z39__device_stub__Z13merge_co_rankPiiS_iS_PiiS_iS_
	.type	_Z39__device_stub__Z13merge_co_rankPiiS_iS_PiiS_iS_, @function
_Z39__device_stub__Z13merge_co_rankPiiS_iS_PiiS_iS_:
.LFB4140:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	48(%rsp), %rdi
	movl	%esi, 20(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movl	%ecx, 16(%rsp)
	leaq	40(%rsp), %rcx
	movq	%r8, (%rsp)
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	20(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 120(%rsp)
	movq	%rsp, %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L99
	pushq	40(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z13merge_co_rankPiiS_iS_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 176
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L99:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L101
	call	__stack_chk_fail@PLT
.L101:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4140:
	.size	_Z39__device_stub__Z13merge_co_rankPiiS_iS_PiiS_iS_, .-_Z39__device_stub__Z13merge_co_rankPiiS_iS_PiiS_iS_
	.globl	_Z13merge_co_rankPiiS_iS_
	.type	_Z13merge_co_rankPiiS_iS_, @function
_Z13merge_co_rankPiiS_iS_:
.LFB4141:
	.cfi_startproc
	endbr64
	jmp	_Z39__device_stub__Z13merge_co_rankPiiS_iS_PiiS_iS_
	.cfi_endproc
.LFE4141:
	.size	_Z13merge_co_rankPiiS_iS_, .-_Z13merge_co_rankPiiS_iS_
	.section	.rodata.str1.1
.LC9:
	.string	"_Z13merge_co_rankPiiS_iS_"
	.section	.text.startup,"ax",@progbits
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB4143:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC9(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z13merge_co_rankPiiS_iS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE4143:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.rodata._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_.str1.1,"aMS",@progbits,1
.LC10:
	.string	"basic_string: construction from null is not valid"
	.section	.text._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_,"axG",@progbits,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC5IS3_EEPKcRKS3_,comdat
	.align 2
	.weak	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
	.type	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_, @function
_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_:
.LFB4439:
	.cfi_startproc
	endbr64
	pushq	%r12
	.cfi_def_cfa_offset 16
	.cfi_offset 12, -16
	pushq	%rbp
	.cfi_def_cfa_offset 24
	.cfi_offset 6, -24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset 3, -32
	subq	$16, %rsp
	.cfi_def_cfa_offset 48
	movq	%fs:40, %rax
	movq	%rax, 8(%rsp)
	xorl	%eax, %eax
	leaq	16(%rdi), %rax
	movq	%rax, (%rdi)
	testq	%rsi, %rsi
	jne	.L107
	movq	8(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L112
	leaq	.LC10(%rip), %rdi
	call	_ZSt19__throw_logic_errorPKc@PLT
.L107:
	movq	%rdi, %rbx
	movq	%rsi, %rdi
	movq	%rsi, %rbp
	call	strlen@PLT
	movq	%rax, (%rsp)
	leaq	0(%rbp,%rax), %r12
	cmpq	$15, %rax
	jbe	.L109
	movq	%rsp, %rsi
	xorl	%edx, %edx
	movq	%rbx, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_createERmm@PLT
	movq	%rax, (%rbx)
	movq	(%rsp), %rax
	movq	%rax, 16(%rbx)
.L109:
	movq	(%rbx), %rdi
	movq	%r12, %rdx
	movq	%rbp, %rsi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE13_S_copy_charsEPcPKcS7_@PLT
	movq	(%rsp), %rax
	movq	(%rbx), %rdx
	movq	%rax, 8(%rbx)
	movb	$0, (%rdx,%rax)
	movq	8(%rsp), %rax
	subq	%fs:40, %rax
	je	.L110
.L112:
	call	__stack_chk_fail@PLT
.L110:
	addq	$16, %rsp
	.cfi_def_cfa_offset 32
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%rbp
	.cfi_def_cfa_offset 16
	popq	%r12
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4439:
	.size	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_, .-_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
	.weak	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_
	.set	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_
	.section	.rodata.str1.1
.LC11:
	.string	"Elapsed Time is %f \n"
.LC12:
	.string	"array1 ===>"
.LC13:
	.string	"array2 ===>"
.LC14:
	.string	"Answer is Correct\n"
.LC15:
	.string	"Answer is Wrong\n"
.LC16:
	.string	"output_cpu ===>"
.LC17:
	.string	"output_device ===>"
	.section	.text.startup
	.globl	main
	.type	main, @function
main:
.LFB4115:
	.cfi_startproc
	.cfi_personality 0x9b,DW.ref.__gxx_personality_v0
	.cfi_lsda 0x1b,.LLSDA4115
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$4000, %edi
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$120, %rsp
	.cfi_def_cfa_offset 176
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
.LEHB0:
	call	_Znam@PLT
	movl	$4192, %edi
	movq	%rax, %r12
	call	_Znam@PLT
	movl	$8192, %edi
	movq	%rax, %rbp
	call	_Znam@PLT
	movl	$8192, %edi
	movq	%rax, %r13
	call	_Znam@PLT
	movl	$1, %edx
	movl	$1000, %esi
	movq	%r12, %rdi
	movq	%rax, %r14
	call	_Z10init_orderPiii
	movl	$2, %edx
	movl	$1048, %esi
	movq	%rbp, %rdi
	call	_Z10init_orderPiii
	leaq	32(%rsp), %rdi
	call	cudaEventCreate@PLT
	movl	$142, %esi
	movl	%eax, %edi
	call	_ZL11HandleError9cudaErrorPKci.constprop.0
	leaq	40(%rsp), %rdi
	call	cudaEventCreate@PLT
	movl	$143, %esi
	movl	%eax, %edi
	call	_ZL11HandleError9cudaErrorPKci.constprop.0
	leaq	8(%rsp), %rdi
	movl	$4000, %esi
	call	cudaMalloc@PLT
	movl	$145, %esi
	movl	%eax, %edi
	call	_ZL11HandleError9cudaErrorPKci.constprop.0
	leaq	16(%rsp), %rdi
	movl	$4192, %esi
	call	cudaMalloc@PLT
	movl	$146, %esi
	movl	%eax, %edi
	call	_ZL11HandleError9cudaErrorPKci.constprop.0
	leaq	24(%rsp), %rdi
	movl	$8192, %esi
	call	cudaMalloc@PLT
	movl	$147, %esi
	movl	%eax, %edi
	call	_ZL11HandleError9cudaErrorPKci.constprop.0
	movq	8(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	movl	$4000, %edx
	call	cudaMemcpy@PLT
	movl	$148, %esi
	movl	%eax, %edi
	call	_ZL11HandleError9cudaErrorPKci.constprop.0
	movq	16(%rsp), %rdi
	movl	$1, %ecx
	movq	%rbp, %rsi
	movl	$4192, %edx
	call	cudaMemcpy@PLT
	movl	$149, %esi
	movl	%eax, %edi
	call	_ZL11HandleError9cudaErrorPKci.constprop.0
	movl	$2147483649, %eax
	movq	%r13, %r8
	movq	%rbp, %rdx
	addq	%rax, %rax
	movl	$1048, %ecx
	movl	$1000, %esi
	movq	%r12, %rdi
	movq	%rax, 48(%rsp)
	addq	$14, %rax
	movq	%rax, 60(%rsp)
	movl	$1, 56(%rsp)
	movl	$1, 68(%rsp)
	call	_Z5mergePiiS_iS_
	movq	32(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	$155, %esi
	movl	%eax, %edi
	call	_ZL11HandleError9cudaErrorPKci.constprop.0
	movl	68(%rsp), %ecx
	movl	56(%rsp), %esi
	xorl	%r9d, %r9d
	movq	60(%rsp), %rdx
	movq	48(%rsp), %rdi
	xorl	%r8d, %r8d
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L114
	movq	24(%rsp), %r8
	movq	16(%rsp), %rdx
	movl	$1048, %ecx
	movl	$1000, %esi
	movq	8(%rsp), %rdi
	call	_Z39__device_stub__Z13merge_co_rankPiiS_iS_PiiS_iS_
.L114:
	movq	40(%rsp), %rdi
	xorl	%esi, %esi
	leaq	72(%rsp), %rbx
	leaq	3(%rsp), %r15
	call	cudaEventRecord@PLT
	movl	$158, %esi
	movl	%eax, %edi
	call	_ZL11HandleError9cudaErrorPKci.constprop.0
	movq	40(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movl	$159, %esi
	movl	%eax, %edi
	call	_ZL11HandleError9cudaErrorPKci.constprop.0
	movq	40(%rsp), %rdx
	movq	32(%rsp), %rsi
	leaq	4(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	movl	$161, %esi
	movl	%eax, %edi
	call	_ZL11HandleError9cudaErrorPKci.constprop.0
	leaq	.LC11(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	4(%rsp), %xmm0
	call	__printf_chk@PLT
	movq	%r15, %rdx
	leaq	.LC12(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_
.LEHE0:
	movq	%rbx, %rdx
	movl	$1000, %esi
	movq	%r12, %rdi
.LEHB1:
	call	_Z4showPiiNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
.LEHE1:
	movq	%rbx, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	%r15, %rdx
	leaq	.LC13(%rip), %rsi
	movq	%rbx, %rdi
.LEHB2:
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_
.LEHE2:
	movq	%rbx, %rdx
	movl	$1048, %esi
	movq	%rbp, %rdi
.LEHB3:
	call	_Z4showPiiNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
.LEHE3:
	movq	%rbx, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	24(%rsp), %rsi
	movl	$8192, %edx
	movq	%r14, %rdi
	movl	$2, %ecx
.LEHB4:
	call	cudaMemcpy@PLT
	movl	$167, %esi
	movl	%eax, %edi
	call	_ZL11HandleError9cudaErrorPKci.constprop.0
	movl	$2048, %edx
	movq	%r13, %rsi
	movq	%r14, %rdi
	call	_Z13verify_outputPiS_i
	testb	%al, %al
	je	.L115
	leaq	.LC14(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L116
.L115:
	leaq	.LC15(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movq	%r15, %rdx
	leaq	.LC16(%rip), %rsi
	movq	%rbx, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_
.LEHE4:
	movq	%rbx, %rdx
	movl	$2048, %esi
	movq	%r13, %rdi
.LEHB5:
	call	_Z4showPiiNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
.LEHE5:
	movq	%rbx, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	%r15, %rdx
	leaq	.LC17(%rip), %rsi
	movq	%rbx, %rdi
.LEHB6:
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1IS3_EEPKcRKS3_
.LEHE6:
	movq	%rbx, %rdx
	movl	$2048, %esi
	movq	%r14, %rdi
.LEHB7:
	call	_Z4showPiiNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
.LEHE7:
	movq	%rbx, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
.L116:
	movq	%r12, %rdi
	call	_ZdaPv@PLT
	movq	%rbp, %rdi
	call	_ZdaPv@PLT
	movq	%r14, %rdi
	call	_ZdaPv@PLT
	movq	%r13, %rdi
	call	_ZdaPv@PLT
	movq	8(%rsp), %rdi
.LEHB8:
	call	cudaFree@PLT
	movl	$181, %esi
	movl	%eax, %edi
	call	_ZL11HandleError9cudaErrorPKci.constprop.0
	movq	16(%rsp), %rdi
	call	cudaFree@PLT
	movl	$182, %esi
	movl	%eax, %edi
	call	_ZL11HandleError9cudaErrorPKci.constprop.0
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movl	$183, %esi
	movl	%eax, %edi
	call	_ZL11HandleError9cudaErrorPKci.constprop.0
	movq	32(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movl	$184, %esi
	movl	%eax, %edi
	call	_ZL11HandleError9cudaErrorPKci.constprop.0
	movq	40(%rsp), %rdi
	call	cudaEventDestroy@PLT
	movl	$185, %esi
	movl	%eax, %edi
	call	_ZL11HandleError9cudaErrorPKci.constprop.0
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L125
	jmp	.L130
.L126:
	endbr64
	jmp	.L133
.L127:
	endbr64
	jmp	.L133
.L128:
	endbr64
	jmp	.L133
.L129:
	endbr64
.L133:
	movq	%rax, %rbp
.L123:
	movq	%rbx, %rdi
	call	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE10_M_disposeEv@PLT
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	jne	.L130
	movq	%rbp, %rdi
	call	_Unwind_Resume@PLT
.LEHE8:
.L130:
	call	__stack_chk_fail@PLT
.L125:
	addq	$120, %rsp
	.cfi_def_cfa_offset 56
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%rbp
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE4115:
	.globl	__gxx_personality_v0
	.section	.gcc_except_table,"a",@progbits
.LLSDA4115:
	.byte	0xff
	.byte	0xff
	.byte	0x1
	.uleb128 .LLSDACSE4115-.LLSDACSB4115
.LLSDACSB4115:
	.uleb128 .LEHB0-.LFB4115
	.uleb128 .LEHE0-.LEHB0
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB1-.LFB4115
	.uleb128 .LEHE1-.LEHB1
	.uleb128 .L126-.LFB4115
	.uleb128 0
	.uleb128 .LEHB2-.LFB4115
	.uleb128 .LEHE2-.LEHB2
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB3-.LFB4115
	.uleb128 .LEHE3-.LEHB3
	.uleb128 .L127-.LFB4115
	.uleb128 0
	.uleb128 .LEHB4-.LFB4115
	.uleb128 .LEHE4-.LEHB4
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB5-.LFB4115
	.uleb128 .LEHE5-.LEHB5
	.uleb128 .L128-.LFB4115
	.uleb128 0
	.uleb128 .LEHB6-.LFB4115
	.uleb128 .LEHE6-.LEHB6
	.uleb128 0
	.uleb128 0
	.uleb128 .LEHB7-.LFB4115
	.uleb128 .LEHE7-.LEHB7
	.uleb128 .L129-.LFB4115
	.uleb128 0
	.uleb128 .LEHB8-.LFB4115
	.uleb128 .LEHE8-.LEHB8
	.uleb128 0
	.uleb128 0
.LLSDACSE4115:
	.section	.text.startup
	.size	main, .-main
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC6:
	.long	805306368
	.align 4
.LC7:
	.long	1065353216
	.align 4
.LC8:
	.long	1056964608
	.hidden	DW.ref.__gxx_personality_v0
	.weak	DW.ref.__gxx_personality_v0
	.section	.data.rel.local.DW.ref.__gxx_personality_v0,"awG",@progbits,DW.ref.__gxx_personality_v0,comdat
	.align 8
	.type	DW.ref.__gxx_personality_v0, @object
	.size	DW.ref.__gxx_personality_v0, 8
DW.ref.__gxx_personality_v0:
	.quad	__gxx_personality_v0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

// Created by luozhiwang (luozw1994@outlook.com)
// Date: 2020/1/3

#include <hip/hip_runtime.h>
#include <random>

const int m = 1000;
const int n = 1048;

static void HandleError(hipError_t err, const char *file, int line ) {
    if (err != hipSuccess) {
        printf( "%s in %s at line %d\n", hipGetErrorString( err ),
                file, line );
        exit( EXIT_FAILURE );
    }
}
#define HANDLE_ERROR( err ) (HandleError( err, __FILE__, __LINE__ ))

bool verify_output(int *array1, int *array2, int len){
    for (int i = 0; i < len; ++i){
        if (array1[i] != array2[i]){
            return false;
        }
    }
    return true;
}

__device__ __host__
void merge(int *array1, int len1, int *array2, int len2, int *output){
    int i{0};
    int j{0};
    int k{0};
    while(i < len1 && j < len2){
        if (array1[i] <= array2[j]){
            output[k++] = array1[i++];
        }else{
            output[k++] = array2[j++];
        }
    }
    if (i == len1){
        while (j < len2){
            output[k++] = array2[j++];
        }
    }else{
        while (i < len1){
            output[k++] = array1[i++];
        }
    }
}

// 书中所使用的算法，每次都移动下限
__device__ __host__
int co_rank_aux(int k, int *A, int m, int *B, int n){
    int i = k < m ? k : m ;
    int j = k - i;
    int i_low = (k - n) < 0 ? 0 : k - n;
    int j_low = (k - m) < 0 ? 0 : k - m;
    int delta;
    while (true){
        if(i > 0 && j < n && A[i-1]>B[j]){
            delta = (i - i_low + 1) >> 1;
            j_low = j;
            i -= delta;
            j += delta;
        }else if(j > 0 && i < m && A[i] <= B[j-1]){
            delta = (j - j_low + 1) >> 1;
            i_low = i;
            i += delta;
            j -= delta;
        }else{
            break;
        }
    }
    return i;
}

// 书中每次用了一个delta来控制，每次移动都是选择移动i或者j的下限，感觉没必要，因为k=i+j，我就直接使用标准的二分查找了
__device__ __host__
int co_rank(int k, int *A, int m, int *B, int n){
    int i_max = k < m - 1? k : m - 1;
    int i_min = k < n ? 0 : k - n ;
    while (i_min < i_max){
        int i = (i_max + i_min + 1) / 2;
        int j = k - i;
        if (i > 0 && j < n && A[i - 1] > B[j]){
            i_max = i - 1;
        }else if (j > 0 && i < m && A[i] <= B[j - 1]){
            i_min = i + 1;
        }else{
            break;
        }
    }
    return (i_max + i_min + 1) / 2;
}

__global__ void merge_co_rank(int *array1, int m, int *array2, int n, int *output){
    int tid = threadIdx.x + blockDim.x * blockIdx.x;
    int section_size = (m + n - 1) / (blockDim.x * gridDim.x) + 1;
    int start_k = tid * section_size;
    int end_k = min((tid + 1) * section_size, m + n);
    int start_i = co_rank(start_k, array1, m, array2, n);
    int end_i = co_rank(end_k, array1, m, array2, n);
    int start_j = start_k - start_i;
    int end_j = end_k - end_i;
    merge(&array1[start_i], end_i - start_i, &array2[start_j], end_j - start_j, &output[start_k]);
}

void show(int *array, int num, std::string str=""){
    printf("%s\n", str.c_str());
    for(int i = 0; i < num; ++i){
        printf("%d ", array[i]);
    }
    printf("\n");
}

void init_order(int *array, int num, int seed = 1){
    std::default_random_engine e;
    e.seed(seed);
    std::uniform_real_distribution<float> prob(0, 1);
    int i = 0;
    int count = 0;
    while (i < num){
        if (prob(e) < 0.5){
            array[i++] = count;
        }
        ++count;
    }
}

int main(int args, char **argv){
    int *array1 = new int [m];
    int *array2 = new int [n];
    int *merge_cpu = new int [m + n];
    int *output_cpu = new int [m + n];

    init_order(array1, m, 1);
    init_order(array2, n,2);

    int *array1_dev, *array2_dev, *output_dev;

    hipEvent_t start, end;
    HANDLE_ERROR(hipEventCreate(&start));
    HANDLE_ERROR(hipEventCreate(&end));

    HANDLE_ERROR(hipMalloc((void**)&array1_dev, sizeof(int) * m));
    HANDLE_ERROR(hipMalloc((void**)&array2_dev, sizeof(int) * n));
    HANDLE_ERROR(hipMalloc((void**)&output_dev, sizeof(int) * (m + n)));
    HANDLE_ERROR(hipMemcpy(array1_dev, array1,  sizeof(int) * m, hipMemcpyHostToDevice));
    HANDLE_ERROR(hipMemcpy(array2_dev, array2,  sizeof(int) * n, hipMemcpyHostToDevice));

    dim3 grid(2);
    dim3 block(16);
    merge(array1, m, array2, n, merge_cpu);

    HANDLE_ERROR(hipEventRecord(start, 0));
    merge_co_rank<<<grid, block>>>(array1_dev, m, array2_dev, n, output_dev);
//    merge_co_rank<<<grid, block>>>(array2_dev, n, array1_dev, m, output_dev);
    HANDLE_ERROR(hipEventRecord(end, 0));
    HANDLE_ERROR(hipEventSynchronize(end));
    float elapsed_time;
    HANDLE_ERROR(hipEventElapsedTime(&elapsed_time, start, end));
    printf("Elapsed Time is %f \n",elapsed_time);

    show(array1, m,"array1 ===>" );
    show(array2, n,"array2 ===>");

    HANDLE_ERROR(hipMemcpy(output_cpu, output_dev, sizeof(int) * (m+n), hipMemcpyDeviceToHost));
    if (verify_output(output_cpu, merge_cpu, m + n)){
        printf("Answer is Correct\n");
    } else{
        printf("Answer is Wrong\n");
        show(merge_cpu, m+n, "output_cpu ===>");
        show(output_cpu, m+n, "output_device ===>");

    }

    delete []array1;
    delete []array2;
    delete []output_cpu;
    delete []merge_cpu;
    HANDLE_ERROR(hipFree(array1_dev));
    HANDLE_ERROR(hipFree(array2_dev));
    HANDLE_ERROR(hipFree(output_dev));
    HANDLE_ERROR(hipEventDestroy(start));
    HANDLE_ERROR(hipEventDestroy(end));


}
	.text
	.file	"MergeSort.hip"
	.globl	_Z13verify_outputPiS_i          # -- Begin function _Z13verify_outputPiS_i
	.type	_Z13verify_outputPiS_i,@function
_Z13verify_outputPiS_i:                 # @_Z13verify_outputPiS_i
	.cfi_startproc
# %bb.0:
	testl	%edx, %edx
	jle	.LBB0_6
# %bb.1:                                # %.lr.ph.preheader
	movl	(%rdi), %eax
	cmpl	(%rsi), %eax
	jne	.LBB0_8
# %bb.2:                                # %.lr.ph15.preheader
	movl	%edx, %eax
	movl	$1, %edx
.LBB0_3:                                # %.lr.ph15
                                        # =>This Inner Loop Header: Depth=1
	movq	%rdx, %rcx
	cmpq	%rdx, %rax
	je	.LBB0_5
# %bb.4:                                # %.lr.ph
                                        #   in Loop: Header=BB0_3 Depth=1
	movl	(%rdi,%rcx,4), %r8d
	leaq	1(%rcx), %rdx
	cmpl	(%rsi,%rcx,4), %r8d
	je	.LBB0_3
.LBB0_5:                                # %._crit_edge.loopexit
	cmpq	%rax, %rcx
	setae	%al
                                        # kill: def $al killed $al killed $eax
	retq
.LBB0_6:
	movb	$1, %al
                                        # kill: def $al killed $al killed $eax
	retq
.LBB0_8:
	xorl	%eax, %eax
                                        # kill: def $al killed $al killed $eax
	retq
.Lfunc_end0:
	.size	_Z13verify_outputPiS_i, .Lfunc_end0-_Z13verify_outputPiS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z5mergePiiS_iS_                # -- Begin function _Z5mergePiiS_iS_
	.type	_Z5mergePiiS_iS_,@function
_Z5mergePiiS_iS_:                       # @_Z5mergePiiS_iS_
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
	xorl	%eax, %eax
	movl	$0, %r10d
	testl	%esi, %esi
	jle	.LBB1_1
# %bb.2:
	movl	$0, %r9d
	testl	%ecx, %ecx
	jle	.LBB1_7
# %bb.3:                                # %.lr.ph.preheader
	xorl	%r10d, %r10d
	xorl	%r9d, %r9d
	xorl	%eax, %eax
.LBB1_4:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	%eax, %r11d
	movl	%r9d, %ebx
	movl	%eax, %eax
	movl	(%rdi,%rax,4), %ebp
	movl	%r9d, %eax
	movl	(%rdx,%rax,4), %r14d
	xorl	%r9d, %r9d
	xorl	%eax, %eax
	cmpl	%r14d, %ebp
	setg	%r9b
	setle	%al
	cmovll	%ebp, %r14d
	addl	%r11d, %eax
	addl	%ebx, %r9d
	movl	%r14d, (%r8,%r10,4)
	incq	%r10
	cmpl	%esi, %eax
	jge	.LBB1_6
# %bb.5:                                # %.lr.ph
                                        #   in Loop: Header=BB1_4 Depth=1
	cmpl	%ecx, %r9d
	jl	.LBB1_4
.LBB1_6:                                # %._crit_edge.loopexit
	movl	%r10d, %r10d
	jmp	.LBB1_7
.LBB1_1:
	xorl	%r9d, %r9d
.LBB1_7:                                # %._crit_edge
	cmpl	%esi, %eax
	jne	.LBB1_8
# %bb.11:                               # %.preheader
	cmpl	%ecx, %r9d
	jge	.LBB1_14
# %bb.12:                               # %.lr.ph49.preheader
	movslq	%r9d, %rsi
	movslq	%ecx, %rax
	leaq	(%rdx,%rsi,4), %rcx
	subq	%rsi, %rax
	leaq	(%r8,%r10,4), %rdx
	xorl	%esi, %esi
.LBB1_13:                               # %.lr.ph49
                                        # =>This Inner Loop Header: Depth=1
	movl	(%rcx,%rsi,4), %edi
	movl	%edi, (%rdx,%rsi,4)
	incq	%rsi
	cmpq	%rsi, %rax
	jne	.LBB1_13
	jmp	.LBB1_14
.LBB1_8:                                # %.preheader37
	jge	.LBB1_14
# %bb.9:                                # %.lr.ph46.preheader
	movslq	%eax, %rdx
	movslq	%esi, %rax
	leaq	(%rdi,%rdx,4), %rcx
	subq	%rdx, %rax
	leaq	(%r8,%r10,4), %rdx
	xorl	%esi, %esi
.LBB1_10:                               # %.lr.ph46
                                        # =>This Inner Loop Header: Depth=1
	movl	(%rcx,%rsi,4), %edi
	movl	%edi, (%rdx,%rsi,4)
	incq	%rsi
	cmpq	%rsi, %rax
	jne	.LBB1_10
.LBB1_14:                               # %.loopexit
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z5mergePiiS_iS_, .Lfunc_end1-_Z5mergePiiS_iS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z11co_rank_auxiPiiS_i          # -- Begin function _Z11co_rank_auxiPiiS_i
	.type	_Z11co_rank_auxiPiiS_i,@function
_Z11co_rank_auxiPiiS_i:                 # @_Z11co_rank_auxiPiiS_i
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movl	%edi, %r9d
	subl	%edx, %r9d
	movl	%edx, %ebx
	cmovll	%edi, %ebx
	movl	%edi, %r11d
	subl	%ebx, %r11d
	subl	%r8d, %edi
	xorl	%eax, %eax
	testl	%edi, %edi
	cmovlel	%eax, %edi
	testl	%r9d, %r9d
	cmovlel	%eax, %r9d
.LBB2_1:                                # %.outer
                                        # =>This Loop Header: Depth=1
                                        #     Child Loop BB2_2 Depth 2
	movl	%ebx, %eax
.LBB2_2:                                #   Parent Loop BB2_1 Depth=1
                                        # =>  This Inner Loop Header: Depth=2
	movl	%r11d, %r10d
	testl	%eax, %eax
	jle	.LBB2_6
# %bb.3:                                #   in Loop: Header=BB2_2 Depth=2
	cmpl	%r8d, %r10d
	jge	.LBB2_6
# %bb.4:                                #   in Loop: Header=BB2_2 Depth=2
	movl	%eax, %r11d
	movl	-4(%rsi,%r11,4), %r11d
	movslq	%r10d, %rbx
	cmpl	(%rcx,%rbx,4), %r11d
	jle	.LBB2_6
# %bb.5:                                #   in Loop: Header=BB2_2 Depth=2
	movl	%eax, %r11d
	subl	%edi, %r11d
	incl	%r11d
	sarl	%r11d
	subl	%r11d, %eax
	addl	%r10d, %r11d
	movl	%r10d, %r9d
	jmp	.LBB2_2
.LBB2_6:                                #   in Loop: Header=BB2_1 Depth=1
	cmpl	%edx, %eax
	jge	.LBB2_10
# %bb.7:                                #   in Loop: Header=BB2_1 Depth=1
	testl	%r10d, %r10d
	jle	.LBB2_10
# %bb.8:                                #   in Loop: Header=BB2_1 Depth=1
	movslq	%eax, %rdi
	movl	(%rsi,%rdi,4), %edi
	movl	%r10d, %r11d
	cmpl	-4(%rcx,%r11,4), %edi
	jg	.LBB2_10
# %bb.9:                                #   in Loop: Header=BB2_1 Depth=1
	movl	%r10d, %ebx
	subl	%r9d, %ebx
	incl	%ebx
	sarl	%ebx
	subl	%ebx, %r10d
	addl	%eax, %ebx
	movl	%r10d, %r11d
	movl	%eax, %edi
	jmp	.LBB2_1
.LBB2_10:
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end2:
	.size	_Z11co_rank_auxiPiiS_i, .Lfunc_end2-_Z11co_rank_auxiPiiS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z7co_rankiPiiS_i               # -- Begin function _Z7co_rankiPiiS_i
	.type	_Z7co_rankiPiiS_i,@function
_Z7co_rankiPiiS_i:                      # @_Z7co_rankiPiiS_i
	.cfi_startproc
# %bb.0:
                                        # kill: def $edx killed $edx def $rdx
	leal	-1(%rdx), %eax
	cmpl	%edi, %eax
	cmovgel	%edi, %eax
	xorl	%r10d, %r10d
	movl	%edi, %r9d
	subl	%r8d, %r9d
	cmovll	%r10d, %r9d
	cmpl	%eax, %r9d
	jge	.LBB3_12
# %bb.1:                                # %.lr.ph.preheader
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%rbx
	.cfi_def_cfa_offset 32
	.cfi_offset %rbx, -32
	.cfi_offset %r14, -24
	.cfi_offset %rbp, -16
.LBB3_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	leal	(%rax,%r9), %ebx
	leal	(%rax,%r9), %r10d
	incl	%r10d
	shrl	$31, %r10d
	addl	%ebx, %r10d
	incl	%r10d
	sarl	%r10d
	movl	%edi, %r11d
	subl	%r10d, %r11d
	testl	%ebx, %ebx
	jle	.LBB3_6
# %bb.3:                                # %.lr.ph
                                        #   in Loop: Header=BB3_2 Depth=1
	cmpl	%r8d, %r11d
	jge	.LBB3_6
# %bb.4:                                #   in Loop: Header=BB3_2 Depth=1
	leal	-1(%r10), %ebx
	movl	(%rsi,%rbx,4), %ebp
	movslq	%r11d, %r14
	cmpl	(%rcx,%r14,4), %ebp
	jle	.LBB3_6
# %bb.5:                                #   in Loop: Header=BB3_2 Depth=1
	movl	%ebx, %eax
	jmp	.LBB3_10
.LBB3_6:                                #   in Loop: Header=BB3_2 Depth=1
	cmpl	%edx, %r10d
	jge	.LBB3_11
# %bb.7:                                #   in Loop: Header=BB3_2 Depth=1
	testl	%r11d, %r11d
	jle	.LBB3_11
# %bb.8:                                #   in Loop: Header=BB3_2 Depth=1
	movslq	%r10d, %rbx
	movl	(%rsi,%rbx,4), %ebx
	movl	%r11d, %r11d
	cmpl	-4(%rcx,%r11,4), %ebx
	jg	.LBB3_11
# %bb.9:                                #   in Loop: Header=BB3_2 Depth=1
	incl	%r10d
	movl	%r10d, %r9d
.LBB3_10:                               #   in Loop: Header=BB3_2 Depth=1
	cmpl	%eax, %r9d
	jl	.LBB3_2
.LBB3_11:
	popq	%rbx
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	.cfi_restore %rbx
	.cfi_restore %r14
	.cfi_restore %rbp
.LBB3_12:                               # %.thread
	leal	(%rax,%r9), %ecx
	addl	%r9d, %eax
	incl	%eax
	shrl	$31, %eax
	addl	%ecx, %eax
	incl	%eax
	sarl	%eax
	retq
.Lfunc_end3:
	.size	_Z7co_rankiPiiS_i, .Lfunc_end3-_Z7co_rankiPiiS_i
	.cfi_endproc
                                        # -- End function
	.globl	_Z28__device_stub__merge_co_rankPiiS_iS_ # -- Begin function _Z28__device_stub__merge_co_rankPiiS_iS_
	.type	_Z28__device_stub__merge_co_rankPiiS_iS_,@function
_Z28__device_stub__merge_co_rankPiiS_iS_: # @_Z28__device_stub__merge_co_rankPiiS_iS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$128, %rsp
	.cfi_def_cfa_offset 176
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	4(%rsp), %rdi
	movl	%esi, (%rdi)
	leaq	32(%rsp), %rsi
	movq	%rdx, (%rsi)
	movq	%rsp, %rdx
	movl	%ecx, (%rdx)
	leaq	24(%rsp), %rcx
	movq	%r8, (%rcx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	movq	%rcx, 32(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13merge_co_rankPiiS_iS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$144, %rsp
	.cfi_adjust_cfa_offset -144
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end4:
	.size	_Z28__device_stub__merge_co_rankPiiS_iS_, .Lfunc_end4-_Z28__device_stub__merge_co_rankPiiS_iS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z4showPiiNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE # -- Begin function _Z4showPiiNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
	.type	_Z4showPiiNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE,@function
_Z4showPiiNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE: # @_Z4showPiiNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	%esi, %ebp
	movq	%rdi, %rbx
	movq	(%rdx), %rdi
	callq	puts@PLT
	testl	%ebp, %ebp
	jle	.LBB5_3
# %bb.1:                                # %.lr.ph.preheader
	movl	%ebp, %r14d
	xorl	%r15d, %r15d
.LBB5_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movl	(%rbx,%r15,4), %esi
	movl	$.L.str.1, %edi
	xorl	%eax, %eax
	callq	printf
	incq	%r15
	cmpq	%r15, %r14
	jne	.LBB5_2
.LBB5_3:                                # %._crit_edge
	movl	$10, %edi
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	jmp	putchar@PLT                     # TAILCALL
.Lfunc_end5:
	.size	_Z4showPiiNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE, .Lfunc_end5-_Z4showPiiNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function _Z10init_orderPiii
.LCPI6_0:
	.long	0x3f000000                      # float 0.5
.LCPI6_1:
	.long	0x00000000                      # float 0
	.text
	.globl	_Z10init_orderPiii
	.type	_Z10init_orderPiii,@function
_Z10init_orderPiii:                     # @_Z10init_orderPiii
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$16, %rsp
	.cfi_def_cfa_offset 64
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movslq	%edx, %rcx
	movabsq	$8589934597, %rdx               # imm = 0x200000005
	movq	%rcx, %rax
	mulq	%rdx
	movq	%rcx, %rax
	subq	%rdx, %rax
	shrq	%rax
	addq	%rdx, %rax
	shrq	$30, %rax
	movq	%rax, %rdx
	shlq	$31, %rdx
	subq	%rdx, %rax
	leaq	(%rcx,%rax), %rdx
	cmpq	$1, %rdx
	adcq	%rcx, %rax
	movq	%rax, 8(%rsp)
	testl	%esi, %esi
	jle	.LBB6_5
# %bb.1:                                # %.lr.ph.preheader
	movl	%esi, %ebx
	movq	%rdi, %r14
	xorl	%ebp, %ebp
	leaq	8(%rsp), %r15
	xorl	%r12d, %r12d
.LBB6_2:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	movq	%r15, %rdi
	callq	_ZSt18generate_canonicalIfLm24ESt26linear_congruential_engineImLm16807ELm0ELm2147483647EEET_RT1_
	addss	.LCPI6_1(%rip), %xmm0
	movss	.LCPI6_0(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	ucomiss	%xmm0, %xmm1
	jbe	.LBB6_4
# %bb.3:                                #   in Loop: Header=BB6_2 Depth=1
	movslq	%r12d, %rax
	incl	%r12d
	movl	%ebp, (%r14,%rax,4)
.LBB6_4:                                #   in Loop: Header=BB6_2 Depth=1
	incl	%ebp
	cmpl	%ebx, %r12d
	jl	.LBB6_2
.LBB6_5:                                # %._crit_edge
	addq	$16, %rsp
	.cfi_def_cfa_offset 48
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end6:
	.size	_Z10init_orderPiii, .Lfunc_end6-_Z10init_orderPiii
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI7_0:
	.long	0x3f000000                      # float 0.5
.LCPI7_1:
	.long	0x00000000                      # float 0
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$184, %rsp
	.cfi_def_cfa_offset 240
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movl	$4000, %edi                     # imm = 0xFA0
	callq	_Znam
	movq	%rax, %rbx
	movl	$4192, %edi                     # imm = 0x1060
	callq	_Znam
	movq	%rax, %r15
	movl	$8192, %edi                     # imm = 0x2000
	callq	_Znam
	movq	%rax, 40(%rsp)                  # 8-byte Spill
	movl	$8192, %edi                     # imm = 0x2000
	callq	_Znam
	movq	%rax, %r12
	leaq	8(%rsp), %r13
	movq	$1, (%r13)
	xorl	%ebp, %ebp
	xorl	%r14d, %r14d
.LBB7_1:                                # %.lr.ph.i
                                        # =>This Inner Loop Header: Depth=1
	movq	%r13, %rdi
	callq	_ZSt18generate_canonicalIfLm24ESt26linear_congruential_engineImLm16807ELm0ELm2147483647EEET_RT1_
	addss	.LCPI7_1(%rip), %xmm0
	movss	.LCPI7_0(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	ucomiss	%xmm0, %xmm1
	jbe	.LBB7_3
# %bb.2:                                #   in Loop: Header=BB7_1 Depth=1
	movslq	%r14d, %rax
	incl	%r14d
	movl	%ebp, (%rbx,%rax,4)
.LBB7_3:                                #   in Loop: Header=BB7_1 Depth=1
	incl	%ebp
	cmpl	$1000, %r14d                    # imm = 0x3E8
	jl	.LBB7_1
# %bb.4:                                # %_Z10init_orderPiii.exit
	leaq	8(%rsp), %r13
	movq	$2, (%r13)
	xorl	%ebp, %ebp
	xorl	%r14d, %r14d
.LBB7_5:                                # %.lr.ph.i40
                                        # =>This Inner Loop Header: Depth=1
	movq	%r13, %rdi
	callq	_ZSt18generate_canonicalIfLm24ESt26linear_congruential_engineImLm16807ELm0ELm2147483647EEET_RT1_
	addss	.LCPI7_1(%rip), %xmm0
	movss	.LCPI7_0(%rip), %xmm1           # xmm1 = mem[0],zero,zero,zero
	ucomiss	%xmm0, %xmm1
	jbe	.LBB7_7
# %bb.6:                                #   in Loop: Header=BB7_5 Depth=1
	movslq	%r14d, %rax
	incl	%r14d
	movl	%ebp, (%r15,%rax,4)
.LBB7_7:                                #   in Loop: Header=BB7_5 Depth=1
	incl	%ebp
	cmpl	$1048, %r14d                    # imm = 0x418
	jl	.LBB7_5
# %bb.8:                                # %_Z10init_orderPiii.exit44
	leaq	24(%rsp), %r14
	movq	%r14, %rdi
	callq	hipEventCreate
	movl	%eax, %edi
	movl	$142, %esi
	callq	_ZL11HandleError10hipError_tPKci
	movq	%rsp, %rdi
	callq	hipEventCreate
	movl	%eax, %edi
	movl	$143, %esi
	callq	_ZL11HandleError10hipError_tPKci
	leaq	8(%rsp), %r13
	movl	$4000, %esi                     # imm = 0xFA0
	movq	%r13, %rdi
	callq	hipMalloc
	movl	%eax, %edi
	movl	$145, %esi
	callq	_ZL11HandleError10hipError_tPKci
	leaq	32(%rsp), %rbp
	movl	$4192, %esi                     # imm = 0x1060
	movq	%rbp, %rdi
	callq	hipMalloc
	movl	%eax, %edi
	movl	$146, %esi
	callq	_ZL11HandleError10hipError_tPKci
	leaq	16(%rsp), %rdi
	movl	$8192, %esi                     # imm = 0x2000
	callq	hipMalloc
	movl	%eax, %edi
	movl	$147, %esi
	callq	_ZL11HandleError10hipError_tPKci
	movq	(%r13), %rdi
	movl	$4000, %edx                     # imm = 0xFA0
	movq	%rbx, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	%eax, %edi
	movl	$148, %esi
	callq	_ZL11HandleError10hipError_tPKci
	movq	(%rbp), %rdi
	movl	$4192, %edx                     # imm = 0x1060
	movq	%r15, %rsi
	movl	$1, %ecx
	callq	hipMemcpy
	movl	%eax, %edi
	movl	$149, %esi
	callq	_ZL11HandleError10hipError_tPKci
	movq	%rbx, %rdi
	movl	$1000, %esi                     # imm = 0x3E8
	movq	%r15, %rdx
	movl	$1048, %ecx                     # imm = 0x418
	movq	40(%rsp), %rbp                  # 8-byte Reload
	movq	%rbp, %r8
	callq	_Z5mergePiiS_iS_
	movq	(%r14), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movl	%eax, %edi
	movl	$155, %esi
	callq	_ZL11HandleError10hipError_tPKci
	movabsq	$4294967298, %rdi               # imm = 0x100000002
	leaq	14(%rdi), %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB7_10
# %bb.9:
	movq	8(%rsp), %rdi
	movq	32(%rsp), %rdx
	movq	16(%rsp), %r8
	movl	$1000, %esi                     # imm = 0x3E8
	movl	$1048, %ecx                     # imm = 0x418
	callq	_Z28__device_stub__merge_co_rankPiiS_iS_
.LBB7_10:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_.exit
	movq	(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movl	%eax, %edi
	movl	$158, %esi
	callq	_ZL11HandleError10hipError_tPKci
	movq	(%rsp), %rdi
	callq	hipEventSynchronize
	movl	%eax, %edi
	movl	$159, %esi
	callq	_ZL11HandleError10hipError_tPKci
	movq	24(%rsp), %rsi
	movq	(%rsp), %rdx
	leaq	52(%rsp), %r13
	movq	%r13, %rdi
	callq	hipEventElapsedTime
	movl	%eax, %edi
	movl	$161, %esi
	callq	_ZL11HandleError10hipError_tPKci
	cvtss2sd	(%r13), %xmm0
	movl	$.L.str.4, %edi
	movb	$1, %al
	callq	printf
	leaq	168(%rsp), %r14
	movq	%r14, -16(%r14)
	leaq	152(%rsp), %r13
	movl	$.L.str.5, %esi
	movl	$.L.str.5+11, %edx
	movq	%r13, %rdi
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
	movq	%rbx, %rdi
	movl	$1000, %esi                     # imm = 0x3E8
	movq	%r13, %rdx
	callq	_Z4showPiiNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
	movq	(%r13), %rdi
	cmpq	%r14, %rdi
	je	.LBB7_12
# %bb.11:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i
	callq	_ZdlPv
.LBB7_12:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit
	leaq	136(%rsp), %r14
	movq	%r14, -16(%r14)
	leaq	120(%rsp), %r13
	movl	$.L.str.6, %esi
	movl	$.L.str.6+11, %edx
	movq	%r13, %rdi
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
	movq	%r15, %rdi
	movl	$1048, %esi                     # imm = 0x418
	movq	%r13, %rdx
	callq	_Z4showPiiNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
	movq	(%r13), %rdi
	cmpq	%r14, %rdi
	je	.LBB7_14
# %bb.13:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i46
	callq	_ZdlPv
.LBB7_14:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit48
	movq	16(%rsp), %rsi
	movl	$8192, %edx                     # imm = 0x2000
	movq	%r12, %rdi
	movl	$2, %ecx
	callq	hipMemcpy
	movl	%eax, %edi
	movl	$167, %esi
	callq	_ZL11HandleError10hipError_tPKci
	movl	(%r12), %eax
	cmpl	(%rbp), %eax
	jne	.LBB7_20
# %bb.15:                               # %.lr.ph.preheader
	movq	$-1, %rax
.LBB7_16:                               # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	cmpq	$2046, %rax                     # imm = 0x7FE
	je	.LBB7_19
# %bb.17:                               # %.lr.ph.i49
                                        #   in Loop: Header=BB7_16 Depth=1
	movl	8(%r12,%rax,4), %edx
	leaq	1(%rax), %rcx
	cmpl	8(%rbp,%rax,4), %edx
	movq	%rcx, %rax
	je	.LBB7_16
# %bb.18:                               # %_Z13verify_outputPiS_i.exit
	cmpq	$2047, %rcx                     # imm = 0x7FF
	jb	.LBB7_20
.LBB7_19:                               # %_Z13verify_outputPiS_i.exit.thread
	movl	$.Lstr.1, %edi
	callq	puts@PLT
	jmp	.LBB7_24
.LBB7_20:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC2IS3_EEPKcRKS3_.exit56
	movl	$.Lstr, %edi
	callq	puts@PLT
	leaq	104(%rsp), %r14
	movq	%r14, -16(%r14)
	leaq	88(%rsp), %r13
	movl	$.L.str.9, %esi
	movl	$.L.str.9+15, %edx
	movq	%r13, %rdi
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
	movq	%rbp, %rdi
	movl	$2048, %esi                     # imm = 0x800
	movq	%r13, %rdx
	callq	_Z4showPiiNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
	movq	(%r13), %rdi
	cmpq	%r14, %rdi
	je	.LBB7_22
# %bb.21:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i57
	callq	_ZdlPv
.LBB7_22:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit59
	leaq	72(%rsp), %r14
	movq	%r14, -16(%r14)
	leaq	56(%rsp), %r13
	movl	$.L.str.10, %esi
	movl	$.L.str.10+18, %edx
	movq	%r13, %rdi
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
	movq	%r12, %rdi
	movl	$2048, %esi                     # imm = 0x800
	movq	%r13, %rdx
	callq	_Z4showPiiNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEE
	movq	(%r13), %rdi
	cmpq	%r14, %rdi
	je	.LBB7_24
# %bb.23:                               # %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i61
	callq	_ZdlPv
.LBB7_24:                               # %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit63
	movq	%rbx, %rdi
	callq	_ZdaPv
	movq	%r15, %rdi
	callq	_ZdaPv
	movq	%r12, %rdi
	callq	_ZdaPv
	movq	%rbp, %rdi
	callq	_ZdaPv
	movq	8(%rsp), %rdi
	callq	hipFree
	movl	%eax, %edi
	movl	$181, %esi
	callq	_ZL11HandleError10hipError_tPKci
	movq	32(%rsp), %rdi
	callq	hipFree
	movl	%eax, %edi
	movl	$182, %esi
	callq	_ZL11HandleError10hipError_tPKci
	movq	16(%rsp), %rdi
	callq	hipFree
	movl	%eax, %edi
	movl	$183, %esi
	callq	_ZL11HandleError10hipError_tPKci
	movq	24(%rsp), %rdi
	callq	hipEventDestroy
	movl	%eax, %edi
	movl	$184, %esi
	callq	_ZL11HandleError10hipError_tPKci
	movq	(%rsp), %rdi
	callq	hipEventDestroy
	movl	%eax, %edi
	movl	$185, %esi
	callq	_ZL11HandleError10hipError_tPKci
	xorl	%eax, %eax
	addq	$184, %rsp
	.cfi_def_cfa_offset 56
	popq	%rbx
	.cfi_def_cfa_offset 48
	popq	%r12
	.cfi_def_cfa_offset 40
	popq	%r13
	.cfi_def_cfa_offset 32
	popq	%r14
	.cfi_def_cfa_offset 24
	popq	%r15
	.cfi_def_cfa_offset 16
	popq	%rbp
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end7:
	.size	main, .Lfunc_end7-main
	.cfi_endproc
                                        # -- End function
	.type	_ZL11HandleError10hipError_tPKci,@function # -- Begin function _ZL11HandleError10hipError_tPKci
_ZL11HandleError10hipError_tPKci:       # @_ZL11HandleError10hipError_tPKci
	.cfi_startproc
# %bb.0:
	testl	%edi, %edi
	jne	.LBB8_2
# %bb.1:
	retq
.LBB8_2:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset %rbx, -16
	movl	%esi, %ebx
	callq	hipGetErrorString
	movl	$.L.str.11, %edi
	movl	$.L.str.3, %edx
	movq	%rax, %rsi
	movl	%ebx, %ecx
	xorl	%eax, %eax
	callq	printf
	movl	$1, %edi
	callq	exit
.Lfunc_end8:
	.size	_ZL11HandleError10hipError_tPKci, .Lfunc_end8-_ZL11HandleError10hipError_tPKci
	.cfi_endproc
                                        # -- End function
	.section	.text._ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag,"axG",@progbits,_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag,comdat
	.weak	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag # -- Begin function _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
	.p2align	1, 0x90
	.type	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag,@function
_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag: # @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r12
	.cfi_def_cfa_offset 32
	pushq	%rbx
	.cfi_def_cfa_offset 40
	pushq	%rax
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -40
	.cfi_offset %r12, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	movq	%rdx, %r14
	movq	%rsi, %r15
	movq	%rdi, %rbx
	subq	%rsi, %r14
	movq	%r14, (%rsp)
	cmpq	$15, %r14
	jbe	.LBB9_1
# %bb.2:
	movq	%rsp, %r12
	movq	%rbx, %rdi
	movq	%r12, %rsi
	xorl	%edx, %edx
	callq	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE9_M_createERmm
	movq	%rax, (%rbx)
	movq	(%r12), %rcx
	movq	%rcx, 16(%rbx)
	jmp	.LBB9_3
.LBB9_1:                                # %._crit_edge
	movq	(%rbx), %rax
.LBB9_3:
	testq	%r14, %r14
	je	.LBB9_7
# %bb.4:
	cmpq	$1, %r14
	jne	.LBB9_6
# %bb.5:
	movb	(%r15), %cl
	movb	%cl, (%rax)
	jmp	.LBB9_7
.LBB9_6:
	movq	%rax, %rdi
	movq	%r15, %rsi
	movq	%r14, %rdx
	callq	memcpy@PLT
.LBB9_7:                                # %_ZZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tagEN6_GuardD2Ev.exit
	movq	(%rsp), %rax
	movq	%rax, 8(%rbx)
	movq	(%rbx), %rcx
	movb	$0, (%rcx,%rax)
	addq	$8, %rsp
	.cfi_def_cfa_offset 40
	popq	%rbx
	.cfi_def_cfa_offset 32
	popq	%r12
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end9:
	.size	_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag, .Lfunc_end9-_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE12_M_constructIPKcEEvT_S8_St20forward_iterator_tag
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst8,"aM",@progbits,8
	.p2align	3, 0x0                          # -- Begin function _ZSt18generate_canonicalIfLm24ESt26linear_congruential_engineImLm16807ELm0ELm2147483647EEET_RT1_
.LCPI10_0:
	.quad	0x41dfffffff800000              # double 2147483646
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0
.LCPI10_1:
	.long	0x40000000                      # float 2
.LCPI10_2:
	.long	0x5f000000                      # float 9.22337203E+18
.LCPI10_3:
	.long	0x3f800000                      # float 1
	.section	.text._ZSt18generate_canonicalIfLm24ESt26linear_congruential_engineImLm16807ELm0ELm2147483647EEET_RT1_,"axG",@progbits,_ZSt18generate_canonicalIfLm24ESt26linear_congruential_engineImLm16807ELm0ELm2147483647EEET_RT1_,comdat
	.weak	_ZSt18generate_canonicalIfLm24ESt26linear_congruential_engineImLm16807ELm0ELm2147483647EEET_RT1_
	.type	_ZSt18generate_canonicalIfLm24ESt26linear_congruential_engineImLm16807ELm0ELm2147483647EEET_RT1_,@function
_ZSt18generate_canonicalIfLm24ESt26linear_congruential_engineImLm16807ELm0ELm2147483647EEET_RT1_: # @_ZSt18generate_canonicalIfLm24ESt26linear_congruential_engineImLm16807ELm0ELm2147483647EEET_RT1_
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$64, %rsp
	.cfi_def_cfa_offset 80
	.cfi_offset %rbx, -16
	movq	%rdi, %rbx
	fldl	.LCPI10_0(%rip)
	fstpt	(%rsp)
	callq	logl
	fstpt	52(%rsp)                        # 10-byte Folded Spill
	flds	.LCPI10_1(%rip)
	fstpt	(%rsp)
	callq	logl
	fldt	52(%rsp)                        # 10-byte Folded Reload
	fdivp	%st, %st(1)
	flds	.LCPI10_2(%rip)
	xorl	%ecx, %ecx
	fxch	%st(1)
	fucomi	%st(1), %st
	fldz
	fcmovnb	%st(2), %st
	fstp	%st(2)
	fsubp	%st, %st(1)
	setae	%cl
	fnstcw	28(%rsp)
	movzwl	28(%rsp), %eax
	orl	$3072, %eax                     # imm = 0xC00
	movw	%ax, 30(%rsp)
	fldcw	30(%rsp)
	fistpll	40(%rsp)
	fldcw	28(%rsp)
	shlq	$63, %rcx
	xorq	40(%rsp), %rcx
	leaq	23(%rcx), %rax
	xorl	%edx, %edx
	divq	%rcx
	movq	%rax, %rcx
	cmpq	$1, %rax
	adcq	$0, %rcx
	movq	(%rbx), %rsi
	xorps	%xmm0, %xmm0
	movss	.LCPI10_3(%rip), %xmm1          # xmm1 = mem[0],zero,zero,zero
	movabsq	$8589934597, %rdi               # imm = 0x200000005
.LBB10_1:                               # %select.unfold
                                        # =>This Inner Loop Header: Depth=1
	imulq	$16807, %rsi, %rsi              # imm = 0x41A7
	movq	%rsi, %rax
	mulq	%rdi
	movq	%rsi, %rax
	subq	%rdx, %rax
	shrq	%rax
	addq	%rdx, %rax
	shrq	$30, %rax
	movq	%rax, %rdx
	shlq	$31, %rdx
	subq	%rdx, %rax
	leaq	(%rsi,%rax), %rdx
	decq	%rdx
	testq	%rdx, %rdx
	js	.LBB10_2
# %bb.3:                                # %select.unfold
                                        #   in Loop: Header=BB10_1 Depth=1
	xorps	%xmm2, %xmm2
	cvtsi2ss	%rdx, %xmm2
	jmp	.LBB10_4
.LBB10_2:                               #   in Loop: Header=BB10_1 Depth=1
	movq	%rdx, %r8
	shrq	%r8
	andl	$1, %edx
	orq	%r8, %rdx
	xorps	%xmm2, %xmm2
	cvtsi2ss	%rdx, %xmm2
	addss	%xmm2, %xmm2
.LBB10_4:                               # %select.unfold
                                        #   in Loop: Header=BB10_1 Depth=1
	addq	%rax, %rsi
	mulss	%xmm1, %xmm2
	movss	%xmm1, 36(%rsp)
	flds	36(%rsp)
	fmull	.LCPI10_0(%rip)
	addss	%xmm2, %xmm0
	fstps	32(%rsp)
	movss	32(%rsp), %xmm1                 # xmm1 = mem[0],zero,zero,zero
	decq	%rcx
	jne	.LBB10_1
# %bb.5:
	movq	%rsi, (%rbx)
	divss	%xmm1, %xmm0
	ucomiss	.LCPI10_3(%rip), %xmm0
	jae	.LBB10_7
# %bb.6:
	addq	$64, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	retq
.LBB10_7:
	.cfi_def_cfa_offset 80
	movss	.LCPI10_3(%rip), %xmm0          # xmm0 = mem[0],zero,zero,zero
	xorps	%xmm1, %xmm1
	addq	$64, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	nextafterf                      # TAILCALL
.Lfunc_end10:
	.size	_ZSt18generate_canonicalIfLm24ESt26linear_congruential_engineImLm16807ELm0ELm2147483647EEET_RT1_, .Lfunc_end10-_ZSt18generate_canonicalIfLm24ESt26linear_congruential_engineImLm16807ELm0ELm2147483647EEET_RT1_
	.cfi_endproc
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB11_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB11_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13merge_co_rankPiiS_iS_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end11:
	.size	__hip_module_ctor, .Lfunc_end11-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB12_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB12_2:
	retq
.Lfunc_end12:
	.size	__hip_module_dtor, .Lfunc_end12-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z13merge_co_rankPiiS_iS_,@object # @_Z13merge_co_rankPiiS_iS_
	.section	.rodata,"a",@progbits
	.globl	_Z13merge_co_rankPiiS_iS_
	.p2align	3, 0x0
_Z13merge_co_rankPiiS_iS_:
	.quad	_Z28__device_stub__merge_co_rankPiiS_iS_
	.size	_Z13merge_co_rankPiiS_iS_, 8

	.type	.L.str.1,@object                # @.str.1
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str.1:
	.asciz	"%d "
	.size	.L.str.1, 4

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"/home/ubuntu/Datasets/stackv2/train-structured-repos-hip-sm89/ajgappmark/Programming_Massively_Parallel_Processors/master/PMPP/MergeSort.hip"
	.size	.L.str.3, 141

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"Elapsed Time is %f \n"
	.size	.L.str.4, 21

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"array1 ===>"
	.size	.L.str.5, 12

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"array2 ===>"
	.size	.L.str.6, 12

	.type	.L.str.9,@object                # @.str.9
.L.str.9:
	.asciz	"output_cpu ===>"
	.size	.L.str.9, 16

	.type	.L.str.10,@object               # @.str.10
.L.str.10:
	.asciz	"output_device ===>"
	.size	.L.str.10, 19

	.type	.L.str.11,@object               # @.str.11
.L.str.11:
	.asciz	"%s in %s at line %d\n"
	.size	.L.str.11, 21

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z13merge_co_rankPiiS_iS_"
	.size	.L__unnamed_1, 26

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Answer is Wrong"
	.size	.Lstr, 16

	.type	.Lstr.1,@object                 # @str.1
.Lstr.1:
	.asciz	"Answer is Correct"
	.size	.Lstr.1, 18

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z28__device_stub__merge_co_rankPiiS_iS_
	.addrsig_sym __gxx_personality_v0
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z13merge_co_rankPiiS_iS_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z13merge_co_rankPiiS_iS_ ; -- Begin function _Z13merge_co_rankPiiS_iS_
	.globl	_Z13merge_co_rankPiiS_iS_
	.p2align	8
	.type	_Z13merge_co_rankPiiS_iS_,@function
_Z13merge_co_rankPiiS_iS_:              ; @_Z13merge_co_rankPiiS_iS_
; %bb.0:
	s_clause 0x2
	s_load_b32 s2, s[0:1], 0x34
	s_load_b32 s3, s[0:1], 0x28
	s_load_b64 s[4:5], s[0:1], 0x10
	s_mov_b32 s14, 0
	s_waitcnt lgkmcnt(0)
	s_and_b32 s2, s2, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1)
	s_mul_i32 s6, s3, s2
	s_clause 0x1
	s_load_b32 s3, s[0:1], 0x18
	s_load_b32 s8, s[0:1], 0x8
	v_cvt_f32_u32_e32 v1, s6
	s_sub_i32 s9, 0, s6
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_rcp_iflag_f32_e32 v1, v1
	s_waitcnt_depctr 0xfff
	v_mul_f32_e32 v1, 0x4f7ffffe, v1
	s_waitcnt lgkmcnt(0)
	s_add_i32 s11, s3, s8
	v_cvt_u32_f32_e32 v1, v1
	s_add_i32 s10, s11, -1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_readfirstlane_b32 s7, v1
	v_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]
	v_mov_b32_e32 v2, 0
                                        ; implicit-def: $sgpr15
	s_mul_i32 s9, s9, s7
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s9, s7, s9
	s_add_i32 s7, s7, s9
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_hi_u32 s7, s10, s7
	s_mul_i32 s9, s7, s6
	s_delay_alu instid0(SALU_CYCLE_1)
	s_sub_i32 s9, s10, s9
	s_add_i32 s10, s7, 1
	s_sub_i32 s12, s9, s6
	s_cmp_ge_u32 s9, s6
	s_cselect_b32 s2, s10, s7
	s_cselect_b32 s7, s12, s9
	s_add_i32 s9, s2, 1
	s_cmp_ge_u32 s7, s6
	s_load_b64 s[6:7], s[0:1], 0x0
	s_cselect_b32 s12, s9, s2
	s_add_i32 s13, s8, -1
	s_add_i32 s12, s12, 1
	s_add_u32 s9, s4, -4
	v_mul_lo_u32 v0, v1, s12
	s_addc_u32 s10, s5, -1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_subrev_nc_u32_e32 v1, s3, v0
	v_cmp_le_i32_e32 vcc_lo, s3, v0
	v_min_i32_e32 v8, s13, v0
	v_cndmask_b32_e32 v7, 0, v1, vcc_lo
.LBB0_1:                                ; =>This Inner Loop Header: Depth=1
	s_or_b32 s15, s15, exec_lo
	s_mov_b32 s16, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_lt_i32_e64 v7, v8
	s_cbranch_execz .LBB0_9
; %bb.2:                                ;   in Loop: Header=BB0_1 Depth=1
	v_add_nc_u32_e32 v1, v8, v7
                                        ; implicit-def: $sgpr18
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, 1, v1
	v_cmp_lt_i32_e32 vcc_lo, 0, v1
	v_lshrrev_b32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, v3, v4
	v_ashrrev_i32_e32 v3, 1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v5, v0, v3
	v_cmp_gt_i32_e64 s2, s3, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s19, vcc_lo, s2
	s_xor_b32 s2, s19, -1
	s_and_saveexec_b32 s17, s19
	s_cbranch_execz .LBB0_4
; %bb.3:                                ;   in Loop: Header=BB0_1 Depth=1
	v_add_nc_u32_e32 v1, -1, v3
	v_ashrrev_i32_e32 v6, 31, v5
	s_and_not1_b32 s2, s2, exec_lo
	s_mov_b32 s18, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[9:10], 2, v[1:2]
	v_lshlrev_b64 v[11:12], 2, v[5:6]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v9, vcc_lo, s6, v9
	v_add_co_ci_u32_e32 v10, vcc_lo, s7, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v11, vcc_lo, s4, v11
	v_add_co_ci_u32_e32 v12, vcc_lo, s5, v12, vcc_lo
	global_load_b32 v4, v[9:10], off
	global_load_b32 v6, v[11:12], off
	s_waitcnt vmcnt(0)
	v_cmp_le_i32_e32 vcc_lo, v4, v6
	s_and_b32 s19, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s2, s2, s19
.LBB0_4:                                ; %Flow93
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s17
	v_mov_b32_e32 v4, s18
	s_and_saveexec_b32 s17, s2
	s_cbranch_execz .LBB0_8
; %bb.5:                                ;   in Loop: Header=BB0_1 Depth=1
	v_cmp_lt_i32_e32 vcc_lo, 0, v5
	v_cmp_gt_i32_e64 s2, s8, v3
	v_mov_b32_e32 v4, 3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s18, s2, vcc_lo
	s_and_saveexec_b32 s2, s18
	s_cbranch_execz .LBB0_7
; %bb.6:                                ;   in Loop: Header=BB0_1 Depth=1
	v_ashrrev_i32_e32 v4, 31, v3
	v_mov_b32_e32 v6, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[9:10], 2, v[3:4]
	v_add_nc_u32_e32 v3, 1, v3
	v_lshlrev_b64 v[4:5], 2, v[5:6]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v9, vcc_lo, s6, v9
	v_add_co_ci_u32_e32 v10, vcc_lo, s7, v10, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v4, vcc_lo, s9, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s10, v5, vcc_lo
	global_load_b32 v1, v[9:10], off
	global_load_b32 v4, v[4:5], off
	s_waitcnt vmcnt(0)
	v_cmp_gt_i32_e32 vcc_lo, v1, v4
	v_cndmask_b32_e32 v7, v3, v7, vcc_lo
	v_cndmask_b32_e64 v4, 0, 3, vcc_lo
.LBB0_7:                                ; %Flow91
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	v_mov_b32_e32 v1, v8
.LBB0_8:                                ;   in Loop: Header=BB0_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s17
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_ne_u32_e32 vcc_lo, 0, v4
	v_mov_b32_e32 v8, v1
	s_and_not1_b32 s2, s15, exec_lo
	s_and_b32 s15, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s15, s2, s15
.LBB0_9:                                ; %Flow94
                                        ;   in Loop: Header=BB0_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s16
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, exec_lo, s15
	s_or_b32 s14, s2, s14
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s14
	s_cbranch_execnz .LBB0_1
; %bb.10:                               ; %_Z7co_rankiPiiS_i.exit
	s_or_b32 exec_lo, exec_lo, s14
	v_dual_mov_b32 v2, 0 :: v_dual_add_nc_u32 v1, s12, v0
                                        ; implicit-def: $sgpr12
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)
	v_min_i32_e32 v9, s11, v1
	s_mov_b32 s11, 0
	v_subrev_nc_u32_e32 v1, s3, v9
	v_cmp_le_i32_e32 vcc_lo, s3, v9
	v_min_i32_e32 v11, s13, v9
	s_delay_alu instid0(VALU_DEP_3)
	v_cndmask_b32_e32 v10, 0, v1, vcc_lo
.LBB0_11:                               ; =>This Inner Loop Header: Depth=1
	s_or_b32 s12, s12, exec_lo
	s_mov_b32 s13, exec_lo
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_lt_i32_e64 v10, v11
	s_cbranch_execz .LBB0_19
; %bb.12:                               ;   in Loop: Header=BB0_11 Depth=1
	v_add_nc_u32_e32 v1, v11, v10
                                        ; implicit-def: $sgpr15
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, 1, v1
	v_cmp_lt_i32_e32 vcc_lo, 0, v1
	v_lshrrev_b32_e32 v4, 31, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_add_nc_u32_e32 v3, v3, v4
	v_ashrrev_i32_e32 v3, 1, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_sub_nc_u32_e32 v5, v9, v3
	v_cmp_gt_i32_e64 s2, s3, v5
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s16, vcc_lo, s2
	s_xor_b32 s2, s16, -1
	s_and_saveexec_b32 s14, s16
	s_cbranch_execz .LBB0_14
; %bb.13:                               ;   in Loop: Header=BB0_11 Depth=1
	v_add_nc_u32_e32 v1, -1, v3
	v_ashrrev_i32_e32 v6, 31, v5
	s_and_not1_b32 s2, s2, exec_lo
	s_mov_b32 s15, 0
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[12:13], 2, v[1:2]
	v_lshlrev_b64 v[14:15], 2, v[5:6]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v12, vcc_lo, s6, v12
	v_add_co_ci_u32_e32 v13, vcc_lo, s7, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v14, vcc_lo, s4, v14
	v_add_co_ci_u32_e32 v15, vcc_lo, s5, v15, vcc_lo
	global_load_b32 v4, v[12:13], off
	global_load_b32 v6, v[14:15], off
	s_waitcnt vmcnt(0)
	v_cmp_le_i32_e32 vcc_lo, v4, v6
	s_and_b32 s16, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s2, s2, s16
.LBB0_14:                               ; %Flow89
                                        ;   in Loop: Header=BB0_11 Depth=1
	s_or_b32 exec_lo, exec_lo, s14
	v_mov_b32_e32 v4, s15
	s_and_saveexec_b32 s14, s2
	s_cbranch_execz .LBB0_18
; %bb.15:                               ;   in Loop: Header=BB0_11 Depth=1
	v_cmp_lt_i32_e32 vcc_lo, 0, v5
	v_cmp_gt_i32_e64 s2, s8, v3
	v_mov_b32_e32 v4, 3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s15, s2, vcc_lo
	s_and_saveexec_b32 s2, s15
	s_cbranch_execz .LBB0_17
; %bb.16:                               ;   in Loop: Header=BB0_11 Depth=1
	v_ashrrev_i32_e32 v4, 31, v3
	v_mov_b32_e32 v6, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[12:13], 2, v[3:4]
	v_add_nc_u32_e32 v3, 1, v3
	v_lshlrev_b64 v[4:5], 2, v[5:6]
	s_waitcnt lgkmcnt(0)
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v12, vcc_lo, s6, v12
	v_add_co_ci_u32_e32 v13, vcc_lo, s7, v13, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v4, vcc_lo, s9, v4
	v_add_co_ci_u32_e32 v5, vcc_lo, s10, v5, vcc_lo
	global_load_b32 v1, v[12:13], off
	global_load_b32 v4, v[4:5], off
	s_waitcnt vmcnt(0)
	v_cmp_gt_i32_e32 vcc_lo, v1, v4
	v_cndmask_b32_e32 v10, v3, v10, vcc_lo
	v_cndmask_b32_e64 v4, 0, 3, vcc_lo
.LBB0_17:                               ; %Flow87
                                        ;   in Loop: Header=BB0_11 Depth=1
	s_or_b32 exec_lo, exec_lo, s2
	v_mov_b32_e32 v1, v11
.LBB0_18:                               ;   in Loop: Header=BB0_11 Depth=1
	s_or_b32 exec_lo, exec_lo, s14
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_cmp_ne_u32_e32 vcc_lo, 0, v4
	v_mov_b32_e32 v11, v1
	s_and_not1_b32 s2, s12, exec_lo
	s_and_b32 s12, vcc_lo, exec_lo
	s_delay_alu instid0(SALU_CYCLE_1)
	s_or_b32 s12, s2, s12
.LBB0_19:                               ; %Flow90
                                        ;   in Loop: Header=BB0_11 Depth=1
	s_or_b32 exec_lo, exec_lo, s13
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_and_b32 s2, exec_lo, s12
	s_or_b32 s11, s2, s11
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 exec_lo, exec_lo, s11
	s_cbranch_execnz .LBB0_11
; %bb.20:                               ; %_Z7co_rankiPiiS_i.exit49
	s_or_b32 exec_lo, exec_lo, s11
	v_add3_u32 v1, v7, v8, 1
	v_add3_u32 v2, v10, v11, 1
	s_load_b64 s[2:3], s[0:1], 0x20
	s_mov_b32 s9, 0
	v_mov_b32_e32 v8, 0
	v_lshrrev_b32_e32 v3, 31, v1
	v_lshrrev_b32_e32 v4, 31, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v1, v1, v3
	v_dual_mov_b32 v4, 0 :: v_dual_add_nc_u32 v3, v2, v4
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_ashrrev_i32_e32 v2, 1, v1
	v_ashrrev_i32_e32 v1, 1, v3
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_sub_nc_u32_e32 v5, v0, v2
	v_sub_nc_u32_e32 v12, v1, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v3, v5, v1
	v_ashrrev_i32_e32 v1, 31, v0
	v_sub_nc_u32_e32 v11, v9, v3
	v_ashrrev_i32_e32 v3, 31, v2
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_min_i32_e32 v6, v12, v11
	v_cmp_lt_i32_e32 vcc_lo, 0, v6
	v_mov_b32_e32 v6, 0
	s_and_saveexec_b32 s8, vcc_lo
	s_cbranch_execz .LBB0_24
; %bb.21:                               ; %.lr.ph.i.preheader
	v_ashrrev_i32_e32 v6, 31, v5
	v_lshlrev_b64 v[7:8], 2, v[2:3]
	v_lshlrev_b64 v[9:10], 2, v[0:1]
	s_mov_b32 s10, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
	v_lshlrev_b64 v[4:5], 2, v[5:6]
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v13, vcc_lo, s6, v7
	v_add_co_ci_u32_e32 v14, vcc_lo, s7, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_4)
	v_add_co_u32 v15, vcc_lo, s4, v4
	v_mov_b32_e32 v7, 0
	v_add_co_ci_u32_e32 v16, vcc_lo, s5, v5, vcc_lo
	v_add_co_u32 v9, vcc_lo, s2, v9
	v_add_co_ci_u32_e32 v10, vcc_lo, s3, v10, vcc_lo
	v_mov_b32_e32 v4, v7
	v_mov_b32_e32 v6, v7
.LBB0_22:                               ; %.lr.ph.i
                                        ; =>This Inner Loop Header: Depth=1
	s_add_i32 s10, s10, 1
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_dual_mov_b32 v5, v7 :: v_dual_mov_b32 v8, s10
	v_lshlrev_b64 v[17:18], 2, v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[19:20], 2, v[4:5]
	v_add_co_u32 v17, vcc_lo, v13, v17
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_ci_u32_e32 v18, vcc_lo, v14, v18, vcc_lo
	v_add_co_u32 v19, vcc_lo, v15, v19
	s_delay_alu instid0(VALU_DEP_4)
	v_add_co_ci_u32_e32 v20, vcc_lo, v16, v20, vcc_lo
	global_load_b32 v5, v[17:18], off
	global_load_b32 v17, v[19:20], off
	s_waitcnt vmcnt(0)
	v_cmp_le_i32_e32 vcc_lo, v5, v17
	v_add_co_ci_u32_e32 v6, vcc_lo, 0, v6, vcc_lo
	v_cmp_gt_i32_e32 vcc_lo, v5, v17
	v_min_i32_e32 v5, v5, v17
	v_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_1)
	v_cmp_ge_i32_e32 vcc_lo, v6, v12
	global_store_b32 v[9:10], v5, off
	v_add_co_u32 v9, s1, v9, 4
	v_cmp_ge_i32_e64 s0, v4, v11
	s_or_b32 s0, vcc_lo, s0
	v_add_co_ci_u32_e64 v10, vcc_lo, 0, v10, s1
	s_and_b32 s0, exec_lo, s0
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 s9, s0, s9
	s_and_not1_b32 exec_lo, exec_lo, s9
	s_cbranch_execnz .LBB0_22
; %bb.23:                               ; %Flow85
	s_or_b32 exec_lo, exec_lo, s9
.LBB0_24:                               ; %Flow86
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_or_b32 exec_lo, exec_lo, s8
	s_mov_b32 s0, exec_lo
	v_cmpx_ne_u32_e64 v6, v12
	s_xor_b32 s1, exec_lo, s0
	s_cbranch_execz .LBB0_29
; %bb.25:                               ; %.preheader37.i
	s_mov_b32 s8, exec_lo
	v_cmpx_lt_i32_e64 v6, v12
	s_cbranch_execz .LBB0_28
; %bb.26:                               ; %.lr.ph46.i.preheader
	v_mov_b32_e32 v9, 0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_mov_b32_e32 v7, v9
	v_lshlrev_b64 v[4:5], 2, v[8:9]
	v_lshlrev_b64 v[7:8], 2, v[6:7]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v0, vcc_lo, v0, v4
	v_add_co_ci_u32_e32 v1, vcc_lo, v1, v5, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v2, vcc_lo, v2, v7
	v_add_co_ci_u32_e32 v3, vcc_lo, v3, v8, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	v_add_co_u32 v2, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s7, v3, vcc_lo
	s_mov_b32 s6, 0
.LBB0_27:                               ; %.lr.ph46.i
                                        ; =>This Inner Loop Header: Depth=1
	global_load_b32 v4, v[2:3], off
	v_add_nc_u32_e32 v6, 1, v6
	v_add_co_u32 v2, vcc_lo, v2, 4
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_cmp_ge_i32_e32 vcc_lo, v6, v12
	s_or_b32 s6, vcc_lo, s6
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v4, off
	v_add_co_u32 v0, s0, v0, 4
	v_add_co_ci_u32_e64 v1, s0, 0, v1, s0
	s_and_not1_b32 exec_lo, exec_lo, s6
	s_cbranch_execnz .LBB0_27
.LBB0_28:                               ; %Flow81
	s_or_b32 exec_lo, exec_lo, s8
                                        ; implicit-def: $vgpr4
                                        ; implicit-def: $vgpr11
                                        ; implicit-def: $vgpr0_vgpr1
                                        ; implicit-def: $vgpr8
                                        ; implicit-def: $vgpr2_vgpr3
.LBB0_29:                               ; %Flow84
	s_and_not1_saveexec_b32 s0, s1
	s_cbranch_execz .LBB0_33
; %bb.30:                               ; %.preheader.i
	s_mov_b32 s0, exec_lo
	v_cmpx_lt_i32_e64 v4, v11
	s_cbranch_execz .LBB0_33
; %bb.31:                               ; %.lr.ph49.i.preheader
	v_ashrrev_i32_e32 v5, 31, v4
	v_mov_b32_e32 v9, 0
	v_lshlrev_b64 v[0:1], 2, v[0:1]
	v_lshlrev_b64 v[2:3], 2, v[2:3]
	s_mov_b32 s1, 0
	v_lshlrev_b64 v[5:6], 2, v[4:5]
	v_lshlrev_b64 v[7:8], 2, v[8:9]
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_co_u32 v5, vcc_lo, v5, v0
	v_add_co_ci_u32_e32 v6, vcc_lo, v6, v1, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_add_co_u32 v0, vcc_lo, v0, v7
	v_add_co_ci_u32_e32 v1, vcc_lo, v1, v8, vcc_lo
	s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
	v_sub_co_u32 v2, vcc_lo, v5, v2
	v_sub_co_ci_u32_e32 v3, vcc_lo, v6, v3, vcc_lo
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v0, vcc_lo, s2, v0
	v_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo
	v_add_co_u32 v2, vcc_lo, s4, v2
	v_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo
.LBB0_32:                               ; %.lr.ph49.i
                                        ; =>This Inner Loop Header: Depth=1
	global_load_b32 v5, v[2:3], off
	v_add_nc_u32_e32 v4, 1, v4
	v_add_co_u32 v2, vcc_lo, v2, 4
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_4) | instid1(VALU_DEP_1)
	v_cmp_ge_i32_e32 vcc_lo, v4, v11
	s_or_b32 s1, vcc_lo, s1
	s_waitcnt vmcnt(0)
	global_store_b32 v[0:1], v5, off
	v_add_co_u32 v0, s0, v0, 4
	v_add_co_ci_u32_e64 v1, s0, 0, v1, s0
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB0_32
.LBB0_33:                               ; %_Z5mergePiiS_iS_.exit
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13merge_co_rankPiiS_iS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 296
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 21
		.amdhsa_next_free_sgpr 20
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z13merge_co_rankPiiS_iS_, .Lfunc_end0-_Z13merge_co_rankPiiS_iS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 1992
; NumSgprs: 22
; NumVgprs: 21
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 2
; NumSGPRsForWavesPerEU: 22
; NumVGPRsForWavesPerEU: 21
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .offset:         8
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .address_space:  global
        .offset:         32
        .size:           8
        .value_kind:     global_buffer
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         44
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         48
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         52
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         54
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         56
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         58
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         60
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         62
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         96
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         104
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 296
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z13merge_co_rankPiiS_iS_
    .private_segment_fixed_size: 0
    .sgpr_count:     22
    .sgpr_spill_count: 0
    .symbol:         _Z13merge_co_rankPiiS_iS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     21
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
