#include <stdlib.h>
#include <stdio.h>
#include <getopt.h>


__global__ void add_vector(int *vOne, int *vTwo, int *vResult, int N) {
	int i;

	i = blockDim.x * blockIdx.x + threadIdx.x;

	while (i < N) {
		vResult[i] = vOne[i] + vTwo[i];
		i += blockDim.x;
	}
}
int main(int argc, char* argv[]) {
	int numThreadBlocks, numThreadsPerBlock, size, N, i;
	int *vOne, *vTwo, *vResult;
	int *gpu_vOne, *gpu_vTwo, *gpu_vResult;
	cudaError_t status = (cudaError_t)0;
	int opt = 0, debug = 0;
	char err_msg[128] = "usage: ./vector-addition-cuda -b <number thread blocks> -t <number threads per block> -n <items>\n";
	

	while ((opt = getopt(argc, argv, "d:b:n:t:")) != -1) {
	    switch(opt) {
		case 'd':
		    debug = 1;
		    break;
		case 'b':
		    numThreadBlocks = atoi(optarg);
		    break;
		case 't':
		    numThreadsPerBlock = atoi(optarg);
		    break;
		case 'n':
		    N = atoi(optarg);
		    break;
		default:
		    printf("Use -d for debugging\n");
		    fprintf(stderr, err_msg);
		    exit(-1);
	    }
	}

	size = N * sizeof(int);

	vOne = (int*) malloc(size);
	vTwo = (int*) malloc(size);
	vResult = (int*) malloc(size);

	if ((vOne == NULL) || (vTwo == NULL) || (vResult == NULL)) {
		perror("initial malloc() of mOne, mTwo, and/or mResult failed");
		exit(-1);
	}

	if (numThreadBlocks <= 0 || numThreadsPerBlock <= 0 || N <= 0) {
		fprintf(stderr, err_msg);
		exit(-1);
	}

	if (debug) {
		printf("numThreadBlocks: %d, numThreadsPerBlock: %d, # items: %d\n", numThreadBlocks, numThreadsPerBlock, N);
	}

	for (i = 0; i < N; i++) {
		vOne[i] = 3333;
		vTwo[i] = 7777;
		vResult[i] = 0;
	}

	if ((status = cudaMalloc ((void**) &gpu_vOne, size)) != cudaSuccess) {
		printf("cudaMalloc() FAILED (Block), status = %d (%s)\n", status, cudaGetErrorString(status));
		exit(1);
	}

	if ((status = cudaMalloc ((void**) &gpu_vTwo, size)) != cudaSuccess) {
		printf("cudaMalloc() FAILED (Thread), status = %d (%s)\n", status, cudaGetErrorString(status));
		exit(1);
	}

	if ((status = cudaMalloc ((void**) &gpu_vResult, size)) != cudaSuccess) {
		printf("cudaMalloc() FAILED (GThread), status = %d (%s)\n", status, cudaGetErrorString(status));
		exit(1);
	}
	
	cudaMemcpy(gpu_vOne, vOne, size, cudaMemcpyHostToDevice);
	cudaMemcpy(gpu_vTwo, vTwo, size, cudaMemcpyHostToDevice);

	add_vector <<<numThreadBlocks, numThreadsPerBlock>>>
	  (gpu_vOne, gpu_vTwo, gpu_vResult, N);

	
	cudaMemcpy(vResult, gpu_vResult, size, cudaMemcpyDeviceToHost);

	#ifdef DISPLAY
	for (i = 0; i < 2; i++) {
		printf("vResult[%d] = %d\n", i, vResult[i]);
	}
	#endif

	free(vOne);
	free(vTwo);
	free(vResult);
	cudaFree(gpu_vOne);
	cudaFree(gpu_vTwo);
	cudaFree(gpu_vResult);

	exit(0);
}

	.file	"tmpxft_0030a495_00000000-6_vector-addition-cuda.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2030:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z35__device_stub__Z10add_vectorPiS_S_iPiS_S_i
	.type	_Z35__device_stub__Z10add_vectorPiS_S_iPiS_S_i, @function
_Z35__device_stub__Z10add_vectorPiS_S_iPiS_S_i:
.LFB2052:
	.cfi_startproc
	endbr64
	subq	$152, %rsp
	.cfi_def_cfa_offset 160
	movq	%rdi, 24(%rsp)
	leaq	56(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	68(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	40(%rsp), %rdx
	movl	%ecx, 4(%rsp)
	leaq	48(%rsp), %rcx
	movq	%fs:40, %rax
	movq	%rax, 136(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 64(%rsp)
	movq	%rax, 104(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 112(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 120(%rsp)
	leaq	4(%rsp), %rax
	movq	%rax, 128(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 56(%rsp)
	movq	%rax, 68(%rsp)
	movl	$1, 76(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L2
	pushq	48(%rsp)
	.cfi_def_cfa_offset 168
	leaq	_Z10add_vectorPiS_S_i(%rip), %rdi
	pushq	48(%rsp)
	.cfi_def_cfa_offset 176
	movq	84(%rsp), %rcx
	movl	92(%rsp), %r8d
	movq	72(%rsp), %rsi
	movl	80(%rsp), %edx
	leaq	120(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 168
	popq	%rdx
	.cfi_def_cfa_offset 160
.L2:
	movq	136(%rsp), %rax
	subq	%fs:40, %rax
	je	.L4
	call	__stack_chk_fail@PLT
.L4:
	addq	$152, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2052:
	.size	_Z35__device_stub__Z10add_vectorPiS_S_iPiS_S_i, .-_Z35__device_stub__Z10add_vectorPiS_S_iPiS_S_i
	.globl	_Z10add_vectorPiS_S_i
	.type	_Z10add_vectorPiS_S_i, @function
_Z10add_vectorPiS_S_i:
.LFB2053:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z10add_vectorPiS_S_iPiS_S_i
	.cfi_endproc
.LFE2053:
	.size	_Z10add_vectorPiS_S_i, .-_Z10add_vectorPiS_S_i
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC1:
	.string	"Use -d for debugging\n"
.LC2:
	.string	"d:b:n:t:"
.LC3:
	.string	"initial malloc() of mOne, mTwo, and/or mResult failed"
.LC4:
	.string	"numThreadBlocks: %d, numThreadsPerBlock: %d, # items: %d\n"
.LC5:
	.string	"cudaMalloc() FAILED (Block), status = %d (%s)\n"
.LC6:
	.string	"cudaMalloc() FAILED (Thread), status = %d (%s)\n"
.LC7:
	.string	"cudaMalloc() FAILED (GThread), status = %d (%s)\n"
	.section	.rodata
.LC0:
	.string	"usage: ./vector-addition-cuda -b <number thread blocks> -t <number threads per block> -n <items>\n"
	.zero	30
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2027:
	.cfi_startproc
	endbr64
	pushq	%r15
	.cfi_def_cfa_offset 16
	.cfi_offset 15, -16
	movl	$98, %ecx
	xorl	%r15d, %r15d
	pushq	%r14
	.cfi_def_cfa_offset 24
	.cfi_offset 14, -24
	pushq	%r13
	.cfi_def_cfa_offset 32
	.cfi_offset 13, -32
	pushq	%r12
	.cfi_def_cfa_offset 40
	.cfi_offset 12, -40
	leaq	.LC2(%rip), %r12
	pushq	%rbp
	.cfi_def_cfa_offset 48
	.cfi_offset 6, -48
	movq	%rsi, %rbp
	leaq	.LC0(%rip), %rsi
	pushq	%rbx
	.cfi_def_cfa_offset 56
	.cfi_offset 3, -56
	subq	$232, %rsp
	.cfi_def_cfa_offset 288
	movl	%edi, 8(%rsp)
	leaq	88(%rsp), %rdi
	movq	%fs:40, %rax
	movq	%rax, 216(%rsp)
	xorl	%eax, %eax
	rep movsb
	leaq	186(%rsp), %rdi
	movl	$30, %ecx
	rep stosb
	leaq	88(%rsp), %rax
	movq	%rax, 24(%rsp)
.L9:
	movl	8(%rsp), %edi
	movq	%r12, %rdx
	movq	%rbp, %rsi
	call	getopt@PLT
	cmpl	$-1, %eax
	je	.L38
	cmpl	$110, %eax
	je	.L10
	jg	.L11
	cmpl	$98, %eax
	je	.L12
	cmpl	$100, %eax
	je	.L28
	jmp	.L14
.L11:
	cmpl	$116, %eax
	jne	.L14
	movq	optarg(%rip), %rdi
	call	atoi@PLT
	movl	%eax, %r14d
	jmp	.L9
.L12:
	movq	optarg(%rip), %rdi
	call	atoi@PLT
	movl	%eax, %r13d
	jmp	.L9
.L10:
	movq	optarg(%rip), %rdi
	call	atoi@PLT
	movl	%eax, %ebx
	jmp	.L9
.L14:
	leaq	.LC1(%rip), %rsi
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	jmp	.L19
.L28:
	movl	$1, %r15d
	jmp	.L9
.L38:
	leal	0(,%rbx,4), %eax
	cltq
	movq	%rax, %rdi
	movq	%rax, 8(%rsp)
	call	malloc@PLT
	movq	8(%rsp), %rdi
	movq	%rax, %r12
	call	malloc@PLT
	movq	8(%rsp), %rdi
	movq	%rax, %rbp
	call	malloc@PLT
	testq	%r12, %r12
	movq	%rax, 16(%rsp)
	sete	%al
	testq	%rbp, %rbp
	sete	%dl
	orb	%dl, %al
	jne	.L29
	cmpq	$0, 16(%rsp)
	jne	.L17
.L29:
	leaq	.LC3(%rip), %rdi
	call	perror@PLT
.L35:
	orl	$-1, %edi
.L36:
	call	exit@PLT
.L17:
	testl	%r13d, %r13d
	jle	.L19
	testl	%r14d, %r14d
	jle	.L19
	testl	%ebx, %ebx
	jg	.L20
.L19:
	movq	24(%rsp), %rdx
	movq	stderr(%rip), %rdi
	movl	$2, %esi
	xorl	%eax, %eax
	call	__fprintf_chk@PLT
	jmp	.L35
.L20:
	testl	%r15d, %r15d
	je	.L21
	movl	%ebx, %r8d
	movl	%r14d, %ecx
	movl	%r13d, %edx
	movl	$2, %edi
	leaq	.LC4(%rip), %rsi
	xorl	%eax, %eax
	call	__printf_chk@PLT
.L21:
	xorl	%eax, %eax
.L22:
	movl	$3333, (%r12,%rax,4)
	movl	$7777, 0(%rbp,%rax,4)
	incq	%rax
	cmpl	%eax, %ebx
	jg	.L22
	movq	16(%rsp), %rdi
	movl	%ebx, %ecx
	xorl	%eax, %eax
	movq	8(%rsp), %rsi
	salq	$2, %rcx
	rep stosb
	leaq	40(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	%eax, %r15d
	testl	%eax, %eax
	je	.L23
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	movl	%r15d, %edx
	leaq	.LC5(%rip), %rsi
	movq	%rax, %rcx
	jmp	.L37
.L23:
	movq	8(%rsp), %rsi
	leaq	48(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	%eax, %r15d
	testl	%eax, %eax
	je	.L24
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	movl	%r15d, %edx
	leaq	.LC6(%rip), %rsi
	movq	%rax, %rcx
	jmp	.L37
.L24:
	movq	8(%rsp), %rsi
	leaq	56(%rsp), %rdi
	call	cudaMalloc@PLT
	movl	%eax, %r15d
	testl	%eax, %eax
	je	.L25
	movl	%eax, %edi
	call	cudaGetErrorString@PLT
	movl	%r15d, %edx
	leaq	.LC7(%rip), %rsi
	movq	%rax, %rcx
.L37:
	movl	$2, %edi
	xorl	%eax, %eax
	call	__printf_chk@PLT
	movl	$1, %edi
	jmp	.L36
.L25:
	movq	8(%rsp), %rdx
	movq	40(%rsp), %rdi
	movl	$1, %ecx
	movq	%r12, %rsi
	call	cudaMemcpy@PLT
	movq	8(%rsp), %rdx
	movq	48(%rsp), %rdi
	movq	%rbp, %rsi
	movl	$1, %ecx
	call	cudaMemcpy@PLT
	movl	%r14d, 76(%rsp)
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	movabsq	$4294967297, %rax
	movl	%r13d, 64(%rsp)
	movq	%rax, 80(%rsp)
	movl	84(%rsp), %ecx
	movq	%rax, 68(%rsp)
	movq	76(%rsp), %rdx
	movq	64(%rsp), %rdi
	movl	72(%rsp), %esi
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L26
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rsi
	movl	%ebx, %ecx
	movq	40(%rsp), %rdi
	call	_Z35__device_stub__Z10add_vectorPiS_S_iPiS_S_i
.L26:
	movq	8(%rsp), %rdx
	movq	56(%rsp), %rsi
	movl	$2, %ecx
	movq	16(%rsp), %rdi
	call	cudaMemcpy@PLT
	movq	%r12, %rdi
	call	free@PLT
	movq	%rbp, %rdi
	call	free@PLT
	movq	16(%rsp), %rdi
	call	free@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	48(%rsp), %rdi
	call	cudaFree@PLT
	movq	56(%rsp), %rdi
	call	cudaFree@PLT
	xorl	%edi, %edi
	jmp	.L36
	.cfi_endproc
.LFE2027:
	.size	main, .-main
	.section	.rodata.str1.1
.LC8:
	.string	"_Z10add_vectorPiS_S_i"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2055:
	.cfi_startproc
	endbr64
	pushq	%rax
	.cfi_def_cfa_offset 16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC8(%rip), %rdx
	movq	%rax, %rdi
	leaq	_Z10add_vectorPiS_S_i(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rdx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2055:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:


#include <hip/hip_runtime.h>
#include <stdlib.h>
#include <stdio.h>
#include <getopt.h>


__global__ void add_vector(int *vOne, int *vTwo, int *vResult, int N) {
	int i;

	i = blockDim.x * blockIdx.x + threadIdx.x;

	while (i < N) {
		vResult[i] = vOne[i] + vTwo[i];
		i += blockDim.x;
	}
}
int main(int argc, char* argv[]) {
	int numThreadBlocks, numThreadsPerBlock, size, N, i;
	int *vOne, *vTwo, *vResult;
	int *gpu_vOne, *gpu_vTwo, *gpu_vResult;
	hipError_t status = (hipError_t)0;
	int opt = 0, debug = 0;
	char err_msg[128] = "usage: ./vector-addition-cuda -b <number thread blocks> -t <number threads per block> -n <items>\n";
	

	while ((opt = getopt(argc, argv, "d:b:n:t:")) != -1) {
	    switch(opt) {
		case 'd':
		    debug = 1;
		    break;
		case 'b':
		    numThreadBlocks = atoi(optarg);
		    break;
		case 't':
		    numThreadsPerBlock = atoi(optarg);
		    break;
		case 'n':
		    N = atoi(optarg);
		    break;
		default:
		    printf("Use -d for debugging\n");
		    fprintf(stderr, err_msg);
		    exit(-1);
	    }
	}

	size = N * sizeof(int);

	vOne = (int*) malloc(size);
	vTwo = (int*) malloc(size);
	vResult = (int*) malloc(size);

	if ((vOne == NULL) || (vTwo == NULL) || (vResult == NULL)) {
		perror("initial malloc() of mOne, mTwo, and/or mResult failed");
		exit(-1);
	}

	if (numThreadBlocks <= 0 || numThreadsPerBlock <= 0 || N <= 0) {
		fprintf(stderr, err_msg);
		exit(-1);
	}

	if (debug) {
		printf("numThreadBlocks: %d, numThreadsPerBlock: %d, # items: %d\n", numThreadBlocks, numThreadsPerBlock, N);
	}

	for (i = 0; i < N; i++) {
		vOne[i] = 3333;
		vTwo[i] = 7777;
		vResult[i] = 0;
	}

	if ((status = hipMalloc ((void**) &gpu_vOne, size)) != hipSuccess) {
		printf("cudaMalloc() FAILED (Block), status = %d (%s)\n", status, hipGetErrorString(status));
		exit(1);
	}

	if ((status = hipMalloc ((void**) &gpu_vTwo, size)) != hipSuccess) {
		printf("cudaMalloc() FAILED (Thread), status = %d (%s)\n", status, hipGetErrorString(status));
		exit(1);
	}

	if ((status = hipMalloc ((void**) &gpu_vResult, size)) != hipSuccess) {
		printf("cudaMalloc() FAILED (GThread), status = %d (%s)\n", status, hipGetErrorString(status));
		exit(1);
	}
	
	hipMemcpy(gpu_vOne, vOne, size, hipMemcpyHostToDevice);
	hipMemcpy(gpu_vTwo, vTwo, size, hipMemcpyHostToDevice);

	add_vector <<<numThreadBlocks, numThreadsPerBlock>>>
	  (gpu_vOne, gpu_vTwo, gpu_vResult, N);

	
	hipMemcpy(vResult, gpu_vResult, size, hipMemcpyDeviceToHost);

	#ifdef DISPLAY
	for (i = 0; i < 2; i++) {
		printf("vResult[%d] = %d\n", i, vResult[i]);
	}
	#endif

	free(vOne);
	free(vTwo);
	free(vResult);
	hipFree(gpu_vOne);
	hipFree(gpu_vTwo);
	hipFree(gpu_vResult);

	exit(0);
}

	.text
	.file	"vector-addition-cuda.hip"
	.globl	_Z25__device_stub__add_vectorPiS_S_i # -- Begin function _Z25__device_stub__add_vectorPiS_S_i
	.type	_Z25__device_stub__add_vectorPiS_S_i,@function
_Z25__device_stub__add_vectorPiS_S_i:   # @_Z25__device_stub__add_vectorPiS_S_i
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rdi
	movq	%rsi, (%rdi)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	4(%rsp), %rdx
	movl	%ecx, (%rdx)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rdi, 8(%rbx)
	movq	%rsi, 16(%rbx)
	movq	%rdx, 24(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z10add_vectorPiS_S_i, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z25__device_stub__add_vectorPiS_S_i, .Lfunc_end0-_Z25__device_stub__add_vectorPiS_S_i
	.cfi_endproc
                                        # -- End function
	.globl	main                            # -- Begin function main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%rbp
	.cfi_def_cfa_offset 16
	pushq	%r15
	.cfi_def_cfa_offset 24
	pushq	%r14
	.cfi_def_cfa_offset 32
	pushq	%r13
	.cfi_def_cfa_offset 40
	pushq	%r12
	.cfi_def_cfa_offset 48
	pushq	%rbx
	.cfi_def_cfa_offset 56
	subq	$56, %rsp
	.cfi_def_cfa_offset 112
	.cfi_offset %rbx, -56
	.cfi_offset %r12, -48
	.cfi_offset %r13, -40
	.cfi_offset %r14, -32
	.cfi_offset %r15, -24
	.cfi_offset %rbp, -16
	movq	%rsi, %r15
	movl	%edi, %r12d
	movl	$.L.str, %edx
	callq	getopt
                                        # kill: def $eax killed $eax def $rax
	cmpl	$-1, %eax
	jne	.LBB1_2
# %bb.1:
	movb	$1, 8(%rsp)                     # 1-byte Folded Spill
                                        # implicit-def: $ebx
                                        # implicit-def: $ebp
                                        # implicit-def: $r14d
	jmp	.LBB1_11
.LBB1_2:                                # %.lr.ph.preheader
	xorl	%r13d, %r13d
                                        # implicit-def: $r14d
                                        # implicit-def: $ebp
                                        # implicit-def: $ebx
.LBB1_3:                                # %.lr.ph
                                        # =>This Inner Loop Header: Depth=1
	addl	$-98, %eax
	rorl	%eax
	cmpl	$9, %eax
	ja	.LBB1_30
# %bb.4:                                # %.lr.ph
                                        #   in Loop: Header=BB1_3 Depth=1
	jmpq	*.LJTI1_0(,%rax,8)
.LBB1_5:                                #   in Loop: Header=BB1_3 Depth=1
	movq	optarg(%rip), %rdi
	callq	atoi
	movl	%eax, %r14d
	jmp	.LBB1_9
.LBB1_6:                                #   in Loop: Header=BB1_3 Depth=1
	movq	optarg(%rip), %rdi
	callq	atoi
	movl	%eax, %ebx
	jmp	.LBB1_9
.LBB1_7:                                #   in Loop: Header=BB1_3 Depth=1
	movq	optarg(%rip), %rdi
	callq	atoi
	movl	%eax, %ebp
	jmp	.LBB1_9
.LBB1_8:                                #   in Loop: Header=BB1_3 Depth=1
	movl	%eax, %r13d
.LBB1_9:                                #   in Loop: Header=BB1_3 Depth=1
	movl	$.L.str, %edx
	movl	%r12d, %edi
	movq	%r15, %rsi
	callq	getopt
                                        # kill: def $eax killed $eax def $rax
	cmpl	$-1, %eax
	jne	.LBB1_3
# %bb.10:                               # %._crit_edge.loopexit
	testl	%r13d, %r13d
	sete	8(%rsp)                         # 1-byte Folded Spill
.LBB1_11:                               # %._crit_edge
	leal	(,%rbx,4), %eax
	movslq	%eax, %r15
	movq	%r15, %rdi
	callq	malloc
	movq	%rax, %r12
	movq	%r15, %rdi
	callq	malloc
	movq	%rax, %r13
	movq	%r15, %rdi
	callq	malloc
	testq	%r12, %r12
	je	.LBB1_27
# %bb.12:                               # %._crit_edge
	testq	%r13, %r13
	je	.LBB1_27
# %bb.13:                               # %._crit_edge
	testq	%rax, %rax
	je	.LBB1_27
# %bb.14:
	testl	%r14d, %r14d
	jle	.LBB1_31
# %bb.15:
	testl	%ebp, %ebp
	jle	.LBB1_31
# %bb.16:
	testl	%ebx, %ebx
	jle	.LBB1_31
# %bb.17:
	movq	%r15, 48(%rsp)                  # 8-byte Spill
	cmpb	$0, 8(%rsp)                     # 1-byte Folded Reload
	jne	.LBB1_19
# %bb.18:
	movl	$.L.str.3, %edi
	movq	%rax, %r15
	movl	%r14d, %esi
	movl	%ebp, %edx
	movl	%ebx, %ecx
	xorl	%eax, %eax
	callq	printf
	movq	%r15, %rax
.LBB1_19:                               # %.lr.ph91.preheader
	movq	%rbx, 40(%rsp)                  # 8-byte Spill
	movl	%ebx, %r15d
	leaq	(,%r15,4), %rdx
	xorl	%ebx, %ebx
	movq	%rax, 8(%rsp)                   # 8-byte Spill
	movq	%rax, %rdi
	xorl	%esi, %esi
	callq	memset@PLT
.LBB1_20:                               # %.lr.ph91
                                        # =>This Inner Loop Header: Depth=1
	movl	$3333, (%r12,%rbx,4)            # imm = 0xD05
	movl	$7777, (%r13,%rbx,4)            # imm = 0x1E61
	incq	%rbx
	cmpq	%rbx, %r15
	jne	.LBB1_20
# %bb.21:                               # %._crit_edge92
	leaq	32(%rsp), %rdi
	movq	48(%rsp), %rbx                  # 8-byte Reload
	movq	%rbx, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_29
# %bb.22:
	leaq	24(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_32
# %bb.23:
	leaq	16(%rsp), %rdi
	movq	%rbx, %rsi
	callq	hipMalloc
	testl	%eax, %eax
	jne	.LBB1_33
# %bb.24:
	movq	32(%rsp), %rdi
	movq	%r12, %rsi
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movq	24(%rsp), %rdi
	movq	%r13, %rsi
	movq	%rbx, %rdx
	movl	$1, %ecx
	callq	hipMemcpy
	movl	%r14d, %edi
	btsq	$32, %rdi
	movl	%ebp, %edx
	btsq	$32, %rdx
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB1_26
# %bb.25:
	movq	32(%rsp), %rdi
	movq	24(%rsp), %rsi
	movq	16(%rsp), %rdx
	movq	40(%rsp), %rcx                  # 8-byte Reload
                                        # kill: def $ecx killed $ecx killed $rcx
	callq	_Z25__device_stub__add_vectorPiS_S_i
.LBB1_26:
	movq	16(%rsp), %rsi
	movq	8(%rsp), %r14                   # 8-byte Reload
	movq	%r14, %rdi
	movq	%rbx, %rdx
	movl	$2, %ecx
	callq	hipMemcpy
	movq	%r12, %rdi
	callq	free
	movq	%r13, %rdi
	callq	free
	movq	%r14, %rdi
	callq	free
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	24(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	xorl	%edi, %edi
	callq	exit
.LBB1_27:
	movl	$.L.str.2, %edi
	callq	perror
	jmp	.LBB1_28
.LBB1_29:
	movl	%eax, %r15d
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.4, %edi
	jmp	.LBB1_34
.LBB1_30:
	movl	$.Lstr, %edi
	callq	puts@PLT
.LBB1_31:
	movq	stderr(%rip), %rcx
	movl	$.L__const.main.err_msg, %edi
	movl	$97, %esi
	movl	$1, %edx
	callq	fwrite@PLT
.LBB1_28:
	movl	$-1, %edi
	callq	exit
.LBB1_32:
	movl	%eax, %r15d
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.5, %edi
	jmp	.LBB1_34
.LBB1_33:
	movl	%eax, %r15d
	movl	%eax, %edi
	callq	hipGetErrorString
	movl	$.L.str.6, %edi
.LBB1_34:
	movl	%r15d, %esi
	movq	%rax, %rdx
	xorl	%eax, %eax
	callq	printf
	movl	$1, %edi
	callq	exit
.Lfunc_end1:
	.size	main, .Lfunc_end1-main
	.cfi_endproc
	.section	.rodata,"a",@progbits
	.p2align	3, 0x0
.LJTI1_0:
	.quad	.LBB1_5
	.quad	.LBB1_8
	.quad	.LBB1_30
	.quad	.LBB1_30
	.quad	.LBB1_30
	.quad	.LBB1_30
	.quad	.LBB1_6
	.quad	.LBB1_30
	.quad	.LBB1_30
	.quad	.LBB1_7
                                        # -- End function
	.text
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	subq	$40, %rsp
	.cfi_def_cfa_offset 48
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	jne	.LBB2_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rdi
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB2_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z10add_vectorPiS_S_i, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$40, %rsp
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end2:
	.size	__hip_module_ctor, .Lfunc_end2-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB3_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB3_2:
	retq
.Lfunc_end3:
	.size	__hip_module_dtor, .Lfunc_end3-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z10add_vectorPiS_S_i,@object   # @_Z10add_vectorPiS_S_i
	.section	.rodata,"a",@progbits
	.globl	_Z10add_vectorPiS_S_i
	.p2align	3, 0x0
_Z10add_vectorPiS_S_i:
	.quad	_Z25__device_stub__add_vectorPiS_S_i
	.size	_Z10add_vectorPiS_S_i, 8

	.type	.L__const.main.err_msg,@object  # @__const.main.err_msg
	.p2align	4, 0x0
.L__const.main.err_msg:
	.asciz	"usage: ./vector-addition-cuda -b <number thread blocks> -t <number threads per block> -n <items>\n\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000\000"
	.size	.L__const.main.err_msg, 128

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"d:b:n:t:"
	.size	.L.str, 9

	.type	.L.str.2,@object                # @.str.2
.L.str.2:
	.asciz	"initial malloc() of mOne, mTwo, and/or mResult failed"
	.size	.L.str.2, 54

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"numThreadBlocks: %d, numThreadsPerBlock: %d, # items: %d\n"
	.size	.L.str.3, 58

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"cudaMalloc() FAILED (Block), status = %d (%s)\n"
	.size	.L.str.4, 47

	.type	.L.str.5,@object                # @.str.5
.L.str.5:
	.asciz	"cudaMalloc() FAILED (Thread), status = %d (%s)\n"
	.size	.L.str.5, 48

	.type	.L.str.6,@object                # @.str.6
.L.str.6:
	.asciz	"cudaMalloc() FAILED (GThread), status = %d (%s)\n"
	.size	.L.str.6, 49

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z10add_vectorPiS_S_i"
	.size	.L__unnamed_1, 22

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Use -d for debugging"
	.size	.Lstr, 21

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z25__device_stub__add_vectorPiS_S_i
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z10add_vectorPiS_S_i
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z10add_vectorPiS_S_i   ; -- Begin function _Z10add_vectorPiS_S_i
	.globl	_Z10add_vectorPiS_S_i
	.p2align	8
	.type	_Z10add_vectorPiS_S_i,@function
_Z10add_vectorPiS_S_i:                  ; @_Z10add_vectorPiS_S_i
; %bb.0:
	s_clause 0x1
	s_load_b32 s2, s[0:1], 0x2c
	s_load_b32 s8, s[0:1], 0x18
	s_waitcnt lgkmcnt(0)
	s_and_b32 s9, s2, 0xffff
	s_mov_b32 s2, exec_lo
	v_mad_u64_u32 v[1:2], null, s15, s9, v[0:1]
	s_delay_alu instid0(VALU_DEP_1)
	v_cmpx_gt_i32_e64 s8, v1
	s_cbranch_execz .LBB0_3
; %bb.1:                                ; %.lr.ph.preheader
	s_clause 0x1
	s_load_b128 s[4:7], s[0:1], 0x0
	s_load_b64 s[2:3], s[0:1], 0x10
	s_mov_b32 s1, 0
.LBB0_2:                                ; %.lr.ph
                                        ; =>This Inner Loop Header: Depth=1
	v_ashrrev_i32_e32 v2, 31, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_lshlrev_b64 v[2:3], 2, v[1:2]
	v_add_nc_u32_e32 v1, s9, v1
	s_waitcnt lgkmcnt(0)
	v_add_co_u32 v4, vcc_lo, s4, v2
	s_delay_alu instid0(VALU_DEP_3)
	v_add_co_ci_u32_e32 v5, vcc_lo, s5, v3, vcc_lo
	v_add_co_u32 v6, vcc_lo, s6, v2
	v_add_co_ci_u32_e32 v7, vcc_lo, s7, v3, vcc_lo
	v_cmp_le_i32_e32 vcc_lo, s8, v1
	global_load_b32 v0, v[4:5], off
	global_load_b32 v4, v[6:7], off
	v_add_co_u32 v2, s0, s2, v2
	s_delay_alu instid0(VALU_DEP_1)
	v_add_co_ci_u32_e64 v3, s0, s3, v3, s0
	s_or_b32 s1, vcc_lo, s1
	s_waitcnt vmcnt(0)
	v_add_nc_u32_e32 v0, v4, v0
	global_store_b32 v[2:3], v0, off
	s_and_not1_b32 exec_lo, exec_lo, s1
	s_cbranch_execnz .LBB0_2
.LBB0_3:                                ; %._crit_edge
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z10add_vectorPiS_S_i
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 288
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 8
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z10add_vectorPiS_S_i, .Lfunc_end0-_Z10add_vectorPiS_S_i
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 216
; NumSgprs: 18
; NumVgprs: 8
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 8
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     by_value
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         36
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         40
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         44
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         46
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         48
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         50
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         52
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         54
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         88
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         96
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 288
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z10add_vectorPiS_S_i
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z10add_vectorPiS_S_i.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     8
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
