// original code: 
// https://developer.nvidia.com/gpugems/GPUGems3/gpugems3_ch39.html

// Compile & run with `nvcc scanBlelloch.cu && ./a.out <x>`
// where `x` defines the lower and upper integral's limits
// i.e. [-x, x] (see the header of `main`)

#include <cmath>
#include <cstdio>

#define NUM_BANKS 32
#define LOG_NUM_BANKS 5
#define CONFLICT_FREE_OFFSET(n) \
    ((n) >> LOG_NUM_BANKS + (n) >> (2 * LOG_NUM_BANKS))

__global__ void 
blocksPrescan(float * g_odata, float * g_idata, float * SUMS) {
    extern __shared__ float tmp[];  
    uint N = 2 * blockDim.x;

    uint ai = threadIdx.x;
    uint bi = threadIdx.x + N / 2;

    g_idata += blockIdx.x * N; 
    g_odata += blockIdx.x * N; 

    // load input into shared memory
    uint bankOffsetA = CONFLICT_FREE_OFFSET(ai);
    uint bankOffsetB = CONFLICT_FREE_OFFSET(bi);
    tmp[ai + bankOffsetA] = g_idata[ai]; 
    tmp[bi + bankOffsetB] = g_idata[bi];

    uint offset(1);

    // build sum in place up the tree (up-sweep)
    for (uint d=N>>1; d>0; d>>=1) { 
        __syncthreads();

        if (threadIdx.x < d) {
            uint ai = offset * (2 * threadIdx.x + 1) - 1;
            uint bi = offset * (2 * threadIdx.x + 2) - 1;
            ai += CONFLICT_FREE_OFFSET(ai);
            bi += CONFLICT_FREE_OFFSET(bi);
            tmp[bi] += tmp[ai];
        }
        offset <<= 1;
    }
    // write the sum of the array chunk to 'SUMS'
    // and  clear the last element 
    float t;
    if (!threadIdx.x) {
        uint IDX = N - 1;
        IDX += CONFLICT_FREE_OFFSET(N - 1); 

        if (SUMS) {
            t = tmp[IDX];  
            SUMS[blockIdx.x] = t;
        }
        tmp[IDX] = 0;  
    }

    // traverse down tree & build scan (down-sweep)
    for (uint d=1; d<N; d *= 2) { 
        offset >>= 1;
        __syncthreads();

        if (threadIdx.x < d) {
            uint ai = offset * (2 * threadIdx.x + 1) - 1;
            uint bi = offset * (2 * threadIdx.x + 2) - 1;
            ai += CONFLICT_FREE_OFFSET(ai);
            bi += CONFLICT_FREE_OFFSET(bi);

            t = tmp[ai];
            tmp[ai] = tmp[bi];
            tmp[bi] += t; 
        }
    }
    __syncthreads();

    // write results to device memory
    g_odata[ai] = tmp[ai + bankOffsetA]; 
    g_odata[bi] = tmp[bi + bankOffsetB];
}


__global__ 
void blocksShifter(float * g_odata, float * SUMS) {
    g_odata += 2 * blockIdx.x * blockDim.x;
    g_odata[threadIdx.x] += SUMS[blockIdx.x];
    g_odata[threadIdx.x + blockDim.x] += SUMS[blockIdx.x];
}

size_t smemSize(int n_el) {
    int extra_space = n_el / NUM_BANKS;
    extra_space += extra_space / NUM_BANKS;
    return sizeof(float) * (n_el + extra_space);
}


//////////////////////// MAIN //////////////////////////////
// Calculation of the integral \int_{-x}^x \exp(- t^2) dt //
////////////////////////////////////////////////////////////
int main(int argc, char ** argv) {
    // set the integral's limits 
    float x = atof(argv[1]);

    // discretization settings
    size_t n_blocks = 512;
    size_t block_size = 2048;
    size_t n_el = n_blocks * block_size;
    printf("Number of discretization points: %i\n", n_el);

    float * idata, * odata, * sums;
    cudaMallocManaged(&idata, n_el * sizeof(float));
    cudaMallocManaged(&odata, n_el * sizeof(float));
    cudaMallocManaged(&sums,  n_blocks * sizeof(float));

    // calculate integrand's values
    float t, dt;
    dt = 2 * x / n_el;
    for (uint i=0; i<n_el; ++i) {
        t = - x + i * dt;
        idata[i] = exp(- t * t) * dt;
    }

    cudaEvent_t start, stop;
    cudaEventCreate(&start);
    cudaEventCreate(&stop);

    // measure the execution time of the framed block
    cudaEventRecord(start);
    //------------------------------
    blocksPrescan<<<n_blocks, block_size / 2, 
                    smemSize(block_size)>>>(odata, idata, sums);

    blocksPrescan<<<1, n_blocks / 2, 
                    smemSize(n_blocks)>>>(sums, sums, NULL);

    blocksShifter<<<n_blocks, block_size / 2>>>(odata, sums);
    //------------------------------
    cudaEventRecord(stop);
    cudaEventSynchronize(stop);

    float elapsed_time;
    cudaEventElapsedTime(&elapsed_time, start, stop);
    printf("Elapsed time: %f ms\n", elapsed_time);
    printf("Results are written to 'output.bin'\n");

    FILE * cfout = fopen("output.bin", "wb");
    fwrite(odata, sizeof(float), n_el, cfout);
    fclose(cfout);

    cudaFree(idata);
    cudaFree(odata);
    cudaFree(sums);
}

	.file	"tmpxft_0034f967_00000000-6_scanBlelloch.cudafe1.cpp"
	.text
#APP

#NO_APP
	.type	_ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2031:
	.cfi_startproc
	endbr64
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	jmp	__cudaUnregisterFatBinary@PLT
	.cfi_endproc
.LFE2031:
	.size	_ZL26__cudaUnregisterBinaryUtilv, .-_ZL26__cudaUnregisterBinaryUtilv
	.globl	_Z8smemSizei
	.type	_Z8smemSizei, @function
_Z8smemSizei:
.LFB2027:
	.cfi_startproc
	endbr64
	movl	%edi, %eax
	movl	$32, %ecx
	cltd
	idivl	%ecx
	movl	$1024, %ecx
	movl	%eax, %esi
	movl	%edi, %eax
	cltd
	idivl	%ecx
	addl	%esi, %eax
	addl	%edi, %eax
	cltq
	salq	$2, %rax
	ret
	.cfi_endproc
.LFE2027:
	.size	_Z8smemSizei, .-_Z8smemSizei
	.globl	_Z37__device_stub__Z13blocksPrescanPfS_S_PfS_S_
	.type	_Z37__device_stub__Z13blocksPrescanPfS_S_PfS_S_, @function
_Z37__device_stub__Z13blocksPrescanPfS_S_PfS_S_:
.LFB2053:
	.cfi_startproc
	endbr64
	subq	$136, %rsp
	.cfi_def_cfa_offset 144
	movq	%rdi, 24(%rsp)
	leaq	40(%rsp), %rcx
	leaq	48(%rsp), %rdi
	movq	%rsi, 16(%rsp)
	leaq	60(%rsp), %rsi
	movq	%rdx, 8(%rsp)
	leaq	32(%rsp), %rdx
	movq	%fs:40, %rax
	movq	%rax, 120(%rsp)
	xorl	%eax, %eax
	leaq	24(%rsp), %rax
	movl	$1, 56(%rsp)
	movq	%rax, 96(%rsp)
	leaq	16(%rsp), %rax
	movq	%rax, 104(%rsp)
	leaq	8(%rsp), %rax
	movq	%rax, 112(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 48(%rsp)
	movq	%rax, 60(%rsp)
	movl	$1, 68(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L3
	pushq	40(%rsp)
	.cfi_def_cfa_offset 152
	leaq	_Z13blocksPrescanPfS_S_(%rip), %rdi
	pushq	40(%rsp)
	.cfi_def_cfa_offset 160
	movq	76(%rsp), %rcx
	movl	84(%rsp), %r8d
	movq	64(%rsp), %rsi
	movl	72(%rsp), %edx
	leaq	112(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 152
	popq	%rdx
	.cfi_def_cfa_offset 144
.L3:
	movq	120(%rsp), %rax
	subq	%fs:40, %rax
	je	.L5
	call	__stack_chk_fail@PLT
.L5:
	addq	$136, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2053:
	.size	_Z37__device_stub__Z13blocksPrescanPfS_S_PfS_S_, .-_Z37__device_stub__Z13blocksPrescanPfS_S_PfS_S_
	.globl	_Z13blocksPrescanPfS_S_
	.type	_Z13blocksPrescanPfS_S_, @function
_Z13blocksPrescanPfS_S_:
.LFB2054:
	.cfi_startproc
	endbr64
	jmp	_Z37__device_stub__Z13blocksPrescanPfS_S_PfS_S_
	.cfi_endproc
.LFE2054:
	.size	_Z13blocksPrescanPfS_S_, .-_Z13blocksPrescanPfS_S_
	.globl	_Z35__device_stub__Z13blocksShifterPfS_PfS_
	.type	_Z35__device_stub__Z13blocksShifterPfS_PfS_, @function
_Z35__device_stub__Z13blocksShifterPfS_PfS_:
.LFB2055:
	.cfi_startproc
	endbr64
	subq	$120, %rsp
	.cfi_def_cfa_offset 128
	movq	%rdi, 8(%rsp)
	leaq	32(%rsp), %rcx
	leaq	24(%rsp), %rdx
	movq	%rsi, (%rsp)
	leaq	40(%rsp), %rdi
	leaq	52(%rsp), %rsi
	movq	%fs:40, %rax
	movq	%rax, 104(%rsp)
	xorl	%eax, %eax
	leaq	8(%rsp), %rax
	movl	$1, 48(%rsp)
	movq	%rax, 88(%rsp)
	movq	%rsp, %rax
	movq	%rax, 96(%rsp)
	movabsq	$4294967297, %rax
	movq	%rax, 40(%rsp)
	movq	%rax, 52(%rsp)
	movl	$1, 60(%rsp)
	call	__cudaPopCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L9
	pushq	32(%rsp)
	.cfi_def_cfa_offset 136
	leaq	_Z13blocksShifterPfS_(%rip), %rdi
	pushq	32(%rsp)
	.cfi_def_cfa_offset 144
	movq	68(%rsp), %rcx
	movl	76(%rsp), %r8d
	movq	56(%rsp), %rsi
	movl	64(%rsp), %edx
	leaq	104(%rsp), %r9
	call	cudaLaunchKernel@PLT
	popq	%rax
	.cfi_def_cfa_offset 136
	popq	%rdx
	.cfi_def_cfa_offset 128
.L9:
	movq	104(%rsp), %rax
	subq	%fs:40, %rax
	je	.L11
	call	__stack_chk_fail@PLT
.L11:
	addq	$120, %rsp
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2055:
	.size	_Z35__device_stub__Z13blocksShifterPfS_PfS_, .-_Z35__device_stub__Z13blocksShifterPfS_PfS_
	.globl	_Z13blocksShifterPfS_
	.type	_Z13blocksShifterPfS_, @function
_Z13blocksShifterPfS_:
.LFB2056:
	.cfi_startproc
	endbr64
	jmp	_Z35__device_stub__Z13blocksShifterPfS_PfS_
	.cfi_endproc
.LFE2056:
	.size	_Z13blocksShifterPfS_, .-_Z13blocksShifterPfS_
	.section	.rodata.str1.1,"aMS",@progbits,1
.LC0:
	.string	"Number of discretization points: %i\n"
.LC3:
	.string	"Elapsed time: %f ms\n"
.LC4:
	.string	"Results are written to 'output.bin'\n"
.LC5:
	.string	"wb"
.LC6:
	.string	"output.bin"
	.section	.text.startup,"ax",@progbits
	.globl	main
	.type	main, @function
main:
.LFB2028:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	xorl	%ebx, %ebx
	subq	$96, %rsp
	.cfi_def_cfa_offset 112
	movq	8(%rsi), %rdi
	movq	%fs:40, %rax
	movq	%rax, 88(%rsp)
	xorl	%eax, %eax
	call	atof@PLT
	movl	$1048576, %edx
	leaq	.LC0(%rip), %rsi
	xorl	%eax, %eax
	movl	$2, %edi
	cvtsd2ss	%xmm0, %xmm3
	movss	%xmm3, 8(%rsp)
	call	__printf_chk@PLT
	leaq	24(%rsp), %rdi
	movl	$1, %edx
	movl	$4194304, %esi
	call	cudaMallocManaged@PLT
	leaq	32(%rsp), %rdi
	movl	$1, %edx
	movl	$4194304, %esi
	call	cudaMallocManaged@PLT
	leaq	40(%rsp), %rdi
	movl	$1, %edx
	movl	$2048, %esi
	call	cudaMallocManaged@PLT
	movss	8(%rsp), %xmm2
	addss	%xmm2, %xmm2
	mulss	.LC1(%rip), %xmm2
.L15:
	cvtsi2ssl	%ebx, %xmm1
	movss	%xmm2, 12(%rsp)
	mulss	%xmm2, %xmm1
	subss	8(%rsp), %xmm1
	movaps	%xmm1, %xmm0
	xorps	.LC2(%rip), %xmm0
	mulss	%xmm1, %xmm0
	call	expf@PLT
	movss	12(%rsp), %xmm2
	movq	24(%rsp), %rax
	mulss	%xmm2, %xmm0
	movss	%xmm0, (%rax,%rbx,4)
	incq	%rbx
	cmpq	$1048576, %rbx
	jne	.L15
	leaq	48(%rsp), %rdi
	call	cudaEventCreate@PLT
	leaq	56(%rsp), %rdi
	call	cudaEventCreate@PLT
	movq	48(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movl	$4194305, %edx
	movl	$8388609, %edi
	xorl	%r9d, %r9d
	salq	$10, %rdx
	salq	$9, %rdi
	movl	$8456, %r8d
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rdx, 76(%rsp)
	movl	$1, 84(%rsp)
	movq	%rdi, 64(%rsp)
	movl	$1, 72(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L16
	movq	40(%rsp), %rdx
	movq	24(%rsp), %rsi
	movq	32(%rsp), %rdi
	call	_Z37__device_stub__Z13blocksPrescanPfS_S_PfS_S_
.L16:
	movl	$16777217, %edx
	xorl	%r9d, %r9d
	movl	$1, %ecx
	movabsq	$4294967297, %rdi
	salq	$8, %rdx
	movl	$2112, %r8d
	movl	$1, %esi
	movl	$1, 84(%rsp)
	movq	%rdx, 76(%rsp)
	movq	%rdi, 64(%rsp)
	movl	$1, 72(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L17
	movq	40(%rsp), %rdi
	xorl	%edx, %edx
	movq	%rdi, %rsi
	call	_Z37__device_stub__Z13blocksPrescanPfS_S_PfS_S_
.L17:
	movl	$4194305, %edx
	movl	$8388609, %edi
	xorl	%r9d, %r9d
	xorl	%r8d, %r8d
	salq	$10, %rdx
	salq	$9, %rdi
	movl	$1, %ecx
	movl	$1, %esi
	movq	%rdx, 76(%rsp)
	movl	$1, 84(%rsp)
	movq	%rdi, 64(%rsp)
	movl	$1, 72(%rsp)
	call	__cudaPushCallConfiguration@PLT
	testl	%eax, %eax
	jne	.L18
	movq	40(%rsp), %rsi
	movq	32(%rsp), %rdi
	call	_Z35__device_stub__Z13blocksShifterPfS_PfS_
.L18:
	movq	56(%rsp), %rdi
	xorl	%esi, %esi
	call	cudaEventRecord@PLT
	movq	56(%rsp), %rdi
	call	cudaEventSynchronize@PLT
	movq	56(%rsp), %rdx
	movq	48(%rsp), %rsi
	leaq	76(%rsp), %rdi
	call	cudaEventElapsedTime@PLT
	leaq	.LC3(%rip), %rsi
	movl	$2, %edi
	movb	$1, %al
	cvtss2sd	76(%rsp), %xmm0
	call	__printf_chk@PLT
	movl	$2, %edi
	xorl	%eax, %eax
	leaq	.LC4(%rip), %rsi
	call	__printf_chk@PLT
	leaq	.LC5(%rip), %rsi
	leaq	.LC6(%rip), %rdi
	call	fopen@PLT
	movq	32(%rsp), %rdi
	movl	$1048576, %edx
	movl	$4, %esi
	movq	%rax, %rcx
	movq	%rax, %rbx
	call	fwrite@PLT
	movq	%rbx, %rdi
	call	fclose@PLT
	movq	24(%rsp), %rdi
	call	cudaFree@PLT
	movq	32(%rsp), %rdi
	call	cudaFree@PLT
	movq	40(%rsp), %rdi
	call	cudaFree@PLT
	movq	88(%rsp), %rax
	subq	%fs:40, %rax
	je	.L19
	call	__stack_chk_fail@PLT
.L19:
	addq	$96, %rsp
	.cfi_def_cfa_offset 16
	xorl	%eax, %eax
	popq	%rbx
	.cfi_def_cfa_offset 8
	ret
	.cfi_endproc
.LFE2028:
	.size	main, .-main
	.section	.rodata.str1.1
.LC7:
	.string	"_Z13blocksShifterPfS_"
.LC8:
	.string	"_Z13blocksPrescanPfS_S_"
	.section	.text.startup
	.type	_ZL24__sti____cudaRegisterAllv, @function
_ZL24__sti____cudaRegisterAllv:
.LFB2058:
	.cfi_startproc
	endbr64
	pushq	%rbx
	.cfi_def_cfa_offset 16
	.cfi_offset 3, -16
	leaq	_ZL15__fatDeviceText(%rip), %rdi
	call	__cudaRegisterFatBinary@PLT
	pushq	$0
	.cfi_def_cfa_offset 24
	xorl	%r9d, %r9d
	orl	$-1, %r8d
	pushq	$0
	.cfi_def_cfa_offset 32
	leaq	.LC7(%rip), %rdx
	movq	%rax, %rdi
	movq	%rax, %rbx
	pushq	$0
	.cfi_def_cfa_offset 40
	movq	%rdx, %rcx
	leaq	_Z13blocksShifterPfS_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 48
	movq	%rax, _ZL20__cudaFatCubinHandle(%rip)
	call	__cudaRegisterFunction@PLT
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	movq	%rbx, %rdi
	xorl	%r9d, %r9d
	pushq	$0
	.cfi_def_cfa_offset 24
	leaq	.LC8(%rip), %rdx
	orl	$-1, %r8d
	leaq	_Z13blocksPrescanPfS_S_(%rip), %rsi
	pushq	$0
	.cfi_def_cfa_offset 32
	movq	%rdx, %rcx
	pushq	$0
	.cfi_def_cfa_offset 40
	pushq	$0
	.cfi_def_cfa_offset 48
	call	__cudaRegisterFunction@PLT
	movq	_ZL20__cudaFatCubinHandle(%rip), %rdi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	call	__cudaRegisterFatBinaryEnd@PLT
	leaq	_ZL26__cudaUnregisterBinaryUtilv(%rip), %rdi
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit@PLT
	.cfi_endproc
.LFE2058:
	.size	_ZL24__sti____cudaRegisterAllv, .-_ZL24__sti____cudaRegisterAllv
	.section	.init_array,"aw"
	.align 8
	.quad	_ZL24__sti____cudaRegisterAllv
	.section	.nvFatBinSegment,"aw"
	.align 8
	.type	_ZL15__fatDeviceText, @object
	.size	_ZL15__fatDeviceText, 24
_ZL15__fatDeviceText:
	.long	1180844977
	.long	1
	.quad	fatbinData
	.quad	0
	.local	_ZL20__cudaFatCubinHandle
	.comm	_ZL20__cudaFatCubinHandle,8,8
	.section	.rodata.cst4,"aM",@progbits,4
	.align 4
.LC1:
	.long	897581056
	.section	.rodata.cst16,"aM",@progbits,16
	.align 16
.LC2:
	.long	-2147483648
	.long	0
	.long	0
	.long	0
	.ident	"GCC: (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0"
	.section	.note.GNU-stack,"",@progbits
	.section	.note.gnu.property,"a"
	.align 8
	.long	1f - 0f
	.long	4f - 1f
	.long	5
0:
	.string	"GNU"
1:
	.align 8
	.long	0xc0000002
	.long	3f - 2f
2:
	.long	0x3
3:
	.align 8
4:

// original code: 
// https://developer.nvidia.com/gpugems/GPUGems3/gpugems3_ch39.html

// Compile & run with `nvcc scanBlelloch.cu && ./a.out <x>`
// where `x` defines the lower and upper integral's limits
// i.e. [-x, x] (see the header of `main`)


#include <hip/hip_runtime.h>
#include <cmath>
#include <cstdio>

#define NUM_BANKS 32
#define LOG_NUM_BANKS 5
#define CONFLICT_FREE_OFFSET(n) \
    ((n) >> LOG_NUM_BANKS + (n) >> (2 * LOG_NUM_BANKS))

__global__ void 
blocksPrescan(float * g_odata, float * g_idata, float * SUMS) {
    extern __shared__ float tmp[];  
    uint N = 2 * blockDim.x;

    uint ai = threadIdx.x;
    uint bi = threadIdx.x + N / 2;

    g_idata += blockIdx.x * N; 
    g_odata += blockIdx.x * N; 

    // load input into shared memory
    uint bankOffsetA = CONFLICT_FREE_OFFSET(ai);
    uint bankOffsetB = CONFLICT_FREE_OFFSET(bi);
    tmp[ai + bankOffsetA] = g_idata[ai]; 
    tmp[bi + bankOffsetB] = g_idata[bi];

    uint offset(1);

    // build sum in place up the tree (up-sweep)
    for (uint d=N>>1; d>0; d>>=1) { 
        __syncthreads();

        if (threadIdx.x < d) {
            uint ai = offset * (2 * threadIdx.x + 1) - 1;
            uint bi = offset * (2 * threadIdx.x + 2) - 1;
            ai += CONFLICT_FREE_OFFSET(ai);
            bi += CONFLICT_FREE_OFFSET(bi);
            tmp[bi] += tmp[ai];
        }
        offset <<= 1;
    }
    // write the sum of the array chunk to 'SUMS'
    // and  clear the last element 
    float t;
    if (!threadIdx.x) {
        uint IDX = N - 1;
        IDX += CONFLICT_FREE_OFFSET(N - 1); 

        if (SUMS) {
            t = tmp[IDX];  
            SUMS[blockIdx.x] = t;
        }
        tmp[IDX] = 0;  
    }

    // traverse down tree & build scan (down-sweep)
    for (uint d=1; d<N; d *= 2) { 
        offset >>= 1;
        __syncthreads();

        if (threadIdx.x < d) {
            uint ai = offset * (2 * threadIdx.x + 1) - 1;
            uint bi = offset * (2 * threadIdx.x + 2) - 1;
            ai += CONFLICT_FREE_OFFSET(ai);
            bi += CONFLICT_FREE_OFFSET(bi);

            t = tmp[ai];
            tmp[ai] = tmp[bi];
            tmp[bi] += t; 
        }
    }
    __syncthreads();

    // write results to device memory
    g_odata[ai] = tmp[ai + bankOffsetA]; 
    g_odata[bi] = tmp[bi + bankOffsetB];
}


__global__ 
void blocksShifter(float * g_odata, float * SUMS) {
    g_odata += 2 * blockIdx.x * blockDim.x;
    g_odata[threadIdx.x] += SUMS[blockIdx.x];
    g_odata[threadIdx.x + blockDim.x] += SUMS[blockIdx.x];
}

size_t smemSize(int n_el) {
    int extra_space = n_el / NUM_BANKS;
    extra_space += extra_space / NUM_BANKS;
    return sizeof(float) * (n_el + extra_space);
}


//////////////////////// MAIN //////////////////////////////
// Calculation of the integral \int_{-x}^x \exp(- t^2) dt //
////////////////////////////////////////////////////////////
int main(int argc, char ** argv) {
    // set the integral's limits 
    float x = atof(argv[1]);

    // discretization settings
    size_t n_blocks = 512;
    size_t block_size = 2048;
    size_t n_el = n_blocks * block_size;
    printf("Number of discretization points: %i\n", n_el);

    float * idata, * odata, * sums;
    hipMallocManaged(&idata, n_el * sizeof(float));
    hipMallocManaged(&odata, n_el * sizeof(float));
    hipMallocManaged(&sums,  n_blocks * sizeof(float));

    // calculate integrand's values
    float t, dt;
    dt = 2 * x / n_el;
    for (uint i=0; i<n_el; ++i) {
        t = - x + i * dt;
        idata[i] = exp(- t * t) * dt;
    }

    hipEvent_t start, stop;
    hipEventCreate(&start);
    hipEventCreate(&stop);

    // measure the execution time of the framed block
    hipEventRecord(start);
    //------------------------------
    blocksPrescan<<<n_blocks, block_size / 2, 
                    smemSize(block_size)>>>(odata, idata, sums);

    blocksPrescan<<<1, n_blocks / 2, 
                    smemSize(n_blocks)>>>(sums, sums, NULL);

    blocksShifter<<<n_blocks, block_size / 2>>>(odata, sums);
    //------------------------------
    hipEventRecord(stop);
    hipEventSynchronize(stop);

    float elapsed_time;
    hipEventElapsedTime(&elapsed_time, start, stop);
    printf("Elapsed time: %f ms\n", elapsed_time);
    printf("Results are written to 'output.bin'\n");

    FILE * cfout = fopen("output.bin", "wb");
    fwrite(odata, sizeof(float), n_el, cfout);
    fclose(cfout);

    hipFree(idata);
    hipFree(odata);
    hipFree(sums);
}

	.text
	.file	"scanBlelloch.hip"
	.globl	_Z28__device_stub__blocksPrescanPfS_S_ # -- Begin function _Z28__device_stub__blocksPrescanPfS_S_
	.type	_Z28__device_stub__blocksPrescanPfS_S_,@function
_Z28__device_stub__blocksPrescanPfS_S_: # @_Z28__device_stub__blocksPrescanPfS_S_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$112, %rsp
	.cfi_def_cfa_offset 160
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	40(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	32(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	24(%rsp), %rsi
	movq	%rdx, (%rsi)
	leaq	80(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	movq	%rsi, 16(%rbx)
	leaq	64(%rsp), %r14
	leaq	48(%rsp), %r15
	leaq	16(%rsp), %r12
	leaq	8(%rsp), %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13blocksPrescanPfS_S_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$128, %rsp
	.cfi_adjust_cfa_offset -128
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end0:
	.size	_Z28__device_stub__blocksPrescanPfS_S_, .Lfunc_end0-_Z28__device_stub__blocksPrescanPfS_S_
	.cfi_endproc
                                        # -- End function
	.globl	_Z28__device_stub__blocksShifterPfS_ # -- Begin function _Z28__device_stub__blocksShifterPfS_
	.type	_Z28__device_stub__blocksShifterPfS_,@function
_Z28__device_stub__blocksShifterPfS_:   # @_Z28__device_stub__blocksShifterPfS_
	.cfi_startproc
# %bb.0:
	pushq	%r15
	.cfi_def_cfa_offset 16
	pushq	%r14
	.cfi_def_cfa_offset 24
	pushq	%r13
	.cfi_def_cfa_offset 32
	pushq	%r12
	.cfi_def_cfa_offset 40
	pushq	%rbx
	.cfi_def_cfa_offset 48
	subq	$80, %rsp
	.cfi_def_cfa_offset 128
	.cfi_offset %rbx, -48
	.cfi_offset %r12, -40
	.cfi_offset %r13, -32
	.cfi_offset %r14, -24
	.cfi_offset %r15, -16
	leaq	24(%rsp), %rax
	movq	%rdi, (%rax)
	leaq	16(%rsp), %rcx
	movq	%rsi, (%rcx)
	leaq	64(%rsp), %rbx
	movq	%rax, (%rbx)
	movq	%rcx, 8(%rbx)
	leaq	48(%rsp), %r14
	leaq	32(%rsp), %r15
	leaq	8(%rsp), %r12
	movq	%rsp, %r13
	movq	%r14, %rdi
	movq	%r15, %rsi
	movq	%r12, %rdx
	movq	%r13, %rcx
	callq	__hipPopCallConfiguration
	movq	(%r14), %rsi
	movl	8(%r14), %edx
	movq	(%r15), %rcx
	movl	8(%r15), %r8d
	movl	$_Z13blocksShifterPfS_, %edi
	movq	%rbx, %r9
	pushq	(%r13)
	.cfi_adjust_cfa_offset 8
	pushq	(%r12)
	.cfi_adjust_cfa_offset 8
	callq	hipLaunchKernel
	addq	$96, %rsp
	.cfi_adjust_cfa_offset -96
	popq	%rbx
	.cfi_def_cfa_offset 40
	popq	%r12
	.cfi_def_cfa_offset 32
	popq	%r13
	.cfi_def_cfa_offset 24
	popq	%r14
	.cfi_def_cfa_offset 16
	popq	%r15
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end1:
	.size	_Z28__device_stub__blocksShifterPfS_, .Lfunc_end1-_Z28__device_stub__blocksShifterPfS_
	.cfi_endproc
                                        # -- End function
	.globl	_Z8smemSizei                    # -- Begin function _Z8smemSizei
	.type	_Z8smemSizei,@function
_Z8smemSizei:                           # @_Z8smemSizei
	.cfi_startproc
# %bb.0:
                                        # kill: def $edi killed $edi def $rdi
	leal	31(%rdi), %eax
	leal	1023(%rdi), %ecx
	testl	%edi, %edi
	cmovnsl	%edi, %eax
	cmovnsl	%edi, %ecx
	sarl	$5, %eax
	sarl	$10, %ecx
	addl	%edi, %ecx
	addl	%eax, %ecx
	movslq	%ecx, %rax
	shlq	$2, %rax
	retq
.Lfunc_end2:
	.size	_Z8smemSizei, .Lfunc_end2-_Z8smemSizei
	.cfi_endproc
                                        # -- End function
	.section	.rodata.cst4,"aM",@progbits,4
	.p2align	2, 0x0                          # -- Begin function main
.LCPI3_0:
	.long	0x35800000                      # float 9.53674316E-7
	.section	.rodata.cst16,"aM",@progbits,16
	.p2align	4, 0x0
.LCPI3_1:
	.long	0x80000000                      # float -0
	.long	0x80000000                      # float -0
	.long	0x80000000                      # float -0
	.long	0x80000000                      # float -0
	.text
	.globl	main
	.type	main,@function
main:                                   # @main
	.cfi_startproc
# %bb.0:
	pushq	%r14
	.cfi_def_cfa_offset 16
	pushq	%rbx
	.cfi_def_cfa_offset 24
	subq	$72, %rsp
	.cfi_def_cfa_offset 96
	.cfi_offset %rbx, -24
	.cfi_offset %r14, -16
	movq	8(%rsi), %rdi
	callq	atof
	cvtsd2ss	%xmm0, %xmm0
	movss	%xmm0, 4(%rsp)                  # 4-byte Spill
	xorl	%ebx, %ebx
	movl	$.L.str, %edi
	movl	$1048576, %esi                  # imm = 0x100000
	xorl	%eax, %eax
	callq	printf
	leaq	32(%rsp), %rdi
	movl	$4194304, %esi                  # imm = 0x400000
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	16(%rsp), %rdi
	movl	$4194304, %esi                  # imm = 0x400000
	movl	$1, %edx
	callq	hipMallocManaged
	leaq	8(%rsp), %rdi
	movl	$2048, %esi                     # imm = 0x800
	movl	$1, %edx
	callq	hipMallocManaged
	movss	4(%rsp), %xmm0                  # 4-byte Reload
                                        # xmm0 = mem[0],zero,zero,zero
	addss	%xmm0, %xmm0
	mulss	.LCPI3_0(%rip), %xmm0
	movss	%xmm0, 44(%rsp)                 # 4-byte Spill
	cvtss2sd	%xmm0, %xmm0
	movsd	%xmm0, 48(%rsp)                 # 8-byte Spill
.LBB3_1:                                # =>This Inner Loop Header: Depth=1
	movl	%ebx, %eax
	xorps	%xmm0, %xmm0
	cvtsi2ss	%rax, %xmm0
	mulss	44(%rsp), %xmm0                 # 4-byte Folded Reload
	subss	4(%rsp), %xmm0                  # 4-byte Folded Reload
	movaps	%xmm0, %xmm1
	xorps	.LCPI3_1(%rip), %xmm1
	mulss	%xmm0, %xmm1
	xorps	%xmm0, %xmm0
	cvtss2sd	%xmm1, %xmm0
	callq	exp
	mulsd	48(%rsp), %xmm0                 # 8-byte Folded Reload
	cvtsd2ss	%xmm0, %xmm0
	movq	32(%rsp), %rax
	movss	%xmm0, (%rax,%rbx,4)
	incq	%rbx
	cmpq	$1048576, %rbx                  # imm = 0x100000
	jne	.LBB3_1
# %bb.2:
	movabsq	$4294967808, %rbx               # imm = 0x100000200
	leaq	56(%rsp), %r14
	movq	%r14, %rdi
	callq	hipEventCreate
	leaq	24(%rsp), %rdi
	callq	hipEventCreate
	movq	(%r14), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	leaq	512(%rbx), %r14
	movl	$8456, %r8d                     # imm = 0x2108
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_4
# %bb.3:
	movq	16(%rsp), %rdi
	movq	32(%rsp), %rsi
	movq	8(%rsp), %rdx
	callq	_Z28__device_stub__blocksPrescanPfS_S_
.LBB3_4:
	leaq	-511(%rbx), %rdi
	leaq	-256(%rbx), %rdx
	movl	$2112, %r8d                     # imm = 0x840
	movl	$1, %esi
	movl	$1, %ecx
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_6
# %bb.5:
	movq	8(%rsp), %rdi
	movq	%rdi, %rsi
	xorl	%edx, %edx
	callq	_Z28__device_stub__blocksPrescanPfS_S_
.LBB3_6:
	movq	%rbx, %rdi
	movl	$1, %esi
	movq	%r14, %rdx
	movl	$1, %ecx
	xorl	%r8d, %r8d
	xorl	%r9d, %r9d
	callq	__hipPushCallConfiguration
	testl	%eax, %eax
	jne	.LBB3_8
# %bb.7:
	movq	16(%rsp), %rdi
	movq	8(%rsp), %rsi
	callq	_Z28__device_stub__blocksShifterPfS_
.LBB3_8:
	movq	24(%rsp), %rdi
	xorl	%esi, %esi
	callq	hipEventRecord
	movq	24(%rsp), %rdi
	callq	hipEventSynchronize
	movq	56(%rsp), %rsi
	movq	24(%rsp), %rdx
	leaq	68(%rsp), %rbx
	movq	%rbx, %rdi
	callq	hipEventElapsedTime
	xorps	%xmm0, %xmm0
	cvtss2sd	(%rbx), %xmm0
	movl	$.L.str.1, %edi
	movb	$1, %al
	callq	printf
	movl	$.Lstr, %edi
	callq	puts@PLT
	movl	$.L.str.3, %edi
	movl	$.L.str.4, %esi
	callq	fopen
	movq	%rax, %rbx
	movq	16(%rsp), %rdi
	movl	$4, %esi
	movl	$1048576, %edx                  # imm = 0x100000
	movq	%rax, %rcx
	callq	fwrite
	movq	%rbx, %rdi
	callq	fclose
	movq	32(%rsp), %rdi
	callq	hipFree
	movq	16(%rsp), %rdi
	callq	hipFree
	movq	8(%rsp), %rdi
	callq	hipFree
	xorl	%eax, %eax
	addq	$72, %rsp
	.cfi_def_cfa_offset 24
	popq	%rbx
	.cfi_def_cfa_offset 16
	popq	%r14
	.cfi_def_cfa_offset 8
	retq
.Lfunc_end3:
	.size	main, .Lfunc_end3-main
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_ctor
	.type	__hip_module_ctor,@function
__hip_module_ctor:                      # @__hip_module_ctor
	.cfi_startproc
# %bb.0:
	pushq	%rbx
	.cfi_def_cfa_offset 16
	subq	$32, %rsp
	.cfi_def_cfa_offset 48
	.cfi_offset %rbx, -16
	movq	__hip_gpubin_handle(%rip), %rbx
	testq	%rbx, %rbx
	jne	.LBB4_2
# %bb.1:
	movl	$__hip_fatbin_wrapper, %edi
	callq	__hipRegisterFatBinary
	movq	%rax, %rbx
	movq	%rax, __hip_gpubin_handle(%rip)
.LBB4_2:
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13blocksPrescanPfS_S_, %esi
	movl	$.L__unnamed_1, %edx
	movl	$.L__unnamed_1, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	xorps	%xmm0, %xmm0
	movups	%xmm0, 16(%rsp)
	movups	%xmm0, (%rsp)
	movl	$_Z13blocksShifterPfS_, %esi
	movl	$.L__unnamed_2, %edx
	movl	$.L__unnamed_2, %ecx
	movq	%rbx, %rdi
	movl	$-1, %r8d
	xorl	%r9d, %r9d
	callq	__hipRegisterFunction
	movl	$__hip_module_dtor, %edi
	addq	$32, %rsp
	.cfi_def_cfa_offset 16
	popq	%rbx
	.cfi_def_cfa_offset 8
	jmp	atexit                          # TAILCALL
.Lfunc_end4:
	.size	__hip_module_ctor, .Lfunc_end4-__hip_module_ctor
	.cfi_endproc
                                        # -- End function
	.p2align	4, 0x90                         # -- Begin function __hip_module_dtor
	.type	__hip_module_dtor,@function
__hip_module_dtor:                      # @__hip_module_dtor
	.cfi_startproc
# %bb.0:
	movq	__hip_gpubin_handle(%rip), %rdi
	testq	%rdi, %rdi
	je	.LBB5_2
# %bb.1:
	pushq	%rax
	.cfi_def_cfa_offset 16
	callq	__hipUnregisterFatBinary
	movq	$0, __hip_gpubin_handle(%rip)
	addq	$8, %rsp
	.cfi_def_cfa_offset 8
.LBB5_2:
	retq
.Lfunc_end5:
	.size	__hip_module_dtor, .Lfunc_end5-__hip_module_dtor
	.cfi_endproc
                                        # -- End function
	.type	_Z13blocksPrescanPfS_S_,@object # @_Z13blocksPrescanPfS_S_
	.section	.rodata,"a",@progbits
	.globl	_Z13blocksPrescanPfS_S_
	.p2align	3, 0x0
_Z13blocksPrescanPfS_S_:
	.quad	_Z28__device_stub__blocksPrescanPfS_S_
	.size	_Z13blocksPrescanPfS_S_, 8

	.type	_Z13blocksShifterPfS_,@object   # @_Z13blocksShifterPfS_
	.globl	_Z13blocksShifterPfS_
	.p2align	3, 0x0
_Z13blocksShifterPfS_:
	.quad	_Z28__device_stub__blocksShifterPfS_
	.size	_Z13blocksShifterPfS_, 8

	.type	.L.str,@object                  # @.str
	.section	.rodata.str1.1,"aMS",@progbits,1
.L.str:
	.asciz	"Number of discretization points: %i\n"
	.size	.L.str, 37

	.type	.L.str.1,@object                # @.str.1
.L.str.1:
	.asciz	"Elapsed time: %f ms\n"
	.size	.L.str.1, 21

	.type	.L.str.3,@object                # @.str.3
.L.str.3:
	.asciz	"output.bin"
	.size	.L.str.3, 11

	.type	.L.str.4,@object                # @.str.4
.L.str.4:
	.asciz	"wb"
	.size	.L.str.4, 3

	.type	.L__unnamed_1,@object           # @0
.L__unnamed_1:
	.asciz	"_Z13blocksPrescanPfS_S_"
	.size	.L__unnamed_1, 24

	.type	.L__unnamed_2,@object           # @1
.L__unnamed_2:
	.asciz	"_Z13blocksShifterPfS_"
	.size	.L__unnamed_2, 22

	.type	__hip_fatbin_wrapper,@object    # @__hip_fatbin_wrapper
	.section	.hipFatBinSegment,"a",@progbits
	.p2align	3, 0x0
__hip_fatbin_wrapper:
	.long	1212764230                      # 0x48495046
	.long	1                               # 0x1
	.quad	__hip_fatbin
	.quad	0
	.size	__hip_fatbin_wrapper, 24

	.type	__hip_gpubin_handle,@object     # @__hip_gpubin_handle
	.local	__hip_gpubin_handle
	.comm	__hip_gpubin_handle,8,8
	.section	.init_array,"aw",@init_array
	.p2align	3, 0x0
	.quad	__hip_module_ctor
	.type	__hip_cuid_,@object             # @__hip_cuid_
	.bss
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               # 0x0
	.size	__hip_cuid_, 1

	.type	.Lstr,@object                   # @str
	.section	.rodata.str1.1,"aMS",@progbits,1
.Lstr:
	.asciz	"Results are written to 'output.bin'"
	.size	.Lstr, 36

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym _Z28__device_stub__blocksPrescanPfS_S_
	.addrsig_sym _Z28__device_stub__blocksShifterPfS_
	.addrsig_sym __hip_module_ctor
	.addrsig_sym __hip_module_dtor
	.addrsig_sym _Z13blocksPrescanPfS_S_
	.addrsig_sym _Z13blocksShifterPfS_
	.addrsig_sym __hip_fatbin
	.addrsig_sym __hip_fatbin_wrapper
	.addrsig_sym __hip_cuid_

	.text
	.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
	.protected	_Z13blocksPrescanPfS_S_ ; -- Begin function _Z13blocksPrescanPfS_S_
	.globl	_Z13blocksPrescanPfS_S_
	.p2align	8
	.type	_Z13blocksPrescanPfS_S_,@function
_Z13blocksPrescanPfS_S_:                ; @_Z13blocksPrescanPfS_S_
; %bb.0:
	s_clause 0x1
	s_load_b32 s11, s[0:1], 0x24
	s_load_b128 s[4:7], s[0:1], 0x0
	s_mov_b32 s3, 0
	v_lshlrev_b32_e32 v1, 2, v0
	s_load_b64 s[0:1], s[0:1], 0x10
	v_lshl_or_b32 v4, v0, 1, 1
	s_mov_b32 s8, s15
	s_waitcnt lgkmcnt(0)
	s_and_b32 s9, s11, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b32 s10, s9, 1
	s_mul_i32 s2, s10, s15
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshl_b64 s[2:3], s[2:3], 2
	s_add_u32 s12, s6, s2
	s_addc_u32 s13, s7, s3
	v_add_co_u32 v2, s6, s12, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e64 v3, null, s13, 0, s6
	s_lshl_b32 s6, s9, 2
	s_mov_b32 s7, 1
	v_add_co_u32 v2, vcc_lo, v2, s6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_clause 0x1
	global_load_b32 v5, v1, s[12:13]
	global_load_b32 v6, v[2:3], off
	v_add_nc_u32_e32 v2, s9, v0
	v_cmp_eq_u16_e64 s12, s11, 0
	v_cmp_ne_u16_e64 s11, s11, 0
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v3, 5, v2
	s_and_b32 vcc_lo, exec_lo, s12
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
	v_lshrrev_b32_e32 v3, v3, v2
	v_lshrrev_b32_e32 v3, 10, v3
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v2, v3, v2
	v_add_nc_u32_e32 v3, 0, v1
	v_lshl_add_u32 v2, v2, 2, 0
	s_waitcnt vmcnt(1)
	ds_store_b32 v3, v5
	s_waitcnt vmcnt(0)
	ds_store_b32 v2, v6
	s_cbranch_vccnz .LBB0_5
.LBB0_1:                                ; =>This Inner Loop Header: Depth=1
	s_mov_b32 s12, exec_lo
	s_waitcnt lgkmcnt(0)
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e64 s9, v0
	s_cbranch_execz .LBB0_3
; %bb.2:                                ;   in Loop: Header=BB0_1 Depth=1
	v_mul_lo_u32 v5, s7, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v6, s7, v5
	v_add_nc_u32_e32 v7, -1, v5
	v_add_nc_u32_e32 v5, 4, v5
	v_add_nc_u32_e32 v8, -1, v6
	v_add_nc_u32_e32 v6, 4, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshrrev_b32_e32 v5, v5, v7
	v_lshrrev_b32_e32 v6, v6, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshrrev_b32_e32 v5, 10, v5
	v_lshrrev_b32_e32 v6, 10, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v5, v5, v7
	v_add_nc_u32_e32 v6, v6, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshl_add_u32 v5, v5, 2, 0
	v_lshl_add_u32 v6, v6, 2, 0
	ds_load_b32 v5, v5
	ds_load_b32 v7, v6
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v5, v5, v7
	ds_store_b32 v6, v5
.LBB0_3:                                ;   in Loop: Header=BB0_1 Depth=1
	s_or_b32 exec_lo, exec_lo, s12
	s_lshl_b32 s7, s7, 1
	s_lshr_b32 s12, s9, 1
	s_cmp_lt_u32 s9, 2
	s_cbranch_scc1 .LBB0_5
; %bb.4:                                ;   in Loop: Header=BB0_1 Depth=1
	s_mov_b32 s9, s12
	s_branch .LBB0_1
.LBB0_5:                                ; %Flow94
	s_mov_b32 s12, exec_lo
	v_cmpx_eq_u32_e32 0, v0
	s_cbranch_execz .LBB0_9
; %bb.6:
	s_add_i32 s9, s10, -1
	s_add_i32 s13, s10, 4
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_lshr_b32 s13, s9, s13
	s_lshr_b32 s13, s13, 10
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_i32 s13, s13, s9
	s_cmp_eq_u64 s[0:1], 0
	s_cbranch_scc1 .LBB0_8
; %bb.7:
	s_mov_b32 s9, 0
	v_mov_b32_e32 v6, 0
	s_lshl_b64 s[8:9], s[8:9], 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
	s_add_u32 s0, s0, s8
	s_addc_u32 s1, s1, s9
	s_lshl_b32 s8, s13, 2
	s_add_i32 s8, s8, 0
	s_delay_alu instid0(SALU_CYCLE_1)
	v_mov_b32_e32 v5, s8
	ds_load_b32 v5, v5
	s_waitcnt lgkmcnt(0)
	global_store_b32 v6, v5, s[0:1]
.LBB0_8:
	s_lshl_b32 s0, s13, 2
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_add_i32 s0, s0, 0
	v_dual_mov_b32 v5, 0 :: v_dual_mov_b32 v6, s0
	ds_store_b32 v6, v5
.LBB0_9:                                ; %Flow92
	s_or_b32 exec_lo, exec_lo, s12
	s_delay_alu instid0(SALU_CYCLE_1)
	s_and_not1_b32 vcc_lo, exec_lo, s11
	s_mov_b32 s0, 1
	s_cbranch_vccnz .LBB0_13
.LBB0_10:                               ; =>This Inner Loop Header: Depth=1
	s_lshr_b32 s7, s7, 1
	s_mov_b32 s1, exec_lo
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	v_cmpx_gt_u32_e64 s0, v0
	s_cbranch_execz .LBB0_12
; %bb.11:                               ;   in Loop: Header=BB0_10 Depth=1
	v_mul_lo_u32 v5, s7, v4
	s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
	v_add_nc_u32_e32 v6, s7, v5
	v_add_nc_u32_e32 v7, -1, v5
	v_add_nc_u32_e32 v5, 4, v5
	v_add_nc_u32_e32 v8, -1, v6
	v_add_nc_u32_e32 v6, 4, v6
	s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshrrev_b32_e32 v5, v5, v7
	v_lshrrev_b32_e32 v6, v6, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshrrev_b32_e32 v5, 10, v5
	v_lshrrev_b32_e32 v6, 10, v6
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_nc_u32_e32 v5, v5, v7
	v_add_nc_u32_e32 v6, v6, v8
	s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_lshl_add_u32 v5, v5, 2, 0
	v_lshl_add_u32 v6, v6, 2, 0
	ds_load_b32 v7, v5
	ds_load_b32 v8, v6
	s_waitcnt lgkmcnt(0)
	v_add_f32_e32 v7, v7, v8
	ds_store_b32 v5, v8
	ds_store_b32 v6, v7
.LBB0_12:                               ;   in Loop: Header=BB0_10 Depth=1
	s_or_b32 exec_lo, exec_lo, s1
	s_lshl_b32 s0, s0, 1
	s_delay_alu instid0(SALU_CYCLE_1)
	s_cmp_ge_u32 s0, s10
	s_cbranch_scc0 .LBB0_10
.LBB0_13:                               ; %._crit_edge81
	s_waitcnt lgkmcnt(0)
	s_waitcnt_vscnt null, 0x0
	s_barrier
	buffer_gl0_inv
	ds_load_b32 v0, v3
	ds_load_b32 v4, v2
	s_add_u32 s0, s4, s2
	s_addc_u32 s1, s5, s3
	v_add_co_u32 v2, s2, s0, v1
	s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)
	v_add_co_ci_u32_e64 v3, null, s1, 0, s2
	v_add_co_u32 v2, vcc_lo, v2, s6
	s_delay_alu instid0(VALU_DEP_2)
	v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
	s_waitcnt lgkmcnt(1)
	global_store_b32 v1, v0, s[0:1]
	s_waitcnt lgkmcnt(0)
	global_store_b32 v[2:3], v4, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13blocksPrescanPfS_S_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 280
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 9
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end0:
	.size	_Z13blocksPrescanPfS_S_, .Lfunc_end0-_Z13blocksPrescanPfS_S_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 884
; NumSgprs: 18
; NumVgprs: 9
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 1
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 9
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.protected	_Z13blocksShifterPfS_   ; -- Begin function _Z13blocksShifterPfS_
	.globl	_Z13blocksShifterPfS_
	.p2align	8
	.type	_Z13blocksShifterPfS_,@function
_Z13blocksShifterPfS_:                  ; @_Z13blocksShifterPfS_
; %bb.0:
	s_clause 0x1
	s_load_b32 s5, s[0:1], 0x1c
	s_load_b128 s[0:3], s[0:1], 0x0
	s_mov_b32 s7, 0
	v_dual_mov_b32 v3, 0 :: v_dual_lshlrev_b32 v2, 2, v0
	s_mov_b32 s4, s15
	s_waitcnt lgkmcnt(0)
	s_and_b32 s10, s5, 0xffff
	s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
	s_mul_i32 s5, s15, s10
	s_lshl_b32 s6, s5, 1
	s_mov_b32 s5, s7
	s_lshl_b64 s[8:9], s[6:7], 2
	s_delay_alu instid0(SALU_CYCLE_1)
	s_add_u32 s0, s0, s8
	s_addc_u32 s1, s1, s9
	s_lshl_b64 s[4:5], s[4:5], 2
	global_load_b32 v0, v2, s[0:1]
	s_add_u32 s2, s2, s4
	s_addc_u32 s3, s3, s5
	v_add_co_u32 v1, s5, s0, v2
	s_load_b32 s4, s[2:3], 0x0
	v_add_co_ci_u32_e64 v4, null, s1, 0, s5
	s_lshl_b32 s5, s10, 2
	s_waitcnt vmcnt(0) lgkmcnt(0)
	v_add_f32_e32 v5, s4, v0
	v_add_co_u32 v0, vcc_lo, v1, s5
	v_add_co_ci_u32_e32 v1, vcc_lo, 0, v4, vcc_lo
	global_store_b32 v2, v5, s[0:1]
	global_load_b32 v2, v3, s[2:3]
	global_load_b32 v3, v[0:1], off
	s_waitcnt vmcnt(0)
	v_add_f32_e32 v2, v2, v3
	global_store_b32 v[0:1], v2, off
	s_nop 0
	s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
	s_endpgm
	.section	.rodata,"a",@progbits
	.p2align	6, 0x0
	.amdhsa_kernel _Z13blocksShifterPfS_
		.amdhsa_group_segment_fixed_size 0
		.amdhsa_private_segment_fixed_size 0
		.amdhsa_kernarg_size 272
		.amdhsa_user_sgpr_count 15
		.amdhsa_user_sgpr_dispatch_ptr 0
		.amdhsa_user_sgpr_queue_ptr 0
		.amdhsa_user_sgpr_kernarg_segment_ptr 1
		.amdhsa_user_sgpr_dispatch_id 0
		.amdhsa_user_sgpr_private_segment_size 0
		.amdhsa_wavefront_size32 1
		.amdhsa_uses_dynamic_stack 0
		.amdhsa_enable_private_segment 0
		.amdhsa_system_sgpr_workgroup_id_x 1
		.amdhsa_system_sgpr_workgroup_id_y 0
		.amdhsa_system_sgpr_workgroup_id_z 0
		.amdhsa_system_sgpr_workgroup_info 0
		.amdhsa_system_vgpr_workitem_id 0
		.amdhsa_next_free_vgpr 6
		.amdhsa_next_free_sgpr 16
		.amdhsa_float_round_mode_32 0
		.amdhsa_float_round_mode_16_64 0
		.amdhsa_float_denorm_mode_32 3
		.amdhsa_float_denorm_mode_16_64 3
		.amdhsa_dx10_clamp 1
		.amdhsa_ieee_mode 1
		.amdhsa_fp16_overflow 0
		.amdhsa_workgroup_processor_mode 1
		.amdhsa_memory_ordered 1
		.amdhsa_forward_progress 0
		.amdhsa_shared_vgpr_count 0
		.amdhsa_exception_fp_ieee_invalid_op 0
		.amdhsa_exception_fp_denorm_src 0
		.amdhsa_exception_fp_ieee_div_zero 0
		.amdhsa_exception_fp_ieee_overflow 0
		.amdhsa_exception_fp_ieee_underflow 0
		.amdhsa_exception_fp_ieee_inexact 0
		.amdhsa_exception_int_div_zero 0
	.end_amdhsa_kernel
	.text
.Lfunc_end1:
	.size	_Z13blocksShifterPfS_, .Lfunc_end1-_Z13blocksShifterPfS_
                                        ; -- End function
	.section	.AMDGPU.csdata,"",@progbits
; Kernel info:
; codeLenInByte = 200
; NumSgprs: 18
; NumVgprs: 6
; ScratchSize: 0
; MemoryBound: 0
; FloatMode: 240
; IeeeMode: 1
; LDSByteSize: 0 bytes/workgroup (compile time only)
; SGPRBlocks: 2
; VGPRBlocks: 0
; NumSGPRsForWavesPerEU: 18
; NumVGPRsForWavesPerEU: 6
; Occupancy: 16
; WaveLimiterHint : 0
; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0
; COMPUTE_PGM_RSRC2:USER_SGPR: 15
; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0
; COMPUTE_PGM_RSRC2:TGID_X_EN: 1
; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0
; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0
; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0
	.text
	.p2alignl 7, 3214868480
	.fill 96, 4, 3214868480
	.type	__hip_cuid_,@object             ; @__hip_cuid_
	.section	.bss,"aw",@nobits
	.globl	__hip_cuid_
__hip_cuid_:
	.byte	0                               ; 0x0
	.size	__hip_cuid_, 1

	.ident	"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7e55c91490b07c49d8960fa7983d864936c4)"
	.section	".note.GNU-stack","",@progbits
	.addrsig
	.addrsig_sym __hip_cuid_
	.amdgpu_metadata
---
amdhsa.kernels:
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         16
        .size:           8
        .value_kind:     global_buffer
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         28
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         32
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         36
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         38
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         40
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         42
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         44
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         46
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         80
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         88
        .size:           2
        .value_kind:     hidden_grid_dims
      - .offset:         144
        .size:           4
        .value_kind:     hidden_dynamic_lds_size
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 280
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z13blocksPrescanPfS_S_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z13blocksPrescanPfS_S_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     9
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
  - .args:
      - .address_space:  global
        .offset:         0
        .size:           8
        .value_kind:     global_buffer
      - .address_space:  global
        .offset:         8
        .size:           8
        .value_kind:     global_buffer
      - .offset:         16
        .size:           4
        .value_kind:     hidden_block_count_x
      - .offset:         20
        .size:           4
        .value_kind:     hidden_block_count_y
      - .offset:         24
        .size:           4
        .value_kind:     hidden_block_count_z
      - .offset:         28
        .size:           2
        .value_kind:     hidden_group_size_x
      - .offset:         30
        .size:           2
        .value_kind:     hidden_group_size_y
      - .offset:         32
        .size:           2
        .value_kind:     hidden_group_size_z
      - .offset:         34
        .size:           2
        .value_kind:     hidden_remainder_x
      - .offset:         36
        .size:           2
        .value_kind:     hidden_remainder_y
      - .offset:         38
        .size:           2
        .value_kind:     hidden_remainder_z
      - .offset:         56
        .size:           8
        .value_kind:     hidden_global_offset_x
      - .offset:         64
        .size:           8
        .value_kind:     hidden_global_offset_y
      - .offset:         72
        .size:           8
        .value_kind:     hidden_global_offset_z
      - .offset:         80
        .size:           2
        .value_kind:     hidden_grid_dims
    .group_segment_fixed_size: 0
    .kernarg_segment_align: 8
    .kernarg_segment_size: 272
    .language:       OpenCL C
    .language_version:
      - 2
      - 0
    .max_flat_workgroup_size: 1024
    .name:           _Z13blocksShifterPfS_
    .private_segment_fixed_size: 0
    .sgpr_count:     18
    .sgpr_spill_count: 0
    .symbol:         _Z13blocksShifterPfS_.kd
    .uniform_work_group_size: 1
    .uses_dynamic_stack: false
    .vgpr_count:     6
    .vgpr_spill_count: 0
    .wavefront_size: 32
    .workgroup_processor_mode: 1
amdhsa.target:   amdgcn-amd-amdhsa--gfx1100
amdhsa.version:
  - 1
  - 2
...

	.end_amdgpu_metadata
